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-rw-r--r--drivers/watchdog/hpwdt.c5
-rw-r--r--drivers/watchdog/iTCO_vendor_support.c31
-rw-r--r--drivers/watchdog/iTCO_wdt.c164
-rw-r--r--drivers/watchdog/mtx-1_wdt.c4
4 files changed, 116 insertions, 88 deletions
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index a3765e0be4a8..763c1ea5dce5 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -40,6 +40,7 @@
40#include <linux/bootmem.h> 40#include <linux/bootmem.h>
41#include <linux/slab.h> 41#include <linux/slab.h>
42#include <asm/desc.h> 42#include <asm/desc.h>
43#include <asm/cacheflush.h>
43 44
44#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ 45#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
45#define CRU_BIOS_SIGNATURE_VALUE 0x55524324 46#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
@@ -394,6 +395,8 @@ static void __devinit dmi_find_cru(const struct dmi_header *dm)
394 smbios_cru64_ptr->double_offset; 395 smbios_cru64_ptr->double_offset;
395 cru_rom_addr = ioremap(cru_physical_address, 396 cru_rom_addr = ioremap(cru_physical_address,
396 smbios_cru64_ptr->double_length); 397 smbios_cru64_ptr->double_length);
398 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
399 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
397 } 400 }
398 } 401 }
399} 402}
@@ -482,7 +485,7 @@ static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
482 "Management Log for details.\n"); 485 "Management Log for details.\n");
483 } 486 }
484 487
485 return NOTIFY_STOP; 488 return NOTIFY_OK;
486} 489}
487 490
488/* 491/*
diff --git a/drivers/watchdog/iTCO_vendor_support.c b/drivers/watchdog/iTCO_vendor_support.c
index ca344a85eb95..2474ebca88f6 100644
--- a/drivers/watchdog/iTCO_vendor_support.c
+++ b/drivers/watchdog/iTCO_vendor_support.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * intel TCO vendor specific watchdog driver support 2 * intel TCO vendor specific watchdog driver support
3 * 3 *
4 * (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>. 4 * (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -19,8 +19,7 @@
19 19
20/* Module and version information */ 20/* Module and version information */
21#define DRV_NAME "iTCO_vendor_support" 21#define DRV_NAME "iTCO_vendor_support"
22#define DRV_VERSION "1.01" 22#define DRV_VERSION "1.02"
23#define DRV_RELDATE "11-Nov-2006"
24#define PFX DRV_NAME ": " 23#define PFX DRV_NAME ": "
25 24
26/* Includes */ 25/* Includes */
@@ -78,24 +77,6 @@ MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (n
78 * 20.6 seconds. 77 * 20.6 seconds.
79 */ 78 */
80 79
81static void supermicro_old_pre_start(unsigned long acpibase)
82{
83 unsigned long val32;
84
85 val32 = inl(SMI_EN);
86 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
87 outl(val32, SMI_EN); /* Needed to activate watchdog */
88}
89
90static void supermicro_old_pre_stop(unsigned long acpibase)
91{
92 unsigned long val32;
93
94 val32 = inl(SMI_EN);
95 val32 &= 0x00002000; /* Turn on SMI clearing watchdog */
96 outl(val32, SMI_EN); /* Needed to deactivate watchdog */
97}
98
99static void supermicro_old_pre_keepalive(unsigned long acpibase) 80static void supermicro_old_pre_keepalive(unsigned long acpibase)
100{ 81{
101 /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */ 82 /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
@@ -247,18 +228,14 @@ static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
247void iTCO_vendor_pre_start(unsigned long acpibase, 228void iTCO_vendor_pre_start(unsigned long acpibase,
248 unsigned int heartbeat) 229 unsigned int heartbeat)
249{ 230{
250 if (vendorsupport == SUPERMICRO_OLD_BOARD) 231 if (vendorsupport == SUPERMICRO_NEW_BOARD)
251 supermicro_old_pre_start(acpibase);
252 else if (vendorsupport == SUPERMICRO_NEW_BOARD)
253 supermicro_new_pre_start(heartbeat); 232 supermicro_new_pre_start(heartbeat);
254} 233}
255EXPORT_SYMBOL(iTCO_vendor_pre_start); 234EXPORT_SYMBOL(iTCO_vendor_pre_start);
256 235
257void iTCO_vendor_pre_stop(unsigned long acpibase) 236void iTCO_vendor_pre_stop(unsigned long acpibase)
258{ 237{
259 if (vendorsupport == SUPERMICRO_OLD_BOARD) 238 if (vendorsupport == SUPERMICRO_NEW_BOARD)
260 supermicro_old_pre_stop(acpibase);
261 else if (vendorsupport == SUPERMICRO_NEW_BOARD)
262 supermicro_new_pre_stop(); 239 supermicro_new_pre_stop();
263} 240}
264EXPORT_SYMBOL(iTCO_vendor_pre_stop); 241EXPORT_SYMBOL(iTCO_vendor_pre_stop);
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index bfb93bc2ca9f..26173a270e94 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets) 2 * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets)
3 * 3 *
4 * (c) Copyright 2006-2007 Wim Van Sebroeck <wim@iguana.be>. 4 * (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -20,34 +20,41 @@
20 * 82801BAM (ICH2-M) : document number 290687-002, 298242-027, 20 * 82801BAM (ICH2-M) : document number 290687-002, 298242-027,
21 * 82801CA (ICH3-S) : document number 290733-003, 290739-013, 21 * 82801CA (ICH3-S) : document number 290733-003, 290739-013,
22 * 82801CAM (ICH3-M) : document number 290716-001, 290718-007, 22 * 82801CAM (ICH3-M) : document number 290716-001, 290718-007,
23 * 82801DB (ICH4) : document number 290744-001, 290745-020, 23 * 82801DB (ICH4) : document number 290744-001, 290745-025,
24 * 82801DBM (ICH4-M) : document number 252337-001, 252663-005, 24 * 82801DBM (ICH4-M) : document number 252337-001, 252663-008,
25 * 82801E (C-ICH) : document number 273599-001, 273645-002, 25 * 82801E (C-ICH) : document number 273599-001, 273645-002,
26 * 82801EB (ICH5) : document number 252516-001, 252517-003, 26 * 82801EB (ICH5) : document number 252516-001, 252517-028,
27 * 82801ER (ICH5R) : document number 252516-001, 252517-003, 27 * 82801ER (ICH5R) : document number 252516-001, 252517-028,
28 * 82801FB (ICH6) : document number 301473-002, 301474-007, 28 * 6300ESB (6300ESB) : document number 300641-004, 300884-013,
29 * 82801FR (ICH6R) : document number 301473-002, 301474-007, 29 * 82801FB (ICH6) : document number 301473-002, 301474-026,
30 * 82801FBM (ICH6-M) : document number 301473-002, 301474-007, 30 * 82801FR (ICH6R) : document number 301473-002, 301474-026,
31 * 82801FW (ICH6W) : document number 301473-001, 301474-007, 31 * 82801FBM (ICH6-M) : document number 301473-002, 301474-026,
32 * 82801FRW (ICH6RW) : document number 301473-001, 301474-007, 32 * 82801FW (ICH6W) : document number 301473-001, 301474-026,
33 * 82801GB (ICH7) : document number 307013-002, 307014-009, 33 * 82801FRW (ICH6RW) : document number 301473-001, 301474-026,
34 * 82801GR (ICH7R) : document number 307013-002, 307014-009, 34 * 631xESB (631xESB) : document number 313082-001, 313075-006,
35 * 82801GDH (ICH7DH) : document number 307013-002, 307014-009, 35 * 632xESB (632xESB) : document number 313082-001, 313075-006,
36 * 82801GBM (ICH7-M) : document number 307013-002, 307014-009, 36 * 82801GB (ICH7) : document number 307013-003, 307014-024,
37 * 82801GHM (ICH7-M DH) : document number 307013-002, 307014-009, 37 * 82801GR (ICH7R) : document number 307013-003, 307014-024,
38 * 82801HB (ICH8) : document number 313056-003, 313057-009, 38 * 82801GDH (ICH7DH) : document number 307013-003, 307014-024,
39 * 82801HR (ICH8R) : document number 313056-003, 313057-009, 39 * 82801GBM (ICH7-M) : document number 307013-003, 307014-024,
40 * 82801HBM (ICH8M) : document number 313056-003, 313057-009, 40 * 82801GHM (ICH7-M DH) : document number 307013-003, 307014-024,
41 * 82801HH (ICH8DH) : document number 313056-003, 313057-009, 41 * 82801GU (ICH7-U) : document number 307013-003, 307014-024,
42 * 82801HO (ICH8DO) : document number 313056-003, 313057-009, 42 * 82801HB (ICH8) : document number 313056-003, 313057-017,
43 * 82801HEM (ICH8M-E) : document number 313056-003, 313057-009, 43 * 82801HR (ICH8R) : document number 313056-003, 313057-017,
44 * 82801IB (ICH9) : document number 316972-001, 316973-006, 44 * 82801HBM (ICH8M) : document number 313056-003, 313057-017,
45 * 82801IR (ICH9R) : document number 316972-001, 316973-006, 45 * 82801HH (ICH8DH) : document number 313056-003, 313057-017,
46 * 82801IH (ICH9DH) : document number 316972-001, 316973-006, 46 * 82801HO (ICH8DO) : document number 313056-003, 313057-017,
47 * 82801IO (ICH9DO) : document number 316972-001, 316973-006, 47 * 82801HEM (ICH8M-E) : document number 313056-003, 313057-017,
48 * 6300ESB (6300ESB) : document number 300641-003, 300884-010, 48 * 82801IB (ICH9) : document number 316972-004, 316973-012,
49 * 631xESB (631xESB) : document number 313082-001, 313075-005, 49 * 82801IR (ICH9R) : document number 316972-004, 316973-012,
50 * 632xESB (632xESB) : document number 313082-001, 313075-005 50 * 82801IH (ICH9DH) : document number 316972-004, 316973-012,
51 * 82801IO (ICH9DO) : document number 316972-004, 316973-012,
52 * 82801IBM (ICH9M) : document number 316972-004, 316973-012,
53 * 82801IEM (ICH9M-E) : document number 316972-004, 316973-012,
54 * 82801JIB (ICH10) : document number 319973-002, 319974-002,
55 * 82801JIR (ICH10R) : document number 319973-002, 319974-002,
56 * 82801JD (ICH10D) : document number 319973-002, 319974-002,
57 * 82801JDO (ICH10DO) : document number 319973-002, 319974-002
51 */ 58 */
52 59
53/* 60/*
@@ -56,8 +63,7 @@
56 63
57/* Module and version information */ 64/* Module and version information */
58#define DRV_NAME "iTCO_wdt" 65#define DRV_NAME "iTCO_wdt"
59#define DRV_VERSION "1.03" 66#define DRV_VERSION "1.04"
60#define DRV_RELDATE "30-Apr-2008"
61#define PFX DRV_NAME ": " 67#define PFX DRV_NAME ": "
62 68
63/* Includes */ 69/* Includes */
@@ -96,19 +102,26 @@ enum iTCO_chipsets {
96 TCO_ICH6, /* ICH6 & ICH6R */ 102 TCO_ICH6, /* ICH6 & ICH6R */
97 TCO_ICH6M, /* ICH6-M */ 103 TCO_ICH6M, /* ICH6-M */
98 TCO_ICH6W, /* ICH6W & ICH6RW */ 104 TCO_ICH6W, /* ICH6W & ICH6RW */
105 TCO_631XESB, /* 631xESB/632xESB */
99 TCO_ICH7, /* ICH7 & ICH7R */ 106 TCO_ICH7, /* ICH7 & ICH7R */
100 TCO_ICH7M, /* ICH7-M */ 107 TCO_ICH7DH, /* ICH7DH */
108 TCO_ICH7M, /* ICH7-M & ICH7-U */
101 TCO_ICH7MDH, /* ICH7-M DH */ 109 TCO_ICH7MDH, /* ICH7-M DH */
102 TCO_ICH8, /* ICH8 & ICH8R */ 110 TCO_ICH8, /* ICH8 & ICH8R */
103 TCO_ICH8ME, /* ICH8M-E */
104 TCO_ICH8DH, /* ICH8DH */ 111 TCO_ICH8DH, /* ICH8DH */
105 TCO_ICH8DO, /* ICH8DO */ 112 TCO_ICH8DO, /* ICH8DO */
106 TCO_ICH8M, /* ICH8M */ 113 TCO_ICH8M, /* ICH8M */
114 TCO_ICH8ME, /* ICH8M-E */
107 TCO_ICH9, /* ICH9 */ 115 TCO_ICH9, /* ICH9 */
108 TCO_ICH9R, /* ICH9R */ 116 TCO_ICH9R, /* ICH9R */
109 TCO_ICH9DH, /* ICH9DH */ 117 TCO_ICH9DH, /* ICH9DH */
110 TCO_ICH9DO, /* ICH9DO */ 118 TCO_ICH9DO, /* ICH9DO */
111 TCO_631XESB, /* 631xESB/632xESB */ 119 TCO_ICH9M, /* ICH9M */
120 TCO_ICH9ME, /* ICH9M-E */
121 TCO_ICH10, /* ICH10 */
122 TCO_ICH10R, /* ICH10R */
123 TCO_ICH10D, /* ICH10D */
124 TCO_ICH10DO, /* ICH10DO */
112}; 125};
113 126
114static struct { 127static struct {
@@ -129,19 +142,26 @@ static struct {
129 {"ICH6 or ICH6R", 2}, 142 {"ICH6 or ICH6R", 2},
130 {"ICH6-M", 2}, 143 {"ICH6-M", 2},
131 {"ICH6W or ICH6RW", 2}, 144 {"ICH6W or ICH6RW", 2},
145 {"631xESB/632xESB", 2},
132 {"ICH7 or ICH7R", 2}, 146 {"ICH7 or ICH7R", 2},
133 {"ICH7-M", 2}, 147 {"ICH7DH", 2},
148 {"ICH7-M or ICH7-U", 2},
134 {"ICH7-M DH", 2}, 149 {"ICH7-M DH", 2},
135 {"ICH8 or ICH8R", 2}, 150 {"ICH8 or ICH8R", 2},
136 {"ICH8M-E", 2},
137 {"ICH8DH", 2}, 151 {"ICH8DH", 2},
138 {"ICH8DO", 2}, 152 {"ICH8DO", 2},
139 {"ICH8M", 2}, 153 {"ICH8M", 2},
154 {"ICH8M-E", 2},
140 {"ICH9", 2}, 155 {"ICH9", 2},
141 {"ICH9R", 2}, 156 {"ICH9R", 2},
142 {"ICH9DH", 2}, 157 {"ICH9DH", 2},
143 {"ICH9DO", 2}, 158 {"ICH9DO", 2},
144 {"631xESB/632xESB", 2}, 159 {"ICH9M", 2},
160 {"ICH9M-E", 2},
161 {"ICH10", 2},
162 {"ICH10R", 2},
163 {"ICH10D", 2},
164 {"ICH10DO", 2},
145 {NULL, 0} 165 {NULL, 0}
146}; 166};
147 167
@@ -175,18 +195,6 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
175 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0, TCO_ICH6)}, 195 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0, TCO_ICH6)},
176 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1, TCO_ICH6M)}, 196 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1, TCO_ICH6M)},
177 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2, TCO_ICH6W)}, 197 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2, TCO_ICH6W)},
178 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0, TCO_ICH7)},
179 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1, TCO_ICH7M)},
180 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31, TCO_ICH7MDH)},
181 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0, TCO_ICH8)},
182 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1, TCO_ICH8ME)},
183 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2, TCO_ICH8DH)},
184 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3, TCO_ICH8DO)},
185 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4, TCO_ICH8M)},
186 { ITCO_PCI_DEVICE(0x2918, TCO_ICH9)},
187 { ITCO_PCI_DEVICE(0x2916, TCO_ICH9R)},
188 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2, TCO_ICH9DH)},
189 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4, TCO_ICH9DO)},
190 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0, TCO_631XESB)}, 198 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0, TCO_631XESB)},
191 { ITCO_PCI_DEVICE(0x2671, TCO_631XESB)}, 199 { ITCO_PCI_DEVICE(0x2671, TCO_631XESB)},
192 { ITCO_PCI_DEVICE(0x2672, TCO_631XESB)}, 200 { ITCO_PCI_DEVICE(0x2672, TCO_631XESB)},
@@ -203,6 +211,25 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
203 { ITCO_PCI_DEVICE(0x267d, TCO_631XESB)}, 211 { ITCO_PCI_DEVICE(0x267d, TCO_631XESB)},
204 { ITCO_PCI_DEVICE(0x267e, TCO_631XESB)}, 212 { ITCO_PCI_DEVICE(0x267e, TCO_631XESB)},
205 { ITCO_PCI_DEVICE(0x267f, TCO_631XESB)}, 213 { ITCO_PCI_DEVICE(0x267f, TCO_631XESB)},
214 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0, TCO_ICH7)},
215 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_30, TCO_ICH7DH)},
216 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1, TCO_ICH7M)},
217 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31, TCO_ICH7MDH)},
218 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0, TCO_ICH8)},
219 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2, TCO_ICH8DH)},
220 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3, TCO_ICH8DO)},
221 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4, TCO_ICH8M)},
222 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1, TCO_ICH8ME)},
223 { ITCO_PCI_DEVICE(0x2918, TCO_ICH9)},
224 { ITCO_PCI_DEVICE(0x2916, TCO_ICH9R)},
225 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2, TCO_ICH9DH)},
226 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4, TCO_ICH9DO)},
227 { ITCO_PCI_DEVICE(0x2919, TCO_ICH9M)},
228 { ITCO_PCI_DEVICE(0x2917, TCO_ICH9ME)},
229 { ITCO_PCI_DEVICE(0x3a18, TCO_ICH10)},
230 { ITCO_PCI_DEVICE(0x3a16, TCO_ICH10R)},
231 { ITCO_PCI_DEVICE(0x3a1a, TCO_ICH10D)},
232 { ITCO_PCI_DEVICE(0x3a14, TCO_ICH10DO)},
206 { 0, }, /* End of list */ 233 { 0, }, /* End of list */
207}; 234};
208MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); 235MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
@@ -311,6 +338,7 @@ static int iTCO_wdt_unset_NO_REBOOT_bit(void)
311static int iTCO_wdt_start(void) 338static int iTCO_wdt_start(void)
312{ 339{
313 unsigned int val; 340 unsigned int val;
341 unsigned long val32;
314 342
315 spin_lock(&iTCO_wdt_private.io_lock); 343 spin_lock(&iTCO_wdt_private.io_lock);
316 344
@@ -323,6 +351,18 @@ static int iTCO_wdt_start(void)
323 return -EIO; 351 return -EIO;
324 } 352 }
325 353
354 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
355 val32 = inl(SMI_EN);
356 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
357 outl(val32, SMI_EN);
358
359 /* Force the timer to its reload value by writing to the TCO_RLD
360 register */
361 if (iTCO_wdt_private.iTCO_version == 2)
362 outw(0x01, TCO_RLD);
363 else if (iTCO_wdt_private.iTCO_version == 1)
364 outb(0x01, TCO_RLD);
365
326 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */ 366 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
327 val = inw(TCO1_CNT); 367 val = inw(TCO1_CNT);
328 val &= 0xf7ff; 368 val &= 0xf7ff;
@@ -338,6 +378,7 @@ static int iTCO_wdt_start(void)
338static int iTCO_wdt_stop(void) 378static int iTCO_wdt_stop(void)
339{ 379{
340 unsigned int val; 380 unsigned int val;
381 unsigned long val32;
341 382
342 spin_lock(&iTCO_wdt_private.io_lock); 383 spin_lock(&iTCO_wdt_private.io_lock);
343 384
@@ -349,6 +390,11 @@ static int iTCO_wdt_stop(void)
349 outw(val, TCO1_CNT); 390 outw(val, TCO1_CNT);
350 val = inw(TCO1_CNT); 391 val = inw(TCO1_CNT);
351 392
393 /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */
394 val32 = inl(SMI_EN);
395 val32 &= 0x00002000;
396 outl(val32, SMI_EN);
397
352 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ 398 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
353 iTCO_wdt_set_NO_REBOOT_bit(); 399 iTCO_wdt_set_NO_REBOOT_bit();
354 400
@@ -459,7 +505,6 @@ static int iTCO_wdt_open(struct inode *inode, struct file *file)
459 /* 505 /*
460 * Reload and activate timer 506 * Reload and activate timer
461 */ 507 */
462 iTCO_wdt_keepalive();
463 iTCO_wdt_start(); 508 iTCO_wdt_start();
464 return nonseekable_open(inode, file); 509 return nonseekable_open(inode, file);
465} 510}
@@ -604,7 +649,6 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
604 int ret; 649 int ret;
605 u32 base_address; 650 u32 base_address;
606 unsigned long RCBA; 651 unsigned long RCBA;
607 unsigned long val32;
608 652
609 /* 653 /*
610 * Find the ACPI/PM base I/O address which is the base 654 * Find the ACPI/PM base I/O address which is the base
@@ -644,17 +688,13 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
644 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ 688 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
645 iTCO_wdt_set_NO_REBOOT_bit(); 689 iTCO_wdt_set_NO_REBOOT_bit();
646 690
647 /* Set the TCO_EN bit in SMI_EN register */ 691 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
648 if (!request_region(SMI_EN, 4, "iTCO_wdt")) { 692 if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
649 printk(KERN_ERR PFX 693 printk(KERN_ERR PFX
650 "I/O address 0x%04lx already in use\n", SMI_EN); 694 "I/O address 0x%04lx already in use\n", SMI_EN);
651 ret = -EIO; 695 ret = -EIO;
652 goto out; 696 goto out;
653 } 697 }
654 val32 = inl(SMI_EN);
655 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
656 outl(val32, SMI_EN);
657 release_region(SMI_EN, 4);
658 698
659 /* The TCO I/O registers reside in a 32-byte range pointed to 699 /* The TCO I/O registers reside in a 32-byte range pointed to
660 by the TCOBASE value */ 700 by the TCOBASE value */
@@ -662,7 +702,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
662 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n", 702 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
663 TCOBASE); 703 TCOBASE);
664 ret = -EIO; 704 ret = -EIO;
665 goto out; 705 goto unreg_smi_en;
666 } 706 }
667 707
668 printk(KERN_INFO PFX 708 printk(KERN_INFO PFX
@@ -672,8 +712,9 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
672 TCOBASE); 712 TCOBASE);
673 713
674 /* Clear out the (probably old) status */ 714 /* Clear out the (probably old) status */
675 outb(0, TCO1_STS); 715 outb(8, TCO1_STS); /* Clear the Time Out Status bit */
676 outb(3, TCO2_STS); 716 outb(2, TCO2_STS); /* Clear SECOND_TO_STS bit */
717 outb(4, TCO2_STS); /* Clear BOOT_STS bit */
677 718
678 /* Make sure the watchdog is not running */ 719 /* Make sure the watchdog is not running */
679 iTCO_wdt_stop(); 720 iTCO_wdt_stop();
@@ -701,6 +742,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
701 742
702unreg_region: 743unreg_region:
703 release_region(TCOBASE, 0x20); 744 release_region(TCOBASE, 0x20);
745unreg_smi_en:
746 release_region(SMI_EN, 4);
704out: 747out:
705 if (iTCO_wdt_private.iTCO_version == 2) 748 if (iTCO_wdt_private.iTCO_version == 2)
706 iounmap(iTCO_wdt_private.gcs); 749 iounmap(iTCO_wdt_private.gcs);
@@ -718,6 +761,7 @@ static void __devexit iTCO_wdt_cleanup(void)
718 /* Deregister */ 761 /* Deregister */
719 misc_deregister(&iTCO_wdt_miscdev); 762 misc_deregister(&iTCO_wdt_miscdev);
720 release_region(TCOBASE, 0x20); 763 release_region(TCOBASE, 0x20);
764 release_region(SMI_EN, 4);
721 if (iTCO_wdt_private.iTCO_version == 2) 765 if (iTCO_wdt_private.iTCO_version == 2)
722 iounmap(iTCO_wdt_private.gcs); 766 iounmap(iTCO_wdt_private.gcs);
723 pci_dev_put(iTCO_wdt_private.pdev); 767 pci_dev_put(iTCO_wdt_private.pdev);
@@ -782,8 +826,8 @@ static int __init iTCO_wdt_init_module(void)
782{ 826{
783 int err; 827 int err;
784 828
785 printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s (%s)\n", 829 printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s\n",
786 DRV_VERSION, DRV_RELDATE); 830 DRV_VERSION);
787 831
788 err = platform_driver_register(&iTCO_wdt_driver); 832 err = platform_driver_register(&iTCO_wdt_driver);
789 if (err) 833 if (err)
diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c
index b4b7b0a4c119..3acce623f209 100644
--- a/drivers/watchdog/mtx-1_wdt.c
+++ b/drivers/watchdog/mtx-1_wdt.c
@@ -98,6 +98,8 @@ static void mtx1_wdt_reset(void)
98 98
99static void mtx1_wdt_start(void) 99static void mtx1_wdt_start(void)
100{ 100{
101 unsigned long flags;
102
101 spin_lock_irqsave(&mtx1_wdt_device.lock, flags); 103 spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
102 if (!mtx1_wdt_device.queue) { 104 if (!mtx1_wdt_device.queue) {
103 mtx1_wdt_device.queue = 1; 105 mtx1_wdt_device.queue = 1;
@@ -110,6 +112,8 @@ static void mtx1_wdt_start(void)
110 112
111static int mtx1_wdt_stop(void) 113static int mtx1_wdt_stop(void)
112{ 114{
115 unsigned long flags;
116
113 spin_lock_irqsave(&mtx1_wdt_device.lock, flags); 117 spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
114 if (mtx1_wdt_device.queue) { 118 if (mtx1_wdt_device.queue) {
115 mtx1_wdt_device.queue = 0; 119 mtx1_wdt_device.queue = 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 21:48:14 -0500