diff options
244 files changed, 5277 insertions, 2950 deletions
diff --git a/Documentation/networking/e1000.txt b/Documentation/networking/e1000.txt index 2df71861e578..d9271e74e488 100644 --- a/Documentation/networking/e1000.txt +++ b/Documentation/networking/e1000.txt | |||
@@ -1,82 +1,35 @@ | |||
1 | Linux* Base Driver for the Intel(R) PRO/1000 Family of Adapters | 1 | Linux* Base Driver for the Intel(R) PRO/1000 Family of Adapters |
2 | =============================================================== | 2 | =============================================================== |
3 | 3 | ||
4 | September 26, 2006 | 4 | Intel Gigabit Linux driver. |
5 | 5 | Copyright(c) 1999 - 2010 Intel Corporation. | |
6 | 6 | ||
7 | Contents | 7 | Contents |
8 | ======== | 8 | ======== |
9 | 9 | ||
10 | - In This Release | ||
11 | - Identifying Your Adapter | 10 | - Identifying Your Adapter |
12 | - Building and Installation | ||
13 | - Command Line Parameters | 11 | - Command Line Parameters |
14 | - Speed and Duplex Configuration | 12 | - Speed and Duplex Configuration |
15 | - Additional Configurations | 13 | - Additional Configurations |
16 | - Known Issues | ||
17 | - Support | 14 | - Support |
18 | 15 | ||
19 | |||
20 | In This Release | ||
21 | =============== | ||
22 | |||
23 | This file describes the Linux* Base Driver for the Intel(R) PRO/1000 Family | ||
24 | of Adapters. This driver includes support for Itanium(R)2-based systems. | ||
25 | |||
26 | For questions related to hardware requirements, refer to the documentation | ||
27 | supplied with your Intel PRO/1000 adapter. All hardware requirements listed | ||
28 | apply to use with Linux. | ||
29 | |||
30 | The following features are now available in supported kernels: | ||
31 | - Native VLANs | ||
32 | - Channel Bonding (teaming) | ||
33 | - SNMP | ||
34 | |||
35 | Channel Bonding documentation can be found in the Linux kernel source: | ||
36 | /Documentation/networking/bonding.txt | ||
37 | |||
38 | The driver information previously displayed in the /proc filesystem is not | ||
39 | supported in this release. Alternatively, you can use ethtool (version 1.6 | ||
40 | or later), lspci, and ifconfig to obtain the same information. | ||
41 | |||
42 | Instructions on updating ethtool can be found in the section "Additional | ||
43 | Configurations" later in this document. | ||
44 | |||
45 | NOTE: The Intel(R) 82562v 10/100 Network Connection only provides 10/100 | ||
46 | support. | ||
47 | |||
48 | |||
49 | Identifying Your Adapter | 16 | Identifying Your Adapter |
50 | ======================== | 17 | ======================== |
51 | 18 | ||
52 | For more information on how to identify your adapter, go to the Adapter & | 19 | For more information on how to identify your adapter, go to the Adapter & |
53 | Driver ID Guide at: | 20 | Driver ID Guide at: |
54 | 21 | ||
55 | http://support.intel.com/support/network/adapter/pro100/21397.htm | 22 | http://support.intel.com/support/go/network/adapter/idguide.htm |
56 | 23 | ||
57 | For the latest Intel network drivers for Linux, refer to the following | 24 | For the latest Intel network drivers for Linux, refer to the following |
58 | website. In the search field, enter your adapter name or type, or use the | 25 | website. In the search field, enter your adapter name or type, or use the |
59 | networking link on the left to search for your adapter: | 26 | networking link on the left to search for your adapter: |
60 | 27 | ||
61 | http://downloadfinder.intel.com/scripts-df/support_intel.asp | 28 | http://support.intel.com/support/go/network/adapter/home.htm |
62 | |||
63 | 29 | ||
64 | Command Line Parameters | 30 | Command Line Parameters |
65 | ======================= | 31 | ======================= |
66 | 32 | ||
67 | If the driver is built as a module, the following optional parameters | ||
68 | are used by entering them on the command line with the modprobe command | ||
69 | using this syntax: | ||
70 | |||
71 | modprobe e1000 [<option>=<VAL1>,<VAL2>,...] | ||
72 | |||
73 | For example, with two PRO/1000 PCI adapters, entering: | ||
74 | |||
75 | modprobe e1000 TxDescriptors=80,128 | ||
76 | |||
77 | loads the e1000 driver with 80 TX descriptors for the first adapter and | ||
78 | 128 TX descriptors for the second adapter. | ||
79 | |||
80 | The default value for each parameter is generally the recommended setting, | 33 | The default value for each parameter is generally the recommended setting, |
81 | unless otherwise noted. | 34 | unless otherwise noted. |
82 | 35 | ||
@@ -89,10 +42,6 @@ NOTES: For more information about the AutoNeg, Duplex, and Speed | |||
89 | parameters, see the application note at: | 42 | parameters, see the application note at: |
90 | http://www.intel.com/design/network/applnots/ap450.htm | 43 | http://www.intel.com/design/network/applnots/ap450.htm |
91 | 44 | ||
92 | A descriptor describes a data buffer and attributes related to | ||
93 | the data buffer. This information is accessed by the hardware. | ||
94 | |||
95 | |||
96 | AutoNeg | 45 | AutoNeg |
97 | ------- | 46 | ------- |
98 | (Supported only on adapters with copper connections) | 47 | (Supported only on adapters with copper connections) |
@@ -106,7 +55,6 @@ Duplex parameters must not be specified. | |||
106 | NOTE: Refer to the Speed and Duplex section of this readme for more | 55 | NOTE: Refer to the Speed and Duplex section of this readme for more |
107 | information on the AutoNeg parameter. | 56 | information on the AutoNeg parameter. |
108 | 57 | ||
109 | |||
110 | Duplex | 58 | Duplex |
111 | ------ | 59 | ------ |
112 | (Supported only on adapters with copper connections) | 60 | (Supported only on adapters with copper connections) |
@@ -119,7 +67,6 @@ set to auto-negotiate, the board auto-detects the correct duplex. If the | |||
119 | link partner is forced (either full or half), Duplex defaults to half- | 67 | link partner is forced (either full or half), Duplex defaults to half- |
120 | duplex. | 68 | duplex. |
121 | 69 | ||
122 | |||
123 | FlowControl | 70 | FlowControl |
124 | ----------- | 71 | ----------- |
125 | Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx) | 72 | Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx) |
@@ -128,16 +75,16 @@ Default Value: Reads flow control settings from the EEPROM | |||
128 | This parameter controls the automatic generation(Tx) and response(Rx) | 75 | This parameter controls the automatic generation(Tx) and response(Rx) |
129 | to Ethernet PAUSE frames. | 76 | to Ethernet PAUSE frames. |
130 | 77 | ||
131 | |||
132 | InterruptThrottleRate | 78 | InterruptThrottleRate |
133 | --------------------- | 79 | --------------------- |
134 | (not supported on Intel(R) 82542, 82543 or 82544-based adapters) | 80 | (not supported on Intel(R) 82542, 82543 or 82544-based adapters) |
135 | Valid Range: 0,1,3,100-100000 (0=off, 1=dynamic, 3=dynamic conservative) | 81 | Valid Range: 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative, |
82 | 4=simplified balancing) | ||
136 | Default Value: 3 | 83 | Default Value: 3 |
137 | 84 | ||
138 | The driver can limit the amount of interrupts per second that the adapter | 85 | The driver can limit the amount of interrupts per second that the adapter |
139 | will generate for incoming packets. It does this by writing a value to the | 86 | will generate for incoming packets. It does this by writing a value to the |
140 | adapter that is based on the maximum amount of interrupts that the adapter | 87 | adapter that is based on the maximum amount of interrupts that the adapter |
141 | will generate per second. | 88 | will generate per second. |
142 | 89 | ||
143 | Setting InterruptThrottleRate to a value greater or equal to 100 | 90 | Setting InterruptThrottleRate to a value greater or equal to 100 |
@@ -146,37 +93,43 @@ per second, even if more packets have come in. This reduces interrupt | |||
146 | load on the system and can lower CPU utilization under heavy load, | 93 | load on the system and can lower CPU utilization under heavy load, |
147 | but will increase latency as packets are not processed as quickly. | 94 | but will increase latency as packets are not processed as quickly. |
148 | 95 | ||
149 | The default behaviour of the driver previously assumed a static | 96 | The default behaviour of the driver previously assumed a static |
150 | InterruptThrottleRate value of 8000, providing a good fallback value for | 97 | InterruptThrottleRate value of 8000, providing a good fallback value for |
151 | all traffic types,but lacking in small packet performance and latency. | 98 | all traffic types,but lacking in small packet performance and latency. |
152 | The hardware can handle many more small packets per second however, and | 99 | The hardware can handle many more small packets per second however, and |
153 | for this reason an adaptive interrupt moderation algorithm was implemented. | 100 | for this reason an adaptive interrupt moderation algorithm was implemented. |
154 | 101 | ||
155 | Since 7.3.x, the driver has two adaptive modes (setting 1 or 3) in which | 102 | Since 7.3.x, the driver has two adaptive modes (setting 1 or 3) in which |
156 | it dynamically adjusts the InterruptThrottleRate value based on the traffic | 103 | it dynamically adjusts the InterruptThrottleRate value based on the traffic |
157 | that it receives. After determining the type of incoming traffic in the last | 104 | that it receives. After determining the type of incoming traffic in the last |
158 | timeframe, it will adjust the InterruptThrottleRate to an appropriate value | 105 | timeframe, it will adjust the InterruptThrottleRate to an appropriate value |
159 | for that traffic. | 106 | for that traffic. |
160 | 107 | ||
161 | The algorithm classifies the incoming traffic every interval into | 108 | The algorithm classifies the incoming traffic every interval into |
162 | classes. Once the class is determined, the InterruptThrottleRate value is | 109 | classes. Once the class is determined, the InterruptThrottleRate value is |
163 | adjusted to suit that traffic type the best. There are three classes defined: | 110 | adjusted to suit that traffic type the best. There are three classes defined: |
164 | "Bulk traffic", for large amounts of packets of normal size; "Low latency", | 111 | "Bulk traffic", for large amounts of packets of normal size; "Low latency", |
165 | for small amounts of traffic and/or a significant percentage of small | 112 | for small amounts of traffic and/or a significant percentage of small |
166 | packets; and "Lowest latency", for almost completely small packets or | 113 | packets; and "Lowest latency", for almost completely small packets or |
167 | minimal traffic. | 114 | minimal traffic. |
168 | 115 | ||
169 | In dynamic conservative mode, the InterruptThrottleRate value is set to 4000 | 116 | In dynamic conservative mode, the InterruptThrottleRate value is set to 4000 |
170 | for traffic that falls in class "Bulk traffic". If traffic falls in the "Low | 117 | for traffic that falls in class "Bulk traffic". If traffic falls in the "Low |
171 | latency" or "Lowest latency" class, the InterruptThrottleRate is increased | 118 | latency" or "Lowest latency" class, the InterruptThrottleRate is increased |
172 | stepwise to 20000. This default mode is suitable for most applications. | 119 | stepwise to 20000. This default mode is suitable for most applications. |
173 | 120 | ||
174 | For situations where low latency is vital such as cluster or | 121 | For situations where low latency is vital such as cluster or |
175 | grid computing, the algorithm can reduce latency even more when | 122 | grid computing, the algorithm can reduce latency even more when |
176 | InterruptThrottleRate is set to mode 1. In this mode, which operates | 123 | InterruptThrottleRate is set to mode 1. In this mode, which operates |
177 | the same as mode 3, the InterruptThrottleRate will be increased stepwise to | 124 | the same as mode 3, the InterruptThrottleRate will be increased stepwise to |
178 | 70000 for traffic in class "Lowest latency". | 125 | 70000 for traffic in class "Lowest latency". |
179 | 126 | ||
127 | In simplified mode the interrupt rate is based on the ratio of Tx and | ||
128 | Rx traffic. If the bytes per second rate is approximately equal, the | ||
129 | interrupt rate will drop as low as 2000 interrupts per second. If the | ||
130 | traffic is mostly transmit or mostly receive, the interrupt rate could | ||
131 | be as high as 8000. | ||
132 | |||
180 | Setting InterruptThrottleRate to 0 turns off any interrupt moderation | 133 | Setting InterruptThrottleRate to 0 turns off any interrupt moderation |
181 | and may improve small packet latency, but is generally not suitable | 134 | and may improve small packet latency, but is generally not suitable |
182 | for bulk throughput traffic. | 135 | for bulk throughput traffic. |
@@ -212,8 +165,6 @@ NOTE: When e1000 is loaded with default settings and multiple adapters | |||
212 | be platform-specific. If CPU utilization is not a concern, use | 165 | be platform-specific. If CPU utilization is not a concern, use |
213 | RX_POLLING (NAPI) and default driver settings. | 166 | RX_POLLING (NAPI) and default driver settings. |
214 | 167 | ||
215 | |||
216 | |||
217 | RxDescriptors | 168 | RxDescriptors |
218 | ------------- | 169 | ------------- |
219 | Valid Range: 80-256 for 82542 and 82543-based adapters | 170 | Valid Range: 80-256 for 82542 and 82543-based adapters |
@@ -225,15 +176,14 @@ by the driver. Increasing this value allows the driver to buffer more | |||
225 | incoming packets, at the expense of increased system memory utilization. | 176 | incoming packets, at the expense of increased system memory utilization. |
226 | 177 | ||
227 | Each descriptor is 16 bytes. A receive buffer is also allocated for each | 178 | Each descriptor is 16 bytes. A receive buffer is also allocated for each |
228 | descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending | 179 | descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending |
229 | on the MTU setting. The maximum MTU size is 16110. | 180 | on the MTU setting. The maximum MTU size is 16110. |
230 | 181 | ||
231 | NOTE: MTU designates the frame size. It only needs to be set for Jumbo | 182 | NOTE: MTU designates the frame size. It only needs to be set for Jumbo |
232 | Frames. Depending on the available system resources, the request | 183 | Frames. Depending on the available system resources, the request |
233 | for a higher number of receive descriptors may be denied. In this | 184 | for a higher number of receive descriptors may be denied. In this |
234 | case, use a lower number. | 185 | case, use a lower number. |
235 | 186 | ||
236 | |||
237 | RxIntDelay | 187 | RxIntDelay |
238 | ---------- | 188 | ---------- |
239 | Valid Range: 0-65535 (0=off) | 189 | Valid Range: 0-65535 (0=off) |
@@ -254,7 +204,6 @@ CAUTION: When setting RxIntDelay to a value other than 0, adapters may | |||
254 | restoring the network connection. To eliminate the potential | 204 | restoring the network connection. To eliminate the potential |
255 | for the hang ensure that RxIntDelay is set to 0. | 205 | for the hang ensure that RxIntDelay is set to 0. |
256 | 206 | ||
257 | |||
258 | RxAbsIntDelay | 207 | RxAbsIntDelay |
259 | ------------- | 208 | ------------- |
260 | (This parameter is supported only on 82540, 82545 and later adapters.) | 209 | (This parameter is supported only on 82540, 82545 and later adapters.) |
@@ -268,7 +217,6 @@ packet is received within the set amount of time. Proper tuning, | |||
268 | along with RxIntDelay, may improve traffic throughput in specific network | 217 | along with RxIntDelay, may improve traffic throughput in specific network |
269 | conditions. | 218 | conditions. |
270 | 219 | ||
271 | |||
272 | Speed | 220 | Speed |
273 | ----- | 221 | ----- |
274 | (This parameter is supported only on adapters with copper connections.) | 222 | (This parameter is supported only on adapters with copper connections.) |
@@ -280,7 +228,6 @@ Speed forces the line speed to the specified value in megabits per second | |||
280 | partner is set to auto-negotiate, the board will auto-detect the correct | 228 | partner is set to auto-negotiate, the board will auto-detect the correct |
281 | speed. Duplex should also be set when Speed is set to either 10 or 100. | 229 | speed. Duplex should also be set when Speed is set to either 10 or 100. |
282 | 230 | ||
283 | |||
284 | TxDescriptors | 231 | TxDescriptors |
285 | ------------- | 232 | ------------- |
286 | Valid Range: 80-256 for 82542 and 82543-based adapters | 233 | Valid Range: 80-256 for 82542 and 82543-based adapters |
@@ -295,6 +242,36 @@ NOTE: Depending on the available system resources, the request for a | |||
295 | higher number of transmit descriptors may be denied. In this case, | 242 | higher number of transmit descriptors may be denied. In this case, |
296 | use a lower number. | 243 | use a lower number. |
297 | 244 | ||
245 | TxDescriptorStep | ||
246 | ---------------- | ||
247 | Valid Range: 1 (use every Tx Descriptor) | ||
248 | 4 (use every 4th Tx Descriptor) | ||
249 | |||
250 | Default Value: 1 (use every Tx Descriptor) | ||
251 | |||
252 | On certain non-Intel architectures, it has been observed that intense TX | ||
253 | traffic bursts of short packets may result in an improper descriptor | ||
254 | writeback. If this occurs, the driver will report a "TX Timeout" and reset | ||
255 | the adapter, after which the transmit flow will restart, though data may | ||
256 | have stalled for as much as 10 seconds before it resumes. | ||
257 | |||
258 | The improper writeback does not occur on the first descriptor in a system | ||
259 | memory cache-line, which is typically 32 bytes, or 4 descriptors long. | ||
260 | |||
261 | Setting TxDescriptorStep to a value of 4 will ensure that all TX descriptors | ||
262 | are aligned to the start of a system memory cache line, and so this problem | ||
263 | will not occur. | ||
264 | |||
265 | NOTES: Setting TxDescriptorStep to 4 effectively reduces the number of | ||
266 | TxDescriptors available for transmits to 1/4 of the normal allocation. | ||
267 | This has a possible negative performance impact, which may be | ||
268 | compensated for by allocating more descriptors using the TxDescriptors | ||
269 | module parameter. | ||
270 | |||
271 | There are other conditions which may result in "TX Timeout", which will | ||
272 | not be resolved by the use of the TxDescriptorStep parameter. As the | ||
273 | issue addressed by this parameter has never been observed on Intel | ||
274 | Architecture platforms, it should not be used on Intel platforms. | ||
298 | 275 | ||
299 | TxIntDelay | 276 | TxIntDelay |
300 | ---------- | 277 | ---------- |
@@ -307,7 +284,6 @@ efficiency if properly tuned for specific network traffic. If the | |||
307 | system is reporting dropped transmits, this value may be set too high | 284 | system is reporting dropped transmits, this value may be set too high |
308 | causing the driver to run out of available transmit descriptors. | 285 | causing the driver to run out of available transmit descriptors. |
309 | 286 | ||
310 | |||
311 | TxAbsIntDelay | 287 | TxAbsIntDelay |
312 | ------------- | 288 | ------------- |
313 | (This parameter is supported only on 82540, 82545 and later adapters.) | 289 | (This parameter is supported only on 82540, 82545 and later adapters.) |
@@ -330,6 +306,35 @@ Default Value: 1 | |||
330 | A value of '1' indicates that the driver should enable IP checksum | 306 | A value of '1' indicates that the driver should enable IP checksum |
331 | offload for received packets (both UDP and TCP) to the adapter hardware. | 307 | offload for received packets (both UDP and TCP) to the adapter hardware. |
332 | 308 | ||
309 | Copybreak | ||
310 | --------- | ||
311 | Valid Range: 0-xxxxxxx (0=off) | ||
312 | Default Value: 256 | ||
313 | Usage: insmod e1000.ko copybreak=128 | ||
314 | |||
315 | Driver copies all packets below or equaling this size to a fresh Rx | ||
316 | buffer before handing it up the stack. | ||
317 | |||
318 | This parameter is different than other parameters, in that it is a | ||
319 | single (not 1,1,1 etc.) parameter applied to all driver instances and | ||
320 | it is also available during runtime at | ||
321 | /sys/module/e1000/parameters/copybreak | ||
322 | |||
323 | SmartPowerDownEnable | ||
324 | -------------------- | ||
325 | Valid Range: 0-1 | ||
326 | Default Value: 0 (disabled) | ||
327 | |||
328 | Allows PHY to turn off in lower power states. The user can turn off | ||
329 | this parameter in supported chipsets. | ||
330 | |||
331 | KumeranLockLoss | ||
332 | --------------- | ||
333 | Valid Range: 0-1 | ||
334 | Default Value: 1 (enabled) | ||
335 | |||
336 | This workaround skips resetting the PHY at shutdown for the initial | ||
337 | silicon releases of ICH8 systems. | ||
333 | 338 | ||
334 | Speed and Duplex Configuration | 339 | Speed and Duplex Configuration |
335 | ============================== | 340 | ============================== |
@@ -385,40 +390,9 @@ If the link partner is forced to a specific speed and duplex, then this | |||
385 | parameter should not be used. Instead, use the Speed and Duplex parameters | 390 | parameter should not be used. Instead, use the Speed and Duplex parameters |
386 | previously mentioned to force the adapter to the same speed and duplex. | 391 | previously mentioned to force the adapter to the same speed and duplex. |
387 | 392 | ||
388 | |||
389 | Additional Configurations | 393 | Additional Configurations |
390 | ========================= | 394 | ========================= |
391 | 395 | ||
392 | Configuring the Driver on Different Distributions | ||
393 | ------------------------------------------------- | ||
394 | Configuring a network driver to load properly when the system is started | ||
395 | is distribution dependent. Typically, the configuration process involves | ||
396 | adding an alias line to /etc/modules.conf or /etc/modprobe.conf as well | ||
397 | as editing other system startup scripts and/or configuration files. Many | ||
398 | popular Linux distributions ship with tools to make these changes for you. | ||
399 | To learn the proper way to configure a network device for your system, | ||
400 | refer to your distribution documentation. If during this process you are | ||
401 | asked for the driver or module name, the name for the Linux Base Driver | ||
402 | for the Intel(R) PRO/1000 Family of Adapters is e1000. | ||
403 | |||
404 | As an example, if you install the e1000 driver for two PRO/1000 adapters | ||
405 | (eth0 and eth1) and set the speed and duplex to 10full and 100half, add | ||
406 | the following to modules.conf or or modprobe.conf: | ||
407 | |||
408 | alias eth0 e1000 | ||
409 | alias eth1 e1000 | ||
410 | options e1000 Speed=10,100 Duplex=2,1 | ||
411 | |||
412 | Viewing Link Messages | ||
413 | --------------------- | ||
414 | Link messages will not be displayed to the console if the distribution is | ||
415 | restricting system messages. In order to see network driver link messages | ||
416 | on your console, set dmesg to eight by entering the following: | ||
417 | |||
418 | dmesg -n 8 | ||
419 | |||
420 | NOTE: This setting is not saved across reboots. | ||
421 | |||
422 | Jumbo Frames | 396 | Jumbo Frames |
423 | ------------ | 397 | ------------ |
424 | Jumbo Frames support is enabled by changing the MTU to a value larger than | 398 | Jumbo Frames support is enabled by changing the MTU to a value larger than |
@@ -437,9 +411,11 @@ Additional Configurations | |||
437 | setting in a different location. | 411 | setting in a different location. |
438 | 412 | ||
439 | Notes: | 413 | Notes: |
440 | 414 | Degradation in throughput performance may be observed in some Jumbo frames | |
441 | - To enable Jumbo Frames, increase the MTU size on the interface beyond | 415 | environments. If this is observed, increasing the application's socket buffer |
442 | 1500. | 416 | size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help. |
417 | See the specific application manual and /usr/src/linux*/Documentation/ | ||
418 | networking/ip-sysctl.txt for more details. | ||
443 | 419 | ||
444 | - The maximum MTU setting for Jumbo Frames is 16110. This value coincides | 420 | - The maximum MTU setting for Jumbo Frames is 16110. This value coincides |
445 | with the maximum Jumbo Frames size of 16128. | 421 | with the maximum Jumbo Frames size of 16128. |
@@ -447,40 +423,11 @@ Additional Configurations | |||
447 | - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or | 423 | - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or |
448 | loss of link. | 424 | loss of link. |
449 | 425 | ||
450 | - Some Intel gigabit adapters that support Jumbo Frames have a frame size | ||
451 | limit of 9238 bytes, with a corresponding MTU size limit of 9216 bytes. | ||
452 | The adapters with this limitation are based on the Intel(R) 82571EB, | ||
453 | 82572EI, 82573L and 80003ES2LAN controller. These correspond to the | ||
454 | following product names: | ||
455 | Intel(R) PRO/1000 PT Server Adapter | ||
456 | Intel(R) PRO/1000 PT Desktop Adapter | ||
457 | Intel(R) PRO/1000 PT Network Connection | ||
458 | Intel(R) PRO/1000 PT Dual Port Server Adapter | ||
459 | Intel(R) PRO/1000 PT Dual Port Network Connection | ||
460 | Intel(R) PRO/1000 PF Server Adapter | ||
461 | Intel(R) PRO/1000 PF Network Connection | ||
462 | Intel(R) PRO/1000 PF Dual Port Server Adapter | ||
463 | Intel(R) PRO/1000 PB Server Connection | ||
464 | Intel(R) PRO/1000 PL Network Connection | ||
465 | Intel(R) PRO/1000 EB Network Connection with I/O Acceleration | ||
466 | Intel(R) PRO/1000 EB Backplane Connection with I/O Acceleration | ||
467 | Intel(R) PRO/1000 PT Quad Port Server Adapter | ||
468 | |||
469 | - Adapters based on the Intel(R) 82542 and 82573V/E controller do not | 426 | - Adapters based on the Intel(R) 82542 and 82573V/E controller do not |
470 | support Jumbo Frames. These correspond to the following product names: | 427 | support Jumbo Frames. These correspond to the following product names: |
471 | Intel(R) PRO/1000 Gigabit Server Adapter | 428 | Intel(R) PRO/1000 Gigabit Server Adapter |
472 | Intel(R) PRO/1000 PM Network Connection | 429 | Intel(R) PRO/1000 PM Network Connection |
473 | 430 | ||
474 | - The following adapters do not support Jumbo Frames: | ||
475 | Intel(R) 82562V 10/100 Network Connection | ||
476 | Intel(R) 82566DM Gigabit Network Connection | ||
477 | Intel(R) 82566DC Gigabit Network Connection | ||
478 | Intel(R) 82566MM Gigabit Network Connection | ||
479 | Intel(R) 82566MC Gigabit Network Connection | ||
480 | Intel(R) 82562GT 10/100 Network Connection | ||
481 | Intel(R) 82562G 10/100 Network Connection | ||
482 | |||
483 | |||
484 | Ethtool | 431 | Ethtool |
485 | ------- | 432 | ------- |
486 | The driver utilizes the ethtool interface for driver configuration and | 433 | The driver utilizes the ethtool interface for driver configuration and |
@@ -490,142 +437,14 @@ Additional Configurations | |||
490 | The latest release of ethtool can be found from | 437 | The latest release of ethtool can be found from |
491 | http://sourceforge.net/projects/gkernel. | 438 | http://sourceforge.net/projects/gkernel. |
492 | 439 | ||
493 | NOTE: Ethtool 1.6 only supports a limited set of ethtool options. Support | ||
494 | for a more complete ethtool feature set can be enabled by upgrading | ||
495 | ethtool to ethtool-1.8.1. | ||
496 | |||
497 | Enabling Wake on LAN* (WoL) | 440 | Enabling Wake on LAN* (WoL) |
498 | --------------------------- | 441 | --------------------------- |
499 | WoL is configured through the Ethtool* utility. Ethtool is included with | 442 | WoL is configured through the Ethtool* utility. |
500 | all versions of Red Hat after Red Hat 7.2. For other Linux distributions, | ||
501 | download and install Ethtool from the following website: | ||
502 | http://sourceforge.net/projects/gkernel. | ||
503 | |||
504 | For instructions on enabling WoL with Ethtool, refer to the website listed | ||
505 | above. | ||
506 | 443 | ||
507 | WoL will be enabled on the system during the next shut down or reboot. | 444 | WoL will be enabled on the system during the next shut down or reboot. |
508 | For this driver version, in order to enable WoL, the e1000 driver must be | 445 | For this driver version, in order to enable WoL, the e1000 driver must be |
509 | loaded when shutting down or rebooting the system. | 446 | loaded when shutting down or rebooting the system. |
510 | 447 | ||
511 | Wake On LAN is only supported on port A for the following devices: | ||
512 | Intel(R) PRO/1000 PT Dual Port Network Connection | ||
513 | Intel(R) PRO/1000 PT Dual Port Server Connection | ||
514 | Intel(R) PRO/1000 PT Dual Port Server Adapter | ||
515 | Intel(R) PRO/1000 PF Dual Port Server Adapter | ||
516 | Intel(R) PRO/1000 PT Quad Port Server Adapter | ||
517 | |||
518 | NAPI | ||
519 | ---- | ||
520 | NAPI (Rx polling mode) is enabled in the e1000 driver. | ||
521 | |||
522 | See www.cyberus.ca/~hadi/usenix-paper.tgz for more information on NAPI. | ||
523 | |||
524 | |||
525 | Known Issues | ||
526 | ============ | ||
527 | |||
528 | Dropped Receive Packets on Half-duplex 10/100 Networks | ||
529 | ------------------------------------------------------ | ||
530 | If you have an Intel PCI Express adapter running at 10mbps or 100mbps, half- | ||
531 | duplex, you may observe occasional dropped receive packets. There are no | ||
532 | workarounds for this problem in this network configuration. The network must | ||
533 | be updated to operate in full-duplex, and/or 1000mbps only. | ||
534 | |||
535 | Jumbo Frames System Requirement | ||
536 | ------------------------------- | ||
537 | Memory allocation failures have been observed on Linux systems with 64 MB | ||
538 | of RAM or less that are running Jumbo Frames. If you are using Jumbo | ||
539 | Frames, your system may require more than the advertised minimum | ||
540 | requirement of 64 MB of system memory. | ||
541 | |||
542 | Performance Degradation with Jumbo Frames | ||
543 | ----------------------------------------- | ||
544 | Degradation in throughput performance may be observed in some Jumbo frames | ||
545 | environments. If this is observed, increasing the application's socket | ||
546 | buffer size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values | ||
547 | may help. See the specific application manual and | ||
548 | /usr/src/linux*/Documentation/ | ||
549 | networking/ip-sysctl.txt for more details. | ||
550 | |||
551 | Jumbo Frames on Foundry BigIron 8000 switch | ||
552 | ------------------------------------------- | ||
553 | There is a known issue using Jumbo frames when connected to a Foundry | ||
554 | BigIron 8000 switch. This is a 3rd party limitation. If you experience | ||
555 | loss of packets, lower the MTU size. | ||
556 | |||
557 | Allocating Rx Buffers when Using Jumbo Frames | ||
558 | --------------------------------------------- | ||
559 | Allocating Rx buffers when using Jumbo Frames on 2.6.x kernels may fail if | ||
560 | the available memory is heavily fragmented. This issue may be seen with PCI-X | ||
561 | adapters or with packet split disabled. This can be reduced or eliminated | ||
562 | by changing the amount of available memory for receive buffer allocation, by | ||
563 | increasing /proc/sys/vm/min_free_kbytes. | ||
564 | |||
565 | Multiple Interfaces on Same Ethernet Broadcast Network | ||
566 | ------------------------------------------------------ | ||
567 | Due to the default ARP behavior on Linux, it is not possible to have | ||
568 | one system on two IP networks in the same Ethernet broadcast domain | ||
569 | (non-partitioned switch) behave as expected. All Ethernet interfaces | ||
570 | will respond to IP traffic for any IP address assigned to the system. | ||
571 | This results in unbalanced receive traffic. | ||
572 | |||
573 | If you have multiple interfaces in a server, either turn on ARP | ||
574 | filtering by entering: | ||
575 | |||
576 | echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter | ||
577 | (this only works if your kernel's version is higher than 2.4.5), | ||
578 | |||
579 | NOTE: This setting is not saved across reboots. The configuration | ||
580 | change can be made permanent by adding the line: | ||
581 | net.ipv4.conf.all.arp_filter = 1 | ||
582 | to the file /etc/sysctl.conf | ||
583 | |||
584 | or, | ||
585 | |||
586 | install the interfaces in separate broadcast domains (either in | ||
587 | different switches or in a switch partitioned to VLANs). | ||
588 | |||
589 | 82541/82547 can't link or are slow to link with some link partners | ||
590 | ----------------------------------------------------------------- | ||
591 | There is a known compatibility issue with 82541/82547 and some | ||
592 | low-end switches where the link will not be established, or will | ||
593 | be slow to establish. In particular, these switches are known to | ||
594 | be incompatible with 82541/82547: | ||
595 | |||
596 | Planex FXG-08TE | ||
597 | I-O Data ETG-SH8 | ||
598 | |||
599 | To workaround this issue, the driver can be compiled with an override | ||
600 | of the PHY's master/slave setting. Forcing master or forcing slave | ||
601 | mode will improve time-to-link. | ||
602 | |||
603 | # make CFLAGS_EXTRA=-DE1000_MASTER_SLAVE=<n> | ||
604 | |||
605 | Where <n> is: | ||
606 | |||
607 | 0 = Hardware default | ||
608 | 1 = Master mode | ||
609 | 2 = Slave mode | ||
610 | 3 = Auto master/slave | ||
611 | |||
612 | Disable rx flow control with ethtool | ||
613 | ------------------------------------ | ||
614 | In order to disable receive flow control using ethtool, you must turn | ||
615 | off auto-negotiation on the same command line. | ||
616 | |||
617 | For example: | ||
618 | |||
619 | ethtool -A eth? autoneg off rx off | ||
620 | |||
621 | Unplugging network cable while ethtool -p is running | ||
622 | ---------------------------------------------------- | ||
623 | In kernel versions 2.5.50 and later (including 2.6 kernel), unplugging | ||
624 | the network cable while ethtool -p is running will cause the system to | ||
625 | become unresponsive to keyboard commands, except for control-alt-delete. | ||
626 | Restarting the system appears to be the only remedy. | ||
627 | |||
628 | |||
629 | Support | 448 | Support |
630 | ======= | 449 | ======= |
631 | 450 | ||
diff --git a/Documentation/networking/e1000e.txt b/Documentation/networking/e1000e.txt new file mode 100644 index 000000000000..6aa048badf32 --- /dev/null +++ b/Documentation/networking/e1000e.txt | |||
@@ -0,0 +1,302 @@ | |||
1 | Linux* Driver for Intel(R) Network Connection | ||
2 | =============================================================== | ||
3 | |||
4 | Intel Gigabit Linux driver. | ||
5 | Copyright(c) 1999 - 2010 Intel Corporation. | ||
6 | |||
7 | Contents | ||
8 | ======== | ||
9 | |||
10 | - Identifying Your Adapter | ||
11 | - Command Line Parameters | ||
12 | - Additional Configurations | ||
13 | - Support | ||
14 | |||
15 | Identifying Your Adapter | ||
16 | ======================== | ||
17 | |||
18 | The e1000e driver supports all PCI Express Intel(R) Gigabit Network | ||
19 | Connections, except those that are 82575, 82576 and 82580-based*. | ||
20 | |||
21 | * NOTE: The Intel(R) PRO/1000 P Dual Port Server Adapter is supported by | ||
22 | the e1000 driver, not the e1000e driver due to the 82546 part being used | ||
23 | behind a PCI Express bridge. | ||
24 | |||
25 | For more information on how to identify your adapter, go to the Adapter & | ||
26 | Driver ID Guide at: | ||
27 | |||
28 | http://support.intel.com/support/go/network/adapter/idguide.htm | ||
29 | |||
30 | For the latest Intel network drivers for Linux, refer to the following | ||
31 | website. In the search field, enter your adapter name or type, or use the | ||
32 | networking link on the left to search for your adapter: | ||
33 | |||
34 | http://support.intel.com/support/go/network/adapter/home.htm | ||
35 | |||
36 | Command Line Parameters | ||
37 | ======================= | ||
38 | |||
39 | The default value for each parameter is generally the recommended setting, | ||
40 | unless otherwise noted. | ||
41 | |||
42 | NOTES: For more information about the InterruptThrottleRate, | ||
43 | RxIntDelay, TxIntDelay, RxAbsIntDelay, and TxAbsIntDelay | ||
44 | parameters, see the application note at: | ||
45 | http://www.intel.com/design/network/applnots/ap450.htm | ||
46 | |||
47 | InterruptThrottleRate | ||
48 | --------------------- | ||
49 | Valid Range: 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative, | ||
50 | 4=simplified balancing) | ||
51 | Default Value: 3 | ||
52 | |||
53 | The driver can limit the amount of interrupts per second that the adapter | ||
54 | will generate for incoming packets. It does this by writing a value to the | ||
55 | adapter that is based on the maximum amount of interrupts that the adapter | ||
56 | will generate per second. | ||
57 | |||
58 | Setting InterruptThrottleRate to a value greater or equal to 100 | ||
59 | will program the adapter to send out a maximum of that many interrupts | ||
60 | per second, even if more packets have come in. This reduces interrupt | ||
61 | load on the system and can lower CPU utilization under heavy load, | ||
62 | but will increase latency as packets are not processed as quickly. | ||
63 | |||
64 | The driver has two adaptive modes (setting 1 or 3) in which | ||
65 | it dynamically adjusts the InterruptThrottleRate value based on the traffic | ||
66 | that it receives. After determining the type of incoming traffic in the last | ||
67 | timeframe, it will adjust the InterruptThrottleRate to an appropriate value | ||
68 | for that traffic. | ||
69 | |||
70 | The algorithm classifies the incoming traffic every interval into | ||
71 | classes. Once the class is determined, the InterruptThrottleRate value is | ||
72 | adjusted to suit that traffic type the best. There are three classes defined: | ||
73 | "Bulk traffic", for large amounts of packets of normal size; "Low latency", | ||
74 | for small amounts of traffic and/or a significant percentage of small | ||
75 | packets; and "Lowest latency", for almost completely small packets or | ||
76 | minimal traffic. | ||
77 | |||
78 | In dynamic conservative mode, the InterruptThrottleRate value is set to 4000 | ||
79 | for traffic that falls in class "Bulk traffic". If traffic falls in the "Low | ||
80 | latency" or "Lowest latency" class, the InterruptThrottleRate is increased | ||
81 | stepwise to 20000. This default mode is suitable for most applications. | ||
82 | |||
83 | For situations where low latency is vital such as cluster or | ||
84 | grid computing, the algorithm can reduce latency even more when | ||
85 | InterruptThrottleRate is set to mode 1. In this mode, which operates | ||
86 | the same as mode 3, the InterruptThrottleRate will be increased stepwise to | ||
87 | 70000 for traffic in class "Lowest latency". | ||
88 | |||
89 | In simplified mode the interrupt rate is based on the ratio of Tx and | ||
90 | Rx traffic. If the bytes per second rate is approximately equal the | ||
91 | interrupt rate will drop as low as 2000 interrupts per second. If the | ||
92 | traffic is mostly transmit or mostly receive, the interrupt rate could | ||
93 | be as high as 8000. | ||
94 | |||
95 | Setting InterruptThrottleRate to 0 turns off any interrupt moderation | ||
96 | and may improve small packet latency, but is generally not suitable | ||
97 | for bulk throughput traffic. | ||
98 | |||
99 | NOTE: InterruptThrottleRate takes precedence over the TxAbsIntDelay and | ||
100 | RxAbsIntDelay parameters. In other words, minimizing the receive | ||
101 | and/or transmit absolute delays does not force the controller to | ||
102 | generate more interrupts than what the Interrupt Throttle Rate | ||
103 | allows. | ||
104 | |||
105 | NOTE: When e1000e is loaded with default settings and multiple adapters | ||
106 | are in use simultaneously, the CPU utilization may increase non- | ||
107 | linearly. In order to limit the CPU utilization without impacting | ||
108 | the overall throughput, we recommend that you load the driver as | ||
109 | follows: | ||
110 | |||
111 | modprobe e1000e InterruptThrottleRate=3000,3000,3000 | ||
112 | |||
113 | This sets the InterruptThrottleRate to 3000 interrupts/sec for | ||
114 | the first, second, and third instances of the driver. The range | ||
115 | of 2000 to 3000 interrupts per second works on a majority of | ||
116 | systems and is a good starting point, but the optimal value will | ||
117 | be platform-specific. If CPU utilization is not a concern, use | ||
118 | RX_POLLING (NAPI) and default driver settings. | ||
119 | |||
120 | RxIntDelay | ||
121 | ---------- | ||
122 | Valid Range: 0-65535 (0=off) | ||
123 | Default Value: 0 | ||
124 | |||
125 | This value delays the generation of receive interrupts in units of 1.024 | ||
126 | microseconds. Receive interrupt reduction can improve CPU efficiency if | ||
127 | properly tuned for specific network traffic. Increasing this value adds | ||
128 | extra latency to frame reception and can end up decreasing the throughput | ||
129 | of TCP traffic. If the system is reporting dropped receives, this value | ||
130 | may be set too high, causing the driver to run out of available receive | ||
131 | descriptors. | ||
132 | |||
133 | CAUTION: When setting RxIntDelay to a value other than 0, adapters may | ||
134 | hang (stop transmitting) under certain network conditions. If | ||
135 | this occurs a NETDEV WATCHDOG message is logged in the system | ||
136 | event log. In addition, the controller is automatically reset, | ||
137 | restoring the network connection. To eliminate the potential | ||
138 | for the hang ensure that RxIntDelay is set to 0. | ||
139 | |||
140 | RxAbsIntDelay | ||
141 | ------------- | ||
142 | Valid Range: 0-65535 (0=off) | ||
143 | Default Value: 8 | ||
144 | |||
145 | This value, in units of 1.024 microseconds, limits the delay in which a | ||
146 | receive interrupt is generated. Useful only if RxIntDelay is non-zero, | ||
147 | this value ensures that an interrupt is generated after the initial | ||
148 | packet is received within the set amount of time. Proper tuning, | ||
149 | along with RxIntDelay, may improve traffic throughput in specific network | ||
150 | conditions. | ||
151 | |||
152 | TxIntDelay | ||
153 | ---------- | ||
154 | Valid Range: 0-65535 (0=off) | ||
155 | Default Value: 8 | ||
156 | |||
157 | This value delays the generation of transmit interrupts in units of | ||
158 | 1.024 microseconds. Transmit interrupt reduction can improve CPU | ||
159 | efficiency if properly tuned for specific network traffic. If the | ||
160 | system is reporting dropped transmits, this value may be set too high | ||
161 | causing the driver to run out of available transmit descriptors. | ||
162 | |||
163 | TxAbsIntDelay | ||
164 | ------------- | ||
165 | Valid Range: 0-65535 (0=off) | ||
166 | Default Value: 32 | ||
167 | |||
168 | This value, in units of 1.024 microseconds, limits the delay in which a | ||
169 | transmit interrupt is generated. Useful only if TxIntDelay is non-zero, | ||
170 | this value ensures that an interrupt is generated after the initial | ||
171 | packet is sent on the wire within the set amount of time. Proper tuning, | ||
172 | along with TxIntDelay, may improve traffic throughput in specific | ||
173 | network conditions. | ||
174 | |||
175 | Copybreak | ||
176 | --------- | ||
177 | Valid Range: 0-xxxxxxx (0=off) | ||
178 | Default Value: 256 | ||
179 | |||
180 | Driver copies all packets below or equaling this size to a fresh Rx | ||
181 | buffer before handing it up the stack. | ||
182 | |||
183 | This parameter is different than other parameters, in that it is a | ||
184 | single (not 1,1,1 etc.) parameter applied to all driver instances and | ||
185 | it is also available during runtime at | ||
186 | /sys/module/e1000e/parameters/copybreak | ||
187 | |||
188 | SmartPowerDownEnable | ||
189 | -------------------- | ||
190 | Valid Range: 0-1 | ||
191 | Default Value: 0 (disabled) | ||
192 | |||
193 | Allows PHY to turn off in lower power states. The user can set this parameter | ||
194 | in supported chipsets. | ||
195 | |||
196 | KumeranLockLoss | ||
197 | --------------- | ||
198 | Valid Range: 0-1 | ||
199 | Default Value: 1 (enabled) | ||
200 | |||
201 | This workaround skips resetting the PHY at shutdown for the initial | ||
202 | silicon releases of ICH8 systems. | ||
203 | |||
204 | IntMode | ||
205 | ------- | ||
206 | Valid Range: 0-2 (0=legacy, 1=MSI, 2=MSI-X) | ||
207 | Default Value: 2 | ||
208 | |||
209 | Allows changing the interrupt mode at module load time, without requiring a | ||
210 | recompile. If the driver load fails to enable a specific interrupt mode, the | ||
211 | driver will try other interrupt modes, from least to most compatible. The | ||
212 | interrupt order is MSI-X, MSI, Legacy. If specifying MSI (IntMode=1) | ||
213 | interrupts, only MSI and Legacy will be attempted. | ||
214 | |||
215 | CrcStripping | ||
216 | ------------ | ||
217 | Valid Range: 0-1 | ||
218 | Default Value: 1 (enabled) | ||
219 | |||
220 | Strip the CRC from received packets before sending up the network stack. If | ||
221 | you have a machine with a BMC enabled but cannot receive IPMI traffic after | ||
222 | loading or enabling the driver, try disabling this feature. | ||
223 | |||
224 | WriteProtectNVM | ||
225 | --------------- | ||
226 | Valid Range: 0-1 | ||
227 | Default Value: 1 (enabled) | ||
228 | |||
229 | Set the hardware to ignore all write/erase cycles to the GbE region in the | ||
230 | ICHx NVM (non-volatile memory). This feature can be disabled by the | ||
231 | WriteProtectNVM module parameter (enabled by default) only after a hardware | ||
232 | reset, but the machine must be power cycled before trying to enable writes. | ||
233 | |||
234 | Note: the kernel boot option iomem=relaxed may need to be set if the kernel | ||
235 | config option CONFIG_STRICT_DEVMEM=y, if the root user wants to write the | ||
236 | NVM from user space via ethtool. | ||
237 | |||
238 | Additional Configurations | ||
239 | ========================= | ||
240 | |||
241 | Jumbo Frames | ||
242 | ------------ | ||
243 | Jumbo Frames support is enabled by changing the MTU to a value larger than | ||
244 | the default of 1500. Use the ifconfig command to increase the MTU size. | ||
245 | For example: | ||
246 | |||
247 | ifconfig eth<x> mtu 9000 up | ||
248 | |||
249 | This setting is not saved across reboots. | ||
250 | |||
251 | Notes: | ||
252 | |||
253 | - The maximum MTU setting for Jumbo Frames is 9216. This value coincides | ||
254 | with the maximum Jumbo Frames size of 9234 bytes. | ||
255 | |||
256 | - Using Jumbo Frames at 10 or 100 Mbps is not supported and may result in | ||
257 | poor performance or loss of link. | ||
258 | |||
259 | - Some adapters limit Jumbo Frames sized packets to a maximum of | ||
260 | 4096 bytes and some adapters do not support Jumbo Frames. | ||
261 | |||
262 | |||
263 | Ethtool | ||
264 | ------- | ||
265 | The driver utilizes the ethtool interface for driver configuration and | ||
266 | diagnostics, as well as displaying statistical information. We | ||
267 | strongly recommend downloading the latest version of Ethtool at: | ||
268 | |||
269 | http://sourceforge.net/projects/gkernel. | ||
270 | |||
271 | Speed and Duplex | ||
272 | ---------------- | ||
273 | Speed and Duplex are configured through the Ethtool* utility. For | ||
274 | instructions, refer to the Ethtool man page. | ||
275 | |||
276 | Enabling Wake on LAN* (WoL) | ||
277 | --------------------------- | ||
278 | WoL is configured through the Ethtool* utility. For instructions on | ||
279 | enabling WoL with Ethtool, refer to the Ethtool man page. | ||
280 | |||
281 | WoL will be enabled on the system during the next shut down or reboot. | ||
282 | For this driver version, in order to enable WoL, the e1000e driver must be | ||
283 | loaded when shutting down or rebooting the system. | ||
284 | |||
285 | In most cases Wake On LAN is only supported on port A for multiple port | ||
286 | adapters. To verify if a port supports Wake on LAN run ethtool eth<X>. | ||
287 | |||
288 | |||
289 | Support | ||
290 | ======= | ||
291 | |||
292 | For general information, go to the Intel support website at: | ||
293 | |||
294 | www.intel.com/support/ | ||
295 | |||
296 | or the Intel Wired Networking project hosted by Sourceforge at: | ||
297 | |||
298 | http://sourceforge.net/projects/e1000 | ||
299 | |||
300 | If an issue is identified with the released source code on the supported | ||
301 | kernel with a supported adapter, email the specific information related | ||
302 | to the issue to e1000-devel@lists.sf.net | ||
diff --git a/Documentation/networking/ixgbevf.txt b/Documentation/networking/ixgbevf.txt index 19015de6725f..21dd5d15b6b4 100755..100644 --- a/Documentation/networking/ixgbevf.txt +++ b/Documentation/networking/ixgbevf.txt | |||
@@ -1,19 +1,16 @@ | |||
1 | Linux* Base Driver for Intel(R) Network Connection | 1 | Linux* Base Driver for Intel(R) Network Connection |
2 | ================================================== | 2 | ================================================== |
3 | 3 | ||
4 | November 24, 2009 | 4 | Intel Gigabit Linux driver. |
5 | Copyright(c) 1999 - 2010 Intel Corporation. | ||
5 | 6 | ||
6 | Contents | 7 | Contents |
7 | ======== | 8 | ======== |
8 | 9 | ||
9 | - In This Release | ||
10 | - Identifying Your Adapter | 10 | - Identifying Your Adapter |
11 | - Known Issues/Troubleshooting | 11 | - Known Issues/Troubleshooting |
12 | - Support | 12 | - Support |
13 | 13 | ||
14 | In This Release | ||
15 | =============== | ||
16 | |||
17 | This file describes the ixgbevf Linux* Base Driver for Intel Network | 14 | This file describes the ixgbevf Linux* Base Driver for Intel Network |
18 | Connection. | 15 | Connection. |
19 | 16 | ||
@@ -33,7 +30,7 @@ Identifying Your Adapter | |||
33 | For more information on how to identify your adapter, go to the Adapter & | 30 | For more information on how to identify your adapter, go to the Adapter & |
34 | Driver ID Guide at: | 31 | Driver ID Guide at: |
35 | 32 | ||
36 | http://support.intel.com/support/network/sb/CS-008441.htm | 33 | http://support.intel.com/support/go/network/adapter/idguide.htm |
37 | 34 | ||
38 | Known Issues/Troubleshooting | 35 | Known Issues/Troubleshooting |
39 | ============================ | 36 | ============================ |
@@ -57,34 +54,3 @@ or the Intel Wired Networking project hosted by Sourceforge at: | |||
57 | If an issue is identified with the released source code on the supported | 54 | If an issue is identified with the released source code on the supported |
58 | kernel with a supported adapter, email the specific information related | 55 | kernel with a supported adapter, email the specific information related |
59 | to the issue to e1000-devel@lists.sf.net | 56 | to the issue to e1000-devel@lists.sf.net |
60 | |||
61 | License | ||
62 | ======= | ||
63 | |||
64 | Intel 10 Gigabit Linux driver. | ||
65 | Copyright(c) 1999 - 2009 Intel Corporation. | ||
66 | |||
67 | This program is free software; you can redistribute it and/or modify it | ||
68 | under the terms and conditions of the GNU General Public License, | ||
69 | version 2, as published by the Free Software Foundation. | ||
70 | |||
71 | This program is distributed in the hope it will be useful, but WITHOUT | ||
72 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
73 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
74 | more details. | ||
75 | |||
76 | You should have received a copy of the GNU General Public License along with | ||
77 | this program; if not, write to the Free Software Foundation, Inc., | ||
78 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
79 | |||
80 | The full GNU General Public License is included in this distribution in | ||
81 | the file called "COPYING". | ||
82 | |||
83 | Trademarks | ||
84 | ========== | ||
85 | |||
86 | Intel, Itanium, and Pentium are trademarks or registered trademarks of | ||
87 | Intel Corporation or its subsidiaries in the United States and other | ||
88 | countries. | ||
89 | |||
90 | * Other names and brands may be claimed as the property of others. | ||
diff --git a/Documentation/vm/page-types.c b/Documentation/vm/page-types.c index ccd951fa94ee..cc96ee2666f2 100644 --- a/Documentation/vm/page-types.c +++ b/Documentation/vm/page-types.c | |||
@@ -478,7 +478,7 @@ static void prepare_hwpoison_fd(void) | |||
478 | } | 478 | } |
479 | 479 | ||
480 | if (opt_unpoison && !hwpoison_forget_fd) { | 480 | if (opt_unpoison && !hwpoison_forget_fd) { |
481 | sprintf(buf, "%s/renew-pfn", hwpoison_debug_fs); | 481 | sprintf(buf, "%s/unpoison-pfn", hwpoison_debug_fs); |
482 | hwpoison_forget_fd = checked_open(buf, O_WRONLY); | 482 | hwpoison_forget_fd = checked_open(buf, O_WRONLY); |
483 | } | 483 | } |
484 | } | 484 | } |
diff --git a/MAINTAINERS b/MAINTAINERS index e54f922075e2..8395f2eeb782 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -969,6 +969,16 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) | |||
969 | S: Maintained | 969 | S: Maintained |
970 | F: arch/arm/mach-s5p*/ | 970 | F: arch/arm/mach-s5p*/ |
971 | 971 | ||
972 | ARM/SAMSUNG S5P SERIES FIMC SUPPORT | ||
973 | M: Kyungmin Park <kyungmin.park@samsung.com> | ||
974 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> | ||
975 | L: linux-arm-kernel@lists.infradead.org | ||
976 | L: linux-media@vger.kernel.org | ||
977 | S: Maintained | ||
978 | F: arch/arm/plat-s5p/dev-fimc* | ||
979 | F: arch/arm/plat-samsung/include/plat/*fimc* | ||
980 | F: drivers/media/video/s5p-fimc/ | ||
981 | |||
972 | ARM/SHMOBILE ARM ARCHITECTURE | 982 | ARM/SHMOBILE ARM ARCHITECTURE |
973 | M: Paul Mundt <lethal@linux-sh.org> | 983 | M: Paul Mundt <lethal@linux-sh.org> |
974 | M: Magnus Damm <magnus.damm@gmail.com> | 984 | M: Magnus Damm <magnus.damm@gmail.com> |
@@ -2547,7 +2557,7 @@ S: Supported | |||
2547 | F: drivers/scsi/gdt* | 2557 | F: drivers/scsi/gdt* |
2548 | 2558 | ||
2549 | GENERIC GPIO I2C DRIVER | 2559 | GENERIC GPIO I2C DRIVER |
2550 | M: Haavard Skinnemoen <hskinnemoen@atmel.com> | 2560 | M: Haavard Skinnemoen <hskinnemoen@gmail.com> |
2551 | S: Supported | 2561 | S: Supported |
2552 | F: drivers/i2c/busses/i2c-gpio.c | 2562 | F: drivers/i2c/busses/i2c-gpio.c |
2553 | F: include/linux/i2c-gpio.h | 2563 | F: include/linux/i2c-gpio.h |
@@ -3075,16 +3085,27 @@ L: netdev@vger.kernel.org | |||
3075 | S: Maintained | 3085 | S: Maintained |
3076 | F: drivers/net/ixp2000/ | 3086 | F: drivers/net/ixp2000/ |
3077 | 3087 | ||
3078 | INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe) | 3088 | INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf) |
3079 | M: Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 3089 | M: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
3080 | M: Jesse Brandeburg <jesse.brandeburg@intel.com> | 3090 | M: Jesse Brandeburg <jesse.brandeburg@intel.com> |
3081 | M: Bruce Allan <bruce.w.allan@intel.com> | 3091 | M: Bruce Allan <bruce.w.allan@intel.com> |
3082 | M: Alex Duyck <alexander.h.duyck@intel.com> | 3092 | M: Carolyn Wyborny <carolyn.wyborny@intel.com> |
3093 | M: Don Skidmore <donald.c.skidmore@intel.com> | ||
3094 | M: Greg Rose <gregory.v.rose@intel.com> | ||
3083 | M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com> | 3095 | M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com> |
3096 | M: Alex Duyck <alexander.h.duyck@intel.com> | ||
3084 | M: John Ronciak <john.ronciak@intel.com> | 3097 | M: John Ronciak <john.ronciak@intel.com> |
3085 | L: e1000-devel@lists.sourceforge.net | 3098 | L: e1000-devel@lists.sourceforge.net |
3086 | W: http://e1000.sourceforge.net/ | 3099 | W: http://e1000.sourceforge.net/ |
3087 | S: Supported | 3100 | S: Supported |
3101 | F: Documentation/networking/e100.txt | ||
3102 | F: Documentation/networking/e1000.txt | ||
3103 | F: Documentation/networking/e1000e.txt | ||
3104 | F: Documentation/networking/igb.txt | ||
3105 | F: Documentation/networking/igbvf.txt | ||
3106 | F: Documentation/networking/ixgb.txt | ||
3107 | F: Documentation/networking/ixgbe.txt | ||
3108 | F: Documentation/networking/ixgbevf.txt | ||
3088 | F: drivers/net/e100.c | 3109 | F: drivers/net/e100.c |
3089 | F: drivers/net/e1000/ | 3110 | F: drivers/net/e1000/ |
3090 | F: drivers/net/e1000e/ | 3111 | F: drivers/net/e1000e/ |
@@ -3092,6 +3113,7 @@ F: drivers/net/igb/ | |||
3092 | F: drivers/net/igbvf/ | 3113 | F: drivers/net/igbvf/ |
3093 | F: drivers/net/ixgb/ | 3114 | F: drivers/net/ixgb/ |
3094 | F: drivers/net/ixgbe/ | 3115 | F: drivers/net/ixgbe/ |
3116 | F: drivers/net/ixgbevf/ | ||
3095 | 3117 | ||
3096 | INTEL PRO/WIRELESS 2100 NETWORK CONNECTION SUPPORT | 3118 | INTEL PRO/WIRELESS 2100 NETWORK CONNECTION SUPPORT |
3097 | L: linux-wireless@vger.kernel.org | 3119 | L: linux-wireless@vger.kernel.org |
@@ -5020,6 +5042,12 @@ F: drivers/media/common/saa7146* | |||
5020 | F: drivers/media/video/*7146* | 5042 | F: drivers/media/video/*7146* |
5021 | F: include/media/*7146* | 5043 | F: include/media/*7146* |
5022 | 5044 | ||
5045 | SAMSUNG AUDIO (ASoC) DRIVERS | ||
5046 | M: Jassi Brar <jassi.brar@samsung.com> | ||
5047 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) | ||
5048 | S: Supported | ||
5049 | F: sound/soc/s3c24xx | ||
5050 | |||
5023 | TLG2300 VIDEO4LINUX-2 DRIVER | 5051 | TLG2300 VIDEO4LINUX-2 DRIVER |
5024 | M: Huang Shijie <shijie8@gmail.com> | 5052 | M: Huang Shijie <shijie8@gmail.com> |
5025 | M: Kang Yong <kangyong@telegent.com> | 5053 | M: Kang Yong <kangyong@telegent.com> |
@@ -6462,8 +6490,10 @@ F: include/linux/wm97xx.h | |||
6462 | WOLFSON MICROELECTRONICS DRIVERS | 6490 | WOLFSON MICROELECTRONICS DRIVERS |
6463 | M: Mark Brown <broonie@opensource.wolfsonmicro.com> | 6491 | M: Mark Brown <broonie@opensource.wolfsonmicro.com> |
6464 | M: Ian Lartey <ian@opensource.wolfsonmicro.com> | 6492 | M: Ian Lartey <ian@opensource.wolfsonmicro.com> |
6493 | M: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> | ||
6494 | T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc | ||
6465 | T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus | 6495 | T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus |
6466 | W: http://opensource.wolfsonmicro.com/node/8 | 6496 | W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices |
6467 | S: Supported | 6497 | S: Supported |
6468 | F: Documentation/hwmon/wm83?? | 6498 | F: Documentation/hwmon/wm83?? |
6469 | F: drivers/leds/leds-wm83*.c | 6499 | F: drivers/leds/leds-wm83*.c |
@@ -1,8 +1,8 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 36 | 3 | SUBLEVEL = 36 |
4 | EXTRAVERSION = -rc7 | 4 | EXTRAVERSION = -rc8 |
5 | NAME = Sheep on Meth | 5 | NAME = Flesh-Eating Bats with Fangs |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
8 | # To see a list of typical targets execute "make help" | 8 | # To see a list of typical targets execute "make help" |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7949fe65ecd4..b27f8abf163c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -680,8 +680,8 @@ config ARCH_S3C64XX | |||
680 | help | 680 | help |
681 | Samsung S3C64XX series based systems | 681 | Samsung S3C64XX series based systems |
682 | 682 | ||
683 | config ARCH_S5P6440 | 683 | config ARCH_S5P64X0 |
684 | bool "Samsung S5P6440" | 684 | bool "Samsung S5P6440 S5P6450" |
685 | select CPU_V6 | 685 | select CPU_V6 |
686 | select GENERIC_GPIO | 686 | select GENERIC_GPIO |
687 | select HAVE_CLK | 687 | select HAVE_CLK |
@@ -690,7 +690,8 @@ config ARCH_S5P6440 | |||
690 | select HAVE_S3C2410_I2C | 690 | select HAVE_S3C2410_I2C |
691 | select HAVE_S3C_RTC | 691 | select HAVE_S3C_RTC |
692 | help | 692 | help |
693 | Samsung S5P6440 CPU based systems | 693 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
694 | SMDK6450. | ||
694 | 695 | ||
695 | config ARCH_S5P6442 | 696 | config ARCH_S5P6442 |
696 | bool "Samsung S5P6442" | 697 | bool "Samsung S5P6442" |
@@ -941,7 +942,7 @@ if ARCH_S3C64XX | |||
941 | source "arch/arm/mach-s3c64xx/Kconfig" | 942 | source "arch/arm/mach-s3c64xx/Kconfig" |
942 | endif | 943 | endif |
943 | 944 | ||
944 | source "arch/arm/mach-s5p6440/Kconfig" | 945 | source "arch/arm/mach-s5p64x0/Kconfig" |
945 | 946 | ||
946 | source "arch/arm/mach-s5p6442/Kconfig" | 947 | source "arch/arm/mach-s5p6442/Kconfig" |
947 | 948 | ||
@@ -1114,6 +1115,20 @@ config ARM_ERRATA_720789 | |||
1114 | invalidated are not, resulting in an incoherency in the system page | 1115 | invalidated are not, resulting in an incoherency in the system page |
1115 | tables. The workaround changes the TLB flushing routines to invalidate | 1116 | tables. The workaround changes the TLB flushing routines to invalidate |
1116 | entries regardless of the ASID. | 1117 | entries regardless of the ASID. |
1118 | |||
1119 | config ARM_ERRATA_743622 | ||
1120 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | ||
1121 | depends on CPU_V7 | ||
1122 | help | ||
1123 | This option enables the workaround for the 743622 Cortex-A9 | ||
1124 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | ||
1125 | optimisation in the Cortex-A9 Store Buffer may lead to data | ||
1126 | corruption. This workaround sets a specific bit in the diagnostic | ||
1127 | register of the Cortex-A9 which disables the Store Buffer | ||
1128 | optimisation, preventing the defect from occurring. This has no | ||
1129 | visible impact on the overall performance or power consumption of the | ||
1130 | processor. | ||
1131 | |||
1117 | endmenu | 1132 | endmenu |
1118 | 1133 | ||
1119 | source "arch/arm/common/Kconfig" | 1134 | source "arch/arm/common/Kconfig" |
@@ -1270,7 +1285,7 @@ source kernel/Kconfig.preempt | |||
1270 | 1285 | ||
1271 | config HZ | 1286 | config HZ |
1272 | int | 1287 | int |
1273 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \ | 1288 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
1274 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 | 1289 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
1275 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | 1290 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
1276 | default AT91_TIMER_HZ if ARCH_AT91 | 1291 | default AT91_TIMER_HZ if ARCH_AT91 |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 502255905c4e..b87aed028eef 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -173,7 +173,7 @@ machine-$(CONFIG_ARCH_RPC) := rpc | |||
173 | machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443 | 173 | machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443 |
174 | machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 | 174 | machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 |
175 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 175 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
176 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 | 176 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 |
177 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | 177 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 |
178 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 | 178 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
179 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 179 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p64x0_defconfig index 0b0266c6d326..2993ecd35145 100644 --- a/arch/arm/configs/s5p6440_defconfig +++ b/arch/arm/configs/s5p64x0_defconfig | |||
@@ -5,10 +5,11 @@ CONFIG_KALLSYMS_ALL=y | |||
5 | CONFIG_MODULES=y | 5 | CONFIG_MODULES=y |
6 | CONFIG_MODULE_UNLOAD=y | 6 | CONFIG_MODULE_UNLOAD=y |
7 | # CONFIG_BLK_DEV_BSG is not set | 7 | # CONFIG_BLK_DEV_BSG is not set |
8 | CONFIG_ARCH_S5P6440=y | 8 | CONFIG_ARCH_S5P64X0=y |
9 | CONFIG_S3C_BOOT_ERROR_RESET=y | 9 | CONFIG_S3C_BOOT_ERROR_RESET=y |
10 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | 10 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 |
11 | CONFIG_MACH_SMDK6440=y | 11 | CONFIG_MACH_SMDK6440=y |
12 | CONFIG_MACH_SMDK6450=y | ||
12 | CONFIG_CPU_32v6K=y | 13 | CONFIG_CPU_32v6K=y |
13 | CONFIG_AEABI=y | 14 | CONFIG_AEABI=y |
14 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 15 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c index 8bccbfa693ff..2c1f0050c9c4 100644 --- a/arch/arm/kernel/kprobes-decode.c +++ b/arch/arm/kernel/kprobes-decode.c | |||
@@ -1162,11 +1162,12 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
1162 | { | 1162 | { |
1163 | /* | 1163 | /* |
1164 | * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx | 1164 | * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx |
1165 | * Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx | 1165 | * Undef : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx |
1166 | * ALU op with S bit and Rd == 15 : | 1166 | * ALU op with S bit and Rd == 15 : |
1167 | * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx | 1167 | * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx |
1168 | */ | 1168 | */ |
1169 | if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */ | 1169 | if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */ |
1170 | (insn & 0x0ff00000) == 0x03400000 || /* Undef */ | ||
1170 | (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ | 1171 | (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ |
1171 | return INSN_REJECTED; | 1172 | return INSN_REJECTED; |
1172 | 1173 | ||
@@ -1177,7 +1178,7 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
1177 | * *S (bit 20) updates condition codes | 1178 | * *S (bit 20) updates condition codes |
1178 | * ADC/SBC/RSC reads the C flag | 1179 | * ADC/SBC/RSC reads the C flag |
1179 | */ | 1180 | */ |
1180 | insn &= 0xfff00fff; /* Rn = r0, Rd = r0 */ | 1181 | insn &= 0xffff0fff; /* Rd = r0 */ |
1181 | asi->insn[0] = insn; | 1182 | asi->insn[0] = insn; |
1182 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | 1183 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ |
1183 | emulate_alu_imm_rwflags : emulate_alu_imm_rflags; | 1184 | emulate_alu_imm_rwflags : emulate_alu_imm_rflags; |
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h index bfbb612265d6..36af14bc13bb 100644 --- a/arch/arm/mach-at91/include/mach/system.h +++ b/arch/arm/mach-at91/include/mach/system.h | |||
@@ -28,7 +28,6 @@ | |||
28 | 28 | ||
29 | static inline void arch_idle(void) | 29 | static inline void arch_idle(void) |
30 | { | 30 | { |
31 | #ifndef CONFIG_DEBUG_KERNEL | ||
32 | /* | 31 | /* |
33 | * Disable the processor clock. The processor will be automatically | 32 | * Disable the processor clock. The processor will be automatically |
34 | * re-enabled by an interrupt or by a reset. | 33 | * re-enabled by an interrupt or by a reset. |
@@ -38,11 +37,11 @@ static inline void arch_idle(void) | |||
38 | #else | 37 | #else |
39 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | 38 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); |
40 | #endif | 39 | #endif |
41 | #else | 40 | #ifndef CONFIG_CPU_ARM920T |
42 | /* | 41 | /* |
43 | * Set the processor (CP15) into 'Wait for Interrupt' mode. | 42 | * Set the processor (CP15) into 'Wait for Interrupt' mode. |
44 | * Unlike disabling the processor clock via the PMC (above) | 43 | * Post-RM9200 processors need this in conjunction with the above |
45 | * this allows the processor to be woken via JTAG. | 44 | * to save power when idle. |
46 | */ | 45 | */ |
47 | cpu_do_idle(); | 46 | cpu_do_idle(); |
48 | #endif | 47 | #endif |
diff --git a/arch/arm/mach-ep93xx/dma-m2p.c b/arch/arm/mach-ep93xx/dma-m2p.c index 8904ca4e2e24..a696d354b1f8 100644 --- a/arch/arm/mach-ep93xx/dma-m2p.c +++ b/arch/arm/mach-ep93xx/dma-m2p.c | |||
@@ -276,7 +276,7 @@ static void channel_disable(struct m2p_channel *ch) | |||
276 | v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN); | 276 | v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN); |
277 | m2p_set_control(ch, v); | 277 | m2p_set_control(ch, v); |
278 | 278 | ||
279 | while (m2p_channel_state(ch) == STATE_ON) | 279 | while (m2p_channel_state(ch) >= STATE_ON) |
280 | cpu_relax(); | 280 | cpu_relax(); |
281 | 281 | ||
282 | m2p_set_control(ch, 0x0); | 282 | m2p_set_control(ch, 0x0); |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 9b45f1f523fa..197f9e241cff 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -122,6 +122,7 @@ config MACH_CPUIMX27 | |||
122 | select IMX_HAVE_PLATFORM_IMX_I2C | 122 | select IMX_HAVE_PLATFORM_IMX_I2C |
123 | select IMX_HAVE_PLATFORM_IMX_UART | 123 | select IMX_HAVE_PLATFORM_IMX_UART |
124 | select IMX_HAVE_PLATFORM_MXC_NAND | 124 | select IMX_HAVE_PLATFORM_MXC_NAND |
125 | select MXC_ULPI if USB_ULPI | ||
125 | help | 126 | help |
126 | Include support for Eukrea CPUIMX27 platform. This includes | 127 | Include support for Eukrea CPUIMX27 platform. This includes |
127 | specific configurations for the module and its peripherals. | 128 | specific configurations for the module and its peripherals. |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 28f73a1c79f7..a1681fc9d9b0 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -258,7 +258,7 @@ static void __init eukrea_cpuimx27_init(void) | |||
258 | i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, | 258 | i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, |
259 | ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); | 259 | ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); |
260 | 260 | ||
261 | imx27_add_imx_i2c(1, &cpuimx27_i2c1_data); | 261 | imx27_add_imx_i2c(0, &cpuimx27_i2c1_data); |
262 | 262 | ||
263 | imx27_add_fec(NULL); | 263 | imx27_add_fec(NULL); |
264 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 264 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig deleted file mode 100644 index 6a4af7f57584..000000000000 --- a/arch/arm/mach-s5p6440/Kconfig +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6440/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | if ARCH_S5P6440 | ||
9 | |||
10 | config CPU_S5P6440 | ||
11 | bool | ||
12 | select S3C_PL330_DMA | ||
13 | help | ||
14 | Enable S5P6440 CPU support | ||
15 | |||
16 | config S5P6440_SETUP_I2C1 | ||
17 | bool | ||
18 | help | ||
19 | Common setup code for i2c bus 1. | ||
20 | |||
21 | config MACH_SMDK6440 | ||
22 | bool "SMDK6440" | ||
23 | select CPU_S5P6440 | ||
24 | select S3C_DEV_I2C1 | ||
25 | select S3C_DEV_RTC | ||
26 | select S3C_DEV_WDT | ||
27 | select SAMSUNG_DEV_ADC | ||
28 | select SAMSUNG_DEV_TS | ||
29 | select S5P6440_SETUP_I2C1 | ||
30 | help | ||
31 | Machine support for the Samsung SMDK6440 | ||
32 | |||
33 | endif | ||
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile deleted file mode 100644 index c3fe4d3662a9..000000000000 --- a/arch/arm/mach-s5p6440/Makefile +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6440/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S5P6440 system | ||
14 | |||
15 | obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o dma.o | ||
16 | obj-$(CONFIG_CPU_S5P6440) += setup-i2c0.o | ||
17 | |||
18 | # machine support | ||
19 | |||
20 | obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | ||
21 | |||
22 | # device support | ||
23 | obj-y += dev-audio.o | ||
24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
25 | obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o | ||
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c deleted file mode 100644 index ca6e48dce777..000000000000 --- a/arch/arm/mach-s5p6440/clock.c +++ /dev/null | |||
@@ -1,846 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/sysdev.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/map.h> | ||
25 | |||
26 | #include <plat/cpu-freq.h> | ||
27 | #include <mach/regs-clock.h> | ||
28 | #include <plat/clock.h> | ||
29 | #include <plat/cpu.h> | ||
30 | #include <plat/clock-clksrc.h> | ||
31 | #include <plat/s5p-clock.h> | ||
32 | #include <plat/pll.h> | ||
33 | #include <plat/s5p6440.h> | ||
34 | |||
35 | /* APLL Mux output clock */ | ||
36 | static struct clksrc_clk clk_mout_apll = { | ||
37 | .clk = { | ||
38 | .name = "mout_apll", | ||
39 | .id = -1, | ||
40 | }, | ||
41 | .sources = &clk_src_apll, | ||
42 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, | ||
43 | }; | ||
44 | |||
45 | static int s5p6440_epll_enable(struct clk *clk, int enable) | ||
46 | { | ||
47 | unsigned int ctrlbit = clk->ctrlbit; | ||
48 | unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit; | ||
49 | |||
50 | if (enable) | ||
51 | __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON); | ||
52 | else | ||
53 | __raw_writel(epll_con, S5P_EPLL_CON); | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | static unsigned long s5p6440_epll_get_rate(struct clk *clk) | ||
59 | { | ||
60 | return clk->rate; | ||
61 | } | ||
62 | |||
63 | static u32 epll_div[][5] = { | ||
64 | { 36000000, 0, 48, 1, 4 }, | ||
65 | { 48000000, 0, 32, 1, 3 }, | ||
66 | { 60000000, 0, 40, 1, 3 }, | ||
67 | { 72000000, 0, 48, 1, 3 }, | ||
68 | { 84000000, 0, 28, 1, 2 }, | ||
69 | { 96000000, 0, 32, 1, 2 }, | ||
70 | { 32768000, 45264, 43, 1, 4 }, | ||
71 | { 45158000, 6903, 30, 1, 3 }, | ||
72 | { 49152000, 50332, 32, 1, 3 }, | ||
73 | { 67738000, 10398, 45, 1, 3 }, | ||
74 | { 73728000, 9961, 49, 1, 3 } | ||
75 | }; | ||
76 | |||
77 | static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate) | ||
78 | { | ||
79 | unsigned int epll_con, epll_con_k; | ||
80 | unsigned int i; | ||
81 | |||
82 | if (clk->rate == rate) /* Return if nothing changed */ | ||
83 | return 0; | ||
84 | |||
85 | epll_con = __raw_readl(S5P_EPLL_CON); | ||
86 | epll_con_k = __raw_readl(S5P_EPLL_CON_K); | ||
87 | |||
88 | epll_con_k &= ~(PLL90XX_KDIV_MASK); | ||
89 | epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); | ||
90 | |||
91 | for (i = 0; i < ARRAY_SIZE(epll_div); i++) { | ||
92 | if (epll_div[i][0] == rate) { | ||
93 | epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT); | ||
94 | epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | | ||
95 | (epll_div[i][3] << PLL90XX_PDIV_SHIFT) | | ||
96 | (epll_div[i][4] << PLL90XX_SDIV_SHIFT); | ||
97 | break; | ||
98 | } | ||
99 | } | ||
100 | |||
101 | if (i == ARRAY_SIZE(epll_div)) { | ||
102 | printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); | ||
103 | return -EINVAL; | ||
104 | } | ||
105 | |||
106 | __raw_writel(epll_con, S5P_EPLL_CON); | ||
107 | __raw_writel(epll_con_k, S5P_EPLL_CON_K); | ||
108 | |||
109 | clk->rate = rate; | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static struct clk_ops s5p6440_epll_ops = { | ||
115 | .get_rate = s5p6440_epll_get_rate, | ||
116 | .set_rate = s5p6440_epll_set_rate, | ||
117 | }; | ||
118 | |||
119 | static struct clksrc_clk clk_mout_epll = { | ||
120 | .clk = { | ||
121 | .name = "mout_epll", | ||
122 | .id = -1, | ||
123 | }, | ||
124 | .sources = &clk_src_epll, | ||
125 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 }, | ||
126 | }; | ||
127 | |||
128 | static struct clksrc_clk clk_mout_mpll = { | ||
129 | .clk = { | ||
130 | .name = "mout_mpll", | ||
131 | .id = -1, | ||
132 | }, | ||
133 | .sources = &clk_src_mpll, | ||
134 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 }, | ||
135 | }; | ||
136 | |||
137 | enum perf_level { | ||
138 | L0 = 532*1000, | ||
139 | L1 = 266*1000, | ||
140 | L2 = 133*1000, | ||
141 | }; | ||
142 | |||
143 | static const u32 clock_table[][3] = { | ||
144 | /*{ARM_CLK, DIVarm, DIVhclk}*/ | ||
145 | {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)}, | ||
146 | {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)}, | ||
147 | {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)}, | ||
148 | }; | ||
149 | |||
150 | static unsigned long s5p6440_armclk_get_rate(struct clk *clk) | ||
151 | { | ||
152 | unsigned long rate = clk_get_rate(clk->parent); | ||
153 | u32 clkdiv; | ||
154 | |||
155 | /* divisor mask starts at bit0, so no need to shift */ | ||
156 | clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK; | ||
157 | |||
158 | return rate / (clkdiv + 1); | ||
159 | } | ||
160 | |||
161 | static unsigned long s5p6440_armclk_round_rate(struct clk *clk, | ||
162 | unsigned long rate) | ||
163 | { | ||
164 | u32 iter; | ||
165 | |||
166 | for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) { | ||
167 | if (rate > clock_table[iter][0]) | ||
168 | return clock_table[iter-1][0]; | ||
169 | } | ||
170 | |||
171 | return clock_table[ARRAY_SIZE(clock_table) - 1][0]; | ||
172 | } | ||
173 | |||
174 | static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate) | ||
175 | { | ||
176 | u32 round_tmp; | ||
177 | u32 iter; | ||
178 | u32 clk_div0_tmp; | ||
179 | u32 cur_rate = clk->ops->get_rate(clk); | ||
180 | unsigned long flags; | ||
181 | |||
182 | round_tmp = clk->ops->round_rate(clk, rate); | ||
183 | if (round_tmp == cur_rate) | ||
184 | return 0; | ||
185 | |||
186 | |||
187 | for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) { | ||
188 | if (round_tmp == clock_table[iter][0]) | ||
189 | break; | ||
190 | } | ||
191 | |||
192 | if (iter >= ARRAY_SIZE(clock_table)) | ||
193 | iter = ARRAY_SIZE(clock_table) - 1; | ||
194 | |||
195 | local_irq_save(flags); | ||
196 | if (cur_rate > round_tmp) { | ||
197 | /* Frequency Down */ | ||
198 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); | ||
199 | clk_div0_tmp |= clock_table[iter][1]; | ||
200 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
201 | |||
202 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & | ||
203 | ~(S5P_CLKDIV0_HCLK_MASK); | ||
204 | clk_div0_tmp |= clock_table[iter][2]; | ||
205 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
206 | |||
207 | |||
208 | } else { | ||
209 | /* Frequency Up */ | ||
210 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & | ||
211 | ~(S5P_CLKDIV0_HCLK_MASK); | ||
212 | clk_div0_tmp |= clock_table[iter][2]; | ||
213 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
214 | |||
215 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); | ||
216 | clk_div0_tmp |= clock_table[iter][1]; | ||
217 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
218 | } | ||
219 | local_irq_restore(flags); | ||
220 | |||
221 | clk->rate = clock_table[iter][0]; | ||
222 | |||
223 | return 0; | ||
224 | } | ||
225 | |||
226 | static struct clk_ops s5p6440_clkarm_ops = { | ||
227 | .get_rate = s5p6440_armclk_get_rate, | ||
228 | .set_rate = s5p6440_armclk_set_rate, | ||
229 | .round_rate = s5p6440_armclk_round_rate, | ||
230 | }; | ||
231 | |||
232 | static struct clksrc_clk clk_armclk = { | ||
233 | .clk = { | ||
234 | .name = "armclk", | ||
235 | .id = 1, | ||
236 | .parent = &clk_mout_apll.clk, | ||
237 | .ops = &s5p6440_clkarm_ops, | ||
238 | }, | ||
239 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 4 }, | ||
240 | }; | ||
241 | |||
242 | static struct clksrc_clk clk_dout_mpll = { | ||
243 | .clk = { | ||
244 | .name = "dout_mpll", | ||
245 | .id = -1, | ||
246 | .parent = &clk_mout_mpll.clk, | ||
247 | }, | ||
248 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 1 }, | ||
249 | }; | ||
250 | |||
251 | static struct clksrc_clk clk_hclk = { | ||
252 | .clk = { | ||
253 | .name = "clk_hclk", | ||
254 | .id = -1, | ||
255 | .parent = &clk_armclk.clk, | ||
256 | }, | ||
257 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 }, | ||
258 | }; | ||
259 | |||
260 | static struct clksrc_clk clk_pclk = { | ||
261 | .clk = { | ||
262 | .name = "clk_pclk", | ||
263 | .id = -1, | ||
264 | .parent = &clk_hclk.clk, | ||
265 | }, | ||
266 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 }, | ||
267 | }; | ||
268 | |||
269 | static struct clk *clkset_hclklow_list[] = { | ||
270 | &clk_mout_apll.clk, | ||
271 | &clk_mout_mpll.clk, | ||
272 | }; | ||
273 | |||
274 | static struct clksrc_sources clkset_hclklow = { | ||
275 | .sources = clkset_hclklow_list, | ||
276 | .nr_sources = ARRAY_SIZE(clkset_hclklow_list), | ||
277 | }; | ||
278 | |||
279 | static struct clksrc_clk clk_hclk_low = { | ||
280 | .clk = { | ||
281 | .name = "hclk_low", | ||
282 | .id = -1, | ||
283 | }, | ||
284 | .sources = &clkset_hclklow, | ||
285 | .reg_src = { .reg = S5P_SYS_OTHERS, .shift = 6, .size = 1 }, | ||
286 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 }, | ||
287 | }; | ||
288 | |||
289 | static struct clksrc_clk clk_pclk_low = { | ||
290 | .clk = { | ||
291 | .name = "pclk_low", | ||
292 | .id = -1, | ||
293 | .parent = &clk_hclk_low.clk, | ||
294 | }, | ||
295 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 }, | ||
296 | }; | ||
297 | |||
298 | int s5p6440_clk48m_ctrl(struct clk *clk, int enable) | ||
299 | { | ||
300 | unsigned long flags; | ||
301 | u32 val; | ||
302 | |||
303 | /* can't rely on clock lock, this register has other usages */ | ||
304 | local_irq_save(flags); | ||
305 | |||
306 | val = __raw_readl(S5P_OTHERS); | ||
307 | if (enable) | ||
308 | val |= S5P_OTHERS_USB_SIG_MASK; | ||
309 | else | ||
310 | val &= ~S5P_OTHERS_USB_SIG_MASK; | ||
311 | |||
312 | __raw_writel(val, S5P_OTHERS); | ||
313 | |||
314 | local_irq_restore(flags); | ||
315 | |||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | static int s5p6440_pclk_ctrl(struct clk *clk, int enable) | ||
320 | { | ||
321 | return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable); | ||
322 | } | ||
323 | |||
324 | static int s5p6440_hclk0_ctrl(struct clk *clk, int enable) | ||
325 | { | ||
326 | return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable); | ||
327 | } | ||
328 | |||
329 | static int s5p6440_hclk1_ctrl(struct clk *clk, int enable) | ||
330 | { | ||
331 | return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable); | ||
332 | } | ||
333 | |||
334 | static int s5p6440_sclk_ctrl(struct clk *clk, int enable) | ||
335 | { | ||
336 | return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable); | ||
337 | } | ||
338 | |||
339 | static int s5p6440_sclk1_ctrl(struct clk *clk, int enable) | ||
340 | { | ||
341 | return s5p_gatectrl(S5P_CLK_GATE_SCLK1, clk, enable); | ||
342 | } | ||
343 | |||
344 | static int s5p6440_mem_ctrl(struct clk *clk, int enable) | ||
345 | { | ||
346 | return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable); | ||
347 | } | ||
348 | |||
349 | /* | ||
350 | * The following clocks will be disabled during clock initialization. It is | ||
351 | * recommended to keep the following clocks disabled until the driver requests | ||
352 | * for enabling the clock. | ||
353 | */ | ||
354 | static struct clk init_clocks_disable[] = { | ||
355 | { | ||
356 | .name = "nand", | ||
357 | .id = -1, | ||
358 | .parent = &clk_hclk.clk, | ||
359 | .enable = s5p6440_mem_ctrl, | ||
360 | .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON, | ||
361 | }, { | ||
362 | .name = "adc", | ||
363 | .id = -1, | ||
364 | .parent = &clk_pclk_low.clk, | ||
365 | .enable = s5p6440_pclk_ctrl, | ||
366 | .ctrlbit = S5P_CLKCON_PCLK_TSADC, | ||
367 | }, { | ||
368 | .name = "i2c", | ||
369 | .id = -1, | ||
370 | .parent = &clk_pclk_low.clk, | ||
371 | .enable = s5p6440_pclk_ctrl, | ||
372 | .ctrlbit = S5P_CLKCON_PCLK_IIC0, | ||
373 | }, { | ||
374 | .name = "i2s_v40", | ||
375 | .id = 0, | ||
376 | .parent = &clk_pclk_low.clk, | ||
377 | .enable = s5p6440_pclk_ctrl, | ||
378 | .ctrlbit = S5P_CLKCON_PCLK_IIS2, | ||
379 | }, { | ||
380 | .name = "spi", | ||
381 | .id = 0, | ||
382 | .parent = &clk_pclk_low.clk, | ||
383 | .enable = s5p6440_pclk_ctrl, | ||
384 | .ctrlbit = S5P_CLKCON_PCLK_SPI0, | ||
385 | }, { | ||
386 | .name = "spi", | ||
387 | .id = 1, | ||
388 | .parent = &clk_pclk_low.clk, | ||
389 | .enable = s5p6440_pclk_ctrl, | ||
390 | .ctrlbit = S5P_CLKCON_PCLK_SPI1, | ||
391 | }, { | ||
392 | .name = "sclk_spi_48", | ||
393 | .id = 0, | ||
394 | .parent = &clk_48m, | ||
395 | .enable = s5p6440_sclk_ctrl, | ||
396 | .ctrlbit = S5P_CLKCON_SCLK0_SPI0_48, | ||
397 | }, { | ||
398 | .name = "sclk_spi_48", | ||
399 | .id = 1, | ||
400 | .parent = &clk_48m, | ||
401 | .enable = s5p6440_sclk_ctrl, | ||
402 | .ctrlbit = S5P_CLKCON_SCLK0_SPI1_48, | ||
403 | }, { | ||
404 | .name = "mmc_48m", | ||
405 | .id = 0, | ||
406 | .parent = &clk_48m, | ||
407 | .enable = s5p6440_sclk_ctrl, | ||
408 | .ctrlbit = S5P_CLKCON_SCLK0_MMC0_48, | ||
409 | }, { | ||
410 | .name = "mmc_48m", | ||
411 | .id = 1, | ||
412 | .parent = &clk_48m, | ||
413 | .enable = s5p6440_sclk_ctrl, | ||
414 | .ctrlbit = S5P_CLKCON_SCLK0_MMC1_48, | ||
415 | }, { | ||
416 | .name = "mmc_48m", | ||
417 | .id = 2, | ||
418 | .parent = &clk_48m, | ||
419 | .enable = s5p6440_sclk_ctrl, | ||
420 | .ctrlbit = S5P_CLKCON_SCLK0_MMC2_48, | ||
421 | }, { | ||
422 | .name = "otg", | ||
423 | .id = -1, | ||
424 | .parent = &clk_hclk_low.clk, | ||
425 | .enable = s5p6440_hclk0_ctrl, | ||
426 | .ctrlbit = S5P_CLKCON_HCLK0_USB | ||
427 | }, { | ||
428 | .name = "post", | ||
429 | .id = -1, | ||
430 | .parent = &clk_hclk_low.clk, | ||
431 | .enable = s5p6440_hclk0_ctrl, | ||
432 | .ctrlbit = S5P_CLKCON_HCLK0_POST0 | ||
433 | }, { | ||
434 | .name = "lcd", | ||
435 | .id = -1, | ||
436 | .parent = &clk_hclk_low.clk, | ||
437 | .enable = s5p6440_hclk1_ctrl, | ||
438 | .ctrlbit = S5P_CLKCON_HCLK1_DISPCON, | ||
439 | }, { | ||
440 | .name = "hsmmc", | ||
441 | .id = 0, | ||
442 | .parent = &clk_hclk_low.clk, | ||
443 | .enable = s5p6440_hclk0_ctrl, | ||
444 | .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0, | ||
445 | }, { | ||
446 | .name = "hsmmc", | ||
447 | .id = 1, | ||
448 | .parent = &clk_hclk_low.clk, | ||
449 | .enable = s5p6440_hclk0_ctrl, | ||
450 | .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1, | ||
451 | }, { | ||
452 | .name = "hsmmc", | ||
453 | .id = 2, | ||
454 | .parent = &clk_hclk_low.clk, | ||
455 | .enable = s5p6440_hclk0_ctrl, | ||
456 | .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2, | ||
457 | }, { | ||
458 | .name = "rtc", | ||
459 | .id = -1, | ||
460 | .parent = &clk_pclk_low.clk, | ||
461 | .enable = s5p6440_pclk_ctrl, | ||
462 | .ctrlbit = S5P_CLKCON_PCLK_RTC, | ||
463 | }, { | ||
464 | .name = "watchdog", | ||
465 | .id = -1, | ||
466 | .parent = &clk_pclk_low.clk, | ||
467 | .enable = s5p6440_pclk_ctrl, | ||
468 | .ctrlbit = S5P_CLKCON_PCLK_WDT, | ||
469 | }, { | ||
470 | .name = "timers", | ||
471 | .id = -1, | ||
472 | .parent = &clk_pclk_low.clk, | ||
473 | .enable = s5p6440_pclk_ctrl, | ||
474 | .ctrlbit = S5P_CLKCON_PCLK_PWM, | ||
475 | }, { | ||
476 | .name = "hclk_fimgvg", | ||
477 | .id = -1, | ||
478 | .parent = &clk_hclk.clk, | ||
479 | .enable = s5p6440_hclk1_ctrl, | ||
480 | .ctrlbit = (1 << 2), | ||
481 | }, { | ||
482 | .name = "tsi", | ||
483 | .id = -1, | ||
484 | .parent = &clk_hclk_low.clk, | ||
485 | .enable = s5p6440_hclk1_ctrl, | ||
486 | .ctrlbit = (1 << 0), | ||
487 | }, { | ||
488 | .name = "pclk_fimgvg", | ||
489 | .id = -1, | ||
490 | .parent = &clk_pclk.clk, | ||
491 | .enable = s5p6440_pclk_ctrl, | ||
492 | .ctrlbit = (1 << 31), | ||
493 | }, { | ||
494 | .name = "dmc0", | ||
495 | .id = -1, | ||
496 | .parent = &clk_pclk.clk, | ||
497 | .enable = s5p6440_pclk_ctrl, | ||
498 | .ctrlbit = (1 << 30), | ||
499 | }, { | ||
500 | .name = "etm", | ||
501 | .id = -1, | ||
502 | .parent = &clk_pclk.clk, | ||
503 | .enable = s5p6440_pclk_ctrl, | ||
504 | .ctrlbit = (1 << 29), | ||
505 | }, { | ||
506 | .name = "dsim", | ||
507 | .id = -1, | ||
508 | .parent = &clk_pclk_low.clk, | ||
509 | .enable = s5p6440_pclk_ctrl, | ||
510 | .ctrlbit = (1 << 28), | ||
511 | }, { | ||
512 | .name = "gps", | ||
513 | .id = -1, | ||
514 | .parent = &clk_pclk_low.clk, | ||
515 | .enable = s5p6440_pclk_ctrl, | ||
516 | .ctrlbit = (1 << 25), | ||
517 | }, { | ||
518 | .name = "pcm", | ||
519 | .id = -1, | ||
520 | .parent = &clk_pclk_low.clk, | ||
521 | .enable = s5p6440_pclk_ctrl, | ||
522 | .ctrlbit = (1 << 8), | ||
523 | }, { | ||
524 | .name = "irom", | ||
525 | .id = -1, | ||
526 | .parent = &clk_hclk.clk, | ||
527 | .enable = s5p6440_hclk0_ctrl, | ||
528 | .ctrlbit = (1 << 25), | ||
529 | }, { | ||
530 | .name = "dma", | ||
531 | .id = -1, | ||
532 | .parent = &clk_hclk_low.clk, | ||
533 | .enable = s5p6440_hclk0_ctrl, | ||
534 | .ctrlbit = (1 << 12), | ||
535 | }, { | ||
536 | .name = "2d", | ||
537 | .id = -1, | ||
538 | .parent = &clk_hclk.clk, | ||
539 | .enable = s5p6440_hclk0_ctrl, | ||
540 | .ctrlbit = (1 << 8), | ||
541 | }, | ||
542 | }; | ||
543 | |||
544 | /* | ||
545 | * The following clocks will be enabled during clock initialization. | ||
546 | */ | ||
547 | static struct clk init_clocks[] = { | ||
548 | { | ||
549 | .name = "gpio", | ||
550 | .id = -1, | ||
551 | .parent = &clk_pclk_low.clk, | ||
552 | .enable = s5p6440_pclk_ctrl, | ||
553 | .ctrlbit = S5P_CLKCON_PCLK_GPIO, | ||
554 | }, { | ||
555 | .name = "uart", | ||
556 | .id = 0, | ||
557 | .parent = &clk_pclk_low.clk, | ||
558 | .enable = s5p6440_pclk_ctrl, | ||
559 | .ctrlbit = S5P_CLKCON_PCLK_UART0, | ||
560 | }, { | ||
561 | .name = "uart", | ||
562 | .id = 1, | ||
563 | .parent = &clk_pclk_low.clk, | ||
564 | .enable = s5p6440_pclk_ctrl, | ||
565 | .ctrlbit = S5P_CLKCON_PCLK_UART1, | ||
566 | }, { | ||
567 | .name = "uart", | ||
568 | .id = 2, | ||
569 | .parent = &clk_pclk_low.clk, | ||
570 | .enable = s5p6440_pclk_ctrl, | ||
571 | .ctrlbit = S5P_CLKCON_PCLK_UART2, | ||
572 | }, { | ||
573 | .name = "uart", | ||
574 | .id = 3, | ||
575 | .parent = &clk_pclk_low.clk, | ||
576 | .enable = s5p6440_pclk_ctrl, | ||
577 | .ctrlbit = S5P_CLKCON_PCLK_UART3, | ||
578 | }, { | ||
579 | .name = "mem", | ||
580 | .id = -1, | ||
581 | .parent = &clk_hclk.clk, | ||
582 | .enable = s5p6440_hclk0_ctrl, | ||
583 | .ctrlbit = (1 << 21), | ||
584 | }, { | ||
585 | .name = "intc", | ||
586 | .id = -1, | ||
587 | .parent = &clk_hclk.clk, | ||
588 | .enable = s5p6440_hclk0_ctrl, | ||
589 | .ctrlbit = (1 << 1), | ||
590 | }, | ||
591 | }; | ||
592 | |||
593 | static struct clk clk_iis_cd_v40 = { | ||
594 | .name = "iis_cdclk_v40", | ||
595 | .id = -1, | ||
596 | }; | ||
597 | |||
598 | static struct clk clk_pcm_cd = { | ||
599 | .name = "pcm_cdclk", | ||
600 | .id = -1, | ||
601 | }; | ||
602 | |||
603 | static struct clk *clkset_group1_list[] = { | ||
604 | &clk_mout_epll.clk, | ||
605 | &clk_dout_mpll.clk, | ||
606 | &clk_fin_epll, | ||
607 | }; | ||
608 | |||
609 | static struct clksrc_sources clkset_group1 = { | ||
610 | .sources = clkset_group1_list, | ||
611 | .nr_sources = ARRAY_SIZE(clkset_group1_list), | ||
612 | }; | ||
613 | |||
614 | static struct clk *clkset_uart_list[] = { | ||
615 | &clk_mout_epll.clk, | ||
616 | &clk_dout_mpll.clk, | ||
617 | }; | ||
618 | |||
619 | static struct clksrc_sources clkset_uart = { | ||
620 | .sources = clkset_uart_list, | ||
621 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
622 | }; | ||
623 | |||
624 | static struct clk *clkset_audio_list[] = { | ||
625 | &clk_mout_epll.clk, | ||
626 | &clk_dout_mpll.clk, | ||
627 | &clk_fin_epll, | ||
628 | &clk_iis_cd_v40, | ||
629 | &clk_pcm_cd, | ||
630 | }; | ||
631 | |||
632 | static struct clksrc_sources clkset_audio = { | ||
633 | .sources = clkset_audio_list, | ||
634 | .nr_sources = ARRAY_SIZE(clkset_audio_list), | ||
635 | }; | ||
636 | |||
637 | static struct clksrc_clk clksrcs[] = { | ||
638 | { | ||
639 | .clk = { | ||
640 | .name = "mmc_bus", | ||
641 | .id = 0, | ||
642 | .ctrlbit = S5P_CLKCON_SCLK0_MMC0, | ||
643 | .enable = s5p6440_sclk_ctrl, | ||
644 | }, | ||
645 | .sources = &clkset_group1, | ||
646 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 }, | ||
647 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 }, | ||
648 | }, { | ||
649 | .clk = { | ||
650 | .name = "mmc_bus", | ||
651 | .id = 1, | ||
652 | .ctrlbit = S5P_CLKCON_SCLK0_MMC1, | ||
653 | .enable = s5p6440_sclk_ctrl, | ||
654 | }, | ||
655 | .sources = &clkset_group1, | ||
656 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 }, | ||
657 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 }, | ||
658 | }, { | ||
659 | .clk = { | ||
660 | .name = "mmc_bus", | ||
661 | .id = 2, | ||
662 | .ctrlbit = S5P_CLKCON_SCLK0_MMC2, | ||
663 | .enable = s5p6440_sclk_ctrl, | ||
664 | }, | ||
665 | .sources = &clkset_group1, | ||
666 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 }, | ||
667 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 }, | ||
668 | }, { | ||
669 | .clk = { | ||
670 | .name = "uclk1", | ||
671 | .id = -1, | ||
672 | .ctrlbit = S5P_CLKCON_SCLK0_UART, | ||
673 | .enable = s5p6440_sclk_ctrl, | ||
674 | }, | ||
675 | .sources = &clkset_uart, | ||
676 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 }, | ||
677 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, | ||
678 | }, { | ||
679 | .clk = { | ||
680 | .name = "spi_epll", | ||
681 | .id = 0, | ||
682 | .ctrlbit = S5P_CLKCON_SCLK0_SPI0, | ||
683 | .enable = s5p6440_sclk_ctrl, | ||
684 | }, | ||
685 | .sources = &clkset_group1, | ||
686 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 }, | ||
687 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, | ||
688 | }, { | ||
689 | .clk = { | ||
690 | .name = "spi_epll", | ||
691 | .id = 1, | ||
692 | .ctrlbit = S5P_CLKCON_SCLK0_SPI1, | ||
693 | .enable = s5p6440_sclk_ctrl, | ||
694 | }, | ||
695 | .sources = &clkset_group1, | ||
696 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 }, | ||
697 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, | ||
698 | }, { | ||
699 | .clk = { | ||
700 | .name = "sclk_post", | ||
701 | .id = -1, | ||
702 | .ctrlbit = (1 << 10), | ||
703 | .enable = s5p6440_sclk_ctrl, | ||
704 | }, | ||
705 | .sources = &clkset_group1, | ||
706 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 26, .size = 2 }, | ||
707 | .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 }, | ||
708 | }, { | ||
709 | .clk = { | ||
710 | .name = "sclk_dispcon", | ||
711 | .id = -1, | ||
712 | .ctrlbit = (1 << 1), | ||
713 | .enable = s5p6440_sclk1_ctrl, | ||
714 | }, | ||
715 | .sources = &clkset_group1, | ||
716 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 }, | ||
717 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | ||
718 | }, { | ||
719 | .clk = { | ||
720 | .name = "sclk_fimgvg", | ||
721 | .id = -1, | ||
722 | .ctrlbit = (1 << 2), | ||
723 | .enable = s5p6440_sclk1_ctrl, | ||
724 | }, | ||
725 | .sources = &clkset_group1, | ||
726 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 }, | ||
727 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | ||
728 | }, { | ||
729 | .clk = { | ||
730 | .name = "sclk_audio2", | ||
731 | .id = -1, | ||
732 | .ctrlbit = (1 << 11), | ||
733 | .enable = s5p6440_sclk_ctrl, | ||
734 | }, | ||
735 | .sources = &clkset_audio, | ||
736 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 }, | ||
737 | .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 }, | ||
738 | }, | ||
739 | }; | ||
740 | |||
741 | /* Clock initialisation code */ | ||
742 | static struct clksrc_clk *sysclks[] = { | ||
743 | &clk_mout_apll, | ||
744 | &clk_mout_epll, | ||
745 | &clk_mout_mpll, | ||
746 | &clk_dout_mpll, | ||
747 | &clk_armclk, | ||
748 | &clk_hclk, | ||
749 | &clk_pclk, | ||
750 | &clk_hclk_low, | ||
751 | &clk_pclk_low, | ||
752 | }; | ||
753 | |||
754 | void __init_or_cpufreq s5p6440_setup_clocks(void) | ||
755 | { | ||
756 | struct clk *xtal_clk; | ||
757 | unsigned long xtal; | ||
758 | unsigned long fclk; | ||
759 | unsigned long hclk; | ||
760 | unsigned long hclk_low; | ||
761 | unsigned long pclk; | ||
762 | unsigned long pclk_low; | ||
763 | unsigned long epll; | ||
764 | unsigned long apll; | ||
765 | unsigned long mpll; | ||
766 | unsigned int ptr; | ||
767 | |||
768 | /* Set S5P6440 functions for clk_fout_epll */ | ||
769 | clk_fout_epll.enable = s5p6440_epll_enable; | ||
770 | clk_fout_epll.ops = &s5p6440_epll_ops; | ||
771 | |||
772 | clk_48m.enable = s5p6440_clk48m_ctrl; | ||
773 | |||
774 | xtal_clk = clk_get(NULL, "ext_xtal"); | ||
775 | BUG_ON(IS_ERR(xtal_clk)); | ||
776 | |||
777 | xtal = clk_get_rate(xtal_clk); | ||
778 | clk_put(xtal_clk); | ||
779 | |||
780 | epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON), | ||
781 | __raw_readl(S5P_EPLL_CON_K)); | ||
782 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); | ||
783 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502); | ||
784 | |||
785 | clk_fout_mpll.rate = mpll; | ||
786 | clk_fout_epll.rate = epll; | ||
787 | clk_fout_apll.rate = apll; | ||
788 | |||
789 | printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ | ||
790 | " E=%ld.%ldMHz\n", | ||
791 | print_mhz(apll), print_mhz(mpll), print_mhz(epll)); | ||
792 | |||
793 | fclk = clk_get_rate(&clk_armclk.clk); | ||
794 | hclk = clk_get_rate(&clk_hclk.clk); | ||
795 | pclk = clk_get_rate(&clk_pclk.clk); | ||
796 | hclk_low = clk_get_rate(&clk_hclk_low.clk); | ||
797 | pclk_low = clk_get_rate(&clk_pclk_low.clk); | ||
798 | |||
799 | printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ | ||
800 | " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", | ||
801 | print_mhz(hclk), print_mhz(hclk_low), | ||
802 | print_mhz(pclk), print_mhz(pclk_low)); | ||
803 | |||
804 | clk_f.rate = fclk; | ||
805 | clk_h.rate = hclk; | ||
806 | clk_p.rate = pclk; | ||
807 | |||
808 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
809 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
810 | } | ||
811 | |||
812 | static struct clk *clks[] __initdata = { | ||
813 | &clk_ext, | ||
814 | &clk_iis_cd_v40, | ||
815 | &clk_pcm_cd, | ||
816 | }; | ||
817 | |||
818 | void __init s5p6440_register_clocks(void) | ||
819 | { | ||
820 | struct clk *clkp; | ||
821 | int ret; | ||
822 | int ptr; | ||
823 | |||
824 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
825 | if (ret > 0) | ||
826 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
827 | |||
828 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
829 | s3c_register_clksrc(sysclks[ptr], 1); | ||
830 | |||
831 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
832 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
833 | |||
834 | clkp = init_clocks_disable; | ||
835 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | ||
836 | |||
837 | ret = s3c24xx_register_clock(clkp); | ||
838 | if (ret < 0) { | ||
839 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
840 | clkp->name, ret); | ||
841 | } | ||
842 | (clkp->enable)(clkp, 0); | ||
843 | } | ||
844 | |||
845 | s3c_pwmclk_init(); | ||
846 | } | ||
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c deleted file mode 100644 index 526f33adb31d..000000000000 --- a/arch/arm/mach-s5p6440/cpu.c +++ /dev/null | |||
@@ -1,116 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | |||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach/map.h> | ||
25 | #include <asm/mach/irq.h> | ||
26 | |||
27 | #include <asm/proc-fns.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/map.h> | ||
31 | #include <asm/irq.h> | ||
32 | |||
33 | #include <plat/regs-serial.h> | ||
34 | #include <mach/regs-clock.h> | ||
35 | |||
36 | #include <plat/cpu.h> | ||
37 | #include <plat/devs.h> | ||
38 | #include <plat/clock.h> | ||
39 | #include <plat/s5p6440.h> | ||
40 | #include <plat/adc-core.h> | ||
41 | |||
42 | static void s5p6440_idle(void) | ||
43 | { | ||
44 | unsigned long val; | ||
45 | |||
46 | if (!need_resched()) { | ||
47 | val = __raw_readl(S5P_PWR_CFG); | ||
48 | val &= ~(0x3<<5); | ||
49 | val |= (0x1<<5); | ||
50 | __raw_writel(val, S5P_PWR_CFG); | ||
51 | |||
52 | cpu_do_idle(); | ||
53 | } | ||
54 | local_irq_enable(); | ||
55 | } | ||
56 | |||
57 | /* s5p6440_map_io | ||
58 | * | ||
59 | * register the standard cpu IO areas | ||
60 | */ | ||
61 | |||
62 | void __init s5p6440_map_io(void) | ||
63 | { | ||
64 | /* initialize any device information early */ | ||
65 | s3c_adc_setname("s3c64xx-adc"); | ||
66 | } | ||
67 | |||
68 | void __init s5p6440_init_clocks(int xtal) | ||
69 | { | ||
70 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
71 | |||
72 | s3c24xx_register_baseclocks(xtal); | ||
73 | s5p_register_clocks(xtal); | ||
74 | s5p6440_register_clocks(); | ||
75 | s5p6440_setup_clocks(); | ||
76 | } | ||
77 | |||
78 | void __init s5p6440_init_irq(void) | ||
79 | { | ||
80 | /* S5P6440 supports only 2 VIC */ | ||
81 | u32 vic[2]; | ||
82 | |||
83 | /* | ||
84 | * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] | ||
85 | * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] | ||
86 | */ | ||
87 | vic[0] = 0xff800ae7; | ||
88 | vic[1] = 0xffbf23e5; | ||
89 | |||
90 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
91 | } | ||
92 | |||
93 | struct sysdev_class s5p6440_sysclass = { | ||
94 | .name = "s5p6440-core", | ||
95 | }; | ||
96 | |||
97 | static struct sys_device s5p6440_sysdev = { | ||
98 | .cls = &s5p6440_sysclass, | ||
99 | }; | ||
100 | |||
101 | static int __init s5p6440_core_init(void) | ||
102 | { | ||
103 | return sysdev_class_register(&s5p6440_sysclass); | ||
104 | } | ||
105 | |||
106 | core_initcall(s5p6440_core_init); | ||
107 | |||
108 | int __init s5p6440_init(void) | ||
109 | { | ||
110 | printk(KERN_INFO "S5P6440: Initializing architecture\n"); | ||
111 | |||
112 | /* set idle function */ | ||
113 | pm_idle = s5p6440_idle; | ||
114 | |||
115 | return sysdev_register(&s5p6440_sysdev); | ||
116 | } | ||
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c deleted file mode 100644 index 3ca0d2b8275d..000000000000 --- a/arch/arm/mach-s5p6440/dev-audio.c +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6440_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | /* configure GPIO for i2s port */ | ||
25 | switch (pdev->id) { | ||
26 | case -1: | ||
27 | s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); | ||
29 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); | ||
30 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); | ||
31 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); | ||
32 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); | ||
33 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static struct s3c_audio_pdata s3c_i2s_pdata = { | ||
45 | .cfg_gpio = s5p6440_cfg_i2s, | ||
46 | }; | ||
47 | |||
48 | static struct resource s5p6440_iis0_resource[] = { | ||
49 | [0] = { | ||
50 | .start = S5P6440_PA_I2S, | ||
51 | .end = S5P6440_PA_I2S + 0x100 - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | [1] = { | ||
55 | .start = DMACH_I2S0_TX, | ||
56 | .end = DMACH_I2S0_TX, | ||
57 | .flags = IORESOURCE_DMA, | ||
58 | }, | ||
59 | [2] = { | ||
60 | .start = DMACH_I2S0_RX, | ||
61 | .end = DMACH_I2S0_RX, | ||
62 | .flags = IORESOURCE_DMA, | ||
63 | }, | ||
64 | }; | ||
65 | |||
66 | struct platform_device s5p6440_device_iis = { | ||
67 | .name = "s3c64xx-iis-v4", | ||
68 | .id = -1, | ||
69 | .num_resources = ARRAY_SIZE(s5p6440_iis0_resource), | ||
70 | .resource = s5p6440_iis0_resource, | ||
71 | .dev = { | ||
72 | .platform_data = &s3c_i2s_pdata, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | /* PCM Controller platform_devices */ | ||
77 | |||
78 | static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) | ||
79 | { | ||
80 | switch (pdev->id) { | ||
81 | case 0: | ||
82 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); | ||
83 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); | ||
84 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); | ||
85 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); | ||
86 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); | ||
87 | break; | ||
88 | |||
89 | default: | ||
90 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
91 | return -EINVAL; | ||
92 | } | ||
93 | |||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
98 | .cfg_gpio = s5p6440_pcm_cfg_gpio, | ||
99 | }; | ||
100 | |||
101 | static struct resource s5p6440_pcm0_resource[] = { | ||
102 | [0] = { | ||
103 | .start = S5P6440_PA_PCM, | ||
104 | .end = S5P6440_PA_PCM + 0x100 - 1, | ||
105 | .flags = IORESOURCE_MEM, | ||
106 | }, | ||
107 | [1] = { | ||
108 | .start = DMACH_PCM0_TX, | ||
109 | .end = DMACH_PCM0_TX, | ||
110 | .flags = IORESOURCE_DMA, | ||
111 | }, | ||
112 | [2] = { | ||
113 | .start = DMACH_PCM0_RX, | ||
114 | .end = DMACH_PCM0_RX, | ||
115 | .flags = IORESOURCE_DMA, | ||
116 | }, | ||
117 | }; | ||
118 | |||
119 | struct platform_device s5p6440_device_pcm = { | ||
120 | .name = "samsung-pcm", | ||
121 | .id = 0, | ||
122 | .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), | ||
123 | .resource = s5p6440_pcm0_resource, | ||
124 | .dev = { | ||
125 | .platform_data = &s3c_pcm_pdata, | ||
126 | }, | ||
127 | }; | ||
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c deleted file mode 100644 index 510af44d180c..000000000000 --- a/arch/arm/mach-s5p6440/dev-spi.c +++ /dev/null | |||
@@ -1,176 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5P6440_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | switch (pdev->id) { | ||
39 | case 0: | ||
40 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
42 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
43 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
44 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
45 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
46 | break; | ||
47 | |||
48 | case 1: | ||
49 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
50 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
51 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
52 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
53 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
55 | break; | ||
56 | |||
57 | default: | ||
58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
59 | return -EINVAL; | ||
60 | } | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static struct resource s5p6440_spi0_resource[] = { | ||
66 | [0] = { | ||
67 | .start = S5P6440_PA_SPI0, | ||
68 | .end = S5P6440_PA_SPI0 + 0x100 - 1, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .start = DMACH_SPI0_TX, | ||
73 | .end = DMACH_SPI0_TX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [2] = { | ||
77 | .start = DMACH_SPI0_RX, | ||
78 | .end = DMACH_SPI0_RX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | [3] = { | ||
82 | .start = IRQ_SPI0, | ||
83 | .end = IRQ_SPI0, | ||
84 | .flags = IORESOURCE_IRQ, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
89 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
90 | .fifo_lvl_mask = 0x1ff, | ||
91 | .rx_lvl_offset = 15, | ||
92 | }; | ||
93 | |||
94 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
95 | |||
96 | struct platform_device s5p6440_device_spi0 = { | ||
97 | .name = "s3c64xx-spi", | ||
98 | .id = 0, | ||
99 | .num_resources = ARRAY_SIZE(s5p6440_spi0_resource), | ||
100 | .resource = s5p6440_spi0_resource, | ||
101 | .dev = { | ||
102 | .dma_mask = &spi_dmamask, | ||
103 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
104 | .platform_data = &s5p6440_spi0_pdata, | ||
105 | }, | ||
106 | }; | ||
107 | |||
108 | static struct resource s5p6440_spi1_resource[] = { | ||
109 | [0] = { | ||
110 | .start = S5P6440_PA_SPI1, | ||
111 | .end = S5P6440_PA_SPI1 + 0x100 - 1, | ||
112 | .flags = IORESOURCE_MEM, | ||
113 | }, | ||
114 | [1] = { | ||
115 | .start = DMACH_SPI1_TX, | ||
116 | .end = DMACH_SPI1_TX, | ||
117 | .flags = IORESOURCE_DMA, | ||
118 | }, | ||
119 | [2] = { | ||
120 | .start = DMACH_SPI1_RX, | ||
121 | .end = DMACH_SPI1_RX, | ||
122 | .flags = IORESOURCE_DMA, | ||
123 | }, | ||
124 | [3] = { | ||
125 | .start = IRQ_SPI1, | ||
126 | .end = IRQ_SPI1, | ||
127 | .flags = IORESOURCE_IRQ, | ||
128 | }, | ||
129 | }; | ||
130 | |||
131 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
132 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
133 | .fifo_lvl_mask = 0x7f, | ||
134 | .rx_lvl_offset = 15, | ||
135 | }; | ||
136 | |||
137 | struct platform_device s5p6440_device_spi1 = { | ||
138 | .name = "s3c64xx-spi", | ||
139 | .id = 1, | ||
140 | .num_resources = ARRAY_SIZE(s5p6440_spi1_resource), | ||
141 | .resource = s5p6440_spi1_resource, | ||
142 | .dev = { | ||
143 | .dma_mask = &spi_dmamask, | ||
144 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
145 | .platform_data = &s5p6440_spi1_pdata, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
150 | { | ||
151 | struct s3c64xx_spi_info *pd; | ||
152 | |||
153 | /* Reject invalid configuration */ | ||
154 | if (!num_cs || src_clk_nr < 0 | ||
155 | || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { | ||
156 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
157 | return; | ||
158 | } | ||
159 | |||
160 | switch (cntrlr) { | ||
161 | case 0: | ||
162 | pd = &s5p6440_spi0_pdata; | ||
163 | break; | ||
164 | case 1: | ||
165 | pd = &s5p6440_spi1_pdata; | ||
166 | break; | ||
167 | default: | ||
168 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
169 | __func__, cntrlr); | ||
170 | return; | ||
171 | } | ||
172 | |||
173 | pd->num_cs = num_cs; | ||
174 | pd->src_clk_nr = src_clk_nr; | ||
175 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
176 | } | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S deleted file mode 100644 index 1347d7f99079..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /* pull in the relevant register and map files. */ | ||
12 | |||
13 | #include <mach/map.h> | ||
14 | #include <plat/regs-serial.h> | ||
15 | |||
16 | /* note, for the boot process to work we have to keep the UART | ||
17 | * virtual address aligned to an 1MiB boundary for the L1 | ||
18 | * mapping the head code makes. We keep the UART virtual address | ||
19 | * aligned and add in the offset when we load the value here. | ||
20 | */ | ||
21 | |||
22 | .macro addruart, rx, rtmp | ||
23 | mrc p15, 0, \rx, c1, c0 | ||
24 | tst \rx, #1 | ||
25 | ldreq \rx, = S3C_PA_UART | ||
26 | ldrne \rx, = S3C_VA_UART | ||
27 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
28 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
29 | #endif | ||
30 | .endm | ||
31 | |||
32 | /* include the reset of the code which will do the work, we're only | ||
33 | * compiling for a single cpu processor type so the default of s3c2440 | ||
34 | * will be fine with us. | ||
35 | */ | ||
36 | |||
37 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h deleted file mode 100644 index 21783834f2a2..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/gpio.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - GPIO lib support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_GPIO_H | ||
14 | #define __ASM_ARCH_GPIO_H __FILE__ | ||
15 | |||
16 | #define gpio_get_value __gpio_get_value | ||
17 | #define gpio_set_value __gpio_set_value | ||
18 | #define gpio_cansleep __gpio_cansleep | ||
19 | #define gpio_to_irq __gpio_to_irq | ||
20 | |||
21 | /* GPIO bank sizes */ | ||
22 | #define S5P6440_GPIO_A_NR (6) | ||
23 | #define S5P6440_GPIO_B_NR (7) | ||
24 | #define S5P6440_GPIO_C_NR (8) | ||
25 | #define S5P6440_GPIO_F_NR (2) | ||
26 | #define S5P6440_GPIO_G_NR (7) | ||
27 | #define S5P6440_GPIO_H_NR (10) | ||
28 | #define S5P6440_GPIO_I_NR (16) | ||
29 | #define S5P6440_GPIO_J_NR (12) | ||
30 | #define S5P6440_GPIO_N_NR (16) | ||
31 | #define S5P6440_GPIO_P_NR (8) | ||
32 | #define S5P6440_GPIO_R_NR (15) | ||
33 | |||
34 | /* GPIO bank numbers */ | ||
35 | |||
36 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
37 | * space for debugging purposes so that any accidental | ||
38 | * change from one gpio bank to another can be caught. | ||
39 | */ | ||
40 | #define S5P6440_GPIO_NEXT(__gpio) \ | ||
41 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
42 | |||
43 | enum s5p_gpio_number { | ||
44 | S5P6440_GPIO_A_START = 0, | ||
45 | S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A), | ||
46 | S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B), | ||
47 | S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C), | ||
48 | S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F), | ||
49 | S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G), | ||
50 | S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H), | ||
51 | S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I), | ||
52 | S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J), | ||
53 | S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N), | ||
54 | S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P), | ||
55 | }; | ||
56 | |||
57 | /* S5P6440 GPIO number definitions. */ | ||
58 | #define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr)) | ||
59 | #define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr)) | ||
60 | #define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr)) | ||
61 | #define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr)) | ||
62 | #define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr)) | ||
63 | #define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr)) | ||
64 | #define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr)) | ||
65 | #define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr)) | ||
66 | #define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr)) | ||
67 | #define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr)) | ||
68 | #define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr)) | ||
69 | |||
70 | /* the end of the S5P6440 specific gpios */ | ||
71 | #define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1) | ||
72 | #define S3C_GPIO_END S5P6440_GPIO_END | ||
73 | |||
74 | /* define the number of gpios we need to the one after the GPR() range */ | ||
75 | #define ARCH_NR_GPIOS (S5P6440_GPR(S5P6440_GPIO_R_NR) + \ | ||
76 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | ||
77 | |||
78 | #include <asm-generic/gpio.h> | ||
79 | |||
80 | #endif /* __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h deleted file mode 100644 index fa2d69cb1ad7..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/io.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6440/include/mach/io.h | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben-linux@fluff.org> | ||
5 | * | ||
6 | * Default IO routines for S3C64XX based | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARM_ARCH_IO_H | ||
10 | #define __ASM_ARM_ARCH_IO_H | ||
11 | |||
12 | /* No current ISA/PCI bus support. */ | ||
13 | #define __io(a) __typesafe_io(a) | ||
14 | #define __mem_pci(a) (a) | ||
15 | |||
16 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h deleted file mode 100644 index 6cc5cbc88ffb..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/map.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/map.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - Memory map definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MAP_H | ||
14 | #define __ASM_ARCH_MAP_H __FILE__ | ||
15 | |||
16 | #include <plat/map-base.h> | ||
17 | #include <plat/map-s5p.h> | ||
18 | |||
19 | #define S5P6440_PA_CHIPID (0xE0000000) | ||
20 | #define S5P_PA_CHIPID S5P6440_PA_CHIPID | ||
21 | |||
22 | #define S5P6440_PA_SYSCON (0xE0100000) | ||
23 | #define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) | ||
24 | #define S5P_PA_SYSCON S5P6440_PA_SYSCON | ||
25 | |||
26 | #define S5P6440_PA_GPIO (0xE0308000) | ||
27 | #define S5P_PA_GPIO S5P6440_PA_GPIO | ||
28 | |||
29 | #define S5P6440_PA_VIC0 (0xE4000000) | ||
30 | #define S5P_PA_VIC0 S5P6440_PA_VIC0 | ||
31 | |||
32 | #define S5P6440_PA_PDMA 0xE9000000 | ||
33 | |||
34 | #define S5P6440_PA_VIC1 (0xE4100000) | ||
35 | #define S5P_PA_VIC1 S5P6440_PA_VIC1 | ||
36 | |||
37 | #define S5P6440_PA_TIMER (0xEA000000) | ||
38 | #define S5P_PA_TIMER S5P6440_PA_TIMER | ||
39 | |||
40 | #define S5P6440_PA_RTC (0xEA100000) | ||
41 | |||
42 | #define S5P6440_PA_WDT (0xEA200000) | ||
43 | #define S5P_PA_WDT S5P6440_PA_WDT | ||
44 | |||
45 | #define S5P6440_PA_UART (0xEC000000) | ||
46 | |||
47 | #define S5P_PA_UART0 (S5P6440_PA_UART + 0x0) | ||
48 | #define S5P_PA_UART1 (S5P6440_PA_UART + 0x400) | ||
49 | #define S5P_PA_UART2 (S5P6440_PA_UART + 0x800) | ||
50 | #define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00) | ||
51 | |||
52 | #define S5P_SZ_UART SZ_256 | ||
53 | |||
54 | #define S5P6440_PA_IIC0 (0xEC104000) | ||
55 | #define S5P6440_PA_IIC1 (0xEC20F000) | ||
56 | |||
57 | #define S5P6440_PA_SPI0 0xEC400000 | ||
58 | #define S5P6440_PA_SPI1 0xEC500000 | ||
59 | |||
60 | #define S5P6440_PA_HSOTG (0xED100000) | ||
61 | |||
62 | #define S5P6440_PA_HSMMC0 (0xED800000) | ||
63 | #define S5P6440_PA_HSMMC1 (0xED900000) | ||
64 | #define S5P6440_PA_HSMMC2 (0xEDA00000) | ||
65 | |||
66 | #define S5P6440_PA_SDRAM (0x20000000) | ||
67 | #define S5P_PA_SDRAM S5P6440_PA_SDRAM | ||
68 | |||
69 | /* I2S */ | ||
70 | #define S5P6440_PA_I2S 0xF2000000 | ||
71 | |||
72 | /* PCM */ | ||
73 | #define S5P6440_PA_PCM 0xF2100000 | ||
74 | |||
75 | #define S5P6440_PA_ADC (0xF3000000) | ||
76 | |||
77 | /* compatibiltiy defines. */ | ||
78 | #define S3C_PA_UART S5P6440_PA_UART | ||
79 | #define S3C_PA_IIC S5P6440_PA_IIC0 | ||
80 | #define S3C_PA_RTC S5P6440_PA_RTC | ||
81 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | ||
82 | #define S3C_PA_WDT S5P6440_PA_WDT | ||
83 | |||
84 | #define SAMSUNG_PA_ADC S5P6440_PA_ADC | ||
85 | |||
86 | #endif /* __ASM_ARCH_MAP_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h deleted file mode 100644 index c783ecc9f193..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h +++ /dev/null | |||
@@ -1,130 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - Clock register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | ||
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | ||
19 | |||
20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | ||
21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) | ||
22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) | ||
23 | #define S5P_APLL_CON S5P_CLKREG(0x0C) | ||
24 | #define S5P_MPLL_CON S5P_CLKREG(0x10) | ||
25 | #define S5P_EPLL_CON S5P_CLKREG(0x14) | ||
26 | #define S5P_EPLL_CON_K S5P_CLKREG(0x18) | ||
27 | #define S5P_CLK_SRC0 S5P_CLKREG(0x1C) | ||
28 | #define S5P_CLK_DIV0 S5P_CLKREG(0x20) | ||
29 | #define S5P_CLK_DIV1 S5P_CLKREG(0x24) | ||
30 | #define S5P_CLK_DIV2 S5P_CLKREG(0x28) | ||
31 | #define S5P_CLK_OUT S5P_CLKREG(0x2C) | ||
32 | #define S5P_CLK_GATE_HCLK0 S5P_CLKREG(0x30) | ||
33 | #define S5P_CLK_GATE_PCLK S5P_CLKREG(0x34) | ||
34 | #define S5P_CLK_GATE_SCLK0 S5P_CLKREG(0x38) | ||
35 | #define S5P_CLK_GATE_MEM0 S5P_CLKREG(0x3C) | ||
36 | #define S5P_CLK_DIV3 S5P_CLKREG(0x40) | ||
37 | #define S5P_CLK_GATE_HCLK1 S5P_CLKREG(0x44) | ||
38 | #define S5P_CLK_GATE_SCLK1 S5P_CLKREG(0x48) | ||
39 | #define S5P_AHB_CON0 S5P_CLKREG(0x100) | ||
40 | #define S5P_CLK_SRC1 S5P_CLKREG(0x10C) | ||
41 | #define S5P_SWRESET S5P_CLKREG(0x114) | ||
42 | #define S5P_SYS_ID S5P_CLKREG(0x118) | ||
43 | #define S5P_SYS_OTHERS S5P_CLKREG(0x11C) | ||
44 | #define S5P_MEM_CFG_STAT S5P_CLKREG(0x12C) | ||
45 | #define S5P_PWR_CFG S5P_CLKREG(0x804) | ||
46 | #define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0x808) | ||
47 | #define S5P_NORMAL_CFG S5P_CLKREG(0x810) | ||
48 | #define S5P_STOP_CFG S5P_CLKREG(0x814) | ||
49 | #define S5P_SLEEP_CFG S5P_CLKREG(0x818) | ||
50 | #define S5P_OSC_FREQ S5P_CLKREG(0x820) | ||
51 | #define S5P_OSC_STABLE S5P_CLKREG(0x824) | ||
52 | #define S5P_PWR_STABLE S5P_CLKREG(0x828) | ||
53 | #define S5P_MTC_STABLE S5P_CLKREG(0x830) | ||
54 | #define S5P_OTHERS S5P_CLKREG(0x900) | ||
55 | #define S5P_RST_STAT S5P_CLKREG(0x904) | ||
56 | #define S5P_WAKEUP_STAT S5P_CLKREG(0x908) | ||
57 | #define S5P_SLPEN S5P_CLKREG(0x930) | ||
58 | #define S5P_INFORM0 S5P_CLKREG(0xA00) | ||
59 | #define S5P_INFORM1 S5P_CLKREG(0xA04) | ||
60 | #define S5P_INFORM2 S5P_CLKREG(0xA08) | ||
61 | #define S5P_INFORM3 S5P_CLKREG(0xA0C) | ||
62 | |||
63 | /* CLKDIV0 */ | ||
64 | #define S5P_CLKDIV0_PCLK_MASK (0xf << 12) | ||
65 | #define S5P_CLKDIV0_PCLK_SHIFT (12) | ||
66 | #define S5P_CLKDIV0_HCLK_MASK (0xf << 8) | ||
67 | #define S5P_CLKDIV0_HCLK_SHIFT (8) | ||
68 | #define S5P_CLKDIV0_MPLL_MASK (0x1 << 4) | ||
69 | #define S5P_CLKDIV0_ARM_MASK (0xf << 0) | ||
70 | #define S5P_CLKDIV0_ARM_SHIFT (0) | ||
71 | |||
72 | /* CLKDIV3 */ | ||
73 | #define S5P_CLKDIV3_PCLK_LOW_MASK (0xf << 12) | ||
74 | #define S5P_CLKDIV3_PCLK_LOW_SHIFT (12) | ||
75 | #define S5P_CLKDIV3_HCLK_LOW_MASK (0xf << 8) | ||
76 | #define S5P_CLKDIV3_HCLK_LOW_SHIFT (8) | ||
77 | |||
78 | /* HCLK0 GATE Registers */ | ||
79 | #define S5P_CLKCON_HCLK0_USB (1<<20) | ||
80 | #define S5P_CLKCON_HCLK0_HSMMC2 (1<<19) | ||
81 | #define S5P_CLKCON_HCLK0_HSMMC1 (1<<18) | ||
82 | #define S5P_CLKCON_HCLK0_HSMMC0 (1<<17) | ||
83 | #define S5P_CLKCON_HCLK0_POST0 (1<<5) | ||
84 | |||
85 | /* HCLK1 GATE Registers */ | ||
86 | #define S5P_CLKCON_HCLK1_DISPCON (1<<1) | ||
87 | |||
88 | /* PCLK GATE Registers */ | ||
89 | #define S5P_CLKCON_PCLK_IIS2 (1<<26) | ||
90 | #define S5P_CLKCON_PCLK_SPI1 (1<<22) | ||
91 | #define S5P_CLKCON_PCLK_SPI0 (1<<21) | ||
92 | #define S5P_CLKCON_PCLK_GPIO (1<<18) | ||
93 | #define S5P_CLKCON_PCLK_IIC0 (1<<17) | ||
94 | #define S5P_CLKCON_PCLK_TSADC (1<<12) | ||
95 | #define S5P_CLKCON_PCLK_PWM (1<<7) | ||
96 | #define S5P_CLKCON_PCLK_RTC (1<<6) | ||
97 | #define S5P_CLKCON_PCLK_WDT (1<<5) | ||
98 | #define S5P_CLKCON_PCLK_UART3 (1<<4) | ||
99 | #define S5P_CLKCON_PCLK_UART2 (1<<3) | ||
100 | #define S5P_CLKCON_PCLK_UART1 (1<<2) | ||
101 | #define S5P_CLKCON_PCLK_UART0 (1<<1) | ||
102 | |||
103 | /* SCLK0 GATE Registers */ | ||
104 | #define S5P_CLKCON_SCLK0_MMC2_48 (1<<29) | ||
105 | #define S5P_CLKCON_SCLK0_MMC1_48 (1<<28) | ||
106 | #define S5P_CLKCON_SCLK0_MMC0_48 (1<<27) | ||
107 | #define S5P_CLKCON_SCLK0_MMC2 (1<<26) | ||
108 | #define S5P_CLKCON_SCLK0_MMC1 (1<<25) | ||
109 | #define S5P_CLKCON_SCLK0_MMC0 (1<<24) | ||
110 | #define S5P_CLKCON_SCLK0_SPI1_48 (1<<23) | ||
111 | #define S5P_CLKCON_SCLK0_SPI0_48 (1<<22) | ||
112 | #define S5P_CLKCON_SCLK0_SPI1 (1<<21) | ||
113 | #define S5P_CLKCON_SCLK0_SPI0 (1<<20) | ||
114 | #define S5P_CLKCON_SCLK0_UART (1<<5) | ||
115 | |||
116 | /* SCLK1 GATE Registers */ | ||
117 | |||
118 | /* MEM0 GATE Registers */ | ||
119 | #define S5P_CLKCON_MEM0_HCLK_NFCON (1<<2) | ||
120 | |||
121 | /*OTHERS Resgister */ | ||
122 | #define S5P_OTHERS_USB_SIG_MASK (1<<16) | ||
123 | #define S5P_OTHERS_HCLK_LOW_SEL_MPLL (1<<6) | ||
124 | |||
125 | /* Compatibility defines */ | ||
126 | #define ARM_CLK_DIV S5P_CLK_DIV0 | ||
127 | #define ARM_DIV_RATIO_SHIFT 0 | ||
128 | #define ARM_DIV_MASK (0xf << ARM_DIV_RATIO_SHIFT) | ||
129 | |||
130 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h deleted file mode 100644 index 5fbca50d1cfb..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5P6440_PLAT_SPI_CLKS_H | ||
12 | #define __S5P6440_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5P6440_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5P6440_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5P6440_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h deleted file mode 100644 index 7c1f600d65c0..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
14 | #define __ASM_ARCH_UNCOMPRESS_H | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <plat/uncompress.h> | ||
18 | |||
19 | static void arch_detect_cpu(void) | ||
20 | { | ||
21 | /* we do not need to do any cpu detection here at the moment. */ | ||
22 | } | ||
23 | |||
24 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c deleted file mode 100644 index a1f3727e4021..000000000000 --- a/arch/arm/mach-s5p6440/init.c +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/init.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6440 - Init support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/serial_core.h> | ||
17 | |||
18 | #include <plat/cpu.h> | ||
19 | #include <plat/devs.h> | ||
20 | #include <plat/s5p6440.h> | ||
21 | #include <plat/regs-serial.h> | ||
22 | |||
23 | static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = { | ||
24 | [0] = { | ||
25 | .name = "pclk_low", | ||
26 | .divisor = 1, | ||
27 | .min_baud = 0, | ||
28 | .max_baud = 0, | ||
29 | }, | ||
30 | [1] = { | ||
31 | .name = "uclk1", | ||
32 | .divisor = 1, | ||
33 | .min_baud = 0, | ||
34 | .max_baud = 0, | ||
35 | }, | ||
36 | }; | ||
37 | |||
38 | /* uart registration process */ | ||
39 | void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
40 | { | ||
41 | struct s3c2410_uartcfg *tcfg = cfg; | ||
42 | u32 ucnt; | ||
43 | |||
44 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
45 | if (!tcfg->clocks) { | ||
46 | tcfg->clocks = s5p6440_serial_clocks; | ||
47 | tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks); | ||
48 | } | ||
49 | } | ||
50 | |||
51 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
52 | } | ||
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c index a48fb553fd01..842af86bda6d 100644 --- a/arch/arm/mach-s5p6442/cpu.c +++ b/arch/arm/mach-s5p6442/cpu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/cpu.c | 1 | /* linux/arch/arm/mach-s5p6442/cpu.c |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/sysdev.h> | 19 | #include <linux/sysdev.h> |
20 | #include <linux/serial_core.h> | 20 | #include <linux/serial_core.h> |
21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
22 | #include <linux/sched.h> | ||
22 | 23 | ||
23 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
@@ -47,10 +48,30 @@ static struct map_desc s5p6442_iodesc[] __initdata = { | |||
47 | .length = SZ_16K, | 48 | .length = SZ_16K, |
48 | .type = MT_DEVICE, | 49 | .type = MT_DEVICE, |
49 | }, { | 50 | }, { |
51 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
52 | .pfn = __phys_to_pfn(S5P6442_PA_GPIO), | ||
53 | .length = SZ_4K, | ||
54 | .type = MT_DEVICE, | ||
55 | }, { | ||
56 | .virtual = (unsigned long)VA_VIC0, | ||
57 | .pfn = __phys_to_pfn(S5P6442_PA_VIC0), | ||
58 | .length = SZ_16K, | ||
59 | .type = MT_DEVICE, | ||
60 | }, { | ||
61 | .virtual = (unsigned long)VA_VIC1, | ||
62 | .pfn = __phys_to_pfn(S5P6442_PA_VIC1), | ||
63 | .length = SZ_16K, | ||
64 | .type = MT_DEVICE, | ||
65 | }, { | ||
50 | .virtual = (unsigned long)VA_VIC2, | 66 | .virtual = (unsigned long)VA_VIC2, |
51 | .pfn = __phys_to_pfn(S5P6442_PA_VIC2), | 67 | .pfn = __phys_to_pfn(S5P6442_PA_VIC2), |
52 | .length = SZ_16K, | 68 | .length = SZ_16K, |
53 | .type = MT_DEVICE, | 69 | .type = MT_DEVICE, |
70 | }, { | ||
71 | .virtual = (unsigned long)S3C_VA_UART, | ||
72 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
73 | .length = SZ_512K, | ||
74 | .type = MT_DEVICE, | ||
54 | } | 75 | } |
55 | }; | 76 | }; |
56 | 77 | ||
@@ -62,10 +83,11 @@ static void s5p6442_idle(void) | |||
62 | local_irq_enable(); | 83 | local_irq_enable(); |
63 | } | 84 | } |
64 | 85 | ||
65 | /* s5p6442_map_io | 86 | /* |
87 | * s5p6442_map_io | ||
66 | * | 88 | * |
67 | * register the standard cpu IO areas | 89 | * register the standard cpu IO areas |
68 | */ | 90 | */ |
69 | 91 | ||
70 | void __init s5p6442_map_io(void) | 92 | void __init s5p6442_map_io(void) |
71 | { | 93 | { |
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 281d256faafb..31fb2e68d527 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
@@ -23,16 +23,10 @@ | |||
23 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | 23 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON |
24 | 24 | ||
25 | #define S5P6442_PA_GPIO (0xE0200000) | 25 | #define S5P6442_PA_GPIO (0xE0200000) |
26 | #define S5P_PA_GPIO S5P6442_PA_GPIO | ||
27 | 26 | ||
28 | #define S5P6442_PA_VIC0 (0xE4000000) | 27 | #define S5P6442_PA_VIC0 (0xE4000000) |
29 | #define S5P_PA_VIC0 S5P6442_PA_VIC0 | ||
30 | |||
31 | #define S5P6442_PA_VIC1 (0xE4100000) | 28 | #define S5P6442_PA_VIC1 (0xE4100000) |
32 | #define S5P_PA_VIC1 S5P6442_PA_VIC1 | ||
33 | |||
34 | #define S5P6442_PA_VIC2 (0xE4200000) | 29 | #define S5P6442_PA_VIC2 (0xE4200000) |
35 | #define S5P_PA_VIC2 S5P6442_PA_VIC2 | ||
36 | 30 | ||
37 | #define S5P6442_PA_MDMA 0xE8000000 | 31 | #define S5P6442_PA_MDMA 0xE8000000 |
38 | #define S5P6442_PA_PDMA 0xE9000000 | 32 | #define S5P6442_PA_PDMA 0xE9000000 |
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig new file mode 100644 index 000000000000..fbcae9352022 --- /dev/null +++ b/arch/arm/mach-s5p64x0/Kconfig | |||
@@ -0,0 +1,57 @@ | |||
1 | # arch/arm/mach-s5p64x0/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | if ARCH_S5P64X0 | ||
9 | |||
10 | config CPU_S5P6440 | ||
11 | bool | ||
12 | select PLAT_S5P | ||
13 | select S3C_PL330_DMA | ||
14 | help | ||
15 | Enable S5P6440 CPU support | ||
16 | |||
17 | config CPU_S5P6450 | ||
18 | bool | ||
19 | select PLAT_S5P | ||
20 | select S3C_PL330_DMA | ||
21 | help | ||
22 | Enable S5P6450 CPU support | ||
23 | |||
24 | config S5P64X0_SETUP_I2C1 | ||
25 | bool | ||
26 | help | ||
27 | Common setup code for i2c bus 1. | ||
28 | |||
29 | # machine support | ||
30 | |||
31 | config MACH_SMDK6440 | ||
32 | bool "SMDK6440" | ||
33 | select CPU_S5P6440 | ||
34 | select S3C_DEV_I2C1 | ||
35 | select S3C_DEV_RTC | ||
36 | select S3C_DEV_WDT | ||
37 | select S3C64XX_DEV_SPI | ||
38 | select SAMSUNG_DEV_ADC | ||
39 | select SAMSUNG_DEV_TS | ||
40 | select S5P64X0_SETUP_I2C1 | ||
41 | help | ||
42 | Machine support for the Samsung SMDK6440 | ||
43 | |||
44 | config MACH_SMDK6450 | ||
45 | bool "SMDK6450" | ||
46 | select CPU_S5P6450 | ||
47 | select S3C_DEV_I2C1 | ||
48 | select S3C_DEV_RTC | ||
49 | select S3C_DEV_WDT | ||
50 | select S3C64XX_DEV_SPI | ||
51 | select SAMSUNG_DEV_ADC | ||
52 | select SAMSUNG_DEV_TS | ||
53 | select S5P64X0_SETUP_I2C1 | ||
54 | help | ||
55 | Machine support for the Samsung SMDK6450 | ||
56 | |||
57 | endif | ||
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile new file mode 100644 index 000000000000..2655829e6bf8 --- /dev/null +++ b/arch/arm/mach-s5p64x0/Makefile | |||
@@ -0,0 +1,30 @@ | |||
1 | # arch/arm/mach-s5p64x0/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S5P64X0 system | ||
14 | |||
15 | obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o | ||
16 | obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o | ||
17 | obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o gpio.o | ||
18 | obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o | ||
19 | |||
20 | # machine support | ||
21 | |||
22 | obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | ||
23 | obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o | ||
24 | |||
25 | # device support | ||
26 | |||
27 | obj-y += dev-audio.o | ||
28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
29 | |||
30 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o | ||
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot index ff90aa13bd67..ff90aa13bd67 100644 --- a/arch/arm/mach-s5p6440/Makefile.boot +++ b/arch/arm/mach-s5p64x0/Makefile.boot | |||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c new file mode 100644 index 000000000000..f93dcd8b4d6a --- /dev/null +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -0,0 +1,626 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/clock-s5p6440.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P6440 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/sysdev.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/map.h> | ||
25 | #include <mach/regs-clock.h> | ||
26 | #include <mach/s5p64x0-clock.h> | ||
27 | |||
28 | #include <plat/cpu-freq.h> | ||
29 | #include <plat/clock.h> | ||
30 | #include <plat/cpu.h> | ||
31 | #include <plat/pll.h> | ||
32 | #include <plat/s5p-clock.h> | ||
33 | #include <plat/clock-clksrc.h> | ||
34 | #include <plat/s5p6440.h> | ||
35 | |||
36 | static u32 epll_div[][5] = { | ||
37 | { 36000000, 0, 48, 1, 4 }, | ||
38 | { 48000000, 0, 32, 1, 3 }, | ||
39 | { 60000000, 0, 40, 1, 3 }, | ||
40 | { 72000000, 0, 48, 1, 3 }, | ||
41 | { 84000000, 0, 28, 1, 2 }, | ||
42 | { 96000000, 0, 32, 1, 2 }, | ||
43 | { 32768000, 45264, 43, 1, 4 }, | ||
44 | { 45158000, 6903, 30, 1, 3 }, | ||
45 | { 49152000, 50332, 32, 1, 3 }, | ||
46 | { 67738000, 10398, 45, 1, 3 }, | ||
47 | { 73728000, 9961, 49, 1, 3 } | ||
48 | }; | ||
49 | |||
50 | static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate) | ||
51 | { | ||
52 | unsigned int epll_con, epll_con_k; | ||
53 | unsigned int i; | ||
54 | |||
55 | if (clk->rate == rate) /* Return if nothing changed */ | ||
56 | return 0; | ||
57 | |||
58 | epll_con = __raw_readl(S5P64X0_EPLL_CON); | ||
59 | epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K); | ||
60 | |||
61 | epll_con_k &= ~(PLL90XX_KDIV_MASK); | ||
62 | epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); | ||
63 | |||
64 | for (i = 0; i < ARRAY_SIZE(epll_div); i++) { | ||
65 | if (epll_div[i][0] == rate) { | ||
66 | epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT); | ||
67 | epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | | ||
68 | (epll_div[i][3] << PLL90XX_PDIV_SHIFT) | | ||
69 | (epll_div[i][4] << PLL90XX_SDIV_SHIFT); | ||
70 | break; | ||
71 | } | ||
72 | } | ||
73 | |||
74 | if (i == ARRAY_SIZE(epll_div)) { | ||
75 | printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); | ||
76 | return -EINVAL; | ||
77 | } | ||
78 | |||
79 | __raw_writel(epll_con, S5P64X0_EPLL_CON); | ||
80 | __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); | ||
81 | |||
82 | clk->rate = rate; | ||
83 | |||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | static struct clk_ops s5p6440_epll_ops = { | ||
88 | .get_rate = s5p64x0_epll_get_rate, | ||
89 | .set_rate = s5p6440_epll_set_rate, | ||
90 | }; | ||
91 | |||
92 | static struct clksrc_clk clk_hclk = { | ||
93 | .clk = { | ||
94 | .name = "clk_hclk", | ||
95 | .id = -1, | ||
96 | .parent = &clk_armclk.clk, | ||
97 | }, | ||
98 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 }, | ||
99 | }; | ||
100 | |||
101 | static struct clksrc_clk clk_pclk = { | ||
102 | .clk = { | ||
103 | .name = "clk_pclk", | ||
104 | .id = -1, | ||
105 | .parent = &clk_hclk.clk, | ||
106 | }, | ||
107 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 }, | ||
108 | }; | ||
109 | static struct clksrc_clk clk_hclk_low = { | ||
110 | .clk = { | ||
111 | .name = "clk_hclk_low", | ||
112 | .id = -1, | ||
113 | }, | ||
114 | .sources = &clkset_hclk_low, | ||
115 | .reg_src = { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 }, | ||
116 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 }, | ||
117 | }; | ||
118 | |||
119 | static struct clksrc_clk clk_pclk_low = { | ||
120 | .clk = { | ||
121 | .name = "clk_pclk_low", | ||
122 | .id = -1, | ||
123 | .parent = &clk_hclk_low.clk, | ||
124 | }, | ||
125 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 }, | ||
126 | }; | ||
127 | |||
128 | /* | ||
129 | * The following clocks will be disabled during clock initialization. It is | ||
130 | * recommended to keep the following clocks disabled until the driver requests | ||
131 | * for enabling the clock. | ||
132 | */ | ||
133 | static struct clk init_clocks_disable[] = { | ||
134 | { | ||
135 | .name = "nand", | ||
136 | .id = -1, | ||
137 | .parent = &clk_hclk.clk, | ||
138 | .enable = s5p64x0_mem_ctrl, | ||
139 | .ctrlbit = (1 << 2), | ||
140 | }, { | ||
141 | .name = "post", | ||
142 | .id = -1, | ||
143 | .parent = &clk_hclk_low.clk, | ||
144 | .enable = s5p64x0_hclk0_ctrl, | ||
145 | .ctrlbit = (1 << 5) | ||
146 | }, { | ||
147 | .name = "2d", | ||
148 | .id = -1, | ||
149 | .parent = &clk_hclk.clk, | ||
150 | .enable = s5p64x0_hclk0_ctrl, | ||
151 | .ctrlbit = (1 << 8), | ||
152 | }, { | ||
153 | .name = "hsmmc", | ||
154 | .id = 0, | ||
155 | .parent = &clk_hclk_low.clk, | ||
156 | .enable = s5p64x0_hclk0_ctrl, | ||
157 | .ctrlbit = (1 << 17), | ||
158 | }, { | ||
159 | .name = "hsmmc", | ||
160 | .id = 1, | ||
161 | .parent = &clk_hclk_low.clk, | ||
162 | .enable = s5p64x0_hclk0_ctrl, | ||
163 | .ctrlbit = (1 << 18), | ||
164 | }, { | ||
165 | .name = "hsmmc", | ||
166 | .id = 2, | ||
167 | .parent = &clk_hclk_low.clk, | ||
168 | .enable = s5p64x0_hclk0_ctrl, | ||
169 | .ctrlbit = (1 << 19), | ||
170 | }, { | ||
171 | .name = "otg", | ||
172 | .id = -1, | ||
173 | .parent = &clk_hclk_low.clk, | ||
174 | .enable = s5p64x0_hclk0_ctrl, | ||
175 | .ctrlbit = (1 << 20) | ||
176 | }, { | ||
177 | .name = "irom", | ||
178 | .id = -1, | ||
179 | .parent = &clk_hclk.clk, | ||
180 | .enable = s5p64x0_hclk0_ctrl, | ||
181 | .ctrlbit = (1 << 25), | ||
182 | }, { | ||
183 | .name = "lcd", | ||
184 | .id = -1, | ||
185 | .parent = &clk_hclk_low.clk, | ||
186 | .enable = s5p64x0_hclk1_ctrl, | ||
187 | .ctrlbit = (1 << 1), | ||
188 | }, { | ||
189 | .name = "hclk_fimgvg", | ||
190 | .id = -1, | ||
191 | .parent = &clk_hclk.clk, | ||
192 | .enable = s5p64x0_hclk1_ctrl, | ||
193 | .ctrlbit = (1 << 2), | ||
194 | }, { | ||
195 | .name = "tsi", | ||
196 | .id = -1, | ||
197 | .parent = &clk_hclk_low.clk, | ||
198 | .enable = s5p64x0_hclk1_ctrl, | ||
199 | .ctrlbit = (1 << 0), | ||
200 | }, { | ||
201 | .name = "watchdog", | ||
202 | .id = -1, | ||
203 | .parent = &clk_pclk_low.clk, | ||
204 | .enable = s5p64x0_pclk_ctrl, | ||
205 | .ctrlbit = (1 << 5), | ||
206 | }, { | ||
207 | .name = "rtc", | ||
208 | .id = -1, | ||
209 | .parent = &clk_pclk_low.clk, | ||
210 | .enable = s5p64x0_pclk_ctrl, | ||
211 | .ctrlbit = (1 << 6), | ||
212 | }, { | ||
213 | .name = "timers", | ||
214 | .id = -1, | ||
215 | .parent = &clk_pclk_low.clk, | ||
216 | .enable = s5p64x0_pclk_ctrl, | ||
217 | .ctrlbit = (1 << 7), | ||
218 | }, { | ||
219 | .name = "pcm", | ||
220 | .id = -1, | ||
221 | .parent = &clk_pclk_low.clk, | ||
222 | .enable = s5p64x0_pclk_ctrl, | ||
223 | .ctrlbit = (1 << 8), | ||
224 | }, { | ||
225 | .name = "adc", | ||
226 | .id = -1, | ||
227 | .parent = &clk_pclk_low.clk, | ||
228 | .enable = s5p64x0_pclk_ctrl, | ||
229 | .ctrlbit = (1 << 12), | ||
230 | }, { | ||
231 | .name = "i2c", | ||
232 | .id = -1, | ||
233 | .parent = &clk_pclk_low.clk, | ||
234 | .enable = s5p64x0_pclk_ctrl, | ||
235 | .ctrlbit = (1 << 17), | ||
236 | }, { | ||
237 | .name = "spi", | ||
238 | .id = 0, | ||
239 | .parent = &clk_pclk_low.clk, | ||
240 | .enable = s5p64x0_pclk_ctrl, | ||
241 | .ctrlbit = (1 << 21), | ||
242 | }, { | ||
243 | .name = "spi", | ||
244 | .id = 1, | ||
245 | .parent = &clk_pclk_low.clk, | ||
246 | .enable = s5p64x0_pclk_ctrl, | ||
247 | .ctrlbit = (1 << 22), | ||
248 | }, { | ||
249 | .name = "gps", | ||
250 | .id = -1, | ||
251 | .parent = &clk_pclk_low.clk, | ||
252 | .enable = s5p64x0_pclk_ctrl, | ||
253 | .ctrlbit = (1 << 25), | ||
254 | }, { | ||
255 | .name = "i2s_v40", | ||
256 | .id = 0, | ||
257 | .parent = &clk_pclk_low.clk, | ||
258 | .enable = s5p64x0_pclk_ctrl, | ||
259 | .ctrlbit = (1 << 26), | ||
260 | }, { | ||
261 | .name = "dsim", | ||
262 | .id = -1, | ||
263 | .parent = &clk_pclk_low.clk, | ||
264 | .enable = s5p64x0_pclk_ctrl, | ||
265 | .ctrlbit = (1 << 28), | ||
266 | }, { | ||
267 | .name = "etm", | ||
268 | .id = -1, | ||
269 | .parent = &clk_pclk.clk, | ||
270 | .enable = s5p64x0_pclk_ctrl, | ||
271 | .ctrlbit = (1 << 29), | ||
272 | }, { | ||
273 | .name = "dmc0", | ||
274 | .id = -1, | ||
275 | .parent = &clk_pclk.clk, | ||
276 | .enable = s5p64x0_pclk_ctrl, | ||
277 | .ctrlbit = (1 << 30), | ||
278 | }, { | ||
279 | .name = "pclk_fimgvg", | ||
280 | .id = -1, | ||
281 | .parent = &clk_pclk.clk, | ||
282 | .enable = s5p64x0_pclk_ctrl, | ||
283 | .ctrlbit = (1 << 31), | ||
284 | }, { | ||
285 | .name = "sclk_spi_48", | ||
286 | .id = 0, | ||
287 | .parent = &clk_48m, | ||
288 | .enable = s5p64x0_sclk_ctrl, | ||
289 | .ctrlbit = (1 << 22), | ||
290 | }, { | ||
291 | .name = "sclk_spi_48", | ||
292 | .id = 1, | ||
293 | .parent = &clk_48m, | ||
294 | .enable = s5p64x0_sclk_ctrl, | ||
295 | .ctrlbit = (1 << 23), | ||
296 | }, { | ||
297 | .name = "mmc_48m", | ||
298 | .id = 0, | ||
299 | .parent = &clk_48m, | ||
300 | .enable = s5p64x0_sclk_ctrl, | ||
301 | .ctrlbit = (1 << 27), | ||
302 | }, { | ||
303 | .name = "mmc_48m", | ||
304 | .id = 1, | ||
305 | .parent = &clk_48m, | ||
306 | .enable = s5p64x0_sclk_ctrl, | ||
307 | .ctrlbit = (1 << 28), | ||
308 | }, { | ||
309 | .name = "mmc_48m", | ||
310 | .id = 2, | ||
311 | .parent = &clk_48m, | ||
312 | .enable = s5p64x0_sclk_ctrl, | ||
313 | .ctrlbit = (1 << 29), | ||
314 | }, | ||
315 | }; | ||
316 | |||
317 | /* | ||
318 | * The following clocks will be enabled during clock initialization. | ||
319 | */ | ||
320 | static struct clk init_clocks[] = { | ||
321 | { | ||
322 | .name = "intc", | ||
323 | .id = -1, | ||
324 | .parent = &clk_hclk.clk, | ||
325 | .enable = s5p64x0_hclk0_ctrl, | ||
326 | .ctrlbit = (1 << 1), | ||
327 | }, { | ||
328 | .name = "mem", | ||
329 | .id = -1, | ||
330 | .parent = &clk_hclk.clk, | ||
331 | .enable = s5p64x0_hclk0_ctrl, | ||
332 | .ctrlbit = (1 << 21), | ||
333 | }, { | ||
334 | .name = "dma", | ||
335 | .id = -1, | ||
336 | .parent = &clk_hclk_low.clk, | ||
337 | .enable = s5p64x0_hclk0_ctrl, | ||
338 | .ctrlbit = (1 << 12), | ||
339 | }, { | ||
340 | .name = "uart", | ||
341 | .id = 0, | ||
342 | .parent = &clk_pclk_low.clk, | ||
343 | .enable = s5p64x0_pclk_ctrl, | ||
344 | .ctrlbit = (1 << 1), | ||
345 | }, { | ||
346 | .name = "uart", | ||
347 | .id = 1, | ||
348 | .parent = &clk_pclk_low.clk, | ||
349 | .enable = s5p64x0_pclk_ctrl, | ||
350 | .ctrlbit = (1 << 2), | ||
351 | }, { | ||
352 | .name = "uart", | ||
353 | .id = 2, | ||
354 | .parent = &clk_pclk_low.clk, | ||
355 | .enable = s5p64x0_pclk_ctrl, | ||
356 | .ctrlbit = (1 << 3), | ||
357 | }, { | ||
358 | .name = "uart", | ||
359 | .id = 3, | ||
360 | .parent = &clk_pclk_low.clk, | ||
361 | .enable = s5p64x0_pclk_ctrl, | ||
362 | .ctrlbit = (1 << 4), | ||
363 | }, { | ||
364 | .name = "gpio", | ||
365 | .id = -1, | ||
366 | .parent = &clk_pclk_low.clk, | ||
367 | .enable = s5p64x0_pclk_ctrl, | ||
368 | .ctrlbit = (1 << 18), | ||
369 | }, | ||
370 | }; | ||
371 | |||
372 | static struct clk clk_iis_cd_v40 = { | ||
373 | .name = "iis_cdclk_v40", | ||
374 | .id = -1, | ||
375 | }; | ||
376 | |||
377 | static struct clk clk_pcm_cd = { | ||
378 | .name = "pcm_cdclk", | ||
379 | .id = -1, | ||
380 | }; | ||
381 | |||
382 | static struct clk *clkset_group1_list[] = { | ||
383 | &clk_mout_epll.clk, | ||
384 | &clk_dout_mpll.clk, | ||
385 | &clk_fin_epll, | ||
386 | }; | ||
387 | |||
388 | static struct clksrc_sources clkset_group1 = { | ||
389 | .sources = clkset_group1_list, | ||
390 | .nr_sources = ARRAY_SIZE(clkset_group1_list), | ||
391 | }; | ||
392 | |||
393 | static struct clk *clkset_uart_list[] = { | ||
394 | &clk_mout_epll.clk, | ||
395 | &clk_dout_mpll.clk, | ||
396 | }; | ||
397 | |||
398 | static struct clksrc_sources clkset_uart = { | ||
399 | .sources = clkset_uart_list, | ||
400 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
401 | }; | ||
402 | |||
403 | static struct clk *clkset_audio_list[] = { | ||
404 | &clk_mout_epll.clk, | ||
405 | &clk_dout_mpll.clk, | ||
406 | &clk_fin_epll, | ||
407 | &clk_iis_cd_v40, | ||
408 | &clk_pcm_cd, | ||
409 | }; | ||
410 | |||
411 | static struct clksrc_sources clkset_audio = { | ||
412 | .sources = clkset_audio_list, | ||
413 | .nr_sources = ARRAY_SIZE(clkset_audio_list), | ||
414 | }; | ||
415 | |||
416 | static struct clksrc_clk clksrcs[] = { | ||
417 | { | ||
418 | .clk = { | ||
419 | .name = "mmc_bus", | ||
420 | .id = 0, | ||
421 | .ctrlbit = (1 << 24), | ||
422 | .enable = s5p64x0_sclk_ctrl, | ||
423 | }, | ||
424 | .sources = &clkset_group1, | ||
425 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
426 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
427 | }, { | ||
428 | .clk = { | ||
429 | .name = "mmc_bus", | ||
430 | .id = 1, | ||
431 | .ctrlbit = (1 << 25), | ||
432 | .enable = s5p64x0_sclk_ctrl, | ||
433 | }, | ||
434 | .sources = &clkset_group1, | ||
435 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
436 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
437 | }, { | ||
438 | .clk = { | ||
439 | .name = "mmc_bus", | ||
440 | .id = 2, | ||
441 | .ctrlbit = (1 << 26), | ||
442 | .enable = s5p64x0_sclk_ctrl, | ||
443 | }, | ||
444 | .sources = &clkset_group1, | ||
445 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
446 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
447 | }, { | ||
448 | .clk = { | ||
449 | .name = "uclk1", | ||
450 | .id = -1, | ||
451 | .ctrlbit = (1 << 5), | ||
452 | .enable = s5p64x0_sclk_ctrl, | ||
453 | }, | ||
454 | .sources = &clkset_uart, | ||
455 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
456 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
457 | }, { | ||
458 | .clk = { | ||
459 | .name = "sclk_spi", | ||
460 | .id = 0, | ||
461 | .ctrlbit = (1 << 20), | ||
462 | .enable = s5p64x0_sclk_ctrl, | ||
463 | }, | ||
464 | .sources = &clkset_group1, | ||
465 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
466 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
467 | }, { | ||
468 | .clk = { | ||
469 | .name = "sclk_spi", | ||
470 | .id = 1, | ||
471 | .ctrlbit = (1 << 21), | ||
472 | .enable = s5p64x0_sclk_ctrl, | ||
473 | }, | ||
474 | .sources = &clkset_group1, | ||
475 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
476 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
477 | }, { | ||
478 | .clk = { | ||
479 | .name = "sclk_post", | ||
480 | .id = -1, | ||
481 | .ctrlbit = (1 << 10), | ||
482 | .enable = s5p64x0_sclk_ctrl, | ||
483 | }, | ||
484 | .sources = &clkset_group1, | ||
485 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 }, | ||
486 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 }, | ||
487 | }, { | ||
488 | .clk = { | ||
489 | .name = "sclk_dispcon", | ||
490 | .id = -1, | ||
491 | .ctrlbit = (1 << 1), | ||
492 | .enable = s5p64x0_sclk1_ctrl, | ||
493 | }, | ||
494 | .sources = &clkset_group1, | ||
495 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 }, | ||
496 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 }, | ||
497 | }, { | ||
498 | .clk = { | ||
499 | .name = "sclk_fimgvg", | ||
500 | .id = -1, | ||
501 | .ctrlbit = (1 << 2), | ||
502 | .enable = s5p64x0_sclk1_ctrl, | ||
503 | }, | ||
504 | .sources = &clkset_group1, | ||
505 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, | ||
506 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, | ||
507 | }, { | ||
508 | .clk = { | ||
509 | .name = "sclk_audio2", | ||
510 | .id = -1, | ||
511 | .ctrlbit = (1 << 11), | ||
512 | .enable = s5p64x0_sclk_ctrl, | ||
513 | }, | ||
514 | .sources = &clkset_audio, | ||
515 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 }, | ||
516 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 }, | ||
517 | }, | ||
518 | }; | ||
519 | |||
520 | /* Clock initialization code */ | ||
521 | static struct clksrc_clk *sysclks[] = { | ||
522 | &clk_mout_apll, | ||
523 | &clk_mout_epll, | ||
524 | &clk_mout_mpll, | ||
525 | &clk_dout_mpll, | ||
526 | &clk_armclk, | ||
527 | &clk_hclk, | ||
528 | &clk_pclk, | ||
529 | &clk_hclk_low, | ||
530 | &clk_pclk_low, | ||
531 | }; | ||
532 | |||
533 | void __init_or_cpufreq s5p6440_setup_clocks(void) | ||
534 | { | ||
535 | struct clk *xtal_clk; | ||
536 | |||
537 | unsigned long xtal; | ||
538 | unsigned long fclk; | ||
539 | unsigned long hclk; | ||
540 | unsigned long hclk_low; | ||
541 | unsigned long pclk; | ||
542 | unsigned long pclk_low; | ||
543 | |||
544 | unsigned long apll; | ||
545 | unsigned long mpll; | ||
546 | unsigned long epll; | ||
547 | unsigned int ptr; | ||
548 | |||
549 | /* Set S5P6440 functions for clk_fout_epll */ | ||
550 | |||
551 | clk_fout_epll.enable = s5p64x0_epll_enable; | ||
552 | clk_fout_epll.ops = &s5p6440_epll_ops; | ||
553 | |||
554 | clk_48m.enable = s5p64x0_clk48m_ctrl; | ||
555 | |||
556 | xtal_clk = clk_get(NULL, "ext_xtal"); | ||
557 | BUG_ON(IS_ERR(xtal_clk)); | ||
558 | |||
559 | xtal = clk_get_rate(xtal_clk); | ||
560 | clk_put(xtal_clk); | ||
561 | |||
562 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502); | ||
563 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); | ||
564 | epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON), | ||
565 | __raw_readl(S5P64X0_EPLL_CON_K)); | ||
566 | |||
567 | clk_fout_apll.rate = apll; | ||
568 | clk_fout_mpll.rate = mpll; | ||
569 | clk_fout_epll.rate = epll; | ||
570 | |||
571 | printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ | ||
572 | " E=%ld.%ldMHz\n", | ||
573 | print_mhz(apll), print_mhz(mpll), print_mhz(epll)); | ||
574 | |||
575 | fclk = clk_get_rate(&clk_armclk.clk); | ||
576 | hclk = clk_get_rate(&clk_hclk.clk); | ||
577 | pclk = clk_get_rate(&clk_pclk.clk); | ||
578 | hclk_low = clk_get_rate(&clk_hclk_low.clk); | ||
579 | pclk_low = clk_get_rate(&clk_pclk_low.clk); | ||
580 | |||
581 | printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ | ||
582 | " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", | ||
583 | print_mhz(hclk), print_mhz(hclk_low), | ||
584 | print_mhz(pclk), print_mhz(pclk_low)); | ||
585 | |||
586 | clk_f.rate = fclk; | ||
587 | clk_h.rate = hclk; | ||
588 | clk_p.rate = pclk; | ||
589 | |||
590 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
591 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
592 | } | ||
593 | |||
594 | static struct clk *clks[] __initdata = { | ||
595 | &clk_ext, | ||
596 | &clk_iis_cd_v40, | ||
597 | &clk_pcm_cd, | ||
598 | }; | ||
599 | |||
600 | void __init s5p6440_register_clocks(void) | ||
601 | { | ||
602 | struct clk *clkp; | ||
603 | int ret; | ||
604 | int ptr; | ||
605 | |||
606 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
607 | |||
608 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
609 | s3c_register_clksrc(sysclks[ptr], 1); | ||
610 | |||
611 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
612 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
613 | |||
614 | clkp = init_clocks_disable; | ||
615 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | ||
616 | |||
617 | ret = s3c24xx_register_clock(clkp); | ||
618 | if (ret < 0) { | ||
619 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
620 | clkp->name, ret); | ||
621 | } | ||
622 | (clkp->enable)(clkp, 0); | ||
623 | } | ||
624 | |||
625 | s3c_pwmclk_init(); | ||
626 | } | ||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c new file mode 100644 index 000000000000..f9afb05b217c --- /dev/null +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -0,0 +1,655 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/clock-s5p6450.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P6450 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/sysdev.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/map.h> | ||
25 | #include <mach/regs-clock.h> | ||
26 | #include <mach/s5p64x0-clock.h> | ||
27 | |||
28 | #include <plat/cpu-freq.h> | ||
29 | #include <plat/clock.h> | ||
30 | #include <plat/cpu.h> | ||
31 | #include <plat/pll.h> | ||
32 | #include <plat/s5p-clock.h> | ||
33 | #include <plat/clock-clksrc.h> | ||
34 | #include <plat/s5p6450.h> | ||
35 | |||
36 | static struct clksrc_clk clk_mout_dpll = { | ||
37 | .clk = { | ||
38 | .name = "mout_dpll", | ||
39 | .id = -1, | ||
40 | }, | ||
41 | .sources = &clk_src_dpll, | ||
42 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 }, | ||
43 | }; | ||
44 | |||
45 | static u32 epll_div[][5] = { | ||
46 | { 133000000, 27307, 55, 2, 2 }, | ||
47 | { 100000000, 43691, 41, 2, 2 }, | ||
48 | { 480000000, 0, 80, 2, 0 }, | ||
49 | }; | ||
50 | |||
51 | static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate) | ||
52 | { | ||
53 | unsigned int epll_con, epll_con_k; | ||
54 | unsigned int i; | ||
55 | |||
56 | if (clk->rate == rate) /* Return if nothing changed */ | ||
57 | return 0; | ||
58 | |||
59 | epll_con = __raw_readl(S5P64X0_EPLL_CON); | ||
60 | epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K); | ||
61 | |||
62 | epll_con_k &= ~(PLL90XX_KDIV_MASK); | ||
63 | epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); | ||
64 | |||
65 | for (i = 0; i < ARRAY_SIZE(epll_div); i++) { | ||
66 | if (epll_div[i][0] == rate) { | ||
67 | epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT); | ||
68 | epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | | ||
69 | (epll_div[i][3] << PLL90XX_PDIV_SHIFT) | | ||
70 | (epll_div[i][4] << PLL90XX_SDIV_SHIFT); | ||
71 | break; | ||
72 | } | ||
73 | } | ||
74 | |||
75 | if (i == ARRAY_SIZE(epll_div)) { | ||
76 | printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); | ||
77 | return -EINVAL; | ||
78 | } | ||
79 | |||
80 | __raw_writel(epll_con, S5P64X0_EPLL_CON); | ||
81 | __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); | ||
82 | |||
83 | clk->rate = rate; | ||
84 | |||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | static struct clk_ops s5p6450_epll_ops = { | ||
89 | .get_rate = s5p64x0_epll_get_rate, | ||
90 | .set_rate = s5p6450_epll_set_rate, | ||
91 | }; | ||
92 | |||
93 | static struct clksrc_clk clk_dout_epll = { | ||
94 | .clk = { | ||
95 | .name = "dout_epll", | ||
96 | .id = -1, | ||
97 | .parent = &clk_mout_epll.clk, | ||
98 | }, | ||
99 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 }, | ||
100 | }; | ||
101 | |||
102 | static struct clksrc_clk clk_mout_hclk_sel = { | ||
103 | .clk = { | ||
104 | .name = "mout_hclk_sel", | ||
105 | .id = -1, | ||
106 | }, | ||
107 | .sources = &clkset_hclk_low, | ||
108 | .reg_src = { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 }, | ||
109 | }; | ||
110 | |||
111 | static struct clk *clkset_hclk_list[] = { | ||
112 | &clk_mout_hclk_sel.clk, | ||
113 | &clk_armclk.clk, | ||
114 | }; | ||
115 | |||
116 | static struct clksrc_sources clkset_hclk = { | ||
117 | .sources = clkset_hclk_list, | ||
118 | .nr_sources = ARRAY_SIZE(clkset_hclk_list), | ||
119 | }; | ||
120 | |||
121 | static struct clksrc_clk clk_hclk = { | ||
122 | .clk = { | ||
123 | .name = "clk_hclk", | ||
124 | .id = -1, | ||
125 | }, | ||
126 | .sources = &clkset_hclk, | ||
127 | .reg_src = { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 }, | ||
128 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 }, | ||
129 | }; | ||
130 | |||
131 | static struct clksrc_clk clk_pclk = { | ||
132 | .clk = { | ||
133 | .name = "clk_pclk", | ||
134 | .id = -1, | ||
135 | .parent = &clk_hclk.clk, | ||
136 | }, | ||
137 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 }, | ||
138 | }; | ||
139 | static struct clksrc_clk clk_dout_pwm_ratio0 = { | ||
140 | .clk = { | ||
141 | .name = "clk_dout_pwm_ratio0", | ||
142 | .id = -1, | ||
143 | .parent = &clk_mout_hclk_sel.clk, | ||
144 | }, | ||
145 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 }, | ||
146 | }; | ||
147 | |||
148 | static struct clksrc_clk clk_pclk_to_wdt_pwm = { | ||
149 | .clk = { | ||
150 | .name = "clk_pclk_to_wdt_pwm", | ||
151 | .id = -1, | ||
152 | .parent = &clk_dout_pwm_ratio0.clk, | ||
153 | }, | ||
154 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 }, | ||
155 | }; | ||
156 | |||
157 | static struct clksrc_clk clk_hclk_low = { | ||
158 | .clk = { | ||
159 | .name = "clk_hclk_low", | ||
160 | .id = -1, | ||
161 | }, | ||
162 | .sources = &clkset_hclk_low, | ||
163 | .reg_src = { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 }, | ||
164 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 }, | ||
165 | }; | ||
166 | |||
167 | static struct clksrc_clk clk_pclk_low = { | ||
168 | .clk = { | ||
169 | .name = "clk_pclk_low", | ||
170 | .id = -1, | ||
171 | .parent = &clk_hclk_low.clk, | ||
172 | }, | ||
173 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 }, | ||
174 | }; | ||
175 | |||
176 | /* | ||
177 | * The following clocks will be disabled during clock initialization. It is | ||
178 | * recommended to keep the following clocks disabled until the driver requests | ||
179 | * for enabling the clock. | ||
180 | */ | ||
181 | static struct clk init_clocks_disable[] = { | ||
182 | { | ||
183 | .name = "usbhost", | ||
184 | .id = -1, | ||
185 | .parent = &clk_hclk_low.clk, | ||
186 | .enable = s5p64x0_hclk0_ctrl, | ||
187 | .ctrlbit = (1 << 3), | ||
188 | }, { | ||
189 | .name = "hsmmc", | ||
190 | .id = 0, | ||
191 | .parent = &clk_hclk_low.clk, | ||
192 | .enable = s5p64x0_hclk0_ctrl, | ||
193 | .ctrlbit = (1 << 17), | ||
194 | }, { | ||
195 | .name = "hsmmc", | ||
196 | .id = 1, | ||
197 | .parent = &clk_hclk_low.clk, | ||
198 | .enable = s5p64x0_hclk0_ctrl, | ||
199 | .ctrlbit = (1 << 18), | ||
200 | }, { | ||
201 | .name = "hsmmc", | ||
202 | .id = 2, | ||
203 | .parent = &clk_hclk_low.clk, | ||
204 | .enable = s5p64x0_hclk0_ctrl, | ||
205 | .ctrlbit = (1 << 19), | ||
206 | }, { | ||
207 | .name = "usbotg", | ||
208 | .id = -1, | ||
209 | .parent = &clk_hclk_low.clk, | ||
210 | .enable = s5p64x0_hclk0_ctrl, | ||
211 | .ctrlbit = (1 << 20), | ||
212 | }, { | ||
213 | .name = "lcd", | ||
214 | .id = -1, | ||
215 | .parent = &clk_h, | ||
216 | .enable = s5p64x0_hclk1_ctrl, | ||
217 | .ctrlbit = (1 << 1), | ||
218 | }, { | ||
219 | .name = "watchdog", | ||
220 | .id = -1, | ||
221 | .parent = &clk_pclk_low.clk, | ||
222 | .enable = s5p64x0_pclk_ctrl, | ||
223 | .ctrlbit = (1 << 5), | ||
224 | }, { | ||
225 | .name = "adc", | ||
226 | .id = -1, | ||
227 | .parent = &clk_pclk_low.clk, | ||
228 | .enable = s5p64x0_pclk_ctrl, | ||
229 | .ctrlbit = (1 << 12), | ||
230 | }, { | ||
231 | .name = "i2c", | ||
232 | .id = 0, | ||
233 | .parent = &clk_pclk_low.clk, | ||
234 | .enable = s5p64x0_pclk_ctrl, | ||
235 | .ctrlbit = (1 << 17), | ||
236 | }, { | ||
237 | .name = "spi", | ||
238 | .id = 0, | ||
239 | .parent = &clk_pclk_low.clk, | ||
240 | .enable = s5p64x0_pclk_ctrl, | ||
241 | .ctrlbit = (1 << 21), | ||
242 | }, { | ||
243 | .name = "spi", | ||
244 | .id = 1, | ||
245 | .parent = &clk_pclk_low.clk, | ||
246 | .enable = s5p64x0_pclk_ctrl, | ||
247 | .ctrlbit = (1 << 22), | ||
248 | }, { | ||
249 | .name = "iis", | ||
250 | .id = -1, | ||
251 | .parent = &clk_pclk_low.clk, | ||
252 | .enable = s5p64x0_pclk_ctrl, | ||
253 | .ctrlbit = (1 << 26), | ||
254 | }, { | ||
255 | .name = "i2c", | ||
256 | .id = 1, | ||
257 | .parent = &clk_pclk_low.clk, | ||
258 | .enable = s5p64x0_pclk_ctrl, | ||
259 | .ctrlbit = (1 << 27), | ||
260 | }, { | ||
261 | .name = "dmc0", | ||
262 | .id = -1, | ||
263 | .parent = &clk_pclk.clk, | ||
264 | .enable = s5p64x0_pclk_ctrl, | ||
265 | .ctrlbit = (1 << 30), | ||
266 | } | ||
267 | }; | ||
268 | |||
269 | /* | ||
270 | * The following clocks will be enabled during clock initialization. | ||
271 | */ | ||
272 | static struct clk init_clocks[] = { | ||
273 | { | ||
274 | .name = "intc", | ||
275 | .id = -1, | ||
276 | .parent = &clk_hclk.clk, | ||
277 | .enable = s5p64x0_hclk0_ctrl, | ||
278 | .ctrlbit = (1 << 1), | ||
279 | }, { | ||
280 | .name = "mem", | ||
281 | .id = -1, | ||
282 | .parent = &clk_hclk.clk, | ||
283 | .enable = s5p64x0_hclk0_ctrl, | ||
284 | .ctrlbit = (1 << 21), | ||
285 | }, { | ||
286 | .name = "dma", | ||
287 | .id = -1, | ||
288 | .parent = &clk_hclk_low.clk, | ||
289 | .enable = s5p64x0_hclk0_ctrl, | ||
290 | .ctrlbit = (1 << 12), | ||
291 | }, { | ||
292 | .name = "uart", | ||
293 | .id = 0, | ||
294 | .parent = &clk_pclk_low.clk, | ||
295 | .enable = s5p64x0_pclk_ctrl, | ||
296 | .ctrlbit = (1 << 1), | ||
297 | }, { | ||
298 | .name = "uart", | ||
299 | .id = 1, | ||
300 | .parent = &clk_pclk_low.clk, | ||
301 | .enable = s5p64x0_pclk_ctrl, | ||
302 | .ctrlbit = (1 << 2), | ||
303 | }, { | ||
304 | .name = "uart", | ||
305 | .id = 2, | ||
306 | .parent = &clk_pclk_low.clk, | ||
307 | .enable = s5p64x0_pclk_ctrl, | ||
308 | .ctrlbit = (1 << 3), | ||
309 | }, { | ||
310 | .name = "uart", | ||
311 | .id = 3, | ||
312 | .parent = &clk_pclk_low.clk, | ||
313 | .enable = s5p64x0_pclk_ctrl, | ||
314 | .ctrlbit = (1 << 4), | ||
315 | }, { | ||
316 | .name = "timers", | ||
317 | .id = -1, | ||
318 | .parent = &clk_pclk_to_wdt_pwm.clk, | ||
319 | .enable = s5p64x0_pclk_ctrl, | ||
320 | .ctrlbit = (1 << 7), | ||
321 | }, { | ||
322 | .name = "gpio", | ||
323 | .id = -1, | ||
324 | .parent = &clk_pclk_low.clk, | ||
325 | .enable = s5p64x0_pclk_ctrl, | ||
326 | .ctrlbit = (1 << 18), | ||
327 | }, | ||
328 | }; | ||
329 | |||
330 | static struct clk *clkset_uart_list[] = { | ||
331 | &clk_dout_epll.clk, | ||
332 | &clk_dout_mpll.clk, | ||
333 | }; | ||
334 | |||
335 | static struct clksrc_sources clkset_uart = { | ||
336 | .sources = clkset_uart_list, | ||
337 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
338 | }; | ||
339 | |||
340 | static struct clk *clkset_mali_list[] = { | ||
341 | &clk_mout_epll.clk, | ||
342 | &clk_mout_apll.clk, | ||
343 | &clk_mout_mpll.clk, | ||
344 | }; | ||
345 | |||
346 | static struct clksrc_sources clkset_mali = { | ||
347 | .sources = clkset_mali_list, | ||
348 | .nr_sources = ARRAY_SIZE(clkset_mali_list), | ||
349 | }; | ||
350 | |||
351 | static struct clk *clkset_group2_list[] = { | ||
352 | &clk_dout_epll.clk, | ||
353 | &clk_dout_mpll.clk, | ||
354 | &clk_ext_xtal_mux, | ||
355 | }; | ||
356 | |||
357 | static struct clksrc_sources clkset_group2 = { | ||
358 | .sources = clkset_group2_list, | ||
359 | .nr_sources = ARRAY_SIZE(clkset_group2_list), | ||
360 | }; | ||
361 | |||
362 | static struct clk *clkset_dispcon_list[] = { | ||
363 | &clk_dout_epll.clk, | ||
364 | &clk_dout_mpll.clk, | ||
365 | &clk_ext_xtal_mux, | ||
366 | &clk_mout_dpll.clk, | ||
367 | }; | ||
368 | |||
369 | static struct clksrc_sources clkset_dispcon = { | ||
370 | .sources = clkset_dispcon_list, | ||
371 | .nr_sources = ARRAY_SIZE(clkset_dispcon_list), | ||
372 | }; | ||
373 | |||
374 | static struct clk *clkset_hsmmc44_list[] = { | ||
375 | &clk_dout_epll.clk, | ||
376 | &clk_dout_mpll.clk, | ||
377 | &clk_ext_xtal_mux, | ||
378 | &s5p_clk_27m, | ||
379 | &clk_48m, | ||
380 | }; | ||
381 | |||
382 | static struct clksrc_sources clkset_hsmmc44 = { | ||
383 | .sources = clkset_hsmmc44_list, | ||
384 | .nr_sources = ARRAY_SIZE(clkset_hsmmc44_list), | ||
385 | }; | ||
386 | |||
387 | static struct clk *clkset_sclk_audio0_list[] = { | ||
388 | [0] = &clk_dout_epll.clk, | ||
389 | [1] = &clk_dout_mpll.clk, | ||
390 | [2] = &clk_ext_xtal_mux, | ||
391 | [3] = NULL, | ||
392 | [4] = NULL, | ||
393 | }; | ||
394 | |||
395 | static struct clksrc_sources clkset_sclk_audio0 = { | ||
396 | .sources = clkset_sclk_audio0_list, | ||
397 | .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list), | ||
398 | }; | ||
399 | |||
400 | static struct clksrc_clk clk_sclk_audio0 = { | ||
401 | .clk = { | ||
402 | .name = "audio-bus", | ||
403 | .id = -1, | ||
404 | .enable = s5p64x0_sclk_ctrl, | ||
405 | .ctrlbit = (1 << 8), | ||
406 | .parent = &clk_dout_epll.clk, | ||
407 | }, | ||
408 | .sources = &clkset_sclk_audio0, | ||
409 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 }, | ||
410 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 }, | ||
411 | }; | ||
412 | |||
413 | static struct clksrc_clk clksrcs[] = { | ||
414 | { | ||
415 | .clk = { | ||
416 | .name = "sclk_mmc", | ||
417 | .id = 0, | ||
418 | .ctrlbit = (1 << 24), | ||
419 | .enable = s5p64x0_sclk_ctrl, | ||
420 | }, | ||
421 | .sources = &clkset_group2, | ||
422 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
423 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
424 | }, { | ||
425 | .clk = { | ||
426 | .name = "sclk_mmc", | ||
427 | .id = 1, | ||
428 | .ctrlbit = (1 << 25), | ||
429 | .enable = s5p64x0_sclk_ctrl, | ||
430 | }, | ||
431 | .sources = &clkset_group2, | ||
432 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
433 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
434 | }, { | ||
435 | .clk = { | ||
436 | .name = "sclk_mmc", | ||
437 | .id = 2, | ||
438 | .ctrlbit = (1 << 26), | ||
439 | .enable = s5p64x0_sclk_ctrl, | ||
440 | }, | ||
441 | .sources = &clkset_group2, | ||
442 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
443 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
444 | }, { | ||
445 | .clk = { | ||
446 | .name = "uclk1", | ||
447 | .id = -1, | ||
448 | .ctrlbit = (1 << 5), | ||
449 | .enable = s5p64x0_sclk_ctrl, | ||
450 | }, | ||
451 | .sources = &clkset_uart, | ||
452 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, | ||
453 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, | ||
454 | }, { | ||
455 | .clk = { | ||
456 | .name = "sclk_spi", | ||
457 | .id = 0, | ||
458 | .ctrlbit = (1 << 20), | ||
459 | .enable = s5p64x0_sclk_ctrl, | ||
460 | }, | ||
461 | .sources = &clkset_group2, | ||
462 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, | ||
463 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, | ||
464 | }, { | ||
465 | .clk = { | ||
466 | .name = "sclk_spi", | ||
467 | .id = 1, | ||
468 | .ctrlbit = (1 << 21), | ||
469 | .enable = s5p64x0_sclk_ctrl, | ||
470 | }, | ||
471 | .sources = &clkset_group2, | ||
472 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, | ||
473 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, | ||
474 | }, { | ||
475 | .clk = { | ||
476 | .name = "sclk_fimc", | ||
477 | .id = -1, | ||
478 | .ctrlbit = (1 << 10), | ||
479 | .enable = s5p64x0_sclk_ctrl, | ||
480 | }, | ||
481 | .sources = &clkset_group2, | ||
482 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 }, | ||
483 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 }, | ||
484 | }, { | ||
485 | .clk = { | ||
486 | .name = "aclk_mali", | ||
487 | .id = -1, | ||
488 | .ctrlbit = (1 << 2), | ||
489 | .enable = s5p64x0_sclk1_ctrl, | ||
490 | }, | ||
491 | .sources = &clkset_mali, | ||
492 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, | ||
493 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, | ||
494 | }, { | ||
495 | .clk = { | ||
496 | .name = "sclk_2d", | ||
497 | .id = -1, | ||
498 | .ctrlbit = (1 << 12), | ||
499 | .enable = s5p64x0_sclk_ctrl, | ||
500 | }, | ||
501 | .sources = &clkset_mali, | ||
502 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 30, .size = 2 }, | ||
503 | .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 }, | ||
504 | }, { | ||
505 | .clk = { | ||
506 | .name = "sclk_usi", | ||
507 | .id = -1, | ||
508 | .ctrlbit = (1 << 7), | ||
509 | .enable = s5p64x0_sclk_ctrl, | ||
510 | }, | ||
511 | .sources = &clkset_group2, | ||
512 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 10, .size = 2 }, | ||
513 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 16, .size = 4 }, | ||
514 | }, { | ||
515 | .clk = { | ||
516 | .name = "sclk_camif", | ||
517 | .id = -1, | ||
518 | .ctrlbit = (1 << 6), | ||
519 | .enable = s5p64x0_sclk_ctrl, | ||
520 | }, | ||
521 | .sources = &clkset_group2, | ||
522 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 28, .size = 2 }, | ||
523 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 20, .size = 4 }, | ||
524 | }, { | ||
525 | .clk = { | ||
526 | .name = "sclk_dispcon", | ||
527 | .id = -1, | ||
528 | .ctrlbit = (1 << 1), | ||
529 | .enable = s5p64x0_sclk1_ctrl, | ||
530 | }, | ||
531 | .sources = &clkset_dispcon, | ||
532 | .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 }, | ||
533 | .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 }, | ||
534 | }, { | ||
535 | .clk = { | ||
536 | .name = "sclk_hsmmc44", | ||
537 | .id = -1, | ||
538 | .ctrlbit = (1 << 30), | ||
539 | .enable = s5p64x0_sclk_ctrl, | ||
540 | }, | ||
541 | .sources = &clkset_hsmmc44, | ||
542 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 6, .size = 3 }, | ||
543 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 28, .size = 4 }, | ||
544 | }, | ||
545 | }; | ||
546 | |||
547 | /* Clock initialization code */ | ||
548 | static struct clksrc_clk *sysclks[] = { | ||
549 | &clk_mout_apll, | ||
550 | &clk_mout_epll, | ||
551 | &clk_dout_epll, | ||
552 | &clk_mout_mpll, | ||
553 | &clk_dout_mpll, | ||
554 | &clk_armclk, | ||
555 | &clk_mout_hclk_sel, | ||
556 | &clk_dout_pwm_ratio0, | ||
557 | &clk_pclk_to_wdt_pwm, | ||
558 | &clk_hclk, | ||
559 | &clk_pclk, | ||
560 | &clk_hclk_low, | ||
561 | &clk_pclk_low, | ||
562 | &clk_sclk_audio0, | ||
563 | }; | ||
564 | |||
565 | void __init_or_cpufreq s5p6450_setup_clocks(void) | ||
566 | { | ||
567 | struct clk *xtal_clk; | ||
568 | |||
569 | unsigned long xtal; | ||
570 | unsigned long fclk; | ||
571 | unsigned long hclk; | ||
572 | unsigned long hclk_low; | ||
573 | unsigned long pclk; | ||
574 | unsigned long pclk_low; | ||
575 | |||
576 | unsigned long apll; | ||
577 | unsigned long mpll; | ||
578 | unsigned long epll; | ||
579 | unsigned long dpll; | ||
580 | unsigned int ptr; | ||
581 | |||
582 | /* Set S5P6450 functions for clk_fout_epll */ | ||
583 | |||
584 | clk_fout_epll.enable = s5p64x0_epll_enable; | ||
585 | clk_fout_epll.ops = &s5p6450_epll_ops; | ||
586 | |||
587 | clk_48m.enable = s5p64x0_clk48m_ctrl; | ||
588 | |||
589 | xtal_clk = clk_get(NULL, "ext_xtal"); | ||
590 | BUG_ON(IS_ERR(xtal_clk)); | ||
591 | |||
592 | xtal = clk_get_rate(xtal_clk); | ||
593 | clk_put(xtal_clk); | ||
594 | |||
595 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502); | ||
596 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); | ||
597 | epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON), | ||
598 | __raw_readl(S5P64X0_EPLL_CON_K)); | ||
599 | dpll = s5p_get_pll46xx(xtal, __raw_readl(S5P6450_DPLL_CON), | ||
600 | __raw_readl(S5P6450_DPLL_CON_K), pll_4650c); | ||
601 | |||
602 | clk_fout_apll.rate = apll; | ||
603 | clk_fout_mpll.rate = mpll; | ||
604 | clk_fout_epll.rate = epll; | ||
605 | clk_fout_dpll.rate = dpll; | ||
606 | |||
607 | printk(KERN_INFO "S5P6450: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ | ||
608 | " E=%ld.%ldMHz, D=%ld.%ldMHz\n", | ||
609 | print_mhz(apll), print_mhz(mpll), print_mhz(epll), | ||
610 | print_mhz(dpll)); | ||
611 | |||
612 | fclk = clk_get_rate(&clk_armclk.clk); | ||
613 | hclk = clk_get_rate(&clk_hclk.clk); | ||
614 | pclk = clk_get_rate(&clk_pclk.clk); | ||
615 | hclk_low = clk_get_rate(&clk_hclk_low.clk); | ||
616 | pclk_low = clk_get_rate(&clk_pclk_low.clk); | ||
617 | |||
618 | printk(KERN_INFO "S5P6450: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ | ||
619 | " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", | ||
620 | print_mhz(hclk), print_mhz(hclk_low), | ||
621 | print_mhz(pclk), print_mhz(pclk_low)); | ||
622 | |||
623 | clk_f.rate = fclk; | ||
624 | clk_h.rate = hclk; | ||
625 | clk_p.rate = pclk; | ||
626 | |||
627 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
628 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
629 | } | ||
630 | |||
631 | void __init s5p6450_register_clocks(void) | ||
632 | { | ||
633 | struct clk *clkp; | ||
634 | int ret; | ||
635 | int ptr; | ||
636 | |||
637 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
638 | s3c_register_clksrc(sysclks[ptr], 1); | ||
639 | |||
640 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
641 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
642 | |||
643 | clkp = init_clocks_disable; | ||
644 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | ||
645 | |||
646 | ret = s3c24xx_register_clock(clkp); | ||
647 | if (ret < 0) { | ||
648 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
649 | clkp->name, ret); | ||
650 | } | ||
651 | (clkp->enable)(clkp, 0); | ||
652 | } | ||
653 | |||
654 | s3c_pwmclk_init(); | ||
655 | } | ||
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c new file mode 100644 index 000000000000..523ba8039ac2 --- /dev/null +++ b/arch/arm/mach-s5p64x0/clock.c | |||
@@ -0,0 +1,253 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/sysdev.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/map.h> | ||
25 | #include <mach/regs-clock.h> | ||
26 | |||
27 | #include <plat/cpu-freq.h> | ||
28 | #include <plat/clock.h> | ||
29 | #include <plat/cpu.h> | ||
30 | #include <plat/pll.h> | ||
31 | #include <plat/s5p-clock.h> | ||
32 | #include <plat/clock-clksrc.h> | ||
33 | #include <plat/s5p6440.h> | ||
34 | #include <plat/s5p6450.h> | ||
35 | |||
36 | struct clksrc_clk clk_mout_apll = { | ||
37 | .clk = { | ||
38 | .name = "mout_apll", | ||
39 | .id = -1, | ||
40 | }, | ||
41 | .sources = &clk_src_apll, | ||
42 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 }, | ||
43 | }; | ||
44 | |||
45 | struct clksrc_clk clk_mout_mpll = { | ||
46 | .clk = { | ||
47 | .name = "mout_mpll", | ||
48 | .id = -1, | ||
49 | }, | ||
50 | .sources = &clk_src_mpll, | ||
51 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 }, | ||
52 | }; | ||
53 | |||
54 | struct clksrc_clk clk_mout_epll = { | ||
55 | .clk = { | ||
56 | .name = "mout_epll", | ||
57 | .id = -1, | ||
58 | }, | ||
59 | .sources = &clk_src_epll, | ||
60 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 }, | ||
61 | }; | ||
62 | |||
63 | enum perf_level { | ||
64 | L0 = 532*1000, | ||
65 | L1 = 266*1000, | ||
66 | L2 = 133*1000, | ||
67 | }; | ||
68 | |||
69 | static const u32 clock_table[][3] = { | ||
70 | /*{ARM_CLK, DIVarm, DIVhclk}*/ | ||
71 | {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, | ||
72 | {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, | ||
73 | {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, | ||
74 | }; | ||
75 | |||
76 | int s5p64x0_epll_enable(struct clk *clk, int enable) | ||
77 | { | ||
78 | unsigned int ctrlbit = clk->ctrlbit; | ||
79 | unsigned int epll_con = __raw_readl(S5P64X0_EPLL_CON) & ~ctrlbit; | ||
80 | |||
81 | if (enable) | ||
82 | __raw_writel(epll_con | ctrlbit, S5P64X0_EPLL_CON); | ||
83 | else | ||
84 | __raw_writel(epll_con, S5P64X0_EPLL_CON); | ||
85 | |||
86 | return 0; | ||
87 | } | ||
88 | |||
89 | unsigned long s5p64x0_epll_get_rate(struct clk *clk) | ||
90 | { | ||
91 | return clk->rate; | ||
92 | } | ||
93 | |||
94 | unsigned long s5p64x0_armclk_get_rate(struct clk *clk) | ||
95 | { | ||
96 | unsigned long rate = clk_get_rate(clk->parent); | ||
97 | u32 clkdiv; | ||
98 | |||
99 | /* divisor mask starts at bit0, so no need to shift */ | ||
100 | clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK; | ||
101 | |||
102 | return rate / (clkdiv + 1); | ||
103 | } | ||
104 | |||
105 | unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) | ||
106 | { | ||
107 | u32 iter; | ||
108 | |||
109 | for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) { | ||
110 | if (rate > clock_table[iter][0]) | ||
111 | return clock_table[iter-1][0]; | ||
112 | } | ||
113 | |||
114 | return clock_table[ARRAY_SIZE(clock_table) - 1][0]; | ||
115 | } | ||
116 | |||
117 | int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) | ||
118 | { | ||
119 | u32 round_tmp; | ||
120 | u32 iter; | ||
121 | u32 clk_div0_tmp; | ||
122 | u32 cur_rate = clk->ops->get_rate(clk); | ||
123 | unsigned long flags; | ||
124 | |||
125 | round_tmp = clk->ops->round_rate(clk, rate); | ||
126 | if (round_tmp == cur_rate) | ||
127 | return 0; | ||
128 | |||
129 | |||
130 | for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) { | ||
131 | if (round_tmp == clock_table[iter][0]) | ||
132 | break; | ||
133 | } | ||
134 | |||
135 | if (iter >= ARRAY_SIZE(clock_table)) | ||
136 | iter = ARRAY_SIZE(clock_table) - 1; | ||
137 | |||
138 | local_irq_save(flags); | ||
139 | if (cur_rate > round_tmp) { | ||
140 | /* Frequency Down */ | ||
141 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); | ||
142 | clk_div0_tmp |= clock_table[iter][1]; | ||
143 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
144 | |||
145 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & | ||
146 | ~(S5P64X0_CLKDIV0_HCLK_MASK); | ||
147 | clk_div0_tmp |= clock_table[iter][2]; | ||
148 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
149 | |||
150 | |||
151 | } else { | ||
152 | /* Frequency Up */ | ||
153 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & | ||
154 | ~(S5P64X0_CLKDIV0_HCLK_MASK); | ||
155 | clk_div0_tmp |= clock_table[iter][2]; | ||
156 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
157 | |||
158 | clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); | ||
159 | clk_div0_tmp |= clock_table[iter][1]; | ||
160 | __raw_writel(clk_div0_tmp, ARM_CLK_DIV); | ||
161 | } | ||
162 | local_irq_restore(flags); | ||
163 | |||
164 | clk->rate = clock_table[iter][0]; | ||
165 | |||
166 | return 0; | ||
167 | } | ||
168 | |||
169 | struct clk_ops s5p64x0_clkarm_ops = { | ||
170 | .get_rate = s5p64x0_armclk_get_rate, | ||
171 | .set_rate = s5p64x0_armclk_set_rate, | ||
172 | .round_rate = s5p64x0_armclk_round_rate, | ||
173 | }; | ||
174 | |||
175 | struct clksrc_clk clk_armclk = { | ||
176 | .clk = { | ||
177 | .name = "armclk", | ||
178 | .id = 1, | ||
179 | .parent = &clk_mout_apll.clk, | ||
180 | .ops = &s5p64x0_clkarm_ops, | ||
181 | }, | ||
182 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 }, | ||
183 | }; | ||
184 | |||
185 | struct clksrc_clk clk_dout_mpll = { | ||
186 | .clk = { | ||
187 | .name = "dout_mpll", | ||
188 | .id = -1, | ||
189 | .parent = &clk_mout_mpll.clk, | ||
190 | }, | ||
191 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, | ||
192 | }; | ||
193 | |||
194 | struct clk *clkset_hclk_low_list[] = { | ||
195 | &clk_mout_apll.clk, | ||
196 | &clk_mout_mpll.clk, | ||
197 | }; | ||
198 | |||
199 | struct clksrc_sources clkset_hclk_low = { | ||
200 | .sources = clkset_hclk_low_list, | ||
201 | .nr_sources = ARRAY_SIZE(clkset_hclk_low_list), | ||
202 | }; | ||
203 | |||
204 | int s5p64x0_pclk_ctrl(struct clk *clk, int enable) | ||
205 | { | ||
206 | return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable); | ||
207 | } | ||
208 | |||
209 | int s5p64x0_hclk0_ctrl(struct clk *clk, int enable) | ||
210 | { | ||
211 | return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable); | ||
212 | } | ||
213 | |||
214 | int s5p64x0_hclk1_ctrl(struct clk *clk, int enable) | ||
215 | { | ||
216 | return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable); | ||
217 | } | ||
218 | |||
219 | int s5p64x0_sclk_ctrl(struct clk *clk, int enable) | ||
220 | { | ||
221 | return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable); | ||
222 | } | ||
223 | |||
224 | int s5p64x0_sclk1_ctrl(struct clk *clk, int enable) | ||
225 | { | ||
226 | return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable); | ||
227 | } | ||
228 | |||
229 | int s5p64x0_mem_ctrl(struct clk *clk, int enable) | ||
230 | { | ||
231 | return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable); | ||
232 | } | ||
233 | |||
234 | int s5p64x0_clk48m_ctrl(struct clk *clk, int enable) | ||
235 | { | ||
236 | unsigned long flags; | ||
237 | u32 val; | ||
238 | |||
239 | /* can't rely on clock lock, this register has other usages */ | ||
240 | local_irq_save(flags); | ||
241 | |||
242 | val = __raw_readl(S5P64X0_OTHERS); | ||
243 | if (enable) | ||
244 | val |= S5P64X0_OTHERS_USB_SIG_MASK; | ||
245 | else | ||
246 | val &= ~S5P64X0_OTHERS_USB_SIG_MASK; | ||
247 | |||
248 | __raw_writel(val, S5P64X0_OTHERS); | ||
249 | |||
250 | local_irq_restore(flags); | ||
251 | |||
252 | return 0; | ||
253 | } | ||
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c new file mode 100644 index 000000000000..b8d02eb4cf30 --- /dev/null +++ b/arch/arm/mach-s5p64x0/cpu.c | |||
@@ -0,0 +1,209 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/sched.h> | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/mach/irq.h> | ||
27 | #include <asm/proc-fns.h> | ||
28 | #include <asm/irq.h> | ||
29 | |||
30 | #include <mach/hardware.h> | ||
31 | #include <mach/map.h> | ||
32 | #include <mach/regs-clock.h> | ||
33 | |||
34 | #include <plat/regs-serial.h> | ||
35 | #include <plat/cpu.h> | ||
36 | #include <plat/devs.h> | ||
37 | #include <plat/clock.h> | ||
38 | #include <plat/s5p6440.h> | ||
39 | #include <plat/s5p6450.h> | ||
40 | #include <plat/adc-core.h> | ||
41 | |||
42 | /* Initial IO mappings */ | ||
43 | |||
44 | static struct map_desc s5p64x0_iodesc[] __initdata = { | ||
45 | { | ||
46 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
47 | .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), | ||
48 | .length = SZ_4K, | ||
49 | .type = MT_DEVICE, | ||
50 | }, { | ||
51 | .virtual = (unsigned long)VA_VIC0, | ||
52 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), | ||
53 | .length = SZ_16K, | ||
54 | .type = MT_DEVICE, | ||
55 | }, { | ||
56 | .virtual = (unsigned long)VA_VIC1, | ||
57 | .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), | ||
58 | .length = SZ_16K, | ||
59 | .type = MT_DEVICE, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | static struct map_desc s5p6440_iodesc[] __initdata = { | ||
64 | { | ||
65 | .virtual = (unsigned long)S3C_VA_UART, | ||
66 | .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), | ||
67 | .length = SZ_4K, | ||
68 | .type = MT_DEVICE, | ||
69 | }, | ||
70 | }; | ||
71 | |||
72 | static struct map_desc s5p6450_iodesc[] __initdata = { | ||
73 | { | ||
74 | .virtual = (unsigned long)S3C_VA_UART, | ||
75 | .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), | ||
76 | .length = SZ_512K, | ||
77 | .type = MT_DEVICE, | ||
78 | }, { | ||
79 | .virtual = (unsigned long)S3C_VA_UART + SZ_512K, | ||
80 | .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), | ||
81 | .length = SZ_4K, | ||
82 | .type = MT_DEVICE, | ||
83 | }, | ||
84 | }; | ||
85 | |||
86 | static void s5p64x0_idle(void) | ||
87 | { | ||
88 | unsigned long val; | ||
89 | |||
90 | if (!need_resched()) { | ||
91 | val = __raw_readl(S5P64X0_PWR_CFG); | ||
92 | val &= ~(0x3 << 5); | ||
93 | val |= (0x1 << 5); | ||
94 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
95 | |||
96 | cpu_do_idle(); | ||
97 | } | ||
98 | local_irq_enable(); | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * s5p64x0_map_io | ||
103 | * | ||
104 | * register the standard CPU IO areas | ||
105 | */ | ||
106 | |||
107 | void __init s5p6440_map_io(void) | ||
108 | { | ||
109 | /* initialize any device information early */ | ||
110 | s3c_adc_setname("s3c64xx-adc"); | ||
111 | |||
112 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | ||
113 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | ||
114 | } | ||
115 | |||
116 | void __init s5p6450_map_io(void) | ||
117 | { | ||
118 | /* initialize any device information early */ | ||
119 | s3c_adc_setname("s3c64xx-adc"); | ||
120 | |||
121 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | ||
122 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | ||
123 | } | ||
124 | |||
125 | /* | ||
126 | * s5p64x0_init_clocks | ||
127 | * | ||
128 | * register and setup the CPU clocks | ||
129 | */ | ||
130 | |||
131 | void __init s5p6440_init_clocks(int xtal) | ||
132 | { | ||
133 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
134 | |||
135 | s3c24xx_register_baseclocks(xtal); | ||
136 | s5p_register_clocks(xtal); | ||
137 | s5p6440_register_clocks(); | ||
138 | s5p6440_setup_clocks(); | ||
139 | } | ||
140 | |||
141 | void __init s5p6450_init_clocks(int xtal) | ||
142 | { | ||
143 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
144 | |||
145 | s3c24xx_register_baseclocks(xtal); | ||
146 | s5p_register_clocks(xtal); | ||
147 | s5p6450_register_clocks(); | ||
148 | s5p6450_setup_clocks(); | ||
149 | } | ||
150 | |||
151 | /* | ||
152 | * s5p64x0_init_irq | ||
153 | * | ||
154 | * register the CPU interrupts | ||
155 | */ | ||
156 | |||
157 | void __init s5p6440_init_irq(void) | ||
158 | { | ||
159 | /* S5P6440 supports 2 VIC */ | ||
160 | u32 vic[2]; | ||
161 | |||
162 | /* | ||
163 | * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] | ||
164 | * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] | ||
165 | */ | ||
166 | vic[0] = 0xff800ae7; | ||
167 | vic[1] = 0xffbf23e5; | ||
168 | |||
169 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
170 | } | ||
171 | |||
172 | void __init s5p6450_init_irq(void) | ||
173 | { | ||
174 | /* S5P6450 supports only 2 VIC */ | ||
175 | u32 vic[2]; | ||
176 | |||
177 | /* | ||
178 | * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] | ||
179 | * VIC1 is missing IRQ VIC1[12, 14, 23] | ||
180 | */ | ||
181 | vic[0] = 0xff9f1fff; | ||
182 | vic[1] = 0xff7fafff; | ||
183 | |||
184 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
185 | } | ||
186 | |||
187 | struct sysdev_class s5p64x0_sysclass = { | ||
188 | .name = "s5p64x0-core", | ||
189 | }; | ||
190 | |||
191 | static struct sys_device s5p64x0_sysdev = { | ||
192 | .cls = &s5p64x0_sysclass, | ||
193 | }; | ||
194 | |||
195 | static int __init s5p64x0_core_init(void) | ||
196 | { | ||
197 | return sysdev_class_register(&s5p64x0_sysclass); | ||
198 | } | ||
199 | core_initcall(s5p64x0_core_init); | ||
200 | |||
201 | int __init s5p64x0_init(void) | ||
202 | { | ||
203 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | ||
204 | |||
205 | /* set idle function */ | ||
206 | pm_idle = s5p64x0_idle; | ||
207 | |||
208 | return sysdev_register(&s5p64x0_sysdev); | ||
209 | } | ||
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c new file mode 100644 index 000000000000..fa097bd68ca4 --- /dev/null +++ b/arch/arm/mach-s5p64x0/dev-audio.c | |||
@@ -0,0 +1,164 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6440_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | /* configure GPIO for i2s port */ | ||
25 | switch (pdev->id) { | ||
26 | case -1: | ||
27 | s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); | ||
29 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); | ||
30 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); | ||
31 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); | ||
32 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); | ||
33 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static int s5p6450_cfg_i2s(struct platform_device *pdev) | ||
45 | { | ||
46 | /* configure GPIO for i2s port */ | ||
47 | switch (pdev->id) { | ||
48 | case -1: | ||
49 | s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); | ||
50 | s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); | ||
51 | s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); | ||
52 | s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); | ||
53 | s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5)); | ||
54 | s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5)); | ||
55 | s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5)); | ||
56 | s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5)); | ||
57 | break; | ||
58 | |||
59 | default: | ||
60 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
61 | return -EINVAL; | ||
62 | } | ||
63 | |||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static struct s3c_audio_pdata s5p6440_i2s_pdata = { | ||
68 | .cfg_gpio = s5p6440_cfg_i2s, | ||
69 | }; | ||
70 | |||
71 | static struct s3c_audio_pdata s5p6450_i2s_pdata = { | ||
72 | .cfg_gpio = s5p6450_cfg_i2s, | ||
73 | }; | ||
74 | |||
75 | static struct resource s5p64x0_iis0_resource[] = { | ||
76 | [0] = { | ||
77 | .start = S5P64X0_PA_I2S, | ||
78 | .end = S5P64X0_PA_I2S + 0x100 - 1, | ||
79 | .flags = IORESOURCE_MEM, | ||
80 | }, | ||
81 | [1] = { | ||
82 | .start = DMACH_I2S0_TX, | ||
83 | .end = DMACH_I2S0_TX, | ||
84 | .flags = IORESOURCE_DMA, | ||
85 | }, | ||
86 | [2] = { | ||
87 | .start = DMACH_I2S0_RX, | ||
88 | .end = DMACH_I2S0_RX, | ||
89 | .flags = IORESOURCE_DMA, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | struct platform_device s5p6440_device_iis = { | ||
94 | .name = "s3c64xx-iis-v4", | ||
95 | .id = -1, | ||
96 | .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), | ||
97 | .resource = s5p64x0_iis0_resource, | ||
98 | .dev = { | ||
99 | .platform_data = &s5p6440_i2s_pdata, | ||
100 | }, | ||
101 | }; | ||
102 | |||
103 | struct platform_device s5p6450_device_iis0 = { | ||
104 | .name = "s3c64xx-iis-v4", | ||
105 | .id = -1, | ||
106 | .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), | ||
107 | .resource = s5p64x0_iis0_resource, | ||
108 | .dev = { | ||
109 | .platform_data = &s5p6450_i2s_pdata, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | /* PCM Controller platform_devices */ | ||
114 | |||
115 | static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) | ||
116 | { | ||
117 | switch (pdev->id) { | ||
118 | case 0: | ||
119 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); | ||
120 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); | ||
121 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); | ||
122 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); | ||
123 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); | ||
124 | break; | ||
125 | |||
126 | default: | ||
127 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
128 | return -EINVAL; | ||
129 | } | ||
130 | |||
131 | return 0; | ||
132 | } | ||
133 | |||
134 | static struct s3c_audio_pdata s5p6440_pcm_pdata = { | ||
135 | .cfg_gpio = s5p6440_pcm_cfg_gpio, | ||
136 | }; | ||
137 | |||
138 | static struct resource s5p6440_pcm0_resource[] = { | ||
139 | [0] = { | ||
140 | .start = S5P64X0_PA_PCM, | ||
141 | .end = S5P64X0_PA_PCM + 0x100 - 1, | ||
142 | .flags = IORESOURCE_MEM, | ||
143 | }, | ||
144 | [1] = { | ||
145 | .start = DMACH_PCM0_TX, | ||
146 | .end = DMACH_PCM0_TX, | ||
147 | .flags = IORESOURCE_DMA, | ||
148 | }, | ||
149 | [2] = { | ||
150 | .start = DMACH_PCM0_RX, | ||
151 | .end = DMACH_PCM0_RX, | ||
152 | .flags = IORESOURCE_DMA, | ||
153 | }, | ||
154 | }; | ||
155 | |||
156 | struct platform_device s5p6440_device_pcm = { | ||
157 | .name = "samsung-pcm", | ||
158 | .id = 0, | ||
159 | .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), | ||
160 | .resource = s5p6440_pcm0_resource, | ||
161 | .dev = { | ||
162 | .platform_data = &s5p6440_pcm_pdata, | ||
163 | }, | ||
164 | }; | ||
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c new file mode 100644 index 000000000000..5b69ec4c8af3 --- /dev/null +++ b/arch/arm/mach-s5p64x0/dev-spi.c | |||
@@ -0,0 +1,232 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/dev-spi.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/gpio.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | #include <mach/map.h> | ||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/regs-clock.h> | ||
22 | #include <mach/spi-clocks.h> | ||
23 | |||
24 | #include <plat/s3c64xx-spi.h> | ||
25 | #include <plat/gpio-cfg.h> | ||
26 | |||
27 | static char *s5p64x0_spi_src_clks[] = { | ||
28 | [S5P64X0_SPI_SRCCLK_PCLK] = "pclk", | ||
29 | [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
30 | }; | ||
31 | |||
32 | /* SPI Controller platform_devices */ | ||
33 | |||
34 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
35 | * The emulated CS is toggled by board specific mechanism, as it can | ||
36 | * be either some immediate GPIO or some signal out of some other | ||
37 | * chip in between ... or some yet another way. | ||
38 | * We simply do not assume anything about CS. | ||
39 | */ | ||
40 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
41 | { | ||
42 | switch (pdev->id) { | ||
43 | case 0: | ||
44 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
45 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
46 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
47 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
48 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
49 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
50 | break; | ||
51 | |||
52 | case 1: | ||
53 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
54 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
55 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
56 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
57 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
58 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
59 | break; | ||
60 | |||
61 | default: | ||
62 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
63 | return -EINVAL; | ||
64 | } | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) | ||
70 | { | ||
71 | switch (pdev->id) { | ||
72 | case 0: | ||
73 | s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); | ||
74 | s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2)); | ||
75 | s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2)); | ||
76 | s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); | ||
77 | s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); | ||
78 | s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); | ||
79 | break; | ||
80 | |||
81 | case 1: | ||
82 | s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); | ||
83 | s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2)); | ||
84 | s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2)); | ||
85 | s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); | ||
86 | s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); | ||
87 | s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); | ||
88 | break; | ||
89 | |||
90 | default: | ||
91 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
92 | return -EINVAL; | ||
93 | } | ||
94 | |||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | static struct resource s5p64x0_spi0_resource[] = { | ||
99 | [0] = { | ||
100 | .start = S5P64X0_PA_SPI0, | ||
101 | .end = S5P64X0_PA_SPI0 + 0x100 - 1, | ||
102 | .flags = IORESOURCE_MEM, | ||
103 | }, | ||
104 | [1] = { | ||
105 | .start = DMACH_SPI0_TX, | ||
106 | .end = DMACH_SPI0_TX, | ||
107 | .flags = IORESOURCE_DMA, | ||
108 | }, | ||
109 | [2] = { | ||
110 | .start = DMACH_SPI0_RX, | ||
111 | .end = DMACH_SPI0_RX, | ||
112 | .flags = IORESOURCE_DMA, | ||
113 | }, | ||
114 | [3] = { | ||
115 | .start = IRQ_SPI0, | ||
116 | .end = IRQ_SPI0, | ||
117 | .flags = IORESOURCE_IRQ, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
122 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
123 | .fifo_lvl_mask = 0x1ff, | ||
124 | .rx_lvl_offset = 15, | ||
125 | }; | ||
126 | |||
127 | static struct s3c64xx_spi_info s5p6450_spi0_pdata = { | ||
128 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
129 | .fifo_lvl_mask = 0x1ff, | ||
130 | .rx_lvl_offset = 15, | ||
131 | }; | ||
132 | |||
133 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
134 | |||
135 | struct platform_device s5p64x0_device_spi0 = { | ||
136 | .name = "s3c64xx-spi", | ||
137 | .id = 0, | ||
138 | .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource), | ||
139 | .resource = s5p64x0_spi0_resource, | ||
140 | .dev = { | ||
141 | .dma_mask = &spi_dmamask, | ||
142 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
143 | }, | ||
144 | }; | ||
145 | |||
146 | static struct resource s5p64x0_spi1_resource[] = { | ||
147 | [0] = { | ||
148 | .start = S5P64X0_PA_SPI1, | ||
149 | .end = S5P64X0_PA_SPI1 + 0x100 - 1, | ||
150 | .flags = IORESOURCE_MEM, | ||
151 | }, | ||
152 | [1] = { | ||
153 | .start = DMACH_SPI1_TX, | ||
154 | .end = DMACH_SPI1_TX, | ||
155 | .flags = IORESOURCE_DMA, | ||
156 | }, | ||
157 | [2] = { | ||
158 | .start = DMACH_SPI1_RX, | ||
159 | .end = DMACH_SPI1_RX, | ||
160 | .flags = IORESOURCE_DMA, | ||
161 | }, | ||
162 | [3] = { | ||
163 | .start = IRQ_SPI1, | ||
164 | .end = IRQ_SPI1, | ||
165 | .flags = IORESOURCE_IRQ, | ||
166 | }, | ||
167 | }; | ||
168 | |||
169 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
170 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
171 | .fifo_lvl_mask = 0x7f, | ||
172 | .rx_lvl_offset = 15, | ||
173 | }; | ||
174 | |||
175 | static struct s3c64xx_spi_info s5p6450_spi1_pdata = { | ||
176 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
177 | .fifo_lvl_mask = 0x7f, | ||
178 | .rx_lvl_offset = 15, | ||
179 | }; | ||
180 | |||
181 | struct platform_device s5p64x0_device_spi1 = { | ||
182 | .name = "s3c64xx-spi", | ||
183 | .id = 1, | ||
184 | .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource), | ||
185 | .resource = s5p64x0_spi1_resource, | ||
186 | .dev = { | ||
187 | .dma_mask = &spi_dmamask, | ||
188 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
189 | }, | ||
190 | }; | ||
191 | |||
192 | void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
193 | { | ||
194 | unsigned int id; | ||
195 | struct s3c64xx_spi_info *pd; | ||
196 | |||
197 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
198 | |||
199 | /* Reject invalid configuration */ | ||
200 | if (!num_cs || src_clk_nr < 0 | ||
201 | || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { | ||
202 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
203 | return; | ||
204 | } | ||
205 | |||
206 | switch (cntrlr) { | ||
207 | case 0: | ||
208 | if (id == 0x50000) | ||
209 | pd = &s5p6450_spi0_pdata; | ||
210 | else | ||
211 | pd = &s5p6440_spi0_pdata; | ||
212 | |||
213 | s5p64x0_device_spi0.dev.platform_data = pd; | ||
214 | break; | ||
215 | case 1: | ||
216 | if (id == 0x50000) | ||
217 | pd = &s5p6450_spi1_pdata; | ||
218 | else | ||
219 | pd = &s5p6440_spi1_pdata; | ||
220 | |||
221 | s5p64x0_device_spi1.dev.platform_data = pd; | ||
222 | break; | ||
223 | default: | ||
224 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
225 | __func__, cntrlr); | ||
226 | return; | ||
227 | } | ||
228 | |||
229 | pd->num_cs = num_cs; | ||
230 | pd->src_clk_nr = src_clk_nr; | ||
231 | pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr]; | ||
232 | } | ||
diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c index 07606ad57519..29a8c2410049 100644 --- a/arch/arm/mach-s5p6440/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -1,4 +1,8 @@ | |||
1 | /* | 1 | /* linux/arch/arm/mach-s5p64x0/dma.c |
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | 6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. |
3 | * Jaswinder Singh <jassi.brar@samsung.com> | 7 | * Jaswinder Singh <jassi.brar@samsung.com> |
4 | * | 8 | * |
@@ -15,26 +19,25 @@ | |||
15 | * You should have received a copy of the GNU General Public License | 19 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | 20 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
18 | */ | 22 | */ |
19 | 23 | ||
20 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
21 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
22 | 26 | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/irqs.h> | ||
25 | |||
26 | #include <mach/map.h> | 27 | #include <mach/map.h> |
27 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
29 | #include <mach/regs-clock.h> | ||
28 | 30 | ||
31 | #include <plat/devs.h> | ||
29 | #include <plat/s3c-pl330-pdata.h> | 32 | #include <plat/s3c-pl330-pdata.h> |
30 | 33 | ||
31 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 34 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
32 | 35 | ||
33 | static struct resource s5p6440_pdma_resource[] = { | 36 | static struct resource s5p64x0_pdma_resource[] = { |
34 | [0] = { | 37 | [0] = { |
35 | .start = S5P6440_PA_PDMA, | 38 | .start = S5P64X0_PA_PDMA, |
36 | .end = S5P6440_PA_PDMA + SZ_4K, | 39 | .end = S5P64X0_PA_PDMA + SZ_4K, |
37 | .flags = IORESOURCE_MEM, | 40 | .flags = IORESOURCE_MEM, |
38 | }, | 41 | }, |
39 | [1] = { | 42 | [1] = { |
40 | .start = IRQ_DMA0, | 43 | .start = IRQ_DMA0, |
@@ -80,26 +83,67 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = { | |||
80 | }, | 83 | }, |
81 | }; | 84 | }; |
82 | 85 | ||
83 | static struct platform_device s5p6440_device_pdma = { | 86 | static struct s3c_pl330_platdata s5p6450_pdma_pdata = { |
87 | .peri = { | ||
88 | [0] = DMACH_UART0_RX, | ||
89 | [1] = DMACH_UART0_TX, | ||
90 | [2] = DMACH_UART1_RX, | ||
91 | [3] = DMACH_UART1_TX, | ||
92 | [4] = DMACH_UART2_RX, | ||
93 | [5] = DMACH_UART2_TX, | ||
94 | [6] = DMACH_UART3_RX, | ||
95 | [7] = DMACH_UART3_TX, | ||
96 | [8] = DMACH_UART4_RX, | ||
97 | [9] = DMACH_UART4_TX, | ||
98 | [10] = DMACH_PCM0_TX, | ||
99 | [11] = DMACH_PCM0_RX, | ||
100 | [12] = DMACH_I2S0_TX, | ||
101 | [13] = DMACH_I2S0_RX, | ||
102 | [14] = DMACH_SPI0_TX, | ||
103 | [15] = DMACH_SPI0_RX, | ||
104 | [16] = DMACH_PCM1_TX, | ||
105 | [17] = DMACH_PCM1_RX, | ||
106 | [18] = DMACH_PCM2_TX, | ||
107 | [19] = DMACH_PCM2_RX, | ||
108 | [20] = DMACH_SPI1_TX, | ||
109 | [21] = DMACH_SPI1_RX, | ||
110 | [22] = DMACH_USI_TX, | ||
111 | [23] = DMACH_USI_RX, | ||
112 | [24] = DMACH_MAX, | ||
113 | [25] = DMACH_I2S1_TX, | ||
114 | [26] = DMACH_I2S1_RX, | ||
115 | [27] = DMACH_I2S2_TX, | ||
116 | [28] = DMACH_I2S2_RX, | ||
117 | [29] = DMACH_PWM, | ||
118 | [30] = DMACH_UART5_RX, | ||
119 | [31] = DMACH_UART5_TX, | ||
120 | }, | ||
121 | }; | ||
122 | |||
123 | static struct platform_device s5p64x0_device_pdma = { | ||
84 | .name = "s3c-pl330", | 124 | .name = "s3c-pl330", |
85 | .id = 1, | 125 | .id = 0, |
86 | .num_resources = ARRAY_SIZE(s5p6440_pdma_resource), | 126 | .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource), |
87 | .resource = s5p6440_pdma_resource, | 127 | .resource = s5p64x0_pdma_resource, |
88 | .dev = { | 128 | .dev = { |
89 | .dma_mask = &dma_dmamask, | 129 | .dma_mask = &dma_dmamask, |
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | 130 | .coherent_dma_mask = DMA_BIT_MASK(32), |
91 | .platform_data = &s5p6440_pdma_pdata, | ||
92 | }, | 131 | }, |
93 | }; | 132 | }; |
94 | 133 | ||
95 | static struct platform_device *s5p6440_dmacs[] __initdata = { | 134 | static int __init s5p64x0_dma_init(void) |
96 | &s5p6440_device_pdma, | ||
97 | }; | ||
98 | |||
99 | static int __init s5p6440_dma_init(void) | ||
100 | { | 135 | { |
101 | platform_add_devices(s5p6440_dmacs, ARRAY_SIZE(s5p6440_dmacs)); | 136 | unsigned int id; |
137 | |||
138 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
139 | |||
140 | if (id == 0x50000) | ||
141 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | ||
142 | else | ||
143 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | ||
144 | |||
145 | platform_device_register(&s5p64x0_device_pdma); | ||
102 | 146 | ||
103 | return 0; | 147 | return 0; |
104 | } | 148 | } |
105 | arch_initcall(s5p6440_dma_init); | 149 | arch_initcall(s5p64x0_dma_init); |
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p64x0/gpio.c index 8bf6e0ce51c9..39159dd5a29a 100644 --- a/arch/arm/mach-s5p6440/gpio.c +++ b/arch/arm/mach-s5p64x0/gpio.c | |||
@@ -1,14 +1,14 @@ | |||
1 | /* arch/arm/mach-s5p6440/gpio.c | 1 | /* linux/arch/arm/mach-s5p64x0/gpio.c |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - GPIOlib support | 6 | * S5P64X0 - GPIOlib support |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
@@ -22,26 +22,29 @@ | |||
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | #include <plat/gpio-cfg-helpers.h> | 23 | #include <plat/gpio-cfg-helpers.h> |
24 | 24 | ||
25 | /* GPIO bank summary: | 25 | /* To be implemented S5P6450 GPIO */ |
26 | * | 26 | |
27 | * Bank GPIOs Style SlpCon ExtInt Group | 27 | /* |
28 | * A 6 4Bit Yes 1 | 28 | * S5P6440 GPIO bank summary: |
29 | * B 7 4Bit Yes 1 | 29 | * |
30 | * C 8 4Bit Yes 2 | 30 | * Bank GPIOs Style SlpCon ExtInt Group |
31 | * F 2 2Bit Yes 4 [1] | 31 | * A 6 4Bit Yes 1 |
32 | * G 7 4Bit Yes 5 | 32 | * B 7 4Bit Yes 1 |
33 | * H 10 4Bit[2] Yes 6 | 33 | * C 8 4Bit Yes 2 |
34 | * I 16 2Bit Yes None | 34 | * F 2 2Bit Yes 4 [1] |
35 | * J 12 2Bit Yes None | 35 | * G 7 4Bit Yes 5 |
36 | * N 16 2Bit No IRQ_EINT | 36 | * H 10 4Bit[2] Yes 6 |
37 | * P 8 2Bit Yes 8 | 37 | * I 16 2Bit Yes None |
38 | * R 15 4Bit[2] Yes 8 | 38 | * J 12 2Bit Yes None |
39 | * | 39 | * N 16 2Bit No IRQ_EINT |
40 | * [1] BANKF pins 14,15 do not form part of the external interrupt sources | 40 | * P 8 2Bit Yes 8 |
41 | * [2] BANK has two control registers, GPxCON0 and GPxCON1 | 41 | * R 15 4Bit[2] Yes 8 |
42 | */ | 42 | * |
43 | * [1] BANKF pins 14,15 do not form part of the external interrupt sources | ||
44 | * [2] BANK has two control registers, GPxCON0 and GPxCON1 | ||
45 | */ | ||
43 | 46 | ||
44 | static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | 47 | static int s5p64x0_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, |
45 | unsigned int offset) | 48 | unsigned int offset) |
46 | { | 49 | { |
47 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | 50 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); |
@@ -77,7 +80,7 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | |||
77 | return 0; | 80 | return 0; |
78 | } | 81 | } |
79 | 82 | ||
80 | static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | 83 | static int s5p64x0_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, |
81 | unsigned int offset, int value) | 84 | unsigned int offset, int value) |
82 | { | 85 | { |
83 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | 86 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); |
@@ -124,12 +127,11 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
124 | return 0; | 127 | return 0; |
125 | } | 128 | } |
126 | 129 | ||
127 | int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | 130 | int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, |
128 | unsigned int off, unsigned int cfg) | 131 | unsigned int off, unsigned int cfg) |
129 | { | 132 | { |
130 | void __iomem *reg = chip->base; | 133 | void __iomem *reg = chip->base; |
131 | unsigned int shift; | 134 | unsigned int shift; |
132 | unsigned long flags; | ||
133 | u32 con; | 135 | u32 con; |
134 | 136 | ||
135 | switch (off) { | 137 | switch (off) { |
@@ -155,26 +157,22 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | |||
155 | cfg <<= shift; | 157 | cfg <<= shift; |
156 | } | 158 | } |
157 | 159 | ||
158 | s3c_gpio_lock(chip, flags); | ||
159 | |||
160 | con = __raw_readl(reg); | 160 | con = __raw_readl(reg); |
161 | con &= ~(0xf << shift); | 161 | con &= ~(0xf << shift); |
162 | con |= cfg; | 162 | con |= cfg; |
163 | __raw_writel(con, reg); | 163 | __raw_writel(con, reg); |
164 | 164 | ||
165 | s3c_gpio_unlock(chip, flags); | ||
166 | |||
167 | return 0; | 165 | return 0; |
168 | } | 166 | } |
169 | 167 | ||
170 | static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = { | 168 | static struct s3c_gpio_cfg s5p64x0_gpio_cfgs[] = { |
171 | { | 169 | { |
172 | .cfg_eint = 0, | 170 | .cfg_eint = 0, |
173 | }, { | 171 | }, { |
174 | .cfg_eint = 7, | 172 | .cfg_eint = 7, |
175 | }, { | 173 | }, { |
176 | .cfg_eint = 3, | 174 | .cfg_eint = 3, |
177 | .set_config = s5p6440_gpio_setcfg_4bit_rbank, | 175 | .set_config = s5p64x0_gpio_setcfg_4bit_rbank, |
178 | }, { | 176 | }, { |
179 | .cfg_eint = 0, | 177 | .cfg_eint = 0, |
180 | .set_config = s3c_gpio_setcfg_s3c24xx, | 178 | .set_config = s3c_gpio_setcfg_s3c24xx, |
@@ -193,7 +191,7 @@ static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = { | |||
193 | static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { | 191 | static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { |
194 | { | 192 | { |
195 | .base = S5P6440_GPA_BASE, | 193 | .base = S5P6440_GPA_BASE, |
196 | .config = &s5p6440_gpio_cfgs[1], | 194 | .config = &s5p64x0_gpio_cfgs[1], |
197 | .chip = { | 195 | .chip = { |
198 | .base = S5P6440_GPA(0), | 196 | .base = S5P6440_GPA(0), |
199 | .ngpio = S5P6440_GPIO_A_NR, | 197 | .ngpio = S5P6440_GPIO_A_NR, |
@@ -201,7 +199,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { | |||
201 | }, | 199 | }, |
202 | }, { | 200 | }, { |
203 | .base = S5P6440_GPB_BASE, | 201 | .base = S5P6440_GPB_BASE, |
204 | .config = &s5p6440_gpio_cfgs[1], | 202 | .config = &s5p64x0_gpio_cfgs[1], |
205 | .chip = { | 203 | .chip = { |
206 | .base = S5P6440_GPB(0), | 204 | .base = S5P6440_GPB(0), |
207 | .ngpio = S5P6440_GPIO_B_NR, | 205 | .ngpio = S5P6440_GPIO_B_NR, |
@@ -209,7 +207,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { | |||
209 | }, | 207 | }, |
210 | }, { | 208 | }, { |
211 | .base = S5P6440_GPC_BASE, | 209 | .base = S5P6440_GPC_BASE, |
212 | .config = &s5p6440_gpio_cfgs[1], | 210 | .config = &s5p64x0_gpio_cfgs[1], |
213 | .chip = { | 211 | .chip = { |
214 | .base = S5P6440_GPC(0), | 212 | .base = S5P6440_GPC(0), |
215 | .ngpio = S5P6440_GPIO_C_NR, | 213 | .ngpio = S5P6440_GPIO_C_NR, |
@@ -217,7 +215,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { | |||
217 | }, | 215 | }, |
218 | }, { | 216 | }, { |
219 | .base = S5P6440_GPG_BASE, | 217 | .base = S5P6440_GPG_BASE, |
220 | .config = &s5p6440_gpio_cfgs[1], | 218 | .config = &s5p64x0_gpio_cfgs[1], |
221 | .chip = { | 219 | .chip = { |
222 | .base = S5P6440_GPG(0), | 220 | .base = S5P6440_GPG(0), |
223 | .ngpio = S5P6440_GPIO_G_NR, | 221 | .ngpio = S5P6440_GPIO_G_NR, |
@@ -229,7 +227,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { | |||
229 | static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { | 227 | static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { |
230 | { | 228 | { |
231 | .base = S5P6440_GPH_BASE + 0x4, | 229 | .base = S5P6440_GPH_BASE + 0x4, |
232 | .config = &s5p6440_gpio_cfgs[1], | 230 | .config = &s5p64x0_gpio_cfgs[1], |
233 | .chip = { | 231 | .chip = { |
234 | .base = S5P6440_GPH(0), | 232 | .base = S5P6440_GPH(0), |
235 | .ngpio = S5P6440_GPIO_H_NR, | 233 | .ngpio = S5P6440_GPIO_H_NR, |
@@ -238,10 +236,10 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { | |||
238 | }, | 236 | }, |
239 | }; | 237 | }; |
240 | 238 | ||
241 | static struct s3c_gpio_chip gpio_rbank_4bit2[] = { | 239 | static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = { |
242 | { | 240 | { |
243 | .base = S5P6440_GPR_BASE + 0x4, | 241 | .base = S5P6440_GPR_BASE + 0x4, |
244 | .config = &s5p6440_gpio_cfgs[2], | 242 | .config = &s5p64x0_gpio_cfgs[2], |
245 | .chip = { | 243 | .chip = { |
246 | .base = S5P6440_GPR(0), | 244 | .base = S5P6440_GPR(0), |
247 | .ngpio = S5P6440_GPIO_R_NR, | 245 | .ngpio = S5P6440_GPIO_R_NR, |
@@ -253,7 +251,7 @@ static struct s3c_gpio_chip gpio_rbank_4bit2[] = { | |||
253 | static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | 251 | static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { |
254 | { | 252 | { |
255 | .base = S5P6440_GPF_BASE, | 253 | .base = S5P6440_GPF_BASE, |
256 | .config = &s5p6440_gpio_cfgs[5], | 254 | .config = &s5p64x0_gpio_cfgs[5], |
257 | .chip = { | 255 | .chip = { |
258 | .base = S5P6440_GPF(0), | 256 | .base = S5P6440_GPF(0), |
259 | .ngpio = S5P6440_GPIO_F_NR, | 257 | .ngpio = S5P6440_GPIO_F_NR, |
@@ -261,7 +259,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | |||
261 | }, | 259 | }, |
262 | }, { | 260 | }, { |
263 | .base = S5P6440_GPI_BASE, | 261 | .base = S5P6440_GPI_BASE, |
264 | .config = &s5p6440_gpio_cfgs[3], | 262 | .config = &s5p64x0_gpio_cfgs[3], |
265 | .chip = { | 263 | .chip = { |
266 | .base = S5P6440_GPI(0), | 264 | .base = S5P6440_GPI(0), |
267 | .ngpio = S5P6440_GPIO_I_NR, | 265 | .ngpio = S5P6440_GPIO_I_NR, |
@@ -269,7 +267,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | |||
269 | }, | 267 | }, |
270 | }, { | 268 | }, { |
271 | .base = S5P6440_GPJ_BASE, | 269 | .base = S5P6440_GPJ_BASE, |
272 | .config = &s5p6440_gpio_cfgs[3], | 270 | .config = &s5p64x0_gpio_cfgs[3], |
273 | .chip = { | 271 | .chip = { |
274 | .base = S5P6440_GPJ(0), | 272 | .base = S5P6440_GPJ(0), |
275 | .ngpio = S5P6440_GPIO_J_NR, | 273 | .ngpio = S5P6440_GPIO_J_NR, |
@@ -277,7 +275,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | |||
277 | }, | 275 | }, |
278 | }, { | 276 | }, { |
279 | .base = S5P6440_GPN_BASE, | 277 | .base = S5P6440_GPN_BASE, |
280 | .config = &s5p6440_gpio_cfgs[4], | 278 | .config = &s5p64x0_gpio_cfgs[4], |
281 | .chip = { | 279 | .chip = { |
282 | .base = S5P6440_GPN(0), | 280 | .base = S5P6440_GPN(0), |
283 | .ngpio = S5P6440_GPIO_N_NR, | 281 | .ngpio = S5P6440_GPIO_N_NR, |
@@ -285,7 +283,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | |||
285 | }, | 283 | }, |
286 | }, { | 284 | }, { |
287 | .base = S5P6440_GPP_BASE, | 285 | .base = S5P6440_GPP_BASE, |
288 | .config = &s5p6440_gpio_cfgs[5], | 286 | .config = &s5p64x0_gpio_cfgs[5], |
289 | .chip = { | 287 | .chip = { |
290 | .base = S5P6440_GPP(0), | 288 | .base = S5P6440_GPP(0), |
291 | .ngpio = S5P6440_GPIO_P_NR, | 289 | .ngpio = S5P6440_GPIO_P_NR, |
@@ -294,7 +292,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { | |||
294 | }, | 292 | }, |
295 | }; | 293 | }; |
296 | 294 | ||
297 | void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) | 295 | void __init s5p64x0_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) |
298 | { | 296 | { |
299 | for (; nr_chips > 0; nr_chips--, chipcfg++) { | 297 | for (; nr_chips > 0; nr_chips--, chipcfg++) { |
300 | if (!chipcfg->set_config) | 298 | if (!chipcfg->set_config) |
@@ -308,13 +306,13 @@ void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) | |||
308 | } | 306 | } |
309 | } | 307 | } |
310 | 308 | ||
311 | static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip, | 309 | static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip, |
312 | int nr_chips) | 310 | int nr_chips) |
313 | { | 311 | { |
314 | for (; nr_chips > 0; nr_chips--, chip++) { | 312 | for (; nr_chips > 0; nr_chips--, chip++) { |
315 | chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input; | 313 | chip->chip.direction_input = s5p64x0_gpiolib_rbank_4bit2_input; |
316 | chip->chip.direction_output = | 314 | chip->chip.direction_output = |
317 | s5p6440_gpiolib_rbank_4bit2_output; | 315 | s5p64x0_gpiolib_rbank_4bit2_output; |
318 | s3c_gpiolib_add(chip); | 316 | s3c_gpiolib_add(chip); |
319 | } | 317 | } |
320 | } | 318 | } |
@@ -324,8 +322,8 @@ static int __init s5p6440_gpiolib_init(void) | |||
324 | struct s3c_gpio_chip *chips = s5p6440_gpio_2bit; | 322 | struct s3c_gpio_chip *chips = s5p6440_gpio_2bit; |
325 | int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit); | 323 | int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit); |
326 | 324 | ||
327 | s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs, | 325 | s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, |
328 | ARRAY_SIZE(s5p6440_gpio_cfgs)); | 326 | ARRAY_SIZE(s5p64x0_gpio_cfgs)); |
329 | 327 | ||
330 | for (; nr_chips > 0; nr_chips--, chips++) | 328 | for (; nr_chips > 0; nr_chips--, chips++) |
331 | s3c_gpiolib_add(chips); | 329 | s3c_gpiolib_add(chips); |
@@ -336,8 +334,8 @@ static int __init s5p6440_gpiolib_init(void) | |||
336 | samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2, | 334 | samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2, |
337 | ARRAY_SIZE(s5p6440_gpio_4bit2)); | 335 | ARRAY_SIZE(s5p6440_gpio_4bit2)); |
338 | 336 | ||
339 | s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2, | 337 | s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2, |
340 | ARRAY_SIZE(gpio_rbank_4bit2)); | 338 | ARRAY_SIZE(s5p6440_gpio_rbank_4bit2)); |
341 | 339 | ||
342 | return 0; | 340 | return 0; |
343 | } | 341 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S new file mode 100644 index 000000000000..79b04e6a6f8e --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S | |||
@@ -0,0 +1,33 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /* pull in the relevant register and map files. */ | ||
12 | |||
13 | #include <plat/map-base.h> | ||
14 | #include <plat/map-s5p.h> | ||
15 | |||
16 | #include <plat/regs-serial.h> | ||
17 | |||
18 | .macro addruart, rp, rv | ||
19 | mov \rp, #0xE0000000 | ||
20 | orr \rp, \rp, #0x00100000 | ||
21 | ldr \rp, [\rp, #0x118 ] | ||
22 | and \rp, \rp, #0xff000 | ||
23 | teq \rp, #0x50000 @@ S5P6450 | ||
24 | ldreq \rp, =0xEC800000 | ||
25 | movne \rp, #0xEC000000 @@ S5P6440 | ||
26 | ldrne \rv, = S3C_VA_UART | ||
27 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
28 | add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
29 | add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
30 | #endif | ||
31 | .endm | ||
32 | |||
33 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h index 81209eb1409b..81209eb1409b 100644 --- a/arch/arm/mach-s5p6440/include/mach/dma.h +++ b/arch/arm/mach-s5p64x0/include/mach/dma.h | |||
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S index e65f1b967262..10b62b4f8211 100644 --- a/arch/arm/mach-s5p6440/include/mach/entry-macro.S +++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S | |||
@@ -1,9 +1,9 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * Low-level IRQ helper macros for the Samsung S5P6440 | 6 | * Low-level IRQ helper macros for the Samsung S5P64X0 |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h new file mode 100644 index 000000000000..5486c8f01f1d --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h | |||
@@ -0,0 +1,139 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - GPIO lib support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_GPIO_H | ||
14 | #define __ASM_ARCH_GPIO_H __FILE__ | ||
15 | |||
16 | #define gpio_get_value __gpio_get_value | ||
17 | #define gpio_set_value __gpio_set_value | ||
18 | #define gpio_cansleep __gpio_cansleep | ||
19 | #define gpio_to_irq __gpio_to_irq | ||
20 | |||
21 | /* GPIO bank sizes */ | ||
22 | |||
23 | #define S5P6440_GPIO_A_NR (6) | ||
24 | #define S5P6440_GPIO_B_NR (7) | ||
25 | #define S5P6440_GPIO_C_NR (8) | ||
26 | #define S5P6440_GPIO_F_NR (2) | ||
27 | #define S5P6440_GPIO_G_NR (7) | ||
28 | #define S5P6440_GPIO_H_NR (10) | ||
29 | #define S5P6440_GPIO_I_NR (16) | ||
30 | #define S5P6440_GPIO_J_NR (12) | ||
31 | #define S5P6440_GPIO_N_NR (16) | ||
32 | #define S5P6440_GPIO_P_NR (8) | ||
33 | #define S5P6440_GPIO_R_NR (15) | ||
34 | |||
35 | #define S5P6450_GPIO_A_NR (6) | ||
36 | #define S5P6450_GPIO_B_NR (7) | ||
37 | #define S5P6450_GPIO_C_NR (8) | ||
38 | #define S5P6450_GPIO_D_NR (8) | ||
39 | #define S5P6450_GPIO_F_NR (2) | ||
40 | #define S5P6450_GPIO_G_NR (14) | ||
41 | #define S5P6450_GPIO_H_NR (10) | ||
42 | #define S5P6450_GPIO_I_NR (16) | ||
43 | #define S5P6450_GPIO_J_NR (12) | ||
44 | #define S5P6450_GPIO_K_NR (5) | ||
45 | #define S5P6450_GPIO_N_NR (16) | ||
46 | #define S5P6450_GPIO_P_NR (11) | ||
47 | #define S5P6450_GPIO_Q_NR (14) | ||
48 | #define S5P6450_GPIO_R_NR (15) | ||
49 | #define S5P6450_GPIO_S_NR (8) | ||
50 | |||
51 | /* GPIO bank numbers */ | ||
52 | |||
53 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
54 | * space for debugging purposes so that any accidental | ||
55 | * change from one gpio bank to another can be caught. | ||
56 | */ | ||
57 | |||
58 | #define S5P64X0_GPIO_NEXT(__gpio) \ | ||
59 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
60 | |||
61 | enum s5p6440_gpio_number { | ||
62 | S5P6440_GPIO_A_START = 0, | ||
63 | S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A), | ||
64 | S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B), | ||
65 | S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C), | ||
66 | S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F), | ||
67 | S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G), | ||
68 | S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H), | ||
69 | S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I), | ||
70 | S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J), | ||
71 | S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N), | ||
72 | S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P), | ||
73 | }; | ||
74 | |||
75 | enum s5p6450_gpio_number { | ||
76 | S5P6450_GPIO_A_START = 0, | ||
77 | S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A), | ||
78 | S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B), | ||
79 | S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C), | ||
80 | S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D), | ||
81 | S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F), | ||
82 | S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G), | ||
83 | S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H), | ||
84 | S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I), | ||
85 | S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J), | ||
86 | S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K), | ||
87 | S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N), | ||
88 | S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P), | ||
89 | S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q), | ||
90 | S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R), | ||
91 | }; | ||
92 | |||
93 | /* GPIO number definitions */ | ||
94 | |||
95 | #define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr)) | ||
96 | #define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr)) | ||
97 | #define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr)) | ||
98 | #define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr)) | ||
99 | #define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr)) | ||
100 | #define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr)) | ||
101 | #define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr)) | ||
102 | #define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr)) | ||
103 | #define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr)) | ||
104 | #define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr)) | ||
105 | #define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr)) | ||
106 | |||
107 | #define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr)) | ||
108 | #define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr)) | ||
109 | #define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr)) | ||
110 | #define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr)) | ||
111 | #define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr)) | ||
112 | #define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr)) | ||
113 | #define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr)) | ||
114 | #define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr)) | ||
115 | #define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr)) | ||
116 | #define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr)) | ||
117 | #define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr)) | ||
118 | #define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr)) | ||
119 | #define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr)) | ||
120 | #define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr)) | ||
121 | #define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr)) | ||
122 | |||
123 | /* the end of the S5P64X0 specific gpios */ | ||
124 | |||
125 | #define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1) | ||
126 | #define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1) | ||
127 | |||
128 | #define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \ | ||
129 | S5P6440_GPIO_END : S5P6450_GPIO_END) | ||
130 | |||
131 | #define S3C_GPIO_END S5P64X0_GPIO_END | ||
132 | |||
133 | /* define the number of gpios we need to the one after the last GPIO range */ | ||
134 | |||
135 | #define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA) | ||
136 | |||
137 | #include <asm-generic/gpio.h> | ||
138 | |||
139 | #endif /* __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h index be8b26e875db..d3e87996dd9a 100644 --- a/arch/arm/mach-s5p6440/include/mach/hardware.h +++ b/arch/arm/mach-s5p64x0/include/mach/hardware.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/hardware.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - Hardware support | 6 | * S5P64X0 - Hardware support |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/include/mach/i2c.h new file mode 100644 index 000000000000..887d25209e8e --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/i2c.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 I2C configuration | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev); | ||
14 | extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev); | ||
15 | |||
16 | extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev); | ||
17 | extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev); | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h new file mode 100644 index 000000000000..a3e095c02fb5 --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/io.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/io.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright 2008 Simtec Electronics | ||
7 | * Ben Dooks <ben-linux@fluff.org> | ||
8 | * | ||
9 | * Default IO routines for S5P64X0 based | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARM_ARCH_IO_H | ||
17 | #define __ASM_ARM_ARCH_IO_H | ||
18 | |||
19 | /* No current ISA/PCI bus support. */ | ||
20 | #define __io(a) __typesafe_io(a) | ||
21 | #define __mem_pci(a) (a) | ||
22 | |||
23 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 16a761270de1..513abffc7604 100644 --- a/arch/arm/mach-s5p6440/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h | |||
@@ -1,17 +1,17 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/irqs.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h |
2 | * | 2 | * |
3 | * Copyright 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - IRQ definitions | 6 | * S5P64X0 - IRQ definitions |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM_ARCH_S5P_IRQS_H | 13 | #ifndef __ASM_ARCH_IRQS_H |
14 | #define __ASM_ARCH_S5P_IRQS_H __FILE__ | 14 | #define __ASM_ARCH_IRQS_H __FILE__ |
15 | 15 | ||
16 | #include <plat/irqs.h> | 16 | #include <plat/irqs.h> |
17 | 17 | ||
@@ -20,10 +20,12 @@ | |||
20 | #define IRQ_EINT0_3 S5P_IRQ_VIC0(0) | 20 | #define IRQ_EINT0_3 S5P_IRQ_VIC0(0) |
21 | #define IRQ_EINT4_11 S5P_IRQ_VIC0(1) | 21 | #define IRQ_EINT4_11 S5P_IRQ_VIC0(1) |
22 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(2) | 22 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(2) |
23 | #define IRQ_IIS1 S5P_IRQ_VIC0(3) /* for only S5P6450 */ | ||
24 | #define IRQ_IIS2 S5P_IRQ_VIC0(4) /* for only S5P6450 */ | ||
23 | #define IRQ_IIC1 S5P_IRQ_VIC0(5) | 25 | #define IRQ_IIC1 S5P_IRQ_VIC0(5) |
24 | #define IRQ_I2SV40 S5P_IRQ_VIC0(6) | 26 | #define IRQ_I2SV40 S5P_IRQ_VIC0(6) |
25 | #define IRQ_GPS S5P_IRQ_VIC0(7) | 27 | #define IRQ_GPS S5P_IRQ_VIC0(7) /* for only S5P6450 */ |
26 | #define IRQ_POST0 S5P_IRQ_VIC0(9) | 28 | |
27 | #define IRQ_2D S5P_IRQ_VIC0(11) | 29 | #define IRQ_2D S5P_IRQ_VIC0(11) |
28 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23) | 30 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23) |
29 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24) | 31 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24) |
@@ -39,22 +41,26 @@ | |||
39 | 41 | ||
40 | #define IRQ_EINT12_15 S5P_IRQ_VIC1(0) | 42 | #define IRQ_EINT12_15 S5P_IRQ_VIC1(0) |
41 | #define IRQ_PCM0 S5P_IRQ_VIC1(2) | 43 | #define IRQ_PCM0 S5P_IRQ_VIC1(2) |
44 | #define IRQ_PCM1 S5P_IRQ_VIC1(3) /* for only S5P6450 */ | ||
45 | #define IRQ_PCM2 S5P_IRQ_VIC1(4) /* for only S5P6450 */ | ||
42 | #define IRQ_UART0 S5P_IRQ_VIC1(5) | 46 | #define IRQ_UART0 S5P_IRQ_VIC1(5) |
43 | #define IRQ_UART1 S5P_IRQ_VIC1(6) | 47 | #define IRQ_UART1 S5P_IRQ_VIC1(6) |
44 | #define IRQ_UART2 S5P_IRQ_VIC1(7) | 48 | #define IRQ_UART2 S5P_IRQ_VIC1(7) |
45 | #define IRQ_UART3 S5P_IRQ_VIC1(8) | 49 | #define IRQ_UART3 S5P_IRQ_VIC1(8) |
46 | #define IRQ_DMA0 S5P_IRQ_VIC1(9) | 50 | #define IRQ_DMA0 S5P_IRQ_VIC1(9) |
51 | #define IRQ_UART4 S5P_IRQ_VIC1(10) /* S5P6450 */ | ||
52 | #define IRQ_UART5 S5P_IRQ_VIC1(11) /* S5P6450 */ | ||
47 | #define IRQ_NFC S5P_IRQ_VIC1(13) | 53 | #define IRQ_NFC S5P_IRQ_VIC1(13) |
54 | #define IRQ_USI S5P_IRQ_VIC1(15) /* S5P6450 */ | ||
48 | #define IRQ_SPI0 S5P_IRQ_VIC1(16) | 55 | #define IRQ_SPI0 S5P_IRQ_VIC1(16) |
49 | #define IRQ_SPI1 S5P_IRQ_VIC1(17) | 56 | #define IRQ_SPI1 S5P_IRQ_VIC1(17) |
57 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(17) /* Shared */ | ||
50 | #define IRQ_IIC S5P_IRQ_VIC1(18) | 58 | #define IRQ_IIC S5P_IRQ_VIC1(18) |
51 | #define IRQ_DISPCON3 S5P_IRQ_VIC1(19) | 59 | #define IRQ_DISPCON3 S5P_IRQ_VIC1(19) |
52 | #define IRQ_FIMGVG S5P_IRQ_VIC1(20) | ||
53 | #define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) | 60 | #define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) |
54 | #define IRQ_PMU S5P_IRQ_VIC1(23) | 61 | #define IRQ_PMU S5P_IRQ_VIC1(23) /* S5P6440 */ |
55 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(24) | 62 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(24) |
56 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(25) | 63 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(25) |
57 | #define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ | ||
58 | #define IRQ_OTG S5P_IRQ_VIC1(26) | 64 | #define IRQ_OTG S5P_IRQ_VIC1(26) |
59 | #define IRQ_DSI S5P_IRQ_VIC1(27) | 65 | #define IRQ_DSI S5P_IRQ_VIC1(27) |
60 | #define IRQ_RTC_ALARM S5P_IRQ_VIC1(28) | 66 | #define IRQ_RTC_ALARM S5P_IRQ_VIC1(28) |
@@ -63,6 +69,24 @@ | |||
63 | #define IRQ_TC IRQ_PENDN | 69 | #define IRQ_TC IRQ_PENDN |
64 | #define IRQ_ADC S5P_IRQ_VIC1(31) | 70 | #define IRQ_ADC S5P_IRQ_VIC1(31) |
65 | 71 | ||
72 | /* UART interrupts, S5P6450 has 5 UARTs */ | ||
73 | #define IRQ_S5P_UART_BASE4 (96) | ||
74 | #define IRQ_S5P_UART_BASE5 (100) | ||
75 | |||
76 | #define IRQ_S5P_UART_RX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_RXD) | ||
77 | #define IRQ_S5P_UART_TX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_TXD) | ||
78 | #define IRQ_S5P_UART_ERR4 (IRQ_S5P_UART_BASE4 + UART_IRQ_ERR) | ||
79 | |||
80 | #define IRQ_S5P_UART_RX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_RXD) | ||
81 | #define IRQ_S5P_UART_TX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_TXD) | ||
82 | #define IRQ_S5P_UART_ERR5 (IRQ_S5P_UART_BASE5 + UART_IRQ_ERR) | ||
83 | |||
84 | /* S3C compatibilty defines */ | ||
85 | #define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 | ||
86 | #define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 | ||
87 | |||
88 | /* S5P6450 EINT feature will be added */ | ||
89 | |||
66 | /* | 90 | /* |
67 | * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined | 91 | * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined |
68 | * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place | 92 | * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place |
@@ -115,4 +139,4 @@ | |||
115 | 139 | ||
116 | #define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) | 140 | #define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) |
117 | 141 | ||
118 | #endif /* __ASM_ARCH_S5P_IRQS_H */ | 142 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h new file mode 100644 index 000000000000..31e534156e06 --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
@@ -0,0 +1,83 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Memory map definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MAP_H | ||
14 | #define __ASM_ARCH_MAP_H __FILE__ | ||
15 | |||
16 | #include <plat/map-base.h> | ||
17 | #include <plat/map-s5p.h> | ||
18 | |||
19 | #define S5P64X0_PA_SDRAM (0x20000000) | ||
20 | |||
21 | #define S5P64X0_PA_CHIPID (0xE0000000) | ||
22 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
23 | |||
24 | #define S5P64X0_PA_SYSCON (0xE0100000) | ||
25 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
26 | |||
27 | #define S5P64X0_PA_GPIO (0xE0308000) | ||
28 | |||
29 | #define S5P64X0_PA_VIC0 (0xE4000000) | ||
30 | #define S5P64X0_PA_VIC1 (0xE4100000) | ||
31 | |||
32 | #define S5P64X0_PA_PDMA (0xE9000000) | ||
33 | |||
34 | #define S5P64X0_PA_TIMER (0xEA000000) | ||
35 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
36 | |||
37 | #define S5P64X0_PA_RTC (0xEA100000) | ||
38 | |||
39 | #define S5P64X0_PA_WDT (0xEA200000) | ||
40 | |||
41 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | ||
42 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
43 | |||
44 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | ||
45 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
46 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
47 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
48 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
49 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
50 | |||
51 | #define S5P_SZ_UART SZ_256 | ||
52 | |||
53 | #define S5P6440_PA_IIC0 (0xEC104000) | ||
54 | #define S5P6440_PA_IIC1 (0xEC20F000) | ||
55 | #define S5P6450_PA_IIC0 (0xEC100000) | ||
56 | #define S5P6450_PA_IIC1 (0xEC200000) | ||
57 | |||
58 | #define S5P64X0_PA_SPI0 (0xEC400000) | ||
59 | #define S5P64X0_PA_SPI1 (0xEC500000) | ||
60 | |||
61 | #define S5P64X0_PA_HSOTG (0xED100000) | ||
62 | |||
63 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | ||
64 | |||
65 | #define S5P64X0_PA_I2S (0xF2000000) | ||
66 | |||
67 | #define S5P64X0_PA_PCM (0xF2100000) | ||
68 | |||
69 | #define S5P64X0_PA_ADC (0xF3000000) | ||
70 | |||
71 | /* compatibiltiy defines. */ | ||
72 | |||
73 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | ||
74 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | ||
75 | #define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2) | ||
76 | #define S3C_PA_IIC S5P6440_PA_IIC0 | ||
77 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | ||
78 | #define S3C_PA_RTC S5P64X0_PA_RTC | ||
79 | #define S3C_PA_WDT S5P64X0_PA_WDT | ||
80 | |||
81 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC | ||
82 | |||
83 | #endif /* __ASM_ARCH_MAP_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h index d62910c71b56..1b036b0a24ce 100644 --- a/arch/arm/mach-s5p6440/include/mach/memory.h +++ b/arch/arm/mach-s5p64x0/include/mach/memory.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/memory.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/memory.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - Memory definitions | 6 | * S5P64X0 - Memory definitions |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
@@ -11,9 +11,9 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM_ARCH_MEMORY_H | 13 | #ifndef __ASM_ARCH_MEMORY_H |
14 | #define __ASM_ARCH_MEMORY_H | 14 | #define __ASM_ARCH_MEMORY_H __FILE__ |
15 | 15 | ||
16 | #define PHYS_OFFSET UL(0x20000000) | 16 | #define PHYS_OFFSET UL(0x20000000) |
17 | #define CONSISTENT_DMA_SIZE SZ_8M | 17 | #define CONSISTENT_DMA_SIZE SZ_8M |
18 | 18 | ||
19 | #endif /* __ASM_ARCH_MEMORY_H */ | 19 | #endif /* __ASM_ARCH_MEMORY_H */ |
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h index 6a2a02fdf12a..19fff8b701c0 100644 --- a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h +++ b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h | |||
@@ -1,16 +1,14 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * Copyright 2008 Openmoko, Inc. | 6 | * Copyright 2008 Openmoko, Inc. |
7 | * Copyright 2008 Simtec Electronics | 7 | * Copyright 2008 Simtec Electronics |
8 | * Ben Dooks <ben@simtec.co.uk> | 8 | * Ben Dooks <ben@simtec.co.uk> |
9 | * http://armlinux.simtec.co.uk/ | 9 | * http://armlinux.simtec.co.uk/ |
10 | * | 10 | * |
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | 11 | * S5P64X0 - pwm clock and timer support |
12 | * | ||
13 | * S5P6440 - pwm clock and timer support | ||
14 | * | 12 | * |
15 | * This program is free software; you can redistribute it and/or modify | 13 | * This program is free software; you can redistribute it and/or modify |
16 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h new file mode 100644 index 000000000000..58e1bc813804 --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h | |||
@@ -0,0 +1,63 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Clock register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | ||
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | ||
19 | |||
20 | #define S5P64X0_APLL_CON S5P_CLKREG(0x0C) | ||
21 | #define S5P64X0_MPLL_CON S5P_CLKREG(0x10) | ||
22 | #define S5P64X0_EPLL_CON S5P_CLKREG(0x14) | ||
23 | #define S5P64X0_EPLL_CON_K S5P_CLKREG(0x18) | ||
24 | |||
25 | #define S5P64X0_CLK_SRC0 S5P_CLKREG(0x1C) | ||
26 | |||
27 | #define S5P64X0_CLK_DIV0 S5P_CLKREG(0x20) | ||
28 | #define S5P64X0_CLK_DIV1 S5P_CLKREG(0x24) | ||
29 | #define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28) | ||
30 | |||
31 | #define S5P64X0_CLK_GATE_HCLK0 S5P_CLKREG(0x30) | ||
32 | #define S5P64X0_CLK_GATE_PCLK S5P_CLKREG(0x34) | ||
33 | #define S5P64X0_CLK_GATE_SCLK0 S5P_CLKREG(0x38) | ||
34 | #define S5P64X0_CLK_GATE_MEM0 S5P_CLKREG(0x3C) | ||
35 | |||
36 | #define S5P64X0_CLK_DIV3 S5P_CLKREG(0x40) | ||
37 | |||
38 | #define S5P64X0_CLK_GATE_HCLK1 S5P_CLKREG(0x44) | ||
39 | #define S5P64X0_CLK_GATE_SCLK1 S5P_CLKREG(0x48) | ||
40 | |||
41 | #define S5P6450_DPLL_CON S5P_CLKREG(0x50) | ||
42 | #define S5P6450_DPLL_CON_K S5P_CLKREG(0x54) | ||
43 | |||
44 | #define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C) | ||
45 | |||
46 | #define S5P64X0_SYS_ID S5P_CLKREG(0x118) | ||
47 | #define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C) | ||
48 | |||
49 | #define S5P64X0_PWR_CFG S5P_CLKREG(0x804) | ||
50 | #define S5P64X0_OTHERS S5P_CLKREG(0x900) | ||
51 | |||
52 | #define S5P64X0_CLKDIV0_HCLK_SHIFT (8) | ||
53 | #define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT) | ||
54 | |||
55 | #define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16) | ||
56 | |||
57 | /* Compatibility defines */ | ||
58 | |||
59 | #define ARM_CLK_DIV S5P64X0_CLK_DIV0 | ||
60 | #define ARM_DIV_RATIO_SHIFT 0 | ||
61 | #define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT) | ||
62 | |||
63 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 82ff753913da..85f448e20a8b 100644 --- a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | |||
@@ -1,21 +1,24 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - GPIO register definitions | 6 | * S5P64X0 - GPIO register definitions |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM_ARCH_REGS_GPIO_H | 13 | #ifndef __ASM_ARCH_REGS_GPIO_H |
14 | #define __ASM_ARCH_REGS_GPIO_H __FILE__ | 14 | #define __ASM_ARCH_REGS_GPIO_H __FILE__ |
15 | 15 | ||
16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
17 | 17 | ||
18 | /* Will be implemented S5P6442 GPIOlib */ | ||
19 | |||
18 | /* Base addresses for each of the banks */ | 20 | /* Base addresses for each of the banks */ |
21 | |||
19 | #define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000) | 22 | #define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000) |
20 | #define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020) | 23 | #define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020) |
21 | #define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040) | 24 | #define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040) |
@@ -27,6 +30,7 @@ | |||
27 | #define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830) | 30 | #define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830) |
28 | #define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160) | 31 | #define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160) |
29 | #define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290) | 32 | #define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290) |
33 | |||
30 | #define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900) | 34 | #define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900) |
31 | #define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910) | 35 | #define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910) |
32 | #define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914) | 36 | #define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914) |
@@ -34,19 +38,23 @@ | |||
34 | #define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924) | 38 | #define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924) |
35 | 39 | ||
36 | /* for LCD */ | 40 | /* for LCD */ |
41 | |||
37 | #define S5P6440_SPCON_LCD_SEL_RGB (1 << 0) | 42 | #define S5P6440_SPCON_LCD_SEL_RGB (1 << 0) |
38 | #define S5P6440_SPCON_LCD_SEL_MASK (3 << 0) | 43 | #define S5P6440_SPCON_LCD_SEL_MASK (3 << 0) |
39 | 44 | ||
40 | /* These set of macros are not really useful for the | 45 | /* |
41 | * GPF/GPI/GPJ/GPN/GPP, | 46 | * These set of macros are not really useful for the |
42 | * useful for others set of GPIO's (4 bit) | 47 | * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit) |
43 | */ | 48 | */ |
49 | |||
44 | #define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | 50 | #define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4)) |
45 | #define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | 51 | #define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4)) |
46 | #define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | 52 | #define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) |
47 | 53 | ||
48 | /* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit) | 54 | /* |
49 | * */ | 55 | * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit) |
56 | */ | ||
57 | |||
50 | #define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | 58 | #define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) |
51 | #define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | 59 | #define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2)) |
52 | #define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | 60 | #define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) |
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h index a961f4beeb0c..4aaebdace55f 100644 --- a/arch/arm/mach-s5p6440/include/mach/regs-irq.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - IRQ register definitions | 6 | * S5P64X0 - IRQ register definitions |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h new file mode 100644 index 000000000000..ff85b4b6e8d9 --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | |||
@@ -0,0 +1,46 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for s5p64x0 clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_CLOCK_H | ||
14 | #define __ASM_ARCH_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <linux/clk.h> | ||
17 | |||
18 | extern struct clksrc_clk clk_mout_apll; | ||
19 | extern struct clksrc_clk clk_mout_mpll; | ||
20 | extern struct clksrc_clk clk_mout_epll; | ||
21 | |||
22 | extern int s5p64x0_epll_enable(struct clk *clk, int enable); | ||
23 | extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); | ||
24 | |||
25 | extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk); | ||
26 | extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate); | ||
27 | extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate); | ||
28 | |||
29 | extern struct clk_ops s5p64x0_clkarm_ops; | ||
30 | |||
31 | extern struct clksrc_clk clk_armclk; | ||
32 | extern struct clksrc_clk clk_dout_mpll; | ||
33 | |||
34 | extern struct clk *clkset_hclk_low_list[]; | ||
35 | extern struct clksrc_sources clkset_hclk_low; | ||
36 | |||
37 | extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); | ||
38 | extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable); | ||
39 | extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable); | ||
40 | extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable); | ||
41 | extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable); | ||
42 | extern int s5p64x0_mem_ctrl(struct clk *clk, int enable); | ||
43 | |||
44 | extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable); | ||
45 | |||
46 | #endif /* __ASM_ARCH_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h new file mode 100644 index 000000000000..170a20a9643a --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SPI_CLKS_H | ||
15 | #define __ASM_ARCH_SPI_CLKS_H __FILE__ | ||
16 | |||
17 | #define S5P64X0_SPI_SRCCLK_PCLK 0 | ||
18 | #define S5P64X0_SPI_SRCCLK_SCLK 1 | ||
19 | |||
20 | #endif /* __ASM_ARCH_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h index a359ee3fa510..60f57532c970 100644 --- a/arch/arm/mach-s5p6440/include/mach/system.h +++ b/arch/arm/mach-s5p64x0/include/mach/system.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/system.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/system.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - system support header | 6 | * S5P64X0 - system support header |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h index 2f25c7f07970..00aa7f1d8e51 100644 --- a/arch/arm/mach-s5p6440/include/mach/tick.h +++ b/arch/arm/mach-s5p64x0/include/mach/tick.h | |||
@@ -1,9 +1,14 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/tick.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/tick.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P6440 - Timer tick support definitions | 6 | * Copyright 2008 Openmoko, Inc. |
7 | * Copyright 2008 Simtec Electronics | ||
8 | * http://armlinux.simtec.co.uk/ | ||
9 | * Ben Dooks <ben@simtec.co.uk> | ||
10 | * | ||
11 | * S5P64X0 - Timer tick support definitions | ||
7 | * | 12 | * |
8 | * This program is free software; you can redistribute it and/or modify | 13 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h index fb2e8cd40829..4b91faa195a8 100644 --- a/arch/arm/mach-s5p6440/include/mach/timex.h +++ b/arch/arm/mach-s5p64x0/include/mach/timex.h | |||
@@ -1,9 +1,12 @@ | |||
1 | /* arch/arm/mach-s3c64xx/include/mach/timex.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/timex.h |
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
2 | * | 5 | * |
3 | * Copyright (c) 2003-2005 Simtec Electronics | 6 | * Copyright (c) 2003-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 7 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | 8 | * |
6 | * S3C6400 - time parameters | 9 | * S5P64X0 - time parameters |
7 | * | 10 | * |
8 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h new file mode 100644 index 000000000000..c65b229aab23 --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h | |||
@@ -0,0 +1,212 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
14 | #define __ASM_ARCH_UNCOMPRESS_H | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | /* | ||
19 | * cannot use commonly <plat/uncompress.h> | ||
20 | * because uart base of S5P6440 and S5P6450 is different | ||
21 | */ | ||
22 | |||
23 | typedef unsigned int upf_t; /* cannot include linux/serial_core.h */ | ||
24 | |||
25 | /* uart setup */ | ||
26 | |||
27 | static unsigned int fifo_mask; | ||
28 | static unsigned int fifo_max; | ||
29 | |||
30 | /* forward declerations */ | ||
31 | |||
32 | static void arch_detect_cpu(void); | ||
33 | |||
34 | /* defines for UART registers */ | ||
35 | |||
36 | #include <plat/regs-serial.h> | ||
37 | #include <plat/regs-watchdog.h> | ||
38 | |||
39 | /* working in physical space... */ | ||
40 | #undef S3C2410_WDOGREG | ||
41 | #define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x))) | ||
42 | |||
43 | /* how many bytes we allow into the FIFO at a time in FIFO mode */ | ||
44 | #define FIFO_MAX (14) | ||
45 | |||
46 | static unsigned long uart_base; | ||
47 | |||
48 | static __inline__ void get_uart_base(void) | ||
49 | { | ||
50 | unsigned int chipid; | ||
51 | |||
52 | chipid = *(const volatile unsigned int __force *) 0xE0100118; | ||
53 | |||
54 | uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT; | ||
55 | |||
56 | if ((chipid & 0xff000) == 0x50000) | ||
57 | uart_base += 0xEC800000; | ||
58 | else | ||
59 | uart_base += 0xEC000000; | ||
60 | } | ||
61 | |||
62 | static __inline__ void uart_wr(unsigned int reg, unsigned int val) | ||
63 | { | ||
64 | volatile unsigned int *ptr; | ||
65 | |||
66 | get_uart_base(); | ||
67 | ptr = (volatile unsigned int *)(reg + uart_base); | ||
68 | *ptr = val; | ||
69 | } | ||
70 | |||
71 | static __inline__ unsigned int uart_rd(unsigned int reg) | ||
72 | { | ||
73 | volatile unsigned int *ptr; | ||
74 | |||
75 | get_uart_base(); | ||
76 | ptr = (volatile unsigned int *)(reg + uart_base); | ||
77 | return *ptr; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * we can deal with the case the UARTs are being run | ||
82 | * in FIFO mode, so that we don't hold up our execution | ||
83 | * waiting for tx to happen... | ||
84 | */ | ||
85 | |||
86 | static void putc(int ch) | ||
87 | { | ||
88 | if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { | ||
89 | int level; | ||
90 | |||
91 | while (1) { | ||
92 | level = uart_rd(S3C2410_UFSTAT); | ||
93 | level &= fifo_mask; | ||
94 | |||
95 | if (level < fifo_max) | ||
96 | break; | ||
97 | } | ||
98 | |||
99 | } else { | ||
100 | /* not using fifos */ | ||
101 | |||
102 | while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE) | ||
103 | barrier(); | ||
104 | } | ||
105 | |||
106 | /* write byte to transmission register */ | ||
107 | uart_wr(S3C2410_UTXH, ch); | ||
108 | } | ||
109 | |||
110 | static inline void flush(void) | ||
111 | { | ||
112 | } | ||
113 | |||
114 | #define __raw_writel(d, ad) \ | ||
115 | do { \ | ||
116 | *((volatile unsigned int __force *)(ad)) = (d); \ | ||
117 | } while (0) | ||
118 | |||
119 | /* | ||
120 | * CONFIG_S3C_BOOT_WATCHDOG | ||
121 | * | ||
122 | * Simple boot-time watchdog setup, to reboot the system if there is | ||
123 | * any problem with the boot process | ||
124 | */ | ||
125 | |||
126 | #ifdef CONFIG_S3C_BOOT_WATCHDOG | ||
127 | |||
128 | #define WDOG_COUNT (0xff00) | ||
129 | |||
130 | static inline void arch_decomp_wdog(void) | ||
131 | { | ||
132 | __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
133 | } | ||
134 | |||
135 | static void arch_decomp_wdog_start(void) | ||
136 | { | ||
137 | __raw_writel(WDOG_COUNT, S3C2410_WTDAT); | ||
138 | __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
139 | __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); | ||
140 | } | ||
141 | |||
142 | #else | ||
143 | #define arch_decomp_wdog_start() | ||
144 | #define arch_decomp_wdog() | ||
145 | #endif | ||
146 | |||
147 | #ifdef CONFIG_S3C_BOOT_ERROR_RESET | ||
148 | |||
149 | static void arch_decomp_error(const char *x) | ||
150 | { | ||
151 | putstr("\n\n"); | ||
152 | putstr(x); | ||
153 | putstr("\n\n -- System resetting\n"); | ||
154 | |||
155 | __raw_writel(0x4000, S3C2410_WTDAT); | ||
156 | __raw_writel(0x4000, S3C2410_WTCNT); | ||
157 | __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); | ||
158 | |||
159 | while(1); | ||
160 | } | ||
161 | |||
162 | #define arch_error arch_decomp_error | ||
163 | #endif | ||
164 | |||
165 | #ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO | ||
166 | static inline void arch_enable_uart_fifo(void) | ||
167 | { | ||
168 | u32 fifocon = uart_rd(S3C2410_UFCON); | ||
169 | |||
170 | if (!(fifocon & S3C2410_UFCON_FIFOMODE)) { | ||
171 | fifocon |= S3C2410_UFCON_RESETBOTH; | ||
172 | uart_wr(S3C2410_UFCON, fifocon); | ||
173 | |||
174 | /* wait for fifo reset to complete */ | ||
175 | while (1) { | ||
176 | fifocon = uart_rd(S3C2410_UFCON); | ||
177 | if (!(fifocon & S3C2410_UFCON_RESETBOTH)) | ||
178 | break; | ||
179 | } | ||
180 | } | ||
181 | } | ||
182 | #else | ||
183 | #define arch_enable_uart_fifo() do { } while(0) | ||
184 | #endif | ||
185 | |||
186 | static void arch_decomp_setup(void) | ||
187 | { | ||
188 | /* | ||
189 | * we may need to setup the uart(s) here if we are not running | ||
190 | * on an BAST... the BAST will have left the uarts configured | ||
191 | * after calling linux. | ||
192 | */ | ||
193 | |||
194 | arch_detect_cpu(); | ||
195 | arch_decomp_wdog_start(); | ||
196 | |||
197 | /* | ||
198 | * Enable the UART FIFOs if they where not enabled and our | ||
199 | * configuration says we should turn them on. | ||
200 | */ | ||
201 | |||
202 | arch_enable_uart_fifo(); | ||
203 | } | ||
204 | |||
205 | |||
206 | |||
207 | static void arch_detect_cpu(void) | ||
208 | { | ||
209 | /* we do not need to do any cpu detection here at the moment. */ | ||
210 | } | ||
211 | |||
212 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h index e3f0eebf5205..97a9df38f1cf 100644 --- a/arch/arm/mach-s5p6440/include/mach/vmalloc.h +++ b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h | |||
@@ -1,4 +1,7 @@ | |||
1 | /* arch/arm/mach-s5p6440/include/mach/vmalloc.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h |
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
2 | * | 5 | * |
3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | 6 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> |
4 | * | 7 | * |
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c new file mode 100644 index 000000000000..79833caf8165 --- /dev/null +++ b/arch/arm/mach-s5p64x0/init.c | |||
@@ -0,0 +1,73 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/init.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Init support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/serial_core.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | |||
20 | #include <plat/cpu.h> | ||
21 | #include <plat/devs.h> | ||
22 | #include <plat/s5p6440.h> | ||
23 | #include <plat/s5p6450.h> | ||
24 | #include <plat/regs-serial.h> | ||
25 | |||
26 | static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = { | ||
27 | [0] = { | ||
28 | .name = "pclk_low", | ||
29 | .divisor = 1, | ||
30 | .min_baud = 0, | ||
31 | .max_baud = 0, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .name = "uclk1", | ||
35 | .divisor = 1, | ||
36 | .min_baud = 0, | ||
37 | .max_baud = 0, | ||
38 | }, | ||
39 | }; | ||
40 | |||
41 | /* uart registration process */ | ||
42 | |||
43 | void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
44 | { | ||
45 | struct s3c2410_uartcfg *tcfg = cfg; | ||
46 | u32 ucnt; | ||
47 | |||
48 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
49 | if (!tcfg->clocks) { | ||
50 | tcfg->clocks = s5p64x0_serial_clocks; | ||
51 | tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks); | ||
52 | } | ||
53 | } | ||
54 | } | ||
55 | |||
56 | void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
57 | { | ||
58 | int uart; | ||
59 | |||
60 | for (uart = 0; uart < no; uart++) { | ||
61 | s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); | ||
62 | s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; | ||
63 | } | ||
64 | |||
65 | s5p64x0_common_init_uarts(cfg, no); | ||
66 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
67 | } | ||
68 | |||
69 | void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
70 | { | ||
71 | s5p64x0_common_init_uarts(cfg, no); | ||
72 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); | ||
73 | } | ||
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 9202aaac3b56..28de0a57208c 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/mach-smdk6440.c | 1 | /* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -21,21 +21,22 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/gpio.h> | ||
24 | 25 | ||
25 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
26 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
28 | #include <asm/irq.h> | ||
29 | #include <asm/mach-types.h> | ||
27 | 30 | ||
28 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
29 | #include <mach/map.h> | 32 | #include <mach/map.h> |
30 | 33 | #include <mach/regs-clock.h> | |
31 | #include <asm/irq.h> | 34 | #include <mach/i2c.h> |
32 | #include <asm/mach-types.h> | ||
33 | 35 | ||
34 | #include <plat/regs-serial.h> | 36 | #include <plat/regs-serial.h> |
35 | 37 | #include <plat/gpio-cfg.h> | |
36 | #include <plat/s5p6440.h> | 38 | #include <plat/s5p6440.h> |
37 | #include <plat/clock.h> | 39 | #include <plat/clock.h> |
38 | #include <mach/regs-clock.h> | ||
39 | #include <plat/devs.h> | 40 | #include <plat/devs.h> |
40 | #include <plat/cpu.h> | 41 | #include <plat/cpu.h> |
41 | #include <plat/iic.h> | 42 | #include <plat/iic.h> |
@@ -58,43 +59,60 @@ | |||
58 | 59 | ||
59 | static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | 60 | static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { |
60 | [0] = { | 61 | [0] = { |
61 | .hwport = 0, | 62 | .hwport = 0, |
62 | .flags = 0, | 63 | .flags = 0, |
63 | .ucon = SMDK6440_UCON_DEFAULT, | 64 | .ucon = SMDK6440_UCON_DEFAULT, |
64 | .ulcon = SMDK6440_ULCON_DEFAULT, | 65 | .ulcon = SMDK6440_ULCON_DEFAULT, |
65 | .ufcon = SMDK6440_UFCON_DEFAULT, | 66 | .ufcon = SMDK6440_UFCON_DEFAULT, |
66 | }, | 67 | }, |
67 | [1] = { | 68 | [1] = { |
68 | .hwport = 1, | 69 | .hwport = 1, |
69 | .flags = 0, | 70 | .flags = 0, |
70 | .ucon = SMDK6440_UCON_DEFAULT, | 71 | .ucon = SMDK6440_UCON_DEFAULT, |
71 | .ulcon = SMDK6440_ULCON_DEFAULT, | 72 | .ulcon = SMDK6440_ULCON_DEFAULT, |
72 | .ufcon = SMDK6440_UFCON_DEFAULT, | 73 | .ufcon = SMDK6440_UFCON_DEFAULT, |
73 | }, | 74 | }, |
74 | [2] = { | 75 | [2] = { |
75 | .hwport = 2, | 76 | .hwport = 2, |
76 | .flags = 0, | 77 | .flags = 0, |
77 | .ucon = SMDK6440_UCON_DEFAULT, | 78 | .ucon = SMDK6440_UCON_DEFAULT, |
78 | .ulcon = SMDK6440_ULCON_DEFAULT, | 79 | .ulcon = SMDK6440_ULCON_DEFAULT, |
79 | .ufcon = SMDK6440_UFCON_DEFAULT, | 80 | .ufcon = SMDK6440_UFCON_DEFAULT, |
80 | }, | 81 | }, |
81 | [3] = { | 82 | [3] = { |
82 | .hwport = 3, | 83 | .hwport = 3, |
83 | .flags = 0, | 84 | .flags = 0, |
84 | .ucon = SMDK6440_UCON_DEFAULT, | 85 | .ucon = SMDK6440_UCON_DEFAULT, |
85 | .ulcon = SMDK6440_ULCON_DEFAULT, | 86 | .ulcon = SMDK6440_ULCON_DEFAULT, |
86 | .ufcon = SMDK6440_UFCON_DEFAULT, | 87 | .ufcon = SMDK6440_UFCON_DEFAULT, |
87 | }, | 88 | }, |
88 | }; | 89 | }; |
89 | 90 | ||
90 | static struct platform_device *smdk6440_devices[] __initdata = { | 91 | static struct platform_device *smdk6440_devices[] __initdata = { |
91 | &s5p6440_device_iis, | ||
92 | &s3c_device_adc, | 92 | &s3c_device_adc, |
93 | &s3c_device_rtc, | 93 | &s3c_device_rtc, |
94 | &s3c_device_i2c0, | 94 | &s3c_device_i2c0, |
95 | &s3c_device_i2c1, | 95 | &s3c_device_i2c1, |
96 | &s3c_device_ts, | 96 | &s3c_device_ts, |
97 | &s3c_device_wdt, | 97 | &s3c_device_wdt, |
98 | &s5p6440_device_iis, | ||
99 | }; | ||
100 | |||
101 | static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { | ||
102 | .flags = 0, | ||
103 | .slave_addr = 0x10, | ||
104 | .frequency = 100*1000, | ||
105 | .sda_delay = 100, | ||
106 | .cfg_gpio = s5p6440_i2c0_cfg_gpio, | ||
107 | }; | ||
108 | |||
109 | static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = { | ||
110 | .flags = 0, | ||
111 | .bus_num = 1, | ||
112 | .slave_addr = 0x10, | ||
113 | .frequency = 100*1000, | ||
114 | .sda_delay = 100, | ||
115 | .cfg_gpio = s5p6440_i2c1_cfg_gpio, | ||
98 | }; | 116 | }; |
99 | 117 | ||
100 | static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = { | 118 | static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = { |
@@ -113,7 +131,7 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | |||
113 | 131 | ||
114 | static void __init smdk6440_map_io(void) | 132 | static void __init smdk6440_map_io(void) |
115 | { | 133 | { |
116 | s5p_init_io(NULL, 0, S5P_SYS_ID); | 134 | s5p_init_io(NULL, 0, S5P64X0_SYS_ID); |
117 | s3c24xx_init_clocks(12000000); | 135 | s3c24xx_init_clocks(12000000); |
118 | s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); | 136 | s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); |
119 | } | 137 | } |
@@ -122,9 +140,8 @@ static void __init smdk6440_machine_init(void) | |||
122 | { | 140 | { |
123 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | 141 | s3c24xx_ts_set_platdata(&s3c_ts_platform); |
124 | 142 | ||
125 | /* I2C */ | 143 | s3c_i2c0_set_platdata(&s5p6440_i2c0_data); |
126 | s3c_i2c0_set_platdata(NULL); | 144 | s3c_i2c1_set_platdata(&s5p6440_i2c1_data); |
127 | s3c_i2c1_set_platdata(NULL); | ||
128 | i2c_register_board_info(0, smdk6440_i2c_devs0, | 145 | i2c_register_board_info(0, smdk6440_i2c_devs0, |
129 | ARRAY_SIZE(smdk6440_i2c_devs0)); | 146 | ARRAY_SIZE(smdk6440_i2c_devs0)); |
130 | i2c_register_board_info(1, smdk6440_i2c_devs1, | 147 | i2c_register_board_info(1, smdk6440_i2c_devs1, |
@@ -135,9 +152,9 @@ static void __init smdk6440_machine_init(void) | |||
135 | 152 | ||
136 | MACHINE_START(SMDK6440, "SMDK6440") | 153 | MACHINE_START(SMDK6440, "SMDK6440") |
137 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | 154 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ |
138 | .phys_io = S3C_PA_UART & 0xfff00000, | 155 | .phys_io = S5P6440_PA_UART(0) & 0xfff00000, |
139 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | 156 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, |
140 | .boot_params = S5P_PA_SDRAM + 0x100, | 157 | .boot_params = S5P64X0_PA_SDRAM + 0x100, |
141 | 158 | ||
142 | .init_irq = s5p6440_init_irq, | 159 | .init_irq = s5p6440_init_irq, |
143 | .map_io = smdk6440_map_io, | 160 | .map_io = smdk6440_map_io, |
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c new file mode 100644 index 000000000000..8e982171418b --- /dev/null +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c | |||
@@ -0,0 +1,182 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/i2c.h> | ||
19 | #include <linux/serial_core.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/clk.h> | ||
24 | #include <linux/gpio.h> | ||
25 | |||
26 | #include <asm/mach/arch.h> | ||
27 | #include <asm/mach/map.h> | ||
28 | #include <asm/irq.h> | ||
29 | #include <asm/mach-types.h> | ||
30 | |||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/map.h> | ||
33 | #include <mach/regs-clock.h> | ||
34 | #include <mach/i2c.h> | ||
35 | |||
36 | #include <plat/regs-serial.h> | ||
37 | #include <plat/gpio-cfg.h> | ||
38 | #include <plat/s5p6450.h> | ||
39 | #include <plat/clock.h> | ||
40 | #include <plat/devs.h> | ||
41 | #include <plat/cpu.h> | ||
42 | #include <plat/iic.h> | ||
43 | #include <plat/pll.h> | ||
44 | #include <plat/adc.h> | ||
45 | #include <plat/ts.h> | ||
46 | |||
47 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
48 | S3C2410_UCON_RXILEVEL | \ | ||
49 | S3C2410_UCON_TXIRQMODE | \ | ||
50 | S3C2410_UCON_RXIRQMODE | \ | ||
51 | S3C2410_UCON_RXFIFO_TOI | \ | ||
52 | S3C2443_UCON_RXERR_IRQEN) | ||
53 | |||
54 | #define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
55 | |||
56 | #define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
57 | S3C2440_UFCON_TXTRIG16 | \ | ||
58 | S3C2410_UFCON_RXTRIG8) | ||
59 | |||
60 | static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = { | ||
61 | [0] = { | ||
62 | .hwport = 0, | ||
63 | .flags = 0, | ||
64 | .ucon = SMDK6450_UCON_DEFAULT, | ||
65 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
66 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
67 | }, | ||
68 | [1] = { | ||
69 | .hwport = 1, | ||
70 | .flags = 0, | ||
71 | .ucon = SMDK6450_UCON_DEFAULT, | ||
72 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
73 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
74 | }, | ||
75 | [2] = { | ||
76 | .hwport = 2, | ||
77 | .flags = 0, | ||
78 | .ucon = SMDK6450_UCON_DEFAULT, | ||
79 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
80 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
81 | }, | ||
82 | [3] = { | ||
83 | .hwport = 3, | ||
84 | .flags = 0, | ||
85 | .ucon = SMDK6450_UCON_DEFAULT, | ||
86 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
87 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
88 | }, | ||
89 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | ||
90 | [4] = { | ||
91 | .hwport = 4, | ||
92 | .flags = 0, | ||
93 | .ucon = SMDK6450_UCON_DEFAULT, | ||
94 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
95 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
96 | }, | ||
97 | #endif | ||
98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | ||
99 | [5] = { | ||
100 | .hwport = 5, | ||
101 | .flags = 0, | ||
102 | .ucon = SMDK6450_UCON_DEFAULT, | ||
103 | .ulcon = SMDK6450_ULCON_DEFAULT, | ||
104 | .ufcon = SMDK6450_UFCON_DEFAULT, | ||
105 | }, | ||
106 | #endif | ||
107 | }; | ||
108 | |||
109 | static struct platform_device *smdk6450_devices[] __initdata = { | ||
110 | &s3c_device_adc, | ||
111 | &s3c_device_rtc, | ||
112 | &s3c_device_i2c0, | ||
113 | &s3c_device_i2c1, | ||
114 | &s3c_device_ts, | ||
115 | &s3c_device_wdt, | ||
116 | &s5p6450_device_iis0, | ||
117 | /* s5p6450_device_spi0 will be added */ | ||
118 | }; | ||
119 | |||
120 | static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { | ||
121 | .flags = 0, | ||
122 | .slave_addr = 0x10, | ||
123 | .frequency = 100*1000, | ||
124 | .sda_delay = 100, | ||
125 | .cfg_gpio = s5p6450_i2c0_cfg_gpio, | ||
126 | }; | ||
127 | |||
128 | static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = { | ||
129 | .flags = 0, | ||
130 | .bus_num = 1, | ||
131 | .slave_addr = 0x10, | ||
132 | .frequency = 100*1000, | ||
133 | .sda_delay = 100, | ||
134 | .cfg_gpio = s5p6450_i2c1_cfg_gpio, | ||
135 | }; | ||
136 | |||
137 | static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = { | ||
138 | { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */ | ||
139 | }; | ||
140 | |||
141 | static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = { | ||
142 | { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ | ||
143 | }; | ||
144 | |||
145 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
146 | .delay = 10000, | ||
147 | .presc = 49, | ||
148 | .oversampling_shift = 2, | ||
149 | }; | ||
150 | |||
151 | static void __init smdk6450_map_io(void) | ||
152 | { | ||
153 | s5p_init_io(NULL, 0, S5P64X0_SYS_ID); | ||
154 | s3c24xx_init_clocks(19200000); | ||
155 | s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); | ||
156 | } | ||
157 | |||
158 | static void __init smdk6450_machine_init(void) | ||
159 | { | ||
160 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
161 | |||
162 | s3c_i2c0_set_platdata(&s5p6450_i2c0_data); | ||
163 | s3c_i2c1_set_platdata(&s5p6450_i2c1_data); | ||
164 | i2c_register_board_info(0, smdk6450_i2c_devs0, | ||
165 | ARRAY_SIZE(smdk6450_i2c_devs0)); | ||
166 | i2c_register_board_info(1, smdk6450_i2c_devs1, | ||
167 | ARRAY_SIZE(smdk6450_i2c_devs1)); | ||
168 | |||
169 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); | ||
170 | } | ||
171 | |||
172 | MACHINE_START(SMDK6450, "SMDK6450") | ||
173 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
174 | .phys_io = S5P6450_PA_UART(0) & 0xfff00000, | ||
175 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
176 | .boot_params = S5P64X0_PA_SDRAM + 0x100, | ||
177 | |||
178 | .init_irq = s5p6450_init_irq, | ||
179 | .map_io = smdk6450_map_io, | ||
180 | .init_machine = smdk6450_machine_init, | ||
181 | .timer = &s3c24xx_timer, | ||
182 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5p6440/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index 2c99d14f7ac7..dc4cc65a5019 100644 --- a/arch/arm/mach-s5p6440/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c | |||
@@ -1,11 +1,11 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/setup-i2c0.c | 1 | /* linux/arch/arm/mach-s5p64x0/setup-i2c0.c |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * I2C0 GPIO configuration. | 6 | * I2C0 GPIO configuration. |
7 | * | 7 | * |
8 | * Based on plat-s3c64xx/setup-i2c0.c | 8 | * Based on plat-s3c64x0/setup-i2c0.c |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
@@ -14,17 +14,29 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <linux/gpio.h> | ||
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | #include <plat/iic.h> | 22 | #include <plat/iic.h> |
23 | 23 | ||
24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | #include <mach/i2c.h> |
25 | |||
26 | void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) | ||
25 | { | 27 | { |
26 | s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); | 28 | s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); |
27 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); | 29 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); |
28 | s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); | 30 | s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); |
29 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); | 31 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); |
30 | } | 32 | } |
33 | |||
34 | void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) | ||
35 | { | ||
36 | s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); | ||
37 | s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); | ||
38 | s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2)); | ||
39 | s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); | ||
40 | } | ||
41 | |||
42 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } | ||
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index 9a1537f786e0..2edd7912f8e4 100644 --- a/arch/arm/mach-s5p6440/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/setup-i2c1.c | 1 | /* linux/arch/arm/mach-s5p64xx/setup-i2c1.c |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * I2C1 GPIO configuration. | 6 | * I2C1 GPIO configuration. |
7 | * | 7 | * |
@@ -21,10 +21,22 @@ struct platform_device; /* don't need the contents */ | |||
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | #include <plat/iic.h> | 22 | #include <plat/iic.h> |
23 | 23 | ||
24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | 24 | #include <mach/i2c.h> |
25 | |||
26 | void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) | ||
25 | { | 27 | { |
26 | s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); | 28 | s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); |
27 | s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); | 29 | s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); |
28 | s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); | 30 | s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); |
29 | s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); | 31 | s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); |
30 | } | 32 | } |
33 | |||
34 | void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) | ||
35 | { | ||
36 | s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6)); | ||
37 | s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); | ||
38 | s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6)); | ||
39 | s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP); | ||
40 | } | ||
41 | |||
42 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } | ||
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index 251c92ac5b22..fd2708e7d8a9 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
@@ -1,5 +1,8 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/cpu.c | 1 | /* linux/arch/arm/mach-s5pc100/cpu.c |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | 6 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 7 | * Byungho Min <bhmin@samsung.com> |
5 | * | 8 | * |
@@ -21,6 +24,7 @@ | |||
21 | #include <linux/sysdev.h> | 24 | #include <linux/sysdev.h> |
22 | #include <linux/serial_core.h> | 25 | #include <linux/serial_core.h> |
23 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | #include <linux/sched.h> | ||
24 | 28 | ||
25 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
26 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
@@ -56,11 +60,31 @@ static struct map_desc s5pc100_iodesc[] __initdata = { | |||
56 | .length = SZ_16K, | 60 | .length = SZ_16K, |
57 | .type = MT_DEVICE, | 61 | .type = MT_DEVICE, |
58 | }, { | 62 | }, { |
63 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
64 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), | ||
65 | .length = SZ_4K, | ||
66 | .type = MT_DEVICE, | ||
67 | }, { | ||
68 | .virtual = (unsigned long)VA_VIC0, | ||
69 | .pfn = __phys_to_pfn(S5PC100_PA_VIC0), | ||
70 | .length = SZ_16K, | ||
71 | .type = MT_DEVICE, | ||
72 | }, { | ||
73 | .virtual = (unsigned long)VA_VIC1, | ||
74 | .pfn = __phys_to_pfn(S5PC100_PA_VIC1), | ||
75 | .length = SZ_16K, | ||
76 | .type = MT_DEVICE, | ||
77 | }, { | ||
59 | .virtual = (unsigned long)VA_VIC2, | 78 | .virtual = (unsigned long)VA_VIC2, |
60 | .pfn = __phys_to_pfn(S5P_PA_VIC2), | 79 | .pfn = __phys_to_pfn(S5PC100_PA_VIC2), |
61 | .length = SZ_16K, | 80 | .length = SZ_16K, |
62 | .type = MT_DEVICE, | 81 | .type = MT_DEVICE, |
63 | }, { | 82 | }, { |
83 | .virtual = (unsigned long)S3C_VA_UART, | ||
84 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
85 | .length = SZ_512K, | ||
86 | .type = MT_DEVICE, | ||
87 | }, { | ||
64 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | 88 | .virtual = (unsigned long)S5PC100_VA_OTHERS, |
65 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | 89 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), |
66 | .length = SZ_4K, | 90 | .length = SZ_4K, |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 01b9134feff0..8751ef4a6804 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -44,19 +44,16 @@ | |||
44 | #define S5PC100_PA_OTHERS (0xE0200000) | 44 | #define S5PC100_PA_OTHERS (0xE0200000) |
45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) | 45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
46 | 46 | ||
47 | #define S5P_PA_GPIO (0xE0300000) | 47 | #define S5PC100_PA_GPIO (0xE0300000) |
48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | 48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) |
49 | 49 | ||
50 | /* Interrupt */ | 50 | /* Interrupt */ |
51 | #define S5PC100_PA_VIC (0xE4000000) | 51 | #define S5PC100_PA_VIC0 (0xE4000000) |
52 | #define S5PC100_PA_VIC1 (0xE4100000) | ||
53 | #define S5PC100_PA_VIC2 (0xE4200000) | ||
52 | #define S5PC100_VA_VIC S3C_VA_IRQ | 54 | #define S5PC100_VA_VIC S3C_VA_IRQ |
53 | #define S5PC100_PA_VIC_OFFSET 0x100000 | ||
54 | #define S5PC100_VA_VIC_OFFSET 0x10000 | 55 | #define S5PC100_VA_VIC_OFFSET 0x10000 |
55 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | ||
56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | 56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) |
57 | #define S5P_PA_VIC0 S5PC1XX_PA_VIC(0) | ||
58 | #define S5P_PA_VIC1 S5PC1XX_PA_VIC(1) | ||
59 | #define S5P_PA_VIC2 S5PC1XX_PA_VIC(2) | ||
60 | 57 | ||
61 | 58 | ||
62 | #define S5PC100_PA_ONENAND (0xE7100000) | 59 | #define S5PC100_PA_ONENAND (0xE7100000) |
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index d3a38955c741..5315fec3db86 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
@@ -53,11 +53,6 @@ config S5PV210_SETUP_SDHCI_GPIO | |||
53 | help | 53 | help |
54 | Common setup code for SDHCI gpio. | 54 | Common setup code for SDHCI gpio. |
55 | 55 | ||
56 | config S5PC110_DEV_ONENAND | ||
57 | bool | ||
58 | help | ||
59 | Compile in platform device definition for OneNAND1 controller | ||
60 | |||
61 | menu "S5PC110 Machines" | 56 | menu "S5PC110 Machines" |
62 | 57 | ||
63 | config MACH_AQUILA | 58 | config MACH_AQUILA |
@@ -71,7 +66,7 @@ config MACH_AQUILA | |||
71 | select S3C_DEV_HSMMC | 66 | select S3C_DEV_HSMMC |
72 | select S3C_DEV_HSMMC1 | 67 | select S3C_DEV_HSMMC1 |
73 | select S3C_DEV_HSMMC2 | 68 | select S3C_DEV_HSMMC2 |
74 | select S5PC110_DEV_ONENAND | 69 | select S5P_DEV_ONENAND |
75 | select S5PV210_SETUP_FB_24BPP | 70 | select S5PV210_SETUP_FB_24BPP |
76 | select S5PV210_SETUP_SDHCI | 71 | select S5PV210_SETUP_SDHCI |
77 | help | 72 | help |
@@ -88,7 +83,7 @@ config MACH_GONI | |||
88 | select S3C_DEV_HSMMC | 83 | select S3C_DEV_HSMMC |
89 | select S3C_DEV_HSMMC1 | 84 | select S3C_DEV_HSMMC1 |
90 | select S3C_DEV_HSMMC2 | 85 | select S3C_DEV_HSMMC2 |
91 | select S5PC110_DEV_ONENAND | 86 | select S5P_DEV_ONENAND |
92 | select S5PV210_SETUP_FB_24BPP | 87 | select S5PV210_SETUP_FB_24BPP |
93 | select S5PV210_SETUP_SDHCI | 88 | select S5PV210_SETUP_SDHCI |
94 | help | 89 | help |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 05048c5aa4c6..704548912408 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -26,7 +26,6 @@ obj-$(CONFIG_MACH_GONI) += mach-goni.o | |||
26 | 26 | ||
27 | obj-y += dev-audio.o | 27 | obj-y += dev-audio.o |
28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
29 | obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | ||
30 | 29 | ||
31 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | 30 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o |
32 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | 31 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o |
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index cfecd70657cb..d562670e1b0b 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -173,11 +173,6 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) | |||
173 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); | 173 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); |
174 | } | 174 | } |
175 | 175 | ||
176 | static int s5pv210_clk_ip4_ctrl(struct clk *clk, int enable) | ||
177 | { | ||
178 | return s5p_gatectrl(S5P_CLKGATE_IP4, clk, enable); | ||
179 | } | ||
180 | |||
181 | static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) | 176 | static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) |
182 | { | 177 | { |
183 | return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); | 178 | return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); |
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 77f456c91ad3..2f16bfc0a116 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/cpu.c | 1 | /* linux/arch/arm/mach-s5pv210/cpu.c |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/sysdev.h> | 20 | #include <linux/sysdev.h> |
21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
22 | #include <linux/sched.h> | ||
22 | 23 | ||
23 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
@@ -50,6 +51,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = { | |||
50 | .length = SZ_4K, | 51 | .length = SZ_4K, |
51 | .type = MT_DEVICE, | 52 | .type = MT_DEVICE, |
52 | }, { | 53 | }, { |
54 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
55 | .pfn = __phys_to_pfn(S5PV210_PA_GPIO), | ||
56 | .length = SZ_4K, | ||
57 | .type = MT_DEVICE, | ||
58 | }, { | ||
59 | .virtual = (unsigned long)VA_VIC0, | ||
60 | .pfn = __phys_to_pfn(S5PV210_PA_VIC0), | ||
61 | .length = SZ_16K, | ||
62 | .type = MT_DEVICE, | ||
63 | }, { | ||
64 | .virtual = (unsigned long)VA_VIC1, | ||
65 | .pfn = __phys_to_pfn(S5PV210_PA_VIC1), | ||
66 | .length = SZ_16K, | ||
67 | .type = MT_DEVICE, | ||
68 | }, { | ||
53 | .virtual = (unsigned long)VA_VIC2, | 69 | .virtual = (unsigned long)VA_VIC2, |
54 | .pfn = __phys_to_pfn(S5PV210_PA_VIC2), | 70 | .pfn = __phys_to_pfn(S5PV210_PA_VIC2), |
55 | .length = SZ_16K, | 71 | .length = SZ_16K, |
@@ -60,6 +76,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = { | |||
60 | .length = SZ_16K, | 76 | .length = SZ_16K, |
61 | .type = MT_DEVICE, | 77 | .type = MT_DEVICE, |
62 | }, { | 78 | }, { |
79 | .virtual = (unsigned long)S3C_VA_UART, | ||
80 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
81 | .length = SZ_512K, | ||
82 | .type = MT_DEVICE, | ||
83 | }, { | ||
63 | .virtual = (unsigned long)S5P_VA_SROMC, | 84 | .virtual = (unsigned long)S5P_VA_SROMC, |
64 | .pfn = __phys_to_pfn(S5PV210_PA_SROMC), | 85 | .pfn = __phys_to_pfn(S5PV210_PA_SROMC), |
65 | .length = SZ_4K, | 86 | .length = SZ_4K, |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index dd4fb6bf14b5..bd9afd52466a 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -17,7 +17,10 @@ | |||
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5PC110_PA_ONENAND (0xB0000000) | 19 | #define S5PC110_PA_ONENAND (0xB0000000) |
20 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
21 | |||
20 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | 22 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) |
23 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | ||
21 | 24 | ||
22 | #define S5PV210_PA_CHIPID (0xE0000000) | 25 | #define S5PV210_PA_CHIPID (0xE0000000) |
23 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | 26 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
@@ -26,7 +29,6 @@ | |||
26 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | 29 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON |
27 | 30 | ||
28 | #define S5PV210_PA_GPIO (0xE0200000) | 31 | #define S5PV210_PA_GPIO (0xE0200000) |
29 | #define S5P_PA_GPIO S5PV210_PA_GPIO | ||
30 | 32 | ||
31 | /* SPI */ | 33 | /* SPI */ |
32 | #define S5PV210_PA_SPI0 0xE1300000 | 34 | #define S5PV210_PA_SPI0 0xE1300000 |
@@ -72,16 +74,9 @@ | |||
72 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | 74 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
73 | 75 | ||
74 | #define S5PV210_PA_VIC0 (0xF2000000) | 76 | #define S5PV210_PA_VIC0 (0xF2000000) |
75 | #define S5P_PA_VIC0 S5PV210_PA_VIC0 | ||
76 | |||
77 | #define S5PV210_PA_VIC1 (0xF2100000) | 77 | #define S5PV210_PA_VIC1 (0xF2100000) |
78 | #define S5P_PA_VIC1 S5PV210_PA_VIC1 | ||
79 | |||
80 | #define S5PV210_PA_VIC2 (0xF2200000) | 78 | #define S5PV210_PA_VIC2 (0xF2200000) |
81 | #define S5P_PA_VIC2 S5PV210_PA_VIC2 | ||
82 | |||
83 | #define S5PV210_PA_VIC3 (0xF2300000) | 79 | #define S5PV210_PA_VIC3 (0xF2300000) |
84 | #define S5P_PA_VIC3 S5PV210_PA_VIC3 | ||
85 | 80 | ||
86 | #define S5PV210_PA_SDRAM (0x20000000) | 81 | #define S5PV210_PA_SDRAM (0x20000000) |
87 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | 82 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM |
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 0dda8012d6b2..bf772de6b0c3 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -477,7 +477,7 @@ static struct platform_device *aquila_devices[] __initdata = { | |||
477 | &aquila_i2c_gpio_pmic, | 477 | &aquila_i2c_gpio_pmic, |
478 | &aquila_device_gpiokeys, | 478 | &aquila_device_gpiokeys, |
479 | &s3c_device_fb, | 479 | &s3c_device_fb, |
480 | &s5pc110_device_onenand, | 480 | &s5p_device_onenand, |
481 | &s3c_device_hsmmc0, | 481 | &s3c_device_hsmmc0, |
482 | &s3c_device_hsmmc1, | 482 | &s3c_device_hsmmc1, |
483 | &s3c_device_hsmmc2, | 483 | &s3c_device_hsmmc2, |
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 53754d7d364e..fdc5cca4eb41 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -456,7 +456,7 @@ static void goni_setup_sdhci(void) | |||
456 | 456 | ||
457 | static struct platform_device *goni_devices[] __initdata = { | 457 | static struct platform_device *goni_devices[] __initdata = { |
458 | &s3c_device_fb, | 458 | &s3c_device_fb, |
459 | &s5pc110_device_onenand, | 459 | &s5p_device_onenand, |
460 | &goni_i2c_gpio_pmic, | 460 | &goni_i2c_gpio_pmic, |
461 | &goni_device_gpiokeys, | 461 | &goni_device_gpiokeys, |
462 | &s5p_device_fimc0, | 462 | &s5p_device_fimc0, |
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index e5b261a99ab2..4add39853ff9 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -31,9 +31,14 @@ extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | |||
31 | /* Initial IO mappings */ | 31 | /* Initial IO mappings */ |
32 | static struct map_desc s5pv310_iodesc[] __initdata = { | 32 | static struct map_desc s5pv310_iodesc[] __initdata = { |
33 | { | 33 | { |
34 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | 34 | .virtual = (unsigned long)S5P_VA_SYSRAM, |
35 | .pfn = __phys_to_pfn(S5PV310_PA_COREPERI), | 35 | .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), |
36 | .length = SZ_8K, | 36 | .length = SZ_4K, |
37 | .type = MT_DEVICE, | ||
38 | }, { | ||
39 | .virtual = (unsigned long)S5P_VA_CMU, | ||
40 | .pfn = __phys_to_pfn(S5PV310_PA_CMU), | ||
41 | .length = SZ_128K, | ||
37 | .type = MT_DEVICE, | 42 | .type = MT_DEVICE, |
38 | }, { | 43 | }, { |
39 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | 44 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, |
@@ -41,19 +46,24 @@ static struct map_desc s5pv310_iodesc[] __initdata = { | |||
41 | .length = SZ_4K, | 46 | .length = SZ_4K, |
42 | .type = MT_DEVICE, | 47 | .type = MT_DEVICE, |
43 | }, { | 48 | }, { |
49 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | ||
50 | .pfn = __phys_to_pfn(S5PV310_PA_COREPERI), | ||
51 | .length = SZ_8K, | ||
52 | .type = MT_DEVICE, | ||
53 | }, { | ||
44 | .virtual = (unsigned long)S5P_VA_L2CC, | 54 | .virtual = (unsigned long)S5P_VA_L2CC, |
45 | .pfn = __phys_to_pfn(S5PV310_PA_L2CC), | 55 | .pfn = __phys_to_pfn(S5PV310_PA_L2CC), |
46 | .length = SZ_4K, | 56 | .length = SZ_4K, |
47 | .type = MT_DEVICE, | 57 | .type = MT_DEVICE, |
48 | }, { | 58 | }, { |
49 | .virtual = (unsigned long)S5P_VA_SYSRAM, | 59 | .virtual = (unsigned long)S5P_VA_GPIO, |
50 | .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), | 60 | .pfn = __phys_to_pfn(S5PV310_PA_GPIO1), |
51 | .length = SZ_4K, | 61 | .length = SZ_4K, |
52 | .type = MT_DEVICE, | 62 | .type = MT_DEVICE, |
53 | }, { | 63 | }, { |
54 | .virtual = (unsigned long)S5P_VA_CMU, | 64 | .virtual = (unsigned long)S3C_VA_UART, |
55 | .pfn = __phys_to_pfn(S5PV310_PA_CMU), | 65 | .pfn = __phys_to_pfn(S3C_PA_UART), |
56 | .length = SZ_128K, | 66 | .length = SZ_512K, |
57 | .type = MT_DEVICE, | 67 | .type = MT_DEVICE, |
58 | }, | 68 | }, |
59 | }; | 69 | }; |
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 4cdedda6e652..471fc3bb199a 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h | |||
@@ -68,6 +68,8 @@ | |||
68 | 68 | ||
69 | #define IRQ_IIC COMBINER_IRQ(27, 0) | 69 | #define IRQ_IIC COMBINER_IRQ(27, 0) |
70 | 70 | ||
71 | #define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) | ||
72 | |||
71 | /* Set the default NR_IRQS */ | 73 | /* Set the default NR_IRQS */ |
72 | 74 | ||
73 | #define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) | 75 | #define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) |
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 213e1101a3b3..aff6d23624bb 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h | |||
@@ -25,6 +25,12 @@ | |||
25 | 25 | ||
26 | #define S5PV310_PA_SYSRAM (0x02025000) | 26 | #define S5PV310_PA_SYSRAM (0x02025000) |
27 | 27 | ||
28 | #define S5PC210_PA_ONENAND (0x0C000000) | ||
29 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | ||
30 | |||
31 | #define S5PC210_PA_ONENAND_DMA (0x0C600000) | ||
32 | #define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA | ||
33 | |||
28 | #define S5PV310_PA_CHIPID (0x10000000) | 34 | #define S5PV310_PA_CHIPID (0x10000000) |
29 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | 35 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID |
30 | 36 | ||
@@ -46,7 +52,6 @@ | |||
46 | #define S5PV310_PA_GPIO1 (0x11400000) | 52 | #define S5PV310_PA_GPIO1 (0x11400000) |
47 | #define S5PV310_PA_GPIO2 (0x11000000) | 53 | #define S5PV310_PA_GPIO2 (0x11000000) |
48 | #define S5PV310_PA_GPIO3 (0x03860000) | 54 | #define S5PV310_PA_GPIO3 (0x03860000) |
49 | #define S5P_PA_GPIO S5PV310_PA_GPIO1 | ||
50 | 55 | ||
51 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | 56 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) |
52 | 57 | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index efb127022d42..71fb17349520 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -68,7 +68,7 @@ static void __init ct_ca9x4_init_irq(void) | |||
68 | } | 68 | } |
69 | 69 | ||
70 | #if 0 | 70 | #if 0 |
71 | static void ct_ca9x4_timer_init(void) | 71 | static void __init ct_ca9x4_timer_init(void) |
72 | { | 72 | { |
73 | writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL); | 73 | writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL); |
74 | writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL); | 74 | writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL); |
@@ -222,7 +222,7 @@ static struct platform_device pmu_device = { | |||
222 | .resource = pmu_resources, | 222 | .resource = pmu_resources, |
223 | }; | 223 | }; |
224 | 224 | ||
225 | static void ct_ca9x4_init(void) | 225 | static void __init ct_ca9x4_init(void) |
226 | { | 226 | { |
227 | int i; | 227 | int i; |
228 | 228 | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 817f0ad38a0b..7eaa232180a5 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -48,7 +48,7 @@ void __init v2m_map_io(struct map_desc *tile, size_t num) | |||
48 | } | 48 | } |
49 | 49 | ||
50 | 50 | ||
51 | static void v2m_timer_init(void) | 51 | static void __init v2m_timer_init(void) |
52 | { | 52 | { |
53 | writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); | 53 | writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); |
54 | writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); | 54 | writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index ab506272b2d3..17e7b0b57e49 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -204,8 +204,12 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, | |||
204 | /* | 204 | /* |
205 | * Don't allow RAM to be mapped - this causes problems with ARMv6+ | 205 | * Don't allow RAM to be mapped - this causes problems with ARMv6+ |
206 | */ | 206 | */ |
207 | if (WARN_ON(pfn_valid(pfn))) | 207 | if (pfn_valid(pfn)) { |
208 | return NULL; | 208 | printk(KERN_WARNING "BUG: Your driver calls ioremap() on system memory. This leads\n" |
209 | KERN_WARNING "to architecturally unpredictable behaviour on ARMv6+, and ioremap()\n" | ||
210 | KERN_WARNING "will fail in the next kernel release. Please fix your driver.\n"); | ||
211 | WARN_ON(1); | ||
212 | } | ||
209 | 213 | ||
210 | type = get_mem_type(mtype); | 214 | type = get_mem_type(mtype); |
211 | if (!type) | 215 | if (!type) |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 6a3a2d0cd6db..e8ed9dc461fe 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -248,7 +248,7 @@ static struct mem_type mem_types[] = { | |||
248 | }, | 248 | }, |
249 | [MT_MEMORY] = { | 249 | [MT_MEMORY] = { |
250 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | | 250 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | |
251 | L_PTE_USER | L_PTE_EXEC, | 251 | L_PTE_WRITE | L_PTE_EXEC, |
252 | .prot_l1 = PMD_TYPE_TABLE, | 252 | .prot_l1 = PMD_TYPE_TABLE, |
253 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, | 253 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, |
254 | .domain = DOMAIN_KERNEL, | 254 | .domain = DOMAIN_KERNEL, |
@@ -259,7 +259,7 @@ static struct mem_type mem_types[] = { | |||
259 | }, | 259 | }, |
260 | [MT_MEMORY_NONCACHED] = { | 260 | [MT_MEMORY_NONCACHED] = { |
261 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | | 261 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | |
262 | L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE, | 262 | L_PTE_WRITE | L_PTE_EXEC | L_PTE_MT_BUFFERABLE, |
263 | .prot_l1 = PMD_TYPE_TABLE, | 263 | .prot_l1 = PMD_TYPE_TABLE, |
264 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, | 264 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, |
265 | .domain = DOMAIN_KERNEL, | 265 | .domain = DOMAIN_KERNEL, |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 7563ff0141bd..197f21bed5e9 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -253,6 +253,14 @@ __v7_setup: | |||
253 | orreq r10, r10, #1 << 22 @ set bit #22 | 253 | orreq r10, r10, #1 << 22 @ set bit #22 |
254 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 254 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
255 | #endif | 255 | #endif |
256 | #ifdef CONFIG_ARM_ERRATA_743622 | ||
257 | teq r6, #0x20 @ present in r2p0 | ||
258 | teqne r6, #0x21 @ present in r2p1 | ||
259 | teqne r6, #0x22 @ present in r2p2 | ||
260 | mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register | ||
261 | orreq r10, r10, #1 << 6 @ set bit #6 | ||
262 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | ||
263 | #endif | ||
256 | 264 | ||
257 | 3: mov r10, #0 | 265 | 3: mov r10, #0 |
258 | #ifdef HARVARD_CACHE | 266 | #ifdef HARVARD_CACHE |
@@ -365,7 +373,7 @@ __v7_ca9mp_proc_info: | |||
365 | b __v7_ca9mp_setup | 373 | b __v7_ca9mp_setup |
366 | .long cpu_arch_name | 374 | .long cpu_arch_name |
367 | .long cpu_elf_name | 375 | .long cpu_elf_name |
368 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | 376 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS |
369 | .long cpu_v7_name | 377 | .long cpu_v7_name |
370 | .long v7_processor_functions | 378 | .long v7_processor_functions |
371 | .long v7wbi_tlb_fns | 379 | .long v7wbi_tlb_fns |
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index a202a2ce6e3d..6cd151b31bc5 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
@@ -320,6 +320,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da) | |||
320 | if ((start <= da) && (da < start + bytes)) { | 320 | if ((start <= da) && (da < start + bytes)) { |
321 | dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", | 321 | dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", |
322 | __func__, start, da, bytes); | 322 | __func__, start, da, bytes); |
323 | iotlb_load_cr(obj, &cr); | ||
323 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); | 324 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
324 | } | 325 | } |
325 | } | 326 | } |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index c6a855db2fb6..25960966af7c 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | config PLAT_S5P | 8 | config PLAT_S5P |
9 | bool | 9 | bool |
10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310) | 10 | depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310) |
11 | default y | 11 | default y |
12 | select ARM_VIC if !ARCH_S5PV310 | 12 | select ARM_VIC if !ARCH_S5PV310 |
13 | select ARM_GIC if ARCH_S5PV310 | 13 | select ARM_GIC if ARCH_S5PV310 |
@@ -30,7 +30,7 @@ config S5P_EXT_INT | |||
30 | bool | 30 | bool |
31 | help | 31 | help |
32 | Use the external interrupts (other than GPIO interrupts.) | 32 | Use the external interrupts (other than GPIO interrupts.) |
33 | Note: Do not choose this for S5P6440. | 33 | Note: Do not choose this for S5P6440 and S5P6450. |
34 | 34 | ||
35 | config S5P_DEV_FIMC0 | 35 | config S5P_DEV_FIMC0 |
36 | bool | 36 | bool |
@@ -46,3 +46,8 @@ config S5P_DEV_FIMC2 | |||
46 | bool | 46 | bool |
47 | help | 47 | help |
48 | Compile in platform device definitions for FIMC controller 2 | 48 | Compile in platform device definitions for FIMC controller 2 |
49 | |||
50 | config S5P_DEV_ONENAND | ||
51 | bool | ||
52 | help | ||
53 | Compile in platform device definition for OneNAND controller | ||
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index b2e029673950..f3e917e27da8 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
@@ -24,3 +24,4 @@ obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | |||
24 | obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o | 24 | obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o |
25 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o | 25 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o |
26 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o | 26 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o |
27 | obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o | ||
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index b5e255265f20..8aaf4e6b60c3 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c | |||
@@ -74,6 +74,13 @@ struct clk clk_fout_epll = { | |||
74 | .ctrlbit = (1 << 31), | 74 | .ctrlbit = (1 << 31), |
75 | }; | 75 | }; |
76 | 76 | ||
77 | /* DPLL clock output */ | ||
78 | struct clk clk_fout_dpll = { | ||
79 | .name = "fout_dpll", | ||
80 | .id = -1, | ||
81 | .ctrlbit = (1 << 31), | ||
82 | }; | ||
83 | |||
77 | /* VPLL clock output */ | 84 | /* VPLL clock output */ |
78 | struct clk clk_fout_vpll = { | 85 | struct clk clk_fout_vpll = { |
79 | .name = "fout_vpll", | 86 | .name = "fout_vpll", |
@@ -122,6 +129,17 @@ struct clksrc_sources clk_src_epll = { | |||
122 | .nr_sources = ARRAY_SIZE(clk_src_epll_list), | 129 | .nr_sources = ARRAY_SIZE(clk_src_epll_list), |
123 | }; | 130 | }; |
124 | 131 | ||
132 | /* Possible clock sources for DPLL Mux */ | ||
133 | static struct clk *clk_src_dpll_list[] = { | ||
134 | [0] = &clk_fin_dpll, | ||
135 | [1] = &clk_fout_dpll, | ||
136 | }; | ||
137 | |||
138 | struct clksrc_sources clk_src_dpll = { | ||
139 | .sources = clk_src_dpll_list, | ||
140 | .nr_sources = ARRAY_SIZE(clk_src_dpll_list), | ||
141 | }; | ||
142 | |||
125 | struct clk clk_vpll = { | 143 | struct clk clk_vpll = { |
126 | .name = "vpll", | 144 | .name = "vpll", |
127 | .id = -1, | 145 | .id = -1, |
@@ -145,6 +163,7 @@ static struct clk *s5p_clks[] __initdata = { | |||
145 | &clk_fout_apll, | 163 | &clk_fout_apll, |
146 | &clk_fout_mpll, | 164 | &clk_fout_mpll, |
147 | &clk_fout_epll, | 165 | &clk_fout_epll, |
166 | &clk_fout_dpll, | ||
148 | &clk_fout_vpll, | 167 | &clk_fout_vpll, |
149 | &clk_arm, | 168 | &clk_arm, |
150 | &clk_vpll, | 169 | &clk_vpll, |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index b07a078fd284..74f7f5a5446c 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
20 | #include <plat/s5p6440.h> | 20 | #include <plat/s5p6440.h> |
21 | #include <plat/s5p6442.h> | 21 | #include <plat/s5p6442.h> |
22 | #include <plat/s5p6450.h> | ||
22 | #include <plat/s5pc100.h> | 23 | #include <plat/s5pc100.h> |
23 | #include <plat/s5pv210.h> | 24 | #include <plat/s5pv210.h> |
24 | #include <plat/s5pv310.h> | 25 | #include <plat/s5pv310.h> |
@@ -27,6 +28,7 @@ | |||
27 | 28 | ||
28 | static const char name_s5p6440[] = "S5P6440"; | 29 | static const char name_s5p6440[] = "S5P6440"; |
29 | static const char name_s5p6442[] = "S5P6442"; | 30 | static const char name_s5p6442[] = "S5P6442"; |
31 | static const char name_s5p6450[] = "S5P6450"; | ||
30 | static const char name_s5pc100[] = "S5PC100"; | 32 | static const char name_s5pc100[] = "S5PC100"; |
31 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 33 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
32 | static const char name_s5pv310[] = "S5PV310"; | 34 | static const char name_s5pv310[] = "S5PV310"; |
@@ -38,7 +40,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
38 | .map_io = s5p6440_map_io, | 40 | .map_io = s5p6440_map_io, |
39 | .init_clocks = s5p6440_init_clocks, | 41 | .init_clocks = s5p6440_init_clocks, |
40 | .init_uarts = s5p6440_init_uarts, | 42 | .init_uarts = s5p6440_init_uarts, |
41 | .init = s5p6440_init, | 43 | .init = s5p64x0_init, |
42 | .name = name_s5p6440, | 44 | .name = name_s5p6440, |
43 | }, { | 45 | }, { |
44 | .idcode = 0x36442000, | 46 | .idcode = 0x36442000, |
@@ -49,6 +51,14 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
49 | .init = s5p6442_init, | 51 | .init = s5p6442_init, |
50 | .name = name_s5p6442, | 52 | .name = name_s5p6442, |
51 | }, { | 53 | }, { |
54 | .idcode = 0x36450000, | ||
55 | .idmask = 0xffffff00, | ||
56 | .map_io = s5p6450_map_io, | ||
57 | .init_clocks = s5p6450_init_clocks, | ||
58 | .init_uarts = s5p6450_init_uarts, | ||
59 | .init = s5p64x0_init, | ||
60 | .name = name_s5p6450, | ||
61 | }, { | ||
52 | .idcode = 0x43100000, | 62 | .idcode = 0x43100000, |
53 | .idmask = 0xfffff000, | 63 | .idmask = 0xfffff000, |
54 | .map_io = s5pc100_map_io, | 64 | .map_io = s5pc100_map_io, |
@@ -89,33 +99,11 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
89 | .length = SZ_64K, | 99 | .length = SZ_64K, |
90 | .type = MT_DEVICE, | 100 | .type = MT_DEVICE, |
91 | }, { | 101 | }, { |
92 | .virtual = (unsigned long)S3C_VA_UART, | ||
93 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
94 | .length = SZ_512K, | ||
95 | .type = MT_DEVICE, | ||
96 | #ifdef CONFIG_ARM_VIC | ||
97 | }, { | ||
98 | .virtual = (unsigned long)VA_VIC0, | ||
99 | .pfn = __phys_to_pfn(S5P_PA_VIC0), | ||
100 | .length = SZ_16K, | ||
101 | .type = MT_DEVICE, | ||
102 | }, { | ||
103 | .virtual = (unsigned long)VA_VIC1, | ||
104 | .pfn = __phys_to_pfn(S5P_PA_VIC1), | ||
105 | .length = SZ_16K, | ||
106 | .type = MT_DEVICE, | ||
107 | #endif | ||
108 | }, { | ||
109 | .virtual = (unsigned long)S3C_VA_TIMER, | 102 | .virtual = (unsigned long)S3C_VA_TIMER, |
110 | .pfn = __phys_to_pfn(S5P_PA_TIMER), | 103 | .pfn = __phys_to_pfn(S5P_PA_TIMER), |
111 | .length = SZ_16K, | 104 | .length = SZ_16K, |
112 | .type = MT_DEVICE, | 105 | .type = MT_DEVICE, |
113 | }, { | 106 | }, { |
114 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
115 | .pfn = __phys_to_pfn(S5P_PA_GPIO), | ||
116 | .length = SZ_4K, | ||
117 | .type = MT_DEVICE, | ||
118 | }, { | ||
119 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | 107 | .virtual = (unsigned long)S3C_VA_WATCHDOG, |
120 | .pfn = __phys_to_pfn(S3C_PA_WDT), | 108 | .pfn = __phys_to_pfn(S3C_PA_WDT), |
121 | .length = SZ_4K, | 109 | .length = SZ_4K, |
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/plat-s5p/dev-onenand.c index f8ede33ee82b..6db926202caa 100644 --- a/arch/arm/mach-s5pv210/dev-onenand.c +++ b/arch/arm/plat-s5p/dev-onenand.c | |||
@@ -1,10 +1,12 @@ | |||
1 | /* | 1 | /* linux/arch/arm/plat-s5p/dev-onenand.c |
2 | * linux/arch/arm/mach-s5pv210/dev-onenand.c | 2 | * |
3 | * Copyright 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
3 | * | 5 | * |
4 | * Copyright (c) 2008-2010 Samsung Electronics | 6 | * Copyright (c) 2008-2010 Samsung Electronics |
5 | * Kyungmin Park <kyungmin.park@samsung.com> | 7 | * Kyungmin Park <kyungmin.park@samsung.com> |
6 | * | 8 | * |
7 | * S5PC110 series device definition for OneNAND devices | 9 | * S5P series device definition for OneNAND devices |
8 | * | 10 | * |
9 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
@@ -19,15 +21,15 @@ | |||
19 | #include <mach/irqs.h> | 21 | #include <mach/irqs.h> |
20 | #include <mach/map.h> | 22 | #include <mach/map.h> |
21 | 23 | ||
22 | static struct resource s5pc110_onenand_resources[] = { | 24 | static struct resource s5p_onenand_resources[] = { |
23 | [0] = { | 25 | [0] = { |
24 | .start = S5PC110_PA_ONENAND, | 26 | .start = S5P_PA_ONENAND, |
25 | .end = S5PC110_PA_ONENAND + SZ_128K - 1, | 27 | .end = S5P_PA_ONENAND + SZ_128K - 1, |
26 | .flags = IORESOURCE_MEM, | 28 | .flags = IORESOURCE_MEM, |
27 | }, | 29 | }, |
28 | [1] = { | 30 | [1] = { |
29 | .start = S5PC110_PA_ONENAND_DMA, | 31 | .start = S5P_PA_ONENAND_DMA, |
30 | .end = S5PC110_PA_ONENAND_DMA + SZ_8K - 1, | 32 | .end = S5P_PA_ONENAND_DMA + SZ_8K - 1, |
31 | .flags = IORESOURCE_MEM, | 33 | .flags = IORESOURCE_MEM, |
32 | }, | 34 | }, |
33 | [2] = { | 35 | [2] = { |
@@ -37,19 +39,19 @@ static struct resource s5pc110_onenand_resources[] = { | |||
37 | }, | 39 | }, |
38 | }; | 40 | }; |
39 | 41 | ||
40 | struct platform_device s5pc110_device_onenand = { | 42 | struct platform_device s5p_device_onenand = { |
41 | .name = "s5pc110-onenand", | 43 | .name = "s5pc110-onenand", |
42 | .id = -1, | 44 | .id = -1, |
43 | .num_resources = ARRAY_SIZE(s5pc110_onenand_resources), | 45 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), |
44 | .resource = s5pc110_onenand_resources, | 46 | .resource = s5p_onenand_resources, |
45 | }; | 47 | }; |
46 | 48 | ||
47 | void s5pc110_onenand_set_platdata(struct onenand_platform_data *pdata) | 49 | void s5p_onenand_set_platdata(struct onenand_platform_data *pdata) |
48 | { | 50 | { |
49 | struct onenand_platform_data *pd; | 51 | struct onenand_platform_data *pd; |
50 | 52 | ||
51 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | 53 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); |
52 | if (!pd) | 54 | if (!pd) |
53 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | 55 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); |
54 | s5pc110_device_onenand.dev.platform_data = pd; | 56 | s5p_device_onenand.dev.platform_data = pd; |
55 | } | 57 | } |
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c index a89331ef4ae1..6a7342886171 100644 --- a/arch/arm/plat-s5p/dev-uart.c +++ b/arch/arm/plat-s5p/dev-uart.c | |||
@@ -119,6 +119,56 @@ static struct resource s5p_uart3_resource[] = { | |||
119 | #endif | 119 | #endif |
120 | }; | 120 | }; |
121 | 121 | ||
122 | static struct resource s5p_uart4_resource[] = { | ||
123 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | ||
124 | [0] = { | ||
125 | .start = S5P_PA_UART4, | ||
126 | .end = S5P_PA_UART4 + S5P_SZ_UART, | ||
127 | .flags = IORESOURCE_MEM, | ||
128 | }, | ||
129 | [1] = { | ||
130 | .start = IRQ_S5P_UART_RX4, | ||
131 | .end = IRQ_S5P_UART_RX4, | ||
132 | .flags = IORESOURCE_IRQ, | ||
133 | }, | ||
134 | [2] = { | ||
135 | .start = IRQ_S5P_UART_TX4, | ||
136 | .end = IRQ_S5P_UART_TX4, | ||
137 | .flags = IORESOURCE_IRQ, | ||
138 | }, | ||
139 | [3] = { | ||
140 | .start = IRQ_S5P_UART_ERR4, | ||
141 | .end = IRQ_S5P_UART_ERR4, | ||
142 | .flags = IORESOURCE_IRQ, | ||
143 | }, | ||
144 | #endif | ||
145 | }; | ||
146 | |||
147 | static struct resource s5p_uart5_resource[] = { | ||
148 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | ||
149 | [0] = { | ||
150 | .start = S5P_PA_UART5, | ||
151 | .end = S5P_PA_UART5 + S5P_SZ_UART, | ||
152 | .flags = IORESOURCE_MEM, | ||
153 | }, | ||
154 | [1] = { | ||
155 | .start = IRQ_S5P_UART_RX5, | ||
156 | .end = IRQ_S5P_UART_RX5, | ||
157 | .flags = IORESOURCE_IRQ, | ||
158 | }, | ||
159 | [2] = { | ||
160 | .start = IRQ_S5P_UART_TX5, | ||
161 | .end = IRQ_S5P_UART_TX5, | ||
162 | .flags = IORESOURCE_IRQ, | ||
163 | }, | ||
164 | [3] = { | ||
165 | .start = IRQ_S5P_UART_ERR5, | ||
166 | .end = IRQ_S5P_UART_ERR5, | ||
167 | .flags = IORESOURCE_IRQ, | ||
168 | }, | ||
169 | #endif | ||
170 | }; | ||
171 | |||
122 | struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { | 172 | struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { |
123 | [0] = { | 173 | [0] = { |
124 | .resources = s5p_uart0_resource, | 174 | .resources = s5p_uart0_resource, |
@@ -136,4 +186,12 @@ struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { | |||
136 | .resources = s5p_uart3_resource, | 186 | .resources = s5p_uart3_resource, |
137 | .nr_resources = ARRAY_SIZE(s5p_uart3_resource), | 187 | .nr_resources = ARRAY_SIZE(s5p_uart3_resource), |
138 | }, | 188 | }, |
189 | [4] = { | ||
190 | .resources = s5p_uart4_resource, | ||
191 | .nr_resources = ARRAY_SIZE(s5p_uart4_resource), | ||
192 | }, | ||
193 | [5] = { | ||
194 | .resources = s5p_uart5_resource, | ||
195 | .nr_resources = ARRAY_SIZE(s5p_uart5_resource), | ||
196 | }, | ||
139 | }; | 197 | }; |
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h index 4e8fe08cb70d..bf28fadee7ae 100644 --- a/arch/arm/plat-s5p/include/plat/pll.h +++ b/arch/arm/plat-s5p/include/plat/pll.h | |||
@@ -47,6 +47,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, | |||
47 | } | 47 | } |
48 | 48 | ||
49 | #define PLL46XX_KDIV_MASK (0xFFFF) | 49 | #define PLL46XX_KDIV_MASK (0xFFFF) |
50 | #define PLL4650C_KDIV_MASK (0xFFF) | ||
50 | #define PLL46XX_MDIV_MASK (0x1FF) | 51 | #define PLL46XX_MDIV_MASK (0x1FF) |
51 | #define PLL46XX_PDIV_MASK (0x3F) | 52 | #define PLL46XX_PDIV_MASK (0x3F) |
52 | #define PLL46XX_SDIV_MASK (0x7) | 53 | #define PLL46XX_SDIV_MASK (0x7) |
@@ -57,6 +58,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, | |||
57 | enum pll46xx_type_t { | 58 | enum pll46xx_type_t { |
58 | pll_4600, | 59 | pll_4600, |
59 | pll_4650, | 60 | pll_4650, |
61 | pll_4650c, | ||
60 | }; | 62 | }; |
61 | 63 | ||
62 | static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | 64 | static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, |
@@ -72,6 +74,11 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | |||
72 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; | 74 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; |
73 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; | 75 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; |
74 | 76 | ||
77 | if (pll_type == pll_4650c) | ||
78 | kdiv = pll_con1 & PLL4650C_KDIV_MASK; | ||
79 | else | ||
80 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; | ||
81 | |||
75 | tmp = baseclk; | 82 | tmp = baseclk; |
76 | 83 | ||
77 | if (pll_type == pll_4600) { | 84 | if (pll_type == pll_4600) { |
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h index 09418b1101fe..17036c898409 100644 --- a/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h | 1 | /* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h |
2 | * | 2 | * |
3 | * Copyright 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * Header file for s5p clock support | 6 | * Header file for s5p clock support |
7 | * | 7 | * |
@@ -20,6 +20,7 @@ | |||
20 | #define clk_fin_apll clk_ext_xtal_mux | 20 | #define clk_fin_apll clk_ext_xtal_mux |
21 | #define clk_fin_mpll clk_ext_xtal_mux | 21 | #define clk_fin_mpll clk_ext_xtal_mux |
22 | #define clk_fin_epll clk_ext_xtal_mux | 22 | #define clk_fin_epll clk_ext_xtal_mux |
23 | #define clk_fin_dpll clk_ext_xtal_mux | ||
23 | #define clk_fin_vpll clk_ext_xtal_mux | 24 | #define clk_fin_vpll clk_ext_xtal_mux |
24 | #define clk_fin_hpll clk_ext_xtal_mux | 25 | #define clk_fin_hpll clk_ext_xtal_mux |
25 | 26 | ||
@@ -30,6 +31,7 @@ extern struct clk s5p_clk_27m; | |||
30 | extern struct clk clk_fout_apll; | 31 | extern struct clk clk_fout_apll; |
31 | extern struct clk clk_fout_mpll; | 32 | extern struct clk clk_fout_mpll; |
32 | extern struct clk clk_fout_epll; | 33 | extern struct clk clk_fout_epll; |
34 | extern struct clk clk_fout_dpll; | ||
33 | extern struct clk clk_fout_vpll; | 35 | extern struct clk clk_fout_vpll; |
34 | extern struct clk clk_arm; | 36 | extern struct clk clk_arm; |
35 | extern struct clk clk_vpll; | 37 | extern struct clk clk_vpll; |
@@ -37,8 +39,8 @@ extern struct clk clk_vpll; | |||
37 | extern struct clksrc_sources clk_src_apll; | 39 | extern struct clksrc_sources clk_src_apll; |
38 | extern struct clksrc_sources clk_src_mpll; | 40 | extern struct clksrc_sources clk_src_mpll; |
39 | extern struct clksrc_sources clk_src_epll; | 41 | extern struct clksrc_sources clk_src_epll; |
42 | extern struct clksrc_sources clk_src_dpll; | ||
40 | 43 | ||
41 | extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable); | ||
42 | extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); | 44 | extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); |
43 | 45 | ||
44 | #endif /* __ASM_PLAT_S5P_CLOCK_H */ | 46 | #endif /* __ASM_PLAT_S5P_CLOCK_H */ |
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h index a4cd75afeb3b..528585d2cafc 100644 --- a/arch/arm/plat-s5p/include/plat/s5p6440.h +++ b/arch/arm/plat-s5p/include/plat/s5p6440.h | |||
@@ -12,24 +12,23 @@ | |||
12 | 12 | ||
13 | /* Common init code for S5P6440 related SoCs */ | 13 | /* Common init code for S5P6440 related SoCs */ |
14 | 14 | ||
15 | extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5p6440_register_clocks(void); | 15 | extern void s5p6440_register_clocks(void); |
17 | extern void s5p6440_setup_clocks(void); | 16 | extern void s5p6440_setup_clocks(void); |
18 | 17 | ||
19 | #ifdef CONFIG_CPU_S5P6440 | 18 | #ifdef CONFIG_CPU_S5P6440 |
20 | 19 | ||
21 | extern int s5p6440_init(void); | 20 | extern int s5p64x0_init(void); |
22 | extern void s5p6440_init_irq(void); | 21 | extern void s5p6440_init_irq(void); |
23 | extern void s5p6440_map_io(void); | 22 | extern void s5p6440_map_io(void); |
24 | extern void s5p6440_init_clocks(int xtal); | 23 | extern void s5p6440_init_clocks(int xtal); |
25 | 24 | ||
26 | #define s5p6440_init_uarts s5p6440_common_init_uarts | 25 | extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
27 | 26 | ||
28 | #else | 27 | #else |
29 | #define s5p6440_init_clocks NULL | 28 | #define s5p6440_init_clocks NULL |
30 | #define s5p6440_init_uarts NULL | 29 | #define s5p6440_init_uarts NULL |
31 | #define s5p6440_map_io NULL | 30 | #define s5p6440_map_io NULL |
32 | #define s5p6440_init NULL | 31 | #define s5p64x0_init NULL |
33 | #endif | 32 | #endif |
34 | 33 | ||
35 | /* S5P6440 timer */ | 34 | /* S5P6440 timer */ |
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-s5p/include/plat/s5p6450.h new file mode 100644 index 000000000000..640a41c26be3 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5p6450.h | |||
@@ -0,0 +1,36 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5p6450.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for s5p6450 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6450 related SoCs */ | ||
14 | |||
15 | extern void s5p6450_register_clocks(void); | ||
16 | extern void s5p6450_setup_clocks(void); | ||
17 | |||
18 | #ifdef CONFIG_CPU_S5P6450 | ||
19 | |||
20 | extern int s5p64x0_init(void); | ||
21 | extern void s5p6450_init_irq(void); | ||
22 | extern void s5p6450_map_io(void); | ||
23 | extern void s5p6450_init_clocks(int xtal); | ||
24 | |||
25 | extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
26 | |||
27 | #else | ||
28 | #define s5p6450_init_clocks NULL | ||
29 | #define s5p6450_init_uarts NULL | ||
30 | #define s5p6450_map_io NULL | ||
31 | #define s5p64x0_init NULL | ||
32 | #endif | ||
33 | |||
34 | /* S5P6450 timer */ | ||
35 | |||
36 | extern struct sys_timer s5p6450_timer; | ||
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 04d9521ddc9f..e8f2be2d67f2 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
@@ -435,7 +435,6 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | |||
435 | static int s3c_adc_resume(struct platform_device *pdev) | 435 | static int s3c_adc_resume(struct platform_device *pdev) |
436 | { | 436 | { |
437 | struct adc_device *adc = platform_get_drvdata(pdev); | 437 | struct adc_device *adc = platform_get_drvdata(pdev); |
438 | unsigned long flags; | ||
439 | 438 | ||
440 | clk_enable(adc->clk); | 439 | clk_enable(adc->clk); |
441 | enable_irq(adc->irq); | 440 | enable_irq(adc->irq); |
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index 90a20512d68d..e8d20b0bc50e 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c | |||
@@ -48,6 +48,9 @@ | |||
48 | #include <plat/clock.h> | 48 | #include <plat/clock.h> |
49 | #include <plat/cpu.h> | 49 | #include <plat/cpu.h> |
50 | 50 | ||
51 | #include <linux/serial_core.h> | ||
52 | #include <plat/regs-serial.h> /* for s3c24xx_uart_devs */ | ||
53 | |||
51 | /* clock information */ | 54 | /* clock information */ |
52 | 55 | ||
53 | static LIST_HEAD(clocks); | 56 | static LIST_HEAD(clocks); |
@@ -65,6 +68,28 @@ static int clk_null_enable(struct clk *clk, int enable) | |||
65 | return 0; | 68 | return 0; |
66 | } | 69 | } |
67 | 70 | ||
71 | static int dev_is_s3c_uart(struct device *dev) | ||
72 | { | ||
73 | struct platform_device **pdev = s3c24xx_uart_devs; | ||
74 | int i; | ||
75 | for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++) | ||
76 | if (*pdev && dev == &(*pdev)->dev) | ||
77 | return 1; | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | * Serial drivers call get_clock() very early, before platform bus | ||
83 | * has been set up, this requires a special check to let them get | ||
84 | * a proper clock | ||
85 | */ | ||
86 | |||
87 | static int dev_is_platform_device(struct device *dev) | ||
88 | { | ||
89 | return dev->bus == &platform_bus_type || | ||
90 | (dev->bus == NULL && dev_is_s3c_uart(dev)); | ||
91 | } | ||
92 | |||
68 | /* Clock API calls */ | 93 | /* Clock API calls */ |
69 | 94 | ||
70 | struct clk *clk_get(struct device *dev, const char *id) | 95 | struct clk *clk_get(struct device *dev, const char *id) |
@@ -73,7 +98,7 @@ struct clk *clk_get(struct device *dev, const char *id) | |||
73 | struct clk *clk = ERR_PTR(-ENOENT); | 98 | struct clk *clk = ERR_PTR(-ENOENT); |
74 | int idno; | 99 | int idno; |
75 | 100 | ||
76 | if (dev == NULL || dev->bus != &platform_bus_type) | 101 | if (dev == NULL || !dev_is_platform_device(dev)) |
77 | idno = -1; | 102 | idno = -1; |
78 | else | 103 | else |
79 | idno = to_platform_device(dev)->id; | 104 | idno = to_platform_device(dev)->id; |
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 6412933d6fbb..9addb3dfb4bc 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -79,7 +79,7 @@ extern struct sysdev_class s3c2442_sysclass; | |||
79 | extern struct sysdev_class s3c2443_sysclass; | 79 | extern struct sysdev_class s3c2443_sysclass; |
80 | extern struct sysdev_class s3c6410_sysclass; | 80 | extern struct sysdev_class s3c6410_sysclass; |
81 | extern struct sysdev_class s3c64xx_sysclass; | 81 | extern struct sysdev_class s3c64xx_sysclass; |
82 | extern struct sysdev_class s5p6440_sysclass; | 82 | extern struct sysdev_class s5p64x0_sysclass; |
83 | extern struct sysdev_class s5p6442_sysclass; | 83 | extern struct sysdev_class s5p6442_sysclass; |
84 | extern struct sysdev_class s5pv210_sysclass; | 84 | extern struct sysdev_class s5pv210_sysclass; |
85 | 85 | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 85f6f23a510f..7d448e138792 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -67,13 +67,15 @@ extern struct platform_device s5pv210_device_spi0; | |||
67 | extern struct platform_device s5pv210_device_spi1; | 67 | extern struct platform_device s5pv210_device_spi1; |
68 | extern struct platform_device s5p6440_device_spi0; | 68 | extern struct platform_device s5p6440_device_spi0; |
69 | extern struct platform_device s5p6440_device_spi1; | 69 | extern struct platform_device s5p6440_device_spi1; |
70 | extern struct platform_device s5p6450_device_spi0; | ||
71 | extern struct platform_device s5p6450_device_spi1; | ||
70 | 72 | ||
71 | extern struct platform_device s3c_device_hwmon; | 73 | extern struct platform_device s3c_device_hwmon; |
72 | 74 | ||
73 | extern struct platform_device s3c_device_nand; | 75 | extern struct platform_device s3c_device_nand; |
74 | extern struct platform_device s3c_device_onenand; | 76 | extern struct platform_device s3c_device_onenand; |
75 | extern struct platform_device s3c64xx_device_onenand1; | 77 | extern struct platform_device s3c64xx_device_onenand1; |
76 | extern struct platform_device s5pc110_device_onenand; | 78 | extern struct platform_device s5p_device_onenand; |
77 | 79 | ||
78 | extern struct platform_device s3c_device_usbgadget; | 80 | extern struct platform_device s3c_device_usbgadget; |
79 | extern struct platform_device s3c_device_usb_hsotg; | 81 | extern struct platform_device s3c_device_usb_hsotg; |
@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi; | |||
95 | extern struct platform_device s5p6440_device_pcm; | 97 | extern struct platform_device s5p6440_device_pcm; |
96 | extern struct platform_device s5p6440_device_iis; | 98 | extern struct platform_device s5p6440_device_iis; |
97 | 99 | ||
100 | extern struct platform_device s5p6450_device_iis0; | ||
101 | extern struct platform_device s5p6450_device_pcm0; | ||
102 | |||
98 | extern struct platform_device s5pc100_device_ac97; | 103 | extern struct platform_device s5pc100_device_ac97; |
99 | extern struct platform_device s5pc100_device_pcm0; | 104 | extern struct platform_device s5pc100_device_pcm0; |
100 | extern struct platform_device s5pc100_device_pcm1; | 105 | extern struct platform_device s5pc100_device_pcm1; |
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h index 5fe6721b57f7..810744213120 100644 --- a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | |||
@@ -32,6 +32,12 @@ enum dma_ch { | |||
32 | DMACH_UART2_TX, | 32 | DMACH_UART2_TX, |
33 | DMACH_UART3_RX, | 33 | DMACH_UART3_RX, |
34 | DMACH_UART3_TX, | 34 | DMACH_UART3_TX, |
35 | DMACH_UART4_RX, | ||
36 | DMACH_UART4_TX, | ||
37 | DMACH_UART5_RX, | ||
38 | DMACH_UART5_TX, | ||
39 | DMACH_USI_RX, | ||
40 | DMACH_USI_TX, | ||
35 | DMACH_IRDA, | 41 | DMACH_IRDA, |
36 | DMACH_I2S0_RX, | 42 | DMACH_I2S0_RX, |
37 | DMACH_I2S0_TX, | 43 | DMACH_I2S0_TX, |
@@ -64,6 +70,20 @@ enum dma_ch { | |||
64 | DMACH_MSM_REQ2, | 70 | DMACH_MSM_REQ2, |
65 | DMACH_MSM_REQ1, | 71 | DMACH_MSM_REQ1, |
66 | DMACH_MSM_REQ0, | 72 | DMACH_MSM_REQ0, |
73 | DMACH_SLIMBUS0_RX, | ||
74 | DMACH_SLIMBUS0_TX, | ||
75 | DMACH_SLIMBUS0AUX_RX, | ||
76 | DMACH_SLIMBUS0AUX_TX, | ||
77 | DMACH_SLIMBUS1_RX, | ||
78 | DMACH_SLIMBUS1_TX, | ||
79 | DMACH_SLIMBUS2_RX, | ||
80 | DMACH_SLIMBUS2_TX, | ||
81 | DMACH_SLIMBUS3_RX, | ||
82 | DMACH_SLIMBUS3_TX, | ||
83 | DMACH_SLIMBUS4_RX, | ||
84 | DMACH_SLIMBUS4_TX, | ||
85 | DMACH_SLIMBUS5_RX, | ||
86 | DMACH_SLIMBUS5_TX, | ||
67 | /* END Marker, also used to denote a reserved channel */ | 87 | /* END Marker, also used to denote a reserved channel */ |
68 | DMACH_MAX, | 88 | DMACH_MAX, |
69 | }; | 89 | }; |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index e5aba8f95b79..ae8e802bdca8 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -65,7 +65,7 @@ struct s3c64xx_spi_info { | |||
65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
68 | extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 68 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
70 | 70 | ||
71 | #endif /* __S3C64XX_PLAT_SPI_H */ | 71 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/mips/include/asm/siginfo.h b/arch/mips/include/asm/siginfo.h index 96e28f18dad1..1ca64b4d33d9 100644 --- a/arch/mips/include/asm/siginfo.h +++ b/arch/mips/include/asm/siginfo.h | |||
@@ -88,6 +88,7 @@ typedef struct siginfo { | |||
88 | #ifdef __ARCH_SI_TRAPNO | 88 | #ifdef __ARCH_SI_TRAPNO |
89 | int _trapno; /* TRAP # which caused the signal */ | 89 | int _trapno; /* TRAP # which caused the signal */ |
90 | #endif | 90 | #endif |
91 | short _addr_lsb; | ||
91 | } _sigfault; | 92 | } _sigfault; |
92 | 93 | ||
93 | /* SIGPOLL, SIGXFSZ (To do ...) */ | 94 | /* SIGPOLL, SIGXFSZ (To do ...) */ |
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c index 0350311906ae..2d93bdbc9ac0 100644 --- a/arch/x86/ia32/ia32_aout.c +++ b/arch/x86/ia32/ia32_aout.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include <asm/ia32.h> | 34 | #include <asm/ia32.h> |
35 | 35 | ||
36 | #undef WARN_OLD | 36 | #undef WARN_OLD |
37 | #undef CORE_DUMP /* probably broken */ | 37 | #undef CORE_DUMP /* definitely broken */ |
38 | 38 | ||
39 | static int load_aout_binary(struct linux_binprm *, struct pt_regs *regs); | 39 | static int load_aout_binary(struct linux_binprm *, struct pt_regs *regs); |
40 | static int load_aout_library(struct file *); | 40 | static int load_aout_library(struct file *); |
@@ -131,21 +131,15 @@ static void set_brk(unsigned long start, unsigned long end) | |||
131 | * macros to write out all the necessary info. | 131 | * macros to write out all the necessary info. |
132 | */ | 132 | */ |
133 | 133 | ||
134 | static int dump_write(struct file *file, const void *addr, int nr) | 134 | #include <linux/coredump.h> |
135 | { | ||
136 | return file->f_op->write(file, addr, nr, &file->f_pos) == nr; | ||
137 | } | ||
138 | 135 | ||
139 | #define DUMP_WRITE(addr, nr) \ | 136 | #define DUMP_WRITE(addr, nr) \ |
140 | if (!dump_write(file, (void *)(addr), (nr))) \ | 137 | if (!dump_write(file, (void *)(addr), (nr))) \ |
141 | goto end_coredump; | 138 | goto end_coredump; |
142 | 139 | ||
143 | #define DUMP_SEEK(offset) \ | 140 | #define DUMP_SEEK(offset) \ |
144 | if (file->f_op->llseek) { \ | 141 | if (!dump_seek(file, offset)) \ |
145 | if (file->f_op->llseek(file, (offset), 0) != (offset)) \ | 142 | goto end_coredump; |
146 | goto end_coredump; \ | ||
147 | } else \ | ||
148 | file->f_pos = (offset) | ||
149 | 143 | ||
150 | #define START_DATA() (u.u_tsize << PAGE_SHIFT) | 144 | #define START_DATA() (u.u_tsize << PAGE_SHIFT) |
151 | #define START_STACK(u) (u.start_stack) | 145 | #define START_STACK(u) (u.start_stack) |
@@ -217,12 +211,6 @@ static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file, | |||
217 | dump_size = dump.u_ssize << PAGE_SHIFT; | 211 | dump_size = dump.u_ssize << PAGE_SHIFT; |
218 | DUMP_WRITE(dump_start, dump_size); | 212 | DUMP_WRITE(dump_start, dump_size); |
219 | } | 213 | } |
220 | /* | ||
221 | * Finally dump the task struct. Not be used by gdb, but | ||
222 | * could be useful | ||
223 | */ | ||
224 | set_fs(KERNEL_DS); | ||
225 | DUMP_WRITE(current, sizeof(*current)); | ||
226 | end_coredump: | 214 | end_coredump: |
227 | set_fs(fs); | 215 | set_fs(fs); |
228 | return has_dumped; | 216 | return has_dumped; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 5e975298fa81..39aaee5c1ab2 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c | |||
@@ -141,6 +141,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c) | |||
141 | address = (low & MASK_BLKPTR_LO) >> 21; | 141 | address = (low & MASK_BLKPTR_LO) >> 21; |
142 | if (!address) | 142 | if (!address) |
143 | break; | 143 | break; |
144 | |||
144 | address += MCG_XBLK_ADDR; | 145 | address += MCG_XBLK_ADDR; |
145 | } else | 146 | } else |
146 | ++address; | 147 | ++address; |
@@ -148,12 +149,8 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c) | |||
148 | if (rdmsr_safe(address, &low, &high)) | 149 | if (rdmsr_safe(address, &low, &high)) |
149 | break; | 150 | break; |
150 | 151 | ||
151 | if (!(high & MASK_VALID_HI)) { | 152 | if (!(high & MASK_VALID_HI)) |
152 | if (block) | 153 | continue; |
153 | continue; | ||
154 | else | ||
155 | break; | ||
156 | } | ||
157 | 154 | ||
158 | if (!(high & MASK_CNTP_HI) || | 155 | if (!(high & MASK_CNTP_HI) || |
159 | (high & MASK_LOCKED_HI)) | 156 | (high & MASK_LOCKED_HI)) |
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index d9368eeda309..169d8804a9f8 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c | |||
@@ -216,7 +216,7 @@ static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev, | |||
216 | err = sysfs_add_file_to_group(&sys_dev->kobj, | 216 | err = sysfs_add_file_to_group(&sys_dev->kobj, |
217 | &attr_core_power_limit_count.attr, | 217 | &attr_core_power_limit_count.attr, |
218 | thermal_attr_group.name); | 218 | thermal_attr_group.name); |
219 | if (cpu_has(c, X86_FEATURE_PTS)) | 219 | if (cpu_has(c, X86_FEATURE_PTS)) { |
220 | err = sysfs_add_file_to_group(&sys_dev->kobj, | 220 | err = sysfs_add_file_to_group(&sys_dev->kobj, |
221 | &attr_package_throttle_count.attr, | 221 | &attr_package_throttle_count.attr, |
222 | thermal_attr_group.name); | 222 | thermal_attr_group.name); |
@@ -224,6 +224,7 @@ static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev, | |||
224 | err = sysfs_add_file_to_group(&sys_dev->kobj, | 224 | err = sysfs_add_file_to_group(&sys_dev->kobj, |
225 | &attr_package_power_limit_count.attr, | 225 | &attr_package_power_limit_count.attr, |
226 | thermal_attr_group.name); | 226 | thermal_attr_group.name); |
227 | } | ||
227 | 228 | ||
228 | return err; | 229 | return err; |
229 | } | 230 | } |
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index bc5b9b8d4a33..81ed28cb36e6 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
@@ -766,7 +766,6 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
766 | 766 | ||
767 | control->iopm_base_pa = iopm_base; | 767 | control->iopm_base_pa = iopm_base; |
768 | control->msrpm_base_pa = __pa(svm->msrpm); | 768 | control->msrpm_base_pa = __pa(svm->msrpm); |
769 | control->tsc_offset = 0; | ||
770 | control->int_ctl = V_INTR_MASKING_MASK; | 769 | control->int_ctl = V_INTR_MASKING_MASK; |
771 | 770 | ||
772 | init_seg(&save->es); | 771 | init_seg(&save->es); |
@@ -902,6 +901,7 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) | |||
902 | svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT; | 901 | svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT; |
903 | svm->asid_generation = 0; | 902 | svm->asid_generation = 0; |
904 | init_vmcb(svm); | 903 | init_vmcb(svm); |
904 | svm->vmcb->control.tsc_offset = 0-native_read_tsc(); | ||
905 | 905 | ||
906 | err = fx_init(&svm->vcpu); | 906 | err = fx_init(&svm->vcpu); |
907 | if (err) | 907 | if (err) |
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c index f9897f7a9ef1..9c0d0d399c30 100644 --- a/arch/x86/mm/srat_64.c +++ b/arch/x86/mm/srat_64.c | |||
@@ -420,9 +420,11 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) | |||
420 | return -1; | 420 | return -1; |
421 | } | 421 | } |
422 | 422 | ||
423 | for_each_node_mask(i, nodes_parsed) | 423 | for (i = 0; i < num_node_memblks; i++) |
424 | e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT, | 424 | e820_register_active_regions(memblk_nodeid[i], |
425 | nodes[i].end >> PAGE_SHIFT); | 425 | node_memblk_range[i].start >> PAGE_SHIFT, |
426 | node_memblk_range[i].end >> PAGE_SHIFT); | ||
427 | |||
426 | /* for out of order entries in SRAT */ | 428 | /* for out of order entries in SRAT */ |
427 | sort_node_map(); | 429 | sort_node_map(); |
428 | if (!nodes_cover_memory(nodes)) { | 430 | if (!nodes_cover_memory(nodes)) { |
diff --git a/block/elevator.c b/block/elevator.c index 205b09a5bd9e..4e11559aa2b0 100644 --- a/block/elevator.c +++ b/block/elevator.c | |||
@@ -938,6 +938,7 @@ int elv_register_queue(struct request_queue *q) | |||
938 | } | 938 | } |
939 | } | 939 | } |
940 | kobject_uevent(&e->kobj, KOBJ_ADD); | 940 | kobject_uevent(&e->kobj, KOBJ_ADD); |
941 | e->registered = 1; | ||
941 | } | 942 | } |
942 | return error; | 943 | return error; |
943 | } | 944 | } |
@@ -947,6 +948,7 @@ static void __elv_unregister_queue(struct elevator_queue *e) | |||
947 | { | 948 | { |
948 | kobject_uevent(&e->kobj, KOBJ_REMOVE); | 949 | kobject_uevent(&e->kobj, KOBJ_REMOVE); |
949 | kobject_del(&e->kobj); | 950 | kobject_del(&e->kobj); |
951 | e->registered = 0; | ||
950 | } | 952 | } |
951 | 953 | ||
952 | void elv_unregister_queue(struct request_queue *q) | 954 | void elv_unregister_queue(struct request_queue *q) |
@@ -1042,11 +1044,13 @@ static int elevator_switch(struct request_queue *q, struct elevator_type *new_e) | |||
1042 | 1044 | ||
1043 | spin_unlock_irq(q->queue_lock); | 1045 | spin_unlock_irq(q->queue_lock); |
1044 | 1046 | ||
1045 | __elv_unregister_queue(old_elevator); | 1047 | if (old_elevator->registered) { |
1048 | __elv_unregister_queue(old_elevator); | ||
1046 | 1049 | ||
1047 | err = elv_register_queue(q); | 1050 | err = elv_register_queue(q); |
1048 | if (err) | 1051 | if (err) |
1049 | goto fail_register; | 1052 | goto fail_register; |
1053 | } | ||
1050 | 1054 | ||
1051 | /* | 1055 | /* |
1052 | * finally exit old elevator and turn off BYPASS. | 1056 | * finally exit old elevator and turn off BYPASS. |
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c index f7619600270a..af308d03f492 100644 --- a/drivers/acpi/blacklist.c +++ b/drivers/acpi/blacklist.c | |||
@@ -204,6 +204,23 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = { | |||
204 | }, | 204 | }, |
205 | }, | 205 | }, |
206 | { | 206 | { |
207 | /* | ||
208 | * There have a NVIF method in MSI GX723 DSDT need call by Nvidia | ||
209 | * driver (e.g. nouveau) when user press brightness hotkey. | ||
210 | * Currently, nouveau driver didn't do the job and it causes there | ||
211 | * have a infinite while loop in DSDT when user press hotkey. | ||
212 | * We add MSI GX723's dmi information to this table for workaround | ||
213 | * this issue. | ||
214 | * Will remove MSI GX723 from the table after nouveau grows support. | ||
215 | */ | ||
216 | .callback = dmi_disable_osi_vista, | ||
217 | .ident = "MSI GX723", | ||
218 | .matches = { | ||
219 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), | ||
220 | DMI_MATCH(DMI_PRODUCT_NAME, "GX723"), | ||
221 | }, | ||
222 | }, | ||
223 | { | ||
207 | .callback = dmi_disable_osi_vista, | 224 | .callback = dmi_disable_osi_vista, |
208 | .ident = "Sony VGN-NS10J_S", | 225 | .ident = "Sony VGN-NS10J_S", |
209 | .matches = { | 226 | .matches = { |
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index b618f888d66b..bec561c14beb 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c | |||
@@ -346,4 +346,5 @@ void __init acpi_early_processor_set_pdc(void) | |||
346 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, | 346 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, |
347 | ACPI_UINT32_MAX, | 347 | ACPI_UINT32_MAX, |
348 | early_init_pdc, NULL, NULL, NULL); | 348 | early_init_pdc, NULL, NULL, NULL); |
349 | acpi_get_devices("ACPI0007", early_init_pdc, NULL, NULL); | ||
349 | } | 350 | } |
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c index ee9ddeb53417..8cb0347dec28 100644 --- a/drivers/atm/iphase.c +++ b/drivers/atm/iphase.c | |||
@@ -3156,7 +3156,6 @@ static int __devinit ia_init_one(struct pci_dev *pdev, | |||
3156 | { | 3156 | { |
3157 | struct atm_dev *dev; | 3157 | struct atm_dev *dev; |
3158 | IADEV *iadev; | 3158 | IADEV *iadev; |
3159 | unsigned long flags; | ||
3160 | int ret; | 3159 | int ret; |
3161 | 3160 | ||
3162 | iadev = kzalloc(sizeof(*iadev), GFP_KERNEL); | 3161 | iadev = kzalloc(sizeof(*iadev), GFP_KERNEL); |
@@ -3188,19 +3187,14 @@ static int __devinit ia_init_one(struct pci_dev *pdev, | |||
3188 | ia_dev[iadev_count] = iadev; | 3187 | ia_dev[iadev_count] = iadev; |
3189 | _ia_dev[iadev_count] = dev; | 3188 | _ia_dev[iadev_count] = dev; |
3190 | iadev_count++; | 3189 | iadev_count++; |
3191 | spin_lock_init(&iadev->misc_lock); | ||
3192 | /* First fixes first. I don't want to think about this now. */ | ||
3193 | spin_lock_irqsave(&iadev->misc_lock, flags); | ||
3194 | if (ia_init(dev) || ia_start(dev)) { | 3190 | if (ia_init(dev) || ia_start(dev)) { |
3195 | IF_INIT(printk("IA register failed!\n");) | 3191 | IF_INIT(printk("IA register failed!\n");) |
3196 | iadev_count--; | 3192 | iadev_count--; |
3197 | ia_dev[iadev_count] = NULL; | 3193 | ia_dev[iadev_count] = NULL; |
3198 | _ia_dev[iadev_count] = NULL; | 3194 | _ia_dev[iadev_count] = NULL; |
3199 | spin_unlock_irqrestore(&iadev->misc_lock, flags); | ||
3200 | ret = -EINVAL; | 3195 | ret = -EINVAL; |
3201 | goto err_out_deregister_dev; | 3196 | goto err_out_deregister_dev; |
3202 | } | 3197 | } |
3203 | spin_unlock_irqrestore(&iadev->misc_lock, flags); | ||
3204 | IF_EVENT(printk("iadev_count = %d\n", iadev_count);) | 3198 | IF_EVENT(printk("iadev_count = %d\n", iadev_count);) |
3205 | 3199 | ||
3206 | iadev->next_board = ia_boards; | 3200 | iadev->next_board = ia_boards; |
diff --git a/drivers/atm/iphase.h b/drivers/atm/iphase.h index b2cd20f549cb..077735e0e04b 100644 --- a/drivers/atm/iphase.h +++ b/drivers/atm/iphase.h | |||
@@ -1022,7 +1022,7 @@ typedef struct iadev_t { | |||
1022 | struct dle_q rx_dle_q; | 1022 | struct dle_q rx_dle_q; |
1023 | struct free_desc_q *rx_free_desc_qhead; | 1023 | struct free_desc_q *rx_free_desc_qhead; |
1024 | struct sk_buff_head rx_dma_q; | 1024 | struct sk_buff_head rx_dma_q; |
1025 | spinlock_t rx_lock, misc_lock; | 1025 | spinlock_t rx_lock; |
1026 | struct atm_vcc **rx_open; /* list of all open VCs */ | 1026 | struct atm_vcc **rx_open; /* list of all open VCs */ |
1027 | u16 num_rx_desc, rx_buf_sz, rxing; | 1027 | u16 num_rx_desc, rx_buf_sz, rxing; |
1028 | u32 rx_pkt_ram, rx_tmp_cnt; | 1028 | u32 rx_pkt_ram, rx_tmp_cnt; |
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c index f916ddf63938..f46138ab38b6 100644 --- a/drivers/atm/solos-pci.c +++ b/drivers/atm/solos-pci.c | |||
@@ -444,6 +444,7 @@ static ssize_t console_show(struct device *dev, struct device_attribute *attr, | |||
444 | struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); | 444 | struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); |
445 | struct solos_card *card = atmdev->dev_data; | 445 | struct solos_card *card = atmdev->dev_data; |
446 | struct sk_buff *skb; | 446 | struct sk_buff *skb; |
447 | unsigned int len; | ||
447 | 448 | ||
448 | spin_lock(&card->cli_queue_lock); | 449 | spin_lock(&card->cli_queue_lock); |
449 | skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); | 450 | skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); |
@@ -451,11 +452,12 @@ static ssize_t console_show(struct device *dev, struct device_attribute *attr, | |||
451 | if(skb == NULL) | 452 | if(skb == NULL) |
452 | return sprintf(buf, "No data.\n"); | 453 | return sprintf(buf, "No data.\n"); |
453 | 454 | ||
454 | memcpy(buf, skb->data, skb->len); | 455 | len = skb->len; |
455 | dev_dbg(&card->dev->dev, "len: %d\n", skb->len); | 456 | memcpy(buf, skb->data, len); |
457 | dev_dbg(&card->dev->dev, "len: %d\n", len); | ||
456 | 458 | ||
457 | kfree_skb(skb); | 459 | kfree_skb(skb); |
458 | return skb->len; | 460 | return len; |
459 | } | 461 | } |
460 | 462 | ||
461 | static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) | 463 | static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) |
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c index 2aafafca2b13..1101e251a629 100644 --- a/drivers/block/virtio_blk.c +++ b/drivers/block/virtio_blk.c | |||
@@ -202,6 +202,7 @@ static int virtblk_get_id(struct gendisk *disk, char *id_str) | |||
202 | struct virtio_blk *vblk = disk->private_data; | 202 | struct virtio_blk *vblk = disk->private_data; |
203 | struct request *req; | 203 | struct request *req; |
204 | struct bio *bio; | 204 | struct bio *bio; |
205 | int err; | ||
205 | 206 | ||
206 | bio = bio_map_kern(vblk->disk->queue, id_str, VIRTIO_BLK_ID_BYTES, | 207 | bio = bio_map_kern(vblk->disk->queue, id_str, VIRTIO_BLK_ID_BYTES, |
207 | GFP_KERNEL); | 208 | GFP_KERNEL); |
@@ -215,7 +216,10 @@ static int virtblk_get_id(struct gendisk *disk, char *id_str) | |||
215 | } | 216 | } |
216 | 217 | ||
217 | req->cmd_type = REQ_TYPE_SPECIAL; | 218 | req->cmd_type = REQ_TYPE_SPECIAL; |
218 | return blk_execute_rq(vblk->disk->queue, vblk->disk, req, false); | 219 | err = blk_execute_rq(vblk->disk->queue, vblk->disk, req, false); |
220 | blk_put_request(req); | ||
221 | |||
222 | return err; | ||
219 | } | 223 | } |
220 | 224 | ||
221 | static int virtblk_locked_ioctl(struct block_device *bdev, fmode_t mode, | 225 | static int virtblk_locked_ioctl(struct block_device *bdev, fmode_t mode, |
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c index 216f9d383b5b..effd140fc042 100644 --- a/drivers/dma/ioat/dma_v2.c +++ b/drivers/dma/ioat/dma_v2.c | |||
@@ -879,7 +879,7 @@ int __devinit ioat2_dma_probe(struct ioatdma_device *device, int dca) | |||
879 | dma->device_issue_pending = ioat2_issue_pending; | 879 | dma->device_issue_pending = ioat2_issue_pending; |
880 | dma->device_alloc_chan_resources = ioat2_alloc_chan_resources; | 880 | dma->device_alloc_chan_resources = ioat2_alloc_chan_resources; |
881 | dma->device_free_chan_resources = ioat2_free_chan_resources; | 881 | dma->device_free_chan_resources = ioat2_free_chan_resources; |
882 | dma->device_tx_status = ioat_tx_status; | 882 | dma->device_tx_status = ioat_dma_tx_status; |
883 | 883 | ||
884 | err = ioat_probe(device); | 884 | err = ioat_probe(device); |
885 | if (err) | 885 | if (err) |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c74e4e8006d4..2dd2c93ebfa3 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -2231,6 +2231,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
2231 | dev_priv->mchdev_lock = &mchdev_lock; | 2231 | dev_priv->mchdev_lock = &mchdev_lock; |
2232 | spin_unlock(&mchdev_lock); | 2232 | spin_unlock(&mchdev_lock); |
2233 | 2233 | ||
2234 | /* XXX Prevent module unload due to memory corruption bugs. */ | ||
2235 | __module_get(THIS_MODULE); | ||
2236 | |||
2234 | return 0; | 2237 | return 0; |
2235 | 2238 | ||
2236 | out_workqueue_free: | 2239 | out_workqueue_free: |
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index 56ad9df2ccb5..b61966c126d3 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
@@ -238,8 +238,8 @@ int intel_fbdev_destroy(struct drm_device *dev, | |||
238 | 238 | ||
239 | drm_framebuffer_cleanup(&ifb->base); | 239 | drm_framebuffer_cleanup(&ifb->base); |
240 | if (ifb->obj) { | 240 | if (ifb->obj) { |
241 | drm_gem_object_handle_unreference(ifb->obj); | ||
242 | drm_gem_object_unreference(ifb->obj); | 241 | drm_gem_object_unreference(ifb->obj); |
242 | ifb->obj = NULL; | ||
243 | } | 243 | } |
244 | 244 | ||
245 | return 0; | 245 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index d2047713dc59..dbd30b2e43fd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c | |||
@@ -352,7 +352,6 @@ nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *nfbdev) | |||
352 | 352 | ||
353 | if (nouveau_fb->nvbo) { | 353 | if (nouveau_fb->nvbo) { |
354 | nouveau_bo_unmap(nouveau_fb->nvbo); | 354 | nouveau_bo_unmap(nouveau_fb->nvbo); |
355 | drm_gem_object_handle_unreference_unlocked(nouveau_fb->nvbo->gem); | ||
356 | drm_gem_object_unreference_unlocked(nouveau_fb->nvbo->gem); | 355 | drm_gem_object_unreference_unlocked(nouveau_fb->nvbo->gem); |
357 | nouveau_fb->nvbo = NULL; | 356 | nouveau_fb->nvbo = NULL; |
358 | } | 357 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_notifier.c b/drivers/gpu/drm/nouveau/nouveau_notifier.c index 3c9964a8fbad..3ec181ff50ce 100644 --- a/drivers/gpu/drm/nouveau/nouveau_notifier.c +++ b/drivers/gpu/drm/nouveau/nouveau_notifier.c | |||
@@ -79,7 +79,6 @@ nouveau_notifier_takedown_channel(struct nouveau_channel *chan) | |||
79 | mutex_lock(&dev->struct_mutex); | 79 | mutex_lock(&dev->struct_mutex); |
80 | nouveau_bo_unpin(chan->notifier_bo); | 80 | nouveau_bo_unpin(chan->notifier_bo); |
81 | mutex_unlock(&dev->struct_mutex); | 81 | mutex_unlock(&dev->struct_mutex); |
82 | drm_gem_object_handle_unreference_unlocked(chan->notifier_bo->gem); | ||
83 | drm_gem_object_unreference_unlocked(chan->notifier_bo->gem); | 82 | drm_gem_object_unreference_unlocked(chan->notifier_bo->gem); |
84 | drm_mm_takedown(&chan->notifier_heap); | 83 | drm_mm_takedown(&chan->notifier_heap); |
85 | } | 84 | } |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 79082d4398ae..2f93d46ae69a 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1137,7 +1137,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
1137 | 1137 | ||
1138 | WREG32(RCU_IND_INDEX, 0x203); | 1138 | WREG32(RCU_IND_INDEX, 0x203); |
1139 | efuse_straps_3 = RREG32(RCU_IND_DATA); | 1139 | efuse_straps_3 = RREG32(RCU_IND_DATA); |
1140 | efuse_box_bit_127_124 = (u8)(efuse_straps_3 & 0xF0000000) >> 28; | 1140 | efuse_box_bit_127_124 = (u8)((efuse_straps_3 & 0xF0000000) >> 28); |
1141 | 1141 | ||
1142 | switch(efuse_box_bit_127_124) { | 1142 | switch(efuse_box_bit_127_124) { |
1143 | case 0x0: | 1143 | case 0x0: |
@@ -1407,6 +1407,7 @@ int evergreen_mc_init(struct radeon_device *rdev) | |||
1407 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1407 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; |
1408 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1408 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; |
1409 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 1409 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
1410 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1410 | r600_vram_gtt_location(rdev, &rdev->mc); | 1411 | r600_vram_gtt_location(rdev, &rdev->mc); |
1411 | radeon_update_bandwidth_info(rdev); | 1412 | radeon_update_bandwidth_info(rdev); |
1412 | 1413 | ||
@@ -1520,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) | |||
1520 | { | 1521 | { |
1521 | u32 tmp; | 1522 | u32 tmp; |
1522 | 1523 | ||
1523 | WREG32(CP_INT_CNTL, 0); | 1524 | WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); |
1524 | WREG32(GRBM_INT_CNTL, 0); | 1525 | WREG32(GRBM_INT_CNTL, 0); |
1525 | WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); | 1526 | WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); |
1526 | WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); | 1527 | WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index e151f16a8f86..e59422320bb6 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -1030,6 +1030,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
1030 | return r; | 1030 | return r; |
1031 | } | 1031 | } |
1032 | rdev->cp.ready = true; | 1032 | rdev->cp.ready = true; |
1033 | rdev->mc.active_vram_size = rdev->mc.real_vram_size; | ||
1033 | return 0; | 1034 | return 0; |
1034 | } | 1035 | } |
1035 | 1036 | ||
@@ -1047,6 +1048,7 @@ void r100_cp_fini(struct radeon_device *rdev) | |||
1047 | void r100_cp_disable(struct radeon_device *rdev) | 1048 | void r100_cp_disable(struct radeon_device *rdev) |
1048 | { | 1049 | { |
1049 | /* Disable ring */ | 1050 | /* Disable ring */ |
1051 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1050 | rdev->cp.ready = false; | 1052 | rdev->cp.ready = false; |
1051 | WREG32(RADEON_CP_CSQ_MODE, 0); | 1053 | WREG32(RADEON_CP_CSQ_MODE, 0); |
1052 | WREG32(RADEON_CP_CSQ_CNTL, 0); | 1054 | WREG32(RADEON_CP_CSQ_CNTL, 0); |
@@ -2295,6 +2297,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev) | |||
2295 | /* FIXME we don't use the second aperture yet when we could use it */ | 2297 | /* FIXME we don't use the second aperture yet when we could use it */ |
2296 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) | 2298 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) |
2297 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 2299 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
2300 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
2298 | config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE); | 2301 | config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE); |
2299 | if (rdev->flags & RADEON_IS_IGP) { | 2302 | if (rdev->flags & RADEON_IS_IGP) { |
2300 | uint32_t tom; | 2303 | uint32_t tom; |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 7a04959ba0ee..7b65e4efe8af 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1248,6 +1248,7 @@ int r600_mc_init(struct radeon_device *rdev) | |||
1248 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 1248 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
1249 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 1249 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
1250 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 1250 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
1251 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1251 | r600_vram_gtt_location(rdev, &rdev->mc); | 1252 | r600_vram_gtt_location(rdev, &rdev->mc); |
1252 | 1253 | ||
1253 | if (rdev->flags & RADEON_IS_IGP) { | 1254 | if (rdev->flags & RADEON_IS_IGP) { |
@@ -1917,6 +1918,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) | |||
1917 | */ | 1918 | */ |
1918 | void r600_cp_stop(struct radeon_device *rdev) | 1919 | void r600_cp_stop(struct radeon_device *rdev) |
1919 | { | 1920 | { |
1921 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1920 | WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); | 1922 | WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); |
1921 | } | 1923 | } |
1922 | 1924 | ||
@@ -2910,7 +2912,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev) | |||
2910 | { | 2912 | { |
2911 | u32 tmp; | 2913 | u32 tmp; |
2912 | 2914 | ||
2913 | WREG32(CP_INT_CNTL, 0); | 2915 | WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); |
2914 | WREG32(GRBM_INT_CNTL, 0); | 2916 | WREG32(GRBM_INT_CNTL, 0); |
2915 | WREG32(DxMODE_INT_MASK, 0); | 2917 | WREG32(DxMODE_INT_MASK, 0); |
2916 | if (ASIC_IS_DCE3(rdev)) { | 2918 | if (ASIC_IS_DCE3(rdev)) { |
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 9ceb2a1ce799..3473c00781ff 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -532,6 +532,7 @@ int r600_blit_init(struct radeon_device *rdev) | |||
532 | memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4); | 532 | memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4); |
533 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); | 533 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); |
534 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 534 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
535 | rdev->mc.active_vram_size = rdev->mc.real_vram_size; | ||
535 | return 0; | 536 | return 0; |
536 | } | 537 | } |
537 | 538 | ||
@@ -539,6 +540,7 @@ void r600_blit_fini(struct radeon_device *rdev) | |||
539 | { | 540 | { |
540 | int r; | 541 | int r; |
541 | 542 | ||
543 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
542 | if (rdev->r600_blit.shader_obj == NULL) | 544 | if (rdev->r600_blit.shader_obj == NULL) |
543 | return; | 545 | return; |
544 | /* If we can't reserve the bo, unref should be enough to destroy | 546 | /* If we can't reserve the bo, unref should be enough to destroy |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index a168d644bf9e..9ff38c99a6ea 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -344,6 +344,7 @@ struct radeon_mc { | |||
344 | * about vram size near mc fb location */ | 344 | * about vram size near mc fb location */ |
345 | u64 mc_vram_size; | 345 | u64 mc_vram_size; |
346 | u64 visible_vram_size; | 346 | u64 visible_vram_size; |
347 | u64 active_vram_size; | ||
347 | u64 gtt_size; | 348 | u64 gtt_size; |
348 | u64 gtt_start; | 349 | u64 gtt_start; |
349 | u64 gtt_end; | 350 | u64 gtt_end; |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 68932ba7b8a4..8e43ddae70cc 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1558,39 +1558,39 @@ radeon_atombios_get_tv_info(struct radeon_device *rdev) | |||
1558 | switch (tv_info->ucTV_BootUpDefaultStandard) { | 1558 | switch (tv_info->ucTV_BootUpDefaultStandard) { |
1559 | case ATOM_TV_NTSC: | 1559 | case ATOM_TV_NTSC: |
1560 | tv_std = TV_STD_NTSC; | 1560 | tv_std = TV_STD_NTSC; |
1561 | DRM_INFO("Default TV standard: NTSC\n"); | 1561 | DRM_DEBUG_KMS("Default TV standard: NTSC\n"); |
1562 | break; | 1562 | break; |
1563 | case ATOM_TV_NTSCJ: | 1563 | case ATOM_TV_NTSCJ: |
1564 | tv_std = TV_STD_NTSC_J; | 1564 | tv_std = TV_STD_NTSC_J; |
1565 | DRM_INFO("Default TV standard: NTSC-J\n"); | 1565 | DRM_DEBUG_KMS("Default TV standard: NTSC-J\n"); |
1566 | break; | 1566 | break; |
1567 | case ATOM_TV_PAL: | 1567 | case ATOM_TV_PAL: |
1568 | tv_std = TV_STD_PAL; | 1568 | tv_std = TV_STD_PAL; |
1569 | DRM_INFO("Default TV standard: PAL\n"); | 1569 | DRM_DEBUG_KMS("Default TV standard: PAL\n"); |
1570 | break; | 1570 | break; |
1571 | case ATOM_TV_PALM: | 1571 | case ATOM_TV_PALM: |
1572 | tv_std = TV_STD_PAL_M; | 1572 | tv_std = TV_STD_PAL_M; |
1573 | DRM_INFO("Default TV standard: PAL-M\n"); | 1573 | DRM_DEBUG_KMS("Default TV standard: PAL-M\n"); |
1574 | break; | 1574 | break; |
1575 | case ATOM_TV_PALN: | 1575 | case ATOM_TV_PALN: |
1576 | tv_std = TV_STD_PAL_N; | 1576 | tv_std = TV_STD_PAL_N; |
1577 | DRM_INFO("Default TV standard: PAL-N\n"); | 1577 | DRM_DEBUG_KMS("Default TV standard: PAL-N\n"); |
1578 | break; | 1578 | break; |
1579 | case ATOM_TV_PALCN: | 1579 | case ATOM_TV_PALCN: |
1580 | tv_std = TV_STD_PAL_CN; | 1580 | tv_std = TV_STD_PAL_CN; |
1581 | DRM_INFO("Default TV standard: PAL-CN\n"); | 1581 | DRM_DEBUG_KMS("Default TV standard: PAL-CN\n"); |
1582 | break; | 1582 | break; |
1583 | case ATOM_TV_PAL60: | 1583 | case ATOM_TV_PAL60: |
1584 | tv_std = TV_STD_PAL_60; | 1584 | tv_std = TV_STD_PAL_60; |
1585 | DRM_INFO("Default TV standard: PAL-60\n"); | 1585 | DRM_DEBUG_KMS("Default TV standard: PAL-60\n"); |
1586 | break; | 1586 | break; |
1587 | case ATOM_TV_SECAM: | 1587 | case ATOM_TV_SECAM: |
1588 | tv_std = TV_STD_SECAM; | 1588 | tv_std = TV_STD_SECAM; |
1589 | DRM_INFO("Default TV standard: SECAM\n"); | 1589 | DRM_DEBUG_KMS("Default TV standard: SECAM\n"); |
1590 | break; | 1590 | break; |
1591 | default: | 1591 | default: |
1592 | tv_std = TV_STD_NTSC; | 1592 | tv_std = TV_STD_NTSC; |
1593 | DRM_INFO("Unknown TV standard; defaulting to NTSC\n"); | 1593 | DRM_DEBUG_KMS("Unknown TV standard; defaulting to NTSC\n"); |
1594 | break; | 1594 | break; |
1595 | } | 1595 | } |
1596 | } | 1596 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index a04b7a6ad95f..7b7ea269549c 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -913,47 +913,47 @@ radeon_combios_get_tv_info(struct radeon_device *rdev) | |||
913 | switch (RBIOS8(tv_info + 7) & 0xf) { | 913 | switch (RBIOS8(tv_info + 7) & 0xf) { |
914 | case 1: | 914 | case 1: |
915 | tv_std = TV_STD_NTSC; | 915 | tv_std = TV_STD_NTSC; |
916 | DRM_INFO("Default TV standard: NTSC\n"); | 916 | DRM_DEBUG_KMS("Default TV standard: NTSC\n"); |
917 | break; | 917 | break; |
918 | case 2: | 918 | case 2: |
919 | tv_std = TV_STD_PAL; | 919 | tv_std = TV_STD_PAL; |
920 | DRM_INFO("Default TV standard: PAL\n"); | 920 | DRM_DEBUG_KMS("Default TV standard: PAL\n"); |
921 | break; | 921 | break; |
922 | case 3: | 922 | case 3: |
923 | tv_std = TV_STD_PAL_M; | 923 | tv_std = TV_STD_PAL_M; |
924 | DRM_INFO("Default TV standard: PAL-M\n"); | 924 | DRM_DEBUG_KMS("Default TV standard: PAL-M\n"); |
925 | break; | 925 | break; |
926 | case 4: | 926 | case 4: |
927 | tv_std = TV_STD_PAL_60; | 927 | tv_std = TV_STD_PAL_60; |
928 | DRM_INFO("Default TV standard: PAL-60\n"); | 928 | DRM_DEBUG_KMS("Default TV standard: PAL-60\n"); |
929 | break; | 929 | break; |
930 | case 5: | 930 | case 5: |
931 | tv_std = TV_STD_NTSC_J; | 931 | tv_std = TV_STD_NTSC_J; |
932 | DRM_INFO("Default TV standard: NTSC-J\n"); | 932 | DRM_DEBUG_KMS("Default TV standard: NTSC-J\n"); |
933 | break; | 933 | break; |
934 | case 6: | 934 | case 6: |
935 | tv_std = TV_STD_SCART_PAL; | 935 | tv_std = TV_STD_SCART_PAL; |
936 | DRM_INFO("Default TV standard: SCART-PAL\n"); | 936 | DRM_DEBUG_KMS("Default TV standard: SCART-PAL\n"); |
937 | break; | 937 | break; |
938 | default: | 938 | default: |
939 | tv_std = TV_STD_NTSC; | 939 | tv_std = TV_STD_NTSC; |
940 | DRM_INFO | 940 | DRM_DEBUG_KMS |
941 | ("Unknown TV standard; defaulting to NTSC\n"); | 941 | ("Unknown TV standard; defaulting to NTSC\n"); |
942 | break; | 942 | break; |
943 | } | 943 | } |
944 | 944 | ||
945 | switch ((RBIOS8(tv_info + 9) >> 2) & 0x3) { | 945 | switch ((RBIOS8(tv_info + 9) >> 2) & 0x3) { |
946 | case 0: | 946 | case 0: |
947 | DRM_INFO("29.498928713 MHz TV ref clk\n"); | 947 | DRM_DEBUG_KMS("29.498928713 MHz TV ref clk\n"); |
948 | break; | 948 | break; |
949 | case 1: | 949 | case 1: |
950 | DRM_INFO("28.636360000 MHz TV ref clk\n"); | 950 | DRM_DEBUG_KMS("28.636360000 MHz TV ref clk\n"); |
951 | break; | 951 | break; |
952 | case 2: | 952 | case 2: |
953 | DRM_INFO("14.318180000 MHz TV ref clk\n"); | 953 | DRM_DEBUG_KMS("14.318180000 MHz TV ref clk\n"); |
954 | break; | 954 | break; |
955 | case 3: | 955 | case 3: |
956 | DRM_INFO("27.000000000 MHz TV ref clk\n"); | 956 | DRM_DEBUG_KMS("27.000000000 MHz TV ref clk\n"); |
957 | break; | 957 | break; |
958 | default: | 958 | default: |
959 | break; | 959 | break; |
@@ -1324,7 +1324,7 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, | |||
1324 | 1324 | ||
1325 | if (tmds_info) { | 1325 | if (tmds_info) { |
1326 | ver = RBIOS8(tmds_info); | 1326 | ver = RBIOS8(tmds_info); |
1327 | DRM_INFO("DFP table revision: %d\n", ver); | 1327 | DRM_DEBUG_KMS("DFP table revision: %d\n", ver); |
1328 | if (ver == 3) { | 1328 | if (ver == 3) { |
1329 | n = RBIOS8(tmds_info + 5) + 1; | 1329 | n = RBIOS8(tmds_info + 5) + 1; |
1330 | if (n > 4) | 1330 | if (n > 4) |
@@ -1408,7 +1408,7 @@ bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder | |||
1408 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); | 1408 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
1409 | if (offset) { | 1409 | if (offset) { |
1410 | ver = RBIOS8(offset); | 1410 | ver = RBIOS8(offset); |
1411 | DRM_INFO("External TMDS Table revision: %d\n", ver); | 1411 | DRM_DEBUG_KMS("External TMDS Table revision: %d\n", ver); |
1412 | tmds->slave_addr = RBIOS8(offset + 4 + 2); | 1412 | tmds->slave_addr = RBIOS8(offset + 4 + 2); |
1413 | tmds->slave_addr >>= 1; /* 7 bit addressing */ | 1413 | tmds->slave_addr >>= 1; /* 7 bit addressing */ |
1414 | gpio = RBIOS8(offset + 4 + 3); | 1414 | gpio = RBIOS8(offset + 4 + 3); |
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index 9cdf6a35bc2c..40b0c087b592 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c | |||
@@ -97,7 +97,6 @@ static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) | |||
97 | radeon_bo_unpin(rbo); | 97 | radeon_bo_unpin(rbo); |
98 | radeon_bo_unreserve(rbo); | 98 | radeon_bo_unreserve(rbo); |
99 | } | 99 | } |
100 | drm_gem_object_handle_unreference(gobj); | ||
101 | drm_gem_object_unreference_unlocked(gobj); | 100 | drm_gem_object_unreference_unlocked(gobj); |
102 | } | 101 | } |
103 | 102 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 0afd1e62347d..b3b5306bb578 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
@@ -69,7 +69,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | |||
69 | u32 c = 0; | 69 | u32 c = 0; |
70 | 70 | ||
71 | rbo->placement.fpfn = 0; | 71 | rbo->placement.fpfn = 0; |
72 | rbo->placement.lpfn = 0; | 72 | rbo->placement.lpfn = rbo->rdev->mc.active_vram_size >> PAGE_SHIFT; |
73 | rbo->placement.placement = rbo->placements; | 73 | rbo->placement.placement = rbo->placements; |
74 | rbo->placement.busy_placement = rbo->placements; | 74 | rbo->placement.busy_placement = rbo->placements; |
75 | if (domain & RADEON_GEM_DOMAIN_VRAM) | 75 | if (domain & RADEON_GEM_DOMAIN_VRAM) |
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h index 353998dc2c03..3481bc7f6f58 100644 --- a/drivers/gpu/drm/radeon/radeon_object.h +++ b/drivers/gpu/drm/radeon/radeon_object.h | |||
@@ -124,11 +124,8 @@ static inline int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, | |||
124 | int r; | 124 | int r; |
125 | 125 | ||
126 | r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0); | 126 | r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0); |
127 | if (unlikely(r != 0)) { | 127 | if (unlikely(r != 0)) |
128 | if (r != -ERESTARTSYS) | ||
129 | dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo); | ||
130 | return r; | 128 | return r; |
131 | } | ||
132 | spin_lock(&bo->tbo.lock); | 129 | spin_lock(&bo->tbo.lock); |
133 | if (mem_type) | 130 | if (mem_type) |
134 | *mem_type = bo->tbo.mem.mem_type; | 131 | *mem_type = bo->tbo.mem.mem_type; |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index cc05b230d7ef..51d5f7b5ab21 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -693,6 +693,7 @@ void rs600_mc_init(struct radeon_device *rdev) | |||
693 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); | 693 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); |
694 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; | 694 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; |
695 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 695 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
696 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
696 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 697 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
697 | base = RREG32_MC(R_000004_MC_FB_LOCATION); | 698 | base = RREG32_MC(R_000004_MC_FB_LOCATION); |
698 | base = G_000004_MC_FB_START(base) << 16; | 699 | base = G_000004_MC_FB_START(base) << 16; |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 3e3f75718be3..4dc2a87ea680 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -157,6 +157,7 @@ void rs690_mc_init(struct radeon_device *rdev) | |||
157 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); | 157 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
158 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); | 158 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
159 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 159 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
160 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
160 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); | 161 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); |
161 | base = G_000100_MC_FB_START(base) << 16; | 162 | base = G_000100_MC_FB_START(base) << 16; |
162 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 163 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index bfa59db374d2..9490da700749 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -267,6 +267,7 @@ static void rv770_mc_program(struct radeon_device *rdev) | |||
267 | */ | 267 | */ |
268 | void r700_cp_stop(struct radeon_device *rdev) | 268 | void r700_cp_stop(struct radeon_device *rdev) |
269 | { | 269 | { |
270 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
270 | WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); | 271 | WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); |
271 | } | 272 | } |
272 | 273 | ||
@@ -992,6 +993,7 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
992 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 993 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
993 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 994 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
994 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 995 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
996 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
995 | r600_vram_gtt_location(rdev, &rdev->mc); | 997 | r600_vram_gtt_location(rdev, &rdev->mc); |
996 | radeon_update_bandwidth_info(rdev); | 998 | radeon_update_bandwidth_info(rdev); |
997 | 999 | ||
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index cb4cf7ef4d1e..db809e034cc4 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c | |||
@@ -442,6 +442,43 @@ out_err: | |||
442 | } | 442 | } |
443 | 443 | ||
444 | /** | 444 | /** |
445 | * Call bo::reserved and with the lru lock held. | ||
446 | * Will release GPU memory type usage on destruction. | ||
447 | * This is the place to put in driver specific hooks. | ||
448 | * Will release the bo::reserved lock and the | ||
449 | * lru lock on exit. | ||
450 | */ | ||
451 | |||
452 | static void ttm_bo_cleanup_memtype_use(struct ttm_buffer_object *bo) | ||
453 | { | ||
454 | struct ttm_bo_global *glob = bo->glob; | ||
455 | |||
456 | if (bo->ttm) { | ||
457 | |||
458 | /** | ||
459 | * Release the lru_lock, since we don't want to have | ||
460 | * an atomic requirement on ttm_tt[unbind|destroy]. | ||
461 | */ | ||
462 | |||
463 | spin_unlock(&glob->lru_lock); | ||
464 | ttm_tt_unbind(bo->ttm); | ||
465 | ttm_tt_destroy(bo->ttm); | ||
466 | bo->ttm = NULL; | ||
467 | spin_lock(&glob->lru_lock); | ||
468 | } | ||
469 | |||
470 | if (bo->mem.mm_node) { | ||
471 | drm_mm_put_block(bo->mem.mm_node); | ||
472 | bo->mem.mm_node = NULL; | ||
473 | } | ||
474 | |||
475 | atomic_set(&bo->reserved, 0); | ||
476 | wake_up_all(&bo->event_queue); | ||
477 | spin_unlock(&glob->lru_lock); | ||
478 | } | ||
479 | |||
480 | |||
481 | /** | ||
445 | * If bo idle, remove from delayed- and lru lists, and unref. | 482 | * If bo idle, remove from delayed- and lru lists, and unref. |
446 | * If not idle, and already on delayed list, do nothing. | 483 | * If not idle, and already on delayed list, do nothing. |
447 | * If not idle, and not on delayed list, put on delayed list, | 484 | * If not idle, and not on delayed list, put on delayed list, |
@@ -456,6 +493,7 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all) | |||
456 | int ret; | 493 | int ret; |
457 | 494 | ||
458 | spin_lock(&bo->lock); | 495 | spin_lock(&bo->lock); |
496 | retry: | ||
459 | (void) ttm_bo_wait(bo, false, false, !remove_all); | 497 | (void) ttm_bo_wait(bo, false, false, !remove_all); |
460 | 498 | ||
461 | if (!bo->sync_obj) { | 499 | if (!bo->sync_obj) { |
@@ -464,31 +502,52 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all) | |||
464 | spin_unlock(&bo->lock); | 502 | spin_unlock(&bo->lock); |
465 | 503 | ||
466 | spin_lock(&glob->lru_lock); | 504 | spin_lock(&glob->lru_lock); |
467 | put_count = ttm_bo_del_from_lru(bo); | 505 | ret = ttm_bo_reserve_locked(bo, false, !remove_all, false, 0); |
506 | |||
507 | /** | ||
508 | * Someone else has the object reserved. Bail and retry. | ||
509 | */ | ||
468 | 510 | ||
469 | ret = ttm_bo_reserve_locked(bo, false, false, false, 0); | 511 | if (unlikely(ret == -EBUSY)) { |
470 | BUG_ON(ret); | 512 | spin_unlock(&glob->lru_lock); |
471 | if (bo->ttm) | 513 | spin_lock(&bo->lock); |
472 | ttm_tt_unbind(bo->ttm); | 514 | goto requeue; |
515 | } | ||
516 | |||
517 | /** | ||
518 | * We can re-check for sync object without taking | ||
519 | * the bo::lock since setting the sync object requires | ||
520 | * also bo::reserved. A busy object at this point may | ||
521 | * be caused by another thread starting an accelerated | ||
522 | * eviction. | ||
523 | */ | ||
524 | |||
525 | if (unlikely(bo->sync_obj)) { | ||
526 | atomic_set(&bo->reserved, 0); | ||
527 | wake_up_all(&bo->event_queue); | ||
528 | spin_unlock(&glob->lru_lock); | ||
529 | spin_lock(&bo->lock); | ||
530 | if (remove_all) | ||
531 | goto retry; | ||
532 | else | ||
533 | goto requeue; | ||
534 | } | ||
535 | |||
536 | put_count = ttm_bo_del_from_lru(bo); | ||
473 | 537 | ||
474 | if (!list_empty(&bo->ddestroy)) { | 538 | if (!list_empty(&bo->ddestroy)) { |
475 | list_del_init(&bo->ddestroy); | 539 | list_del_init(&bo->ddestroy); |
476 | ++put_count; | 540 | ++put_count; |
477 | } | 541 | } |
478 | if (bo->mem.mm_node) { | ||
479 | drm_mm_put_block(bo->mem.mm_node); | ||
480 | bo->mem.mm_node = NULL; | ||
481 | } | ||
482 | spin_unlock(&glob->lru_lock); | ||
483 | 542 | ||
484 | atomic_set(&bo->reserved, 0); | 543 | ttm_bo_cleanup_memtype_use(bo); |
485 | 544 | ||
486 | while (put_count--) | 545 | while (put_count--) |
487 | kref_put(&bo->list_kref, ttm_bo_ref_bug); | 546 | kref_put(&bo->list_kref, ttm_bo_ref_bug); |
488 | 547 | ||
489 | return 0; | 548 | return 0; |
490 | } | 549 | } |
491 | 550 | requeue: | |
492 | spin_lock(&glob->lru_lock); | 551 | spin_lock(&glob->lru_lock); |
493 | if (list_empty(&bo->ddestroy)) { | 552 | if (list_empty(&bo->ddestroy)) { |
494 | void *sync_obj = bo->sync_obj; | 553 | void *sync_obj = bo->sync_obj; |
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c index f7bd2613cecc..f2de3be35df3 100644 --- a/drivers/i2c/busses/i2c-cpm.c +++ b/drivers/i2c/busses/i2c-cpm.c | |||
@@ -677,6 +677,11 @@ static int __devinit cpm_i2c_probe(struct platform_device *ofdev, | |||
677 | dev_dbg(&ofdev->dev, "hw routines for %s registered.\n", | 677 | dev_dbg(&ofdev->dev, "hw routines for %s registered.\n", |
678 | cpm->adap.name); | 678 | cpm->adap.name); |
679 | 679 | ||
680 | /* | ||
681 | * register OF I2C devices | ||
682 | */ | ||
683 | of_i2c_register_devices(&cpm->adap); | ||
684 | |||
680 | return 0; | 685 | return 0; |
681 | out_shut: | 686 | out_shut: |
682 | cpm_i2c_shutdown(cpm); | 687 | cpm_i2c_shutdown(cpm); |
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c index 43ca32fddde2..89eedf45d30e 100644 --- a/drivers/i2c/busses/i2c-ibm_iic.c +++ b/drivers/i2c/busses/i2c-ibm_iic.c | |||
@@ -761,6 +761,9 @@ static int __devinit iic_probe(struct platform_device *ofdev, | |||
761 | dev_info(&ofdev->dev, "using %s mode\n", | 761 | dev_info(&ofdev->dev, "using %s mode\n", |
762 | dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)"); | 762 | dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)"); |
763 | 763 | ||
764 | /* Now register all the child nodes */ | ||
765 | of_i2c_register_devices(adap); | ||
766 | |||
764 | return 0; | 767 | return 0; |
765 | 768 | ||
766 | error_cleanup: | 769 | error_cleanup: |
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index a1c419a716af..b74e6dc6886c 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c | |||
@@ -632,6 +632,7 @@ static int __devinit fsl_i2c_probe(struct platform_device *op, | |||
632 | dev_err(i2c->dev, "failed to add adapter\n"); | 632 | dev_err(i2c->dev, "failed to add adapter\n"); |
633 | goto fail_add; | 633 | goto fail_add; |
634 | } | 634 | } |
635 | of_i2c_register_devices(&i2c->adap); | ||
635 | 636 | ||
636 | return result; | 637 | return result; |
637 | 638 | ||
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c index bbd77603a417..29933f87d8fa 100644 --- a/drivers/i2c/busses/i2c-pca-isa.c +++ b/drivers/i2c/busses/i2c-pca-isa.c | |||
@@ -71,8 +71,8 @@ static int pca_isa_readbyte(void *pd, int reg) | |||
71 | 71 | ||
72 | static int pca_isa_waitforcompletion(void *pd) | 72 | static int pca_isa_waitforcompletion(void *pd) |
73 | { | 73 | { |
74 | long ret = ~0; | ||
75 | unsigned long timeout; | 74 | unsigned long timeout; |
75 | long ret; | ||
76 | 76 | ||
77 | if (irq > -1) { | 77 | if (irq > -1) { |
78 | ret = wait_event_timeout(pca_wait, | 78 | ret = wait_event_timeout(pca_wait, |
@@ -81,11 +81,15 @@ static int pca_isa_waitforcompletion(void *pd) | |||
81 | } else { | 81 | } else { |
82 | /* Do polling */ | 82 | /* Do polling */ |
83 | timeout = jiffies + pca_isa_ops.timeout; | 83 | timeout = jiffies + pca_isa_ops.timeout; |
84 | while (((pca_isa_readbyte(pd, I2C_PCA_CON) | 84 | do { |
85 | & I2C_PCA_CON_SI) == 0) | 85 | ret = time_before(jiffies, timeout); |
86 | && (ret = time_before(jiffies, timeout))) | 86 | if (pca_isa_readbyte(pd, I2C_PCA_CON) |
87 | & I2C_PCA_CON_SI) | ||
88 | break; | ||
87 | udelay(100); | 89 | udelay(100); |
90 | } while (ret); | ||
88 | } | 91 | } |
92 | |||
89 | return ret > 0; | 93 | return ret > 0; |
90 | } | 94 | } |
91 | 95 | ||
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c index ef5c78487eb7..5f6d7f89e225 100644 --- a/drivers/i2c/busses/i2c-pca-platform.c +++ b/drivers/i2c/busses/i2c-pca-platform.c | |||
@@ -80,8 +80,8 @@ static void i2c_pca_pf_writebyte32(void *pd, int reg, int val) | |||
80 | static int i2c_pca_pf_waitforcompletion(void *pd) | 80 | static int i2c_pca_pf_waitforcompletion(void *pd) |
81 | { | 81 | { |
82 | struct i2c_pca_pf_data *i2c = pd; | 82 | struct i2c_pca_pf_data *i2c = pd; |
83 | long ret = ~0; | ||
84 | unsigned long timeout; | 83 | unsigned long timeout; |
84 | long ret; | ||
85 | 85 | ||
86 | if (i2c->irq) { | 86 | if (i2c->irq) { |
87 | ret = wait_event_timeout(i2c->wait, | 87 | ret = wait_event_timeout(i2c->wait, |
@@ -90,10 +90,13 @@ static int i2c_pca_pf_waitforcompletion(void *pd) | |||
90 | } else { | 90 | } else { |
91 | /* Do polling */ | 91 | /* Do polling */ |
92 | timeout = jiffies + i2c->adap.timeout; | 92 | timeout = jiffies + i2c->adap.timeout; |
93 | while (((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) | 93 | do { |
94 | & I2C_PCA_CON_SI) == 0) | 94 | ret = time_before(jiffies, timeout); |
95 | && (ret = time_before(jiffies, timeout))) | 95 | if (i2c->algo_data.read_byte(i2c, I2C_PCA_CON) |
96 | & I2C_PCA_CON_SI) | ||
97 | break; | ||
96 | udelay(100); | 98 | udelay(100); |
99 | } while (ret); | ||
97 | } | 100 | } |
98 | 101 | ||
99 | return ret > 0; | 102 | return ret > 0; |
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index 6649176de940..bea4c5021d26 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | #include <linux/idr.h> | 33 | #include <linux/idr.h> |
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <linux/of_i2c.h> | ||
36 | #include <linux/of_device.h> | 35 | #include <linux/of_device.h> |
37 | #include <linux/completion.h> | 36 | #include <linux/completion.h> |
38 | #include <linux/hardirq.h> | 37 | #include <linux/hardirq.h> |
@@ -197,11 +196,12 @@ static int i2c_device_pm_suspend(struct device *dev) | |||
197 | { | 196 | { |
198 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | 197 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; |
199 | 198 | ||
200 | if (pm_runtime_suspended(dev)) | 199 | if (pm) { |
201 | return 0; | 200 | if (pm_runtime_suspended(dev)) |
202 | 201 | return 0; | |
203 | if (pm) | 202 | else |
204 | return pm->suspend ? pm->suspend(dev) : 0; | 203 | return pm->suspend ? pm->suspend(dev) : 0; |
204 | } | ||
205 | 205 | ||
206 | return i2c_legacy_suspend(dev, PMSG_SUSPEND); | 206 | return i2c_legacy_suspend(dev, PMSG_SUSPEND); |
207 | } | 207 | } |
@@ -216,12 +216,6 @@ static int i2c_device_pm_resume(struct device *dev) | |||
216 | else | 216 | else |
217 | ret = i2c_legacy_resume(dev); | 217 | ret = i2c_legacy_resume(dev); |
218 | 218 | ||
219 | if (!ret) { | ||
220 | pm_runtime_disable(dev); | ||
221 | pm_runtime_set_active(dev); | ||
222 | pm_runtime_enable(dev); | ||
223 | } | ||
224 | |||
225 | return ret; | 219 | return ret; |
226 | } | 220 | } |
227 | 221 | ||
@@ -229,11 +223,12 @@ static int i2c_device_pm_freeze(struct device *dev) | |||
229 | { | 223 | { |
230 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | 224 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; |
231 | 225 | ||
232 | if (pm_runtime_suspended(dev)) | 226 | if (pm) { |
233 | return 0; | 227 | if (pm_runtime_suspended(dev)) |
234 | 228 | return 0; | |
235 | if (pm) | 229 | else |
236 | return pm->freeze ? pm->freeze(dev) : 0; | 230 | return pm->freeze ? pm->freeze(dev) : 0; |
231 | } | ||
237 | 232 | ||
238 | return i2c_legacy_suspend(dev, PMSG_FREEZE); | 233 | return i2c_legacy_suspend(dev, PMSG_FREEZE); |
239 | } | 234 | } |
@@ -242,11 +237,12 @@ static int i2c_device_pm_thaw(struct device *dev) | |||
242 | { | 237 | { |
243 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | 238 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; |
244 | 239 | ||
245 | if (pm_runtime_suspended(dev)) | 240 | if (pm) { |
246 | return 0; | 241 | if (pm_runtime_suspended(dev)) |
247 | 242 | return 0; | |
248 | if (pm) | 243 | else |
249 | return pm->thaw ? pm->thaw(dev) : 0; | 244 | return pm->thaw ? pm->thaw(dev) : 0; |
245 | } | ||
250 | 246 | ||
251 | return i2c_legacy_resume(dev); | 247 | return i2c_legacy_resume(dev); |
252 | } | 248 | } |
@@ -255,11 +251,12 @@ static int i2c_device_pm_poweroff(struct device *dev) | |||
255 | { | 251 | { |
256 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | 252 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; |
257 | 253 | ||
258 | if (pm_runtime_suspended(dev)) | 254 | if (pm) { |
259 | return 0; | 255 | if (pm_runtime_suspended(dev)) |
260 | 256 | return 0; | |
261 | if (pm) | 257 | else |
262 | return pm->poweroff ? pm->poweroff(dev) : 0; | 258 | return pm->poweroff ? pm->poweroff(dev) : 0; |
259 | } | ||
263 | 260 | ||
264 | return i2c_legacy_suspend(dev, PMSG_HIBERNATE); | 261 | return i2c_legacy_suspend(dev, PMSG_HIBERNATE); |
265 | } | 262 | } |
@@ -876,9 +873,6 @@ static int i2c_register_adapter(struct i2c_adapter *adap) | |||
876 | if (adap->nr < __i2c_first_dynamic_bus_num) | 873 | if (adap->nr < __i2c_first_dynamic_bus_num) |
877 | i2c_scan_static_board_info(adap); | 874 | i2c_scan_static_board_info(adap); |
878 | 875 | ||
879 | /* Register devices from the device tree */ | ||
880 | of_i2c_register_devices(adap); | ||
881 | |||
882 | /* Notify drivers */ | 876 | /* Notify drivers */ |
883 | mutex_lock(&core_lock); | 877 | mutex_lock(&core_lock); |
884 | bus_for_each_drv(&i2c_bus_type, NULL, adap, __process_new_adapter); | 878 | bus_for_each_drv(&i2c_bus_type, NULL, adap, __process_new_adapter); |
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 0906fc5b69b9..c37ef64d1465 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c | |||
@@ -157,13 +157,13 @@ static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
157 | { /* MWAIT C5 */ }, | 157 | { /* MWAIT C5 */ }, |
158 | { /* MWAIT C6 */ | 158 | { /* MWAIT C6 */ |
159 | .name = "ATM-C6", | 159 | .name = "ATM-C6", |
160 | .desc = "MWAIT 0x40", | 160 | .desc = "MWAIT 0x52", |
161 | .driver_data = (void *) 0x40, | 161 | .driver_data = (void *) 0x52, |
162 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 162 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
163 | .exit_latency = 200, | 163 | .exit_latency = 140, |
164 | .power_usage = 150, | 164 | .power_usage = 150, |
165 | .target_residency = 800, | 165 | .target_residency = 560, |
166 | .enter = NULL }, /* disabled */ | 166 | .enter = &intel_idle }, |
167 | }; | 167 | }; |
168 | 168 | ||
169 | /** | 169 | /** |
diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c index d85bd8a7967d..22239e988498 100644 --- a/drivers/input/joydev.c +++ b/drivers/input/joydev.c | |||
@@ -483,6 +483,9 @@ static int joydev_handle_JSIOCSAXMAP(struct joydev *joydev, | |||
483 | 483 | ||
484 | memcpy(joydev->abspam, abspam, len); | 484 | memcpy(joydev->abspam, abspam, len); |
485 | 485 | ||
486 | for (i = 0; i < joydev->nabs; i++) | ||
487 | joydev->absmap[joydev->abspam[i]] = i; | ||
488 | |||
486 | out: | 489 | out: |
487 | kfree(abspam); | 490 | kfree(abspam); |
488 | return retval; | 491 | return retval; |
diff --git a/drivers/input/misc/uinput.c b/drivers/input/misc/uinput.c index 0d4266a533a5..360698553eb5 100644 --- a/drivers/input/misc/uinput.c +++ b/drivers/input/misc/uinput.c | |||
@@ -404,6 +404,13 @@ static int uinput_setup_device(struct uinput_device *udev, const char __user *bu | |||
404 | retval = uinput_validate_absbits(dev); | 404 | retval = uinput_validate_absbits(dev); |
405 | if (retval < 0) | 405 | if (retval < 0) |
406 | goto exit; | 406 | goto exit; |
407 | if (test_bit(ABS_MT_SLOT, dev->absbit)) { | ||
408 | int nslot = input_abs_get_max(dev, ABS_MT_SLOT) + 1; | ||
409 | input_mt_create_slots(dev, nslot); | ||
410 | input_set_events_per_packet(dev, 6 * nslot); | ||
411 | } else if (test_bit(ABS_MT_POSITION_X, dev->absbit)) { | ||
412 | input_set_events_per_packet(dev, 60); | ||
413 | } | ||
407 | } | 414 | } |
408 | 415 | ||
409 | udev->state = UIST_SETUP_COMPLETE; | 416 | udev->state = UIST_SETUP_COMPLETE; |
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index 42ba3691d908..b35876ee6908 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
@@ -103,27 +103,26 @@ static void wacom_sys_irq(struct urb *urb) | |||
103 | static int wacom_open(struct input_dev *dev) | 103 | static int wacom_open(struct input_dev *dev) |
104 | { | 104 | { |
105 | struct wacom *wacom = input_get_drvdata(dev); | 105 | struct wacom *wacom = input_get_drvdata(dev); |
106 | int retval = 0; | ||
106 | 107 | ||
107 | mutex_lock(&wacom->lock); | 108 | if (usb_autopm_get_interface(wacom->intf) < 0) |
108 | |||
109 | wacom->irq->dev = wacom->usbdev; | ||
110 | |||
111 | if (usb_autopm_get_interface(wacom->intf) < 0) { | ||
112 | mutex_unlock(&wacom->lock); | ||
113 | return -EIO; | 109 | return -EIO; |
114 | } | 110 | |
111 | mutex_lock(&wacom->lock); | ||
115 | 112 | ||
116 | if (usb_submit_urb(wacom->irq, GFP_KERNEL)) { | 113 | if (usb_submit_urb(wacom->irq, GFP_KERNEL)) { |
117 | usb_autopm_put_interface(wacom->intf); | 114 | retval = -EIO; |
118 | mutex_unlock(&wacom->lock); | 115 | goto out; |
119 | return -EIO; | ||
120 | } | 116 | } |
121 | 117 | ||
122 | wacom->open = true; | 118 | wacom->open = true; |
123 | wacom->intf->needs_remote_wakeup = 1; | 119 | wacom->intf->needs_remote_wakeup = 1; |
124 | 120 | ||
121 | out: | ||
125 | mutex_unlock(&wacom->lock); | 122 | mutex_unlock(&wacom->lock); |
126 | return 0; | 123 | if (retval) |
124 | usb_autopm_put_interface(wacom->intf); | ||
125 | return retval; | ||
127 | } | 126 | } |
128 | 127 | ||
129 | static void wacom_close(struct input_dev *dev) | 128 | static void wacom_close(struct input_dev *dev) |
@@ -135,6 +134,8 @@ static void wacom_close(struct input_dev *dev) | |||
135 | wacom->open = false; | 134 | wacom->open = false; |
136 | wacom->intf->needs_remote_wakeup = 0; | 135 | wacom->intf->needs_remote_wakeup = 0; |
137 | mutex_unlock(&wacom->lock); | 136 | mutex_unlock(&wacom->lock); |
137 | |||
138 | usb_autopm_put_interface(wacom->intf); | ||
138 | } | 139 | } |
139 | 140 | ||
140 | static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc, | 141 | static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc, |
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index 6e29badb969e..47fd7a041c52 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
@@ -442,8 +442,10 @@ static void wacom_intuos_general(struct wacom_wac *wacom) | |||
442 | /* general pen packet */ | 442 | /* general pen packet */ |
443 | if ((data[1] & 0xb8) == 0xa0) { | 443 | if ((data[1] & 0xb8) == 0xa0) { |
444 | t = (data[6] << 2) | ((data[7] >> 6) & 3); | 444 | t = (data[6] << 2) | ((data[7] >> 6) & 3); |
445 | if (features->type >= INTUOS4S && features->type <= INTUOS4L) | 445 | if ((features->type >= INTUOS4S && features->type <= INTUOS4L) || |
446 | features->type == WACOM_21UX2) { | ||
446 | t = (t << 1) | (data[1] & 1); | 447 | t = (t << 1) | (data[1] & 1); |
448 | } | ||
447 | input_report_abs(input, ABS_PRESSURE, t); | 449 | input_report_abs(input, ABS_PRESSURE, t); |
448 | input_report_abs(input, ABS_TILT_X, | 450 | input_report_abs(input, ABS_TILT_X, |
449 | ((data[7] << 1) & 0x7e) | (data[8] >> 7)); | 451 | ((data[7] << 1) & 0x7e) | (data[8] >> 7)); |
diff --git a/drivers/isdn/sc/interrupt.c b/drivers/isdn/sc/interrupt.c index 485be8b1e1b3..f0225bc0f267 100644 --- a/drivers/isdn/sc/interrupt.c +++ b/drivers/isdn/sc/interrupt.c | |||
@@ -112,11 +112,19 @@ irqreturn_t interrupt_handler(int dummy, void *card_inst) | |||
112 | } | 112 | } |
113 | else if(callid>=0x0000 && callid<=0x7FFF) | 113 | else if(callid>=0x0000 && callid<=0x7FFF) |
114 | { | 114 | { |
115 | int len; | ||
116 | |||
115 | pr_debug("%s: Got Incoming Call\n", | 117 | pr_debug("%s: Got Incoming Call\n", |
116 | sc_adapter[card]->devicename); | 118 | sc_adapter[card]->devicename); |
117 | strcpy(setup.phone,&(rcvmsg.msg_data.byte_array[4])); | 119 | len = strlcpy(setup.phone, &(rcvmsg.msg_data.byte_array[4]), |
118 | strcpy(setup.eazmsn, | 120 | sizeof(setup.phone)); |
119 | sc_adapter[card]->channel[rcvmsg.phy_link_no-1].dn); | 121 | if (len >= sizeof(setup.phone)) |
122 | continue; | ||
123 | len = strlcpy(setup.eazmsn, | ||
124 | sc_adapter[card]->channel[rcvmsg.phy_link_no - 1].dn, | ||
125 | sizeof(setup.eazmsn)); | ||
126 | if (len >= sizeof(setup.eazmsn)) | ||
127 | continue; | ||
120 | setup.si1 = 7; | 128 | setup.si1 = 7; |
121 | setup.si2 = 0; | 129 | setup.si2 = 0; |
122 | setup.plan = 0; | 130 | setup.plan = 0; |
@@ -176,7 +184,9 @@ irqreturn_t interrupt_handler(int dummy, void *card_inst) | |||
176 | * Handle a GetMyNumber Rsp | 184 | * Handle a GetMyNumber Rsp |
177 | */ | 185 | */ |
178 | if (IS_CE_MESSAGE(rcvmsg,Call,0,GetMyNumber)){ | 186 | if (IS_CE_MESSAGE(rcvmsg,Call,0,GetMyNumber)){ |
179 | strcpy(sc_adapter[card]->channel[rcvmsg.phy_link_no-1].dn,rcvmsg.msg_data.byte_array); | 187 | strlcpy(sc_adapter[card]->channel[rcvmsg.phy_link_no - 1].dn, |
188 | rcvmsg.msg_data.byte_array, | ||
189 | sizeof(rcvmsg.msg_data.byte_array)); | ||
180 | continue; | 190 | continue; |
181 | } | 191 | } |
182 | 192 | ||
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c index ed4900ade93a..e4fb58db5454 100644 --- a/drivers/md/bitmap.c +++ b/drivers/md/bitmap.c | |||
@@ -1000,10 +1000,11 @@ static int bitmap_init_from_disk(struct bitmap *bitmap, sector_t start) | |||
1000 | page = bitmap->sb_page; | 1000 | page = bitmap->sb_page; |
1001 | offset = sizeof(bitmap_super_t); | 1001 | offset = sizeof(bitmap_super_t); |
1002 | if (!file) | 1002 | if (!file) |
1003 | read_sb_page(bitmap->mddev, | 1003 | page = read_sb_page( |
1004 | bitmap->mddev->bitmap_info.offset, | 1004 | bitmap->mddev, |
1005 | page, | 1005 | bitmap->mddev->bitmap_info.offset, |
1006 | index, count); | 1006 | page, |
1007 | index, count); | ||
1007 | } else if (file) { | 1008 | } else if (file) { |
1008 | page = read_page(file, index, bitmap, count); | 1009 | page = read_page(file, index, bitmap, count); |
1009 | offset = 0; | 1010 | offset = 0; |
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index ad83a4dcadc3..0b830bbe1d8b 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -1839,7 +1839,9 @@ static sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *skipped, i | |||
1839 | 1839 | ||
1840 | /* take from bio_init */ | 1840 | /* take from bio_init */ |
1841 | bio->bi_next = NULL; | 1841 | bio->bi_next = NULL; |
1842 | bio->bi_flags &= ~(BIO_POOL_MASK-1); | ||
1842 | bio->bi_flags |= 1 << BIO_UPTODATE; | 1843 | bio->bi_flags |= 1 << BIO_UPTODATE; |
1844 | bio->bi_comp_cpu = -1; | ||
1843 | bio->bi_rw = READ; | 1845 | bio->bi_rw = READ; |
1844 | bio->bi_vcnt = 0; | 1846 | bio->bi_vcnt = 0; |
1845 | bio->bi_idx = 0; | 1847 | bio->bi_idx = 0; |
@@ -1912,7 +1914,7 @@ static sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *skipped, i | |||
1912 | !test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) | 1914 | !test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) |
1913 | break; | 1915 | break; |
1914 | BUG_ON(sync_blocks < (PAGE_SIZE>>9)); | 1916 | BUG_ON(sync_blocks < (PAGE_SIZE>>9)); |
1915 | if (len > (sync_blocks<<9)) | 1917 | if ((len >> 9) > sync_blocks) |
1916 | len = sync_blocks<<9; | 1918 | len = sync_blocks<<9; |
1917 | } | 1919 | } |
1918 | 1920 | ||
diff --git a/drivers/media/IR/ir-keytable.c b/drivers/media/IR/ir-keytable.c index 7e82a9df726b..7961d59f5cac 100644 --- a/drivers/media/IR/ir-keytable.c +++ b/drivers/media/IR/ir-keytable.c | |||
@@ -319,7 +319,7 @@ static void ir_timer_keyup(unsigned long cookie) | |||
319 | * a keyup event might follow immediately after the keydown. | 319 | * a keyup event might follow immediately after the keydown. |
320 | */ | 320 | */ |
321 | spin_lock_irqsave(&ir->keylock, flags); | 321 | spin_lock_irqsave(&ir->keylock, flags); |
322 | if (time_is_after_eq_jiffies(ir->keyup_jiffies)) | 322 | if (time_is_before_eq_jiffies(ir->keyup_jiffies)) |
323 | ir_keyup(ir); | 323 | ir_keyup(ir); |
324 | spin_unlock_irqrestore(&ir->keylock, flags); | 324 | spin_unlock_irqrestore(&ir->keylock, flags); |
325 | } | 325 | } |
@@ -510,6 +510,13 @@ int __ir_input_register(struct input_dev *input_dev, | |||
510 | (ir_dev->props && ir_dev->props->driver_type == RC_DRIVER_IR_RAW) ? | 510 | (ir_dev->props && ir_dev->props->driver_type == RC_DRIVER_IR_RAW) ? |
511 | " in raw mode" : ""); | 511 | " in raw mode" : ""); |
512 | 512 | ||
513 | /* | ||
514 | * Default delay of 250ms is too short for some protocols, expecially | ||
515 | * since the timeout is currently set to 250ms. Increase it to 500ms, | ||
516 | * to avoid wrong repetition of the keycodes. | ||
517 | */ | ||
518 | input_dev->rep[REP_DELAY] = 500; | ||
519 | |||
513 | return 0; | 520 | return 0; |
514 | 521 | ||
515 | out_event: | 522 | out_event: |
diff --git a/drivers/media/IR/ir-lirc-codec.c b/drivers/media/IR/ir-lirc-codec.c index 77b5946413c0..e63f757d5d72 100644 --- a/drivers/media/IR/ir-lirc-codec.c +++ b/drivers/media/IR/ir-lirc-codec.c | |||
@@ -267,7 +267,7 @@ static int ir_lirc_register(struct input_dev *input_dev) | |||
267 | features |= LIRC_CAN_SET_SEND_CARRIER; | 267 | features |= LIRC_CAN_SET_SEND_CARRIER; |
268 | 268 | ||
269 | if (ir_dev->props->s_tx_duty_cycle) | 269 | if (ir_dev->props->s_tx_duty_cycle) |
270 | features |= LIRC_CAN_SET_REC_DUTY_CYCLE; | 270 | features |= LIRC_CAN_SET_SEND_DUTY_CYCLE; |
271 | } | 271 | } |
272 | 272 | ||
273 | if (ir_dev->props->s_rx_carrier_range) | 273 | if (ir_dev->props->s_rx_carrier_range) |
diff --git a/drivers/media/IR/ir-raw-event.c b/drivers/media/IR/ir-raw-event.c index 43094e7eccfa..8e0e1b1f8c87 100644 --- a/drivers/media/IR/ir-raw-event.c +++ b/drivers/media/IR/ir-raw-event.c | |||
@@ -279,9 +279,11 @@ int ir_raw_event_register(struct input_dev *input_dev) | |||
279 | "rc%u", (unsigned int)ir->devno); | 279 | "rc%u", (unsigned int)ir->devno); |
280 | 280 | ||
281 | if (IS_ERR(ir->raw->thread)) { | 281 | if (IS_ERR(ir->raw->thread)) { |
282 | int ret = PTR_ERR(ir->raw->thread); | ||
283 | |||
282 | kfree(ir->raw); | 284 | kfree(ir->raw); |
283 | ir->raw = NULL; | 285 | ir->raw = NULL; |
284 | return PTR_ERR(ir->raw->thread); | 286 | return ret; |
285 | } | 287 | } |
286 | 288 | ||
287 | mutex_lock(&ir_raw_handler_lock); | 289 | mutex_lock(&ir_raw_handler_lock); |
diff --git a/drivers/media/IR/ir-sysfs.c b/drivers/media/IR/ir-sysfs.c index 96dafc425c8e..46d42467f9b4 100644 --- a/drivers/media/IR/ir-sysfs.c +++ b/drivers/media/IR/ir-sysfs.c | |||
@@ -67,13 +67,14 @@ static ssize_t show_protocols(struct device *d, | |||
67 | char *tmp = buf; | 67 | char *tmp = buf; |
68 | int i; | 68 | int i; |
69 | 69 | ||
70 | if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE) { | 70 | if (ir_dev->props && ir_dev->props->driver_type == RC_DRIVER_SCANCODE) { |
71 | enabled = ir_dev->rc_tab.ir_type; | 71 | enabled = ir_dev->rc_tab.ir_type; |
72 | allowed = ir_dev->props->allowed_protos; | 72 | allowed = ir_dev->props->allowed_protos; |
73 | } else { | 73 | } else if (ir_dev->raw) { |
74 | enabled = ir_dev->raw->enabled_protocols; | 74 | enabled = ir_dev->raw->enabled_protocols; |
75 | allowed = ir_raw_get_allowed_protocols(); | 75 | allowed = ir_raw_get_allowed_protocols(); |
76 | } | 76 | } else |
77 | return sprintf(tmp, "[builtin]\n"); | ||
77 | 78 | ||
78 | IR_dprintk(1, "allowed - 0x%llx, enabled - 0x%llx\n", | 79 | IR_dprintk(1, "allowed - 0x%llx, enabled - 0x%llx\n", |
79 | (long long)allowed, | 80 | (long long)allowed, |
@@ -121,10 +122,14 @@ static ssize_t store_protocols(struct device *d, | |||
121 | int rc, i, count = 0; | 122 | int rc, i, count = 0; |
122 | unsigned long flags; | 123 | unsigned long flags; |
123 | 124 | ||
124 | if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE) | 125 | if (ir_dev->props && ir_dev->props->driver_type == RC_DRIVER_SCANCODE) |
125 | type = ir_dev->rc_tab.ir_type; | 126 | type = ir_dev->rc_tab.ir_type; |
126 | else | 127 | else if (ir_dev->raw) |
127 | type = ir_dev->raw->enabled_protocols; | 128 | type = ir_dev->raw->enabled_protocols; |
129 | else { | ||
130 | IR_dprintk(1, "Protocol switching not supported\n"); | ||
131 | return -EINVAL; | ||
132 | } | ||
128 | 133 | ||
129 | while ((tmp = strsep((char **) &data, " \n")) != NULL) { | 134 | while ((tmp = strsep((char **) &data, " \n")) != NULL) { |
130 | if (!*tmp) | 135 | if (!*tmp) |
@@ -185,7 +190,7 @@ static ssize_t store_protocols(struct device *d, | |||
185 | } | 190 | } |
186 | } | 191 | } |
187 | 192 | ||
188 | if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE) { | 193 | if (ir_dev->props && ir_dev->props->driver_type == RC_DRIVER_SCANCODE) { |
189 | spin_lock_irqsave(&ir_dev->rc_tab.lock, flags); | 194 | spin_lock_irqsave(&ir_dev->rc_tab.lock, flags); |
190 | ir_dev->rc_tab.ir_type = type; | 195 | ir_dev->rc_tab.ir_type = type; |
191 | spin_unlock_irqrestore(&ir_dev->rc_tab.lock, flags); | 196 | spin_unlock_irqrestore(&ir_dev->rc_tab.lock, flags); |
diff --git a/drivers/media/IR/keymaps/rc-rc6-mce.c b/drivers/media/IR/keymaps/rc-rc6-mce.c index 64264f7f838f..39557ad401b6 100644 --- a/drivers/media/IR/keymaps/rc-rc6-mce.c +++ b/drivers/media/IR/keymaps/rc-rc6-mce.c | |||
@@ -19,6 +19,7 @@ static struct ir_scancode rc6_mce[] = { | |||
19 | 19 | ||
20 | { 0x800f0416, KEY_PLAY }, | 20 | { 0x800f0416, KEY_PLAY }, |
21 | { 0x800f0418, KEY_PAUSE }, | 21 | { 0x800f0418, KEY_PAUSE }, |
22 | { 0x800f046e, KEY_PLAYPAUSE }, | ||
22 | { 0x800f0419, KEY_STOP }, | 23 | { 0x800f0419, KEY_STOP }, |
23 | { 0x800f0417, KEY_RECORD }, | 24 | { 0x800f0417, KEY_RECORD }, |
24 | 25 | ||
@@ -37,6 +38,8 @@ static struct ir_scancode rc6_mce[] = { | |||
37 | { 0x800f0411, KEY_VOLUMEDOWN }, | 38 | { 0x800f0411, KEY_VOLUMEDOWN }, |
38 | { 0x800f0412, KEY_CHANNELUP }, | 39 | { 0x800f0412, KEY_CHANNELUP }, |
39 | { 0x800f0413, KEY_CHANNELDOWN }, | 40 | { 0x800f0413, KEY_CHANNELDOWN }, |
41 | { 0x800f043a, KEY_BRIGHTNESSUP }, | ||
42 | { 0x800f0480, KEY_BRIGHTNESSDOWN }, | ||
40 | 43 | ||
41 | { 0x800f0401, KEY_NUMERIC_1 }, | 44 | { 0x800f0401, KEY_NUMERIC_1 }, |
42 | { 0x800f0402, KEY_NUMERIC_2 }, | 45 | { 0x800f0402, KEY_NUMERIC_2 }, |
diff --git a/drivers/media/IR/mceusb.c b/drivers/media/IR/mceusb.c index ac6bb2c01a48..bc620e10ef77 100644 --- a/drivers/media/IR/mceusb.c +++ b/drivers/media/IR/mceusb.c | |||
@@ -120,6 +120,10 @@ static struct usb_device_id mceusb_dev_table[] = { | |||
120 | { USB_DEVICE(VENDOR_PHILIPS, 0x0613) }, | 120 | { USB_DEVICE(VENDOR_PHILIPS, 0x0613) }, |
121 | /* Philips eHome Infrared Transceiver */ | 121 | /* Philips eHome Infrared Transceiver */ |
122 | { USB_DEVICE(VENDOR_PHILIPS, 0x0815) }, | 122 | { USB_DEVICE(VENDOR_PHILIPS, 0x0815) }, |
123 | /* Philips/Spinel plus IR transceiver for ASUS */ | ||
124 | { USB_DEVICE(VENDOR_PHILIPS, 0x206c) }, | ||
125 | /* Philips/Spinel plus IR transceiver for ASUS */ | ||
126 | { USB_DEVICE(VENDOR_PHILIPS, 0x2088) }, | ||
123 | /* Realtek MCE IR Receiver */ | 127 | /* Realtek MCE IR Receiver */ |
124 | { USB_DEVICE(VENDOR_REALTEK, 0x0161) }, | 128 | { USB_DEVICE(VENDOR_REALTEK, 0x0161) }, |
125 | /* SMK/Toshiba G83C0004D410 */ | 129 | /* SMK/Toshiba G83C0004D410 */ |
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c index fe818348b8a3..48397f103d32 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_core.c +++ b/drivers/media/dvb/dvb-usb/dib0700_core.c | |||
@@ -673,9 +673,6 @@ static int dib0700_probe(struct usb_interface *intf, | |||
673 | else | 673 | else |
674 | dev->props.rc.core.bulk_mode = false; | 674 | dev->props.rc.core.bulk_mode = false; |
675 | 675 | ||
676 | /* Need a higher delay, to avoid wrong repeat */ | ||
677 | dev->rc_input_dev->rep[REP_DELAY] = 500; | ||
678 | |||
679 | dib0700_rc_setup(dev); | 676 | dib0700_rc_setup(dev); |
680 | 677 | ||
681 | return 0; | 678 | return 0; |
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c index f634d2e784b2..e06acd1fecb6 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_devices.c +++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c | |||
@@ -940,6 +940,58 @@ static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap) | |||
940 | return adap->fe == NULL ? -ENODEV : 0; | 940 | return adap->fe == NULL ? -ENODEV : 0; |
941 | } | 941 | } |
942 | 942 | ||
943 | /* STK7770P */ | ||
944 | static struct dib7000p_config dib7770p_dib7000p_config = { | ||
945 | .output_mpeg2_in_188_bytes = 1, | ||
946 | |||
947 | .agc_config_count = 1, | ||
948 | .agc = &dib7070_agc_config, | ||
949 | .bw = &dib7070_bw_config_12_mhz, | ||
950 | .tuner_is_baseband = 1, | ||
951 | .spur_protect = 1, | ||
952 | |||
953 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | ||
954 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | ||
955 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | ||
956 | |||
957 | .hostbus_diversity = 1, | ||
958 | .enable_current_mirror = 1, | ||
959 | .disable_sample_and_hold = 0, | ||
960 | }; | ||
961 | |||
962 | static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap) | ||
963 | { | ||
964 | struct usb_device_descriptor *p = &adap->dev->udev->descriptor; | ||
965 | if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) && | ||
966 | p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E)) | ||
967 | dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); | ||
968 | else | ||
969 | dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); | ||
970 | msleep(10); | ||
971 | dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); | ||
972 | dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); | ||
973 | dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); | ||
974 | dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); | ||
975 | |||
976 | dib0700_ctrl_clock(adap->dev, 72, 1); | ||
977 | |||
978 | msleep(10); | ||
979 | dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); | ||
980 | msleep(10); | ||
981 | dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); | ||
982 | |||
983 | if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, | ||
984 | &dib7770p_dib7000p_config) != 0) { | ||
985 | err("%s: dib7000p_i2c_enumeration failed. Cannot continue\n", | ||
986 | __func__); | ||
987 | return -ENODEV; | ||
988 | } | ||
989 | |||
990 | adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x80, | ||
991 | &dib7770p_dib7000p_config); | ||
992 | return adap->fe == NULL ? -ENODEV : 0; | ||
993 | } | ||
994 | |||
943 | /* DIB807x generic */ | 995 | /* DIB807x generic */ |
944 | static struct dibx000_agc_config dib807x_agc_config[2] = { | 996 | static struct dibx000_agc_config dib807x_agc_config[2] = { |
945 | { | 997 | { |
@@ -1781,7 +1833,7 @@ struct usb_device_id dib0700_usb_id_table[] = { | |||
1781 | /* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) }, | 1833 | /* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) }, |
1782 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) }, | 1834 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) }, |
1783 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) }, | 1835 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) }, |
1784 | { USB_DEVICE(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD) }, | 1836 | { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) }, |
1785 | { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) }, | 1837 | { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) }, |
1786 | /* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) }, | 1838 | /* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) }, |
1787 | { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) }, | 1839 | { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) }, |
@@ -2406,7 +2458,7 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2406 | .pid_filter_count = 32, | 2458 | .pid_filter_count = 32, |
2407 | .pid_filter = stk70x0p_pid_filter, | 2459 | .pid_filter = stk70x0p_pid_filter, |
2408 | .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, | 2460 | .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, |
2409 | .frontend_attach = stk7070p_frontend_attach, | 2461 | .frontend_attach = stk7770p_frontend_attach, |
2410 | .tuner_attach = dib7770p_tuner_attach, | 2462 | .tuner_attach = dib7770p_tuner_attach, |
2411 | 2463 | ||
2412 | DIB0700_DEFAULT_STREAMING_CONFIG(0x02), | 2464 | DIB0700_DEFAULT_STREAMING_CONFIG(0x02), |
diff --git a/drivers/media/dvb/dvb-usb/opera1.c b/drivers/media/dvb/dvb-usb/opera1.c index 6b22ec64ab0c..f896337b4535 100644 --- a/drivers/media/dvb/dvb-usb/opera1.c +++ b/drivers/media/dvb/dvb-usb/opera1.c | |||
@@ -483,9 +483,7 @@ static int opera1_xilinx_load_firmware(struct usb_device *dev, | |||
483 | } | 483 | } |
484 | } | 484 | } |
485 | kfree(p); | 485 | kfree(p); |
486 | if (fw) { | 486 | release_firmware(fw); |
487 | release_firmware(fw); | ||
488 | } | ||
489 | return ret; | 487 | return ret; |
490 | } | 488 | } |
491 | 489 | ||
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index 2e28b973dfd3..3aed0d433921 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
@@ -260,6 +260,9 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad | |||
260 | 260 | ||
261 | // dprintk( "908: %x, 909: %x\n", reg_908, reg_909); | 261 | // dprintk( "908: %x, 909: %x\n", reg_908, reg_909); |
262 | 262 | ||
263 | reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4; | ||
264 | reg_908 |= (state->cfg.enable_current_mirror & 1) << 7; | ||
265 | |||
263 | dib7000p_write_word(state, 908, reg_908); | 266 | dib7000p_write_word(state, 908, reg_908); |
264 | dib7000p_write_word(state, 909, reg_909); | 267 | dib7000p_write_word(state, 909, reg_909); |
265 | } | 268 | } |
@@ -778,7 +781,10 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
778 | default: | 781 | default: |
779 | case GUARD_INTERVAL_1_32: value *= 1; break; | 782 | case GUARD_INTERVAL_1_32: value *= 1; break; |
780 | } | 783 | } |
781 | state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO | 784 | if (state->cfg.diversity_delay == 0) |
785 | state->div_sync_wait = (value * 3) / 2 + 48; // add 50% SFN margin + compensate for one DVSY-fifo | ||
786 | else | ||
787 | state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; // add 50% SFN margin + compensate for one DVSY-fifo | ||
782 | 788 | ||
783 | /* deactive the possibility of diversity reception if extended interleaver */ | 789 | /* deactive the possibility of diversity reception if extended interleaver */ |
784 | state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K; | 790 | state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K; |
diff --git a/drivers/media/dvb/frontends/dib7000p.h b/drivers/media/dvb/frontends/dib7000p.h index 805dd13a97ee..da17345bf5bd 100644 --- a/drivers/media/dvb/frontends/dib7000p.h +++ b/drivers/media/dvb/frontends/dib7000p.h | |||
@@ -33,6 +33,11 @@ struct dib7000p_config { | |||
33 | int (*agc_control) (struct dvb_frontend *, u8 before); | 33 | int (*agc_control) (struct dvb_frontend *, u8 before); |
34 | 34 | ||
35 | u8 output_mode; | 35 | u8 output_mode; |
36 | u8 disable_sample_and_hold : 1; | ||
37 | |||
38 | u8 enable_current_mirror : 1; | ||
39 | u8 diversity_delay; | ||
40 | |||
36 | }; | 41 | }; |
37 | 42 | ||
38 | #define DEFAULT_DIB7000P_I2C_ADDRESS 18 | 43 | #define DEFAULT_DIB7000P_I2C_ADDRESS 18 |
diff --git a/drivers/media/dvb/siano/smscoreapi.c b/drivers/media/dvb/siano/smscoreapi.c index d93468cd3a85..ff3b0fa901b3 100644 --- a/drivers/media/dvb/siano/smscoreapi.c +++ b/drivers/media/dvb/siano/smscoreapi.c | |||
@@ -1098,33 +1098,26 @@ EXPORT_SYMBOL_GPL(smscore_onresponse); | |||
1098 | * | 1098 | * |
1099 | * @return pointer to descriptor on success, NULL on error. | 1099 | * @return pointer to descriptor on success, NULL on error. |
1100 | */ | 1100 | */ |
1101 | struct smscore_buffer_t *smscore_getbuffer(struct smscore_device_t *coredev) | 1101 | |
1102 | struct smscore_buffer_t *get_entry(struct smscore_device_t *coredev) | ||
1102 | { | 1103 | { |
1103 | struct smscore_buffer_t *cb = NULL; | 1104 | struct smscore_buffer_t *cb = NULL; |
1104 | unsigned long flags; | 1105 | unsigned long flags; |
1105 | 1106 | ||
1106 | DEFINE_WAIT(wait); | ||
1107 | |||
1108 | spin_lock_irqsave(&coredev->bufferslock, flags); | 1107 | spin_lock_irqsave(&coredev->bufferslock, flags); |
1109 | 1108 | if (!list_empty(&coredev->buffers)) { | |
1110 | /* This function must return a valid buffer, since the buffer list is | 1109 | cb = (struct smscore_buffer_t *) coredev->buffers.next; |
1111 | * finite, we check that there is an available buffer, if not, we wait | 1110 | list_del(&cb->entry); |
1112 | * until such buffer become available. | ||
1113 | */ | ||
1114 | |||
1115 | prepare_to_wait(&coredev->buffer_mng_waitq, &wait, TASK_INTERRUPTIBLE); | ||
1116 | if (list_empty(&coredev->buffers)) { | ||
1117 | spin_unlock_irqrestore(&coredev->bufferslock, flags); | ||
1118 | schedule(); | ||
1119 | spin_lock_irqsave(&coredev->bufferslock, flags); | ||
1120 | } | 1111 | } |
1112 | spin_unlock_irqrestore(&coredev->bufferslock, flags); | ||
1113 | return cb; | ||
1114 | } | ||
1121 | 1115 | ||
1122 | finish_wait(&coredev->buffer_mng_waitq, &wait); | 1116 | struct smscore_buffer_t *smscore_getbuffer(struct smscore_device_t *coredev) |
1123 | 1117 | { | |
1124 | cb = (struct smscore_buffer_t *) coredev->buffers.next; | 1118 | struct smscore_buffer_t *cb = NULL; |
1125 | list_del(&cb->entry); | ||
1126 | 1119 | ||
1127 | spin_unlock_irqrestore(&coredev->bufferslock, flags); | 1120 | wait_event(coredev->buffer_mng_waitq, (cb = get_entry(coredev))); |
1128 | 1121 | ||
1129 | return cb; | 1122 | return cb; |
1130 | } | 1123 | } |
diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c index 67a4ec8768a6..4ce541a5eb47 100644 --- a/drivers/media/radio/si470x/radio-si470x-i2c.c +++ b/drivers/media/radio/si470x/radio-si470x-i2c.c | |||
@@ -395,7 +395,7 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client, | |||
395 | radio->registers[POWERCFG] = POWERCFG_ENABLE; | 395 | radio->registers[POWERCFG] = POWERCFG_ENABLE; |
396 | if (si470x_set_register(radio, POWERCFG) < 0) { | 396 | if (si470x_set_register(radio, POWERCFG) < 0) { |
397 | retval = -EIO; | 397 | retval = -EIO; |
398 | goto err_all; | 398 | goto err_video; |
399 | } | 399 | } |
400 | msleep(110); | 400 | msleep(110); |
401 | 401 | ||
diff --git a/drivers/media/video/cx231xx/Makefile b/drivers/media/video/cx231xx/Makefile index 755dd0ce65ff..6f2b57384488 100644 --- a/drivers/media/video/cx231xx/Makefile +++ b/drivers/media/video/cx231xx/Makefile | |||
@@ -11,4 +11,5 @@ EXTRA_CFLAGS += -Idrivers/media/video | |||
11 | EXTRA_CFLAGS += -Idrivers/media/common/tuners | 11 | EXTRA_CFLAGS += -Idrivers/media/common/tuners |
12 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core | 12 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core |
13 | EXTRA_CFLAGS += -Idrivers/media/dvb/frontends | 13 | EXTRA_CFLAGS += -Idrivers/media/dvb/frontends |
14 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-usb | ||
14 | 15 | ||
diff --git a/drivers/media/video/cx231xx/cx231xx-cards.c b/drivers/media/video/cx231xx/cx231xx-cards.c index 6bdc0ef18119..f2a4900014bc 100644 --- a/drivers/media/video/cx231xx/cx231xx-cards.c +++ b/drivers/media/video/cx231xx/cx231xx-cards.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <media/v4l2-chip-ident.h> | 32 | #include <media/v4l2-chip-ident.h> |
33 | 33 | ||
34 | #include <media/cx25840.h> | 34 | #include <media/cx25840.h> |
35 | #include "dvb-usb-ids.h" | ||
35 | #include "xc5000.h" | 36 | #include "xc5000.h" |
36 | 37 | ||
37 | #include "cx231xx.h" | 38 | #include "cx231xx.h" |
@@ -175,6 +176,8 @@ struct usb_device_id cx231xx_id_table[] = { | |||
175 | .driver_info = CX231XX_BOARD_CNXT_RDE_250}, | 176 | .driver_info = CX231XX_BOARD_CNXT_RDE_250}, |
176 | {USB_DEVICE(0x0572, 0x58A1), | 177 | {USB_DEVICE(0x0572, 0x58A1), |
177 | .driver_info = CX231XX_BOARD_CNXT_RDU_250}, | 178 | .driver_info = CX231XX_BOARD_CNXT_RDU_250}, |
179 | {USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x4000,0x4fff), | ||
180 | .driver_info = CX231XX_BOARD_UNKNOWN}, | ||
178 | {}, | 181 | {}, |
179 | }; | 182 | }; |
180 | 183 | ||
@@ -226,14 +229,16 @@ void cx231xx_pre_card_setup(struct cx231xx *dev) | |||
226 | dev->board.name, dev->model); | 229 | dev->board.name, dev->model); |
227 | 230 | ||
228 | /* set the direction for GPIO pins */ | 231 | /* set the direction for GPIO pins */ |
229 | cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1); | 232 | if (dev->board.tuner_gpio) { |
230 | cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1); | 233 | cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1); |
231 | cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1); | 234 | cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1); |
235 | cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1); | ||
232 | 236 | ||
233 | /* request some modules if any required */ | 237 | /* request some modules if any required */ |
234 | 238 | ||
235 | /* reset the Tuner */ | 239 | /* reset the Tuner */ |
236 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); | 240 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); |
241 | } | ||
237 | 242 | ||
238 | /* set the mode to Analog mode initially */ | 243 | /* set the mode to Analog mode initially */ |
239 | cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); | 244 | cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); |
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index 86ca8c2359dd..f5a3e74c3c7c 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c | |||
@@ -1996,7 +1996,7 @@ static int cx25840_probe(struct i2c_client *client, | |||
1996 | 1996 | ||
1997 | state->volume = v4l2_ctrl_new_std(&state->hdl, | 1997 | state->volume = v4l2_ctrl_new_std(&state->hdl, |
1998 | &cx25840_audio_ctrl_ops, V4L2_CID_AUDIO_VOLUME, | 1998 | &cx25840_audio_ctrl_ops, V4L2_CID_AUDIO_VOLUME, |
1999 | 0, 65335, 65535 / 100, default_volume); | 1999 | 0, 65535, 65535 / 100, default_volume); |
2000 | state->mute = v4l2_ctrl_new_std(&state->hdl, | 2000 | state->mute = v4l2_ctrl_new_std(&state->hdl, |
2001 | &cx25840_audio_ctrl_ops, V4L2_CID_AUDIO_MUTE, | 2001 | &cx25840_audio_ctrl_ops, V4L2_CID_AUDIO_MUTE, |
2002 | 0, 1, 1, 0); | 2002 | 0, 1, 1, 0); |
diff --git a/drivers/media/video/cx88/Kconfig b/drivers/media/video/cx88/Kconfig index 99dbae117591..0fa85cbefbb1 100644 --- a/drivers/media/video/cx88/Kconfig +++ b/drivers/media/video/cx88/Kconfig | |||
@@ -17,7 +17,7 @@ config VIDEO_CX88 | |||
17 | 17 | ||
18 | config VIDEO_CX88_ALSA | 18 | config VIDEO_CX88_ALSA |
19 | tristate "Conexant 2388x DMA audio support" | 19 | tristate "Conexant 2388x DMA audio support" |
20 | depends on VIDEO_CX88 && SND && EXPERIMENTAL | 20 | depends on VIDEO_CX88 && SND |
21 | select SND_PCM | 21 | select SND_PCM |
22 | ---help--- | 22 | ---help--- |
23 | This is a video4linux driver for direct (DMA) audio on | 23 | This is a video4linux driver for direct (DMA) audio on |
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c index b9846106913e..78abc1c1f9d5 100644 --- a/drivers/media/video/gspca/gspca.c +++ b/drivers/media/video/gspca/gspca.c | |||
@@ -223,6 +223,7 @@ static int alloc_and_submit_int_urb(struct gspca_dev *gspca_dev, | |||
223 | usb_rcvintpipe(dev, ep->bEndpointAddress), | 223 | usb_rcvintpipe(dev, ep->bEndpointAddress), |
224 | buffer, buffer_len, | 224 | buffer, buffer_len, |
225 | int_irq, (void *)gspca_dev, interval); | 225 | int_irq, (void *)gspca_dev, interval); |
226 | urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; | ||
226 | gspca_dev->int_urb = urb; | 227 | gspca_dev->int_urb = urb; |
227 | ret = usb_submit_urb(urb, GFP_KERNEL); | 228 | ret = usb_submit_urb(urb, GFP_KERNEL); |
228 | if (ret < 0) { | 229 | if (ret < 0) { |
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c index 83a718f0f3f9..9052d5702556 100644 --- a/drivers/media/video/gspca/sn9c20x.c +++ b/drivers/media/video/gspca/sn9c20x.c | |||
@@ -2357,8 +2357,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, | |||
2357 | (data[33] << 10); | 2357 | (data[33] << 10); |
2358 | avg_lum >>= 9; | 2358 | avg_lum >>= 9; |
2359 | atomic_set(&sd->avg_lum, avg_lum); | 2359 | atomic_set(&sd->avg_lum, avg_lum); |
2360 | gspca_frame_add(gspca_dev, LAST_PACKET, | 2360 | gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); |
2361 | data, len); | ||
2362 | return; | 2361 | return; |
2363 | } | 2362 | } |
2364 | if (gspca_dev->last_packet_type == LAST_PACKET) { | 2363 | if (gspca_dev->last_packet_type == LAST_PACKET) { |
diff --git a/drivers/media/video/ivtv/ivtvfb.c b/drivers/media/video/ivtv/ivtvfb.c index be03a712731c..f0316d02f09f 100644 --- a/drivers/media/video/ivtv/ivtvfb.c +++ b/drivers/media/video/ivtv/ivtvfb.c | |||
@@ -466,6 +466,8 @@ static int ivtvfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long ar | |||
466 | struct fb_vblank vblank; | 466 | struct fb_vblank vblank; |
467 | u32 trace; | 467 | u32 trace; |
468 | 468 | ||
469 | memset(&vblank, 0, sizeof(struct fb_vblank)); | ||
470 | |||
469 | vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT | | 471 | vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT | |
470 | FB_VBLANK_HAVE_VSYNC; | 472 | FB_VBLANK_HAVE_VSYNC; |
471 | trace = read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16; | 473 | trace = read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16; |
diff --git a/drivers/media/video/mem2mem_testdev.c b/drivers/media/video/mem2mem_testdev.c index 4525335f9bd4..a7210d981388 100644 --- a/drivers/media/video/mem2mem_testdev.c +++ b/drivers/media/video/mem2mem_testdev.c | |||
@@ -239,7 +239,7 @@ static int device_process(struct m2mtest_ctx *ctx, | |||
239 | return -EFAULT; | 239 | return -EFAULT; |
240 | } | 240 | } |
241 | 241 | ||
242 | if (in_buf->vb.size < out_buf->vb.size) { | 242 | if (in_buf->vb.size > out_buf->vb.size) { |
243 | v4l2_err(&dev->v4l2_dev, "Output buffer is too small\n"); | 243 | v4l2_err(&dev->v4l2_dev, "Output buffer is too small\n"); |
244 | return -EINVAL; | 244 | return -EINVAL; |
245 | } | 245 | } |
@@ -1014,6 +1014,7 @@ static int m2mtest_remove(struct platform_device *pdev) | |||
1014 | v4l2_m2m_release(dev->m2m_dev); | 1014 | v4l2_m2m_release(dev->m2m_dev); |
1015 | del_timer_sync(&dev->timer); | 1015 | del_timer_sync(&dev->timer); |
1016 | video_unregister_device(dev->vfd); | 1016 | video_unregister_device(dev->vfd); |
1017 | video_device_release(dev->vfd); | ||
1017 | v4l2_device_unregister(&dev->v4l2_dev); | 1018 | v4l2_device_unregister(&dev->v4l2_dev); |
1018 | kfree(dev); | 1019 | kfree(dev); |
1019 | 1020 | ||
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c index 758a4db27d65..c71af4e0e517 100644 --- a/drivers/media/video/mt9m111.c +++ b/drivers/media/video/mt9m111.c | |||
@@ -447,6 +447,9 @@ static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |||
447 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", | 447 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", |
448 | __func__, rect.left, rect.top, rect.width, rect.height); | 448 | __func__, rect.left, rect.top, rect.width, rect.height); |
449 | 449 | ||
450 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
451 | return -EINVAL; | ||
452 | |||
450 | ret = mt9m111_make_rect(client, &rect); | 453 | ret = mt9m111_make_rect(client, &rect); |
451 | if (!ret) | 454 | if (!ret) |
452 | mt9m111->rect = rect; | 455 | mt9m111->rect = rect; |
@@ -466,12 +469,14 @@ static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |||
466 | 469 | ||
467 | static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | 470 | static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) |
468 | { | 471 | { |
472 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
473 | return -EINVAL; | ||
474 | |||
469 | a->bounds.left = MT9M111_MIN_DARK_COLS; | 475 | a->bounds.left = MT9M111_MIN_DARK_COLS; |
470 | a->bounds.top = MT9M111_MIN_DARK_ROWS; | 476 | a->bounds.top = MT9M111_MIN_DARK_ROWS; |
471 | a->bounds.width = MT9M111_MAX_WIDTH; | 477 | a->bounds.width = MT9M111_MAX_WIDTH; |
472 | a->bounds.height = MT9M111_MAX_HEIGHT; | 478 | a->bounds.height = MT9M111_MAX_HEIGHT; |
473 | a->defrect = a->bounds; | 479 | a->defrect = a->bounds; |
474 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
475 | a->pixelaspect.numerator = 1; | 480 | a->pixelaspect.numerator = 1; |
476 | a->pixelaspect.denominator = 1; | 481 | a->pixelaspect.denominator = 1; |
477 | 482 | ||
@@ -487,6 +492,7 @@ static int mt9m111_g_fmt(struct v4l2_subdev *sd, | |||
487 | mf->width = mt9m111->rect.width; | 492 | mf->width = mt9m111->rect.width; |
488 | mf->height = mt9m111->rect.height; | 493 | mf->height = mt9m111->rect.height; |
489 | mf->code = mt9m111->fmt->code; | 494 | mf->code = mt9m111->fmt->code; |
495 | mf->colorspace = mt9m111->fmt->colorspace; | ||
490 | mf->field = V4L2_FIELD_NONE; | 496 | mf->field = V4L2_FIELD_NONE; |
491 | 497 | ||
492 | return 0; | 498 | return 0; |
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c index e7cd23cd6394..b48473c7896b 100644 --- a/drivers/media/video/mt9v022.c +++ b/drivers/media/video/mt9v022.c | |||
@@ -402,9 +402,6 @@ static int mt9v022_s_fmt(struct v4l2_subdev *sd, | |||
402 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) | 402 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) |
403 | return -EINVAL; | 403 | return -EINVAL; |
404 | break; | 404 | break; |
405 | case 0: | ||
406 | /* No format change, only geometry */ | ||
407 | break; | ||
408 | default: | 405 | default: |
409 | return -EINVAL; | 406 | return -EINVAL; |
410 | } | 407 | } |
diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c index 66ff174151b5..b6ea67221d1d 100644 --- a/drivers/media/video/mx2_camera.c +++ b/drivers/media/video/mx2_camera.c | |||
@@ -378,6 +378,9 @@ static void mx25_camera_frame_done(struct mx2_camera_dev *pcdev, int fb, | |||
378 | 378 | ||
379 | spin_lock_irqsave(&pcdev->lock, flags); | 379 | spin_lock_irqsave(&pcdev->lock, flags); |
380 | 380 | ||
381 | if (*fb_active == NULL) | ||
382 | goto out; | ||
383 | |||
381 | vb = &(*fb_active)->vb; | 384 | vb = &(*fb_active)->vb; |
382 | dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 385 | dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
383 | vb, vb->baddr, vb->bsize); | 386 | vb, vb->baddr, vb->bsize); |
@@ -402,6 +405,7 @@ static void mx25_camera_frame_done(struct mx2_camera_dev *pcdev, int fb, | |||
402 | 405 | ||
403 | *fb_active = buf; | 406 | *fb_active = buf; |
404 | 407 | ||
408 | out: | ||
405 | spin_unlock_irqrestore(&pcdev->lock, flags); | 409 | spin_unlock_irqrestore(&pcdev->lock, flags); |
406 | } | 410 | } |
407 | 411 | ||
diff --git a/drivers/media/video/pvrusb2/pvrusb2-ctrl.c b/drivers/media/video/pvrusb2/pvrusb2-ctrl.c index 1b992b847198..55ea914c7fcd 100644 --- a/drivers/media/video/pvrusb2/pvrusb2-ctrl.c +++ b/drivers/media/video/pvrusb2/pvrusb2-ctrl.c | |||
@@ -513,7 +513,7 @@ int pvr2_ctrl_sym_to_value(struct pvr2_ctrl *cptr, | |||
513 | if (ret >= 0) { | 513 | if (ret >= 0) { |
514 | ret = pvr2_ctrl_range_check(cptr,*valptr); | 514 | ret = pvr2_ctrl_range_check(cptr,*valptr); |
515 | } | 515 | } |
516 | if (maskptr) *maskptr = ~0; | 516 | *maskptr = ~0; |
517 | } else if (cptr->info->type == pvr2_ctl_bool) { | 517 | } else if (cptr->info->type == pvr2_ctl_bool) { |
518 | ret = parse_token(ptr,len,valptr,boolNames, | 518 | ret = parse_token(ptr,len,valptr,boolNames, |
519 | ARRAY_SIZE(boolNames)); | 519 | ARRAY_SIZE(boolNames)); |
@@ -522,7 +522,7 @@ int pvr2_ctrl_sym_to_value(struct pvr2_ctrl *cptr, | |||
522 | } else if (ret == 0) { | 522 | } else if (ret == 0) { |
523 | *valptr = (*valptr & 1) ? !0 : 0; | 523 | *valptr = (*valptr & 1) ? !0 : 0; |
524 | } | 524 | } |
525 | if (maskptr) *maskptr = 1; | 525 | *maskptr = 1; |
526 | } else if (cptr->info->type == pvr2_ctl_enum) { | 526 | } else if (cptr->info->type == pvr2_ctl_enum) { |
527 | ret = parse_token( | 527 | ret = parse_token( |
528 | ptr,len,valptr, | 528 | ptr,len,valptr, |
@@ -531,7 +531,7 @@ int pvr2_ctrl_sym_to_value(struct pvr2_ctrl *cptr, | |||
531 | if (ret >= 0) { | 531 | if (ret >= 0) { |
532 | ret = pvr2_ctrl_range_check(cptr,*valptr); | 532 | ret = pvr2_ctrl_range_check(cptr,*valptr); |
533 | } | 533 | } |
534 | if (maskptr) *maskptr = ~0; | 534 | *maskptr = ~0; |
535 | } else if (cptr->info->type == pvr2_ctl_bitmask) { | 535 | } else if (cptr->info->type == pvr2_ctl_bitmask) { |
536 | ret = parse_tlist( | 536 | ret = parse_tlist( |
537 | ptr,len,maskptr,valptr, | 537 | ptr,len,maskptr,valptr, |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index b151c7be8a50..6961c55baf9b 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c | |||
@@ -393,6 +393,37 @@ static void fimc_set_yuv_order(struct fimc_ctx *ctx) | |||
393 | dbg("ctx->out_order_1p= %d", ctx->out_order_1p); | 393 | dbg("ctx->out_order_1p= %d", ctx->out_order_1p); |
394 | } | 394 | } |
395 | 395 | ||
396 | static void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f) | ||
397 | { | ||
398 | struct samsung_fimc_variant *variant = ctx->fimc_dev->variant; | ||
399 | |||
400 | f->dma_offset.y_h = f->offs_h; | ||
401 | if (!variant->pix_hoff) | ||
402 | f->dma_offset.y_h *= (f->fmt->depth >> 3); | ||
403 | |||
404 | f->dma_offset.y_v = f->offs_v; | ||
405 | |||
406 | f->dma_offset.cb_h = f->offs_h; | ||
407 | f->dma_offset.cb_v = f->offs_v; | ||
408 | |||
409 | f->dma_offset.cr_h = f->offs_h; | ||
410 | f->dma_offset.cr_v = f->offs_v; | ||
411 | |||
412 | if (!variant->pix_hoff) { | ||
413 | if (f->fmt->planes_cnt == 3) { | ||
414 | f->dma_offset.cb_h >>= 1; | ||
415 | f->dma_offset.cr_h >>= 1; | ||
416 | } | ||
417 | if (f->fmt->color == S5P_FIMC_YCBCR420) { | ||
418 | f->dma_offset.cb_v >>= 1; | ||
419 | f->dma_offset.cr_v >>= 1; | ||
420 | } | ||
421 | } | ||
422 | |||
423 | dbg("in_offset: color= %d, y_h= %d, y_v= %d", | ||
424 | f->fmt->color, f->dma_offset.y_h, f->dma_offset.y_v); | ||
425 | } | ||
426 | |||
396 | /** | 427 | /** |
397 | * fimc_prepare_config - check dimensions, operation and color mode | 428 | * fimc_prepare_config - check dimensions, operation and color mode |
398 | * and pre-calculate offset and the scaling coefficients. | 429 | * and pre-calculate offset and the scaling coefficients. |
@@ -406,7 +437,6 @@ static int fimc_prepare_config(struct fimc_ctx *ctx, u32 flags) | |||
406 | { | 437 | { |
407 | struct fimc_frame *s_frame, *d_frame; | 438 | struct fimc_frame *s_frame, *d_frame; |
408 | struct fimc_vid_buffer *buf = NULL; | 439 | struct fimc_vid_buffer *buf = NULL; |
409 | struct samsung_fimc_variant *variant = ctx->fimc_dev->variant; | ||
410 | int ret = 0; | 440 | int ret = 0; |
411 | 441 | ||
412 | s_frame = &ctx->s_frame; | 442 | s_frame = &ctx->s_frame; |
@@ -419,61 +449,16 @@ static int fimc_prepare_config(struct fimc_ctx *ctx, u32 flags) | |||
419 | swap(d_frame->width, d_frame->height); | 449 | swap(d_frame->width, d_frame->height); |
420 | } | 450 | } |
421 | 451 | ||
422 | /* Prepare the output offset ratios for scaler. */ | 452 | /* Prepare the DMA offset ratios for scaler. */ |
423 | d_frame->dma_offset.y_h = d_frame->offs_h; | 453 | fimc_prepare_dma_offset(ctx, &ctx->s_frame); |
424 | if (!variant->pix_hoff) | 454 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); |
425 | d_frame->dma_offset.y_h *= (d_frame->fmt->depth >> 3); | ||
426 | |||
427 | d_frame->dma_offset.y_v = d_frame->offs_v; | ||
428 | |||
429 | d_frame->dma_offset.cb_h = d_frame->offs_h; | ||
430 | d_frame->dma_offset.cb_v = d_frame->offs_v; | ||
431 | |||
432 | d_frame->dma_offset.cr_h = d_frame->offs_h; | ||
433 | d_frame->dma_offset.cr_v = d_frame->offs_v; | ||
434 | 455 | ||
435 | if (!variant->pix_hoff && d_frame->fmt->planes_cnt == 3) { | ||
436 | d_frame->dma_offset.cb_h >>= 1; | ||
437 | d_frame->dma_offset.cb_v >>= 1; | ||
438 | d_frame->dma_offset.cr_h >>= 1; | ||
439 | d_frame->dma_offset.cr_v >>= 1; | ||
440 | } | ||
441 | |||
442 | dbg("out offset: color= %d, y_h= %d, y_v= %d", | ||
443 | d_frame->fmt->color, | ||
444 | d_frame->dma_offset.y_h, d_frame->dma_offset.y_v); | ||
445 | |||
446 | /* Prepare the input offset ratios for scaler. */ | ||
447 | s_frame->dma_offset.y_h = s_frame->offs_h; | ||
448 | if (!variant->pix_hoff) | ||
449 | s_frame->dma_offset.y_h *= (s_frame->fmt->depth >> 3); | ||
450 | s_frame->dma_offset.y_v = s_frame->offs_v; | ||
451 | |||
452 | s_frame->dma_offset.cb_h = s_frame->offs_h; | ||
453 | s_frame->dma_offset.cb_v = s_frame->offs_v; | ||
454 | |||
455 | s_frame->dma_offset.cr_h = s_frame->offs_h; | ||
456 | s_frame->dma_offset.cr_v = s_frame->offs_v; | ||
457 | |||
458 | if (!variant->pix_hoff && s_frame->fmt->planes_cnt == 3) { | ||
459 | s_frame->dma_offset.cb_h >>= 1; | ||
460 | s_frame->dma_offset.cb_v >>= 1; | ||
461 | s_frame->dma_offset.cr_h >>= 1; | ||
462 | s_frame->dma_offset.cr_v >>= 1; | ||
463 | } | ||
464 | |||
465 | dbg("in offset: color= %d, y_h= %d, y_v= %d", | ||
466 | s_frame->fmt->color, s_frame->dma_offset.y_h, | ||
467 | s_frame->dma_offset.y_v); | ||
468 | |||
469 | fimc_set_yuv_order(ctx); | ||
470 | |||
471 | /* Check against the scaler ratio. */ | ||
472 | if (s_frame->height > (SCALER_MAX_VRATIO * d_frame->height) || | 456 | if (s_frame->height > (SCALER_MAX_VRATIO * d_frame->height) || |
473 | s_frame->width > (SCALER_MAX_HRATIO * d_frame->width)) { | 457 | s_frame->width > (SCALER_MAX_HRATIO * d_frame->width)) { |
474 | err("out of scaler range"); | 458 | err("out of scaler range"); |
475 | return -EINVAL; | 459 | return -EINVAL; |
476 | } | 460 | } |
461 | fimc_set_yuv_order(ctx); | ||
477 | } | 462 | } |
478 | 463 | ||
479 | /* Input DMA mode is not allowed when the scaler is disabled. */ | 464 | /* Input DMA mode is not allowed when the scaler is disabled. */ |
@@ -822,7 +807,8 @@ static int fimc_m2m_s_fmt(struct file *file, void *priv, struct v4l2_format *f) | |||
822 | } else { | 807 | } else { |
823 | v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev, | 808 | v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev, |
824 | "Wrong buffer/video queue type (%d)\n", f->type); | 809 | "Wrong buffer/video queue type (%d)\n", f->type); |
825 | return -EINVAL; | 810 | ret = -EINVAL; |
811 | goto s_fmt_out; | ||
826 | } | 812 | } |
827 | 813 | ||
828 | pix = &f->fmt.pix; | 814 | pix = &f->fmt.pix; |
@@ -1414,8 +1400,10 @@ static int fimc_probe(struct platform_device *pdev) | |||
1414 | } | 1400 | } |
1415 | 1401 | ||
1416 | fimc->work_queue = create_workqueue(dev_name(&fimc->pdev->dev)); | 1402 | fimc->work_queue = create_workqueue(dev_name(&fimc->pdev->dev)); |
1417 | if (!fimc->work_queue) | 1403 | if (!fimc->work_queue) { |
1404 | ret = -ENOMEM; | ||
1418 | goto err_irq; | 1405 | goto err_irq; |
1406 | } | ||
1419 | 1407 | ||
1420 | ret = fimc_register_m2m_device(fimc); | 1408 | ret = fimc_register_m2m_device(fimc); |
1421 | if (ret) | 1409 | if (ret) |
@@ -1492,6 +1480,7 @@ static struct samsung_fimc_variant fimc2_variant_s5p = { | |||
1492 | }; | 1480 | }; |
1493 | 1481 | ||
1494 | static struct samsung_fimc_variant fimc01_variant_s5pv210 = { | 1482 | static struct samsung_fimc_variant fimc01_variant_s5pv210 = { |
1483 | .pix_hoff = 1, | ||
1495 | .has_inp_rot = 1, | 1484 | .has_inp_rot = 1, |
1496 | .has_out_rot = 1, | 1485 | .has_out_rot = 1, |
1497 | .min_inp_pixsize = 16, | 1486 | .min_inp_pixsize = 16, |
@@ -1506,6 +1495,7 @@ static struct samsung_fimc_variant fimc01_variant_s5pv210 = { | |||
1506 | }; | 1495 | }; |
1507 | 1496 | ||
1508 | static struct samsung_fimc_variant fimc2_variant_s5pv210 = { | 1497 | static struct samsung_fimc_variant fimc2_variant_s5pv210 = { |
1498 | .pix_hoff = 1, | ||
1509 | .min_inp_pixsize = 16, | 1499 | .min_inp_pixsize = 16, |
1510 | .min_out_pixsize = 32, | 1500 | .min_out_pixsize = 32, |
1511 | 1501 | ||
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index ec697fcd406e..bb8d83d8ddaf 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
@@ -4323,13 +4323,13 @@ struct saa7134_board saa7134_boards[] = { | |||
4323 | }, | 4323 | }, |
4324 | [SAA7134_BOARD_BEHOLD_COLUMBUS_TVFM] = { | 4324 | [SAA7134_BOARD_BEHOLD_COLUMBUS_TVFM] = { |
4325 | /* Beholder Intl. Ltd. 2008 */ | 4325 | /* Beholder Intl. Ltd. 2008 */ |
4326 | /*Dmitry Belimov <d.belimov@gmail.com> */ | 4326 | /* Dmitry Belimov <d.belimov@gmail.com> */ |
4327 | .name = "Beholder BeholdTV Columbus TVFM", | 4327 | .name = "Beholder BeholdTV Columbus TV/FM", |
4328 | .audio_clock = 0x00187de7, | 4328 | .audio_clock = 0x00187de7, |
4329 | .tuner_type = TUNER_ALPS_TSBE5_PAL, | 4329 | .tuner_type = TUNER_ALPS_TSBE5_PAL, |
4330 | .radio_type = UNSET, | 4330 | .radio_type = TUNER_TEA5767, |
4331 | .tuner_addr = ADDR_UNSET, | 4331 | .tuner_addr = 0xc2 >> 1, |
4332 | .radio_addr = ADDR_UNSET, | 4332 | .radio_addr = 0xc0 >> 1, |
4333 | .tda9887_conf = TDA9887_PRESENT, | 4333 | .tda9887_conf = TDA9887_PRESENT, |
4334 | .gpiomask = 0x000A8004, | 4334 | .gpiomask = 0x000A8004, |
4335 | .inputs = {{ | 4335 | .inputs = {{ |
diff --git a/drivers/media/video/saa7164/saa7164-buffer.c b/drivers/media/video/saa7164/saa7164-buffer.c index 5713f3a4b76c..ddd25d32723d 100644 --- a/drivers/media/video/saa7164/saa7164-buffer.c +++ b/drivers/media/video/saa7164/saa7164-buffer.c | |||
@@ -136,10 +136,11 @@ ret: | |||
136 | int saa7164_buffer_dealloc(struct saa7164_tsport *port, | 136 | int saa7164_buffer_dealloc(struct saa7164_tsport *port, |
137 | struct saa7164_buffer *buf) | 137 | struct saa7164_buffer *buf) |
138 | { | 138 | { |
139 | struct saa7164_dev *dev = port->dev; | 139 | struct saa7164_dev *dev; |
140 | 140 | ||
141 | if ((buf == 0) || (port == 0)) | 141 | if (!buf || !port) |
142 | return SAA_ERR_BAD_PARAMETER; | 142 | return SAA_ERR_BAD_PARAMETER; |
143 | dev = port->dev; | ||
143 | 144 | ||
144 | dprintk(DBGLVL_BUF, "%s() deallocating buffer @ 0x%p\n", __func__, buf); | 145 | dprintk(DBGLVL_BUF, "%s() deallocating buffer @ 0x%p\n", __func__, buf); |
145 | 146 | ||
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c index 8bdd940f32e6..2ac85d8984f0 100644 --- a/drivers/media/video/uvc/uvc_driver.c +++ b/drivers/media/video/uvc/uvc_driver.c | |||
@@ -486,6 +486,12 @@ static int uvc_parse_format(struct uvc_device *dev, | |||
486 | max(frame->dwFrameInterval[0], | 486 | max(frame->dwFrameInterval[0], |
487 | frame->dwDefaultFrameInterval)); | 487 | frame->dwDefaultFrameInterval)); |
488 | 488 | ||
489 | if (dev->quirks & UVC_QUIRK_RESTRICT_FRAME_RATE) { | ||
490 | frame->bFrameIntervalType = 1; | ||
491 | frame->dwFrameInterval[0] = | ||
492 | frame->dwDefaultFrameInterval; | ||
493 | } | ||
494 | |||
489 | uvc_trace(UVC_TRACE_DESCR, "- %ux%u (%u.%u fps)\n", | 495 | uvc_trace(UVC_TRACE_DESCR, "- %ux%u (%u.%u fps)\n", |
490 | frame->wWidth, frame->wHeight, | 496 | frame->wWidth, frame->wHeight, |
491 | 10000000/frame->dwDefaultFrameInterval, | 497 | 10000000/frame->dwDefaultFrameInterval, |
@@ -2026,6 +2032,15 @@ static struct usb_device_id uvc_ids[] = { | |||
2026 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | 2032 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, |
2027 | .bInterfaceSubClass = 1, | 2033 | .bInterfaceSubClass = 1, |
2028 | .bInterfaceProtocol = 0 }, | 2034 | .bInterfaceProtocol = 0 }, |
2035 | /* Chicony CNF7129 (Asus EEE 100HE) */ | ||
2036 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
2037 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
2038 | .idVendor = 0x04f2, | ||
2039 | .idProduct = 0xb071, | ||
2040 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
2041 | .bInterfaceSubClass = 1, | ||
2042 | .bInterfaceProtocol = 0, | ||
2043 | .driver_info = UVC_QUIRK_RESTRICT_FRAME_RATE }, | ||
2029 | /* Alcor Micro AU3820 (Future Boy PC USB Webcam) */ | 2044 | /* Alcor Micro AU3820 (Future Boy PC USB Webcam) */ |
2030 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | 2045 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE |
2031 | | USB_DEVICE_ID_MATCH_INT_INFO, | 2046 | | USB_DEVICE_ID_MATCH_INT_INFO, |
@@ -2091,6 +2106,15 @@ static struct usb_device_id uvc_ids[] = { | |||
2091 | .bInterfaceProtocol = 0, | 2106 | .bInterfaceProtocol = 0, |
2092 | .driver_info = UVC_QUIRK_PROBE_MINMAX | 2107 | .driver_info = UVC_QUIRK_PROBE_MINMAX |
2093 | | UVC_QUIRK_PROBE_DEF }, | 2108 | | UVC_QUIRK_PROBE_DEF }, |
2109 | /* IMC Networks (Medion Akoya) */ | ||
2110 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
2111 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
2112 | .idVendor = 0x13d3, | ||
2113 | .idProduct = 0x5103, | ||
2114 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
2115 | .bInterfaceSubClass = 1, | ||
2116 | .bInterfaceProtocol = 0, | ||
2117 | .driver_info = UVC_QUIRK_STREAM_NO_FID }, | ||
2094 | /* Syntek (HP Spartan) */ | 2118 | /* Syntek (HP Spartan) */ |
2095 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | 2119 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE |
2096 | | USB_DEVICE_ID_MATCH_INT_INFO, | 2120 | | USB_DEVICE_ID_MATCH_INT_INFO, |
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h index bdacf3beabf5..892e0e51916c 100644 --- a/drivers/media/video/uvc/uvcvideo.h +++ b/drivers/media/video/uvc/uvcvideo.h | |||
@@ -182,6 +182,7 @@ struct uvc_xu_control { | |||
182 | #define UVC_QUIRK_IGNORE_SELECTOR_UNIT 0x00000020 | 182 | #define UVC_QUIRK_IGNORE_SELECTOR_UNIT 0x00000020 |
183 | #define UVC_QUIRK_FIX_BANDWIDTH 0x00000080 | 183 | #define UVC_QUIRK_FIX_BANDWIDTH 0x00000080 |
184 | #define UVC_QUIRK_PROBE_DEF 0x00000100 | 184 | #define UVC_QUIRK_PROBE_DEF 0x00000100 |
185 | #define UVC_QUIRK_RESTRICT_FRAME_RATE 0x00000200 | ||
185 | 186 | ||
186 | /* Format flags */ | 187 | /* Format flags */ |
187 | #define UVC_FMT_FLAG_COMPRESSED 0x00000001 | 188 | #define UVC_FMT_FLAG_COMPRESSED 0x00000001 |
diff --git a/drivers/media/video/videobuf-dma-contig.c b/drivers/media/video/videobuf-dma-contig.c index 372b87efcd05..6ff9e4bac3ea 100644 --- a/drivers/media/video/videobuf-dma-contig.c +++ b/drivers/media/video/videobuf-dma-contig.c | |||
@@ -393,8 +393,10 @@ void videobuf_dma_contig_free(struct videobuf_queue *q, | |||
393 | } | 393 | } |
394 | 394 | ||
395 | /* read() method */ | 395 | /* read() method */ |
396 | dma_free_coherent(q->dev, mem->size, mem->vaddr, mem->dma_handle); | 396 | if (mem->vaddr) { |
397 | mem->vaddr = NULL; | 397 | dma_free_coherent(q->dev, mem->size, mem->vaddr, mem->dma_handle); |
398 | mem->vaddr = NULL; | ||
399 | } | ||
398 | } | 400 | } |
399 | EXPORT_SYMBOL_GPL(videobuf_dma_contig_free); | 401 | EXPORT_SYMBOL_GPL(videobuf_dma_contig_free); |
400 | 402 | ||
diff --git a/drivers/media/video/videobuf-dma-sg.c b/drivers/media/video/videobuf-dma-sg.c index 06f9a9c2a39a..2ad0bc252b0e 100644 --- a/drivers/media/video/videobuf-dma-sg.c +++ b/drivers/media/video/videobuf-dma-sg.c | |||
@@ -94,7 +94,7 @@ err: | |||
94 | * must free the memory. | 94 | * must free the memory. |
95 | */ | 95 | */ |
96 | static struct scatterlist *videobuf_pages_to_sg(struct page **pages, | 96 | static struct scatterlist *videobuf_pages_to_sg(struct page **pages, |
97 | int nr_pages, int offset) | 97 | int nr_pages, int offset, size_t size) |
98 | { | 98 | { |
99 | struct scatterlist *sglist; | 99 | struct scatterlist *sglist; |
100 | int i; | 100 | int i; |
@@ -110,12 +110,14 @@ static struct scatterlist *videobuf_pages_to_sg(struct page **pages, | |||
110 | /* DMA to highmem pages might not work */ | 110 | /* DMA to highmem pages might not work */ |
111 | goto highmem; | 111 | goto highmem; |
112 | sg_set_page(&sglist[0], pages[0], PAGE_SIZE - offset, offset); | 112 | sg_set_page(&sglist[0], pages[0], PAGE_SIZE - offset, offset); |
113 | size -= PAGE_SIZE - offset; | ||
113 | for (i = 1; i < nr_pages; i++) { | 114 | for (i = 1; i < nr_pages; i++) { |
114 | if (NULL == pages[i]) | 115 | if (NULL == pages[i]) |
115 | goto nopage; | 116 | goto nopage; |
116 | if (PageHighMem(pages[i])) | 117 | if (PageHighMem(pages[i])) |
117 | goto highmem; | 118 | goto highmem; |
118 | sg_set_page(&sglist[i], pages[i], PAGE_SIZE, 0); | 119 | sg_set_page(&sglist[i], pages[i], min(PAGE_SIZE, size), 0); |
120 | size -= min(PAGE_SIZE, size); | ||
119 | } | 121 | } |
120 | return sglist; | 122 | return sglist; |
121 | 123 | ||
@@ -170,7 +172,8 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma, | |||
170 | 172 | ||
171 | first = (data & PAGE_MASK) >> PAGE_SHIFT; | 173 | first = (data & PAGE_MASK) >> PAGE_SHIFT; |
172 | last = ((data+size-1) & PAGE_MASK) >> PAGE_SHIFT; | 174 | last = ((data+size-1) & PAGE_MASK) >> PAGE_SHIFT; |
173 | dma->offset = data & ~PAGE_MASK; | 175 | dma->offset = data & ~PAGE_MASK; |
176 | dma->size = size; | ||
174 | dma->nr_pages = last-first+1; | 177 | dma->nr_pages = last-first+1; |
175 | dma->pages = kmalloc(dma->nr_pages * sizeof(struct page *), GFP_KERNEL); | 178 | dma->pages = kmalloc(dma->nr_pages * sizeof(struct page *), GFP_KERNEL); |
176 | if (NULL == dma->pages) | 179 | if (NULL == dma->pages) |
@@ -252,7 +255,7 @@ int videobuf_dma_map(struct device *dev, struct videobuf_dmabuf *dma) | |||
252 | 255 | ||
253 | if (dma->pages) { | 256 | if (dma->pages) { |
254 | dma->sglist = videobuf_pages_to_sg(dma->pages, dma->nr_pages, | 257 | dma->sglist = videobuf_pages_to_sg(dma->pages, dma->nr_pages, |
255 | dma->offset); | 258 | dma->offset, dma->size); |
256 | } | 259 | } |
257 | if (dma->vaddr) { | 260 | if (dma->vaddr) { |
258 | dma->sglist = videobuf_vmalloc_to_sg(dma->vaddr, | 261 | dma->sglist = videobuf_vmalloc_to_sg(dma->vaddr, |
diff --git a/drivers/misc/bh1780gli.c b/drivers/misc/bh1780gli.c index 714c6b487313..d5f3a3fd2319 100644 --- a/drivers/misc/bh1780gli.c +++ b/drivers/misc/bh1780gli.c | |||
@@ -190,7 +190,6 @@ static int __devexit bh1780_remove(struct i2c_client *client) | |||
190 | 190 | ||
191 | ddata = i2c_get_clientdata(client); | 191 | ddata = i2c_get_clientdata(client); |
192 | sysfs_remove_group(&client->dev.kobj, &bh1780_attr_group); | 192 | sysfs_remove_group(&client->dev.kobj, &bh1780_attr_group); |
193 | i2c_set_clientdata(client, NULL); | ||
194 | kfree(ddata); | 193 | kfree(ddata); |
195 | 194 | ||
196 | return 0; | 195 | return 0; |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 1c767ade7ef8..77efe462b921 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -2431,7 +2431,7 @@ config UGETH_TX_ON_DEMAND | |||
2431 | 2431 | ||
2432 | config MV643XX_ETH | 2432 | config MV643XX_ETH |
2433 | tristate "Marvell Discovery (643XX) and Orion ethernet support" | 2433 | tristate "Marvell Discovery (643XX) and Orion ethernet support" |
2434 | depends on MV64X60 || PPC32 || PLAT_ORION | 2434 | depends on (MV64X60 || PPC32 || PLAT_ORION) && INET |
2435 | select INET_LRO | 2435 | select INET_LRO |
2436 | select PHYLIB | 2436 | select PHYLIB |
2437 | help | 2437 | help |
@@ -2806,7 +2806,7 @@ config NIU | |||
2806 | 2806 | ||
2807 | config PASEMI_MAC | 2807 | config PASEMI_MAC |
2808 | tristate "PA Semi 1/10Gbit MAC" | 2808 | tristate "PA Semi 1/10Gbit MAC" |
2809 | depends on PPC_PASEMI && PCI | 2809 | depends on PPC_PASEMI && PCI && INET |
2810 | select PHYLIB | 2810 | select PHYLIB |
2811 | select INET_LRO | 2811 | select INET_LRO |
2812 | help | 2812 | help |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index 1e620e287ae0..efeffdf9e5fa 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -2170,8 +2170,6 @@ static int __devinit b44_init_one(struct ssb_device *sdev, | |||
2170 | dev->irq = sdev->irq; | 2170 | dev->irq = sdev->irq; |
2171 | SET_ETHTOOL_OPS(dev, &b44_ethtool_ops); | 2171 | SET_ETHTOOL_OPS(dev, &b44_ethtool_ops); |
2172 | 2172 | ||
2173 | netif_carrier_off(dev); | ||
2174 | |||
2175 | err = ssb_bus_powerup(sdev->bus, 0); | 2173 | err = ssb_bus_powerup(sdev->bus, 0); |
2176 | if (err) { | 2174 | if (err) { |
2177 | dev_err(sdev->dev, | 2175 | dev_err(sdev->dev, |
@@ -2213,6 +2211,8 @@ static int __devinit b44_init_one(struct ssb_device *sdev, | |||
2213 | goto err_out_powerdown; | 2211 | goto err_out_powerdown; |
2214 | } | 2212 | } |
2215 | 2213 | ||
2214 | netif_carrier_off(dev); | ||
2215 | |||
2216 | ssb_set_drvdata(sdev, dev); | 2216 | ssb_set_drvdata(sdev, dev); |
2217 | 2217 | ||
2218 | /* Chip reset provides power to the b44 MAC & PCI cores, which | 2218 | /* Chip reset provides power to the b44 MAC & PCI cores, which |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 3b16f62d5606..e953c6ad6e6d 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -5164,6 +5164,15 @@ int bond_create(struct net *net, const char *name) | |||
5164 | res = dev_alloc_name(bond_dev, "bond%d"); | 5164 | res = dev_alloc_name(bond_dev, "bond%d"); |
5165 | if (res < 0) | 5165 | if (res < 0) |
5166 | goto out; | 5166 | goto out; |
5167 | } else { | ||
5168 | /* | ||
5169 | * If we're given a name to register | ||
5170 | * we need to ensure that its not already | ||
5171 | * registered | ||
5172 | */ | ||
5173 | res = -EEXIST; | ||
5174 | if (__dev_get_by_name(net, name) != NULL) | ||
5175 | goto out; | ||
5167 | } | 5176 | } |
5168 | 5177 | ||
5169 | res = register_netdevice(bond_dev); | 5178 | res = register_netdevice(bond_dev); |
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index a333b42111b8..6372610ed240 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -533,8 +533,15 @@ static inline void ehea_fill_skb(struct net_device *dev, | |||
533 | int length = cqe->num_bytes_transfered - 4; /*remove CRC */ | 533 | int length = cqe->num_bytes_transfered - 4; /*remove CRC */ |
534 | 534 | ||
535 | skb_put(skb, length); | 535 | skb_put(skb, length); |
536 | skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
537 | skb->protocol = eth_type_trans(skb, dev); | 536 | skb->protocol = eth_type_trans(skb, dev); |
537 | |||
538 | /* The packet was not an IPV4 packet so a complemented checksum was | ||
539 | calculated. The value is found in the Internet Checksum field. */ | ||
540 | if (cqe->status & EHEA_CQE_BLIND_CKSUM) { | ||
541 | skb->ip_summed = CHECKSUM_COMPLETE; | ||
542 | skb->csum = csum_unfold(~cqe->inet_checksum_value); | ||
543 | } else | ||
544 | skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
538 | } | 545 | } |
539 | 546 | ||
540 | static inline struct sk_buff *get_skb_by_index(struct sk_buff **skb_array, | 547 | static inline struct sk_buff *get_skb_by_index(struct sk_buff **skb_array, |
diff --git a/drivers/net/ehea/ehea_qmr.h b/drivers/net/ehea/ehea_qmr.h index f608a6c54af5..38104734a3be 100644 --- a/drivers/net/ehea/ehea_qmr.h +++ b/drivers/net/ehea/ehea_qmr.h | |||
@@ -150,6 +150,7 @@ struct ehea_rwqe { | |||
150 | #define EHEA_CQE_TYPE_RQ 0x60 | 150 | #define EHEA_CQE_TYPE_RQ 0x60 |
151 | #define EHEA_CQE_STAT_ERR_MASK 0x700F | 151 | #define EHEA_CQE_STAT_ERR_MASK 0x700F |
152 | #define EHEA_CQE_STAT_FAT_ERR_MASK 0xF | 152 | #define EHEA_CQE_STAT_FAT_ERR_MASK 0xF |
153 | #define EHEA_CQE_BLIND_CKSUM 0x8000 | ||
153 | #define EHEA_CQE_STAT_ERR_TCP 0x4000 | 154 | #define EHEA_CQE_STAT_ERR_TCP 0x4000 |
154 | #define EHEA_CQE_STAT_ERR_IP 0x2000 | 155 | #define EHEA_CQE_STAT_ERR_IP 0x2000 |
155 | #define EHEA_CQE_STAT_ERR_CRC 0x1000 | 156 | #define EHEA_CQE_STAT_ERR_CRC 0x1000 |
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index 768b840aeb6b..cce32d43175f 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c | |||
@@ -678,24 +678,37 @@ static int fec_enet_mii_probe(struct net_device *dev) | |||
678 | { | 678 | { |
679 | struct fec_enet_private *fep = netdev_priv(dev); | 679 | struct fec_enet_private *fep = netdev_priv(dev); |
680 | struct phy_device *phy_dev = NULL; | 680 | struct phy_device *phy_dev = NULL; |
681 | int ret; | 681 | char mdio_bus_id[MII_BUS_ID_SIZE]; |
682 | char phy_name[MII_BUS_ID_SIZE + 3]; | ||
683 | int phy_id; | ||
682 | 684 | ||
683 | fep->phy_dev = NULL; | 685 | fep->phy_dev = NULL; |
684 | 686 | ||
685 | /* find the first phy */ | 687 | /* check for attached phy */ |
686 | phy_dev = phy_find_first(fep->mii_bus); | 688 | for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) { |
687 | if (!phy_dev) { | 689 | if ((fep->mii_bus->phy_mask & (1 << phy_id))) |
688 | printk(KERN_ERR "%s: no PHY found\n", dev->name); | 690 | continue; |
689 | return -ENODEV; | 691 | if (fep->mii_bus->phy_map[phy_id] == NULL) |
692 | continue; | ||
693 | if (fep->mii_bus->phy_map[phy_id]->phy_id == 0) | ||
694 | continue; | ||
695 | strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE); | ||
696 | break; | ||
690 | } | 697 | } |
691 | 698 | ||
692 | /* attach the mac to the phy */ | 699 | if (phy_id >= PHY_MAX_ADDR) { |
693 | ret = phy_connect_direct(dev, phy_dev, | 700 | printk(KERN_INFO "%s: no PHY, assuming direct connection " |
694 | &fec_enet_adjust_link, 0, | 701 | "to switch\n", dev->name); |
695 | PHY_INTERFACE_MODE_MII); | 702 | strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); |
696 | if (ret) { | 703 | phy_id = 0; |
697 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); | 704 | } |
698 | return ret; | 705 | |
706 | snprintf(phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id); | ||
707 | phy_dev = phy_connect(dev, phy_name, &fec_enet_adjust_link, 0, | ||
708 | PHY_INTERFACE_MODE_MII); | ||
709 | if (IS_ERR(phy_dev)) { | ||
710 | printk(KERN_ERR "%s: could not attach to PHY\n", dev->name); | ||
711 | return PTR_ERR(phy_dev); | ||
699 | } | 712 | } |
700 | 713 | ||
701 | /* mask with MAC supported features */ | 714 | /* mask with MAC supported features */ |
@@ -738,7 +751,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) | |||
738 | fep->mii_bus->read = fec_enet_mdio_read; | 751 | fep->mii_bus->read = fec_enet_mdio_read; |
739 | fep->mii_bus->write = fec_enet_mdio_write; | 752 | fep->mii_bus->write = fec_enet_mdio_write; |
740 | fep->mii_bus->reset = fec_enet_mdio_reset; | 753 | fep->mii_bus->reset = fec_enet_mdio_reset; |
741 | snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id); | 754 | snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id + 1); |
742 | fep->mii_bus->priv = fep; | 755 | fep->mii_bus->priv = fep; |
743 | fep->mii_bus->parent = &pdev->dev; | 756 | fep->mii_bus->parent = &pdev->dev; |
744 | 757 | ||
@@ -1311,6 +1324,9 @@ fec_probe(struct platform_device *pdev) | |||
1311 | if (ret) | 1324 | if (ret) |
1312 | goto failed_mii_init; | 1325 | goto failed_mii_init; |
1313 | 1326 | ||
1327 | /* Carrier starts down, phylib will bring it up */ | ||
1328 | netif_carrier_off(ndev); | ||
1329 | |||
1314 | ret = register_netdev(ndev); | 1330 | ret = register_netdev(ndev); |
1315 | if (ret) | 1331 | if (ret) |
1316 | goto failed_register; | 1332 | goto failed_register; |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index a0da4a17b025..992db2fa136e 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -1212,7 +1212,8 @@ static void rtl8169_update_counters(struct net_device *dev) | |||
1212 | if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) | 1212 | if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) |
1213 | return; | 1213 | return; |
1214 | 1214 | ||
1215 | counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); | 1215 | counters = dma_alloc_coherent(&tp->pci_dev->dev, sizeof(*counters), |
1216 | &paddr, GFP_KERNEL); | ||
1216 | if (!counters) | 1217 | if (!counters) |
1217 | return; | 1218 | return; |
1218 | 1219 | ||
@@ -1233,7 +1234,8 @@ static void rtl8169_update_counters(struct net_device *dev) | |||
1233 | RTL_W32(CounterAddrLow, 0); | 1234 | RTL_W32(CounterAddrLow, 0); |
1234 | RTL_W32(CounterAddrHigh, 0); | 1235 | RTL_W32(CounterAddrHigh, 0); |
1235 | 1236 | ||
1236 | pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); | 1237 | dma_free_coherent(&tp->pci_dev->dev, sizeof(*counters), counters, |
1238 | paddr); | ||
1237 | } | 1239 | } |
1238 | 1240 | ||
1239 | static void rtl8169_get_ethtool_stats(struct net_device *dev, | 1241 | static void rtl8169_get_ethtool_stats(struct net_device *dev, |
@@ -3292,15 +3294,15 @@ static int rtl8169_open(struct net_device *dev) | |||
3292 | 3294 | ||
3293 | /* | 3295 | /* |
3294 | * Rx and Tx desscriptors needs 256 bytes alignment. | 3296 | * Rx and Tx desscriptors needs 256 bytes alignment. |
3295 | * pci_alloc_consistent provides more. | 3297 | * dma_alloc_coherent provides more. |
3296 | */ | 3298 | */ |
3297 | tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES, | 3299 | tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, |
3298 | &tp->TxPhyAddr); | 3300 | &tp->TxPhyAddr, GFP_KERNEL); |
3299 | if (!tp->TxDescArray) | 3301 | if (!tp->TxDescArray) |
3300 | goto err_pm_runtime_put; | 3302 | goto err_pm_runtime_put; |
3301 | 3303 | ||
3302 | tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES, | 3304 | tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, |
3303 | &tp->RxPhyAddr); | 3305 | &tp->RxPhyAddr, GFP_KERNEL); |
3304 | if (!tp->RxDescArray) | 3306 | if (!tp->RxDescArray) |
3305 | goto err_free_tx_0; | 3307 | goto err_free_tx_0; |
3306 | 3308 | ||
@@ -3334,12 +3336,12 @@ out: | |||
3334 | err_release_ring_2: | 3336 | err_release_ring_2: |
3335 | rtl8169_rx_clear(tp); | 3337 | rtl8169_rx_clear(tp); |
3336 | err_free_rx_1: | 3338 | err_free_rx_1: |
3337 | pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, | 3339 | dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, |
3338 | tp->RxPhyAddr); | 3340 | tp->RxPhyAddr); |
3339 | tp->RxDescArray = NULL; | 3341 | tp->RxDescArray = NULL; |
3340 | err_free_tx_0: | 3342 | err_free_tx_0: |
3341 | pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, | 3343 | dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, |
3342 | tp->TxPhyAddr); | 3344 | tp->TxPhyAddr); |
3343 | tp->TxDescArray = NULL; | 3345 | tp->TxDescArray = NULL; |
3344 | err_pm_runtime_put: | 3346 | err_pm_runtime_put: |
3345 | pm_runtime_put_noidle(&pdev->dev); | 3347 | pm_runtime_put_noidle(&pdev->dev); |
@@ -3975,7 +3977,7 @@ static void rtl8169_free_rx_skb(struct rtl8169_private *tp, | |||
3975 | { | 3977 | { |
3976 | struct pci_dev *pdev = tp->pci_dev; | 3978 | struct pci_dev *pdev = tp->pci_dev; |
3977 | 3979 | ||
3978 | pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz, | 3980 | dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), tp->rx_buf_sz, |
3979 | PCI_DMA_FROMDEVICE); | 3981 | PCI_DMA_FROMDEVICE); |
3980 | dev_kfree_skb(*sk_buff); | 3982 | dev_kfree_skb(*sk_buff); |
3981 | *sk_buff = NULL; | 3983 | *sk_buff = NULL; |
@@ -4000,7 +4002,7 @@ static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping, | |||
4000 | static struct sk_buff *rtl8169_alloc_rx_skb(struct pci_dev *pdev, | 4002 | static struct sk_buff *rtl8169_alloc_rx_skb(struct pci_dev *pdev, |
4001 | struct net_device *dev, | 4003 | struct net_device *dev, |
4002 | struct RxDesc *desc, int rx_buf_sz, | 4004 | struct RxDesc *desc, int rx_buf_sz, |
4003 | unsigned int align) | 4005 | unsigned int align, gfp_t gfp) |
4004 | { | 4006 | { |
4005 | struct sk_buff *skb; | 4007 | struct sk_buff *skb; |
4006 | dma_addr_t mapping; | 4008 | dma_addr_t mapping; |
@@ -4008,13 +4010,13 @@ static struct sk_buff *rtl8169_alloc_rx_skb(struct pci_dev *pdev, | |||
4008 | 4010 | ||
4009 | pad = align ? align : NET_IP_ALIGN; | 4011 | pad = align ? align : NET_IP_ALIGN; |
4010 | 4012 | ||
4011 | skb = netdev_alloc_skb(dev, rx_buf_sz + pad); | 4013 | skb = __netdev_alloc_skb(dev, rx_buf_sz + pad, gfp); |
4012 | if (!skb) | 4014 | if (!skb) |
4013 | goto err_out; | 4015 | goto err_out; |
4014 | 4016 | ||
4015 | skb_reserve(skb, align ? ((pad - 1) & (unsigned long)skb->data) : pad); | 4017 | skb_reserve(skb, align ? ((pad - 1) & (unsigned long)skb->data) : pad); |
4016 | 4018 | ||
4017 | mapping = pci_map_single(pdev, skb->data, rx_buf_sz, | 4019 | mapping = dma_map_single(&pdev->dev, skb->data, rx_buf_sz, |
4018 | PCI_DMA_FROMDEVICE); | 4020 | PCI_DMA_FROMDEVICE); |
4019 | 4021 | ||
4020 | rtl8169_map_to_asic(desc, mapping, rx_buf_sz); | 4022 | rtl8169_map_to_asic(desc, mapping, rx_buf_sz); |
@@ -4039,7 +4041,7 @@ static void rtl8169_rx_clear(struct rtl8169_private *tp) | |||
4039 | } | 4041 | } |
4040 | 4042 | ||
4041 | static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev, | 4043 | static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev, |
4042 | u32 start, u32 end) | 4044 | u32 start, u32 end, gfp_t gfp) |
4043 | { | 4045 | { |
4044 | u32 cur; | 4046 | u32 cur; |
4045 | 4047 | ||
@@ -4054,7 +4056,7 @@ static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev, | |||
4054 | 4056 | ||
4055 | skb = rtl8169_alloc_rx_skb(tp->pci_dev, dev, | 4057 | skb = rtl8169_alloc_rx_skb(tp->pci_dev, dev, |
4056 | tp->RxDescArray + i, | 4058 | tp->RxDescArray + i, |
4057 | tp->rx_buf_sz, tp->align); | 4059 | tp->rx_buf_sz, tp->align, gfp); |
4058 | if (!skb) | 4060 | if (!skb) |
4059 | break; | 4061 | break; |
4060 | 4062 | ||
@@ -4082,7 +4084,7 @@ static int rtl8169_init_ring(struct net_device *dev) | |||
4082 | memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); | 4084 | memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); |
4083 | memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *)); | 4085 | memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *)); |
4084 | 4086 | ||
4085 | if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC) | 4087 | if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC, GFP_KERNEL) != NUM_RX_DESC) |
4086 | goto err_out; | 4088 | goto err_out; |
4087 | 4089 | ||
4088 | rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); | 4090 | rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); |
@@ -4099,7 +4101,8 @@ static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb, | |||
4099 | { | 4101 | { |
4100 | unsigned int len = tx_skb->len; | 4102 | unsigned int len = tx_skb->len; |
4101 | 4103 | ||
4102 | pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE); | 4104 | dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, |
4105 | PCI_DMA_TODEVICE); | ||
4103 | desc->opts1 = 0x00; | 4106 | desc->opts1 = 0x00; |
4104 | desc->opts2 = 0x00; | 4107 | desc->opts2 = 0x00; |
4105 | desc->addr = 0x00; | 4108 | desc->addr = 0x00; |
@@ -4243,7 +4246,8 @@ static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb, | |||
4243 | txd = tp->TxDescArray + entry; | 4246 | txd = tp->TxDescArray + entry; |
4244 | len = frag->size; | 4247 | len = frag->size; |
4245 | addr = ((void *) page_address(frag->page)) + frag->page_offset; | 4248 | addr = ((void *) page_address(frag->page)) + frag->page_offset; |
4246 | mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); | 4249 | mapping = dma_map_single(&tp->pci_dev->dev, addr, len, |
4250 | PCI_DMA_TODEVICE); | ||
4247 | 4251 | ||
4248 | /* anti gcc 2.95.3 bugware (sic) */ | 4252 | /* anti gcc 2.95.3 bugware (sic) */ |
4249 | status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); | 4253 | status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); |
@@ -4313,7 +4317,8 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb, | |||
4313 | tp->tx_skb[entry].skb = skb; | 4317 | tp->tx_skb[entry].skb = skb; |
4314 | } | 4318 | } |
4315 | 4319 | ||
4316 | mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE); | 4320 | mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, |
4321 | PCI_DMA_TODEVICE); | ||
4317 | 4322 | ||
4318 | tp->tx_skb[entry].len = len; | 4323 | tp->tx_skb[entry].len = len; |
4319 | txd->addr = cpu_to_le64(mapping); | 4324 | txd->addr = cpu_to_le64(mapping); |
@@ -4477,8 +4482,8 @@ static inline bool rtl8169_try_rx_copy(struct sk_buff **sk_buff, | |||
4477 | if (!skb) | 4482 | if (!skb) |
4478 | goto out; | 4483 | goto out; |
4479 | 4484 | ||
4480 | pci_dma_sync_single_for_cpu(tp->pci_dev, addr, pkt_size, | 4485 | dma_sync_single_for_cpu(&tp->pci_dev->dev, addr, pkt_size, |
4481 | PCI_DMA_FROMDEVICE); | 4486 | PCI_DMA_FROMDEVICE); |
4482 | skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size); | 4487 | skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size); |
4483 | *sk_buff = skb; | 4488 | *sk_buff = skb; |
4484 | done = true; | 4489 | done = true; |
@@ -4549,11 +4554,11 @@ static int rtl8169_rx_interrupt(struct net_device *dev, | |||
4549 | rtl8169_rx_csum(skb, desc); | 4554 | rtl8169_rx_csum(skb, desc); |
4550 | 4555 | ||
4551 | if (rtl8169_try_rx_copy(&skb, tp, pkt_size, addr)) { | 4556 | if (rtl8169_try_rx_copy(&skb, tp, pkt_size, addr)) { |
4552 | pci_dma_sync_single_for_device(pdev, addr, | 4557 | dma_sync_single_for_device(&pdev->dev, addr, |
4553 | pkt_size, PCI_DMA_FROMDEVICE); | 4558 | pkt_size, PCI_DMA_FROMDEVICE); |
4554 | rtl8169_mark_to_asic(desc, tp->rx_buf_sz); | 4559 | rtl8169_mark_to_asic(desc, tp->rx_buf_sz); |
4555 | } else { | 4560 | } else { |
4556 | pci_unmap_single(pdev, addr, tp->rx_buf_sz, | 4561 | dma_unmap_single(&pdev->dev, addr, tp->rx_buf_sz, |
4557 | PCI_DMA_FROMDEVICE); | 4562 | PCI_DMA_FROMDEVICE); |
4558 | tp->Rx_skbuff[entry] = NULL; | 4563 | tp->Rx_skbuff[entry] = NULL; |
4559 | } | 4564 | } |
@@ -4583,7 +4588,7 @@ static int rtl8169_rx_interrupt(struct net_device *dev, | |||
4583 | count = cur_rx - tp->cur_rx; | 4588 | count = cur_rx - tp->cur_rx; |
4584 | tp->cur_rx = cur_rx; | 4589 | tp->cur_rx = cur_rx; |
4585 | 4590 | ||
4586 | delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx); | 4591 | delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx, GFP_ATOMIC); |
4587 | if (!delta && count) | 4592 | if (!delta && count) |
4588 | netif_info(tp, intr, dev, "no Rx buffer allocated\n"); | 4593 | netif_info(tp, intr, dev, "no Rx buffer allocated\n"); |
4589 | tp->dirty_rx += delta; | 4594 | tp->dirty_rx += delta; |
@@ -4769,10 +4774,10 @@ static int rtl8169_close(struct net_device *dev) | |||
4769 | 4774 | ||
4770 | free_irq(dev->irq, dev); | 4775 | free_irq(dev->irq, dev); |
4771 | 4776 | ||
4772 | pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, | 4777 | dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, |
4773 | tp->RxPhyAddr); | 4778 | tp->RxPhyAddr); |
4774 | pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, | 4779 | dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, |
4775 | tp->TxPhyAddr); | 4780 | tp->TxPhyAddr); |
4776 | tp->TxDescArray = NULL; | 4781 | tp->TxDescArray = NULL; |
4777 | tp->RxDescArray = NULL; | 4782 | tp->RxDescArray = NULL; |
4778 | 4783 | ||
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 40e5c46e7571..465ae7e84507 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <linux/seq_file.h> | 43 | #include <linux/seq_file.h> |
44 | #include <linux/mii.h> | 44 | #include <linux/mii.h> |
45 | #include <linux/slab.h> | 45 | #include <linux/slab.h> |
46 | #include <linux/dmi.h> | ||
46 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
47 | 48 | ||
48 | #include "skge.h" | 49 | #include "skge.h" |
@@ -3868,6 +3869,8 @@ static void __devinit skge_show_addr(struct net_device *dev) | |||
3868 | netif_info(skge, probe, skge->netdev, "addr %pM\n", dev->dev_addr); | 3869 | netif_info(skge, probe, skge->netdev, "addr %pM\n", dev->dev_addr); |
3869 | } | 3870 | } |
3870 | 3871 | ||
3872 | static int only_32bit_dma; | ||
3873 | |||
3871 | static int __devinit skge_probe(struct pci_dev *pdev, | 3874 | static int __devinit skge_probe(struct pci_dev *pdev, |
3872 | const struct pci_device_id *ent) | 3875 | const struct pci_device_id *ent) |
3873 | { | 3876 | { |
@@ -3889,7 +3892,7 @@ static int __devinit skge_probe(struct pci_dev *pdev, | |||
3889 | 3892 | ||
3890 | pci_set_master(pdev); | 3893 | pci_set_master(pdev); |
3891 | 3894 | ||
3892 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | 3895 | if (!only_32bit_dma && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { |
3893 | using_dac = 1; | 3896 | using_dac = 1; |
3894 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | 3897 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
3895 | } else if (!(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { | 3898 | } else if (!(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { |
@@ -4147,8 +4150,21 @@ static struct pci_driver skge_driver = { | |||
4147 | .shutdown = skge_shutdown, | 4150 | .shutdown = skge_shutdown, |
4148 | }; | 4151 | }; |
4149 | 4152 | ||
4153 | static struct dmi_system_id skge_32bit_dma_boards[] = { | ||
4154 | { | ||
4155 | .ident = "Gigabyte nForce boards", | ||
4156 | .matches = { | ||
4157 | DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co"), | ||
4158 | DMI_MATCH(DMI_BOARD_NAME, "nForce"), | ||
4159 | }, | ||
4160 | }, | ||
4161 | {} | ||
4162 | }; | ||
4163 | |||
4150 | static int __init skge_init_module(void) | 4164 | static int __init skge_init_module(void) |
4151 | { | 4165 | { |
4166 | if (dmi_check_system(skge_32bit_dma_boards)) | ||
4167 | only_32bit_dma = 1; | ||
4152 | skge_debug_init(); | 4168 | skge_debug_init(); |
4153 | return pci_register_driver(&skge_driver); | 4169 | return pci_register_driver(&skge_driver); |
4154 | } | 4170 | } |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index bc3af78a869f..1ec4b9e0239a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -4666,7 +4666,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) | |||
4666 | desc_idx, *post_ptr); | 4666 | desc_idx, *post_ptr); |
4667 | drop_it_no_recycle: | 4667 | drop_it_no_recycle: |
4668 | /* Other statistics kept track of by card. */ | 4668 | /* Other statistics kept track of by card. */ |
4669 | tp->net_stats.rx_dropped++; | 4669 | tp->rx_dropped++; |
4670 | goto next_pkt; | 4670 | goto next_pkt; |
4671 | } | 4671 | } |
4672 | 4672 | ||
@@ -4726,7 +4726,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) | |||
4726 | if (len > (tp->dev->mtu + ETH_HLEN) && | 4726 | if (len > (tp->dev->mtu + ETH_HLEN) && |
4727 | skb->protocol != htons(ETH_P_8021Q)) { | 4727 | skb->protocol != htons(ETH_P_8021Q)) { |
4728 | dev_kfree_skb(skb); | 4728 | dev_kfree_skb(skb); |
4729 | goto next_pkt; | 4729 | goto drop_it_no_recycle; |
4730 | } | 4730 | } |
4731 | 4731 | ||
4732 | if (desc->type_flags & RXD_FLAG_VLAN && | 4732 | if (desc->type_flags & RXD_FLAG_VLAN && |
@@ -9240,6 +9240,8 @@ static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev, | |||
9240 | stats->rx_missed_errors = old_stats->rx_missed_errors + | 9240 | stats->rx_missed_errors = old_stats->rx_missed_errors + |
9241 | get_stat64(&hw_stats->rx_discards); | 9241 | get_stat64(&hw_stats->rx_discards); |
9242 | 9242 | ||
9243 | stats->rx_dropped = tp->rx_dropped; | ||
9244 | |||
9243 | return stats; | 9245 | return stats; |
9244 | } | 9246 | } |
9245 | 9247 | ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 4937bd190964..be7ff138a7f9 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2759,7 +2759,7 @@ struct tg3 { | |||
2759 | 2759 | ||
2760 | 2760 | ||
2761 | /* begin "everything else" cacheline(s) section */ | 2761 | /* begin "everything else" cacheline(s) section */ |
2762 | struct rtnl_link_stats64 net_stats; | 2762 | unsigned long rx_dropped; |
2763 | struct rtnl_link_stats64 net_stats_prev; | 2763 | struct rtnl_link_stats64 net_stats_prev; |
2764 | struct tg3_ethtool_stats estats; | 2764 | struct tg3_ethtool_stats estats; |
2765 | struct tg3_ethtool_stats estats_prev; | 2765 | struct tg3_ethtool_stats estats_prev; |
diff --git a/drivers/net/wimax/i2400m/rx.c b/drivers/net/wimax/i2400m/rx.c index 8cc9e319f435..1737d1488b35 100644 --- a/drivers/net/wimax/i2400m/rx.c +++ b/drivers/net/wimax/i2400m/rx.c | |||
@@ -1244,16 +1244,16 @@ int i2400m_rx(struct i2400m *i2400m, struct sk_buff *skb) | |||
1244 | int i, result; | 1244 | int i, result; |
1245 | struct device *dev = i2400m_dev(i2400m); | 1245 | struct device *dev = i2400m_dev(i2400m); |
1246 | const struct i2400m_msg_hdr *msg_hdr; | 1246 | const struct i2400m_msg_hdr *msg_hdr; |
1247 | size_t pl_itr, pl_size, skb_len; | 1247 | size_t pl_itr, pl_size; |
1248 | unsigned long flags; | 1248 | unsigned long flags; |
1249 | unsigned num_pls, single_last; | 1249 | unsigned num_pls, single_last, skb_len; |
1250 | 1250 | ||
1251 | skb_len = skb->len; | 1251 | skb_len = skb->len; |
1252 | d_fnstart(4, dev, "(i2400m %p skb %p [size %zu])\n", | 1252 | d_fnstart(4, dev, "(i2400m %p skb %p [size %u])\n", |
1253 | i2400m, skb, skb_len); | 1253 | i2400m, skb, skb_len); |
1254 | result = -EIO; | 1254 | result = -EIO; |
1255 | msg_hdr = (void *) skb->data; | 1255 | msg_hdr = (void *) skb->data; |
1256 | result = i2400m_rx_msg_hdr_check(i2400m, msg_hdr, skb->len); | 1256 | result = i2400m_rx_msg_hdr_check(i2400m, msg_hdr, skb_len); |
1257 | if (result < 0) | 1257 | if (result < 0) |
1258 | goto error_msg_hdr_check; | 1258 | goto error_msg_hdr_check; |
1259 | result = -EIO; | 1259 | result = -EIO; |
@@ -1261,10 +1261,10 @@ int i2400m_rx(struct i2400m *i2400m, struct sk_buff *skb) | |||
1261 | pl_itr = sizeof(*msg_hdr) + /* Check payload descriptor(s) */ | 1261 | pl_itr = sizeof(*msg_hdr) + /* Check payload descriptor(s) */ |
1262 | num_pls * sizeof(msg_hdr->pld[0]); | 1262 | num_pls * sizeof(msg_hdr->pld[0]); |
1263 | pl_itr = ALIGN(pl_itr, I2400M_PL_ALIGN); | 1263 | pl_itr = ALIGN(pl_itr, I2400M_PL_ALIGN); |
1264 | if (pl_itr > skb->len) { /* got all the payload descriptors? */ | 1264 | if (pl_itr > skb_len) { /* got all the payload descriptors? */ |
1265 | dev_err(dev, "RX: HW BUG? message too short (%u bytes) for " | 1265 | dev_err(dev, "RX: HW BUG? message too short (%u bytes) for " |
1266 | "%u payload descriptors (%zu each, total %zu)\n", | 1266 | "%u payload descriptors (%zu each, total %zu)\n", |
1267 | skb->len, num_pls, sizeof(msg_hdr->pld[0]), pl_itr); | 1267 | skb_len, num_pls, sizeof(msg_hdr->pld[0]), pl_itr); |
1268 | goto error_pl_descr_short; | 1268 | goto error_pl_descr_short; |
1269 | } | 1269 | } |
1270 | /* Walk each payload payload--check we really got it */ | 1270 | /* Walk each payload payload--check we really got it */ |
@@ -1272,7 +1272,7 @@ int i2400m_rx(struct i2400m *i2400m, struct sk_buff *skb) | |||
1272 | /* work around old gcc warnings */ | 1272 | /* work around old gcc warnings */ |
1273 | pl_size = i2400m_pld_size(&msg_hdr->pld[i]); | 1273 | pl_size = i2400m_pld_size(&msg_hdr->pld[i]); |
1274 | result = i2400m_rx_pl_descr_check(i2400m, &msg_hdr->pld[i], | 1274 | result = i2400m_rx_pl_descr_check(i2400m, &msg_hdr->pld[i], |
1275 | pl_itr, skb->len); | 1275 | pl_itr, skb_len); |
1276 | if (result < 0) | 1276 | if (result < 0) |
1277 | goto error_pl_descr_check; | 1277 | goto error_pl_descr_check; |
1278 | single_last = num_pls == 1 || i == num_pls - 1; | 1278 | single_last = num_pls == 1 || i == num_pls - 1; |
@@ -1290,16 +1290,16 @@ int i2400m_rx(struct i2400m *i2400m, struct sk_buff *skb) | |||
1290 | if (i < i2400m->rx_pl_min) | 1290 | if (i < i2400m->rx_pl_min) |
1291 | i2400m->rx_pl_min = i; | 1291 | i2400m->rx_pl_min = i; |
1292 | i2400m->rx_num++; | 1292 | i2400m->rx_num++; |
1293 | i2400m->rx_size_acc += skb->len; | 1293 | i2400m->rx_size_acc += skb_len; |
1294 | if (skb->len < i2400m->rx_size_min) | 1294 | if (skb_len < i2400m->rx_size_min) |
1295 | i2400m->rx_size_min = skb->len; | 1295 | i2400m->rx_size_min = skb_len; |
1296 | if (skb->len > i2400m->rx_size_max) | 1296 | if (skb_len > i2400m->rx_size_max) |
1297 | i2400m->rx_size_max = skb->len; | 1297 | i2400m->rx_size_max = skb_len; |
1298 | spin_unlock_irqrestore(&i2400m->rx_lock, flags); | 1298 | spin_unlock_irqrestore(&i2400m->rx_lock, flags); |
1299 | error_pl_descr_check: | 1299 | error_pl_descr_check: |
1300 | error_pl_descr_short: | 1300 | error_pl_descr_short: |
1301 | error_msg_hdr_check: | 1301 | error_msg_hdr_check: |
1302 | d_fnend(4, dev, "(i2400m %p skb %p [size %zu]) = %d\n", | 1302 | d_fnend(4, dev, "(i2400m %p skb %p [size %u]) = %d\n", |
1303 | i2400m, skb, skb_len, result); | 1303 | i2400m, skb, skb_len, result); |
1304 | return result; | 1304 | return result; |
1305 | } | 1305 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c index cc648b6ae31c..a3d95cca8f0c 100644 --- a/drivers/net/wireless/ath/ath9k/ani.c +++ b/drivers/net/wireless/ath/ath9k/ani.c | |||
@@ -543,7 +543,7 @@ static u8 ath9k_hw_chan_2_clockrate_mhz(struct ath_hw *ah) | |||
543 | if (conf_is_ht40(conf)) | 543 | if (conf_is_ht40(conf)) |
544 | return clockrate * 2; | 544 | return clockrate * 2; |
545 | 545 | ||
546 | return clockrate * 2; | 546 | return clockrate; |
547 | } | 547 | } |
548 | 548 | ||
549 | static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah) | 549 | static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah) |
diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c index 9024480a8228..c44a5e8b8b82 100644 --- a/drivers/platform/x86/intel_ips.c +++ b/drivers/platform/x86/intel_ips.c | |||
@@ -51,7 +51,6 @@ | |||
51 | * TODO: | 51 | * TODO: |
52 | * - handle CPU hotplug | 52 | * - handle CPU hotplug |
53 | * - provide turbo enable/disable api | 53 | * - provide turbo enable/disable api |
54 | * - make sure we can write turbo enable/disable reg based on MISC_EN | ||
55 | * | 54 | * |
56 | * Related documents: | 55 | * Related documents: |
57 | * - CDI 403777, 403778 - Auburndale EDS vol 1 & 2 | 56 | * - CDI 403777, 403778 - Auburndale EDS vol 1 & 2 |
@@ -230,7 +229,7 @@ | |||
230 | #define THM_TC2 0xac | 229 | #define THM_TC2 0xac |
231 | #define THM_DTV 0xb0 | 230 | #define THM_DTV 0xb0 |
232 | #define THM_ITV 0xd8 | 231 | #define THM_ITV 0xd8 |
233 | #define ITV_ME_SEQNO_MASK 0x000f0000 /* ME should update every ~200ms */ | 232 | #define ITV_ME_SEQNO_MASK 0x00ff0000 /* ME should update every ~200ms */ |
234 | #define ITV_ME_SEQNO_SHIFT (16) | 233 | #define ITV_ME_SEQNO_SHIFT (16) |
235 | #define ITV_MCH_TEMP_MASK 0x0000ff00 | 234 | #define ITV_MCH_TEMP_MASK 0x0000ff00 |
236 | #define ITV_MCH_TEMP_SHIFT (8) | 235 | #define ITV_MCH_TEMP_SHIFT (8) |
@@ -325,6 +324,7 @@ struct ips_driver { | |||
325 | bool gpu_preferred; | 324 | bool gpu_preferred; |
326 | bool poll_turbo_status; | 325 | bool poll_turbo_status; |
327 | bool second_cpu; | 326 | bool second_cpu; |
327 | bool turbo_toggle_allowed; | ||
328 | struct ips_mcp_limits *limits; | 328 | struct ips_mcp_limits *limits; |
329 | 329 | ||
330 | /* Optional MCH interfaces for if i915 is in use */ | 330 | /* Optional MCH interfaces for if i915 is in use */ |
@@ -415,7 +415,7 @@ static void ips_cpu_lower(struct ips_driver *ips) | |||
415 | new_limit = cur_limit - 8; /* 1W decrease */ | 415 | new_limit = cur_limit - 8; /* 1W decrease */ |
416 | 416 | ||
417 | /* Clamp to SKU TDP limit */ | 417 | /* Clamp to SKU TDP limit */ |
418 | if (((new_limit * 10) / 8) < (ips->orig_turbo_limit & TURBO_TDP_MASK)) | 418 | if (new_limit < (ips->orig_turbo_limit & TURBO_TDP_MASK)) |
419 | new_limit = ips->orig_turbo_limit & TURBO_TDP_MASK; | 419 | new_limit = ips->orig_turbo_limit & TURBO_TDP_MASK; |
420 | 420 | ||
421 | thm_writew(THM_MPCPC, (new_limit * 10) / 8); | 421 | thm_writew(THM_MPCPC, (new_limit * 10) / 8); |
@@ -461,7 +461,8 @@ static void ips_enable_cpu_turbo(struct ips_driver *ips) | |||
461 | if (ips->__cpu_turbo_on) | 461 | if (ips->__cpu_turbo_on) |
462 | return; | 462 | return; |
463 | 463 | ||
464 | on_each_cpu(do_enable_cpu_turbo, ips, 1); | 464 | if (ips->turbo_toggle_allowed) |
465 | on_each_cpu(do_enable_cpu_turbo, ips, 1); | ||
465 | 466 | ||
466 | ips->__cpu_turbo_on = true; | 467 | ips->__cpu_turbo_on = true; |
467 | } | 468 | } |
@@ -498,7 +499,8 @@ static void ips_disable_cpu_turbo(struct ips_driver *ips) | |||
498 | if (!ips->__cpu_turbo_on) | 499 | if (!ips->__cpu_turbo_on) |
499 | return; | 500 | return; |
500 | 501 | ||
501 | on_each_cpu(do_disable_cpu_turbo, ips, 1); | 502 | if (ips->turbo_toggle_allowed) |
503 | on_each_cpu(do_disable_cpu_turbo, ips, 1); | ||
502 | 504 | ||
503 | ips->__cpu_turbo_on = false; | 505 | ips->__cpu_turbo_on = false; |
504 | } | 506 | } |
@@ -598,17 +600,29 @@ static bool mcp_exceeded(struct ips_driver *ips) | |||
598 | { | 600 | { |
599 | unsigned long flags; | 601 | unsigned long flags; |
600 | bool ret = false; | 602 | bool ret = false; |
603 | u32 temp_limit; | ||
604 | u32 avg_power; | ||
605 | const char *msg = "MCP limit exceeded: "; | ||
601 | 606 | ||
602 | spin_lock_irqsave(&ips->turbo_status_lock, flags); | 607 | spin_lock_irqsave(&ips->turbo_status_lock, flags); |
603 | if (ips->mcp_avg_temp > (ips->mcp_temp_limit * 100)) | 608 | |
604 | ret = true; | 609 | temp_limit = ips->mcp_temp_limit * 100; |
605 | if (ips->cpu_avg_power + ips->mch_avg_power > ips->mcp_power_limit) | 610 | if (ips->mcp_avg_temp > temp_limit) { |
611 | dev_info(&ips->dev->dev, | ||
612 | "%sAvg temp %u, limit %u\n", msg, ips->mcp_avg_temp, | ||
613 | temp_limit); | ||
606 | ret = true; | 614 | ret = true; |
607 | spin_unlock_irqrestore(&ips->turbo_status_lock, flags); | 615 | } |
608 | 616 | ||
609 | if (ret) | 617 | avg_power = ips->cpu_avg_power + ips->mch_avg_power; |
618 | if (avg_power > ips->mcp_power_limit) { | ||
610 | dev_info(&ips->dev->dev, | 619 | dev_info(&ips->dev->dev, |
611 | "MCP power or thermal limit exceeded\n"); | 620 | "%sAvg power %u, limit %u\n", msg, avg_power, |
621 | ips->mcp_power_limit); | ||
622 | ret = true; | ||
623 | } | ||
624 | |||
625 | spin_unlock_irqrestore(&ips->turbo_status_lock, flags); | ||
612 | 626 | ||
613 | return ret; | 627 | return ret; |
614 | } | 628 | } |
@@ -663,6 +677,27 @@ static bool mch_exceeded(struct ips_driver *ips) | |||
663 | } | 677 | } |
664 | 678 | ||
665 | /** | 679 | /** |
680 | * verify_limits - verify BIOS provided limits | ||
681 | * @ips: IPS structure | ||
682 | * | ||
683 | * BIOS can optionally provide non-default limits for power and temp. Check | ||
684 | * them here and use the defaults if the BIOS values are not provided or | ||
685 | * are otherwise unusable. | ||
686 | */ | ||
687 | static void verify_limits(struct ips_driver *ips) | ||
688 | { | ||
689 | if (ips->mcp_power_limit < ips->limits->mcp_power_limit || | ||
690 | ips->mcp_power_limit > 35000) | ||
691 | ips->mcp_power_limit = ips->limits->mcp_power_limit; | ||
692 | |||
693 | if (ips->mcp_temp_limit < ips->limits->core_temp_limit || | ||
694 | ips->mcp_temp_limit < ips->limits->mch_temp_limit || | ||
695 | ips->mcp_temp_limit > 150) | ||
696 | ips->mcp_temp_limit = min(ips->limits->core_temp_limit, | ||
697 | ips->limits->mch_temp_limit); | ||
698 | } | ||
699 | |||
700 | /** | ||
666 | * update_turbo_limits - get various limits & settings from regs | 701 | * update_turbo_limits - get various limits & settings from regs |
667 | * @ips: IPS driver struct | 702 | * @ips: IPS driver struct |
668 | * | 703 | * |
@@ -680,12 +715,21 @@ static void update_turbo_limits(struct ips_driver *ips) | |||
680 | u32 hts = thm_readl(THM_HTS); | 715 | u32 hts = thm_readl(THM_HTS); |
681 | 716 | ||
682 | ips->cpu_turbo_enabled = !(hts & HTS_PCTD_DIS); | 717 | ips->cpu_turbo_enabled = !(hts & HTS_PCTD_DIS); |
683 | ips->gpu_turbo_enabled = !(hts & HTS_GTD_DIS); | 718 | /* |
719 | * Disable turbo for now, until we can figure out why the power figures | ||
720 | * are wrong | ||
721 | */ | ||
722 | ips->cpu_turbo_enabled = false; | ||
723 | |||
724 | if (ips->gpu_busy) | ||
725 | ips->gpu_turbo_enabled = !(hts & HTS_GTD_DIS); | ||
726 | |||
684 | ips->core_power_limit = thm_readw(THM_MPCPC); | 727 | ips->core_power_limit = thm_readw(THM_MPCPC); |
685 | ips->mch_power_limit = thm_readw(THM_MMGPC); | 728 | ips->mch_power_limit = thm_readw(THM_MMGPC); |
686 | ips->mcp_temp_limit = thm_readw(THM_PTL); | 729 | ips->mcp_temp_limit = thm_readw(THM_PTL); |
687 | ips->mcp_power_limit = thm_readw(THM_MPPC); | 730 | ips->mcp_power_limit = thm_readw(THM_MPPC); |
688 | 731 | ||
732 | verify_limits(ips); | ||
689 | /* Ignore BIOS CPU vs GPU pref */ | 733 | /* Ignore BIOS CPU vs GPU pref */ |
690 | } | 734 | } |
691 | 735 | ||
@@ -858,7 +902,7 @@ static u32 get_cpu_power(struct ips_driver *ips, u32 *last, int period) | |||
858 | ret = (ret * 1000) / 65535; | 902 | ret = (ret * 1000) / 65535; |
859 | *last = val; | 903 | *last = val; |
860 | 904 | ||
861 | return ret; | 905 | return 0; |
862 | } | 906 | } |
863 | 907 | ||
864 | static const u16 temp_decay_factor = 2; | 908 | static const u16 temp_decay_factor = 2; |
@@ -940,7 +984,6 @@ static int ips_monitor(void *data) | |||
940 | kfree(mch_samples); | 984 | kfree(mch_samples); |
941 | kfree(cpu_samples); | 985 | kfree(cpu_samples); |
942 | kfree(mchp_samples); | 986 | kfree(mchp_samples); |
943 | kthread_stop(ips->adjust); | ||
944 | return -ENOMEM; | 987 | return -ENOMEM; |
945 | } | 988 | } |
946 | 989 | ||
@@ -948,7 +991,7 @@ static int ips_monitor(void *data) | |||
948 | ITV_ME_SEQNO_SHIFT; | 991 | ITV_ME_SEQNO_SHIFT; |
949 | seqno_timestamp = get_jiffies_64(); | 992 | seqno_timestamp = get_jiffies_64(); |
950 | 993 | ||
951 | old_cpu_power = thm_readl(THM_CEC) / 65535; | 994 | old_cpu_power = thm_readl(THM_CEC); |
952 | schedule_timeout_interruptible(msecs_to_jiffies(IPS_SAMPLE_PERIOD)); | 995 | schedule_timeout_interruptible(msecs_to_jiffies(IPS_SAMPLE_PERIOD)); |
953 | 996 | ||
954 | /* Collect an initial average */ | 997 | /* Collect an initial average */ |
@@ -1150,11 +1193,18 @@ static irqreturn_t ips_irq_handler(int irq, void *arg) | |||
1150 | STS_GPL_SHIFT; | 1193 | STS_GPL_SHIFT; |
1151 | /* ignore EC CPU vs GPU pref */ | 1194 | /* ignore EC CPU vs GPU pref */ |
1152 | ips->cpu_turbo_enabled = !(sts & STS_PCTD_DIS); | 1195 | ips->cpu_turbo_enabled = !(sts & STS_PCTD_DIS); |
1153 | ips->gpu_turbo_enabled = !(sts & STS_GTD_DIS); | 1196 | /* |
1197 | * Disable turbo for now, until we can figure | ||
1198 | * out why the power figures are wrong | ||
1199 | */ | ||
1200 | ips->cpu_turbo_enabled = false; | ||
1201 | if (ips->gpu_busy) | ||
1202 | ips->gpu_turbo_enabled = !(sts & STS_GTD_DIS); | ||
1154 | ips->mcp_temp_limit = (sts & STS_PTL_MASK) >> | 1203 | ips->mcp_temp_limit = (sts & STS_PTL_MASK) >> |
1155 | STS_PTL_SHIFT; | 1204 | STS_PTL_SHIFT; |
1156 | ips->mcp_power_limit = (tc1 & STS_PPL_MASK) >> | 1205 | ips->mcp_power_limit = (tc1 & STS_PPL_MASK) >> |
1157 | STS_PPL_SHIFT; | 1206 | STS_PPL_SHIFT; |
1207 | verify_limits(ips); | ||
1158 | spin_unlock(&ips->turbo_status_lock); | 1208 | spin_unlock(&ips->turbo_status_lock); |
1159 | 1209 | ||
1160 | thm_writeb(THM_SEC, SEC_ACK); | 1210 | thm_writeb(THM_SEC, SEC_ACK); |
@@ -1333,8 +1383,10 @@ static struct ips_mcp_limits *ips_detect_cpu(struct ips_driver *ips) | |||
1333 | * turbo manually or we'll get an illegal MSR access, even though | 1383 | * turbo manually or we'll get an illegal MSR access, even though |
1334 | * turbo will still be available. | 1384 | * turbo will still be available. |
1335 | */ | 1385 | */ |
1336 | if (!(misc_en & IA32_MISC_TURBO_EN)) | 1386 | if (misc_en & IA32_MISC_TURBO_EN) |
1337 | ; /* add turbo MSR write allowed flag if necessary */ | 1387 | ips->turbo_toggle_allowed = true; |
1388 | else | ||
1389 | ips->turbo_toggle_allowed = false; | ||
1338 | 1390 | ||
1339 | if (strstr(boot_cpu_data.x86_model_id, "CPU M")) | 1391 | if (strstr(boot_cpu_data.x86_model_id, "CPU M")) |
1340 | limits = &ips_sv_limits; | 1392 | limits = &ips_sv_limits; |
@@ -1351,9 +1403,10 @@ static struct ips_mcp_limits *ips_detect_cpu(struct ips_driver *ips) | |||
1351 | tdp = turbo_power & TURBO_TDP_MASK; | 1403 | tdp = turbo_power & TURBO_TDP_MASK; |
1352 | 1404 | ||
1353 | /* Sanity check TDP against CPU */ | 1405 | /* Sanity check TDP against CPU */ |
1354 | if (limits->mcp_power_limit != (tdp / 8) * 1000) { | 1406 | if (limits->core_power_limit != (tdp / 8) * 1000) { |
1355 | dev_warn(&ips->dev->dev, "Warning: CPU TDP doesn't match expected value (found %d, expected %d)\n", | 1407 | dev_info(&ips->dev->dev, "CPU TDP doesn't match expected value (found %d, expected %d)\n", |
1356 | tdp / 8, limits->mcp_power_limit / 1000); | 1408 | tdp / 8, limits->core_power_limit / 1000); |
1409 | limits->core_power_limit = (tdp / 8) * 1000; | ||
1357 | } | 1410 | } |
1358 | 1411 | ||
1359 | out: | 1412 | out: |
@@ -1390,7 +1443,7 @@ static bool ips_get_i915_syms(struct ips_driver *ips) | |||
1390 | return true; | 1443 | return true; |
1391 | 1444 | ||
1392 | out_put_busy: | 1445 | out_put_busy: |
1393 | symbol_put(i915_gpu_turbo_disable); | 1446 | symbol_put(i915_gpu_busy); |
1394 | out_put_lower: | 1447 | out_put_lower: |
1395 | symbol_put(i915_gpu_lower); | 1448 | symbol_put(i915_gpu_lower); |
1396 | out_put_raise: | 1449 | out_put_raise: |
@@ -1532,22 +1585,27 @@ static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1532 | /* Save turbo limits & ratios */ | 1585 | /* Save turbo limits & ratios */ |
1533 | rdmsrl(TURBO_POWER_CURRENT_LIMIT, ips->orig_turbo_limit); | 1586 | rdmsrl(TURBO_POWER_CURRENT_LIMIT, ips->orig_turbo_limit); |
1534 | 1587 | ||
1535 | ips_enable_cpu_turbo(ips); | 1588 | ips_disable_cpu_turbo(ips); |
1536 | ips->cpu_turbo_enabled = true; | 1589 | ips->cpu_turbo_enabled = false; |
1537 | 1590 | ||
1538 | /* Set up the work queue and monitor/adjust threads */ | 1591 | /* Create thermal adjust thread */ |
1539 | ips->monitor = kthread_run(ips_monitor, ips, "ips-monitor"); | 1592 | ips->adjust = kthread_create(ips_adjust, ips, "ips-adjust"); |
1540 | if (IS_ERR(ips->monitor)) { | 1593 | if (IS_ERR(ips->adjust)) { |
1541 | dev_err(&dev->dev, | 1594 | dev_err(&dev->dev, |
1542 | "failed to create thermal monitor thread, aborting\n"); | 1595 | "failed to create thermal adjust thread, aborting\n"); |
1543 | ret = -ENOMEM; | 1596 | ret = -ENOMEM; |
1544 | goto error_free_irq; | 1597 | goto error_free_irq; |
1598 | |||
1545 | } | 1599 | } |
1546 | 1600 | ||
1547 | ips->adjust = kthread_create(ips_adjust, ips, "ips-adjust"); | 1601 | /* |
1548 | if (IS_ERR(ips->adjust)) { | 1602 | * Set up the work queue and monitor thread. The monitor thread |
1603 | * will wake up ips_adjust thread. | ||
1604 | */ | ||
1605 | ips->monitor = kthread_run(ips_monitor, ips, "ips-monitor"); | ||
1606 | if (IS_ERR(ips->monitor)) { | ||
1549 | dev_err(&dev->dev, | 1607 | dev_err(&dev->dev, |
1550 | "failed to create thermal adjust thread, aborting\n"); | 1608 | "failed to create thermal monitor thread, aborting\n"); |
1551 | ret = -ENOMEM; | 1609 | ret = -ENOMEM; |
1552 | goto error_thread_cleanup; | 1610 | goto error_thread_cleanup; |
1553 | } | 1611 | } |
@@ -1566,7 +1624,7 @@ static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1566 | return ret; | 1624 | return ret; |
1567 | 1625 | ||
1568 | error_thread_cleanup: | 1626 | error_thread_cleanup: |
1569 | kthread_stop(ips->monitor); | 1627 | kthread_stop(ips->adjust); |
1570 | error_free_irq: | 1628 | error_free_irq: |
1571 | free_irq(ips->dev->irq, ips); | 1629 | free_irq(ips->dev->irq, ips); |
1572 | error_unmap: | 1630 | error_unmap: |
diff --git a/drivers/regulator/ad5398.c b/drivers/regulator/ad5398.c index df1fb53c09d2..a4be41614eeb 100644 --- a/drivers/regulator/ad5398.c +++ b/drivers/regulator/ad5398.c | |||
@@ -256,7 +256,6 @@ static int __devexit ad5398_remove(struct i2c_client *client) | |||
256 | 256 | ||
257 | regulator_unregister(chip->rdev); | 257 | regulator_unregister(chip->rdev); |
258 | kfree(chip); | 258 | kfree(chip); |
259 | i2c_set_clientdata(client, NULL); | ||
260 | 259 | ||
261 | return 0; | 260 | return 0; |
262 | } | 261 | } |
diff --git a/drivers/regulator/isl6271a-regulator.c b/drivers/regulator/isl6271a-regulator.c index d61ecb885a8c..b8cc6389a541 100644 --- a/drivers/regulator/isl6271a-regulator.c +++ b/drivers/regulator/isl6271a-regulator.c | |||
@@ -191,8 +191,6 @@ static int __devexit isl6271a_remove(struct i2c_client *i2c) | |||
191 | struct isl_pmic *pmic = i2c_get_clientdata(i2c); | 191 | struct isl_pmic *pmic = i2c_get_clientdata(i2c); |
192 | int i; | 192 | int i; |
193 | 193 | ||
194 | i2c_set_clientdata(i2c, NULL); | ||
195 | |||
196 | for (i = 0; i < 3; i++) | 194 | for (i = 0; i < 3; i++) |
197 | regulator_unregister(pmic->rdev[i]); | 195 | regulator_unregister(pmic->rdev[i]); |
198 | 196 | ||
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c index 9daed8db83d3..9de8516e3531 100644 --- a/drivers/rtc/rtc-ds3232.c +++ b/drivers/rtc/rtc-ds3232.c | |||
@@ -268,7 +268,6 @@ out_irq: | |||
268 | free_irq(client->irq, client); | 268 | free_irq(client->irq, client); |
269 | 269 | ||
270 | out_free: | 270 | out_free: |
271 | i2c_set_clientdata(client, NULL); | ||
272 | kfree(ds3232); | 271 | kfree(ds3232); |
273 | return ret; | 272 | return ret; |
274 | } | 273 | } |
@@ -287,7 +286,6 @@ static int __devexit ds3232_remove(struct i2c_client *client) | |||
287 | } | 286 | } |
288 | 287 | ||
289 | rtc_device_unregister(ds3232->rtc); | 288 | rtc_device_unregister(ds3232->rtc); |
290 | i2c_set_clientdata(client, NULL); | ||
291 | kfree(ds3232); | 289 | kfree(ds3232); |
292 | return 0; | 290 | return 0; |
293 | } | 291 | } |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 12900f7083b0..3198c5335f0b 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -458,6 +458,7 @@ config SERIAL_SAMSUNG_UARTS | |||
458 | int | 458 | int |
459 | depends on ARM && PLAT_SAMSUNG | 459 | depends on ARM && PLAT_SAMSUNG |
460 | default 2 if ARCH_S3C2400 | 460 | default 2 if ARCH_S3C2400 |
461 | default 6 if ARCH_S5P6450 | ||
461 | default 4 if SERIAL_SAMSUNG_UARTS_4 | 462 | default 4 if SERIAL_SAMSUNG_UARTS_4 |
462 | default 3 | 463 | default 3 |
463 | help | 464 | help |
@@ -526,12 +527,12 @@ config SERIAL_S3C24A0 | |||
526 | Serial port support for the Samsung S3C24A0 SoC | 527 | Serial port support for the Samsung S3C24A0 SoC |
527 | 528 | ||
528 | config SERIAL_S3C6400 | 529 | config SERIAL_S3C6400 |
529 | tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support" | 530 | tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support" |
530 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100) | 531 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100) |
531 | select SERIAL_SAMSUNG_UARTS_4 | 532 | select SERIAL_SAMSUNG_UARTS_4 |
532 | default y | 533 | default y |
533 | help | 534 | help |
534 | Serial port support for the Samsung S3C6400, S3C6410, S5P6440 | 535 | Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450 |
535 | and S5PC100 SoCs | 536 | and S5PC100 SoCs |
536 | 537 | ||
537 | config SERIAL_S5PV210 | 538 | config SERIAL_S5PV210 |
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index b1156ba8ad14..7ac2bf5167cd 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c | |||
@@ -1101,7 +1101,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, | |||
1101 | dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); | 1101 | dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); |
1102 | 1102 | ||
1103 | port->mapbase = res->start; | 1103 | port->mapbase = res->start; |
1104 | port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000); | 1104 | port->membase = S3C_VA_UART + (res->start & 0xfffff); |
1105 | ret = platform_get_irq(platdev, 0); | 1105 | ret = platform_get_irq(platdev, 0); |
1106 | if (ret < 0) | 1106 | if (ret < 0) |
1107 | port->irq = 0; | 1107 | port->irq = 0; |
diff --git a/drivers/staging/tm6000/Kconfig b/drivers/staging/tm6000/Kconfig index c725356cc346..de7ebb99d8f6 100644 --- a/drivers/staging/tm6000/Kconfig +++ b/drivers/staging/tm6000/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config VIDEO_TM6000 | 1 | config VIDEO_TM6000 |
2 | tristate "TV Master TM5600/6000/6010 driver" | 2 | tristate "TV Master TM5600/6000/6010 driver" |
3 | depends on VIDEO_DEV && I2C && INPUT && USB && EXPERIMENTAL | 3 | depends on VIDEO_DEV && I2C && INPUT && IR_CORE && USB && EXPERIMENTAL |
4 | select VIDEO_TUNER | 4 | select VIDEO_TUNER |
5 | select MEDIA_TUNER_XC2028 | 5 | select MEDIA_TUNER_XC2028 |
6 | select MEDIA_TUNER_XC5000 | 6 | select MEDIA_TUNER_XC5000 |
diff --git a/drivers/staging/tm6000/tm6000-input.c b/drivers/staging/tm6000/tm6000-input.c index 32f7a0af6938..54f7667cc706 100644 --- a/drivers/staging/tm6000/tm6000-input.c +++ b/drivers/staging/tm6000/tm6000-input.c | |||
@@ -46,7 +46,7 @@ MODULE_PARM_DESC(enable_ir, "enable ir (default is enable"); | |||
46 | } | 46 | } |
47 | 47 | ||
48 | struct tm6000_ir_poll_result { | 48 | struct tm6000_ir_poll_result { |
49 | u8 rc_data[4]; | 49 | u16 rc_data; |
50 | }; | 50 | }; |
51 | 51 | ||
52 | struct tm6000_IR { | 52 | struct tm6000_IR { |
@@ -60,9 +60,9 @@ struct tm6000_IR { | |||
60 | int polling; | 60 | int polling; |
61 | struct delayed_work work; | 61 | struct delayed_work work; |
62 | u8 wait:1; | 62 | u8 wait:1; |
63 | u8 key:1; | ||
63 | struct urb *int_urb; | 64 | struct urb *int_urb; |
64 | u8 *urb_data; | 65 | u8 *urb_data; |
65 | u8 key:1; | ||
66 | 66 | ||
67 | int (*get_key) (struct tm6000_IR *, struct tm6000_ir_poll_result *); | 67 | int (*get_key) (struct tm6000_IR *, struct tm6000_ir_poll_result *); |
68 | 68 | ||
@@ -122,13 +122,14 @@ static void tm6000_ir_urb_received(struct urb *urb) | |||
122 | 122 | ||
123 | if (urb->status != 0) | 123 | if (urb->status != 0) |
124 | printk(KERN_INFO "not ready\n"); | 124 | printk(KERN_INFO "not ready\n"); |
125 | else if (urb->actual_length > 0) | 125 | else if (urb->actual_length > 0) { |
126 | memcpy(ir->urb_data, urb->transfer_buffer, urb->actual_length); | 126 | memcpy(ir->urb_data, urb->transfer_buffer, urb->actual_length); |
127 | 127 | ||
128 | dprintk("data %02x %02x %02x %02x\n", ir->urb_data[0], | 128 | dprintk("data %02x %02x %02x %02x\n", ir->urb_data[0], |
129 | ir->urb_data[1], ir->urb_data[2], ir->urb_data[3]); | 129 | ir->urb_data[1], ir->urb_data[2], ir->urb_data[3]); |
130 | 130 | ||
131 | ir->key = 1; | 131 | ir->key = 1; |
132 | } | ||
132 | 133 | ||
133 | rc = usb_submit_urb(urb, GFP_ATOMIC); | 134 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
134 | } | 135 | } |
@@ -140,30 +141,47 @@ static int default_polling_getkey(struct tm6000_IR *ir, | |||
140 | int rc; | 141 | int rc; |
141 | u8 buf[2]; | 142 | u8 buf[2]; |
142 | 143 | ||
143 | if (ir->wait && !&dev->int_in) { | 144 | if (ir->wait && !&dev->int_in) |
144 | poll_result->rc_data[0] = 0xff; | ||
145 | return 0; | 145 | return 0; |
146 | } | ||
147 | 146 | ||
148 | if (&dev->int_in) { | 147 | if (&dev->int_in) { |
149 | poll_result->rc_data[0] = ir->urb_data[0]; | 148 | if (ir->ir.ir_type == IR_TYPE_RC5) |
150 | poll_result->rc_data[1] = ir->urb_data[1]; | 149 | poll_result->rc_data = ir->urb_data[0]; |
150 | else | ||
151 | poll_result->rc_data = ir->urb_data[0] | ir->urb_data[1] << 8; | ||
151 | } else { | 152 | } else { |
152 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 0); | 153 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 0); |
153 | msleep(10); | 154 | msleep(10); |
154 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 1); | 155 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 1); |
155 | msleep(10); | 156 | msleep(10); |
156 | 157 | ||
157 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR | | 158 | if (ir->ir.ir_type == IR_TYPE_RC5) { |
158 | USB_RECIP_DEVICE, REQ_02_GET_IR_CODE, 0, 0, buf, 1); | 159 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | |
160 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
161 | REQ_02_GET_IR_CODE, 0, 0, buf, 1); | ||
159 | 162 | ||
160 | msleep(10); | 163 | msleep(10); |
161 | 164 | ||
162 | dprintk("read data=%02x\n", buf[0]); | 165 | dprintk("read data=%02x\n", buf[0]); |
163 | if (rc < 0) | 166 | if (rc < 0) |
164 | return rc; | 167 | return rc; |
165 | 168 | ||
166 | poll_result->rc_data[0] = buf[0]; | 169 | poll_result->rc_data = buf[0]; |
170 | } else { | ||
171 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | | ||
172 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
173 | REQ_02_GET_IR_CODE, 0, 0, buf, 2); | ||
174 | |||
175 | msleep(10); | ||
176 | |||
177 | dprintk("read data=%04x\n", buf[0] | buf[1] << 8); | ||
178 | if (rc < 0) | ||
179 | return rc; | ||
180 | |||
181 | poll_result->rc_data = buf[0] | buf[1] << 8; | ||
182 | } | ||
183 | if ((poll_result->rc_data & 0x00ff) != 0xff) | ||
184 | ir->key = 1; | ||
167 | } | 185 | } |
168 | return 0; | 186 | return 0; |
169 | } | 187 | } |
@@ -180,12 +198,11 @@ static void tm6000_ir_handle_key(struct tm6000_IR *ir) | |||
180 | return; | 198 | return; |
181 | } | 199 | } |
182 | 200 | ||
183 | dprintk("ir->get_key result data=%02x %02x\n", | 201 | dprintk("ir->get_key result data=%04x\n", poll_result.rc_data); |
184 | poll_result.rc_data[0], poll_result.rc_data[1]); | ||
185 | 202 | ||
186 | if (poll_result.rc_data[0] != 0xff && ir->key == 1) { | 203 | if (ir->key) { |
187 | ir_input_keydown(ir->input->input_dev, &ir->ir, | 204 | ir_input_keydown(ir->input->input_dev, &ir->ir, |
188 | poll_result.rc_data[0] | poll_result.rc_data[1] << 8); | 205 | (u32)poll_result.rc_data); |
189 | 206 | ||
190 | ir_input_nokey(ir->input->input_dev, &ir->ir); | 207 | ir_input_nokey(ir->input->input_dev, &ir->ir); |
191 | ir->key = 0; | 208 | ir->key = 0; |
diff --git a/fs/binfmt_aout.c b/fs/binfmt_aout.c index f96eff04e11a..a6395bdb26ae 100644 --- a/fs/binfmt_aout.c +++ b/fs/binfmt_aout.c | |||
@@ -134,10 +134,6 @@ static int aout_core_dump(struct coredump_params *cprm) | |||
134 | if (!dump_write(file, dump_start, dump_size)) | 134 | if (!dump_write(file, dump_start, dump_size)) |
135 | goto end_coredump; | 135 | goto end_coredump; |
136 | } | 136 | } |
137 | /* Finally dump the task struct. Not be used by gdb, but could be useful */ | ||
138 | set_fs(KERNEL_DS); | ||
139 | if (!dump_write(file, current, sizeof(*current))) | ||
140 | goto end_coredump; | ||
141 | end_coredump: | 137 | end_coredump: |
142 | set_fs(fs); | 138 | set_fs(fs); |
143 | return has_dumped; | 139 | return has_dumped; |
diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c index 73c153092f72..5e9da996a151 100644 --- a/fs/ceph/caps.c +++ b/fs/ceph/caps.c | |||
@@ -2283,7 +2283,8 @@ static void handle_cap_grant(struct inode *inode, struct ceph_mds_caps *grant, | |||
2283 | { | 2283 | { |
2284 | struct ceph_inode_info *ci = ceph_inode(inode); | 2284 | struct ceph_inode_info *ci = ceph_inode(inode); |
2285 | int mds = session->s_mds; | 2285 | int mds = session->s_mds; |
2286 | int seq = le32_to_cpu(grant->seq); | 2286 | unsigned seq = le32_to_cpu(grant->seq); |
2287 | unsigned issue_seq = le32_to_cpu(grant->issue_seq); | ||
2287 | int newcaps = le32_to_cpu(grant->caps); | 2288 | int newcaps = le32_to_cpu(grant->caps); |
2288 | int issued, implemented, used, wanted, dirty; | 2289 | int issued, implemented, used, wanted, dirty; |
2289 | u64 size = le64_to_cpu(grant->size); | 2290 | u64 size = le64_to_cpu(grant->size); |
@@ -2295,8 +2296,8 @@ static void handle_cap_grant(struct inode *inode, struct ceph_mds_caps *grant, | |||
2295 | int revoked_rdcache = 0; | 2296 | int revoked_rdcache = 0; |
2296 | int queue_invalidate = 0; | 2297 | int queue_invalidate = 0; |
2297 | 2298 | ||
2298 | dout("handle_cap_grant inode %p cap %p mds%d seq %d %s\n", | 2299 | dout("handle_cap_grant inode %p cap %p mds%d seq %u/%u %s\n", |
2299 | inode, cap, mds, seq, ceph_cap_string(newcaps)); | 2300 | inode, cap, mds, seq, issue_seq, ceph_cap_string(newcaps)); |
2300 | dout(" size %llu max_size %llu, i_size %llu\n", size, max_size, | 2301 | dout(" size %llu max_size %llu, i_size %llu\n", size, max_size, |
2301 | inode->i_size); | 2302 | inode->i_size); |
2302 | 2303 | ||
@@ -2392,6 +2393,7 @@ static void handle_cap_grant(struct inode *inode, struct ceph_mds_caps *grant, | |||
2392 | } | 2393 | } |
2393 | 2394 | ||
2394 | cap->seq = seq; | 2395 | cap->seq = seq; |
2396 | cap->issue_seq = issue_seq; | ||
2395 | 2397 | ||
2396 | /* file layout may have changed */ | 2398 | /* file layout may have changed */ |
2397 | ci->i_layout = grant->layout; | 2399 | ci->i_layout = grant->layout; |
@@ -2774,15 +2776,7 @@ void ceph_handle_caps(struct ceph_mds_session *session, | |||
2774 | if (op == CEPH_CAP_OP_IMPORT) | 2776 | if (op == CEPH_CAP_OP_IMPORT) |
2775 | __queue_cap_release(session, vino.ino, cap_id, | 2777 | __queue_cap_release(session, vino.ino, cap_id, |
2776 | mseq, seq); | 2778 | mseq, seq); |
2777 | 2779 | goto flush_cap_releases; | |
2778 | /* | ||
2779 | * send any full release message to try to move things | ||
2780 | * along for the mds (who clearly thinks we still have this | ||
2781 | * cap). | ||
2782 | */ | ||
2783 | ceph_add_cap_releases(mdsc, session); | ||
2784 | ceph_send_cap_releases(mdsc, session); | ||
2785 | goto done; | ||
2786 | } | 2780 | } |
2787 | 2781 | ||
2788 | /* these will work even if we don't have a cap yet */ | 2782 | /* these will work even if we don't have a cap yet */ |
@@ -2810,7 +2804,7 @@ void ceph_handle_caps(struct ceph_mds_session *session, | |||
2810 | dout(" no cap on %p ino %llx.%llx from mds%d\n", | 2804 | dout(" no cap on %p ino %llx.%llx from mds%d\n", |
2811 | inode, ceph_ino(inode), ceph_snap(inode), mds); | 2805 | inode, ceph_ino(inode), ceph_snap(inode), mds); |
2812 | spin_unlock(&inode->i_lock); | 2806 | spin_unlock(&inode->i_lock); |
2813 | goto done; | 2807 | goto flush_cap_releases; |
2814 | } | 2808 | } |
2815 | 2809 | ||
2816 | /* note that each of these drops i_lock for us */ | 2810 | /* note that each of these drops i_lock for us */ |
@@ -2834,6 +2828,17 @@ void ceph_handle_caps(struct ceph_mds_session *session, | |||
2834 | ceph_cap_op_name(op)); | 2828 | ceph_cap_op_name(op)); |
2835 | } | 2829 | } |
2836 | 2830 | ||
2831 | goto done; | ||
2832 | |||
2833 | flush_cap_releases: | ||
2834 | /* | ||
2835 | * send any full release message to try to move things | ||
2836 | * along for the mds (who clearly thinks we still have this | ||
2837 | * cap). | ||
2838 | */ | ||
2839 | ceph_add_cap_releases(mdsc, session); | ||
2840 | ceph_send_cap_releases(mdsc, session); | ||
2841 | |||
2837 | done: | 2842 | done: |
2838 | mutex_unlock(&session->s_mutex); | 2843 | mutex_unlock(&session->s_mutex); |
2839 | done_unlocked: | 2844 | done_unlocked: |
diff --git a/fs/ceph/export.c b/fs/ceph/export.c index 4480cb1c63e7..e38423e82f2e 100644 --- a/fs/ceph/export.c +++ b/fs/ceph/export.c | |||
@@ -42,32 +42,37 @@ struct ceph_nfs_confh { | |||
42 | static int ceph_encode_fh(struct dentry *dentry, u32 *rawfh, int *max_len, | 42 | static int ceph_encode_fh(struct dentry *dentry, u32 *rawfh, int *max_len, |
43 | int connectable) | 43 | int connectable) |
44 | { | 44 | { |
45 | int type; | ||
45 | struct ceph_nfs_fh *fh = (void *)rawfh; | 46 | struct ceph_nfs_fh *fh = (void *)rawfh; |
46 | struct ceph_nfs_confh *cfh = (void *)rawfh; | 47 | struct ceph_nfs_confh *cfh = (void *)rawfh; |
47 | struct dentry *parent = dentry->d_parent; | 48 | struct dentry *parent = dentry->d_parent; |
48 | struct inode *inode = dentry->d_inode; | 49 | struct inode *inode = dentry->d_inode; |
49 | int type; | 50 | int connected_handle_length = sizeof(*cfh)/4; |
51 | int handle_length = sizeof(*fh)/4; | ||
50 | 52 | ||
51 | /* don't re-export snaps */ | 53 | /* don't re-export snaps */ |
52 | if (ceph_snap(inode) != CEPH_NOSNAP) | 54 | if (ceph_snap(inode) != CEPH_NOSNAP) |
53 | return -EINVAL; | 55 | return -EINVAL; |
54 | 56 | ||
55 | if (*max_len >= sizeof(*cfh)) { | 57 | if (*max_len >= connected_handle_length) { |
56 | dout("encode_fh %p connectable\n", dentry); | 58 | dout("encode_fh %p connectable\n", dentry); |
57 | cfh->ino = ceph_ino(dentry->d_inode); | 59 | cfh->ino = ceph_ino(dentry->d_inode); |
58 | cfh->parent_ino = ceph_ino(parent->d_inode); | 60 | cfh->parent_ino = ceph_ino(parent->d_inode); |
59 | cfh->parent_name_hash = parent->d_name.hash; | 61 | cfh->parent_name_hash = parent->d_name.hash; |
60 | *max_len = sizeof(*cfh); | 62 | *max_len = connected_handle_length; |
61 | type = 2; | 63 | type = 2; |
62 | } else if (*max_len > sizeof(*fh)) { | 64 | } else if (*max_len >= handle_length) { |
63 | if (connectable) | 65 | if (connectable) { |
64 | return -ENOSPC; | 66 | *max_len = connected_handle_length; |
67 | return 255; | ||
68 | } | ||
65 | dout("encode_fh %p\n", dentry); | 69 | dout("encode_fh %p\n", dentry); |
66 | fh->ino = ceph_ino(dentry->d_inode); | 70 | fh->ino = ceph_ino(dentry->d_inode); |
67 | *max_len = sizeof(*fh); | 71 | *max_len = handle_length; |
68 | type = 1; | 72 | type = 1; |
69 | } else { | 73 | } else { |
70 | return -ENOSPC; | 74 | *max_len = handle_length; |
75 | return 255; | ||
71 | } | 76 | } |
72 | return type; | 77 | return type; |
73 | } | 78 | } |
diff --git a/fs/ceph/file.c b/fs/ceph/file.c index 8c044a4f0457..66e4da6dba22 100644 --- a/fs/ceph/file.c +++ b/fs/ceph/file.c | |||
@@ -697,7 +697,7 @@ more: | |||
697 | * start_request so that a tid has been assigned. | 697 | * start_request so that a tid has been assigned. |
698 | */ | 698 | */ |
699 | spin_lock(&ci->i_unsafe_lock); | 699 | spin_lock(&ci->i_unsafe_lock); |
700 | list_add(&ci->i_unsafe_writes, &req->r_unsafe_item); | 700 | list_add(&req->r_unsafe_item, &ci->i_unsafe_writes); |
701 | spin_unlock(&ci->i_unsafe_lock); | 701 | spin_unlock(&ci->i_unsafe_lock); |
702 | ceph_get_cap_refs(ci, CEPH_CAP_FILE_WR); | 702 | ceph_get_cap_refs(ci, CEPH_CAP_FILE_WR); |
703 | } | 703 | } |
diff --git a/fs/ceph/osd_client.c b/fs/ceph/osd_client.c index dfced1dacbcd..3b5571b8ce22 100644 --- a/fs/ceph/osd_client.c +++ b/fs/ceph/osd_client.c | |||
@@ -549,7 +549,7 @@ static void __unregister_request(struct ceph_osd_client *osdc, | |||
549 | */ | 549 | */ |
550 | static void __cancel_request(struct ceph_osd_request *req) | 550 | static void __cancel_request(struct ceph_osd_request *req) |
551 | { | 551 | { |
552 | if (req->r_sent) { | 552 | if (req->r_sent && req->r_osd) { |
553 | ceph_con_revoke(&req->r_osd->o_con, req->r_request); | 553 | ceph_con_revoke(&req->r_osd->o_con, req->r_request); |
554 | req->r_sent = 0; | 554 | req->r_sent = 0; |
555 | } | 555 | } |
@@ -2014,3 +2014,41 @@ fail_creds: | |||
2014 | fail: | 2014 | fail: |
2015 | return; | 2015 | return; |
2016 | } | 2016 | } |
2017 | |||
2018 | /* | ||
2019 | * Core dumping helper functions. These are the only things you should | ||
2020 | * do on a core-file: use only these functions to write out all the | ||
2021 | * necessary info. | ||
2022 | */ | ||
2023 | int dump_write(struct file *file, const void *addr, int nr) | ||
2024 | { | ||
2025 | return access_ok(VERIFY_READ, addr, nr) && file->f_op->write(file, addr, nr, &file->f_pos) == nr; | ||
2026 | } | ||
2027 | |||
2028 | int dump_seek(struct file *file, loff_t off) | ||
2029 | { | ||
2030 | int ret = 1; | ||
2031 | |||
2032 | if (file->f_op->llseek && file->f_op->llseek != no_llseek) { | ||
2033 | if (file->f_op->llseek(file, off, SEEK_CUR) < 0) | ||
2034 | return 0; | ||
2035 | } else { | ||
2036 | char *buf = (char *)get_zeroed_page(GFP_KERNEL); | ||
2037 | |||
2038 | if (!buf) | ||
2039 | return 0; | ||
2040 | while (off > 0) { | ||
2041 | unsigned long n = off; | ||
2042 | |||
2043 | if (n > PAGE_SIZE) | ||
2044 | n = PAGE_SIZE; | ||
2045 | if (!dump_write(file, buf, n)) { | ||
2046 | ret = 0; | ||
2047 | break; | ||
2048 | } | ||
2049 | off -= n; | ||
2050 | } | ||
2051 | free_page((unsigned long)buf); | ||
2052 | } | ||
2053 | return ret; | ||
2054 | } | ||
diff --git a/fs/exofs/inode.c b/fs/exofs/inode.c index eb7368ebd8cd..3eadd97324b1 100644 --- a/fs/exofs/inode.c +++ b/fs/exofs/inode.c | |||
@@ -54,6 +54,9 @@ struct page_collect { | |||
54 | unsigned nr_pages; | 54 | unsigned nr_pages; |
55 | unsigned long length; | 55 | unsigned long length; |
56 | loff_t pg_first; /* keep 64bit also in 32-arches */ | 56 | loff_t pg_first; /* keep 64bit also in 32-arches */ |
57 | bool read_4_write; /* This means two things: that the read is sync | ||
58 | * And the pages should not be unlocked. | ||
59 | */ | ||
57 | }; | 60 | }; |
58 | 61 | ||
59 | static void _pcol_init(struct page_collect *pcol, unsigned expected_pages, | 62 | static void _pcol_init(struct page_collect *pcol, unsigned expected_pages, |
@@ -71,6 +74,7 @@ static void _pcol_init(struct page_collect *pcol, unsigned expected_pages, | |||
71 | pcol->nr_pages = 0; | 74 | pcol->nr_pages = 0; |
72 | pcol->length = 0; | 75 | pcol->length = 0; |
73 | pcol->pg_first = -1; | 76 | pcol->pg_first = -1; |
77 | pcol->read_4_write = false; | ||
74 | } | 78 | } |
75 | 79 | ||
76 | static void _pcol_reset(struct page_collect *pcol) | 80 | static void _pcol_reset(struct page_collect *pcol) |
@@ -347,7 +351,8 @@ static int readpage_strip(void *data, struct page *page) | |||
347 | if (PageError(page)) | 351 | if (PageError(page)) |
348 | ClearPageError(page); | 352 | ClearPageError(page); |
349 | 353 | ||
350 | unlock_page(page); | 354 | if (!pcol->read_4_write) |
355 | unlock_page(page); | ||
351 | EXOFS_DBGMSG("readpage_strip(0x%lx, 0x%lx) empty page," | 356 | EXOFS_DBGMSG("readpage_strip(0x%lx, 0x%lx) empty page," |
352 | " splitting\n", inode->i_ino, page->index); | 357 | " splitting\n", inode->i_ino, page->index); |
353 | 358 | ||
@@ -428,6 +433,7 @@ static int _readpage(struct page *page, bool is_sync) | |||
428 | /* readpage_strip might call read_exec(,is_sync==false) at several | 433 | /* readpage_strip might call read_exec(,is_sync==false) at several |
429 | * places but not if we have a single page. | 434 | * places but not if we have a single page. |
430 | */ | 435 | */ |
436 | pcol.read_4_write = is_sync; | ||
431 | ret = readpage_strip(&pcol, page); | 437 | ret = readpage_strip(&pcol, page); |
432 | if (ret) { | 438 | if (ret) { |
433 | EXOFS_ERR("_readpage => %d\n", ret); | 439 | EXOFS_ERR("_readpage => %d\n", ret); |
diff --git a/fs/nfsd/nfsfh.h b/fs/nfsd/nfsfh.h index cdfb8c6a4206..c16f8d8331b5 100644 --- a/fs/nfsd/nfsfh.h +++ b/fs/nfsd/nfsfh.h | |||
@@ -196,8 +196,6 @@ fh_lock(struct svc_fh *fhp) | |||
196 | static inline void | 196 | static inline void |
197 | fh_unlock(struct svc_fh *fhp) | 197 | fh_unlock(struct svc_fh *fhp) |
198 | { | 198 | { |
199 | BUG_ON(!fhp->fh_dentry); | ||
200 | |||
201 | if (fhp->fh_locked) { | 199 | if (fhp->fh_locked) { |
202 | fill_post_wcc(fhp); | 200 | fill_post_wcc(fhp); |
203 | mutex_unlock(&fhp->fh_dentry->d_inode->i_mutex); | 201 | mutex_unlock(&fhp->fh_dentry->d_inode->i_mutex); |
diff --git a/fs/notify/Kconfig b/fs/notify/Kconfig index 22c629eedd82..b388443c3a09 100644 --- a/fs/notify/Kconfig +++ b/fs/notify/Kconfig | |||
@@ -3,4 +3,4 @@ config FSNOTIFY | |||
3 | 3 | ||
4 | source "fs/notify/dnotify/Kconfig" | 4 | source "fs/notify/dnotify/Kconfig" |
5 | source "fs/notify/inotify/Kconfig" | 5 | source "fs/notify/inotify/Kconfig" |
6 | source "fs/notify/fanotify/Kconfig" | 6 | #source "fs/notify/fanotify/Kconfig" |
diff --git a/fs/xfs/linux-2.6/xfs_sync.c b/fs/xfs/linux-2.6/xfs_sync.c index d59c4a65d492..81976ffed7d6 100644 --- a/fs/xfs/linux-2.6/xfs_sync.c +++ b/fs/xfs/linux-2.6/xfs_sync.c | |||
@@ -668,14 +668,11 @@ xfs_inode_set_reclaim_tag( | |||
668 | xfs_perag_put(pag); | 668 | xfs_perag_put(pag); |
669 | } | 669 | } |
670 | 670 | ||
671 | void | 671 | STATIC void |
672 | __xfs_inode_clear_reclaim_tag( | 672 | __xfs_inode_clear_reclaim( |
673 | xfs_mount_t *mp, | ||
674 | xfs_perag_t *pag, | 673 | xfs_perag_t *pag, |
675 | xfs_inode_t *ip) | 674 | xfs_inode_t *ip) |
676 | { | 675 | { |
677 | radix_tree_tag_clear(&pag->pag_ici_root, | ||
678 | XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG); | ||
679 | pag->pag_ici_reclaimable--; | 676 | pag->pag_ici_reclaimable--; |
680 | if (!pag->pag_ici_reclaimable) { | 677 | if (!pag->pag_ici_reclaimable) { |
681 | /* clear the reclaim tag from the perag radix tree */ | 678 | /* clear the reclaim tag from the perag radix tree */ |
@@ -689,6 +686,17 @@ __xfs_inode_clear_reclaim_tag( | |||
689 | } | 686 | } |
690 | } | 687 | } |
691 | 688 | ||
689 | void | ||
690 | __xfs_inode_clear_reclaim_tag( | ||
691 | xfs_mount_t *mp, | ||
692 | xfs_perag_t *pag, | ||
693 | xfs_inode_t *ip) | ||
694 | { | ||
695 | radix_tree_tag_clear(&pag->pag_ici_root, | ||
696 | XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG); | ||
697 | __xfs_inode_clear_reclaim(pag, ip); | ||
698 | } | ||
699 | |||
692 | /* | 700 | /* |
693 | * Inodes in different states need to be treated differently, and the return | 701 | * Inodes in different states need to be treated differently, and the return |
694 | * value of xfs_iflush is not sufficient to get this right. The following table | 702 | * value of xfs_iflush is not sufficient to get this right. The following table |
@@ -838,6 +846,7 @@ reclaim: | |||
838 | if (!radix_tree_delete(&pag->pag_ici_root, | 846 | if (!radix_tree_delete(&pag->pag_ici_root, |
839 | XFS_INO_TO_AGINO(ip->i_mount, ip->i_ino))) | 847 | XFS_INO_TO_AGINO(ip->i_mount, ip->i_ino))) |
840 | ASSERT(0); | 848 | ASSERT(0); |
849 | __xfs_inode_clear_reclaim(pag, ip); | ||
841 | write_unlock(&pag->pag_ici_lock); | 850 | write_unlock(&pag->pag_ici_lock); |
842 | 851 | ||
843 | /* | 852 | /* |
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h index 267a86c74e2e..2040e6c4f172 100644 --- a/include/drm/ttm/ttm_bo_api.h +++ b/include/drm/ttm/ttm_bo_api.h | |||
@@ -246,9 +246,11 @@ struct ttm_buffer_object { | |||
246 | 246 | ||
247 | atomic_t reserved; | 247 | atomic_t reserved; |
248 | 248 | ||
249 | |||
250 | /** | 249 | /** |
251 | * Members protected by the bo::lock | 250 | * Members protected by the bo::lock |
251 | * In addition, setting sync_obj to anything else | ||
252 | * than NULL requires bo::reserved to be held. This allows for | ||
253 | * checking NULL while reserved but not holding bo::lock. | ||
252 | */ | 254 | */ |
253 | 255 | ||
254 | void *sync_obj_arg; | 256 | void *sync_obj_arg; |
diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 626b629429ff..4e8ea8c8ec1e 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild | |||
@@ -118,7 +118,6 @@ header-y += eventpoll.h | |||
118 | header-y += ext2_fs.h | 118 | header-y += ext2_fs.h |
119 | header-y += fadvise.h | 119 | header-y += fadvise.h |
120 | header-y += falloc.h | 120 | header-y += falloc.h |
121 | header-y += fanotify.h | ||
122 | header-y += fb.h | 121 | header-y += fb.h |
123 | header-y += fcntl.h | 122 | header-y += fcntl.h |
124 | header-y += fd.h | 123 | header-y += fd.h |
diff --git a/include/linux/coredump.h b/include/linux/coredump.h index 8ba66a9d9022..ba4b85a6d9b8 100644 --- a/include/linux/coredump.h +++ b/include/linux/coredump.h | |||
@@ -9,37 +9,7 @@ | |||
9 | * These are the only things you should do on a core-file: use only these | 9 | * These are the only things you should do on a core-file: use only these |
10 | * functions to write out all the necessary info. | 10 | * functions to write out all the necessary info. |
11 | */ | 11 | */ |
12 | static inline int dump_write(struct file *file, const void *addr, int nr) | 12 | extern int dump_write(struct file *file, const void *addr, int nr); |
13 | { | 13 | extern int dump_seek(struct file *file, loff_t off); |
14 | return file->f_op->write(file, addr, nr, &file->f_pos) == nr; | ||
15 | } | ||
16 | |||
17 | static inline int dump_seek(struct file *file, loff_t off) | ||
18 | { | ||
19 | int ret = 1; | ||
20 | |||
21 | if (file->f_op->llseek && file->f_op->llseek != no_llseek) { | ||
22 | if (file->f_op->llseek(file, off, SEEK_CUR) < 0) | ||
23 | return 0; | ||
24 | } else { | ||
25 | char *buf = (char *)get_zeroed_page(GFP_KERNEL); | ||
26 | |||
27 | if (!buf) | ||
28 | return 0; | ||
29 | while (off > 0) { | ||
30 | unsigned long n = off; | ||
31 | |||
32 | if (n > PAGE_SIZE) | ||
33 | n = PAGE_SIZE; | ||
34 | if (!dump_write(file, buf, n)) { | ||
35 | ret = 0; | ||
36 | break; | ||
37 | } | ||
38 | off -= n; | ||
39 | } | ||
40 | free_page((unsigned long)buf); | ||
41 | } | ||
42 | return ret; | ||
43 | } | ||
44 | 14 | ||
45 | #endif /* _LINUX_COREDUMP_H */ | 15 | #endif /* _LINUX_COREDUMP_H */ |
diff --git a/include/linux/elevator.h b/include/linux/elevator.h index 926b50322a46..4fd978e7eb83 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h | |||
@@ -93,6 +93,7 @@ struct elevator_queue | |||
93 | struct elevator_type *elevator_type; | 93 | struct elevator_type *elevator_type; |
94 | struct mutex sysfs_lock; | 94 | struct mutex sysfs_lock; |
95 | struct hlist_head *hash; | 95 | struct hlist_head *hash; |
96 | unsigned int registered:1; | ||
96 | }; | 97 | }; |
97 | 98 | ||
98 | /* | 99 | /* |
diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h index 97e07f46a0fa..aa4ebb42a565 100644 --- a/include/media/videobuf-dma-sg.h +++ b/include/media/videobuf-dma-sg.h | |||
@@ -48,6 +48,7 @@ struct videobuf_dmabuf { | |||
48 | 48 | ||
49 | /* for userland buffer */ | 49 | /* for userland buffer */ |
50 | int offset; | 50 | int offset; |
51 | size_t size; | ||
51 | struct page **pages; | 52 | struct page **pages; |
52 | 53 | ||
53 | /* for kernel buffers */ | 54 | /* for kernel buffers */ |
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h index 27a902d9b3a9..30fce0128dd7 100644 --- a/include/net/bluetooth/bluetooth.h +++ b/include/net/bluetooth/bluetooth.h | |||
@@ -161,12 +161,30 @@ static inline struct sk_buff *bt_skb_send_alloc(struct sock *sk, unsigned long l | |||
161 | { | 161 | { |
162 | struct sk_buff *skb; | 162 | struct sk_buff *skb; |
163 | 163 | ||
164 | release_sock(sk); | ||
164 | if ((skb = sock_alloc_send_skb(sk, len + BT_SKB_RESERVE, nb, err))) { | 165 | if ((skb = sock_alloc_send_skb(sk, len + BT_SKB_RESERVE, nb, err))) { |
165 | skb_reserve(skb, BT_SKB_RESERVE); | 166 | skb_reserve(skb, BT_SKB_RESERVE); |
166 | bt_cb(skb)->incoming = 0; | 167 | bt_cb(skb)->incoming = 0; |
167 | } | 168 | } |
169 | lock_sock(sk); | ||
170 | |||
171 | if (!skb && *err) | ||
172 | return NULL; | ||
173 | |||
174 | *err = sock_error(sk); | ||
175 | if (*err) | ||
176 | goto out; | ||
177 | |||
178 | if (sk->sk_shutdown) { | ||
179 | *err = -ECONNRESET; | ||
180 | goto out; | ||
181 | } | ||
168 | 182 | ||
169 | return skb; | 183 | return skb; |
184 | |||
185 | out: | ||
186 | kfree_skb(skb); | ||
187 | return NULL; | ||
170 | } | 188 | } |
171 | 189 | ||
172 | int bt_err(__u16 code); | 190 | int bt_err(__u16 code); |
diff --git a/kernel/perf_event.c b/kernel/perf_event.c index db5b56064687..b98bed3d8182 100644 --- a/kernel/perf_event.c +++ b/kernel/perf_event.c | |||
@@ -2202,15 +2202,13 @@ static void perf_event_for_each(struct perf_event *event, | |||
2202 | static int perf_event_period(struct perf_event *event, u64 __user *arg) | 2202 | static int perf_event_period(struct perf_event *event, u64 __user *arg) |
2203 | { | 2203 | { |
2204 | struct perf_event_context *ctx = event->ctx; | 2204 | struct perf_event_context *ctx = event->ctx; |
2205 | unsigned long size; | ||
2206 | int ret = 0; | 2205 | int ret = 0; |
2207 | u64 value; | 2206 | u64 value; |
2208 | 2207 | ||
2209 | if (!event->attr.sample_period) | 2208 | if (!event->attr.sample_period) |
2210 | return -EINVAL; | 2209 | return -EINVAL; |
2211 | 2210 | ||
2212 | size = copy_from_user(&value, arg, sizeof(value)); | 2211 | if (copy_from_user(&value, arg, sizeof(value))) |
2213 | if (size != sizeof(value)) | ||
2214 | return -EFAULT; | 2212 | return -EFAULT; |
2215 | 2213 | ||
2216 | if (!value) | 2214 | if (!value) |
diff --git a/kernel/signal.c b/kernel/signal.c index bded65187780..919562c3d6b7 100644 --- a/kernel/signal.c +++ b/kernel/signal.c | |||
@@ -2215,6 +2215,14 @@ int copy_siginfo_to_user(siginfo_t __user *to, siginfo_t *from) | |||
2215 | #ifdef __ARCH_SI_TRAPNO | 2215 | #ifdef __ARCH_SI_TRAPNO |
2216 | err |= __put_user(from->si_trapno, &to->si_trapno); | 2216 | err |= __put_user(from->si_trapno, &to->si_trapno); |
2217 | #endif | 2217 | #endif |
2218 | #ifdef BUS_MCEERR_AO | ||
2219 | /* | ||
2220 | * Other callers might not initialize the si_lsb field, | ||
2221 | * so check explicitely for the right codes here. | ||
2222 | */ | ||
2223 | if (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO) | ||
2224 | err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb); | ||
2225 | #endif | ||
2218 | break; | 2226 | break; |
2219 | case __SI_CHLD: | 2227 | case __SI_CHLD: |
2220 | err |= __put_user(from->si_pid, &to->si_pid); | 2228 | err |= __put_user(from->si_pid, &to->si_pid); |
diff --git a/kernel/sysctl.c b/kernel/sysctl.c index f88552c6d227..3a45c224770f 100644 --- a/kernel/sysctl.c +++ b/kernel/sysctl.c | |||
@@ -2485,7 +2485,7 @@ static int __do_proc_doulongvec_minmax(void *data, struct ctl_table *table, int | |||
2485 | kbuf[left] = 0; | 2485 | kbuf[left] = 0; |
2486 | } | 2486 | } |
2487 | 2487 | ||
2488 | for (; left && vleft--; i++, min++, max++, first=0) { | 2488 | for (; left && vleft--; i++, first = 0) { |
2489 | unsigned long val; | 2489 | unsigned long val; |
2490 | 2490 | ||
2491 | if (write) { | 2491 | if (write) { |
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c index 492197e2f86c..bca96377fd4e 100644 --- a/kernel/trace/ring_buffer.c +++ b/kernel/trace/ring_buffer.c | |||
@@ -405,7 +405,7 @@ static inline int test_time_stamp(u64 delta) | |||
405 | #define BUF_MAX_DATA_SIZE (BUF_PAGE_SIZE - (sizeof(u32) * 2)) | 405 | #define BUF_MAX_DATA_SIZE (BUF_PAGE_SIZE - (sizeof(u32) * 2)) |
406 | 406 | ||
407 | /* Max number of timestamps that can fit on a page */ | 407 | /* Max number of timestamps that can fit on a page */ |
408 | #define RB_TIMESTAMPS_PER_PAGE (BUF_PAGE_SIZE / RB_LEN_TIME_STAMP) | 408 | #define RB_TIMESTAMPS_PER_PAGE (BUF_PAGE_SIZE / RB_LEN_TIME_EXTEND) |
409 | 409 | ||
410 | int ring_buffer_print_page_header(struct trace_seq *s) | 410 | int ring_buffer_print_page_header(struct trace_seq *s) |
411 | { | 411 | { |
diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 3eed583895a6..9be3cf8a5da4 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c | |||
@@ -3587,9 +3587,13 @@ unlock: | |||
3587 | 3587 | ||
3588 | static void mem_cgroup_threshold(struct mem_cgroup *memcg) | 3588 | static void mem_cgroup_threshold(struct mem_cgroup *memcg) |
3589 | { | 3589 | { |
3590 | __mem_cgroup_threshold(memcg, false); | 3590 | while (memcg) { |
3591 | if (do_swap_account) | 3591 | __mem_cgroup_threshold(memcg, false); |
3592 | __mem_cgroup_threshold(memcg, true); | 3592 | if (do_swap_account) |
3593 | __mem_cgroup_threshold(memcg, true); | ||
3594 | |||
3595 | memcg = parent_mem_cgroup(memcg); | ||
3596 | } | ||
3593 | } | 3597 | } |
3594 | 3598 | ||
3595 | static int compare_thresholds(const void *a, const void *b) | 3599 | static int compare_thresholds(const void *a, const void *b) |
diff --git a/mm/memory-failure.c b/mm/memory-failure.c index 9c26eeca1342..757f6b0accfe 100644 --- a/mm/memory-failure.c +++ b/mm/memory-failure.c | |||
@@ -183,7 +183,7 @@ EXPORT_SYMBOL_GPL(hwpoison_filter); | |||
183 | * signal. | 183 | * signal. |
184 | */ | 184 | */ |
185 | static int kill_proc_ao(struct task_struct *t, unsigned long addr, int trapno, | 185 | static int kill_proc_ao(struct task_struct *t, unsigned long addr, int trapno, |
186 | unsigned long pfn) | 186 | unsigned long pfn, struct page *page) |
187 | { | 187 | { |
188 | struct siginfo si; | 188 | struct siginfo si; |
189 | int ret; | 189 | int ret; |
@@ -198,7 +198,7 @@ static int kill_proc_ao(struct task_struct *t, unsigned long addr, int trapno, | |||
198 | #ifdef __ARCH_SI_TRAPNO | 198 | #ifdef __ARCH_SI_TRAPNO |
199 | si.si_trapno = trapno; | 199 | si.si_trapno = trapno; |
200 | #endif | 200 | #endif |
201 | si.si_addr_lsb = PAGE_SHIFT; | 201 | si.si_addr_lsb = compound_order(compound_head(page)) + PAGE_SHIFT; |
202 | /* | 202 | /* |
203 | * Don't use force here, it's convenient if the signal | 203 | * Don't use force here, it's convenient if the signal |
204 | * can be temporarily blocked. | 204 | * can be temporarily blocked. |
@@ -235,7 +235,7 @@ void shake_page(struct page *p, int access) | |||
235 | int nr; | 235 | int nr; |
236 | do { | 236 | do { |
237 | nr = shrink_slab(1000, GFP_KERNEL, 1000); | 237 | nr = shrink_slab(1000, GFP_KERNEL, 1000); |
238 | if (page_count(p) == 0) | 238 | if (page_count(p) == 1) |
239 | break; | 239 | break; |
240 | } while (nr > 10); | 240 | } while (nr > 10); |
241 | } | 241 | } |
@@ -327,7 +327,7 @@ static void add_to_kill(struct task_struct *tsk, struct page *p, | |||
327 | * wrong earlier. | 327 | * wrong earlier. |
328 | */ | 328 | */ |
329 | static void kill_procs_ao(struct list_head *to_kill, int doit, int trapno, | 329 | static void kill_procs_ao(struct list_head *to_kill, int doit, int trapno, |
330 | int fail, unsigned long pfn) | 330 | int fail, struct page *page, unsigned long pfn) |
331 | { | 331 | { |
332 | struct to_kill *tk, *next; | 332 | struct to_kill *tk, *next; |
333 | 333 | ||
@@ -352,7 +352,7 @@ static void kill_procs_ao(struct list_head *to_kill, int doit, int trapno, | |||
352 | * process anyways. | 352 | * process anyways. |
353 | */ | 353 | */ |
354 | else if (kill_proc_ao(tk->tsk, tk->addr, trapno, | 354 | else if (kill_proc_ao(tk->tsk, tk->addr, trapno, |
355 | pfn) < 0) | 355 | pfn, page) < 0) |
356 | printk(KERN_ERR | 356 | printk(KERN_ERR |
357 | "MCE %#lx: Cannot send advisory machine check signal to %s:%d\n", | 357 | "MCE %#lx: Cannot send advisory machine check signal to %s:%d\n", |
358 | pfn, tk->tsk->comm, tk->tsk->pid); | 358 | pfn, tk->tsk->comm, tk->tsk->pid); |
@@ -928,7 +928,7 @@ static int hwpoison_user_mappings(struct page *p, unsigned long pfn, | |||
928 | * any accesses to the poisoned memory. | 928 | * any accesses to the poisoned memory. |
929 | */ | 929 | */ |
930 | kill_procs_ao(&tokill, !!PageDirty(hpage), trapno, | 930 | kill_procs_ao(&tokill, !!PageDirty(hpage), trapno, |
931 | ret != SWAP_SUCCESS, pfn); | 931 | ret != SWAP_SUCCESS, p, pfn); |
932 | 932 | ||
933 | return ret; | 933 | return ret; |
934 | } | 934 | } |
diff --git a/mm/page_alloc.c b/mm/page_alloc.c index a8cfa9cc6e86..f12ad1836abe 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c | |||
@@ -5182,9 +5182,9 @@ void *__init alloc_large_system_hash(const char *tablename, | |||
5182 | if (!table) | 5182 | if (!table) |
5183 | panic("Failed to allocate %s hash table\n", tablename); | 5183 | panic("Failed to allocate %s hash table\n", tablename); |
5184 | 5184 | ||
5185 | printk(KERN_INFO "%s hash table entries: %d (order: %d, %lu bytes)\n", | 5185 | printk(KERN_INFO "%s hash table entries: %ld (order: %d, %lu bytes)\n", |
5186 | tablename, | 5186 | tablename, |
5187 | (1U << log2qty), | 5187 | (1UL << log2qty), |
5188 | ilog2(size) - PAGE_SHIFT, | 5188 | ilog2(size) - PAGE_SHIFT, |
5189 | size); | 5189 | size); |
5190 | 5190 | ||
diff --git a/net/atm/mpc.c b/net/atm/mpc.c index 622b471e14e0..74bcc662c3dd 100644 --- a/net/atm/mpc.c +++ b/net/atm/mpc.c | |||
@@ -778,7 +778,7 @@ static void mpc_push(struct atm_vcc *vcc, struct sk_buff *skb) | |||
778 | eg->packets_rcvd++; | 778 | eg->packets_rcvd++; |
779 | mpc->eg_ops->put(eg); | 779 | mpc->eg_ops->put(eg); |
780 | 780 | ||
781 | memset(ATM_SKB(skb), 0, sizeof(struct atm_skb_data)); | 781 | memset(ATM_SKB(new_skb), 0, sizeof(struct atm_skb_data)); |
782 | netif_rx(new_skb); | 782 | netif_rx(new_skb); |
783 | } | 783 | } |
784 | 784 | ||
diff --git a/net/bluetooth/l2cap.c b/net/bluetooth/l2cap.c index fadf26b4ed7c..0b54b7dd8401 100644 --- a/net/bluetooth/l2cap.c +++ b/net/bluetooth/l2cap.c | |||
@@ -1441,33 +1441,23 @@ static inline void l2cap_do_send(struct sock *sk, struct sk_buff *skb) | |||
1441 | 1441 | ||
1442 | static void l2cap_streaming_send(struct sock *sk) | 1442 | static void l2cap_streaming_send(struct sock *sk) |
1443 | { | 1443 | { |
1444 | struct sk_buff *skb, *tx_skb; | 1444 | struct sk_buff *skb; |
1445 | struct l2cap_pinfo *pi = l2cap_pi(sk); | 1445 | struct l2cap_pinfo *pi = l2cap_pi(sk); |
1446 | u16 control, fcs; | 1446 | u16 control, fcs; |
1447 | 1447 | ||
1448 | while ((skb = sk->sk_send_head)) { | 1448 | while ((skb = skb_dequeue(TX_QUEUE(sk)))) { |
1449 | tx_skb = skb_clone(skb, GFP_ATOMIC); | 1449 | control = get_unaligned_le16(skb->data + L2CAP_HDR_SIZE); |
1450 | |||
1451 | control = get_unaligned_le16(tx_skb->data + L2CAP_HDR_SIZE); | ||
1452 | control |= pi->next_tx_seq << L2CAP_CTRL_TXSEQ_SHIFT; | 1450 | control |= pi->next_tx_seq << L2CAP_CTRL_TXSEQ_SHIFT; |
1453 | put_unaligned_le16(control, tx_skb->data + L2CAP_HDR_SIZE); | 1451 | put_unaligned_le16(control, skb->data + L2CAP_HDR_SIZE); |
1454 | 1452 | ||
1455 | if (pi->fcs == L2CAP_FCS_CRC16) { | 1453 | if (pi->fcs == L2CAP_FCS_CRC16) { |
1456 | fcs = crc16(0, (u8 *)tx_skb->data, tx_skb->len - 2); | 1454 | fcs = crc16(0, (u8 *)skb->data, skb->len - 2); |
1457 | put_unaligned_le16(fcs, tx_skb->data + tx_skb->len - 2); | 1455 | put_unaligned_le16(fcs, skb->data + skb->len - 2); |
1458 | } | 1456 | } |
1459 | 1457 | ||
1460 | l2cap_do_send(sk, tx_skb); | 1458 | l2cap_do_send(sk, skb); |
1461 | 1459 | ||
1462 | pi->next_tx_seq = (pi->next_tx_seq + 1) % 64; | 1460 | pi->next_tx_seq = (pi->next_tx_seq + 1) % 64; |
1463 | |||
1464 | if (skb_queue_is_last(TX_QUEUE(sk), skb)) | ||
1465 | sk->sk_send_head = NULL; | ||
1466 | else | ||
1467 | sk->sk_send_head = skb_queue_next(TX_QUEUE(sk), skb); | ||
1468 | |||
1469 | skb = skb_dequeue(TX_QUEUE(sk)); | ||
1470 | kfree_skb(skb); | ||
1471 | } | 1461 | } |
1472 | } | 1462 | } |
1473 | 1463 | ||
@@ -1960,6 +1950,11 @@ static int l2cap_sock_setsockopt_old(struct socket *sock, int optname, char __us | |||
1960 | 1950 | ||
1961 | switch (optname) { | 1951 | switch (optname) { |
1962 | case L2CAP_OPTIONS: | 1952 | case L2CAP_OPTIONS: |
1953 | if (sk->sk_state == BT_CONNECTED) { | ||
1954 | err = -EINVAL; | ||
1955 | break; | ||
1956 | } | ||
1957 | |||
1963 | opts.imtu = l2cap_pi(sk)->imtu; | 1958 | opts.imtu = l2cap_pi(sk)->imtu; |
1964 | opts.omtu = l2cap_pi(sk)->omtu; | 1959 | opts.omtu = l2cap_pi(sk)->omtu; |
1965 | opts.flush_to = l2cap_pi(sk)->flush_to; | 1960 | opts.flush_to = l2cap_pi(sk)->flush_to; |
@@ -2771,10 +2766,10 @@ static int l2cap_parse_conf_rsp(struct sock *sk, void *rsp, int len, void *data, | |||
2771 | case L2CAP_CONF_MTU: | 2766 | case L2CAP_CONF_MTU: |
2772 | if (val < L2CAP_DEFAULT_MIN_MTU) { | 2767 | if (val < L2CAP_DEFAULT_MIN_MTU) { |
2773 | *result = L2CAP_CONF_UNACCEPT; | 2768 | *result = L2CAP_CONF_UNACCEPT; |
2774 | pi->omtu = L2CAP_DEFAULT_MIN_MTU; | 2769 | pi->imtu = L2CAP_DEFAULT_MIN_MTU; |
2775 | } else | 2770 | } else |
2776 | pi->omtu = val; | 2771 | pi->imtu = val; |
2777 | l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, pi->omtu); | 2772 | l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, pi->imtu); |
2778 | break; | 2773 | break; |
2779 | 2774 | ||
2780 | case L2CAP_CONF_FLUSH_TO: | 2775 | case L2CAP_CONF_FLUSH_TO: |
@@ -3071,6 +3066,17 @@ static inline int l2cap_connect_rsp(struct l2cap_conn *conn, struct l2cap_cmd_hd | |||
3071 | return 0; | 3066 | return 0; |
3072 | } | 3067 | } |
3073 | 3068 | ||
3069 | static inline void set_default_fcs(struct l2cap_pinfo *pi) | ||
3070 | { | ||
3071 | /* FCS is enabled only in ERTM or streaming mode, if one or both | ||
3072 | * sides request it. | ||
3073 | */ | ||
3074 | if (pi->mode != L2CAP_MODE_ERTM && pi->mode != L2CAP_MODE_STREAMING) | ||
3075 | pi->fcs = L2CAP_FCS_NONE; | ||
3076 | else if (!(pi->conf_state & L2CAP_CONF_NO_FCS_RECV)) | ||
3077 | pi->fcs = L2CAP_FCS_CRC16; | ||
3078 | } | ||
3079 | |||
3074 | static inline int l2cap_config_req(struct l2cap_conn *conn, struct l2cap_cmd_hdr *cmd, u16 cmd_len, u8 *data) | 3080 | static inline int l2cap_config_req(struct l2cap_conn *conn, struct l2cap_cmd_hdr *cmd, u16 cmd_len, u8 *data) |
3075 | { | 3081 | { |
3076 | struct l2cap_conf_req *req = (struct l2cap_conf_req *) data; | 3082 | struct l2cap_conf_req *req = (struct l2cap_conf_req *) data; |
@@ -3088,14 +3094,8 @@ static inline int l2cap_config_req(struct l2cap_conn *conn, struct l2cap_cmd_hdr | |||
3088 | if (!sk) | 3094 | if (!sk) |
3089 | return -ENOENT; | 3095 | return -ENOENT; |
3090 | 3096 | ||
3091 | if (sk->sk_state != BT_CONFIG) { | 3097 | if (sk->sk_state == BT_DISCONN) |
3092 | struct l2cap_cmd_rej rej; | ||
3093 | |||
3094 | rej.reason = cpu_to_le16(0x0002); | ||
3095 | l2cap_send_cmd(conn, cmd->ident, L2CAP_COMMAND_REJ, | ||
3096 | sizeof(rej), &rej); | ||
3097 | goto unlock; | 3098 | goto unlock; |
3098 | } | ||
3099 | 3099 | ||
3100 | /* Reject if config buffer is too small. */ | 3100 | /* Reject if config buffer is too small. */ |
3101 | len = cmd_len - sizeof(*req); | 3101 | len = cmd_len - sizeof(*req); |
@@ -3135,9 +3135,7 @@ static inline int l2cap_config_req(struct l2cap_conn *conn, struct l2cap_cmd_hdr | |||
3135 | goto unlock; | 3135 | goto unlock; |
3136 | 3136 | ||
3137 | if (l2cap_pi(sk)->conf_state & L2CAP_CONF_INPUT_DONE) { | 3137 | if (l2cap_pi(sk)->conf_state & L2CAP_CONF_INPUT_DONE) { |
3138 | if (!(l2cap_pi(sk)->conf_state & L2CAP_CONF_NO_FCS_RECV) || | 3138 | set_default_fcs(l2cap_pi(sk)); |
3139 | l2cap_pi(sk)->fcs != L2CAP_FCS_NONE) | ||
3140 | l2cap_pi(sk)->fcs = L2CAP_FCS_CRC16; | ||
3141 | 3139 | ||
3142 | sk->sk_state = BT_CONNECTED; | 3140 | sk->sk_state = BT_CONNECTED; |
3143 | 3141 | ||
@@ -3225,9 +3223,7 @@ static inline int l2cap_config_rsp(struct l2cap_conn *conn, struct l2cap_cmd_hdr | |||
3225 | l2cap_pi(sk)->conf_state |= L2CAP_CONF_INPUT_DONE; | 3223 | l2cap_pi(sk)->conf_state |= L2CAP_CONF_INPUT_DONE; |
3226 | 3224 | ||
3227 | if (l2cap_pi(sk)->conf_state & L2CAP_CONF_OUTPUT_DONE) { | 3225 | if (l2cap_pi(sk)->conf_state & L2CAP_CONF_OUTPUT_DONE) { |
3228 | if (!(l2cap_pi(sk)->conf_state & L2CAP_CONF_NO_FCS_RECV) || | 3226 | set_default_fcs(l2cap_pi(sk)); |
3229 | l2cap_pi(sk)->fcs != L2CAP_FCS_NONE) | ||
3230 | l2cap_pi(sk)->fcs = L2CAP_FCS_CRC16; | ||
3231 | 3227 | ||
3232 | sk->sk_state = BT_CONNECTED; | 3228 | sk->sk_state = BT_CONNECTED; |
3233 | l2cap_pi(sk)->next_tx_seq = 0; | 3229 | l2cap_pi(sk)->next_tx_seq = 0; |
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c index 44a623275951..194b3a04cfd3 100644 --- a/net/bluetooth/rfcomm/sock.c +++ b/net/bluetooth/rfcomm/sock.c | |||
@@ -82,11 +82,14 @@ static void rfcomm_sk_data_ready(struct rfcomm_dlc *d, struct sk_buff *skb) | |||
82 | static void rfcomm_sk_state_change(struct rfcomm_dlc *d, int err) | 82 | static void rfcomm_sk_state_change(struct rfcomm_dlc *d, int err) |
83 | { | 83 | { |
84 | struct sock *sk = d->owner, *parent; | 84 | struct sock *sk = d->owner, *parent; |
85 | unsigned long flags; | ||
86 | |||
85 | if (!sk) | 87 | if (!sk) |
86 | return; | 88 | return; |
87 | 89 | ||
88 | BT_DBG("dlc %p state %ld err %d", d, d->state, err); | 90 | BT_DBG("dlc %p state %ld err %d", d, d->state, err); |
89 | 91 | ||
92 | local_irq_save(flags); | ||
90 | bh_lock_sock(sk); | 93 | bh_lock_sock(sk); |
91 | 94 | ||
92 | if (err) | 95 | if (err) |
@@ -108,6 +111,7 @@ static void rfcomm_sk_state_change(struct rfcomm_dlc *d, int err) | |||
108 | } | 111 | } |
109 | 112 | ||
110 | bh_unlock_sock(sk); | 113 | bh_unlock_sock(sk); |
114 | local_irq_restore(flags); | ||
111 | 115 | ||
112 | if (parent && sock_flag(sk, SOCK_ZAPPED)) { | 116 | if (parent && sock_flag(sk, SOCK_ZAPPED)) { |
113 | /* We have to drop DLC lock here, otherwise | 117 | /* We have to drop DLC lock here, otherwise |
diff --git a/net/caif/caif_socket.c b/net/caif/caif_socket.c index 8ce904786116..4bf28f25f368 100644 --- a/net/caif/caif_socket.c +++ b/net/caif/caif_socket.c | |||
@@ -827,6 +827,7 @@ static int caif_connect(struct socket *sock, struct sockaddr *uaddr, | |||
827 | long timeo; | 827 | long timeo; |
828 | int err; | 828 | int err; |
829 | int ifindex, headroom, tailroom; | 829 | int ifindex, headroom, tailroom; |
830 | unsigned int mtu; | ||
830 | struct net_device *dev; | 831 | struct net_device *dev; |
831 | 832 | ||
832 | lock_sock(sk); | 833 | lock_sock(sk); |
@@ -896,15 +897,23 @@ static int caif_connect(struct socket *sock, struct sockaddr *uaddr, | |||
896 | cf_sk->sk.sk_state = CAIF_DISCONNECTED; | 897 | cf_sk->sk.sk_state = CAIF_DISCONNECTED; |
897 | goto out; | 898 | goto out; |
898 | } | 899 | } |
899 | dev = dev_get_by_index(sock_net(sk), ifindex); | 900 | |
901 | err = -ENODEV; | ||
902 | rcu_read_lock(); | ||
903 | dev = dev_get_by_index_rcu(sock_net(sk), ifindex); | ||
904 | if (!dev) { | ||
905 | rcu_read_unlock(); | ||
906 | goto out; | ||
907 | } | ||
900 | cf_sk->headroom = LL_RESERVED_SPACE_EXTRA(dev, headroom); | 908 | cf_sk->headroom = LL_RESERVED_SPACE_EXTRA(dev, headroom); |
909 | mtu = dev->mtu; | ||
910 | rcu_read_unlock(); | ||
911 | |||
901 | cf_sk->tailroom = tailroom; | 912 | cf_sk->tailroom = tailroom; |
902 | cf_sk->maxframe = dev->mtu - (headroom + tailroom); | 913 | cf_sk->maxframe = mtu - (headroom + tailroom); |
903 | dev_put(dev); | ||
904 | if (cf_sk->maxframe < 1) { | 914 | if (cf_sk->maxframe < 1) { |
905 | pr_warning("CAIF: %s(): CAIF Interface MTU too small (%d)\n", | 915 | pr_warning("CAIF: %s(): CAIF Interface MTU too small (%u)\n", |
906 | __func__, dev->mtu); | 916 | __func__, mtu); |
907 | err = -ENODEV; | ||
908 | goto out; | 917 | goto out; |
909 | } | 918 | } |
910 | 919 | ||
diff --git a/net/core/ethtool.c b/net/core/ethtool.c index 7a85367b3c2f..8451ab481095 100644 --- a/net/core/ethtool.c +++ b/net/core/ethtool.c | |||
@@ -348,7 +348,7 @@ static noinline_for_stack int ethtool_get_rxnfc(struct net_device *dev, | |||
348 | if (info.cmd == ETHTOOL_GRXCLSRLALL) { | 348 | if (info.cmd == ETHTOOL_GRXCLSRLALL) { |
349 | if (info.rule_cnt > 0) { | 349 | if (info.rule_cnt > 0) { |
350 | if (info.rule_cnt <= KMALLOC_MAX_SIZE / sizeof(u32)) | 350 | if (info.rule_cnt <= KMALLOC_MAX_SIZE / sizeof(u32)) |
351 | rule_buf = kmalloc(info.rule_cnt * sizeof(u32), | 351 | rule_buf = kzalloc(info.rule_cnt * sizeof(u32), |
352 | GFP_USER); | 352 | GFP_USER); |
353 | if (!rule_buf) | 353 | if (!rule_buf) |
354 | return -ENOMEM; | 354 | return -ENOMEM; |
@@ -397,7 +397,7 @@ static noinline_for_stack int ethtool_get_rxfh_indir(struct net_device *dev, | |||
397 | (KMALLOC_MAX_SIZE - sizeof(*indir)) / sizeof(*indir->ring_index)) | 397 | (KMALLOC_MAX_SIZE - sizeof(*indir)) / sizeof(*indir->ring_index)) |
398 | return -ENOMEM; | 398 | return -ENOMEM; |
399 | full_size = sizeof(*indir) + sizeof(*indir->ring_index) * table_size; | 399 | full_size = sizeof(*indir) + sizeof(*indir->ring_index) * table_size; |
400 | indir = kmalloc(full_size, GFP_USER); | 400 | indir = kzalloc(full_size, GFP_USER); |
401 | if (!indir) | 401 | if (!indir) |
402 | return -ENOMEM; | 402 | return -ENOMEM; |
403 | 403 | ||
@@ -538,7 +538,7 @@ static int ethtool_get_rx_ntuple(struct net_device *dev, void __user *useraddr) | |||
538 | 538 | ||
539 | gstrings.len = ret; | 539 | gstrings.len = ret; |
540 | 540 | ||
541 | data = kmalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER); | 541 | data = kzalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER); |
542 | if (!data) | 542 | if (!data) |
543 | return -ENOMEM; | 543 | return -ENOMEM; |
544 | 544 | ||
@@ -775,7 +775,7 @@ static int ethtool_get_regs(struct net_device *dev, char __user *useraddr) | |||
775 | if (regs.len > reglen) | 775 | if (regs.len > reglen) |
776 | regs.len = reglen; | 776 | regs.len = reglen; |
777 | 777 | ||
778 | regbuf = kmalloc(reglen, GFP_USER); | 778 | regbuf = kzalloc(reglen, GFP_USER); |
779 | if (!regbuf) | 779 | if (!regbuf) |
780 | return -ENOMEM; | 780 | return -ENOMEM; |
781 | 781 | ||
diff --git a/net/core/stream.c b/net/core/stream.c index d959e0f41528..f5df85dcd20b 100644 --- a/net/core/stream.c +++ b/net/core/stream.c | |||
@@ -141,10 +141,10 @@ int sk_stream_wait_memory(struct sock *sk, long *timeo_p) | |||
141 | 141 | ||
142 | set_bit(SOCK_NOSPACE, &sk->sk_socket->flags); | 142 | set_bit(SOCK_NOSPACE, &sk->sk_socket->flags); |
143 | sk->sk_write_pending++; | 143 | sk->sk_write_pending++; |
144 | sk_wait_event(sk, ¤t_timeo, !sk->sk_err && | 144 | sk_wait_event(sk, ¤t_timeo, sk->sk_err || |
145 | !(sk->sk_shutdown & SEND_SHUTDOWN) && | 145 | (sk->sk_shutdown & SEND_SHUTDOWN) || |
146 | sk_stream_memory_free(sk) && | 146 | (sk_stream_memory_free(sk) && |
147 | vm_wait); | 147 | !vm_wait)); |
148 | sk->sk_write_pending--; | 148 | sk->sk_write_pending--; |
149 | 149 | ||
150 | if (vm_wait) { | 150 | if (vm_wait) { |
diff --git a/net/ipv4/Kconfig b/net/ipv4/Kconfig index 72380a30d1c8..7cd7760144f7 100644 --- a/net/ipv4/Kconfig +++ b/net/ipv4/Kconfig | |||
@@ -413,7 +413,7 @@ config INET_XFRM_MODE_BEET | |||
413 | If unsure, say Y. | 413 | If unsure, say Y. |
414 | 414 | ||
415 | config INET_LRO | 415 | config INET_LRO |
416 | bool "Large Receive Offload (ipv4/tcp)" | 416 | tristate "Large Receive Offload (ipv4/tcp)" |
417 | default y | 417 | default y |
418 | ---help--- | 418 | ---help--- |
419 | Support for Large Receive Offload (ipv4/tcp). | 419 | Support for Large Receive Offload (ipv4/tcp). |
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c index 1fdcacd36ce7..2a4bb76f2132 100644 --- a/net/ipv4/igmp.c +++ b/net/ipv4/igmp.c | |||
@@ -834,7 +834,7 @@ static void igmp_heard_query(struct in_device *in_dev, struct sk_buff *skb, | |||
834 | int mark = 0; | 834 | int mark = 0; |
835 | 835 | ||
836 | 836 | ||
837 | if (len == 8 || IGMP_V2_SEEN(in_dev)) { | 837 | if (len == 8) { |
838 | if (ih->code == 0) { | 838 | if (ih->code == 0) { |
839 | /* Alas, old v1 router presents here. */ | 839 | /* Alas, old v1 router presents here. */ |
840 | 840 | ||
@@ -856,6 +856,18 @@ static void igmp_heard_query(struct in_device *in_dev, struct sk_buff *skb, | |||
856 | igmpv3_clear_delrec(in_dev); | 856 | igmpv3_clear_delrec(in_dev); |
857 | } else if (len < 12) { | 857 | } else if (len < 12) { |
858 | return; /* ignore bogus packet; freed by caller */ | 858 | return; /* ignore bogus packet; freed by caller */ |
859 | } else if (IGMP_V1_SEEN(in_dev)) { | ||
860 | /* This is a v3 query with v1 queriers present */ | ||
861 | max_delay = IGMP_Query_Response_Interval; | ||
862 | group = 0; | ||
863 | } else if (IGMP_V2_SEEN(in_dev)) { | ||
864 | /* this is a v3 query with v2 queriers present; | ||
865 | * Interpretation of the max_delay code is problematic here. | ||
866 | * A real v2 host would use ih_code directly, while v3 has a | ||
867 | * different encoding. We use the v3 encoding as more likely | ||
868 | * to be intended in a v3 query. | ||
869 | */ | ||
870 | max_delay = IGMPV3_MRC(ih3->code)*(HZ/IGMP_TIMER_SCALE); | ||
859 | } else { /* v3 */ | 871 | } else { /* v3 */ |
860 | if (!pskb_may_pull(skb, sizeof(struct igmpv3_query))) | 872 | if (!pskb_may_pull(skb, sizeof(struct igmpv3_query))) |
861 | return; | 873 | return; |
diff --git a/net/ipv6/route.c b/net/ipv6/route.c index 8323136bdc54..a275c6e1e25c 100644 --- a/net/ipv6/route.c +++ b/net/ipv6/route.c | |||
@@ -1556,14 +1556,13 @@ out: | |||
1556 | * i.e. Path MTU discovery | 1556 | * i.e. Path MTU discovery |
1557 | */ | 1557 | */ |
1558 | 1558 | ||
1559 | void rt6_pmtu_discovery(struct in6_addr *daddr, struct in6_addr *saddr, | 1559 | static void rt6_do_pmtu_disc(struct in6_addr *daddr, struct in6_addr *saddr, |
1560 | struct net_device *dev, u32 pmtu) | 1560 | struct net *net, u32 pmtu, int ifindex) |
1561 | { | 1561 | { |
1562 | struct rt6_info *rt, *nrt; | 1562 | struct rt6_info *rt, *nrt; |
1563 | struct net *net = dev_net(dev); | ||
1564 | int allfrag = 0; | 1563 | int allfrag = 0; |
1565 | 1564 | ||
1566 | rt = rt6_lookup(net, daddr, saddr, dev->ifindex, 0); | 1565 | rt = rt6_lookup(net, daddr, saddr, ifindex, 0); |
1567 | if (rt == NULL) | 1566 | if (rt == NULL) |
1568 | return; | 1567 | return; |
1569 | 1568 | ||
@@ -1631,6 +1630,27 @@ out: | |||
1631 | dst_release(&rt->dst); | 1630 | dst_release(&rt->dst); |
1632 | } | 1631 | } |
1633 | 1632 | ||
1633 | void rt6_pmtu_discovery(struct in6_addr *daddr, struct in6_addr *saddr, | ||
1634 | struct net_device *dev, u32 pmtu) | ||
1635 | { | ||
1636 | struct net *net = dev_net(dev); | ||
1637 | |||
1638 | /* | ||
1639 | * RFC 1981 states that a node "MUST reduce the size of the packets it | ||
1640 | * is sending along the path" that caused the Packet Too Big message. | ||
1641 | * Since it's not possible in the general case to determine which | ||
1642 | * interface was used to send the original packet, we update the MTU | ||
1643 | * on the interface that will be used to send future packets. We also | ||
1644 | * update the MTU on the interface that received the Packet Too Big in | ||
1645 | * case the original packet was forced out that interface with | ||
1646 | * SO_BINDTODEVICE or similar. This is the next best thing to the | ||
1647 | * correct behaviour, which would be to update the MTU on all | ||
1648 | * interfaces. | ||
1649 | */ | ||
1650 | rt6_do_pmtu_disc(daddr, saddr, net, pmtu, 0); | ||
1651 | rt6_do_pmtu_disc(daddr, saddr, net, pmtu, dev->ifindex); | ||
1652 | } | ||
1653 | |||
1634 | /* | 1654 | /* |
1635 | * Misc support functions | 1655 | * Misc support functions |
1636 | */ | 1656 | */ |
diff --git a/net/mac80211/agg-tx.c b/net/mac80211/agg-tx.c index c893f236acea..8f23401832b7 100644 --- a/net/mac80211/agg-tx.c +++ b/net/mac80211/agg-tx.c | |||
@@ -175,6 +175,8 @@ int ___ieee80211_stop_tx_ba_session(struct sta_info *sta, u16 tid, | |||
175 | 175 | ||
176 | set_bit(HT_AGG_STATE_STOPPING, &tid_tx->state); | 176 | set_bit(HT_AGG_STATE_STOPPING, &tid_tx->state); |
177 | 177 | ||
178 | del_timer_sync(&tid_tx->addba_resp_timer); | ||
179 | |||
178 | /* | 180 | /* |
179 | * After this packets are no longer handed right through | 181 | * After this packets are no longer handed right through |
180 | * to the driver but are put onto tid_tx->pending instead, | 182 | * to the driver but are put onto tid_tx->pending instead, |
diff --git a/net/mac80211/status.c b/net/mac80211/status.c index 10caec5ea8fa..34da67995d94 100644 --- a/net/mac80211/status.c +++ b/net/mac80211/status.c | |||
@@ -377,7 +377,7 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
377 | skb2 = skb_clone(skb, GFP_ATOMIC); | 377 | skb2 = skb_clone(skb, GFP_ATOMIC); |
378 | if (skb2) { | 378 | if (skb2) { |
379 | skb2->dev = prev_dev; | 379 | skb2->dev = prev_dev; |
380 | netif_receive_skb(skb2); | 380 | netif_rx(skb2); |
381 | } | 381 | } |
382 | } | 382 | } |
383 | 383 | ||
@@ -386,7 +386,7 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
386 | } | 386 | } |
387 | if (prev_dev) { | 387 | if (prev_dev) { |
388 | skb->dev = prev_dev; | 388 | skb->dev = prev_dev; |
389 | netif_receive_skb(skb); | 389 | netif_rx(skb); |
390 | skb = NULL; | 390 | skb = NULL; |
391 | } | 391 | } |
392 | rcu_read_unlock(); | 392 | rcu_read_unlock(); |
diff --git a/net/sched/cls_u32.c b/net/sched/cls_u32.c index 7416a5c73b2a..b0c2a82178af 100644 --- a/net/sched/cls_u32.c +++ b/net/sched/cls_u32.c | |||
@@ -137,7 +137,7 @@ next_knode: | |||
137 | int toff = off + key->off + (off2 & key->offmask); | 137 | int toff = off + key->off + (off2 & key->offmask); |
138 | __be32 *data, _data; | 138 | __be32 *data, _data; |
139 | 139 | ||
140 | if (skb_headroom(skb) + toff < 0) | 140 | if (skb_headroom(skb) + toff > INT_MAX) |
141 | goto out; | 141 | goto out; |
142 | 142 | ||
143 | data = skb_header_pointer(skb, toff, 4, &_data); | 143 | data = skb_header_pointer(skb, toff, 4, &_data); |
diff --git a/net/sctp/auth.c b/net/sctp/auth.c index 86366390038a..ddbbf7c81fa1 100644 --- a/net/sctp/auth.c +++ b/net/sctp/auth.c | |||
@@ -543,16 +543,20 @@ struct sctp_hmac *sctp_auth_asoc_get_hmac(const struct sctp_association *asoc) | |||
543 | id = ntohs(hmacs->hmac_ids[i]); | 543 | id = ntohs(hmacs->hmac_ids[i]); |
544 | 544 | ||
545 | /* Check the id is in the supported range */ | 545 | /* Check the id is in the supported range */ |
546 | if (id > SCTP_AUTH_HMAC_ID_MAX) | 546 | if (id > SCTP_AUTH_HMAC_ID_MAX) { |
547 | id = 0; | ||
547 | continue; | 548 | continue; |
549 | } | ||
548 | 550 | ||
549 | /* See is we support the id. Supported IDs have name and | 551 | /* See is we support the id. Supported IDs have name and |
550 | * length fields set, so that we can allocated and use | 552 | * length fields set, so that we can allocated and use |
551 | * them. We can safely just check for name, for without the | 553 | * them. We can safely just check for name, for without the |
552 | * name, we can't allocate the TFM. | 554 | * name, we can't allocate the TFM. |
553 | */ | 555 | */ |
554 | if (!sctp_hmac_list[id].hmac_name) | 556 | if (!sctp_hmac_list[id].hmac_name) { |
557 | id = 0; | ||
555 | continue; | 558 | continue; |
559 | } | ||
556 | 560 | ||
557 | break; | 561 | break; |
558 | } | 562 | } |
diff --git a/net/sctp/socket.c b/net/sctp/socket.c index ca44917872d2..fbb70770ad05 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c | |||
@@ -916,6 +916,11 @@ SCTP_STATIC int sctp_setsockopt_bindx(struct sock* sk, | |||
916 | /* Walk through the addrs buffer and count the number of addresses. */ | 916 | /* Walk through the addrs buffer and count the number of addresses. */ |
917 | addr_buf = kaddrs; | 917 | addr_buf = kaddrs; |
918 | while (walk_size < addrs_size) { | 918 | while (walk_size < addrs_size) { |
919 | if (walk_size + sizeof(sa_family_t) > addrs_size) { | ||
920 | kfree(kaddrs); | ||
921 | return -EINVAL; | ||
922 | } | ||
923 | |||
919 | sa_addr = (struct sockaddr *)addr_buf; | 924 | sa_addr = (struct sockaddr *)addr_buf; |
920 | af = sctp_get_af_specific(sa_addr->sa_family); | 925 | af = sctp_get_af_specific(sa_addr->sa_family); |
921 | 926 | ||
@@ -1002,9 +1007,13 @@ static int __sctp_connect(struct sock* sk, | |||
1002 | /* Walk through the addrs buffer and count the number of addresses. */ | 1007 | /* Walk through the addrs buffer and count the number of addresses. */ |
1003 | addr_buf = kaddrs; | 1008 | addr_buf = kaddrs; |
1004 | while (walk_size < addrs_size) { | 1009 | while (walk_size < addrs_size) { |
1010 | if (walk_size + sizeof(sa_family_t) > addrs_size) { | ||
1011 | err = -EINVAL; | ||
1012 | goto out_free; | ||
1013 | } | ||
1014 | |||
1005 | sa_addr = (union sctp_addr *)addr_buf; | 1015 | sa_addr = (union sctp_addr *)addr_buf; |
1006 | af = sctp_get_af_specific(sa_addr->sa.sa_family); | 1016 | af = sctp_get_af_specific(sa_addr->sa.sa_family); |
1007 | port = ntohs(sa_addr->v4.sin_port); | ||
1008 | 1017 | ||
1009 | /* If the address family is not supported or if this address | 1018 | /* If the address family is not supported or if this address |
1010 | * causes the address buffer to overflow return EINVAL. | 1019 | * causes the address buffer to overflow return EINVAL. |
@@ -1014,6 +1023,8 @@ static int __sctp_connect(struct sock* sk, | |||
1014 | goto out_free; | 1023 | goto out_free; |
1015 | } | 1024 | } |
1016 | 1025 | ||
1026 | port = ntohs(sa_addr->v4.sin_port); | ||
1027 | |||
1017 | /* Save current address so we can work with it */ | 1028 | /* Save current address so we can work with it */ |
1018 | memcpy(&to, sa_addr, af->sockaddr_len); | 1029 | memcpy(&to, sa_addr, af->sockaddr_len); |
1019 | 1030 | ||
diff --git a/scripts/kconfig/conf.c b/scripts/kconfig/conf.c index 5b7c86ea43a1..7ef429cd5cb3 100644 --- a/scripts/kconfig/conf.c +++ b/scripts/kconfig/conf.c | |||
@@ -427,7 +427,7 @@ static void check_conf(struct menu *menu) | |||
427 | if (sym->name && !sym_is_choice_value(sym)) { | 427 | if (sym->name && !sym_is_choice_value(sym)) { |
428 | printf("CONFIG_%s\n", sym->name); | 428 | printf("CONFIG_%s\n", sym->name); |
429 | } | 429 | } |
430 | } else { | 430 | } else if (input_mode != oldnoconfig) { |
431 | if (!conf_cnt++) | 431 | if (!conf_cnt++) |
432 | printf(_("*\n* Restart config...\n*\n")); | 432 | printf(_("*\n* Restart config...\n*\n")); |
433 | rootEntry = menu_get_parent_menu(menu); | 433 | rootEntry = menu_get_parent_menu(menu); |
diff --git a/scripts/kconfig/expr.h b/scripts/kconfig/expr.h index 6ee2e4fb1481..170459c224a1 100644 --- a/scripts/kconfig/expr.h +++ b/scripts/kconfig/expr.h | |||
@@ -165,7 +165,6 @@ struct menu { | |||
165 | struct symbol *sym; | 165 | struct symbol *sym; |
166 | struct property *prompt; | 166 | struct property *prompt; |
167 | struct expr *dep; | 167 | struct expr *dep; |
168 | struct expr *dir_dep; | ||
169 | unsigned int flags; | 168 | unsigned int flags; |
170 | char *help; | 169 | char *help; |
171 | struct file *file; | 170 | struct file *file; |
diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c index 4fb590247f33..edda8b49619d 100644 --- a/scripts/kconfig/menu.c +++ b/scripts/kconfig/menu.c | |||
@@ -107,7 +107,6 @@ static struct expr *menu_check_dep(struct expr *e) | |||
107 | void menu_add_dep(struct expr *dep) | 107 | void menu_add_dep(struct expr *dep) |
108 | { | 108 | { |
109 | current_entry->dep = expr_alloc_and(current_entry->dep, menu_check_dep(dep)); | 109 | current_entry->dep = expr_alloc_and(current_entry->dep, menu_check_dep(dep)); |
110 | current_entry->dir_dep = current_entry->dep; | ||
111 | } | 110 | } |
112 | 111 | ||
113 | void menu_set_type(int type) | 112 | void menu_set_type(int type) |
@@ -291,10 +290,6 @@ void menu_finalize(struct menu *parent) | |||
291 | for (menu = parent->list; menu; menu = menu->next) | 290 | for (menu = parent->list; menu; menu = menu->next) |
292 | menu_finalize(menu); | 291 | menu_finalize(menu); |
293 | } else if (sym) { | 292 | } else if (sym) { |
294 | /* ignore inherited dependencies for dir_dep */ | ||
295 | sym->dir_dep.expr = expr_transform(expr_copy(parent->dir_dep)); | ||
296 | sym->dir_dep.expr = expr_eliminate_dups(sym->dir_dep.expr); | ||
297 | |||
298 | basedep = parent->prompt ? parent->prompt->visible.expr : NULL; | 293 | basedep = parent->prompt ? parent->prompt->visible.expr : NULL; |
299 | basedep = expr_trans_compare(basedep, E_UNEQUAL, &symbol_no); | 294 | basedep = expr_trans_compare(basedep, E_UNEQUAL, &symbol_no); |
300 | basedep = expr_eliminate_dups(expr_transform(basedep)); | 295 | basedep = expr_eliminate_dups(expr_transform(basedep)); |
@@ -325,6 +320,8 @@ void menu_finalize(struct menu *parent) | |||
325 | parent->next = last_menu->next; | 320 | parent->next = last_menu->next; |
326 | last_menu->next = NULL; | 321 | last_menu->next = NULL; |
327 | } | 322 | } |
323 | |||
324 | sym->dir_dep.expr = parent->dep; | ||
328 | } | 325 | } |
329 | for (menu = parent->list; menu; menu = menu->next) { | 326 | for (menu = parent->list; menu; menu = menu->next) { |
330 | if (sym && sym_is_choice(sym) && | 327 | if (sym && sym_is_choice(sym) && |
diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c index 943712ca6c0a..1f8b305449db 100644 --- a/scripts/kconfig/symbol.c +++ b/scripts/kconfig/symbol.c | |||
@@ -350,6 +350,7 @@ void sym_calc_value(struct symbol *sym) | |||
350 | } | 350 | } |
351 | } | 351 | } |
352 | calc_newval: | 352 | calc_newval: |
353 | #if 0 | ||
353 | if (sym->dir_dep.tri == no && sym->rev_dep.tri != no) { | 354 | if (sym->dir_dep.tri == no && sym->rev_dep.tri != no) { |
354 | fprintf(stderr, "warning: ("); | 355 | fprintf(stderr, "warning: ("); |
355 | expr_fprint(sym->rev_dep.expr, stderr); | 356 | expr_fprint(sym->rev_dep.expr, stderr); |
@@ -358,6 +359,7 @@ void sym_calc_value(struct symbol *sym) | |||
358 | expr_fprint(sym->dir_dep.expr, stderr); | 359 | expr_fprint(sym->dir_dep.expr, stderr); |
359 | fprintf(stderr, ")\n"); | 360 | fprintf(stderr, ")\n"); |
360 | } | 361 | } |
362 | #endif | ||
361 | newval.tri = EXPR_OR(newval.tri, sym->rev_dep.tri); | 363 | newval.tri = EXPR_OR(newval.tri, sym->rev_dep.tri); |
362 | } | 364 | } |
363 | if (newval.tri == mod && sym_get_type(sym) == S_BOOLEAN) | 365 | if (newval.tri == mod && sym_get_type(sym) == S_BOOLEAN) |
diff --git a/sound/oss/soundcard.c b/sound/oss/soundcard.c index 92aa762ffb7e..07f803e6d203 100644 --- a/sound/oss/soundcard.c +++ b/sound/oss/soundcard.c | |||
@@ -391,11 +391,11 @@ static long sound_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
391 | case SND_DEV_DSP: | 391 | case SND_DEV_DSP: |
392 | case SND_DEV_DSP16: | 392 | case SND_DEV_DSP16: |
393 | case SND_DEV_AUDIO: | 393 | case SND_DEV_AUDIO: |
394 | return audio_ioctl(dev, file, cmd, p); | 394 | ret = audio_ioctl(dev, file, cmd, p); |
395 | break; | 395 | break; |
396 | 396 | ||
397 | case SND_DEV_MIDIN: | 397 | case SND_DEV_MIDIN: |
398 | return MIDIbuf_ioctl(dev, file, cmd, p); | 398 | ret = MIDIbuf_ioctl(dev, file, cmd, p); |
399 | break; | 399 | break; |
400 | 400 | ||
401 | } | 401 | } |
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 95148e58026c..c16c5ba0fda0 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -1747,6 +1747,8 @@ static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | |||
1747 | "HP dv6", STAC_HP_DV5), | 1747 | "HP dv6", STAC_HP_DV5), |
1748 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, | 1748 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, |
1749 | "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ | 1749 | "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ |
1750 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, | ||
1751 | "HP DV6", STAC_HP_DV5), | ||
1750 | SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, | 1752 | SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, |
1751 | "HP", STAC_HP_DV5), | 1753 | "HP", STAC_HP_DV5), |
1752 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, | 1754 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, |
diff --git a/tools/perf/perf.h b/tools/perf/perf.h index ef7aa0a0c526..95aaf565c704 100644 --- a/tools/perf/perf.h +++ b/tools/perf/perf.h | |||
@@ -73,6 +73,18 @@ void get_term_dimensions(struct winsize *ws); | |||
73 | #define cpu_relax() asm volatile("":::"memory") | 73 | #define cpu_relax() asm volatile("":::"memory") |
74 | #endif | 74 | #endif |
75 | 75 | ||
76 | #ifdef __mips__ | ||
77 | #include "../../arch/mips/include/asm/unistd.h" | ||
78 | #define rmb() asm volatile( \ | ||
79 | ".set mips2\n\t" \ | ||
80 | "sync\n\t" \ | ||
81 | ".set mips0" \ | ||
82 | : /* no output */ \ | ||
83 | : /* no input */ \ | ||
84 | : "memory") | ||
85 | #define cpu_relax() asm volatile("" ::: "memory") | ||
86 | #endif | ||
87 | |||
76 | #include <time.h> | 88 | #include <time.h> |
77 | #include <unistd.h> | 89 | #include <unistd.h> |
78 | #include <sys/types.h> | 90 | #include <sys/types.h> |