diff options
-rw-r--r-- | arch/arm/mach-imx/mm-imx1.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx21.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx25.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx27.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx31.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx35.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mm-mx50.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mm.c | 24 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-gpio-mxc.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-mxc.c | 125 |
11 files changed, 163 insertions, 64 deletions
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index b486595701b7..2bded591d5c2 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c | |||
@@ -50,8 +50,12 @@ void __init mx1_init_irq(void) | |||
50 | 50 | ||
51 | void __init imx1_soc_init(void) | 51 | void __init imx1_soc_init(void) |
52 | { | 52 | { |
53 | mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTA, 0); | 53 | mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, |
54 | mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTB, 0); | 54 | MX1_GPIO_INT_PORTA, 0); |
55 | mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTC, 0); | 55 | mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256, |
56 | mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTD, 0); | 56 | MX1_GPIO_INT_PORTB, 0); |
57 | mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256, | ||
58 | MX1_GPIO_INT_PORTC, 0); | ||
59 | mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, | ||
60 | MX1_GPIO_INT_PORTD, 0); | ||
57 | } | 61 | } |
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f0fb8bcce6f9..6d7d518686a5 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -76,10 +76,10 @@ void __init mx21_init_irq(void) | |||
76 | 76 | ||
77 | void __init imx21_soc_init(void) | 77 | void __init imx21_soc_init(void) |
78 | { | 78 | { |
79 | mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 79 | mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
80 | mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 80 | mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
81 | mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 81 | mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
82 | mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 82 | mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
83 | mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 83 | mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
84 | mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); | 84 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
85 | } | 85 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 1b6d583f750a..9a1591c2508d 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -63,8 +63,9 @@ void __init mx25_init_irq(void) | |||
63 | 63 | ||
64 | void __init imx25_soc_init(void) | 64 | void __init imx25_soc_init(void) |
65 | { | 65 | { |
66 | mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | 66 | /* i.mx25 has the i.mx31 type gpio */ |
67 | mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | 67 | mxc_register_gpio("imx31-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); |
68 | mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); | 68 | mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); |
69 | mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | 69 | mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); |
70 | mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | ||
70 | } | 71 | } |
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index d3700cec8ec5..133b30003ddb 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -76,10 +76,11 @@ void __init mx27_init_irq(void) | |||
76 | 76 | ||
77 | void __init imx27_soc_init(void) | 77 | void __init imx27_soc_init(void) |
78 | { | 78 | { |
79 | mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 79 | /* i.mx27 has the i.mx21 type gpio */ |
80 | mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 80 | mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
81 | mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 81 | mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
82 | mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 82 | mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
83 | mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 83 | mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
84 | mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); | 84 | mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
85 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
85 | } | 86 | } |
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index cb16ac661776..6d103c01b8b9 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c | |||
@@ -59,7 +59,7 @@ void __init mx31_init_irq(void) | |||
59 | 59 | ||
60 | void __init imx31_soc_init(void) | 60 | void __init imx31_soc_init(void) |
61 | { | 61 | { |
62 | mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); | 62 | mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); |
63 | mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); | 63 | mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); |
64 | mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); | 64 | mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); |
65 | } | 65 | } |
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 648bfca0163e..bb068bc8dab7 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c | |||
@@ -56,7 +56,8 @@ void __init mx35_init_irq(void) | |||
56 | 56 | ||
57 | void __init imx35_soc_init(void) | 57 | void __init imx35_soc_init(void) |
58 | { | 58 | { |
59 | mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); | 59 | /* i.mx35 has the i.mx31 type gpio */ |
60 | mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); | 60 | mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); |
61 | mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | 61 | mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); |
62 | mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | ||
62 | } | 63 | } |
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c index 28c3f60f734f..77e374c726fa 100644 --- a/arch/arm/mach-mx5/mm-mx50.c +++ b/arch/arm/mach-mx5/mm-mx50.c | |||
@@ -62,10 +62,11 @@ void __init mx50_init_irq(void) | |||
62 | 62 | ||
63 | void __init imx50_soc_init(void) | 63 | void __init imx50_soc_init(void) |
64 | { | 64 | { |
65 | mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); | 65 | /* i.mx50 has the i.mx31 type gpio */ |
66 | mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); | 66 | mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); |
67 | mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); | 67 | mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); |
68 | mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); | 68 | mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); |
69 | mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); | 69 | mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); |
70 | mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); | 70 | mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); |
71 | mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); | ||
71 | } | 72 | } |
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index 800bb8b21081..665843d6c2b2 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -102,19 +102,21 @@ void __init mx53_init_irq(void) | |||
102 | 102 | ||
103 | void __init imx51_soc_init(void) | 103 | void __init imx51_soc_init(void) |
104 | { | 104 | { |
105 | mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); | 105 | /* i.mx51 has the i.mx31 type gpio */ |
106 | mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); | 106 | mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); |
107 | mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); | 107 | mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); |
108 | mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); | 108 | mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); |
109 | mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); | ||
109 | } | 110 | } |
110 | 111 | ||
111 | void __init imx53_soc_init(void) | 112 | void __init imx53_soc_init(void) |
112 | { | 113 | { |
113 | mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); | 114 | /* i.mx53 has the i.mx31 type gpio */ |
114 | mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); | 115 | mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); |
115 | mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); | 116 | mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); |
116 | mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); | 117 | mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); |
117 | mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); | 118 | mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); |
118 | mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); | 119 | mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); |
119 | mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); | 120 | mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); |
121 | mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); | ||
120 | } | 122 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c index cf1b7fdfa20d..a7919a241032 100644 --- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c +++ b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c | |||
@@ -8,7 +8,7 @@ | |||
8 | */ | 8 | */ |
9 | #include <mach/devices-common.h> | 9 | #include <mach/devices-common.h> |
10 | 10 | ||
11 | struct platform_device *__init mxc_register_gpio(int id, | 11 | struct platform_device *__init mxc_register_gpio(char *name, int id, |
12 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) | 12 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) |
13 | { | 13 | { |
14 | struct resource res[] = { | 14 | struct resource res[] = { |
@@ -28,5 +28,5 @@ struct platform_device *__init mxc_register_gpio(int id, | |||
28 | }; | 28 | }; |
29 | 29 | ||
30 | return platform_device_register_resndata(&mxc_aips_bus, | 30 | return platform_device_register_resndata(&mxc_aips_bus, |
31 | "gpio-mxc", id, res, ARRAY_SIZE(res), NULL, 0); | 31 | name, id, res, ARRAY_SIZE(res), NULL, 0); |
32 | } | 32 | } |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 91fa2632aa5e..4e3d97890d69 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -64,7 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
64 | unsigned long ckih1, unsigned long ckih2); | 64 | unsigned long ckih1, unsigned long ckih2); |
65 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, | 65 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, |
66 | unsigned long ckih1, unsigned long ckih2); | 66 | unsigned long ckih1, unsigned long ckih2); |
67 | extern struct platform_device *mxc_register_gpio(int id, | 67 | extern struct platform_device *mxc_register_gpio(char *name, int id, |
68 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); | 68 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); |
69 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 69 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
70 | extern void mxc_set_cpu_type(unsigned int type); | 70 | extern void mxc_set_cpu_type(unsigned int type); |
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 71ba316854ca..3775dccef4ad 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c | |||
@@ -27,9 +27,29 @@ | |||
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
29 | #include <linux/basic_mmio_gpio.h> | 29 | #include <linux/basic_mmio_gpio.h> |
30 | #include <mach/hardware.h> | ||
31 | #include <asm-generic/bug.h> | 30 | #include <asm-generic/bug.h> |
32 | 31 | ||
32 | enum mxc_gpio_hwtype { | ||
33 | IMX1_GPIO, /* runs on i.mx1 */ | ||
34 | IMX21_GPIO, /* runs on i.mx21 and i.mx27 */ | ||
35 | IMX31_GPIO, /* runs on all other i.mx */ | ||
36 | }; | ||
37 | |||
38 | /* device type dependent stuff */ | ||
39 | struct mxc_gpio_hwdata { | ||
40 | unsigned dr_reg; | ||
41 | unsigned gdir_reg; | ||
42 | unsigned psr_reg; | ||
43 | unsigned icr1_reg; | ||
44 | unsigned icr2_reg; | ||
45 | unsigned imr_reg; | ||
46 | unsigned isr_reg; | ||
47 | unsigned low_level; | ||
48 | unsigned high_level; | ||
49 | unsigned rise_edge; | ||
50 | unsigned fall_edge; | ||
51 | }; | ||
52 | |||
33 | struct mxc_gpio_port { | 53 | struct mxc_gpio_port { |
34 | struct list_head node; | 54 | struct list_head node; |
35 | void __iomem *base; | 55 | void __iomem *base; |
@@ -40,6 +60,66 @@ struct mxc_gpio_port { | |||
40 | u32 both_edges; | 60 | u32 both_edges; |
41 | }; | 61 | }; |
42 | 62 | ||
63 | static struct mxc_gpio_hwdata imx1_imx21_gpio_hwdata = { | ||
64 | .dr_reg = 0x1c, | ||
65 | .gdir_reg = 0x00, | ||
66 | .psr_reg = 0x24, | ||
67 | .icr1_reg = 0x28, | ||
68 | .icr2_reg = 0x2c, | ||
69 | .imr_reg = 0x30, | ||
70 | .isr_reg = 0x34, | ||
71 | .low_level = 0x03, | ||
72 | .high_level = 0x02, | ||
73 | .rise_edge = 0x00, | ||
74 | .fall_edge = 0x01, | ||
75 | }; | ||
76 | |||
77 | static struct mxc_gpio_hwdata imx31_gpio_hwdata = { | ||
78 | .dr_reg = 0x00, | ||
79 | .gdir_reg = 0x04, | ||
80 | .psr_reg = 0x08, | ||
81 | .icr1_reg = 0x0c, | ||
82 | .icr2_reg = 0x10, | ||
83 | .imr_reg = 0x14, | ||
84 | .isr_reg = 0x18, | ||
85 | .low_level = 0x00, | ||
86 | .high_level = 0x01, | ||
87 | .rise_edge = 0x02, | ||
88 | .fall_edge = 0x03, | ||
89 | }; | ||
90 | |||
91 | static enum mxc_gpio_hwtype mxc_gpio_hwtype; | ||
92 | static struct mxc_gpio_hwdata *mxc_gpio_hwdata; | ||
93 | |||
94 | #define GPIO_DR (mxc_gpio_hwdata->dr_reg) | ||
95 | #define GPIO_GDIR (mxc_gpio_hwdata->gdir_reg) | ||
96 | #define GPIO_PSR (mxc_gpio_hwdata->psr_reg) | ||
97 | #define GPIO_ICR1 (mxc_gpio_hwdata->icr1_reg) | ||
98 | #define GPIO_ICR2 (mxc_gpio_hwdata->icr2_reg) | ||
99 | #define GPIO_IMR (mxc_gpio_hwdata->imr_reg) | ||
100 | #define GPIO_ISR (mxc_gpio_hwdata->isr_reg) | ||
101 | |||
102 | #define GPIO_INT_LOW_LEV (mxc_gpio_hwdata->low_level) | ||
103 | #define GPIO_INT_HIGH_LEV (mxc_gpio_hwdata->high_level) | ||
104 | #define GPIO_INT_RISE_EDGE (mxc_gpio_hwdata->rise_edge) | ||
105 | #define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge) | ||
106 | #define GPIO_INT_NONE 0x4 | ||
107 | |||
108 | static struct platform_device_id mxc_gpio_devtype[] = { | ||
109 | { | ||
110 | .name = "imx1-gpio", | ||
111 | .driver_data = IMX1_GPIO, | ||
112 | }, { | ||
113 | .name = "imx21-gpio", | ||
114 | .driver_data = IMX21_GPIO, | ||
115 | }, { | ||
116 | .name = "imx31-gpio", | ||
117 | .driver_data = IMX31_GPIO, | ||
118 | }, { | ||
119 | /* sentinel */ | ||
120 | } | ||
121 | }; | ||
122 | |||
43 | /* | 123 | /* |
44 | * MX2 has one interrupt *for all* gpio ports. The list is used | 124 | * MX2 has one interrupt *for all* gpio ports. The list is used |
45 | * to save the references to all ports, so that mx2_gpio_irq_handler | 125 | * to save the references to all ports, so that mx2_gpio_irq_handler |
@@ -47,22 +127,6 @@ struct mxc_gpio_port { | |||
47 | */ | 127 | */ |
48 | static LIST_HEAD(mxc_gpio_ports); | 128 | static LIST_HEAD(mxc_gpio_ports); |
49 | 129 | ||
50 | #define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2()) | ||
51 | |||
52 | #define GPIO_DR (cpu_is_mx1_mx2() ? 0x1c : 0x00) | ||
53 | #define GPIO_GDIR (cpu_is_mx1_mx2() ? 0x00 : 0x04) | ||
54 | #define GPIO_PSR (cpu_is_mx1_mx2() ? 0x24 : 0x08) | ||
55 | #define GPIO_ICR1 (cpu_is_mx1_mx2() ? 0x28 : 0x0C) | ||
56 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) | ||
57 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) | ||
58 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | ||
59 | |||
60 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) | ||
61 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) | ||
62 | #define GPIO_INT_RISE_EDGE (cpu_is_mx1_mx2() ? 0x0 : 0x2) | ||
63 | #define GPIO_INT_FALL_EDGE (cpu_is_mx1_mx2() ? 0x1 : 0x3) | ||
64 | #define GPIO_INT_NONE 0x4 | ||
65 | |||
66 | /* Note: This driver assumes 32 GPIOs are handled in one register */ | 130 | /* Note: This driver assumes 32 GPIOs are handled in one register */ |
67 | 131 | ||
68 | static int gpio_set_irq_type(struct irq_data *d, u32 type) | 132 | static int gpio_set_irq_type(struct irq_data *d, u32 type) |
@@ -236,12 +300,36 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port) | |||
236 | IRQ_NOREQUEST, 0); | 300 | IRQ_NOREQUEST, 0); |
237 | } | 301 | } |
238 | 302 | ||
303 | static void __devinit mxc_gpio_get_hw(struct platform_device *pdev) | ||
304 | { | ||
305 | enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data; | ||
306 | |||
307 | if (mxc_gpio_hwtype) { | ||
308 | /* | ||
309 | * The driver works with a reasonable presupposition, | ||
310 | * that is all gpio ports must be the same type when | ||
311 | * running on one soc. | ||
312 | */ | ||
313 | BUG_ON(mxc_gpio_hwtype != hwtype); | ||
314 | return; | ||
315 | } | ||
316 | |||
317 | if (hwtype == IMX31_GPIO) | ||
318 | mxc_gpio_hwdata = &imx31_gpio_hwdata; | ||
319 | else | ||
320 | mxc_gpio_hwdata = &imx1_imx21_gpio_hwdata; | ||
321 | |||
322 | mxc_gpio_hwtype = hwtype; | ||
323 | } | ||
324 | |||
239 | static int __devinit mxc_gpio_probe(struct platform_device *pdev) | 325 | static int __devinit mxc_gpio_probe(struct platform_device *pdev) |
240 | { | 326 | { |
241 | struct mxc_gpio_port *port; | 327 | struct mxc_gpio_port *port; |
242 | struct resource *iores; | 328 | struct resource *iores; |
243 | int err; | 329 | int err; |
244 | 330 | ||
331 | mxc_gpio_get_hw(pdev); | ||
332 | |||
245 | port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); | 333 | port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); |
246 | if (!port) | 334 | if (!port) |
247 | return -ENOMEM; | 335 | return -ENOMEM; |
@@ -280,7 +368,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev) | |||
280 | /* gpio-mxc can be a generic irq chip */ | 368 | /* gpio-mxc can be a generic irq chip */ |
281 | mxc_gpio_init_gc(port); | 369 | mxc_gpio_init_gc(port); |
282 | 370 | ||
283 | if (cpu_is_mx2()) { | 371 | if (mxc_gpio_hwtype == IMX21_GPIO) { |
284 | /* setup one handler for all GPIO interrupts */ | 372 | /* setup one handler for all GPIO interrupts */ |
285 | if (pdev->id == 0) | 373 | if (pdev->id == 0) |
286 | irq_set_chained_handler(port->irq, | 374 | irq_set_chained_handler(port->irq, |
@@ -334,6 +422,7 @@ static struct platform_driver mxc_gpio_driver = { | |||
334 | .owner = THIS_MODULE, | 422 | .owner = THIS_MODULE, |
335 | }, | 423 | }, |
336 | .probe = mxc_gpio_probe, | 424 | .probe = mxc_gpio_probe, |
425 | .id_table = mxc_gpio_devtype, | ||
337 | }; | 426 | }; |
338 | 427 | ||
339 | static int __init gpio_mxc_init(void) | 428 | static int __init gpio_mxc_init(void) |