671 files changed, 10135 insertions, 7672 deletions

diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt
new file mode 100644
index 000000000000..aabca4f83402
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt
@@ -0,0 +1,38 @@
+* Advanced Interrupt Controller (AIC)
+
+Required properties:
+- compatible: Should be "atmel,<chip>-aic"
+- interrupt-controller: Identifies the node as an interrupt controller.
+- interrupt-parent: For single AIC system, it is an empty property.
+- #interrupt-cells: The number of cells to define the interrupts. It sould be 2.
+  The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
+  The second cell is used to specify flags:
+    bits[3:0] trigger type and level flags:
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      4 = active high level-sensitive.
+      8 = active low level-sensitive.
+      Valid combinations are 1, 2, 3, 4, 8.
+      Default flag for internal sources should be set to 4 (active high).
+- reg: Should contain AIC registers location and length
+
+Examples:
+        /*
+         * AIC
+         */
+        aic: interrupt-controller@fffff000 {
+                compatible = "atmel,at91rm9200-aic";
+                interrupt-controller;
+                interrupt-parent;
+                #interrupt-cells = <2>;
+                reg = <0xfffff000 0x200>;
+        };
+
+        /*
+         * An interrupt generating device that is wired to an AIC.
+         */
+        dma: dma-controller@ffffec00 {
+                compatible = "atmel,at91sam9g45-dma";
+                reg = <0xffffec00 0x200>;
+                interrupts = <21 4>;
+        };
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
new file mode 100644
index 000000000000..1aeaf6f2a1ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -0,0 +1,32 @@
+Atmel AT91 device tree bindings.
+================================
+
+PIT Timer required properties:
+- compatible: Should be "atmel,at91sam9260-pit"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the PIT which is the IRQ line
+  shared across all System Controller members.
+
+TC/TCLIB Timer required properties:
+- compatible: Should be "atmel,<chip>-pit".
+  <chip> can be "at91rm9200" or "at91sam9x5"
+- reg: Should contain registers location and length
+- interrupts: Should contain all interrupts for the TC block
+  Note that you can specify several interrupt cells if the TC
+  block has one interrupt per channel.
+
+Examples:
+
+One interrupt per TC block:
+        tcb0: timer@fff7c000 {
+                compatible = "atmel,at91rm9200-tcb";
+                reg = <0xfff7c000 0x100>;
+                interrupts = <18 4>;
+        };
+
+One interrupt per TC channel in a TC block:
+        tcb1: timer@fffdc000 {
+                compatible = "atmel,at91rm9200-tcb";
+                reg = <0xfffdc000 0x100>;
+                interrupts = <26 4 27 4 28 4>;
+        };
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 54bdddadf1cf..bfbc771a65f8 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -28,3 +28,25 @@ Required root node properties:
 i.MX6 Quad SABRE Lite Board
 Required root node properties:
     - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+Generic i.MX boards
+-------------------
+
+No iomux setup is done for these boards, so this must have been configured
+by the bootloader for boards to work with the generic bindings.
+
+i.MX27 generic board
+Required root node properties:
+    - compatible = "fsl,imx27";
+
+i.MX51 generic board
+Required root node properties:
+    - compatible = "fsl,imx51";
+
+i.MX53 generic board
+Required root node properties:
+    - compatible = "fsl,imx53";
+
+i.MX6q generic board
+Required root node properties:
+    - compatible = "fsl,imx6q";
diff --git a/Documentation/devicetree/bindings/arm/mrvl.txt b/Documentation/devicetree/bindings/arm/mrvl.txt
new file mode 100644
index 000000000000..d8de933e9d81
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl.txt
@@ -0,0 +1,6 @@
+Marvell Platforms Device Tree Bindings
+----------------------------------------------------
+
+PXA168 Aspenite Board
+Required root node properties:
+        - compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
diff --git a/Documentation/devicetree/bindings/arm/tegra/emc.txt b/Documentation/devicetree/bindings/arm/tegra/emc.txt
new file mode 100644
index 000000000000..09335f8eee00
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/emc.txt
@@ -0,0 +1,100 @@
+Embedded Memory Controller
+
+Properties:
+- name : Should be emc
+- #address-cells : Should be 1
+- #size-cells : Should be 0
+- compatible : Should contain "nvidia,tegra20-emc".
+- reg : Offset and length of the register set for the device
+- nvidia,use-ram-code : If present, the sub-nodes will be addressed
+  and chosen using the ramcode board selector. If omitted, only one
+  set of tables can be present and said tables will be used
+  irrespective of ram-code configuration.
+
+Child device nodes describe the memory settings for different configurations and clock rates.
+
+Example:
+
+        emc@7000f400 {
+                #address-cells = < 1 >;
+                #size-cells = < 0 >;
+                compatible = "nvidia,tegra20-emc";
+                reg = <0x7000f4000 0x200>;
+        }
+
+
+Embedded Memory Controller ram-code table
+
+If the emc node has the nvidia,use-ram-code property present, then the
+next level of nodes below the emc table are used to specify which settings
+apply for which ram-code settings.
+
+If the emc node lacks the nvidia,use-ram-code property, this level is omitted
+and the tables are stored directly under the emc node (see below).
+
+Properties:
+
+- name : Should be emc-tables
+- nvidia,ram-code : the binary representation of the ram-code board strappings
+  for which this node (and children) are valid.
+
+
+
+Embedded Memory Controller configuration table
+
+This is a table containing the EMC register settings for the various
+operating speeds of the memory controller. They are always located as
+subnodes of the emc controller node.
+
+There are two ways of specifying which tables to use:
+
+* The simplest is if there is just one set of tables in the device tree,
+  and they will always be used (based on which frequency is used).
+  This is the preferred method, especially when firmware can fill in
+  this information based on the specific system information and just
+  pass it on to the kernel.
+
+* The slightly more complex one is when more than one memory configuration
+  might exist on the system.  The Tegra20 platform handles this during
+  early boot by selecting one out of possible 4 memory settings based
+  on a 2-pin "ram code" bootstrap setting on the board. The values of
+  these strappings can be read through a register in the SoC, and thus
+  used to select which tables to use.
+
+Properties:
+- name : Should be emc-table
+- compatible : Should contain "nvidia,tegra20-emc-table".
+- reg : either an opaque enumerator to tell different tables apart, or
+  the valid frequency for which the table should be used (in kHz).
+- clock-frequency : the clock frequency for the EMC at which this
+  table should be used (in kHz).
+- nvidia,emc-registers : a 46 word array of EMC registers to be programmed
+  for operation at the 'clock-frequency' setting.
+  The order and contents of the registers are:
+    RC, RFC, RAS, RP, R2W, W2R, R2P, W2P, RD_RCD, WR_RCD, RRD, REXT,
+    WDV, QUSE, QRST, QSAFE, RDV, REFRESH, BURST_REFRESH_NUM, PDEX2WR,
+    PDEX2RD, PCHG2PDEN, ACT2PDEN, AR2PDEN, RW2PDEN, TXSR, TCKE, TFAW,
+    TRPAB, TCLKSTABLE, TCLKSTOP, TREFBW, QUSE_EXTRA, FBIO_CFG6, ODT_WRITE,
+    ODT_READ, FBIO_CFG5, CFG_DIG_DLL, DLL_XFORM_DQS, DLL_XFORM_QUSE,
+    ZCAL_REF_CNT, ZCAL_WAIT_CNT, AUTO_CAL_INTERVAL, CFG_CLKTRIM_0,
+    CFG_CLKTRIM_1, CFG_CLKTRIM_2
+
+                emc-table@166000 {
+                        reg = <166000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 166000 >;
+                        nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 >;
+                };
+
+                emc-table@333000 {
+                        reg = <333000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 333000 >;
+                        nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 >;
+                };
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
new file mode 100644
index 000000000000..b5846e21cc2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -0,0 +1,19 @@
+NVIDIA Tegra Power Management Controller (PMC)
+
+Properties:
+- name : Should be pmc
+- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- reg : Offset and length of the register set for the device
+- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
+  The PMU is an external Power Management Unit, whose interrupt output
+  signal is fed into the PMC. This signal is optionally inverted, and then
+  fed into the ARM GIC. The PMC is not involved in the detection or
+  handling of this interrupt signal, merely its inversion.
+
+Example:
+
+pmc@7000f400 {
+        compatible = "nvidia,tegra20-pmc";
+        reg = <0x7000e400 0x400>;
+        nvidia,invert-interrupt;
+};
diff --git a/Documentation/devicetree/bindings/arm/vexpress.txt b/Documentation/devicetree/bindings/arm/vexpress.txt
new file mode 100644
index 000000000000..ec8b50cbb2e8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress.txt
@@ -0,0 +1,146 @@
+ARM Versatile Express boards family
+-----------------------------------
+
+ARM's Versatile Express platform consists of a motherboard and one
+or more daughterboards (tiles). The motherboard provides a set of
+peripherals. Processor and RAM "live" on the tiles.
+
+The motherboard and each core tile should be described by a separate
+Device Tree source file, with the tile's description including
+the motherboard file using a /include/ directive. As the motherboard
+can be initialized in one of two different configurations ("memory
+maps"), care must be taken to include the correct one.
+
+Required properties in the root node:
+- compatible value:
+        compatible = "arm,vexpress,<model>", "arm,vexpress";
+  where <model> is the full tile model name (as used in the tile's
+    Technical Reference Manual), eg.:
+    - for Coretile Express A5x2 (V2P-CA5s):
+        compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
+    - for Coretile Express A9x4 (V2P-CA9):
+        compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
+  If a tile comes in several variants or can be used in more then one
+  configuration, the compatible value should be:
+        compatible = "arm,vexpress,<model>,<variant>", \
+                                "arm,vexpress,<model>", "arm,vexpress";
+  eg:
+    - Coretile Express A15x2 (V2P-CA15) with Tech Chip 1:
+        compatible = "arm,vexpress,v2p-ca15,tc1", \
+                                "arm,vexpress,v2p-ca15", "arm,vexpress";
+    - LogicTile Express 13MG (V2F-2XV6) running Cortex-A7 (3 cores) SMM:
+        compatible = "arm,vexpress,v2f-2xv6,ca7x3", \
+                                "arm,vexpress,v2f-2xv6", "arm,vexpress";
+
+Optional properties in the root node:
+- tile model name (use name from the tile's Technical Reference
+  Manual, eg. "V2P-CA5s")
+        model = "<model>";
+- tile's HBI number (unique ARM's board model ID, visible on the
+  PCB's silkscreen) in hexadecimal transcription:
+        arm,hbi = <0xhbi>
+  eg:
+  - for Coretile Express A5x2 (V2P-CA5s) HBI-0191:
+        arm,hbi = <0x191>;
+  - Coretile Express A9x4 (V2P-CA9) HBI-0225:
+        arm,hbi = <0x225>;
+
+Top-level standard "cpus" node is required. It must contain a node
+with device_type = "cpu" property for every available core, eg.:
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a5";
+                        reg = <0>;
+                };
+        };
+
+The motherboard description file provides a single "motherboard" node
+using 2 address cells corresponding to the Static Memory Bus used
+between the motherboard and the tile. The first cell defines the Chip
+Select (CS) line number, the second cell address offset within the CS.
+All interrupt lines between the motherboard and the tile are active
+high and are described using single cell.
+
+Optional properties of the "motherboard" node:
+- motherboard's memory map variant:
+        arm,v2m-memory-map = "<name>";
+  where name is one of:
+  - "rs1" - for RS1 map (i.a. peripherals on CS3); this map is also
+            referred to as "ARM Cortex-A Series memory map":
+        arm,v2m-memory-map = "rs1";
+  When this property is missing, the motherboard is using the original
+  memory map (also known as the "Legacy memory map", primarily used
+  with the original CoreTile Express A9x4) with peripherals on CS7.
+
+Motherboard .dtsi files provide a set of labelled peripherals that
+can be used to obtain required phandle in the tile's "aliases" node:
+- UARTs, note that the numbers correspond to the physical connectors
+  on the motherboard's back panel:
+        v2m_serial0, v2m_serial1, v2m_serial2 and v2m_serial3
+- I2C controllers:
+        v2m_i2c_dvi and v2m_i2c_pcie
+- SP804 timers:
+        v2m_timer01 and v2m_timer23
+
+Current Linux implementation requires a "arm,v2m_timer" alias
+pointing at one of the motherboard's SP804 timers, if it is to be
+used as the system timer. This alias should be defined in the
+motherboard files.
+
+The tile description must define "ranges", "interrupt-map-mask" and
+"interrupt-map" properties to translate the motherboard's address
+and interrupt space into one used by the tile's processor.
+
+Abbreviated example:
+
+/dts-v1/;
+
+/ {
+        model = "V2P-CA5s";
+        arm,hbi = <0x225>;
+        compatible = "arm,vexpress-v2p-ca5s", "arm,vexpress";
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        chosen { };
+
+        aliases {
+                serial0 = &v2m_serial0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a5";
+                        reg = <0>;
+                };
+        };
+
+        gic: interrupt-controller@2c001000 {
+                compatible = "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+                interrupt-controller;
+                reg = <0x2c001000 0x1000>,
+                      <0x2c000100 0x100>;
+        };
+
+        motherboard {
+                /* CS0 is visible at 0x08000000 */
+                ranges = <0 0 0x08000000 0x04000000>;
+                interrupt-map-mask = <0 0 63>;
+                /* Active high IRQ 0 is connected to GIC's SPI0 */
+                interrupt-map = <0 0 0 &gic 0 0 4>;
+        };
+};
+
+/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
new file mode 100644
index 000000000000..90fa7da525b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -0,0 +1,30 @@
+* NVIDIA Tegra APB DMA controller
+
+Required properties:
+- compatible: Should be "nvidia,<chip>-apbdma"
+- reg: Should contain DMA registers location and length. This shuld include
+  all of the per-channel registers.
+- interrupts: Should contain all of the per-channel DMA interrupts.
+
+Examples:
+
+apbdma: dma@6000a000 {
+        compatible = "nvidia,tegra20-apbdma";
+        reg = <0x6000a000 0x1200>;
+        interrupts = < 0 136 0x04
+                       0 137 0x04
+                       0 138 0x04
+                       0 139 0x04
+                       0 140 0x04
+                       0 141 0x04
+                       0 142 0x04
+                       0 143 0x04
+                       0 144 0x04
+                       0 145 0x04
+                       0 146 0x04
+                       0 147 0x04
+                       0 148 0x04
+                       0 149 0x04
+                       0 150 0x04
+                       0 151 0x04 >;
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio_atmel.txt b/Documentation/devicetree/bindings/gpio/gpio_atmel.txt
new file mode 100644
index 000000000000..66efc804806a
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio_atmel.txt
@@ -0,0 +1,20 @@
+* Atmel GPIO controller (PIO)
+
+Required properties:
+- compatible: "atmel,<chip>-gpio", where <chip> is at91rm9200 or at91sam9x5.
+- reg: Should contain GPIO controller registers location and length
+- interrupts: Should be the port interrupt shared by all the pins.
+- #gpio-cells: Should be two.  The first cell is the pin number and
+  the second cell is used to specify optional parameters (currently
+  unused).
+- gpio-controller: Marks the device node as a GPIO controller.
+
+Example:
+        pioA: gpio@fffff200 {
+                compatible = "atmel,at91rm9200-gpio";
+                reg = <0xfffff200 0x100>;
+                interrupts = <2 4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+        };
+
diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
index eb4b530d64e1..50b363c5b884 100644
--- a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
@@ -2,7 +2,25 @@ NVIDIA Tegra 2 GPIO controller
 
 Required properties:
 - compatible : "nvidia,tegra20-gpio"
+- reg : Physical base address and length of the controller's registers.
+- interrupts : The interrupt outputs from the controller.
 - #gpio-cells : Should be two. The first cell is the pin number and the
   second cell is used to specify optional parameters:
   - bit 0 specifies polarity (0 for normal, 1 for inverted)
 - gpio-controller : Marks the device node as a GPIO controller.
+
+Example:
+
+gpio: gpio@6000d000 {
+        compatible = "nvidia,tegra20-gpio";
+        reg = < 0x6000d000 0x1000 >;
+        interrupts = < 0 32 0x04
+                       0 33 0x04
+                       0 34 0x04
+                       0 35 0x04
+                       0 55 0x04
+                       0 87 0x04
+                       0 89 0x04 >;
+        #gpio-cells = <2>;
+        gpio-controller;
+};
diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
new file mode 100644
index 000000000000..1e34cfe5ebea
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
@@ -0,0 +1,23 @@
+* Marvell PXA GPIO controller
+
+Required properties:
+- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"
+- reg : Address and length of the register set for the device
+- interrupts : Should be the port interrupt shared by all gpio pins, if
+- interrupt-name : Should be the name of irq resource.
+  one number.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be one.  It is the pin number.
+
+Example:
+
+        gpio: gpio@d4019000 {
+                compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
+                reg = <0xd4019000 0x1000>;
+                interrupts = <49>, <17>, <18>;
+                interrupt-name = "gpio_mux", "gpio0", "gpio1";
+                gpio-controller;
+                #gpio-cells = <1>;
+                interrupt-controller;
+                #interrupt-cells = <1>;
+      };
diff --git a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
new file mode 100644
index 000000000000..071eb3caae91
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
@@ -0,0 +1,37 @@
+* I2C
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device
+ - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a
+   compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
+   For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
+   as shown in the example below.
+
+Recommended properties :
+
+ - interrupts : <a b> where a is the interrupt number and b is a
+   field that represents an encoding of the sense and level
+   information for the interrupt.  This should be encoded based on
+   the information in section 2) depending on the type of interrupt
+   controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+   services interrupts for this device.
+ - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
+   status register of i2c controller instead.
+ - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
+
+Examples:
+        twsi1: i2c@d4011000 {
+                compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                reg = <0xd4011000 0x1000>;
+                interrupts = <7>;
+                mrvl,i2c-fast-mode;
+        };
+        
+        twsi2: i2c@d4025000 {
+                compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                reg = <0xd4025000 0x1000>;
+                interrupts = <58>;
+        };
+
diff --git a/Documentation/devicetree/bindings/rtc/sa1100-rtc.txt b/Documentation/devicetree/bindings/rtc/sa1100-rtc.txt
new file mode 100644
index 000000000000..0cda19ad4859
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/sa1100-rtc.txt
@@ -0,0 +1,17 @@
+* Marvell Real Time Clock controller
+
+Required properties:
+- compatible: should be "mrvl,sa1100-rtc"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: Should be two. The first interrupt number is the rtc alarm
+  interrupt and the second interrupt number is the rtc hz interrupt.
+- interrupt-names: Assign name of irq resource.
+
+Example:
+        rtc: rtc@d4010000 {
+                compatible = "mrvl,mmp-rtc";
+                reg = <0xd4010000 0x1000>;
+                interrupts = <5>, <6>;
+                interrupt-name = "rtc 1Hz", "rtc alarm";
+        };
diff --git a/Documentation/devicetree/bindings/serial/mrvl-serial.txt b/Documentation/devicetree/bindings/serial/mrvl-serial.txt
new file mode 100644
index 000000000000..d744340de887
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/mrvl-serial.txt
@@ -0,0 +1,4 @@
+PXA UART controller
+
+Required properties:
+- compatible : should be "mrvl,mmp-uart" or "mrvl,pxa-uart".
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index a0ffac029a0d..1bea46a54b1c 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -510,17 +510,3 @@ Why:	The pci_scan_bus_parented() interface creates a new root bus.  The
         convert to using pci_scan_root_bus() so they can supply a list of
         bus resources when the bus is created.
 Who:    Bjorn Helgaas <bhelgaas@google.com>
-
-----------------------------
-
-What:   The CAP9 SoC family will be removed
-When:   3.4
-Files:  arch/arm/mach-at91/at91cap9.c
-        arch/arm/mach-at91/at91cap9_devices.c
-        arch/arm/mach-at91/include/mach/at91cap9.h
-        arch/arm/mach-at91/include/mach/at91cap9_matrix.h
-        arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
-        arch/arm/mach-at91/board-cap9adk.c
-Why:    The code is not actively maintained and platforms are now hard to find.
-Who:    Nicolas Ferre <nicolas.ferre@atmel.com>
-        Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/MAINTAINERS b/MAINTAINERS
index 57dd0f56cd37..f096b0d8e973 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -269,7 +269,6 @@ S:	Orphan
 F:      drivers/platform/x86/wmi.c
 
 AD1889 ALSA SOUND DRIVER
-M:      Kyle McMartin <kyle@mcmartin.ca>
 M:      Thibaut Varene <T-Bone@parisc-linux.org>
 W:      http://wiki.parisc-linux.org/AD1889
 L:      linux-parisc@vger.kernel.org
@@ -3047,7 +3046,6 @@ F:	drivers/hwspinlock/hwspinlock_*
 F:      include/linux/hwspinlock.h
 
 HARMONY SOUND DRIVER
-M:      Kyle McMartin <kyle@mcmartin.ca>
 L:      linux-parisc@vger.kernel.org
 S:      Maintained
 F:      sound/parisc/harmony.*
@@ -3791,7 +3789,7 @@ F:	Documentation/kdump/
 
 KERNEL AUTOMOUNTER v4 (AUTOFS4)
 M:      Ian Kent <raven@themaw.net>
-L:      autofs@linux.kernel.org
+L:      autofs@vger.kernel.org
 S:      Maintained
 F:      fs/autofs4/
 
@@ -4696,7 +4694,7 @@ NTFS FILESYSTEM
 M:      Anton Altaparmakov <anton@tuxera.com>
 L:      linux-ntfs-dev@lists.sourceforge.net
 W:      http://www.tuxera.com/
-T:      git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs-2.6.git
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs.git
 S:      Supported
 F:      Documentation/filesystems/ntfs.txt
 F:      fs/ntfs/
@@ -5009,9 +5007,8 @@ F:	Documentation/blockdev/paride.txt
 F:      drivers/block/paride/
 
 PARISC ARCHITECTURE
-M:      Kyle McMartin <kyle@mcmartin.ca>
-M:      Helge Deller <deller@gmx.de>
 M:      "James E.J. Bottomley" <jejb@parisc-linux.org>
+M:      Helge Deller <deller@gmx.de>
 L:      linux-parisc@vger.kernel.org
 W:      http://www.parisc-linux.org/
 Q:      http://patchwork.kernel.org/project/linux-parisc/list/
@@ -5870,7 +5867,7 @@ S:	Maintained
 F:      drivers/mmc/host/sdhci-spear.c
 
 SECURITY SUBSYSTEM
-M:      James Morris <jmorris@namei.org>
+M:      James Morris <james.l.morris@oracle.com>
 L:      linux-security-module@vger.kernel.org (suggested Cc:)
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
 W:      http://security.wiki.kernel.org/
@@ -5883,7 +5880,7 @@ S:	Supported
 
 SELINUX SECURITY MODULE
 M:      Stephen Smalley <sds@tycho.nsa.gov>
-M:      James Morris <jmorris@namei.org>
+M:      James Morris <james.l.morris@oracle.com>
 M:      Eric Paris <eparis@parisplace.org>
 L:      selinux@tycho.nsa.gov (subscribers-only, general discussion)
 W:      http://selinuxproject.org
@@ -7283,7 +7280,7 @@ WATCHDOG DEVICE DRIVERS
 M:      Wim Van Sebroeck <wim@iguana.be>
 L:      linux-watchdog@vger.kernel.org
 W:      http://www.linux-watchdog.org/
-T:      git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
+T:      git git://www.linux-watchdog.org/linux-watchdog.git
 S:      Maintained
 F:      Documentation/watchdog/
 F:      drivers/watchdog/
diff --git a/Makefile b/Makefile
index 4ddd641ab615..66d13c917bc7 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 3
 PATCHLEVEL = 3
 SUBLEVEL = 0
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc6
 NAME = Saber-toothed Squirrel
 
 # *DOCUMENTATION*
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17eac..cabd8f556a1f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -322,9 +322,10 @@ config ARCH_AT91
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_CLK
         select CLKDEV_LOOKUP
+        select IRQ_DOMAIN
         help
           This enables support for systems based on the Atmel AT91RM9200,
-          AT91SAM9 and AT91CAP9 processors.
+          AT91SAM9 processors.
 
 config ARCH_BCMRING
         bool "Broadcom BCMRING"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e0d236d7ff73..b895a2a92da8 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -81,47 +81,14 @@ choice
         prompt "Kernel low-level debugging port"
         depends on DEBUG_LL
 
-        config DEBUG_LL_UART_NONE
-                bool "No low-level debugging UART"
-                help
-                  Say Y here if your platform doesn't provide a UART option
-                  below. This relies on your platform choosing the right UART
-                  definition internally in order for low-level debugging to
-                  work.
-
-        config DEBUG_ICEDCC
-                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the EmbeddedICE macrocell's DCC channel using
-                  co-processor 14. This is known to work on the ARM9 style ICE
-                  channel and on the XScale with the PEEDI.
-
-                  Note that the system will appear to hang during boot if there
-                  is nothing connected to read from the DCC.
-
         config AT91_DEBUG_LL_DBGU0
                 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
                 depends on HAVE_AT91_DBGU0
 
         config AT91_DEBUG_LL_DBGU1
-                bool "Kernel low-level debugging on 9263, 9g45 and cap9"
+                bool "Kernel low-level debugging on 9263 and 9g45"
                 depends on HAVE_AT91_DBGU1
 
-        config DEBUG_FOOTBRIDGE_COM1
-                bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
-                depends on FOOTBRIDGE
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the 8250 at PCI COM1.
-
-        config DEBUG_DC21285_PORT
-                bool "Kernel low-level debugging messages via footbridge serial port"
-                depends on FOOTBRIDGE
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port in the DC21285 (Footbridge).
-
         config DEBUG_CLPS711X_UART1
                 bool "Kernel low-level debugging messages via UART1"
                 depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice
                   Say Y here if you want the debug print routines to direct
                   their output to the second serial port on these devices.
 
+        config DEBUG_DC21285_PORT
+                bool "Kernel low-level debugging messages via footbridge serial port"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port in the DC21285 (Footbridge).
+
+        config DEBUG_FOOTBRIDGE_COM1
+                bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the 8250 at PCI COM1.
+
         config DEBUG_HIGHBANK_UART
                 bool "Kernel low-level debugging messages via Highbank UART"
                 depends on ARCH_HIGHBANK
@@ -206,38 +187,42 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX6Q.
 
-        config DEBUG_S3C_UART0
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 0 for low-level debug"
+        config DEBUG_MSM_UART1
+                bool "Kernel low-level debugging messages via MSM UART1"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 0. The port must have been initialised
-                  by the boot-loader before use.
-
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+                  their output to the first serial port on MSM devices.
 
-        config DEBUG_S3C_UART1
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 1 for low-level debug"
+        config DEBUG_MSM_UART2
+                bool "Kernel low-level debugging messages via MSM UART2"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 1. The port must have been initialised
-                  by the boot-loader before use.
+                  their output to the second serial port on MSM devices.
 
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+        config DEBUG_MSM_UART3
+                bool "Kernel low-level debugging messages via MSM UART3"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the third serial port on MSM devices.
 
-        config DEBUG_S3C_UART2
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 2 for low-level debug"
+        config DEBUG_MSM8660_UART
+                bool "Kernel low-level debugging messages via MSM 8660 UART"
+                depends on ARCH_MSM8X60
+                select MSM_HAS_DEBUG_UART_HS
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 2. The port must have been initialised
-                  by the boot-loader before use.
+                  their output to the serial port on MSM 8660 devices.
 
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+        config DEBUG_MSM8960_UART
+                bool "Kernel low-level debugging messages via MSM 8960 UART"
+                depends on ARCH_MSM8960
+                select MSM_HAS_DEBUG_UART_HS
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port on MSM 8960 devices.
 
         config DEBUG_REALVIEW_STD_PORT
                 bool "RealView Default UART"
@@ -255,42 +240,57 @@ choice
                   their output to the standard serial port on the RealView
                   PB1176 platform.
 
-        config DEBUG_MSM_UART1
-                bool "Kernel low-level debugging messages via MSM UART1"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+        config DEBUG_S3C_UART0
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 0 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the first serial port on MSM devices.
+                  their output to UART 0. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM_UART2
-                bool "Kernel low-level debugging messages via MSM UART2"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_S3C_UART1
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 1 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the second serial port on MSM devices.
+                  their output to UART 1. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM_UART3
-                bool "Kernel low-level debugging messages via MSM UART3"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_S3C_UART2
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 2 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the third serial port on MSM devices.
+                  their output to UART 2. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM8660_UART
-                bool "Kernel low-level debugging messages via MSM 8660 UART"
-                depends on ARCH_MSM8X60
-                select MSM_HAS_DEBUG_UART_HS
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_LL_UART_NONE
+                bool "No low-level debugging UART"
                 help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8660 devices.
+                  Say Y here if your platform doesn't provide a UART option
+                  below. This relies on your platform choosing the right UART
+                  definition internally in order for low-level debugging to
+                  work.
 
-        config DEBUG_MSM8960_UART
-                bool "Kernel low-level debugging messages via MSM 8960 UART"
-                depends on ARCH_MSM8960
-                select MSM_HAS_DEBUG_UART_HS
+        config DEBUG_ICEDCC
+                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8960 devices.
+                  their output to the EmbeddedICE macrocell's DCC channel using
+                  co-processor 14. This is known to work on the ARM9 style ICE
+                  channel and on the XScale with the PEEDI.
+
+                  Note that the system will appear to hang during boot if there
+                  is nothing connected to read from the DCC.
 
 endchoice
 
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 07603b8c9503..a100db03ec90 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -23,6 +23,11 @@
                 serial4 = &usart3;
                 serial5 = &usart4;
                 serial6 = &usart5;
+                gpio0 = &pioA;
+                gpio1 = &pioB;
+                gpio2 = &pioC;
+                tcb0 = &tcb0;
+                tcb1 = &tcb1;
         };
         cpus {
                 cpu@0 {
@@ -47,24 +52,69 @@
                         ranges;
 
                         aic: interrupt-controller@fffff000 {
-                                #interrupt-cells = <1>;
+                                #interrupt-cells = <2>;
                                 compatible = "atmel,at91rm9200-aic";
                                 interrupt-controller;
                                 interrupt-parent;
                                 reg = <0xfffff000 0x200>;
                         };
 
+                        pit: timer@fffffd30 {
+                                compatible = "atmel,at91sam9260-pit";
+                                reg = <0xfffffd30 0xf>;
+                                interrupts = <1 4>;
+                        };
+
+                        tcb0: timer@fffa0000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfffa0000 0x100>;
+                                interrupts = <17 4 18 4 19 4>;
+                        };
+
+                        tcb1: timer@fffdc000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfffdc000 0x100>;
+                                interrupts = <26 4 27 4 28 4>;
+                        };
+
+                        pioA: gpio@fffff400 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff400 0x100>;
+                                interrupts = <2 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioB: gpio@fffff600 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff600 0x100>;
+                                interrupts = <3 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioC: gpio@fffff800 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff800 0x100>;
+                                interrupts = <4 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
                         dbgu: serial@fffff200 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffff200 0x200>;
-                                interrupts = <1>;
+                                interrupts = <1 4>;
                                 status = "disabled";
                         };
 
                         usart0: serial@fffb0000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffb0000 0x200>;
-                                interrupts = <6>;
+                                interrupts = <6 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -73,7 +123,7 @@
                         usart1: serial@fffb4000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffb4000 0x200>;
-                                interrupts = <7>;
+                                interrupts = <7 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -82,7 +132,7 @@
                         usart2: serial@fffb8000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffb8000 0x200>;
-                                interrupts = <8>;
+                                interrupts = <8 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -91,7 +141,7 @@
                         usart3: serial@fffd0000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffd0000 0x200>;
-                                interrupts = <23>;
+                                interrupts = <23 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -100,7 +150,7 @@
                         usart4: serial@fffd4000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffd4000 0x200>;
-                                interrupts = <24>;
+                                interrupts = <24 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -109,7 +159,7 @@
                         usart5: serial@fffd8000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfffd8000 0x200>;
-                                interrupts = <25>;
+                                interrupts = <25 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -118,7 +168,7 @@
                         macb0: ethernet@fffc4000 {
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xfffc4000 0x100>;
-                                interrupts = <21>;
+                                interrupts = <21 4>;
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
new file mode 100644
index 000000000000..e64eb932083b
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -0,0 +1,37 @@
+/*
+ * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+/include/ "at91sam9x5.dtsi"
+/include/ "at91sam9x5cm.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9G25-EK";
+        compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+
+        chosen {
+                bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+        };
+
+        ahb {
+                apb {
+                        dbgu: serial@fffff200 {
+                                status = "okay";
+                        };
+
+                        usart0: serial@f801c000 {
+                                status = "okay";
+                        };
+
+                        macb0: ethernet@f802c000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index fffa005300a4..f779667159b1 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -22,6 +22,13 @@
                 serial2 = &usart1;
                 serial3 = &usart2;
                 serial4 = &usart3;
+                gpio0 = &pioA;
+                gpio1 = &pioB;
+                gpio2 = &pioC;
+                gpio3 = &pioD;
+                gpio4 = &pioE;
+                tcb0 = &tcb0;
+                tcb1 = &tcb1;
         };
         cpus {
                 cpu@0 {
@@ -46,30 +53,94 @@
                         ranges;
 
                         aic: interrupt-controller@fffff000 {
-                                #interrupt-cells = <1>;
+                                #interrupt-cells = <2>;
                                 compatible = "atmel,at91rm9200-aic";
                                 interrupt-controller;
                                 interrupt-parent;
                                 reg = <0xfffff000 0x200>;
                         };
 
+                        pit: timer@fffffd30 {
+                                compatible = "atmel,at91sam9260-pit";
+                                reg = <0xfffffd30 0xf>;
+                                interrupts = <1 4>;
+                        };
+
+
+                        tcb0: timer@fff7c000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfff7c000 0x100>;
+                                interrupts = <18 4>;
+                        };
+
+                        tcb1: timer@fffd4000 {
+                                compatible = "atmel,at91rm9200-tcb";
+                                reg = <0xfffd4000 0x100>;
+                                interrupts = <18 4>;
+                        };
+
                         dma: dma-controller@ffffec00 {
                                 compatible = "atmel,at91sam9g45-dma";
                                 reg = <0xffffec00 0x200>;
-                                interrupts = <21>;
+                                interrupts = <21 4>;
+                        };
+
+                        pioA: gpio@fffff200 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff200 0x100>;
+                                interrupts = <2 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioB: gpio@fffff400 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff400 0x100>;
+                                interrupts = <3 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioC: gpio@fffff600 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff600 0x100>;
+                                interrupts = <4 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioD: gpio@fffff800 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffff800 0x100>;
+                                interrupts = <5 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioE: gpio@fffffa00 {
+                                compatible = "atmel,at91rm9200-gpio";
+                                reg = <0xfffffa00 0x100>;
+                                interrupts = <5 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
                         };
 
                         dbgu: serial@ffffee00 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xffffee00 0x200>;
-                                interrupts = <1>;
+                                interrupts = <1 4>;
                                 status = "disabled";
                         };
 
                         usart0: serial@fff8c000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfff8c000 0x200>;
-                                interrupts = <7>;
+                                interrupts = <7 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -78,7 +149,7 @@
                         usart1: serial@fff90000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfff90000 0x200>;
-                                interrupts = <8>;
+                                interrupts = <8 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -87,7 +158,7 @@
                         usart2: serial@fff94000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfff94000 0x200>;
-                                interrupts = <9>;
+                                interrupts = <9 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -96,7 +167,7 @@
                         usart3: serial@fff98000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfff98000 0x200>;
-                                interrupts = <10>;
+                                interrupts = <10 4>;
                                 atmel,use-dma-rx;
                                 atmel,use-dma-tx;
                                 status = "disabled";
@@ -105,7 +176,7 @@
                         macb0: ethernet@fffbc000 {
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xfffbc000 0x100>;
-                                interrupts = <25>;
+                                interrupts = <25 4>;
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index a387e7704ce1..15e25f903cad 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -37,4 +37,76 @@
                         };
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                d8 {
+                        label = "d8";
+                        gpios = <&pioD 30 0>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                d6 {
+                        label = "d6";
+                        gpios = <&pioD 0 1>;
+                        linux,default-trigger = "nand-disk";
+                };
+
+                d7 {
+                        label = "d7";
+                        gpios = <&pioD 31 1>;
+                        linux,default-trigger = "mmc0";
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                left_click {
+                        label = "left_click";
+                        gpios = <&pioB 6 1>;
+                        linux,code = <272>;
+                        gpio-key,wakeup;
+                };
+
+                right_click {
+                        label = "right_click";
+                        gpios = <&pioB 7 1>;
+                        linux,code = <273>;
+                        gpio-key,wakeup;
+                };
+
+                left {
+                        label = "Joystick Left";
+                        gpios = <&pioB 14 1>;
+                        linux,code = <105>;
+                };
+
+                right {
+                        label = "Joystick Right";
+                        gpios = <&pioB 15 1>;
+                        linux,code = <106>;
+                };
+
+                up {
+                        label = "Joystick Up";
+                        gpios = <&pioB 16 1>;
+                        linux,code = <103>;
+                };
+
+                down {
+                        label = "Joystick Down";
+                        gpios = <&pioB 17 1>;
+                        linux,code = <108>;
+                };
+
+                enter {
+                        label = "Joystick Press";
+                        gpios = <&pioB 18 1>;
+                        linux,code = <28>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
new file mode 100644
index 000000000000..a02e636d8a57
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -0,0 +1,176 @@
+/*
+ * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
+ *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
+ *                   AT91SAM9X25, AT91SAM9X35 SoC
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        model = "Atmel AT91SAM9x5 family SoC";
+        compatible = "atmel,at91sam9x5";
+        interrupt-parent = <&aic>;
+
+        aliases {
+                serial0 = &dbgu;
+                serial1 = &usart0;
+                serial2 = &usart1;
+                serial3 = &usart2;
+                gpio0 = &pioA;
+                gpio1 = &pioB;
+                gpio2 = &pioC;
+                gpio3 = &pioD;
+                tcb0 = &tcb0;
+                tcb1 = &tcb1;
+        };
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        memory@20000000 {
+                reg = <0x20000000 0x10000000>;
+        };
+
+        ahb {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                apb {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        aic: interrupt-controller@fffff000 {
+                                #interrupt-cells = <2>;
+                                compatible = "atmel,at91rm9200-aic";
+                                interrupt-controller;
+                                interrupt-parent;
+                                reg = <0xfffff000 0x200>;
+                        };
+
+                        pit: timer@fffffe30 {
+                                compatible = "atmel,at91sam9260-pit";
+                                reg = <0xfffffe30 0xf>;
+                                interrupts = <1 4>;
+                        };
+
+                        tcb0: timer@f8008000 {
+                                compatible = "atmel,at91sam9x5-tcb";
+                                reg = <0xf8008000 0x100>;
+                                interrupts = <17 4>;
+                        };
+
+                        tcb1: timer@f800c000 {
+                                compatible = "atmel,at91sam9x5-tcb";
+                                reg = <0xf800c000 0x100>;
+                                interrupts = <17 4>;
+                        };
+
+                        dma0: dma-controller@ffffec00 {
+                                compatible = "atmel,at91sam9g45-dma";
+                                reg = <0xffffec00 0x200>;
+                                interrupts = <20 4>;
+                        };
+
+                        dma1: dma-controller@ffffee00 {
+                                compatible = "atmel,at91sam9g45-dma";
+                                reg = <0xffffee00 0x200>;
+                                interrupts = <21 4>;
+                        };
+
+                        pioA: gpio@fffff400 {
+                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                reg = <0xfffff400 0x100>;
+                                interrupts = <2 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioB: gpio@fffff600 {
+                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                reg = <0xfffff600 0x100>;
+                                interrupts = <2 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioC: gpio@fffff800 {
+                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                reg = <0xfffff800 0x100>;
+                                interrupts = <3 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        pioD: gpio@fffffa00 {
+                                compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+                                reg = <0xfffffa00 0x100>;
+                                interrupts = <3 4>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                interrupt-controller;
+                        };
+
+                        dbgu: serial@fffff200 {
+                                compatible = "atmel,at91sam9260-usart";
+                                reg = <0xfffff200 0x200>;
+                                interrupts = <1 4>;
+                                status = "disabled";
+                        };
+
+                        usart0: serial@f801c000 {
+                                compatible = "atmel,at91sam9260-usart";
+                                reg = <0xf801c000 0x200>;
+                                interrupts = <5 4>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                status = "disabled";
+                        };
+
+                        usart1: serial@f8020000 {
+                                compatible = "atmel,at91sam9260-usart";
+                                reg = <0xf8020000 0x200>;
+                                interrupts = <6 4>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                status = "disabled";
+                        };
+
+                        usart2: serial@f8024000 {
+                                compatible = "atmel,at91sam9260-usart";
+                                reg = <0xf8024000 0x200>;
+                                interrupts = <7 4>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                status = "disabled";
+                        };
+
+                        macb0: ethernet@f802c000 {
+                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
+                                reg = <0xf802c000 0x100>;
+                                interrupts = <24 4>;
+                                status = "disabled";
+                        };
+
+                        macb1: ethernet@f8030000 {
+                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
+                                reg = <0xf8030000 0x100>;
+                                interrupts = <27 4>;
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
new file mode 100644
index 000000000000..64ae3e890259
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -0,0 +1,29 @@
+/*
+ * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/ {
+        memory@20000000 {
+                reg = <0x20000000 0x8000000>;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pb18 {
+                        label = "pb18";
+                        gpios = <&pioB 18 1>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                pd21 {
+                        label = "pd21";
+                        gpios = <&pioD 21 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
new file mode 100644
index 000000000000..a51a08fc2af9
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx27.dtsi"
+
+/ {
+        model = "Phytec pcm038";
+        compatible = "phytec,imx27-pcm038", "fsl,imx27";
+
+        memory {
+                reg = <0x0 0x0>;
+        };
+
+        soc {
+                aipi@10000000 { /* aipi */
+
+                        wdog@10002000 {
+                                status = "okay";
+                        };
+
+                        uart@1000a000 {
+                                fsl,uart-has-rtscts;
+                                status = "okay";
+                        };
+
+                        uart@1000b000 {
+                                fsl,uart-has-rtscts;
+                                status = "okay";
+                        };
+
+                        uart@1000c000 {
+                                fsl,uart-has-rtscts;
+                                status = "okay";
+                        };
+
+                        fec@1002b000 {
+                                status = "okay";
+                        };
+
+                        i2c@1001d000 {
+                                clock-frequency = <400000>;
+                                status = "okay";
+                                at24@4c {
+                                        compatible = "at,24c32";
+                                        pagesize = <32>;
+                                        reg = <0x52>;
+                                };
+                                pcf8563@51 {
+                                        compatible = "nxp,pcf8563";
+                                        reg = <0x51>;
+                                };
+                                lm75@4a {
+                                        compatible = "national,lm75";
+                                        reg = <0x4a>;
+                                };
+                        };
+                };
+        };
+
+        nor_flash@c0000000 {
+                compatible = "cfi-flash";
+                bank-width = <2>;
+                reg = <0xc0000000 0x02000000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
new file mode 100644
index 000000000000..bc5e7d5ddd54
--- /dev/null
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -0,0 +1,217 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        aliases {
+                serial0 = &uart1;
+                serial1 = &uart2;
+                serial2 = &uart3;
+                serial3 = &uart4;
+                serial4 = &uart5;
+                serial5 = &uart6;
+        };
+
+        avic: avic-interrupt-controller@e0000000 {
+                compatible = "fsl,imx27-avic", "fsl,avic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0x10040000 0x1000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc26m {
+                        compatible = "fsl,imx-osc26m", "fixed-clock";
+                        clock-frequency = <26000000>;
+                };
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                interrupt-parent = <&avic>;
+                ranges;
+
+                aipi@10000000 { /* AIPI1 */
+                        compatible = "fsl,aipi-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x10000000 0x10000000>;
+                        ranges;
+
+                        wdog@10002000 {
+                                compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
+                                reg = <0x10002000 0x4000>;
+                                interrupts = <27>;
+                                status = "disabled";
+                        };
+
+                        uart1: uart@1000a000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1000a000 0x1000>;
+                                interrupts = <20>;
+                                status = "disabled";
+                        };
+
+                        uart2: uart@1000b000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1000b000 0x1000>;
+                                interrupts = <19>;
+                                status = "disabled";
+                        };
+
+                        uart3: uart@1000c000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1000c000 0x1000>;
+                                interrupts = <18>;
+                                status = "disabled";
+                        };
+
+                        uart4: uart@1000d000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1000d000 0x1000>;
+                                interrupts = <17>;
+                                status = "disabled";
+                        };
+
+                        cspi1: cspi@1000e000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx27-cspi";
+                                reg = <0x1000e000 0x1000>;
+                                interrupts = <16>;
+                                status = "disabled";
+                        };
+
+                        cspi2: cspi@1000f000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx27-cspi";
+                                reg = <0x1000f000 0x1000>;
+                                interrupts = <15>;
+                                status = "disabled";
+                        };
+
+                        i2c1: i2c@10012000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                reg = <0x10012000 0x1000>;
+                                interrupts = <12>;
+                                status = "disabled";
+                        };
+
+                        gpio1: gpio@10015000 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015000 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        gpio2: gpio@10015100 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015100 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        gpio3: gpio@10015200 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015200 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        gpio4: gpio@10015300 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015300 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        gpio5: gpio@10015400 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015400 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        gpio6: gpio@10015500 {
+                                compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+                                reg = <0x10015500 0x100>;
+                                interrupts = <8>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        cspi3: cspi@10017000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx27-cspi";
+                                reg = <0x10017000 0x1000>;
+                                interrupts = <6>;
+                                status = "disabled";
+                        };
+
+                        uart5: uart@1001b000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1001b000 0x1000>;
+                                interrupts = <49>;
+                                status = "disabled";
+                        };
+
+                        uart6: uart@1001c000 {
+                                compatible = "fsl,imx27-uart", "fsl,imx21-uart";
+                                reg = <0x1001c000 0x1000>;
+                                interrupts = <48>;
+                                status = "disabled";
+                        };
+
+                        i2c2: i2c@1001d000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                reg = <0x1001d000 0x1000>;
+                                interrupts = <1>;
+                                status = "disabled";
+                        };
+
+                        fec: fec@1002b000 {
+                                compatible = "fsl,imx27-fec";
+                                reg = <0x1002b000 0x4000>;
+                                interrupts = <50>;
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 564cb8c19f15..9949e6060dee 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -56,8 +56,95 @@
                                                 compatible = "fsl,mc13892";
                                                 spi-max-frequency = <6000000>;
                                                 reg = <0>;
-                                                mc13xxx-irq-gpios = <&gpio1 8 0>;
-                                                fsl,mc13xxx-uses-regulator;
+                                                interrupt-parent = <&gpio1>;
+                                                interrupts = <8>;
+
+                                                regulators {
+                                                        sw1_reg: sw1 {
+                                                                regulator-min-microvolt = <600000>;
+                                                                regulator-max-microvolt = <1375000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        sw2_reg: sw2 {
+                                                                regulator-min-microvolt = <900000>;
+                                                                regulator-max-microvolt = <1850000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        sw3_reg: sw3 {
+                                                                regulator-min-microvolt = <1100000>;
+                                                                regulator-max-microvolt = <1850000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        sw4_reg: sw4 {
+                                                                regulator-min-microvolt = <1100000>;
+                                                                regulator-max-microvolt = <1850000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        vpll_reg: vpll {
+                                                                regulator-min-microvolt = <1050000>;
+                                                                regulator-max-microvolt = <1800000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        vdig_reg: vdig {
+                                                                regulator-min-microvolt = <1650000>;
+                                                                regulator-max-microvolt = <1650000>;
+                                                                regulator-boot-on;
+                                                        };
+
+                                                        vsd_reg: vsd {
+                                                                regulator-min-microvolt = <1800000>;
+                                                                regulator-max-microvolt = <3150000>;
+                                                        };
+
+                                                        vusb2_reg: vusb2 {
+                                                                regulator-min-microvolt = <2400000>;
+                                                                regulator-max-microvolt = <2775000>;
+                                                                regulator-boot-on;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        vvideo_reg: vvideo {
+                                                                regulator-min-microvolt = <2775000>;
+                                                                regulator-max-microvolt = <2775000>;
+                                                        };
+
+                                                        vaudio_reg: vaudio {
+                                                                regulator-min-microvolt = <2300000>;
+                                                                regulator-max-microvolt = <3000000>;
+                                                        };
+
+                                                        vcam_reg: vcam {
+                                                                regulator-min-microvolt = <2500000>;
+                                                                regulator-max-microvolt = <3000000>;
+                                                        };
+
+                                                        vgen1_reg: vgen1 {
+                                                                regulator-min-microvolt = <1200000>;
+                                                                regulator-max-microvolt = <1200000>;
+                                                        };
+
+                                                        vgen2_reg: vgen2 {
+                                                                regulator-min-microvolt = <1200000>;
+                                                                regulator-max-microvolt = <3150000>;
+                                                                regulator-always-on;
+                                                        };
+
+                                                        vgen3_reg: vgen3 {
+                                                                regulator-min-microvolt = <1800000>;
+                                                                regulator-max-microvolt = <2900000>;
+                                                                regulator-always-on;
+                                                        };
+                                                };
                                         };
 
                                         flash: at45db321d@1 {
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index c3977e0478b9..ce1c8238c897 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -36,11 +36,13 @@
                         usdhc@02198000 { /* uSDHC3 */
                                 cd-gpios = <&gpio6 11 0>;
                                 wp-gpios = <&gpio6 14 0>;
+                                vmmc-supply = <&reg_3p3v>;
                                 status = "okay";
                         };
 
                         usdhc@0219c000 { /* uSDHC4 */
                                 fsl,card-wired;
+                                vmmc-supply = <&reg_3p3v>;
                                 status = "okay";
                         };
 
@@ -50,6 +52,18 @@
                 };
         };
 
+        regulators {
+                compatible = "simple-bus";
+
+                reg_3p3v: 3p3v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P3V";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+        };
+
         leds {
                 compatible = "gpio-leds";
 
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 08d920de7286..4663a4e5a285 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -32,18 +32,52 @@
                         usdhc@02198000 { /* uSDHC3 */
                                 cd-gpios = <&gpio7 0 0>;
                                 wp-gpios = <&gpio7 1 0>;
+                                vmmc-supply = <&reg_3p3v>;
                                 status = "okay";
                         };
 
                         usdhc@0219c000 { /* uSDHC4 */
                                 cd-gpios = <&gpio2 6 0>;
                                 wp-gpios = <&gpio2 7 0>;
+                                vmmc-supply = <&reg_3p3v>;
                                 status = "okay";
                         };
 
                         uart2: uart@021e8000 {
                                 status = "okay";
                         };
+
+                        i2c@021a0000 { /* I2C1 */
+                                status = "okay";
+                                clock-frequency = <100000>;
+
+                                codec: sgtl5000@0a {
+                                        compatible = "fsl,sgtl5000";
+                                        reg = <0x0a>;
+                                        VDDA-supply = <&reg_2p5v>;
+                                        VDDIO-supply = <&reg_3p3v>;
+                                };
+                        };
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_2p5v: 2p5v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "2P5V";
+                        regulator-min-microvolt = <2500000>;
+                        regulator-max-microvolt = <2500000>;
+                        regulator-always-on;
+                };
+
+                reg_3p3v: 3p3v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P3V";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/pxa168-aspenite.dts b/arch/arm/boot/dts/pxa168-aspenite.dts
new file mode 100644
index 000000000000..e762facb3fa4
--- /dev/null
+++ b/arch/arm/boot/dts/pxa168-aspenite.dts
@@ -0,0 +1,38 @@
+/*
+ *  Copyright (C) 2012 Marvell Technology Group Ltd.
+ *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/include/ "pxa168.dtsi"
+
+/ {
+        model = "Marvell PXA168 Aspenite Development Board";
+        compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
+        };
+
+        memory {
+                reg = <0x00000000 0x04000000>;
+        };
+
+        soc {
+                apb@d4000000 {
+                        uart1: uart@d4017000 {
+                                status = "okay";
+                        };
+                        twsi1: i2c@d4011000 {
+                                status = "okay";
+                        };
+                        rtc: rtc@d4010000 {
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
new file mode 100644
index 000000000000..d32d5128f225
--- /dev/null
+++ b/arch/arm/boot/dts/pxa168.dtsi
@@ -0,0 +1,98 @@
+/*
+ *  Copyright (C) 2012 Marvell Technology Group Ltd.
+ *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        aliases {
+                serial0 = &uart1;
+                serial1 = &uart2;
+                serial2 = &uart3;
+                i2c0 = &twsi1;
+                i2c1 = &twsi2;
+        };
+
+        intc: intc-interrupt-controller@d4282000 {
+                compatible = "mrvl,mmp-intc", "mrvl,intc";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0xd4282000 0x1000>;
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                interrupt-parent = <&intc>;
+                ranges;
+
+                apb@d4000000 {  /* APB */
+                        compatible = "mrvl,apb-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0xd4000000 0x00200000>;
+                        ranges;
+
+                        uart1: uart@d4017000 {
+                                compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                                reg = <0xd4017000 0x1000>;
+                                interrupts = <27>;
+                                status = "disabled";
+                        };
+
+                        uart2: uart@d4018000 {
+                                compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                                reg = <0xd4018000 0x1000>;
+                                interrupts = <28>;
+                                status = "disabled";
+                        };
+
+                        uart3: uart@d4026000 {
+                                compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                                reg = <0xd4026000 0x1000>;
+                                interrupts = <29>;
+                                status = "disabled";
+                        };
+
+                        gpio: gpio@d4019000 {
+                                compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
+                                reg = <0xd4019000 0x1000>;
+                                interrupts = <49>;
+                                interrupt-names = "gpio_mux";
+                                gpio-controller;
+                                #gpio-cells = <1>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        twsi1: i2c@d4011000 {
+                                compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                                reg = <0xd4011000 0x1000>;
+                                interrupts = <7>;
+                                mrvl,i2c-fast-mode;
+                                status = "disabled";
+                        };
+
+                        twsi2: i2c@d4025000 {
+                                compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                                reg = <0xd4025000 0x1000>;
+                                interrupts = <58>;
+                                status = "disabled";
+                        };
+
+                        rtc: rtc@d4010000 {
+                                compatible = "mrvl,mmp-rtc";
+                                reg = <0xd4010000 0x1000>;
+                                interrupts = <5 6>;
+                                interrupt-names = "rtc 1Hz", "rtc alarm";
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts
index 70c41fc897d7..73263501f581 100644
--- a/arch/arm/boot/dts/tegra-cardhu.dts
+++ b/arch/arm/boot/dts/tegra-cardhu.dts
@@ -33,4 +33,22 @@
         i2c@7000d000 {
                 clock-frequency = <100000>;
         };
+
+        sdhci@78000000 {
+                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+                wp-gpios = <&gpio 155 0>; /* gpio PT3 */
+                power-gpios = <&gpio 31 0>; /* gpio PD7 */
+        };
+
+        sdhci@78000200 {
+                status = "disable";
+        };
+
+        sdhci@78000400 {
+                status = "disable";
+        };
+
+        sdhci@78000400 {
+                support-8bit;
+        };
 };
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 80afa1b70b80..6e8447dc0202 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -10,19 +10,25 @@
                 reg = < 0x00000000 0x40000000 >;
         };
 
+        pmc@7000f400 {
+                nvidia,invert-interrupt;
+        };
+
         i2c@7000c000 {
                 clock-frequency = <400000>;
 
-                codec: wm8903@1a {
+                wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
-                        interrupts = < 347 >;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
 
                         gpio-controller;
                         #gpio-cells = <2>;
 
-                        /* 0x8000 = Not configured */
-                        gpio-cfg = < 0x8000 0x8000 0 0x8000 0x8000 >;
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
                 };
         };
 
@@ -38,13 +44,32 @@
                 clock-frequency = <400000>;
         };
 
-        sound {
-                compatible = "nvidia,harmony-sound", "nvidia,tegra-wm8903";
+        i2s@70002a00 {
+                status = "disable";
+        };
 
-                spkr-en-gpios = <&codec 2 0>;
-                hp-det-gpios = <&gpio 178 0>;
-                int-mic-en-gpios = <&gpio 184 0>;
-                ext-mic-en-gpios = <&gpio 185 0>;
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-harmony",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Harmony";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1L", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
         };
 
         serial@70006000 {
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 825d2957da0b..3c1ff5a43fb7 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -12,6 +12,13 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                alc5632: alc5632@1e {
+                        compatible = "realtek,alc5632";
+                        reg = <0x1e>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
         };
 
         i2c@7000c400 {
@@ -37,6 +44,30 @@
                 clock-frequency = <400000>;
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-alc5632-paz00",
+                        "nvidia,tegra-audio-alc5632";
+
+                nvidia,model = "Compal PAZ00";
+
+                nvidia,audio-routing =
+                        "Int Spk", "SPKOUT",
+                        "Int Spk", "SPKOUTN",
+                        "Headset Mic", "MICBIAS1",
+                        "MIC1", "Headset Mic",
+                        "Headset Stereophone", "HPR",
+                        "Headset Stereophone", "HPL",
+                        "DMICDAT", "Digital Mic";
+
+                nvidia,audio-codec = <&alc5632>;
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+        };
+
         serial@70006000 {
                 clock-frequency = <216000000>;
         };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index b55a02e34ba7..876d5c92ce36 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -13,6 +13,20 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                wm8903: wm8903@1a {
+                        compatible = "wlf,wm8903";
+                        reg = <0x1a>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                };
         };
 
         i2c@7000c400 {
@@ -32,6 +46,32 @@
                 };
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-seaboard",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Seaboard";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1R", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
+        };
+
         serial@70006000 {
                 status = "disable";
         };
@@ -93,4 +133,42 @@
                         gpio-key,wakeup;
                 };
         };
+
+        emc@7000f400 {
+                emc-table@190000 {
+                        reg = < 190000 >;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 190000 >;
+                        nvidia,emc-registers = < 0x0000000c 0x00000026
+                                0x00000009 0x00000003 0x00000004 0x00000004
+                                0x00000002 0x0000000c 0x00000003 0x00000003
+                                0x00000002 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x0000059f
+                                0x00000000 0x00000003 0x00000003 0x00000003
+                                0x00000003 0x00000001 0x0000000b 0x000000c8
+                                0x00000003 0x00000007 0x00000004 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xa06204ae
+                                0x007dc010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000 >;
+                };
+
+                emc-table@380000 {
+                        reg = < 380000 >;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 380000 >;
+                        nvidia,emc-registers = < 0x00000017 0x0000004b
+                                0x00000012 0x00000006 0x00000004 0x00000005
+                                0x00000003 0x0000000c 0x00000006 0x00000006
+                                0x00000003 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x00000b5f
+                                0x00000000 0x00000003 0x00000003 0x00000006
+                                0x00000006 0x00000001 0x00000011 0x000000c8
+                                0x00000003 0x0000000e 0x00000007 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xe044048b
+                                0x007d8010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000 >;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index 3b3ee7db99f3..252476867b54 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -26,6 +26,18 @@
                 status = "disable";
         };
 
+        i2s@70002800 {
+                status = "disable";
+        };
+
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        das@70000c00 {
+                status = "disable";
+        };
+
         serial@70006000 {
                 clock-frequency = < 216000000 >;
         };
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index c7d3b87f29df..2dcff8728e90 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -12,6 +12,20 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                wm8903: wm8903@1a {
+                        compatible = "wlf,wm8903";
+                        reg = <0x1a>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                };
         };
 
         i2c@7000c400 {
@@ -26,6 +40,34 @@
                 clock-frequency = <400000>;
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-ventana",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Ventana";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1L", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
+        };
+
         serial@70006000 {
                 status = "disable";
         };
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 3da7afd45322..d2bc7e7ad06d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,11 @@
         compatible = "nvidia,tegra20";
         interrupt-parent = <&intc>;
 
+        pmc@7000f400 {
+                compatible = "nvidia,tegra20-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
         intc: interrupt-controller@50041000 {
                 compatible = "arm,cortex-a9-gic";
                 interrupt-controller;
@@ -12,6 +17,33 @@
                       < 0x50040100 0x0100 >;
         };
 
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <0 56 0x04
+                              0 57 0x04>;
+        };
+
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1200>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04 >;
+        };
+
         i2c@7000c000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -44,18 +76,18 @@
                 interrupts = < 0 53 0x04 >;
         };
 
-        i2s@70002800 {
+        tegra_i2s1: i2s@70002800 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002800 0x200>;
                 interrupts = < 0 13 0x04 >;
-                dma-channel = < 2 >;
+                nvidia,dma-request-selector = < &apbdma 2 >;
         };
 
-        i2s@70002a00 {
+        tegra_i2s2: i2s@70002a00 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002a00 0x200>;
                 interrupts = < 0 3 0x04 >;
-                dma-channel = < 1 >;
+                nvidia,dma-request-selector = < &apbdma 1 >;
         };
 
         das@70000c00 {
@@ -120,6 +152,13 @@
                 interrupts = < 0 91 0x04 >;
         };
 
+        emc@7000f400 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-emc";
+                reg = <0x7000f400 0x200>;
+        };
+
         sdhci@c8000000 {
                 compatible = "nvidia,tegra20-sdhci";
                 reg = <0xc8000000 0x200>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ee7db9892e02..e957051f8645 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,11 @@
         compatible = "nvidia,tegra30";
         interrupt-parent = <&intc>;
 
+        pmc@7000f400 {
+                compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
         intc: interrupt-controller@50041000 {
                 compatible = "arm,cortex-a9-gic";
                 interrupt-controller;
@@ -12,6 +17,51 @@
                       < 0x50040100 0x0100 >;
         };
 
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <0 144 0x04
+                              0 145 0x04
+                              0 146 0x04
+                              0 147 0x04>;
+        };
+
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1400>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04
+                               0 128 0x04
+                               0 129 0x04
+                               0 130 0x04
+                               0 131 0x04
+                               0 132 0x04
+                               0 133 0x04
+                               0 134 0x04
+                               0 135 0x04
+                               0 136 0x04
+                               0 137 0x04
+                               0 138 0x04
+                               0 139 0x04
+                               0 140 0x04
+                               0 141 0x04
+                               0 142 0x04
+                               0 143 0x04 >;
+        };
+
         i2c@7000c000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -55,7 +105,14 @@
         gpio: gpio@6000d000 {
                 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
                 reg = < 0x6000d000 0x1000 >;
-                interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >;
+                interrupts = < 0 32 0x04
+                               0 33 0x04
+                               0 34 0x04
+                               0 35 0x04
+                               0 55 0x04
+                               0 87 0x04
+                               0 89 0x04
+                               0 125 0x04 >;
                 #gpio-cells = <2>;
                 gpio-controller;
         };
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index f04b535477f5..d74545a2a77c 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -32,4 +32,27 @@
                         };
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                user_led {
+                        label = "user_led";
+                        gpios = <&pioB 21 1>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                user_pb {
+                        label = "user_pb";
+                        gpios = <&pioB 10 1>;
+                        linux,code = <28>;
+                        gpio-key,wakeup;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
new file mode 100644
index 000000000000..16076e2d0934
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -0,0 +1,201 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * Motherboard Express uATX
+ * V2M-P1
+ *
+ * HBI-0190D
+ *
+ * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
+ * Technical Reference Manual)
+ *
+ * WARNING! The hardware described in this file is independent from the
+ * original variant (vexpress-v2m.dtsi), but there is a strong
+ * correspondence between the two configurations.
+ *
+ * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
+ * CHANGES TO vexpress-v2m.dtsi!
+ */
+
+/ {
+        aliases {
+                arm,v2m_timer = &v2m_timer01;
+        };
+
+        motherboard {
+                compatible = "simple-bus";
+                arm,v2m-memory-map = "rs1";
+                #address-cells = <2>; /* SMB chipselect number and offset */
+                #size-cells = <1>;
+                #interrupt-cells = <1>;
+
+                flash@0,00000000 {
+                        compatible = "arm,vexpress-flash", "cfi-flash";
+                        reg = <0 0x00000000 0x04000000>,
+                              <4 0x00000000 0x04000000>;
+                        bank-width = <4>;
+                };
+
+                psram@1,00000000 {
+                        compatible = "arm,vexpress-psram", "mtd-ram";
+                        reg = <1 0x00000000 0x02000000>;
+                        bank-width = <4>;
+                };
+
+                vram@2,00000000 {
+                        compatible = "arm,vexpress-vram";
+                        reg = <2 0x00000000 0x00800000>;
+                };
+
+                ethernet@2,02000000 {
+                        compatible = "smsc,lan9118", "smsc,lan9115";
+                        reg = <2 0x02000000 0x10000>;
+                        interrupts = <15>;
+                        phy-mode = "mii";
+                        reg-io-width = <4>;
+                        smsc,irq-active-high;
+                        smsc,irq-push-pull;
+                };
+
+                usb@2,03000000 {
+                        compatible = "nxp,usb-isp1761";
+                        reg = <2 0x03000000 0x20000>;
+                        interrupts = <16>;
+                        port1-otg;
+                };
+
+                iofpga@3,00000000 {
+                        compatible = "arm,amba-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 3 0 0x200000>;
+
+                        sysreg@010000 {
+                                compatible = "arm,vexpress-sysreg";
+                                reg = <0x010000 0x1000>;
+                        };
+
+                        sysctl@020000 {
+                                compatible = "arm,sp810", "arm,primecell";
+                                reg = <0x020000 0x1000>;
+                        };
+
+                        /* PCI-E I2C bus */
+                        v2m_i2c_pcie: i2c@030000 {
+                                compatible = "arm,versatile-i2c";
+                                reg = <0x030000 0x1000>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                pcie-switch@60 {
+                                        compatible = "idt,89hpes32h8";
+                                        reg = <0x60>;
+                                };
+                        };
+
+                        aaci@040000 {
+                                compatible = "arm,pl041", "arm,primecell";
+                                reg = <0x040000 0x1000>;
+                                interrupts = <11>;
+                        };
+
+                        mmci@050000 {
+                                compatible = "arm,pl180", "arm,primecell";
+                                reg = <0x050000 0x1000>;
+                                interrupts = <9 10>;
+                        };
+
+                        kmi@060000 {
+                                compatible = "arm,pl050", "arm,primecell";
+                                reg = <0x060000 0x1000>;
+                                interrupts = <12>;
+                        };
+
+                        kmi@070000 {
+                                compatible = "arm,pl050", "arm,primecell";
+                                reg = <0x070000 0x1000>;
+                                interrupts = <13>;
+                        };
+
+                        v2m_serial0: uart@090000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x090000 0x1000>;
+                                interrupts = <5>;
+                        };
+
+                        v2m_serial1: uart@0a0000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0a0000 0x1000>;
+                                interrupts = <6>;
+                        };
+
+                        v2m_serial2: uart@0b0000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0b0000 0x1000>;
+                                interrupts = <7>;
+                        };
+
+                        v2m_serial3: uart@0c0000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0c0000 0x1000>;
+                                interrupts = <8>;
+                        };
+
+                        wdt@0f0000 {
+                                compatible = "arm,sp805", "arm,primecell";
+                                reg = <0x0f0000 0x1000>;
+                                interrupts = <0>;
+                        };
+
+                        v2m_timer01: timer@110000 {
+                                compatible = "arm,sp804", "arm,primecell";
+                                reg = <0x110000 0x1000>;
+                                interrupts = <2>;
+                        };
+
+                        v2m_timer23: timer@120000 {
+                                compatible = "arm,sp804", "arm,primecell";
+                                reg = <0x120000 0x1000>;
+                        };
+
+                        /* DVI I2C bus */
+                        v2m_i2c_dvi: i2c@160000 {
+                                compatible = "arm,versatile-i2c";
+                                reg = <0x160000 0x1000>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                dvi-transmitter@39 {
+                                        compatible = "sil,sii9022-tpi", "sil,sii9022";
+                                        reg = <0x39>;
+                                };
+
+                                dvi-transmitter@60 {
+                                        compatible = "sil,sii9022-cpi", "sil,sii9022";
+                                        reg = <0x60>;
+                                };
+                        };
+
+                        rtc@170000 {
+                                compatible = "arm,pl031", "arm,primecell";
+                                reg = <0x170000 0x1000>;
+                                interrupts = <4>;
+                        };
+
+                        compact-flash@1a0000 {
+                                compatible = "arm,vexpress-cf", "ata-generic";
+                                reg = <0x1a0000 0x100
+                                       0x1a0100 0xf00>;
+                                reg-shift = <2>;
+                        };
+
+                        clcd@1f0000 {
+                                compatible = "arm,pl111", "arm,primecell";
+                                reg = <0x1f0000 0x1000>;
+                                interrupts = <14>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
new file mode 100644
index 000000000000..a6c9c7c82d53
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -0,0 +1,200 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * Motherboard Express uATX
+ * V2M-P1
+ *
+ * HBI-0190D
+ *
+ * Original memory map ("Legacy memory map" in the board's
+ * Technical Reference Manual)
+ *
+ * WARNING! The hardware described in this file is independent from the
+ * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
+ * correspondence between the two configurations.
+ *
+ * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
+ * CHANGES TO vexpress-v2m-rs1.dtsi!
+ */
+
+/ {
+        aliases {
+                arm,v2m_timer = &v2m_timer01;
+        };
+
+        motherboard {
+                compatible = "simple-bus";
+                #address-cells = <2>; /* SMB chipselect number and offset */
+                #size-cells = <1>;
+                #interrupt-cells = <1>;
+
+                flash@0,00000000 {
+                        compatible = "arm,vexpress-flash", "cfi-flash";
+                        reg = <0 0x00000000 0x04000000>,
+                              <1 0x00000000 0x04000000>;
+                        bank-width = <4>;
+                };
+
+                psram@2,00000000 {
+                        compatible = "arm,vexpress-psram", "mtd-ram";
+                        reg = <2 0x00000000 0x02000000>;
+                        bank-width = <4>;
+                };
+
+                vram@3,00000000 {
+                        compatible = "arm,vexpress-vram";
+                        reg = <3 0x00000000 0x00800000>;
+                };
+
+                ethernet@3,02000000 {
+                        compatible = "smsc,lan9118", "smsc,lan9115";
+                        reg = <3 0x02000000 0x10000>;
+                        interrupts = <15>;
+                        phy-mode = "mii";
+                        reg-io-width = <4>;
+                        smsc,irq-active-high;
+                        smsc,irq-push-pull;
+                };
+
+                usb@3,03000000 {
+                        compatible = "nxp,usb-isp1761";
+                        reg = <3 0x03000000 0x20000>;
+                        interrupts = <16>;
+                        port1-otg;
+                };
+
+                iofpga@7,00000000 {
+                        compatible = "arm,amba-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 7 0 0x20000>;
+
+                        sysreg@00000 {
+                                compatible = "arm,vexpress-sysreg";
+                                reg = <0x00000 0x1000>;
+                        };
+
+                        sysctl@01000 {
+                                compatible = "arm,sp810", "arm,primecell";
+                                reg = <0x01000 0x1000>;
+                        };
+
+                        /* PCI-E I2C bus */
+                        v2m_i2c_pcie: i2c@02000 {
+                                compatible = "arm,versatile-i2c";
+                                reg = <0x02000 0x1000>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                pcie-switch@60 {
+                                        compatible = "idt,89hpes32h8";
+                                        reg = <0x60>;
+                                };
+                        };
+
+                        aaci@04000 {
+                                compatible = "arm,pl041", "arm,primecell";
+                                reg = <0x04000 0x1000>;
+                                interrupts = <11>;
+                        };
+
+                        mmci@05000 {
+                                compatible = "arm,pl180", "arm,primecell";
+                                reg = <0x05000 0x1000>;
+                                interrupts = <9 10>;
+                        };
+
+                        kmi@06000 {
+                                compatible = "arm,pl050", "arm,primecell";
+                                reg = <0x06000 0x1000>;
+                                interrupts = <12>;
+                        };
+
+                        kmi@07000 {
+                                compatible = "arm,pl050", "arm,primecell";
+                                reg = <0x07000 0x1000>;
+                                interrupts = <13>;
+                        };
+
+                        v2m_serial0: uart@09000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x09000 0x1000>;
+                                interrupts = <5>;
+                        };
+
+                        v2m_serial1: uart@0a000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0a000 0x1000>;
+                                interrupts = <6>;
+                        };
+
+                        v2m_serial2: uart@0b000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0b000 0x1000>;
+                                interrupts = <7>;
+                        };
+
+                        v2m_serial3: uart@0c000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x0c000 0x1000>;
+                                interrupts = <8>;
+                        };
+
+                        wdt@0f000 {
+                                compatible = "arm,sp805", "arm,primecell";
+                                reg = <0x0f000 0x1000>;
+                                interrupts = <0>;
+                        };
+
+                        v2m_timer01: timer@11000 {
+                                compatible = "arm,sp804", "arm,primecell";
+                                reg = <0x11000 0x1000>;
+                                interrupts = <2>;
+                        };
+
+                        v2m_timer23: timer@12000 {
+                                compatible = "arm,sp804", "arm,primecell";
+                                reg = <0x12000 0x1000>;
+                        };
+
+                        /* DVI I2C bus */
+                        v2m_i2c_dvi: i2c@16000 {
+                                compatible = "arm,versatile-i2c";
+                                reg = <0x16000 0x1000>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                dvi-transmitter@39 {
+                                        compatible = "sil,sii9022-tpi", "sil,sii9022";
+                                        reg = <0x39>;
+                                };
+
+                                dvi-transmitter@60 {
+                                        compatible = "sil,sii9022-cpi", "sil,sii9022";
+                                        reg = <0x60>;
+                                };
+                        };
+
+                        rtc@17000 {
+                                compatible = "arm,pl031", "arm,primecell";
+                                reg = <0x17000 0x1000>;
+                                interrupts = <4>;
+                        };
+
+                        compact-flash@1a000 {
+                                compatible = "arm,vexpress-cf", "ata-generic";
+                                reg = <0x1a000 0x100
+                                       0x1a100 0xf00>;
+                                reg-shift = <2>;
+                        };
+
+                        clcd@1f000 {
+                                compatible = "arm,pl111", "arm,primecell";
+                                reg = <0x1f000 0x1000>;
+                                interrupts = <14>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
new file mode 100644
index 000000000000..941b161ab78c
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -0,0 +1,157 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * CoreTile Express A15x2 (version with Test Chip 1)
+ * Cortex-A15 MPCore (V2P-CA15)
+ *
+ * HBI-0237A
+ */
+
+/dts-v1/;
+
+/ {
+        model = "V2P-CA15";
+        arm,hbi = <0x237>;
+        compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        chosen { };
+
+        aliases {
+                serial0 = &v2m_serial0;
+                serial1 = &v2m_serial1;
+                serial2 = &v2m_serial2;
+                serial3 = &v2m_serial3;
+                i2c0 = &v2m_i2c_dvi;
+                i2c1 = &v2m_i2c_pcie;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <1>;
+                };
+        };
+
+        memory@80000000 {
+                device_type = "memory";
+                reg = <0x80000000 0x40000000>;
+        };
+
+        hdlcd@2b000000 {
+                compatible = "arm,hdlcd";
+                reg = <0x2b000000 0x1000>;
+                interrupts = <0 85 4>;
+        };
+
+        memory-controller@2b0a0000 {
+                compatible = "arm,pl341", "arm,primecell";
+                reg = <0x2b0a0000 0x1000>;
+        };
+
+        wdt@2b060000 {
+                compatible = "arm,sp805", "arm,primecell";
+                reg = <0x2b060000 0x1000>;
+                interrupts = <98>;
+        };
+
+        gic: interrupt-controller@2c001000 {
+                compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+                interrupt-controller;
+                reg = <0x2c001000 0x1000>,
+                      <0x2c002000 0x100>;
+        };
+
+        memory-controller@7ffd0000 {
+                compatible = "arm,pl354", "arm,primecell";
+                reg = <0x7ffd0000 0x1000>;
+                interrupts = <0 86 4>,
+                             <0 87 4>;
+        };
+
+        dma@7ffb0000 {
+                compatible = "arm,pl330", "arm,primecell";
+                reg = <0x7ffb0000 0x1000>;
+                interrupts = <0 92 4>,
+                             <0 88 4>,
+                             <0 89 4>,
+                             <0 90 4>,
+                             <0 91 4>;
+        };
+
+        pmu {
+                compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
+                interrupts = <0 68 4>,
+                             <0 69 4>;
+        };
+
+        motherboard {
+                ranges = <0 0 0x08000000 0x04000000>,
+                         <1 0 0x14000000 0x04000000>,
+                         <2 0 0x18000000 0x04000000>,
+                         <3 0 0x1c000000 0x04000000>,
+                         <4 0 0x0c000000 0x04000000>,
+                         <5 0 0x10000000 0x04000000>;
+
+                interrupt-map-mask = <0 0 63>;
+                interrupt-map = <0 0  0 &gic 0  0 4>,
+                                <0 0  1 &gic 0  1 4>,
+                                <0 0  2 &gic 0  2 4>,
+                                <0 0  3 &gic 0  3 4>,
+                                <0 0  4 &gic 0  4 4>,
+                                <0 0  5 &gic 0  5 4>,
+                                <0 0  6 &gic 0  6 4>,
+                                <0 0  7 &gic 0  7 4>,
+                                <0 0  8 &gic 0  8 4>,
+                                <0 0  9 &gic 0  9 4>,
+                                <0 0 10 &gic 0 10 4>,
+                                <0 0 11 &gic 0 11 4>,
+                                <0 0 12 &gic 0 12 4>,
+                                <0 0 13 &gic 0 13 4>,
+                                <0 0 14 &gic 0 14 4>,
+                                <0 0 15 &gic 0 15 4>,
+                                <0 0 16 &gic 0 16 4>,
+                                <0 0 17 &gic 0 17 4>,
+                                <0 0 18 &gic 0 18 4>,
+                                <0 0 19 &gic 0 19 4>,
+                                <0 0 20 &gic 0 20 4>,
+                                <0 0 21 &gic 0 21 4>,
+                                <0 0 22 &gic 0 22 4>,
+                                <0 0 23 &gic 0 23 4>,
+                                <0 0 24 &gic 0 24 4>,
+                                <0 0 25 &gic 0 25 4>,
+                                <0 0 26 &gic 0 26 4>,
+                                <0 0 27 &gic 0 27 4>,
+                                <0 0 28 &gic 0 28 4>,
+                                <0 0 29 &gic 0 29 4>,
+                                <0 0 30 &gic 0 30 4>,
+                                <0 0 31 &gic 0 31 4>,
+                                <0 0 32 &gic 0 32 4>,
+                                <0 0 33 &gic 0 33 4>,
+                                <0 0 34 &gic 0 34 4>,
+                                <0 0 35 &gic 0 35 4>,
+                                <0 0 36 &gic 0 36 4>,
+                                <0 0 37 &gic 0 37 4>,
+                                <0 0 38 &gic 0 38 4>,
+                                <0 0 39 &gic 0 39 4>,
+                                <0 0 40 &gic 0 40 4>,
+                                <0 0 41 &gic 0 41 4>,
+                                <0 0 42 &gic 0 42 4>;
+        };
+};
+
+/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
new file mode 100644
index 000000000000..6905e66d4748
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -0,0 +1,162 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * CoreTile Express A5x2
+ * Cortex-A5 MPCore (V2P-CA5s)
+ *
+ * HBI-0225B
+ */
+
+/dts-v1/;
+
+/ {
+        model = "V2P-CA5s";
+        arm,hbi = <0x225>;
+        compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        chosen { };
+
+        aliases {
+                serial0 = &v2m_serial0;
+                serial1 = &v2m_serial1;
+                serial2 = &v2m_serial2;
+                serial3 = &v2m_serial3;
+                i2c0 = &v2m_i2c_dvi;
+                i2c1 = &v2m_i2c_pcie;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a5";
+                        reg = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a5";
+                        reg = <1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory@80000000 {
+                device_type = "memory";
+                reg = <0x80000000 0x40000000>;
+        };
+
+        hdlcd@2a110000 {
+                compatible = "arm,hdlcd";
+                reg = <0x2a110000 0x1000>;
+                interrupts = <0 85 4>;
+        };
+
+        memory-controller@2a150000 {
+                compatible = "arm,pl341", "arm,primecell";
+                reg = <0x2a150000 0x1000>;
+        };
+
+        memory-controller@2a190000 {
+                compatible = "arm,pl354", "arm,primecell";
+                reg = <0x2a190000 0x1000>;
+                interrupts = <0 86 4>,
+                             <0 87 4>;
+        };
+
+        scu@2c000000 {
+                compatible = "arm,cortex-a5-scu";
+                reg = <0x2c000000 0x58>;
+        };
+
+        timer@2c000600 {
+                compatible = "arm,cortex-a5-twd-timer";
+                reg = <0x2c000600 0x38>;
+                interrupts = <1 2 0x304>,
+                             <1 3 0x304>;
+        };
+
+        gic: interrupt-controller@2c001000 {
+                compatible = "arm,corex-a5-gic", "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+                interrupt-controller;
+                reg = <0x2c001000 0x1000>,
+                      <0x2c000100 0x100>;
+        };
+
+        L2: cache-controller@2c0f0000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x2c0f0000 0x1000>;
+                interrupts = <0 84 4>;
+                cache-level = <2>;
+        };
+
+        pmu {
+                compatible = "arm,cortex-a5-pmu", "arm,cortex-a9-pmu";
+                interrupts = <0 68 4>,
+                             <0 69 4>;
+        };
+
+        motherboard {
+                ranges = <0 0 0x08000000 0x04000000>,
+                         <1 0 0x14000000 0x04000000>,
+                         <2 0 0x18000000 0x04000000>,
+                         <3 0 0x1c000000 0x04000000>,
+                         <4 0 0x0c000000 0x04000000>,
+                         <5 0 0x10000000 0x04000000>;
+
+                interrupt-map-mask = <0 0 63>;
+                interrupt-map = <0 0  0 &gic 0  0 4>,
+                                <0 0  1 &gic 0  1 4>,
+                                <0 0  2 &gic 0  2 4>,
+                                <0 0  3 &gic 0  3 4>,
+                                <0 0  4 &gic 0  4 4>,
+                                <0 0  5 &gic 0  5 4>,
+                                <0 0  6 &gic 0  6 4>,
+                                <0 0  7 &gic 0  7 4>,
+                                <0 0  8 &gic 0  8 4>,
+                                <0 0  9 &gic 0  9 4>,
+                                <0 0 10 &gic 0 10 4>,
+                                <0 0 11 &gic 0 11 4>,
+                                <0 0 12 &gic 0 12 4>,
+                                <0 0 13 &gic 0 13 4>,
+                                <0 0 14 &gic 0 14 4>,
+                                <0 0 15 &gic 0 15 4>,
+                                <0 0 16 &gic 0 16 4>,
+                                <0 0 17 &gic 0 17 4>,
+                                <0 0 18 &gic 0 18 4>,
+                                <0 0 19 &gic 0 19 4>,
+                                <0 0 20 &gic 0 20 4>,
+                                <0 0 21 &gic 0 21 4>,
+                                <0 0 22 &gic 0 22 4>,
+                                <0 0 23 &gic 0 23 4>,
+                                <0 0 24 &gic 0 24 4>,
+                                <0 0 25 &gic 0 25 4>,
+                                <0 0 26 &gic 0 26 4>,
+                                <0 0 27 &gic 0 27 4>,
+                                <0 0 28 &gic 0 28 4>,
+                                <0 0 29 &gic 0 29 4>,
+                                <0 0 30 &gic 0 30 4>,
+                                <0 0 31 &gic 0 31 4>,
+                                <0 0 32 &gic 0 32 4>,
+                                <0 0 33 &gic 0 33 4>,
+                                <0 0 34 &gic 0 34 4>,
+                                <0 0 35 &gic 0 35 4>,
+                                <0 0 36 &gic 0 36 4>,
+                                <0 0 37 &gic 0 37 4>,
+                                <0 0 38 &gic 0 38 4>,
+                                <0 0 39 &gic 0 39 4>,
+                                <0 0 40 &gic 0 40 4>,
+                                <0 0 41 &gic 0 41 4>,
+                                <0 0 42 &gic 0 42 4>;
+        };
+};
+
+/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
new file mode 100644
index 000000000000..da778693be54
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -0,0 +1,192 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * CoreTile Express A9x4
+ * Cortex-A9 MPCore (V2P-CA9)
+ *
+ * HBI-0191B
+ */
+
+/dts-v1/;
+
+/ {
+        model = "V2P-CA9";
+        arm,hbi = <0x191>;
+        compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        chosen { };
+
+        aliases {
+                serial0 = &v2m_serial0;
+                serial1 = &v2m_serial1;
+                serial2 = &v2m_serial2;
+                serial3 = &v2m_serial3;
+                i2c0 = &v2m_i2c_dvi;
+                i2c1 = &v2m_i2c_pcie;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        reg = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        reg = <1>;
+                        next-level-cache = <&L2>;
+                };
+
+                cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        reg = <2>;
+                        next-level-cache = <&L2>;
+                };
+
+                cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        reg = <3>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory@60000000 {
+                device_type = "memory";
+                reg = <0x60000000 0x40000000>;
+        };
+
+        clcd@10020000 {
+                compatible = "arm,pl111", "arm,primecell";
+                reg = <0x10020000 0x1000>;
+                interrupts = <0 44 4>;
+        };
+
+        memory-controller@100e0000 {
+                compatible = "arm,pl341", "arm,primecell";
+                reg = <0x100e0000 0x1000>;
+        };
+
+        memory-controller@100e1000 {
+                compatible = "arm,pl354", "arm,primecell";
+                reg = <0x100e1000 0x1000>;
+                interrupts = <0 45 4>,
+                             <0 46 4>;
+        };
+
+        timer@100e4000 {
+                compatible = "arm,sp804", "arm,primecell";
+                reg = <0x100e4000 0x1000>;
+                interrupts = <0 48 4>,
+                             <0 49 4>;
+        };
+
+        watchdog@100e5000 {
+                compatible = "arm,sp805", "arm,primecell";
+                reg = <0x100e5000 0x1000>;
+                interrupts = <0 51 4>;
+        };
+
+        scu@1e000000 {
+                compatible = "arm,cortex-a9-scu";
+                reg = <0x1e000000 0x58>;
+        };
+
+        timer@1e000600 {
+                compatible = "arm,cortex-a9-twd-timer";
+                reg = <0x1e000600 0x20>;
+                interrupts = <1 2 0xf04>,
+                             <1 3 0xf04>;
+        };
+
+        gic: interrupt-controller@1e001000 {
+                compatible = "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+                interrupt-controller;
+                reg = <0x1e001000 0x1000>,
+                      <0x1e000100 0x100>;
+        };
+
+        L2: cache-controller@1e00a000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x1e00a000 0x1000>;
+                interrupts = <0 43 4>;
+                cache-level = <2>;
+                arm,data-latency = <1 1 1>;
+                arm,tag-latency = <1 1 1>;
+        };
+
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <0 60 4>,
+                             <0 61 4>,
+                             <0 62 4>,
+                             <0 63 4>;
+        };
+
+        motherboard {
+                ranges = <0 0 0x40000000 0x04000000>,
+                         <1 0 0x44000000 0x04000000>,
+                         <2 0 0x48000000 0x04000000>,
+                         <3 0 0x4c000000 0x04000000>,
+                         <7 0 0x10000000 0x00020000>;
+
+                interrupt-map-mask = <0 0 63>;
+                interrupt-map = <0 0  0 &gic 0  0 4>,
+                                <0 0  1 &gic 0  1 4>,
+                                <0 0  2 &gic 0  2 4>,
+                                <0 0  3 &gic 0  3 4>,
+                                <0 0  4 &gic 0  4 4>,
+                                <0 0  5 &gic 0  5 4>,
+                                <0 0  6 &gic 0  6 4>,
+                                <0 0  7 &gic 0  7 4>,
+                                <0 0  8 &gic 0  8 4>,
+                                <0 0  9 &gic 0  9 4>,
+                                <0 0 10 &gic 0 10 4>,
+                                <0 0 11 &gic 0 11 4>,
+                                <0 0 12 &gic 0 12 4>,
+                                <0 0 13 &gic 0 13 4>,
+                                <0 0 14 &gic 0 14 4>,
+                                <0 0 15 &gic 0 15 4>,
+                                <0 0 16 &gic 0 16 4>,
+                                <0 0 17 &gic 0 17 4>,
+                                <0 0 18 &gic 0 18 4>,
+                                <0 0 19 &gic 0 19 4>,
+                                <0 0 20 &gic 0 20 4>,
+                                <0 0 21 &gic 0 21 4>,
+                                <0 0 22 &gic 0 22 4>,
+                                <0 0 23 &gic 0 23 4>,
+                                <0 0 24 &gic 0 24 4>,
+                                <0 0 25 &gic 0 25 4>,
+                                <0 0 26 &gic 0 26 4>,
+                                <0 0 27 &gic 0 27 4>,
+                                <0 0 28 &gic 0 28 4>,
+                                <0 0 29 &gic 0 29 4>,
+                                <0 0 30 &gic 0 30 4>,
+                                <0 0 31 &gic 0 31 4>,
+                                <0 0 32 &gic 0 32 4>,
+                                <0 0 33 &gic 0 33 4>,
+                                <0 0 34 &gic 0 34 4>,
+                                <0 0 35 &gic 0 35 4>,
+                                <0 0 36 &gic 0 36 4>,
+                                <0 0 37 &gic 0 37 4>,
+                                <0 0 38 &gic 0 38 4>,
+                                <0 0 39 &gic 0 39 4>,
+                                <0 0 40 &gic 0 40 4>,
+                                <0 0 41 &gic 0 41 4>,
+                                <0 0 42 &gic 0 42 4>;
+        };
+};
+
+/include/ "vexpress-v2m.dtsi"
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index d1bcd7b13ebc..fb1f1cfce60c 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -320,13 +320,6 @@ err0:
         return -EBUSY;
 }
 
-/*
- * If we set up a device for bus mastering, we need to check the latency
- * timer as we don't have even crappy BIOSes to set it properly.
- * The implementation is from arch/i386/pci/i386.c
- */
-unsigned int pcibios_max_latency = 255;
-
 /* ITE bridge requires setting latency timer to avoid early bus access
    termination by PCI bus master devices
 */
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index d8e44a43047c..ff3ad2244824 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
         struct pl330_thread *thrd = ch_id;
         struct pl330_dmac *pl330;
         unsigned long flags;
-        int ret = 0, active = thrd->req_running;
+        int ret = 0, active;
 
         if (!thrd || thrd->free || thrd->dmac->state == DYING)
                 return -EINVAL;
 
         pl330 = thrd->dmac;
+        active = thrd->req_running;
 
         spin_lock_irqsave(&pl330->lock, flags);
 
diff --git a/arch/arm/configs/at91cap9_defconfig b/arch/arm/configs/at91cap9_defconfig
deleted file mode 100644
index 8826eb218e73..000000000000
--- a/arch/arm/configs/at91cap9_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91CAP9=y
-CONFIG_MACH_AT91CAP9ADK=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 62f8095d46de..23371b17b23e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -137,6 +137,11 @@
         disable_irq
         .endm
 
+        .macro  save_and_disable_irqs_notrace, oldcpsr
+        mrs     \oldcpsr, cpsr
+        disable_irq_notrace
+        .endm
+
 /*
  * Restore interrupt state previously stored in a register.  We don't
  * guarantee that this will preserve the flags.
diff --git a/arch/arm/include/asm/hardware/arm_timer.h b/arch/arm/include/asm/hardware/arm_timer.h
index c0f4e7bf22de..d6030ff599db 100644
--- a/arch/arm/include/asm/hardware/arm_timer.h
+++ b/arch/arm/include/asm/hardware/arm_timer.h
@@ -9,7 +9,12 @@
  *
  * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
  * can have 16-bit or 32-bit selectable via a bit in the control register.
+ *
+ * Every SP804 contains two identical timers.
  */
+#define TIMER_1_BASE    0x00
+#define TIMER_2_BASE    0x20
+
 #define TIMER_LOAD      0x00                    /* ACVR rw */
 #define TIMER_VALUE     0x04                    /* ACVR ro */
 #define TIMER_CTRL      0x08                    /* ACVR rw */
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
index 575fa8186ca0..c1821385abfa 100644
--- a/arch/arm/include/asm/hardware/pl330.h
+++ b/arch/arm/include/asm/hardware/pl330.h
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
         DCCTRL1, /* Bufferable only */
         DCCTRL2, /* Cacheable, but do not allocate */
         DCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        DINVALID1 = 8,
+        DINVALID1,              /* AWCACHE = 0x1000 */
         DINVALID2,
         DCCTRL6, /* Cacheable write-through, allocate on writes only */
         DCCTRL7, /* Cacheable write-back, allocate on writes only */
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index ce280b8d613c..cb8d638924fd 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,6 +22,7 @@
 #include <asm/hw_breakpoint.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
+#include <asm/system.h>
 
 #ifdef __KERNEL__
 #define STACK_TOP       ((current->personality & ADDR_LIMIT_32BIT) ? \
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index e4c96cc6ec0c..424aa458c487 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -110,6 +110,7 @@ extern void cpu_init(void);
 
 void soft_restart(unsigned long);
 extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_idle)(void);
 
 #define UDBG_UNDEFINED  (1 << 0)
 #define UDBG_SYSCALL    (1 << 1)
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 971d65c253a9..008e7ce766a7 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
 
 static volatile int hlt_counter;
 
-#include <mach/system.h>
-
 void disable_hlt(void)
 {
         hlt_counter++;
@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 
 /*
- * This is our default idle handler.  We need to disable
- * interrupts here to ensure we don't miss a wakeup call.
+ * This is our default idle handler.
  */
+
+void (*arm_pm_idle)(void);
+
 static void default_idle(void)
 {
-        if (!need_resched())
-                arch_idle();
+        if (arm_pm_idle)
+                arm_pm_idle();
+        else
+                cpu_do_idle();
         local_irq_enable();
 }
 
@@ -215,6 +217,10 @@ void cpu_idle(void)
                                 cpu_die();
 #endif
 
+                        /*
+                         * We need to disable interrupts here
+                         * to ensure we don't miss a wakeup call.
+                         */
                         local_irq_disable();
 #ifdef CONFIG_PL310_ERRATA_769419
                         wmb();
@@ -222,19 +228,18 @@ void cpu_idle(void)
                         if (hlt_counter) {
                                 local_irq_enable();
                                 cpu_relax();
-                        } else {
+                        } else if (!need_resched()) {
                                 stop_critical_timings();
                                 if (cpuidle_idle_call())
                                         pm_idle();
                                 start_critical_timings();
                                 /*
-                                 * This will eventually be removed - pm_idle
-                                 * functions should always return with IRQs
-                                 * enabled.
+                                 * pm_idle functions must always
+                                 * return with IRQs enabled.
                                  */
                                 WARN_ON(irqs_disabled());
+                        } else
                                 local_irq_enable();
-                        }
                 }
                 leds_event(led_idle_end);
                 rcu_idle_exit();
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index e33870ff0ac0..ede6443c34d9 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -23,6 +23,7 @@
 #include <linux/perf_event.h>
 #include <linux/hw_breakpoint.h>
 #include <linux/regset.h>
+#include <linux/audit.h>
 
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request,
         return ret;
 }
 
+#ifdef __ARMEB__
+#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
+#else
+#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
+#endif
+
 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
 {
         unsigned long ip;
@@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
         if (!ip)
                 audit_syscall_exit(regs);
         else
-                audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0,
+                audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
                                     regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
 
         if (!test_thread_flag(TIF_SYSCALL_TRACE))
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 4285daa077b0..7a79b24597b2 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = {
 
 static int twd_cpufreq_init(void)
 {
-        if (!IS_ERR(twd_clk))
+        if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
                 return cpufreq_register_notifier(&twd_cpufreq_nb,
                         CPUFREQ_TRANSITION_NOTIFIER);
 
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 71feb00a1e99..e55cdcbd81fb 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -102,13 +102,13 @@ config ARCH_AT91SAM9G45
         select HAVE_AT91_DBGU1
         select AT91_SAM9G45_RESET
 
-config ARCH_AT91CAP9
-        bool "AT91CAP9"
+config ARCH_AT91SAM9X5
+        bool "AT91SAM9x5 family"
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
-        select HAVE_AT91_DBGU1
+        select HAVE_AT91_DBGU0
         select AT91_SAM9G45_RESET
 
 config ARCH_AT91X40
@@ -447,21 +447,6 @@ endif
 
 # ----------------------------------------------------------
 
-if ARCH_AT91CAP9
-
-comment "AT91CAP9 Board Type"
-
-config MACH_AT91CAP9ADK
-        bool "Atmel AT91CAP9A-DK Evaluation Kit"
-        select HAVE_AT91_DATAFLASH_CARD
-        help
-          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
-          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
-
-endif
-
-# ----------------------------------------------------------
-
 if ARCH_AT91X40
 
 comment "AT91X40 Board Type"
@@ -544,7 +529,7 @@ config AT91_EARLY_DBGU0
         depends on HAVE_AT91_DBGU0
 
 config AT91_EARLY_DBGU1
-        bool "DBGU on 9263, 9g45 and cap9"
+        bool "DBGU on 9263 and 9g45"
         depends on HAVE_AT91_DBGU1
 
 config AT91_EARLY_USART0
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 705e1fbded39..8512e53bed93 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_d
 obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9X5)   += at91sam9x5.o at91sam926x_time.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -81,9 +81,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 # AT91SAM board with device-tree
 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
 
-# AT91CAP9 board-specific support
-obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
-
 # AT91X40 board-specific support
 obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
 
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 8ddafadfdc7d..0da66ca4a4f8 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -3,11 +3,7 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
-ifeq ($(CONFIG_ARCH_AT91CAP9),y)
-   zreladdr-y   += 0x70008000
-params_phys-y   := 0x70000100
-initrd_phys-y   := 0x70410000
-else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
+ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
    zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
@@ -17,4 +13,10 @@ params_phys-y	:= 0x20000100
 initrd_phys-y   := 0x20410000
 endif
 
-dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb
+# Keep dtb files sorted alphabetically for each SoC
+# sam9g20
+dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb
+# sam9g45
+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb
+# sam9x5
+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
deleted file mode 100644
index a42edc25a87e..000000000000
--- a/arch/arm/mach-at91/at91cap9.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/module.h>
-
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91_pmc.h>
-
-#include "soc.h"
-#include "generic.h"
-#include "clock.h"
-#include "sam9_smc.h"
-
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-static struct clk pioABCD_clk = {
-        .name           = "pioABCD_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PIOABCD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb0_clk = {
-        .name           = "mpb0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb1_clk = {
-        .name           = "mpb1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb2_clk = {
-        .name           = "mpb2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb3_clk = {
-        .name           = "mpb3_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb4_clk = {
-        .name           = "mpb4_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB4,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can_clk = {
-        .name           = "can_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_CAN,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi_clk = {
-        .name           = "twi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TWI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ac97_clk = {
-        .name           = "ac97_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AC97C,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb_clk = {
-        .name           = "tcb_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TCB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pwm_clk = {
-        .name           = "pwm_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PWMC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk macb_clk = {
-        .name           = "pclk",
-        .pmc_mask       = 1 << AT91CAP9_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk aestdes_clk = {
-        .name           = "aestdes_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AESTDES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ADC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma_clk = {
-        .name           = "dma_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_DMA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ohci_clk = {
-        .name           = "ohci_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UHP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioABCD_clk,
-        &mpb0_clk,
-        &mpb1_clk,
-        &mpb2_clk,
-        &mpb3_clk,
-        &mpb4_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &mmc0_clk,
-        &mmc1_clk,
-        &can_clk,
-        &twi_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &ac97_clk,
-        &tcb_clk,
-        &pwm_clk,
-        &macb_clk,
-        &aestdes_clk,
-        &adc_clk,
-        &isi_clk,
-        &lcdc_clk,
-        &dma_clk,
-        &udphs_clk,
-        &ohci_clk,
-        // irq0 .. irq1
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
-        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
-        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioABCD_clk),
-        CLKDEV_CON_ID("pioB", &pioABCD_clk),
-        CLKDEV_CON_ID("pioC", &pioABCD_clk),
-        CLKDEV_CON_ID("pioD", &pioABCD_clk),
-};
-
-static struct clk_lookup usart_clocks_lookups[] = {
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
-};
-
-/*
- * The four programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-static struct clk pck3 = {
-        .name           = "pck3",
-        .pmc_mask       = AT91_PMC_PCK3,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 3,
-};
-
-static void __init at91cap9_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-        clkdev_add_table(usart_clocks_lookups,
-                         ARRAY_SIZE(usart_clocks_lookups));
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-        clk_register(&pck3);
-}
-
-static struct clk_lookup console_clock_lookup;
-
-void __init at91cap9_set_console_clock(int id)
-{
-        if (id >= ARRAY_SIZE(usart_clocks_lookups))
-                return;
-
-        console_clock_lookup.con_id = "usart";
-        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
-        clkdev_add(&console_clock_lookup);
-}
-
-/* --------------------------------------------------------------------
- *  GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
-        {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOA,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOB,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOC,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOD,
-        }
-};
-
-/* --------------------------------------------------------------------
- *  AT91CAP9 processor initialization
- * -------------------------------------------------------------------- */
-
-static void __init at91cap9_map_io(void)
-{
-        at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
-}
-
-static void __init at91cap9_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
-        at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
-        at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
-}
-
-static void __init at91cap9_initialize(void)
-{
-        arm_pm_restart = at91sam9g45_restart;
-        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
-
-        /* Register GPIO subsystem */
-        at91_gpio_init(at91cap9_gpio, 4);
-
-        /* Remember the silicon revision */
-        if (cpu_is_at91cap9_revB())
-                system_rev = 0xB;
-        else if (cpu_is_at91cap9_revC())
-                system_rev = 0xC;
-}
-
-/* --------------------------------------------------------------------
- *  Interrupt initialization
- * -------------------------------------------------------------------- */
-
-/*
- * The default interrupt priority levels (0 = lowest, 7 = highest).
- */
-static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
-        7,      /* Advanced Interrupt Controller (FIQ) */
-        7,      /* System Peripherals */
-        1,      /* Parallel IO Controller A, B, C and D */
-        0,      /* MP Block Peripheral 0 */
-        0,      /* MP Block Peripheral 1 */
-        0,      /* MP Block Peripheral 2 */
-        0,      /* MP Block Peripheral 3 */
-        0,      /* MP Block Peripheral 4 */
-        5,      /* USART 0 */
-        5,      /* USART 1 */
-        5,      /* USART 2 */
-        0,      /* Multimedia Card Interface 0 */
-        0,      /* Multimedia Card Interface 1 */
-        3,      /* CAN */
-        6,      /* Two-Wire Interface */
-        5,      /* Serial Peripheral Interface 0 */
-        5,      /* Serial Peripheral Interface 1 */
-        4,      /* Serial Synchronous Controller 0 */
-        4,      /* Serial Synchronous Controller 1 */
-        5,      /* AC97 Controller */
-        0,      /* Timer Counter 0, 1 and 2 */
-        0,      /* Pulse Width Modulation Controller */
-        3,      /* Ethernet */
-        0,      /* Advanced Encryption Standard, Triple DES*/
-        0,      /* Analog-to-Digital Converter */
-        0,      /* Image Sensor Interface */
-        3,      /* LCD Controller */
-        0,      /* DMA Controller */
-        2,      /* USB Device Port */
-        2,      /* USB Host port */
-        0,      /* Advanced Interrupt Controller (IRQ0) */
-        0,      /* Advanced Interrupt Controller (IRQ1) */
-};
-
-struct at91_init_soc __initdata at91cap9_soc = {
-        .map_io = at91cap9_map_io,
-        .default_irq_priority = at91cap9_default_irq_priority,
-        .ioremap_registers = at91cap9_ioremap_registers,
-        .register_clocks = at91cap9_register_clocks,
-        .init = at91cap9_initialize,
-};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
deleted file mode 100644
index d298fb7cb210..000000000000
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ /dev/null
@@ -1,1273 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9_devices.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-#include <linux/i2c-gpio.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/board.h>
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-
-#include "generic.h"
-
-
-/* --------------------------------------------------------------------
- *  USB Host
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = DMA_BIT_MASK(32);
-static struct at91_usbh_data usbh_data;
-
-static struct resource usbh_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UHP_BASE,
-                .end    = AT91CAP9_UHP_BASE + SZ_1M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_UHP,
-                .end    = AT91CAP9_ID_UHP,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_usbh_device = {
-        .name           = "at91_ohci",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &usbh_data,
-        },
-        .resource       = usbh_resources,
-        .num_resources  = ARRAY_SIZE(usbh_resources),
-};
-
-void __init at91_add_device_usbh(struct at91_usbh_data *data)
-{
-        int i;
-
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
-
-        /* Enable VBus control for UHP ports */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
-        }
-
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
-        usbh_data = *data;
-        platform_device_register(&at91_usbh_device);
-}
-#else
-void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  USB HS Device (Gadget)
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
-
-static struct resource usba_udc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UDPHS_FIFO,
-                .end    = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_UDPHS,
-                .end    = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [2] = {
-                .start  = AT91CAP9_ID_UDPHS,
-                .end    = AT91CAP9_ID_UDPHS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-#define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
-        [idx] = {                                               \
-                .name           = nam,                          \
-                .index          = idx,                          \
-                .fifo_size      = maxpkt,                       \
-                .nr_banks       = maxbk,                        \
-                .can_dma        = dma,                          \
-                .can_isoc       = isoc,                         \
-        }
-
-static struct usba_ep_data usba_udc_ep[] = {
-        EP("ep0", 0,   64, 1, 0, 0),
-        EP("ep1", 1, 1024, 3, 1, 1),
-        EP("ep2", 2, 1024, 3, 1, 1),
-        EP("ep3", 3, 1024, 2, 1, 1),
-        EP("ep4", 4, 1024, 2, 1, 1),
-        EP("ep5", 5, 1024, 2, 1, 0),
-        EP("ep6", 6, 1024, 2, 1, 0),
-        EP("ep7", 7, 1024, 2, 0, 0),
-};
-
-#undef EP
-
-/*
- * pdata doesn't have room for any endpoints, so we need to
- * append room for the ones we need right after it.
- */
-static struct {
-        struct usba_platform_data pdata;
-        struct usba_ep_data ep[8];
-} usba_udc_data;
-
-static struct platform_device at91_usba_udc_device = {
-        .name           = "atmel_usba_udc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &usba_udc_data.pdata,
-        },
-        .resource       = usba_udc_resources,
-        .num_resources  = ARRAY_SIZE(usba_udc_resources),
-};
-
-void __init at91_add_device_usba(struct usba_platform_data *data)
-{
-        if (cpu_is_at91cap9_revB()) {
-                irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
-        }
-        else
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
-
-        /*
-         * Invalid pins are 0 on AT91, but the usba driver is shared
-         * with AVR32, which use negative values instead. Once/if
-         * gpio_is_valid() is ported to AT91, revisit this code.
-         */
-        usba_udc_data.pdata.vbus_pin = -EINVAL;
-        usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
-        memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
-
-        if (data && gpio_is_valid(data->vbus_pin)) {
-                at91_set_gpio_input(data->vbus_pin, 0);
-                at91_set_deglitch(data->vbus_pin, 1);
-                usba_udc_data.pdata.vbus_pin = data->vbus_pin;
-        }
-
-        /* Pullup pin is handled internally by USB device peripheral */
-
-        platform_device_register(&at91_usba_udc_device);
-}
-#else
-void __init at91_add_device_usba(struct usba_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Ethernet
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
-
-static struct resource eth_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_EMAC,
-                .end    = AT91CAP9_BASE_EMAC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_EMAC,
-                .end    = AT91CAP9_ID_EMAC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_eth_device = {
-        .name           = "macb",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &eth_data,
-        },
-        .resource       = eth_resources,
-        .num_resources  = ARRAY_SIZE(eth_resources),
-};
-
-void __init at91_add_device_eth(struct macb_platform_data *data)
-{
-        if (!data)
-                return;
-
-        if (gpio_is_valid(data->phy_irq_pin)) {
-                at91_set_gpio_input(data->phy_irq_pin, 0);
-                at91_set_deglitch(data->phy_irq_pin, 1);
-        }
-
-        /* Pins used for MII and RMII */
-        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ETXCK_EREFCK */
-        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ERXDV */
-        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ERX0 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ERX1 */
-        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ERXER */
-        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ETXEN */
-        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ETX0 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ETX1 */
-        at91_set_A_periph(AT91_PIN_PB30, 0);    /* EMDIO */
-        at91_set_A_periph(AT91_PIN_PB29, 0);    /* EMDC */
-
-        if (!data->is_rmii) {
-                at91_set_B_periph(AT91_PIN_PC25, 0);    /* ECRS */
-                at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
-                at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
-                at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
-                at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
-                at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
-                at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
-                at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
-        }
-
-        eth_data = *data;
-        platform_device_register(&at91cap9_eth_device);
-}
-#else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  MMC / SD
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct at91_mmc_data mmc0_data, mmc1_data;
-
-static struct resource mmc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI0,
-                .end    = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI0,
-                .end    = AT91CAP9_ID_MCI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc0_device = {
-        .name           = "at91_mci",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc0_data,
-        },
-        .resource       = mmc0_resources,
-        .num_resources  = ARRAY_SIZE(mmc0_resources),
-};
-
-static struct resource mmc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI1,
-                .end    = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI1,
-                .end    = AT91CAP9_ID_MCI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc1_device = {
-        .name           = "at91_mci",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc1_data,
-        },
-        .resource       = mmc1_resources,
-        .num_resources  = ARRAY_SIZE(mmc1_resources),
-};
-
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
-{
-        if (!data)
-                return;
-
-        /* input/irq */
-        if (gpio_is_valid(data->det_pin)) {
-                at91_set_gpio_input(data->det_pin, 1);
-                at91_set_deglitch(data->det_pin, 1);
-        }
-        if (gpio_is_valid(data->wp_pin))
-                at91_set_gpio_input(data->wp_pin, 1);
-        if (gpio_is_valid(data->vcc_pin))
-                at91_set_gpio_output(data->vcc_pin, 0);
-
-        if (mmc_id == 0) {              /* MCI0 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA2, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA1, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA0, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA3, 1);
-                        at91_set_A_periph(AT91_PIN_PA4, 1);
-                        at91_set_A_periph(AT91_PIN_PA5, 1);
-                }
-
-                mmc0_data = *data;
-                platform_device_register(&at91cap9_mmc0_device);
-        } else {                        /* MCI1 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA16, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA17, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA18, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA19, 1);
-                        at91_set_A_periph(AT91_PIN_PA20, 1);
-                        at91_set_A_periph(AT91_PIN_PA21, 1);
-                }
-
-                mmc1_data = *data;
-                platform_device_register(&at91cap9_mmc1_device);
-        }
-}
-#else
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  NAND / SmartMedia
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
-static struct atmel_nand_data nand_data;
-
-#define NAND_BASE       AT91_CHIPSELECT_3
-
-static struct resource nand_resources[] = {
-        [0] = {
-                .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_256M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_ECC,
-                .end    = AT91CAP9_BASE_ECC + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_nand_device = {
-        .name           = "atmel_nand",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &nand_data,
-        },
-        .resource       = nand_resources,
-        .num_resources  = ARRAY_SIZE(nand_resources),
-};
-
-void __init at91_add_device_nand(struct atmel_nand_data *data)
-{
-        unsigned long csa;
-
-        if (!data)
-                return;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-
-        /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
-                at91_set_gpio_output(data->enable_pin, 1);
-
-        /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
-                at91_set_gpio_input(data->rdy_pin, 1);
-
-        /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
-                at91_set_gpio_input(data->det_pin, 1);
-
-        nand_data = *data;
-        platform_device_register(&at91cap9_nand_device);
-}
-#else
-void __init at91_add_device_nand(struct atmel_nand_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  TWI (i2c)
- * -------------------------------------------------------------------- */
-
-/*
- * Prefer the GPIO code since the TWI controller isn't robust
- * (gets overruns and underruns under load) and can only issue
- * repeated STARTs in one scenario (the driver doesn't yet handle them).
- */
-#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
-
-static struct i2c_gpio_platform_data pdata = {
-        .sda_pin                = AT91_PIN_PB4,
-        .sda_is_open_drain      = 1,
-        .scl_pin                = AT91_PIN_PB5,
-        .scl_is_open_drain      = 1,
-        .udelay                 = 2,            /* ~100 kHz */
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name                   = "i2c-gpio",
-        .id                     = -1,
-        .dev.platform_data      = &pdata,
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-
-#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
-
-static struct resource twi_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TWI,
-                .end    = AT91CAP9_BASE_TWI + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TWI,
-                .end    = AT91CAP9_ID_TWI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name           = "at91_i2c",
-        .id             = -1,
-        .resource       = twi_resources,
-        .num_resources  = ARRAY_SIZE(twi_resources),
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        /* pins used for TWI interface */
-        at91_set_B_periph(AT91_PIN_PB4, 0);             /* TWD */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_B_periph(AT91_PIN_PB5, 0);             /* TWCK */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-#else
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
-#endif
-
-/* --------------------------------------------------------------------
- *  SPI
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-static struct resource spi0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI0,
-                .end    = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI0,
-                .end    = AT91CAP9_ID_SPI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi0_device = {
-        .name           = "atmel_spi",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi0_resources,
-        .num_resources  = ARRAY_SIZE(spi0_resources),
-};
-
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
-
-static struct resource spi1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI1,
-                .end    = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI1,
-                .end    = AT91CAP9_ID_SPI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi1_device = {
-        .name           = "atmel_spi",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi1_resources,
-        .num_resources  = ARRAY_SIZE(spi1_resources),
-};
-
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
-
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
-{
-        int i;
-        unsigned long cs_pin;
-        short enable_spi0 = 0;
-        short enable_spi1 = 0;
-
-        /* Choose SPI chip-selects */
-        for (i = 0; i < nr_devices; i++) {
-                if (devices[i].controller_data)
-                        cs_pin = (unsigned long) devices[i].controller_data;
-                else if (devices[i].bus_num == 0)
-                        cs_pin = spi0_standard_cs[devices[i].chip_select];
-                else
-                        cs_pin = spi1_standard_cs[devices[i].chip_select];
-
-                if (devices[i].bus_num == 0)
-                        enable_spi0 = 1;
-                else
-                        enable_spi1 = 1;
-
-                /* enable chip-select pin */
-                at91_set_gpio_output(cs_pin, 1);
-
-                /* pass chip-select pin to driver */
-                devices[i].controller_data = (void *) cs_pin;
-        }
-
-        spi_register_board_info(devices, nr_devices);
-
-        /* Configure SPI bus(es) */
-        if (enable_spi0) {
-                at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
-                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
-                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-
-                platform_device_register(&at91cap9_spi0_device);
-        }
-        if (enable_spi1) {
-                at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
-                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
-                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
-
-                platform_device_register(&at91cap9_spi1_device);
-        }
-}
-#else
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Timer/Counter block
- * -------------------------------------------------------------------- */
-
-#ifdef CONFIG_ATMEL_TCLIB
-
-static struct resource tcb_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TCB0,
-                .end    = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TCB,
-                .end    = AT91CAP9_ID_TCB,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_tcb_device = {
-        .name           = "atmel_tcb",
-        .id             = 0,
-        .resource       = tcb_resources,
-        .num_resources  = ARRAY_SIZE(tcb_resources),
-};
-
-static void __init at91_add_device_tc(void)
-{
-        platform_device_register(&at91cap9_tcb_device);
-}
-#else
-static void __init at91_add_device_tc(void) { }
-#endif
-
-
-/* --------------------------------------------------------------------
- *  RTT
- * -------------------------------------------------------------------- */
-
-static struct resource rtt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_RTT,
-                .end    = AT91CAP9_BASE_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_rtt_device = {
-        .name           = "at91_rtt",
-        .id             = 0,
-        .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
-};
-
-static void __init at91_add_device_rtt(void)
-{
-        platform_device_register(&at91cap9_rtt_device);
-}
-
-
-/* --------------------------------------------------------------------
- *  Watchdog
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_WDT,
-                .end    = AT91CAP9_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_wdt_device = {
-        .name           = "at91_wdt",
-        .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
-};
-
-static void __init at91_add_device_watchdog(void)
-{
-        platform_device_register(&at91cap9_wdt_device);
-}
-#else
-static void __init at91_add_device_watchdog(void) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  PWM
- * --------------------------------------------------------------------*/
-
-#if defined(CONFIG_ATMEL_PWM)
-static u32 pwm_mask;
-
-static struct resource pwm_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_PWMC,
-                .end    = AT91CAP9_BASE_PWMC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_PWMC,
-                .end    = AT91CAP9_ID_PWMC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_pwm0_device = {
-        .name   = "atmel_pwm",
-        .id     = -1,
-        .dev    = {
-                .platform_data          = &pwm_mask,
-        },
-        .resource       = pwm_resources,
-        .num_resources  = ARRAY_SIZE(pwm_resources),
-};
-
-void __init at91_add_device_pwm(u32 mask)
-{
-        if (mask & (1 << AT91_PWM0))
-                at91_set_A_periph(AT91_PIN_PB19, 1);    /* enable PWM0 */
-
-        if (mask & (1 << AT91_PWM1))
-                at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
-
-        if (mask & (1 << AT91_PWM2))
-                at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
-
-        if (mask & (1 << AT91_PWM3))
-                at91_set_B_periph(AT91_PIN_PA11, 1);    /* enable PWM3 */
-
-        pwm_mask = mask;
-
-        platform_device_register(&at91cap9_pwm0_device);
-}
-#else
-void __init at91_add_device_pwm(u32 mask) {}
-#endif
-
-
-
-/* --------------------------------------------------------------------
- *  AC97
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
-static u64 ac97_dmamask = DMA_BIT_MASK(32);
-static struct ac97c_platform_data ac97_data;
-
-static struct resource ac97_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_AC97C,
-                .end    = AT91CAP9_BASE_AC97C + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_AC97C,
-                .end    = AT91CAP9_ID_AC97C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ac97_device = {
-        .name           = "atmel_ac97c",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &ac97_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &ac97_data,
-        },
-        .resource       = ac97_resources,
-        .num_resources  = ARRAY_SIZE(ac97_resources),
-};
-
-void __init at91_add_device_ac97(struct ac97c_platform_data *data)
-{
-        if (!data)
-                return;
-
-        at91_set_A_periph(AT91_PIN_PA6, 0);     /* AC97FS */
-        at91_set_A_periph(AT91_PIN_PA7, 0);     /* AC97CK */
-        at91_set_A_periph(AT91_PIN_PA8, 0);     /* AC97TX */
-        at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
-
-        /* reset */
-        if (gpio_is_valid(data->reset_pin))
-                at91_set_gpio_output(data->reset_pin, 0);
-
-        ac97_data = *data;
-        platform_device_register(&at91cap9_ac97_device);
-}
-#else
-void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  LCD Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = DMA_BIT_MASK(32);
-static struct atmel_lcdfb_info lcdc_data;
-
-static struct resource lcdc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_LCDC_BASE,
-                .end    = AT91CAP9_LCDC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_LCDC,
-                .end    = AT91CAP9_ID_LCDC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_lcdc_device = {
-        .name           = "atmel_lcdfb",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &lcdc_data,
-        },
-        .resource       = lcdc_resources,
-        .num_resources  = ARRAY_SIZE(lcdc_resources),
-};
-
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
-{
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
-
-        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
-        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
-        at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
-        at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
-        at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
-        at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
-        at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
-        at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
-        at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
-        at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
-        at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
-        at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
-        at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
-        at91_set_A_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
-        at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
-        at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
-        at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
-        at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
-        at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
-        at91_set_A_periph(AT91_PIN_PC25, 0);    /* LCDD21 */
-        at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
-        at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
-
-        lcdc_data = *data;
-        platform_device_register(&at91_lcdc_device);
-}
-#else
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  SSC -- Synchronous Serial Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
-static u64 ssc0_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC0,
-                .end    = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC0,
-                .end    = AT91CAP9_ID_SSC0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc0_device = {
-        .name   = "ssc",
-        .id     = 0,
-        .dev    = {
-                .dma_mask               = &ssc0_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc0_resources,
-        .num_resources  = ARRAY_SIZE(ssc0_resources),
-};
-
-static inline void configure_ssc0_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB0, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB1, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB2, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB3, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB4, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB5, 1);
-}
-
-static u64 ssc1_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC1,
-                .end    = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC1,
-                .end    = AT91CAP9_ID_SSC1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc1_device = {
-        .name   = "ssc",
-        .id     = 1,
-        .dev    = {
-                .dma_mask               = &ssc1_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc1_resources,
-        .num_resources  = ARRAY_SIZE(ssc1_resources),
-};
-
-static inline void configure_ssc1_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB6, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB7, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB8, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB9, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB10, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB11, 1);
-}
-
-/*
- * SSC controllers are accessed through library code, instead of any
- * kind of all-singing/all-dancing driver.  For example one could be
- * used by a particular I2S audio codec's driver, while another one
- * on the same system might be used by a custom data capture driver.
- */
-void __init at91_add_device_ssc(unsigned id, unsigned pins)
-{
-        struct platform_device *pdev;
-
-        /*
-         * NOTE: caller is responsible for passing information matching
-         * "pins" to whatever will be using each particular controller.
-         */
-        switch (id) {
-        case AT91CAP9_ID_SSC0:
-                pdev = &at91cap9_ssc0_device;
-                configure_ssc0_pins(pins);
-                break;
-        case AT91CAP9_ID_SSC1:
-                pdev = &at91cap9_ssc1_device;
-                configure_ssc1_pins(pins);
-                break;
-        default:
-                return;
-        }
-
-        platform_device_register(pdev);
-}
-
-#else
-void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  UART
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SERIAL_ATMEL)
-static struct resource dbgu_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_DBGU,
-                .end    = AT91CAP9_BASE_DBGU + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91_ID_SYS,
-                .end    = AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data dbgu_data = {
-        .use_dma_tx     = 0,
-        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-};
-
-static u64 dbgu_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_dbgu_device = {
-        .name           = "atmel_usart",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &dbgu_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &dbgu_data,
-        },
-        .resource       = dbgu_resources,
-        .num_resources  = ARRAY_SIZE(dbgu_resources),
-};
-
-static inline void configure_dbgu_pins(void)
-{
-        at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
-        at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
-}
-
-static struct resource uart0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US0,
-                .end    = AT91CAP9_BASE_US0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US0,
-                .end    = AT91CAP9_ID_US0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart0_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart0_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart0_device = {
-        .name           = "atmel_usart",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &uart0_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart0_data,
-        },
-        .resource       = uart0_resources,
-        .num_resources  = ARRAY_SIZE(uart0_resources),
-};
-
-static inline void configure_usart0_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PA22, 1);            /* TXD0 */
-        at91_set_A_periph(AT91_PIN_PA23, 0);            /* RXD0 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PA24, 0);    /* RTS0 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PA25, 0);    /* CTS0 */
-}
-
-static struct resource uart1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US1,
-                .end    = AT91CAP9_BASE_US1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US1,
-                .end    = AT91CAP9_ID_US1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart1_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart1_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart1_device = {
-        .name           = "atmel_usart",
-        .id             = 2,
-        .dev            = {
-                                .dma_mask               = &uart1_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart1_data,
-        },
-        .resource       = uart1_resources,
-        .num_resources  = ARRAY_SIZE(uart1_resources),
-};
-
-static inline void configure_usart1_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
-        at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
-}
-
-static struct resource uart2_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US2,
-                .end    = AT91CAP9_BASE_US2 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US2,
-                .end    = AT91CAP9_ID_US2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart2_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart2_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart2_device = {
-        .name           = "atmel_usart",
-        .id             = 3,
-        .dev            = {
-                                .dma_mask               = &uart2_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart2_data,
-        },
-        .resource       = uart2_resources,
-        .num_resources  = ARRAY_SIZE(uart2_resources),
-};
-
-static inline void configure_usart2_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
-        at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
-}
-
-static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
-
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
-{
-        struct platform_device *pdev;
-        struct atmel_uart_data *pdata;
-
-        switch (id) {
-                case 0:         /* DBGU */
-                        pdev = &at91cap9_dbgu_device;
-                        configure_dbgu_pins();
-                        break;
-                case AT91CAP9_ID_US0:
-                        pdev = &at91cap9_uart0_device;
-                        configure_usart0_pins(pins);
-                        break;
-                case AT91CAP9_ID_US1:
-                        pdev = &at91cap9_uart1_device;
-                        configure_usart1_pins(pins);
-                        break;
-                case AT91CAP9_ID_US2:
-                        pdev = &at91cap9_uart2_device;
-                        configure_usart2_pins(pins);
-                        break;
-                default:
-                        return;
-        }
-        pdata = pdev->dev.platform_data;
-        pdata->num = portnr;            /* update to mapped ID */
-
-        if (portnr < ATMEL_MAX_UART)
-                at91_uarts[portnr] = pdev;
-}
-
-void __init at91_set_serial_console(unsigned portnr)
-{
-        if (portnr < ATMEL_MAX_UART) {
-                atmel_default_console_device = at91_uarts[portnr];
-                at91cap9_set_console_clock(at91_uarts[portnr]->id);
-        }
-}
-
-void __init at91_add_device_serial(void)
-{
-        int i;
-
-        for (i = 0; i < ATMEL_MAX_UART; i++) {
-                if (at91_uarts[i])
-                        platform_device_register(at91_uarts[i]);
-        }
-
-        if (!atmel_default_console_device)
-                printk(KERN_INFO "AT91: No default serial console defined.\n");
-}
-#else
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
-void __init at91_set_serial_console(unsigned portnr) {}
-void __init at91_add_device_serial(void) {}
-#endif
-
-
-/* -------------------------------------------------------------------- */
-/*
- * These devices are always present and don't need any board-specific
- * setup.
- */
-static int __init at91_add_standard_devices(void)
-{
-        at91_add_device_rtt();
-        at91_add_device_watchdog();
-        at91_add_device_tc();
-        return 0;
-}
-
-arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 99c3174e24a2..0df1045311e4 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -289,13 +289,22 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
         }
 };
 
+static void at91rm9200_idle(void)
+{
+        /*
+         * Disable the processor clock.  The processor will be automatically
+         * re-enabled by an interrupt or by a reset.
+         */
+        at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+}
+
 static void at91rm9200_restart(char mode, const char *cmd)
 {
         /*
          * Perform a hardware reset with the use of the Watchdog timer.
          */
-        at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
-        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+        at91_st_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+        at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
 }
 
 /* --------------------------------------------------------------------
@@ -310,10 +319,13 @@ static void __init at91rm9200_map_io(void)
 
 static void __init at91rm9200_ioremap_registers(void)
 {
+        at91rm9200_ioremap_st(AT91RM9200_BASE_ST);
+        at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
 }
 
 static void __init at91rm9200_initialize(void)
 {
+        arm_pm_idle = at91rm9200_idle;
         arm_pm_restart = at91rm9200_restart;
         at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                         | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 97676bdae998..99ce5c955e39 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -21,6 +21,7 @@
 #include <mach/board.h>
 #include <mach/at91rm9200.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 #include "generic.h"
 
@@ -241,15 +242,15 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
 
         /* CF takes over CS4, CS5, CS6 */
-        csa = at91_sys_read(AT91_EBI_CSA);
-        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
+        csa = at91_ramc_read(0, AT91_EBI_CSA);
+        at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
 
         /*
          * Static memory controller timing adjustments.
          * REVISIT:  these timings are in terms of MCK cycles, so
          * when MCK changes (cpufreq etc) so must these values...
          */
-        at91_sys_write(AT91_SMC_CSR(4),
+        at91_ramc_write(0, AT91_SMC_CSR(4),
                                   AT91_SMC_ACSS_STD
                                 | AT91_SMC_DBW_16
                                 | AT91_SMC_BAT
@@ -407,11 +408,11 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
                 return;
 
         /* enable the address range of CS3 */
-        csa = at91_sys_read(AT91_EBI_CSA);
-        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
+        csa = at91_ramc_read(0, AT91_EBI_CSA);
+        at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
+        at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
                 | AT91_SMC_NWS_(5)
                 | AT91_SMC_TDF_(1)
                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
@@ -1114,7 +1115,6 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index a028cdf8f974..dd7f782b0b91 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -43,9 +43,9 @@ static inline unsigned long read_CRTR(void)
 {
         unsigned long x1, x2;
 
-        x1 = at91_sys_read(AT91_ST_CRTR);
+        x1 = at91_st_read(AT91_ST_CRTR);
         do {
-                x2 = at91_sys_read(AT91_ST_CRTR);
+                x2 = at91_st_read(AT91_ST_CRTR);
                 if (x1 == x2)
                         break;
                 x1 = x2;
@@ -58,7 +58,7 @@ static inline unsigned long read_CRTR(void)
  */
 static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 {
-        u32     sr = at91_sys_read(AT91_ST_SR) & irqmask;
+        u32     sr = at91_st_read(AT91_ST_SR) & irqmask;
 
         /*
          * irqs should be disabled here, but as the irq is shared they are only
@@ -110,22 +110,22 @@ static void
 clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
         /* Disable and flush pending timer interrupts */
-        at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
-        (void) at91_sys_read(AT91_ST_SR);
+        at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
+        at91_st_read(AT91_ST_SR);
 
         last_crtr = read_CRTR();
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* PIT for periodic irqs; fixed rate of 1/HZ */
                 irqmask = AT91_ST_PITS;
-                at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
+                at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* ALM for oneshot irqs, set by next_event()
                  * before 32 seconds have passed
                  */
                 irqmask = AT91_ST_ALMS;
-                at91_sys_write(AT91_ST_RTAR, last_crtr);
+                at91_st_write(AT91_ST_RTAR, last_crtr);
                 break;
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
@@ -133,7 +133,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
                 irqmask = 0;
                 break;
         }
-        at91_sys_write(AT91_ST_IER, irqmask);
+        at91_st_write(AT91_ST_IER, irqmask);
 }
 
 static int
@@ -156,12 +156,12 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
         alm = read_CRTR();
 
         /* Cancel any pending alarm; flush any pending IRQ */
-        at91_sys_write(AT91_ST_RTAR, alm);
-        (void) at91_sys_read(AT91_ST_SR);
+        at91_st_write(AT91_ST_RTAR, alm);
+        at91_st_read(AT91_ST_SR);
 
         /* Schedule alarm by writing RTAR. */
         alm += delta;
-        at91_sys_write(AT91_ST_RTAR, alm);
+        at91_st_write(AT91_ST_RTAR, alm);
 
         return status;
 }
@@ -175,15 +175,24 @@ static struct clock_event_device clkevt = {
         .set_mode       = clkevt32k_mode,
 };
 
+void __iomem *at91_st_base;
+
+void __init at91rm9200_ioremap_st(u32 addr)
+{
+        at91_st_base = ioremap(addr, 256);
+        if (!at91_st_base)
+                panic("Impossible to ioremap ST\n");
+}
+
 /*
  * ST (system timer) module supports both clockevents and clocksource.
  */
 void __init at91rm9200_timer_init(void)
 {
         /* Disable all timer interrupts, and clear any pending ones */
-        at91_sys_write(AT91_ST_IDR,
+        at91_st_write(AT91_ST_IDR,
                 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
-        (void) at91_sys_read(AT91_ST_SR);
+        at91_st_read(AT91_ST_SR);
 
         /* Make IRQs happen for the system timer */
         setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
@@ -192,7 +201,7 @@ void __init at91rm9200_timer_init(void)
          * directly for the clocksource and all clockevents, after adjusting
          * its prescaler from the 1 Hz default.
          */
-        at91_sys_write(AT91_ST_RTMR, 1);
+        at91_st_write(AT91_ST_RTMR, 1);
 
         /* Setup timer clockevent, with minimum of two ticks (important!!) */
         clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d4036ba43612..14b5a9c9a514 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -208,6 +209,13 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
         CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
         CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
+        /* more tc lookup table for DT entries */
+        CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -309,27 +317,27 @@ static void __init at91sam9xe_map_io(void)
 
 static void __init at91sam9260_map_io(void)
 {
-        if (cpu_is_at91sam9xe()) {
+        if (cpu_is_at91sam9xe())
                 at91sam9xe_map_io();
-        } else if (cpu_is_at91sam9g20()) {
-                at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
-                at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
-        } else {
-                at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
-                at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
-        }
+        else if (cpu_is_at91sam9g20())
+                at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE);
+        else
+                at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
 }
 
 static void __init at91sam9260_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
         at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
+        at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
         at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
+        at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
 }
 
 static void __init at91sam9260_initialize(void)
 {
+        arm_pm_idle = at91sam9_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                         | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 5a24f0b4554d..7e5651ee9f85 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -21,6 +21,7 @@
 #include <mach/cpu.h>
 #include <mach/at91sam9260.h>
 #include <mach/at91sam9260_matrix.h>
+#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 
 #include "generic.h"
@@ -422,8 +423,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (gpio_is_valid(data->enable_pin))
@@ -641,7 +642,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 static struct resource tcb0_resources[] = {
         [0] = {
                 .start  = AT91SAM9260_BASE_TCB0,
-                .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
+                .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -671,7 +672,7 @@ static struct platform_device at91sam9260_tcb0_device = {
 static struct resource tcb1_resources[] = {
         [0] = {
                 .start  = AT91SAM9260_BASE_TCB1,
-                .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
+                .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -698,8 +699,25 @@ static struct platform_device at91sam9260_tcb1_device = {
         .num_resources  = ARRAY_SIZE(tcb1_resources),
 };
 
+#if defined(CONFIG_OF)
+static struct of_device_id tcb_ids[] = {
+        { .compatible = "atmel,at91rm9200-tcb" },
+        { /*sentinel*/ }
+};
+#endif
+
 static void __init at91_add_device_tc(void)
 {
+#if defined(CONFIG_OF)
+        struct device_node *np;
+
+        np = of_find_matching_node(NULL, tcb_ids);
+        if (np) {
+                of_node_put(np);
+                return;
+        }
+#endif
+
         platform_device_register(&at91sam9260_tcb0_device);
         platform_device_register(&at91sam9260_tcb1_device);
 }
@@ -717,18 +735,42 @@ static struct resource rtt_resources[] = {
                 .start  = AT91SAM9260_BASE_RTT,
                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }
+        }, {
+                .flags  = IORESOURCE_MEM,
+        },
 };
 
 static struct platform_device at91sam9260_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
+
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+        at91sam9260_rtt_device.name = "rtc-at91sam9";
+        /*
+         * The second resource is needed:
+         * GPBR will serve as the storage for RTC time offset
+         */
+        at91sam9260_rtt_device.num_resources = 2;
+        rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
+                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+        rtt_resources[1].end = rtt_resources[1].start + 3;
+}
+#else
+static void __init at91_add_device_rtt_rtc(void)
+{
+        /* Only one resource is needed: RTT not used as RTC */
+        at91sam9260_rtt_device.num_resources = 1;
+}
+#endif
+
 static void __init at91_add_device_rtt(void)
 {
+        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9260_rtt_device);
 }
 
@@ -1139,7 +1181,6 @@ static inline void configure_usart5_pins(void)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1264,7 +1305,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 
         switch (data->chipselect) {
         case 4:
@@ -1287,7 +1328,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
                 return;
         }
 
-        at91_sys_write(AT91_MATRIX_EBICSA, csa);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa);
 
         if (gpio_is_valid(data->rst_pin)) {
                 at91_set_multi_drive(data->rst_pin, 0);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 023c2ff138df..684c5dfd92ac 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -282,12 +283,15 @@ static void __init at91sam9261_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
         at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
+        at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
         at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
+        at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
 }
 
 static void __init at91sam9261_initialize(void)
 {
+        arm_pm_idle = at91sam9_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                         | (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 1e28bed8f425..096da87dc00d 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -24,6 +24,7 @@
 #include <mach/board.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91sam9261_matrix.h>
+#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 
 #include "generic.h"
@@ -236,8 +237,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (gpio_is_valid(data->enable_pin))
@@ -603,6 +604,8 @@ static struct resource rtt_resources[] = {
                 .start  = AT91SAM9261_BASE_RTT,
                 .end    = AT91SAM9261_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_MEM,
         }
 };
 
@@ -610,11 +613,32 @@ static struct platform_device at91sam9261_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+        at91sam9261_rtt_device.name = "rtc-at91sam9";
+        /*
+         * The second resource is needed:
+         * GPBR will serve as the storage for RTC time offset
+         */
+        at91sam9261_rtt_device.num_resources = 2;
+        rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
+                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+        rtt_resources[1].end = rtt_resources[1].start + 3;
+}
+#else
+static void __init at91_add_device_rtt_rtc(void)
+{
+        /* Only one resource is needed: RTT not used as RTC */
+        at91sam9261_rtt_device.num_resources = 1;
+}
+#endif
+
 static void __init at91_add_device_rtt(void)
 {
+        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9261_rtt_device);
 }
 
@@ -991,7 +1015,6 @@ static inline void configure_usart2_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 75e876c258af..0b4fa5a7f685 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -302,13 +303,17 @@ static void __init at91sam9263_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
         at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
+        at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
+        at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
         at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
         at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
+        at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
 }
 
 static void __init at91sam9263_initialize(void)
 {
+        arm_pm_idle = at91sam9_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 366a7765635b..53688c46f956 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -23,6 +23,7 @@
 #include <mach/board.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91sam9263_matrix.h>
+#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 
 #include "generic.h"
@@ -409,7 +410,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
          * we assume SMC timings are configured by board code,
          * except True IDE where timings are controlled by driver
          */
-        ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
+        ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
         switch (data->chipselect) {
         case 4:
                 at91_set_A_periph(AT91_PIN_PD6, 0);  /* EBI0_NCS4/CFCS0 */
@@ -428,7 +429,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
                        data->chipselect);
                 return;
         }
-        at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
+        at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
 
         if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
@@ -496,8 +497,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
-        at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+        csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
+        at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (gpio_is_valid(data->enable_pin))
@@ -891,7 +892,8 @@ static struct platform_device at91sam9263_isi_device = {
         .num_resources  = ARRAY_SIZE(isi_resources),
 };
 
-void __init at91_add_device_isi(void)
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck)
 {
         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
@@ -904,14 +906,20 @@ void __init at91_add_device_isi(void)
         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
-        at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
+
+        if (use_pck_as_mck) {
+                at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
+
+                /* TODO: register the PCK for ISI_MCK and set its parent */
+        }
 }
 #else
-void __init at91_add_device_isi(void) {}
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck) {}
 #endif
 
 
@@ -959,6 +967,8 @@ static struct resource rtt0_resources[] = {
                 .start  = AT91SAM9263_BASE_RTT0,
                 .end    = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_MEM,
         }
 };
 
@@ -966,7 +976,6 @@ static struct platform_device at91sam9263_rtt0_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt0_resources,
-        .num_resources  = ARRAY_SIZE(rtt0_resources),
 };
 
 static struct resource rtt1_resources[] = {
@@ -974,6 +983,8 @@ static struct resource rtt1_resources[] = {
                 .start  = AT91SAM9263_BASE_RTT1,
                 .end    = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_MEM,
         }
 };
 
@@ -981,11 +992,53 @@ static struct platform_device at91sam9263_rtt1_device = {
         .name           = "at91_rtt",
         .id             = 1,
         .resource       = rtt1_resources,
-        .num_resources  = ARRAY_SIZE(rtt1_resources),
 };
 
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+        struct platform_device *pdev;
+        struct resource *r;
+
+        switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
+        case 0:
+                /*
+                 * The second resource is needed only for the chosen RTT:
+                 * GPBR will serve as the storage for RTC time offset
+                 */
+                at91sam9263_rtt0_device.num_resources = 2;
+                at91sam9263_rtt1_device.num_resources = 1;
+                pdev = &at91sam9263_rtt0_device;
+                r = rtt0_resources;
+                break;
+        case 1:
+                at91sam9263_rtt0_device.num_resources = 1;
+                at91sam9263_rtt1_device.num_resources = 2;
+                pdev = &at91sam9263_rtt1_device;
+                r = rtt1_resources;
+                break;
+        default:
+                pr_err("at91sam9263: only supports 2 RTT (%d)\n",
+                       CONFIG_RTC_DRV_AT91SAM9_RTT);
+                return;
+        }
+
+        pdev->name = "rtc-at91sam9";
+        r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+        r[1].end = r[1].start + 3;
+}
+#else
+static void __init at91_add_device_rtt_rtc(void)
+{
+        /* Only one resource is needed: RTT not used as RTC */
+        at91sam9263_rtt0_device.num_resources = 1;
+        at91sam9263_rtt1_device.num_resources = 1;
+}
+#endif
+
 static void __init at91_add_device_rtt(void)
 {
+        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9263_rtt0_device);
         platform_device_register(&at91sam9263_rtt1_device);
 }
@@ -1371,7 +1424,6 @@ static inline void configure_usart2_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index d89ead740a99..a94758b42737 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -14,6 +14,9 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/clockchips.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 
@@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 static struct irqaction at91sam926x_pit_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91sam926x_pit_interrupt
+        .handler        = at91sam926x_pit_interrupt,
+        .irq            = AT91_ID_SYS,
 };
 
 static void at91sam926x_pit_reset(void)
@@ -149,6 +153,51 @@ static void at91sam926x_pit_reset(void)
         pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
 }
 
+#ifdef CONFIG_OF
+static struct of_device_id pit_timer_ids[] = {
+        { .compatible = "atmel,at91sam9260-pit" },
+        { /* sentinel */ }
+};
+
+static int __init of_at91sam926x_pit_init(void)
+{
+        struct device_node      *np;
+        int                     ret;
+
+        np = of_find_matching_node(NULL, pit_timer_ids);
+        if (!np)
+                goto err;
+
+        pit_base_addr = of_iomap(np, 0);
+        if (!pit_base_addr)
+                goto node_err;
+
+        /* Get the interrupts property */
+        ret = irq_of_parse_and_map(np, 0);
+        if (!ret) {
+                pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
+                goto ioremap_err;
+        }
+        at91sam926x_pit_irq.irq = ret;
+
+        of_node_put(np);
+
+        return 0;
+
+ioremap_err:
+        iounmap(pit_base_addr);
+node_err:
+        of_node_put(np);
+err:
+        return -EINVAL;
+}
+#else
+static int __init of_at91sam926x_pit_init(void)
+{
+        return -EINVAL;
+}
+#endif
+
 /*
  * Set up both clocksource and clockevent support.
  */
@@ -156,6 +205,10 @@ static void __init at91sam926x_pit_init(void)
 {
         unsigned long   pit_rate;
         unsigned        bits;
+        int             ret;
+
+        /* For device tree enabled device: initialize here */
+        of_at91sam926x_pit_init();
 
         /*
          * Use our actual MCK to figure out how many MCK/16 ticks per
@@ -177,7 +230,9 @@ static void __init at91sam926x_pit_init(void)
         clocksource_register_hz(&pit_clk, pit_rate);
 
         /* Set up irq handler */
-        setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
+        ret = setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
+        if (ret)
+                pr_crit("AT91: PIT: Unable to setup IRQ\n");
 
         /* Set up and register clockevents */
         pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
@@ -193,6 +248,15 @@ static void at91sam926x_pit_suspend(void)
 
 void __init at91sam926x_ioremap_pit(u32 addr)
 {
+#if defined(CONFIG_OF)
+        struct device_node *np =
+                of_find_matching_node(NULL, pit_timer_ids);
+
+        if (np) {
+                of_node_put(np);
+                return;
+        }
+#endif
         pit_base_addr = ioremap(addr, 16);
 
         if (!pit_base_addr)
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index 518e42377171..7af2e108b8a0 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -15,16 +15,17 @@
 
 #include <linux/linkage.h>
 #include <mach/hardware.h>
-#include <mach/at91sam9_sdramc.h>
+#include <mach/at91_ramc.h>
 #include <mach/at91_rstc.h>
 
                         .arm
 
                         .globl  at91sam9_alt_restart
 
-at91sam9_alt_restart:   ldr     r0, .at91_va_base_sdramc        @ preload constants
-                        ldr     r1, =at91_rstc_base
-                        ldr     r1, [r1]
+at91sam9_alt_restart:   ldr     r0, =at91_ramc_base             @ preload constants
+                        ldr     r0, [r0]
+                        ldr     r4, =at91_rstc_base
+                        ldr     r1, [r4]
 
                         mov     r2, #1
                         mov     r3, #AT91_SDRAMC_LPCB_POWER_DOWN
@@ -37,6 +38,3 @@ at91sam9_alt_restart:	ldr	r0, .at91_va_base_sdramc	@ preload constants
                         str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
 
                         b       .
-
-.at91_va_base_sdramc:
-        .word AT91_VA_BASE_SYS + AT91_SDRAMC0
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 1cb6a96b1c1e..0014573dfe17 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -229,6 +229,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
         CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
         CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
+        /* more tc lookup table for DT entries */
+        CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -331,12 +334,16 @@ static void __init at91sam9g45_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
         at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
+        at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
+        at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
         at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
+        at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
 }
 
 static void __init at91sam9g45_initialize(void)
 {
+        arm_pm_idle = at91sam9_idle;
         arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b7582dd10dc3..4320b2096789 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -14,6 +14,7 @@
 
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
+#include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <linux/atmel-mci.h>
@@ -24,11 +25,15 @@
 #include <mach/board.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9g45_matrix.h>
+#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at_hdmac.h>
 #include <mach/atmel-mci.h>
 
+#include <media/atmel-isi.h>
+
 #include "generic.h"
+#include "clock.h"
 
 
 /* --------------------------------------------------------------------
@@ -38,10 +43,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 8,
-};
-
 static struct resource hdmac_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_DMA,
@@ -56,12 +57,11 @@ static struct resource hdmac_resources[] = {
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9g45_dma",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -69,9 +69,15 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
-        dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
-        platform_device_register(&at_hdmac_device);
+#if defined(CONFIG_OF)
+        struct device_node *of_node =
+                of_find_node_by_name(NULL, "dma-controller");
+
+        if (of_node)
+                of_node_put(of_node);
+        else
+#endif
+                platform_device_register(&at_hdmac_device);
 }
 #else
 void __init at91_add_device_hdmac(void) {}
@@ -552,8 +558,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (gpio_is_valid(data->enable_pin))
@@ -869,6 +875,96 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 #endif
 
+/* --------------------------------------------------------------------
+ *  Image Sensor Interface
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_VIDEO_ATMEL_ISI) || defined(CONFIG_VIDEO_ATMEL_ISI_MODULE)
+static u64 isi_dmamask = DMA_BIT_MASK(32);
+static struct isi_platform_data isi_data;
+
+struct resource isi_resources[] = {
+        [0] = {
+                .start  = AT91SAM9G45_BASE_ISI,
+                .end    = AT91SAM9G45_BASE_ISI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9G45_ID_ISI,
+                .end    = AT91SAM9G45_ID_ISI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9g45_isi_device = {
+        .name           = "atmel_isi",
+        .id             = 0,
+        .dev            = {
+                        .dma_mask               = &isi_dmamask,
+                        .coherent_dma_mask      = DMA_BIT_MASK(32),
+                        .platform_data          = &isi_data,
+        },
+        .resource       = isi_resources,
+        .num_resources  = ARRAY_SIZE(isi_resources),
+};
+
+static struct clk_lookup isi_mck_lookups[] = {
+        CLKDEV_CON_DEV_ID("isi_mck", "atmel_isi.0", NULL),
+};
+
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck)
+{
+        struct clk *pck;
+        struct clk *parent;
+
+        if (!data)
+                return;
+        isi_data = *data;
+
+        at91_set_A_periph(AT91_PIN_PB20, 0);    /* ISI_D0 */
+        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ISI_D1 */
+        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ISI_D2 */
+        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ISI_D3 */
+        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ISI_D4 */
+        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ISI_D5 */
+        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ISI_D6 */
+        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ISI_D7 */
+        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ISI_PCK */
+        at91_set_A_periph(AT91_PIN_PB30, 0);    /* ISI_HSYNC */
+        at91_set_A_periph(AT91_PIN_PB29, 0);    /* ISI_VSYNC */
+        at91_set_B_periph(AT91_PIN_PB8, 0);     /* ISI_PD8 */
+        at91_set_B_periph(AT91_PIN_PB9, 0);     /* ISI_PD9 */
+        at91_set_B_periph(AT91_PIN_PB10, 0);    /* ISI_PD10 */
+        at91_set_B_periph(AT91_PIN_PB11, 0);    /* ISI_PD11 */
+
+        platform_device_register(&at91sam9g45_isi_device);
+
+        if (use_pck_as_mck) {
+                at91_set_B_periph(AT91_PIN_PB31, 0);    /* ISI_MCK (PCK1) */
+
+                pck = clk_get(NULL, "pck1");
+                parent = clk_get(NULL, "plla");
+
+                BUG_ON(IS_ERR(pck) || IS_ERR(parent));
+
+                if (clk_set_parent(pck, parent)) {
+                        pr_err("Failed to set PCK's parent\n");
+                } else {
+                        /* Register PCK as ISI_MCK */
+                        isi_mck_lookups[0].clk = pck;
+                        clkdev_add_table(isi_mck_lookups,
+                                        ARRAY_SIZE(isi_mck_lookups));
+                }
+
+                clk_put(pck);
+                clk_put(parent);
+        }
+}
+#else
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck) {}
+#endif
+
 
 /* --------------------------------------------------------------------
  *  LCD Controller
@@ -956,7 +1052,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 static struct resource tcb0_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_TCB0,
-                .end    = AT91SAM9G45_BASE_TCB0 + SZ_16K - 1,
+                .end    = AT91SAM9G45_BASE_TCB0 + SZ_256 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -977,7 +1073,7 @@ static struct platform_device at91sam9g45_tcb0_device = {
 static struct resource tcb1_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_TCB1,
-                .end    = AT91SAM9G45_BASE_TCB1 + SZ_16K - 1,
+                .end    = AT91SAM9G45_BASE_TCB1 + SZ_256 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -994,8 +1090,25 @@ static struct platform_device at91sam9g45_tcb1_device = {
         .num_resources  = ARRAY_SIZE(tcb1_resources),
 };
 
+#if defined(CONFIG_OF)
+static struct of_device_id tcb_ids[] = {
+        { .compatible = "atmel,at91rm9200-tcb" },
+        { /*sentinel*/ }
+};
+#endif
+
 static void __init at91_add_device_tc(void)
 {
+#if defined(CONFIG_OF)
+        struct device_node *np;
+
+        np = of_find_matching_node(NULL, tcb_ids);
+        if (np) {
+                of_node_put(np);
+                return;
+        }
+#endif
+
         platform_device_register(&at91sam9g45_tcb0_device);
         platform_device_register(&at91sam9g45_tcb1_device);
 }
@@ -1098,6 +1211,8 @@ static struct resource rtt_resources[] = {
                 .start  = AT91SAM9G45_BASE_RTT,
                 .end    = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_MEM,
         }
 };
 
@@ -1105,11 +1220,32 @@ static struct platform_device at91sam9g45_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+        at91sam9g45_rtt_device.name = "rtc-at91sam9";
+        /*
+         * The second resource is needed:
+         * GPBR will serve as the storage for RTC time offset
+         */
+        at91sam9g45_rtt_device.num_resources = 2;
+        rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
+                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+        rtt_resources[1].end = rtt_resources[1].start + 3;
+}
+#else
+static void __init at91_add_device_rtt_rtc(void)
+{
+        /* Only one resource is needed: RTT not used as RTC */
+        at91sam9g45_rtt_device.num_resources = 1;
+}
+#endif
+
 static void __init at91_add_device_rtt(void)
 {
+        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9g45_rtt_device);
 }
 
@@ -1564,7 +1700,6 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
index 0468be10980b..9d457182c86c 100644
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -12,7 +12,7 @@
 
 #include <linux/linkage.h>
 #include <mach/hardware.h>
-#include <mach/at91sam9_ddrsdr.h>
+#include <mach/at91_ramc.h>
 #include <mach/at91_rstc.h>
 
                         .arm
@@ -20,9 +20,10 @@
                         .globl  at91sam9g45_restart
 
 at91sam9g45_restart:
-                        ldr     r0, .at91_va_base_sdramc0       @ preload constants
-                        ldr     r1, =at91_rstc_base
-                        ldr     r1, [r1]
+                        ldr     r5, =at91_ramc_base             @ preload constants
+                        ldr     r0, [r5]
+                        ldr     r4, =at91_rstc_base
+                        ldr     r1, [r4]
 
                         mov     r2, #1
                         mov     r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
@@ -35,6 +36,3 @@ at91sam9g45_restart:
                         str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
 
                         b       .
-
-.at91_va_base_sdramc0:
-        .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d2c91a841cb8..63d9372eb18e 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -11,6 +11,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -287,12 +288,15 @@ static void __init at91sam9rl_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
         at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
+        at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
         at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
+        at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
 }
 
 static void __init at91sam9rl_initialize(void)
 {
+        arm_pm_idle = at91sam9_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 61908dce9784..eda72e83037d 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -20,6 +20,7 @@
 #include <mach/board.h>
 #include <mach/at91sam9rl.h>
 #include <mach/at91sam9rl_matrix.h>
+#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at_hdmac.h>
 
@@ -33,10 +34,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 2,
-};
-
 static struct resource hdmac_resources[] = {
         [0] = {
                 .start  = AT91SAM9RL_BASE_DMA,
@@ -51,12 +48,11 @@ static struct resource hdmac_resources[] = {
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9rl_dma",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -64,7 +60,6 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
         platform_device_register(&at_hdmac_device);
 }
 #else
@@ -271,8 +266,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (gpio_is_valid(data->enable_pin))
@@ -688,6 +683,8 @@ static struct resource rtt_resources[] = {
                 .start  = AT91SAM9RL_BASE_RTT,
                 .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_MEM,
         }
 };
 
@@ -695,11 +692,32 @@ static struct platform_device at91sam9rl_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+        at91sam9rl_rtt_device.name = "rtc-at91sam9";
+        /*
+         * The second resource is needed:
+         * GPBR will serve as the storage for RTC time offset
+         */
+        at91sam9rl_rtt_device.num_resources = 2;
+        rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
+                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+        rtt_resources[1].end = rtt_resources[1].start + 3;
+}
+#else
+static void __init at91_add_device_rtt_rtc(void)
+{
+        /* Only one resource is needed: RTT not used as RTC */
+        at91sam9rl_rtt_device.num_resources = 1;
+}
+#endif
+
 static void __init at91_add_device_rtt(void)
 {
+        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9rl_rtt_device);
 }
 
@@ -1134,7 +1152,6 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
new file mode 100644
index 000000000000..a34d96afa746
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -0,0 +1,368 @@
+/*
+ *  Chip-specific setup code for the AT91SAM9x5 family
+ *
+ *  Copyright (C) 2010-2012 Atmel Corporation.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/at91sam9x5.h>
+#include <mach/at91_pmc.h>
+#include <mach/cpu.h>
+#include <mach/board.h>
+
+#include "soc.h"
+#include "generic.h"
+#include "clock.h"
+#include "sam9_smc.h"
+
+/* --------------------------------------------------------------------
+ *  Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk pioAB_clk = {
+        .name           = "pioAB_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_PIOAB,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioCD_clk = {
+        .name           = "pioCD_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_PIOCD,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk smd_clk = {
+        .name           = "smd_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_SMD,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+        .name           = "usart0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_USART0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+        .name           = "usart1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_USART1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+        .name           = "usart2_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_USART2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* USART3 clock - Only for sam9g25/sam9x25 */
+static struct clk usart3_clk = {
+        .name           = "usart3_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_USART3,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi0_clk = {
+        .name           = "twi0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi1_clk = {
+        .name           = "twi1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi2_clk = {
+        .name           = "twi2_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc0_clk = {
+        .name           = "mci0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_MCI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi0_clk = {
+        .name           = "spi0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_SPI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi1_clk = {
+        .name           = "spi1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_SPI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk uart0_clk = {
+        .name           = "uart0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_UART0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk uart1_clk = {
+        .name           = "uart1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_UART1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tcb0_clk = {
+        .name           = "tcb0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_TCB,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pwm_clk = {
+        .name           = "pwm_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_PWM,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk adc_clk = {
+        .name           = "adc_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_ADC,
+        .type   = CLK_TYPE_PERIPHERAL,
+};
+static struct clk dma0_clk = {
+        .name           = "dma0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_DMA0,
+        .type   = CLK_TYPE_PERIPHERAL,
+};
+static struct clk dma1_clk = {
+        .name           = "dma1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_DMA1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk uhphs_clk = {
+        .name           = "uhphs_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_UHPHS,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk udphs_clk = {
+        .name           = "udphs_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_UDPHS,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* emac0 clock - Only for sam9g25/sam9x25/sam9g35/sam9x35 */
+static struct clk macb0_clk = {
+        .name           = "pclk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_EMAC0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* lcd clock - Only for sam9g15/sam9g35/sam9x35 */
+static struct clk lcdc_clk = {
+        .name           = "lcdc_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_LCDC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* isi clock - Only for sam9g25 */
+static struct clk isi_clk = {
+        .name           = "isi_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_ISI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc1_clk = {
+        .name           = "mci1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_MCI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* emac1 clock - Only for sam9x25 */
+static struct clk macb1_clk = {
+        .name           = "pclk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_EMAC1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc_clk = {
+        .name           = "ssc_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_SSC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* can0 clock - Only for sam9x35 */
+static struct clk can0_clk = {
+        .name           = "can0_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_CAN0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+/* can1 clock - Only for sam9x35 */
+static struct clk can1_clk = {
+        .name           = "can1_clk",
+        .pmc_mask       = 1 << AT91SAM9X5_ID_CAN1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+        &pioAB_clk,
+        &pioCD_clk,
+        &smd_clk,
+        &usart0_clk,
+        &usart1_clk,
+        &usart2_clk,
+        &twi0_clk,
+        &twi1_clk,
+        &twi2_clk,
+        &mmc0_clk,
+        &spi0_clk,
+        &spi1_clk,
+        &uart0_clk,
+        &uart1_clk,
+        &tcb0_clk,
+        &pwm_clk,
+        &adc_clk,
+        &dma0_clk,
+        &dma1_clk,
+        &uhphs_clk,
+        &udphs_clk,
+        &mmc1_clk,
+        &ssc_clk,
+        // irq0
+};
+
+static struct clk_lookup periph_clocks_lookups[] = {
+        /* lookup table for DT entries */
+        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+        CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
+        CLKDEV_CON_ID("pioA", &pioAB_clk),
+        CLKDEV_CON_ID("pioB", &pioAB_clk),
+        CLKDEV_CON_ID("pioC", &pioCD_clk),
+        CLKDEV_CON_ID("pioD", &pioCD_clk),
+        /* additional fake clock for macb_hclk */
+        CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
+        CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
+};
+
+/*
+ * The two programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+        .name           = "pck0",
+        .pmc_mask       = AT91_PMC_PCK0,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 0,
+};
+static struct clk pck1 = {
+        .name           = "pck1",
+        .pmc_mask       = AT91_PMC_PCK1,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 1,
+};
+
+static void __init at91sam9x5_register_clocks(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+                clk_register(periph_clocks[i]);
+
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+
+        if (cpu_is_at91sam9g25()
+        || cpu_is_at91sam9x25())
+                clk_register(&usart3_clk);
+
+        if (cpu_is_at91sam9g25()
+        || cpu_is_at91sam9x25()
+        || cpu_is_at91sam9g35()
+        || cpu_is_at91sam9x35())
+                clk_register(&macb0_clk);
+
+        if (cpu_is_at91sam9g15()
+        || cpu_is_at91sam9g35()
+        || cpu_is_at91sam9x35())
+                clk_register(&lcdc_clk);
+
+        if (cpu_is_at91sam9g25())
+                clk_register(&isi_clk);
+
+        if (cpu_is_at91sam9x25())
+                clk_register(&macb1_clk);
+
+        if (cpu_is_at91sam9x25()
+        || cpu_is_at91sam9x35()) {
+                clk_register(&can0_clk);
+                clk_register(&can1_clk);
+        }
+
+        clk_register(&pck0);
+        clk_register(&pck1);
+}
+
+/* --------------------------------------------------------------------
+ *  AT91SAM9x5 processor initialization
+ * -------------------------------------------------------------------- */
+
+static void __init at91sam9x5_map_io(void)
+{
+        at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
+}
+
+static void __init at91sam9x5_ioremap_registers(void)
+{
+        at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
+}
+
+void __init at91sam9x5_initialize(void)
+{
+        arm_pm_restart = at91sam9g45_restart;
+        at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
+
+        /* Register GPIO subsystem (using DT) */
+        at91_gpio_init(NULL, 0);
+}
+
+/* --------------------------------------------------------------------
+ *  AT91SAM9x5 devices (temporary before modification of code)
+ * -------------------------------------------------------------------- */
+void __init at91_add_device_nand(struct atmel_nand_data *data) {}
+
+/* --------------------------------------------------------------------
+ *  Interrupt initialization
+ * -------------------------------------------------------------------- */
+/*
+ * The default interrupt priority levels (0 = lowest, 7 = highest).
+ */
+static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = {
+        7,      /* Advanced Interrupt Controller (FIQ) */
+        7,      /* System Peripherals */
+        1,      /* Parallel IO Controller A and B */
+        1,      /* Parallel IO Controller C and D */
+        4,      /* Soft Modem */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
+        5,      /* USART 3 */
+        6,      /* Two-Wire Interface 0 */
+        6,      /* Two-Wire Interface 1 */
+        6,      /* Two-Wire Interface 2 */
+        0,      /* Multimedia Card Interface 0 */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
+        5,      /* UART 0 */
+        5,      /* UART 1 */
+        0,      /* Timer Counter 0, 1, 2, 3, 4 and 5 */
+        0,      /* Pulse Width Modulation Controller */
+        0,      /* ADC Controller */
+        0,      /* DMA Controller 0 */
+        0,      /* DMA Controller 1 */
+        2,      /* USB Host High Speed port */
+        2,      /* USB Device High speed port */
+        3,      /* Ethernet MAC 0 */
+        3,      /* LDC Controller or Image Sensor Interface */
+        0,      /* Multimedia Card Interface 1 */
+        3,      /* Ethernet MAC 1 */
+        4,      /* Synchronous Serial Interface */
+        4,      /* CAN Controller 0 */
+        4,      /* CAN Controller 1 */
+        0,      /* Advanced Interrupt Controller (IRQ0) */
+};
+
+struct at91_init_soc __initdata at91sam9x5_soc = {
+        .map_io = at91sam9x5_map_io,
+        .default_irq_priority = at91sam9x5_default_irq_priority,
+        .ioremap_registers = at91sam9x5_ioremap_registers,
+        .register_clocks = at91sam9x5_register_clocks,
+        .init = at91sam9x5_initialize,
+};
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 56ba3bd035ae..5400a1d65035 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <mach/at91x40.h>
 #include <mach/at91_st.h>
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
         return AT91X40_MASTER_CLOCK;
 }
 
+static void at91x40_idle(void)
+{
+        /*
+         * Disable the processor clock.  The processor will be automatically
+         * re-enabled by an interrupt or by a reset.
+         */
+        __raw_writel(AT91_PS_CR_CPU, AT91_PS_CR);
+        cpu_do_idle();
+}
+
 void __init at91x40_initialize(unsigned long main_clock)
 {
+        arm_pm_idle = at91x40_idle;
         at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
                         | (1 << AT91X40_ID_IRQ2);
 }
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index dfff2895f4b2..6ca680a1d5d1 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -28,6 +28,12 @@
 #include <asm/mach/time.h>
 #include <mach/at91_tc.h>
 
+#define at91_tc_read(field) \
+        __raw_readl(AT91_TC + field)
+
+#define at91_tc_write(field, value) \
+        __raw_writel(value, AT91_TC + field);
+
 /*
  *      3 counter/timer units present.
  */
@@ -37,12 +43,12 @@
 
 static unsigned long at91x40_gettimeoffset(void)
 {
-        return (at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
+        return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
 }
 
 static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
 {
-        at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_SR);
+        at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR);
         timer_tick();
         return IRQ_HANDLED;
 }
@@ -57,20 +63,20 @@ void __init at91x40_timer_init(void)
 {
         unsigned int v;
 
-        at91_sys_write(AT91_TC + AT91_TC_BCR, 0);
-        v = at91_sys_read(AT91_TC + AT91_TC_BMR);
+        at91_tc_write(AT91_TC_BCR, 0);
+        v = at91_tc_read(AT91_TC_BMR);
         v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE;
-        at91_sys_write(AT91_TC + AT91_TC_BMR, v);
+        at91_tc_write(AT91_TC_BMR, v);
 
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
 
         setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq);
 
-        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
+        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
 }
 
 struct sys_timer at91x40_timer = {
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
deleted file mode 100644
index ac3de4f7c31d..000000000000
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-cap9adk.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2005 SAN People
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/ads7846.h>
-#include <linux/fb.h>
-#include <linux/mtd/physmap.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/board.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/system_rev.h>
-
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init cap9adk_init_early(void)
-{
-        /* Initialize processor: 12 MHz crystal */
-        at91_initialize(12000000);
-
-        /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
-        at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
-        /* ... POWER LED always on */
-        at91_set_gpio_output(AT91_PIN_PC29, 1);
-
-        /* Setup the serial ports and console */
-        at91_register_uart(0, 0, 0);            /* DBGU = ttyS0 */
-        at91_set_serial_console(0);
-}
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata cap9adk_usbh_data = {
-        .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * USB HS Device port
- */
-static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
-        .vbus_pin       = AT91_PIN_PB31,
-};
-
-/*
- * ADS7846 Touchscreen
- */
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-static int ads7843_pendown_state(void)
-{
-        return !at91_get_gpio_value(AT91_PIN_PC4);      /* Touchscreen PENIRQ */
-}
-
-static struct ads7846_platform_data ads_info = {
-        .model                  = 7843,
-        .x_min                  = 150,
-        .x_max                  = 3830,
-        .y_min                  = 190,
-        .y_max                  = 3830,
-        .vref_delay_usecs       = 100,
-        .x_plate_ohms           = 450,
-        .y_plate_ohms           = 250,
-        .pressure_max           = 15000,
-        .debounce_max           = 1,
-        .debounce_rep           = 0,
-        .debounce_tol           = (~0),
-        .get_pendown_state      = ads7843_pendown_state,
-};
-
-static void __init cap9adk_add_device_ts(void)
-{
-        at91_set_gpio_input(AT91_PIN_PC4, 1);   /* Touchscreen PENIRQ */
-        at91_set_gpio_input(AT91_PIN_PC5, 1);   /* Touchscreen BUSY */
-}
-#else
-static void __init cap9adk_add_device_ts(void) {}
-#endif
-
-
-/*
- * SPI devices.
- */
-static struct spi_board_info cap9adk_spi_devices[] = {
-#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
-        {       /* DataFlash card */
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 15 * 1000 * 1000,
-                .bus_num        = 0,
-        },
-#endif
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-        {
-                .modalias       = "ads7846",
-                .chip_select    = 3,            /* can be 2 or 3, depending on J2 jumper */
-                .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
-                .bus_num        = 0,
-                .platform_data  = &ads_info,
-                .irq            = AT91_PIN_PC4,
-        },
-#endif
-};
-
-
-/*
- * MCI (SD/MMC)
- */
-static struct at91_mmc_data __initdata cap9adk_mmc_data = {
-        .wire4          = 1,
-        .det_pin        = -EINVAL,
-        .wp_pin         = -EINVAL,
-        .vcc_pin        = -EINVAL,
-};
-
-
-/*
- * MACB Ethernet device
- */
-static struct macb_platform_data __initdata cap9adk_macb_data = {
-        .phy_irq_pin    = -EINVAL,
-        .is_rmii        = 1,
-};
-
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
-        {
-                .name   = "NAND partition",
-                .offset = 0,
-                .size   = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct atmel_nand_data __initdata cap9adk_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = -EINVAL,
-        .enable_pin     = AT91_PIN_PD15,
-        .parts          = cap9adk_nand_partitions,
-        .num_parts      = ARRAY_SIZE(cap9adk_nand_partitions),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
-        .ncs_read_setup         = 1,
-        .nrd_setup              = 2,
-        .ncs_write_setup        = 1,
-        .nwe_setup              = 2,
-
-        .ncs_read_pulse         = 6,
-        .nrd_pulse              = 4,
-        .ncs_write_pulse        = 6,
-        .nwe_pulse              = 4,
-
-        .read_cycle             = 8,
-        .write_cycle            = 8,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-        .tdf_cycles             = 1,
-};
-
-static void __init cap9adk_add_device_nand(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        cap9adk_nand_data.bus_width_16 = board_have_nand_16bit();
-        /* setup bus-width (8 or 16) */
-        if (cap9adk_nand_data.bus_width_16)
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
-        else
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
-
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
-
-        at91_add_device_nand(&cap9adk_nand_data);
-}
-
-
-/*
- * NOR flash
- */
-static struct mtd_partition cap9adk_nor_partitions[] = {
-        {
-                .name           = "NOR partition",
-                .offset         = 0,
-                .size           = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct physmap_flash_data cap9adk_nor_data = {
-        .width          = 2,
-        .parts          = cap9adk_nor_partitions,
-        .nr_parts       = ARRAY_SIZE(cap9adk_nor_partitions),
-};
-
-#define NOR_BASE        AT91_CHIPSELECT_0
-#define NOR_SIZE        SZ_8M
-
-static struct resource nor_flash_resources[] = {
-        {
-                .start  = NOR_BASE,
-                .end    = NOR_BASE + NOR_SIZE - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device cap9adk_nor_flash = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                                .platform_data  = &cap9adk_nor_data,
-        },
-        .resource       = nor_flash_resources,
-        .num_resources  = ARRAY_SIZE(nor_flash_resources),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
-        .ncs_read_setup         = 2,
-        .nrd_setup              = 4,
-        .ncs_write_setup        = 2,
-        .nwe_setup              = 4,
-
-        .ncs_read_pulse         = 10,
-        .nrd_pulse              = 8,
-        .ncs_write_pulse        = 10,
-        .nwe_pulse              = 8,
-
-        .read_cycle             = 16,
-        .write_cycle            = 16,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
-        .tdf_cycles             = 1,
-};
-
-static __init void cap9adk_add_device_nor(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
-
-        platform_device_register(&cap9adk_nor_flash);
-}
-
-
-/*
- * LCD Controller
- */
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static struct fb_videomode at91_tft_vga_modes[] = {
-        {
-                .name           = "TX09D50VM1CCA @ 60",
-                .refresh        = 60,
-                .xres           = 240,          .yres           = 320,
-                .pixclock       = KHZ2PICOS(4965),
-
-                .left_margin    = 1,            .right_margin   = 33,
-                .upper_margin   = 1,            .lower_margin   = 0,
-                .hsync_len      = 5,            .vsync_len      = 1,
-
-                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-                .vmode          = FB_VMODE_NONINTERLACED,
-        },
-};
-
-static struct fb_monspecs at91fb_default_monspecs = {
-        .manufacturer   = "HIT",
-        .monitor        = "TX09D70VM1CCA",
-
-        .modedb         = at91_tft_vga_modes,
-        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
-        .hfmin          = 15000,
-        .hfmax          = 64000,
-        .vfmin          = 50,
-        .vfmax          = 150,
-};
-
-#define AT91CAP9_DEFAULT_LCDCON2        (ATMEL_LCDC_MEMOR_LITTLE \
-                                        | ATMEL_LCDC_DISTYPE_TFT    \
-                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-
-static void at91_lcdc_power_control(int on)
-{
-        if (on)
-                at91_set_gpio_value(AT91_PIN_PC0, 0);   /* power up */
-        else
-                at91_set_gpio_value(AT91_PIN_PC0, 1);   /* power down */
-}
-
-/* Driver datas */
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
-        .default_bpp                    = 16,
-        .default_dmacon                 = ATMEL_LCDC_DMAEN,
-        .default_lcdcon2                = AT91CAP9_DEFAULT_LCDCON2,
-        .default_monspecs               = &at91fb_default_monspecs,
-        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
-        .guard_time                     = 1,
-};
-
-#else
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
-#endif
-
-
-/*
- * AC97
- */
-static struct ac97c_platform_data cap9adk_ac97_data = {
-        .reset_pin      = -EINVAL,
-};
-
-
-static void __init cap9adk_board_init(void)
-{
-        /* Serial */
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&cap9adk_usbh_data);
-        /* USB HS */
-        at91_add_device_usba(&cap9adk_usba_udc_data);
-        /* SPI */
-        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
-        /* Touchscreen */
-        cap9adk_add_device_ts();
-        /* MMC */
-        at91_add_device_mmc(1, &cap9adk_mmc_data);
-        /* Ethernet */
-        at91_add_device_eth(&cap9adk_macb_data);
-        /* NAND */
-        cap9adk_add_device_nand();
-        /* NOR Flash */
-        cap9adk_add_device_nor();
-        /* I2C */
-        at91_add_device_i2c(NULL, 0);
-        /* LCD Controller */
-        at91_add_device_lcdc(&cap9adk_lcdc_data);
-        /* AC97 */
-        at91_add_device_ac97(&cap9adk_ac97_data);
-}
-
-MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
-        /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .init_early     = cap9adk_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = cap9adk_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 9ab3d1ea326d..989e1c5a9ca0 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -43,6 +43,7 @@
 #include <mach/board.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91sam9260_matrix.h>
+#include <mach/at91_matrix.h>
 
 #include "sam9_smc.h"
 #include "generic.h"
@@ -238,8 +239,8 @@ static __init void cpu9krea_add_device_nor(void)
 {
         unsigned long csa;
 
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
+        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
 
         /* configure chip-select 0 (NOR) */
         sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 368e1427ad99..e094cc81fe25 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -38,6 +38,7 @@
 
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index bb6b434ec0c1..583b72472ad9 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -15,7 +15,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/gpio.h>
-#include <linux/irqdomain.h>
+#include <linux/of.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
@@ -38,12 +38,6 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 12.000 MHz crystal */
         at91_initialize(12000000);
-
-        /* DGBU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* set serial console to ttyS0 (ie, DBGU) */
-        at91_set_serial_console(0);
 }
 
 /* det_pin is not connected */
@@ -88,15 +82,17 @@ static void __init ek_add_device_nand(void)
         at91_add_device_nand(&ek_nand_data);
 }
 
-static const struct of_device_id aic_of_match[] __initconst = {
-        { .compatible = "atmel,at91rm9200-aic", },
-        {},
+static const struct of_device_id irq_of_match[] __initconst = {
+
+        { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
+        { .compatible = "atmel,at91rm9200-gpio", .data = at91_gpio_of_irq_setup },
+        { .compatible = "atmel,at91sam9x5-gpio", .data = at91_gpio_of_irq_setup },
+        { /*sentinel*/ }
 };
 
 static void __init at91_dt_init_irq(void)
 {
-        irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
-        at91_init_irq_default();
+        of_irq_init(irq_of_match);
 }
 
 static void __init at91_dt_device_init(void)
@@ -109,6 +105,7 @@ static void __init at91_dt_device_init(void)
 
 static const char *at91_dt_board_compat[] __initdata = {
         "atmel,at91sam9m10g45ek",
+        "atmel,at91sam9x5ek",
         "calao,usb-a9g20",
         NULL
 };
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 07ef35b0ec2c..f23aabef8551 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -26,6 +26,7 @@
 
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
 #include "generic.h"
@@ -110,7 +111,7 @@ static void __init eco920_board_init(void)
         at91_add_device_mmc(0, &eco920_mmc_data);
         platform_device_register(&eco920_flash);
 
-        at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
+        at91_ramc_write(0, AT91_SMC_CSR(7),     AT91_SMC_RWHOLD_(1)
                                 | AT91_SMC_RWSETUP_(1)
                                 | AT91_SMC_DBW_8
                                 | AT91_SMC_WSEN
@@ -122,7 +123,7 @@ static void __init eco920_board_init(void)
         at91_set_deglitch(AT91_PIN_PA23, 1);
 
 /* Initialization of the Static Memory Controller for Chip Select 3 */
-        at91_sys_write(AT91_SMC_CSR(3),
+        at91_ramc_write(0, AT91_SMC_CSR(3),
                 AT91_SMC_DBW_16  |      /* 16 bit */
                 AT91_SMC_WSEN    |
                 AT91_SMC_NWS_(5) |      /* wait states */
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index eec02cd57ced..1815152001f7 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-at91/board-flexibity.c
  *
- *  Copyright (C) 2010 Flexibity
+ *  Copyright (C) 2010-2011 Flexibity
  *  Copyright (C) 2005 SAN People
  *  Copyright (C) 2006 Atmel
  *
@@ -62,6 +62,13 @@ static struct at91_udc_data __initdata flexibity_udc_data = {
         .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
+/* I2C devices */
+static struct i2c_board_info __initdata flexibity_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1307", 0x68),
+        },
+};
+
 /* SPI devices */
 static struct spi_board_info flexibity_spi_devices[] = {
         {       /* DataFlash chip */
@@ -141,6 +148,9 @@ static void __init flexibity_board_init(void)
         at91_add_device_usbh(&flexibity_usbh_data);
         /* USB Device */
         at91_add_device_udc(&flexibity_udc_data);
+        /* I2C */
+        at91_add_device_i2c(flexibity_i2c_devices,
+                ARRAY_SIZE(flexibity_i2c_devices));
         /* SPI */
         at91_add_device_spi(flexibity_spi_devices,
                 ARRAY_SIZE(flexibity_spi_devices));
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index d75a4a2ad9c2..bb9914582013 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -38,6 +38,7 @@
 #include <mach/board.h>
 #include <mach/cpu.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index ab024fa11d5c..59e35dd14863 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -39,6 +39,7 @@
 
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 782f37946af5..9083df04e7ed 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -41,6 +41,7 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index ef7c12a92246..11cbaa8946fe 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -41,6 +41,7 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index ea0d1b9c2b7b..57497e2b8878 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -24,11 +24,13 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/leds.h>
-#include <linux/clk.h>
 #include <linux/atmel-mci.h>
+#include <linux/delay.h>
 
 #include <mach/hardware.h>
 #include <video/atmel_lcdc.h>
+#include <media/soc_camera.h>
+#include <media/atmel-isi.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -185,6 +187,71 @@ static void __init ek_add_device_nand(void)
 
 
 /*
+ *  ISI
+ */
+static struct isi_platform_data __initdata isi_data = {
+        .frate                  = ISI_CFG1_FRATE_CAPTURE_ALL,
+        /* to use codec and preview path simultaneously */
+        .full_mode              = 1,
+        .data_width_flags       = ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10,
+        /* ISI_MCK is provided by programmable clock or external clock */
+        .mck_hz                 = 25000000,
+};
+
+
+/*
+ * soc-camera OV2640
+ */
+#if defined(CONFIG_SOC_CAMERA_OV2640) || \
+        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
+static unsigned long isi_camera_query_bus_param(struct soc_camera_link *link)
+{
+        /* ISI board for ek using default 8-bits connection */
+        return SOCAM_DATAWIDTH_8;
+}
+
+static int i2c_camera_power(struct device *dev, int on)
+{
+        /* enable or disable the camera */
+        pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
+        at91_set_gpio_output(AT91_PIN_PD13, !on);
+
+        if (!on)
+                goto out;
+
+        /* If enabled, give a reset impulse */
+        at91_set_gpio_output(AT91_PIN_PD12, 0);
+        msleep(20);
+        at91_set_gpio_output(AT91_PIN_PD12, 1);
+        msleep(100);
+
+out:
+        return 0;
+}
+
+static struct i2c_board_info i2c_camera = {
+        I2C_BOARD_INFO("ov2640", 0x30),
+};
+
+static struct soc_camera_link iclink_ov2640 = {
+        .bus_id                 = 0,
+        .board_info             = &i2c_camera,
+        .i2c_adapter_id         = 0,
+        .power                  = i2c_camera_power,
+        .query_bus_param        = isi_camera_query_bus_param,
+};
+
+static struct platform_device isi_ov2640 = {
+        .name   = "soc-camera-pdrv",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &iclink_ov2640,
+        },
+};
+#endif
+
+
+/*
  * LCD Controller
  */
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
@@ -377,7 +444,12 @@ static struct gpio_led ek_pwm_led[] = {
 #endif
 };
 
-
+static struct platform_device *devices[] __initdata = {
+#if defined(CONFIG_SOC_CAMERA_OV2640) || \
+        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
+        &isi_ov2640,
+#endif
+};
 
 static void __init ek_board_init(void)
 {
@@ -399,6 +471,8 @@ static void __init ek_board_init(void)
         ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(0, NULL, 0);
+        /* ISI, using programmable clock as ISI_MCK */
+        at91_add_device_isi(&isi_data, true);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
         /* Touch Screen */
@@ -410,6 +484,8 @@ static void __init ek_board_init(void)
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+        /* Other platform devices */
+        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
 MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 4770db08e5a6..3c2e3fcc310c 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -145,11 +145,11 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
                 /* Audio codec */
                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
         },
-        {
+};
+
+static struct i2c_board_info __initdata snapper9260_i2c_isl1208 = {
                 /* RTC */
                 I2C_BOARD_INFO("isl1208", 0x6f),
-                .irq = gpio_to_irq(AT91_PIN_PA31),
-        },
 };
 
 static void __init snapper9260_add_device_nand(void)
@@ -163,6 +163,10 @@ static void __init snapper9260_board_init(void)
 {
         at91_add_device_i2c(snapper9260_i2c_devices,
                             ARRAY_SIZE(snapper9260_i2c_devices));
+
+        snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
+        i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
+
         at91_add_device_serial();
         at91_add_device_usbh(&snapper9260_usbh_data);
         at91_add_device_udc(&snapper9260_udc_data);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index bbd553e1cd93..52f460768f71 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -45,6 +45,7 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
 #include "generic.h"
@@ -393,7 +394,7 @@ static void yl9200_init_video(void)
         at91_set_A_periph(AT91_PIN_PC6, 0);
 
         /* Initialization of the Static Memory Controller for Chip Select 2 */
-        at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16         /* 16 bit */
+        at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16             /* 16 bit */
                         | AT91_SMC_WSEN | AT91_SMC_NWS_(0x4)    /* wait states */
                         | AT91_SMC_TDF_(0x100)                  /* float time */
         );
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 61873f3aa92d..be51ca7f694d 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -28,9 +28,12 @@
 #include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
+#include <asm/proc-fns.h>
+
 #include "clock.h"
 #include "generic.h"
 
+void __iomem *at91_pmc_base;
 
 /*
  * There's a lot more which can be done with clocks, including cpufreq
@@ -47,26 +50,38 @@
 /*
  * Chips have some kind of clocks : group them by functionality
  */
-#define cpu_has_utmi()          (  cpu_is_at91cap9() \
-                                || cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45())
+#define cpu_has_utmi()          (  cpu_is_at91sam9rl() \
+                                || cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5())
 
 #define cpu_has_800M_plla()     (  cpu_is_at91sam9g20() \
-                                || cpu_is_at91sam9g45())
+                                || cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5())
 
 #define cpu_has_300M_plla()     (cpu_is_at91sam9g10())
 
 #define cpu_has_pllb()          (!(cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45()))
+                                || cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5()))
 
-#define cpu_has_upll()          (cpu_is_at91sam9g45())
+#define cpu_has_upll()          (cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5())
 
 /* USB host HS & FS */
 #define cpu_has_uhp()           (!cpu_is_at91sam9rl())
 
 /* USB device FS only */
 #define cpu_has_udpfs()         (!(cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45()))
+                                || cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5()))
+
+#define cpu_has_plladiv2()      (cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5())
+
+#define cpu_has_mdiv3()         (cpu_is_at91sam9g45() \
+                                || cpu_is_at91sam9x5())
+
+#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5())
 
 static LIST_HEAD(clocks);
 static DEFINE_SPINLOCK(clk_lock);
@@ -111,11 +126,11 @@ static void pllb_mode(struct clk *clk, int is_on)
                 value = 0;
 
         // REVISIT: Add work-around for AT91RM9200 Errata #26 ?
-        at91_sys_write(AT91_CKGR_PLLBR, value);
+        at91_pmc_write(AT91_CKGR_PLLBR, value);
 
         do {
                 cpu_relax();
-        } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
+        } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
 }
 
 static struct clk pllb = {
@@ -130,31 +145,24 @@ static struct clk pllb = {
 static void pmc_sys_mode(struct clk *clk, int is_on)
 {
         if (is_on)
-                at91_sys_write(AT91_PMC_SCER, clk->pmc_mask);
+                at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask);
         else
-                at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
+                at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask);
 }
 
 static void pmc_uckr_mode(struct clk *clk, int is_on)
 {
-        unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
-
-        if (cpu_is_at91sam9g45()) {
-                if (is_on)
-                        uckr |= AT91_PMC_BIASEN;
-                else
-                        uckr &= ~AT91_PMC_BIASEN;
-        }
+        unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
 
         if (is_on) {
                 is_on = AT91_PMC_LOCKU;
-                at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
+                at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
         } else
-                at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
+                at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
 
         do {
                 cpu_relax();
-        } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
+        } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
 }
 
 /* USB function clocks (PLLB must be 48 MHz) */
@@ -190,9 +198,9 @@ struct clk mck = {
 static void pmc_periph_mode(struct clk *clk, int is_on)
 {
         if (is_on)
-                at91_sys_write(AT91_PMC_PCER, clk->pmc_mask);
+                at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
         else
-                at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
+                at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
 }
 
 static struct clk __init *at91_css_to_clk(unsigned long css)
@@ -210,11 +218,24 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
                                 return &utmi_clk;
                         else if (cpu_has_pllb())
                                 return &pllb;
+                        break;
+                /* alternate PMC: can use master clock */
+                case AT91_PMC_CSS_MASTER:
+                        return &mck;
         }
 
         return NULL;
 }
 
+static int pmc_prescaler_divider(u32 reg)
+{
+        if (cpu_has_alt_prescaler()) {
+                return 1 << ((reg & AT91_PMC_ALT_PRES) >> PMC_ALT_PRES_OFFSET);
+        } else {
+                return 1 << ((reg & AT91_PMC_PRES) >> PMC_PRES_OFFSET);
+        }
+}
+
 static void __clk_enable(struct clk *clk)
 {
         if (clk->parent)
@@ -316,12 +337,22 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 {
         unsigned long   flags;
         unsigned        prescale;
+        unsigned long   prescale_offset, css_mask;
         unsigned long   actual;
 
         if (!clk_is_programmable(clk))
                 return -EINVAL;
         if (clk->users)
                 return -EBUSY;
+
+        if (cpu_has_alt_prescaler()) {
+                prescale_offset = PMC_ALT_PRES_OFFSET;
+                css_mask = AT91_PMC_ALT_PCKR_CSS;
+        } else {
+                prescale_offset = PMC_PRES_OFFSET;
+                css_mask = AT91_PMC_CSS;
+        }
+
         spin_lock_irqsave(&clk_lock, flags);
 
         actual = clk->parent->rate_hz;
@@ -329,10 +360,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
                 if (actual && actual <= rate) {
                         u32     pckr;
 
-                        pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
-                        pckr &= AT91_PMC_CSS;   /* clock selection */
-                        pckr |= prescale << 2;
-                        at91_sys_write(AT91_PMC_PCKR(clk->id), pckr);
+                        pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
+                        pckr &= css_mask;       /* keep clock selection */
+                        pckr |= prescale << prescale_offset;
+                        at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr);
                         clk->rate_hz = actual;
                         break;
                 }
@@ -366,7 +397,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
         clk->rate_hz = parent->rate_hz;
         clk->parent = parent;
-        at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id);
+        at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id);
 
         spin_unlock_irqrestore(&clk_lock, flags);
         return 0;
@@ -378,11 +409,17 @@ static void __init init_programmable_clock(struct clk *clk)
 {
         struct clk      *parent;
         u32             pckr;
+        unsigned int    css_mask;
+
+        if (cpu_has_alt_prescaler())
+                css_mask = AT91_PMC_ALT_PCKR_CSS;
+        else
+                css_mask = AT91_PMC_CSS;
 
-        pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
-        parent = at91_css_to_clk(pckr & AT91_PMC_CSS);
+        pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
+        parent = at91_css_to_clk(pckr & css_mask);
         clk->parent = parent;
-        clk->rate_hz = parent->rate_hz / (1 << ((pckr & AT91_PMC_PRES) >> 2));
+        clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
 }
 
 #endif  /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
@@ -396,19 +433,24 @@ static int at91_clk_show(struct seq_file *s, void *unused)
         u32             scsr, pcsr, uckr = 0, sr;
         struct clk      *clk;
 
-        seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
-        seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
-        seq_printf(s, "MOR  = %8x\n", at91_sys_read(AT91_CKGR_MOR));
-        seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
-        seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
+        scsr = at91_pmc_read(AT91_PMC_SCSR);
+        pcsr = at91_pmc_read(AT91_PMC_PCSR);
+        sr = at91_pmc_read(AT91_PMC_SR);
+        seq_printf(s, "SCSR = %8x\n", scsr);
+        seq_printf(s, "PCSR = %8x\n", pcsr);
+        seq_printf(s, "MOR  = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
+        seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
+        seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
         if (cpu_has_pllb())
-                seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
-        if (cpu_has_utmi())
-                seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
-        seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
+                seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR));
+        if (cpu_has_utmi()) {
+                uckr = at91_pmc_read(AT91_CKGR_UCKR);
+                seq_printf(s, "UCKR = %8x\n", uckr);
+        }
+        seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
         if (cpu_has_upll())
-                seq_printf(s, "USB  = %8x\n", at91_sys_read(AT91_PMC_USB));
-        seq_printf(s, "SR   = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
+                seq_printf(s, "USB  = %8x\n", at91_pmc_read(AT91_PMC_USB));
+        seq_printf(s, "SR   = %8x\n", sr);
 
         seq_printf(s, "\n");
 
@@ -596,16 +638,14 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
         if (cpu_is_at91rm9200()) {
                 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
                 udpck.pmc_mask = AT91RM9200_PMC_UDP;
-                at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
+                at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
                    cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
                    cpu_is_at91sam9g10()) {
                 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
-        } else if (cpu_is_at91cap9()) {
-                uhpck.pmc_mask = AT91CAP9_PMC_UHP;
         }
-        at91_sys_write(AT91_CKGR_PLLBR, 0);
+        at91_pmc_write(AT91_CKGR_PLLBR, 0);
 
         udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
         uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
@@ -622,13 +662,13 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
         /* Setup divider by 10 to reach 48 MHz */
         usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV;
 
-        at91_sys_write(AT91_PMC_USB, usbr);
+        at91_pmc_write(AT91_PMC_USB, usbr);
 
         /* Now set uhpck values */
         uhpck.parent = &utmi_clk;
         uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
         uhpck.rate_hz = utmi_clk.rate_hz;
-        uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
+        uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
 }
 
 int __init at91_clock_init(unsigned long main_clock)
@@ -637,6 +677,10 @@ int __init at91_clock_init(unsigned long main_clock)
         int i;
         int pll_overclock = false;
 
+        at91_pmc_base = ioremap(AT91_PMC, 256);
+        if (!at91_pmc_base)
+                panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
+
         /*
          * When the bootloader initialized the main oscillator correctly,
          * there's no problem using the cycle counter.  But if it didn't,
@@ -645,14 +689,14 @@ int __init at91_clock_init(unsigned long main_clock)
          */
         if (!main_clock) {
                 do {
-                        tmp = at91_sys_read(AT91_CKGR_MCFR);
+                        tmp = at91_pmc_read(AT91_CKGR_MCFR);
                 } while (!(tmp & AT91_PMC_MAINRDY));
                 main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
         }
         main_clk.rate_hz = main_clock;
 
         /* report if PLLA is more than mildly overclocked */
-        plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
+        plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
         if (cpu_has_300M_plla()) {
                 if (plla.rate_hz > 300000000)
                         pll_overclock = true;
@@ -666,8 +710,8 @@ int __init at91_clock_init(unsigned long main_clock)
         if (pll_overclock)
                 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
 
-        if (cpu_is_at91sam9g45()) {
-                mckr = at91_sys_read(AT91_PMC_MCKR);
+        if (cpu_has_plladiv2()) {
+                mckr = at91_pmc_read(AT91_PMC_MCKR);
                 plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12));      /* plla divisor by 2 */
         }
 
@@ -688,6 +732,10 @@ int __init at91_clock_init(unsigned long main_clock)
                  * (obtain the USB High Speed 480 MHz when input is 12 MHz)
                  */
                 utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
+
+                /* UTMI bias and PLL are managed at the same time */
+                if (cpu_has_upll())
+                        utmi_clk.pmc_mask |= AT91_PMC_BIASEN;
         }
 
         /*
@@ -703,10 +751,10 @@ int __init at91_clock_init(unsigned long main_clock)
          * MCK and CPU derive from one of those primary clocks.
          * For now, assume this parentage won't change.
          */
-        mckr = at91_sys_read(AT91_PMC_MCKR);
+        mckr = at91_pmc_read(AT91_PMC_MCKR);
         mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
         freq = mck.parent->rate_hz;
-        freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2));                           /* prescale */
+        freq /= pmc_prescaler_divider(mckr);                                    /* prescale */
         if (cpu_is_at91rm9200()) {
                 mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8));       /* mdiv */
         } else if (cpu_is_at91sam9g20()) {
@@ -714,13 +762,19 @@ int __init at91_clock_init(unsigned long main_clock)
                         freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq;    /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
                 if (mckr & AT91_PMC_PDIV)
                         freq /= 2;              /* processor clock division */
-        } else if (cpu_is_at91sam9g45()) {
+        } else if (cpu_has_mdiv3()) {
                 mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ?
                         freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
         } else {
                 mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8));              /* mdiv */
         }
 
+        if (cpu_has_alt_prescaler()) {
+                /* Programmable clocks can use MCK */
+                mck.type |= CLK_TYPE_PRIMARY;
+                mck.id = 4;
+        }
+
         /* Register the PMC's standard clocks */
         for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
                 at91_clk_add(standard_pmc_clocks[i]);
@@ -770,9 +824,15 @@ static int __init at91_clock_reset(void)
                 pr_debug("Clocks: disable unused %s\n", clk->name);
         }
 
-        at91_sys_write(AT91_PMC_PCDR, pcdr);
-        at91_sys_write(AT91_PMC_SCDR, scdr);
+        at91_pmc_write(AT91_PMC_PCDR, pcdr);
+        at91_pmc_write(AT91_PMC_SCDR, scdr);
 
         return 0;
 }
 late_initcall(at91_clock_reset);
+
+void at91sam9_idle(void)
+{
+        at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index a851e6c98421..555d956b3a57 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev,
 {
         struct timeval before, after;
         int idle_time;
-        u32 saved_lpr;
 
         local_irq_disable();
         do_gettimeofday(&before);
         if (index == 0)
                 /* Wait for interrupt state */
                 cpu_do_idle();
-        else if (index == 1) {
-                asm("b 1f; .align 5; 1:");
-                asm("mcr p15, 0, r0, c7, c10, 4");      /* drain write buffer */
-                saved_lpr = sdram_selfrefresh_enable();
-                cpu_do_idle();
-                sdram_selfrefresh_disable(saved_lpr);
-        }
+        else if (index == 1)
+                at91_standby();
+
         do_gettimeofday(&after);
         local_irq_enable();
         idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 594133451c0c..459f01a4a546 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -9,6 +9,7 @@
  */
 
 #include <linux/clkdev.h>
+#include <linux/of.h>
 
  /* Map io */
 extern void __init at91_map_io(void);
@@ -25,9 +26,13 @@ extern void __init at91_init_irq_default(void);
 extern void __init at91_init_interrupts(unsigned int priority[]);
 extern void __init at91x40_init_interrupts(unsigned int priority[]);
 extern void __init at91_aic_init(unsigned int priority[]);
+extern int  __init at91_aic_of_init(struct device_node *node,
+                                    struct device_node *parent);
+
 
  /* Timer */
 struct sys_timer;
+extern void at91rm9200_ioremap_st(u32 addr);
 extern struct sys_timer at91rm9200_timer;
 extern void at91sam926x_ioremap_pit(u32 addr);
 extern struct sys_timer at91sam926x_timer;
@@ -45,7 +50,6 @@ extern void __init at91sam9261_set_console_clock(int id);
 extern void __init at91sam9263_set_console_clock(int id);
 extern void __init at91sam9rl_set_console_clock(int id);
 extern void __init at91sam9g45_set_console_clock(int id);
-extern void __init at91cap9_set_console_clock(int id);
 #ifdef CONFIG_AT91_PMC_UNIT
 extern int __init at91_clock_init(unsigned long main_clock);
 #else
@@ -57,6 +61,9 @@ struct device;
 extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
+/* idle */
+extern void at91sam9_idle(void);
+
 /* reset */
 extern void at91_ioremap_rstc(u32 base_addr);
 extern void at91sam9_alt_restart(char, const char *);
@@ -65,6 +72,12 @@ extern void at91sam9g45_restart(char, const char *);
 /* shutdown */
 extern void at91_ioremap_shdwc(u32 base_addr);
 
+/* Matrix */
+extern void at91_ioremap_matrix(u32 base_addr);
+
+/* Ram Controler */
+extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
+
  /* GPIO */
 #define AT91RM9200_PQFP         3       /* AT91RM9200 PQFP package has 3 banks */
 #define AT91RM9200_BGA          4       /* AT91RM9200 BGA package has 4 banks */
@@ -75,5 +88,7 @@ struct at91_gpio_bank {
 };
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
+extern int  __init at91_gpio_of_irq_setup(struct device_node *node,
+                                          struct device_node *parent);
 
 extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 74d6783eeabb..325837a264c9 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -11,6 +11,7 @@
 
 #include <linux/clk.h>
 #include <linux/errno.h>
+#include <linux/device.h>
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -20,6 +21,10 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_gpio.h>
 
 #include <mach/hardware.h>
 #include <mach/at91_pio.h>
@@ -29,9 +34,12 @@
 struct at91_gpio_chip {
         struct gpio_chip        chip;
         struct at91_gpio_chip   *next;          /* Bank sharing same clock */
-        int                     id;             /* ID of register bank */
-        void __iomem            *regbase;       /* Base of register bank */
+        int                     pioc_hwirq;     /* PIO bank interrupt identifier on AIC */
+        int                     pioc_virq;      /* PIO bank Linux virtual interrupt */
+        int                     pioc_idx;       /* PIO bank index */
+        void __iomem            *regbase;       /* PIO bank virtual address */
         struct clk              *clock;         /* associated clock */
+        struct irq_domain       *domain;        /* associated irq domain */
 };
 
 #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -43,8 +51,9 @@ static int at91_gpiolib_direction_output(struct gpio_chip *chip,
                                          unsigned offset, int val);
 static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                                         unsigned offset);
+static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
 
-#define AT91_GPIO_CHIP(name, base_gpio, nr_gpio)                        \
+#define AT91_GPIO_CHIP(name, nr_gpio)                                   \
         {                                                               \
                 .chip = {                                               \
                         .label            = name,                       \
@@ -53,20 +62,28 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                         .get              = at91_gpiolib_get,           \
                         .set              = at91_gpiolib_set,           \
                         .dbg_show         = at91_gpiolib_dbg_show,      \
-                        .base             = base_gpio,                  \
+                        .to_irq           = at91_gpiolib_to_irq,        \
                         .ngpio            = nr_gpio,                    \
                 },                                                      \
         }
 
 static struct at91_gpio_chip gpio_chip[] = {
-        AT91_GPIO_CHIP("pioA", 0x00, 32),
-        AT91_GPIO_CHIP("pioB", 0x20, 32),
-        AT91_GPIO_CHIP("pioC", 0x40, 32),
-        AT91_GPIO_CHIP("pioD", 0x60, 32),
-        AT91_GPIO_CHIP("pioE", 0x80, 32),
+        AT91_GPIO_CHIP("pioA", 32),
+        AT91_GPIO_CHIP("pioB", 32),
+        AT91_GPIO_CHIP("pioC", 32),
+        AT91_GPIO_CHIP("pioD", 32),
+        AT91_GPIO_CHIP("pioE", 32),
 };
 
 static int gpio_banks;
+static unsigned long at91_gpio_caps;
+
+/* All PIO controllers support PIO3 features */
+#define AT91_GPIO_CAP_PIO3      (1 <<  0)
+
+#define has_pio3()      (at91_gpio_caps & AT91_GPIO_CAP_PIO3)
+
+/*--------------------------------------------------------------------------*/
 
 static inline void __iomem *pin_to_controller(unsigned pin)
 {
@@ -83,6 +100,25 @@ static inline unsigned pin_to_mask(unsigned pin)
 }
 
 
+static char peripheral_function(void __iomem *pio, unsigned mask)
+{
+        char    ret = 'X';
+        u8      select;
+
+        if (pio) {
+                if (has_pio3()) {
+                        select = !!(__raw_readl(pio + PIO_ABCDSR1) & mask);
+                        select |= (!!(__raw_readl(pio + PIO_ABCDSR2) & mask) << 1);
+                        ret = 'A' + select;
+                } else {
+                        ret = __raw_readl(pio + PIO_ABSR) & mask ?
+                                                        'B' : 'A';
+                }
+        }
+
+        return ret;
+}
+
 /*--------------------------------------------------------------------------*/
 
 /* Not all hardware capabilities are exposed through these calls; they
@@ -130,7 +166,14 @@ int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup)
 
         __raw_writel(mask, pio + PIO_IDR);
         __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        __raw_writel(mask, pio + PIO_ASR);
+        if (has_pio3()) {
+                __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask,
+                                                        pio + PIO_ABCDSR1);
+                __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
+                                                        pio + PIO_ABCDSR2);
+        } else {
+                __raw_writel(mask, pio + PIO_ASR);
+        }
         __raw_writel(mask, pio + PIO_PDR);
         return 0;
 }
@@ -150,7 +193,14 @@ int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup)
 
         __raw_writel(mask, pio + PIO_IDR);
         __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        __raw_writel(mask, pio + PIO_BSR);
+        if (has_pio3()) {
+                __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask,
+                                                        pio + PIO_ABCDSR1);
+                __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
+                                                        pio + PIO_ABCDSR2);
+        } else {
+                __raw_writel(mask, pio + PIO_BSR);
+        }
         __raw_writel(mask, pio + PIO_PDR);
         return 0;
 }
@@ -158,8 +208,50 @@ EXPORT_SYMBOL(at91_set_B_periph);
 
 
 /*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
- * configure it for an input.
+ * mux the pin to the "C" internal peripheral role.
+ */
+int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup)
+{
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
+
+        if (!pio || !has_pio3())
+                return -EINVAL;
+
+        __raw_writel(mask, pio + PIO_IDR);
+        __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
+        __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
+        __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
+        __raw_writel(mask, pio + PIO_PDR);
+        return 0;
+}
+EXPORT_SYMBOL(at91_set_C_periph);
+
+
+/*
+ * mux the pin to the "D" internal peripheral role.
+ */
+int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup)
+{
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
+
+        if (!pio || !has_pio3())
+                return -EINVAL;
+
+        __raw_writel(mask, pio + PIO_IDR);
+        __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
+        __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
+        __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
+        __raw_writel(mask, pio + PIO_PDR);
+        return 0;
+}
+EXPORT_SYMBOL(at91_set_D_periph);
+
+
+/*
+ * mux the pin to the gpio controller (instead of "A", "B", "C"
+ * or "D" peripheral), and configure it for an input.
  */
 int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup)
 {
@@ -179,8 +271,8 @@ EXPORT_SYMBOL(at91_set_gpio_input);
 
 
 /*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
- * and configure it for an output.
+ * mux the pin to the gpio controller (instead of "A", "B", "C"
+ * or "D" peripheral), and configure it for an output.
  */
 int __init_or_module at91_set_gpio_output(unsigned pin, int value)
 {
@@ -210,12 +302,37 @@ int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
 
         if (!pio)
                 return -EINVAL;
+
+        if (has_pio3() && is_on)
+                __raw_writel(mask, pio + PIO_IFSCDR);
         __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
         return 0;
 }
 EXPORT_SYMBOL(at91_set_deglitch);
 
 /*
+ * enable/disable the debounce filter;
+ */
+int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div)
+{
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
+
+        if (!pio || !has_pio3())
+                return -EINVAL;
+
+        if (is_on) {
+                __raw_writel(mask, pio + PIO_IFSCER);
+                __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+                __raw_writel(mask, pio + PIO_IFER);
+        } else {
+                __raw_writel(mask, pio + PIO_IFDR);
+        }
+        return 0;
+}
+EXPORT_SYMBOL(at91_set_debounce);
+
+/*
  * enable/disable the multi-driver; This is only valid for output and
  * allows the output pin to run as an open collector output.
  */
@@ -233,6 +350,41 @@ int __init_or_module at91_set_multi_drive(unsigned pin, int is_on)
 EXPORT_SYMBOL(at91_set_multi_drive);
 
 /*
+ * enable/disable the pull-down.
+ * If pull-up already enabled while calling the function, we disable it.
+ */
+int __init_or_module at91_set_pulldown(unsigned pin, int is_on)
+{
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
+
+        if (!pio || !has_pio3())
+                return -EINVAL;
+
+        /* Disable pull-up anyway */
+        __raw_writel(mask, pio + PIO_PUDR);
+        __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
+        return 0;
+}
+EXPORT_SYMBOL(at91_set_pulldown);
+
+/*
+ * disable Schmitt trigger
+ */
+int __init_or_module at91_disable_schmitt_trig(unsigned pin)
+{
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
+
+        if (!pio || !has_pio3())
+                return -EINVAL;
+
+        __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
+        return 0;
+}
+EXPORT_SYMBOL(at91_disable_schmitt_trig);
+
+/*
  * assuming the pin is muxed as a gpio output, set its value.
  */
 int at91_set_gpio_value(unsigned pin, int value)
@@ -273,9 +425,9 @@ static u32 backups[MAX_GPIO_BANKS];
 
 static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
 {
-        unsigned        pin = irq_to_gpio(d->irq);
-        unsigned        mask = pin_to_mask(pin);
-        unsigned        bank = pin / 32;
+        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
+        unsigned        mask = 1 << d->hwirq;
+        unsigned        bank = at91_gpio->pioc_idx;
 
         if (unlikely(bank >= MAX_GPIO_BANKS))
                 return -EINVAL;
@@ -285,7 +437,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
         else
                 wakeups[bank] &= ~mask;
 
-        irq_set_irq_wake(gpio_chip[bank].id, state);
+        irq_set_irq_wake(at91_gpio->pioc_virq, state);
 
         return 0;
 }
@@ -301,9 +453,10 @@ void at91_gpio_suspend(void)
                 __raw_writel(backups[i], pio + PIO_IDR);
                 __raw_writel(wakeups[i], pio + PIO_IER);
 
-                if (!wakeups[i])
+                if (!wakeups[i]) {
+                        clk_unprepare(gpio_chip[i].clock);
                         clk_disable(gpio_chip[i].clock);
-                else {
+                } else {
 #ifdef CONFIG_PM_DEBUG
                         printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
 #endif
@@ -318,8 +471,10 @@ void at91_gpio_resume(void)
         for (i = 0; i < gpio_banks; i++) {
                 void __iomem    *pio = gpio_chip[i].regbase;
 
-                if (!wakeups[i])
-                        clk_enable(gpio_chip[i].clock);
+                if (!wakeups[i]) {
+                        if (clk_prepare(gpio_chip[i].clock) == 0)
+                                clk_enable(gpio_chip[i].clock);
+                }
 
                 __raw_writel(wakeups[i], pio + PIO_IDR);
                 __raw_writel(backups[i], pio + PIO_IER);
@@ -335,7 +490,10 @@ void at91_gpio_resume(void)
  * To use any AT91_PIN_* as an externally triggered IRQ, first call
  * at91_set_gpio_input() then maybe enable its glitch filter.
  * Then just request_irq() with the pin ID; it works like any ARM IRQ
- * handler, though it always triggers on rising and falling edges.
+ * handler.
+ * First implementation always triggers on rising and falling edges
+ * whereas the newer PIO3 can be additionally configured to trigger on
+ * level, edge with any polarity.
  *
  * Alternatively, certain pins may be used directly as IRQ0..IRQ6 after
  * configuring them with at91_set_a_periph() or at91_set_b_periph().
@@ -344,9 +502,9 @@ void at91_gpio_resume(void)
 
 static void gpio_irq_mask(struct irq_data *d)
 {
-        unsigned        pin = irq_to_gpio(d->irq);
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
+        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
+        void __iomem    *pio = at91_gpio->regbase;
+        unsigned        mask = 1 << d->hwirq;
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IDR);
@@ -354,9 +512,9 @@ static void gpio_irq_mask(struct irq_data *d)
 
 static void gpio_irq_unmask(struct irq_data *d)
 {
-        unsigned        pin = irq_to_gpio(d->irq);
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
+        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
+        void __iomem    *pio = at91_gpio->regbase;
+        unsigned        mask = 1 << d->hwirq;
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IER);
@@ -373,23 +531,66 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
         }
 }
 
+/* Alternate irq type for PIO3 support */
+static int alt_gpio_irq_type(struct irq_data *d, unsigned type)
+{
+        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
+        void __iomem    *pio = at91_gpio->regbase;
+        unsigned        mask = 1 << d->hwirq;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_RISING:
+                __raw_writel(mask, pio + PIO_ESR);
+                __raw_writel(mask, pio + PIO_REHLSR);
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                __raw_writel(mask, pio + PIO_ESR);
+                __raw_writel(mask, pio + PIO_FELLSR);
+                break;
+        case IRQ_TYPE_LEVEL_LOW:
+                __raw_writel(mask, pio + PIO_LSR);
+                __raw_writel(mask, pio + PIO_FELLSR);
+                break;
+        case IRQ_TYPE_LEVEL_HIGH:
+                __raw_writel(mask, pio + PIO_LSR);
+                __raw_writel(mask, pio + PIO_REHLSR);
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                /*
+                 * disable additional interrupt modes:
+                 * fall back to default behavior
+                 */
+                __raw_writel(mask, pio + PIO_AIMDR);
+                return 0;
+        case IRQ_TYPE_NONE:
+        default:
+                pr_warn("AT91: No type for irq %d\n", gpio_to_irq(d->irq));
+                return -EINVAL;
+        }
+
+        /* enable additional interrupt modes */
+        __raw_writel(mask, pio + PIO_AIMER);
+
+        return 0;
+}
+
 static struct irq_chip gpio_irqchip = {
         .name           = "GPIO",
         .irq_disable    = gpio_irq_mask,
         .irq_mask       = gpio_irq_mask,
         .irq_unmask     = gpio_irq_unmask,
-        .irq_set_type   = gpio_irq_type,
+        /* .irq_set_type is set dynamically */
         .irq_set_wake   = gpio_irq_set_wake,
 };
 
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
-        unsigned        irq_pin;
         struct irq_data *idata = irq_desc_get_irq_data(desc);
         struct irq_chip *chip = irq_data_get_irq_chip(idata);
         struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
         void __iomem    *pio = at91_gpio->regbase;
-        u32             isr;
+        unsigned long   isr;
+        int             n;
 
         /* temporarily mask (level sensitive) parent IRQ */
         chip->irq_ack(idata);
@@ -407,13 +608,10 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                         continue;
                 }
 
-                irq_pin = gpio_to_irq(at91_gpio->chip.base);
-
-                while (isr) {
-                        if (isr & 1)
-                                generic_handle_irq(irq_pin);
-                        irq_pin++;
-                        isr >>= 1;
+                n = find_first_bit(&isr, BITS_PER_LONG);
+                while (n < BITS_PER_LONG) {
+                        generic_handle_irq(irq_find_mapping(at91_gpio->domain, n));
+                        n = find_next_bit(&isr, BITS_PER_LONG, n + 1);
                 }
         }
         chip->irq_unmask(idata);
@@ -424,6 +622,33 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 
 #ifdef CONFIG_DEBUG_FS
 
+static void gpio_printf(struct seq_file *s, void __iomem *pio, unsigned mask)
+{
+        char    *trigger = NULL;
+        char    *polarity = NULL;
+
+        if (__raw_readl(pio + PIO_IMR) & mask) {
+                if (!has_pio3() || !(__raw_readl(pio + PIO_AIMMR) & mask )) {
+                        trigger = "edge";
+                        polarity = "both";
+                } else {
+                        if (__raw_readl(pio + PIO_ELSR) & mask) {
+                                trigger = "level";
+                                polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
+                                        "high" : "low";
+                        } else {
+                                trigger = "edge";
+                                polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
+                                                "rising" : "falling";
+                        }
+                }
+                seq_printf(s, "IRQ:%s-%s\t", trigger, polarity);
+        } else {
+                seq_printf(s, "GPIO:%s\t\t",
+                                __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
+        }
+}
+
 static int at91_gpio_show(struct seq_file *s, void *unused)
 {
         int bank, j;
@@ -431,7 +656,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
         /* print heading */
         seq_printf(s, "Pin\t");
         for (bank = 0; bank < gpio_banks; bank++) {
-                seq_printf(s, "PIO%c\t", 'A' + bank);
+                seq_printf(s, "PIO%c\t\t", 'A' + bank);
         };
         seq_printf(s, "\n\n");
 
@@ -445,11 +670,10 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
                         unsigned        mask = pin_to_mask(pin);
 
                         if (__raw_readl(pio + PIO_PSR) & mask)
-                                seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
+                                gpio_printf(s, pio, mask);
                         else
-                                seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A");
-
-                        seq_printf(s, "\t");
+                                seq_printf(s, "%c\t\t",
+                                                peripheral_function(pio, mask));
                 }
 
                 seq_printf(s, "\n");
@@ -488,46 +712,152 @@ postcore_initcall(at91_gpio_debugfs_init);
  */
 static struct lock_class_key gpio_lock_class;
 
+#if defined(CONFIG_OF)
+static int at91_gpio_irq_map(struct irq_domain *h, unsigned int virq,
+                                                        irq_hw_number_t hw)
+{
+        struct at91_gpio_chip   *at91_gpio = h->host_data;
+
+        irq_set_lockdep_class(virq, &gpio_lock_class);
+
+        /*
+         * Can use the "simple" and not "edge" handler since it's
+         * shorter, and the AIC handles interrupts sanely.
+         */
+        irq_set_chip_and_handler(virq, &gpio_irqchip,
+                                 handle_simple_irq);
+        set_irq_flags(virq, IRQF_VALID);
+        irq_set_chip_data(virq, at91_gpio);
+
+        return 0;
+}
+
+static struct irq_domain_ops at91_gpio_ops = {
+        .map    = at91_gpio_irq_map,
+        .xlate  = irq_domain_xlate_twocell,
+};
+
+int __init at91_gpio_of_irq_setup(struct device_node *node,
+                                     struct device_node *parent)
+{
+        struct at91_gpio_chip   *prev = NULL;
+        int                     alias_idx = of_alias_get_id(node, "gpio");
+        struct at91_gpio_chip   *at91_gpio = &gpio_chip[alias_idx];
+
+        /* Setup proper .irq_set_type function */
+        if (has_pio3())
+                gpio_irqchip.irq_set_type = alt_gpio_irq_type;
+        else
+                gpio_irqchip.irq_set_type = gpio_irq_type;
+
+        /* Disable irqs of this PIO controller */
+        __raw_writel(~0, at91_gpio->regbase + PIO_IDR);
+
+        /* Setup irq domain */
+        at91_gpio->domain = irq_domain_add_linear(node, at91_gpio->chip.ngpio,
+                                                &at91_gpio_ops, at91_gpio);
+        if (!at91_gpio->domain)
+                panic("at91_gpio.%d: couldn't allocate irq domain (DT).\n",
+                        at91_gpio->pioc_idx);
+
+        /* Setup chained handler */
+        if (at91_gpio->pioc_idx)
+                prev = &gpio_chip[at91_gpio->pioc_idx - 1];
+
+        /* The toplevel handler handles one bank of GPIOs, except
+         * on some SoC it can handles up to three...
+         * We only set up the handler for the first of the list.
+         */
+        if (prev && prev->next == at91_gpio)
+                return 0;
+
+        at91_gpio->pioc_virq = irq_create_mapping(irq_find_host(parent),
+                                                        at91_gpio->pioc_hwirq);
+        irq_set_chip_data(at91_gpio->pioc_virq, at91_gpio);
+        irq_set_chained_handler(at91_gpio->pioc_virq, gpio_irq_handler);
+
+        return 0;
+}
+#else
+int __init at91_gpio_of_irq_setup(struct device_node *node,
+                                     struct device_node *parent)
+{
+        return -EINVAL;
+}
+#endif
+
+/*
+ * irqdomain initialization: pile up irqdomains on top of AIC range
+ */
+static void __init at91_gpio_irqdomain(struct at91_gpio_chip *at91_gpio)
+{
+        int irq_base;
+
+        irq_base = irq_alloc_descs(-1, 0, at91_gpio->chip.ngpio, 0);
+        if (irq_base < 0)
+                panic("at91_gpio.%d: error %d: couldn't allocate IRQ numbers.\n",
+                        at91_gpio->pioc_idx, irq_base);
+        at91_gpio->domain = irq_domain_add_legacy(NULL, at91_gpio->chip.ngpio,
+                                                  irq_base, 0,
+                                                  &irq_domain_simple_ops, NULL);
+        if (!at91_gpio->domain)
+                panic("at91_gpio.%d: couldn't allocate irq domain.\n",
+                        at91_gpio->pioc_idx);
+}
+
 /*
  * Called from the processor-specific init to enable GPIO interrupt support.
  */
 void __init at91_gpio_irq_setup(void)
 {
-        unsigned                pioc, irq = gpio_to_irq(0);
+        unsigned                pioc;
+        int                     gpio_irqnbr = 0;
         struct at91_gpio_chip   *this, *prev;
 
+        /* Setup proper .irq_set_type function */
+        if (has_pio3())
+                gpio_irqchip.irq_set_type = alt_gpio_irq_type;
+        else
+                gpio_irqchip.irq_set_type = gpio_irq_type;
+
         for (pioc = 0, this = gpio_chip, prev = NULL;
                         pioc++ < gpio_banks;
                         prev = this, this++) {
-                unsigned        id = this->id;
-                unsigned        i;
+                int offset;
 
                 __raw_writel(~0, this->regbase + PIO_IDR);
 
-                for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32;
-                     i++, irq++) {
-                        irq_set_lockdep_class(irq, &gpio_lock_class);
+                /* setup irq domain for this GPIO controller */
+                at91_gpio_irqdomain(this);
+
+                for (offset = 0; offset < this->chip.ngpio; offset++) {
+                        unsigned int virq = irq_find_mapping(this->domain, offset);
+                        irq_set_lockdep_class(virq, &gpio_lock_class);
 
                         /*
                          * Can use the "simple" and not "edge" handler since it's
                          * shorter, and the AIC handles interrupts sanely.
                          */
-                        irq_set_chip_and_handler(irq, &gpio_irqchip,
+                        irq_set_chip_and_handler(virq, &gpio_irqchip,
                                                  handle_simple_irq);
-                        set_irq_flags(irq, IRQF_VALID);
+                        set_irq_flags(virq, IRQF_VALID);
+                        irq_set_chip_data(virq, this);
+
+                        gpio_irqnbr++;
                 }
 
                 /* The toplevel handler handles one bank of GPIOs, except
-                 * AT91SAM9263_ID_PIOCDE handles three... PIOC is first in
-                 * the list, so we only set up that handler.
+                 * on some SoC it can handles up to three...
+                 * We only set up the handler for the first of the list.
                  */
                 if (prev && prev->next == this)
                         continue;
 
-                irq_set_chip_data(id, this);
-                irq_set_chained_handler(id, gpio_irq_handler);
+                this->pioc_virq = irq_create_mapping(NULL, this->pioc_hwirq);
+                irq_set_chip_data(this->pioc_virq, this);
+                irq_set_chained_handler(this->pioc_virq, gpio_irq_handler);
         }
-        pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks);
+        pr_info("AT91: %d gpio irqs in %d banks\n", gpio_irqnbr, gpio_banks);
 }
 
 /* gpiolib support */
@@ -593,48 +923,175 @@ static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
                                            at91_get_gpio_value(pin) ?
                                            "set" : "clear");
                         else
-                                seq_printf(s, "[periph %s]\n",
-                                           __raw_readl(pio + PIO_ABSR) &
-                                           mask ? "B" : "A");
+                                seq_printf(s, "[periph %c]\n",
+                                           peripheral_function(pio, mask));
                 }
         }
 }
 
+static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+        struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+        int virq;
+
+        if (offset < chip->ngpio)
+                virq = irq_create_mapping(at91_gpio->domain, offset);
+        else
+                virq = -ENXIO;
+
+        dev_dbg(chip->dev, "%s: request IRQ for GPIO %d, return %d\n",
+                                chip->label, offset + chip->base, virq);
+        return virq;
+}
+
+static int __init at91_gpio_setup_clk(int idx)
+{
+        struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
+
+        /* retreive PIO controller's clock */
+        at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
+        if (IS_ERR(at91_gpio->clock)) {
+                pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", idx);
+                goto err;
+        }
+
+        if (clk_prepare(at91_gpio->clock))
+                goto clk_prep_err;
+
+        /* enable PIO controller's clock */
+        if (clk_enable(at91_gpio->clock)) {
+                pr_err("at91_gpio.%d, failed to enable clock, ignoring.\n", idx);
+                goto clk_err;
+        }
+
+        return 0;
+
+clk_err:
+        clk_unprepare(at91_gpio->clock);
+clk_prep_err:
+        clk_put(at91_gpio->clock);
+err:
+        return -EINVAL;
+}
+
+#ifdef CONFIG_OF_GPIO
+static void __init of_at91_gpio_init_one(struct device_node *np)
+{
+        int alias_idx;
+        struct at91_gpio_chip *at91_gpio;
+
+        if (!np)
+                return;
+
+        alias_idx = of_alias_get_id(np, "gpio");
+        if (alias_idx >= MAX_GPIO_BANKS) {
+                pr_err("at91_gpio, failed alias idx(%d) > MAX_GPIO_BANKS(%d), ignoring.\n",
+                                                alias_idx, MAX_GPIO_BANKS);
+                return;
+        }
+
+        at91_gpio = &gpio_chip[alias_idx];
+        at91_gpio->chip.base = alias_idx * at91_gpio->chip.ngpio;
+
+        at91_gpio->regbase = of_iomap(np, 0);
+        if (!at91_gpio->regbase) {
+                pr_err("at91_gpio.%d, failed to map registers, ignoring.\n",
+                                                                alias_idx);
+                return;
+        }
+
+        /* Get the interrupts property */
+        if (of_property_read_u32(np, "interrupts", &at91_gpio->pioc_hwirq)) {
+                pr_err("at91_gpio.%d, failed to get interrupts property, ignoring.\n",
+                                                                alias_idx);
+                goto ioremap_err;
+        }
+
+        /* Get capabilities from compatibility property */
+        if (of_device_is_compatible(np, "atmel,at91sam9x5-gpio"))
+                at91_gpio_caps |= AT91_GPIO_CAP_PIO3;
+
+        /* Setup clock */
+        if (at91_gpio_setup_clk(alias_idx))
+                goto ioremap_err;
+
+        at91_gpio->chip.of_node = np;
+        gpio_banks = max(gpio_banks, alias_idx + 1);
+        at91_gpio->pioc_idx = alias_idx;
+        return;
+
+ioremap_err:
+        iounmap(at91_gpio->regbase);
+}
+
+static int __init of_at91_gpio_init(void)
+{
+        struct device_node *np = NULL;
+
+        /*
+         * This isn't ideal, but it gets things hooked up until this
+         * driver is converted into a platform_device
+         */
+        for_each_compatible_node(np, NULL, "atmel,at91rm9200-gpio")
+                of_at91_gpio_init_one(np);
+
+        return gpio_banks > 0 ? 0 : -EINVAL;
+}
+#else
+static int __init of_at91_gpio_init(void)
+{
+        return -EINVAL;
+}
+#endif
+
+static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
+{
+        struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
+
+        at91_gpio->chip.base = idx * at91_gpio->chip.ngpio;
+        at91_gpio->pioc_hwirq = pioc_hwirq;
+        at91_gpio->pioc_idx = idx;
+
+        at91_gpio->regbase = ioremap(regbase, 512);
+        if (!at91_gpio->regbase) {
+                pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", idx);
+                return;
+        }
+
+        if (at91_gpio_setup_clk(idx))
+                goto ioremap_err;
+
+        gpio_banks = max(gpio_banks, idx + 1);
+        return;
+
+ioremap_err:
+        iounmap(at91_gpio->regbase);
+}
+
 /*
  * Called from the processor-specific init to enable GPIO pin support.
  */
 void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
 {
-        unsigned                i;
+        unsigned i;
         struct at91_gpio_chip *at91_gpio, *last = NULL;
 
         BUG_ON(nr_banks > MAX_GPIO_BANKS);
 
-        gpio_banks = nr_banks;
+        if (of_at91_gpio_init() < 0) {
+                /* No GPIO controller found in device tree */
+                for (i = 0; i < nr_banks; i++)
+                        at91_gpio_init_one(i, data[i].regbase, data[i].id);
+        }
 
-        for (i = 0; i < nr_banks; i++) {
+        for (i = 0; i < gpio_banks; i++) {
                 at91_gpio = &gpio_chip[i];
 
-                at91_gpio->id = data[i].id;
-                at91_gpio->chip.base = i * 32;
-
-                at91_gpio->regbase = ioremap(data[i].regbase, 512);
-                if (!at91_gpio->regbase) {
-                        pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i);
-                        continue;
-                }
-
-                at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
-                if (!at91_gpio->clock) {
-                        pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
-                        continue;
-                }
-
-                /* enable PIO controller's clock */
-                clk_enable(at91_gpio->clock);
-
-                /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
-                if (last && last->id == at91_gpio->id)
+                /*
+                 * GPIO controller are grouped on some SoC:
+                 * PIOC, PIOD and PIOE can share the same IRQ line
+                 */
+                if (last && last->pioc_hwirq == at91_gpio->pioc_hwirq)
                         last->next = at91_gpio;
                 last = at91_gpio;
 
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
new file mode 100644
index 000000000000..02fae9de746b
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_matrix.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ */
+
+#ifndef __MACH_AT91_MATRIX_H__
+#define __MACH_AT91_MATRIX_H__
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_matrix_base;
+
+#define at91_matrix_read(field) \
+        __raw_readl(at91_matrix_base + field)
+
+#define at91_matrix_write(field, value) \
+        __raw_writel(value, at91_matrix_base + field);
+
+#else
+.extern at91_matrix_base
+#endif
+
+#endif /* __MACH_AT91_MATRIX_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
index c6a31bf8a5c6..732b11c37f1a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -40,10 +40,35 @@
 #define PIO_PUER        0x64    /* Pull-up Enable Register */
 #define PIO_PUSR        0x68    /* Pull-up Status Register */
 #define PIO_ASR         0x70    /* Peripheral A Select Register */
+#define PIO_ABCDSR1     0x70    /* Peripheral ABCD Select Register 1 [some sam9 only] */
 #define PIO_BSR         0x74    /* Peripheral B Select Register */
+#define PIO_ABCDSR2     0x74    /* Peripheral ABCD Select Register 2 [some sam9 only] */
 #define PIO_ABSR        0x78    /* AB Status Register */
+#define PIO_IFSCDR      0x80    /* Input Filter Slow Clock Disable Register */
+#define PIO_IFSCER      0x84    /* Input Filter Slow Clock Enable Register */
+#define PIO_IFSCSR      0x88    /* Input Filter Slow Clock Status Register */
+#define PIO_SCDR        0x8c    /* Slow Clock Divider Debouncing Register */
+#define         PIO_SCDR_DIV    (0x3fff <<  0)          /* Slow Clock Divider Mask */
+#define PIO_PPDDR       0x90    /* Pad Pull-down Disable Register */
+#define PIO_PPDER       0x94    /* Pad Pull-down Enable Register */
+#define PIO_PPDSR       0x98    /* Pad Pull-down Status Register */
 #define PIO_OWER        0xa0    /* Output Write Enable Register */
 #define PIO_OWDR        0xa4    /* Output Write Disable Register */
 #define PIO_OWSR        0xa8    /* Output Write Status Register */
+#define PIO_AIMER       0xb0    /* Additional Interrupt Modes Enable Register */
+#define PIO_AIMDR       0xb4    /* Additional Interrupt Modes Disable Register */
+#define PIO_AIMMR       0xb8    /* Additional Interrupt Modes Mask Register */
+#define PIO_ESR         0xc0    /* Edge Select Register */
+#define PIO_LSR         0xc4    /* Level Select Register */
+#define PIO_ELSR        0xc8    /* Edge/Level Status Register */
+#define PIO_FELLSR      0xd0    /* Falling Edge/Low Level Select Register */
+#define PIO_REHLSR      0xd4    /* Rising Edge/ High Level Select Register */
+#define PIO_FRLHSR      0xd8    /* Fall/Rise - Low/High Status Register */
+#define PIO_SCHMITT     0x100   /* Schmitt Trigger Register */
+
+#define ABCDSR_PERIPH_A 0x0
+#define ABCDSR_PERIPH_B 0x1
+#define ABCDSR_PERIPH_C 0x2
+#define ABCDSR_PERIPH_D 0x3
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index e46f93e34aab..36604782a78f 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -16,17 +16,27 @@
 #ifndef AT91_PMC_H
 #define AT91_PMC_H
 
-#define AT91_PMC_SCER           (AT91_PMC + 0x00)       /* System Clock Enable Register */
-#define AT91_PMC_SCDR           (AT91_PMC + 0x04)       /* System Clock Disable Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_pmc_base;
 
-#define AT91_PMC_SCSR           (AT91_PMC + 0x08)       /* System Clock Status Register */
+#define at91_pmc_read(field) \
+        __raw_readl(at91_pmc_base + field)
+
+#define at91_pmc_write(field, value) \
+        __raw_writel(value, at91_pmc_base + field)
+#else
+.extern at91_aic_base
+#endif
+
+#define AT91_PMC_SCER           0x00                    /* System Clock Enable Register */
+#define AT91_PMC_SCDR           0x04                    /* System Clock Disable Register */
+
+#define AT91_PMC_SCSR           0x08                    /* System Clock Status Register */
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
-#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [CAP9 revC & some SAM9 only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
-#define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
 #define         AT91SAM926x_PMC_UDP     (1 <<  7)               /* USB Devcice Port Clock [AT91SAM926x only] */
 #define         AT91_PMC_PCK0           (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1           (1 <<  9)               /* Programmable Clock 1 */
@@ -36,27 +46,31 @@
 #define         AT91_PMC_HCK0           (1 << 16)               /* AHB Clock (USB host) [AT91SAM9261 only] */
 #define         AT91_PMC_HCK1           (1 << 17)               /* AHB Clock (LCD) [AT91SAM9261 only] */
 
-#define AT91_PMC_PCER           (AT91_PMC + 0x10)       /* Peripheral Clock Enable Register */
-#define AT91_PMC_PCDR           (AT91_PMC + 0x14)       /* Peripheral Clock Disable Register */
-#define AT91_PMC_PCSR           (AT91_PMC + 0x18)       /* Peripheral Clock Status Register */
+#define AT91_PMC_PCER           0x10                    /* Peripheral Clock Enable Register */
+#define AT91_PMC_PCDR           0x14                    /* Peripheral Clock Disable Register */
+#define AT91_PMC_PCSR           0x18                    /* Peripheral Clock Status Register */
 
-#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9, CAP9] */
+#define AT91_CKGR_UCKR          0x1C                    /* UTMI Clock Register [some SAM9] */
 #define         AT91_PMC_UPLLEN         (1   << 16)             /* UTMI PLL Enable */
 #define         AT91_PMC_UPLLCOUNT      (0xf << 20)             /* UTMI PLL Start-up Time */
 #define         AT91_PMC_BIASEN         (1   << 24)             /* UTMI BIAS Enable */
 #define         AT91_PMC_BIASCOUNT      (0xf << 28)             /* UTMI BIAS Start-up Time */
 
-#define AT91_CKGR_MOR           (AT91_PMC + 0x20)       /* Main Oscillator Register [not on SAM9RL] */
-#define         AT91_PMC_MOSCEN         (1    << 0)             /* Main Oscillator Enable */
-#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x, CAP9] */
-#define         AT91_PMC_OSCOUNT        (0xff << 8)             /* Main Oscillator Start-up Time */
+#define AT91_CKGR_MOR           0x20                    /* Main Oscillator Register [not on SAM9RL] */
+#define         AT91_PMC_MOSCEN         (1    <<  0)            /* Main Oscillator Enable */
+#define         AT91_PMC_OSCBYPASS      (1    <<  1)            /* Oscillator Bypass */
+#define         AT91_PMC_MOSCRCEN       (1    <<  3)            /* Main On-Chip RC Oscillator Enable [some SAM9] */
+#define         AT91_PMC_OSCOUNT        (0xff <<  8)            /* Main Oscillator Start-up Time */
+#define         AT91_PMC_KEY            (0x37 << 16)            /* MOR Writing Key */
+#define         AT91_PMC_MOSCSEL        (1    << 24)            /* Main Oscillator Selection [some SAM9] */
+#define         AT91_PMC_CFDEN          (1    << 25)            /* Clock Failure Detector Enable [some SAM9] */
 
-#define AT91_CKGR_MCFR          (AT91_PMC + 0x24)       /* Main Clock Frequency Register */
+#define AT91_CKGR_MCFR          0x24                    /* Main Clock Frequency Register */
 #define         AT91_PMC_MAINF          (0xffff <<  0)          /* Main Clock Frequency */
 #define         AT91_PMC_MAINRDY        (1      << 16)          /* Main Clock Ready */
 
-#define AT91_CKGR_PLLAR         (AT91_PMC + 0x28)       /* PLL A Register */
-#define AT91_CKGR_PLLBR         (AT91_PMC + 0x2c)       /* PLL B Register */
+#define AT91_CKGR_PLLAR         0x28                    /* PLL A Register */
+#define AT91_CKGR_PLLBR         0x2c                    /* PLL B Register */
 #define         AT91_PMC_DIV            (0xff  <<  0)           /* Divider */
 #define         AT91_PMC_PLLCOUNT       (0x3f  <<  8)           /* PLL Counter */
 #define         AT91_PMC_OUT            (3     << 14)           /* PLL Clock Frequency Range */
@@ -67,27 +81,37 @@
 #define                 AT91_PMC_USBDIV_4               (2 << 28)
 #define         AT91_PMC_USB96M         (1     << 28)           /* Divider by 2 Enable (PLLB only) */
 
-#define AT91_PMC_MCKR           (AT91_PMC + 0x30)       /* Master Clock Register */
+#define AT91_PMC_MCKR           0x30                    /* Master Clock Register */
 #define         AT91_PMC_CSS            (3 <<  0)               /* Master Clock Selection */
 #define                 AT91_PMC_CSS_SLOW               (0 << 0)
 #define                 AT91_PMC_CSS_MAIN               (1 << 0)
 #define                 AT91_PMC_CSS_PLLA               (2 << 0)
 #define                 AT91_PMC_CSS_PLLB               (3 << 0)
 #define                 AT91_PMC_CSS_UPLL               (3 << 0)        /* [some SAM9 only] */
-#define         AT91_PMC_PRES           (7 <<  2)               /* Master Clock Prescaler */
-#define                 AT91_PMC_PRES_1                 (0 << 2)
-#define                 AT91_PMC_PRES_2                 (1 << 2)
-#define                 AT91_PMC_PRES_4                 (2 << 2)
-#define                 AT91_PMC_PRES_8                 (3 << 2)
-#define                 AT91_PMC_PRES_16                (4 << 2)
-#define                 AT91_PMC_PRES_32                (5 << 2)
-#define                 AT91_PMC_PRES_64                (6 << 2)
+#define         PMC_PRES_OFFSET         2
+#define         AT91_PMC_PRES           (7 <<  PMC_PRES_OFFSET)         /* Master Clock Prescaler */
+#define                 AT91_PMC_PRES_1                 (0 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_2                 (1 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_4                 (2 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_8                 (3 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_16                (4 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_32                (5 << PMC_PRES_OFFSET)
+#define                 AT91_PMC_PRES_64                (6 << PMC_PRES_OFFSET)
+#define         PMC_ALT_PRES_OFFSET     4
+#define         AT91_PMC_ALT_PRES       (7 <<  PMC_ALT_PRES_OFFSET)             /* Master Clock Prescaler [alternate location] */
+#define                 AT91_PMC_ALT_PRES_1             (0 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_2             (1 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_4             (2 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_8             (3 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_16            (4 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_32            (5 << PMC_ALT_PRES_OFFSET)
+#define                 AT91_PMC_ALT_PRES_64            (6 << PMC_ALT_PRES_OFFSET)
 #define         AT91_PMC_MDIV           (3 <<  8)               /* Master Clock Division */
 #define                 AT91RM9200_PMC_MDIV_1           (0 << 8)        /* [AT91RM9200 only] */
 #define                 AT91RM9200_PMC_MDIV_2           (1 << 8)
 #define                 AT91RM9200_PMC_MDIV_3           (2 << 8)
 #define                 AT91RM9200_PMC_MDIV_4           (3 << 8)
-#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9,CAP9 only] */
+#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9 only] */
 #define                 AT91SAM9_PMC_MDIV_2             (1 << 8)
 #define                 AT91SAM9_PMC_MDIV_4             (2 << 8)
 #define                 AT91SAM9_PMC_MDIV_6             (3 << 8)        /* [some SAM9 only] */
@@ -99,35 +123,55 @@
 #define                 AT91_PMC_PLLADIV2_OFF           (0 << 12)
 #define                 AT91_PMC_PLLADIV2_ON            (1 << 12)
 
-#define AT91_PMC_USB            (AT91_PMC + 0x38)       /* USB Clock Register [some SAM9 only] */
+#define AT91_PMC_USB            0x38                    /* USB Clock Register [some SAM9 only] */
 #define         AT91_PMC_USBS           (0x1 <<  0)             /* USB OHCI Input clock selection */
 #define                 AT91_PMC_USBS_PLLA              (0 << 0)
 #define                 AT91_PMC_USBS_UPLL              (1 << 0)
 #define         AT91_PMC_OHCIUSBDIV     (0xF <<  8)             /* Divider for USB OHCI Clock */
 
-#define AT91_PMC_PCKR(n)        (AT91_PMC + 0x40 + ((n) * 4))   /* Programmable Clock 0-N Registers */
+#define AT91_PMC_SMD            0x3c                    /* Soft Modem Clock Register [some SAM9 only] */
+#define         AT91_PMC_SMDS           (0x1  <<  0)            /* SMD input clock selection */
+#define         AT91_PMC_SMD_DIV        (0x1f <<  8)            /* SMD input clock divider */
+#define         AT91_PMC_SMDDIV(n)      (((n) <<  8) & AT91_PMC_SMD_DIV)
+
+#define AT91_PMC_PCKR(n)        (0x40 + ((n) * 4))      /* Programmable Clock 0-N Registers */
+#define         AT91_PMC_ALT_PCKR_CSS   (0x7 <<  0)             /* Programmable Clock Source Selection [alternate length] */
+#define                 AT91_PMC_CSS_MASTER             (4 << 0)        /* [some SAM9 only] */
 #define         AT91_PMC_CSSMCK         (0x1 <<  8)             /* CSS or Master Clock Selection */
 #define                 AT91_PMC_CSSMCK_CSS             (0 << 8)
 #define                 AT91_PMC_CSSMCK_MCK             (1 << 8)
 
-#define AT91_PMC_IER            (AT91_PMC + 0x60)       /* Interrupt Enable Register */
-#define AT91_PMC_IDR            (AT91_PMC + 0x64)       /* Interrupt Disable Register */
-#define AT91_PMC_SR             (AT91_PMC + 0x68)       /* Status Register */
+#define AT91_PMC_IER            0x60                    /* Interrupt Enable Register */
+#define AT91_PMC_IDR            0x64                    /* Interrupt Disable Register */
+#define AT91_PMC_SR             0x68                    /* Status Register */
 #define         AT91_PMC_MOSCS          (1 <<  0)               /* MOSCS Flag */
 #define         AT91_PMC_LOCKA          (1 <<  1)               /* PLLA Lock */
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
-#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9, AT91CAP9 only] */
-#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
+#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
-#define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
+#define         AT91_PMC_MOSCSELS       (1 << 16)               /* Main Oscillator Selection [some SAM9] */
+#define         AT91_PMC_MOSCRCS        (1 << 17)               /* Main On-Chip RC [some SAM9] */
+#define         AT91_PMC_CFDEV          (1 << 18)               /* Clock Failure Detector Event [some SAM9] */
+#define AT91_PMC_IMR            0x6c                    /* Interrupt Mask Register */
+
+#define AT91_PMC_PROT           0xe4                    /* Write Protect Mode Register [some SAM9] */
+#define         AT91_PMC_WPEN           (0x1  <<  0)            /* Write Protect Enable */
+#define         AT91_PMC_WPKEY          (0xffffff << 8)         /* Write Protect Key */
+#define         AT91_PMC_PROTKEY        (0x504d43 << 8)         /* Activation Code */
 
-#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
-#define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
+#define AT91_PMC_WPSR           0xe8                    /* Write Protect Status Register [some SAM9] */
+#define         AT91_PMC_WPVS           (0x1  <<  0)            /* Write Protect Violation Status */
+#define         AT91_PMC_WPVSRC         (0xffff  <<  8)         /* Write Protect Violation Source */
 
-#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
+#define AT91_PMC_PCR            0x10c                   /* Peripheral Control Register [some SAM9] */
+#define         AT91_PMC_PCR_PID        (0x3f  <<  0)           /* Peripheral ID */
+#define         AT91_PMC_PCR_CMD        (0x1  <<  12)           /* Command */
+#define         AT91_PMC_PCR_DIV        (0x3  <<  16)           /* Divisor Value */
+#define         AT91_PMC_PCRDIV(n)      (((n) <<  16) & AT91_PMC_PCR_DIV)
+#define         AT91_PMC_PCR_EN         (0x1  <<  28)           /* Enable */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
new file mode 100644
index 000000000000..d8aeb278614e
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -0,0 +1,32 @@
+/*
+ * Header file for the Atmel RAM Controller
+ *
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2 only
+ */
+
+#ifndef __AT91_RAMC_H__
+#define __AT91_RAMC_H__
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_ramc_base[];
+
+#define at91_ramc_read(id, field) \
+        __raw_readl(at91_ramc_base[id] + field)
+
+#define at91_ramc_write(id, field, value) \
+        __raw_writel(value, at91_ramc_base[id] + field)
+#else
+.extern at91_ramc_base
+#endif
+
+#define AT91_MEMCTRL_MC         0
+#define AT91_MEMCTRL_SDRAMC     1
+#define AT91_MEMCTRL_DDRSDR     2
+
+#include <mach/at91rm9200_sdramc.h>
+#include <mach/at91sam9_ddrsdr.h>
+#include <mach/at91sam9_sdramc.h>
+
+#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h
index 8847173e4101..969aac27109f 100644
--- a/arch/arm/mach-at91/include/mach/at91_st.h
+++ b/arch/arm/mach-at91/include/mach/at91_st.h
@@ -16,34 +16,46 @@
 #ifndef AT91_ST_H
 #define AT91_ST_H
 
-#define AT91_ST_CR              (AT91_ST + 0x00)        /* Control Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_st_base;
+
+#define at91_st_read(field) \
+        __raw_readl(at91_st_base + field)
+
+#define at91_st_write(field, value) \
+        __raw_writel(value, at91_st_base + field);
+#else
+.extern at91_st_base
+#endif
+
+#define AT91_ST_CR              0x00                    /* Control Register */
 #define         AT91_ST_WDRST           (1 << 0)                /* Watchdog Timer Restart */
 
-#define AT91_ST_PIMR            (AT91_ST + 0x04)        /* Period Interval Mode Register */
+#define AT91_ST_PIMR            0x04                    /* Period Interval Mode Register */
 #define         AT91_ST_PIV             (0xffff <<  0)          /* Period Interval Value */
 
-#define AT91_ST_WDMR            (AT91_ST + 0x08)        /* Watchdog Mode Register */
+#define AT91_ST_WDMR            0x08                    /* Watchdog Mode Register */
 #define         AT91_ST_WDV             (0xffff <<  0)          /* Watchdog Counter Value */
 #define         AT91_ST_RSTEN           (1      << 16)          /* Reset Enable */
 #define         AT91_ST_EXTEN           (1      << 17)          /* External Signal Assertion Enable */
 
-#define AT91_ST_RTMR            (AT91_ST + 0x0c)        /* Real-time Mode Register */
+#define AT91_ST_RTMR            0x0c                    /* Real-time Mode Register */
 #define         AT91_ST_RTPRES          (0xffff <<  0)          /* Real-time Prescalar Value */
 
-#define AT91_ST_SR              (AT91_ST + 0x10)        /* Status Register */
+#define AT91_ST_SR              0x10                    /* Status Register */
 #define         AT91_ST_PITS            (1 << 0)                /* Period Interval Timer Status */
 #define         AT91_ST_WDOVF           (1 << 1)                /* Watchdog Overflow */
 #define         AT91_ST_RTTINC          (1 << 2)                /* Real-time Timer Increment */
 #define         AT91_ST_ALMS            (1 << 3)                /* Alarm Status */
 
-#define AT91_ST_IER             (AT91_ST + 0x14)        /* Interrupt Enable Register */
-#define AT91_ST_IDR             (AT91_ST + 0x18)        /* Interrupt Disable Register */
-#define AT91_ST_IMR             (AT91_ST + 0x1c)        /* Interrupt Mask Register */
+#define AT91_ST_IER             0x14                    /* Interrupt Enable Register */
+#define AT91_ST_IDR             0x18                    /* Interrupt Disable Register */
+#define AT91_ST_IMR             0x1c                    /* Interrupt Mask Register */
 
-#define AT91_ST_RTAR            (AT91_ST + 0x20)        /* Real-time Alarm Register */
+#define AT91_ST_RTAR            0x20                    /* Real-time Alarm Register */
 #define         AT91_ST_ALMV            (0xfffff << 0)          /* Alarm Value */
 
-#define AT91_ST_CRTR            (AT91_ST + 0x24)        /* Current Real-time Register */
+#define AT91_ST_CRTR            0x24                    /* Current Real-time Register */
 #define         AT91_ST_CRTV            (0xfffff << 0)          /* Current Real-Time Value */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
deleted file mode 100644
index 61d952902f2b..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * Common definitions.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_H
-#define AT91CAP9_H
-
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91CAP9_ID_PIOABCD     2       /* Parallel IO Controller A, B, C and D */
-#define AT91CAP9_ID_MPB0        3       /* MP Block Peripheral 0 */
-#define AT91CAP9_ID_MPB1        4       /* MP Block Peripheral 1 */
-#define AT91CAP9_ID_MPB2        5       /* MP Block Peripheral 2 */
-#define AT91CAP9_ID_MPB3        6       /* MP Block Peripheral 3 */
-#define AT91CAP9_ID_MPB4        7       /* MP Block Peripheral 4 */
-#define AT91CAP9_ID_US0         8       /* USART 0 */
-#define AT91CAP9_ID_US1         9       /* USART 1 */
-#define AT91CAP9_ID_US2         10      /* USART 2 */
-#define AT91CAP9_ID_MCI0        11      /* Multimedia Card Interface 0 */
-#define AT91CAP9_ID_MCI1        12      /* Multimedia Card Interface 1 */
-#define AT91CAP9_ID_CAN         13      /* CAN */
-#define AT91CAP9_ID_TWI         14      /* Two-Wire Interface */
-#define AT91CAP9_ID_SPI0        15      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SPI1        16      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SSC0        17      /* Serial Synchronous Controller 0 */
-#define AT91CAP9_ID_SSC1        18      /* Serial Synchronous Controller 1 */
-#define AT91CAP9_ID_AC97C       19      /* AC97 Controller */
-#define AT91CAP9_ID_TCB         20      /* Timer Counter 0, 1 and 2 */
-#define AT91CAP9_ID_PWMC        21      /* Pulse Width Modulation Controller */
-#define AT91CAP9_ID_EMAC        22      /* Ethernet */
-#define AT91CAP9_ID_AESTDES     23      /* Advanced Encryption Standard, Triple DES */
-#define AT91CAP9_ID_ADC         24      /* Analog-to-Digital Converter */
-#define AT91CAP9_ID_ISI         25      /* Image Sensor Interface */
-#define AT91CAP9_ID_LCDC        26      /* LCD Controller */
-#define AT91CAP9_ID_DMA         27      /* DMA Controller */
-#define AT91CAP9_ID_UDPHS       28      /* USB High Speed Device Port */
-#define AT91CAP9_ID_UHP         29      /* USB Host Port */
-#define AT91CAP9_ID_IRQ0        30      /* Advanced Interrupt Controller (IRQ0) */
-#define AT91CAP9_ID_IRQ1        31      /* Advanced Interrupt Controller (IRQ1) */
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91CAP9_BASE_UDPHS             0xfff78000
-#define AT91CAP9_BASE_TCB0              0xfff7c000
-#define AT91CAP9_BASE_TC0               0xfff7c000
-#define AT91CAP9_BASE_TC1               0xfff7c040
-#define AT91CAP9_BASE_TC2               0xfff7c080
-#define AT91CAP9_BASE_MCI0              0xfff80000
-#define AT91CAP9_BASE_MCI1              0xfff84000
-#define AT91CAP9_BASE_TWI               0xfff88000
-#define AT91CAP9_BASE_US0               0xfff8c000
-#define AT91CAP9_BASE_US1               0xfff90000
-#define AT91CAP9_BASE_US2               0xfff94000
-#define AT91CAP9_BASE_SSC0              0xfff98000
-#define AT91CAP9_BASE_SSC1              0xfff9c000
-#define AT91CAP9_BASE_AC97C             0xfffa0000
-#define AT91CAP9_BASE_SPI0              0xfffa4000
-#define AT91CAP9_BASE_SPI1              0xfffa8000
-#define AT91CAP9_BASE_CAN               0xfffac000
-#define AT91CAP9_BASE_PWMC              0xfffb8000
-#define AT91CAP9_BASE_EMAC              0xfffbc000
-#define AT91CAP9_BASE_ADC               0xfffc0000
-#define AT91CAP9_BASE_ISI               0xfffc4000
-
-/*
- * System Peripherals (offset from AT91_BASE_SYS)
- */
-#define AT91_BCRAMC     (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
-                        (0xfffffd50 - AT91_BASE_SYS) :  \
-                        (0xfffffd60 - AT91_BASE_SYS))
-
-#define AT91CAP9_BASE_ECC       0xffffe200
-#define AT91CAP9_BASE_DMA       0xffffec00
-#define AT91CAP9_BASE_SMC       0xffffe800
-#define AT91CAP9_BASE_DBGU      AT91_BASE_DBGU1
-#define AT91CAP9_BASE_PIOA      0xfffff200
-#define AT91CAP9_BASE_PIOB      0xfffff400
-#define AT91CAP9_BASE_PIOC      0xfffff600
-#define AT91CAP9_BASE_PIOD      0xfffff800
-#define AT91CAP9_BASE_RSTC      0xfffffd00
-#define AT91CAP9_BASE_SHDWC     0xfffffd10
-#define AT91CAP9_BASE_RTT       0xfffffd20
-#define AT91CAP9_BASE_PIT       0xfffffd30
-#define AT91CAP9_BASE_WDT       0xfffffd40
-
-#define AT91_USART0     AT91CAP9_BASE_US0
-#define AT91_USART1     AT91CAP9_BASE_US1
-#define AT91_USART2     AT91CAP9_BASE_US2
-
-
-/*
- * Internal Memory.
- */
-#define AT91CAP9_SRAM_BASE      0x00100000      /* Internal SRAM base address */
-#define AT91CAP9_SRAM_SIZE      (32 * SZ_1K)    /* Internal SRAM size (32Kb) */
-
-#define AT91CAP9_ROM_BASE       0x00400000      /* Internal ROM base address */
-#define AT91CAP9_ROM_SIZE       (32 * SZ_1K)    /* Internal ROM size (32Kb) */
-
-#define AT91CAP9_LCDC_BASE      0x00500000      /* LCD Controller */
-#define AT91CAP9_UDPHS_FIFO     0x00600000      /* USB High Speed Device Port */
-#define AT91CAP9_UHP_BASE       0x00700000      /* USB Host controller */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h b/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
deleted file mode 100644
index 4b9d4aff4b4f..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9_matrix.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2006 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_MATRIX_H
-#define AT91CAP9_MATRIX_H
-
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9       (AT91_MATRIX + 0x24)    /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10      (AT91_MATRIX + 0x28)    /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11      (AT91_MATRIX + 0x2C)    /* Master Configuration Register 11 */
-#define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
-#define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
-#define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
-#define                 AT91_MATRIX_ULBT_FOUR           (2 << 0)
-#define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
-#define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
-
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SCFG8       (AT91_MATRIX + 0x60)    /* Slave Configuration Register 8 */
-#define AT91_MATRIX_SCFG9       (AT91_MATRIX + 0x64)    /* Slave Configuration Register 9 */
-#define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
-#define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
-#define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
-#define         AT91_MATRIX_FIXED_DEFMSTR       (0xf  << 18)    /* Fixed Index of Default Master */
-#define         AT91_MATRIX_ARBT                (3    << 24)    /* Arbitration Type */
-#define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
-#define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_PRAS8       (AT91_MATRIX + 0xC0)    /* Priority Register A for Slave 8 */
-#define AT91_MATRIX_PRBS8       (AT91_MATRIX + 0xC4)    /* Priority Register B for Slave 8 */
-#define AT91_MATRIX_PRAS9       (AT91_MATRIX + 0xC8)    /* Priority Register A for Slave 9 */
-#define AT91_MATRIX_PRBS9       (AT91_MATRIX + 0xCC)    /* Priority Register B for Slave 9 */
-#define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
-#define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
-#define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
-#define         AT91_MATRIX_M3PR                (3 << 12)       /* Master 3 Priority */
-#define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
-#define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
-#define         AT91_MATRIX_M6PR                (3 << 24)       /* Master 6 Priority */
-#define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
-#define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
-#define         AT91_MATRIX_M9PR                (3 << 4)        /* Master 9 Priority (in Register B) */
-#define         AT91_MATRIX_M10PR               (3 << 8)        /* Master 10 Priority (in Register B) */
-#define         AT91_MATRIX_M11PR               (3 << 12)       /* Master 11 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
-#define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define         AT91_MATRIX_RCB2                (1 << 2)
-#define         AT91_MATRIX_RCB3                (1 << 3)
-#define         AT91_MATRIX_RCB4                (1 << 4)
-#define         AT91_MATRIX_RCB5                (1 << 5)
-#define         AT91_MATRIX_RCB6                (1 << 6)
-#define         AT91_MATRIX_RCB7                (1 << 7)
-#define         AT91_MATRIX_RCB8                (1 << 8)
-#define         AT91_MATRIX_RCB9                (1 << 9)
-#define         AT91_MATRIX_RCB10               (1 << 10)
-#define         AT91_MATRIX_RCB11               (1 << 11)
-
-#define AT91_MPBS0_SFR          (AT91_MATRIX + 0x114)   /* MPBlock Slave 0 Special Function Register */
-#define AT91_MPBS1_SFR          (AT91_MATRIX + 0x11C)   /* MPBlock Slave 1 Special Function Register */
-
-#define AT91_MATRIX_UDPHS       (AT91_MATRIX + 0x118)   /* USBHS Special Function Register [AT91CAP9 only] */
-#define         AT91_MATRIX_SELECT_UDPHS        (0 << 31)       /* select High Speed UDP */
-#define         AT91_MATRIX_SELECT_UDP          (1 << 31)       /* select standard UDP */
-#define         AT91_MATRIX_UDPHS_BYPASS_LOCK   (1 << 30)       /* bypass lock bit */
-
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
-#define                 AT91_MATRIX_EBI_CS1A_BCRAMC             (1 << 1)
-#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
-#define                 AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA     (1 << 3)
-#define         AT91_MATRIX_EBI_CS4A            (1 << 4)        /* Chip Select 4 Assignment */
-#define                 AT91_MATRIX_EBI_CS4A_SMC                (0 << 4)
-#define                 AT91_MATRIX_EBI_CS4A_SMC_CF1            (1 << 4)
-#define         AT91_MATRIX_EBI_CS5A            (1 << 5)        /* Chip Select 5 Assignment */
-#define                 AT91_MATRIX_EBI_CS5A_SMC                (0 << 5)
-#define                 AT91_MATRIX_EBI_CS5A_SMC_CF2            (1 << 5)
-#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
-#define         AT91_MATRIX_EBI_DQSPDC          (1 << 9)        /* Data Qualifier Strobe Pull-Down Configuration */
-#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
-
-#define AT91_MPBS2_SFR          (AT91_MATRIX + 0x12C)   /* MPBlock Slave 2 Special Function Register */
-#define AT91_MPBS3_SFR          (AT91_MATRIX + 0x130)   /* MPBlock Slave 3 Special Function Register */
-#define AT91_APB_SFR            (AT91_MATRIX + 0x134)   /* APB Bridge Special Function Register */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index bacb51141819..603e6aac2a4f 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -77,26 +77,22 @@
 
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
-#define AT91_ST         (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
-#define AT91_MC         (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
-
 #define AT91RM9200_BASE_DBGU    AT91_BASE_DBGU0 /* Debug Unit */
 #define AT91RM9200_BASE_PIOA    0xfffff400      /* PIO Controller A */
 #define AT91RM9200_BASE_PIOB    0xfffff600      /* PIO Controller B */
 #define AT91RM9200_BASE_PIOC    0xfffff800      /* PIO Controller C */
 #define AT91RM9200_BASE_PIOD    0xfffffa00      /* PIO Controller D */
+#define AT91RM9200_BASE_ST      0xfffffd00      /* System Timer */
 #define AT91RM9200_BASE_RTC     0xfffffe00      /* Real-Time Clock */
+#define AT91RM9200_BASE_MC      0xffffff00      /* Memory Controllers */
 
 #define AT91_USART0     AT91RM9200_BASE_US0
 #define AT91_USART1     AT91RM9200_BASE_US1
 #define AT91_USART2     AT91RM9200_BASE_US2
 #define AT91_USART3     AT91RM9200_BASE_US3
 
-#define AT91_MATRIX     0       /* not supported */
-
 /*
  * Internal Memory.
  */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
index d34e4ed89349..aeaadfb452af 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -17,10 +17,10 @@
 #define AT91RM9200_MC_H
 
 /* Memory Controller */
-#define AT91_MC_RCR             (AT91_MC + 0x00)        /* MC Remap Control Register */
+#define AT91_MC_RCR             0x00                    /* MC Remap Control Register */
 #define         AT91_MC_RCB             (1 <<  0)               /* Remap Command Bit */
 
-#define AT91_MC_ASR             (AT91_MC + 0x04)        /* MC Abort Status Register */
+#define AT91_MC_ASR             0x04                    /* MC Abort Status Register */
 #define         AT91_MC_UNADD           (1 <<  0)               /* Undefined Address Abort Status */
 #define         AT91_MC_MISADD          (1 <<  1)               /* Misaligned Address Abort Status */
 #define         AT91_MC_ABTSZ           (3 <<  8)               /* Abort Size Status */
@@ -40,16 +40,16 @@
 #define         AT91_MC_SVMST2          (1 << 26)               /* Saved UHP Abort Source */
 #define         AT91_MC_SVMST3          (1 << 27)               /* Saved EMAC Abort Source */
 
-#define AT91_MC_AASR            (AT91_MC + 0x08)        /* MC Abort Address Status Register */
+#define AT91_MC_AASR            0x08                    /* MC Abort Address Status Register */
 
-#define AT91_MC_MPR             (AT91_MC + 0x0c)        /* MC Master Priority Register */
+#define AT91_MC_MPR             0x0c                    /* MC Master Priority Register */
 #define         AT91_MPR_MSTP0          (7 <<  0)               /* ARM920T Priority */
 #define         AT91_MPR_MSTP1          (7 <<  4)               /* PDC Priority */
 #define         AT91_MPR_MSTP2          (7 <<  8)               /* UHP Priority */
 #define         AT91_MPR_MSTP3          (7 << 12)               /* EMAC Priority */
 
 /* External Bus Interface (EBI) registers */
-#define AT91_EBI_CSA            (AT91_MC + 0x60)        /* Chip Select Assignment Register */
+#define AT91_EBI_CSA            0x60                    /* Chip Select Assignment Register */
 #define         AT91_EBI_CS0A           (1 << 0)                /* Chip Select 0 Assignment */
 #define                 AT91_EBI_CS0A_SMC               (0 << 0)
 #define                 AT91_EBI_CS0A_BFC               (1 << 0)
@@ -66,7 +66,7 @@
 #define         AT91_EBI_DBPUC          (1 << 0)                /* Data Bus Pull-Up Configuration */
 
 /* Static Memory Controller (SMC) registers */
-#define AT91_SMC_CSR(n)         (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
+#define AT91_SMC_CSR(n)         (0x70 + ((n) * 4))      /* SMC Chip Select Register */
 #define         AT91_SMC_NWS            (0x7f <<  0)            /* Number of Wait States */
 #define                 AT91_SMC_NWS_(x)        ((x) << 0)
 #define         AT91_SMC_WSEN           (1    <<  7)            /* Wait State Enable */
@@ -87,52 +87,8 @@
 #define         AT91_SMC_RWHOLD         (7 << 28)               /* Read & Write Signal Hold Time */
 #define                 AT91_SMC_RWHOLD_(x)     ((x) << 28)
 
-/* SDRAM Controller registers */
-#define AT91_SDRAMC_MR          (AT91_MC + 0x90)        /* Mode Register */
-#define         AT91_SDRAMC_MODE        (0xf << 0)              /* Command Mode */
-#define                 AT91_SDRAMC_MODE_NORMAL         (0 << 0)
-#define                 AT91_SDRAMC_MODE_NOP            (1 << 0)
-#define                 AT91_SDRAMC_MODE_PRECHARGE      (2 << 0)
-#define                 AT91_SDRAMC_MODE_LMR            (3 << 0)
-#define                 AT91_SDRAMC_MODE_REFRESH        (4 << 0)
-#define         AT91_SDRAMC_DBW         (1   << 4)              /* Data Bus Width */
-#define                 AT91_SDRAMC_DBW_32      (0 << 4)
-#define                 AT91_SDRAMC_DBW_16      (1 << 4)
-
-#define AT91_SDRAMC_TR          (AT91_MC + 0x94)        /* Refresh Timer Register */
-#define         AT91_SDRAMC_COUNT       (0xfff << 0)            /* Refresh Timer Count */
-
-#define AT91_SDRAMC_CR          (AT91_MC + 0x98)        /* Configuration Register */
-#define         AT91_SDRAMC_NC          (3   <<  0)             /* Number of Column Bits */
-#define                 AT91_SDRAMC_NC_8        (0 << 0)
-#define                 AT91_SDRAMC_NC_9        (1 << 0)
-#define                 AT91_SDRAMC_NC_10       (2 << 0)
-#define                 AT91_SDRAMC_NC_11       (3 << 0)
-#define         AT91_SDRAMC_NR          (3   <<  2)             /* Number of Row Bits */
-#define                 AT91_SDRAMC_NR_11       (0 << 2)
-#define                 AT91_SDRAMC_NR_12       (1 << 2)
-#define                 AT91_SDRAMC_NR_13       (2 << 2)
-#define         AT91_SDRAMC_NB          (1   <<  4)             /* Number of Banks */
-#define                 AT91_SDRAMC_NB_2        (0 << 4)
-#define                 AT91_SDRAMC_NB_4        (1 << 4)
-#define         AT91_SDRAMC_CAS         (3   <<  5)             /* CAS Latency */
-#define                 AT91_SDRAMC_CAS_2       (2 << 5)
-#define         AT91_SDRAMC_TWR         (0xf <<  7)             /* Write Recovery Delay */
-#define         AT91_SDRAMC_TRC         (0xf << 11)             /* Row Cycle Delay */
-#define         AT91_SDRAMC_TRP         (0xf << 15)             /* Row Precharge Delay */
-#define         AT91_SDRAMC_TRCD        (0xf << 19)             /* Row to Column Delay */
-#define         AT91_SDRAMC_TRAS        (0xf << 23)             /* Active to Precharge Delay */
-#define         AT91_SDRAMC_TXSR        (0xf << 27)             /* Exit Self Refresh to Active Delay */
-
-#define AT91_SDRAMC_SRR         (AT91_MC + 0x9c)        /* Self Refresh Register */
-#define AT91_SDRAMC_LPR         (AT91_MC + 0xa0)        /* Low Power Register */
-#define AT91_SDRAMC_IER         (AT91_MC + 0xa4)        /* Interrupt Enable Register */
-#define AT91_SDRAMC_IDR         (AT91_MC + 0xa8)        /* Interrupt Disable Register */
-#define AT91_SDRAMC_IMR         (AT91_MC + 0xac)        /* Interrupt Mask Register */
-#define AT91_SDRAMC_ISR         (AT91_MC + 0xb0)        /* Interrupt Status Register */
-
 /* Burst Flash Controller register */
-#define AT91_BFC_MR             (AT91_MC + 0xc0)        /* Mode Register */
+#define AT91_BFC_MR             0xc0                    /* Mode Register */
 #define         AT91_BFC_BFCOM          (3   <<  0)             /* Burst Flash Controller Operating Mode */
 #define                 AT91_BFC_BFCOM_DISABLED (0 << 0)
 #define                 AT91_BFC_BFCOM_ASYNC    (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
new file mode 100644
index 000000000000..aa047f458f1b
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
@@ -0,0 +1,63 @@
+/*
+ * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Memory Controllers (SDRAMC only) - System peripherals registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_SDRAMC_H
+#define AT91RM9200_SDRAMC_H
+
+/* SDRAM Controller registers */
+#define AT91RM9200_SDRAMC_MR            0x90                    /* Mode Register */
+#define         AT91RM9200_SDRAMC_MODE  (0xf << 0)              /* Command Mode */
+#define                 AT91RM9200_SDRAMC_MODE_NORMAL           (0 << 0)
+#define                 AT91RM9200_SDRAMC_MODE_NOP              (1 << 0)
+#define                 AT91RM9200_SDRAMC_MODE_PRECHARGE        (2 << 0)
+#define                 AT91RM9200_SDRAMC_MODE_LMR              (3 << 0)
+#define                 AT91RM9200_SDRAMC_MODE_REFRESH  (4 << 0)
+#define         AT91RM9200_SDRAMC_DBW           (1   << 4)              /* Data Bus Width */
+#define                 AT91RM9200_SDRAMC_DBW_32        (0 << 4)
+#define                 AT91RM9200_SDRAMC_DBW_16        (1 << 4)
+
+#define AT91RM9200_SDRAMC_TR            0x94                    /* Refresh Timer Register */
+#define         AT91RM9200_SDRAMC_COUNT (0xfff << 0)            /* Refresh Timer Count */
+
+#define AT91RM9200_SDRAMC_CR            0x98                    /* Configuration Register */
+#define         AT91RM9200_SDRAMC_NC            (3   <<  0)             /* Number of Column Bits */
+#define                 AT91RM9200_SDRAMC_NC_8  (0 << 0)
+#define                 AT91RM9200_SDRAMC_NC_9  (1 << 0)
+#define                 AT91RM9200_SDRAMC_NC_10 (2 << 0)
+#define                 AT91RM9200_SDRAMC_NC_11 (3 << 0)
+#define         AT91RM9200_SDRAMC_NR            (3   <<  2)             /* Number of Row Bits */
+#define                 AT91RM9200_SDRAMC_NR_11 (0 << 2)
+#define                 AT91RM9200_SDRAMC_NR_12 (1 << 2)
+#define                 AT91RM9200_SDRAMC_NR_13 (2 << 2)
+#define         AT91RM9200_SDRAMC_NB            (1   <<  4)             /* Number of Banks */
+#define                 AT91RM9200_SDRAMC_NB_2  (0 << 4)
+#define                 AT91RM9200_SDRAMC_NB_4  (1 << 4)
+#define         AT91RM9200_SDRAMC_CAS           (3   <<  5)             /* CAS Latency */
+#define                 AT91RM9200_SDRAMC_CAS_2 (2 << 5)
+#define         AT91RM9200_SDRAMC_TWR           (0xf <<  7)             /* Write Recovery Delay */
+#define         AT91RM9200_SDRAMC_TRC           (0xf << 11)             /* Row Cycle Delay */
+#define         AT91RM9200_SDRAMC_TRP           (0xf << 15)             /* Row Precharge Delay */
+#define         AT91RM9200_SDRAMC_TRCD  (0xf << 19)             /* Row to Column Delay */
+#define         AT91RM9200_SDRAMC_TRAS  (0xf << 23)             /* Active to Precharge Delay */
+#define         AT91RM9200_SDRAMC_TXSR  (0xf << 27)             /* Exit Self Refresh to Active Delay */
+
+#define AT91RM9200_SDRAMC_SRR           0x9c                    /* Self Refresh Register */
+#define AT91RM9200_SDRAMC_LPR           0xa0                    /* Low Power Register */
+#define AT91RM9200_SDRAMC_IER           0xa4                    /* Interrupt Enable Register */
+#define AT91RM9200_SDRAMC_IDR           0xa8                    /* Interrupt Disable Register */
+#define AT91RM9200_SDRAMC_IMR           0xac                    /* Interrupt Mask Register */
+#define AT91RM9200_SDRAMC_ISR           0xb0                    /* Interrupt Status Register */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index fa5ca278adeb..08ae9afd00fe 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -78,15 +78,12 @@
 #define AT91SAM9260_BASE_ADC            0xfffe0000
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
-#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
-
 #define AT91SAM9260_BASE_ECC    0xffffe800
+#define AT91SAM9260_BASE_SDRAMC 0xffffea00
 #define AT91SAM9260_BASE_SMC    0xffffec00
+#define AT91SAM9260_BASE_MATRIX 0xffffee00
 #define AT91SAM9260_BASE_DBGU   AT91_BASE_DBGU0
 #define AT91SAM9260_BASE_PIOA   0xfffff400
 #define AT91SAM9260_BASE_PIOB   0xfffff600
@@ -96,6 +93,7 @@
 #define AT91SAM9260_BASE_RTT    0xfffffd20
 #define AT91SAM9260_BASE_PIT    0xfffffd30
 #define AT91SAM9260_BASE_WDT    0xfffffd40
+#define AT91SAM9260_BASE_GPBR   0xfffffd50
 
 #define AT91_USART0     AT91SAM9260_BASE_US0
 #define AT91_USART1     AT91SAM9260_BASE_US1
@@ -115,6 +113,8 @@
 #define AT91SAM9260_SRAM0_SIZE  SZ_4K           /* Internal SRAM 0 size (4Kb) */
 #define AT91SAM9260_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 #define AT91SAM9260_SRAM1_SIZE  SZ_4K           /* Internal SRAM 1 size (4Kb) */
+#define AT91SAM9260_SRAM_BASE   0x002FF000      /* Internal SRAM base address */
+#define AT91SAM9260_SRAM_SIZE   SZ_8K           /* Internal SRAM size (8Kb) */
 
 #define AT91SAM9260_UHP_BASE    0x00500000      /* USB Host controller */
 
@@ -128,6 +128,8 @@
 #define AT91SAM9G20_SRAM0_SIZE  SZ_16K          /* Internal SRAM 0 size (16Kb) */
 #define AT91SAM9G20_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 #define AT91SAM9G20_SRAM1_SIZE  SZ_16K          /* Internal SRAM 1 size (16Kb) */
+#define AT91SAM9G20_SRAM_BASE   0x002FC000      /* Internal SRAM base address */
+#define AT91SAM9G20_SRAM_SIZE   SZ_32K          /* Internal SRAM size (32Kb) */
 
 #define AT91SAM9G20_UHP_BASE    0x00500000      /* USB Host controller */
 
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
index 020f02ed921a..f459df420629 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
@@ -15,12 +15,12 @@
 #ifndef AT91SAM9260_MATRIX_H
 #define AT91SAM9260_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT                (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -28,11 +28,11 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff <<  0)    /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -43,11 +43,11 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -55,11 +55,11 @@
 #define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
 #define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
 
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x11C)   /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      0x11C                   /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 7cde2d36570e..44fbdc12ee62 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -63,14 +63,11 @@
 
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
-#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
-
 #define AT91SAM9261_BASE_SMC    0xffffec00
+#define AT91SAM9261_BASE_MATRIX 0xffffee00
+#define AT91SAM9261_BASE_SDRAMC 0xffffea00
 #define AT91SAM9261_BASE_DBGU   AT91_BASE_DBGU0
 #define AT91SAM9261_BASE_PIOA   0xfffff400
 #define AT91SAM9261_BASE_PIOB   0xfffff600
@@ -80,6 +77,7 @@
 #define AT91SAM9261_BASE_RTT    0xfffffd20
 #define AT91SAM9261_BASE_PIT    0xfffffd30
 #define AT91SAM9261_BASE_WDT    0xfffffd40
+#define AT91SAM9261_BASE_GPBR   0xfffffd50
 
 #define AT91_USART0     AT91SAM9261_BASE_US0
 #define AT91_USART1     AT91SAM9261_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
index 69c6501915d9..a50cdf8b8ca4 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
@@ -15,15 +15,15 @@
 #ifndef AT91SAM9261_MATRIX_H
 #define AT91SAM9261_MATRIX_H
 
-#define AT91_MATRIX_MCFG        (AT91_MATRIX + 0x00)    /* Master Configuration Register */
+#define AT91_MATRIX_MCFG        0x00                    /* Master Configuration Register */
 #define         AT91_MATRIX_RCB0        (1 << 0)                /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1        (1 << 1)                /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x04)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x08)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x0C)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x10)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x14)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0       0x04                    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       0x08                    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       0x0C                    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       0x10                    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       0x14                    /* Slave Configuration Register 4 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -31,7 +31,7 @@
 #define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
 #define         AT91_MATRIX_FIXED_DEFMSTR       (7    << 18)    /* Fixed Index of Default Master */
 
-#define AT91_MATRIX_TCR         (AT91_MATRIX + 0x24)    /* TCM Configuration Register */
+#define AT91_MATRIX_TCR         0x24                    /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -43,7 +43,7 @@
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 #define                 AT91_MATRIX_DTCM_64             (7 << 4)
 
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x30)    /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      0x30                    /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
@@ -58,7 +58,7 @@
 #define                 AT91_MATRIX_CS5A_SMC_CF2        (1 << 5)
 #define         AT91_MATRIX_DBPUC               (1 << 8)        /* Data Bus Pull-up Configuration */
 
-#define AT91_MATRIX_USBPUCR     (AT91_MATRIX + 0x34)    /* USB Pad Pull-Up Control Register */
+#define AT91_MATRIX_USBPUCR     0x34                    /* USB Pad Pull-Up Control Register */
 #define         AT91_MATRIX_USBPUCR_PUON        (1 << 30)       /* USB Device PAD Pull-up Enable */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 5949abda962b..d96cbb2e03c4 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -72,18 +72,15 @@
 #define AT91SAM9263_BASE_2DGE           0xfffc8000
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
-#define AT91_SDRAMC0    (0xffffe200 - AT91_BASE_SYS)
-#define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-
 #define AT91SAM9263_BASE_ECC0   0xffffe000
+#define AT91SAM9263_BASE_SDRAMC0 0xffffe200
 #define AT91SAM9263_BASE_SMC0   0xffffe400
 #define AT91SAM9263_BASE_ECC1   0xffffe600
+#define AT91SAM9263_BASE_SDRAMC1 0xffffe800
 #define AT91SAM9263_BASE_SMC1   0xffffea00
+#define AT91SAM9263_BASE_MATRIX 0xffffec00
 #define AT91SAM9263_BASE_DBGU   AT91_BASE_DBGU1
 #define AT91SAM9263_BASE_PIOA   0xfffff200
 #define AT91SAM9263_BASE_PIOB   0xfffff400
@@ -96,6 +93,7 @@
 #define AT91SAM9263_BASE_PIT    0xfffffd30
 #define AT91SAM9263_BASE_WDT    0xfffffd40
 #define AT91SAM9263_BASE_RTT1   0xfffffd50
+#define AT91SAM9263_BASE_GPBR   0xfffffd60
 
 #define AT91_USART0     AT91SAM9263_BASE_US0
 #define AT91_USART1     AT91SAM9263_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
index 9b3efd3eb2f3..ebb5fdb565e0 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
@@ -15,15 +15,15 @@
 #ifndef AT91SAM9263_MATRIX_H
 #define AT91SAM9263_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6       0x18                    /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7       0x1C                    /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8       0x20                    /* Master Configuration Register 8 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -31,14 +31,14 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6       0x58                    /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7       0x5C                    /* Slave Configuration Register 7 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -49,22 +49,22 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0       0x84                    /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1       0x8C                    /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2       0x94                    /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3       0x9C                    /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4       0xA4                    /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5       0xAC                    /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6       0xB0                    /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6       0xB4                    /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7       0xB8                    /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7       0xBC                    /* Priority Register B for Slave 7 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -75,7 +75,7 @@
 #define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
 #define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
 
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -86,7 +86,7 @@
 #define         AT91_MATRIX_RCB7                (1 << 7)
 #define         AT91_MATRIX_RCB8                (1 << 8)
 
-#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x114)   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        0x114                   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -96,7 +96,7 @@
 #define                 AT91_MATRIX_DTCM_16             (5 << 4)
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 
-#define AT91_MATRIX_EBI0CSA     (AT91_MATRIX + 0x120)   /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI0CSA     0x120                   /* EBI0 Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI0_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI0_CS1A_SMC               (0 << 1)
 #define                 AT91_MATRIX_EBI0_CS1A_SDRAMC            (1 << 1)
@@ -114,7 +114,7 @@
 #define                 AT91_MATRIX_EBI0_VDDIOMSEL_1_8V         (0 << 16)
 #define                 AT91_MATRIX_EBI0_VDDIOMSEL_3_3V         (1 << 16)
 
-#define AT91_MATRIX_EBI1CSA     (AT91_MATRIX + 0x124)   /* EBI1 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI1CSA     0x124                   /* EBI1 Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI1_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI1_CS1A_SMC               (0 << 1)
 #define                 AT91_MATRIX_EBI1_CS1A_SDRAMC            (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index e2f8da8ce5bc..0210797abf2e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -59,7 +59,6 @@
 #define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
 #define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
 #define         AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
-#define         AT91CAP9_DDRSDRC_TWTR   (1   << 24)             /* Internal Write to Read delay */
 #define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay [SAM9 Only] */
 #define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
@@ -76,7 +75,6 @@
 #define         AT91_DDRSDRC_TRTP       (0x7  << 12)            /* Read to Precharge delay */
 
 #define AT91_DDRSDRC_LPR        0x1C    /* Low Power Register */
-#define AT91CAP9_DDRSDRC_LPR    0x18    /* Low Power Register */
 #define         AT91_DDRSDRC_LPCB       (3 << 0)                /* Low-power Configurations */
 #define                 AT91_DDRSDRC_LPCB_DISABLE               0
 #define                 AT91_DDRSDRC_LPCB_SELF_REFRESH          1
@@ -94,11 +92,9 @@
 #define         AT91_DDRSDRC_UPD_MR     (3 << 20)        /* Update load mode register and extended mode register */
 
 #define AT91_DDRSDRC_MDR        0x20    /* Memory Device Register */
-#define AT91CAP9_DDRSDRC_MDR    0x1C    /* Memory Device Register */
 #define         AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
 #define                 AT91_DDRSDRC_MD_SDR             0
 #define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
-#define                 AT91CAP9_DDRSDRC_MD_DDR         2
 #define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
 #define                 AT91_DDRSDRC_MD_DDR2            6       /* [SAM9 Only] */
 #define         AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
@@ -106,16 +102,10 @@
 #define                 AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
 
 #define AT91_DDRSDRC_DLL        0x24    /* DLL Information Register */
-#define AT91CAP9_DDRSDRC_DLL    0x20    /* DLL Information Register */
 #define         AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
 #define         AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
 #define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
-#define         AT91CAP9_DDRSDRC_SDCOVF (1 << 3)                /* Slave Delay Correction Overflow */
-#define         AT91CAP9_DDRSDRC_SDCUDF (1 << 4)                /* Slave Delay Correction Underflow */
-#define         AT91CAP9_DDRSDRC_SDERF  (1 << 5)                /* Slave Delay Correction error */
 #define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
-#define         AT91CAP9_DDRSDRC_SDVAL  (0xff << 16)            /* Slave Delay value */
-#define         AT91CAP9_DDRSDRC_SDCVAL (0xff << 24)            /* Slave Delay Correction value */
 
 #define AT91_DDRSDRC_HS         0x2C    /* High Speed Register [SAM9 Only] */
 #define         AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
@@ -131,10 +121,4 @@
 #define         AT91_DDRSDRC_WPVS       (1 << 0)                /* Write protect violation status */
 #define         AT91_DDRSDRC_WPVSRC     (0xffff << 8)           /* Write protect violation source */
 
-/* Register access macros */
-#define at91_ramc_read(num, reg) \
-        at91_sys_read(AT91_DDRSDRC##num + reg)
-#define at91_ramc_write(num, reg, value) \
-        at91_sys_write(AT91_DDRSDRC##num + reg, value)
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 100f5a592926..3d085a9a7450 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -82,10 +82,4 @@
 #define                 AT91_SDRAMC_MD_SDRAM            0
 #define                 AT91_SDRAMC_MD_LOW_POWER_SDRAM  1
 
-/* Register access macros */
-#define at91_ramc_read(num, reg) \
-        at91_sys_read(AT91_SDRAMC##num + reg)
-#define at91_ramc_write(num, reg, value) \
-        at91_sys_write(AT91_SDRAMC##num + reg, value)
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index dd9c95ea0862..d052abcff852 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -84,17 +84,14 @@
 #define AT91SAM9G45_BASE_TC5            0xfffd4080
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
-#define AT91_DDRSDRC1   (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-
 #define AT91SAM9G45_BASE_ECC    0xffffe200
+#define AT91SAM9G45_BASE_DDRSDRC1 0xffffe400
+#define AT91SAM9G45_BASE_DDRSDRC0 0xffffe600
 #define AT91SAM9G45_BASE_DMA    0xffffec00
 #define AT91SAM9G45_BASE_SMC    0xffffe800
+#define AT91SAM9G45_BASE_MATRIX 0xffffea00
 #define AT91SAM9G45_BASE_DBGU   AT91_BASE_DBGU1
 #define AT91SAM9G45_BASE_PIOA   0xfffff200
 #define AT91SAM9G45_BASE_PIOB   0xfffff400
@@ -107,6 +104,7 @@
 #define AT91SAM9G45_BASE_PIT    0xfffffd30
 #define AT91SAM9G45_BASE_WDT    0xfffffd40
 #define AT91SAM9G45_BASE_RTC    0xfffffdb0
+#define AT91SAM9G45_BASE_GPBR   0xfffffd60
 
 #define AT91_USART0     AT91SAM9G45_BASE_US0
 #define AT91_USART1     AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
index c972d60e0aeb..b76e2ed2fbc2 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
@@ -15,18 +15,18 @@
 #ifndef AT91SAM9G45_MATRIX_H
 #define AT91SAM9G45_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9       (AT91_MATRIX + 0x24)    /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10      (AT91_MATRIX + 0x28)    /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11      (AT91_MATRIX + 0x2C)    /* Master Configuration Register 11 */
+#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6       0x18                    /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7       0x1C                    /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8       0x20                    /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG9       0x24                    /* Master Configuration Register 9 */
+#define AT91_MATRIX_MCFG10      0x28                    /* Master Configuration Register 10 */
+#define AT91_MATRIX_MCFG11      0x2C                    /* Master Configuration Register 11 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -37,14 +37,14 @@
 #define                 AT91_MATRIX_ULBT_SIXTYFOUR      (6 << 0)
 #define                 AT91_MATRIX_ULBT_128            (7 << 0)
 
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6       0x58                    /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7       0x5C                    /* Slave Configuration Register 7 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0x1ff << 0)    /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -52,22 +52,22 @@
 #define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
 #define         AT91_MATRIX_FIXED_DEFMSTR       (0xf  << 18)    /* Fixed Index of Default Master */
 
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0       0x84                    /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1       0x8C                    /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2       0x94                    /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3       0x9C                    /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4       0xA4                    /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5       0xAC                    /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6       0xB0                    /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6       0xB4                    /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7       0xB8                    /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7       0xBC                    /* Priority Register B for Slave 7 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -81,7 +81,7 @@
 #define         AT91_MATRIX_M10PR               (3 << 8)        /* Master 10 Priority (in Register B) */
 #define         AT91_MATRIX_M11PR               (3 << 12)       /* Master 11 Priority (in Register B) */
 
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -95,7 +95,7 @@
 #define         AT91_MATRIX_RCB10               (1 << 10)
 #define         AT91_MATRIX_RCB11               (1 << 11)
 
-#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x110)   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        0x110                   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_32             (6 << 0)
@@ -107,12 +107,12 @@
 #define                 AT91_MATRIX_TCM_NO_WS           (0x0 << 11)
 #define                 AT91_MATRIX_TCM_ONE_WS          (0x1 << 11)
 
-#define AT91_MATRIX_VIDEO       (AT91_MATRIX + 0x118)   /* Video Mode Configuration Register */
+#define AT91_MATRIX_VIDEO       0x118                   /* Video Mode Configuration Register */
 #define         AT91C_VDEC_SEL                  (0x1 <<  0) /* Video Mode Selection */
 #define                 AT91C_VDEC_SEL_OFF              (0 << 0)
 #define                 AT91C_VDEC_SEL_ON               (1 << 0)
 
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x128)   /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      0x128                   /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
 #define                 AT91_MATRIX_EBI_CS1A_SDRAMC             (1 << 1)
@@ -138,13 +138,13 @@
 #define                 AT91_MATRIX_EBI_DDR_IOSR_REDUCED        (0 << 18)
 #define                 AT91_MATRIX_EBI_DDR_IOSR_NORMAL         (1 << 18)
 
-#define AT91_MATRIX_WPMR        (AT91_MATRIX + 0x1E4)   /* Write Protect Mode Register */
+#define AT91_MATRIX_WPMR        0x1E4                   /* Write Protect Mode Register */
 #define         AT91_MATRIX_WPMR_WPEN           (1 << 0)        /* Write Protect ENable */
 #define                 AT91_MATRIX_WPMR_WP_WPDIS               (0 << 0)
 #define                 AT91_MATRIX_WPMR_WP_WPEN                (1 << 0)
 #define         AT91_MATRIX_WPMR_WPKEY          (0xFFFFFF << 8) /* Write Protect KEY */
 
-#define AT91_MATRIX_WPSR        (AT91_MATRIX + 0x1E8)   /* Write Protect Status Register */
+#define AT91_MATRIX_WPSR        0x1E8                   /* Write Protect Status Register */
 #define         AT91_MATRIX_WPSR_WPVS           (1 << 0)        /* Write Protect Violation Status */
 #define                 AT91_MATRIX_WPSR_NO_WPV         (0 << 0)
 #define                 AT91_MATRIX_WPSR_WPV            (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index d7bead7118da..e0073eb10144 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,15 +69,13 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
 
 #define AT91SAM9RL_BASE_DMA     0xffffe600
 #define AT91SAM9RL_BASE_ECC     0xffffe800
+#define AT91SAM9RL_BASE_SDRAMC  0xffffea00
 #define AT91SAM9RL_BASE_SMC     0xffffec00
+#define AT91SAM9RL_BASE_MATRIX  0xffffee00
 #define AT91SAM9RL_BASE_DBGU    AT91_BASE_DBGU0
 #define AT91SAM9RL_BASE_PIOA    0xfffff400
 #define AT91SAM9RL_BASE_PIOB    0xfffff600
@@ -88,6 +86,7 @@
 #define AT91SAM9RL_BASE_RTT     0xfffffd20
 #define AT91SAM9RL_BASE_PIT     0xfffffd30
 #define AT91SAM9RL_BASE_WDT     0xfffffd40
+#define AT91SAM9RL_BASE_GPBR    0xfffffd60
 #define AT91SAM9RL_BASE_RTC     0xfffffe00
 
 #define AT91_USART0     AT91SAM9RL_BASE_US0
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
index 5f9149071fe5..6d160adadafc 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
@@ -14,12 +14,12 @@
 #ifndef AT91SAM9RL_MATRIX_H
 #define AT91SAM9RL_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -27,12 +27,12 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -43,12 +43,12 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -56,7 +56,7 @@
 #define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
 #define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
 
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -64,7 +64,7 @@
 #define         AT91_MATRIX_RCB4                (1 << 4)
 #define         AT91_MATRIX_RCB5                (1 << 5)
 
-#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x114)   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        0x114                   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -74,7 +74,7 @@
 #define                 AT91_MATRIX_DTCM_16             (5 << 4)
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      0x120                   /* EBI0 Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
new file mode 100644
index 000000000000..a297a77d88e2
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -0,0 +1,79 @@
+/*
+ * Chip-specific header file for the AT91SAM9x5 family
+ *
+ *  Copyright (C) 2009-2012 Atmel Corporation.
+ *
+ * Common definitions.
+ * Based on AT91SAM9x5 datasheet.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#ifndef AT91SAM9X5_H
+#define AT91SAM9X5_H
+
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define AT91SAM9X5_ID_PIOAB     2       /* Parallel I/O Controller A and B */
+#define AT91SAM9X5_ID_PIOCD     3       /* Parallel I/O Controller C and D */
+#define AT91SAM9X5_ID_SMD       4       /* SMD Soft Modem (SMD) */
+#define AT91SAM9X5_ID_USART0    5       /* USART 0 */
+#define AT91SAM9X5_ID_USART1    6       /* USART 1 */
+#define AT91SAM9X5_ID_USART2    7       /* USART 2 */
+#define AT91SAM9X5_ID_USART3    8       /* USART 3 */
+#define AT91SAM9X5_ID_TWI0      9       /* Two-Wire Interface 0 */
+#define AT91SAM9X5_ID_TWI1      10      /* Two-Wire Interface 1 */
+#define AT91SAM9X5_ID_TWI2      11      /* Two-Wire Interface 2 */
+#define AT91SAM9X5_ID_MCI0      12      /* High Speed Multimedia Card Interface 0 */
+#define AT91SAM9X5_ID_SPI0      13      /* Serial Peripheral Interface 0 */
+#define AT91SAM9X5_ID_SPI1      14      /* Serial Peripheral Interface 1 */
+#define AT91SAM9X5_ID_UART0     15      /* UART 0 */
+#define AT91SAM9X5_ID_UART1     16      /* UART 1 */
+#define AT91SAM9X5_ID_TCB       17      /* Timer Counter 0, 1, 2, 3, 4 and 5 */
+#define AT91SAM9X5_ID_PWM       18      /* Pulse Width Modulation Controller */
+#define AT91SAM9X5_ID_ADC       19      /* ADC Controller */
+#define AT91SAM9X5_ID_DMA0      20      /* DMA Controller 0 */
+#define AT91SAM9X5_ID_DMA1      21      /* DMA Controller 1 */
+#define AT91SAM9X5_ID_UHPHS     22      /* USB Host High Speed */
+#define AT91SAM9X5_ID_UDPHS     23      /* USB Device High Speed */
+#define AT91SAM9X5_ID_EMAC0     24      /* Ethernet MAC0 */
+#define AT91SAM9X5_ID_LCDC      25      /* LCD Controller */
+#define AT91SAM9X5_ID_ISI       25      /* Image Sensor Interface */
+#define AT91SAM9X5_ID_MCI1      26      /* High Speed Multimedia Card Interface 1 */
+#define AT91SAM9X5_ID_EMAC1     27      /* Ethernet MAC1 */
+#define AT91SAM9X5_ID_SSC       28      /* Synchronous Serial Controller */
+#define AT91SAM9X5_ID_CAN0      29      /* CAN Controller 0 */
+#define AT91SAM9X5_ID_CAN1      30      /* CAN Controller 1 */
+#define AT91SAM9X5_ID_IRQ0      31      /* Advanced Interrupt Controller */
+
+/*
+ * User Peripheral physical base addresses.
+ */
+#define AT91SAM9X5_BASE_USART0  0xf801c000
+#define AT91SAM9X5_BASE_USART1  0xf8020000
+#define AT91SAM9X5_BASE_USART2  0xf8024000
+
+/*
+ * System Peripherals
+ */
+#define AT91SAM9X5_BASE_DDRSDRC0        0xffffe800
+
+/*
+ * Base addresses for early serial code (uncompress.h)
+ */
+#define AT91_DBGU       AT91_BASE_DBGU0
+#define AT91_USART0     AT91SAM9X5_BASE_USART0
+#define AT91_USART1     AT91SAM9X5_BASE_USART1
+#define AT91_USART2     AT91SAM9X5_BASE_USART2
+
+/*
+ * Internal Memory.
+ */
+#define AT91SAM9X5_SRAM_BASE    0x00300000      /* Internal SRAM base address */
+#define AT91SAM9X5_SRAM_SIZE    SZ_32K          /* Internal SRAM size (32Kb) */
+
+#define AT91SAM9X5_ROM_BASE     0x00400000      /* Internal ROM base address */
+#define AT91SAM9X5_ROM_SIZE     SZ_64K          /* Internal ROM size (64Kb) */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
new file mode 100644
index 000000000000..a606d3966470
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
@@ -0,0 +1,53 @@
+/*
+ * Matrix-centric header file for the AT91SAM9x5 family
+ *
+ *  Copyright (C) 2009-2012 Atmel Corporation.
+ *
+ * Only EBI related registers.
+ * Write Protect register definitions may be useful.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#ifndef AT91SAM9X5_MATRIX_H
+#define AT91SAM9X5_MATRIX_H
+
+#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI Chip Select Assignment Register */
+#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
+#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
+#define                 AT91_MATRIX_EBI_CS1A_SDRAMC             (1 << 1)
+#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
+#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
+#define                 AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH      (1 << 3)
+#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
+#define                 AT91_MATRIX_EBI_DBPU_ON                 (0 << 8)
+#define                 AT91_MATRIX_EBI_DBPU_OFF                (1 << 8)
+#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
+#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
+#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
+#define         AT91_MATRIX_EBI_EBI_IOSR        (1 << 17)       /* EBI I/O slew rate selection */
+#define                 AT91_MATRIX_EBI_EBI_IOSR_REDUCED        (0 << 17)
+#define                 AT91_MATRIX_EBI_EBI_IOSR_NORMAL         (1 << 17)
+#define         AT91_MATRIX_EBI_DDR_IOSR        (1 << 18)       /* DDR2 dedicated port I/O slew rate selection */
+#define                 AT91_MATRIX_EBI_DDR_IOSR_REDUCED        (0 << 18)
+#define                 AT91_MATRIX_EBI_DDR_IOSR_NORMAL         (1 << 18)
+#define         AT91_MATRIX_NFD0_SELECT         (1 << 24)       /* NAND Flash Data Bus Selection */
+#define                 AT91_MATRIX_NFD0_ON_D0                  (0 << 24)
+#define                 AT91_MATRIX_NFD0_ON_D16                 (1 << 24)
+#define         AT91_MATRIX_DDR_MP_EN           (1 << 25)       /* DDR Multi-port Enable */
+#define                 AT91_MATRIX_MP_OFF                      (0 << 25)
+#define                 AT91_MATRIX_MP_ON                       (1 << 25)
+
+#define AT91_MATRIX_WPMR        (AT91_MATRIX + 0x1E4)   /* Write Protect Mode Register */
+#define         AT91_MATRIX_WPMR_WPEN           (1 << 0)        /* Write Protect ENable */
+#define                 AT91_MATRIX_WPMR_WP_WPDIS               (0 << 0)
+#define                 AT91_MATRIX_WPMR_WP_WPEN                (1 << 0)
+#define         AT91_MATRIX_WPMR_WPKEY          (0xFFFFFF << 8) /* Write Protect KEY */
+
+#define AT91_MATRIX_WPSR        (AT91_MATRIX + 0x1E8)   /* Write Protect Status Register */
+#define         AT91_MATRIX_WPSR_WPVS           (1 << 0)        /* Write Protect Violation Status */
+#define                 AT91_MATRIX_WPSR_NO_WPV         (0 << 0)
+#define                 AT91_MATRIX_WPSR_WPV            (1 << 0)
+#define         AT91_MATRIX_WPSR_WPVSRC         (0xFFFF << 8)   /* Write Protect Violation Source */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a57829f4fd18..90680217064e 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -28,18 +28,18 @@
 #define AT91X40_ID_IRQ2         18      /* External IRQ 2 */
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
  */
 #define AT91_BASE_SYS   0xffc00000
 
-#define AT91_EBI        (0xffe00000 - AT91_BASE_SYS)    /* External Bus Interface */
-#define AT91_SF         (0xfff00000 - AT91_BASE_SYS)    /* Special Function */
-#define AT91_USART1     (0xfffcc000 - AT91_BASE_SYS)    /* USART 1 */
-#define AT91_USART0     (0xfffd0000 - AT91_BASE_SYS)    /* USART 0 */
-#define AT91_TC         (0xfffe0000 - AT91_BASE_SYS)    /* Timer Counter */
-#define AT91_PIOA       (0xffff0000 - AT91_BASE_SYS)    /* PIO Controller A */
-#define AT91_PS         (0xffff4000 - AT91_BASE_SYS)    /* Power Save */
-#define AT91_WD         (0xffff8000 - AT91_BASE_SYS)    /* Watchdog Timer */
+#define AT91_EBI        0xffe00000      /* External Bus Interface */
+#define AT91_SF         0xfff00000      /* Special Function */
+#define AT91_USART1     0xfffcc000      /* USART 1 */
+#define AT91_USART0     0xfffd0000      /* USART 0 */
+#define AT91_TC         0xfffe0000      /* Timer Counter */
+#define AT91_PIOA       0xffff0000      /* PIO Controller A */
+#define AT91_PS         0xffff4000      /* Power Save */
+#define AT91_WD         0xffff8000      /* Watchdog Timer */
 
 /*
  * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 3b33f07b1e11..dc8d6d4f17cf 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -107,6 +107,8 @@ struct atmel_nand_data {
         u8              ale;            /* address line number connected to ALE */
         u8              cle;            /* address line number connected to CLE */
         u8              bus_width_16;   /* buswidth is 16 bit */
+        u8              correction_cap; /* PMECC correction capability */
+        u16             sector_size;    /* Sector size for PMECC */
         struct mtd_partition *parts;
         unsigned int    num_parts;
 };
@@ -179,7 +181,9 @@ extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
 extern void __init at91_add_device_ac97(struct ac97c_platform_data *data);
 
  /* ISI */
-extern void __init at91_add_device_isi(void);
+struct isi_platform_data;
+extern void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck);
 
  /* Touchscreen Controller */
 struct at91_tsadcc_data {
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index f6ce936dba2b..0118c3338552 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -25,7 +25,6 @@
 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
 #define ARCH_ID_AT91SAM9X5      0x819a05a0
-#define ARCH_ID_AT91CAP9        0x039A03A0
 
 #define ARCH_ID_AT91SAM9XE128   0x329973a0
 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
@@ -51,10 +50,6 @@
 #define ARCH_FAMILY_AT91SAM9    0x01900000
 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
 
-/* PMC revision */
-#define ARCH_REVISION_CAP9_B    0x399
-#define ARCH_REVISION_CAP9_C    0x601
-
 /* RM9200 type */
 #define ARCH_REVISON_9200_BGA   (0 << 0)
 #define ARCH_REVISON_9200_PQFP  (1 << 0)
@@ -63,9 +58,6 @@ enum at91_soc_type {
         /* 920T */
         AT91_SOC_RM9200,
 
-        /* CAP */
-        AT91_SOC_CAP9,
-
         /* SAM92xx */
         AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
 
@@ -86,9 +78,6 @@ enum at91_soc_subtype {
         /* RM9200 */
         AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
 
-        /* CAP9 */
-        AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C,
-
         /* SAM9260 */
         AT91_SOC_SAM9XE,
 
@@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91sam9x25()    (0)
 #endif
 
-#ifdef CONFIG_ARCH_AT91CAP9
-#define cpu_is_at91cap9()       (at91_soc_initdata.type == AT91_SOC_CAP9)
-#define cpu_is_at91cap9_revB()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B)
-#define cpu_is_at91cap9_revC()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C)
-#else
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
-#endif
-
 /*
  * Since this is ARM, we will never run on any AVR32 CPU. But these
  * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index e3fd225121c7..eed465ab0dd7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -191,10 +191,15 @@
 extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
+extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup);
+extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
 extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
+extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div);
 extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
+extern int __init_or_module at91_set_pulldown(unsigned pin, int is_on);
+extern int __init_or_module at91_disable_schmitt_trig(unsigned pin);
 
 /* callable at any time */
 extern int at91_set_gpio_value(unsigned pin, int value);
@@ -204,18 +209,6 @@ extern int at91_get_gpio_value(unsigned pin);
 extern void at91_gpio_suspend(void);
 extern void at91_gpio_resume(void);
 
-/*-------------------------------------------------------------------------*/
-
-/* wrappers for "new style" GPIO calls. the old AT91-specific ones should
- * eventually be removed (along with this errno.h inclusion), and the
- * gpio request/free calls should probably be implemented.
- */
-
-#include <asm/errno.h>
-
-#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS)
-#define irq_to_gpio(irq)  (irq - NR_AIC_IRQS)
-
 #endif  /* __ASSEMBLY__ */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 2d0e4e998566..e9e29a6c3868 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -19,7 +19,7 @@
 /* DBGU base */
 /* rm9200, 9260/9g20, 9261/9g10, 9rl */
 #define AT91_BASE_DBGU0 0xfffff200
-/* 9263, 9g45, cap9 */
+/* 9263, 9g45 */
 #define AT91_BASE_DBGU1 0xffffee00
 
 #if defined(CONFIG_ARCH_AT91RM9200)
@@ -34,8 +34,8 @@
 #include <mach/at91sam9rl.h>
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9g45.h>
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91cap9.h>
+#elif defined(CONFIG_ARCH_AT91SAM9X5)
+#include <mach/at91sam9x5.h>
 #elif defined(CONFIG_ARCH_AT91X40)
 #include <mach/at91x40.h>
 #else
@@ -59,9 +59,10 @@
 
 /*
  * On all at91 have the Advanced Interrupt Controller starts at address
- * 0xfffff000
+ * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
  */
 #define AT91_AIC        0xfffff000
+#define AT91_PMC        0xfffffc00
 
 /*
  * Peripheral identifiers/interrupts.
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4ca09ef7ca29..4003001eca3d 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -28,22 +28,4 @@
 #define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
-#ifndef __ASSEMBLY__
-
-static inline unsigned int at91_sys_read(unsigned int reg_offset)
-{
-        void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-
-        return __raw_readl(addr + reg_offset);
-}
-
-static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
-{
-        void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-
-        __raw_writel(value, addr + reg_offset);
-}
-
-#endif
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
deleted file mode 100644
index cbd64f3bcecd..000000000000
--- a/arch/arm/mach-at91/include/mach/system.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/system.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/hardware.h>
-#include <mach/at91_st.h>
-#include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
-
-static inline void arch_idle(void)
-{
-        /*
-         * Disable the processor clock.  The processor will be automatically
-         * re-enabled by an interrupt or by a reset.
-         */
-#ifdef AT91_PS
-        at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
-#else
-        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-#endif
-#ifndef CONFIG_CPU_ARM920T
-        /*
-         * Set the processor (CP15) into 'Wait for Interrupt' mode.
-         * Post-RM9200 processors need this in conjunction with the above
-         * to save power when idle.
-         */
-        cpu_do_idle();
-#endif
-}
-
-#endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index be6b639ecd7b..cfcfcbe36269 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -24,6 +24,12 @@
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/types.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/err.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -34,22 +40,24 @@
 #include <asm/mach/map.h>
 
 void __iomem *at91_aic_base;
+static struct irq_domain *at91_aic_domain;
+static struct device_node *at91_aic_np;
 
 static void at91_aic_mask_irq(struct irq_data *d)
 {
         /* Disable interrupt on AIC */
-        at91_aic_write(AT91_AIC_IDCR, 1 << d->irq);
+        at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq);
 }
 
 static void at91_aic_unmask_irq(struct irq_data *d)
 {
         /* Enable interrupt on AIC */
-        at91_aic_write(AT91_AIC_IECR, 1 << d->irq);
+        at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq);
 }
 
 unsigned int at91_extern_irq;
 
-#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
+#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq)
 
 static int at91_aic_set_type(struct irq_data *d, unsigned type)
 {
@@ -63,13 +71,13 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
                 srctype = AT91_AIC_SRCTYPE_RISING;
                 break;
         case IRQ_TYPE_LEVEL_LOW:
-                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
+                if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq))               /* only supported on external interrupts */
                         srctype = AT91_AIC_SRCTYPE_LOW;
                 else
                         return -EINVAL;
                 break;
         case IRQ_TYPE_EDGE_FALLING:
-                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
+                if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq))               /* only supported on external interrupts */
                         srctype = AT91_AIC_SRCTYPE_FALLING;
                 else
                         return -EINVAL;
@@ -78,8 +86,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
                 return -EINVAL;
         }
 
-        smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
-        at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype);
+        smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE;
+        at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
         return 0;
 }
 
@@ -90,13 +98,13 @@ static u32 backups;
 
 static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 {
-        if (unlikely(d->irq >= 32))
+        if (unlikely(d->hwirq >= NR_AIC_IRQS))
                 return -EINVAL;
 
         if (value)
-                wakeups |= (1 << d->irq);
+                wakeups |= (1 << d->hwirq);
         else
-                wakeups &= ~(1 << d->irq);
+                wakeups &= ~(1 << d->hwirq);
 
         return 0;
 }
@@ -127,46 +135,112 @@ static struct irq_chip at91_aic_chip = {
         .irq_set_wake   = at91_aic_set_wake,
 };
 
+static void __init at91_aic_hw_init(unsigned int spu_vector)
+{
+        int i;
+
+        /*
+         * Perform 8 End Of Interrupt Command to make sure AIC
+         * will not Lock out nIRQ
+         */
+        for (i = 0; i < 8; i++)
+                at91_aic_write(AT91_AIC_EOICR, 0);
+
+        /*
+         * Spurious Interrupt ID in Spurious Vector Register.
+         * When there is no current interrupt, the IRQ Vector Register
+         * reads the value stored in AIC_SPU
+         */
+        at91_aic_write(AT91_AIC_SPU, spu_vector);
+
+        /* No debugging in AIC: Debug (Protect) Control Register */
+        at91_aic_write(AT91_AIC_DCR, 0);
+
+        /* Disable and clear all interrupts initially */
+        at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
+        at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
+}
+
+#if defined(CONFIG_OF)
+static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
+                                                        irq_hw_number_t hw)
+{
+        /* Put virq number in Source Vector Register */
+        at91_aic_write(AT91_AIC_SVR(hw), virq);
+
+        /* Active Low interrupt, without priority */
+        at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW);
+
+        irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq);
+        set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+
+        return 0;
+}
+
+static struct irq_domain_ops at91_aic_irq_ops = {
+        .map    = at91_aic_irq_map,
+        .xlate  = irq_domain_xlate_twocell,
+};
+
+int __init at91_aic_of_init(struct device_node *node,
+                                     struct device_node *parent)
+{
+        at91_aic_base = of_iomap(node, 0);
+        at91_aic_np = node;
+
+        at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS,
+                                                &at91_aic_irq_ops, NULL);
+        if (!at91_aic_domain)
+                panic("Unable to add AIC irq domain (DT)\n");
+
+        irq_set_default_host(at91_aic_domain);
+
+        at91_aic_hw_init(NR_AIC_IRQS);
+
+        return 0;
+}
+#endif
+
 /*
  * Initialize the AIC interrupt controller.
  */
 void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 {
         unsigned int i;
+        int irq_base;
 
         at91_aic_base = ioremap(AT91_AIC, 512);
-
         if (!at91_aic_base)
-                panic("Impossible to ioremap AT91_AIC\n");
+                panic("Unable to ioremap AIC registers\n");
+
+        /* Add irq domain for AIC */
+        irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0);
+        if (irq_base < 0) {
+                WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n");
+                irq_base = 0;
+        }
+        at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS,
+                                                irq_base, 0,
+                                                &irq_domain_simple_ops, NULL);
+
+        if (!at91_aic_domain)
+                panic("Unable to add AIC irq domain\n");
+
+        irq_set_default_host(at91_aic_domain);
 
         /*
          * The IVR is used by macro get_irqnr_and_base to read and verify.
          * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
          */
         for (i = 0; i < NR_AIC_IRQS; i++) {
-                /* Put irq number in Source Vector Register: */
+                /* Put hardware irq number in Source Vector Register: */
                 at91_aic_write(AT91_AIC_SVR(i), i);
                 /* Active Low interrupt, with the specified priority */
                 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
                 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-
-                /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
-                if (i < 8)
-                        at91_aic_write(AT91_AIC_EOICR, 0);
         }
 
-        /*
-         * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
-         * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
-         */
-        at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS);
-
-        /* No debugging in AIC: Debug (Protect) Control Register */
-        at91_aic_write(AT91_AIC_DCR, 0);
-
-        /* Disable and clear all interrupts initially */
-        at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
-        at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
+        at91_aic_hw_init(NR_AIC_IRQS);
 }
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 1606379ac284..6c9d5e69ac28 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -136,7 +136,7 @@ static int at91_pm_verify_clocks(void)
         unsigned long scsr;
         int i;
 
-        scsr = at91_sys_read(AT91_PMC_SCSR);
+        scsr = at91_pmc_read(AT91_PMC_SCSR);
 
         /* USB must not be using PLLB */
         if (cpu_is_at91rm9200()) {
@@ -150,11 +150,6 @@ static int at91_pm_verify_clocks(void)
                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
                         return 0;
                 }
-        } else if (cpu_is_at91cap9()) {
-                if ((scsr & AT91CAP9_PMC_UHP) != 0) {
-                        pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
-                        return 0;
-                }
         }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -165,7 +160,7 @@ static int at91_pm_verify_clocks(void)
                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
                         continue;
 
-                css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
+                css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
                 if (css != AT91_PMC_CSS_SLOW) {
                         pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
                         return 0;
@@ -193,23 +188,36 @@ int at91_suspend_entering_slow_clock(void)
 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 
 
-static void (*slow_clock)(void);
+static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
+                          void __iomem *ramc1, int memctrl);
 
 #ifdef CONFIG_AT91_SLOW_CLOCK
-extern void at91_slow_clock(void);
+extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
+                            void __iomem *ramc1, int memctrl);
 extern u32 at91_slow_clock_sz;
 #endif
 
+void __iomem *at91_ramc_base[2];
+
+void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
+{
+        if (id < 0 || id > 1) {
+                pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
+                BUG();
+        }
+        at91_ramc_base[id] = ioremap(addr, size);
+        if (!at91_ramc_base[id])
+                panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
+}
 
 static int at91_pm_enter(suspend_state_t state)
 {
-        u32 saved_lpr;
         at91_gpio_suspend();
         at91_irq_suspend();
 
         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
                         /* remember all the always-wake irqs */
-                        (at91_sys_read(AT91_PMC_PCSR)
+                        (at91_pmc_read(AT91_PMC_PCSR)
                                         | (1 << AT91_ID_FIQ)
                                         | (1 << AT91_ID_SYS)
                                         | (at91_extern_irq))
@@ -234,11 +242,18 @@ static int at91_pm_enter(suspend_state_t state)
                          * turning off the main oscillator; reverse on wakeup.
                          */
                         if (slow_clock) {
+                                int memctrl = AT91_MEMCTRL_SDRAMC;
+
+                                if (cpu_is_at91rm9200())
+                                        memctrl = AT91_MEMCTRL_MC;
+                                else if (cpu_is_at91sam9g45())
+                                        memctrl = AT91_MEMCTRL_DDRSDR;
 #ifdef CONFIG_AT91_SLOW_CLOCK
                                 /* copy slow_clock handler to SRAM, and call it */
                                 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
 #endif
-                                slow_clock();
+                                slow_clock(at91_pmc_base, at91_ramc_base[0],
+                                           at91_ramc_base[1], memctrl);
                                 break;
                         } else {
                                 pr_info("AT91: PM - no slow clock mode enabled ...\n");
@@ -259,16 +274,7 @@ static int at91_pm_enter(suspend_state_t state)
                          * For ARM 926 based chips, this requirement is weaker
                          * as at91sam9 can access a RAM in self-refresh mode.
                          */
-                        asm volatile (  "mov r0, #0\n\t"
-                                        "b 1f\n\t"
-                                        ".align 5\n\t"
-                                        "1: mcr p15, 0, r0, c7, c10, 4\n\t"
-                                        : /* no output */
-                                        : /* no input */
-                                        : "r0");
-                        saved_lpr = sdram_selfrefresh_enable();
-                        wait_for_interrupt_enable();
-                        sdram_selfrefresh_disable(saved_lpr);
+                        at91_standby();
                         break;
 
                 case PM_SUSPEND_ON:
@@ -316,7 +322,7 @@ static int __init at91_pm_init(void)
 
 #ifdef CONFIG_ARCH_AT91RM9200
         /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
-        at91_sys_write(AT91_SDRAMC_LPR, 0);
+        at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
 #endif
 
         suspend_set_ops(&at91_pm_ops);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 7eb40d24242f..89f56f3a802e 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -1,5 +1,19 @@
+/*
+ * AT91 Power Management
+ *
+ * Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __ARCH_ARM_MACH_AT91_PM
+#define __ARCH_ARM_MACH_AT91_PM
+
+#include <mach/at91_ramc.h>
 #ifdef CONFIG_ARCH_AT91RM9200
-#include <mach/at91rm9200_mc.h>
+#include <mach/at91rm9200_sdramc.h>
 
 /*
  * The AT91RM9200 goes into self-refresh mode with this command, and will
@@ -11,51 +25,37 @@
  * still in self-refresh is "not recommended", but seems to work.
  */
 
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91rm9200_standby(void)
 {
-        u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
-
-        at91_sys_write(AT91_SDRAMC_LPR, 0);
-        at91_sys_write(AT91_SDRAMC_SRR, 1);
-        return saved_lpr;
+        u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
+
+        asm volatile(
+                "b    1f\n\t"
+                ".align    5\n\t"
+                "1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
+                "    str    %0, [%1, %2]\n\t"
+                "    str    %3, [%1, %4]\n\t"
+                "    mcr    p15, 0, %0, c7, c0, 4\n\t"
+                "    str    %5, [%1, %2]"
+                :
+                : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
+                  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
+                  "r" (lpr));
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)    at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
-                                                                : : "r" (0))
-
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91sam9_ddrsdr.h>
-
-
-static inline u32 sdram_selfrefresh_enable(void)
-{
-        u32 saved_lpr, lpr;
-
-        saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
-
-        lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
-        at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
-        return saved_lpr;
-}
-
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91rm9200_standby
 
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
-#include <mach/at91sam9_ddrsdr.h>
 
 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
  * remember.
  */
-static u32 saved_lpr1;
-
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9g45_standby(void)
 {
-        /* Those tow values allow us to delay self-refresh activation
+        /* Those two values allow us to delay self-refresh activation
          * to the maximum. */
         u32 lpr0, lpr1;
-        u32 saved_lpr0;
+        u32 saved_lpr0, saved_lpr1;
 
         saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
         lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
@@ -69,18 +69,15 @@ static inline u32 sdram_selfrefresh_enable(void)
         at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
         at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
 
-        return saved_lpr0;
+        cpu_do_idle();
+
+        at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
+        at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
 }
 
-#define sdram_selfrefresh_disable(saved_lpr0)   \
-        do { \
-                at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
-                at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
-        } while (0)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91sam9g45_standby
 
 #else
-#include <mach/at91sam9_sdramc.h>
 
 #ifdef CONFIG_ARCH_AT91SAM9263
 /*
@@ -90,18 +87,23 @@ static inline u32 sdram_selfrefresh_enable(void)
 #warning Assuming EB1 SDRAM controller is *NOT* used
 #endif
 
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9_standby(void)
 {
         u32 saved_lpr, lpr;
 
         saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
 
         lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
-        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
-        return saved_lpr;
+        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
+                        AT91_SDRAMC_LPCB_SELF_REFRESH);
+
+        cpu_do_idle();
+
+        at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91sam9_standby
+
+#endif
 
 #endif
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 92dfb8461392..db5452123f17 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -15,15 +15,7 @@
 #include <linux/linkage.h>
 #include <mach/hardware.h>
 #include <mach/at91_pmc.h>
-
-#if defined(CONFIG_ARCH_AT91RM9200)
-#include <mach/at91rm9200_mc.h>
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
-#include <mach/at91sam9_ddrsdr.h>
-#else
-#include <mach/at91sam9_sdramc.h>
-#endif
+#include <mach/at91_ramc.h>
 
 
 #ifdef CONFIG_ARCH_AT91SAM9263
@@ -47,17 +39,23 @@
 #define PLLALOCK_TIMEOUT        1000
 #define PLLBLOCK_TIMEOUT        1000
 
+pmc     .req    r0
+sdramc  .req    r1
+ramc1   .req    r2
+memctrl .req    r3
+tmp1    .req    r4
+tmp2    .req    r5
 
 /*
  * Wait until master clock is ready (after switching master clock source)
  */
         .macro wait_mckrdy
-        mov     r4, #MCKRDY_TIMEOUT
-1:      sub     r4, r4, #1
-        cmp     r4, #0
+        mov     tmp2, #MCKRDY_TIMEOUT
+1:      sub     tmp2, tmp2, #1
+        cmp     tmp2, #0
         beq     2f
-        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
-        tst     r3, #AT91_PMC_MCKRDY
+        ldr     tmp1, [pmc, #AT91_PMC_SR]
+        tst     tmp1, #AT91_PMC_MCKRDY
         beq     1b
 2:
         .endm
@@ -66,12 +64,12 @@
  * Wait until master oscillator has stabilized.
  */
         .macro wait_moscrdy
-        mov     r4, #MOSCRDY_TIMEOUT
-1:      sub     r4, r4, #1
-        cmp     r4, #0
+        mov     tmp2, #MOSCRDY_TIMEOUT
+1:      sub     tmp2, tmp2, #1
+        cmp     tmp2, #0
         beq     2f
-        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
-        tst     r3, #AT91_PMC_MOSCS
+        ldr     tmp1, [pmc, #AT91_PMC_SR]
+        tst     tmp1, #AT91_PMC_MOSCS
         beq     1b
 2:
         .endm
@@ -80,12 +78,12 @@
  * Wait until PLLA has locked.
  */
         .macro wait_pllalock
-        mov     r4, #PLLALOCK_TIMEOUT
-1:      sub     r4, r4, #1
-        cmp     r4, #0
+        mov     tmp2, #PLLALOCK_TIMEOUT
+1:      sub     tmp2, tmp2, #1
+        cmp     tmp2, #0
         beq     2f
-        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
-        tst     r3, #AT91_PMC_LOCKA
+        ldr     tmp1, [pmc, #AT91_PMC_SR]
+        tst     tmp1, #AT91_PMC_LOCKA
         beq     1b
 2:
         .endm
@@ -94,80 +92,98 @@
  * Wait until PLLB has locked.
  */
         .macro wait_pllblock
-        mov     r4, #PLLBLOCK_TIMEOUT
-1:      sub     r4, r4, #1
-        cmp     r4, #0
+        mov     tmp2, #PLLBLOCK_TIMEOUT
+1:      sub     tmp2, tmp2, #1
+        cmp     tmp2, #0
         beq     2f
-        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
-        tst     r3, #AT91_PMC_LOCKB
+        ldr     tmp1, [pmc, #AT91_PMC_SR]
+        tst     tmp1, #AT91_PMC_LOCKB
         beq     1b
 2:
         .endm
 
         .text
 
+/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
+ *                      void __iomem *ramc1, int memctrl)
+ */
 ENTRY(at91_slow_clock)
         /* Save registers on stack */
-        stmfd   sp!, {r0 - r12, lr}
+        stmfd   sp!, {r4 - r12, lr}
 
         /*
          * Register usage:
-         *  R1 = Base address of AT91_PMC
-         *  R2 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
-         *  R3 = temporary register
+         *  R0 = Base address of AT91_PMC
+         *  R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
+         *  R2 = Base address of second RAM Controller or 0 if not present
+         *  R3 = Memory controller
          *  R4 = temporary register
-         *  R5 = Base address of second RAM Controller or 0 if not present
+         *  R5 = temporary register
          */
-        ldr     r1, .at91_va_base_pmc
-        ldr     r2, .at91_va_base_sdramc
-        ldr     r5, .at91_va_base_ramc1
 
         /* Drain write buffer */
-        mov     r0, #0
-        mcr     p15, 0, r0, c7, c10, 4
+        mov     tmp1, #0
+        mcr     p15, 0, tmp1, c7, c10, 4
+
+        cmp     memctrl, #AT91_MEMCTRL_MC
+        bne     ddr_sr_enable
 
-#ifdef CONFIG_ARCH_AT91RM9200
+        /*
+         * at91rm9200 Memory controller
+         */
         /* Put SDRAM in self-refresh mode */
-        mov     r3, #1
-        str     r3, [r2, #AT91_SDRAMC_SRR]
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+        mov     tmp1, #1
+        str     tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR]
+        b       sdr_sr_done
+
+        /*
+         * DDRSDR Memory controller
+         */
+ddr_sr_enable:
+        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
+        bne     sdr_sr_enable
 
         /* prepare for DDRAM self-refresh mode */
-        ldr     r3, [r2, #AT91_DDRSDRC_LPR]
-        str     r3, .saved_sam9_lpr
-        bic     r3, #AT91_DDRSDRC_LPCB
-        orr     r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+        ldr     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
+        str     tmp1, .saved_sam9_lpr
+        bic     tmp1, #AT91_DDRSDRC_LPCB
+        orr     tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH
 
         /* figure out if we use the second ram controller */
-        cmp     r5, #0
-        ldrne   r4, [r5, #AT91_DDRSDRC_LPR]
-        strne   r4, .saved_sam9_lpr1
-        bicne   r4, #AT91_DDRSDRC_LPCB
-        orrne   r4, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+        cmp     ramc1, #0
+        ldrne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+        strne   tmp2, .saved_sam9_lpr1
+        bicne   tmp2, #AT91_DDRSDRC_LPCB
+        orrne   tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
 
         /* Enable DDRAM self-refresh mode */
-        str     r3, [r2, #AT91_DDRSDRC_LPR]
-        strne   r4, [r5, #AT91_DDRSDRC_LPR]
-#else
+        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
+        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+
+        b       sdr_sr_done
+
+        /*
+         * SDRAMC Memory controller
+         */
+sdr_sr_enable:
         /* Enable SDRAM self-refresh mode */
-        ldr     r3, [r2, #AT91_SDRAMC_LPR]
-        str     r3, .saved_sam9_lpr
+        ldr     tmp1, [sdramc, #AT91_SDRAMC_LPR]
+        str     tmp1, .saved_sam9_lpr
 
-        bic     r3, #AT91_SDRAMC_LPCB
-        orr     r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
-        str     r3, [r2, #AT91_SDRAMC_LPR]
-#endif
+        bic     tmp1, #AT91_SDRAMC_LPCB
+        orr     tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH
+        str     tmp1, [sdramc, #AT91_SDRAMC_LPR]
 
+sdr_sr_done:
         /* Save Master clock setting */
-        ldr     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
-        str     r3, .saved_mckr
+        ldr     tmp1, [pmc, #AT91_PMC_MCKR]
+        str     tmp1, .saved_mckr
 
         /*
          * Set the Master clock source to slow clock
          */
-        bic     r3, r3, #AT91_PMC_CSS
-        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+        bic     tmp1, tmp1, #AT91_PMC_CSS
+        str     tmp1, [pmc, #AT91_PMC_MCKR]
 
         wait_mckrdy
 
@@ -177,61 +193,61 @@ ENTRY(at91_slow_clock)
          *
          * See AT91RM9200 errata #27 and #28 for details.
          */
-        mov     r3, #0
-        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+        mov     tmp1, #0
+        str     tmp1, [pmc, #AT91_PMC_MCKR]
 
         wait_mckrdy
 #endif
 
         /* Save PLLA setting and disable it */
-        ldr     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
-        str     r3, .saved_pllar
+        ldr     tmp1, [pmc, #AT91_CKGR_PLLAR]
+        str     tmp1, .saved_pllar
 
-        mov     r3, #AT91_PMC_PLLCOUNT
-        orr     r3, r3, #(1 << 29)              /* bit 29 always set */
-        str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+        mov     tmp1, #AT91_PMC_PLLCOUNT
+        orr     tmp1, tmp1, #(1 << 29)          /* bit 29 always set */
+        str     tmp1, [pmc, #AT91_CKGR_PLLAR]
 
         /* Save PLLB setting and disable it */
-        ldr     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
-        str     r3, .saved_pllbr
+        ldr     tmp1, [pmc, #AT91_CKGR_PLLBR]
+        str     tmp1, .saved_pllbr
 
-        mov     r3, #AT91_PMC_PLLCOUNT
-        str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+        mov     tmp1, #AT91_PMC_PLLCOUNT
+        str     tmp1, [pmc, #AT91_CKGR_PLLBR]
 
         /* Turn off the main oscillator */
-        ldr     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
-        bic     r3, r3, #AT91_PMC_MOSCEN
-        str     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+        bic     tmp1, tmp1, #AT91_PMC_MOSCEN
+        str     tmp1, [pmc, #AT91_CKGR_MOR]
 
         /* Wait for interrupt */
-        mcr     p15, 0, r0, c7, c0, 4
+        mcr     p15, 0, tmp1, c7, c0, 4
 
         /* Turn on the main oscillator */
-        ldr     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
-        orr     r3, r3, #AT91_PMC_MOSCEN
-        str     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+        orr     tmp1, tmp1, #AT91_PMC_MOSCEN
+        str     tmp1, [pmc, #AT91_CKGR_MOR]
 
         wait_moscrdy
 
         /* Restore PLLB setting */
-        ldr     r3, .saved_pllbr
-        str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+        ldr     tmp1, .saved_pllbr
+        str     tmp1, [pmc, #AT91_CKGR_PLLBR]
 
-        tst     r3, #(AT91_PMC_MUL &  0xff0000)
+        tst     tmp1, #(AT91_PMC_MUL &  0xff0000)
         bne     1f
-        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
+        tst     tmp1, #(AT91_PMC_MUL & ~0xff0000)
         beq     2f
 1:
         wait_pllblock
 2:
 
         /* Restore PLLA setting */
-        ldr     r3, .saved_pllar
-        str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+        ldr     tmp1, .saved_pllar
+        str     tmp1, [pmc, #AT91_CKGR_PLLAR]
 
-        tst     r3, #(AT91_PMC_MUL &  0xff0000)
+        tst     tmp1, #(AT91_PMC_MUL &  0xff0000)
         bne     3f
-        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
+        tst     tmp1, #(AT91_PMC_MUL & ~0xff0000)
         beq     4f
 3:
         wait_pllalock
@@ -244,11 +260,11 @@ ENTRY(at91_slow_clock)
          *
          * See AT91RM9200 errata #27 and #28 for details.
          */
-        ldr     r3, .saved_mckr
-        tst     r3, #AT91_PMC_PRES
+        ldr     tmp1, .saved_mckr
+        tst     tmp1, #AT91_PMC_PRES
         beq     2f
-        and     r3, r3, #AT91_PMC_PRES
-        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+        and     tmp1, tmp1, #AT91_PMC_PRES
+        str     tmp1, [pmc, #AT91_PMC_MCKR]
 
         wait_mckrdy
 #endif
@@ -256,32 +272,45 @@ ENTRY(at91_slow_clock)
         /*
          * Restore master clock setting
          */
-2:      ldr     r3, .saved_mckr
-        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+2:      ldr     tmp1, .saved_mckr
+        str     tmp1, [pmc, #AT91_PMC_MCKR]
 
         wait_mckrdy
 
-#ifdef CONFIG_ARCH_AT91RM9200
-        /* Do nothing - self-refresh is automatically disabled. */
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+        /*
+         * at91rm9200 Memory controller
+         * Do nothing - self-refresh is automatically disabled.
+         */
+        cmp     memctrl, #AT91_MEMCTRL_MC
+        beq     ram_restored
+
+        /*
+         * DDRSDR Memory controller
+         */
+        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
+        bne     sdr_en_restore
         /* Restore LPR on AT91 with DDRAM */
-        ldr     r3, .saved_sam9_lpr
-        str     r3, [r2, #AT91_DDRSDRC_LPR]
+        ldr     tmp1, .saved_sam9_lpr
+        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
 
         /* if we use the second ram controller */
-        cmp     r5, #0
-        ldrne   r4, .saved_sam9_lpr1
-        strne   r4, [r5, #AT91_DDRSDRC_LPR]
+        cmp     ramc1, #0
+        ldrne   tmp2, .saved_sam9_lpr1
+        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+
+        b       ram_restored
 
-#else
+        /*
+         * SDRAMC Memory controller
+         */
+sdr_en_restore:
         /* Restore LPR on AT91 with SDRAM */
-        ldr     r3, .saved_sam9_lpr
-        str     r3, [r2, #AT91_SDRAMC_LPR]
-#endif
+        ldr     tmp1, .saved_sam9_lpr
+        str     tmp1, [sdramc, #AT91_SDRAMC_LPR]
 
+ram_restored:
         /* Restore registers, and return */
-        ldmfd   sp!, {r0 - r12, pc}
+        ldmfd   sp!, {r4 - r12, pc}
 
 
 .saved_mckr:
@@ -299,27 +328,5 @@ ENTRY(at91_slow_clock)
 .saved_sam9_lpr1:
         .word 0
 
-.at91_va_base_pmc:
-        .word AT91_VA_BASE_SYS + AT91_PMC
-
-#ifdef CONFIG_ARCH_AT91RM9200
-.at91_va_base_sdramc:
-        .word AT91_VA_BASE_SYS
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
-.at91_va_base_sdramc:
-        .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
-#else
-.at91_va_base_sdramc:
-        .word AT91_VA_BASE_SYS + AT91_SDRAMC0
-#endif
-
-.at91_va_base_ramc1:
-#if defined(CONFIG_ARCH_AT91SAM9G45)
-        .word AT91_VA_BASE_SYS + AT91_DDRSDRC1
-#else
-        .word 0
-#endif
-
 ENTRY(at91_slow_clock_sz)
         .word .-at91_slow_clock
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 69d3fc4c46f3..372396c2ecb6 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -86,20 +86,6 @@ static void __init soc_detect(u32 dbgu_base)
         socid = cidr & ~AT91_CIDR_VERSION;
 
         switch (socid) {
-        case ARCH_ID_AT91CAP9: {
-#ifdef CONFIG_AT91_PMC_UNIT
-                u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
-
-                if (pmc_ver == ARCH_REVISION_CAP9_B)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
-                else if (pmc_ver == ARCH_REVISION_CAP9_C)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
-#endif
-                at91_soc_initdata.type = AT91_SOC_CAP9;
-                at91_boot_soc = at91cap9_soc;
-                break;
-        }
-
         case ARCH_ID_AT91RM9200:
                 at91_soc_initdata.type = AT91_SOC_RM9200;
                 at91_boot_soc = at91rm9200_soc;
@@ -200,7 +186,6 @@ static void __init soc_detect(u32 dbgu_base)
 
 static const char *soc_name[] = {
         [AT91_SOC_RM9200]       = "at91rm9200",
-        [AT91_SOC_CAP9]         = "at91cap9",
         [AT91_SOC_SAM9260]      = "at91sam9260",
         [AT91_SOC_SAM9261]      = "at91sam9261",
         [AT91_SOC_SAM9263]      = "at91sam9263",
@@ -221,8 +206,6 @@ EXPORT_SYMBOL(at91_get_soc_type);
 static const char *soc_subtype_name[] = {
         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
-        [AT91_SOC_CAP9_REV_B]   = "at91cap9 revB",
-        [AT91_SOC_CAP9_REV_C]   = "at91cap9 revC",
         [AT91_SOC_SAM9XE]       = "at91sam9xe",
         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
         [AT91_SOC_SAM9M10]      = "at91sam9m10",
@@ -293,6 +276,15 @@ void __init at91_ioremap_rstc(u32 base_addr)
                 panic("Impossible to ioremap at91_rstc_base\n");
 }
 
+void __iomem *at91_matrix_base;
+
+void __init at91_ioremap_matrix(u32 base_addr)
+{
+        at91_matrix_base = ioremap(base_addr, 512);
+        if (!at91_matrix_base)
+                panic("Impossible to ioremap at91_matrix_base\n");
+}
+
 void __init at91_initialize(unsigned long main_clock)
 {
         at91_boot_soc.ioremap_registers();
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 4588ae6f7acd..5db4aa45404a 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -13,7 +13,6 @@ struct at91_init_soc {
 };
 
 extern struct at91_init_soc at91_boot_soc;
-extern struct at91_init_soc at91cap9_soc;
 extern struct at91_init_soc at91rm9200_soc;
 extern struct at91_init_soc at91sam9260_soc;
 extern struct at91_init_soc at91sam9261_soc;
@@ -27,10 +26,6 @@ static inline int at91_soc_is_enabled(void)
         return at91_boot_soc.init != NULL;
 }
 
-#if !defined(CONFIG_ARCH_AT91CAP9)
-#define at91cap9_soc    at91_boot_soc
-#endif
-
 #if !defined(CONFIG_ARCH_AT91RM9200)
 #define at91rm9200_soc  at91_boot_soc
 #endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 6b67b7e8426c..22e4e0a28ad1 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,27 +52,8 @@
 #include <mach/csp/chipcHw_inline.h>
 #include <mach/csp/tmrHw_reg.h>
 
-#define AMBA_DEVICE(name, initname, base, plat, size)       \
-static struct amba_device name##_device = {     \
-   .dev = {                                     \
-      .coherent_dma_mask = ~0,                  \
-      .init_name = initname,                    \
-      .platform_data = plat                     \
-   },                                           \
-   .res = {                                     \
-      .start = MM_ADDR_IO_##base,               \
-                .end = MM_ADDR_IO_##base + (size) - 1,    \
-      .flags = IORESOURCE_MEM                   \
-   },                                           \
-   .dma_mask = ~0,                              \
-   .irq = {                                     \
-      IRQ_##base                                \
-   }                                            \
-}
-
-
-AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
-AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
+static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
+static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
 
 static struct clk pll1_clk = {
         .name = "PLL1",
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
deleted file mode 100644
index cb78250db649..000000000000
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index ab1711b9b4d6..8736c1acc166 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd)
 {
         soft_restart(0);
 }
+
+static void clps711x_idle(void)
+{
+        clps_writel(1, HALT);
+        __asm__ __volatile__(
+        "mov    r0, r0\n\
+        mov     r0, r0");
+}
+
+static int __init clps711x_idle_init(void)
+{
+        arm_pm_idle = clps711x_idle;
+        return 0;
+}
+
+arch_initcall(clps711x_idle_init);
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
deleted file mode 100644
index 23d6ef8c84da..000000000000
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/system.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/clps7111.h>
-
-static inline void arch_idle(void)
-{
-        clps_writel(1, HALT);
-        __asm__ __volatile__(
-        "mov    r0, r0\n\
-        mov     r0, r0");
-}
-
-#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
deleted file mode 100644
index 9e56b7dc133a..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright 2000 Deep Blue Solutions Ltd
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
deleted file mode 100644
index fcb7a015aba5..000000000000
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * DaVinci system defines
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/common.h>
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
deleted file mode 100644
index 3027954f6162..000000000000
--- a/arch/arm/mach-dove/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 294aad07f7a0..804c9122b7b3 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = {
         &am79c961_device,
 };
 
+/*
+ * EBSA110 idling methodology:
+ *
+ * We can not execute the "wait for interrupt" instruction since that
+ * will stop our MCLK signal (which provides the clock for the glue
+ * logic, and therefore the timer interrupt).
+ *
+ * Instead, we spin, polling the IRQ_STAT register for the occurrence
+ * of any interrupt with core clock down to the memory clock.
+ */
+static void ebsa110_idle(void)
+{
+        const char *irq_stat = (char *)0xff000000;
+
+        /* disable clock switching */
+        asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
+
+        /* wait for an interrupt to occur */
+        while (!*irq_stat);
+
+        /* enable clock switching */
+        asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
+}
+
 static int __init ebsa110_init(void)
 {
+        arm_pm_idle = ebsa110_idle;
         return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
 }
 
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
deleted file mode 100644
index 2e4af65edb6f..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/system.h
- *
- *  Copyright (C) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-/*
- * EBSA110 idling methodology:
- *
- * We can not execute the "wait for interrupt" instruction since that
- * will stop our MCLK signal (which provides the clock for the glue
- * logic, and therefore the timer interrupt).
- *
- * Instead, we spin, polling the IRQ_STAT register for the occurrence
- * of any interrupt with core clock down to the memory clock.
- */
-static inline void arch_idle(void)
-{
-        const char *irq_stat = (char *)0xff000000;
-
-        /* disable clock switching */
-        asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
-
-        /* wait for an interrupt to occur */
-        while (!*irq_stat);
-
-        /* enable clock switching */
-        asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
-}
-
-#endif
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 24203f9a6796..903edb02fe4f 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
         .set_mctrl      = ep93xx_uart_set_mctrl,
 };
 
-static struct amba_device uart1_device = {
-        .dev            = {
-                .init_name      = "apb:uart1",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART1_PHYS_BASE,
-                .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
-        .periphid       = 0x00041010,
-};
-
-static struct amba_device uart2_device = {
-        .dev            = {
-                .init_name      = "apb:uart2",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART2_PHYS_BASE,
-                .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
-        .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
+        { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
 
-static struct amba_device uart3_device = {
-        .dev            = {
-                .init_name      = "apb:uart3",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART3_PHYS_BASE,
-                .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
-        .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
+        { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
 
+static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
+        { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
 
 static struct resource ep93xx_rtc_resource[] = {
         {
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
deleted file mode 100644
index b5bec7cb9b52..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/system.h
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 6de298c5d2d3..93fa2d532e4a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
         },
 };
 
-static void exynos_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 void exynos4_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init);
 int __init exynos_init(void)
 {
         printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = exynos_idle;
-
         return device_register(&exynos4_dev);
 }
 
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index b10fcd270f07..91370def4a70 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device exynos4_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &exynos4_pdma0_pdata,
-        },
-        .res = {
-                .start = EXYNOS4_PA_PDMA0,
-                .end = EXYNOS4_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
+        {IRQ_PDMA0}, &exynos4_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_PCM0_RX,
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device exynos4_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &exynos4_pdma1_pdata,
-        },
-        .res = {
-                .start = EXYNOS4_PA_PDMA1,
-                .end = EXYNOS4_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
+        {IRQ_PDMA1}, &exynos4_pdma1_pdata);
 
 static int __init exynos4_dma_init(void)
 {
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
 
         dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
-        amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+        amba_device_register(&exynos4_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
-        amba_device_register(&exynos4_device_pdma1, &iomem_resource);
+        amba_device_register(&exynos4_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
deleted file mode 100644
index 0063a6de3dc8..000000000000
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/system.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS4 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
deleted file mode 100644
index a174a5841bc2..000000000000
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-footbridge/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile
index c5b24b95a76e..7355c0bbcb5e 100644
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                   := irq.o mm.o time.o devices.o gpio.o
+obj-y                   := irq.o mm.o time.o devices.o gpio.o idle.o
 
 # Board-specific support
 obj-$(CONFIG_MACH_NAS4220B)     += board-nas4220b.o
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c
new file mode 100644
index 000000000000..92bbd6bb600a
--- /dev/null
+++ b/arch/arm/mach-gemini/idle.c
@@ -0,0 +1,29 @@
+/*
+ * arch/arm/mach-gemini/idle.c
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/proc-fns.h>
+
+static void gemini_idle(void)
+{
+        /*
+         * Because of broken hardware we have to enable interrupts or the CPU
+         * will never wakeup... Acctualy it is not very good to enable
+         * interrupts first since scheduler can miss a tick, but there is
+         * no other way around this. Platforms that needs it for power saving
+         * should call enable_hlt() in init code, since by default it is
+         * disabled.
+         */
+        local_irq_enable();
+        cpu_do_idle();
+}
+
+static int __init gemini_idle_init(void)
+{
+        arm_pm_idle = gemini_idle;
+        return 0;
+}
+
+arch_initcall(gemini_idle_init);
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h
index 4d9c1f872472..a33b5a1f8ab4 100644
--- a/arch/arm/mach-gemini/include/mach/system.h
+++ b/arch/arm/mach-gemini/include/mach/system.h
@@ -14,20 +14,6 @@
 #include <mach/hardware.h>
 #include <mach/global_reg.h>
 
-static inline void arch_idle(void)
-{
-        /*
-         * Because of broken hardware we have to enable interrupts or the CPU
-         * will never wakeup... Acctualy it is not very good to enable
-         * interrupts here since scheduler can miss a tick, but there is
-         * no other way around this. Platforms that needs it for power saving
-         * should call enable_hlt() in init code, since by default it is
-         * disabled.
-         */
-        local_irq_enable();
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         __raw_writel(RESET_GLOBAL | RESET_CPU1,
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 9485a8fdf851..ca70e5fcc7ac 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void)
         unsigned int i, mode = 0, level = 0;
 
         /*
-         * Disable arch_idle() by default since it is buggy
-         * For more info see arch/arm/mach-gemini/include/mach/system.h
+         * Disable the idle handler by default since it is buggy
+         * For more info see arch/arm/mach-gemini/idle.c
          */
         disable_hlt();
 
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index f8a2f6bb5483..e756d1ac00c2 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd)
 {
         CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
 }
+
+static void h720x__idle(void)
+{
+        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
+        nop();
+        nop();
+        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
+        nop();
+        nop();
+}
+
+static int __init h720x_idle_init(void)
+{
+        arm_pm_idle = h720x__idle;
+        return 0;
+}
+
+arch_initcall(h720x_idle_init);
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
deleted file mode 100644
index 16ac46e239aa..000000000000
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/system.h
- *
- * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- * arch/arm/mach-h720x/include/mach/system.h
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <mach/hardware.h>
-
-static void arch_idle(void)
-{
-        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
-        nop();
-        nop();
-        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
-        nop();
-        nop();
-}
-
-#endif
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
deleted file mode 100644
index b1d8b5fbe373..000000000000
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright 2010-2011 Calxeda, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4defb97bbfc8..85433b930045 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -376,6 +376,14 @@ config MACH_IMX27IPCAM
           Include support for IMX27 IPCAM platform. This includes specific
           configurations for the board and its peripherals.
 
+config MACH_IMX27_DT
+        bool "Support i.MX27 platforms from device tree"
+        select SOC_IMX27
+        select USE_OF
+        help
+          Include support for Freescale i.MX27 based platforms
+          using the device tree for discovery
+
 endif
 
 if ARCH_IMX_V6_V7
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 55db9c488f2b..4ffeca7ee25e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
 obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
 obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
 obj-$(CONFIG_MACH_IMX27IPCAM) += mach-imx27ipcam.o
+obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
 
 # i.MX31 based machines
 obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 6dfdbcc83afd..3851d8a27875 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -38,5 +38,8 @@ zreladdr-$(CONFIG_SOC_IMX6Q)	+= 0x10008000
 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
 initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
 
+dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb
+dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \
+                               imx53-qsb.dtb imx53-smd.dtb
 dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
                            imx6q-sabrelite.dtb
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 88fe00a146e3..01ae3a45bd73 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/clkdev.h>
+#include <linux/of.h>
 
 #include <asm/div64.h>
 
@@ -764,3 +765,20 @@ int __init mx27_clocks_init(unsigned long fref)
         return 0;
 }
 
+#ifdef CONFIG_OF
+int __init mx27_clocks_init_dt(void)
+{
+        struct device_node *np;
+        u32 fref = 26000000; /* default */
+
+        for_each_compatible_node(np, NULL, "fixed-clock") {
+                if (!of_device_is_compatible(np, "fsl,imx-osc26m"))
+                        continue;
+
+                if (!of_property_read_u32(np, "clock-frequency", &fref))
+                        break;
+        }
+
+        return mx27_clocks_init(fref);
+}
+#endif
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
new file mode 100644
index 000000000000..861ceb8232d6
--- /dev/null
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/common.h>
+#include <mach/mx27.h>
+
+static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
+        OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
+        { /* sentinel */ }
+};
+
+static int __init imx27_avic_add_irq_domain(struct device_node *np,
+                                struct device_node *interrupt_parent)
+{
+        irq_domain_add_simple(np, 0);
+        return 0;
+}
+
+static int __init imx27_gpio_add_irq_domain(struct device_node *np,
+                                struct device_node *interrupt_parent)
+{
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
+
+        irq_domain_add_simple(np, gpio_irq_base);
+
+        return 0;
+}
+
+static const struct of_device_id imx27_irq_match[] __initconst = {
+        { .compatible = "fsl,imx27-avic", .data = imx27_avic_add_irq_domain, },
+        { .compatible = "fsl,imx27-gpio", .data = imx27_gpio_add_irq_domain, },
+        { /* sentinel */ }
+};
+
+static void __init imx27_dt_init(void)
+{
+        of_irq_init(imx27_irq_match);
+
+        of_platform_populate(NULL, of_default_bus_match_table,
+                             imx27_auxdata_lookup, NULL);
+}
+
+static void __init imx27_timer_init(void)
+{
+        mx27_clocks_init_dt();
+}
+
+static struct sys_timer imx27_timer = {
+        .init = imx27_timer_init,
+};
+
+static const char *imx27_dt_board_compat[] __initdata = {
+        "fsl,imx27",
+        NULL
+};
+
+DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
+        .map_io         = mx27_map_io,
+        .init_early     = imx27_init_early,
+        .init_irq       = mx27_init_irq,
+        .handle_irq     = imx27_handle_irq,
+        .timer          = &imx27_timer,
+        .init_machine   = imx27_dt_init,
+        .dt_compat      = imx27_dt_board_compat,
+        .restart        = mxc_restart,
+MACHINE_END
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index 1e03ef42faa0..5cca573964f0 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -104,6 +104,7 @@ static struct sys_timer imx51_timer = {
 
 static const char *imx51_dt_board_compat[] __initdata = {
         "fsl,imx51-babbage",
+        "fsl,imx51",
         NULL
 };
 
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index fd5be0f20fbb..4172279b3900 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -114,6 +114,7 @@ static const char *imx53_dt_board_compat[] __initdata = {
         "fsl,imx53-evk",
         "fsl,imx53-qsb",
         "fsl,imx53-smd",
+        "fsl,imx53",
         NULL
 };
 
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 6075d4d62dd6..379b1a9cd22b 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -129,6 +129,7 @@ static struct sys_timer imx6q_timer = {
 static const char *imx6q_dt_compat[] __initdata = {
         "fsl,imx6q-arm2",
         "fsl,imx6q-sabrelite",
+        "fsl,imx6q",
         NULL,
 };
 
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 31807d2a8b7b..8404ee72555a 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -34,31 +34,29 @@ static void imx3_idle(void)
 {
         unsigned long reg = 0;
 
-        if (!need_resched())
-                __asm__ __volatile__(
-                        /* disable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "bic %0, %0, #0x00001000\n"
-                        "bic %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        /* invalidate I cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c5, 0\n"
-                        /* clear and invalidate D cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c14, 0\n"
-                        /* WFI */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c0, 4\n"
-                        "nop\n" "nop\n" "nop\n" "nop\n"
-                        "nop\n" "nop\n" "nop\n"
-                        /* enable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "orr %0, %0, #0x00001000\n"
-                        "orr %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        : "=r" (reg));
-        local_irq_enable();
+        __asm__ __volatile__(
+                /* disable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "bic %0, %0, #0x00001000\n"
+                "bic %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                /* invalidate I cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c5, 0\n"
+                /* clear and invalidate D cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c14, 0\n"
+                /* WFI */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c0, 4\n"
+                "nop\n" "nop\n" "nop\n" "nop\n"
+                "nop\n" "nop\n" "nop\n"
+                /* enable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "orr %0, %0, #0x00001000\n"
+                "orr %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                : "=r" (reg));
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
+        arm_pm_idle = imx3_idle;
 }
 
 void __init mx31_init_irq(void)
@@ -197,7 +195,7 @@ void __init imx35_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX35);
         mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
+        arm_pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }
 
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index bc17dfea3817..49549a72dc7d 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
 
 static void imx5_idle(void)
 {
-        if (!need_resched()) {
-                /* gpc clock is needed for SRPG */
-                if (gpc_dvfs_clk == NULL) {
-                        gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
-                        if (IS_ERR(gpc_dvfs_clk))
-                                goto err0;
-                }
-                clk_enable(gpc_dvfs_clk);
-                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
-                if (tzic_enable_wake())
-                        goto err1;
-                cpu_do_idle();
-err1:
-                clk_disable(gpc_dvfs_clk);
+        /* gpc clock is needed for SRPG */
+        if (gpc_dvfs_clk == NULL) {
+                gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
+                if (IS_ERR(gpc_dvfs_clk))
+                        return;
         }
-err0:
-        local_irq_enable();
+        clk_enable(gpc_dvfs_clk);
+        mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        if (tzic_enable_wake() != 0)
+                cpu_do_idle();
+        clk_disable(gpc_dvfs_clk);
 }
 
 /*
@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX51);
         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-        pm_idle = imx5_idle;
+        arm_pm_idle = imx5_idle;
 }
 
 void __init imx53_init_early(void)
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index e455d2f855bf..6fcffa7db978 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,6 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 #include <mach/hardware.h>
 
 static int mx27_suspend_enter(suspend_state_t state)
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
                 cscr &= 0xFFFFFFFC;
                 __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
                 /* Executes WFI */
-                arch_idle();
+                cpu_do_idle();
                 break;
 
         default:
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 019f0ab08f66..15b87f26ac96 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -35,67 +35,23 @@
 
 static struct amba_pl010_data integrator_uart_data;
 
-static struct amba_device rtc_device = {
-        .dev            = {
-                .init_name = "mb:15",
-        },
-        .res            = {
-                .start  = INTEGRATOR_RTC_BASE,
-                .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_RTCINT, NO_IRQ },
-};
+#define INTEGRATOR_RTC_IRQ      { IRQ_RTCINT }
+#define INTEGRATOR_UART0_IRQ    { IRQ_UARTINT0 }
+#define INTEGRATOR_UART1_IRQ    { IRQ_UARTINT1 }
+#define KMI0_IRQ                { IRQ_KMIINT0 }
+#define KMI1_IRQ                { IRQ_KMIINT1 }
 
-static struct amba_device uart0_device = {
-        .dev            = {
-                .init_name = "mb:16",
-                .platform_data = &integrator_uart_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_UART0_BASE,
-                .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_UARTINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(rtc, "mb:15", 0,
+        INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 
-static struct amba_device uart1_device = {
-        .dev            = {
-                .init_name = "mb:17",
-                .platform_data = &integrator_uart_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_UART1_BASE,
-                .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_UARTINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart0, "mb:16", 0,
+        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi0_device = {
-        .dev            = {
-                .init_name = "mb:18",
-        },
-        .res            = {
-                .start  = KMI0_BASE,
-                .end    = KMI0_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_KMIINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart1, "mb:17", 0,
+        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi1_device = {
-        .dev            = {
-                .init_name = "mb:19",
-        },
-        .res            = {
-                .start  = KMI1_BASE,
-                .end    = KMI1_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_KMIINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL);
+static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &rtc_device,
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 8cbb75a96bd4..3e538da6cb1f 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
 
                 pc_base = dev->resource.start + idev->offset;
 
-                d = kzalloc(sizeof(struct amba_device), GFP_KERNEL);
+                d = amba_device_alloc(NULL, pc_base, SZ_4K);
                 if (!d)
                         continue;
 
                 dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
                 d->dev.parent   = &dev->dev;
-                d->res.start    = dev->resource.start + idev->offset;
-                d->res.end      = d->res.start + SZ_4K - 1;
-                d->res.flags    = IORESOURCE_MEM;
                 d->irq[0]       = dev->irq;
                 d->irq[1]       = dev->irq;
                 d->periphid     = idev->id;
                 d->dev.platform_data = idev->platform_data;
 
-                ret = amba_device_register(d, &dev->resource);
+                ret = amba_device_add(d, &dev->resource);
                 if (ret) {
                         dev_err(&d->dev, "unable to register device: %d\n", ret);
-                        kfree(d);
+                        amba_device_put(d);
                 }
         }
 
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
deleted file mode 100644
index 901514eba4a6..000000000000
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/system.h
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a8b6aa6003f3..be9ead4a3bcc 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
         .gpio_cd        = -1,
 };
 
-static struct amba_device mmc_device = {
-        .dev            = {
-                .init_name = "mb:1c",
-                .platform_data = &mmc_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_CP_MMC_BASE,
-                .end    = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
-        .periphid       = 0,
-};
+#define INTEGRATOR_CP_MMC_IRQS  { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
+#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
 
-static struct amba_device aaci_device = {
-        .dev            = {
-                .init_name = "mb:1d",
-        },
-        .res            = {
-                .start  = INTEGRATOR_CP_AACI_BASE,
-                .end    = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_CP_AACIINT, NO_IRQ },
-        .periphid       = 0,
-};
+static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE,
+        INTEGRATOR_CP_MMC_IRQS, &mmc_data);
+
+static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
+        INTEGRATOR_CP_AACI_IRQS, NULL);
 
 
 /*
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
         .remove         = versatile_clcd_remove_dma,
 };
 
-static struct amba_device clcd_device = {
-        .dev            = {
-                .init_name = "mb:c0",
-                .coherent_dma_mask = ~0,
-                .platform_data = &clcd_data,
-        },
-        .res            = {
-                .start  = INTCP_PA_CLCD_BASE,
-                .end    = INTCP_PA_CLCD_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .dma_mask       = ~0,
-        .irq            = { IRQ_CP_CLCDCINT, NO_IRQ },
-        .periphid       = 0,
-};
+static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE,
+        { IRQ_CP_CLCDCINT }, &clcd_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &mmc_device,
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
deleted file mode 100644
index 1f31ed3f8ae2..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop13xx/include/mach/system.h
- *
- *  Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
deleted file mode 100644
index 4a88727bca98..000000000000
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
deleted file mode 100644
index 4f98e765397c..000000000000
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
deleted file mode 100644
index a7fb08b2b8e7..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corp.
- * Copyricht (C) 2003-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 0923bb905cc0..7c1495e4fe7a 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
 
 void __init ixp23xx_sys_init(void)
 {
+        /* by default, the idle code is disabled */
+        disable_hlt();
+
         *IXP23XX_EXP_UNIT_FUSE |= 0xf;
         platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
 }
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
deleted file mode 100644
index 277dda7334b9..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/system.h
- *
- * Copyright (C) 2003 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-#if 0
-        if (!hlt_counter)
-                cpu_do_idle();
-#endif
-}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 3841ab4146ba..a6329a0a8ec4 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void)
 {
         int i = 0;
 
+        /*
+         * ixp4xx does not implement the XScale PWRMODE register
+         * so it must not call cpu_do_idle().
+         */
+        disable_hlt();
+
         /* Route all sources to IRQ instead of FIQ */
         *IXP4XX_ICLR = 0x0;
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
deleted file mode 100644
index 140a9bef4466..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-static inline void arch_idle(void)
-{
-        /* ixp4xx does not implement the XScale PWRMODE register,
-         * so it must not call cpu_do_idle() here.
-         */
-#if 0
-        cpu_do_idle();
-#endif
-}
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
deleted file mode 100644
index 5fddde002b5e..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
deleted file mode 100644
index 59fe992395bf..000000000000
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (C) 2006 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * KS8695 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks,
-         */
-        cpu_do_idle();
-
-}
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
index 2667f52e3b04..9e3b90df32e1 100644
--- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
+++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
@@ -61,7 +61,7 @@
  */
 #define IRQ_LPC32XX_JTAG_COMM_TX        LPC32XX_SIC1_IRQ(1)
 #define IRQ_LPC32XX_JTAG_COMM_RX        LPC32XX_SIC1_IRQ(2)
-#define IRQ_LPC32XX_GPI_11              LPC32XX_SIC1_IRQ(4)
+#define IRQ_LPC32XX_GPI_28              LPC32XX_SIC1_IRQ(4)
 #define IRQ_LPC32XX_TS_P                LPC32XX_SIC1_IRQ(6)
 #define IRQ_LPC32XX_TS_IRQ              LPC32XX_SIC1_IRQ(7)
 #define IRQ_LPC32XX_TS_AUX              LPC32XX_SIC1_IRQ(8)
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
deleted file mode 100644
index bf176c991520..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/system.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 4eae566dfdc7..c74de01ab5b6 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
                 .event_group = &lpc32xx_event_pin_regs,
                 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
         },
+        [IRQ_LPC32XX_GPI_28] = {
+                .event_group = &lpc32xx_event_pin_regs,
+                .mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
+        },
         [IRQ_LPC32XX_GPIO_00] = {
                 .event_group = &lpc32xx_event_int_regs,
                 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
@@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
 
                 if (state)
                         eventreg |= lpc32xx_events[d->irq].mask;
-                else
+                else {
                         eventreg &= ~lpc32xx_events[d->irq].mask;
 
+                        /*
+                         * When disabling the wakeup, clear the latched
+                         * event
+                         */
+                        __raw_writel(lpc32xx_events[d->irq].mask,
+                                lpc32xx_events[d->irq].
+                                event_group->rawstat_reg);
+                }
+
                 __raw_writel(eventreg,
                         lpc32xx_events[d->irq].event_group->enab_reg);
 
@@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
 
         /* Setup SIC1 */
         __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
-        __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
-        __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
+        __raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
+        __raw_writel(SIC1_ATR_DEFAULT,
+                                LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
 
         /* Setup SIC2 */
         __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
-        __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
-        __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
+        __raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
+        __raw_writel(SIC2_ATR_DEFAULT,
+                                LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
 
         /* Configure supported IRQ's */
         for (i = 0; i < NR_IRQS; i++) {
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index bfee5b455105..5d51c102c255 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
         .remove         = lpc32xx_clcd_remove,
 };
 
-static struct amba_device lpc32xx_clcd_device = {
-        .dev                            = {
-                .coherent_dma_mask      = ~0,
-                .init_name              = "dev:clcd",
-                .platform_data          = &lpc32xx_clcd_data,
-        },
-        .res                            = {
-                .start                  = LPC32XX_LCD_BASE,
-                .end                    = (LPC32XX_LCD_BASE + SZ_4K - 1),
-                .flags                  = IORESOURCE_MEM,
-        },
-        .dma_mask                       = ~0,
-        .irq                            = {IRQ_LPC32XX_LCD, NO_IRQ},
-};
+static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
+        LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
 
 /*
  * AMBA SSP (SPI)
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
         .enable_dma             = 0,
 };
 
-static struct amba_device lpc32xx_ssp0_device = {
-        .dev                            = {
-                .coherent_dma_mask      = ~0,
-                .init_name              = "dev:ssp0",
-                .platform_data          = &lpc32xx_ssp0_data,
-        },
-        .res                            = {
-                .start                  = LPC32XX_SSP0_BASE,
-                .end                    = (LPC32XX_SSP0_BASE + SZ_4K - 1),
-                .flags                  = IORESOURCE_MEM,
-        },
-        .dma_mask                       = ~0,
-        .irq                            = {IRQ_LPC32XX_SSP0, NO_IRQ},
-};
+static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
+        LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
 
 /* AT25 driver registration */
 static int __init phy3250_spi_board_register(void)
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c
index 429cfdbb2b3d..f2735281616a 100644
--- a/arch/arm/mach-lpc32xx/serial.c
+++ b/arch/arm/mach-lpc32xx/serial.c
@@ -88,6 +88,7 @@ struct uartinit {
         char *uart_ck_name;
         u32 ck_mode_mask;
         void __iomem *pdiv_clk_reg;
+        resource_size_t mapbase;
 };
 
 static struct uartinit uartinit_data[] __initdata = {
@@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
                 .ck_mode_mask =
                         LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
                 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
+                .mapbase = LPC32XX_UART5_BASE,
         },
 #endif
 #ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
@@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
                 .ck_mode_mask =
                         LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
                 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
+                .mapbase = LPC32XX_UART3_BASE,
         },
 #endif
 #ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
@@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
                 .ck_mode_mask =
                         LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
                 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
+                .mapbase = LPC32XX_UART4_BASE,
         },
 #endif
 #ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
@@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
                 .ck_mode_mask =
                         LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
                 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
+                .mapbase = LPC32XX_UART6_BASE,
         },
 #endif
 };
@@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
 
                 /* pre-UART clock divider set to 1 */
                 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
+
+                /*
+                 * Force a flush of the RX FIFOs to work around a
+                 * HW bug
+                 */
+                puart = uartinit_data[i].mapbase;
+                __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
+                __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
+                j = LPC32XX_SUART_FIFO_SIZE;
+                while (j--)
+                        tmp = __raw_readl(
+                                LPC32XX_UART_DLL_FIFO(puart));
+                __raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
         }
 
         /* This needs to be done after all UART clocks are setup */
         __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
-        for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
+        for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
                 /* Force a flush of the RX FIFOs to work around a HW bug */
                 puart = serial_std_platform_data[i].mapbase;
                 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 323d4c9e9f44..5a90b9a3ab6e 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -2,6 +2,16 @@ if ARCH_MMP
 
 menu "Marvell PXA168/910/MMP2 Implmentations"
 
+config MACH_MMP_DT
+        bool "Support MMP2 platforms from device tree"
+        select CPU_PXA168
+        select CPU_PXA910
+        select USE_OF
+        help
+          Include support for Marvell MMP2 based platforms using
+          the device tree. Needn't select any other machine while
+          MACH_MMP_DT is enabled.
+
 config MACH_ASPENITE
         bool "Marvell's PXA168 Aspenite Development Board"
         select CPU_PXA168
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index ba254a71691a..4fc0ff5dc96d 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -18,5 +18,6 @@ obj-$(CONFIG_MACH_TTC_DKB)	+= ttc_dkb.o
 obj-$(CONFIG_MACH_BROWNSTONE)   += brownstone.o
 obj-$(CONFIG_MACH_FLINT)        += flint.o
 obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
+obj-$(CONFIG_MACH_MMP_DT)       += mmp-dt.o
 obj-$(CONFIG_MACH_TETON_BGA)    += teton_bga.o
 obj-$(CONFIG_MACH_GPLUGD)       += gplugd.o
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 17cb76060125..3588a5584153 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,7 +17,6 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand.h>
 #include <linux/interrupt.h>
-#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
deleted file mode 100644
index 1d001eab81e1..000000000000
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/system.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_SYSTEM_H
-#define __ASM_MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c
new file mode 100644
index 000000000000..67075395e400
--- /dev/null
+++ b/arch/arm/mach-mmp/mmp-dt.c
@@ -0,0 +1,75 @@
+/*
+ *  linux/arch/arm/mach-mmp/mmp-dt.c
+ *
+ *  Copyright (C) 2012 Marvell Technology Group Ltd.
+ *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <mach/irqs.h>
+
+#include "common.h"
+
+extern struct sys_timer pxa168_timer;
+extern void __init icu_init_irq(void);
+
+static const struct of_dev_auxdata mmp_auxdata_lookup[] __initconst = {
+        OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-gpio", 0xd4019000, "pxa-gpio", NULL),
+        OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
+        {}
+};
+
+static int __init mmp_intc_add_irq_domain(struct device_node *np,
+                                           struct device_node *parent)
+{
+        irq_domain_add_simple(np, 0);
+        return 0;
+}
+
+static int __init mmp_gpio_add_irq_domain(struct device_node *np,
+                                           struct device_node *parent)
+{
+        irq_domain_add_simple(np, IRQ_GPIO_START);
+        return 0;
+}
+
+static const struct of_device_id mmp_irq_match[] __initconst = {
+        { .compatible = "mrvl,mmp-intc", .data = mmp_intc_add_irq_domain, },
+        { .compatible = "mrvl,mmp-gpio", .data = mmp_gpio_add_irq_domain, },
+        {}
+};
+
+static void __init mmp_dt_init(void)
+{
+
+        of_irq_init(mmp_irq_match);
+
+        of_platform_populate(NULL, of_default_bus_match_table,
+                             mmp_auxdata_lookup, NULL);
+}
+
+static const char *pxa168_dt_board_compat[] __initdata = {
+        "mrvl,pxa168-aspenite",
+        NULL,
+};
+
+DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
+        .map_io         = mmp_map_io,
+        .init_irq       = icu_init_irq,
+        .timer          = &pxa168_timer,
+        .init_machine   = mmp_dt_init,
+        .dt_compat      = pxa168_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 7bc17eaa12eb..e3d3533a5a3b 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -24,7 +24,6 @@
 #include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
-#include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <mach/pxa168.h>
 
@@ -65,6 +64,7 @@ static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
 static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
 static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
 static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
+static APBC_CLK(rtc, PXA168_RTC, 8, 32768);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(lcd, LCD, 0x7f, 312000000);
@@ -93,6 +93,7 @@ static struct clk_lookup pxa168_clkregs[] = {
         INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
         INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
         INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
+        INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
 };
 
 static int __init pxa168_init(void)
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 8e3b5af04a57..bc97170125bf 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/smc91x.h>
-#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
deleted file mode 100644
index 6a94f0527137..000000000000
--- a/arch/arm/mach-msm/idle.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/idle.S
- *
- * Idle processing for MSM7K - work around bugs with SWFI.
- *
- * Copyright (c) 2007 QUALCOMM Incorporated.
- * Copyright (C) 2007 Google, Inc. 
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */ 
-                
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-ENTRY(arch_idle)
-#ifdef CONFIG_MSM7X00A_IDLE
-        mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */
-        bic     r0, r1, #(1 << 2)        /* clear dcache bit   */
-        bic     r0, r0, #(1 << 12)       /* clear icache bit   */
-        mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */
-
-        mov     r0, #0                   /* prepare wfi value  */
-        mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */
-        mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */
-        mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */
-
-        mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */
-#endif
-        mov     pc, lr
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c
new file mode 100644
index 000000000000..0c9e13c65743
--- /dev/null
+++ b/arch/arm/mach-msm/idle.c
@@ -0,0 +1,49 @@
+/* arch/arm/mach-msm/idle.c
+ *
+ * Idle processing for MSM7K - work around bugs with SWFI.
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated.
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+
+static void msm_idle(void)
+{
+#ifdef CONFIG_MSM7X00A_IDLE
+        asm volatile (
+
+        "mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */ \n\t"
+        "bic     r0, r1, #(1 << 2)        /* clear dcache bit   */ \n\t"
+        "bic     r0, r0, #(1 << 12)       /* clear icache bit   */ \n\t"
+        "mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */ \n\t"
+
+        "mov     r0, #0                   /* prepare wfi value  */ \n\t"
+        "mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */ \n\t"
+        "mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */ \n\t"
+        "mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */ \n\t"
+
+        "mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */ \n\t"
+
+        : : : "r0","r1" );
+#endif
+}
+
+static int __init msm_idle_init(void)
+{
+        arm_pm_idle = msm_idle;
+        return 0;
+}
+
+arch_initcall(msm_idle_init);
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index 311db2b35da0..f5fb2ec87ffe 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,7 +12,6 @@
  * GNU General Public License for more details.
  *
  */
-void arch_idle(void);
 
 /* low level hardware reset hook -- for example, hitting the
  * PSHOLD line on the PMIC to hard reset the system
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
deleted file mode 100644
index 8c3a5387cec7..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
index fe3e847930c9..01faffec3064 100644
--- a/arch/arm/mach-mxs/devices.c
+++ b/arch/arm/mach-mxs/devices.c
@@ -77,16 +77,18 @@ err:
 
 int __init mxs_add_amba_device(const struct amba_device *dev)
 {
-        struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL);
+        struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
+                dev->res.start, resource_size(&dev->res));
 
         if (!adev) {
                 pr_err("%s: failed to allocate memory", __func__);
                 return -ENOMEM;
         }
 
-        *adev = *dev;
+        adev->irq[0] = dev->irq[0];
+        adev->irq[1] = dev->irq[1];
 
-        return amba_device_register(adev, &iomem_resource);
+        return amba_device_add(adev, &iomem_resource);
 }
 
 struct device mxs_apbh_bus = {
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c
index a559db09b49c..a5479f766046 100644
--- a/arch/arm/mach-mxs/devices/amba-duart.c
+++ b/arch/arm/mach-mxs/devices/amba-duart.c
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = {		\
                 .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1,   \
                 .flags = IORESOURCE_MEM,                        \
         },                                                      \
-        .irq = {soc ## _INT_DUART, NO_IRQ},                     \
+        .irq = {soc ## _INT_DUART},                             \
 }
 
 #ifdef CONFIG_SOC_IMX23
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
deleted file mode 100644
index e7ad1bb29423..000000000000
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *  Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_MXS_SYSTEM_H__
-#define __MACH_MXS_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c
index fb042da29bda..a9b4bbcdafb4 100644
--- a/arch/arm/mach-mxs/pm.c
+++ b/arch/arm/mach-mxs/pm.c
@@ -15,13 +15,12 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 
 static int mxs_suspend_enter(suspend_state_t state)
 {
         switch (state) {
         case PM_SUSPEND_MEM:
-                arch_idle();
+                cpu_do_idle();
                 break;
 
         default:
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index b9913234bbf6..2cdf6ef69bee 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
 {
 }
 
-static struct amba_device fb_device = {
-        .dev            = {
-                .init_name = "fb",
-                .coherent_dma_mask = ~0,
-        },
-        .res            = {
-                .start  = 0x00104000,
-                .end    = 0x00104fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { NETX_IRQ_LCD, NO_IRQ },
-};
+static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL);
 
 int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
 {
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
deleted file mode 100644
index b38fa36d58c4..000000000000
--- a/arch/arm/mach-netx/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-netx/include/mach/system.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
-
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 7c878bf00340..f6f74adbe8c4 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
 #endif
 }
 
-#define __MEM_4K_RESOURCE(x) \
-        .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
+static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE,
+        { IRQ_UART0 }, NULL);
 
-static struct amba_device uart0_device = {
-        .dev = { .init_name = "uart0" },
-        __MEM_4K_RESOURCE(NOMADIK_UART0_BASE),
-        .irq = {IRQ_UART0, NO_IRQ},
-};
-
-static struct amba_device uart1_device = {
-        .dev = { .init_name = "uart1" },
-        __MEM_4K_RESOURCE(NOMADIK_UART1_BASE),
-        .irq = {IRQ_UART1, NO_IRQ},
-};
+static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE,
+        { IRQ_UART1 }, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart0_device,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 65df7b4fdd3e..27f43a46985e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
         GPIO_DEVICE(3),
 };
 
-static struct amba_device cpu8815_amba_rng = {
-        .dev = {
-                .init_name = "rng",
-        },
-        __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
-};
+static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL);
 
 static struct platform_device *platform_devs[] __initdata = {
         cpu8815_platform_gpio + 0,
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
 };
 
 static struct amba_device *amba_devs[] __initdata = {
-        &cpu8815_amba_rng
+        &cpu8815_amba_rng_device
 };
 
 static int __init cpu8815_init(void)
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
deleted file mode 100644
index 25e198b8976c..000000000000
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- *  mach-nomadik/include/mach/system.h
- *
- *  Copyright (C) 2008 STMicroelectronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 309369ea6978..be2002f42dea 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -416,13 +416,13 @@ static void __init innovator_init(void)
 #ifdef CONFIG_ARCH_OMAP15XX
         if (cpu_is_omap1510()) {
                 omap1_usb_init(&innovator1510_usb_config);
-                innovator_config[1].data = &innovator1510_lcd_config;
+                innovator_config[0].data = &innovator1510_lcd_config;
         }
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
         if (cpu_is_omap1610()) {
                 omap1_usb_init(&h2_usb_config);
-                innovator_config[1].data = &innovator1610_lcd_config;
+                innovator_config[0].data = &innovator1610_lcd_config;
         }
 #endif
         omap_board_config = innovator_config;
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h
deleted file mode 100644
index a6c1b3a16dfc..000000000000
--- a/arch/arm/mach-omap1/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/system.h
- */
-
-#include <plat/system.h>
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 89ea20ca0ccc..0c2c3669d594 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -42,9 +42,9 @@
 #include <linux/sysfs.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/atomic.h>
 
 #include <asm/irq.h>
-#include <linux/atomic.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
@@ -108,13 +108,7 @@ void omap1_pm_idle(void)
         __u32 use_idlect1 = arm_idlect1_mask;
         int do_sleep = 0;
 
-        local_irq_disable();
         local_fiq_disable();
-        if (need_resched()) {
-                local_fiq_enable();
-                local_irq_enable();
-                return;
-        }
 
 #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)
 #warning Enable 32kHz OS timer in order to allow sleep states in idle
@@ -157,14 +151,12 @@ void omap1_pm_idle(void)
                 omap_writel(saved_idlect1, ARM_IDLECT1);
 
                 local_fiq_enable();
-                local_irq_enable();
                 return;
         }
         omap_sram_suspend(omap_readl(ARM_IDLECT1),
                           omap_readl(ARM_IDLECT2));
 
         local_fiq_enable();
-        local_irq_enable();
 }
 
 /*
@@ -583,8 +575,6 @@ static void omap_pm_init_proc(void)
 
 #endif /* DEBUG && CONFIG_PROC_FS */
 
-static void (*saved_idle)(void) = NULL;
-
 /*
  *      omap_pm_prepare - Do preliminary suspend work.
  *
@@ -592,8 +582,7 @@ static void (*saved_idle)(void) = NULL;
 static int omap_pm_prepare(void)
 {
         /* We cannot sleep in idle until we have resumed */
-        saved_idle = pm_idle;
-        pm_idle = NULL;
+        disable_hlt();
 
         return 0;
 }
@@ -630,7 +619,7 @@ static int omap_pm_enter(suspend_state_t state)
 
 static void omap_pm_finish(void)
 {
-        pm_idle = saved_idle;
+        enable_hlt();
 }
 
 
@@ -687,7 +676,7 @@ static int __init omap_pm_init(void)
                 return -ENODEV;
         }
 
-        pm_idle = omap1_pm_idle;
+        arm_pm_idle = omap1_pm_idle;
 
         if (cpu_is_omap7xx())
                 setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 72ce50ecf328..3fdfaeb4ce20 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -363,8 +363,8 @@ config OMAP3_SDRC_AC_TIMING
           going on could result in system crashes;
 
 config OMAP4_ERRATA_I688
-        bool "OMAP4 errata: Async Bridge Corruption (BROKEN)"
-        depends on ARCH_OMAP4 && BROKEN
+        bool "OMAP4 errata: Async Bridge Corruption"
+        depends on ARCH_OMAP4
         select ARCH_HAS_BARRIERS
         help
           If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 42a4d11fad23..672262717601 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
         else
                 *openp = 0;
 
+#ifdef CONFIG_MMC_OMAP
         omap_mmc_notify_cover_event(mmc_device, index, *openp);
+#else
+        pr_warn("MMC: notify cover event not available\n");
+#endif
 }
 
 static int n8x0_mmc_late_init(struct device *dev)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c775bead1497..c877236a8442 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
         gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
 
         /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
-        gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+        gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
 
         platform_device_register(&leds_gpio);
 
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index dd8c9906b1ab..99604d364305 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -132,6 +132,7 @@ void omap3_map_io(void);
 void am33xx_map_io(void);
 void omap4_map_io(void);
 void ti81xx_map_io(void);
+void omap_barriers_init(void);
 
 /**
  * omap_test_timeout - busy-loop, testing a condition
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index cfdbb86bc84e..72e018b9b260 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
         struct timespec ts_preidle, ts_postidle, ts_idle;
         u32 cpu1_state;
         int idle_time;
-        int new_state_idx;
         int cpu_id = smp_processor_id();
 
         /* Used to keep track of the total time in idle */
@@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
          */
         cpu1_state = pwrdm_read_pwrst(cpu1_pd);
         if (cpu1_state != PWRDM_POWER_OFF) {
-                new_state_idx = drv->safe_state_index;
-                cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
+                index = drv->safe_state_index;
+                cx = cpuidle_get_statedata(&dev->states_usage[index]);
         }
 
         if (index > 0)
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e290ccb..ce91aad4cdad 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin");
 #define ETB_BASE        (L4_EMU_34XX_PHYS + 0x1b000)
 #define DAPCTL          (L4_EMU_34XX_PHYS + 0x1d000)
 
-static struct amba_device omap3_etb_device = {
-        .dev            = {
-                .init_name = "etb",
-        },
-        .res            = {
-                .start  = ETB_BASE,
-                .end    = ETB_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .periphid       = 0x000bb907,
-};
-
-static struct amba_device omap3_etm_device = {
-        .dev            = {
-                .init_name = "etm",
-        },
-        .res            = {
-                .start  = ETM_BASE,
-                .end    = ETM_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .periphid       = 0x102bb921,
-};
+static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL);
+static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL);
 
 static int __init emu_init(void)
 {
@@ -66,4 +45,3 @@ static int __init emu_init(void)
 }
 
 subsys_initcall(emu_init);
-
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 997033129d26..bbb870c04a5e 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,6 +19,8 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/smsc911x.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
 
 #include <plat/board.h>
 #include <plat/gpmc.h>
@@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
         .flags          = SMSC911X_USE_16BIT,
 };
 
+static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
+/* Generic regulator definition to satisfy smsc911x */
+static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
+        .constraints = {
+                .min_uV                 = 3300000,
+                .max_uV                 = 3300000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(gpmc_smsc911x_supply),
+        .consumer_supplies      = gpmc_smsc911x_supply,
+};
+
+static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
+        .supply_name            = "gpmc_smsc911x",
+        .microvolts             = 3300000,
+        .gpio                   = -EINVAL,
+        .startup_delay          = 0,
+        .enable_high            = 0,
+        .enabled_at_boot        = 1,
+        .init_data              = &gpmc_smsc911x_reg_init_data,
+};
+
+/*
+ * Platform device id of 42 is a temporary fix to avoid conflicts
+ * with other reg-fixed-voltage devices. The real fix should
+ * involve the driver core providing a way of dynamically
+ * assigning a unique id on registration for platform devices
+ * in the same name space.
+ */
+static struct platform_device gpmc_smsc911x_regulator = {
+        .name           = "reg-fixed-voltage",
+        .id             = 42,
+        .dev = {
+                .platform_data  = &gpmc_smsc911x_fixed_reg_data,
+        },
+};
+
 /*
  * Initialize smsc911x device connected to the GPMC. Note that we
  * assume that pin multiplexing is done in the board-*.c file,
@@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
 
         gpmc_cfg = board_data;
 
+        ret = platform_device_register(&gpmc_smsc911x_regulator);
+        if (ret < 0) {
+                pr_err("Unable to register smsc911x regulators: %d\n", ret);
+                return;
+        }
+
         if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
                 pr_err("Failed to request GPMC mem region\n");
                 return;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index b40c28895298..19dd1657245c 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
         return 0;
 }
 
+static int omap_hsmmc_done;
 #define MAX_OMAP_MMC_HWMOD_NAME_LEN             16
 
 void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
@@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
 {
         u32 reg;
 
+        if (omap_hsmmc_done)
+                return;
+
+        omap_hsmmc_done = 1;
+
         if (!cpu_is_omap44xx()) {
                 if (cpu_is_omap2430()) {
                         control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h
deleted file mode 100644
index d488721ab90b..000000000000
--- a/arch/arm/mach-omap2/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/system.h
- */
-
-#include <plat/system.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index eb50c29fb644..fb11b44fbdec 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
 void __init omap44xx_map_common_io(void)
 {
         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
+        omap_barriers_init();
 }
 #endif
 
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 609ea2ded7e3..2cc1aa004b94 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
         .ops    = &omap2_mbox_ops,
         .priv   = &omap2_mbox_iva_priv,
 };
+#endif
 
-struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
+#ifdef CONFIG_ARCH_OMAP2
+struct omap_mbox *omap2_mboxes[] = {
+        &mbox_dsp_info,
+#ifdef CONFIG_SOC_OMAP2420
+        &mbox_iva_info,
+#endif
+        NULL
+};
 #endif
 
 #if defined(CONFIG_ARCH_OMAP4)
@@ -412,7 +420,8 @@ static void __exit omap2_mbox_exit(void)
         platform_driver_unregister(&omap2_mbox_driver);
 }
 
-module_init(omap2_mbox_init);
+/* must be ready before omap3isp is probed */
+subsys_initcall(omap2_mbox_init);
 module_exit(omap2_mbox_exit);
 
 MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fb8bc9fa43b1..611a0e3d54ca 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
         return -ENODEV;
 }
 
-static int __init
+static int
 omap_mux_get_by_name(const char *muxname,
                         struct omap_mux_partition **found_partition,
                         struct omap_mux **found_mux)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 40a8fbc07e4b..ebc595091312 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,6 +24,7 @@
 
 #include <plat/irqs.h>
 #include <plat/sram.h>
+#include <plat/omap-secure.h>
 
 #include <mach/hardware.h>
 #include <mach/omap-wakeupgen.h>
@@ -43,6 +44,9 @@ static void __iomem *sar_ram_base;
 
 void __iomem *dram_sync, *sram_sync;
 
+static phys_addr_t paddr;
+static u32 size;
+
 void omap_bus_sync(void)
 {
         if (dram_sync && sram_sync) {
@@ -52,18 +56,20 @@ void omap_bus_sync(void)
         }
 }
 
-static int __init omap_barriers_init(void)
+/* Steal one page physical memory for barrier implementation */
+int __init omap_barrier_reserve_memblock(void)
 {
-        struct map_desc dram_io_desc[1];
-        phys_addr_t paddr;
-        u32 size;
-
-        if (!cpu_is_omap44xx())
-                return -ENODEV;
 
         size = ALIGN(PAGE_SIZE, SZ_1M);
         paddr = arm_memblock_steal(size, SZ_1M);
 
+        return 0;
+}
+
+void __init omap_barriers_init(void)
+{
+        struct map_desc dram_io_desc[1];
+
         dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
         dram_io_desc[0].pfn = __phys_to_pfn(paddr);
         dram_io_desc[0].length = size;
@@ -75,9 +81,10 @@ static int __init omap_barriers_init(void)
         pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
                 (long long) paddr, dram_io_desc[0].virtual);
 
-        return 0;
 }
-core_initcall(omap_barriers_init);
+#else
+void __init omap_barriers_init(void)
+{}
 #endif
 
 void __init gic_init_irq(void)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index ad4f69394166..44551edd8351 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
         freq = clk->rate;
         clk_put(clk);
 
+        rcu_read_lock();
         opp = opp_find_freq_ceil(dev, &freq);
         if (IS_ERR(opp)) {
+                rcu_read_unlock();
                 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
                         __func__, vdd_name);
                 goto exit;
         }
 
         bootup_volt = opp_get_voltage(opp);
+        rcu_read_unlock();
         if (!bootup_volt) {
                 pr_err("%s: unable to find voltage corresponding "
                         "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 23de98d03841..a4eb5c280435 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -226,7 +226,6 @@ static int omap2_can_sleep(void)
 
 static void omap2_pm_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
         if (!omap2_can_sleep()) {
@@ -243,7 +242,6 @@ static void omap2_pm_idle(void)
 
 out:
         local_fiq_enable();
-        local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -462,7 +460,7 @@ static int __init omap2_pm_init(void)
         }
 
         suspend_set_ops(&omap_pm_ops);
-        pm_idle = omap2_pm_idle;
+        arm_pm_idle = omap2_pm_idle;
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fc6987578920..b77df735fa6c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -418,10 +418,9 @@ void omap_sram_idle(void)
 
 static void omap3_pm_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
-        if (omap_irq_pending() || need_resched())
+        if (omap_irq_pending())
                 goto out;
 
         trace_power_start(POWER_CSTATE, 1, smp_processor_id());
@@ -434,7 +433,6 @@ static void omap3_pm_idle(void)
 
 out:
         local_fiq_enable();
-        local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -848,7 +846,7 @@ static int __init omap3_pm_init(void)
         suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-        pm_idle = omap3_pm_idle;
+        arm_pm_idle = omap3_pm_idle;
         omap3_idle_init();
 
         /*
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index c264ef7219c1..c840689df24a 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
  * omap_default_idle - OMAP4 default ilde routine.'
  *
  * Implements OMAP4 memory, IO ordering requirements which can't be addressed
- * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
+ * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
  * by secondary CPU with CONFIG_CPUIDLE.
  */
 static void omap_default_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
         omap_do_wfi();
 
         local_fiq_enable();
-        local_irq_enable();
 }
 
 /**
@@ -255,8 +253,8 @@ static int __init omap4_pm_init(void)
         suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-        /* Overwrite the default arch_idle() */
-        pm_idle = omap_default_idle;
+        /* Overwrite the default cpu_do_idle() */
+        arm_pm_idle = omap_default_idle;
 
         omap4_idle_init();
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 860118ab43e2..873b51d494ea 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include <mach/system.h>
 #include <plat/common.h>
 #include <plat/prcm.h>
 #include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 771dc781b746..f51348dafafd 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
 {
         struct omap_hwmod       *oh[2];
-        struct omap_device      *od;
+        struct platform_device  *pdev;
         int                     bus_id = -1;
         int                     i;
 
@@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
                 return;
         }
 
-        od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
+        pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
                                 (void *)&usbhs_data, sizeof(usbhs_data),
                                 omap_uhhtll_latency,
                                 ARRAY_SIZE(omap_uhhtll_latency), false);
-        if (IS_ERR(od)) {
+        if (IS_ERR(pdev)) {
                 pr_err("Could not build hwmod devices %s,%s\n",
                         USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
                 return;
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index c005e2f5e383..57db2038b23c 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
          * XXX Will depend on the process, validation, and binning
          * for the currently-running IC
          */
+#ifdef CONFIG_PM_OPP
         if (cpu_is_omap3630()) {
                 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
                 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
                 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
                 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
         }
+#endif
 
         if (cpu_is_omap3517() || cpu_is_omap3505())
                 voltdms = voltagedomains_am35xx;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 4e11d022595d..c3115f6853d4 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
          * XXX Will depend on the process, validation, and binning
          * for the currently-running IC
          */
+#ifdef CONFIG_PM_OPP
         omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
         omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
         omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
+#endif
 
         for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
                 voltdm->sys_clk.name = sys_clk_name;
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
deleted file mode 100644
index 825a2650cefa..000000000000
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/system.h
- *
- * Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
deleted file mode 100644
index 1a5d8cb57df4..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching and wait for interrupt
-         * tricks.
-         */
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
deleted file mode 100644
index 60cfe7188091..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/system.h
- *
- * Copyright (C) 2003 Philips Semiconductors
- * Copyright (C) 2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
deleted file mode 100644
index 2c7d2a9d0c92..000000000000
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/system.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_SYSTEM_H__
-#define __MACH_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index fb9b62dcf4ca..208eef1c0485 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -45,6 +45,7 @@
 #include <mach/hx4700.h>
 #include <mach/irda.h>
 
+#include <sound/ak4641.h>
 #include <video/platform_lcd.h>
 #include <video/w100fb.h>
 
@@ -765,6 +766,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
 };
 
 /*
+ * Asahi Kasei AK4641 on I2C
+ */
+
+static struct ak4641_platform_data ak4641_info = {
+        .gpio_power = GPIO27_HX4700_CODEC_ON,
+        .gpio_npdn  = GPIO109_HX4700_CODEC_nPDN,
+};
+
+static struct i2c_board_info i2c_board_info[] __initdata = {
+        {
+                I2C_BOARD_INFO("ak4641", 0x12),
+                .platform_data = &ak4641_info,
+        },
+};
+
+static struct platform_device audio = {
+        .name   = "hx4700-audio",
+        .id     = -1,
+};
+
+
+/*
  * PCMCIA
  */
 
@@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
         &gpio_vbus,
         &power_supply,
         &strataflash,
+        &audio,
         &pcmcia,
 };
 
@@ -827,6 +851,7 @@ static void __init hx4700_init(void)
         pxa_set_ficp_info(&ficp_info);
         pxa27x_set_i2c_power_info(NULL);
         pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
         i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
         pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
         spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
deleted file mode 100644
index c5afacd3cc0b..000000000000
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/system.h
- *
- * Author:      Nicolas Pitre
- * Created:     Jun 15, 2001
- * Copyright:   MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 91e4f6c03766..00d6eacab8e4 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -25,7 +25,6 @@
 #include <linux/suspend.h>
 #include <linux/syscore_ops.h>
 #include <linux/irq.h>
-#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index aed6cbcf3866..c1673b3441d4 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -22,7 +22,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index febc809ed5a6..5aded5e6148f 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -15,7 +15,6 @@
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
 #include <linux/mfd/88pm860x.h>
-#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 8d5168d253a9..30989baf7f2a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
 #define MAXCTRL_SEL_SH   4
 #define MAXCTRL_STR      (1u << 7)
 
+extern int max1111_read_channel(int);
 /*
  * Read MAX1111 ADC
  */
@@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
         if (machine_is_tosa())
             return 0;
 
-        extern int max1111_read_channel(int);
-
         /* max1111 accepts channels from 0-3, however,
          * it is encoded from 0-7 here in the code.
          */
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 34cbdac51525..438f02fe122a 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
 static unsigned long spitz_charger_wakeup(void)
 {
         unsigned long ret;
-        ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
+        ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
                 << GPIO_bit(SPITZ_GPIO_KEY_INT))
-                | (!gpio_get_value(SPITZ_GPIO_SYNC)
-                << GPIO_bit(SPITZ_GPIO_SYNC));
+                | gpio_get_value(SPITZ_GPIO_SYNC));
         return ret;
 }
 
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 735b57aaf2d6..f8f2c0ac4c01 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -28,21 +28,11 @@
 #include <asm/setup.h>
 #include <asm/leds.h>
 
-#define AMBA_DEVICE(name,busid,base,plat)                       \
-static struct amba_device name##_device = {                     \
-        .dev            = {                                     \
-                .coherent_dma_mask = ~0,                        \
-                .init_name = busid,                             \
-                .platform_data = plat,                          \
-        },                                                      \
-        .res            = {                                     \
-                .start  = REALVIEW_##base##_BASE,               \
-                .end    = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
-                .flags  = IORESOURCE_MEM,                       \
-        },                                                      \
-        .dma_mask       = ~0,                                   \
-        .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)                     \
+static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)                     \
+static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
 
 struct machine_desc;
 
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e04..708f84156f2c 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
 #define IRQ_DC1176_L2CC         (IRQ_DC1176_GIC_START + 13)
 #define IRQ_DC1176_RTC          (IRQ_DC1176_GIC_START + 14)
 #define IRQ_DC1176_CLCD         (IRQ_DC1176_GIC_START + 15)     /* CLCD controller */
+#define IRQ_DC1176_GPIO0        (IRQ_DC1176_GIC_START + 16)
 #define IRQ_DC1176_SSP          (IRQ_DC1176_GIC_START + 17)     /* SSP port */
 #define IRQ_DC1176_UART0        (IRQ_DC1176_GIC_START + 18)     /* UART 0 on development chip */
 #define IRQ_DC1176_UART1        (IRQ_DC1176_GIC_START + 19)     /* UART 1 on development chip */
@@ -73,7 +74,6 @@
 #define IRQ_PB1176_DMAC         (IRQ_PB1176_GIC_START + 24)     /* DMA controller */
 #define IRQ_PB1176_RTC          (IRQ_PB1176_GIC_START + 25)     /* Real Time Clock */
 
-#define IRQ_PB1176_GPIO0        -1
 #define IRQ_PB1176_SCTL         -1
 
 #define NR_GIC_PB1176           2
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
deleted file mode 100644
index 471b671159ce..000000000000
--- a/arch/arm/mach-realview/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 9578145f2df0..157e1bc6e83c 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_EB_GPIO2 }
+#define GPIO3_IRQ       { IRQ_EB_GPIO3 }
 
-#define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
+#define AACI_IRQ        { IRQ_EB_AACI }
 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
-#define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
+#define KMI0_IRQ        { IRQ_EB_KMI0 }
+#define KMI1_IRQ        { IRQ_EB_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define EB_SMC_IRQ      { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define EB_CLCD_IRQ     { IRQ_EB_CLCD, NO_IRQ }
-#define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
+#define EB_SMC_IRQ      { }
+#define MPMC_IRQ        { }
+#define EB_CLCD_IRQ     { IRQ_EB_CLCD }
+#define DMAC_IRQ        { IRQ_EB_DMA }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
-#define EB_GPIO0_IRQ    { IRQ_EB_GPIO0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
-#define EB_RTC_IRQ      { IRQ_EB_RTC, NO_IRQ }
+#define SCTL_IRQ        { }
+#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
+#define EB_GPIO0_IRQ    { IRQ_EB_GPIO0 }
+#define GPIO1_IRQ       { IRQ_EB_GPIO1 }
+#define EB_RTC_IRQ      { IRQ_EB_RTC }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
-#define EB_UART0_IRQ    { IRQ_EB_UART0, NO_IRQ }
-#define EB_UART1_IRQ    { IRQ_EB_UART1, NO_IRQ }
-#define EB_UART2_IRQ    { IRQ_EB_UART2, NO_IRQ }
-#define EB_UART3_IRQ    { IRQ_EB_UART3, NO_IRQ }
-#define EB_SSP_IRQ      { IRQ_EB_SSP, NO_IRQ }
+#define SCI_IRQ         { IRQ_EB_SCI }
+#define EB_UART0_IRQ    { IRQ_EB_UART0 }
+#define EB_UART1_IRQ    { IRQ_EB_UART1 }
+#define EB_UART2_IRQ    { IRQ_EB_UART2 }
+#define EB_UART3_IRQ    { IRQ_EB_UART3 }
+#define EB_SSP_IRQ      { IRQ_EB_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
-AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
+APB_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
+APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
-AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
-AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
-AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
-AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
-AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
+AHB_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
+AHB_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
+APB_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
+APB_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
+APB_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
+APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
+APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
+APB_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index e4abe94fb11a..b1d7cafa1a6d 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * RealView PB1176 AMBA devices
  */
-#define GPIO2_IRQ       { IRQ_PB1176_GPIO2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_PB1176_GPIO3, NO_IRQ }
-#define AACI_IRQ        { IRQ_PB1176_AACI, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_PB1176_GPIO2 }
+#define GPIO3_IRQ       { IRQ_PB1176_GPIO3 }
+#define AACI_IRQ        { IRQ_PB1176_AACI }
 #define MMCI0_IRQ       { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
-#define KMI0_IRQ        { IRQ_PB1176_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_PB1176_KMI1, NO_IRQ }
-#define PB1176_SMC_IRQ  { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define PB1176_WATCHDOG_IRQ     { IRQ_DC1176_WATCHDOG, NO_IRQ }
-#define PB1176_GPIO0_IRQ        { IRQ_PB1176_GPIO0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_PB1176_GPIO1, NO_IRQ }
-#define PB1176_RTC_IRQ  { IRQ_DC1176_RTC, NO_IRQ }
-#define SCI_IRQ         { IRQ_PB1176_SCI, NO_IRQ }
-#define PB1176_UART0_IRQ        { IRQ_DC1176_UART0, NO_IRQ }
-#define PB1176_UART1_IRQ        { IRQ_DC1176_UART1, NO_IRQ }
-#define PB1176_UART2_IRQ        { IRQ_DC1176_UART2, NO_IRQ }
-#define PB1176_UART3_IRQ        { IRQ_DC1176_UART3, NO_IRQ }
-#define PB1176_UART4_IRQ        { IRQ_PB1176_UART4, NO_IRQ }
-#define PB1176_SSP_IRQ          { IRQ_DC1176_SSP, NO_IRQ }
+#define KMI0_IRQ        { IRQ_PB1176_KMI0 }
+#define KMI1_IRQ        { IRQ_PB1176_KMI1 }
+#define PB1176_SMC_IRQ  { }
+#define MPMC_IRQ        { }
+#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
+#define SCTL_IRQ        { }
+#define PB1176_WATCHDOG_IRQ     { IRQ_DC1176_WATCHDOG }
+#define PB1176_GPIO0_IRQ        { IRQ_DC1176_GPIO0 }
+#define GPIO1_IRQ       { IRQ_PB1176_GPIO1 }
+#define PB1176_RTC_IRQ  { IRQ_DC1176_RTC }
+#define SCI_IRQ         { IRQ_PB1176_SCI }
+#define PB1176_UART0_IRQ        { IRQ_DC1176_UART0 }
+#define PB1176_UART1_IRQ        { IRQ_DC1176_UART1 }
+#define PB1176_UART2_IRQ        { IRQ_DC1176_UART2 }
+#define PB1176_UART3_IRQ        { IRQ_DC1176_UART3 }
+#define PB1176_UART4_IRQ        { IRQ_PB1176_UART4 }
+#define PB1176_SSP_IRQ          { IRQ_DC1176_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart4,      "fpga:uart4",   PB1176_UART4,   NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart4,       "fpga:uart4",   PB1176_UART4,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PB1176_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PB1176_WATCHDOG,        NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PB1176_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PB1176_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PB1176_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PB1176_UART2,   NULL);
-AMBA_DEVICE(uart3,      "dev:uart3",    PB1176_UART3,   NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
-AMBA_DEVICE(clcd,       "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PB1176_SMC,     NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PB1176_WATCHDOG,        NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PB1176_RTC,     NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PB1176_UART0,   NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PB1176_UART1,   NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PB1176_UART2,   NULL);
+APB_DEVICE(uart3,       "dev:uart3",    PB1176_UART3,   NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
+AHB_DEVICE(clcd,        "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart0_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 2147335f66f5..ae7fe54f6eb6 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PB11MPCore AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PB11MP_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PB11MP_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_TC11MP_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PB11MP_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PB11MP_GPIO3 }
+#define AACI_IRQ                { IRQ_TC11MP_AACI }
 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
-#define KMI0_IRQ                { IRQ_TC11MP_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_TC11MP_KMI1, NO_IRQ }
-#define PB11MP_SMC_IRQ          { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PB11MP_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG, NO_IRQ }
-#define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PB11MP_GPIO1, NO_IRQ }
-#define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PB11MP_SCI, NO_IRQ }
-#define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0, NO_IRQ }
-#define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1, NO_IRQ }
-#define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2, NO_IRQ }
-#define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3, NO_IRQ }
-#define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_TC11MP_KMI0 }
+#define KMI1_IRQ                { IRQ_TC11MP_KMI1 }
+#define PB11MP_SMC_IRQ          { }
+#define MPMC_IRQ                { }
+#define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD }
+#define DMAC_IRQ                { IRQ_PB11MP_DMAC }
+#define SCTL_IRQ                { }
+#define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG }
+#define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PB11MP_GPIO1 }
+#define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC }
+#define SCI_IRQ                 { IRQ_PB11MP_SCI }
+#define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0 }
+#define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1 }
+#define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2 }
+#define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3 }
+#define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PB11MP_UART3,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PB11MP_SMC,     NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PB11MP_WATCHDOG, NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PB11MP_RTC,     NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PB11MP_UART0,   NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PB11MP_UART1,   NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PB11MP_UART2,   NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f8..59650174e6ed 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBA8Core AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PBA8_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PBA8_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_PBA8_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PBA8_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PBA8_GPIO3 }
+#define AACI_IRQ                { IRQ_PBA8_AACI }
 #define MMCI0_IRQ               { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
-#define KMI0_IRQ                { IRQ_PBA8_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_PBA8_KMI1, NO_IRQ }
-#define PBA8_SMC_IRQ            { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PBA8_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG, NO_IRQ }
-#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PBA8_GPIO1, NO_IRQ }
-#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PBA8_SCI, NO_IRQ }
-#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0, NO_IRQ }
-#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1, NO_IRQ }
-#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2, NO_IRQ }
-#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3, NO_IRQ }
-#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_PBA8_KMI0 }
+#define KMI1_IRQ                { IRQ_PBA8_KMI1 }
+#define PBA8_SMC_IRQ            { }
+#define MPMC_IRQ                { }
+#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD }
+#define DMAC_IRQ                { IRQ_PBA8_DMAC }
+#define SCTL_IRQ                { }
+#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG }
+#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PBA8_GPIO1 }
+#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC }
+#define SCI_IRQ                 { IRQ_PBA8_SCI }
+#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0 }
+#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1 }
+#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2 }
+#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3 }
+#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PBA8_UART3,     NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PBA8_UART3,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PBA8_SMC,       NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PBA8_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PBA8_RTC,       NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PBA8_UART0,     NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PBA8_UART1,     NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PBA8_UART2,     NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PBA8_SMC,       NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PBA8_WATCHDOG, NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PBA8_RTC,       NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PBA8_UART0,     NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PBA8_UART1,     NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PBA8_UART2,     NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b860..1cd9956f5875 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBXCore AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PBX_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PBX_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_PBX_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PBX_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PBX_GPIO3 }
+#define AACI_IRQ                { IRQ_PBX_AACI }
 #define MMCI0_IRQ               { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
-#define KMI0_IRQ                { IRQ_PBX_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_PBX_KMI1, NO_IRQ }
-#define PBX_SMC_IRQ             { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PBX_CLCD_IRQ            { IRQ_PBX_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PBX_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PBX_WATCHDOG_IRQ        { IRQ_PBX_WATCHDOG, NO_IRQ }
-#define PBX_GPIO0_IRQ           { IRQ_PBX_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PBX_GPIO1, NO_IRQ }
-#define PBX_RTC_IRQ             { IRQ_PBX_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PBX_SCI, NO_IRQ }
-#define PBX_UART0_IRQ           { IRQ_PBX_UART0, NO_IRQ }
-#define PBX_UART1_IRQ           { IRQ_PBX_UART1, NO_IRQ }
-#define PBX_UART2_IRQ           { IRQ_PBX_UART2, NO_IRQ }
-#define PBX_UART3_IRQ           { IRQ_PBX_UART3, NO_IRQ }
-#define PBX_SSP_IRQ             { IRQ_PBX_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_PBX_KMI0 }
+#define KMI1_IRQ                { IRQ_PBX_KMI1 }
+#define PBX_SMC_IRQ             { }
+#define MPMC_IRQ                { }
+#define PBX_CLCD_IRQ            { IRQ_PBX_CLCD }
+#define DMAC_IRQ                { IRQ_PBX_DMAC }
+#define SCTL_IRQ                { }
+#define PBX_WATCHDOG_IRQ        { IRQ_PBX_WATCHDOG }
+#define PBX_GPIO0_IRQ           { IRQ_PBX_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PBX_GPIO1 }
+#define PBX_RTC_IRQ             { IRQ_PBX_RTC }
+#define SCI_IRQ                 { IRQ_PBX_SCI }
+#define PBX_UART0_IRQ           { IRQ_PBX_UART0 }
+#define PBX_UART1_IRQ           { IRQ_PBX_UART1 }
+#define PBX_UART2_IRQ           { IRQ_PBX_UART2 }
+#define PBX_UART3_IRQ           { IRQ_PBX_UART3 }
+#define PBX_SSP_IRQ             { IRQ_PBX_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PBX_UART3,      NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PBX_UART3,      NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PBX_SMC,        NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PBX_WATCHDOG,   NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PBX_RTC,        NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PBX_UART0,      NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PBX_UART1,      NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PBX_UART2,      NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
+AHB_DEVICE(smc, "dev:smc",      PBX_SMC,        NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PBX_WATCHDOG,   NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PBX_RTC,        NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PBX_UART0,      NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PBX_UART1,      NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PBX_UART2,      NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
deleted file mode 100644
index 359bab94b6af..000000000000
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-rpc/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
deleted file mode 100644
index 5e215c1a5c8f..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (c) 2003 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-
-#include <mach/map.h>
-#include <mach/idle.h>
-
-#include <mach/regs-clock.h>
-
-void (*s3c24xx_idle)(void);
-
-void s3c24xx_default_idle(void)
-{
-        unsigned long tmp;
-        int i;
-
-        /* idle the system by using the idle mode which will wait for an
-         * interrupt to happen before restarting the system.
-         */
-
-        /* Warning: going into idle state upsets jtag scanning */
-
-        __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
-                     S3C2410_CLKCON);
-
-        /* the samsung port seems to do a loop and then unset idle.. */
-        for (i = 0; i < 50; i++) {
-                tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
-        }
-
-        /* this bit is not cleared on re-start... */
-
-        __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
-                     S3C2410_CLKCON);
-}
-
-static void arch_idle(void)
-{
-        if (s3c24xx_idle != NULL)
-                (s3c24xx_idle)();
-        else
-                s3c24xx_default_idle();
-}
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index aff6e85a97c6..c6eac9871093 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,8 +32,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
-
 #include <plat/cpu-freq.h>
 
 #include <mach/regs-clock.h>
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void)
 
         /* set our idle function */
 
-        s3c24xx_idle = s3c2412_idle;
+        arm_pm_idle = s3c2412_idle;
 
         /* register our io-tables */
 
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 5287d2808d3e..08bb0355159d 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
 #include <mach/regs-s3c2443-clock.h>
 
 #include <plat/gpio-core.h>
@@ -88,8 +87,6 @@ int __init s3c2416_init(void)
 {
         printk(KERN_INFO "S3C2416: Initializing architecture\n");
 
-        /* s3c24xx_idle = s3c2416_idle; */
-
         /* change WDT IRQ number */
         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
         s3c_device_wdt.resource[1].end   = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
deleted file mode 100644
index 353ed4389ae7..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/system.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - system implementation
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 52b89a376447..9143f8b19962 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void)
 {
         unsigned long val;
 
-        if (!need_resched()) {
-                val = __raw_readl(S5P64X0_PWR_CFG);
-                val &= ~(0x3 << 5);
-                val |= (0x1 << 5);
-                __raw_writel(val, S5P64X0_PWR_CFG);
+        val = __raw_readl(S5P64X0_PWR_CFG);
+        val &= ~(0x3 << 5);
+        val |= (0x1 << 5);
+        __raw_writel(val, S5P64X0_PWR_CFG);
 
-                cpu_do_idle();
-        }
-        local_irq_enable();
+        cpu_do_idle();
 }
 
 /*
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void)
         printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
 
         /* set idle function */
-        pm_idle = s5p64x0_idle;
+        arm_pm_idle = s5p64x0_idle;
 
         return device_register(&s5p64x0_dev);
 }
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index f820c0744405..f7f68ad77910 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = {
         .peri_id = s5p6450_pdma_peri,
 };
 
-struct amba_device s5p64x0_device_pdma = {
-        .dev = {
-                .init_name = "dma-pl330",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .res = {
-                .start = S5P64X0_PA_PDMA,
-                .end = S5P64X0_PA_PDMA + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_DMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA,
+        {IRQ_DMA0}, NULL);
 
 static int __init s5p64x0_dma_init(void)
 {
         if (soc_is_s5p6450()) {
                 dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
                 dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
-                s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
+                s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
         } else {
                 dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
                 dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
-                s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
+                s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
         }
 
-        amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
+        amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
deleted file mode 100644
index cf26e0954a2f..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index c9095730a7f5..ff71e2d467c6 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
         }
 };
 
-static void s5pc100_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 /*
  * s5pc100_map_io
  *
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init);
 int __init s5pc100_init(void)
 {
         printk(KERN_INFO "S5PC100: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5pc100_idle;
-
         return device_register(&s5pc100_dev);
 }
 
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index c841f4d313f2..96b1ab3dcd48 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pc100_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_pdma0_pdata,
-        },
-        .res = {
-                .start = S5PC100_PA_PDMA0,
-                .end = S5PC100_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma0,  "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0,
+        {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pc100_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_pdma1_pdata,
-        },
-        .res = {
-                .start = S5PC100_PA_PDMA1,
-                .end = S5PC100_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1,
+        {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
 
 static int __init s5pc100_dma_init(void)
 {
         dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
-        amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+        amba_device_register(&s5pc100_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
-        amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
+        amba_device_register(&s5pc100_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
deleted file mode 100644
index afc96c298518..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5pc100/include/mach/system.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 - system implementation
- *
- * Based on mach-s3c6400/include/mach/system.h
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 9c1bcdcc12c3..4c9e9027df9a 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
         }
 };
 
-static void s5pv210_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 void s5pv210_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init);
 int __init s5pv210_init(void)
 {
         printk(KERN_INFO "S5PV210: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5pv210_idle;
-
         return device_register(&s5pv210_dev);
 }
 
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index a6113e0267f2..f6885d247d14 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pv210_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_pdma0_pdata,
-        },
-        .res = {
-                .start = S5PV210_PA_PDMA0,
-                .end = S5PV210_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0,
+        {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pv210_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_pdma1_pdata,
-        },
-        .res = {
-                .start = S5PV210_PA_PDMA1,
-                .end = S5PV210_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1,
+        {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
 
 static int __init s5pv210_dma_init(void)
 {
         dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
-        amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
+        amba_device_register(&s5pv210_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
-        amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
+        amba_device_register(&s5pv210_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
deleted file mode 100644
index bf288ced860a..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/system.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5PV210 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
deleted file mode 100644
index e17b208f76d4..000000000000
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/system.h
- *
- * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a851c254ad6c..6a2a7f2c2557 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = {
         .init           = shark_timer_init,
 };
 
+static void shark_init_early(void)
+{
+        disable_hlt();
+}
+
 MACHINE_START(SHARK, "Shark")
         /* Maintainer: Alexander Schulz */
         .atag_offset    = 0x3000,
         .map_io         = shark_map_io,
+        .init_early     = shark_init_early,
         .init_irq       = shark_init_irq,
         .timer          = &shark_timer,
         .dma_zone_size  = SZ_4M,
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
deleted file mode 100644
index 1b2f2c5050a8..000000000000
--- a/arch/arm/mach-shark/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/system.h
- *
- * by Alexander Schulz
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index eff8a96c75ee..068b754bc348 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -30,6 +30,7 @@
 #include <linux/serial_sci.h>
 #include <linux/smsc911x.h>
 #include <linux/gpio.h>
+#include <linux/videodev2.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
@@ -37,7 +38,6 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/mfd/tmio.h>
 #include <linux/sh_clk.h>
-#include <linux/dma-mapping.h>
 #include <video/sh_mobile_lcdc.h>
 #include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
@@ -159,19 +159,12 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
 static struct sh_mmcif_plat_data sh_mmcif_platdata = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195,
         .caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device mmc_device = {
@@ -321,12 +314,11 @@ static struct resource mipidsi0_resources[] = {
         },
 };
 
-#define DSI0PHYCR       0xe615006c
 static int sh_mipi_set_dot_clock(struct platform_device *pdev,
                                  void __iomem *base,
                                  int enable)
 {
-        struct clk *pck;
+        struct clk *pck, *phy;
         int ret;
 
         pck = clk_get(&pdev->dev, "dsip_clk");
@@ -335,18 +327,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev,
                 goto sh_mipi_set_dot_clock_pck_err;
         }
 
+        phy = clk_get(&pdev->dev, "dsiphy_clk");
+        if (IS_ERR(phy)) {
+                ret = PTR_ERR(phy);
+                goto sh_mipi_set_dot_clock_phy_err;
+        }
+
         if (enable) {
                 clk_set_rate(pck, clk_round_rate(pck,  24000000));
-                __raw_writel(0x2a809010, DSI0PHYCR);
+                clk_set_rate(phy, clk_round_rate(pck, 510000000));
                 clk_enable(pck);
+                clk_enable(phy);
         } else {
                 clk_disable(pck);
+                clk_disable(phy);
         }
 
         ret = 0;
 
+        clk_put(phy);
+sh_mipi_set_dot_clock_phy_err:
         clk_put(pck);
-
 sh_mipi_set_dot_clock_pck_err:
         return ret;
 }
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index aab0a349f759..eeb4d9664584 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -295,15 +295,6 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
-
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -311,7 +302,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
                           MMC_CAP_8_BIT_DATA |
                           MMC_CAP_NEEDS_POLL,
         .get_cd         = slot_cn7_get_cd,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 857ceeec1bb0..c8e7ca23fc06 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_buttons[] = {
 static struct gpio_keys_platform_data gpio_key_info = {
         .buttons        = gpio_buttons,
         .nbuttons       = ARRAY_SIZE(gpio_buttons),
-        .poll_interval  = 250, /* polled for now */
 };
 
 static struct platform_device gpio_keys_device = {
-        .name   = "gpio-keys-polled", /* polled for now */
+        .name   = "gpio-keys",
         .id     = -1,
         .dev    = {
                 .platform_data  = &gpio_key_info,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9b42fbd10f8e..a2813247b455 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -43,7 +43,6 @@
 #include <linux/smsc911x.h>
 #include <linux/sh_intc.h>
 #include <linux/tca6416_keypad.h>
-#include <linux/usb/r8a66597.h>
 #include <linux/usb/renesas_usbhs.h>
 #include <linux/dma-mapping.h>
 
@@ -145,11 +144,6 @@
  * 1-2 short | VBUS 5V       | Host
  * open      | external VBUS | Function
  *
- * *1
- * CN31 is used as
- * CONFIG_USB_R8A66597_HCD      Host
- * CONFIG_USB_RENESAS_USBHS     Function
- *
  * CAUTION
  *
  * renesas_usbhs driver can use external interrupt mode
@@ -161,15 +155,6 @@
  * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
  * because Touchscreen is using IRQ7-PORT40.
  * It is impossible to use IRQ7 demux on this board.
- *
- * We can use external interrupt mode USB-Function on "USB1".
- * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
- * But don't select both drivers in same time.
- * These uses same IRQ number for request_irq(), and aren't supporting
- * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
- *
- * Actually these are old/new version of USB driver.
- * This mean its register will be broken if it supports shared IRQ,
  */
 
 /*
@@ -208,6 +193,16 @@
  */
 
 /*
+ * FSI - AK4642
+ *
+ * it needs amixer settings for playing
+ *
+ * amixer set "Headphone" on
+ * amixer set "HPOUTL Mixer DACH" on
+ * amixer set "HPOUTR Mixer DACH" on
+ */
+
+/*
  * FIXME !!
  *
  * gpio_no_direction
@@ -676,51 +671,16 @@ static struct platform_device usbhs0_device = {
  * Use J30 to select between Host and Function. This setting
  * can however not be detected by software. Hotplug of USBHS1
  * is provided via IRQ8.
+ *
+ * Current USB1 works as "USB Host".
+ *  - set J30 "short"
+ *
+ * If you want to use it as "USB gadget",
+ *  - J30 "open"
+ *  - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
+ *  - add .get_vbus = usbhs_get_vbus in usbhs1_private
  */
 #define IRQ8 evt2irq(0x0300)
-
-/* USBHS1 USB Host support via r8a66597_hcd */
-static void usb1_host_port_power(int port, int power)
-{
-        if (!power) /* only power-on is supported for now */
-                return;
-
-        /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
-        __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
-}
-
-static struct r8a66597_platdata usb1_host_data = {
-        .on_chip        = 1,
-        .port_power     = usb1_host_port_power,
-};
-
-static struct resource usb1_host_resources[] = {
-        [0] = {
-                .name   = "USBHS1",
-                .start  = 0xe68b0000,
-                .end    = 0xe68b00e6 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x1ce0) /* USB1_USB1I0 */,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device usb1_host_device = {
-        .name   = "r8a66597_hcd",
-        .id     = 1,
-        .dev = {
-                .dma_mask               = NULL,         /*  not use dma */
-                .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &usb1_host_data,
-        },
-        .num_resources  = ARRAY_SIZE(usb1_host_resources),
-        .resource       = usb1_host_resources,
-};
-
-/* USBHS1 USB Function support via renesas_usbhs */
-
 #define USB_PHY_MODE            (1 << 4)
 #define USB_PHY_INT_EN          ((1 << 3) | (1 << 2))
 #define USB_PHY_ON              (1 << 1)
@@ -776,7 +736,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
 
 static int usbhs1_get_id(struct platform_device *pdev)
 {
-        return USBHS_GADGET;
+        return USBHS_HOST;
 }
 
 static u32 usbhs1_pipe_cfg[] = {
@@ -807,7 +767,6 @@ static struct usbhs_private usbhs1_private = {
                         .hardware_exit  = usbhs1_hardware_exit,
                         .get_id         = usbhs1_get_id,
                         .phy_reset      = usbhs_phy_reset,
-                        .get_vbus       = usbhs_get_vbus,
                 },
                 .driver_param = {
                         .buswait_bwait  = 4,
@@ -1184,15 +1143,6 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
-
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -1200,7 +1150,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
                           MMC_CAP_8_BIT_DATA |
                           MMC_CAP_NEEDS_POLL,
         .get_cd         = slot_cn7_get_cd,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
@@ -1311,7 +1262,6 @@ static struct platform_device *mackerel_devices[] __initdata = {
         &nor_flash_device,
         &smc911x_device,
         &lcdc_device,
-        &usb1_host_device,
         &usbhs1_device,
         &usbhs0_device,
         &leds_device,
@@ -1473,9 +1423,6 @@ static void __init mackerel_init(void)
         gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
         gpio_request(GPIO_FN_IDIN_1_113, NULL);
 
-        /* USB phy tweak to make the r8a66597_hcd host driver work */
-        __raw_writew(0x8a0a, 0xe6058130);       /* USBCR4 */
-
         /* enable FSI2 port A (ak4643) */
         gpio_request(GPIO_FN_FSIAIBT,   NULL);
         gpio_request(GPIO_FN_FSIAILR,   NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index afbead6a6e17..7727cca6136c 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = {
                         dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
 };
 
+/* DSI DIV */
+static unsigned long dsiphy_recalc(struct clk *clk)
+{
+        u32 value;
+
+        value = __raw_readl(clk->mapping->base);
+
+        /* FIXME */
+        if (!(value & 0x000B8000))
+                return clk->parent->rate;
+
+        value &= 0x3f;
+        value += 1;
+
+        if ((value < 12) ||
+            (value > 33)) {
+                pr_err("DSIPHY has wrong value (%d)", value);
+                return 0;
+        }
+
+        return clk->parent->rate / value;
+}
+
+static long dsiphy_round_rate(struct clk *clk, unsigned long rate)
+{
+        return clk_rate_mult_range_round(clk, 12, 33, rate);
+}
+
+static void dsiphy_disable(struct clk *clk)
+{
+        u32 value;
+
+        value = __raw_readl(clk->mapping->base);
+        value &= ~0x000B8000;
+
+        __raw_writel(value , clk->mapping->base);
+}
+
+static int dsiphy_enable(struct clk *clk)
+{
+        u32 value;
+        int multi;
+
+        value = __raw_readl(clk->mapping->base);
+        multi = (value & 0x3f) + 1;
+
+        if ((multi < 12) || (multi > 33))
+                return -EIO;
+
+        __raw_writel(value | 0x000B8000, clk->mapping->base);
+
+        return 0;
+}
+
+static int dsiphy_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 value;
+        int idx;
+
+        idx = rate / clk->parent->rate;
+        if ((idx < 12) || (idx > 33))
+                return -EINVAL;
+
+        idx += -1;
+
+        value = __raw_readl(clk->mapping->base);
+        value = (value & ~0x3f) + idx;
+
+        __raw_writel(value, clk->mapping->base);
+
+        return 0;
+}
+
+static struct clk_ops dsiphy_clk_ops = {
+        .recalc         = dsiphy_recalc,
+        .round_rate     = dsiphy_round_rate,
+        .set_rate       = dsiphy_set_rate,
+        .enable         = dsiphy_enable,
+        .disable        = dsiphy_disable,
+};
+
+static struct clk_mapping dsi0phy_clk_mapping = {
+        .phys   = DSI0PHYCR,
+        .len    = 4,
+};
+
+static struct clk_mapping dsi1phy_clk_mapping = {
+        .phys   = DSI1PHYCR,
+        .len    = 4,
+};
+
+static struct clk dsi0phy_clk = {
+        .ops            = &dsiphy_clk_ops,
+        .parent         = &div6_clks[DIV6_DSI0P], /* late install */
+        .mapping        = &dsi0phy_clk_mapping,
+};
+
+static struct clk dsi1phy_clk = {
+        .ops            = &dsiphy_clk_ops,
+        .parent         = &div6_clks[DIV6_DSI1P], /* late install */
+        .mapping        = &dsi1phy_clk_mapping,
+};
+
+static struct clk *late_main_clks[] = {
+        &dsi0phy_clk,
+        &dsi1phy_clk,
+};
+
 enum { MSTP001,
         MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
         MSTP219,
@@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
         CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
         CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
@@ -504,6 +614,9 @@ void __init sh73a0_clock_init(void)
         if (!ret)
                 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
+        for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
+                ret = clk_register(late_main_clks[k]);
+
         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
         if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 881d515a9686..cad57578ceed 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -515,8 +515,8 @@ enum {
         SHDMA_SLAVE_MMCIF_RX,
 };
 
-/* PINT interrupts are located at Linux IRQ 768 and up */
-#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
-#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
+/* PINT interrupts are located at Linux IRQ 800 and up */
+#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
+#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
 
 #endif /* __ASM_SH73A0_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 956ac18ddbf9..3bbcb3fa0775 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -1,11 +1,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         soft_restart(0);
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 1eda6b0b69e3..9857595eaa79 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/module.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/sh_intc.h>
@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
                 setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
 
                 n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
+                WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
                 irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
                                               handle_level_irq, "level");
                 set_irq_flags(n, IRQF_VALID); /* yuck */
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index 963532f2b2c4..d14c9b048077 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
             FN_AUDATA3, 0, 0, 0 }
         },
         { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
-                             3, 1, 1, 1, 1, 1, 1, 3, 3, 1,
+                             3, 1, 1, 1, 1, 1, 1, 3, 3,
                              1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
             /* IP4_31_29 [3] */
             FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 1bd6585a6acf..336093f9210a 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -23,6 +23,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/gpio.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 
 #define CPU_ALL_PORT(fn, pfx, sfx) \
@@ -1594,6 +1595,43 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
         { },
 };
 
+#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
+#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
+static struct pinmux_irq pinmux_irqs[] = {
+        PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0),
+};
+
 static struct pinmux_info sh7372_pinmux_info = {
         .name = "sh7372_pfc",
         .reserved_id = PINMUX_RESERVED,
@@ -1614,6 +1652,9 @@ static struct pinmux_info sh7372_pinmux_info = {
 
         .gpio_data = pinmux_data,
         .gpio_data_size = ARRAY_SIZE(pinmux_data),
+
+        .gpio_irq = pinmux_irqs,
+        .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
 };
 
 void sh7372_pinmux_init(void)
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 0d159d64a345..2d0d4212be41 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -80,7 +80,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
         /* enable cache coherency */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
 
-        if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
+        if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
                 __raw_writel(1 << cpu, __io(WUPCR));    /* wake up */
         else
                 __raw_writel(1 << cpu, __io(SRESCR));   /* reset */
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h
deleted file mode 100644
index 92cee6335c90..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/system.h
- *
- * SPEAr3xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index a5e46b4ade20..9da50e281e98 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = {
         .irq_base       = SPEAR300_GPIO1_INT_BASE,
 };
 
-struct amba_device spear300_gpio1_device = {
-        .dev = {
-                .init_name = "gpio1",
-                .platform_data = &gpio1_plat_data,
-        },
-        .res = {
-                .start = SPEAR300_GPIO_BASE,
-                .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE,
+        {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data);
 
 /* spear300 routines */
 void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 10af45da86a0..b1733c37f209 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = {
         .irq_base       = SPEAR3XX_GPIO_INT_BASE,
 };
 
-struct amba_device spear3xx_gpio_device = {
-        .dev = {
-                .init_name = "gpio",
-                .platform_data = &gpio_plat_data,
-        },
-        .res = {
-                .start = SPEAR3XX_ICM3_GPIO_BASE,
-                .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE,
+        {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data);
 
 /* uart device registration */
-struct amba_device spear3xx_uart_device = {
-        .dev = {
-                .init_name = "uart",
-        },
-        .res = {
-                .start = SPEAR3XX_ICM1_UART_BASE,
-                .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE,
+        {SPEAR3XX_IRQ_UART}, NULL);
 
 /* Do spear3xx familiy common initialization part here */
 void __init spear3xx_init(void)
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h
deleted file mode 100644
index 0b1d2be81cfb..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/system.h
- *
- * SPEAr6xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif  /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index e0f6628c8b2c..b997b1b10ba0 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = {
                         .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_UART_0, NO_IRQ},
+                .irq = {IRQ_UART_0},
         }, {
                 .dev = {
                         .init_name = "uart1",
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = {
                         .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_UART_1, NO_IRQ},
+                .irq = {IRQ_UART_1},
         }
 };
 
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
+                .irq = {IRQ_LOCAL_GPIO},
         }, {
                 .dev = {
                         .init_name = "gpio1",
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_BASIC_GPIO, NO_IRQ},
+                .irq = {IRQ_BASIC_GPIO},
         }, {
                 .dev = {
                         .init_name = "gpio2",
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_APPL_GPIO, NO_IRQ},
+                .irq = {IRQ_APPL_GPIO},
         }
 };
 
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a2eb90169aed..2db20da1d585 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -27,7 +27,6 @@
 #include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
-#include <mach/system.h>
 
 #include "board.h"
 #include "clock.h"
@@ -96,6 +95,8 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
 void __init tegra20_init_early(void)
 {
+        disable_hlt();  /* idle WFI usage needs to be confirmed */
+
         tegra_init_fuse();
         tegra2_init_clocks();
         tegra_clk_init_from_table(tegra20_clk_init_table);
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
deleted file mode 100644
index a312988bf6f8..000000000000
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/system.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_SYSTEM_H
-#define __MACH_TEGRA_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b4c6926a700c..b9865605da09 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = {
 #endif
 };
 
-static struct amba_device uart0_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "uart0", /* Slow device at 0x3000 offset */
-                .platform_data = &uart0_plat_data,
-        },
-        .res = {
-                .start = U300_UART0_BASE,
-                .end   = U300_UART0_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = { IRQ_U300_UART0, NO_IRQ },
-};
+/* Slow device at 0x3000 offset */
+static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
+        { IRQ_U300_UART0 }, &uart0_plat_data);
 
 /* The U335 have an additional UART1 on the APP CPU */
 #ifdef CONFIG_MACH_U300_BS335
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = {
 #endif
 };
 
-static struct amba_device uart1_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "uart1", /* Fast device at 0x7000 offset */
-                .platform_data = &uart1_plat_data,
-        },
-        .res = {
-                .start = U300_UART1_BASE,
-                .end   = U300_UART1_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = { IRQ_U300_UART1, NO_IRQ },
-};
+/* Fast device at 0x7000 offset */
+static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
+        { IRQ_U300_UART1 }, &uart1_plat_data);
 #endif
 
-static struct amba_device pl172_device = {
-        .dev = {
-                .init_name = "pl172", /* AHB device at 0x4000 offset */
-                .platform_data = NULL,
-        },
-        .res = {
-                .start = U300_EMIF_CFG_BASE,
-                .end   = U300_EMIF_CFG_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
+/* AHB device at 0x4000 offset */
+static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
 
 
 /*
  * Everything within this next ifdef deals with external devices connected to
  * the APP SPI bus.
  */
-static struct amba_device pl022_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "pl022", /* Fast device at 0x6000 offset */
-        },
-        .res = {
-                .start = U300_SPI_BASE,
-                .end   = U300_SPI_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_U300_SPI, NO_IRQ },
-        /*
-         * This device has a DMA channel but the Linux driver does not use
-         * it currently.
-         */
-};
+/* Fast device at 0x6000 offset */
+static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
+        { IRQ_U300_SPI }, NULL);
 
-static struct amba_device mmcsd_device = {
-        .dev = {
-                .init_name = "mmci", /* Fast device at 0x1000 offset */
-                .platform_data = NULL, /* Added later */
-        },
-        .res = {
-                .start = U300_MMCSD_BASE,
-                .end   = U300_MMCSD_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
-        /*
-         * This device has a DMA channel but the Linux driver does not use
-         * it currently.
-         */
-};
+/* Fast device at 0x1000 offset */
+#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
+
+static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
+        U300_MMCSD_IRQS, NULL);
 
 /*
  * The order of device declaration may be important, since some devices
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
deleted file mode 100644
index 574d46e38290..000000000000
--- a/arch/arm/mach-u300/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/system.h
- *
- *
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * System shutdown and reset functions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index c563e5418d80..898a64517b09 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
         struct amba_device *dev;
         int ret;
 
-        dev = kzalloc(sizeof *dev, GFP_KERNEL);
+        dev = amba_device_alloc(name, base, SZ_4K);
         if (!dev)
                 return ERR_PTR(-ENOMEM);
 
-        dev->dev.init_name = name;
-
-        dev->res.start = base;
-        dev->res.end = base + SZ_4K - 1;
-        dev->res.flags = IORESOURCE_MEM;
-
         dev->dma_mask = DMA_BIT_MASK(32);
         dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 
         dev->irq[0] = irq;
-        dev->irq[1] = NO_IRQ;
 
         dev->periphid = periphid;
 
         dev->dev.platform_data = pdata;
 
-        ret = amba_device_register(dev, &iomem_resource);
+        ret = amba_device_add(dev, &iomem_resource);
         if (ret) {
-                kfree(dev);
+                amba_device_put(dev);
                 return ERR_PTR(ret);
         }
 
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
deleted file mode 100644
index 258e5c919c24..000000000000
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2009 ST-Ericsson.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 008ce22b9a06..0968772aedbe 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -585,58 +585,58 @@ static struct pl022_ssp_controller ssp0_plat_data = {
         .num_chipselect = 1,
 };
 
-#define AACI_IRQ        { IRQ_AACI, NO_IRQ }
+#define AACI_IRQ        { IRQ_AACI }
 #define MMCI0_IRQ       { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
-#define KMI0_IRQ        { IRQ_SIC_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_SIC_KMI1, NO_IRQ }
+#define KMI0_IRQ        { IRQ_SIC_KMI0 }
+#define KMI1_IRQ        { IRQ_SIC_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define SMC_IRQ         { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define CLCD_IRQ        { IRQ_CLCDINT, NO_IRQ }
-#define DMAC_IRQ        { IRQ_DMAINT, NO_IRQ }
+#define SMC_IRQ         { }
+#define MPMC_IRQ        { }
+#define CLCD_IRQ        { IRQ_CLCDINT }
+#define DMAC_IRQ        { IRQ_DMAINT }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define WATCHDOG_IRQ    { IRQ_WDOGINT, NO_IRQ }
-#define GPIO0_IRQ       { IRQ_GPIOINT0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_GPIOINT1, NO_IRQ }
-#define RTC_IRQ         { IRQ_RTCINT, NO_IRQ }
+#define SCTL_IRQ        { }
+#define WATCHDOG_IRQ    { IRQ_WDOGINT }
+#define GPIO0_IRQ       { IRQ_GPIOINT0 }
+#define GPIO1_IRQ       { IRQ_GPIOINT1 }
+#define RTC_IRQ         { IRQ_RTCINT }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ         { IRQ_SCIINT, NO_IRQ }
-#define UART0_IRQ       { IRQ_UARTINT0, NO_IRQ }
-#define UART1_IRQ       { IRQ_UARTINT1, NO_IRQ }
-#define UART2_IRQ       { IRQ_UARTINT2, NO_IRQ }
-#define SSP_IRQ         { IRQ_SSPINT, NO_IRQ }
+#define SCI_IRQ         { IRQ_SCIINT }
+#define UART0_IRQ       { IRQ_UARTINT0 }
+#define UART1_IRQ       { IRQ_UARTINT1 }
+#define UART2_IRQ       { IRQ_UARTINT2 }
+#define SSP_IRQ         { IRQ_SSPINT }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
+APB_DEVICE(aaci,  "fpga:04", AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
-AMBA_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
-AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
-AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
-AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
-AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
-AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:00",  SMC,      NULL);
+AHB_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
+AHB_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
+APB_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
+APB_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
+APB_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:f1",  UART0,    NULL);
+APB_DEVICE(uart1, "dev:f2",  UART1,    NULL);
+APB_DEVICE(uart2, "dev:f3",  UART2,    NULL);
+APB_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 2ef2f555f315..683e60776a85 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev);
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
 #endif
 
-#define AMBA_DEVICE(name,busid,base,plat)                       \
-static struct amba_device name##_device = {                     \
-        .dev            = {                                     \
-                .coherent_dma_mask = ~0,                        \
-                .init_name = busid,                             \
-                .platform_data = plat,                          \
-        },                                                      \
-        .res            = {                                     \
-                .start  = VERSATILE_##base##_BASE,              \
-                .end    = (VERSATILE_##base##_BASE) + SZ_4K - 1,\
-                .flags  = IORESOURCE_MEM,                       \
-        },                                                      \
-        .dma_mask       = ~0,                                   \
-        .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)     \
+static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)     \
+static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
 
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
deleted file mode 100644
index f3fa347895f0..000000000000
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 9581c197500c..19738331bd3d 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = {
         .irq_base       = IRQ_GPIO3_START,
 };
 
-#define UART3_IRQ       { IRQ_SIC_UART3, NO_IRQ }
-#define SCI1_IRQ        { IRQ_SIC_SCI3, NO_IRQ }
+#define UART3_IRQ       { IRQ_SIC_UART3 }
+#define SCI1_IRQ        { IRQ_SIC_SCI3 }
 #define MMCI1_IRQ       { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ       { IRQ_GPIOINT2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_GPIOINT3, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_GPIOINT2 }
+#define GPIO3_IRQ       { IRQ_GPIOINT3 }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
 
 /* FPGA Primecells */
-AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
-AMBA_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
-AMBA_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
+APB_DEVICE(uart3, "fpga:09", UART3,    NULL);
+APB_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
+APB_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
 
 /* DevChip Primecells */
-AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
+APB_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
+APB_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart3_device,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9b3d0fbaee72..cf8730d35e70 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -1,14 +1,55 @@
 menu "Versatile Express platform type"
         depends on ARCH_VEXPRESS
 
+config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
+        bool
+        select ARM_ERRATA_720789
+        select ARM_ERRATA_751472
+        select PL310_ERRATA_753970 if CACHE_PL310
+        help
+          Provides common dependencies for Versatile Express platforms
+          based on Cortex-A5 and Cortex-A9 processors. In order to
+          build a working kernel, you must also enable relevant core
+          tile support or Flattened Device Tree based support options.
+
 config ARCH_VEXPRESS_CA9X4
         bool "Versatile Express Cortex-A9x4 tile"
+        select ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
+        select ARM_GIC
         select CPU_V7
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
+
+config ARCH_VEXPRESS_DT
+        bool "Device Tree support for Versatile Express platforms"
+        select ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
         select ARM_GIC
-        select ARM_ERRATA_720789
-        select ARM_ERRATA_751472
-        select ARM_ERRATA_753970
+        select ARM_PATCH_PHYS_VIRT
+        select AUTO_ZRELADDR
+        select CPU_V7
         select HAVE_SMP
         select MIGHT_HAVE_CACHE_L2X0
+        select USE_OF
+        help
+          New Versatile Express platforms require Flattened Device Tree to
+          be passed to the kernel.
+
+          This option enables support for systems using Cortex processor based
+          ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
+          for example:
+
+          - CoreTile Express A5x2 (V2P-CA5s)
+          - CoreTile Express A9x4 (V2P-CA9)
+          - CoreTile Express A15x2 (V2P-CA15)
+          - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
+            (Soft Macrocell Models)
+          - Versatile Express RTSMs (Models)
+
+          You must boot using a Flattened Device Tree in order to use these
+          platforms. The traditional (ATAGs) boot method is not usable on
+          these boards with this option.
+
+          If your bootloader supports Flattened Device Tree based booting,
+          say Y here.
 
 endmenu
diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot
index 8630b3d10a4d..909f85ebf5f4 100644
--- a/arch/arm/mach-vexpress/Makefile.boot
+++ b/arch/arm/mach-vexpress/Makefile.boot
@@ -1,3 +1,9 @@
+# Those numbers are used only by the non-DT V2P-CA9 platform
+# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y
    zreladdr-y   += 0x60008000
 params_phys-y   := 0x60000100
 initrd_phys-y   := 0x60800000
+
+dtb-$(CONFIG_ARCH_VEXPRESS_DT)  += vexpress-v2p-ca5s.dtb \
+                                   vexpress-v2p-ca9.dtb \
+                                   vexpress-v2p-ca15-tc1.dtb
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index f4397159c173..a3a4980770bd 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -1,19 +1,7 @@
-#define __MMIO_P2V(x)   (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
-#define MMIO_P2V(x)     ((void __iomem *)__MMIO_P2V(x))
+/* 2MB large area for motherboard's peripherals static mapping */
+#define V2M_PERIPH 0xf8000000
 
-#define AMBA_DEVICE(name,busid,base,plat)       \
-struct amba_device name##_device = {            \
-        .dev            = {                     \
-                .coherent_dma_mask = ~0UL,      \
-                .init_name = busid,             \
-                .platform_data = plat,          \
-        },                                      \
-        .res            = {                     \
-                .start  = base,                 \
-                .end    = base + SZ_4K - 1,     \
-                .flags  = IORESOURCE_MEM,       \
-        },                                      \
-        .dma_mask       = ~0UL,                 \
-        .irq            = IRQ_##base,           \
-        /* .dma         = DMA_##base,*/         \
-}
+/* Tile's peripherals static mappings should start here */
+#define V2T_PERIPH 0xf8200000
+
+void vexpress_dt_smp_map_io(void);
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index b1e87c184e54..73791f010297 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -30,57 +30,29 @@
 
 #include <plat/clcd.h>
 
-#define V2M_PA_CS7      0x10000000
-
 static struct map_desc ct_ca9x4_io_desc[] __initdata = {
         {
-                .virtual        = __MMIO_P2V(CT_CA9X4_MPIC),
-                .pfn            = __phys_to_pfn(CT_CA9X4_MPIC),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = __MMIO_P2V(CT_CA9X4_SP804_TIMER),
-                .pfn            = __phys_to_pfn(CT_CA9X4_SP804_TIMER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = __MMIO_P2V(CT_CA9X4_L2CC),
-                .pfn            = __phys_to_pfn(CT_CA9X4_L2CC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
+                .virtual        = V2T_PERIPH,
+                .pfn            = __phys_to_pfn(CT_CA9X4_MPIC),
+                .length         = SZ_8K,
+                .type           = MT_DEVICE,
         },
 };
 
 static void __init ct_ca9x4_map_io(void)
 {
+        iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
 #ifdef CONFIG_LOCAL_TIMERS
-        twd_base = MMIO_P2V(A9_MPCORE_TWD);
+        twd_base = ioremap(A9_MPCORE_TWD, SZ_32);
 #endif
-        iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
 }
 
 static void __init ct_ca9x4_init_irq(void)
 {
-        gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST),
-                 MMIO_P2V(A9_MPCORE_GIC_CPU));
-}
-
-#if 0
-static void __init ct_ca9x4_timer_init(void)
-{
-        writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
-        writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
-
-        sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1), "ct-timer1");
-        sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0,
-                "ct-timer0");
+        gic_init(0, 29, ioremap(A9_MPCORE_GIC_DIST, SZ_4K),
+                 ioremap(A9_MPCORE_GIC_CPU, SZ_256));
 }
 
-static struct sys_timer ct_ca9x4_timer = {
-        .init   = ct_ca9x4_timer_init,
-};
-#endif
-
 static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
 {
         v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
@@ -109,10 +81,10 @@ static struct clcd_board ct_ca9x4_clcd_data = {
         .remove         = versatile_clcd_remove_dma,
 };
 
-static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
-static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
-static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
-static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
+static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
+static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL);
+static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL);
+static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL);
 
 static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
         &clcd_device,
@@ -201,7 +173,7 @@ static void __init ct_ca9x4_init(void)
         int i;
 
 #ifdef CONFIG_CACHE_L2X0
-        void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC);
+        void __iomem *l2x0_base = ioremap(CT_CA9X4_L2CC, SZ_4K);
 
         /* set RAM latencies to 1 cycle for this core tile. */
         writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
@@ -217,9 +189,17 @@ static void __init ct_ca9x4_init(void)
 }
 
 #ifdef CONFIG_SMP
+static void *ct_ca9x4_scu_base __initdata;
+
 static void __init ct_ca9x4_init_cpu_map(void)
 {
-        int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
+        int i, ncores;
+
+        ct_ca9x4_scu_base = ioremap(A9_MPCORE_SCU, SZ_128);
+        if (WARN_ON(!ct_ca9x4_scu_base))
+                return;
+
+        ncores = scu_get_core_count(ct_ca9x4_scu_base);
 
         if (ncores > nr_cpu_ids) {
                 pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
@@ -235,7 +215,7 @@ static void __init ct_ca9x4_init_cpu_map(void)
 
 static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
 {
-        scu_enable(MMIO_P2V(A9_MPCORE_SCU));
+        scu_enable(ct_ca9x4_scu_base);
 }
 #endif
 
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index a34d3d4faae1..84acf8439d4b 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -22,9 +22,6 @@
 #define CT_CA9X4_SYSWDT         (0x1e007000)
 #define CT_CA9X4_L2CC           (0x1e00a000)
 
-#define CT_CA9X4_TIMER0         (CT_CA9X4_SP804_TIMER + 0x000)
-#define CT_CA9X4_TIMER1         (CT_CA9X4_SP804_TIMER + 0x020)
-
 #define A9_MPCORE_SCU           (CT_CA9X4_MPIC + 0x0000)
 #define A9_MPCORE_GIC_CPU       (CT_CA9X4_MPIC + 0x0100)
 #define A9_MPCORE_GIT           (CT_CA9X4_MPIC + 0x0200)
@@ -35,7 +32,7 @@
  * Interrupts.  Those in {} are for AMBA devices
  */
 #define IRQ_CT_CA9X4_CLCDC      { 76 }
-#define IRQ_CT_CA9X4_DMC        { -1 }
+#define IRQ_CT_CA9X4_DMC        { 0 }
 #define IRQ_CT_CA9X4_SMC        { 77, 78 }
 #define IRQ_CT_CA9X4_TIMER0     80
 #define IRQ_CT_CA9X4_TIMER1     81
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
index fd9e6c7ea49f..fa8224794e0b 100644
--- a/arch/arm/mach-vexpress/include/mach/debug-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -10,12 +10,34 @@
  * published by the Free Software Foundation.
  */
 
-#define DEBUG_LL_UART_OFFSET    0x00009000
+#define DEBUG_LL_PHYS_BASE              0x10000000
+#define DEBUG_LL_UART_OFFSET            0x00009000
+
+#define DEBUG_LL_PHYS_BASE_RS1          0x1c000000
+#define DEBUG_LL_UART_OFFSET_RS1        0x00090000
+
+#define DEBUG_LL_VIRT_BASE              0xf8000000
 
                 .macro  addruart,rp,rv,tmp
-                mov     \rp, #DEBUG_LL_UART_OFFSET
-                orr     \rv, \rp, #0xf8000000   @ virtual base
-                orr     \rp, \rp, #0x10000000   @ physical base
+
+                @ Make an educated guess regarding the memory map:
+                @ - the original A9 core tile, which has MPCore peripherals
+                @   located at 0x1e000000, should use UART at 0x10009000
+                @ - all other (RS1 complaint) tiles use UART mapped
+                @   at 0x1c090000
+                mrc     p15, 4, \tmp, c15, c0, 0
+                cmp     \tmp, #0x1e000000
+
+                @ Original memory map
+                moveq   \rp, #DEBUG_LL_UART_OFFSET
+                orreq   \rv, \rp, #DEBUG_LL_VIRT_BASE
+                orreq   \rp, \rp, #DEBUG_LL_PHYS_BASE
+
+                @ RS1 memory map
+                movne   \rp, #DEBUG_LL_UART_OFFSET_RS1
+                orrne   \rv, \rp, #DEBUG_LL_VIRT_BASE
+                orrne   \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
+
                 .endm
 
 #include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-vexpress/include/mach/irqs.h b/arch/arm/mach-vexpress/include/mach/irqs.h
index 7054cbfc9de5..4b10ee7657a6 100644
--- a/arch/arm/mach-vexpress/include/mach/irqs.h
+++ b/arch/arm/mach-vexpress/include/mach/irqs.h
@@ -1,4 +1,4 @@
 #define IRQ_LOCALTIMER          29
 #define IRQ_LOCALWDOG           30
 
-#define NR_IRQS 128
+#define NR_IRQS 256
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 0a3a37518405..31a92890893d 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -39,33 +39,30 @@
 #define V2M_CF                  (V2M_PA_CS7 + 0x0001a000)
 #define V2M_CLCD                (V2M_PA_CS7 + 0x0001f000)
 
-#define V2M_SYS_ID              (V2M_SYSREGS + 0x000)
-#define V2M_SYS_SW              (V2M_SYSREGS + 0x004)
-#define V2M_SYS_LED             (V2M_SYSREGS + 0x008)
-#define V2M_SYS_100HZ           (V2M_SYSREGS + 0x024)
-#define V2M_SYS_FLAGS           (V2M_SYSREGS + 0x030)
-#define V2M_SYS_FLAGSSET        (V2M_SYSREGS + 0x030)
-#define V2M_SYS_FLAGSCLR        (V2M_SYSREGS + 0x034)
-#define V2M_SYS_NVFLAGS         (V2M_SYSREGS + 0x038)
-#define V2M_SYS_NVFLAGSSET      (V2M_SYSREGS + 0x038)
-#define V2M_SYS_NVFLAGSCLR      (V2M_SYSREGS + 0x03c)
-#define V2M_SYS_MCI             (V2M_SYSREGS + 0x048)
-#define V2M_SYS_FLASH           (V2M_SYSREGS + 0x03c)
-#define V2M_SYS_CFGSW           (V2M_SYSREGS + 0x058)
-#define V2M_SYS_24MHZ           (V2M_SYSREGS + 0x05c)
-#define V2M_SYS_MISC            (V2M_SYSREGS + 0x060)
-#define V2M_SYS_DMA             (V2M_SYSREGS + 0x064)
-#define V2M_SYS_PROCID0         (V2M_SYSREGS + 0x084)
-#define V2M_SYS_PROCID1         (V2M_SYSREGS + 0x088)
-#define V2M_SYS_CFGDATA         (V2M_SYSREGS + 0x0a0)
-#define V2M_SYS_CFGCTRL         (V2M_SYSREGS + 0x0a4)
-#define V2M_SYS_CFGSTAT         (V2M_SYSREGS + 0x0a8)
-
-#define V2M_TIMER0              (V2M_TIMER01 + 0x000)
-#define V2M_TIMER1              (V2M_TIMER01 + 0x020)
-
-#define V2M_TIMER2              (V2M_TIMER23 + 0x000)
-#define V2M_TIMER3              (V2M_TIMER23 + 0x020)
+/*
+ * Offsets from SYSREGS base
+ */
+#define V2M_SYS_ID              0x000
+#define V2M_SYS_SW              0x004
+#define V2M_SYS_LED             0x008
+#define V2M_SYS_100HZ           0x024
+#define V2M_SYS_FLAGS           0x030
+#define V2M_SYS_FLAGSSET        0x030
+#define V2M_SYS_FLAGSCLR        0x034
+#define V2M_SYS_NVFLAGS         0x038
+#define V2M_SYS_NVFLAGSSET      0x038
+#define V2M_SYS_NVFLAGSCLR      0x03c
+#define V2M_SYS_MCI             0x048
+#define V2M_SYS_FLASH           0x03c
+#define V2M_SYS_CFGSW           0x058
+#define V2M_SYS_24MHZ           0x05c
+#define V2M_SYS_MISC            0x060
+#define V2M_SYS_DMA             0x064
+#define V2M_SYS_PROCID0         0x084
+#define V2M_SYS_PROCID1         0x088
+#define V2M_SYS_CFGDATA         0x0a0
+#define V2M_SYS_CFGCTRL         0x0a4
+#define V2M_SYS_CFGSTAT         0x0a8
 
 
 /*
@@ -117,6 +114,13 @@
 
 int v2m_cfg_write(u32 devfn, u32 data);
 int v2m_cfg_read(u32 devfn, u32 *data);
+void v2m_flags_set(u32 data);
+
+/*
+ * Miscellaneous
+ */
+#define SYS_MISC_MASTERSITE     (1 << 14)
+#define SYS_PROCIDx_HBI_MASK    0xfff
 
 /*
  * Core tile IDs
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
deleted file mode 100644
index f653a8e265bd..000000000000
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-vexpress/include/mach/uncompress.h b/arch/arm/mach-vexpress/include/mach/uncompress.h
index 7972c5748d0e..7dab5596b868 100644
--- a/arch/arm/mach-vexpress/include/mach/uncompress.h
+++ b/arch/arm/mach-vexpress/include/mach/uncompress.h
@@ -22,7 +22,27 @@
 #define AMBA_UART_CR(base)      (*(volatile unsigned char *)((base) + 0x30))
 #define AMBA_UART_FR(base)      (*(volatile unsigned char *)((base) + 0x18))
 
-#define get_uart_base() (0x10000000 + 0x00009000)
+#define UART_BASE       0x10009000
+#define UART_BASE_RS1   0x1c090000
+
+static unsigned long get_uart_base(void)
+{
+        unsigned long mpcore_periph;
+
+        /*
+         * Make an educated guess regarding the memory map:
+         * - the original A9 core tile, which has MPCore peripherals
+         *   located at 0x1e000000, should use UART at 0x10009000
+         * - all other (RS1 complaint) tiles use UART mapped
+         *   at 0x1c090000
+         */
+        asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (mpcore_periph));
+
+        if (mpcore_periph == 0x1e000000)
+                return UART_BASE;
+        else
+                return UART_BASE_RS1;
+}
 
 /*
  * This does not append a newline
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 124ffb169093..14ba1128ae8d 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -12,21 +12,168 @@
 #include <linux/errno.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/of_fdt.h>
+
+#include <asm/smp_scu.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach/map.h>
 
 #include <mach/motherboard.h>
-#define V2M_PA_CS7 0x10000000
 
 #include "core.h"
 
 extern void versatile_secondary_startup(void);
 
+#if defined(CONFIG_OF)
+
+static enum {
+        GENERIC_SCU,
+        CORTEX_A9_SCU,
+} vexpress_dt_scu __initdata = GENERIC_SCU;
+
+static struct map_desc vexpress_dt_cortex_a9_scu_map __initdata = {
+        .virtual        = V2T_PERIPH,
+        /* .pfn set in vexpress_dt_init_cortex_a9_scu() */
+        .length         = SZ_128,
+        .type           = MT_DEVICE,
+};
+
+static void *vexpress_dt_cortex_a9_scu_base __initdata;
+
+const static char *vexpress_dt_cortex_a9_match[] __initconst = {
+        "arm,cortex-a5-scu",
+        "arm,cortex-a9-scu",
+        NULL
+};
+
+static int __init vexpress_dt_find_scu(unsigned long node,
+                const char *uname, int depth, void *data)
+{
+        if (of_flat_dt_match(node, vexpress_dt_cortex_a9_match)) {
+                phys_addr_t phys_addr;
+                __be32 *reg = of_get_flat_dt_prop(node, "reg", NULL);
+
+                if (WARN_ON(!reg))
+                        return -EINVAL;
+
+                phys_addr = be32_to_cpup(reg);
+                vexpress_dt_scu = CORTEX_A9_SCU;
+
+                vexpress_dt_cortex_a9_scu_map.pfn = __phys_to_pfn(phys_addr);
+                iotable_init(&vexpress_dt_cortex_a9_scu_map, 1);
+                vexpress_dt_cortex_a9_scu_base = ioremap(phys_addr, SZ_256);
+                if (WARN_ON(!vexpress_dt_cortex_a9_scu_base))
+                        return -EFAULT;
+        }
+
+        return 0;
+}
+
+void __init vexpress_dt_smp_map_io(void)
+{
+        if (initial_boot_params)
+                WARN_ON(of_scan_flat_dt(vexpress_dt_find_scu, NULL));
+}
+
+static int __init vexpress_dt_cpus_num(unsigned long node, const char *uname,
+                int depth, void *data)
+{
+        static int prev_depth = -1;
+        static int nr_cpus = -1;
+
+        if (prev_depth > depth && nr_cpus > 0)
+                return nr_cpus;
+
+        if (nr_cpus < 0 && strcmp(uname, "cpus") == 0)
+                nr_cpus = 0;
+
+        if (nr_cpus >= 0) {
+                const char *device_type = of_get_flat_dt_prop(node,
+                                "device_type", NULL);
+
+                if (device_type && strcmp(device_type, "cpu") == 0)
+                        nr_cpus++;
+        }
+
+        prev_depth = depth;
+
+        return 0;
+}
+
+static void __init vexpress_dt_smp_init_cpus(void)
+{
+        int ncores = 0, i;
+
+        switch (vexpress_dt_scu) {
+        case GENERIC_SCU:
+                ncores = of_scan_flat_dt(vexpress_dt_cpus_num, NULL);
+                break;
+        case CORTEX_A9_SCU:
+                ncores = scu_get_core_count(vexpress_dt_cortex_a9_scu_base);
+                break;
+        default:
+                WARN_ON(1);
+                break;
+        }
+
+        if (ncores < 2)
+                return;
+
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                                ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
+        }
+
+        for (i = 0; i < ncores; ++i)
+                set_cpu_possible(i, true);
+
+        set_smp_cross_call(gic_raise_softirq);
+}
+
+static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
+{
+        int i;
+
+        switch (vexpress_dt_scu) {
+        case GENERIC_SCU:
+                for (i = 0; i < max_cpus; i++)
+                        set_cpu_present(i, true);
+                break;
+        case CORTEX_A9_SCU:
+                scu_enable(vexpress_dt_cortex_a9_scu_base);
+                break;
+        default:
+                WARN_ON(1);
+                break;
+        }
+}
+
+#else
+
+static void __init vexpress_dt_smp_init_cpus(void)
+{
+        WARN_ON(1);
+}
+
+void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
+{
+        WARN_ON(1);
+}
+
+#endif
+
 /*
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
 void __init smp_init_cpus(void)
 {
-        ct_desc->init_cpu_map();
+        if (ct_desc)
+                ct_desc->init_cpu_map();
+        else
+                vexpress_dt_smp_init_cpus();
+
 }
 
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
@@ -35,7 +182,10 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
          * Initialise the present map, which describes the set of CPUs
          * actually populated at the present time.
          */
-        ct_desc->smp_enable(max_cpus);
+        if (ct_desc)
+                ct_desc->smp_enable(max_cpus);
+        else
+                vexpress_dt_smp_prepare_cpus(max_cpus);
 
         /*
          * Write the address of secondary startup into the
@@ -43,7 +193,5 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
          * until it receives a soft interrupt, and then the
          * secondary CPU branches to this address.
          */
-        writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
-        writel(virt_to_phys(versatile_secondary_startup),
-                MMIO_P2V(V2M_SYS_FLAGSSET));
+        v2m_flags_set(virt_to_phys(versatile_secondary_startup));
 }
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index b4a28ca0e50a..47cdcca5a7e7 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -6,6 +6,10 @@
 #include <linux/amba/mmci.h>
 #include <linux/io.h>
 #include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
 #include <linux/smsc911x.h>
@@ -21,6 +25,8 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/hardware/arm_timer.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
 #include <asm/hardware/timer-sp.h>
 #include <asm/hardware/sp810.h>
 #include <asm/hardware/gic.h>
@@ -40,29 +46,45 @@
 
 static struct map_desc v2m_io_desc[] __initdata = {
         {
-                .virtual        = __MMIO_P2V(V2M_PA_CS7),
+                .virtual        = V2M_PERIPH,
                 .pfn            = __phys_to_pfn(V2M_PA_CS7),
                 .length         = SZ_128K,
                 .type           = MT_DEVICE,
         },
 };
 
-static void __init v2m_timer_init(void)
+static void __iomem *v2m_sysreg_base;
+
+static void __init v2m_sysctl_init(void __iomem *base)
 {
         u32 scctrl;
 
+        if (WARN_ON(!base))
+                return;
+
         /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
-        scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
+        scctrl = readl(base + SCCTRL);
         scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
         scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
-        writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
+        writel(scctrl, base + SCCTRL);
+}
+
+static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
+{
+        if (WARN_ON(!base || irq == NO_IRQ))
+                return;
+
+        writel(0, base + TIMER_1_BASE + TIMER_CTRL);
+        writel(0, base + TIMER_2_BASE + TIMER_CTRL);
 
-        writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
-        writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
+        sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
+        sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
+}
 
-        sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
-        sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0,
-                "v2m-timer0");
+static void __init v2m_timer_init(void)
+{
+        v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
+        v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
 }
 
 static struct sys_timer v2m_timer = {
@@ -82,14 +104,14 @@ int v2m_cfg_write(u32 devfn, u32 data)
         devfn |= SYS_CFG_START | SYS_CFG_WRITE;
 
         spin_lock(&v2m_cfg_lock);
-        val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
-        writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
+        val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
+        writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 
-        writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
-        writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
+        writel(data, v2m_sysreg_base +  V2M_SYS_CFGDATA);
+        writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 
         do {
-                val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
+                val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
         } while (val == 0);
         spin_unlock(&v2m_cfg_lock);
 
@@ -103,22 +125,28 @@ int v2m_cfg_read(u32 devfn, u32 *data)
         devfn |= SYS_CFG_START;
 
         spin_lock(&v2m_cfg_lock);
-        writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
-        writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
+        writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
+        writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 
         mb();
 
         do {
                 cpu_relax();
-                val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
+                val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
         } while (val == 0);
 
-        *data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
+        *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
         spin_unlock(&v2m_cfg_lock);
 
         return !!(val & SYS_CFG_ERR);
 }
 
+void __init v2m_flags_set(u32 data)
+{
+        writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
+        writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
+}
+
 
 static struct resource v2m_pcie_i2c_resource = {
         .start  = V2M_SERIAL_BUS_PCI,
@@ -204,7 +232,7 @@ static struct platform_device v2m_usb_device = {
 
 static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
 {
-        writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
+        writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
 }
 
 static struct physmap_flash_data v2m_flash_data = {
@@ -258,7 +286,7 @@ static struct platform_device v2m_cf_device = {
 
 static unsigned int v2m_mmci_status(struct device *dev)
 {
-        return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
+        return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
 }
 
 static struct mmci_platform_data v2m_mmci_data = {
@@ -266,16 +294,16 @@ static struct mmci_platform_data v2m_mmci_data = {
         .status         = v2m_mmci_status,
 };
 
-static AMBA_DEVICE(aaci,  "mb:aaci",  V2M_AACI, NULL);
-static AMBA_DEVICE(mmci,  "mb:mmci",  V2M_MMCI, &v2m_mmci_data);
-static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
-static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
-static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
-static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
-static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
-static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
-static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
-static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);
+static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
+static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
+static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
+static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
+static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
+static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
+static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
+static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
+static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
+static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 
 static struct amba_device *v2m_amba_devs[] __initdata = {
         &aaci_device,
@@ -371,7 +399,7 @@ static void __init v2m_init_early(void)
 {
         ct_desc->init_early();
         clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
-        versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
+        versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 }
 
 static void v2m_power_off(void)
@@ -400,20 +428,23 @@ static void __init v2m_populate_ct_desc(void)
         u32 current_tile_id;
 
         ct_desc = NULL;
-        current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
+        current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
+                                & V2M_CT_ID_MASK;
 
         for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
                 if (ct_descs[i]->id == current_tile_id)
                         ct_desc = ct_descs[i];
 
         if (!ct_desc)
-                panic("vexpress: failed to populate core tile description "
-                      "for tile ID 0x%8x\n", current_tile_id);
+                panic("vexpress: this kernel does not support core tile ID 0x%08x when booting via ATAGs.\n"
+                      "You may need a device tree blob or a different kernel to boot on this board.\n",
+                      current_tile_id);
 }
 
 static void __init v2m_map_io(void)
 {
         iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
+        v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
         v2m_populate_ct_desc();
         ct_desc->map_io();
 }
@@ -452,3 +483,205 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
         .init_machine   = v2m_init,
         .restart        = v2m_restart,
 MACHINE_END
+
+#if defined(CONFIG_ARCH_VEXPRESS_DT)
+
+static struct map_desc v2m_rs1_io_desc __initdata = {
+        .virtual        = V2M_PERIPH,
+        .pfn            = __phys_to_pfn(0x1c000000),
+        .length         = SZ_2M,
+        .type           = MT_DEVICE,
+};
+
+static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname,
+                int depth, void *data)
+{
+        const char **map = data;
+
+        if (strcmp(uname, "motherboard") != 0)
+                return 0;
+
+        *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL);
+
+        return 1;
+}
+
+void __init v2m_dt_map_io(void)
+{
+        const char *map = NULL;
+
+        of_scan_flat_dt(v2m_dt_scan_memory_map, &map);
+
+        if (map && strcmp(map, "rs1") == 0)
+                iotable_init(&v2m_rs1_io_desc, 1);
+        else
+                iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
+
+#if defined(CONFIG_SMP)
+        vexpress_dt_smp_map_io();
+#endif
+}
+
+static struct clk_lookup v2m_dt_lookups[] = {
+        {       /* AMBA bus clock */
+                .con_id         = "apb_pclk",
+                .clk            = &dummy_apb_pclk,
+        }, {    /* SP804 timers */
+                .dev_id         = "sp804",
+                .con_id         = "v2m-timer0",
+                .clk            = &v2m_sp804_clk,
+        }, {    /* SP804 timers */
+                .dev_id         = "sp804",
+                .con_id         = "v2m-timer1",
+                .clk            = &v2m_sp804_clk,
+        }, {    /* PL180 MMCI */
+                .dev_id         = "mb:mmci", /* 10005000.mmci */
+                .clk            = &osc2_clk,
+        }, {    /* PL050 KMI0 */
+                .dev_id         = "10006000.kmi",
+                .clk            = &osc2_clk,
+        }, {    /* PL050 KMI1 */
+                .dev_id         = "10007000.kmi",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART0 */
+                .dev_id         = "10009000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART1 */
+                .dev_id         = "1000a000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART2 */
+                .dev_id         = "1000b000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART3 */
+                .dev_id         = "1000c000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* SP805 WDT */
+                .dev_id         = "1000f000.wdt",
+                .clk            = &v2m_ref_clk,
+        }, {    /* PL111 CLCD */
+                .dev_id         = "1001f000.clcd",
+                .clk            = &osc1_clk,
+        },
+        /* RS1 memory map */
+        {       /* PL180 MMCI */
+                .dev_id         = "mb:mmci", /* 1c050000.mmci */
+                .clk            = &osc2_clk,
+        }, {    /* PL050 KMI0 */
+                .dev_id         = "1c060000.kmi",
+                .clk            = &osc2_clk,
+        }, {    /* PL050 KMI1 */
+                .dev_id         = "1c070000.kmi",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART0 */
+                .dev_id         = "1c090000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART1 */
+                .dev_id         = "1c0a0000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART2 */
+                .dev_id         = "1c0b0000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* PL011 UART3 */
+                .dev_id         = "1c0c0000.uart",
+                .clk            = &osc2_clk,
+        }, {    /* SP805 WDT */
+                .dev_id         = "1c0f0000.wdt",
+                .clk            = &v2m_ref_clk,
+        }, {    /* PL111 CLCD */
+                .dev_id         = "1c1f0000.clcd",
+                .clk            = &osc1_clk,
+        },
+};
+
+void __init v2m_dt_init_early(void)
+{
+        struct device_node *node;
+        u32 dt_hbi;
+
+        node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
+        v2m_sysreg_base = of_iomap(node, 0);
+        if (WARN_ON(!v2m_sysreg_base))
+                return;
+
+        /* Confirm board type against DT property, if available */
+        if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
+                u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
+                u32 id = readl(v2m_sysreg_base + (misc & SYS_MISC_MASTERSITE ?
+                                V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
+                u32 hbi = id & SYS_PROCIDx_HBI_MASK;
+
+                if (WARN_ON(dt_hbi != hbi))
+                        pr_warning("vexpress: DT HBI (%x) is not matching "
+                                        "hardware (%x)!\n", dt_hbi, hbi);
+        }
+
+        clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
+        versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
+}
+
+static  struct of_device_id vexpress_irq_match[] __initdata = {
+        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+        {}
+};
+
+static void __init v2m_dt_init_irq(void)
+{
+        of_irq_init(vexpress_irq_match);
+}
+
+static void __init v2m_dt_timer_init(void)
+{
+        struct device_node *node;
+        const char *path;
+        int err;
+
+        node = of_find_compatible_node(NULL, NULL, "arm,sp810");
+        v2m_sysctl_init(of_iomap(node, 0));
+
+        err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
+        if (WARN_ON(err))
+                return;
+        node = of_find_node_by_path(path);
+        v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
+}
+
+static struct sys_timer v2m_dt_timer = {
+        .init = v2m_dt_timer_init,
+};
+
+static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
+        OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash",
+                        &v2m_flash_data),
+        OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data),
+        /* RS1 memory map */
+        OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash",
+                        &v2m_flash_data),
+        OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data),
+        {}
+};
+
+static void __init v2m_dt_init(void)
+{
+        l2x0_of_init(0x00400000, 0xfe0fffff);
+        of_platform_populate(NULL, of_default_bus_match_table,
+                        v2m_dt_auxdata_lookup, NULL);
+        pm_power_off = v2m_power_off;
+}
+
+const static char *v2m_dt_match[] __initconst = {
+        "arm,vexpress",
+        NULL,
+};
+
+DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
+        .dt_compat      = v2m_dt_match,
+        .map_io         = v2m_dt_map_io,
+        .init_early     = v2m_dt_init_early,
+        .init_irq       = v2m_dt_init_irq,
+        .timer          = &v2m_dt_timer,
+        .init_machine   = v2m_dt_init,
+        .handle_irq     = gic_handle_irq,
+        .restart        = v2m_restart,
+MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h
index d6c757eaf26b..58fa8010ee61 100644
--- a/arch/arm/mach-vt8500/include/mach/system.h
+++ b/arch/arm/mach-vt8500/include/mach/system.h
@@ -7,11 +7,6 @@
 /* PM Software Reset request register */
 #define VT8500_PMSR_VIRT        0xf8130060
 
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         writel(1, VT8500_PMSR_VIRT);
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 78110befb7a9..db82568a998a 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = {
 
 void __init nuc900_board_init(struct platform_device **device, int size)
 {
+        disable_hlt();
         platform_add_devices(device, size);
         platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev));
         spi_register_board_info(nuc900_spi_board_info,
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
deleted file mode 100644
index 2aaeb9311619..000000000000
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/system.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/system.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-static void arch_idle(void)
-{
-}
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
deleted file mode 100644
index 8e88e0b8d2ba..000000000000
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/system.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_SYSTEM_H__
-#define __MACH_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1a3ca2488164..7edef9121632 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -631,7 +631,8 @@ comment "Processor Features"
 
 config ARM_LPAE
         bool "Support for the Large Physical Address Extension"
-        depends on MMU && CPU_V7
+        depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
+                !CPU_32v4 && !CPU_32v3
         help
           Say Y if you have an ARMv7 processor supporting the LPAE page
           table format and you would like to access memory beyond the
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 7a24d39661f0..a655d3da386d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -55,7 +55,7 @@ loop1:
         cmp     r1, #2                          @ see what cache we have at this level
         blt     skip                            @ skip if no cache, or just i-cache
 #ifdef CONFIG_PREEMPT
-        save_and_disable_irqs r9                @ make cssr&csidr read atomic
+        save_and_disable_irqs_notrace r9        @ make cssr&csidr read atomic
 #endif
         mcr     p15, 2, r10, c0, c0, 0          @ select current cache level in cssr
         isb                                     @ isb to sych the new cssr&csidr
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 1bf0df81bdc6..16d10a807a63 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -65,6 +65,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
 extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
+extern int mx27_clocks_init_dt(void);
 extern int mx51_clocks_init_dt(void);
 extern int mx53_clocks_init_dt(void);
 extern int mx6q_clocks_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
deleted file mode 100644
index 13ad0df2e860..000000000000
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *  Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MXC_SYSTEM_H__
-#define __ASM_ARCH_MXC_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 06383b51e655..4de7d1e79e73 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -69,6 +69,7 @@ void __init omap_reserve(void)
         omap_vram_reserve_sdram_memblock();
         omap_dsp_reserve_sdram_memblock();
         omap_secure_ram_reserve_memblock();
+        omap_barrier_reserve_memblock();
 }
 
 void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
index 3047ff923a63..8c7994ce9869 100644
--- a/arch/arm/plat-omap/include/plat/omap-secure.h
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
 { }
 #endif
 
+#ifdef CONFIG_OMAP4_ERRATA_I688
+extern int omap_barrier_reserve_memblock(void);
+#else
+static inline void omap_barrier_reserve_memblock(void)
+{ }
+#endif
 #endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
deleted file mode 100644
index 8e5ebd74b129..000000000000
--- a/arch/arm/plat-omap/include/plat/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copied from arch/arm/mach-sa1100/include/mach/system.h
- * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 21f1fda8b661..32a09931350c 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -32,6 +32,7 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
+#include <mach/regs-clock.h>
 #include <asm/irq.h>
 #include <asm/cacheflush.h>
 
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void)
         return __raw_readl(S3C2410_GSTATUS1);
 }
 
+static void s3c24xx_default_idle(void)
+{
+        unsigned long tmp;
+        int i;
+
+        /* idle the system by using the idle mode which will wait for an
+         * interrupt to happen before restarting the system.
+         */
+
+        /* Warning: going into idle state upsets jtag scanning */
+
+        __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
+
+        /* the samsung port seems to do a loop and then unset idle.. */
+        for (i = 0; i < 50; i++)
+                tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
+
+        /* this bit is not cleared on re-start... */
+
+        __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
+}
+
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
+        arm_pm_idle = s3c24xx_default_idle;
+
         /* initialise the io descriptors we need for initialisation */
         iotable_init(mach_desc, size);
         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
deleted file mode 100644
index 86c6f83b44cc..000000000000
--- a/arch/arm/plat-spear/include/plat/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/system.h
- *
- * SPEAr platform specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_SYSTEM_H
-#define __PLAT_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-versatile/localtimer.c b/arch/arm/plat-versatile/localtimer.c
index 0fb3961999b5..e15668793159 100644
--- a/arch/arm/plat-versatile/localtimer.c
+++ b/arch/arm/plat-versatile/localtimer.c
@@ -11,16 +11,42 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/clockchips.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 
 #include <asm/smp_twd.h>
 #include <asm/localtimer.h>
 #include <mach/irqs.h>
 
+const static struct of_device_id twd_of_match[] __initconst = {
+       { .compatible = "arm,cortex-a9-twd-timer",      },
+       { .compatible = "arm,cortex-a5-twd-timer",      },
+       { .compatible = "arm,arm11mp-twd-timer",        },
+       { },
+};
+
 /*
  * Setup the local clock events for a CPU.
  */
 int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
+#if defined(CONFIG_OF)
+        static int dt_node_probed;
+
+        /* Look for TWD node only once */
+        if (!dt_node_probed) {
+                struct device_node *node = of_find_matching_node(NULL,
+                                twd_of_match);
+
+                if (node)
+                        twd_base = of_iomap(node, 0);
+
+                dt_node_probed = 1;
+        }
+#endif
+        if (!twd_base)
+                return -ENXIO;
+
         evt->irq = IRQ_LOCALTIMER;
         twd_timer_setup(evt);
         return 0;
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 402a7bb72669..889c544688ca 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1055,8 +1055,6 @@ struct platform_device *__init at32_add_device_usart(unsigned int id)
         return at32_usarts[id];
 }
 
-struct platform_device *atmel_default_console_device;
-
 void __init at32_setup_serial_console(unsigned int usart_id)
 {
         atmel_default_console_device = at32_usarts[usart_id];
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h
index 8181293115e4..16a24b14146c 100644
--- a/arch/avr32/mach-at32ap/include/mach/cpu.h
+++ b/arch/avr32/mach-at32ap/include/mach/cpu.h
@@ -30,9 +30,6 @@
 #define cpu_is_at91sam9261()    (0)
 #define cpu_is_at91sam9263()    (0)
 #define cpu_is_at91sam9rl()     (0)
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
 #define cpu_is_at91sam9g10()    (0)
 #define cpu_is_at91sam9g20()    (0)
 #define cpu_is_at91sam9g45()    (0)
diff --git a/arch/c6x/boot/Makefile b/arch/c6x/boot/Makefile
index ecca820e6041..6891257d514c 100644
--- a/arch/c6x/boot/Makefile
+++ b/arch/c6x/boot/Makefile
@@ -13,7 +13,7 @@ obj-y += linked_dtb.o
 endif
 
 $(obj)/%.dtb: $(src)/dts/%.dts FORCE
-        $(call cmd,dtc)
+        $(call if_changed_dep,dtc)
 
 quiet_cmd_cp = CP      $< $@$2
         cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h
index 756bde4fb4f8..3c793682e5d9 100644
--- a/arch/m68k/include/asm/mcf_pgtable.h
+++ b/arch/m68k/include/asm/mcf_pgtable.h
@@ -78,7 +78,8 @@
                                  | CF_PAGE_READABLE \
                                  | CF_PAGE_WRITABLE \
                                  | CF_PAGE_EXEC \
-                                 | CF_PAGE_SYSTEM)
+                                 | CF_PAGE_SYSTEM \
+                                 | CF_PAGE_SHARED)
 
 #define PAGE_COPY       __pgprot(CF_PAGE_VALID \
                                  | CF_PAGE_ACCESSED \
diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c
index babd5a97cdcb..875b800ef0dd 100644
--- a/arch/m68k/mm/mcfmmu.c
+++ b/arch/m68k/mm/mcfmmu.c
@@ -87,7 +87,7 @@ void __init paging_init(void)
 
 int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
 {
-        unsigned long flags, mmuar;
+        unsigned long flags, mmuar, mmutr;
         struct mm_struct *mm;
         pgd_t *pgd;
         pmd_t *pmd;
@@ -137,9 +137,10 @@ int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
         if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
                 set_pte(pte, pte_wrprotect(*pte));
 
-        mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
-                (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
-                >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
+        mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V;
+        if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE))
+                mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT;
+        mmu_write(MMUTR, mmutr);
 
         mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
                 ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
index 863889fc31c9..281e38c2b6c7 100644
--- a/arch/m68k/platform/coldfire/entry.S
+++ b/arch/m68k/platform/coldfire/entry.S
@@ -136,7 +136,7 @@ Luser_return:
         movel   %sp,%d1                 /* get thread_info pointer */
         andl    #-THREAD_SIZE,%d1       /* at base of kernel stack */
         movel   %d1,%a0
-        movel   %a0@(TINFO_FLAGS),%d1   /* get thread_info->flags */
+        moveb   %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */
         jne     Lwork_to_do             /* still work to do */
 
 Lreturn:
@@ -148,8 +148,6 @@ Lwork_to_do:
         btst    #TIF_NEED_RESCHED,%d1
         jne     reschedule
 
-        /* GERG: do we need something here for TRACEing?? */
-
 Lsignal_return:
         subql   #4,%sp                  /* dummy return address */
         SAVE_SWITCH_STACK
diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h
index 054537c5f9c9..e612ce4512c7 100644
--- a/arch/openrisc/include/asm/ptrace.h
+++ b/arch/openrisc/include/asm/ptrace.h
@@ -77,7 +77,6 @@ struct pt_regs {
         long  syscallno;        /* Syscall number (used by strace) */
         long dummy;             /* Cheap alignment fix */
 };
-#endif /* __ASSEMBLY__ */
 
 /* TODO: Rename this to REDZONE because that's what it is */
 #define STACK_FRAME_OVERHEAD  128  /* size of minimum stack frame */
@@ -87,6 +86,13 @@ struct pt_regs {
 #define user_stack_pointer(regs)        ((unsigned long)(regs)->sp)
 #define profile_pc(regs)                instruction_pointer(regs)
 
+static inline long regs_return_value(struct pt_regs *regs)
+{
+        return regs->gpr[11];
+}
+
+#endif /* __ASSEMBLY__ */
+
 /*
  * Offsets used by 'ptrace' system call interface.
  */
diff --git a/arch/openrisc/kernel/init_task.c b/arch/openrisc/kernel/init_task.c
index 45744a384927..ca534082d5f3 100644
--- a/arch/openrisc/kernel/init_task.c
+++ b/arch/openrisc/kernel/init_task.c
@@ -17,6 +17,7 @@
 
 #include <linux/init_task.h>
 #include <linux/mqueue.h>
+#include <linux/export.h>
 
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c
index 59b302338331..4bfead220956 100644
--- a/arch/openrisc/kernel/irq.c
+++ b/arch/openrisc/kernel/irq.c
@@ -23,6 +23,7 @@
 #include <linux/irq.h>
 #include <linux/seq_file.h>
 #include <linux/kernel_stat.h>
+#include <linux/export.h>
 
 #include <linux/irqflags.h>
 
diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c
index 656b94beab89..7259047d5f9d 100644
--- a/arch/openrisc/kernel/ptrace.c
+++ b/arch/openrisc/kernel/ptrace.c
@@ -188,11 +188,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
                  */
                 ret = -1L;
 
-        /* Are these regs right??? */
-        if (unlikely(current->audit_context))
-                audit_syscall_entry(audit_arch(), regs->syscallno,
-                                    regs->gpr[3], regs->gpr[4],
-                                    regs->gpr[5], regs->gpr[6]);
+        audit_syscall_entry(audit_arch(), regs->syscallno,
+                            regs->gpr[3], regs->gpr[4],
+                            regs->gpr[5], regs->gpr[6]);
 
         return ret ? : regs->syscallno;
 }
@@ -201,9 +199,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
 {
         int step;
 
-        if (unlikely(current->audit_context))
-                audit_syscall_exit(AUDITSC_RESULT(regs->gpr[11]),
-                                   regs->gpr[11]);
+        audit_syscall_exit(regs);
 
         step = test_thread_flag(TIF_SINGLESTEP);
         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index 55cca1dac431..19ab7b2ea1cd 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -31,7 +31,11 @@ ifdef CONFIG_64BIT
 UTS_MACHINE     := parisc64
 CHECKFLAGS      += -D__LP64__=1 -m64
 WIDTH           := 64
+
+# FIXME: if no default set, should really try to locate dynamically
+ifeq ($(CROSS_COMPILE),)
 CROSS_COMPILE   := hppa64-linux-gnu-
+endif
 else # 32-bit
 WIDTH           :=
 endif
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 4f80cf1ce77b..3e57a00b8cba 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1213,7 +1213,7 @@ do_user_signal:			/* r10 contains MSR_KERNEL here */
         stw     r3,_TRAP(r1)
 2:      addi    r3,r1,STACK_FRAME_OVERHEAD
         mr      r4,r9
-        bl      do_signal
+        bl      do_notify_resume
         REST_NVGPRS(r1)
         b       recheck
 
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index d834425186ae..866462cbe2d8 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -751,12 +751,16 @@ user_work:
 
         andi.   r0,r4,_TIF_NEED_RESCHED
         beq     1f
+        li      r5,1
+        TRACE_AND_RESTORE_IRQ(r5);
         bl      .schedule
         b       .ret_from_except_lite
 
 1:      bl      .save_nvgprs
+        li      r5,1
+        TRACE_AND_RESTORE_IRQ(r5);
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        bl      .do_signal
+        bl      .do_notify_resume
         b       .ret_from_except
 
 unrecov_restore:
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 3844ca7c5099..15c5a4f6de01 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -774,8 +774,8 @@ alignment_common:
 program_check_common:
         EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
         bl      .save_nvgprs
-        addi    r3,r1,STACK_FRAME_OVERHEAD
         DISABLE_INTS
+        addi    r3,r1,STACK_FRAME_OVERHEAD
         bl      .program_check_exception
         b       .ret_from_except
 
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index 2300426e531a..ac6e437b1021 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -11,6 +11,7 @@
 
 #include <linux/tracehook.h>
 #include <linux/signal.h>
+#include <linux/key.h>
 #include <asm/hw_breakpoint.h>
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
@@ -113,8 +114,9 @@ static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka,
         }
 }
 
-static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
+static int do_signal(struct pt_regs *regs)
 {
+        sigset_t *oldset;
         siginfo_t info;
         int signr;
         struct k_sigaction ka;
@@ -123,7 +125,7 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
 
         if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK)
                 oldset = &current->saved_sigmask;
-        else if (!oldset)
+        else
                 oldset = &current->blocked;
 
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
@@ -191,14 +193,16 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
         return ret;
 }
 
-void do_signal(struct pt_regs *regs, unsigned long thread_info_flags)
+void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
 {
         if (thread_info_flags & _TIF_SIGPENDING)
-                do_signal_pending(NULL, regs);
+                do_signal(regs);
 
         if (thread_info_flags & _TIF_NOTIFY_RESUME) {
                 clear_thread_flag(TIF_NOTIFY_RESUME);
                 tracehook_notify_resume(regs);
+                if (current->replacement_session_keyring)
+                        key_replace_session_keyring();
         }
 }
 
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index 6c0ddfc0603e..8dde973aaaf5 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -12,7 +12,7 @@
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
-extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags);
+extern void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags);
 
 extern void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
                                   size_t frame_size, int is_32);
diff --git a/arch/powerpc/platforms/wsp/smp.c b/arch/powerpc/platforms/wsp/smp.c
index 71bd105f3863..0ba103ae83a5 100644
--- a/arch/powerpc/platforms/wsp/smp.c
+++ b/arch/powerpc/platforms/wsp/smp.c
@@ -71,7 +71,7 @@ int __devinit smp_a2_kick_cpu(int nr)
 
 static int __init smp_a2_probe(void)
 {
-        return cpus_weight(cpu_possible_map);
+        return num_possible_cpus();
 }
 
 static struct smp_ops_t a2_smp_ops = {
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index d1727584230a..6d99a5fcc090 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -227,6 +227,9 @@ config COMPAT
 config SYSVIPC_COMPAT
         def_bool y if COMPAT && SYSVIPC
 
+config KEYS_COMPAT
+        def_bool y if COMPAT && KEYS
+
 config AUDIT_ARCH
         def_bool y
 
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index 2e49748b27da..234f1d859cea 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -172,13 +172,6 @@ static inline int is_compat_task(void)
         return is_32bit_task();
 }
 
-#else
-
-static inline int is_compat_task(void)
-{
-        return 0;
-}
-
 #endif
 
 static inline void __user *arch_compat_alloc_user_space(long len)
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 18c51df9fe06..ff605a39cf43 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -662,7 +662,7 @@ ENTRY(sys32_getresuid16_wrapper)
 ENTRY(sys32_poll_wrapper)
         llgtr   %r2,%r2                 # struct pollfd *
         llgfr   %r3,%r3                 # unsigned int
-        lgfr    %r4,%r4                 # long
+        lgfr    %r4,%r4                 # int
         jg      sys_poll                # branch to system call
 
 ENTRY(sys32_setresgid16_wrapper)
diff --git a/arch/s390/kernel/crash_dump.c b/arch/s390/kernel/crash_dump.c
index 39f8fd4438fc..c383ce440d99 100644
--- a/arch/s390/kernel/crash_dump.c
+++ b/arch/s390/kernel/crash_dump.c
@@ -11,7 +11,6 @@
 #include <linux/module.h>
 #include <linux/gfp.h>
 #include <linux/slab.h>
-#include <linux/crash_dump.h>
 #include <linux/bootmem.h>
 #include <linux/elf.h>
 #include <asm/ipl.h>
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 3201ae447990..e795933eb2cb 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -29,7 +29,6 @@
 #include <asm/irq.h>
 #include <asm/timer.h>
 #include <asm/nmi.h>
-#include <asm/compat.h>
 #include <asm/smp.h>
 #include "entry.h"
 
@@ -76,7 +75,6 @@ static void default_idle(void)
         if (test_thread_flag(TIF_MCCK_PENDING)) {
                 local_mcck_enable();
                 local_irq_enable();
-                s390_handle_mcck();
                 return;
         }
         trace_hardirqs_on();
@@ -93,10 +91,12 @@ void cpu_idle(void)
         for (;;) {
                 tick_nohz_idle_enter();
                 rcu_idle_enter();
-                while (!need_resched())
+                while (!need_resched() && !test_thread_flag(TIF_MCCK_PENDING))
                         default_idle();
                 rcu_idle_exit();
                 tick_nohz_idle_exit();
+                if (test_thread_flag(TIF_MCCK_PENDING))
+                        s390_handle_mcck();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 9d82ed4bcb27..61f95489d70c 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -20,8 +20,8 @@
 #include <linux/regset.h>
 #include <linux/tracehook.h>
 #include <linux/seccomp.h>
+#include <linux/compat.h>
 #include <trace/syscall.h>
-#include <asm/compat.h>
 #include <asm/segment.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 354de0763eff..3b2efc81f34e 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -46,6 +46,7 @@
 #include <linux/kexec.h>
 #include <linux/crash_dump.h>
 #include <linux/memory.h>
+#include <linux/compat.h>
 
 #include <asm/ipl.h>
 #include <asm/uaccess.h>
@@ -59,7 +60,6 @@
 #include <asm/ptrace.h>
 #include <asm/sections.h>
 #include <asm/ebcdic.h>
-#include <asm/compat.h>
 #include <asm/kvm_virtio.h>
 #include <asm/diag.h>
 
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index a8ba840294ff..2d421d90fada 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -30,7 +30,6 @@
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/lowcore.h>
-#include <asm/compat.h>
 #include "entry.h"
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index fa02f443f5f6..14da278febbf 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -113,11 +113,14 @@ static void fixup_clock_comparator(unsigned long long delta)
 static int s390_next_ktime(ktime_t expires,
                            struct clock_event_device *evt)
 {
+        struct timespec ts;
         u64 nsecs;
 
-        nsecs = ktime_to_ns(ktime_sub(expires, ktime_get_monotonic_offset()));
+        ts.tv_sec = ts.tv_nsec = 0;
+        monotonic_to_bootbased(&ts);
+        nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
         do_div(nsecs, 125);
-        S390_lowcore.clock_comparator = TOD_UNIX_EPOCH + (nsecs << 9);
+        S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
         set_clock_comparator(S390_lowcore.clock_comparator);
         return 0;
 }
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 354dd39073ef..e8fcd928dc78 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -36,7 +36,6 @@
 #include <asm/pgtable.h>
 #include <asm/irq.h>
 #include <asm/mmu_context.h>
-#include <asm/compat.h>
 #include "../kernel/entry.h"
 
 #ifndef CONFIG_64BIT
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 5d633019d8f3..50236610de83 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -223,16 +223,38 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 #ifdef CONFIG_MEMORY_HOTPLUG
 int arch_add_memory(int nid, u64 start, u64 size)
 {
-        struct pglist_data *pgdat;
+        unsigned long zone_start_pfn, zone_end_pfn, nr_pages;
+        unsigned long start_pfn = PFN_DOWN(start);
+        unsigned long size_pages = PFN_DOWN(size);
         struct zone *zone;
         int rc;
 
-        pgdat = NODE_DATA(nid);
-        zone = pgdat->node_zones + ZONE_MOVABLE;
         rc = vmem_add_mapping(start, size);
         if (rc)
                 return rc;
-        rc = __add_pages(nid, zone, PFN_DOWN(start), PFN_DOWN(size));
+        for_each_zone(zone) {
+                if (zone_idx(zone) != ZONE_MOVABLE) {
+                        /* Add range within existing zone limits */
+                        zone_start_pfn = zone->zone_start_pfn;
+                        zone_end_pfn = zone->zone_start_pfn +
+                                       zone->spanned_pages;
+                } else {
+                        /* Add remaining range to ZONE_MOVABLE */
+                        zone_start_pfn = start_pfn;
+                        zone_end_pfn = start_pfn + size_pages;
+                }
+                if (start_pfn < zone_start_pfn || start_pfn >= zone_end_pfn)
+                        continue;
+                nr_pages = (start_pfn + size_pages > zone_end_pfn) ?
+                           zone_end_pfn - start_pfn : size_pages;
+                rc = __add_pages(nid, zone, start_pfn, nr_pages);
+                if (rc)
+                        break;
+                start_pfn += nr_pages;
+                size_pages -= nr_pages;
+                if (!size_pages)
+                        break;
+        }
         if (rc)
                 vmem_remove_mapping(start, size);
         return rc;
diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
index f09c74881b7e..a0155c02e324 100644
--- a/arch/s390/mm/mmap.c
+++ b/arch/s390/mm/mmap.c
@@ -29,8 +29,8 @@
 #include <linux/mman.h>
 #include <linux/module.h>
 #include <linux/random.h>
+#include <linux/compat.h>
 #include <asm/pgalloc.h>
-#include <asm/compat.h>
 
 static unsigned long stack_maxrandom_size(void)
 {
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 9a4d02f64f16..51b0738e13d1 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -574,7 +574,7 @@ static inline void page_table_free_pgste(unsigned long *table)
         page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
         mp = (struct gmap_pgtable *) page->index;
         BUG_ON(!list_empty(&mp->mapper));
-        pgtable_page_ctor(page);
+        pgtable_page_dtor(page);
         atomic_set(&page->_mapcount, -1);
         kfree(mp);
         __free_page(page);
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 0838154dd216..24b1ee410daa 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -169,6 +169,11 @@ static struct resource sh_eth_giga1_resources[] = {
                 .end    = 0xfee00fff,
                 .flags  = IORESOURCE_MEM,
         }, {
+                /* TSU */
+                .start  = 0xfee01800,
+                .end    = 0xfee01fff,
+                .flags  = IORESOURCE_MEM,
+        }, {
                 .start  = 316,
                 .end    = 316,
                 .flags  = IORESOURCE_IRQ,
@@ -210,20 +215,13 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
-        .chan_priv_tx   = {
-                .slave_id = SHDMA_SLAVE_MMCIF_TX,
-        },
-        .chan_priv_rx   = {
-                .slave_id = SHDMA_SLAVE_MMCIF_RX,
-        }
-};
-
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
-        .dma            = &sh7757lcr_mmcif_dma,
         .sup_pclk       = 0x0f,
-        .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
+        .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
+                          MMC_CAP_NONREMOVABLE,
         .ocr            = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 6418e95c2b6b..ebd0f818a25f 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -22,6 +22,7 @@
 #include <linux/i2c.h>
 #include <linux/smsc911x.h>
 #include <linux/gpio.h>
+#include <linux/videodev2.h>
 #include <media/ov772x.h>
 #include <media/soc_camera.h>
 #include <media/soc_camera_platform.h>
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 033ef2ba621f..cde7c0085ced 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -29,9 +29,11 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/sh_eth.h>
+#include <linux/videodev2.h>
 #include <video/sh_mobile_lcdc.h>
 #include <sound/sh_fsi.h>
 #include <media/sh_mobile_ceu.h>
+#include <media/soc_camera.h>
 #include <media/tw9910.h>
 #include <media/mt9t112.h>
 #include <asm/heartbeat.h>
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 2a18b06abdaf..5b382e1afaea 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -22,6 +22,7 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/i2c.h>
 #include <linux/usb/r8a66597.h>
+#include <linux/videodev2.h>
 #include <media/rj54n1cb0c.h>
 #include <media/soc_camera.h>
 #include <media/sh_mobile_ceu.h>
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 68c3d6f42896..d37ba2720527 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -21,9 +21,11 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/gpio.h>
+#include <linux/videodev2.h>
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
 #include <media/ov772x.h>
+#include <media/soc_camera.h>
 #include <media/tw9910.h>
 #include <asm/clock.h>
 #include <asm/machvec.h>
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 036fe1adaef1..2b07fc016950 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -24,6 +24,7 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/usb/r8a66597.h>
 #include <linux/sh_eth.h>
+#include <linux/videodev2.h>
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
 #include <sound/sh_fsi.h>
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index fa7b978cc727..fb8f14990743 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -74,7 +74,7 @@ struct pci_errors {
         { SH4_PCIINT_MLCK,      "master lock error" },
         { SH4_PCIINT_TABT,      "target-target abort" },
         { SH4_PCIINT_TRET,      "target retry time out" },
-        { SH4_PCIINT_MFDE,      "master function disable erorr" },
+        { SH4_PCIINT_MFDE,      "master function disable error" },
         { SH4_PCIINT_PRTY,      "address parity error" },
         { SH4_PCIINT_SERR,      "SERR" },
         { SH4_PCIINT_TWDP,      "data parity error for target write" },
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index a1c9c0daec10..071bcb4d4bfd 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -3,9 +3,10 @@
  *
  * This file is released under the GPLv2
  */
+#ifndef __ASM_SH_DEVICE_H
+#define __ASM_SH_DEVICE_H
 
-struct dev_archdata {
-};
+#include <asm-generic/device.h>
 
 struct platform_device;
 /* allocate contiguous memory chunk and fill in struct resource */
@@ -14,5 +15,4 @@ int platform_resource_setup_memory(struct platform_device *pdev,
 
 void plat_early_device_setup(void);
 
-struct pdev_archdata {
-};
+#endif /* __ASM_SH_DEVICE_H */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index b3c039a5064a..70bd96646f42 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -343,7 +343,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[HWBLK_CEU1]),
         CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
         CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
-        CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
+        CLKDEV_DEV_ID("sh_fsi.0", &mstp_clks[HWBLK_SPU]),
         CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
         CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
         CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index a7b2da6b3a1a..2875e8be4f72 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -133,7 +133,7 @@ static struct resource spi0_resources[] = {
         [0] = {
                 .start  = 0xfe002000,
                 .end    = 0xfe0020ff,
-                .flags  = IORESOURCE_MEM,
+                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
         },
         [1] = {
                 .start  = 86,
@@ -661,6 +661,25 @@ static struct platform_device spi0_device = {
         .resource       = spi0_resources,
 };
 
+static struct resource spi1_resources[] = {
+        {
+                .start  = 0xffd8ee70,
+                .end    = 0xffd8eeff,
+                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+        },
+        {
+                .start  = 54,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device spi1_device = {
+        .name   = "sh_spi",
+        .id     = 1,
+        .num_resources  = ARRAY_SIZE(spi1_resources),
+        .resource       = spi1_resources,
+};
+
 static struct resource usb_ehci_resources[] = {
         [0] = {
                 .start  = 0xfe4f1000,
@@ -720,6 +739,7 @@ static struct platform_device *sh7757_devices[] __initdata = {
         &dma2_device,
         &dma3_device,
         &spi0_device,
+        &spi1_device,
         &usb_ehci_device,
         &usb_ohci_device,
 };
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 3147a9a6fb8b..f624174bf239 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -63,7 +63,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         mp_ops->prepare_cpus(max_cpus);
 
 #ifndef CONFIG_HOTPLUG_CPU
-        init_cpu_present(&cpu_possible_map);
+        init_cpu_present(cpu_possible_mask);
 #endif
 }
 
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 4649a6ff0cfe..772caffba22f 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -27,7 +27,7 @@ static cpumask_t cpu_coregroup_map(unsigned int cpu)
          * Presently all SH-X3 SMP cores are multi-cores, so just keep it
          * simple until we have a method for determining topology..
          */
-        return cpu_possible_map;
+        return *cpu_possible_mask;
 }
 
 const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index ae08cbbfa569..949e2d3138a0 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -23,6 +23,7 @@
 #define MAX_OCACHE_PAGES        32
 #define MAX_ICACHE_PAGES        32
 
+#ifdef CONFIG_CACHE_WRITEBACK
 static void sh2a_flush_oc_line(unsigned long v, int way)
 {
         unsigned long addr = (v & 0x000007f0) | (way << 11);
@@ -34,6 +35,7 @@ static void sh2a_flush_oc_line(unsigned long v, int way)
                 __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr);
         }
 }
+#endif
 
 static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v)
 {
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index a850b4d8d14d..247904945d3f 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -29,10 +29,11 @@ extern unsigned int sig_xstate_size;
 extern void fpu_init(void);
 extern void mxcsr_feature_mask_init(void);
 extern int init_fpu(struct task_struct *child);
-extern void __math_state_restore(struct task_struct *);
 extern void math_state_restore(void);
 extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
 
+DECLARE_PER_CPU(struct task_struct *, fpu_owner_task);
+
 extern user_regset_active_fn fpregs_active, xfpregs_active;
 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
                                 xstateregs_get;
@@ -269,6 +270,16 @@ static inline int fpu_restore_checking(struct fpu *fpu)
 
 static inline int restore_fpu_checking(struct task_struct *tsk)
 {
+        /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
+           is pending.  Clear the x87 state here by setting it to fixed
+           values. "m" is a random variable that should be in L1 */
+        alternative_input(
+                ASM_NOP8 ASM_NOP2,
+                "emms\n\t"              /* clear stack tags */
+                "fildl %P[addr]",       /* set F?P to defined value */
+                X86_FEATURE_FXSAVE_LEAK,
+                [addr] "m" (tsk->thread.fpu.has_fpu));
+
         return fpu_restore_checking(&tsk->thread.fpu);
 }
 
@@ -279,19 +290,21 @@ static inline int restore_fpu_checking(struct task_struct *tsk)
  */
 static inline int __thread_has_fpu(struct task_struct *tsk)
 {
-        return tsk->thread.has_fpu;
+        return tsk->thread.fpu.has_fpu;
 }
 
 /* Must be paired with an 'stts' after! */
 static inline void __thread_clear_has_fpu(struct task_struct *tsk)
 {
-        tsk->thread.has_fpu = 0;
+        tsk->thread.fpu.has_fpu = 0;
+        percpu_write(fpu_owner_task, NULL);
 }
 
 /* Must be paired with a 'clts' before! */
 static inline void __thread_set_has_fpu(struct task_struct *tsk)
 {
-        tsk->thread.has_fpu = 1;
+        tsk->thread.fpu.has_fpu = 1;
+        percpu_write(fpu_owner_task, tsk);
 }
 
 /*
@@ -336,30 +349,36 @@ typedef struct { int preload; } fpu_switch_t;
  * We don't do that yet, so "fpu_lazy_restore()" always returns
  * false, but some day..
  */
-#define fpu_lazy_restore(tsk) (0)
-#define fpu_lazy_state_intact(tsk) do { } while (0)
+static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
+{
+        return new == percpu_read_stable(fpu_owner_task) &&
+                cpu == new->thread.fpu.last_cpu;
+}
 
-static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct task_struct *new)
+static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct task_struct *new, int cpu)
 {
         fpu_switch_t fpu;
 
         fpu.preload = tsk_used_math(new) && new->fpu_counter > 5;
         if (__thread_has_fpu(old)) {
-                if (__save_init_fpu(old))
-                        fpu_lazy_state_intact(old);
-                __thread_clear_has_fpu(old);
-                old->fpu_counter++;
+                if (!__save_init_fpu(old))
+                        cpu = ~0;
+                old->thread.fpu.last_cpu = cpu;
+                old->thread.fpu.has_fpu = 0;    /* But leave fpu_owner_task! */
 
                 /* Don't change CR0.TS if we just switch! */
                 if (fpu.preload) {
+                        new->fpu_counter++;
                         __thread_set_has_fpu(new);
                         prefetch(new->thread.fpu.state);
                 } else
                         stts();
         } else {
                 old->fpu_counter = 0;
+                old->thread.fpu.last_cpu = ~0;
                 if (fpu.preload) {
-                        if (fpu_lazy_restore(new))
+                        new->fpu_counter++;
+                        if (fpu_lazy_restore(new, cpu))
                                 fpu.preload = 0;
                         else
                                 prefetch(new->thread.fpu.state);
@@ -377,8 +396,10 @@ static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct ta
  */
 static inline void switch_fpu_finish(struct task_struct *new, fpu_switch_t fpu)
 {
-        if (fpu.preload)
-                __math_state_restore(new);
+        if (fpu.preload) {
+                if (unlikely(restore_fpu_checking(new)))
+                        __thread_fpu_end(new);
+        }
 }
 
 /*
@@ -451,8 +472,10 @@ static inline void kernel_fpu_begin(void)
                 __save_init_fpu(me);
                 __thread_clear_has_fpu(me);
                 /* We do 'stts()' in kernel_fpu_end() */
-        } else
+        } else {
+                percpu_write(fpu_owner_task, NULL);
                 clts();
+        }
 }
 
 static inline void kernel_fpu_end(void)
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 096c975e099f..461ce432b1c2 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -242,4 +242,12 @@ static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
 static inline void perf_events_lapic_init(void) { }
 #endif
 
+#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
+ extern void amd_pmu_enable_virt(void);
+ extern void amd_pmu_disable_virt(void);
+#else
+ static inline void amd_pmu_enable_virt(void) { }
+ static inline void amd_pmu_disable_virt(void) { }
+#endif
+
 #endif /* _ASM_X86_PERF_EVENT_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index f7c89e231c6c..58545c97d071 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -374,6 +374,8 @@ union thread_xstate {
 };
 
 struct fpu {
+        unsigned int last_cpu;
+        unsigned int has_fpu;
         union thread_xstate *state;
 };
 
@@ -454,7 +456,6 @@ struct thread_struct {
         unsigned long           trap_no;
         unsigned long           error_code;
         /* floating point and extended processor state */
-        unsigned long           has_fpu;
         struct fpu              fpu;
 #ifdef CONFIG_X86_32
         /* Virtual 86 mode info */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d43cad74f166..c0f7d68d318f 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1044,6 +1044,9 @@ DEFINE_PER_CPU(char *, irq_stack_ptr) =
 
 DEFINE_PER_CPU(unsigned int, irq_count) = -1;
 
+DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);
+EXPORT_PER_CPU_SYMBOL(fpu_owner_task);
+
 /*
  * Special IST stacks which the CPU switches to when it calls
  * an IST-marked descriptor entry. Up to 7 stacks (hardware
@@ -1111,6 +1114,8 @@ void debug_stack_reset(void)
 
 DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
 EXPORT_PER_CPU_SYMBOL(current_task);
+DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);
+EXPORT_PER_CPU_SYMBOL(fpu_owner_task);
 
 #ifdef CONFIG_CC_STACKPROTECTOR
 DEFINE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 6b45e5e7a901..73d08ed98a64 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -326,8 +326,7 @@ static void __cpuinit amd_calc_l3_indices(struct amd_northbridge *nb)
         l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
 }
 
-static void __cpuinit amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf,
-                                        int index)
+static void __cpuinit amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
 {
         int node;
 
@@ -725,14 +724,16 @@ static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
 #define CPUID4_INFO_IDX(x, y)   (&((per_cpu(ici_cpuid4_info, x))[y]))
 
 #ifdef CONFIG_SMP
-static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
+
+static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
 {
-        struct _cpuid4_info     *this_leaf, *sibling_leaf;
-        unsigned long num_threads_sharing;
-        int index_msb, i, sibling;
+        struct _cpuid4_info *this_leaf;
+        int ret, i, sibling;
         struct cpuinfo_x86 *c = &cpu_data(cpu);
 
-        if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
+        ret = 0;
+        if (index == 3) {
+                ret = 1;
                 for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
                         if (!per_cpu(ici_cpuid4_info, i))
                                 continue;
@@ -743,8 +744,35 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
                                 set_bit(sibling, this_leaf->shared_cpu_map);
                         }
                 }
-                return;
+        } else if ((c->x86 == 0x15) && ((index == 1) || (index == 2))) {
+                ret = 1;
+                for_each_cpu(i, cpu_sibling_mask(cpu)) {
+                        if (!per_cpu(ici_cpuid4_info, i))
+                                continue;
+                        this_leaf = CPUID4_INFO_IDX(i, index);
+                        for_each_cpu(sibling, cpu_sibling_mask(cpu)) {
+                                if (!cpu_online(sibling))
+                                        continue;
+                                set_bit(sibling, this_leaf->shared_cpu_map);
+                        }
+                }
         }
+
+        return ret;
+}
+
+static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
+{
+        struct _cpuid4_info *this_leaf, *sibling_leaf;
+        unsigned long num_threads_sharing;
+        int index_msb, i;
+        struct cpuinfo_x86 *c = &cpu_data(cpu);
+
+        if (c->x86_vendor == X86_VENDOR_AMD) {
+                if (cache_shared_amd_cpu_map_setup(cpu, index))
+                        return;
+        }
+
         this_leaf = CPUID4_INFO_IDX(cpu, index);
         num_threads_sharing = 1 + this_leaf->base.eax.split.num_threads_sharing;
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 786e76a86322..e4eeaaf58a47 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -528,6 +528,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
         sprintf(name, "threshold_bank%i", bank);
 
+#ifdef CONFIG_SMP
         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
                 i = cpumask_first(cpu_llc_shared_mask(cpu));
 
@@ -553,6 +554,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
                 goto out;
         }
+#endif
 
         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
         if (!b) {
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 8944062f46e2..c30c807ddc72 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -147,7 +147,9 @@ struct cpu_hw_events {
         /*
          * AMD specific bits
          */
-        struct amd_nb           *amd_nb;
+        struct amd_nb                   *amd_nb;
+        /* Inverted mask of bits to clear in the perf_ctr ctrl registers */
+        u64                             perf_ctr_virt_mask;
 
         void                            *kfree_on_online;
 };
@@ -417,9 +419,11 @@ void x86_pmu_disable_all(void);
 static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
                                           u64 enable_mask)
 {
+        u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
+
         if (hwc->extra_reg.reg)
                 wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
-        wrmsrl(hwc->config_base, hwc->config | enable_mask);
+        wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
 }
 
 void x86_pmu_enable_all(int added);
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 0397b23be8e9..67250a52430b 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -1,4 +1,5 @@
 #include <linux/perf_event.h>
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/slab.h>
@@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu)
         struct amd_nb *nb;
         int i, nb_id;
 
-        if (boot_cpu_data.x86_max_cores < 2)
+        cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
+
+        if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15)
                 return;
 
         nb_id = amd_get_nb_id(cpu);
@@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
         .put_event_constraints  = amd_put_event_constraints,
 
         .cpu_prepare            = amd_pmu_cpu_prepare,
-        .cpu_starting           = amd_pmu_cpu_starting,
         .cpu_dead               = amd_pmu_cpu_dead,
 #endif
+        .cpu_starting           = amd_pmu_cpu_starting,
 };
 
 __init int amd_pmu_init(void)
@@ -621,3 +624,33 @@ __init int amd_pmu_init(void)
 
         return 0;
 }
+
+void amd_pmu_enable_virt(void)
+{
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+
+        cpuc->perf_ctr_virt_mask = 0;
+
+        /* Reload all events */
+        x86_pmu_disable_all();
+        x86_pmu_enable_all(0);
+}
+EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
+
+void amd_pmu_disable_virt(void)
+{
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+
+        /*
+         * We only mask out the Host-only bit so that host-only counting works
+         * when SVM is disabled. If someone sets up a guest-only counter when
+         * SVM is disabled the Guest-only bits still gets set and the counter
+         * will not count anything.
+         */
+        cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
+
+        /* Reload all events */
+        x86_pmu_disable_all();
+        x86_pmu_enable_all(0);
+}
+EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 3fe8239fd8fb..1333d9851778 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1532,10 +1532,17 @@ ENTRY(nmi)
         pushq_cfi %rdx
 
         /*
+         * If %cs was not the kernel segment, then the NMI triggered in user
+         * space, which means it is definitely not nested.
+         */
+        cmpl $__KERNEL_CS, 16(%rsp)
+        jne first_nmi
+
+        /*
          * Check the special variable on the stack to see if NMIs are
          * executing.
          */
-        cmp $1, -8(%rsp)
+        cmpl $1, -8(%rsp)
         je nested_nmi
 
         /*
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index ac0417be9131..73465aab28f8 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -360,7 +360,6 @@ out:
 static enum ucode_state
 request_microcode_user(int cpu, const void __user *buf, size_t size)
 {
-        pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
         return UCODE_ERROR;
 }
 
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 80bfe1ab0031..c08d1ff12b7c 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -214,6 +214,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
 
         task_user_gs(p) = get_user_gs(regs);
 
+        p->fpu_counter = 0;
         p->thread.io_bitmap_ptr = NULL;
         tsk = current;
         err = -ENOMEM;
@@ -303,7 +304,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 
         /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
 
-        fpu = switch_fpu_prepare(prev_p, next_p);
+        fpu = switch_fpu_prepare(prev_p, next_p, cpu);
 
         /*
          * Reload esp0.
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 1fd94bc4279d..cfa5c90c01db 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -286,6 +286,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
 
         set_tsk_thread_flag(p, TIF_FORK);
 
+        p->fpu_counter = 0;
         p->thread.io_bitmap_ptr = NULL;
 
         savesegment(gs, p->thread.gsindex);
@@ -388,7 +389,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
         unsigned fsindex, gsindex;
         fpu_switch_t fpu;
 
-        fpu = switch_fpu_prepare(prev_p, next_p);
+        fpu = switch_fpu_prepare(prev_p, next_p, cpu);
 
         /*
          * Reload esp0, LDT and the page table pointer:
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 77da5b475ad2..4bbe04d96744 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -571,37 +571,6 @@ asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
 }
 
 /*
- * This gets called with the process already owning the
- * FPU state, and with CR0.TS cleared. It just needs to
- * restore the FPU register state.
- */
-void __math_state_restore(struct task_struct *tsk)
-{
-        /* We need a safe address that is cheap to find and that is already
-           in L1. We've just brought in "tsk->thread.has_fpu", so use that */
-#define safe_address (tsk->thread.has_fpu)
-
-        /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
-           is pending.  Clear the x87 state here by setting it to fixed
-           values. safe_address is a random variable that should be in L1 */
-        alternative_input(
-                ASM_NOP8 ASM_NOP2,
-                "emms\n\t"              /* clear stack tags */
-                "fildl %P[addr]",       /* set F?P to defined value */
-                X86_FEATURE_FXSAVE_LEAK,
-                [addr] "m" (safe_address));
-
-        /*
-         * Paranoid restore. send a SIGSEGV if we fail to restore the state.
-         */
-        if (unlikely(restore_fpu_checking(tsk))) {
-                __thread_fpu_end(tsk);
-                force_sig(SIGSEGV, tsk);
-                return;
-        }
-}
-
-/*
  * 'math_state_restore()' saves the current math information in the
  * old math state array, and gets the new ones from the current task
  *
@@ -631,7 +600,14 @@ void math_state_restore(void)
         }
 
         __thread_fpu_begin(tsk);
-        __math_state_restore(tsk);
+        /*
+         * Paranoid restore. send a SIGSEGV if we fail to restore the state.
+         */
+        if (unlikely(restore_fpu_checking(tsk))) {
+                __thread_fpu_end(tsk);
+                force_sig(SIGSEGV, tsk);
+                return;
+        }
 
         tsk->fpu_counter++;
 }
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 5fa553babe56..e385214711cb 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -29,6 +29,7 @@
 #include <linux/ftrace_event.h>
 #include <linux/slab.h>
 
+#include <asm/perf_event.h>
 #include <asm/tlbflush.h>
 #include <asm/desc.h>
 #include <asm/kvm_para.h>
@@ -575,6 +576,8 @@ static void svm_hardware_disable(void *garbage)
                 wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
 
         cpu_svm_disable();
+
+        amd_pmu_disable_virt();
 }
 
 static int svm_hardware_enable(void *garbage)
@@ -622,6 +625,8 @@ static int svm_hardware_enable(void *garbage)
 
         svm_init_erratum_383();
 
+        amd_pmu_enable_virt();
+
         return 0;
 }
 
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 12eb07bfb267..4172af8ceeb3 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1141,7 +1141,9 @@ asmlinkage void __init xen_start_kernel(void)
 
         /* Prevent unwanted bits from being set in PTEs. */
         __supported_pte_mask &= ~_PAGE_GLOBAL;
+#if 0
         if (!xen_initial_domain())
+#endif
                 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
 
         __supported_pte_mask |= _PAGE_IOMAP;
@@ -1204,10 +1206,6 @@ asmlinkage void __init xen_start_kernel(void)
 
         pgd = (pgd_t *)xen_start_info->pt_base;
 
-        if (!xen_initial_domain())
-                __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
-
-        __supported_pte_mask |= _PAGE_IOMAP;
         /* Don't do the full vcpu_info placement stuff until we have a
            possible map and a non-dummy shared_info. */
         per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 58a0e46c404d..95c1cf60c669 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -415,13 +415,13 @@ static pteval_t iomap_pte(pteval_t val)
 static pteval_t xen_pte_val(pte_t pte)
 {
         pteval_t pteval = pte.pte;
-
+#if 0
         /* If this is a WC pte, convert back from Xen WC to Linux WC */
         if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
                 WARN_ON(!pat_enabled);
                 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
         }
-
+#endif
         if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
                 return pteval;
 
@@ -463,7 +463,7 @@ void xen_set_pat(u64 pat)
 static pte_t xen_make_pte(pteval_t pte)
 {
         phys_addr_t addr = (pte & PTE_PFN_MASK);
-
+#if 0
         /* If Linux is trying to set a WC pte, then map to the Xen WC.
          * If _PAGE_PAT is set, then it probably means it is really
          * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
@@ -476,7 +476,7 @@ static pte_t xen_make_pte(pteval_t pte)
                 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
                         pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
         }
-
+#endif
         /*
          * Unprivileged domains are allowed to do IOMAPpings for
          * PCI passthrough, but not map ISA space.  The ISA
diff --git a/block/partitions/ldm.c b/block/partitions/ldm.c
index bd8ae788f689..e507cfbd044e 100644
--- a/block/partitions/ldm.c
+++ b/block/partitions/ldm.c
@@ -2,7 +2,7 @@
  * ldm - Support for Windows Logical Disk Manager (Dynamic Disks)
  *
  * Copyright (C) 2001,2002 Richard Russon <ldm@flatcap.org>
- * Copyright (c) 2001-2007 Anton Altaparmakov
+ * Copyright (c) 2001-2012 Anton Altaparmakov
  * Copyright (C) 2001,2002 Jakob Kemi <jakob.kemi@telia.com>
  *
  * Documentation is available at http://www.linux-ntfs.org/doku.php?id=downloads 
@@ -1341,20 +1341,17 @@ found:
                 ldm_error("REC value (%d) exceeds NUM value (%d)", rec, f->num);
                 return false;
         }
-
         if (f->map & (1 << rec)) {
                 ldm_error ("Duplicate VBLK, part %d.", rec);
                 f->map &= 0x7F;                 /* Mark the group as broken */
                 return false;
         }
-
         f->map |= (1 << rec);
-
+        if (!rec)
+                memcpy(f->data, data, VBLK_SIZE_HEAD);
         data += VBLK_SIZE_HEAD;
         size -= VBLK_SIZE_HEAD;
-
-        memcpy (f->data+rec*(size-VBLK_SIZE_HEAD)+VBLK_SIZE_HEAD, data, size);
-
+        memcpy(f->data + VBLK_SIZE_HEAD + rec * size, data, size);
         return true;
 }
 
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index 54eaf96ab217..01c2cf4efcdd 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -497,37 +497,22 @@ static void amba_device_release(struct device *dev)
 }
 
 /**
- *      amba_device_register - register an AMBA device
- *      @dev: AMBA device to register
- *      @parent: parent memory resource
+ *      amba_device_add - add a previously allocated AMBA device structure
+ *      @dev: AMBA device allocated by amba_device_alloc
+ *      @parent: resource parent for this devices resources
  *
- *      Setup the AMBA device, reading the cell ID if present.
- *      Claim the resource, and register the AMBA device with
- *      the Linux device manager.
+ *      Claim the resource, and read the device cell ID if not already
+ *      initialized.  Register the AMBA device with the Linux device
+ *      manager.
  */
-int amba_device_register(struct amba_device *dev, struct resource *parent)
+int amba_device_add(struct amba_device *dev, struct resource *parent)
 {
         u32 size;
         void __iomem *tmp;
         int i, ret;
 
-        device_initialize(&dev->dev);
-
-        /*
-         * Copy from device_add
-         */
-        if (dev->dev.init_name) {
-                dev_set_name(&dev->dev, "%s", dev->dev.init_name);
-                dev->dev.init_name = NULL;
-        }
-
-        dev->dev.release = amba_device_release;
-        dev->dev.bus = &amba_bustype;
-        dev->dev.dma_mask = &dev->dma_mask;
-        dev->res.name = dev_name(&dev->dev);
-
-        if (!dev->dev.coherent_dma_mask && dev->dma_mask)
-                dev_warn(&dev->dev, "coherent dma mask is unset\n");
+        WARN_ON(dev->irq[0] == (unsigned int)-1);
+        WARN_ON(dev->irq[1] == (unsigned int)-1);
 
         ret = request_resource(parent, &dev->res);
         if (ret)
@@ -582,9 +567,9 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
         if (ret)
                 goto err_release;
 
-        if (dev->irq[0] != NO_IRQ)
+        if (dev->irq[0] && dev->irq[0] != NO_IRQ)
                 ret = device_create_file(&dev->dev, &dev_attr_irq0);
-        if (ret == 0 && dev->irq[1] != NO_IRQ)
+        if (ret == 0 && dev->irq[1] && dev->irq[1] != NO_IRQ)
                 ret = device_create_file(&dev->dev, &dev_attr_irq1);
         if (ret == 0)
                 return ret;
@@ -596,6 +581,74 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
  err_out:
         return ret;
 }
+EXPORT_SYMBOL_GPL(amba_device_add);
+
+static void amba_device_initialize(struct amba_device *dev, const char *name)
+{
+        device_initialize(&dev->dev);
+        if (name)
+                dev_set_name(&dev->dev, "%s", name);
+        dev->dev.release = amba_device_release;
+        dev->dev.bus = &amba_bustype;
+        dev->dev.dma_mask = &dev->dma_mask;
+        dev->res.name = dev_name(&dev->dev);
+}
+
+/**
+ *      amba_device_alloc - allocate an AMBA device
+ *      @name: sysfs name of the AMBA device
+ *      @base: base of AMBA device
+ *      @size: size of AMBA device
+ *
+ *      Allocate and initialize an AMBA device structure.  Returns %NULL
+ *      on failure.
+ */
+struct amba_device *amba_device_alloc(const char *name, resource_size_t base,
+        size_t size)
+{
+        struct amba_device *dev;
+
+        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        if (dev) {
+                amba_device_initialize(dev, name);
+                dev->res.start = base;
+                dev->res.end = base + size - 1;
+                dev->res.flags = IORESOURCE_MEM;
+        }
+
+        return dev;
+}
+EXPORT_SYMBOL_GPL(amba_device_alloc);
+
+/**
+ *      amba_device_register - register an AMBA device
+ *      @dev: AMBA device to register
+ *      @parent: parent memory resource
+ *
+ *      Setup the AMBA device, reading the cell ID if present.
+ *      Claim the resource, and register the AMBA device with
+ *      the Linux device manager.
+ */
+int amba_device_register(struct amba_device *dev, struct resource *parent)
+{
+        amba_device_initialize(dev, dev->dev.init_name);
+        dev->dev.init_name = NULL;
+
+        if (!dev->dev.coherent_dma_mask && dev->dma_mask)
+                dev_warn(&dev->dev, "coherent dma mask is unset\n");
+
+        return amba_device_add(dev, parent);
+}
+
+/**
+ *      amba_device_put - put an AMBA device
+ *      @dev: AMBA device to put
+ */
+void amba_device_put(struct amba_device *dev)
+{
+        put_device(&dev->dev);
+}
+EXPORT_SYMBOL_GPL(amba_device_put);
 
 /**
  *      amba_device_unregister - unregister an AMBA device
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
index 5d1d07645132..e8cd652d2017 100644
--- a/drivers/atm/solos-pci.c
+++ b/drivers/atm/solos-pci.c
@@ -1206,9 +1206,9 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
         
  out_unmap_both:
         pci_set_drvdata(dev, NULL);
-        pci_iounmap(dev, card->config_regs);
- out_unmap_config:
         pci_iounmap(dev, card->buffers);
+ out_unmap_config:
+        pci_iounmap(dev, card->config_regs);
  out_release_regions:
         pci_release_regions(dev);
  out:
diff --git a/drivers/block/nvme.c b/drivers/block/nvme.c
index c1dc4d86c221..1f3c1a7d132a 100644
--- a/drivers/block/nvme.c
+++ b/drivers/block/nvme.c
@@ -41,6 +41,8 @@
 #include <linux/types.h>
 #include <linux/version.h>
 
+#include <asm-generic/io-64-nonatomic-lo-hi.h>
+
 #define NVME_Q_DEPTH 1024
 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index f00f596c1029..789c9b579aea 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -102,6 +102,7 @@ static struct usb_device_id btusb_table[] = {
 
         /* Broadcom BCM20702A0 */
         { USB_DEVICE(0x0a5c, 0x21e3) },
+        { USB_DEVICE(0x0a5c, 0x21f3) },
         { USB_DEVICE(0x413c, 0x8197) },
 
         { }     /* Terminating entry */
@@ -726,9 +727,6 @@ static int btusb_send_frame(struct sk_buff *skb)
                 usb_fill_bulk_urb(urb, data->udev, pipe,
                                 skb->data, skb->len, btusb_tx_complete, skb);
 
-                if (skb->priority >= HCI_PRIO_MAX - 1)
-                        urb->transfer_flags  = URB_ISO_ASAP;
-
                 hdev->stat.acl_tx++;
                 break;
 
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 55d0f95f82f9..32cb929b8eb6 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -19,6 +19,8 @@
  *   - Two channels combine to create a free-running 32 bit counter
  *     with a base rate of 5+ MHz, packaged as a clocksource (with
  *     resolution better than 200 nsec).
+ *   - Some chips support 32 bit counter. A single channel is used for
+ *     this 32 bit free-running counter. the second channel is not used.
  *
  *   - The third channel may be used to provide a 16-bit clockevent
  *     source, used in either periodic or oneshot mode.  This runs
@@ -54,6 +56,11 @@ static cycle_t tc_get_cycles(struct clocksource *cs)
         return (upper << 16) | lower;
 }
 
+static cycle_t tc_get_cycles32(struct clocksource *cs)
+{
+        return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
+}
+
 static struct clocksource clksrc = {
         .name           = "tcb_clksrc",
         .rating         = 200,
@@ -209,6 +216,48 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
 
 #endif
 
+static void __init tcb_setup_dual_chan(struct atmel_tc *tc, int mck_divisor_idx)
+{
+        /* channel 0:  waveform mode, input mclk/8, clock TIOA0 on overflow */
+        __raw_writel(mck_divisor_idx                    /* likely divide-by-8 */
+                        | ATMEL_TC_WAVE
+                        | ATMEL_TC_WAVESEL_UP           /* free-run */
+                        | ATMEL_TC_ACPA_SET             /* TIOA0 rises at 0 */
+                        | ATMEL_TC_ACPC_CLEAR,          /* (duty cycle 50%) */
+                        tcaddr + ATMEL_TC_REG(0, CMR));
+        __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
+        __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
+        __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR));      /* no irqs */
+        __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
+
+        /* channel 1:  waveform mode, input TIOA0 */
+        __raw_writel(ATMEL_TC_XC1                       /* input: TIOA0 */
+                        | ATMEL_TC_WAVE
+                        | ATMEL_TC_WAVESEL_UP,          /* free-run */
+                        tcaddr + ATMEL_TC_REG(1, CMR));
+        __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR));      /* no irqs */
+        __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
+
+        /* chain channel 0 to channel 1*/
+        __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
+        /* then reset all the timers */
+        __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
+}
+
+static void __init tcb_setup_single_chan(struct atmel_tc *tc, int mck_divisor_idx)
+{
+        /* channel 0:  waveform mode, input mclk/8 */
+        __raw_writel(mck_divisor_idx                    /* likely divide-by-8 */
+                        | ATMEL_TC_WAVE
+                        | ATMEL_TC_WAVESEL_UP,          /* free-run */
+                        tcaddr + ATMEL_TC_REG(0, CMR));
+        __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR));      /* no irqs */
+        __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
+
+        /* then reset all the timers */
+        __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
+}
+
 static int __init tcb_clksrc_init(void)
 {
         static char bootinfo[] __initdata
@@ -260,34 +309,19 @@ static int __init tcb_clksrc_init(void)
                         divided_rate / 1000000,
                         ((divided_rate + 500000) % 1000000) / 1000);
 
-        /* tclib will give us three clocks no matter what the
-         * underlying platform supports.
-         */
-        clk_enable(tc->clk[1]);
-
-        /* channel 0:  waveform mode, input mclk/8, clock TIOA0 on overflow */
-        __raw_writel(best_divisor_idx                   /* likely divide-by-8 */
-                        | ATMEL_TC_WAVE
-                        | ATMEL_TC_WAVESEL_UP           /* free-run */
-                        | ATMEL_TC_ACPA_SET             /* TIOA0 rises at 0 */
-                        | ATMEL_TC_ACPC_CLEAR,          /* (duty cycle 50%) */
-                        tcaddr + ATMEL_TC_REG(0, CMR));
-        __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
-        __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
-        __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR));      /* no irqs */
-        __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
-
-        /* channel 1:  waveform mode, input TIOA0 */
-        __raw_writel(ATMEL_TC_XC1                       /* input: TIOA0 */
-                        | ATMEL_TC_WAVE
-                        | ATMEL_TC_WAVESEL_UP,          /* free-run */
-                        tcaddr + ATMEL_TC_REG(1, CMR));
-        __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR));      /* no irqs */
-        __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
-
-        /* chain channel 0 to channel 1, then reset all the timers */
-        __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
-        __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
+        if (tc->tcb_config && tc->tcb_config->counter_width == 32) {
+                /* use apropriate function to read 32 bit counter */
+                clksrc.read = tc_get_cycles32;
+                /* setup ony channel 0 */
+                tcb_setup_single_chan(tc, best_divisor_idx);
+        } else {
+                /* tclib will give us three clocks no matter what the
+                 * underlying platform supports.
+                 */
+                clk_enable(tc->clk[1]);
+                /* setup both channel 0 & 1 */
+                tcb_setup_dual_chan(tc, best_divisor_idx);
+        }
 
         /* and away we go! */
         clocksource_register_hz(&clksrc, divided_rate);
diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig
index 7dbc4a83c45c..78a666d1e5f5 100644
--- a/drivers/cpuidle/Kconfig
+++ b/drivers/cpuidle/Kconfig
@@ -1,7 +1,7 @@
 
 config CPU_IDLE
         bool "CPU idle PM support"
-        default ACPI
+        default y if ACPI || PPC_PSERIES
         help
           CPU idle is a generic framework for supporting software-controlled
           idle processor power management.  It includes modular cross-platform
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index 597235a2f8f9..0d40cf66b3cc 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -714,6 +714,7 @@ static int mv_hash_final(struct ahash_request *req)
 {
         struct mv_req_hash_ctx *ctx = ahash_request_ctx(req);
 
+        ahash_request_set_crypt(req, NULL, req->result, 0);
         mv_update_hash_req_ctx(ctx, 1, 0);
         return mv_handle_req(&req->base);
 }
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c
index aa08497a075a..73f55e2008c2 100644
--- a/drivers/edac/i3200_edac.c
+++ b/drivers/edac/i3200_edac.c
@@ -15,6 +15,8 @@
 #include <linux/io.h>
 #include "edac_core.h"
 
+#include <asm-generic/io-64-nonatomic-lo-hi.h>
+
 #define I3200_REVISION        "1.1"
 
 #define EDAC_MOD_STR        "i3200_edac"
@@ -101,19 +103,6 @@ struct i3200_priv {
 
 static int nr_channels;
 
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
-{
-        const volatile u32 __iomem *p = addr;
-        u32 low, high;
-
-        low = readl(p);
-        high = readl(p + 1);
-
-        return low + ((u64)high << 32);
-}
-#endif
-
 static int how_many_channels(struct pci_dev *pdev)
 {
         unsigned char capid0_8b; /* 8th byte of CAPID0 */
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
index d620b0784257..618bd4d87d28 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c
@@ -28,6 +28,7 @@
 #include "drmP.h"
 #include "drm_crtc_helper.h"
 
+#include <drm/exynos_drm.h>
 #include "exynos_drm_drv.h"
 #include "exynos_drm_encoder.h"
 
@@ -44,8 +45,9 @@ struct exynos_drm_connector {
 /* convert exynos_video_timings to drm_display_mode */
 static inline void
 convert_to_display_mode(struct drm_display_mode *mode,
-                        struct fb_videomode *timing)
+                        struct exynos_drm_panel_info *panel)
 {
+        struct fb_videomode *timing = &panel->timing;
         DRM_DEBUG_KMS("%s\n", __FILE__);
 
         mode->clock = timing->pixclock / 1000;
@@ -60,6 +62,8 @@ convert_to_display_mode(struct drm_display_mode *mode,
         mode->vsync_start = mode->vdisplay + timing->upper_margin;
         mode->vsync_end = mode->vsync_start + timing->vsync_len;
         mode->vtotal = mode->vsync_end + timing->lower_margin;
+        mode->width_mm = panel->width_mm;
+        mode->height_mm = panel->height_mm;
 
         if (timing->vmode & FB_VMODE_INTERLACED)
                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
@@ -148,16 +152,18 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
                 connector->display_info.raw_edid = edid;
         } else {
                 struct drm_display_mode *mode = drm_mode_create(connector->dev);
-                struct fb_videomode *timing;
+                struct exynos_drm_panel_info *panel;
 
-                if (display_ops->get_timing)
-                        timing = display_ops->get_timing(manager->dev);
+                if (display_ops->get_panel)
+                        panel = display_ops->get_panel(manager->dev);
                 else {
                         drm_mode_destroy(connector->dev, mode);
                         return 0;
                 }
 
-                convert_to_display_mode(mode, timing);
+                convert_to_display_mode(mode, panel);
+                connector->display_info.width_mm = mode->width_mm;
+                connector->display_info.height_mm = mode->height_mm;
 
                 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
                 drm_mode_set_name(mode);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index 661a03571d0c..d08a55896d50 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -193,6 +193,9 @@ int exynos_drm_subdrv_register(struct exynos_drm_subdrv *subdrv)
                         return err;
                 }
 
+                /* setup possible_clones. */
+                exynos_drm_encoder_setup(drm_dev);
+
                 /*
                  * if any specific driver such as fimd or hdmi driver called
                  * exynos_drm_subdrv_register() later than drm_load(),
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index e3861ac49295..de818831a511 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -307,9 +307,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
                  */
                 event->pipe = exynos_crtc->pipe;
 
-                list_add_tail(&event->base.link,
-                                &dev_priv->pageflip_event_list);
-
                 ret = drm_vblank_get(dev, exynos_crtc->pipe);
                 if (ret) {
                         DRM_DEBUG("failed to acquire vblank counter\n");
@@ -318,6 +315,9 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
                         goto out;
                 }
 
+                list_add_tail(&event->base.link,
+                                &dev_priv->pageflip_event_list);
+
                 crtc->fb = fb;
                 ret = exynos_drm_crtc_update(crtc);
                 if (ret) {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 35889ca255e9..58820ebd3558 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -33,6 +33,7 @@
 
 #include "exynos_drm_drv.h"
 #include "exynos_drm_crtc.h"
+#include "exynos_drm_encoder.h"
 #include "exynos_drm_fbdev.h"
 #include "exynos_drm_fb.h"
 #include "exynos_drm_gem.h"
@@ -99,6 +100,9 @@ static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
         if (ret)
                 goto err_vblank;
 
+        /* setup possible_clones. */
+        exynos_drm_encoder_setup(dev);
+
         /*
          * create and configure fb helper and also exynos specific
          * fbdev object.
@@ -141,16 +145,21 @@ static int exynos_drm_unload(struct drm_device *dev)
 }
 
 static void exynos_drm_preclose(struct drm_device *dev,
-                                        struct drm_file *file_priv)
+                                        struct drm_file *file)
 {
-        struct exynos_drm_private *dev_priv = dev->dev_private;
+        DRM_DEBUG_DRIVER("%s\n", __FILE__);
 
-        /*
-         * drm framework frees all events at release time,
-         * so private event list should be cleared.
-         */
-        if (!list_empty(&dev_priv->pageflip_event_list))
-                INIT_LIST_HEAD(&dev_priv->pageflip_event_list);
+}
+
+static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
+{
+        DRM_DEBUG_DRIVER("%s\n", __FILE__);
+
+        if (!file->driver_priv)
+                return;
+
+        kfree(file->driver_priv);
+        file->driver_priv = NULL;
 }
 
 static void exynos_drm_lastclose(struct drm_device *dev)
@@ -195,6 +204,7 @@ static struct drm_driver exynos_drm_driver = {
         .unload                 = exynos_drm_unload,
         .preclose               = exynos_drm_preclose,
         .lastclose              = exynos_drm_lastclose,
+        .postclose              = exynos_drm_postclose,
         .get_vblank_counter     = drm_vblank_count,
         .enable_vblank          = exynos_drm_crtc_enable_vblank,
         .disable_vblank         = exynos_drm_crtc_disable_vblank,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index e685e1e33055..13540de90bfc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -136,7 +136,7 @@ struct exynos_drm_overlay {
  * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
  * @is_connected: check for that display is connected or not.
  * @get_edid: get edid modes from display driver.
- * @get_timing: get timing object from display driver.
+ * @get_panel: get panel object from display driver.
  * @check_timing: check if timing is valid or not.
  * @power_on: display device on or off.
  */
@@ -145,7 +145,7 @@ struct exynos_drm_display_ops {
         bool (*is_connected)(struct device *dev);
         int (*get_edid)(struct device *dev, struct drm_connector *connector,
                                 u8 *edid, int len);
-        void *(*get_timing)(struct device *dev);
+        void *(*get_panel)(struct device *dev);
         int (*check_timing)(struct device *dev, void *timing);
         int (*power_on)(struct device *dev, int mode);
 };
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 86b93dde219a..ef4754f1519b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -195,6 +195,40 @@ static struct drm_encoder_funcs exynos_encoder_funcs = {
         .destroy = exynos_drm_encoder_destroy,
 };
 
+static unsigned int exynos_drm_encoder_clones(struct drm_encoder *encoder)
+{
+        struct drm_encoder *clone;
+        struct drm_device *dev = encoder->dev;
+        struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
+        struct exynos_drm_display_ops *display_ops =
+                                exynos_encoder->manager->display_ops;
+        unsigned int clone_mask = 0;
+        int cnt = 0;
+
+        list_for_each_entry(clone, &dev->mode_config.encoder_list, head) {
+                switch (display_ops->type) {
+                case EXYNOS_DISPLAY_TYPE_LCD:
+                case EXYNOS_DISPLAY_TYPE_HDMI:
+                        clone_mask |= (1 << (cnt++));
+                        break;
+                default:
+                        continue;
+                }
+        }
+
+        return clone_mask;
+}
+
+void exynos_drm_encoder_setup(struct drm_device *dev)
+{
+        struct drm_encoder *encoder;
+
+        DRM_DEBUG_KMS("%s\n", __FILE__);
+
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
+                encoder->possible_clones = exynos_drm_encoder_clones(encoder);
+}
+
 struct drm_encoder *
 exynos_drm_encoder_create(struct drm_device *dev,
                            struct exynos_drm_manager *manager,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.h b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
index 97b087a51cb6..eb7d2316847e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
@@ -30,6 +30,7 @@
 
 struct exynos_drm_manager;
 
+void exynos_drm_encoder_setup(struct drm_device *dev);
 struct drm_encoder *exynos_drm_encoder_create(struct drm_device *dev,
                                                struct exynos_drm_manager *mgr,
                                                unsigned int possible_crtcs);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index d7ae29d2f3d6..3508700e529b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -195,66 +195,6 @@ out:
         return ret;
 }
 
-static bool
-exynos_drm_fbdev_is_samefb(struct drm_framebuffer *fb,
-                            struct drm_fb_helper_surface_size *sizes)
-{
-        if (fb->width != sizes->surface_width)
-                return false;
-        if (fb->height != sizes->surface_height)
-                return false;
-        if (fb->bits_per_pixel != sizes->surface_bpp)
-                return false;
-        if (fb->depth != sizes->surface_depth)
-                return false;
-
-        return true;
-}
-
-static int exynos_drm_fbdev_recreate(struct drm_fb_helper *helper,
-                                      struct drm_fb_helper_surface_size *sizes)
-{
-        struct drm_device *dev = helper->dev;
-        struct exynos_drm_fbdev *exynos_fbdev = to_exynos_fbdev(helper);
-        struct exynos_drm_gem_obj *exynos_gem_obj;
-        struct drm_framebuffer *fb = helper->fb;
-        struct drm_mode_fb_cmd2 mode_cmd = { 0 };
-        unsigned long size;
-
-        DRM_DEBUG_KMS("%s\n", __FILE__);
-
-        if (exynos_drm_fbdev_is_samefb(fb, sizes))
-                return 0;
-
-        mode_cmd.width = sizes->surface_width;
-        mode_cmd.height = sizes->surface_height;
-        mode_cmd.pitches[0] = sizes->surface_width * (sizes->surface_bpp >> 3);
-        mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
-                                                          sizes->surface_depth);
-
-        if (exynos_fbdev->exynos_gem_obj)
-                exynos_drm_gem_destroy(exynos_fbdev->exynos_gem_obj);
-
-        if (fb->funcs->destroy)
-                fb->funcs->destroy(fb);
-
-        size = mode_cmd.pitches[0] * mode_cmd.height;
-        exynos_gem_obj = exynos_drm_gem_create(dev, size);
-        if (IS_ERR(exynos_gem_obj))
-                return PTR_ERR(exynos_gem_obj);
-
-        exynos_fbdev->exynos_gem_obj = exynos_gem_obj;
-
-        helper->fb = exynos_drm_framebuffer_init(dev, &mode_cmd,
-                        &exynos_gem_obj->base);
-        if (IS_ERR_OR_NULL(helper->fb)) {
-                DRM_ERROR("failed to create drm framebuffer.\n");
-                return PTR_ERR(helper->fb);
-        }
-
-        return exynos_drm_fbdev_update(helper, helper->fb);
-}
-
 static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
                                    struct drm_fb_helper_surface_size *sizes)
 {
@@ -262,6 +202,10 @@ static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
 
         DRM_DEBUG_KMS("%s\n", __FILE__);
 
+        /*
+         * with !helper->fb, it means that this funcion is called first time
+         * and after that, the helper->fb would be used as clone mode.
+         */
         if (!helper->fb) {
                 ret = exynos_drm_fbdev_create(helper, sizes);
                 if (ret < 0) {
@@ -274,12 +218,6 @@ static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
                  * because register_framebuffer() should be called.
                  */
                 ret = 1;
-        } else {
-                ret = exynos_drm_fbdev_recreate(helper, sizes);
-                if (ret < 0) {
-                        DRM_ERROR("failed to reconfigure fbdev\n");
-                        return ret;
-                }
         }
 
         return ret;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index b6a737d196ae..360adf2bba04 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -89,7 +89,7 @@ struct fimd_context {
         bool                            suspended;
         struct mutex                    lock;
 
-        struct fb_videomode             *timing;
+        struct exynos_drm_panel_info *panel;
 };
 
 static bool fimd_display_is_connected(struct device *dev)
@@ -101,13 +101,13 @@ static bool fimd_display_is_connected(struct device *dev)
         return true;
 }
 
-static void *fimd_get_timing(struct device *dev)
+static void *fimd_get_panel(struct device *dev)
 {
         struct fimd_context *ctx = get_fimd_context(dev);
 
         DRM_DEBUG_KMS("%s\n", __FILE__);
 
-        return ctx->timing;
+        return ctx->panel;
 }
 
 static int fimd_check_timing(struct device *dev, void *timing)
@@ -131,7 +131,7 @@ static int fimd_display_power_on(struct device *dev, int mode)
 static struct exynos_drm_display_ops fimd_display_ops = {
         .type = EXYNOS_DISPLAY_TYPE_LCD,
         .is_connected = fimd_display_is_connected,
-        .get_timing = fimd_get_timing,
+        .get_panel = fimd_get_panel,
         .check_timing = fimd_check_timing,
         .power_on = fimd_display_power_on,
 };
@@ -193,7 +193,8 @@ static void fimd_apply(struct device *subdrv_dev)
 static void fimd_commit(struct device *dev)
 {
         struct fimd_context *ctx = get_fimd_context(dev);
-        struct fb_videomode *timing = ctx->timing;
+        struct exynos_drm_panel_info *panel = ctx->panel;
+        struct fb_videomode *timing = &panel->timing;
         u32 val;
 
         if (ctx->suspended)
@@ -604,7 +605,12 @@ static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
         }
 
         if (is_checked) {
-                drm_vblank_put(drm_dev, crtc);
+                /*
+                 * call drm_vblank_put only in case that drm_vblank_get was
+                 * called.
+                 */
+                if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
+                        drm_vblank_put(drm_dev, crtc);
 
                 /*
                  * don't off vblank if vblank_disable_allowed is 1,
@@ -781,7 +787,7 @@ static int __devinit fimd_probe(struct platform_device *pdev)
         struct fimd_context *ctx;
         struct exynos_drm_subdrv *subdrv;
         struct exynos_drm_fimd_pdata *pdata;
-        struct fb_videomode *timing;
+        struct exynos_drm_panel_info *panel;
         struct resource *res;
         int win;
         int ret = -EINVAL;
@@ -794,9 +800,9 @@ static int __devinit fimd_probe(struct platform_device *pdev)
                 return -EINVAL;
         }
 
-        timing = &pdata->timing;
-        if (!timing) {
-                dev_err(dev, "timing is null.\n");
+        panel = &pdata->panel;
+        if (!panel) {
+                dev_err(dev, "panel is null.\n");
                 return -EINVAL;
         }
 
@@ -858,16 +864,16 @@ static int __devinit fimd_probe(struct platform_device *pdev)
                 goto err_req_irq;
         }
 
-        ctx->clkdiv = fimd_calc_clkdiv(ctx, timing);
+        ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
         ctx->vidcon0 = pdata->vidcon0;
         ctx->vidcon1 = pdata->vidcon1;
         ctx->default_win = pdata->default_win;
-        ctx->timing = timing;
+        ctx->panel = panel;
 
-        timing->pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
+        panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 
         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
-                        timing->pixclock, ctx->clkdiv);
+                        panel->timing.pixclock, ctx->clkdiv);
 
         subdrv = &ctx->subdrv;
 
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index ac24cff39775..93846e810e38 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -712,7 +712,12 @@ static void mixer_finish_pageflip(struct drm_device *drm_dev, int crtc)
         }
 
         if (is_checked)
-                drm_vblank_put(drm_dev, crtc);
+                /*
+                 * call drm_vblank_put only in case that drm_vblank_get was
+                 * called.
+                 */
+                if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
+                        drm_vblank_put(drm_dev, crtc);
 
         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 }
@@ -779,15 +784,15 @@ static void mixer_win_reset(struct mixer_context *ctx)
         mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST,
                 MXR_STATUS_BURST_MASK);
 
-        /* setting default layer priority: layer1 > video > layer0
+        /* setting default layer priority: layer1 > layer0 > video
          * because typical usage scenario would be
+         * layer1 - OSD
          * layer0 - framebuffer
          * video - video overlay
-         * layer1 - OSD
          */
-        val  = MXR_LAYER_CFG_GRP0_VAL(1);
-        val |= MXR_LAYER_CFG_VP_VAL(2);
-        val |= MXR_LAYER_CFG_GRP1_VAL(3);
+        val = MXR_LAYER_CFG_GRP1_VAL(3);
+        val |= MXR_LAYER_CFG_GRP0_VAL(2);
+        val |= MXR_LAYER_CFG_VP_VAL(1);
         mixer_reg_write(res, MXR_LAYER_CFG, val);
 
         /* setting background color */
@@ -1044,7 +1049,7 @@ static int mixer_remove(struct platform_device *pdev)
                                         platform_get_drvdata(pdev);
         struct mixer_context *ctx = (struct mixer_context *)drm_hdmi_ctx->ctx;
 
-        dev_info(dev, "remove sucessful\n");
+        dev_info(dev, "remove successful\n");
 
         mixer_resource_poweroff(ctx);
         mixer_resources_cleanup(ctx);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c3afb783cb9d..03c53fcf8653 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3028,6 +3028,20 @@
 #define  DISP_TILE_SURFACE_SWIZZLING    (1<<13)
 #define  DISP_FBC_WM_DIS                (1<<15)
 
+/* GEN7 chicken */
+#define GEN7_COMMON_SLICE_CHICKEN1              0x7010
+# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC      ((1<<10) | (1<<26))
+
+#define GEN7_L3CNTLREG1                         0xB01C
+#define  GEN7_WA_FOR_GEN7_L3_CONTROL                    0x3C4FFF8C
+
+#define GEN7_L3_CHICKEN_MODE_REGISTER           0xB030
+#define  GEN7_WA_L3_CHICKEN_MODE                                0x20000000
+
+/* WaCatErrorRejectionIssue */
+#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG          0x9030
+#define  GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB       (1<<11)
+
 /* PCH */
 
 /* south display engine interrupt */
@@ -3618,6 +3632,7 @@
 #define    GT_FIFO_NUM_RESERVED_ENTRIES         20
 
 #define GEN6_UCGCTL2                            0x9404
+# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE                (1 << 13)
 # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE               (1 << 12)
 # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE                (1 << 11)
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 00fbff5ddd81..f851db7be2cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4680,8 +4680,17 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
 
         crtc = intel_get_crtc_for_plane(dev, plane);
         clock = crtc->mode.clock;
+        if (!clock) {
+                *sprite_wm = 0;
+                return false;
+        }
 
         line_time_us = (sprite_width * 1000) / clock;
+        if (!line_time_us) {
+                *sprite_wm = 0;
+                return false;
+        }
+
         line_count = (latency_ns / line_time_us + 1000) / 1000;
         line_size = sprite_width * pixel_size;
 
@@ -6175,7 +6184,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
         int i;
 
         /* The clocks have to be on to load the palette. */
-        if (!crtc->enabled)
+        if (!crtc->enabled || !intel_crtc->active)
                 return;
 
         /* use legacy palette for Ironlake */
@@ -6561,7 +6570,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
         mode_cmd.height = mode->vdisplay;
         mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width,
                                                                 bpp);
-        mode_cmd.pixel_format = 0;
+        mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth);
 
         return intel_framebuffer_create(dev, &mode_cmd, obj);
 }
@@ -8184,8 +8193,8 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
         I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
 
         if (intel_enable_rc6(dev_priv->dev))
-                rc6_mask = GEN6_RC_CTL_RC6p_ENABLE |
-                        GEN6_RC_CTL_RC6_ENABLE;
+                rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
+                        ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
 
         I915_WRITE(GEN6_RC_CONTROL,
                    rc6_mask |
@@ -8463,12 +8472,32 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
         I915_WRITE(WM2_LP_ILK, 0);
         I915_WRITE(WM1_LP_ILK, 0);
 
+        /* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
+         * This implements the WaDisableRCZUnitClockGating workaround.
+         */
+        I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
+
         I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
 
         I915_WRITE(IVB_CHICKEN3,
                    CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |
                    CHICKEN3_DGMG_DONE_FIX_DISABLE);
 
+        /* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
+        I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
+                   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
+
+        /* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
+        I915_WRITE(GEN7_L3CNTLREG1,
+                        GEN7_WA_FOR_GEN7_L3_CONTROL);
+        I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
+                        GEN7_WA_L3_CHICKEN_MODE);
+
+        /* This is required by WaCatErrorRejectionIssue */
+        I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
+                        I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
+                        GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
+
         for_each_pipe(pipe) {
                 I915_WRITE(DSPCNTR(pipe),
                            I915_READ(DSPCNTR(pipe)) |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 1ab842c6032e..536191540b03 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -301,7 +301,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
 
         I915_WRITE_CTL(ring,
                         ((ring->size - PAGE_SIZE) & RING_NR_PAGES)
-                        | RING_REPORT_64K | RING_VALID);
+                        | RING_VALID);
 
         /* If the head is still not zero, the ring is dead */
         if ((I915_READ_CTL(ring) & RING_VALID) == 0 ||
@@ -1132,18 +1132,6 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
         struct drm_device *dev = ring->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         unsigned long end;
-        u32 head;
-
-        /* If the reported head position has wrapped or hasn't advanced,
-         * fallback to the slow and accurate path.
-         */
-        head = intel_read_status_page(ring, 4);
-        if (head > ring->head) {
-                ring->head = head;
-                ring->space = ring_space(ring);
-                if (ring->space >= n)
-                        return 0;
-        }
 
         trace_i915_ring_wait_begin(ring);
         if (drm_core_check_feature(dev, DRIVER_GEM))
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 9be353b894cc..f58254a3fb01 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3223,6 +3223,7 @@ int evergreen_resume(struct radeon_device *rdev)
         r = evergreen_startup(rdev);
         if (r) {
                 DRM_ERROR("evergreen startup failed on resume\n");
+                rdev->accel_working = false;
                 return r;
         }
 
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index db09065e68fd..2509c505acb8 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1547,6 +1547,7 @@ int cayman_resume(struct radeon_device *rdev)
         r = cayman_startup(rdev);
         if (r) {
                 DRM_ERROR("cayman startup failed on resume\n");
+                rdev->accel_working = false;
                 return r;
         }
         return r;
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 18cd84fae99c..333cde9d4e7b 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3928,6 +3928,8 @@ static int r100_startup(struct radeon_device *rdev)
 
 int r100_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         if (rdev->flags & RADEON_IS_PCI)
                 r100_pci_gart_disable(rdev);
@@ -3947,7 +3949,11 @@ int r100_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return r100_startup(rdev);
+        r = r100_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int r100_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3fc0d29a5f39..6829638cca40 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1431,6 +1431,8 @@ static int r300_startup(struct radeon_device *rdev)
 
 int r300_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         if (rdev->flags & RADEON_IS_PCIE)
                 rv370_pcie_gart_disable(rdev);
@@ -1452,7 +1454,11 @@ int r300_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return r300_startup(rdev);
+        r = r300_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int r300_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 666e28fe509c..b14323053bad 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -291,6 +291,8 @@ static int r420_startup(struct radeon_device *rdev)
 
 int r420_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         if (rdev->flags & RADEON_IS_PCIE)
                 rv370_pcie_gart_disable(rdev);
@@ -316,7 +318,11 @@ int r420_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return r420_startup(rdev);
+        r = r420_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int r420_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 4ae1615e752f..25084e824dbc 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -218,6 +218,8 @@ static int r520_startup(struct radeon_device *rdev)
 
 int r520_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         if (rdev->flags & RADEON_IS_PCIE)
                 rv370_pcie_gart_disable(rdev);
@@ -237,7 +239,11 @@ int r520_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return r520_startup(rdev);
+        r = r520_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int r520_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 4f08e5e6ee9d..fbcd84803b60 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2529,6 +2529,7 @@ int r600_resume(struct radeon_device *rdev)
         r = r600_startup(rdev);
         if (r) {
                 DRM_ERROR("r600 startup failed on resume\n");
+                rdev->accel_working = false;
                 return r;
         }
 
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 38ce5d0427e3..387fcc9f03ef 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -1304,6 +1304,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p,  u32 idx,
         h0 = G_038004_TEX_HEIGHT(word1) + 1;
         d0 = G_038004_TEX_DEPTH(word1);
         nfaces = 1;
+        array = 0;
         switch (G_038000_DIM(word0)) {
         case V_038000_SQ_TEX_DIM_1D:
         case V_038000_SQ_TEX_DIM_2D:
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 9e72daeeddc6..1f53ae74ada1 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -3020,6 +3020,9 @@ radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on)
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
         uint32_t bios_2_scratch;
 
+        if (ASIC_IS_DCE4(rdev))
+                return;
+
         if (rdev->family >= CHIP_R600)
                 bios_2_scratch = RREG32(R600_BIOS_2_SCRATCH);
         else
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index e7cb3ab09243..8b3d8ed52ff6 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1117,13 +1117,23 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
             (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
                 struct drm_display_mode *mode;
 
-                if (!radeon_dig_connector->edp_on)
-                        atombios_set_edp_panel_power(connector,
-                                                     ATOM_TRANSMITTER_ACTION_POWER_ON);
-                ret = radeon_ddc_get_modes(radeon_connector);
-                if (!radeon_dig_connector->edp_on)
-                        atombios_set_edp_panel_power(connector,
-                                                     ATOM_TRANSMITTER_ACTION_POWER_OFF);
+                if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+                        if (!radeon_dig_connector->edp_on)
+                                atombios_set_edp_panel_power(connector,
+                                                             ATOM_TRANSMITTER_ACTION_POWER_ON);
+                        ret = radeon_ddc_get_modes(radeon_connector);
+                        if (!radeon_dig_connector->edp_on)
+                                atombios_set_edp_panel_power(connector,
+                                                             ATOM_TRANSMITTER_ACTION_POWER_OFF);
+                } else {
+                        /* need to setup ddc on the bridge */
+                        if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
+                            ENCODER_OBJECT_ID_NONE) {
+                                if (encoder)
+                                        radeon_atom_ext_encoder_setup_ddc(encoder);
+                        }
+                        ret = radeon_ddc_get_modes(radeon_connector);
+                }
 
                 if (ret > 0) {
                         if (encoder) {
@@ -1134,7 +1144,6 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
                         return ret;
                 }
 
-                encoder = radeon_best_single_encoder(connector);
                 if (!encoder)
                         return 0;
 
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 435a3d970ab8..e64bec488ed8 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -453,6 +453,10 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
         int r;
 
         radeon_mutex_lock(&rdev->cs_mutex);
+        if (!rdev->accel_working) {
+                radeon_mutex_unlock(&rdev->cs_mutex);
+                return -EBUSY;
+        }
         /* initialize parser */
         memset(&parser, 0, sizeof(struct radeon_cs_parser));
         parser.filp = filp;
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index 010dad8b66ae..c58a036233fb 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -597,13 +597,13 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,
         if (bo_va == NULL)
                 return 0;
 
-        list_del(&bo_va->bo_list);
         mutex_lock(&vm->mutex);
         radeon_mutex_lock(&rdev->cs_mutex);
         radeon_vm_bo_update_pte(rdev, vm, bo, NULL);
         radeon_mutex_unlock(&rdev->cs_mutex);
         list_del(&bo_va->vm_list);
         mutex_unlock(&vm->mutex);
+        list_del(&bo_va->bo_list);
 
         kfree(bo_va);
         return 0;
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 30a4c5014c8b..92c9ea4751fb 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -500,8 +500,11 @@ static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
 int radeon_debugfs_ring_init(struct radeon_device *rdev)
 {
 #if defined(CONFIG_DEBUG_FS)
-        return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list,
-                                        ARRAY_SIZE(radeon_debugfs_ring_info_list));
+        if (rdev->family >= CHIP_CAYMAN)
+                return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list,
+                                                ARRAY_SIZE(radeon_debugfs_ring_info_list));
+        else
+                return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list, 1);
 #else
         return 0;
 #endif
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index b0ce84a20a68..866a05be75f2 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -442,6 +442,8 @@ static int rs400_startup(struct radeon_device *rdev)
 
 int rs400_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         rs400_gart_disable(rdev);
         /* Resume clock before doing reset */
@@ -462,7 +464,11 @@ int rs400_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return rs400_startup(rdev);
+        r = rs400_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int rs400_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index c05865e5521f..4fc700684dcd 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -876,6 +876,8 @@ static int rs600_startup(struct radeon_device *rdev)
 
 int rs600_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         rs600_gart_disable(rdev);
         /* Resume clock before doing reset */
@@ -894,7 +896,11 @@ int rs600_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return rs600_startup(rdev);
+        r = rs600_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int rs600_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 4f24a0fa8c82..f68dff2fadcb 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -659,6 +659,8 @@ static int rs690_startup(struct radeon_device *rdev)
 
 int rs690_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         rs400_gart_disable(rdev);
         /* Resume clock before doing reset */
@@ -677,7 +679,11 @@ int rs690_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return rs690_startup(rdev);
+        r = rs690_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int rs690_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 880637fd1946..959bf4483bea 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -424,6 +424,8 @@ static int rv515_startup(struct radeon_device *rdev)
 
 int rv515_resume(struct radeon_device *rdev)
 {
+        int r;
+
         /* Make sur GART are not working */
         if (rdev->flags & RADEON_IS_PCIE)
                 rv370_pcie_gart_disable(rdev);
@@ -443,7 +445,11 @@ int rv515_resume(struct radeon_device *rdev)
         radeon_surface_init(rdev);
 
         rdev->accel_working = true;
-        return rv515_startup(rdev);
+        r =  rv515_startup(rdev);
+        if (r) {
+                rdev->accel_working = false;
+        }
+        return r;
 }
 
 int rv515_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index a1668b659ddd..c049c0c51841 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1139,6 +1139,7 @@ int rv770_resume(struct radeon_device *rdev)
         r = rv770_startup(rdev);
         if (r) {
                 DRM_ERROR("r600 startup failed on resume\n");
+                rdev->accel_working = false;
                 return r;
         }
 
diff --git a/drivers/hwmon/ads1015.c b/drivers/hwmon/ads1015.c
index eedca3cf9968..dd87ae96c262 100644
--- a/drivers/hwmon/ads1015.c
+++ b/drivers/hwmon/ads1015.c
@@ -271,7 +271,7 @@ static int ads1015_probe(struct i2c_client *client,
                         continue;
                 err = device_create_file(&client->dev, &ads1015_in[k].dev_attr);
                 if (err)
-                        goto exit_free;
+                        goto exit_remove;
         }
 
         data->hwmon_dev = hwmon_device_register(&client->dev);
@@ -285,7 +285,6 @@ static int ads1015_probe(struct i2c_client *client,
 exit_remove:
         for (k = 0; k < ADS1015_CHANNELS; ++k)
                 device_remove_file(&client->dev, &ads1015_in[k].dev_attr);
-exit_free:
         kfree(data);
 exit:
         return err;
diff --git a/drivers/hwmon/f75375s.c b/drivers/hwmon/f75375s.c
index f609b5727ba9..6aa5a9fad879 100644
--- a/drivers/hwmon/f75375s.c
+++ b/drivers/hwmon/f75375s.c
@@ -178,6 +178,16 @@ static inline void f75375_write16(struct i2c_client *client, u8 reg,
         i2c_smbus_write_byte_data(client, reg + 1, (value & 0xFF));
 }
 
+static void f75375_write_pwm(struct i2c_client *client, int nr)
+{
+        struct f75375_data *data = i2c_get_clientdata(client);
+        if (data->kind == f75387)
+                f75375_write16(client, F75375_REG_FAN_EXP(nr), data->pwm[nr]);
+        else
+                f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
+                              data->pwm[nr]);
+}
+
 static struct f75375_data *f75375_update_device(struct device *dev)
 {
         struct i2c_client *client = to_i2c_client(dev);
@@ -254,6 +264,36 @@ static inline u16 rpm_to_reg(int rpm)
         return 1500000 / rpm;
 }
 
+static bool duty_mode_enabled(u8 pwm_enable)
+{
+        switch (pwm_enable) {
+        case 0: /* Manual, duty mode (full speed) */
+        case 1: /* Manual, duty mode */
+        case 4: /* Auto, duty mode */
+                return true;
+        case 2: /* Auto, speed mode */
+        case 3: /* Manual, speed mode */
+                return false;
+        default:
+                BUG();
+        }
+}
+
+static bool auto_mode_enabled(u8 pwm_enable)
+{
+        switch (pwm_enable) {
+        case 0: /* Manual, duty mode (full speed) */
+        case 1: /* Manual, duty mode */
+        case 3: /* Manual, speed mode */
+                return false;
+        case 2: /* Auto, speed mode */
+        case 4: /* Auto, duty mode */
+                return true;
+        default:
+                BUG();
+        }
+}
+
 static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
                 const char *buf, size_t count)
 {
@@ -287,6 +327,11 @@ static ssize_t set_fan_target(struct device *dev, struct device_attribute *attr,
         if (err < 0)
                 return err;
 
+        if (auto_mode_enabled(data->pwm_enable[nr]))
+                return -EINVAL;
+        if (data->kind == f75387 && duty_mode_enabled(data->pwm_enable[nr]))
+                return -EINVAL;
+
         mutex_lock(&data->update_lock);
         data->fan_target[nr] = rpm_to_reg(val);
         f75375_write16(client, F75375_REG_FAN_EXP(nr), data->fan_target[nr]);
@@ -307,9 +352,13 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
         if (err < 0)
                 return err;
 
+        if (auto_mode_enabled(data->pwm_enable[nr]) ||
+            !duty_mode_enabled(data->pwm_enable[nr]))
+                return -EINVAL;
+
         mutex_lock(&data->update_lock);
         data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
-        f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr), data->pwm[nr]);
+        f75375_write_pwm(client, nr);
         mutex_unlock(&data->update_lock);
         return count;
 }
@@ -327,11 +376,15 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
         struct f75375_data *data = i2c_get_clientdata(client);
         u8 fanmode;
 
-        if (val < 0 || val > 3)
+        if (val < 0 || val > 4)
                 return -EINVAL;
 
         fanmode = f75375_read8(client, F75375_REG_FAN_TIMER);
         if (data->kind == f75387) {
+                /* For now, deny dangerous toggling of duty mode */
+                if (duty_mode_enabled(data->pwm_enable[nr]) !=
+                                duty_mode_enabled(val))
+                        return -EOPNOTSUPP;
                 /* clear each fanX_mode bit before setting them properly */
                 fanmode &= ~(1 << F75387_FAN_DUTY_MODE(nr));
                 fanmode &= ~(1 << F75387_FAN_MANU_MODE(nr));
@@ -340,19 +393,19 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
                         fanmode |= (1 << F75387_FAN_MANU_MODE(nr));
                         fanmode |= (1 << F75387_FAN_DUTY_MODE(nr));
                         data->pwm[nr] = 255;
-                        f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
-                                        data->pwm[nr]);
                         break;
                 case 1: /* PWM */
                         fanmode  |= (1 << F75387_FAN_MANU_MODE(nr));
                         fanmode  |= (1 << F75387_FAN_DUTY_MODE(nr));
                         break;
-                case 2: /* AUTOMATIC*/
-                        fanmode  |=  (1 << F75387_FAN_DUTY_MODE(nr));
+                case 2: /* Automatic, speed mode */
                         break;
                 case 3: /* fan speed */
                         fanmode |= (1 << F75387_FAN_MANU_MODE(nr));
                         break;
+                case 4: /* Automatic, pwm */
+                        fanmode |= (1 << F75387_FAN_DUTY_MODE(nr));
+                        break;
                 }
         } else {
                 /* clear each fanX_mode bit before setting them properly */
@@ -361,8 +414,6 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
                 case 0: /* full speed */
                         fanmode  |= (3 << FAN_CTRL_MODE(nr));
                         data->pwm[nr] = 255;
-                        f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
-                                        data->pwm[nr]);
                         break;
                 case 1: /* PWM */
                         fanmode  |= (3 << FAN_CTRL_MODE(nr));
@@ -372,11 +423,15 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
                         break;
                 case 3: /* fan speed */
                         break;
+                case 4: /* Automatic pwm */
+                        return -EINVAL;
                 }
         }
 
         f75375_write8(client, F75375_REG_FAN_TIMER, fanmode);
         data->pwm_enable[nr] = val;
+        if (val == 0)
+                f75375_write_pwm(client, nr);
         return 0;
 }
 
@@ -727,14 +782,17 @@ static void f75375_init(struct i2c_client *client, struct f75375_data *data,
 
                                 manu = ((mode >> F75387_FAN_MANU_MODE(nr)) & 1);
                                 duty = ((mode >> F75387_FAN_DUTY_MODE(nr)) & 1);
-                                if (manu && duty)
-                                        /* speed */
+                                if (!manu && duty)
+                                        /* auto, pwm */
+                                        data->pwm_enable[nr] = 4;
+                                else if (manu && !duty)
+                                        /* manual, speed */
                                         data->pwm_enable[nr] = 3;
-                                else if (!manu && duty)
-                                        /* automatic */
+                                else if (!manu && !duty)
+                                        /* automatic, speed */
                                         data->pwm_enable[nr] = 2;
                                 else
-                                        /* manual */
+                                        /* manual, pwm */
                                         data->pwm_enable[nr] = 1;
                         } else {
                                 if (!(conf & (1 << F75375_FAN_CTRL_LINEAR(nr))))
@@ -759,9 +817,11 @@ static void f75375_init(struct i2c_client *client, struct f75375_data *data,
         set_pwm_enable_direct(client, 0, f75375s_pdata->pwm_enable[0]);
         set_pwm_enable_direct(client, 1, f75375s_pdata->pwm_enable[1]);
         for (nr = 0; nr < 2; nr++) {
+                if (auto_mode_enabled(f75375s_pdata->pwm_enable[nr]) ||
+                    !duty_mode_enabled(f75375s_pdata->pwm_enable[nr]))
+                        continue;
                 data->pwm[nr] = SENSORS_LIMIT(f75375s_pdata->pwm[nr], 0, 255);
-                f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
-                        data->pwm[nr]);
+                f75375_write_pwm(client, nr);
         }
 
 }
@@ -788,7 +848,7 @@ static int f75375_probe(struct i2c_client *client,
         if (err)
                 goto exit_free;
 
-        if (data->kind == f75375) {
+        if (data->kind != f75373) {
                 err = sysfs_chmod_file(&client->dev.kobj,
                         &sensor_dev_attr_pwm1_mode.dev_attr.attr,
                         S_IRUGO | S_IWUSR);
diff --git a/drivers/hwmon/max6639.c b/drivers/hwmon/max6639.c
index e10a092c603c..a6760bacd915 100644
--- a/drivers/hwmon/max6639.c
+++ b/drivers/hwmon/max6639.c
@@ -72,8 +72,8 @@ static unsigned short normal_i2c[] = { 0x2c, 0x2e, 0x2f, I2C_CLIENT_END };
 
 static const int rpm_ranges[] = { 2000, 4000, 8000, 16000 };
 
-#define FAN_FROM_REG(val, div, rpm_range)       ((val) == 0 ? -1 : \
-        (val) == 255 ? 0 : (rpm_ranges[rpm_range] * 30) / ((div + 1) * (val)))
+#define FAN_FROM_REG(val, rpm_range)    ((val) == 0 || (val) == 255 ? \
+                                0 : (rpm_ranges[rpm_range] * 30) / (val))
 #define TEMP_LIMIT_TO_REG(val)  SENSORS_LIMIT((val) / 1000, 0, 255)
 
 /*
@@ -333,7 +333,7 @@ static ssize_t show_fan_input(struct device *dev,
                 return PTR_ERR(data);
 
         return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[attr->index],
-                       data->ppr, data->rpm_range));
+                       data->rpm_range));
 }
 
 static ssize_t show_alarm(struct device *dev,
@@ -429,9 +429,9 @@ static int max6639_init_client(struct i2c_client *client)
         struct max6639_data *data = i2c_get_clientdata(client);
         struct max6639_platform_data *max6639_info =
                 client->dev.platform_data;
-        int i = 0;
+        int i;
         int rpm_range = 1; /* default: 4000 RPM */
-        int err = 0;
+        int err;
 
         /* Reset chip to default values, see below for GCONFIG setup */
         err = i2c_smbus_write_byte_data(client, MAX6639_REG_GCONFIG,
@@ -446,11 +446,6 @@ static int max6639_init_client(struct i2c_client *client)
         else
                 data->ppr = 2;
         data->ppr -= 1;
-        err = i2c_smbus_write_byte_data(client,
-                        MAX6639_REG_FAN_PPR(i),
-                        data->ppr << 5);
-        if (err)
-                goto exit;
 
         if (max6639_info)
                 rpm_range = rpm_range_to_reg(max6639_info->rpm_range);
@@ -458,6 +453,13 @@ static int max6639_init_client(struct i2c_client *client)
 
         for (i = 0; i < 2; i++) {
 
+                /* Set Fan pulse per revolution */
+                err = i2c_smbus_write_byte_data(client,
+                                MAX6639_REG_FAN_PPR(i),
+                                data->ppr << 6);
+                if (err)
+                        goto exit;
+
                 /* Fans config PWM, RPM */
                 err = i2c_smbus_write_byte_data(client,
                         MAX6639_REG_FAN_CONFIG1(i),
diff --git a/drivers/hwmon/pmbus/max34440.c b/drivers/hwmon/pmbus/max34440.c
index beaf5a8d9c45..9b97a5b3cf3d 100644
--- a/drivers/hwmon/pmbus/max34440.c
+++ b/drivers/hwmon/pmbus/max34440.c
@@ -82,7 +82,7 @@ static int max34440_write_word_data(struct i2c_client *client, int page,
         case PMBUS_VIRT_RESET_TEMP_HISTORY:
                 ret = pmbus_write_word_data(client, page,
                                             MAX34440_MFR_TEMPERATURE_PEAK,
-                                            0xffff);
+                                            0x8000);
                 break;
         default:
                 ret = -ENODATA;
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 7e78f7c87857..3d471d56bf15 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -72,6 +72,7 @@
 
 #define MXS_I2C_QUEUESTAT       (0x70)
 #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY        0x00002000
+#define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK  0x0000001F
 
 #define MXS_I2C_QUEUECMD        (0x80)
 
@@ -219,14 +220,14 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
         int ret;
         int flags;
 
-        init_completion(&i2c->cmd_complete);
-
         dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
                 msg->addr, msg->len, msg->flags, stop);
 
         if (msg->len == 0)
                 return -EINVAL;
 
+        init_completion(&i2c->cmd_complete);
+
         flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
 
         if (msg->flags & I2C_M_RD)
@@ -286,6 +287,7 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
 {
         struct mxs_i2c_dev *i2c = dev_id;
         u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
+        bool is_last_cmd;
 
         if (!stat)
                 return IRQ_NONE;
@@ -300,9 +302,14 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
         else
                 i2c->cmd_err = 0;
 
-        complete(&i2c->cmd_complete);
+        is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
+                MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;
+
+        if (is_last_cmd || i2c->cmd_err)
+                complete(&i2c->cmd_complete);
 
         writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
+
         return IRQ_HANDLED;
 }
 
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index d60364650990..f6733267fa9c 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -29,6 +29,8 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/i2c-pxa.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/of_i2c.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
@@ -1044,23 +1046,60 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
         .functionality  = i2c_pxa_functionality,
 };
 
-static int i2c_pxa_probe(struct platform_device *dev)
+static struct of_device_id i2c_pxa_dt_ids[] = {
+        { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
+        { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
+        { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX },
+        {}
+};
+MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids);
+
+static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c,
+                            enum pxa_i2c_types *i2c_types)
 {
-        struct pxa_i2c *i2c;
-        struct resource *res;
-        struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
-        const struct platform_device_id *id = platform_get_device_id(dev);
-        enum pxa_i2c_types i2c_type = id->driver_data;
+        struct device_node *np = pdev->dev.of_node;
+        const struct of_device_id *of_id =
+                        of_match_device(i2c_pxa_dt_ids, &pdev->dev);
         int ret;
-        int irq;
 
-        res = platform_get_resource(dev, IORESOURCE_MEM, 0);
-        irq = platform_get_irq(dev, 0);
-        if (res == NULL || irq < 0)
-                return -ENODEV;
+        if (!of_id)
+                return 1;
+        ret = of_alias_get_id(np, "i2c");
+        if (ret < 0) {
+                dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
+                return ret;
+        }
+        pdev->id = ret;
+        if (of_get_property(np, "mrvl,i2c-polling", NULL))
+                i2c->use_pio = 1;
+        if (of_get_property(np, "mrvl,i2c-fast-mode", NULL))
+                i2c->fast_mode = 1;
+        *i2c_types = (u32)(of_id->data);
+        return 0;
+}
 
-        if (!request_mem_region(res->start, resource_size(res), res->name))
-                return -ENOMEM;
+static int i2c_pxa_probe_pdata(struct platform_device *pdev,
+                               struct pxa_i2c *i2c,
+                               enum pxa_i2c_types *i2c_types)
+{
+        struct i2c_pxa_platform_data *plat = pdev->dev.platform_data;
+        const struct platform_device_id *id = platform_get_device_id(pdev);
+
+        *i2c_types = id->driver_data;
+        if (plat) {
+                i2c->use_pio = plat->use_pio;
+                i2c->fast_mode = plat->fast_mode;
+        }
+        return 0;
+}
+
+static int i2c_pxa_probe(struct platform_device *dev)
+{
+        struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
+        enum pxa_i2c_types i2c_type;
+        struct pxa_i2c *i2c;
+        struct resource *res = NULL;
+        int ret, irq;
 
         i2c = kzalloc(sizeof(struct pxa_i2c), GFP_KERNEL);
         if (!i2c) {
@@ -1068,6 +1107,24 @@ static int i2c_pxa_probe(struct platform_device *dev)
                 goto emalloc;
         }
 
+        ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
+        if (ret > 0)
+                ret = i2c_pxa_probe_pdata(dev, i2c, &i2c_type);
+        if (ret < 0)
+                goto eclk;
+
+        res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        irq = platform_get_irq(dev, 0);
+        if (res == NULL || irq < 0) {
+                ret = -ENODEV;
+                goto eclk;
+        }
+
+        if (!request_mem_region(res->start, resource_size(res), res->name)) {
+                ret = -ENOMEM;
+                goto eclk;
+        }
+
         i2c->adap.owner   = THIS_MODULE;
         i2c->adap.retries = 5;
 
@@ -1109,21 +1166,16 @@ static int i2c_pxa_probe(struct platform_device *dev)
 
         i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
 
-#ifdef CONFIG_I2C_PXA_SLAVE
         if (plat) {
+#ifdef CONFIG_I2C_PXA_SLAVE
                 i2c->slave_addr = plat->slave_addr;
                 i2c->slave = plat->slave;
-        }
 #endif
-
-        clk_enable(i2c->clk);
-
-        if (plat) {
                 i2c->adap.class = plat->class;
-                i2c->use_pio = plat->use_pio;
-                i2c->fast_mode = plat->fast_mode;
         }
 
+        clk_enable(i2c->clk);
+
         if (i2c->use_pio) {
                 i2c->adap.algo = &i2c_pxa_pio_algorithm;
         } else {
@@ -1234,6 +1286,7 @@ static struct platform_driver i2c_pxa_driver = {
                 .name   = "pxa2xx-i2c",
                 .owner  = THIS_MODULE,
                 .pm     = I2C_PXA_DEV_PM_OPS,
+                .of_match_table = i2c_pxa_dt_ids,
         },
         .id_table       = i2c_pxa_id_table,
 };
diff --git a/drivers/iommu/omap-iommu-debug.c b/drivers/iommu/omap-iommu-debug.c
index 288da5c1499d..103dbd92e256 100644
--- a/drivers/iommu/omap-iommu-debug.c
+++ b/drivers/iommu/omap-iommu-debug.c
@@ -44,7 +44,8 @@ static ssize_t debug_read_ver(struct file *file, char __user *userbuf,
 static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
                                size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
+        struct omap_iommu *obj = dev_to_omap_iommu(dev);
         char *p, *buf;
         ssize_t bytes;
 
@@ -67,7 +68,8 @@ static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
 static ssize_t debug_read_tlb(struct file *file, char __user *userbuf,
                               size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
+        struct omap_iommu *obj = dev_to_omap_iommu(dev);
         char *p, *buf;
         ssize_t bytes, rest;
 
@@ -97,7 +99,8 @@ static ssize_t debug_write_pagetable(struct file *file,
         struct iotlb_entry e;
         struct cr_regs cr;
         int err;
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
+        struct omap_iommu *obj = dev_to_omap_iommu(dev);
         char buf[MAXCOLUMN], *p = buf;
 
         count = min(count, sizeof(buf));
@@ -184,7 +187,8 @@ out:
 static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
                                     size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
+        struct omap_iommu *obj = dev_to_omap_iommu(dev);
         char *p, *buf;
         size_t bytes;
 
@@ -212,7 +216,8 @@ static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
 static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
                                size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
+        struct omap_iommu *obj = dev_to_omap_iommu(dev);
         char *p, *buf;
         struct iovm_struct *tmp;
         int uninitialized_var(i);
@@ -254,7 +259,7 @@ static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
 static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
                               size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
         char *p, *buf;
         struct iovm_struct *area;
         ssize_t bytes;
@@ -268,8 +273,8 @@ static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
 
         mutex_lock(&iommu_debug_lock);
 
-        area = omap_find_iovm_area(obj, (u32)ppos);
-        if (IS_ERR(area)) {
+        area = omap_find_iovm_area(dev, (u32)ppos);
+        if (!area) {
                 bytes = -EINVAL;
                 goto err_out;
         }
@@ -287,7 +292,7 @@ err_out:
 static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
                                size_t count, loff_t *ppos)
 {
-        struct omap_iommu *obj = file->private_data;
+        struct device *dev = file->private_data;
         struct iovm_struct *area;
         char *p, *buf;
 
@@ -305,8 +310,8 @@ static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
                 goto err_out;
         }
 
-        area = omap_find_iovm_area(obj, (u32)ppos);
-        if (IS_ERR(area)) {
+        area = omap_find_iovm_area(dev, (u32)ppos);
+        if (!area) {
                 count = -EINVAL;
                 goto err_out;
         }
@@ -350,7 +355,7 @@ DEBUG_FOPS(mem);
         {                                                               \
                 struct dentry *dent;                                    \
                 dent = debugfs_create_file(#attr, mode, parent,         \
-                                           obj, &debug_##attr##_fops);  \
+                                           dev, &debug_##attr##_fops);  \
                 if (!dent)                                              \
                         return -ENOMEM;                                 \
         }
@@ -362,20 +367,29 @@ static int iommu_debug_register(struct device *dev, void *data)
 {
         struct platform_device *pdev = to_platform_device(dev);
         struct omap_iommu *obj = platform_get_drvdata(pdev);
+        struct omap_iommu_arch_data *arch_data;
         struct dentry *d, *parent;
 
         if (!obj || !obj->dev)
                 return -EINVAL;
 
+        arch_data = kzalloc(sizeof(*arch_data), GFP_KERNEL);
+        if (!arch_data)
+                return -ENOMEM;
+
+        arch_data->iommu_dev = obj;
+
+        dev->archdata.iommu = arch_data;
+
         d = debugfs_create_dir(obj->name, iommu_debug_root);
         if (!d)
-                return -ENOMEM;
+                goto nomem;
         parent = d;
 
         d = debugfs_create_u8("nr_tlb_entries", 400, parent,
                               (u8 *)&obj->nr_tlb_entries);
         if (!d)
-                return -ENOMEM;
+                goto nomem;
 
         DEBUG_ADD_FILE_RO(ver);
         DEBUG_ADD_FILE_RO(regs);
@@ -385,6 +399,22 @@ static int iommu_debug_register(struct device *dev, void *data)
         DEBUG_ADD_FILE(mem);
 
         return 0;
+
+nomem:
+        kfree(arch_data);
+        return -ENOMEM;
+}
+
+static int iommu_debug_unregister(struct device *dev, void *data)
+{
+        if (!dev->archdata.iommu)
+                return 0;
+
+        kfree(dev->archdata.iommu);
+
+        dev->archdata.iommu = NULL;
+
+        return 0;
 }
 
 static int __init iommu_debug_init(void)
@@ -411,6 +441,7 @@ module_init(iommu_debug_init)
 static void __exit iommu_debugfs_exit(void)
 {
         debugfs_remove_recursive(iommu_debug_root);
+        omap_foreach_iommu_device(NULL, iommu_debug_unregister);
 }
 module_exit(iommu_debugfs_exit)
 
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index d8edd979d01b..6899dcd02dfa 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -1223,7 +1223,8 @@ static int __init omap_iommu_init(void)
 
         return platform_driver_register(&omap_iommu_driver);
 }
-module_init(omap_iommu_init);
+/* must be ready before omap3isp is probed */
+subsys_initcall(omap_iommu_init);
 
 static void __exit omap_iommu_exit(void)
 {
diff --git a/drivers/media/radio/wl128x/Kconfig b/drivers/media/radio/wl128x/Kconfig
index 86b28579f0c7..ea1e6545df36 100644
--- a/drivers/media/radio/wl128x/Kconfig
+++ b/drivers/media/radio/wl128x/Kconfig
@@ -4,8 +4,8 @@
 menu "Texas Instruments WL128x FM driver (ST based)"
 config RADIO_WL128X
         tristate "Texas Instruments WL128x FM Radio"
-        depends on VIDEO_V4L2 && RFKILL
-        select TI_ST if NET && GPIOLIB
+        depends on VIDEO_V4L2 && RFKILL && GPIOLIB
+        select TI_ST if NET
         help
         Choose Y here if you have this FM radio chip.
 
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 3aeb29a7ce11..7f26fdf2e54e 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -47,7 +47,7 @@
 #define MOD_AUTHOR      "Jarod Wilson <jarod@wilsonet.com>"
 #define MOD_DESC        "Driver for SoundGraph iMON MultiMedia IR/Display"
 #define MOD_NAME        "imon"
-#define MOD_VERSION     "0.9.3"
+#define MOD_VERSION     "0.9.4"
 
 #define DISPLAY_MINOR_BASE      144
 #define DEVICE_NAME     "lcd%d"
@@ -1658,9 +1658,17 @@ static void usb_rx_callback_intf0(struct urb *urb)
                 return;
 
         ictx = (struct imon_context *)urb->context;
-        if (!ictx || !ictx->dev_present_intf0)
+        if (!ictx)
                 return;
 
+        /*
+         * if we get a callback before we're done configuring the hardware, we
+         * can't yet process the data, as there's nowhere to send it, but we
+         * still need to submit a new rx URB to avoid wedging the hardware
+         */
+        if (!ictx->dev_present_intf0)
+                goto out;
+
         switch (urb->status) {
         case -ENOENT:           /* usbcore unlink successful! */
                 return;
@@ -1678,6 +1686,7 @@ static void usb_rx_callback_intf0(struct urb *urb)
                 break;
         }
 
+out:
         usb_submit_urb(ictx->rx_urb_intf0, GFP_ATOMIC);
 }
 
@@ -1690,9 +1699,17 @@ static void usb_rx_callback_intf1(struct urb *urb)
                 return;
 
         ictx = (struct imon_context *)urb->context;
-        if (!ictx || !ictx->dev_present_intf1)
+        if (!ictx)
                 return;
 
+        /*
+         * if we get a callback before we're done configuring the hardware, we
+         * can't yet process the data, as there's nowhere to send it, but we
+         * still need to submit a new rx URB to avoid wedging the hardware
+         */
+        if (!ictx->dev_present_intf1)
+                goto out;
+
         switch (urb->status) {
         case -ENOENT:           /* usbcore unlink successful! */
                 return;
@@ -1710,6 +1727,7 @@ static void usb_rx_callback_intf1(struct urb *urb)
                 break;
         }
 
+out:
         usb_submit_urb(ictx->rx_urb_intf1, GFP_ATOMIC);
 }
 
@@ -2242,7 +2260,7 @@ find_endpoint_failed:
         mutex_unlock(&ictx->lock);
         usb_free_urb(rx_urb);
 rx_urb_alloc_failed:
-        dev_err(ictx->dev, "unable to initialize intf0, err %d\n", ret);
+        dev_err(ictx->dev, "unable to initialize intf1, err %d\n", ret);
 
         return NULL;
 }
diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c
index e5eb56a5b618..6510110f53d0 100644
--- a/drivers/media/video/hdpvr/hdpvr-core.c
+++ b/drivers/media/video/hdpvr/hdpvr-core.c
@@ -154,10 +154,20 @@ static int device_authorization(struct hdpvr_device *dev)
         }
 #endif
 
+        dev->fw_ver = dev->usbc_buf[1];
+
         v4l2_info(&dev->v4l2_dev, "firmware version 0x%x dated %s\n",
-                          dev->usbc_buf[1], &dev->usbc_buf[2]);
+                          dev->fw_ver, &dev->usbc_buf[2]);
+
+        if (dev->fw_ver > 0x15) {
+                dev->options.brightness = 0x80;
+                dev->options.contrast   = 0x40;
+                dev->options.hue        = 0xf;
+                dev->options.saturation = 0x40;
+                dev->options.sharpness  = 0x80;
+        }
 
-        switch (dev->usbc_buf[1]) {
+        switch (dev->fw_ver) {
         case HDPVR_FIRMWARE_VERSION:
                 dev->flags &= ~HDPVR_FLAG_AC3_CAP;
                 break;
@@ -169,7 +179,7 @@ static int device_authorization(struct hdpvr_device *dev)
         default:
                 v4l2_info(&dev->v4l2_dev, "untested firmware, the driver might"
                           " not work.\n");
-                if (dev->usbc_buf[1] >= HDPVR_FIRMWARE_VERSION_AC3)
+                if (dev->fw_ver >= HDPVR_FIRMWARE_VERSION_AC3)
                         dev->flags |= HDPVR_FLAG_AC3_CAP;
                 else
                         dev->flags &= ~HDPVR_FLAG_AC3_CAP;
@@ -270,6 +280,8 @@ static const struct hdpvr_options hdpvr_default_options = {
         .bitrate_mode   = HDPVR_CONSTANT,
         .gop_mode       = HDPVR_SIMPLE_IDR_GOP,
         .audio_codec    = V4L2_MPEG_AUDIO_ENCODING_AAC,
+        /* original picture controls for firmware version <= 0x15 */
+        /* updated in device_authorization() for newer firmware */
         .brightness     = 0x86,
         .contrast       = 0x80,
         .hue            = 0x80,
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c
index 087f7c08cb85..11ffe9cc1780 100644
--- a/drivers/media/video/hdpvr/hdpvr-video.c
+++ b/drivers/media/video/hdpvr/hdpvr-video.c
@@ -283,12 +283,13 @@ static int hdpvr_start_streaming(struct hdpvr_device *dev)
 
                 hdpvr_config_call(dev, CTRL_START_STREAMING_VALUE, 0x00);
 
+                dev->status = STATUS_STREAMING;
+
                 INIT_WORK(&dev->worker, hdpvr_transmit_buffers);
                 queue_work(dev->workqueue, &dev->worker);
 
                 v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
                          "streaming started\n");
-                dev->status = STATUS_STREAMING;
 
                 return 0;
         }
@@ -722,21 +723,39 @@ static const s32 supported_v4l2_ctrls[] = {
 };
 
 static int fill_queryctrl(struct hdpvr_options *opt, struct v4l2_queryctrl *qc,
-                          int ac3)
+                          int ac3, int fw_ver)
 {
         int err;
 
+        if (fw_ver > 0x15) {
+                switch (qc->id) {
+                case V4L2_CID_BRIGHTNESS:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                case V4L2_CID_CONTRAST:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x40);
+                case V4L2_CID_SATURATION:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x40);
+                case V4L2_CID_HUE:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0x1e, 1, 0xf);
+                case V4L2_CID_SHARPNESS:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                }
+        } else {
+                switch (qc->id) {
+                case V4L2_CID_BRIGHTNESS:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x86);
+                case V4L2_CID_CONTRAST:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                case V4L2_CID_SATURATION:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                case V4L2_CID_HUE:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                case V4L2_CID_SHARPNESS:
+                        return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
+                }
+        }
+
         switch (qc->id) {
-        case V4L2_CID_BRIGHTNESS:
-                return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x86);
-        case V4L2_CID_CONTRAST:
-                return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
-        case V4L2_CID_SATURATION:
-                return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
-        case V4L2_CID_HUE:
-                return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
-        case V4L2_CID_SHARPNESS:
-                return v4l2_ctrl_query_fill(qc, 0x0, 0xff, 1, 0x80);
         case V4L2_CID_MPEG_AUDIO_ENCODING:
                 return v4l2_ctrl_query_fill(
                         qc, V4L2_MPEG_AUDIO_ENCODING_AAC,
@@ -794,7 +813,8 @@ static int vidioc_queryctrl(struct file *file, void *private_data,
 
                 if (qc->id == supported_v4l2_ctrls[i])
                         return fill_queryctrl(&dev->options, qc,
-                                              dev->flags & HDPVR_FLAG_AC3_CAP);
+                                              dev->flags & HDPVR_FLAG_AC3_CAP,
+                                              dev->fw_ver);
 
                 if (qc->id < supported_v4l2_ctrls[i])
                         break;
diff --git a/drivers/media/video/hdpvr/hdpvr.h b/drivers/media/video/hdpvr/hdpvr.h
index d6439db1d18b..fea3c6926997 100644
--- a/drivers/media/video/hdpvr/hdpvr.h
+++ b/drivers/media/video/hdpvr/hdpvr.h
@@ -113,6 +113,7 @@ struct hdpvr_device {
         /* usb control transfer buffer and lock */
         struct mutex            usbc_mutex;
         u8                      *usbc_buf;
+        u8                      fw_ver;
 };
 
 static inline struct hdpvr_device *to_hdpvr_dev(struct v4l2_device *v4l2_dev)
diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c
index a74a79701d34..eaabc27f0fa2 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -1407,7 +1407,7 @@ static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
 {
         struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
-        struct video_device *vdev = &ccdc->subdev.devnode;
+        struct video_device *vdev = ccdc->subdev.devnode;
         struct v4l2_event event;
 
         memset(&event, 0, sizeof(event));
diff --git a/drivers/misc/atmel_tclib.c b/drivers/misc/atmel_tclib.c
index 4bcfc3759734..c8d8e38d0d8a 100644
--- a/drivers/misc/atmel_tclib.c
+++ b/drivers/misc/atmel_tclib.c
@@ -6,12 +6,10 @@
 #include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/export.h>
-
-/* Number of bytes to reserve for the iomem resource */
-#define ATMEL_TC_IOMEM_SIZE     256
-
+#include <linux/of.h>
 
 /*
  * This is a thin library to solve the problem of how to portably allocate
@@ -48,10 +46,17 @@ struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name)
         struct atmel_tc         *tc;
         struct platform_device  *pdev = NULL;
         struct resource         *r;
+        size_t                  size;
 
         spin_lock(&tc_list_lock);
         list_for_each_entry(tc, &tc_list, node) {
-                if (tc->pdev->id == block) {
+                if (tc->pdev->dev.of_node) {
+                        if (of_alias_get_id(tc->pdev->dev.of_node, "tcb")
+                                        == block) {
+                                pdev = tc->pdev;
+                                break;
+                        }
+                } else if (tc->pdev->id == block) {
                         pdev = tc->pdev;
                         break;
                 }
@@ -61,11 +66,15 @@ struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name)
                 goto fail;
 
         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        r = request_mem_region(r->start, ATMEL_TC_IOMEM_SIZE, name);
         if (!r)
                 goto fail;
 
-        tc->regs = ioremap(r->start, ATMEL_TC_IOMEM_SIZE);
+        size = resource_size(r);
+        r = request_mem_region(r->start, size, name);
+        if (!r)
+                goto fail;
+
+        tc->regs = ioremap(r->start, size);
         if (!tc->regs)
                 goto fail_ioremap;
 
@@ -76,7 +85,7 @@ out:
         return tc;
 
 fail_ioremap:
-        release_mem_region(r->start, ATMEL_TC_IOMEM_SIZE);
+        release_mem_region(r->start, size);
 fail:
         tc = NULL;
         goto out;
@@ -96,7 +105,7 @@ void atmel_tc_free(struct atmel_tc *tc)
         spin_lock(&tc_list_lock);
         if (tc->regs) {
                 iounmap(tc->regs);
-                release_mem_region(tc->iomem->start, ATMEL_TC_IOMEM_SIZE);
+                release_mem_region(tc->iomem->start, resource_size(tc->iomem));
                 tc->regs = NULL;
                 tc->iomem = NULL;
         }
@@ -104,6 +113,30 @@ void atmel_tc_free(struct atmel_tc *tc)
 }
 EXPORT_SYMBOL_GPL(atmel_tc_free);
 
+#if defined(CONFIG_OF)
+static struct atmel_tcb_config tcb_rm9200_config = {
+        .counter_width = 16,
+};
+
+static struct atmel_tcb_config tcb_sam9x5_config = {
+        .counter_width = 32,
+};
+
+static const struct of_device_id atmel_tcb_dt_ids[] = {
+        {
+                .compatible = "atmel,at91rm9200-tcb",
+                .data = &tcb_rm9200_config,
+        }, {
+                .compatible = "atmel,at91sam9x5-tcb",
+                .data = &tcb_sam9x5_config,
+        }, {
+                /* sentinel */
+        }
+};
+
+MODULE_DEVICE_TABLE(of, atmel_tcb_dt_ids);
+#endif
+
 static int __init tc_probe(struct platform_device *pdev)
 {
         struct atmel_tc *tc;
@@ -129,6 +162,14 @@ static int __init tc_probe(struct platform_device *pdev)
                 return -EINVAL;
         }
 
+        /* Now take SoC information if available */
+        if (pdev->dev.of_node) {
+                const struct of_device_id *match;
+                match = of_match_node(atmel_tcb_dt_ids, pdev->dev.of_node);
+                if (match)
+                        tc->tcb_config = match->data;
+        }
+
         tc->clk[0] = clk;
         tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
         if (IS_ERR(tc->clk[1]))
@@ -153,7 +194,10 @@ static int __init tc_probe(struct platform_device *pdev)
 }
 
 static struct platform_driver tc_driver = {
-        .driver.name    = "atmel_tcb",
+        .driver = {
+                .name   = "atmel_tcb",
+                .of_match_table = of_match_ptr(atmel_tcb_dt_ids),
+        },
 };
 
 static int __init tc_init(void)
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index 947faa5d2ce4..efdb81d21c44 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -86,7 +86,6 @@ static inline int at91mci_is_mci1rev2xx(void)
 {
         return (   cpu_is_at91sam9260()
                 || cpu_is_at91sam9263()
-                || cpu_is_at91cap9()
                 || cpu_is_at91sam9rl()
                 || cpu_is_at91sam9g10()
                 || cpu_is_at91sam9g20()
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 0d955ffaf44e..304f2f98b680 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -1325,7 +1325,7 @@ static int __devinit mmci_probe(struct amba_device *dev,
         if (ret)
                 goto unmap;
 
-        if (dev->irq[1] == NO_IRQ)
+        if (dev->irq[1] == NO_IRQ || !dev->irq[1])
                 host->singleirq = true;
         else {
                 ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED,
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index 04a3f1b756a8..192b0d118df4 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -95,11 +95,16 @@ static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
         spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
 }
 
+static int sja1000_is_absent(struct sja1000_priv *priv)
+{
+        return (priv->read_reg(priv, REG_MOD) == 0xFF);
+}
+
 static int sja1000_probe_chip(struct net_device *dev)
 {
         struct sja1000_priv *priv = netdev_priv(dev);
 
-        if (priv->reg_base && (priv->read_reg(priv, 0) == 0xFF)) {
+        if (priv->reg_base && sja1000_is_absent(priv)) {
                 printk(KERN_INFO "%s: probing @0x%lX failed\n",
                        DRV_NAME, dev->base_addr);
                 return 0;
@@ -493,6 +498,9 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
         while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) {
                 n++;
                 status = priv->read_reg(priv, REG_SR);
+                /* check for absent controller due to hw unplug */
+                if (status == 0xFF && sja1000_is_absent(priv))
+                        return IRQ_NONE;
 
                 if (isrc & IRQ_WUI)
                         dev_warn(dev->dev.parent, "wakeup interrupt\n");
@@ -509,6 +517,9 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
                         while (status & SR_RBS) {
                                 sja1000_rx(dev);
                                 status = priv->read_reg(priv, REG_SR);
+                                /* check for absent controller */
+                                if (status == 0xFF && sja1000_is_absent(priv))
+                                        return IRQ_NONE;
                         }
                 }
                 if (isrc & (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) {
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index b8591246eb4c..1ff3c6df35a2 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -2244,10 +2244,6 @@ static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
                         dev_info(&adapter->pdev->dev, "tx locked\n");
                 return NETDEV_TX_LOCKED;
         }
-        if (skb->mark == 0x01)
-                type = atl1c_trans_high;
-        else
-                type = atl1c_trans_normal;
 
         if (atl1c_tpd_avail(adapter, type) < tpd_req) {
                 /* no enough descriptor, just stop queue */
diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c
index 3fb66d09ece5..cab87456a34a 100644
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -2339,7 +2339,7 @@ static inline int __init b44_pci_init(void)
         return err;
 }
 
-static inline void __exit b44_pci_exit(void)
+static inline void b44_pci_exit(void)
 {
 #ifdef CONFIG_B44_PCI
         ssb_pcihost_unregister(&b44_pci_driver);
diff --git a/drivers/net/ethernet/broadcom/cnic.c b/drivers/net/ethernet/broadcom/cnic.c
index dd3a0a232ea0..818a573669e6 100644
--- a/drivers/net/ethernet/broadcom/cnic.c
+++ b/drivers/net/ethernet/broadcom/cnic.c
@@ -3584,7 +3584,11 @@ static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
                 fl6.flowi6_oif = dst_addr->sin6_scope_id;
 
         *dst = ip6_route_output(&init_net, NULL, &fl6);
-        if (*dst)
+        if ((*dst)->error) {
+                dst_release(*dst);
+                *dst = NULL;
+                return -ENETUNREACH;
+        } else
                 return 0;
 #endif
 
diff --git a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h
index c2c0680a1146..ac37cacc6136 100644
--- a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h
+++ b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h
@@ -157,7 +157,7 @@ static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
                         CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
                 *fcoe_enc_error = (desc->flags &
                         CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
-                *fcoe_eof = (u8)((desc->checksum_fcoe >>
+                *fcoe_eof = (u8)((le16_to_cpu(desc->checksum_fcoe) >>
                         CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
                         CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
                 *checksum = 0;
diff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c
index 22bf03a1829e..c347b6236f8f 100644
--- a/drivers/net/ethernet/cisco/enic/enic_pp.c
+++ b/drivers/net/ethernet/cisco/enic/enic_pp.c
@@ -72,7 +72,7 @@ static int enic_set_port_profile(struct enic *enic, int vf)
         struct enic_port_profile *pp;
         struct vic_provinfo *vp;
         const u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
-        const u16 os_type = htons(VIC_GENERIC_PROV_OS_TYPE_LINUX);
+        const __be16 os_type = htons(VIC_GENERIC_PROV_OS_TYPE_LINUX);
         char uuid_str[38];
         char client_mac_str[18];
         u8 *client_mac;
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c
index 27d651a80f3f..55cbf65512c3 100644
--- a/drivers/net/ethernet/jme.c
+++ b/drivers/net/ethernet/jme.c
@@ -2328,19 +2328,11 @@ jme_change_mtu(struct net_device *netdev, int new_mtu)
                 ((new_mtu) < IPV6_MIN_MTU))
                 return -EINVAL;
 
-        if (new_mtu > 4000) {
-                jme->reg_rxcs &= ~RXCS_FIFOTHNP;
-                jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
-                jme_restart_rx_engine(jme);
-        } else {
-                jme->reg_rxcs &= ~RXCS_FIFOTHNP;
-                jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
-                jme_restart_rx_engine(jme);
-        }
 
         netdev->mtu = new_mtu;
         netdev_update_features(netdev);
 
+        jme_restart_rx_engine(jme);
         jme_reset_link(jme);
 
         return 0;
diff --git a/drivers/net/ethernet/jme.h b/drivers/net/ethernet/jme.h
index 4304072bd3c5..3efc897c9913 100644
--- a/drivers/net/ethernet/jme.h
+++ b/drivers/net/ethernet/jme.h
@@ -730,7 +730,7 @@ enum jme_rxcs_values {
         RXCS_RETRYCNT_60        = 0x00000F00,
 
         RXCS_DEFAULT            = RXCS_FIFOTHTP_128T |
-                                  RXCS_FIFOTHNP_128QW |
+                                  RXCS_FIFOTHNP_16QW |
                                   RXCS_DMAREQSZ_128B |
                                   RXCS_RETRYGAP_256ns |
                                   RXCS_RETRYCNT_32,
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index 8fa41f3082cf..9129ace02560 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -1036,7 +1036,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
         struct mlx4_priv *priv = mlx4_priv(dev);
         int vec = 0, err = 0, i;
 
-        spin_lock(&priv->msix_ctl.pool_lock);
+        mutex_lock(&priv->msix_ctl.pool_lock);
         for (i = 0; !vec && i < dev->caps.comp_pool; i++) {
                 if (~priv->msix_ctl.pool_bm & 1ULL << i) {
                         priv->msix_ctl.pool_bm |= 1ULL << i;
@@ -1058,7 +1058,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
                         eq_set_ci(&priv->eq_table.eq[vec], 1);
                 }
         }
-        spin_unlock(&priv->msix_ctl.pool_lock);
+        mutex_unlock(&priv->msix_ctl.pool_lock);
 
         if (vec) {
                 *vector = vec;
@@ -1079,13 +1079,13 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec)
         if (likely(i >= 0)) {
                 /*sanity check , making sure were not trying to free irq's
                   Belonging to a legacy EQ*/
-                spin_lock(&priv->msix_ctl.pool_lock);
+                mutex_lock(&priv->msix_ctl.pool_lock);
                 if (priv->msix_ctl.pool_bm & 1ULL << i) {
                         free_irq(priv->eq_table.eq[vec].irq,
                                  &priv->eq_table.eq[vec]);
                         priv->msix_ctl.pool_bm &= ~(1ULL << i);
                 }
-                spin_unlock(&priv->msix_ctl.pool_lock);
+                mutex_unlock(&priv->msix_ctl.pool_lock);
         }
 
 }
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index 8a21e10952ea..9ea7cabcaf3c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -685,7 +685,7 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
         return err;
 }
 
-static int mlx4_QUERY_PORT(struct mlx4_dev *dev, void *ptr, u8 port)
+int mlx4_QUERY_PORT(struct mlx4_dev *dev, void *ptr, u8 port)
 {
         struct mlx4_cmd_mailbox *outbox = ptr;
 
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 678558b502fc..d498f049c74e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -531,15 +531,14 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
         for (port = 0; port <  dev->caps.num_ports; port++) {
                 /* Change the port type only if the new type is different
                  * from the current, and not set to Auto */
-                if (port_types[port] != dev->caps.port_type[port + 1]) {
+                if (port_types[port] != dev->caps.port_type[port + 1])
                         change = 1;
-                        dev->caps.port_type[port + 1] = port_types[port];
-                }
         }
         if (change) {
                 mlx4_unregister_device(dev);
                 for (port = 1; port <= dev->caps.num_ports; port++) {
                         mlx4_CLOSE_PORT(dev, port);
+                        dev->caps.port_type[port] = port_types[port - 1];
                         err = mlx4_SET_PORT(dev, port);
                         if (err) {
                                 mlx4_err(dev, "Failed to set port %d, "
@@ -986,6 +985,9 @@ static int map_bf_area(struct mlx4_dev *dev)
         resource_size_t bf_len;
         int err = 0;
 
+        if (!dev->caps.bf_reg_size)
+                return -ENXIO;
+
         bf_start = pci_resource_start(dev->pdev, 2) +
                         (dev->caps.num_uars << PAGE_SHIFT);
         bf_len = pci_resource_len(dev->pdev, 2) -
@@ -1825,7 +1827,7 @@ slave_start:
                 goto err_master_mfunc;
 
         priv->msix_ctl.pool_bm = 0;
-        spin_lock_init(&priv->msix_ctl.pool_lock);
+        mutex_init(&priv->msix_ctl.pool_lock);
 
         mlx4_enable_msi_x(dev);
         if ((mlx4_is_mfunc(dev)) &&
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index c92269f8c057..28f8251561f4 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -697,7 +697,7 @@ struct mlx4_sense {
 
 struct mlx4_msix_ctl {
         u64             pool_bm;
-        spinlock_t      pool_lock;
+        struct mutex    pool_lock;
 };
 
 struct mlx4_steer {
diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c
index 8deeef98280c..25a80d71fb2a 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mr.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mr.c
@@ -304,7 +304,7 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox
                             MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
 }
 
-static int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align,
+int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align,
                           u32 *base_mridx)
 {
         struct mlx4_priv *priv = mlx4_priv(dev);
@@ -320,14 +320,14 @@ static int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align,
 }
 EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range);
 
-static void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt)
+void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt)
 {
         struct mlx4_priv *priv = mlx4_priv(dev);
         mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt);
 }
 EXPORT_SYMBOL_GPL(mlx4_mr_release_range);
 
-static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
+int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
                            u64 iova, u64 size, u32 access, int npages,
                            int page_shift, struct mlx4_mr *mr)
 {
@@ -457,7 +457,7 @@ int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access,
 }
 EXPORT_SYMBOL_GPL(mlx4_mr_alloc);
 
-static void mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr *mr)
+void mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr *mr)
 {
         int err;
 
@@ -852,7 +852,7 @@ err_free:
 }
 EXPORT_SYMBOL_GPL(mlx4_fmr_alloc);
 
-static int mlx4_fmr_alloc_reserved(struct mlx4_dev *dev, u32 mridx,
+int mlx4_fmr_alloc_reserved(struct mlx4_dev *dev, u32 mridx,
                             u32 pd, u32 access, int max_pages,
                             int max_maps, u8 page_shift, struct mlx4_fmr *fmr)
 {
@@ -954,7 +954,7 @@ int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
 }
 EXPORT_SYMBOL_GPL(mlx4_fmr_free);
 
-static int mlx4_fmr_free_reserved(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
+int mlx4_fmr_free_reserved(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
 {
         if (fmr->maps)
                 return -EBUSY;
diff --git a/drivers/net/ethernet/micrel/ks8851_mll.c b/drivers/net/ethernet/micrel/ks8851_mll.c
index 231176fcd2ba..2784bc706f1e 100644
--- a/drivers/net/ethernet/micrel/ks8851_mll.c
+++ b/drivers/net/ethernet/micrel/ks8851_mll.c
@@ -1545,7 +1545,7 @@ static int __devinit ks8851_probe(struct platform_device *pdev)
 
         netdev->irq = platform_get_irq(pdev, 0);
 
-        if (netdev->irq < 0) {
+        if ((int)netdev->irq < 0) {
                 err = netdev->irq;
                 goto err_get_irq;
         }
diff --git a/drivers/net/ethernet/sfc/rx.c b/drivers/net/ethernet/sfc/rx.c
index aca349861767..fc52fca74193 100644
--- a/drivers/net/ethernet/sfc/rx.c
+++ b/drivers/net/ethernet/sfc/rx.c
@@ -156,11 +156,10 @@ static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
                 if (unlikely(!skb))
                         return -ENOMEM;
 
-                /* Adjust the SKB for padding and checksum */
+                /* Adjust the SKB for padding */
                 skb_reserve(skb, NET_IP_ALIGN);
                 rx_buf->len = skb_len - NET_IP_ALIGN;
                 rx_buf->is_page = false;
-                skb->ip_summed = CHECKSUM_UNNECESSARY;
 
                 rx_buf->dma_addr = pci_map_single(efx->pci_dev,
                                                   skb->data, rx_buf->len,
@@ -496,6 +495,7 @@ static void efx_rx_packet_gro(struct efx_channel *channel,
 
                 EFX_BUG_ON_PARANOID(!checksummed);
                 rx_buf->u.skb = NULL;
+                skb->ip_summed = CHECKSUM_UNNECESSARY;
 
                 gro_result = napi_gro_receive(napi, skb);
         }
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 4fa0bcb25dfc..4b2f54565f64 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -1009,7 +1009,7 @@ static void emac_rx_handler(void *token, int len, int status)
         int                     ret;
 
         /* free and bail if we are shutting down */
-        if (unlikely(!netif_running(ndev) || !netif_carrier_ok(ndev))) {
+        if (unlikely(!netif_running(ndev))) {
                 dev_kfree_skb_any(skb);
                 return;
         }
@@ -1038,7 +1038,9 @@ static void emac_rx_handler(void *token, int len, int status)
 recycle:
         ret = cpdma_chan_submit(priv->rxchan, skb, skb->data,
                         skb_tailroom(skb), GFP_KERNEL);
-        if (WARN_ON(ret < 0))
+
+        WARN_ON(ret == -ENOMEM);
+        if (unlikely(ret < 0))
                 dev_kfree_skb_any(skb);
 }
 
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index c81f136ae670..0856e1b7a849 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -30,16 +30,16 @@
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
-MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IC1001 PHY drivers");
+MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IP101G/IC1001 PHY drivers");
 MODULE_AUTHOR("Michael Barkowski");
 MODULE_LICENSE("GPL");
 
-/* IP101A/IP1001 */
-#define IP10XX_SPEC_CTRL_STATUS         16  /* Spec. Control Register */
-#define IP1001_SPEC_CTRL_STATUS_2       20  /* IP1001 Spec. Control Reg 2 */
-#define IP1001_PHASE_SEL_MASK           3 /* IP1001 RX/TXPHASE_SEL */
-#define IP1001_APS_ON                   11  /* IP1001 APS Mode  bit */
-#define IP101A_APS_ON                   2   /* IP101A APS Mode bit */
+/* IP101A/G - IP1001 */
+#define IP10XX_SPEC_CTRL_STATUS         16      /* Spec. Control Register */
+#define IP1001_SPEC_CTRL_STATUS_2       20      /* IP1001 Spec. Control Reg 2 */
+#define IP1001_PHASE_SEL_MASK           3       /* IP1001 RX/TXPHASE_SEL */
+#define IP1001_APS_ON                   11      /* IP1001 APS Mode  bit */
+#define IP101A_G_APS_ON                 2       /* IP101A/G APS Mode bit */
 
 static int ip175c_config_init(struct phy_device *phydev)
 {
@@ -98,20 +98,24 @@ static int ip175c_config_init(struct phy_device *phydev)
 
 static int ip1xx_reset(struct phy_device *phydev)
 {
-        int err, bmcr;
+        int bmcr;
 
         /* Software Reset PHY */
         bmcr = phy_read(phydev, MII_BMCR);
+        if (bmcr < 0)
+                return bmcr;
         bmcr |= BMCR_RESET;
-        err = phy_write(phydev, MII_BMCR, bmcr);
-        if (err < 0)
-                return err;
+        bmcr = phy_write(phydev, MII_BMCR, bmcr);
+        if (bmcr < 0)
+                return bmcr;
 
         do {
                 bmcr = phy_read(phydev, MII_BMCR);
+                if (bmcr < 0)
+                        return bmcr;
         } while (bmcr & BMCR_RESET);
 
-        return err;
+        return 0;
 }
 
 static int ip1001_config_init(struct phy_device *phydev)
@@ -124,7 +128,10 @@ static int ip1001_config_init(struct phy_device *phydev)
 
         /* Enable Auto Power Saving mode */
         c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
+        if (c < 0)
+                return c;
         c |= IP1001_APS_ON;
+        c = phy_write(phydev, IP1001_SPEC_CTRL_STATUS_2, c);
         if (c < 0)
                 return c;
 
@@ -132,14 +139,19 @@ static int ip1001_config_init(struct phy_device *phydev)
                 /* Additional delay (2ns) used to adjust RX clock phase
                  * at RGMII interface */
                 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
+                if (c < 0)
+                        return c;
+
                 c |= IP1001_PHASE_SEL_MASK;
                 c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
+                if (c < 0)
+                        return c;
         }
 
-        return c;
+        return 0;
 }
 
-static int ip101a_config_init(struct phy_device *phydev)
+static int ip101a_g_config_init(struct phy_device *phydev)
 {
         int c;
 
@@ -149,7 +161,7 @@ static int ip101a_config_init(struct phy_device *phydev)
 
         /* Enable Auto Power Saving mode */
         c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
-        c |= IP101A_APS_ON;
+        c |= IP101A_G_APS_ON;
         return c;
 }
 
@@ -191,6 +203,7 @@ static struct phy_driver ip1001_driver = {
         .phy_id_mask    = 0x0ffffff0,
         .features       = PHY_GBIT_FEATURES | SUPPORTED_Pause |
                           SUPPORTED_Asym_Pause,
+        .flags          = PHY_HAS_INTERRUPT,
         .config_init    = &ip1001_config_init,
         .config_aneg    = &genphy_config_aneg,
         .read_status    = &genphy_read_status,
@@ -199,13 +212,14 @@ static struct phy_driver ip1001_driver = {
         .driver         = { .owner = THIS_MODULE,},
 };
 
-static struct phy_driver ip101a_driver = {
+static struct phy_driver ip101a_g_driver = {
         .phy_id         = 0x02430c54,
-        .name           = "ICPlus IP101A",
+        .name           = "ICPlus IP101A/G",
         .phy_id_mask    = 0x0ffffff0,
         .features       = PHY_BASIC_FEATURES | SUPPORTED_Pause |
                           SUPPORTED_Asym_Pause,
-        .config_init    = &ip101a_config_init,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_init    = &ip101a_g_config_init,
         .config_aneg    = &genphy_config_aneg,
         .read_status    = &genphy_read_status,
         .suspend        = genphy_suspend,
@@ -221,7 +235,7 @@ static int __init icplus_init(void)
         if (ret < 0)
                 return -ENODEV;
 
-        ret = phy_driver_register(&ip101a_driver);
+        ret = phy_driver_register(&ip101a_g_driver);
         if (ret < 0)
                 return -ENODEV;
 
@@ -231,7 +245,7 @@ static int __init icplus_init(void)
 static void __exit icplus_exit(void)
 {
         phy_driver_unregister(&ip1001_driver);
-        phy_driver_unregister(&ip101a_driver);
+        phy_driver_unregister(&ip101a_g_driver);
         phy_driver_unregister(&ip175c_driver);
 }
 
@@ -241,6 +255,7 @@ module_exit(icplus_exit);
 static struct mdio_device_id __maybe_unused icplus_tbl[] = {
         { 0x02430d80, 0x0ffffff0 },
         { 0x02430d90, 0x0ffffff0 },
+        { 0x02430c54, 0x0ffffff0 },
         { }
 };
 
diff --git a/drivers/net/ppp/ppp_generic.c b/drivers/net/ppp/ppp_generic.c
index edfa15d2e795..486b4048850d 100644
--- a/drivers/net/ppp/ppp_generic.c
+++ b/drivers/net/ppp/ppp_generic.c
@@ -2024,14 +2024,22 @@ ppp_mp_reconstruct(struct ppp *ppp)
                         continue;
                 }
                 if (PPP_MP_CB(p)->sequence != seq) {
+                        u32 oldseq;
                         /* Fragment `seq' is missing.  If it is after
                            minseq, it might arrive later, so stop here. */
                         if (seq_after(seq, minseq))
                                 break;
                         /* Fragment `seq' is lost, keep going. */
                         lost = 1;
+                        oldseq = seq;
                         seq = seq_before(minseq, PPP_MP_CB(p)->sequence)?
                                 minseq + 1: PPP_MP_CB(p)->sequence;
+
+                        if (ppp->debug & 1)
+                                netdev_printk(KERN_DEBUG, ppp->dev,
+                                              "lost frag %u..%u\n",
+                                              oldseq, seq-1);
+
                         goto again;
                 }
 
@@ -2076,6 +2084,10 @@ ppp_mp_reconstruct(struct ppp *ppp)
                         struct sk_buff *tmp2;
 
                         skb_queue_reverse_walk_from_safe(list, p, tmp2) {
+                                if (ppp->debug & 1)
+                                        netdev_printk(KERN_DEBUG, ppp->dev,
+                                                      "discarding frag %u\n",
+                                                      PPP_MP_CB(p)->sequence);
                                 __skb_unlink(p, list);
                                 kfree_skb(p);
                         }
@@ -2091,6 +2103,17 @@ ppp_mp_reconstruct(struct ppp *ppp)
                 /* If we have discarded any fragments,
                    signal a receive error. */
                 if (PPP_MP_CB(head)->sequence != ppp->nextseq) {
+                        skb_queue_walk_safe(list, p, tmp) {
+                                if (p == head)
+                                        break;
+                                if (ppp->debug & 1)
+                                        netdev_printk(KERN_DEBUG, ppp->dev,
+                                                      "discarding frag %u\n",
+                                                      PPP_MP_CB(p)->sequence);
+                                __skb_unlink(p, list);
+                                kfree_skb(p);
+                        }
+
                         if (ppp->debug & 1)
                                 netdev_printk(KERN_DEBUG, ppp->dev,
                                               "  missed pkts %u..%u\n",
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 41a61efc331e..90a30026a931 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -573,6 +573,13 @@ static const struct usb_device_id	products [] = {
         .driver_info = 0,
 },
 
+/* Logitech Harmony 900 - uses the pseudo-MDLM (BLAN) driver */
+{
+        USB_DEVICE_AND_INTERFACE_INFO(0x046d, 0xc11f, USB_CLASS_COMM,
+                        USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
+        .driver_info            = 0,
+},
+
 /*
  * WHITELIST!!!
  *
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index 304fe78ff60e..e1324b4a0f66 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -1632,7 +1632,7 @@ static int hso_get_count(struct tty_struct *tty,
         struct hso_serial *serial = get_serial_by_tty(tty);
         struct hso_tiocmget  *tiocmget = serial->tiocmget;
 
-        memset(&icount, 0, sizeof(struct serial_icounter_struct));
+        memset(icount, 0, sizeof(struct serial_icounter_struct));
 
         if (!tiocmget)
                  return -ENOENT;
diff --git a/drivers/net/usb/zaurus.c b/drivers/net/usb/zaurus.c
index f701d4127087..c3197ce0e2ad 100644
--- a/drivers/net/usb/zaurus.c
+++ b/drivers/net/usb/zaurus.c
@@ -316,6 +316,11 @@ static const struct usb_device_id	products [] = {
         ZAURUS_MASTER_INTERFACE,
         .driver_info = ZAURUS_PXA_INFO,
 }, {
+        /* C-750/C-760/C-860/SL-C3000 PDA in MDLM mode */
+        USB_DEVICE_AND_INTERFACE_INFO(0x04DD, 0x9031, USB_CLASS_COMM,
+                        USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
+        .driver_info = (unsigned long) &bogus_mdlm_info,
+}, {
         .match_flags    =   USB_DEVICE_ID_MATCH_INT_INFO
                  | USB_DEVICE_ID_MATCH_DEVICE,
         .idVendor               = 0x04DD,
@@ -349,6 +354,13 @@ static const struct usb_device_id	products [] = {
         ZAURUS_MASTER_INTERFACE,
         .driver_info = OLYMPUS_MXL_INFO,
 },
+
+/* Logitech Harmony 900 - uses the pseudo-MDLM (BLAN) driver */
+{
+        USB_DEVICE_AND_INTERFACE_INFO(0x046d, 0xc11f, USB_CLASS_COMM,
+                        USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
+        .driver_info = (unsigned long) &bogus_mdlm_info,
+},
         { },            // END
 };
 MODULE_DEVICE_TABLE(usb, products);
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index de7fc345148a..3dcd3857a36c 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -843,8 +843,8 @@ vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
                                 /* for simplicity, don't copy L4 headers */
                                 ctx->l4_hdr_size = 0;
                         }
-                        ctx->copy_size = ctx->eth_ip_hdr_size +
-                                         ctx->l4_hdr_size;
+                        ctx->copy_size = min(ctx->eth_ip_hdr_size +
+                                         ctx->l4_hdr_size, skb->len);
                 } else {
                         ctx->eth_ip_hdr_size = 0;
                         ctx->l4_hdr_size = 0;
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 635b592ad961..a427a16bb739 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -1346,7 +1346,7 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
         fc = hdr->frame_control;
         for (i = 0; i < sc->hw->max_rates; i++) {
                 struct ieee80211_tx_rate *rate = &tx_info->status.rates[i];
-                if (!rate->count)
+                if (rate->idx < 0 || !rate->count)
                         break;
 
                 final_ts_idx = i;
diff --git a/drivers/net/wireless/mwifiex/cfg80211.c b/drivers/net/wireless/mwifiex/cfg80211.c
index c3b6c4652cd6..5b2972b43b0e 100644
--- a/drivers/net/wireless/mwifiex/cfg80211.c
+++ b/drivers/net/wireless/mwifiex/cfg80211.c
@@ -841,7 +841,12 @@ mwifiex_cfg80211_assoc(struct mwifiex_private *priv, size_t ssid_len, u8 *ssid,
                 ret = mwifiex_set_rf_channel(priv, channel,
                                                 priv->adapter->channel_type);
 
-        ret = mwifiex_set_encode(priv, NULL, 0, 0, 1);  /* Disable keys */
+        /* As this is new association, clear locally stored
+         * keys and security related flags */
+        priv->sec_info.wpa_enabled = false;
+        priv->sec_info.wpa2_enabled = false;
+        priv->wep_key_curr_index = 0;
+        ret = mwifiex_set_encode(priv, NULL, 0, 0, 1);
 
         if (mode == NL80211_IFTYPE_ADHOC) {
                 /* "privacy" is set only for ad-hoc mode */
@@ -886,6 +891,7 @@ mwifiex_cfg80211_assoc(struct mwifiex_private *priv, size_t ssid_len, u8 *ssid,
                         dev_dbg(priv->adapter->dev,
                                 "info: setting wep encryption"
                                 " with key len %d\n", sme->key_len);
+                        priv->wep_key_curr_index = sme->key_idx;
                         ret = mwifiex_set_encode(priv, sme->key, sme->key_len,
                                                         sme->key_idx, 0);
                 }
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index 20fbebd49db3..343ad29e211c 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -253,7 +253,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
         if (!of_device_is_available(node))
                 return NULL;
 
-        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        dev = amba_device_alloc(NULL, 0, 0);
         if (!dev)
                 return NULL;
 
@@ -283,14 +283,14 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
         if (ret)
                 goto err_free;
 
-        ret = amba_device_register(dev, &iomem_resource);
+        ret = amba_device_add(dev, &iomem_resource);
         if (ret)
                 goto err_free;
 
         return dev;
 
 err_free:
-        kfree(dev);
+        amba_device_put(dev);
         return NULL;
 }
 #else /* CONFIG_ARM_AMBA */
diff --git a/drivers/parisc/iommu-helpers.h b/drivers/parisc/iommu-helpers.h
index a9c46cc2db37..8c33491b21fe 100644
--- a/drivers/parisc/iommu-helpers.h
+++ b/drivers/parisc/iommu-helpers.h
@@ -1,3 +1,5 @@
+#include <linux/prefetch.h>
+
 /**
  * iommu_fill_pdir - Insert coalesced scatter/gather chunks into the I/O Pdir.
  * @ioc: The I/O Controller.
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index 4902206f53d9..1dd68f502634 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -26,6 +26,7 @@
 
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
 
 
 /*
@@ -156,7 +157,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
         /*
          * Use 16 bit accesses unless/until we need 8-bit i/o space.
          */
-        csr = at91_sys_read(AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
+        csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
 
         /*
          * NOTE: this CF controller ignores IOIS16, so we can't really do
@@ -175,7 +176,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
                 csr |= AT91_SMC_DBW_16;
                 pr_debug("%s: 16bit i/o bus\n", driver_name);
         }
-        at91_sys_write(AT91_SMC_CSR(cf->board->chipselect), csr);
+        at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
 
         io->start = cf->socket.io_offset;
         io->stop = io->start + SZ_2K - 1;
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index a87e2728b2c3..64d433ec4fc6 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -328,21 +328,15 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
                         goto err1;
         }
 
-        if (ret) {
-                while (--i >= 0)
-                        soc_pcmcia_remove_one(&sinfo->skt[i]);
-                kfree(sinfo);
-                clk_put(clk);
-        } else {
-                pxa2xx_configure_sockets(&dev->dev);
-                dev_set_drvdata(&dev->dev, sinfo);
-        }
+        pxa2xx_configure_sockets(&dev->dev);
+        dev_set_drvdata(&dev->dev, sinfo);
 
         return 0;
 
 err1:
         while (--i >= 0)
                 soc_pcmcia_remove_one(&sinfo->skt[i]);
+        clk_put(clk);
         kfree(sinfo);
 err0:
         return ret;
diff --git a/drivers/platform/x86/ibm_rtl.c b/drivers/platform/x86/ibm_rtl.c
index 42a7d603c870..7481146a5b47 100644
--- a/drivers/platform/x86/ibm_rtl.c
+++ b/drivers/platform/x86/ibm_rtl.c
@@ -33,6 +33,8 @@
 #include <linux/mutex.h>
 #include <asm/bios_ebda.h>
 
+#include <asm-generic/io-64-nonatomic-lo-hi.h>
+
 static bool force;
 module_param(force, bool, 0);
 MODULE_PARM_DESC(force, "Force driver load, ignore DMI data");
@@ -83,19 +85,6 @@ static void __iomem *rtl_cmd_addr;
 static u8 rtl_cmd_type;
 static u8 rtl_cmd_width;
 
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
-{
-        const volatile u32 __iomem *p = addr;
-        u32 low, high;
-
-        low = readl(p);
-        high = readl(p + 1);
-
-        return low + ((u64)high << 32);
-}
-#endif
-
 static void __iomem *rtl_port_map(phys_addr_t addr, unsigned long len)
 {
         if (rtl_cmd_type == RTL_ADDR_TYPE_MMIO)
diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c
index 809a3ae943c6..88a98cff5a44 100644
--- a/drivers/platform/x86/intel_ips.c
+++ b/drivers/platform/x86/intel_ips.c
@@ -77,6 +77,8 @@
 #include <asm/processor.h>
 #include "intel_ips.h"
 
+#include <asm-generic/io-64-nonatomic-lo-hi.h>
+
 #define PCI_DEVICE_ID_INTEL_THERMAL_SENSOR 0x3b32
 
 /*
@@ -344,19 +346,6 @@ struct ips_driver {
 static bool
 ips_gpu_turbo_enabled(struct ips_driver *ips);
 
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
-{
-        const volatile u32 __iomem *p = addr;
-        u32 low, high;
-
-        low = readl(p);
-        high = readl(p + 1);
-
-        return low + ((u64)high << 32);
-}
-#endif
-
 /**
  * ips_cpu_busy - is CPU busy?
  * @ips: IPS driver struct
diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c
index df33530cec4a..28b81ae4cf7f 100644
--- a/drivers/regulator/88pm8607.c
+++ b/drivers/regulator/88pm8607.c
@@ -196,7 +196,7 @@ static const unsigned int LDO12_suspend_table[] = {
 };
 
 static const unsigned int LDO13_table[] = {
-        1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0, 0,
+        1200000, 1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0,
 };
 
 static const unsigned int LDO13_suspend_table[] = {
@@ -389,10 +389,10 @@ static struct pm8607_regulator_info pm8607_regulator_info[] = {
         PM8607_LDO( 7,         LDO7, 0, 3, SUPPLIES_EN12, 1),
         PM8607_LDO( 8,         LDO8, 0, 3, SUPPLIES_EN12, 2),
         PM8607_LDO( 9,         LDO9, 0, 3, SUPPLIES_EN12, 3),
-        PM8607_LDO(10,        LDO10, 0, 3, SUPPLIES_EN12, 4),
+        PM8607_LDO(10,        LDO10, 0, 4, SUPPLIES_EN12, 4),
         PM8607_LDO(12,        LDO12, 0, 4, SUPPLIES_EN12, 5),
         PM8607_LDO(13, VIBRATOR_SET, 1, 3,  VIBRATOR_SET, 0),
-        PM8607_LDO(14,        LDO14, 0, 4, SUPPLIES_EN12, 6),
+        PM8607_LDO(14,        LDO14, 0, 3, SUPPLIES_EN12, 6),
 };
 
 static int __devinit pm8607_regulator_probe(struct platform_device *pdev)
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index ee3c122c0599..729fb843a2fc 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -57,6 +57,7 @@ struct sam9_rtc {
         void __iomem            *rtt;
         struct rtc_device       *rtcdev;
         u32                     imr;
+        void __iomem            *gpbr;
 };
 
 #define rtt_readl(rtc, field) \
@@ -65,9 +66,9 @@ struct sam9_rtc {
         __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
 
 #define gpbr_readl(rtc) \
-        at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR)
+        __raw_readl((rtc)->gpbr)
 #define gpbr_writel(rtc, val) \
-        at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val))
+        __raw_writel((val), (rtc)->gpbr)
 
 /*
  * Read current time and date in RTC
@@ -287,16 +288,19 @@ static const struct rtc_class_ops at91_rtc_ops = {
 /*
  * Initialize and install RTC driver
  */
-static int __init at91_rtc_probe(struct platform_device *pdev)
+static int __devinit at91_rtc_probe(struct platform_device *pdev)
 {
-        struct resource *r;
+        struct resource *r, *r_gpbr;
         struct sam9_rtc *rtc;
         int             ret;
         u32             mr;
 
         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!r)
+        r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (!r || !r_gpbr) {
+                dev_err(&pdev->dev, "need 2 ressources\n");
                 return -ENODEV;
+        }
 
         rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
         if (!rtc)
@@ -314,6 +318,13 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
                 goto fail;
         }
 
+        rtc->gpbr = ioremap(r_gpbr->start, resource_size(r_gpbr));
+        if (!rtc->gpbr) {
+                dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n");
+                ret = -ENOMEM;
+                goto fail_gpbr;
+        }
+
         mr = rtt_readl(rtc, MR);
 
         /* unless RTT is counting at 1 Hz, re-initialize it */
@@ -340,7 +351,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
         if (ret) {
                 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);
                 rtc_device_unregister(rtc->rtcdev);
-                goto fail;
+                goto fail_register;
         }
 
         /* NOTE:  sam9260 rev A silicon has a ROM bug which resets the
@@ -356,6 +367,8 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
         return 0;
 
 fail_register:
+        iounmap(rtc->gpbr);
+fail_gpbr:
         iounmap(rtc->rtt);
 fail:
         platform_set_drvdata(pdev, NULL);
@@ -366,7 +379,7 @@ fail:
 /*
  * Disable and remove the RTC driver
  */
-static int __exit at91_rtc_remove(struct platform_device *pdev)
+static int __devexit at91_rtc_remove(struct platform_device *pdev)
 {
         struct sam9_rtc *rtc = platform_get_drvdata(pdev);
         u32             mr = rtt_readl(rtc, MR);
@@ -377,6 +390,7 @@ static int __exit at91_rtc_remove(struct platform_device *pdev)
 
         rtc_device_unregister(rtc->rtcdev);
 
+        iounmap(rtc->gpbr);
         iounmap(rtc->rtt);
         platform_set_drvdata(pdev, NULL);
         kfree(rtc);
@@ -440,63 +454,20 @@ static int at91_rtc_resume(struct platform_device *pdev)
 #endif
 
 static struct platform_driver at91_rtc_driver = {
-        .driver.name    = "rtc-at91sam9",
-        .driver.owner   = THIS_MODULE,
-        .remove         = __exit_p(at91_rtc_remove),
+        .probe          = at91_rtc_probe,
+        .remove         = __devexit_p(at91_rtc_remove),
         .shutdown       = at91_rtc_shutdown,
         .suspend        = at91_rtc_suspend,
         .resume         = at91_rtc_resume,
+        .driver         = {
+                .name   = "rtc-at91sam9",
+                .owner  = THIS_MODULE,
+        },
 };
 
-/* Chips can have more than one RTT module, and they can be used for more
- * than just RTCs.  So we can't just register as "the" RTT driver.
- *
- * A normal approach in such cases is to create a library to allocate and
- * free the modules.  Here we just use bus_find_device() as like such a
- * library, binding directly ... no runtime "library" footprint is needed.
- */
-static int __init at91_rtc_match(struct device *dev, void *v)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        int ret;
-
-        /* continue searching if this isn't the RTT we need */
-        if (strcmp("at91_rtt", pdev->name) != 0
-                        || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT)
-                goto fail;
-
-        /* else we found it ... but fail unless we can bind to the RTC driver */
-        if (dev->driver) {
-                dev_dbg(dev, "busy, can't use as RTC!\n");
-                goto fail;
-        }
-        dev->driver = &at91_rtc_driver.driver;
-        if (device_attach(dev) == 0) {
-                dev_dbg(dev, "can't attach RTC!\n");
-                goto fail;
-        }
-        ret = at91_rtc_probe(pdev);
-        if (ret == 0)
-                return true;
-
-        dev_dbg(dev, "RTC probe err %d!\n", ret);
-fail:
-        return false;
-}
-
 static int __init at91_rtc_init(void)
 {
-        int status;
-        struct device *rtc;
-
-        status = platform_driver_register(&at91_rtc_driver);
-        if (status)
-                return status;
-        rtc = bus_find_device(&platform_bus_type, NULL,
-                        NULL, at91_rtc_match);
-        if (!rtc)
-                platform_driver_unregister(&at91_rtc_driver);
-        return rtc ? 0 : -ENODEV;
+        return platform_driver_register(&at91_rtc_driver);
 }
 module_init(at91_rtc_init);
 
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 70880be26015..2617b1ed4709 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -18,12 +18,12 @@
 #include <linux/hdreg.h>        /* HDIO_GETGEO                      */
 #include <linux/bio.h>
 #include <linux/module.h>
+#include <linux/compat.h>
 #include <linux/init.h>
 
 #include <asm/debug.h>
 #include <asm/idals.h>
 #include <asm/ebcdic.h>
-#include <asm/compat.h>
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/cio.h>
diff --git a/drivers/s390/block/dasd_ioctl.c b/drivers/s390/block/dasd_ioctl.c
index f1a2016829fc..792c69e78fe2 100644
--- a/drivers/s390/block/dasd_ioctl.c
+++ b/drivers/s390/block/dasd_ioctl.c
@@ -13,6 +13,7 @@
 #define KMSG_COMPONENT "dasd"
 
 #include <linux/interrupt.h>
+#include <linux/compat.h>
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/blkpg.h>
diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c
index 934458ad55e5..e71a50d4b221 100644
--- a/drivers/s390/char/con3215.c
+++ b/drivers/s390/char/con3215.c
@@ -87,6 +87,7 @@ struct raw3215_info {
         struct tty_struct *tty;       /* pointer to tty structure if present */
         struct raw3215_req *queued_read; /* pointer to queued read requests */
         struct raw3215_req *queued_write;/* pointer to queued write requests */
+        struct tasklet_struct tlet;   /* tasklet to invoke tty_wakeup */
         wait_queue_head_t empty_wait; /* wait queue for flushing */
         struct timer_list timer;      /* timer for delayed output */
         int line_pos;                 /* position on the line (for tabs) */
@@ -334,19 +335,23 @@ static inline void raw3215_try_io(struct raw3215_info *raw)
 }
 
 /*
+ * Call tty_wakeup from tasklet context
+ */
+static void raw3215_wakeup(unsigned long data)
+{
+        struct raw3215_info *raw = (struct raw3215_info *) data;
+        tty_wakeup(raw->tty);
+}
+
+/*
  * Try to start the next IO and wake up processes waiting on the tty.
  */
 static void raw3215_next_io(struct raw3215_info *raw)
 {
-        struct tty_struct *tty;
-
         raw3215_mk_write_req(raw);
         raw3215_try_io(raw);
-        tty = raw->tty;
-        if (tty != NULL &&
-            RAW3215_BUFFER_SIZE - raw->count >= RAW3215_MIN_SPACE) {
-                tty_wakeup(tty);
-        }
+        if (raw->tty && RAW3215_BUFFER_SIZE - raw->count >= RAW3215_MIN_SPACE)
+                tasklet_schedule(&raw->tlet);
 }
 
 /*
@@ -682,6 +687,7 @@ static int raw3215_probe (struct ccw_device *cdev)
                 return -ENOMEM;
         }
         init_waitqueue_head(&raw->empty_wait);
+        tasklet_init(&raw->tlet, raw3215_wakeup, (unsigned long) raw);
 
         dev_set_drvdata(&cdev->dev, raw);
         cdev->handler = raw3215_irq;
@@ -901,6 +907,7 @@ static int __init con3215_init(void)
 
         raw->flags |= RAW3215_FIXED;
         init_waitqueue_head(&raw->empty_wait);
+        tasklet_init(&raw->tlet, raw3215_wakeup, (unsigned long) raw);
 
         /* Request the console irq */
         if (raw3215_startup(raw) != 0) {
@@ -966,6 +973,7 @@ static void tty3215_close(struct tty_struct *tty, struct file * filp)
         tty->closing = 1;
         /* Shutdown the terminal */
         raw3215_shutdown(raw);
+        tasklet_kill(&raw->tlet);
         tty->closing = 0;
         raw->tty = NULL;
 }
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c
index e71298158f9e..911704571b9c 100644
--- a/drivers/s390/char/fs3270.c
+++ b/drivers/s390/char/fs3270.c
@@ -11,6 +11,7 @@
 #include <linux/console.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/compat.h>
 #include <linux/module.h>
 #include <linux/list.h>
 #include <linux/slab.h>
diff --git a/drivers/s390/char/vmcp.c b/drivers/s390/char/vmcp.c
index 75bde6a8b7dc..89c03e6b1c0c 100644
--- a/drivers/s390/char/vmcp.c
+++ b/drivers/s390/char/vmcp.c
@@ -13,6 +13,7 @@
 
 #include <linux/fs.h>
 #include <linux/init.h>
+#include <linux/compat.h>
 #include <linux/kernel.h>
 #include <linux/miscdevice.h>
 #include <linux/slab.h>
diff --git a/drivers/s390/cio/chsc_sch.c b/drivers/s390/cio/chsc_sch.c
index 0c87b0fc7714..8f9a1a384496 100644
--- a/drivers/s390/cio/chsc_sch.c
+++ b/drivers/s390/cio/chsc_sch.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/slab.h>
+#include <linux/compat.h>
 #include <linux/device.h>
 #include <linux/module.h>
 #include <linux/uaccess.h>
diff --git a/drivers/s390/scsi/zfcp_cfdc.c b/drivers/s390/scsi/zfcp_cfdc.c
index 303dde09d294..fab2c2592a97 100644
--- a/drivers/s390/scsi/zfcp_cfdc.c
+++ b/drivers/s390/scsi/zfcp_cfdc.c
@@ -11,6 +11,7 @@
 #define KMSG_COMPONENT "zfcp"
 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
 
+#include <linux/compat.h>
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/miscdevice.h>
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
index 53a31c753cb1..20c4557f5abd 100644
--- a/drivers/scsi/device_handler/scsi_dh_rdac.c
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -364,10 +364,7 @@ static void release_controller(struct kref *kref)
         struct rdac_controller *ctlr;
         ctlr = container_of(kref, struct rdac_controller, kref);
 
-        flush_workqueue(kmpath_rdacd);
-        spin_lock(&list_lock);
         list_del(&ctlr->node);
-        spin_unlock(&list_lock);
         kfree(ctlr);
 }
 
@@ -376,20 +373,17 @@ static struct rdac_controller *get_controller(int index, char *array_name,
 {
         struct rdac_controller *ctlr, *tmp;
 
-        spin_lock(&list_lock);
-
         list_for_each_entry(tmp, &ctlr_list, node) {
                 if ((memcmp(tmp->array_id, array_id, UNIQUE_ID_LEN) == 0) &&
                           (tmp->index == index) &&
                           (tmp->host == sdev->host)) {
                         kref_get(&tmp->kref);
-                        spin_unlock(&list_lock);
                         return tmp;
                 }
         }
         ctlr = kmalloc(sizeof(*ctlr), GFP_ATOMIC);
         if (!ctlr)
-                goto done;
+                return NULL;
 
         /* initialize fields of controller */
         memcpy(ctlr->array_id, array_id, UNIQUE_ID_LEN);
@@ -405,8 +399,7 @@ static struct rdac_controller *get_controller(int index, char *array_name,
         INIT_WORK(&ctlr->ms_work, send_mode_select);
         INIT_LIST_HEAD(&ctlr->ms_head);
         list_add(&ctlr->node, &ctlr_list);
-done:
-        spin_unlock(&list_lock);
+
         return ctlr;
 }
 
@@ -517,9 +510,12 @@ static int initialize_controller(struct scsi_device *sdev,
                         index = 0;
                 else
                         index = 1;
+
+                spin_lock(&list_lock);
                 h->ctlr = get_controller(index, array_name, array_id, sdev);
                 if (!h->ctlr)
                         err = SCSI_DH_RES_TEMP_UNAVAIL;
+                spin_unlock(&list_lock);
         }
         return err;
 }
@@ -906,7 +902,9 @@ static int rdac_bus_attach(struct scsi_device *sdev)
         return 0;
 
 clean_ctlr:
+        spin_lock(&list_lock);
         kref_put(&h->ctlr->kref, release_controller);
+        spin_unlock(&list_lock);
 
 failed:
         kfree(scsi_dh_data);
@@ -921,14 +919,19 @@ static void rdac_bus_detach( struct scsi_device *sdev )
         struct rdac_dh_data *h;
         unsigned long flags;
 
-        spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
         scsi_dh_data = sdev->scsi_dh_data;
+        h = (struct rdac_dh_data *) scsi_dh_data->buf;
+        if (h->ctlr && h->ctlr->ms_queued)
+                flush_workqueue(kmpath_rdacd);
+
+        spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
         sdev->scsi_dh_data = NULL;
         spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
 
-        h = (struct rdac_dh_data *) scsi_dh_data->buf;
+        spin_lock(&list_lock);
         if (h->ctlr)
                 kref_put(&h->ctlr->kref, release_controller);
+        spin_unlock(&list_lock);
         kfree(scsi_dh_data);
         module_put(THIS_MODULE);
         sdev_printk(KERN_NOTICE, sdev, "%s: Detached\n", RDAC_NAME);
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 67b169b7a5be..b538f0883fd2 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -4613,11 +4613,13 @@ static int __ipr_eh_host_reset(struct scsi_cmnd * scsi_cmd)
         ENTER;
         ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
 
-        dev_err(&ioa_cfg->pdev->dev,
-                "Adapter being reset as a result of error recovery.\n");
+        if (!ioa_cfg->in_reset_reload) {
+                dev_err(&ioa_cfg->pdev->dev,
+                        "Adapter being reset as a result of error recovery.\n");
 
-        if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
-                ioa_cfg->sdt_state = GET_DUMP;
+                if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
+                        ioa_cfg->sdt_state = GET_DUMP;
+        }
 
         rc = ipr_reset_reload(ioa_cfg, IPR_SHUTDOWN_ABBREV);
 
@@ -4907,7 +4909,7 @@ static int ipr_cancel_op(struct scsi_cmnd * scsi_cmd)
         struct ipr_ioa_cfg *ioa_cfg;
         struct ipr_resource_entry *res;
         struct ipr_cmd_pkt *cmd_pkt;
-        u32 ioasc;
+        u32 ioasc, int_reg;
         int op_found = 0;
 
         ENTER;
@@ -4920,7 +4922,17 @@ static int ipr_cancel_op(struct scsi_cmnd * scsi_cmd)
          */
         if (ioa_cfg->in_reset_reload || ioa_cfg->ioa_is_dead)
                 return FAILED;
-        if (!res || !ipr_is_gscsi(res))
+        if (!res)
+                return FAILED;
+
+        /*
+         * If we are aborting a timed out op, chances are that the timeout was caused
+         * by a still not detected EEH error. In such cases, reading a register will
+         * trigger the EEH recovery infrastructure.
+         */
+        int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
+
+        if (!ipr_is_gscsi(res))
                 return FAILED;
 
         list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) {
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c
index 1a65d6514237..418391b1c361 100644
--- a/drivers/scsi/isci/host.c
+++ b/drivers/scsi/isci/host.c
@@ -1848,9 +1848,11 @@ static enum sci_status sci_oem_parameters_set(struct isci_host *ihost)
         if (state == SCIC_RESET ||
             state == SCIC_INITIALIZING ||
             state == SCIC_INITIALIZED) {
+                u8 oem_version = pci_info->orom ? pci_info->orom->hdr.version :
+                        ISCI_ROM_VER_1_0;
 
                 if (sci_oem_parameters_validate(&ihost->oem_parameters,
-                                                pci_info->orom->hdr.version))
+                                                oem_version))
                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
 
                 return SCI_SUCCESS;
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
index 0b2c95583660..a78036f5e1a6 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -4548,7 +4548,7 @@ mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
                 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
                     ioc->name, __func__);
                 r = 0;
-                goto out;
+                goto out_unlocked;
         }
 
         if (mpt2sas_fwfault_debug)
@@ -4604,6 +4604,7 @@ mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
         mutex_unlock(&ioc->reset_in_progress_mutex);
 
+ out_unlocked:
         dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
             __func__));
         return r;
diff --git a/drivers/scsi/osd/osd_uld.c b/drivers/scsi/osd/osd_uld.c
index b31a8e3841d7..d4ed9eb52657 100644
--- a/drivers/scsi/osd/osd_uld.c
+++ b/drivers/scsi/osd/osd_uld.c
@@ -69,10 +69,10 @@
 #ifndef SCSI_OSD_MAJOR
 #  define SCSI_OSD_MAJOR 260
 #endif
-#define SCSI_OSD_MAX_MINOR 64
+#define SCSI_OSD_MAX_MINOR MINORMASK
 
 static const char osd_name[] = "osd";
-static const char *osd_version_string = "open-osd 0.2.0";
+static const char *osd_version_string = "open-osd 0.2.1";
 
 MODULE_AUTHOR("Boaz Harrosh <bharrosh@panasas.com>");
 MODULE_DESCRIPTION("open-osd Upper-Layer-Driver osd.ko");
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index a2f1b3043dfb..9f41b3b4358f 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -1036,8 +1036,7 @@ qla2x00_link_state_show(struct device *dev, struct device_attribute *attr,
             vha->device_flags & DFLG_NO_CABLE)
                 len = snprintf(buf, PAGE_SIZE, "Link Down\n");
         else if (atomic_read(&vha->loop_state) != LOOP_READY ||
-            test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-            test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
+            qla2x00_reset_active(vha))
                 len = snprintf(buf, PAGE_SIZE, "Unknown Link State\n");
         else {
                 len = snprintf(buf, PAGE_SIZE, "Link Up - ");
@@ -1359,8 +1358,7 @@ qla2x00_thermal_temp_show(struct device *dev,
                 return snprintf(buf, PAGE_SIZE, "\n");
 
         temp = frac = 0;
-        if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-            test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
+        if (qla2x00_reset_active(vha))
                 ql_log(ql_log_warn, vha, 0x707b,
                     "ISP reset active.\n");
         else if (!vha->hw->flags.eeh_busy)
@@ -1379,8 +1377,7 @@ qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr,
         int rval = QLA_FUNCTION_FAILED;
         uint16_t state[5];
 
-        if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
+        if (qla2x00_reset_active(vha))
                 ql_log(ql_log_warn, vha, 0x707c,
                     "ISP reset active.\n");
         else if (!vha->hw->flags.eeh_busy)
@@ -1693,9 +1690,7 @@ qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
         if (IS_FWI2_CAPABLE(ha)) {
                 rval = qla24xx_get_isp_stats(base_vha, stats, stats_dma);
         } else if (atomic_read(&base_vha->loop_state) == LOOP_READY &&
-                    !test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) &&
-                    !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
-                    !ha->dpc_active) {
+            !qla2x00_reset_active(vha) && !ha->dpc_active) {
                 /* Must be in a 'READY' state for statistics retrieval. */
                 rval = qla2x00_get_link_status(base_vha, base_vha->loop_id,
                                                 stats, stats_dma);
diff --git a/drivers/scsi/qla2xxx/qla_bsg.c b/drivers/scsi/qla2xxx/qla_bsg.c
index b1d0f936bf2d..1682e2e4201d 100644
--- a/drivers/scsi/qla2xxx/qla_bsg.c
+++ b/drivers/scsi/qla2xxx/qla_bsg.c
@@ -108,13 +108,6 @@ qla24xx_proc_fcp_prio_cfg_cmd(struct fc_bsg_job *bsg_job)
                 goto exit_fcp_prio_cfg;
         }
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-                test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
-                ret = -EBUSY;
-                goto exit_fcp_prio_cfg;
-        }
-
         /* Get the sub command */
         oper = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
 
@@ -646,13 +639,6 @@ qla2x00_process_loopback(struct fc_bsg_job *bsg_job)
         dma_addr_t rsp_data_dma;
         uint32_t rsp_data_len;
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-                test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
-                ql_log(ql_log_warn, vha, 0x7018, "Abort active or needed.\n");
-                return -EBUSY;
-        }
-
         if (!vha->flags.online) {
                 ql_log(ql_log_warn, vha, 0x7019, "Host is not online.\n");
                 return -EIO;
@@ -874,13 +860,6 @@ qla84xx_reset(struct fc_bsg_job *bsg_job)
         int rval = 0;
         uint32_t flag;
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-            test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-            test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
-                ql_log(ql_log_warn, vha, 0x702e, "Abort active or needed.\n");
-                return -EBUSY;
-        }
-
         if (!IS_QLA84XX(ha)) {
                 ql_dbg(ql_dbg_user, vha, 0x702f, "Not 84xx, exiting.\n");
                 return -EINVAL;
@@ -922,11 +901,6 @@ qla84xx_updatefw(struct fc_bsg_job *bsg_job)
         uint32_t flag;
         uint32_t fw_ver;
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-                test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_RETRY, &vha->dpc_flags))
-                return -EBUSY;
-
         if (!IS_QLA84XX(ha)) {
                 ql_dbg(ql_dbg_user, vha, 0x7032,
                     "Not 84xx, exiting.\n");
@@ -1036,14 +1010,6 @@ qla84xx_mgmt_cmd(struct fc_bsg_job *bsg_job)
         uint32_t data_len = 0;
         uint32_t dma_direction = DMA_NONE;
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-                test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
-                ql_log(ql_log_warn, vha, 0x7039,
-                    "Abort active or needed.\n");
-                return -EBUSY;
-        }
-
         if (!IS_QLA84XX(ha)) {
                 ql_log(ql_log_warn, vha, 0x703a,
                     "Not 84xx, exiting.\n");
@@ -1246,13 +1212,6 @@ qla24xx_iidma(struct fc_bsg_job *bsg_job)
 
         bsg_job->reply->reply_payload_rcv_len = 0;
 
-        if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
-                test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
-                test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
-                ql_log(ql_log_warn, vha, 0x7045, "abort active or needed.\n");
-                return -EBUSY;
-        }
-
         if (!IS_IIDMA_CAPABLE(vha->hw)) {
                 ql_log(ql_log_info, vha, 0x7046, "iiDMA not supported.\n");
                 return -EINVAL;
@@ -1668,6 +1627,15 @@ qla24xx_bsg_request(struct fc_bsg_job *bsg_job)
                 vha = shost_priv(host);
         }
 
+        if (qla2x00_reset_active(vha)) {
+                ql_dbg(ql_dbg_user, vha, 0x709f,
+                    "BSG: ISP abort active/needed -- cmd=%d.\n",
+                    bsg_job->request->msgcode);
+                bsg_job->reply->result = (DID_ERROR << 16);
+                bsg_job->job_done(bsg_job);
+                return -EBUSY;
+        }
+
         ql_dbg(ql_dbg_user, vha, 0x7000,
             "Entered %s msgcode=0x%x.\n", __func__, bsg_job->request->msgcode);
 
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index 7c54624b5b13..45cbf0ba624d 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -19,7 +19,8 @@
  * | DPC Thread                   |       0x401c       |                |
  * | Async Events                 |       0x5057       | 0x5052         |
  * | Timer Routines               |       0x6011       | 0x600e,0x600f  |
- * | User Space Interactions      |       0x709e       |                |
+ * | User Space Interactions      |       0x709e       | 0x7018,0x702e  |
+ * |                              |                    | 0x7039,0x7045  |
  * | Task Management              |       0x803c       | 0x8025-0x8026  |
  * |                              |                    | 0x800b,0x8039  |
  * | AER/EEH                      |       0x900f       |                |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index a6a4eebce4a8..af1003f9de1e 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -44,6 +44,7 @@
  * ISP2100 HBAs.
  */
 #define MAILBOX_REGISTER_COUNT_2100     8
+#define MAILBOX_REGISTER_COUNT_2200     24
 #define MAILBOX_REGISTER_COUNT          32
 
 #define QLA2200A_RISC_ROM_VER   4
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
index 9902834e0b74..7cc4f36cd539 100644
--- a/drivers/scsi/qla2xxx/qla_inline.h
+++ b/drivers/scsi/qla2xxx/qla_inline.h
@@ -131,3 +131,16 @@ qla2x00_hba_err_chk_enabled(srb_t *sp)
         }
         return 0;
 }
+
+static inline int
+qla2x00_reset_active(scsi_qla_host_t *vha)
+{
+        scsi_qla_host_t *base_vha = pci_get_drvdata(vha->hw->pdev);
+
+        /* Test appropriate base-vha and vha flags. */
+        return test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) ||
+            test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
+            test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
+            test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
+            test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
+}
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index e804585cc59c..349843ea32f6 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -2090,7 +2090,6 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha,
                         break;
                 case CT_IOCB_TYPE:
                         qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
-                        clear_bit(MBX_INTERRUPT, &vha->hw->mbx_cmd_flags);
                         break;
                 case ELS_IOCB_TYPE:
                         qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 34344d3f8658..08f1d01bdc1c 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -342,6 +342,8 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
 
                                 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
                                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
+                                /* Allow next mbx cmd to come in. */
+                                complete(&ha->mbx_cmd_comp);
                                 if (ha->isp_ops->abort_isp(vha)) {
                                         /* Failed. retry later. */
                                         set_bit(ISP_ABORT_NEEDED,
@@ -350,6 +352,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
                                 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
                                 ql_dbg(ql_dbg_mbx, base_vha, 0x101f,
                                     "Finished abort_isp.\n");
+                                goto mbx_done;
                         }
                 }
         }
@@ -358,6 +361,7 @@ premature_exit:
         /* Allow next mbx cmd to come in. */
         complete(&ha->mbx_cmd_comp);
 
+mbx_done:
         if (rval) {
                 ql_dbg(ql_dbg_mbx, base_vha, 0x1020,
                     "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, cmd=%x ****.\n",
@@ -2581,7 +2585,8 @@ qla2x00_stop_firmware(scsi_qla_host_t *vha)
         ql_dbg(ql_dbg_mbx, vha, 0x10a1, "Entered %s.\n", __func__);
 
         mcp->mb[0] = MBC_STOP_FIRMWARE;
-        mcp->out_mb = MBX_0;
+        mcp->mb[1] = 0;
+        mcp->out_mb = MBX_1|MBX_0;
         mcp->in_mb = MBX_0;
         mcp->tov = 5;
         mcp->flags = 0;
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c
index 1cd46cd7ff90..270ba3130fde 100644
--- a/drivers/scsi/qla2xxx/qla_nx.c
+++ b/drivers/scsi/qla2xxx/qla_nx.c
@@ -1165,19 +1165,6 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)
                 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff);
         else
                 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff);
-
-        /* reset ms */
-        val = qla82xx_rd_32(ha, QLA82XX_CRB_QDR_NET + 0xe4);
-        val |= (1 << 1);
-        qla82xx_wr_32(ha, QLA82XX_CRB_QDR_NET + 0xe4, val);
-        msleep(20);
-
-        /* unreset ms */
-        val = qla82xx_rd_32(ha, QLA82XX_CRB_QDR_NET + 0xe4);
-        val &= ~(1 << 1);
-        qla82xx_wr_32(ha, QLA82XX_CRB_QDR_NET + 0xe4, val);
-        msleep(20);
-
         qla82xx_rom_unlock(ha);
 
         /* Read the signature value from the flash.
@@ -3392,7 +3379,7 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)
                                             QLA82XX_CRB_PEG_NET_3 + 0x3c),
                                     qla82xx_rd_32(ha,
                                             QLA82XX_CRB_PEG_NET_4 + 0x3c));
-                                if (LSW(MSB(halt_status)) == 0x67)
+                                if (((halt_status & 0x1fffff00) >> 8) == 0x67)
                                         ql_log(ql_log_warn, vha, 0xb052,
                                             "Firmware aborted with "
                                             "error code 0x00006700. Device is "
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 4ed1e4a96b95..036030c95339 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -625,6 +625,12 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
                         cmd->result = DID_NO_CONNECT << 16;
                         goto qc24_fail_command;
         }
+
+        if (!fcport) {
+                cmd->result = DID_NO_CONNECT << 16;
+                goto qc24_fail_command;
+        }
+
         if (atomic_read(&fcport->state) != FCS_ONLINE) {
                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
@@ -877,6 +883,7 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 
         spin_unlock_irqrestore(&ha->hardware_lock, flags);
         if (ha->isp_ops->abort_command(sp)) {
+                ret = FAILED;
                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
                     "Abort command mbx failed cmd=%p.\n", cmd);
         } else {
@@ -1124,7 +1131,6 @@ static int
 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
 {
         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
-        fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
         struct qla_hw_data *ha = vha->hw;
         int ret = FAILED;
         unsigned int id, lun;
@@ -1133,15 +1139,6 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
         id = cmd->device->id;
         lun = cmd->device->lun;
 
-        if (!fcport) {
-                return ret;
-        }
-
-        ret = fc_block_scsi_eh(cmd);
-        if (ret != 0)
-                return ret;
-        ret = FAILED;
-
         ql_log(ql_log_info, vha, 0x8018,
             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
 
@@ -2047,7 +2044,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
                 ha->nvram_data_off = ~0;
                 ha->isp_ops = &qla2100_isp_ops;
         } else if (IS_QLA2200(ha)) {
-                ha->mbx_count = MAILBOX_REGISTER_COUNT;
+                ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
                 req_length = REQUEST_ENTRY_CNT_2200;
                 rsp_length = RESPONSE_ENTRY_CNT_2100;
                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index 23f33a6d52d7..29d780c38040 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
 /*
  * Driver version
  */
-#define QLA2XXX_VERSION      "8.03.07.12-k"
+#define QLA2XXX_VERSION      "8.03.07.13-k"
 
 #define QLA_DRIVER_MAJOR_VER    8
 #define QLA_DRIVER_MINOR_VER    3
diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c
index 78f1111158d7..65253dfbe962 100644
--- a/drivers/scsi/qla4xxx/ql4_nx.c
+++ b/drivers/scsi/qla4xxx/ql4_nx.c
@@ -10,6 +10,8 @@
 #include "ql4_def.h"
 #include "ql4_glbl.h"
 
+#include <asm-generic/io-64-nonatomic-lo-hi.h>
+
 #define MASK(n)         DMA_BIT_MASK(n)
 #define MN_WIN(addr)    (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
 #define OCM_WIN(addr)   (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
@@ -655,27 +657,6 @@ static int qla4_8xxx_pci_is_same_window(struct scsi_qla_host *ha,
         return 0;
 }
 
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
-{
-        const volatile u32 __iomem *p = addr;
-        u32 low, high;
-
-        low = readl(p);
-        high = readl(p + 1);
-
-        return low + ((u64)high << 32);
-}
-#endif
-
-#ifndef writeq
-static inline void writeq(__u64 val, volatile void __iomem *addr)
-{
-        writel(val, addr);
-        writel(val >> 32, addr+4);
-}
-#endif
-
 static int qla4_8xxx_pci_mem_read_direct(struct scsi_qla_host *ha,
                 u64 off, void *data, int size)
 {
diff --git a/drivers/scsi/scsi_pm.c b/drivers/scsi/scsi_pm.c
index bf8bf79e6a1f..c4670642d023 100644
--- a/drivers/scsi/scsi_pm.c
+++ b/drivers/scsi/scsi_pm.c
@@ -7,6 +7,7 @@
 
 #include <linux/pm_runtime.h>
 #include <linux/export.h>
+#include <linux/async.h>
 
 #include <scsi/scsi.h>
 #include <scsi/scsi_device.h>
@@ -92,6 +93,19 @@ static int scsi_bus_resume_common(struct device *dev)
         return err;
 }
 
+static int scsi_bus_prepare(struct device *dev)
+{
+        if (scsi_is_sdev_device(dev)) {
+                /* sd probing uses async_schedule.  Wait until it finishes. */
+                async_synchronize_full();
+
+        } else if (scsi_is_host_device(dev)) {
+                /* Wait until async scanning is finished */
+                scsi_complete_async_scans();
+        }
+        return 0;
+}
+
 static int scsi_bus_suspend(struct device *dev)
 {
         return scsi_bus_suspend_common(dev, PMSG_SUSPEND);
@@ -110,6 +124,7 @@ static int scsi_bus_poweroff(struct device *dev)
 #else /* CONFIG_PM_SLEEP */
 
 #define scsi_bus_resume_common          NULL
+#define scsi_bus_prepare                NULL
 #define scsi_bus_suspend                NULL
 #define scsi_bus_freeze                 NULL
 #define scsi_bus_poweroff               NULL
@@ -218,6 +233,7 @@ void scsi_autopm_put_host(struct Scsi_Host *shost)
 #endif /* CONFIG_PM_RUNTIME */
 
 const struct dev_pm_ops scsi_bus_pm_ops = {
+        .prepare =              scsi_bus_prepare,
         .suspend =              scsi_bus_suspend,
         .resume =               scsi_bus_resume_common,
         .freeze =               scsi_bus_freeze,
diff --git a/drivers/scsi/scsi_priv.h b/drivers/scsi/scsi_priv.h
index 68eadd1c67fd..be4fa6d179b1 100644
--- a/drivers/scsi/scsi_priv.h
+++ b/drivers/scsi/scsi_priv.h
@@ -109,6 +109,7 @@ extern void scsi_exit_procfs(void);
 #endif /* CONFIG_PROC_FS */
 
 /* scsi_scan.c */
+extern int scsi_complete_async_scans(void);
 extern int scsi_scan_host_selected(struct Scsi_Host *, unsigned int,
                                    unsigned int, unsigned int, int);
 extern void scsi_forget_host(struct Scsi_Host *);
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 89da43f73c00..29c4c0480976 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -1815,6 +1815,7 @@ static void scsi_finish_async_scan(struct async_scan_data *data)
         }
         spin_unlock(&async_scan_lock);
 
+        scsi_autopm_put_host(shost);
         scsi_host_put(shost);
         kfree(data);
 }
@@ -1841,7 +1842,6 @@ static int do_scan_async(void *_data)
 
         do_scsi_scan_host(shost);
         scsi_finish_async_scan(data);
-        scsi_autopm_put_host(shost);
         return 0;
 }
 
@@ -1869,7 +1869,7 @@ void scsi_scan_host(struct Scsi_Host *shost)
         p = kthread_run(do_scan_async, data, "scsi_scan_%d", shost->host_no);
         if (IS_ERR(p))
                 do_scan_async(data);
-        /* scsi_autopm_put_host(shost) is called in do_scan_async() */
+        /* scsi_autopm_put_host(shost) is called in scsi_finish_async_scan() */
 }
 EXPORT_SYMBOL(scsi_scan_host);
 
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 45fee368b092..92d314a73f69 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -190,7 +190,7 @@ static int __init sh_clk_init_parent(struct clk *clk)
                 return -EINVAL;
         }
 
-        clk->parent = clk->parent_table[val];
+        clk_reparent(clk, clk->parent_table[val]);
         if (!clk->parent) {
                 pr_err("sh_clk_init_parent: unable to set parent");
                 return -EINVAL;
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 10605ecc99ab..f9a6be7a9bed 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1526,6 +1526,8 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
         atmel_pops.set_wake     = fns->set_wake;
 }
 
+struct platform_device *atmel_default_console_device;   /* the serial console device */
+
 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
 static void atmel_console_putchar(struct uart_port *port, int ch)
 {
diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
index 5c8e3bba6c84..cdf4b2bfad80 100644
--- a/drivers/tty/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
@@ -36,6 +36,7 @@
 #include <linux/circ_buf.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
@@ -44,6 +45,8 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 
+#define PXA_NAME_LEN            8
+
 struct uart_pxa_port {
         struct uart_port        port;
         unsigned char           ier;
@@ -51,7 +54,7 @@ struct uart_pxa_port {
         unsigned char           mcr;
         unsigned int            lsr_break_flag;
         struct clk              *clk;
-        char                    *name;
+        char                    name[PXA_NAME_LEN];
 };
 
 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
@@ -781,6 +784,31 @@ static const struct dev_pm_ops serial_pxa_pm_ops = {
 };
 #endif
 
+static struct of_device_id serial_pxa_dt_ids[] = {
+        { .compatible = "mrvl,pxa-uart", },
+        { .compatible = "mrvl,mmp-uart", },
+        {}
+};
+MODULE_DEVICE_TABLE(of, serial_pxa_dt_ids);
+
+static int serial_pxa_probe_dt(struct platform_device *pdev,
+                               struct uart_pxa_port *sport)
+{
+        struct device_node *np = pdev->dev.of_node;
+        int ret;
+
+        if (!np)
+                return 1;
+
+        ret = of_alias_get_id(np, "serial");
+        if (ret < 0) {
+                dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
+                return ret;
+        }
+        sport->port.line = ret;
+        return 0;
+}
+
 static int serial_pxa_probe(struct platform_device *dev)
 {
         struct uart_pxa_port *sport;
@@ -808,20 +836,16 @@ static int serial_pxa_probe(struct platform_device *dev)
         sport->port.irq = irqres->start;
         sport->port.fifosize = 64;
         sport->port.ops = &serial_pxa_pops;
-        sport->port.line = dev->id;
         sport->port.dev = &dev->dev;
         sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
         sport->port.uartclk = clk_get_rate(sport->clk);
 
-        switch (dev->id) {
-        case 0: sport->name = "FFUART"; break;
-        case 1: sport->name = "BTUART"; break;
-        case 2: sport->name = "STUART"; break;
-        case 3: sport->name = "HWUART"; break;
-        default:
-                sport->name = "???";
-                break;
-        }
+        ret = serial_pxa_probe_dt(dev, sport);
+        if (ret > 0)
+                sport->port.line = dev->id;
+        else if (ret < 0)
+                goto err_clk;
+        snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
 
         sport->port.membase = ioremap(mmres->start, resource_size(mmres));
         if (!sport->port.membase) {
@@ -829,7 +853,7 @@ static int serial_pxa_probe(struct platform_device *dev)
                 goto err_clk;
         }
 
-        serial_pxa_ports[dev->id] = sport;
+        serial_pxa_ports[sport->port.line] = sport;
 
         uart_add_one_port(&serial_pxa_reg, &sport->port);
         platform_set_drvdata(dev, sport);
@@ -866,6 +890,7 @@ static struct platform_driver serial_pxa_driver = {
 #ifdef CONFIG_PM
                 .pm     = &serial_pxa_pm_ops,
 #endif
+                .of_match_table = serial_pxa_dt_ids,
         },
 };
 
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index d136b8f4c8a7..81e2c0d9c17d 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -187,7 +187,10 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
                 return -ENODEV;
         dev->current_state = PCI_D0;
 
-        if (!dev->irq) {
+        /* The xHCI driver supports MSI and MSI-X,
+         * so don't fail if the BIOS doesn't provide a legacy IRQ.
+         */
+        if (!dev->irq && (driver->flags & HCD_MASK) != HCD_USB3) {
                 dev_err(&dev->dev,
                         "Found HC with no IRQ.  Check BIOS/PCI %s setup!\n",
                         pci_name(dev));
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index eb19cba34ac9..e1282328fc27 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -2447,8 +2447,10 @@ int usb_add_hcd(struct usb_hcd *hcd,
                         && device_can_wakeup(&hcd->self.root_hub->dev))
                 dev_dbg(hcd->self.controller, "supports USB remote wakeup\n");
 
-        /* enable irqs just before we start the controller */
-        if (usb_hcd_is_primary_hcd(hcd)) {
+        /* enable irqs just before we start the controller,
+         * if the BIOS provides legacy PCI irqs.
+         */
+        if (usb_hcd_is_primary_hcd(hcd) && irqnum) {
                 retval = usb_hcd_request_irqs(hcd, irqnum, irqflags);
                 if (retval)
                         goto err_request_irq;
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index a0613d8f9be7..265c2f675d04 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -705,10 +705,26 @@ static void hub_activate(struct usb_hub *hub, enum hub_activation_type type)
         if (type == HUB_INIT3)
                 goto init3;
 
-        /* After a resume, port power should still be on.
+        /* The superspeed hub except for root hub has to use Hub Depth
+         * value as an offset into the route string to locate the bits
+         * it uses to determine the downstream port number. So hub driver
+         * should send a set hub depth request to superspeed hub after
+         * the superspeed hub is set configuration in initialization or
+         * reset procedure.
+         *
+         * After a resume, port power should still be on.
          * For any other type of activation, turn it on.
          */
         if (type != HUB_RESUME) {
+                if (hdev->parent && hub_is_superspeed(hdev)) {
+                        ret = usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0),
+                                        HUB_SET_DEPTH, USB_RT_HUB,
+                                        hdev->level - 1, 0, NULL, 0,
+                                        USB_CTRL_SET_TIMEOUT);
+                        if (ret < 0)
+                                dev_err(hub->intfdev,
+                                                "set hub depth failed\n");
+                }
 
                 /* Speed up system boot by using a delayed_work for the
                  * hub's initial power-up delays.  This is pretty awkward
@@ -987,18 +1003,6 @@ static int hub_configure(struct usb_hub *hub,
                 goto fail;
         }
 
-        if (hub_is_superspeed(hdev) && (hdev->parent != NULL)) {
-                ret = usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0),
-                                HUB_SET_DEPTH, USB_RT_HUB,
-                                hdev->level - 1, 0, NULL, 0,
-                                USB_CTRL_SET_TIMEOUT);
-
-                if (ret < 0) {
-                        message = "can't set hub depth";
-                        goto fail;
-                }
-        }
-
         /* Request the entire hub descriptor.
          * hub->descriptor can handle USB_MAXCHILDREN ports,
          * but the hub can/will return fewer bytes here.
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7ecb68a67411..85ae4b46bb68 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -137,7 +137,7 @@ choice
 
 config USB_AT91
         tristate "Atmel AT91 USB Device Port"
-        depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 && !ARCH_AT91SAM9G45
+        depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91SAM9G45
         help
            Many Atmel AT91 processors (such as the AT91RM2000) have a
            full speed USB Device Port with support for five configurable
@@ -150,7 +150,7 @@ config USB_AT91
 config USB_ATMEL_USBA
         tristate "Atmel USBA"
         select USB_GADGET_DUALSPEED
-        depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
+        depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
         help
           USBA is the integrated high-speed USB Device controller on
           the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 143a7256b598..f99b3dc745bd 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -41,6 +41,7 @@
 #include <mach/board.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9261_matrix.h>
+#include <mach/at91_matrix.h>
 
 #include "at91_udc.h"
 
@@ -910,9 +911,9 @@ static void pullup(struct at91_udc *udc, int is_on)
                 } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
                         u32     usbpucr;
 
-                        usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+                        usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR);
                         usbpucr |= AT91_MATRIX_USBPUCR_PUON;
-                        at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+                        at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr);
                 }
         } else {
                 stop_activity(udc);
@@ -928,9 +929,9 @@ static void pullup(struct at91_udc *udc, int is_on)
                 } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
                         u32     usbpucr;
 
-                        usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+                        usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR);
                         usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
-                        at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+                        at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr);
                 }
                 clk_off(udc);
         }
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index e2fb6d583bd9..ce9dffb0515d 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -332,12 +332,12 @@ static int vbus_is_present(struct usba_udc *udc)
 
 static void toggle_bias(int is_on)
 {
-        unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
+        unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
 
         if (is_on)
-                at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
+                at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
         else
-                at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
+                at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
 }
 
 #else
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 77afabc77f9b..8e855eb0bf89 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -448,10 +448,11 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data)
 
         /* From the GPIO notifying the over-current situation, find
          * out the corresponding port */
-        gpio = irq_to_gpio(irq);
         for (port = 0; port < ARRAY_SIZE(pdata->overcurrent_pin); port++) {
-                if (pdata->overcurrent_pin[port] == gpio)
+                if (gpio_to_irq(pdata->overcurrent_pin[port]) == irq) {
+                        gpio = pdata->overcurrent_pin[port];
                         break;
+                }
         }
 
         if (port == ARRAY_SIZE(pdata->overcurrent_pin)) {
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index ac53a662a6a3..7732d69e49e0 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -872,7 +872,17 @@ static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
          */
         if (pdev->vendor == 0x184e)     /* vendor Netlogic */
                 return;
+        if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
+                        pdev->class != PCI_CLASS_SERIAL_USB_OHCI &&
+                        pdev->class != PCI_CLASS_SERIAL_USB_EHCI &&
+                        pdev->class != PCI_CLASS_SERIAL_USB_XHCI)
+                return;
 
+        if (pci_enable_device(pdev) < 0) {
+                dev_warn(&pdev->dev, "Can't enable PCI device, "
+                                "BIOS handoff failed.\n");
+                return;
+        }
         if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI)
                 quirk_usb_handoff_uhci(pdev);
         else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI)
@@ -881,5 +891,6 @@ static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
                 quirk_usb_disable_ehci(pdev);
         else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI)
                 quirk_usb_handoff_xhci(pdev);
+        pci_disable_device(pdev);
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 35e257f79c7b..557b6f32db86 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -93,7 +93,7 @@ static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
          */
         memset(port_removable, 0, sizeof(port_removable));
         for (i = 0; i < ports; i++) {
-                portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
+                portsc = xhci_readl(xhci, xhci->usb2_ports[i]);
                 /* If a device is removable, PORTSC reports a 0, same as in the
                  * hub descriptor DeviceRemovable bits.
                  */
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 36cbe2226a44..383fc857491c 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1126,26 +1126,42 @@ static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
 }
 
 /*
- * Convert bInterval expressed in frames (in 1-255 range) to exponent of
+ * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
  * microframes, rounded down to nearest power of 2.
  */
-static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
-                struct usb_host_endpoint *ep)
+static unsigned int xhci_microframes_to_exponent(struct usb_device *udev,
+                struct usb_host_endpoint *ep, unsigned int desc_interval,
+                unsigned int min_exponent, unsigned int max_exponent)
 {
         unsigned int interval;
 
-        interval = fls(8 * ep->desc.bInterval) - 1;
-        interval = clamp_val(interval, 3, 10);
-        if ((1 << interval) != 8 * ep->desc.bInterval)
+        interval = fls(desc_interval) - 1;
+        interval = clamp_val(interval, min_exponent, max_exponent);
+        if ((1 << interval) != desc_interval)
                 dev_warn(&udev->dev,
                          "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n",
                          ep->desc.bEndpointAddress,
                          1 << interval,
-                         8 * ep->desc.bInterval);
+                         desc_interval);
 
         return interval;
 }
 
+static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
+                struct usb_host_endpoint *ep)
+{
+        return xhci_microframes_to_exponent(udev, ep,
+                        ep->desc.bInterval, 0, 15);
+}
+
+
+static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
+                struct usb_host_endpoint *ep)
+{
+        return xhci_microframes_to_exponent(udev, ep,
+                        ep->desc.bInterval * 8, 3, 10);
+}
+
 /* Return the polling or NAK interval.
  *
  * The polling interval is expressed in "microframes".  If xHCI's Interval field
@@ -1164,7 +1180,7 @@ static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
                 /* Max NAK rate */
                 if (usb_endpoint_xfer_control(&ep->desc) ||
                     usb_endpoint_xfer_bulk(&ep->desc)) {
-                        interval = ep->desc.bInterval;
+                        interval = xhci_parse_microframe_interval(udev, ep);
                         break;
                 }
                 /* Fall through - SS and HS isoc/int have same decoding */
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 6bbe3c3a7111..c939f5fdef9e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -352,6 +352,11 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd)
                 /* hcd->irq is -1, we have MSI */
                 return 0;
 
+        if (!pdev->irq) {
+                xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
+                return -EINVAL;
+        }
+
         /* fall back to legacy interrupt*/
         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
                         hcd->irq_descr, hcd);
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 8dbf51a43c45..08a5575724cd 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -136,6 +136,8 @@ static const struct usb_device_id id_table[] = {
         { USB_DEVICE(0x16DC, 0x0011) }, /* W-IE-NE-R Plein & Baus GmbH RCM Remote Control for MARATON Power Supply */
         { USB_DEVICE(0x16DC, 0x0012) }, /* W-IE-NE-R Plein & Baus GmbH MPOD Multi Channel Power Supply */
         { USB_DEVICE(0x16DC, 0x0015) }, /* W-IE-NE-R Plein & Baus GmbH CML Control, Monitoring and Data Logger */
+        { USB_DEVICE(0x17A8, 0x0001) }, /* Kamstrup Optical Eye/3-wire */
+        { USB_DEVICE(0x17A8, 0x0005) }, /* Kamstrup M-Bus Master MultiPort 250D */
         { USB_DEVICE(0x17F4, 0xAAAA) }, /* Wavesense Jazz blood glucose meter */
         { USB_DEVICE(0x1843, 0x0200) }, /* Vaisala USB Instrument Cable */
         { USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 39ed1f46cec0..b54afceb9611 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -788,7 +788,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0012, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0013, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0016, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0017, 0xff, 0xff, 0xff),
@@ -803,7 +802,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0024, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0025, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
-        /* { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0026, 0xff, 0xff, 0xff) }, */
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0028, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0029, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0030, 0xff, 0xff, 0xff) },
@@ -828,7 +826,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0051, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0052, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
-        /* { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0053, 0xff, 0xff, 0xff) }, */
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0054, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0055, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
@@ -836,7 +833,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0057, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0058, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0061, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0062, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0063, 0xff, 0xff, 0xff),
@@ -846,7 +842,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0066, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0067, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0069, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0076, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0077, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0078, 0xff, 0xff, 0xff) },
@@ -865,8 +860,6 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0095, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0096, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0097, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0098, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0099, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0104, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0105, 0xff, 0xff, 0xff) },
@@ -887,28 +880,18 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0143, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0144, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0145, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0146, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0147, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0148, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0149, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0150, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0151, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0152, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0153, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0155, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0156, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0157, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0158, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0159, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0160, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0161, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0162, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0164, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0165, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0168, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0170, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0176, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0178, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1008, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1010, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1012, 0xff, 0xff, 0xff) },
@@ -1083,127 +1066,27 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1298, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1299, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1300, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1401, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1402, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1403, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1404, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1405, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1406, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1407, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1408, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1409, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1410, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1411, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1412, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1413, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1414, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1415, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1416, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1417, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1418, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1419, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1420, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1421, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1422, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1423, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1424, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1425, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1426, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1427, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1428, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1429, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1430, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1431, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1432, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1433, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1434, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1435, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1436, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1437, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1438, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1439, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1440, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1441, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1442, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1443, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1444, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1445, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1446, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1447, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1448, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1449, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1450, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1451, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1452, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1453, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1454, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1455, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1456, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1457, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1458, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1459, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1460, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1461, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1462, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1463, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1464, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1465, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1466, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1467, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1468, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1469, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1470, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1471, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1472, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1473, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1474, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1475, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1476, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1477, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1478, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1479, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1480, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1481, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1482, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1483, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1484, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1485, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1486, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1487, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1488, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1489, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1490, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1491, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1492, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1493, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1494, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1495, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1496, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1497, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1498, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1499, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1500, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1501, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1502, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1503, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1504, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1505, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1506, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1507, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1508, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1509, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1510, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff,
+          0xff, 0xff), .driver_info = (kernel_ulong_t)&zte_k3765_z_blacklist },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) },
+
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) }, /* ZTE CDMA products */
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0027, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0060, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0094, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0130, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0133, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0141, 0xff, 0xff, 0xff) },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff,
-          0xff, 0xff), .driver_info = (kernel_ulong_t)&zte_k3765_z_blacklist },
-        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0147, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0152, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0168, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0170, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0176, 0xff, 0xff, 0xff) },
+        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0178, 0xff, 0xff, 0xff) },
+
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) },
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index 8468eb769a29..75b838eff178 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -165,7 +165,7 @@ static unsigned int product_5052_count;
 /* the array dimension is the number of default entries plus */
 /* TI_EXTRA_VID_PID_COUNT user defined entries plus 1 terminating */
 /* null entry */
-static struct usb_device_id ti_id_table_3410[13+TI_EXTRA_VID_PID_COUNT+1] = {
+static struct usb_device_id ti_id_table_3410[14+TI_EXTRA_VID_PID_COUNT+1] = {
         { USB_DEVICE(TI_VENDOR_ID, TI_3410_PRODUCT_ID) },
         { USB_DEVICE(TI_VENDOR_ID, TI_3410_EZ430_ID) },
         { USB_DEVICE(MTS_VENDOR_ID, MTS_GSM_NO_FW_PRODUCT_ID) },
@@ -179,6 +179,7 @@ static struct usb_device_id ti_id_table_3410[13+TI_EXTRA_VID_PID_COUNT+1] = {
         { USB_DEVICE(IBM_VENDOR_ID, IBM_4543_PRODUCT_ID) },
         { USB_DEVICE(IBM_VENDOR_ID, IBM_454B_PRODUCT_ID) },
         { USB_DEVICE(IBM_VENDOR_ID, IBM_454C_PRODUCT_ID) },
+        { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_PRODUCT_ID) },
 };
 
 static struct usb_device_id ti_id_table_5052[5+TI_EXTRA_VID_PID_COUNT+1] = {
@@ -188,7 +189,7 @@ static struct usb_device_id ti_id_table_5052[5+TI_EXTRA_VID_PID_COUNT+1] = {
         { USB_DEVICE(TI_VENDOR_ID, TI_5052_FIRMWARE_PRODUCT_ID) },
 };
 
-static struct usb_device_id ti_id_table_combined[17+2*TI_EXTRA_VID_PID_COUNT+1] = {
+static struct usb_device_id ti_id_table_combined[18+2*TI_EXTRA_VID_PID_COUNT+1] = {
         { USB_DEVICE(TI_VENDOR_ID, TI_3410_PRODUCT_ID) },
         { USB_DEVICE(TI_VENDOR_ID, TI_3410_EZ430_ID) },
         { USB_DEVICE(MTS_VENDOR_ID, MTS_GSM_NO_FW_PRODUCT_ID) },
@@ -206,6 +207,7 @@ static struct usb_device_id ti_id_table_combined[17+2*TI_EXTRA_VID_PID_COUNT+1]
         { USB_DEVICE(IBM_VENDOR_ID, IBM_4543_PRODUCT_ID) },
         { USB_DEVICE(IBM_VENDOR_ID, IBM_454B_PRODUCT_ID) },
         { USB_DEVICE(IBM_VENDOR_ID, IBM_454C_PRODUCT_ID) },
+        { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_PRODUCT_ID) },
         { }
 };
 
diff --git a/drivers/usb/serial/ti_usb_3410_5052.h b/drivers/usb/serial/ti_usb_3410_5052.h
index 2aac1953993b..f140f1b9d5c0 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.h
+++ b/drivers/usb/serial/ti_usb_3410_5052.h
@@ -49,6 +49,10 @@
 #define MTS_MT9234ZBA_PRODUCT_ID        0xF115
 #define MTS_MT9234ZBAOLD_PRODUCT_ID     0x0319
 
+/* Abbott Diabetics vendor and product ids */
+#define ABBOTT_VENDOR_ID                0x1a61
+#define ABBOTT_PRODUCT_ID               0x3410
+
 /* Commands */
 #define TI_GET_VERSION                  0x01
 #define TI_GET_PORT_STATUS              0x02
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index 3dd7da9fd504..db51ba16dc07 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -788,15 +788,19 @@ static void quiesce_and_remove_host(struct us_data *us)
         struct Scsi_Host *host = us_to_host(us);
 
         /* If the device is really gone, cut short reset delays */
-        if (us->pusb_dev->state == USB_STATE_NOTATTACHED)
+        if (us->pusb_dev->state == USB_STATE_NOTATTACHED) {
                 set_bit(US_FLIDX_DISCONNECTING, &us->dflags);
+                wake_up(&us->delay_wait);
+        }
 
-        /* Prevent SCSI-scanning (if it hasn't started yet)
-         * and wait for the SCSI-scanning thread to stop.
+        /* Prevent SCSI scanning (if it hasn't started yet)
+         * or wait for the SCSI-scanning routine to stop.
          */
-        set_bit(US_FLIDX_DONT_SCAN, &us->dflags);
-        wake_up(&us->delay_wait);
-        wait_for_completion(&us->scanning_done);
+        cancel_delayed_work_sync(&us->scan_dwork);
+
+        /* Balance autopm calls if scanning was cancelled */
+        if (test_bit(US_FLIDX_SCAN_PENDING, &us->dflags))
+                usb_autopm_put_interface_no_suspend(us->pusb_intf);
 
         /* Removing the host will perform an orderly shutdown: caches
          * synchronized, disks spun down, etc.
@@ -823,53 +827,28 @@ static void release_everything(struct us_data *us)
         scsi_host_put(us_to_host(us));
 }
 
-/* Thread to carry out delayed SCSI-device scanning */
-static int usb_stor_scan_thread(void * __us)
+/* Delayed-work routine to carry out SCSI-device scanning */
+static void usb_stor_scan_dwork(struct work_struct *work)
 {
-        struct us_data *us = (struct us_data *)__us;
+        struct us_data *us = container_of(work, struct us_data,
+                        scan_dwork.work);
         struct device *dev = &us->pusb_intf->dev;
 
-        dev_dbg(dev, "device found\n");
-
-        set_freezable();
+        dev_dbg(dev, "starting scan\n");
 
-        /*
-         * Wait for the timeout to expire or for a disconnect
-         *
-         * We can't freeze in this thread or we risk causing khubd to
-         * fail to freeze, but we can't be non-freezable either. Nor can
-         * khubd freeze while waiting for scanning to complete as it may
-         * hold the device lock, causing a hang when suspending devices.
-         * So instead of using wait_event_freezable(), explicitly test
-         * for (DONT_SCAN || freezing) in interruptible wait and proceed
-         * if any of DONT_SCAN, freezing or timeout has happened.
-         */
-        if (delay_use > 0) {
-                dev_dbg(dev, "waiting for device to settle "
-                                "before scanning\n");
-                wait_event_interruptible_timeout(us->delay_wait,
-                                test_bit(US_FLIDX_DONT_SCAN, &us->dflags) ||
-                                freezing(current), delay_use * HZ);
+        /* For bulk-only devices, determine the max LUN value */
+        if (us->protocol == USB_PR_BULK && !(us->fflags & US_FL_SINGLE_LUN)) {
+                mutex_lock(&us->dev_mutex);
+                us->max_lun = usb_stor_Bulk_max_lun(us);
+                mutex_unlock(&us->dev_mutex);
         }
+        scsi_scan_host(us_to_host(us));
+        dev_dbg(dev, "scan complete\n");
 
-        /* If the device is still connected, perform the scanning */
-        if (!test_bit(US_FLIDX_DONT_SCAN, &us->dflags)) {
-
-                /* For bulk-only devices, determine the max LUN value */
-                if (us->protocol == USB_PR_BULK &&
-                                !(us->fflags & US_FL_SINGLE_LUN)) {
-                        mutex_lock(&us->dev_mutex);
-                        us->max_lun = usb_stor_Bulk_max_lun(us);
-                        mutex_unlock(&us->dev_mutex);
-                }
-                scsi_scan_host(us_to_host(us));
-                dev_dbg(dev, "scan complete\n");
-
-                /* Should we unbind if no devices were detected? */
-        }
+        /* Should we unbind if no devices were detected? */
 
         usb_autopm_put_interface(us->pusb_intf);
-        complete_and_exit(&us->scanning_done, 0);
+        clear_bit(US_FLIDX_SCAN_PENDING, &us->dflags);
 }
 
 static unsigned int usb_stor_sg_tablesize(struct usb_interface *intf)
@@ -916,7 +895,7 @@ int usb_stor_probe1(struct us_data **pus,
         init_completion(&us->cmnd_ready);
         init_completion(&(us->notify));
         init_waitqueue_head(&us->delay_wait);
-        init_completion(&us->scanning_done);
+        INIT_DELAYED_WORK(&us->scan_dwork, usb_stor_scan_dwork);
 
         /* Associate the us_data structure with the USB device */
         result = associate_dev(us, intf);
@@ -947,7 +926,6 @@ EXPORT_SYMBOL_GPL(usb_stor_probe1);
 /* Second part of general USB mass-storage probing */
 int usb_stor_probe2(struct us_data *us)
 {
-        struct task_struct *th;
         int result;
         struct device *dev = &us->pusb_intf->dev;
 
@@ -988,20 +966,14 @@ int usb_stor_probe2(struct us_data *us)
                 goto BadDevice;
         }
 
-        /* Start up the thread for delayed SCSI-device scanning */
-        th = kthread_create(usb_stor_scan_thread, us, "usb-stor-scan");
-        if (IS_ERR(th)) {
-                dev_warn(dev,
-                                "Unable to start the device-scanning thread\n");
-                complete(&us->scanning_done);
-                quiesce_and_remove_host(us);
-                result = PTR_ERR(th);
-                goto BadDevice;
-        }
-
+        /* Submit the delayed_work for SCSI-device scanning */
         usb_autopm_get_interface_no_resume(us->pusb_intf);
-        wake_up_process(th);
+        set_bit(US_FLIDX_SCAN_PENDING, &us->dflags);
 
+        if (delay_use > 0)
+                dev_dbg(dev, "waiting for device to settle before scanning\n");
+        queue_delayed_work(system_freezable_wq, &us->scan_dwork,
+                        delay_use * HZ);
         return 0;
 
         /* We come here if there are any problems */
diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h
index 7b0f2113632e..75f70f04f37b 100644
--- a/drivers/usb/storage/usb.h
+++ b/drivers/usb/storage/usb.h
@@ -47,6 +47,7 @@
 #include <linux/blkdev.h>
 #include <linux/completion.h>
 #include <linux/mutex.h>
+#include <linux/workqueue.h>
 #include <scsi/scsi_host.h>
 
 struct us_data;
@@ -72,7 +73,7 @@ struct us_unusual_dev {
 #define US_FLIDX_DISCONNECTING  3       /* disconnect in progress   */
 #define US_FLIDX_RESETTING      4       /* device reset in progress */
 #define US_FLIDX_TIMED_OUT      5       /* SCSI midlayer timed out  */
-#define US_FLIDX_DONT_SCAN      6       /* don't scan (disconnect)  */
+#define US_FLIDX_SCAN_PENDING   6       /* scanning not yet done    */
 #define US_FLIDX_REDO_READ10    7       /* redo READ(10) command    */
 #define US_FLIDX_READ10_WORKED  8       /* previous READ(10) succeeded */
 
@@ -147,8 +148,8 @@ struct us_data {
         /* mutual exclusion and synchronization structures */
         struct completion       cmnd_ready;      /* to sleep thread on      */
         struct completion       notify;          /* thread begin/end        */
-        wait_queue_head_t       delay_wait;      /* wait during scan, reset */
-        struct completion       scanning_done;   /* wait for scan thread    */
+        wait_queue_head_t       delay_wait;      /* wait during reset       */
+        struct delayed_work     scan_dwork;      /* for async scanning      */
 
         /* subdriver information */
         void                    *extra;          /* Any extra data          */
diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig
index 74d29b552901..408a9927be92 100644
--- a/drivers/video/omap2/displays/Kconfig
+++ b/drivers/video/omap2/displays/Kconfig
@@ -12,7 +12,7 @@ config PANEL_GENERIC_DPI
 
 config PANEL_DVI
         tristate "DVI output"
-        depends on OMAP2_DSS_DPI
+        depends on OMAP2_DSS_DPI && I2C
         help
           Driver for external monitors, connected via DVI. The driver uses i2c
           to read EDID information from the monitor.
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c
index 052dc874cd3d..87b3e25294cf 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -1276,6 +1276,9 @@ int dss_ovl_enable(struct omap_overlay *ovl)
 
         spin_unlock_irqrestore(&data_lock, flags);
 
+        /* wait for overlay to be enabled */
+        wait_pending_extra_info_updates();
+
         mutex_unlock(&apply_lock);
 
         return 0;
@@ -1313,6 +1316,9 @@ int dss_ovl_disable(struct omap_overlay *ovl)
 
         spin_unlock_irqrestore(&data_lock, flags);
 
+        /* wait for the overlay to be disabled */
+        wait_pending_extra_info_updates();
+
         mutex_unlock(&apply_lock);
 
         return 0;
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index d7aa3b056529..a36b934b2db4 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -165,9 +165,25 @@ static int hdmi_runtime_get(void)
 
         DSSDBG("hdmi_runtime_get\n");
 
+        /*
+         * HACK: Add dss_runtime_get() to ensure DSS clock domain is enabled.
+         * This should be removed later.
+         */
+        r = dss_runtime_get();
+        if (r < 0)
+                goto err_get_dss;
+
         r = pm_runtime_get_sync(&hdmi.pdev->dev);
         WARN_ON(r < 0);
-        return r < 0 ? r : 0;
+        if (r < 0)
+                goto err_get_hdmi;
+
+        return 0;
+
+err_get_hdmi:
+        dss_runtime_put();
+err_get_dss:
+        return r;
 }
 
 static void hdmi_runtime_put(void)
@@ -178,6 +194,12 @@ static void hdmi_runtime_put(void)
 
         r = pm_runtime_put_sync(&hdmi.pdev->dev);
         WARN_ON(r < 0);
+
+        /*
+         * HACK: This is added to complement the dss_runtime_get() call in
+         * hdmi_runtime_get(). This should be removed later.
+         */
+        dss_runtime_put();
 }
 
 int hdmi_init_display(struct omap_dss_device *dssdev)
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
index 2d72334ca3da..6847a478b459 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
@@ -479,14 +479,7 @@ int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data,
 
 bool ti_hdmi_4xxx_detect(struct hdmi_ip_data *ip_data)
 {
-        int r;
-
-        void __iomem *base = hdmi_core_sys_base(ip_data);
-
-        /* HPD */
-        r = REG_GET(base, HDMI_CORE_SYS_SYS_STAT, 1, 1);
-
-        return r == 1;
+        return gpio_get_value(ip_data->hpd_gpio);
 }
 
 static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c
index f9975100d56d..3a3fdc62c75b 100644
--- a/drivers/video/pvr2fb.c
+++ b/drivers/video/pvr2fb.c
@@ -1061,7 +1061,7 @@ static struct pvr2_board {
         int (*init)(void);
         void (*exit)(void);
         char name[16];
-} board_driver[] = {
+} board_driver[] __refdata = {
 #ifdef CONFIG_SH_DREAMCAST
         { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
 #endif
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index d5aaca9cfa7e..8497727d66de 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -1810,7 +1810,11 @@ static void hw_init(void)
                 break;
         }
 
+        /* magic required on VX900 for correct modesetting on IGA1 */
+        via_write_reg_mask(VIACR, 0x45, 0x00, 0x01);
+
         /* probably this should go to the scaling code one day */
+        via_write_reg_mask(VIACR, 0xFD, 0, 0x80); /* VX900 hw scale on IGA2 */
         viafb_write_regx(scaling_parameters, ARRAY_SIZE(scaling_parameters));
 
         /* Fill VPIT Parameters */
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index 95aeedf198f8..958e5129c601 100644
--- a/drivers/virtio/virtio_balloon.c
+++ b/drivers/virtio/virtio_balloon.c
@@ -367,29 +367,45 @@ static void __devexit virtballoon_remove(struct virtio_device *vdev)
 #ifdef CONFIG_PM
 static int virtballoon_freeze(struct virtio_device *vdev)
 {
+        struct virtio_balloon *vb = vdev->priv;
+
         /*
          * The kthread is already frozen by the PM core before this
          * function is called.
          */
 
+        while (vb->num_pages)
+                leak_balloon(vb, vb->num_pages);
+        update_balloon_size(vb);
+
         /* Ensure we don't get any more requests from the host */
         vdev->config->reset(vdev);
         vdev->config->del_vqs(vdev);
         return 0;
 }
 
+static int restore_common(struct virtio_device *vdev)
+{
+        struct virtio_balloon *vb = vdev->priv;
+        int ret;
+
+        ret = init_vqs(vdev->priv);
+        if (ret)
+                return ret;
+
+        fill_balloon(vb, towards_target(vb));
+        update_balloon_size(vb);
+        return 0;
+}
+
 static int virtballoon_thaw(struct virtio_device *vdev)
 {
-        return init_vqs(vdev->priv);
+        return restore_common(vdev);
 }
 
 static int virtballoon_restore(struct virtio_device *vdev)
 {
         struct virtio_balloon *vb = vdev->priv;
-        struct page *page, *page2;
-
-        /* We're starting from a clean slate */
-        vb->num_pages = 0;
 
         /*
          * If a request wasn't complete at the time of freezing, this
@@ -397,12 +413,7 @@ static int virtballoon_restore(struct virtio_device *vdev)
          */
         vb->need_stats_update = 0;
 
-        /* We don't have these pages in the balloon anymore! */
-        list_for_each_entry_safe(page, page2, &vb->pages, lru) {
-                list_del(&page->lru);
-                totalram_pages++;
-        }
-        return init_vqs(vdev->priv);
+        return restore_common(vdev);
 }
 #endif
 
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 877b107f77a7..df9e8f0e327d 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1098,7 +1098,7 @@ config BOOKE_WDT_DEFAULT_TIMEOUT
           For Freescale Book-E processors, this is a number between 0 and 63.
           For other Book-E processors, this is a number between 0 and 3.
 
-          The value can be overidden by the wdt_period command-line parameter.
+          The value can be overridden by the wdt_period command-line parameter.
 
 # PPC64 Architecture
 
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c
index b3046dc4b56c..7ceefd29ae14 100644
--- a/drivers/watchdog/at91rm9200_wdt.c
+++ b/drivers/watchdog/at91rm9200_wdt.c
@@ -51,7 +51,7 @@ static unsigned long at91wdt_busy;
  */
 static inline void at91_wdt_stop(void)
 {
-        at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN);
+        at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN);
 }
 
 /*
@@ -59,9 +59,9 @@ static inline void at91_wdt_stop(void)
  */
 static inline void at91_wdt_start(void)
 {
-        at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
+        at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
                                 (((65536 * wdt_time) >> 8) & AT91_ST_WDV));
-        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+        at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
 }
 
 /*
@@ -69,7 +69,7 @@ static inline void at91_wdt_start(void)
  */
 static inline void at91_wdt_reload(void)
 {
-        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+        at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
 }
 
 /* ......................................................................... */
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index 337265b47305..7c0fdfca2646 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -198,9 +198,13 @@ static long booke_wdt_ioctl(struct file *file,
                 booke_wdt_period = tmp;
 #endif
                 booke_wdt_set();
-                return 0;
+                /* Fall */
         case WDIOC_GETTIMEOUT:
+#ifdef  CONFIG_FSL_BOOKE
+                return put_user(period_to_sec(booke_wdt_period), p);
+#else
                 return put_user(booke_wdt_period, p);
+#endif
         default:
                 return -ENOTTY;
         }
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index 8464ea1c36a1..3c166d3f4e55 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -231,7 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry,
 
         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 
-        set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
+        set_memory_x((unsigned long)bios32_map, 2);
         asminline_call(&cmn_regs, bios32_entrypoint);
 
         if (cmn_regs.u1.ral != 0) {
@@ -250,7 +250,8 @@ static int __devinit cru_detect(unsigned long map_entry,
                         cru_rom_addr =
                                 ioremap(cru_physical_address, cru_length);
                         if (cru_rom_addr) {
-                                set_memory_x((unsigned long)cru_rom_addr, cru_length);
+                                set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
+                                        (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
                                 retval = 0;
                         }
                 }
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 8e210aafdfd0..dfae030a7ef2 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -264,7 +264,7 @@ static int __devinit pnx4008_wdt_probe(struct platform_device *pdev)
         wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (wdt_mem == NULL) {
                 printk(KERN_INFO MODULE_NAME
-                        "failed to get memory region resouce\n");
+                        "failed to get memory region resource\n");
                 return -ENOENT;
         }
 
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 4bc3744e14e4..404172f02c9b 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -312,18 +312,26 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
         dev = &pdev->dev;
         wdt_dev = &pdev->dev;
 
-        /* get the memory region for the watchdog timer */
-
         wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (wdt_mem == NULL) {
                 dev_err(dev, "no memory resource specified\n");
                 return -ENOENT;
         }
 
+        wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (wdt_irq == NULL) {
+                dev_err(dev, "no irq resource specified\n");
+                ret = -ENOENT;
+                goto err;
+        }
+
+        /* get the memory region for the watchdog timer */
+
         size = resource_size(wdt_mem);
         if (!request_mem_region(wdt_mem->start, size, pdev->name)) {
                 dev_err(dev, "failed to get memory region\n");
-                return -EBUSY;
+                ret = -EBUSY;
+                goto err;
         }
 
         wdt_base = ioremap(wdt_mem->start, size);
@@ -335,29 +343,17 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
 
         DBG("probe: mapped wdt_base=%p\n", wdt_base);
 
-        wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-        if (wdt_irq == NULL) {
-                dev_err(dev, "no irq resource specified\n");
-                ret = -ENOENT;
-                goto err_map;
-        }
-
-        ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
-        if (ret != 0) {
-                dev_err(dev, "failed to install irq (%d)\n", ret);
-                goto err_map;
-        }
-
         wdt_clock = clk_get(&pdev->dev, "watchdog");
         if (IS_ERR(wdt_clock)) {
                 dev_err(dev, "failed to find watchdog clock source\n");
                 ret = PTR_ERR(wdt_clock);
-                goto err_irq;
+                goto err_map;
         }
 
         clk_enable(wdt_clock);
 
-        if (s3c2410wdt_cpufreq_register() < 0) {
+        ret = s3c2410wdt_cpufreq_register();
+        if (ret < 0) {
                 printk(KERN_ERR PFX "failed to register cpufreq\n");
                 goto err_clk;
         }
@@ -378,12 +374,18 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
                                                         "cannot start\n");
         }
 
+        ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
+        if (ret != 0) {
+                dev_err(dev, "failed to install irq (%d)\n", ret);
+                goto err_cpufreq;
+        }
+
         watchdog_set_nowayout(&s3c2410_wdd, nowayout);
 
         ret = watchdog_register_device(&s3c2410_wdd);
         if (ret) {
                 dev_err(dev, "cannot register watchdog (%d)\n", ret);
-                goto err_cpufreq;
+                goto err_irq;
         }
 
         if (tmr_atboot && started == 0) {
@@ -408,23 +410,26 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
 
         return 0;
 
+ err_irq:
+        free_irq(wdt_irq->start, pdev);
+
  err_cpufreq:
         s3c2410wdt_cpufreq_deregister();
 
  err_clk:
         clk_disable(wdt_clock);
         clk_put(wdt_clock);
-
- err_irq:
-        free_irq(wdt_irq->start, pdev);
+        wdt_clock = NULL;
 
  err_map:
         iounmap(wdt_base);
 
  err_req:
         release_mem_region(wdt_mem->start, size);
-        wdt_mem = NULL;
 
+ err:
+        wdt_irq = NULL;
+        wdt_mem = NULL;
         return ret;
 }
 
@@ -432,18 +437,18 @@ static int __devexit s3c2410wdt_remove(struct platform_device *dev)
 {
         watchdog_unregister_device(&s3c2410_wdd);
 
+        free_irq(wdt_irq->start, dev);
+
         s3c2410wdt_cpufreq_deregister();
 
         clk_disable(wdt_clock);
         clk_put(wdt_clock);
         wdt_clock = NULL;
 
-        free_irq(wdt_irq->start, dev);
-        wdt_irq = NULL;
-
         iounmap(wdt_base);
 
         release_mem_region(wdt_mem->start, resource_size(wdt_mem));
+        wdt_irq = NULL;
         wdt_mem = NULL;
         return 0;
 }
diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h
index d8d8e7ba6a1e..eb1cc92cd67d 100644
--- a/fs/autofs4/autofs_i.h
+++ b/fs/autofs4/autofs_i.h
@@ -110,6 +110,7 @@ struct autofs_sb_info {
         int sub_version;
         int min_proto;
         int max_proto;
+        int compat_daemon;
         unsigned long exp_timeout;
         unsigned int type;
         int reghost_enabled;
diff --git a/fs/autofs4/dev-ioctl.c b/fs/autofs4/dev-ioctl.c
index 76741d8d7786..85f1fcdb30e7 100644
--- a/fs/autofs4/dev-ioctl.c
+++ b/fs/autofs4/dev-ioctl.c
@@ -385,6 +385,7 @@ static int autofs_dev_ioctl_setpipefd(struct file *fp,
                 sbi->pipefd = pipefd;
                 sbi->pipe = pipe;
                 sbi->catatonic = 0;
+                sbi->compat_daemon = is_compat_task();
         }
 out:
         mutex_unlock(&sbi->wq_mutex);
diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c
index 450f529a4eae..1feb68ecef95 100644
--- a/fs/autofs4/expire.c
+++ b/fs/autofs4/expire.c
@@ -124,6 +124,7 @@ start:
         /* Negative dentry - try next */
         if (!simple_positive(q)) {
                 spin_unlock(&p->d_lock);
+                lock_set_subclass(&q->d_lock.dep_map, 0, _RET_IP_);
                 p = q;
                 goto again;
         }
@@ -186,6 +187,7 @@ again:
         /* Negative dentry - try next */
         if (!simple_positive(ret)) {
                 spin_unlock(&p->d_lock);
+                lock_set_subclass(&ret->d_lock.dep_map, 0, _RET_IP_);
                 p = ret;
                 goto again;
         }
diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c
index e16980b00b8d..06858d955120 100644
--- a/fs/autofs4/inode.c
+++ b/fs/autofs4/inode.c
@@ -19,6 +19,7 @@
 #include <linux/parser.h>
 #include <linux/bitops.h>
 #include <linux/magic.h>
+#include <linux/compat.h>
 #include "autofs_i.h"
 #include <linux/module.h>
 
@@ -224,6 +225,7 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent)
         set_autofs_type_indirect(&sbi->type);
         sbi->min_proto = 0;
         sbi->max_proto = 0;
+        sbi->compat_daemon = is_compat_task();
         mutex_init(&sbi->wq_mutex);
         mutex_init(&sbi->pipe_mutex);
         spin_lock_init(&sbi->fs_lock);
diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c
index da8876d38a7b..9c098db43344 100644
--- a/fs/autofs4/waitq.c
+++ b/fs/autofs4/waitq.c
@@ -91,7 +91,24 @@ static int autofs4_write(struct autofs_sb_info *sbi,
 
         return (bytes > 0);
 }
-        
+
+/*
+ * The autofs_v5 packet was misdesigned.
+ *
+ * The packets are identical on x86-32 and x86-64, but have different
+ * alignment. Which means that 'sizeof()' will give different results.
+ * Fix it up for the case of running 32-bit user mode on a 64-bit kernel.
+ */
+static noinline size_t autofs_v5_packet_size(struct autofs_sb_info *sbi)
+{
+        size_t pktsz = sizeof(struct autofs_v5_packet);
+#if defined(CONFIG_X86_64) && defined(CONFIG_COMPAT)
+        if (sbi->compat_daemon > 0)
+                pktsz -= 4;
+#endif
+        return pktsz;
+}
+
 static void autofs4_notify_daemon(struct autofs_sb_info *sbi,
                                  struct autofs_wait_queue *wq,
                                  int type)
@@ -155,8 +172,7 @@ static void autofs4_notify_daemon(struct autofs_sb_info *sbi,
         {
                 struct autofs_v5_packet *packet = &pkt.v5_pkt.v5_packet;
 
-                pktsz = sizeof(*packet);
-
+                pktsz = autofs_v5_packet_size(sbi);
                 packet->wait_queue_token = wq->wait_queue_token;
                 packet->len = wq->name.len;
                 memcpy(packet->name, wq->name.name, wq->name.len);
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index bcb884e2d613..07d096c49920 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -1421,7 +1421,7 @@ static int fill_thread_core_info(struct elf_thread_core_info *t,
         for (i = 1; i < view->n; ++i) {
                 const struct user_regset *regset = &view->regsets[i];
                 do_thread_regset_writeback(t->task, regset);
-                if (regset->core_note_type &&
+                if (regset->core_note_type && regset->get &&
                     (!regset->active || regset->active(t->task, regset))) {
                         int ret;
                         size_t size = regset->n * regset->size;
diff --git a/fs/btrfs/backref.c b/fs/btrfs/backref.c
index 633c701a287d..98f6bf10bbd4 100644
--- a/fs/btrfs/backref.c
+++ b/fs/btrfs/backref.c
@@ -892,6 +892,8 @@ static char *iref_to_path(struct btrfs_root *fs_root, struct btrfs_path *path,
                 if (eb != eb_in)
                         free_extent_buffer(eb);
                 ret = inode_ref_info(parent, 0, fs_root, path, &found_key);
+                if (ret > 0)
+                        ret = -ENOENT;
                 if (ret)
                         break;
                 next_inum = found_key.offset;
diff --git a/fs/btrfs/check-integrity.c b/fs/btrfs/check-integrity.c
index b669a7d8e499..d986824bb2b4 100644
--- a/fs/btrfs/check-integrity.c
+++ b/fs/btrfs/check-integrity.c
@@ -644,7 +644,7 @@ static struct btrfsic_dev_state *btrfsic_dev_state_hashtable_lookup(
 static int btrfsic_process_superblock(struct btrfsic_state *state,
                                       struct btrfs_fs_devices *fs_devices)
 {
-        int ret;
+        int ret = 0;
         struct btrfs_super_block *selected_super;
         struct list_head *dev_head = &fs_devices->devices;
         struct btrfs_device *device;
diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index 14f1c5a0b2d2..d02c27cd14c7 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -588,6 +588,8 @@ int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio,
                                    page_offset(bio->bi_io_vec->bv_page),
                                    PAGE_CACHE_SIZE);
         read_unlock(&em_tree->lock);
+        if (!em)
+                return -EIO;
 
         compressed_len = em->block_len;
         cb = kmalloc(compressed_bio_size(root, compressed_len), GFP_NOFS);
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h
index 27ebe61d3ccc..80b6486fd5e6 100644
--- a/fs/btrfs/ctree.h
+++ b/fs/btrfs/ctree.h
@@ -886,7 +886,7 @@ struct btrfs_block_rsv {
         u64 reserved;
         struct btrfs_space_info *space_info;
         spinlock_t lock;
-        unsigned int full:1;
+        unsigned int full;
 };
 
 /*
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 811d9f918b1c..534266fe505f 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -2260,6 +2260,12 @@ int open_ctree(struct super_block *sb,
                 goto fail_sb_buffer;
         }
 
+        if (sectorsize < PAGE_SIZE) {
+                printk(KERN_WARNING "btrfs: Incompatible sector size "
+                       "found on %s\n", sb->s_id);
+                goto fail_sb_buffer;
+        }
+
         mutex_lock(&fs_info->chunk_mutex);
         ret = btrfs_read_sys_array(tree_root);
         mutex_unlock(&fs_info->chunk_mutex);
@@ -2301,6 +2307,12 @@ int open_ctree(struct super_block *sb,
 
         btrfs_close_extra_devices(fs_devices);
 
+        if (!fs_devices->latest_bdev) {
+                printk(KERN_CRIT "btrfs: failed to read devices on %s\n",
+                       sb->s_id);
+                goto fail_tree_roots;
+        }
+
 retry_root_backup:
         blocksize = btrfs_level_size(tree_root,
                                      btrfs_super_root_level(disk_super));
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 283af7a676a3..37e0a800d34e 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -3312,7 +3312,8 @@ commit_trans:
         }
         data_sinfo->bytes_may_use += bytes;
         trace_btrfs_space_reservation(root->fs_info, "space_info",
-                                      (u64)data_sinfo, bytes, 1);
+                                      (u64)(unsigned long)data_sinfo,
+                                      bytes, 1);
         spin_unlock(&data_sinfo->lock);
 
         return 0;
@@ -3333,7 +3334,8 @@ void btrfs_free_reserved_data_space(struct inode *inode, u64 bytes)
         spin_lock(&data_sinfo->lock);
         data_sinfo->bytes_may_use -= bytes;
         trace_btrfs_space_reservation(root->fs_info, "space_info",
-                                      (u64)data_sinfo, bytes, 0);
+                                      (u64)(unsigned long)data_sinfo,
+                                      bytes, 0);
         spin_unlock(&data_sinfo->lock);
 }
 
@@ -3611,12 +3613,15 @@ static int may_commit_transaction(struct btrfs_root *root,
         if (space_info != delayed_rsv->space_info)
                 return -ENOSPC;
 
+        spin_lock(&space_info->lock);
         spin_lock(&delayed_rsv->lock);
-        if (delayed_rsv->size < bytes) {
+        if (space_info->bytes_pinned + delayed_rsv->size < bytes) {
                 spin_unlock(&delayed_rsv->lock);
+                spin_unlock(&space_info->lock);
                 return -ENOSPC;
         }
         spin_unlock(&delayed_rsv->lock);
+        spin_unlock(&space_info->lock);
 
 commit:
         trans = btrfs_join_transaction(root);
@@ -3695,9 +3700,9 @@ again:
                 if (used + orig_bytes <= space_info->total_bytes) {
                         space_info->bytes_may_use += orig_bytes;
                         trace_btrfs_space_reservation(root->fs_info,
-                                                      "space_info",
-                                                      (u64)space_info,
-                                                      orig_bytes, 1);
+                                              "space_info",
+                                              (u64)(unsigned long)space_info,
+                                              orig_bytes, 1);
                         ret = 0;
                 } else {
                         /*
@@ -3766,9 +3771,9 @@ again:
                 if (used + num_bytes < space_info->total_bytes + avail) {
                         space_info->bytes_may_use += orig_bytes;
                         trace_btrfs_space_reservation(root->fs_info,
-                                                      "space_info",
-                                                      (u64)space_info,
-                                                      orig_bytes, 1);
+                                              "space_info",
+                                              (u64)(unsigned long)space_info,
+                                              orig_bytes, 1);
                         ret = 0;
                 } else {
                         wait_ordered = true;
@@ -3913,8 +3918,8 @@ static void block_rsv_release_bytes(struct btrfs_fs_info *fs_info,
                         spin_lock(&space_info->lock);
                         space_info->bytes_may_use -= num_bytes;
                         trace_btrfs_space_reservation(fs_info, "space_info",
-                                                      (u64)space_info,
-                                                      num_bytes, 0);
+                                              (u64)(unsigned long)space_info,
+                                              num_bytes, 0);
                         space_info->reservation_progress++;
                         spin_unlock(&space_info->lock);
                 }
@@ -4105,7 +4110,7 @@ static u64 calc_global_metadata_size(struct btrfs_fs_info *fs_info)
         num_bytes += div64_u64(data_used + meta_used, 50);
 
         if (num_bytes * 3 > meta_used)
-                num_bytes = div64_u64(meta_used, 3);
+                num_bytes = div64_u64(meta_used, 3) * 2;
 
         return ALIGN(num_bytes, fs_info->extent_root->leafsize << 10);
 }
@@ -4132,14 +4137,14 @@ static void update_global_block_rsv(struct btrfs_fs_info *fs_info)
                 block_rsv->reserved += num_bytes;
                 sinfo->bytes_may_use += num_bytes;
                 trace_btrfs_space_reservation(fs_info, "space_info",
-                                              (u64)sinfo, num_bytes, 1);
+                                      (u64)(unsigned long)sinfo, num_bytes, 1);
         }
 
         if (block_rsv->reserved >= block_rsv->size) {
                 num_bytes = block_rsv->reserved - block_rsv->size;
                 sinfo->bytes_may_use -= num_bytes;
                 trace_btrfs_space_reservation(fs_info, "space_info",
-                                              (u64)sinfo, num_bytes, 0);
+                                      (u64)(unsigned long)sinfo, num_bytes, 0);
                 sinfo->reservation_progress++;
                 block_rsv->reserved = block_rsv->size;
                 block_rsv->full = 1;
@@ -4192,7 +4197,8 @@ void btrfs_trans_release_metadata(struct btrfs_trans_handle *trans,
         if (!trans->bytes_reserved)
                 return;
 
-        trace_btrfs_space_reservation(root->fs_info, "transaction", (u64)trans,
+        trace_btrfs_space_reservation(root->fs_info, "transaction",
+                                      (u64)(unsigned long)trans,
                                       trans->bytes_reserved, 0);
         btrfs_block_rsv_release(root, trans->block_rsv, trans->bytes_reserved);
         trans->bytes_reserved = 0;
@@ -4710,9 +4716,9 @@ static int btrfs_update_reserved_bytes(struct btrfs_block_group_cache *cache,
                         space_info->bytes_reserved += num_bytes;
                         if (reserve == RESERVE_ALLOC) {
                                 trace_btrfs_space_reservation(cache->fs_info,
-                                                              "space_info",
-                                                              (u64)space_info,
-                                                              num_bytes, 0);
+                                              "space_info",
+                                              (u64)(unsigned long)space_info,
+                                              num_bytes, 0);
                                 space_info->bytes_may_use -= num_bytes;
                         }
                 }
@@ -7886,9 +7892,16 @@ int btrfs_trim_fs(struct btrfs_root *root, struct fstrim_range *range)
         u64 start;
         u64 end;
         u64 trimmed = 0;
+        u64 total_bytes = btrfs_super_total_bytes(fs_info->super_copy);
         int ret = 0;
 
-        cache = btrfs_lookup_block_group(fs_info, range->start);
+        /*
+         * try to trim all FS space, our block group may start from non-zero.
+         */
+        if (range->len == total_bytes)
+                cache = btrfs_lookup_first_block_group(fs_info, range->start);
+        else
+                cache = btrfs_lookup_block_group(fs_info, range->start);
 
         while (cache) {
                 if (cache->key.objectid >= (range->start + range->len)) {
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index fcf77e1ded40..a55fbe6252de 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -513,6 +513,15 @@ hit_next:
         WARN_ON(state->end < start);
         last_end = state->end;
 
+        if (state->end < end && !need_resched())
+                next_node = rb_next(&state->rb_node);
+        else
+                next_node = NULL;
+
+        /* the state doesn't have the wanted bits, go ahead */
+        if (!(state->state & bits))
+                goto next;
+
         /*
          *     | ---- desired range ---- |
          *  | state | or
@@ -565,20 +574,15 @@ hit_next:
                 goto out;
         }
 
-        if (state->end < end && prealloc && !need_resched())
-                next_node = rb_next(&state->rb_node);
-        else
-                next_node = NULL;
-
         set |= clear_state_bit(tree, state, &bits, wake);
+next:
         if (last_end == (u64)-1)
                 goto out;
         start = last_end + 1;
         if (start <= end && next_node) {
                 state = rb_entry(next_node, struct extent_state,
                                  rb_node);
-                if (state->start == start)
-                        goto hit_next;
+                goto hit_next;
         }
         goto search_again;
 
@@ -961,8 +965,6 @@ hit_next:
 
                 set_state_bits(tree, state, &bits);
                 clear_state_bit(tree, state, &clear_bits, 0);
-
-                merge_state(tree, state);
                 if (last_end == (u64)-1)
                         goto out;
 
@@ -1007,7 +1009,6 @@ hit_next:
                 if (state->end <= end) {
                         set_state_bits(tree, state, &bits);
                         clear_state_bit(tree, state, &clear_bits, 0);
-                        merge_state(tree, state);
                         if (last_end == (u64)-1)
                                 goto out;
                         start = last_end + 1;
@@ -1068,8 +1069,6 @@ hit_next:
 
                 set_state_bits(tree, prealloc, &bits);
                 clear_state_bit(tree, prealloc, &clear_bits, 0);
-
-                merge_state(tree, prealloc);
                 prealloc = NULL;
                 goto out;
         }
@@ -2154,13 +2153,46 @@ static int bio_readpage_error(struct bio *failed_bio, struct page *page,
                  "this_mirror=%d, num_copies=%d, in_validation=%d\n", read_mode,
                  failrec->this_mirror, num_copies, failrec->in_validation);
 
-        tree->ops->submit_bio_hook(inode, read_mode, bio, failrec->this_mirror,
-                                        failrec->bio_flags, 0);
-        return 0;
+        ret = tree->ops->submit_bio_hook(inode, read_mode, bio,
+                                         failrec->this_mirror,
+                                         failrec->bio_flags, 0);
+        return ret;
 }
 
 /* lots and lots of room for performance fixes in the end_bio funcs */
 
+int end_extent_writepage(struct page *page, int err, u64 start, u64 end)
+{
+        int uptodate = (err == 0);
+        struct extent_io_tree *tree;
+        int ret;
+
+        tree = &BTRFS_I(page->mapping->host)->io_tree;
+
+        if (tree->ops && tree->ops->writepage_end_io_hook) {
+                ret = tree->ops->writepage_end_io_hook(page, start,
+                                               end, NULL, uptodate);
+                if (ret)
+                        uptodate = 0;
+        }
+
+        if (!uptodate && tree->ops &&
+            tree->ops->writepage_io_failed_hook) {
+                ret = tree->ops->writepage_io_failed_hook(NULL, page,
+                                                 start, end, NULL);
+                /* Writeback already completed */
+                if (ret == 0)
+                        return 1;
+        }
+
+        if (!uptodate) {
+                clear_extent_uptodate(tree, start, end, NULL, GFP_NOFS);
+                ClearPageUptodate(page);
+                SetPageError(page);
+        }
+        return 0;
+}
+
 /*
  * after a writepage IO is done, we need to:
  * clear the uptodate bits on error
@@ -2172,13 +2204,11 @@ static int bio_readpage_error(struct bio *failed_bio, struct page *page,
  */
 static void end_bio_extent_writepage(struct bio *bio, int err)
 {
-        int uptodate = err == 0;
         struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1;
         struct extent_io_tree *tree;
         u64 start;
         u64 end;
         int whole_page;
-        int ret;
 
         do {
                 struct page *page = bvec->bv_page;
@@ -2195,28 +2225,9 @@ static void end_bio_extent_writepage(struct bio *bio, int err)
 
                 if (--bvec >= bio->bi_io_vec)
                         prefetchw(&bvec->bv_page->flags);
-                if (tree->ops && tree->ops->writepage_end_io_hook) {
-                        ret = tree->ops->writepage_end_io_hook(page, start,
-                                                       end, NULL, uptodate);
-                        if (ret)
-                                uptodate = 0;
-                }
-
-                if (!uptodate && tree->ops &&
-                    tree->ops->writepage_io_failed_hook) {
-                        ret = tree->ops->writepage_io_failed_hook(bio, page,
-                                                         start, end, NULL);
-                        if (ret == 0) {
-                                uptodate = (err == 0);
-                                continue;
-                        }
-                }
 
-                if (!uptodate) {
-                        clear_extent_uptodate(tree, start, end, NULL, GFP_NOFS);
-                        ClearPageUptodate(page);
-                        SetPageError(page);
-                }
+                if (end_extent_writepage(page, err, start, end))
+                        continue;
 
                 if (whole_page)
                         end_page_writeback(page);
@@ -2779,9 +2790,12 @@ static int __extent_writepage(struct page *page, struct writeback_control *wbc,
                                 delalloc_start = delalloc_end + 1;
                                 continue;
                         }
-                        tree->ops->fill_delalloc(inode, page, delalloc_start,
-                                                 delalloc_end, &page_started,
-                                                 &nr_written);
+                        ret = tree->ops->fill_delalloc(inode, page,
+                                                       delalloc_start,
+                                                       delalloc_end,
+                                                       &page_started,
+                                                       &nr_written);
+                        BUG_ON(ret);
                         /*
                          * delalloc_end is already one less than the total
                          * length, so we don't subtract one from
@@ -2818,8 +2832,12 @@ static int __extent_writepage(struct page *page, struct writeback_control *wbc,
         if (tree->ops && tree->ops->writepage_start_hook) {
                 ret = tree->ops->writepage_start_hook(page, start,
                                                       page_end);
-                if (ret == -EAGAIN) {
-                        redirty_page_for_writepage(wbc, page);
+                if (ret) {
+                        /* Fixup worker will requeue */
+                        if (ret == -EBUSY)
+                                wbc->pages_skipped++;
+                        else
+                                redirty_page_for_writepage(wbc, page);
                         update_nr_written(page, wbc, nr_written);
                         unlock_page(page);
                         ret = 0;
@@ -3289,7 +3307,7 @@ int try_release_extent_mapping(struct extent_map_tree *map,
                         len = end - start + 1;
                         write_lock(&map->lock);
                         em = lookup_extent_mapping(map, start, len);
-                        if (IS_ERR_OR_NULL(em)) {
+                        if (!em) {
                                 write_unlock(&map->lock);
                                 break;
                         }
@@ -3853,10 +3871,9 @@ int clear_extent_buffer_uptodate(struct extent_io_tree *tree,
         num_pages = num_extent_pages(eb->start, eb->len);
         clear_bit(EXTENT_BUFFER_UPTODATE, &eb->bflags);
 
-        if (eb_straddles_pages(eb)) {
-                clear_extent_uptodate(tree, eb->start, eb->start + eb->len - 1,
-                                      cached_state, GFP_NOFS);
-        }
+        clear_extent_uptodate(tree, eb->start, eb->start + eb->len - 1,
+                              cached_state, GFP_NOFS);
+
         for (i = 0; i < num_pages; i++) {
                 page = extent_buffer_page(eb, i);
                 if (page)
diff --git a/fs/btrfs/extent_io.h b/fs/btrfs/extent_io.h
index bc6a042cb6fc..cecc3518c121 100644
--- a/fs/btrfs/extent_io.h
+++ b/fs/btrfs/extent_io.h
@@ -319,4 +319,5 @@ struct btrfs_mapping_tree;
 int repair_io_failure(struct btrfs_mapping_tree *map_tree, u64 start,
                         u64 length, u64 logical, struct page *page,
                         int mirror_num);
+int end_extent_writepage(struct page *page, int err, u64 start, u64 end);
 #endif
diff --git a/fs/btrfs/extent_map.h b/fs/btrfs/extent_map.h
index 33a7890b1f40..1195f09761fe 100644
--- a/fs/btrfs/extent_map.h
+++ b/fs/btrfs/extent_map.h
@@ -26,8 +26,8 @@ struct extent_map {
         unsigned long flags;
         struct block_device *bdev;
         atomic_t refs;
-        unsigned int in_tree:1;
-        unsigned int compress_type:4;
+        unsigned int in_tree;
+        unsigned int compress_type;
 };
 
 struct extent_map_tree {
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index 859ba2dd8890..e8d06b6b9194 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -1605,6 +1605,14 @@ static long btrfs_fallocate(struct file *file, int mode,
                 return -EOPNOTSUPP;
 
         /*
+         * Make sure we have enough space before we do the
+         * allocation.
+         */
+        ret = btrfs_check_data_free_space(inode, len);
+        if (ret)
+                return ret;
+
+        /*
          * wait for ordered IO before we have any locks.  We'll loop again
          * below with the locks held.
          */
@@ -1667,27 +1675,12 @@ static long btrfs_fallocate(struct file *file, int mode,
                 if (em->block_start == EXTENT_MAP_HOLE ||
                     (cur_offset >= inode->i_size &&
                      !test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) {
-
-                        /*
-                         * Make sure we have enough space before we do the
-                         * allocation.
-                         */
-                        ret = btrfs_check_data_free_space(inode, last_byte -
-                                                          cur_offset);
-                        if (ret) {
-                                free_extent_map(em);
-                                break;
-                        }
-
                         ret = btrfs_prealloc_file_range(inode, mode, cur_offset,
                                                         last_byte - cur_offset,
                                                         1 << inode->i_blkbits,
                                                         offset + len,
                                                         &alloc_hint);
 
-                        /* Let go of our reservation. */
-                        btrfs_free_reserved_data_space(inode, last_byte -
-                                                       cur_offset);
                         if (ret < 0) {
                                 free_extent_map(em);
                                 break;
@@ -1715,6 +1708,8 @@ static long btrfs_fallocate(struct file *file, int mode,
                              &cached_state, GFP_NOFS);
 out:
         mutex_unlock(&inode->i_mutex);
+        /* Let go of our reservation. */
+        btrfs_free_reserved_data_space(inode, len);
         return ret;
 }
 
@@ -1761,7 +1756,7 @@ static int find_desired_extent(struct inode *inode, loff_t *offset, int origin)
                                                      start - root->sectorsize,
                                                      root->sectorsize, 0);
                 if (IS_ERR(em)) {
-                        ret = -ENXIO;
+                        ret = PTR_ERR(em);
                         goto out;
                 }
                 last_end = em->start + em->len;
@@ -1773,7 +1768,7 @@ static int find_desired_extent(struct inode *inode, loff_t *offset, int origin)
         while (1) {
                 em = btrfs_get_extent_fiemap(inode, NULL, 0, start, len, 0);
                 if (IS_ERR(em)) {
-                        ret = -ENXIO;
+                        ret = PTR_ERR(em);
                         break;
                 }
 
diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c
index c2f20594c9f7..710ea380c7ed 100644
--- a/fs/btrfs/free-space-cache.c
+++ b/fs/btrfs/free-space-cache.c
@@ -777,6 +777,7 @@ int load_free_space_cache(struct btrfs_fs_info *fs_info,
         spin_lock(&block_group->lock);
         if (block_group->disk_cache_state != BTRFS_DC_WRITTEN) {
                 spin_unlock(&block_group->lock);
+                btrfs_free_path(path);
                 goto out;
         }
         spin_unlock(&block_group->lock);
diff --git a/fs/btrfs/inode-map.c b/fs/btrfs/inode-map.c
index 213ffa86ce1b..ee15d88b33d2 100644
--- a/fs/btrfs/inode-map.c
+++ b/fs/btrfs/inode-map.c
@@ -438,7 +438,8 @@ int btrfs_save_ino_cache(struct btrfs_root *root,
                                           trans->bytes_reserved);
         if (ret)
                 goto out;
-        trace_btrfs_space_reservation(root->fs_info, "ino_cache", (u64)trans,
+        trace_btrfs_space_reservation(root->fs_info, "ino_cache",
+                                      (u64)(unsigned long)trans,
                                       trans->bytes_reserved, 1);
 again:
         inode = lookup_free_ino_inode(root, path);
@@ -500,7 +501,8 @@ again:
 out_put:
         iput(inode);
 out_release:
-        trace_btrfs_space_reservation(root->fs_info, "ino_cache", (u64)trans,
+        trace_btrfs_space_reservation(root->fs_info, "ino_cache",
+                                      (u64)(unsigned long)trans,
                                       trans->bytes_reserved, 0);
         btrfs_block_rsv_release(root, trans->block_rsv, trans->bytes_reserved);
 out:
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 32214fe0f7e3..892b34785ccc 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -1555,6 +1555,7 @@ static void btrfs_writepage_fixup_worker(struct btrfs_work *work)
         struct inode *inode;
         u64 page_start;
         u64 page_end;
+        int ret;
 
         fixup = container_of(work, struct btrfs_writepage_fixup, work);
         page = fixup->page;
@@ -1582,12 +1583,21 @@ again:
                                      page_end, &cached_state, GFP_NOFS);
                 unlock_page(page);
                 btrfs_start_ordered_extent(inode, ordered, 1);
+                btrfs_put_ordered_extent(ordered);
                 goto again;
         }
 
-        BUG();
+        ret = btrfs_delalloc_reserve_space(inode, PAGE_CACHE_SIZE);
+        if (ret) {
+                mapping_set_error(page->mapping, ret);
+                end_extent_writepage(page, ret, page_start, page_end);
+                ClearPageChecked(page);
+                goto out;
+         }
+
         btrfs_set_extent_delalloc(inode, page_start, page_end, &cached_state);
         ClearPageChecked(page);
+        set_page_dirty(page);
 out:
         unlock_extent_cached(&BTRFS_I(inode)->io_tree, page_start, page_end,
                              &cached_state, GFP_NOFS);
@@ -1630,7 +1640,7 @@ static int btrfs_writepage_start_hook(struct page *page, u64 start, u64 end)
         fixup->work.func = btrfs_writepage_fixup_worker;
         fixup->page = page;
         btrfs_queue_worker(&root->fs_info->fixup_workers, &fixup->work);
-        return -EAGAIN;
+        return -EBUSY;
 }
 
 static int insert_reserved_file_extent(struct btrfs_trans_handle *trans,
@@ -4575,7 +4585,8 @@ int btrfs_add_link(struct btrfs_trans_handle *trans,
                 ret = btrfs_insert_dir_item(trans, root, name, name_len,
                                             parent_inode, &key,
                                             btrfs_inode_type(inode), index);
-                BUG_ON(ret);
+                if (ret)
+                        goto fail_dir_item;
 
                 btrfs_i_size_write(parent_inode, parent_inode->i_size +
                                    name_len * 2);
@@ -4583,6 +4594,23 @@ int btrfs_add_link(struct btrfs_trans_handle *trans,
                 ret = btrfs_update_inode(trans, root, parent_inode);
         }
         return ret;
+
+fail_dir_item:
+        if (unlikely(ino == BTRFS_FIRST_FREE_OBJECTID)) {
+                u64 local_index;
+                int err;
+                err = btrfs_del_root_ref(trans, root->fs_info->tree_root,
+                                 key.objectid, root->root_key.objectid,
+                                 parent_ino, &local_index, name, name_len);
+
+        } else if (add_backref) {
+                u64 local_index;
+                int err;
+
+                err = btrfs_del_inode_ref(trans, root, name, name_len,
+                                          ino, parent_ino, &local_index);
+        }
+        return ret;
 }
 
 static int btrfs_add_nondir(struct btrfs_trans_handle *trans,
@@ -6696,8 +6724,10 @@ int btrfs_create_subvol_root(struct btrfs_trans_handle *trans,
         int err;
         u64 index = 0;
 
-        inode = btrfs_new_inode(trans, new_root, NULL, "..", 2, new_dirid,
-                                new_dirid, S_IFDIR | 0700, &index);
+        inode = btrfs_new_inode(trans, new_root, NULL, "..", 2,
+                                new_dirid, new_dirid,
+                                S_IFDIR | (~current_umask() & S_IRWXUGO),
+                                &index);
         if (IS_ERR(inode))
                 return PTR_ERR(inode);
         inode->i_op = &btrfs_dir_inode_operations;
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index 03bb62a9ee24..d8b54715c2de 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -861,6 +861,7 @@ static int cluster_pages_for_defrag(struct inode *inode,
         int i_done;
         struct btrfs_ordered_extent *ordered;
         struct extent_state *cached_state = NULL;
+        struct extent_io_tree *tree;
         gfp_t mask = btrfs_alloc_write_mask(inode->i_mapping);
 
         if (isize == 0)
@@ -871,18 +872,34 @@ static int cluster_pages_for_defrag(struct inode *inode,
                                            num_pages << PAGE_CACHE_SHIFT);
         if (ret)
                 return ret;
-again:
-        ret = 0;
         i_done = 0;
+        tree = &BTRFS_I(inode)->io_tree;
 
         /* step one, lock all the pages */
         for (i = 0; i < num_pages; i++) {
                 struct page *page;
+again:
                 page = find_or_create_page(inode->i_mapping,
-                                            start_index + i, mask);
+                                           start_index + i, mask);
                 if (!page)
                         break;
 
+                page_start = page_offset(page);
+                page_end = page_start + PAGE_CACHE_SIZE - 1;
+                while (1) {
+                        lock_extent(tree, page_start, page_end, GFP_NOFS);
+                        ordered = btrfs_lookup_ordered_extent(inode,
+                                                              page_start);
+                        unlock_extent(tree, page_start, page_end, GFP_NOFS);
+                        if (!ordered)
+                                break;
+
+                        unlock_page(page);
+                        btrfs_start_ordered_extent(inode, ordered, 1);
+                        btrfs_put_ordered_extent(ordered);
+                        lock_page(page);
+                }
+
                 if (!PageUptodate(page)) {
                         btrfs_readpage(NULL, page);
                         lock_page(page);
@@ -893,15 +910,22 @@ again:
                                 break;
                         }
                 }
+
                 isize = i_size_read(inode);
                 file_end = (isize - 1) >> PAGE_CACHE_SHIFT;
-                if (!isize || page->index > file_end ||
-                    page->mapping != inode->i_mapping) {
+                if (!isize || page->index > file_end) {
                         /* whoops, we blew past eof, skip this page */
                         unlock_page(page);
                         page_cache_release(page);
                         break;
                 }
+
+                if (page->mapping != inode->i_mapping) {
+                        unlock_page(page);
+                        page_cache_release(page);
+                        goto again;
+                }
+
                 pages[i] = page;
                 i_done++;
         }
@@ -924,25 +948,6 @@ again:
         lock_extent_bits(&BTRFS_I(inode)->io_tree,
                          page_start, page_end - 1, 0, &cached_state,
                          GFP_NOFS);
-        ordered = btrfs_lookup_first_ordered_extent(inode, page_end - 1);
-        if (ordered &&
-            ordered->file_offset + ordered->len > page_start &&
-            ordered->file_offset < page_end) {
-                btrfs_put_ordered_extent(ordered);
-                unlock_extent_cached(&BTRFS_I(inode)->io_tree,
-                                     page_start, page_end - 1,
-                                     &cached_state, GFP_NOFS);
-                for (i = 0; i < i_done; i++) {
-                        unlock_page(pages[i]);
-                        page_cache_release(pages[i]);
-                }
-                btrfs_wait_ordered_range(inode, page_start,
-                                         page_end - page_start);
-                goto again;
-        }
-        if (ordered)
-                btrfs_put_ordered_extent(ordered);
-
         clear_extent_bit(&BTRFS_I(inode)->io_tree, page_start,
                           page_end - 1, EXTENT_DIRTY | EXTENT_DELALLOC |
                           EXTENT_DO_ACCOUNTING, 0, 0, &cached_state,
@@ -1327,6 +1332,12 @@ static noinline int btrfs_ioctl_snap_create_transid(struct file *file,
                 goto out;
         }
 
+        if (name[0] == '.' &&
+           (namelen == 1 || (name[1] == '.' && namelen == 2))) {
+                ret = -EEXIST;
+                goto out;
+        }
+
         if (subvol) {
                 ret = btrfs_mksubvol(&file->f_path, name, namelen,
                                      NULL, transid, readonly);
diff --git a/fs/btrfs/scrub.c b/fs/btrfs/scrub.c
index 9770cc5bfb76..abc0fbffa510 100644
--- a/fs/btrfs/scrub.c
+++ b/fs/btrfs/scrub.c
@@ -1367,7 +1367,8 @@ out:
 }
 
 static noinline_for_stack int scrub_chunk(struct scrub_dev *sdev,
-        u64 chunk_tree, u64 chunk_objectid, u64 chunk_offset, u64 length)
+        u64 chunk_tree, u64 chunk_objectid, u64 chunk_offset, u64 length,
+        u64 dev_offset)
 {
         struct btrfs_mapping_tree *map_tree =
                 &sdev->dev->dev_root->fs_info->mapping_tree;
@@ -1391,7 +1392,8 @@ static noinline_for_stack int scrub_chunk(struct scrub_dev *sdev,
                 goto out;
 
         for (i = 0; i < map->num_stripes; ++i) {
-                if (map->stripes[i].dev == sdev->dev) {
+                if (map->stripes[i].dev == sdev->dev &&
+                    map->stripes[i].physical == dev_offset) {
                         ret = scrub_stripe(sdev, map, i, chunk_offset, length);
                         if (ret)
                                 goto out;
@@ -1487,7 +1489,7 @@ int scrub_enumerate_chunks(struct scrub_dev *sdev, u64 start, u64 end)
                         break;
                 }
                 ret = scrub_chunk(sdev, chunk_tree, chunk_objectid,
-                                  chunk_offset, length);
+                                  chunk_offset, length, found_key.offset);
                 btrfs_put_block_group(cache);
                 if (ret)
                         break;
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c
index 287a6728b1ad..04b77e3ceb7a 100644
--- a/fs/btrfs/transaction.c
+++ b/fs/btrfs/transaction.c
@@ -327,7 +327,8 @@ again:
 
         if (num_bytes) {
                 trace_btrfs_space_reservation(root->fs_info, "transaction",
-                                              (u64)h, num_bytes, 1);
+                                              (u64)(unsigned long)h,
+                                              num_bytes, 1);
                 h->block_rsv = &root->fs_info->trans_block_rsv;
                 h->bytes_reserved = num_bytes;
         }
@@ -915,7 +916,11 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans,
                                 dentry->d_name.name, dentry->d_name.len,
                                 parent_inode, &key,
                                 BTRFS_FT_DIR, index);
-        BUG_ON(ret);
+        if (ret) {
+                pending->error = -EEXIST;
+                dput(parent);
+                goto fail;
+        }
 
         btrfs_i_size_write(parent_inode, parent_inode->i_size +
                                          dentry->d_name.len * 2);
@@ -993,12 +998,9 @@ static noinline int create_pending_snapshots(struct btrfs_trans_handle *trans,
 {
         struct btrfs_pending_snapshot *pending;
         struct list_head *head = &trans->transaction->pending_snapshots;
-        int ret;
 
-        list_for_each_entry(pending, head, list) {
-                ret = create_pending_snapshot(trans, fs_info, pending);
-                BUG_ON(ret);
-        }
+        list_for_each_entry(pending, head, list)
+                create_pending_snapshot(trans, fs_info, pending);
         return 0;
 }
 
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 0b4e2af7954d..ef41f285a475 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -459,12 +459,23 @@ int btrfs_close_extra_devices(struct btrfs_fs_devices *fs_devices)
 {
         struct btrfs_device *device, *next;
 
+        struct block_device *latest_bdev = NULL;
+        u64 latest_devid = 0;
+        u64 latest_transid = 0;
+
         mutex_lock(&uuid_mutex);
 again:
         /* This is the initialized path, it is safe to release the devices. */
         list_for_each_entry_safe(device, next, &fs_devices->devices, dev_list) {
-                if (device->in_fs_metadata)
+                if (device->in_fs_metadata) {
+                        if (!latest_transid ||
+                            device->generation > latest_transid) {
+                                latest_devid = device->devid;
+                                latest_transid = device->generation;
+                                latest_bdev = device->bdev;
+                        }
                         continue;
+                }
 
                 if (device->bdev) {
                         blkdev_put(device->bdev, device->mode);
@@ -487,6 +498,10 @@ again:
                 goto again;
         }
 
+        fs_devices->latest_bdev = latest_bdev;
+        fs_devices->latest_devid = latest_devid;
+        fs_devices->latest_trans = latest_transid;
+
         mutex_unlock(&uuid_mutex);
         return 0;
 }
@@ -1953,7 +1968,7 @@ static int btrfs_relocate_chunk(struct btrfs_root *root,
         em = lookup_extent_mapping(em_tree, chunk_offset, 1);
         read_unlock(&em_tree->lock);
 
-        BUG_ON(em->start > chunk_offset ||
+        BUG_ON(!em || em->start > chunk_offset ||
                em->start + em->len < chunk_offset);
         map = (struct map_lookup *)em->bdev;
 
@@ -4356,6 +4371,20 @@ int btrfs_read_sys_array(struct btrfs_root *root)
                 return -ENOMEM;
         btrfs_set_buffer_uptodate(sb);
         btrfs_set_buffer_lockdep_class(root->root_key.objectid, sb, 0);
+        /*
+         * The sb extent buffer is artifical and just used to read the system array.
+         * btrfs_set_buffer_uptodate() call does not properly mark all it's
+         * pages up-to-date when the page is larger: extent does not cover the
+         * whole page and consequently check_page_uptodate does not find all
+         * the page's extents up-to-date (the hole beyond sb),
+         * write_extent_buffer then triggers a WARN_ON.
+         *
+         * Regular short extents go through mark_extent_buffer_dirty/writeback cycle,
+         * but sb spans only this function. Add an explicit SetPageUptodate call
+         * to silence the warning eg. on PowerPC 64.
+         */
+        if (PAGE_CACHE_SIZE > BTRFS_SUPER_INFO_SIZE)
+                SetPageUptodate(sb->first_page);
 
         write_extent_buffer(sb, super_copy, 0, BTRFS_SUPER_INFO_SIZE);
         array_size = btrfs_super_sys_array_size(super_copy);
diff --git a/fs/compat.c b/fs/compat.c
index fa9d721ecfee..07880bae28a9 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -131,41 +131,35 @@ asmlinkage long compat_sys_utimes(const char __user *filename, struct compat_tim
 
 static int cp_compat_stat(struct kstat *stat, struct compat_stat __user *ubuf)
 {
-        compat_ino_t ino = stat->ino;
-        typeof(ubuf->st_uid) uid = 0;
-        typeof(ubuf->st_gid) gid = 0;
-        int err;
+        struct compat_stat tmp;
 
-        SET_UID(uid, stat->uid);
-        SET_GID(gid, stat->gid);
+        if (!old_valid_dev(stat->dev) || !old_valid_dev(stat->rdev))
+                return -EOVERFLOW;
 
-        if ((u64) stat->size > MAX_NON_LFS ||
-            !old_valid_dev(stat->dev) ||
-            !old_valid_dev(stat->rdev))
+        memset(&tmp, 0, sizeof(tmp));
+        tmp.st_dev = old_encode_dev(stat->dev);
+        tmp.st_ino = stat->ino;
+        if (sizeof(tmp.st_ino) < sizeof(stat->ino) && tmp.st_ino != stat->ino)
                 return -EOVERFLOW;
-        if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
+        tmp.st_mode = stat->mode;
+        tmp.st_nlink = stat->nlink;
+        if (tmp.st_nlink != stat->nlink)
                 return -EOVERFLOW;
-
-        if (clear_user(ubuf, sizeof(*ubuf)))
-                return -EFAULT;
-
-        err  = __put_user(old_encode_dev(stat->dev), &ubuf->st_dev);
-        err |= __put_user(ino, &ubuf->st_ino);
-        err |= __put_user(stat->mode, &ubuf->st_mode);
-        err |= __put_user(stat->nlink, &ubuf->st_nlink);
-        err |= __put_user(uid, &ubuf->st_uid);
-        err |= __put_user(gid, &ubuf->st_gid);
-        err |= __put_user(old_encode_dev(stat->rdev), &ubuf->st_rdev);
-        err |= __put_user(stat->size, &ubuf->st_size);
-        err |= __put_user(stat->atime.tv_sec, &ubuf->st_atime);
-        err |= __put_user(stat->atime.tv_nsec, &ubuf->st_atime_nsec);
-        err |= __put_user(stat->mtime.tv_sec, &ubuf->st_mtime);
-        err |= __put_user(stat->mtime.tv_nsec, &ubuf->st_mtime_nsec);
-        err |= __put_user(stat->ctime.tv_sec, &ubuf->st_ctime);
-        err |= __put_user(stat->ctime.tv_nsec, &ubuf->st_ctime_nsec);
-        err |= __put_user(stat->blksize, &ubuf->st_blksize);
-        err |= __put_user(stat->blocks, &ubuf->st_blocks);
-        return err;
+        SET_UID(tmp.st_uid, stat->uid);
+        SET_GID(tmp.st_gid, stat->gid);
+        tmp.st_rdev = old_encode_dev(stat->rdev);
+        if ((u64) stat->size > MAX_NON_LFS)
+                return -EOVERFLOW;
+        tmp.st_size = stat->size;
+        tmp.st_atime = stat->atime.tv_sec;
+        tmp.st_atime_nsec = stat->atime.tv_nsec;
+        tmp.st_mtime = stat->mtime.tv_sec;
+        tmp.st_mtime_nsec = stat->mtime.tv_nsec;
+        tmp.st_ctime = stat->ctime.tv_sec;
+        tmp.st_ctime_nsec = stat->ctime.tv_nsec;
+        tmp.st_blocks = stat->blocks;
+        tmp.st_blksize = stat->blksize;
+        return copy_to_user(ubuf, &tmp, sizeof(tmp)) ? -EFAULT : 0;
 }
 
 asmlinkage long compat_sys_newstat(const char __user * filename,
diff --git a/fs/dcache.c b/fs/dcache.c
index 16a53cc2cc02..138be96e25b6 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -104,7 +104,7 @@ static unsigned int d_hash_shift __read_mostly;
 
 static struct hlist_bl_head *dentry_hashtable __read_mostly;
 
-static inline struct hlist_bl_head *d_hash(struct dentry *parent,
+static inline struct hlist_bl_head *d_hash(const struct dentry *parent,
                                         unsigned long hash)
 {
         hash += ((unsigned long) parent ^ GOLDEN_RATIO_PRIME) / L1_CACHE_BYTES;
@@ -1717,8 +1717,9 @@ EXPORT_SYMBOL(d_add_ci);
  * child is looked up. Thus, an interlocking stepping of sequence lock checks
  * is formed, giving integrity down the path walk.
  */
-struct dentry *__d_lookup_rcu(struct dentry *parent, struct qstr *name,
-                                unsigned *seq, struct inode **inode)
+struct dentry *__d_lookup_rcu(const struct dentry *parent,
+                                const struct qstr *name,
+                                unsigned *seqp, struct inode **inode)
 {
         unsigned int len = name->len;
         unsigned int hash = name->hash;
@@ -1748,6 +1749,7 @@ struct dentry *__d_lookup_rcu(struct dentry *parent, struct qstr *name,
          * See Documentation/filesystems/path-lookup.txt for more details.
          */
         hlist_bl_for_each_entry_rcu(dentry, node, b, d_hash) {
+                unsigned seq;
                 struct inode *i;
                 const char *tname;
                 int tlen;
@@ -1756,7 +1758,7 @@ struct dentry *__d_lookup_rcu(struct dentry *parent, struct qstr *name,
                         continue;
 
 seqretry:
-                *seq = read_seqcount_begin(&dentry->d_seq);
+                seq = read_seqcount_begin(&dentry->d_seq);
                 if (dentry->d_parent != parent)
                         continue;
                 if (d_unhashed(dentry))
@@ -1771,7 +1773,7 @@ seqretry:
                  * edge of memory when walking. If we could load this
                  * atomically some other way, we could drop this check.
                  */
-                if (read_seqcount_retry(&dentry->d_seq, *seq))
+                if (read_seqcount_retry(&dentry->d_seq, seq))
                         goto seqretry;
                 if (unlikely(parent->d_flags & DCACHE_OP_COMPARE)) {
                         if (parent->d_op->d_compare(parent, *inode,
@@ -1788,6 +1790,7 @@ seqretry:
                  * order to do anything useful with the returned dentry
                  * anyway.
                  */
+                *seqp = seq;
                 *inode = i;
                 return dentry;
         }
@@ -2968,7 +2971,7 @@ __setup("dhash_entries=", set_dhash_entries);
 
 static void __init dcache_init_early(void)
 {
-        int loop;
+        unsigned int loop;
 
         /* If hashes are distributed across NUMA nodes, defer
          * hash allocation until vmalloc space is available.
@@ -2986,13 +2989,13 @@ static void __init dcache_init_early(void)
                                         &d_hash_mask,
                                         0);
 
-        for (loop = 0; loop < (1 << d_hash_shift); loop++)
+        for (loop = 0; loop < (1U << d_hash_shift); loop++)
                 INIT_HLIST_BL_HEAD(dentry_hashtable + loop);
 }
 
 static void __init dcache_init(void)
 {
-        int loop;
+        unsigned int loop;
 
         /* 
          * A constructor could be added for stable state like the lists,
@@ -3016,7 +3019,7 @@ static void __init dcache_init(void)
                                         &d_hash_mask,
                                         0);
 
-        for (loop = 0; loop < (1 << d_hash_shift); loop++)
+        for (loop = 0; loop < (1U << d_hash_shift); loop++)
                 INIT_HLIST_BL_HEAD(dentry_hashtable + loop);
 }
 
diff --git a/fs/direct-io.c b/fs/direct-io.c
index 4a588dbd11bf..f4aadd15b613 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -173,7 +173,7 @@ void inode_dio_wait(struct inode *inode)
         if (atomic_read(&inode->i_dio_count))
                 __inode_dio_wait(inode);
 }
-EXPORT_SYMBOL_GPL(inode_dio_wait);
+EXPORT_SYMBOL(inode_dio_wait);
 
 /*
  * inode_dio_done - signal finish of a direct I/O requests
@@ -187,7 +187,7 @@ void inode_dio_done(struct inode *inode)
         if (atomic_dec_and_test(&inode->i_dio_count))
                 wake_up_bit(&inode->i_state, __I_DIO_WAKEUP);
 }
-EXPORT_SYMBOL_GPL(inode_dio_done);
+EXPORT_SYMBOL(inode_dio_done);
 
 /*
  * How many pages are in the queue?
diff --git a/fs/ecryptfs/miscdev.c b/fs/ecryptfs/miscdev.c
index 349209dc6a91..3a06f4043df4 100644
--- a/fs/ecryptfs/miscdev.c
+++ b/fs/ecryptfs/miscdev.c
@@ -429,7 +429,7 @@ ecryptfs_miscdev_write(struct file *file, const char __user *buf,
                 goto memdup;
         } else if (count < MIN_MSG_PKT_SIZE || count > MAX_MSG_PKT_SIZE) {
                 printk(KERN_WARNING "%s: Acceptable packet size range is "
-                       "[%d-%lu], but amount of data written is [%zu].",
+                       "[%d-%zu], but amount of data written is [%zu].",
                        __func__, MIN_MSG_PKT_SIZE, MAX_MSG_PKT_SIZE, count);
                 return -EINVAL;
         }
diff --git a/fs/eventpoll.c b/fs/eventpoll.c
index aabdfc38cf24..ea54cdef04dd 100644
--- a/fs/eventpoll.c
+++ b/fs/eventpoll.c
@@ -320,6 +320,11 @@ static inline int ep_is_linked(struct list_head *p)
         return !list_empty(p);
 }
 
+static inline struct eppoll_entry *ep_pwq_from_wait(wait_queue_t *p)
+{
+        return container_of(p, struct eppoll_entry, wait);
+}
+
 /* Get the "struct epitem" from a wait queue pointer */
 static inline struct epitem *ep_item_from_wait(wait_queue_t *p)
 {
@@ -467,6 +472,18 @@ static void ep_poll_safewake(wait_queue_head_t *wq)
         put_cpu();
 }
 
+static void ep_remove_wait_queue(struct eppoll_entry *pwq)
+{
+        wait_queue_head_t *whead;
+
+        rcu_read_lock();
+        /* If it is cleared by POLLFREE, it should be rcu-safe */
+        whead = rcu_dereference(pwq->whead);
+        if (whead)
+                remove_wait_queue(whead, &pwq->wait);
+        rcu_read_unlock();
+}
+
 /*
  * This function unregisters poll callbacks from the associated file
  * descriptor.  Must be called with "mtx" held (or "epmutex" if called from
@@ -481,7 +498,7 @@ static void ep_unregister_pollwait(struct eventpoll *ep, struct epitem *epi)
                 pwq = list_first_entry(lsthead, struct eppoll_entry, llink);
 
                 list_del(&pwq->llink);
-                remove_wait_queue(pwq->whead, &pwq->wait);
+                ep_remove_wait_queue(pwq);
                 kmem_cache_free(pwq_cache, pwq);
         }
 }
@@ -842,6 +859,17 @@ static int ep_poll_callback(wait_queue_t *wait, unsigned mode, int sync, void *k
         struct epitem *epi = ep_item_from_wait(wait);
         struct eventpoll *ep = epi->ep;
 
+        if ((unsigned long)key & POLLFREE) {
+                ep_pwq_from_wait(wait)->whead = NULL;
+                /*
+                 * whead = NULL above can race with ep_remove_wait_queue()
+                 * which can do another remove_wait_queue() after us, so we
+                 * can't use __remove_wait_queue(). whead->lock is held by
+                 * the caller.
+                 */
+                list_del_init(&wait->task_list);
+        }
+
         spin_lock_irqsave(&ep->lock, flags);
 
         /*
diff --git a/fs/gfs2/glock.c b/fs/gfs2/glock.c
index 376816fcd040..351a3e797789 100644
--- a/fs/gfs2/glock.c
+++ b/fs/gfs2/glock.c
@@ -167,14 +167,19 @@ void gfs2_glock_add_to_lru(struct gfs2_glock *gl)
         spin_unlock(&lru_lock);
 }
 
-static void gfs2_glock_remove_from_lru(struct gfs2_glock *gl)
+static void __gfs2_glock_remove_from_lru(struct gfs2_glock *gl)
 {
-        spin_lock(&lru_lock);
         if (!list_empty(&gl->gl_lru)) {
                 list_del_init(&gl->gl_lru);
                 atomic_dec(&lru_count);
                 clear_bit(GLF_LRU, &gl->gl_flags);
         }
+}
+
+static void gfs2_glock_remove_from_lru(struct gfs2_glock *gl)
+{
+        spin_lock(&lru_lock);
+        __gfs2_glock_remove_from_lru(gl);
         spin_unlock(&lru_lock);
 }
 
@@ -217,11 +222,12 @@ void gfs2_glock_put(struct gfs2_glock *gl)
         struct gfs2_sbd *sdp = gl->gl_sbd;
         struct address_space *mapping = gfs2_glock2aspace(gl);
 
-        if (atomic_dec_and_test(&gl->gl_ref)) {
+        if (atomic_dec_and_lock(&gl->gl_ref, &lru_lock)) {
+                __gfs2_glock_remove_from_lru(gl);
+                spin_unlock(&lru_lock);
                 spin_lock_bucket(gl->gl_hash);
                 hlist_bl_del_rcu(&gl->gl_list);
                 spin_unlock_bucket(gl->gl_hash);
-                gfs2_glock_remove_from_lru(gl);
                 GLOCK_BUG_ON(gl, !list_empty(&gl->gl_holders));
                 GLOCK_BUG_ON(gl, mapping && mapping->nrpages);
                 trace_gfs2_glock_put(gl);
diff --git a/fs/gfs2/inode.c b/fs/gfs2/inode.c
index a7d611b93f0f..56987460cdae 100644
--- a/fs/gfs2/inode.c
+++ b/fs/gfs2/inode.c
@@ -391,10 +391,6 @@ static int alloc_dinode(struct gfs2_inode *dip, u64 *no_addr, u64 *generation)
         int error;
         int dblocks = 1;
 
-        error = gfs2_rindex_update(sdp);
-        if (error)
-                fs_warn(sdp, "rindex update returns %d\n", error);
-
         error = gfs2_inplace_reserve(dip, RES_DINODE);
         if (error)
                 goto out;
@@ -1043,6 +1039,7 @@ static int gfs2_unlink(struct inode *dir, struct dentry *dentry)
         rgd = gfs2_blk2rgrpd(sdp, ip->i_no_addr);
         if (!rgd)
                 goto out_inodes;
+
         gfs2_holder_init(rgd->rd_gl, LM_ST_EXCLUSIVE, 0, ghs + 2);
 
 
diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
index 6aacf3f230a2..24f609c9ef91 100644
--- a/fs/gfs2/ops_fstype.c
+++ b/fs/gfs2/ops_fstype.c
@@ -800,6 +800,11 @@ static int init_inodes(struct gfs2_sbd *sdp, int undo)
                 fs_err(sdp, "can't get quota file inode: %d\n", error);
                 goto fail_rindex;
         }
+
+        error = gfs2_rindex_update(sdp);
+        if (error)
+                goto fail_qinode;
+
         return 0;
 
 fail_qinode:
diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c
index 981bfa32121a..49ada95209d0 100644
--- a/fs/gfs2/rgrp.c
+++ b/fs/gfs2/rgrp.c
@@ -683,16 +683,21 @@ int gfs2_rindex_update(struct gfs2_sbd *sdp)
         struct gfs2_glock *gl = ip->i_gl;
         struct gfs2_holder ri_gh;
         int error = 0;
+        int unlock_required = 0;
 
         /* Read new copy from disk if we don't have the latest */
         if (!sdp->sd_rindex_uptodate) {
                 mutex_lock(&sdp->sd_rindex_mutex);
-                error = gfs2_glock_nq_init(gl, LM_ST_SHARED, 0, &ri_gh);
-                if (error)
-                        return error;
+                if (!gfs2_glock_is_locked_by_me(gl)) {
+                        error = gfs2_glock_nq_init(gl, LM_ST_SHARED, 0, &ri_gh);
+                        if (error)
+                                return error;
+                        unlock_required = 1;
+                }
                 if (!sdp->sd_rindex_uptodate)
                         error = gfs2_ri_update(ip);
-                gfs2_glock_dq_uninit(&ri_gh);
+                if (unlock_required)
+                        gfs2_glock_dq_uninit(&ri_gh);
                 mutex_unlock(&sdp->sd_rindex_mutex);
         }
 
diff --git a/fs/inode.c b/fs/inode.c
index fb10d86ffad7..d3ebdbe723d0 100644
--- a/fs/inode.c
+++ b/fs/inode.c
@@ -1651,7 +1651,7 @@ __setup("ihash_entries=", set_ihash_entries);
  */
 void __init inode_init_early(void)
 {
-        int loop;
+        unsigned int loop;
 
         /* If hashes are distributed across NUMA nodes, defer
          * hash allocation until vmalloc space is available.
@@ -1669,13 +1669,13 @@ void __init inode_init_early(void)
                                         &i_hash_mask,
                                         0);
 
-        for (loop = 0; loop < (1 << i_hash_shift); loop++)
+        for (loop = 0; loop < (1U << i_hash_shift); loop++)
                 INIT_HLIST_HEAD(&inode_hashtable[loop]);
 }
 
 void __init inode_init(void)
 {
-        int loop;
+        unsigned int loop;
 
         /* inode slab cache */
         inode_cachep = kmem_cache_create("inode_cache",
@@ -1699,7 +1699,7 @@ void __init inode_init(void)
                                         &i_hash_mask,
                                         0);
 
-        for (loop = 0; loop < (1 << i_hash_shift); loop++)
+        for (loop = 0; loop < (1U << i_hash_shift); loop++)
                 INIT_HLIST_HEAD(&inode_hashtable[loop]);
 }
 
diff --git a/fs/namei.c b/fs/namei.c
index 208c6aa4a989..e2ba62820a0f 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1095,8 +1095,10 @@ static struct dentry *d_inode_lookup(struct dentry *parent, struct dentry *dentr
         struct dentry *old;
 
         /* Don't create child dentry for a dead directory. */
-        if (unlikely(IS_DEADDIR(inode)))
+        if (unlikely(IS_DEADDIR(inode))) {
+                dput(dentry);
                 return ERR_PTR(-ENOENT);
+        }
 
         old = inode->i_op->lookup(inode, dentry, nd);
         if (unlikely(old)) {
@@ -1372,6 +1374,34 @@ static inline int can_lookup(struct inode *inode)
         return 1;
 }
 
+unsigned int full_name_hash(const unsigned char *name, unsigned int len)
+{
+        unsigned long hash = init_name_hash();
+        while (len--)
+                hash = partial_name_hash(*name++, hash);
+        return end_name_hash(hash);
+}
+EXPORT_SYMBOL(full_name_hash);
+
+/*
+ * We know there's a real path component here of at least
+ * one character.
+ */
+static inline unsigned long hash_name(const char *name, unsigned int *hashp)
+{
+        unsigned long hash = init_name_hash();
+        unsigned long len = 0, c;
+
+        c = (unsigned char)*name;
+        do {
+                len++;
+                hash = partial_name_hash(c, hash);
+                c = (unsigned char)name[len];
+        } while (c && c != '/');
+        *hashp = end_name_hash(hash);
+        return len;
+}
+
 /*
  * Name resolution.
  * This is the basic name resolution function, turning a pathname into
@@ -1392,31 +1422,22 @@ static int link_path_walk(const char *name, struct nameidata *nd)
 
         /* At this point we know we have a real path component. */
         for(;;) {
-                unsigned long hash;
                 struct qstr this;
-                unsigned int c;
+                long len;
                 int type;
 
                 err = may_lookup(nd);
                 if (err)
                         break;
 
+                len = hash_name(name, &this.hash);
                 this.name = name;
-                c = *(const unsigned char *)name;
-
-                hash = init_name_hash();
-                do {
-                        name++;
-                        hash = partial_name_hash(c, hash);
-                        c = *(const unsigned char *)name;
-                } while (c && (c != '/'));
-                this.len = name - (const char *) this.name;
-                this.hash = end_name_hash(hash);
+                this.len = len;
 
                 type = LAST_NORM;
-                if (this.name[0] == '.') switch (this.len) {
+                if (name[0] == '.') switch (len) {
                         case 2:
-                                if (this.name[1] == '.') {
+                                if (name[1] == '.') {
                                         type = LAST_DOTDOT;
                                         nd->flags |= LOOKUP_JUMPED;
                                 }
@@ -1435,12 +1456,18 @@ static int link_path_walk(const char *name, struct nameidata *nd)
                         }
                 }
 
-                /* remove trailing slashes? */
-                if (!c)
+                if (!name[len])
                         goto last_component;
-                while (*++name == '/');
-                if (!*name)
+                /*
+                 * If it wasn't NUL, we know it was '/'. Skip that
+                 * slash, and continue until no more slashes.
+                 */
+                do {
+                        len++;
+                } while (unlikely(name[len] == '/'));
+                if (!name[len])
                         goto last_component;
+                name += len;
 
                 err = walk_component(nd, &next, &this, type, LOOKUP_FOLLOW);
                 if (err < 0)
@@ -1773,24 +1800,21 @@ static struct dentry *lookup_hash(struct nameidata *nd)
 struct dentry *lookup_one_len(const char *name, struct dentry *base, int len)
 {
         struct qstr this;
-        unsigned long hash;
         unsigned int c;
 
         WARN_ON_ONCE(!mutex_is_locked(&base->d_inode->i_mutex));
 
         this.name = name;
         this.len = len;
+        this.hash = full_name_hash(name, len);
         if (!len)
                 return ERR_PTR(-EACCES);
 
-        hash = init_name_hash();
         while (len--) {
                 c = *(const unsigned char *)name++;
                 if (c == '/' || c == '\0')
                         return ERR_PTR(-EACCES);
-                hash = partial_name_hash(c, hash);
         }
-        this.hash = end_name_hash(hash);
         /*
          * See if the low-level filesystem might want
          * to use its own hash..
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index f0c849c98fe4..ec9f6ef6c5dd 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -3575,8 +3575,8 @@ static ssize_t __nfs4_get_acl_uncached(struct inode *inode, void *buf, size_t bu
         }
         if (npages > 1) {
                 /* for decoding across pages */
-                args.acl_scratch = alloc_page(GFP_KERNEL);
-                if (!args.acl_scratch)
+                res.acl_scratch = alloc_page(GFP_KERNEL);
+                if (!res.acl_scratch)
                         goto out_free;
         }
         args.acl_len = npages * PAGE_SIZE;
@@ -3612,8 +3612,8 @@ out_free:
         for (i = 0; i < npages; i++)
                 if (pages[i])
                         __free_page(pages[i]);
-        if (args.acl_scratch)
-                __free_page(args.acl_scratch);
+        if (res.acl_scratch)
+                __free_page(res.acl_scratch);
         return ret;
 }
 
@@ -4883,8 +4883,10 @@ int nfs4_proc_exchange_id(struct nfs_client *clp, struct rpc_cred *cred)
                                 clp->cl_rpcclient->cl_auth->au_flavor);
 
         res.server_scope = kzalloc(sizeof(struct server_scope), GFP_KERNEL);
-        if (unlikely(!res.server_scope))
-                return -ENOMEM;
+        if (unlikely(!res.server_scope)) {
+                status = -ENOMEM;
+                goto out;
+        }
 
         status = rpc_call_sync(clp->cl_rpcclient, &msg, RPC_TASK_TIMEOUT);
         if (!status)
@@ -4901,12 +4903,13 @@ int nfs4_proc_exchange_id(struct nfs_client *clp, struct rpc_cred *cred)
                         clp->server_scope = NULL;
                 }
 
-                if (!clp->server_scope)
+                if (!clp->server_scope) {
                         clp->server_scope = res.server_scope;
-                else
-                        kfree(res.server_scope);
+                        goto out;
+                }
         }
-
+        kfree(res.server_scope);
+out:
         dprintk("<-- %s status= %d\n", __func__, status);
         return status;
 }
@@ -5008,37 +5011,53 @@ int nfs4_proc_get_lease_time(struct nfs_client *clp, struct nfs_fsinfo *fsinfo)
         return status;
 }
 
+static struct nfs4_slot *nfs4_alloc_slots(u32 max_slots, gfp_t gfp_flags)
+{
+        return kcalloc(max_slots, sizeof(struct nfs4_slot), gfp_flags);
+}
+
+static void nfs4_add_and_init_slots(struct nfs4_slot_table *tbl,
+                struct nfs4_slot *new,
+                u32 max_slots,
+                u32 ivalue)
+{
+        struct nfs4_slot *old = NULL;
+        u32 i;
+
+        spin_lock(&tbl->slot_tbl_lock);
+        if (new) {
+                old = tbl->slots;
+                tbl->slots = new;
+                tbl->max_slots = max_slots;
+        }
+        tbl->highest_used_slotid = -1;  /* no slot is currently used */
+        for (i = 0; i < tbl->max_slots; i++)
+                tbl->slots[i].seq_nr = ivalue;
+        spin_unlock(&tbl->slot_tbl_lock);
+        kfree(old);
+}
+
 /*
- * Reset a slot table
+ * (re)Initialise a slot table
  */
-static int nfs4_reset_slot_table(struct nfs4_slot_table *tbl, u32 max_reqs,
-                                 int ivalue)
+static int nfs4_realloc_slot_table(struct nfs4_slot_table *tbl, u32 max_reqs,
+                                 u32 ivalue)
 {
         struct nfs4_slot *new = NULL;
-        int i;
-        int ret = 0;
+        int ret = -ENOMEM;
 
         dprintk("--> %s: max_reqs=%u, tbl->max_slots %d\n", __func__,
                 max_reqs, tbl->max_slots);
 
         /* Does the newly negotiated max_reqs match the existing slot table? */
         if (max_reqs != tbl->max_slots) {
-                ret = -ENOMEM;
-                new = kmalloc(max_reqs * sizeof(struct nfs4_slot),
-                              GFP_NOFS);
+                new = nfs4_alloc_slots(max_reqs, GFP_NOFS);
                 if (!new)
                         goto out;
-                ret = 0;
-                kfree(tbl->slots);
         }
-        spin_lock(&tbl->slot_tbl_lock);
-        if (new) {
-                tbl->slots = new;
-                tbl->max_slots = max_reqs;
-        }
-        for (i = 0; i < tbl->max_slots; ++i)
-                tbl->slots[i].seq_nr = ivalue;
-        spin_unlock(&tbl->slot_tbl_lock);
+        ret = 0;
+
+        nfs4_add_and_init_slots(tbl, new, max_reqs, ivalue);
         dprintk("%s: tbl=%p slots=%p max_slots=%d\n", __func__,
                 tbl, tbl->slots, tbl->max_slots);
 out:
@@ -5061,36 +5080,6 @@ static void nfs4_destroy_slot_tables(struct nfs4_session *session)
 }
 
 /*
- * Initialize slot table
- */
-static int nfs4_init_slot_table(struct nfs4_slot_table *tbl,
-                int max_slots, int ivalue)
-{
-        struct nfs4_slot *slot;
-        int ret = -ENOMEM;
-
-        BUG_ON(max_slots > NFS4_MAX_SLOT_TABLE);
-
-        dprintk("--> %s: max_reqs=%u\n", __func__, max_slots);
-
-        slot = kcalloc(max_slots, sizeof(struct nfs4_slot), GFP_NOFS);
-        if (!slot)
-                goto out;
-        ret = 0;
-
-        spin_lock(&tbl->slot_tbl_lock);
-        tbl->max_slots = max_slots;
-        tbl->slots = slot;
-        tbl->highest_used_slotid = -1;  /* no slot is currently used */
-        spin_unlock(&tbl->slot_tbl_lock);
-        dprintk("%s: tbl=%p slots=%p max_slots=%d\n", __func__,
-                tbl, tbl->slots, tbl->max_slots);
-out:
-        dprintk("<-- %s: return %d\n", __func__, ret);
-        return ret;
-}
-
-/*
  * Initialize or reset the forechannel and backchannel tables
  */
 static int nfs4_setup_session_slot_tables(struct nfs4_session *ses)
@@ -5101,25 +5090,16 @@ static int nfs4_setup_session_slot_tables(struct nfs4_session *ses)
         dprintk("--> %s\n", __func__);
         /* Fore channel */
         tbl = &ses->fc_slot_table;
-        if (tbl->slots == NULL) {
-                status = nfs4_init_slot_table(tbl, ses->fc_attrs.max_reqs, 1);
-                if (status) /* -ENOMEM */
-                        return status;
-        } else {
-                status = nfs4_reset_slot_table(tbl, ses->fc_attrs.max_reqs, 1);
-                if (status)
-                        return status;
-        }
+        status = nfs4_realloc_slot_table(tbl, ses->fc_attrs.max_reqs, 1);
+        if (status) /* -ENOMEM */
+                return status;
         /* Back channel */
         tbl = &ses->bc_slot_table;
-        if (tbl->slots == NULL) {
-                status = nfs4_init_slot_table(tbl, ses->bc_attrs.max_reqs, 0);
-                if (status)
-                        /* Fore and back channel share a connection so get
-                         * both slot tables or neither */
-                        nfs4_destroy_slot_tables(ses);
-        } else
-                status = nfs4_reset_slot_table(tbl, ses->bc_attrs.max_reqs, 0);
+        status = nfs4_realloc_slot_table(tbl, ses->bc_attrs.max_reqs, 0);
+        if (status && tbl->slots == NULL)
+                /* Fore and back channel share a connection so get
+                 * both slot tables or neither */
+                nfs4_destroy_slot_tables(ses);
         return status;
 }
 
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index a53f33b4ac3a..45392032e7bd 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -1132,6 +1132,8 @@ void nfs4_schedule_stateid_recovery(const struct nfs_server *server, struct nfs4
 {
         struct nfs_client *clp = server->nfs_client;
 
+        if (test_and_clear_bit(NFS_DELEGATED_STATE, &state->flags))
+                nfs_async_inode_return_delegation(state->inode, &state->stateid);
         nfs4_state_mark_reclaim_nograce(clp, state);
         nfs4_schedule_state_manager(clp);
 }
diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c
index 95e92e438407..33bd8d0f745d 100644
--- a/fs/nfs/nfs4xdr.c
+++ b/fs/nfs/nfs4xdr.c
@@ -2522,7 +2522,6 @@ static void nfs4_xdr_enc_getacl(struct rpc_rqst *req, struct xdr_stream *xdr,
 
         xdr_inline_pages(&req->rq_rcv_buf, replen << 2,
                 args->acl_pages, args->acl_pgbase, args->acl_len);
-        xdr_set_scratch_buffer(xdr, page_address(args->acl_scratch), PAGE_SIZE);
 
         encode_nops(&hdr);
 }
@@ -6032,6 +6031,10 @@ nfs4_xdr_dec_getacl(struct rpc_rqst *rqstp, struct xdr_stream *xdr,
         struct compound_hdr hdr;
         int status;
 
+        if (res->acl_scratch != NULL) {
+                void *p = page_address(res->acl_scratch);
+                xdr_set_scratch_buffer(xdr, p, PAGE_SIZE);
+        }
         status = decode_compound_hdr(xdr, &hdr);
         if (status)
                 goto out;
diff --git a/fs/ntfs/attrib.c b/fs/ntfs/attrib.c
index f14fde2b03d6..e0281992ddc3 100644
--- a/fs/ntfs/attrib.c
+++ b/fs/ntfs/attrib.c
@@ -1,7 +1,7 @@
 /**
  * attrib.c - NTFS attribute operations.  Part of the Linux-NTFS project.
  *
- * Copyright (c) 2001-2007 Anton Altaparmakov
+ * Copyright (c) 2001-2012 Anton Altaparmakov and Tuxera Inc.
  * Copyright (c) 2002 Richard Russon
  *
  * This program/include file is free software; you can redistribute it and/or
@@ -345,10 +345,10 @@ LCN ntfs_attr_vcn_to_lcn_nolock(ntfs_inode *ni, const VCN vcn,
         unsigned long flags;
         bool is_retry = false;
 
+        BUG_ON(!ni);
         ntfs_debug("Entering for i_ino 0x%lx, vcn 0x%llx, %s_locked.",
                         ni->mft_no, (unsigned long long)vcn,
                         write_locked ? "write" : "read");
-        BUG_ON(!ni);
         BUG_ON(!NInoNonResident(ni));
         BUG_ON(vcn < 0);
         if (!ni->runlist.rl) {
@@ -469,9 +469,9 @@ runlist_element *ntfs_attr_find_vcn_nolock(ntfs_inode *ni, const VCN vcn,
         int err = 0;
         bool is_retry = false;
 
+        BUG_ON(!ni);
         ntfs_debug("Entering for i_ino 0x%lx, vcn 0x%llx, with%s ctx.",
                         ni->mft_no, (unsigned long long)vcn, ctx ? "" : "out");
-        BUG_ON(!ni);
         BUG_ON(!NInoNonResident(ni));
         BUG_ON(vcn < 0);
         if (!ni->runlist.rl) {
diff --git a/fs/ntfs/mft.c b/fs/ntfs/mft.c
index 382857f9c7db..3014a36a255b 100644
--- a/fs/ntfs/mft.c
+++ b/fs/ntfs/mft.c
@@ -1,7 +1,7 @@
 /**
  * mft.c - NTFS kernel mft record operations. Part of the Linux-NTFS project.
  *
- * Copyright (c) 2001-2011 Anton Altaparmakov and Tuxera Inc.
+ * Copyright (c) 2001-2012 Anton Altaparmakov and Tuxera Inc.
  * Copyright (c) 2002 Richard Russon
  *
  * This program/include file is free software; you can redistribute it and/or
@@ -1367,7 +1367,7 @@ static int ntfs_mft_bitmap_extend_allocation_nolock(ntfs_volume *vol)
                         ntfs_error(vol->sb, "Failed to merge runlists for mft "
                                         "bitmap.");
                         if (ntfs_cluster_free_from_rl(vol, rl2)) {
-                                ntfs_error(vol->sb, "Failed to dealocate "
+                                ntfs_error(vol->sb, "Failed to deallocate "
                                                 "allocated cluster.%s", es);
                                 NVolSetErrors(vol);
                         }
@@ -1805,7 +1805,7 @@ static int ntfs_mft_data_extend_allocation_nolock(ntfs_volume *vol)
                 ntfs_error(vol->sb, "Failed to merge runlists for mft data "
                                 "attribute.");
                 if (ntfs_cluster_free_from_rl(vol, rl2)) {
-                        ntfs_error(vol->sb, "Failed to dealocate clusters "
+                        ntfs_error(vol->sb, "Failed to deallocate clusters "
                                         "from the mft data attribute.%s", es);
                         NVolSetErrors(vol);
                 }
diff --git a/fs/ntfs/super.c b/fs/ntfs/super.c
index 5a4a8af5c406..f907611cca73 100644
--- a/fs/ntfs/super.c
+++ b/fs/ntfs/super.c
@@ -1,7 +1,7 @@
 /*
  * super.c - NTFS kernel super block handling. Part of the Linux-NTFS project.
  *
- * Copyright (c) 2001-2011 Anton Altaparmakov and Tuxera Inc.
+ * Copyright (c) 2001-2012 Anton Altaparmakov and Tuxera Inc.
  * Copyright (c) 2001,2002 Richard Russon
  *
  * This program/include file is free software; you can redistribute it and/or
@@ -1239,7 +1239,6 @@ static int check_windows_hibernation_status(ntfs_volume *vol)
 {
         MFT_REF mref;
         struct inode *vi;
-        ntfs_inode *ni;
         struct page *page;
         u32 *kaddr, *kend;
         ntfs_name *name = NULL;
@@ -1290,7 +1289,6 @@ static int check_windows_hibernation_status(ntfs_volume *vol)
                                 "is not the system volume.", i_size_read(vi));
                 goto iput_out;
         }
-        ni = NTFS_I(vi);
         page = ntfs_map_page(vi->i_mapping, 0);
         if (IS_ERR(page)) {
                 ntfs_error(vol->sb, "Failed to read from hiberfil.sys.");
diff --git a/fs/ocfs2/namei.c b/fs/ocfs2/namei.c
index be244692550d..a9856e3eaaf0 100644
--- a/fs/ocfs2/namei.c
+++ b/fs/ocfs2/namei.c
@@ -1053,7 +1053,7 @@ static int ocfs2_rename(struct inode *old_dir,
         handle_t *handle = NULL;
         struct buffer_head *old_dir_bh = NULL;
         struct buffer_head *new_dir_bh = NULL;
-        nlink_t old_dir_nlink = old_dir->i_nlink;
+        u32 old_dir_nlink = old_dir->i_nlink;
         struct ocfs2_dinode *old_di;
         struct ocfs2_dir_lookup_result old_inode_dot_dot_res = { NULL, };
         struct ocfs2_dir_lookup_result target_lookup_res = { NULL, };
diff --git a/fs/quota/quota.c b/fs/quota/quota.c
index 7898cd688a00..fc2c4388d126 100644
--- a/fs/quota/quota.c
+++ b/fs/quota/quota.c
@@ -292,11 +292,26 @@ static int do_quotactl(struct super_block *sb, int type, int cmd, qid_t id,
         }
 }
 
+/* Return 1 if 'cmd' will block on frozen filesystem */
+static int quotactl_cmd_write(int cmd)
+{
+        switch (cmd) {
+        case Q_GETFMT:
+        case Q_GETINFO:
+        case Q_SYNC:
+        case Q_XGETQSTAT:
+        case Q_XGETQUOTA:
+        case Q_XQUOTASYNC:
+                return 0;
+        }
+        return 1;
+}
+
 /*
  * look up a superblock on which quota ops will be performed
  * - use the name of a block device to find the superblock thereon
  */
-static struct super_block *quotactl_block(const char __user *special)
+static struct super_block *quotactl_block(const char __user *special, int cmd)
 {
 #ifdef CONFIG_BLOCK
         struct block_device *bdev;
@@ -309,7 +324,10 @@ static struct super_block *quotactl_block(const char __user *special)
         putname(tmp);
         if (IS_ERR(bdev))
                 return ERR_CAST(bdev);
-        sb = get_super(bdev);
+        if (quotactl_cmd_write(cmd))
+                sb = get_super_thawed(bdev);
+        else
+                sb = get_super(bdev);
         bdput(bdev);
         if (!sb)
                 return ERR_PTR(-ENODEV);
@@ -361,7 +379,7 @@ SYSCALL_DEFINE4(quotactl, unsigned int, cmd, const char __user *, special,
                         pathp = &path;
         }
 
-        sb = quotactl_block(special);
+        sb = quotactl_block(special, cmds);
         if (IS_ERR(sb)) {
                 ret = PTR_ERR(sb);
                 goto out;
diff --git a/fs/select.c b/fs/select.c
index d33418fdc858..e782258d0de3 100644
--- a/fs/select.c
+++ b/fs/select.c
@@ -912,7 +912,7 @@ static long do_restart_poll(struct restart_block *restart_block)
 }
 
 SYSCALL_DEFINE3(poll, struct pollfd __user *, ufds, unsigned int, nfds,
-                long, timeout_msecs)
+                int, timeout_msecs)
 {
         struct timespec end_time, *to = NULL;
         int ret;
diff --git a/fs/signalfd.c b/fs/signalfd.c
index 492465b451dd..7ae2a574cb25 100644
--- a/fs/signalfd.c
+++ b/fs/signalfd.c
@@ -30,6 +30,21 @@
 #include <linux/signalfd.h>
 #include <linux/syscalls.h>
 
+void signalfd_cleanup(struct sighand_struct *sighand)
+{
+        wait_queue_head_t *wqh = &sighand->signalfd_wqh;
+        /*
+         * The lockless check can race with remove_wait_queue() in progress,
+         * but in this case its caller should run under rcu_read_lock() and
+         * sighand_cachep is SLAB_DESTROY_BY_RCU, we can safely return.
+         */
+        if (likely(!waitqueue_active(wqh)))
+                return;
+
+        /* wait_queue_t->func(POLLFREE) should do remove_wait_queue() */
+        wake_up_poll(wqh, POLLHUP | POLLFREE);
+}
+
 struct signalfd_ctx {
         sigset_t sigmask;
 };
diff --git a/fs/super.c b/fs/super.c
index 6015c02296b7..6277ec6cb60a 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -634,6 +634,28 @@ rescan:
 EXPORT_SYMBOL(get_super);
 
 /**
+ *      get_super_thawed - get thawed superblock of a device
+ *      @bdev: device to get the superblock for
+ *
+ *      Scans the superblock list and finds the superblock of the file system
+ *      mounted on the device. The superblock is returned once it is thawed
+ *      (or immediately if it was not frozen). %NULL is returned if no match
+ *      is found.
+ */
+struct super_block *get_super_thawed(struct block_device *bdev)
+{
+        while (1) {
+                struct super_block *s = get_super(bdev);
+                if (!s || s->s_frozen == SB_UNFROZEN)
+                        return s;
+                up_read(&s->s_umount);
+                vfs_check_frozen(s, SB_FREEZE_WRITE);
+                put_super(s);
+        }
+}
+EXPORT_SYMBOL(get_super_thawed);
+
+/**
  * get_active_super - get an active reference to the superblock of a device
  * @bdev: device to get the superblock for
  *
diff --git a/fs/xfs/xfs_dquot.c b/fs/xfs/xfs_dquot.c
index cbcb7bea38e2..53db20ee3e77 100644
--- a/fs/xfs/xfs_dquot.c
+++ b/fs/xfs/xfs_dquot.c
@@ -139,10 +139,10 @@ xfs_qm_adjust_dqtimers(
 
         if (!d->d_btimer) {
                 if ((d->d_blk_softlimit &&
-                     (be64_to_cpu(d->d_bcount) >=
+                     (be64_to_cpu(d->d_bcount) >
                       be64_to_cpu(d->d_blk_softlimit))) ||
                     (d->d_blk_hardlimit &&
-                     (be64_to_cpu(d->d_bcount) >=
+                     (be64_to_cpu(d->d_bcount) >
                       be64_to_cpu(d->d_blk_hardlimit)))) {
                         d->d_btimer = cpu_to_be32(get_seconds() +
                                         mp->m_quotainfo->qi_btimelimit);
@@ -151,10 +151,10 @@ xfs_qm_adjust_dqtimers(
                 }
         } else {
                 if ((!d->d_blk_softlimit ||
-                     (be64_to_cpu(d->d_bcount) <
+                     (be64_to_cpu(d->d_bcount) <=
                       be64_to_cpu(d->d_blk_softlimit))) &&
                     (!d->d_blk_hardlimit ||
-                    (be64_to_cpu(d->d_bcount) <
+                    (be64_to_cpu(d->d_bcount) <=
                      be64_to_cpu(d->d_blk_hardlimit)))) {
                         d->d_btimer = 0;
                 }
@@ -162,10 +162,10 @@ xfs_qm_adjust_dqtimers(
 
         if (!d->d_itimer) {
                 if ((d->d_ino_softlimit &&
-                     (be64_to_cpu(d->d_icount) >=
+                     (be64_to_cpu(d->d_icount) >
                       be64_to_cpu(d->d_ino_softlimit))) ||
                     (d->d_ino_hardlimit &&
-                     (be64_to_cpu(d->d_icount) >=
+                     (be64_to_cpu(d->d_icount) >
                       be64_to_cpu(d->d_ino_hardlimit)))) {
                         d->d_itimer = cpu_to_be32(get_seconds() +
                                         mp->m_quotainfo->qi_itimelimit);
@@ -174,10 +174,10 @@ xfs_qm_adjust_dqtimers(
                 }
         } else {
                 if ((!d->d_ino_softlimit ||
-                     (be64_to_cpu(d->d_icount) <
+                     (be64_to_cpu(d->d_icount) <=
                       be64_to_cpu(d->d_ino_softlimit)))  &&
                     (!d->d_ino_hardlimit ||
-                     (be64_to_cpu(d->d_icount) <
+                     (be64_to_cpu(d->d_icount) <=
                       be64_to_cpu(d->d_ino_hardlimit)))) {
                         d->d_itimer = 0;
                 }
@@ -185,10 +185,10 @@ xfs_qm_adjust_dqtimers(
 
         if (!d->d_rtbtimer) {
                 if ((d->d_rtb_softlimit &&
-                     (be64_to_cpu(d->d_rtbcount) >=
+                     (be64_to_cpu(d->d_rtbcount) >
                       be64_to_cpu(d->d_rtb_softlimit))) ||
                     (d->d_rtb_hardlimit &&
-                     (be64_to_cpu(d->d_rtbcount) >=
+                     (be64_to_cpu(d->d_rtbcount) >
                       be64_to_cpu(d->d_rtb_hardlimit)))) {
                         d->d_rtbtimer = cpu_to_be32(get_seconds() +
                                         mp->m_quotainfo->qi_rtbtimelimit);
@@ -197,10 +197,10 @@ xfs_qm_adjust_dqtimers(
                 }
         } else {
                 if ((!d->d_rtb_softlimit ||
-                     (be64_to_cpu(d->d_rtbcount) <
+                     (be64_to_cpu(d->d_rtbcount) <=
                       be64_to_cpu(d->d_rtb_softlimit))) &&
                     (!d->d_rtb_hardlimit ||
-                     (be64_to_cpu(d->d_rtbcount) <
+                     (be64_to_cpu(d->d_rtbcount) <=
                       be64_to_cpu(d->d_rtb_hardlimit)))) {
                         d->d_rtbtimer = 0;
                 }
diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c
index 15ff5392fb65..0ed9ee77937c 100644
--- a/fs/xfs/xfs_log_recover.c
+++ b/fs/xfs/xfs_log_recover.c
@@ -1981,7 +1981,7 @@ xfs_qm_dqcheck(
 
         if (!errs && ddq->d_id) {
                 if (ddq->d_blk_softlimit &&
-                    be64_to_cpu(ddq->d_bcount) >=
+                    be64_to_cpu(ddq->d_bcount) >
                                 be64_to_cpu(ddq->d_blk_softlimit)) {
                         if (!ddq->d_btimer) {
                                 if (flags & XFS_QMOPT_DOWARN)
@@ -1992,7 +1992,7 @@ xfs_qm_dqcheck(
                         }
                 }
                 if (ddq->d_ino_softlimit &&
-                    be64_to_cpu(ddq->d_icount) >=
+                    be64_to_cpu(ddq->d_icount) >
                                 be64_to_cpu(ddq->d_ino_softlimit)) {
                         if (!ddq->d_itimer) {
                                 if (flags & XFS_QMOPT_DOWARN)
@@ -2003,7 +2003,7 @@ xfs_qm_dqcheck(
                         }
                 }
                 if (ddq->d_rtb_softlimit &&
-                    be64_to_cpu(ddq->d_rtbcount) >=
+                    be64_to_cpu(ddq->d_rtbcount) >
                                 be64_to_cpu(ddq->d_rtb_softlimit)) {
                         if (!ddq->d_rtbtimer) {
                                 if (flags & XFS_QMOPT_DOWARN)
diff --git a/fs/xfs/xfs_qm_syscalls.c b/fs/xfs/xfs_qm_syscalls.c
index eafbcff81f3a..711a86e39ff0 100644
--- a/fs/xfs/xfs_qm_syscalls.c
+++ b/fs/xfs/xfs_qm_syscalls.c
@@ -813,11 +813,11 @@ xfs_qm_export_dquot(
              (XFS_IS_OQUOTA_ENFORCED(mp) &&
                         (dst->d_flags & (FS_PROJ_QUOTA | FS_GROUP_QUOTA)))) &&
             dst->d_id != 0) {
-                if (((int) dst->d_bcount >= (int) dst->d_blk_softlimit) &&
+                if (((int) dst->d_bcount > (int) dst->d_blk_softlimit) &&
                     (dst->d_blk_softlimit > 0)) {
                         ASSERT(dst->d_btimer != 0);
                 }
-                if (((int) dst->d_icount >= (int) dst->d_ino_softlimit) &&
+                if (((int) dst->d_icount > (int) dst->d_ino_softlimit) &&
                     (dst->d_ino_softlimit > 0)) {
                         ASSERT(dst->d_itimer != 0);
                 }
diff --git a/fs/xfs/xfs_trans.c b/fs/xfs/xfs_trans.c
index 329b06aba1c2..7adcdf15ae0c 100644
--- a/fs/xfs/xfs_trans.c
+++ b/fs/xfs/xfs_trans.c
@@ -1151,8 +1151,8 @@ xfs_trans_add_item(
 {
         struct xfs_log_item_desc *lidp;
 
-        ASSERT(lip->li_mountp = tp->t_mountp);
-        ASSERT(lip->li_ailp = tp->t_mountp->m_ail);
+        ASSERT(lip->li_mountp == tp->t_mountp);
+        ASSERT(lip->li_ailp == tp->t_mountp->m_ail);
 
         lidp = kmem_zone_zalloc(xfs_log_item_desc_zone, KM_SLEEP | KM_NOFS);
 
diff --git a/fs/xfs/xfs_trans_dquot.c b/fs/xfs/xfs_trans_dquot.c
index 4d00ee67792d..c4ba366d24e6 100644
--- a/fs/xfs/xfs_trans_dquot.c
+++ b/fs/xfs/xfs_trans_dquot.c
@@ -649,12 +649,12 @@ xfs_trans_dqresv(
                          * nblks.
                          */
                         if (hardlimit > 0ULL &&
-                            hardlimit <= nblks + *resbcountp) {
+                            hardlimit < nblks + *resbcountp) {
                                 xfs_quota_warn(mp, dqp, QUOTA_NL_BHARDWARN);
                                 goto error_return;
                         }
                         if (softlimit > 0ULL &&
-                            softlimit <= nblks + *resbcountp) {
+                            softlimit < nblks + *resbcountp) {
                                 if ((timer != 0 && get_seconds() > timer) ||
                                     (warns != 0 && warns >= warnlimit)) {
                                         xfs_quota_warn(mp, dqp,
@@ -677,11 +677,13 @@ xfs_trans_dqresv(
                         if (!softlimit)
                                 softlimit = q->qi_isoftlimit;
 
-                        if (hardlimit > 0ULL && count >= hardlimit) {
+                        if (hardlimit > 0ULL &&
+                            hardlimit < ninos + count) {
                                 xfs_quota_warn(mp, dqp, QUOTA_NL_IHARDWARN);
                                 goto error_return;
                         }
-                        if (softlimit > 0ULL && count >= softlimit) {
+                        if (softlimit > 0ULL &&
+                            softlimit < ninos + count) {
                                 if  ((timer != 0 && get_seconds() > timer) ||
                                      (warns != 0 && warns >= warnlimit)) {
                                         xfs_quota_warn(mp, dqp,
diff --git a/include/asm-generic/io-64-nonatomic-hi-lo.h b/include/asm-generic/io-64-nonatomic-hi-lo.h
new file mode 100644
index 000000000000..a6806a94250d
--- /dev/null
+++ b/include/asm-generic/io-64-nonatomic-hi-lo.h
@@ -0,0 +1,28 @@
+#ifndef _ASM_IO_64_NONATOMIC_HI_LO_H_
+#define _ASM_IO_64_NONATOMIC_HI_LO_H_
+
+#include <linux/io.h>
+#include <asm-generic/int-ll64.h>
+
+#ifndef readq
+static inline __u64 readq(const volatile void __iomem *addr)
+{
+        const volatile u32 __iomem *p = addr;
+        u32 low, high;
+
+        high = readl(p + 1);
+        low = readl(p);
+
+        return low + ((u64)high << 32);
+}
+#endif
+
+#ifndef writeq
+static inline void writeq(__u64 val, volatile void __iomem *addr)
+{
+        writel(val >> 32, addr + 4);
+        writel(val, addr);
+}
+#endif
+
+#endif  /* _ASM_IO_64_NONATOMIC_HI_LO_H_ */
diff --git a/include/asm-generic/io-64-nonatomic-lo-hi.h b/include/asm-generic/io-64-nonatomic-lo-hi.h
new file mode 100644
index 000000000000..ca546b1ff8b5
--- /dev/null
+++ b/include/asm-generic/io-64-nonatomic-lo-hi.h
@@ -0,0 +1,28 @@
+#ifndef _ASM_IO_64_NONATOMIC_LO_HI_H_
+#define _ASM_IO_64_NONATOMIC_LO_HI_H_
+
+#include <linux/io.h>
+#include <asm-generic/int-ll64.h>
+
+#ifndef readq
+static inline __u64 readq(const volatile void __iomem *addr)
+{
+        const volatile u32 __iomem *p = addr;
+        u32 low, high;
+
+        low = readl(p);
+        high = readl(p + 1);
+
+        return low + ((u64)high << 32);
+}
+#endif
+
+#ifndef writeq
+static inline void writeq(__u64 val, volatile void __iomem *addr)
+{
+        writel(val, addr);
+        writel(val >> 32, addr + 4);
+}
+#endif
+
+#endif  /* _ASM_IO_64_NONATOMIC_LO_HI_H_ */
diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h
index 8a3d4fde2604..6afd7d6a9899 100644
--- a/include/asm-generic/iomap.h
+++ b/include/asm-generic/iomap.h
@@ -70,7 +70,7 @@ extern void ioport_unmap(void __iomem *);
 /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
 struct pci_dev;
 extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
-#else
+#elif defined(CONFIG_GENERIC_IOMAP)
 struct pci_dev;
 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 { }
diff --git a/include/asm-generic/pci_iomap.h b/include/asm-generic/pci_iomap.h
index e58fcf891370..ce37349860fe 100644
--- a/include/asm-generic/pci_iomap.h
+++ b/include/asm-generic/pci_iomap.h
@@ -25,7 +25,7 @@ extern void __iomem *__pci_ioport_map(struct pci_dev *dev, unsigned long port,
 #define __pci_ioport_map(dev, port, nr) ioport_map((port), (nr))
 #endif
 
-#else
+#elif defined(CONFIG_GENERIC_PCI_IOMAP)
 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
 {
         return NULL;
diff --git a/include/asm-generic/poll.h b/include/asm-generic/poll.h
index 44bce836d350..9ce7f44aebd2 100644
--- a/include/asm-generic/poll.h
+++ b/include/asm-generic/poll.h
@@ -28,6 +28,8 @@
 #define POLLRDHUP       0x2000
 #endif
 
+#define POLLFREE        0x4000  /* currently only for epoll */
+
 struct pollfd {
         int fd;
         short events;
diff --git a/include/drm/Kbuild b/include/drm/Kbuild
index a5c0e10fd47d..1e38a19d68f6 100644
--- a/include/drm/Kbuild
+++ b/include/drm/Kbuild
@@ -2,6 +2,7 @@ header-y += drm.h
 header-y += drm_fourcc.h
 header-y += drm_mode.h
 header-y += drm_sarea.h
+header-y += exynos_drm.h
 header-y += i810_drm.h
 header-y += i915_drm.h
 header-y += mga_drm.h
diff --git a/include/drm/exynos_drm.h b/include/drm/exynos_drm.h
index 5e120f1c5cd9..1ed3aae893a5 100644
--- a/include/drm/exynos_drm.h
+++ b/include/drm/exynos_drm.h
@@ -97,15 +97,30 @@ struct drm_exynos_plane_set_zpos {
 #define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
                 DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
 
+#ifdef __KERNEL__
+
 /**
- * Platform Specific Structure for DRM based FIMD.
+ * A structure for lcd panel information.
  *
  * @timing: default video mode for initializing
+ * @width_mm: physical size of lcd width.
+ * @height_mm: physical size of lcd height.
+ */
+struct exynos_drm_panel_info {
+        struct fb_videomode timing;
+        u32 width_mm;
+        u32 height_mm;
+};
+
+/**
+ * Platform Specific Structure for DRM based FIMD.
+ *
+ * @panel: default panel info for initializing
  * @default_win: default window layer number to be used for UI.
  * @bpp: default bit per pixel.
  */
 struct exynos_drm_fimd_pdata {
-        struct fb_videomode             timing;
+        struct exynos_drm_panel_info panel;
         u32                             vidcon0;
         u32                             vidcon1;
         unsigned int                    default_win;
@@ -139,4 +154,5 @@ struct exynos_drm_hdmi_pdata {
         unsigned int                    bpp;
 };
 
-#endif
+#endif  /* __KERNEL__ */
+#endif  /* _EXYNOS_DRM_H_ */
diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h
index 724c69c40bb8..a9fab831caf8 100644
--- a/include/linux/amba/bus.h
+++ b/include/linux/amba/bus.h
@@ -60,6 +60,9 @@ extern struct bus_type amba_bustype;
 
 int amba_driver_register(struct amba_driver *);
 void amba_driver_unregister(struct amba_driver *);
+struct amba_device *amba_device_alloc(const char *, resource_size_t, size_t);
+void amba_device_put(struct amba_device *);
+int amba_device_add(struct amba_device *, struct resource *);
 int amba_device_register(struct amba_device *, struct resource *);
 void amba_device_unregister(struct amba_device *);
 struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int);
@@ -89,4 +92,37 @@ void amba_release_regions(struct amba_device *);
 #define amba_manf(d)    AMBA_MANF_BITS((d)->periphid)
 #define amba_part(d)    AMBA_PART_BITS((d)->periphid)
 
+#define __AMBA_DEV(busid, data, mask)                           \
+        {                                                       \
+                .coherent_dma_mask = mask,                      \
+                .init_name = busid,                             \
+                .platform_data = data,                          \
+        }
+
+/*
+ * APB devices do not themselves have the ability to address memory,
+ * so DMA masks should be zero (much like USB peripheral devices.)
+ * The DMA controller DMA masks should be used instead (much like
+ * USB host controllers in conventional PCs.)
+ */
+#define AMBA_APB_DEVICE(name, busid, id, base, irqs, data)      \
+struct amba_device name##_device = {                            \
+        .dev = __AMBA_DEV(busid, data, 0),                      \
+        .res = DEFINE_RES_MEM(base, SZ_4K),                     \
+        .irq = irqs,                                            \
+        .periphid = id,                                         \
+}
+
+/*
+ * AHB devices are DMA capable, so set their DMA masks
+ */
+#define AMBA_AHB_DEVICE(name, busid, id, base, irqs, data)      \
+struct amba_device name##_device = {                            \
+        .dev = __AMBA_DEV(busid, data, ~0ULL),                  \
+        .res = DEFINE_RES_MEM(base, SZ_4K),                     \
+        .dma_mask = ~0ULL,                                      \
+        .irq = irqs,                                            \
+        .periphid = id,                                         \
+}
+
 #endif
diff --git a/include/linux/atmel_tc.h b/include/linux/atmel_tc.h
index 53ba65e30caa..1d14b1dc1aee 100644
--- a/include/linux/atmel_tc.h
+++ b/include/linux/atmel_tc.h
@@ -34,10 +34,19 @@
 struct clk;
 
 /**
+ * struct atmel_tcb_config - SoC data for a Timer/Counter Block
+ * @counter_width: size in bits of a timer counter register
+ */
+struct atmel_tcb_config {
+        size_t  counter_width;
+};
+
+/**
  * struct atmel_tc - information about a Timer/Counter Block
  * @pdev: physical device
  * @iomem: resource associated with the I/O register
  * @regs: mapping through which the I/O registers can be accessed
+ * @tcb_config: configuration data from SoC
  * @irq: irq for each of the three channels
  * @clk: internal clock source for each of the three channels
  * @node: list node, for tclib internal use
@@ -54,6 +63,7 @@ struct atmel_tc {
         struct platform_device  *pdev;
         struct resource         *iomem;
         void __iomem            *regs;
+        struct atmel_tcb_config *tcb_config;
         int                     irq[3];
         struct clk              *clk[3];
         struct list_head        node;
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 41c9f6515f46..7e05fcee75a1 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -561,5 +561,9 @@ asmlinkage ssize_t compat_sys_process_vm_writev(compat_pid_t pid,
                 unsigned long liovcnt, const struct compat_iovec __user *rvec,
                 unsigned long riovcnt, unsigned long flags);
 
+#else
+
+#define is_compat_task() (0)
+
 #endif /* CONFIG_COMPAT */
 #endif /* _LINUX_COMPAT_H */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index d64a55b23afd..4270bedd2308 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -54,18 +54,17 @@ extern struct dentry_stat_t dentry_stat;
 static inline int dentry_cmp(const unsigned char *cs, size_t scount,
                                 const unsigned char *ct, size_t tcount)
 {
-        int ret;
         if (scount != tcount)
                 return 1;
+
         do {
-                ret = (*cs != *ct);
-                if (ret)
-                        break;
+                if (*cs != *ct)
+                        return 1;
                 cs++;
                 ct++;
                 tcount--;
         } while (tcount);
-        return ret;
+        return 0;
 }
 
 /* Name hashing routines. Initial hash value */
@@ -89,14 +88,7 @@ static inline unsigned long end_name_hash(unsigned long hash)
 }
 
 /* Compute the hash for a name string. */
-static inline unsigned int
-full_name_hash(const unsigned char *name, unsigned int len)
-{
-        unsigned long hash = init_name_hash();
-        while (len--)
-                hash = partial_name_hash(*name++, hash);
-        return end_name_hash(hash);
-}
+extern unsigned int full_name_hash(const unsigned char *, unsigned int);
 
 /*
  * Try to keep struct dentry aligned on 64 byte cachelines (this will
@@ -309,7 +301,8 @@ extern struct dentry *d_ancestor(struct dentry *, struct dentry *);
 extern struct dentry *d_lookup(struct dentry *, struct qstr *);
 extern struct dentry *d_hash_and_lookup(struct dentry *, struct qstr *);
 extern struct dentry *__d_lookup(struct dentry *, struct qstr *);
-extern struct dentry *__d_lookup_rcu(struct dentry *parent, struct qstr *name,
+extern struct dentry *__d_lookup_rcu(const struct dentry *parent,
+                                const struct qstr *name,
                                 unsigned *seq, struct inode **inode);
 
 /**
diff --git a/include/linux/digsig.h b/include/linux/digsig.h
index b01558b15814..6f85a070bb45 100644
--- a/include/linux/digsig.h
+++ b/include/linux/digsig.h
@@ -30,7 +30,7 @@ enum digest_algo {
 
 struct pubkey_hdr {
         uint8_t         version;        /* key format version */
-        time_t          timestamp;      /* key made, always 0 for now */
+        uint32_t        timestamp;      /* key made, always 0 for now */
         uint8_t         algo;
         uint8_t         nmpi;
         char            mpi[0];
@@ -38,7 +38,7 @@ struct pubkey_hdr {
 
 struct signature_hdr {
         uint8_t         version;        /* signature format version */
-        time_t          timestamp;      /* signature made */
+        uint32_t        timestamp;      /* signature made */
         uint8_t         algo;
         uint8_t         hash;
         uint8_t         keyid[8];
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 386da09f229d..69cd5bb640f5 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -2496,6 +2496,7 @@ extern void get_filesystem(struct file_system_type *fs);
 extern void put_filesystem(struct file_system_type *fs);
 extern struct file_system_type *get_fs_type(const char *name);
 extern struct super_block *get_super(struct block_device *);
+extern struct super_block *get_super_thawed(struct block_device *);
 extern struct super_block *get_active_super(struct block_device *bdev);
 extern void drop_super(struct super_block *sb);
 extern void iterate_supers(void (*)(struct super_block *, void *), void *);
diff --git a/include/linux/if_link.h b/include/linux/if_link.h
index c52d4b5f872a..4b24ff453aee 100644
--- a/include/linux/if_link.h
+++ b/include/linux/if_link.h
@@ -137,6 +137,7 @@ enum {
         IFLA_AF_SPEC,
         IFLA_GROUP,             /* Group the device belongs to */
         IFLA_NET_NS_FD,
+        IFLA_EXT_MASK,          /* Extended info mask, VFs, etc */
         __IFLA_MAX
 };
 
diff --git a/include/linux/netfilter_bridge/ebtables.h b/include/linux/netfilter_bridge/ebtables.h
index 8797ed16feb2..4dd5bd6994a8 100644
--- a/include/linux/netfilter_bridge/ebtables.h
+++ b/include/linux/netfilter_bridge/ebtables.h
@@ -285,8 +285,8 @@ struct ebt_table {
         struct module *me;
 };
 
-#define EBT_ALIGN(s) (((s) + (__alignof__(struct ebt_replace)-1)) & \
-                     ~(__alignof__(struct ebt_replace)-1))
+#define EBT_ALIGN(s) (((s) + (__alignof__(struct _xt_align)-1)) & \
+                     ~(__alignof__(struct _xt_align)-1))
 extern struct ebt_table *ebt_register_table(struct net *net,
                                             const struct ebt_table *table);
 extern void ebt_unregister_table(struct net *net, struct ebt_table *table);
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index a764cef06b73..d6ba9a12591e 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -614,7 +614,6 @@ struct nfs_getaclargs {
         size_t                          acl_len;
         unsigned int                    acl_pgbase;
         struct page **                  acl_pages;
-        struct page *                   acl_scratch;
         struct nfs4_sequence_args       seq_args;
 };
 
@@ -624,6 +623,7 @@ struct nfs_getaclres {
         size_t                          acl_len;
         size_t                          acl_data_offset;
         int                             acl_flags;
+        struct page *                   acl_scratch;
         struct nfs4_sequence_res        seq_res;
 };
 
diff --git a/include/linux/regset.h b/include/linux/regset.h
index 8abee6556223..686f37327a49 100644
--- a/include/linux/regset.h
+++ b/include/linux/regset.h
@@ -335,8 +335,11 @@ static inline int copy_regset_to_user(struct task_struct *target,
 {
         const struct user_regset *regset = &view->regsets[setno];
 
+        if (!regset->get)
+                return -EOPNOTSUPP;
+
         if (!access_ok(VERIFY_WRITE, data, size))
-                return -EIO;
+                return -EFAULT;
 
         return regset->get(target, regset, offset, size, NULL, data);
 }
@@ -358,8 +361,11 @@ static inline int copy_regset_from_user(struct task_struct *target,
 {
         const struct user_regset *regset = &view->regsets[setno];
 
+        if (!regset->set)
+                return -EOPNOTSUPP;
+
         if (!access_ok(VERIFY_READ, data, size))
-                return -EIO;
+                return -EFAULT;
 
         return regset->set(target, regset, offset, size, NULL, data);
 }
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index 8e872ead88b5..577592ea0ea0 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -602,6 +602,9 @@ struct tcamsg {
 #define TCA_ACT_TAB 1 /* attr type must be >=1 */       
 #define TCAA_MAX 1
 
+/* New extended info filters for IFLA_EXT_MASK */
+#define RTEXT_FILTER_VF         (1 << 0)
+
 /* End of information exported to user level */
 
 #ifdef __KERNEL__
diff --git a/include/linux/signalfd.h b/include/linux/signalfd.h
index 3ff4961da9b5..247399b2979a 100644
--- a/include/linux/signalfd.h
+++ b/include/linux/signalfd.h
@@ -61,13 +61,16 @@ static inline void signalfd_notify(struct task_struct *tsk, int sig)
                 wake_up(&tsk->sighand->signalfd_wqh);
 }
 
+extern void signalfd_cleanup(struct sighand_struct *sighand);
+
 #else /* CONFIG_SIGNALFD */
 
 static inline void signalfd_notify(struct task_struct *tsk, int sig) { }
 
+static inline void signalfd_cleanup(struct sighand_struct *sighand) { }
+
 #endif /* CONFIG_SIGNALFD */
 
 #endif /* __KERNEL__ */
 
 #endif /* _LINUX_SIGNALFD_H */
-
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 50db9b04a552..ae86adee3746 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -1465,6 +1465,16 @@ static inline void skb_set_mac_header(struct sk_buff *skb, const int offset)
 }
 #endif /* NET_SKBUFF_DATA_USES_OFFSET */
 
+static inline void skb_mac_header_rebuild(struct sk_buff *skb)
+{
+        if (skb_mac_header_was_set(skb)) {
+                const unsigned char *old_mac = skb_mac_header(skb);
+
+                skb_set_mac_header(skb, -skb->mac_len);
+                memmove(skb_mac_header(skb), old_mac, skb->mac_len);
+        }
+}
+
 static inline int skb_checksum_start_offset(const struct sk_buff *skb)
 {
         return skb->csum_start - skb_headroom(skb);
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 515669fa3c1d..8ec1153ff57b 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -624,7 +624,7 @@ asmlinkage long sys_socketpair(int, int, int, int __user *);
 asmlinkage long sys_socketcall(int call, unsigned long __user *args);
 asmlinkage long sys_listen(int, int);
 asmlinkage long sys_poll(struct pollfd __user *ufds, unsigned int nfds,
-                                long timeout);
+                                int timeout);
 asmlinkage long sys_select(int n, fd_set __user *inp, fd_set __user *outp,
                         fd_set __user *exp, struct timeval __user *tvp);
 asmlinkage long sys_old_select(struct sel_arg_struct __user *arg);
diff --git a/include/linux/usb/ch11.h b/include/linux/usb/ch11.h
index 31fdb4c6ee3d..0b83acd3360a 100644
--- a/include/linux/usb/ch11.h
+++ b/include/linux/usb/ch11.h
@@ -61,12 +61,6 @@
 #define USB_PORT_FEAT_TEST              21
 #define USB_PORT_FEAT_INDICATOR         22
 #define USB_PORT_FEAT_C_PORT_L1         23
-#define USB_PORT_FEAT_C_PORT_LINK_STATE 25
-#define USB_PORT_FEAT_C_PORT_CONFIG_ERROR 26
-#define USB_PORT_FEAT_PORT_REMOTE_WAKE_MASK 27
-#define USB_PORT_FEAT_BH_PORT_RESET     28
-#define USB_PORT_FEAT_C_BH_PORT_RESET   29
-#define USB_PORT_FEAT_FORCE_LINKPM_ACCEPT 30
 
 /*
  * Port feature selectors added by USB 3.0 spec.
@@ -75,8 +69,8 @@
 #define USB_PORT_FEAT_LINK_STATE                5
 #define USB_PORT_FEAT_U1_TIMEOUT                23
 #define USB_PORT_FEAT_U2_TIMEOUT                24
-#define USB_PORT_FEAT_C_LINK_STATE              25
-#define USB_PORT_FEAT_C_CONFIG_ERR              26
+#define USB_PORT_FEAT_C_PORT_LINK_STATE         25
+#define USB_PORT_FEAT_C_PORT_CONFIG_ERROR       26
 #define USB_PORT_FEAT_REMOTE_WAKE_MASK          27
 #define USB_PORT_FEAT_BH_PORT_RESET             28
 #define USB_PORT_FEAT_C_BH_PORT_RESET           29
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index abaad6ed9b83..4a82ca0bb0b2 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -256,4 +256,6 @@ void l2cap_exit(void);
 int sco_init(void);
 void sco_exit(void);
 
+void bt_sock_reclassify_lock(struct sock *sk, int proto);
+
 #endif /* __BLUETOOTH_H */
diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index ea9231f4935f..453893b3120e 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -540,7 +540,7 @@ void hci_conn_put_device(struct hci_conn *conn);
 static inline void hci_conn_hold(struct hci_conn *conn)
 {
         atomic_inc(&conn->refcnt);
-        cancel_delayed_work_sync(&conn->disc_work);
+        cancel_delayed_work(&conn->disc_work);
 }
 
 static inline void hci_conn_put(struct hci_conn *conn)
@@ -559,9 +559,9 @@ static inline void hci_conn_put(struct hci_conn *conn)
                 } else {
                         timeo = msecs_to_jiffies(10);
                 }
-                cancel_delayed_work_sync(&conn->disc_work);
+                cancel_delayed_work(&conn->disc_work);
                 queue_delayed_work(conn->hdev->workqueue,
-                                        &conn->disc_work, jiffies + timeo);
+                                        &conn->disc_work, timeo);
         }
 }
 
diff --git a/include/net/bluetooth/l2cap.h b/include/net/bluetooth/l2cap.h
index 68f589150692..b1664ed884e6 100644
--- a/include/net/bluetooth/l2cap.h
+++ b/include/net/bluetooth/l2cap.h
@@ -611,7 +611,7 @@ static inline void l2cap_set_timer(struct l2cap_chan *chan,
 {
         BT_DBG("chan %p state %d timeout %ld", chan, chan->state, timeout);
 
-        if (!__cancel_delayed_work(work))
+        if (!cancel_delayed_work(work))
                 l2cap_chan_hold(chan);
         schedule_delayed_work(work, timeout);
 }
@@ -619,20 +619,20 @@ static inline void l2cap_set_timer(struct l2cap_chan *chan,
 static inline void l2cap_clear_timer(struct l2cap_chan *chan,
                                         struct delayed_work *work)
 {
-        if (__cancel_delayed_work(work))
+        if (cancel_delayed_work(work))
                 l2cap_chan_put(chan);
 }
 
 #define __set_chan_timer(c, t) l2cap_set_timer(c, &c->chan_timer, (t))
 #define __clear_chan_timer(c) l2cap_clear_timer(c, &c->chan_timer)
 #define __set_retrans_timer(c) l2cap_set_timer(c, &c->retrans_timer, \
-                L2CAP_DEFAULT_RETRANS_TO);
+                msecs_to_jiffies(L2CAP_DEFAULT_RETRANS_TO));
 #define __clear_retrans_timer(c) l2cap_clear_timer(c, &c->retrans_timer)
 #define __set_monitor_timer(c) l2cap_set_timer(c, &c->monitor_timer, \
-                L2CAP_DEFAULT_MONITOR_TO);
+                msecs_to_jiffies(L2CAP_DEFAULT_MONITOR_TO));
 #define __clear_monitor_timer(c) l2cap_clear_timer(c, &c->monitor_timer)
 #define __set_ack_timer(c) l2cap_set_timer(c, &chan->ack_timer, \
-                L2CAP_DEFAULT_ACK_TO);
+                msecs_to_jiffies(L2CAP_DEFAULT_ACK_TO));
 #define __clear_ack_timer(c) l2cap_clear_timer(c, &c->ack_timer)
 
 static inline int __seq_offset(struct l2cap_chan *chan, __u16 seq1, __u16 seq2)
@@ -834,7 +834,7 @@ int l2cap_add_scid(struct l2cap_chan *chan,  __u16 scid);
 struct l2cap_chan *l2cap_chan_create(struct sock *sk);
 void l2cap_chan_close(struct l2cap_chan *chan, int reason);
 void l2cap_chan_destroy(struct l2cap_chan *chan);
-inline int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid,
+int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid,
                                                                 bdaddr_t *dst);
 int l2cap_chan_send(struct l2cap_chan *chan, struct msghdr *msg, size_t len,
                                                                 u32 priority);
diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h
index 8a2b0ae7dbd2..ab86036bbf0c 100644
--- a/include/net/netfilter/nf_conntrack.h
+++ b/include/net/netfilter/nf_conntrack.h
@@ -209,7 +209,7 @@ extern struct nf_conntrack_tuple_hash *
 __nf_conntrack_find(struct net *net, u16 zone,
                     const struct nf_conntrack_tuple *tuple);
 
-extern void nf_conntrack_hash_insert(struct nf_conn *ct);
+extern int nf_conntrack_hash_check_insert(struct nf_conn *ct);
 extern void nf_ct_delete_from_lists(struct nf_conn *ct);
 extern void nf_ct_insert_dying_list(struct nf_conn *ct);
 
diff --git a/include/net/rtnetlink.h b/include/net/rtnetlink.h
index 678f1ffaf843..370293901971 100644
--- a/include/net/rtnetlink.h
+++ b/include/net/rtnetlink.h
@@ -6,7 +6,7 @@
 
 typedef int (*rtnl_doit_func)(struct sk_buff *, struct nlmsghdr *, void *);
 typedef int (*rtnl_dumpit_func)(struct sk_buff *, struct netlink_callback *);
-typedef u16 (*rtnl_calcit_func)(struct sk_buff *);
+typedef u16 (*rtnl_calcit_func)(struct sk_buff *, struct nlmsghdr *);
 
 extern int      __rtnl_register(int protocol, int msgtype,
                                 rtnl_doit_func, rtnl_dumpit_func,
diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h
index 6ba596b07a72..e33ed1bfa113 100644
--- a/include/trace/events/sched.h
+++ b/include/trace/events/sched.h
@@ -370,56 +370,6 @@ TRACE_EVENT(sched_stat_runtime,
                         (unsigned long long)__entry->vruntime)
 );
 
-#ifdef CREATE_TRACE_POINTS
-static inline u64 trace_get_sleeptime(struct task_struct *tsk)
-{
-#ifdef CONFIG_SCHEDSTATS
-        u64 block, sleep;
-
-        block = tsk->se.statistics.block_start;
-        sleep = tsk->se.statistics.sleep_start;
-        tsk->se.statistics.block_start = 0;
-        tsk->se.statistics.sleep_start = 0;
-
-        return block ? block : sleep ? sleep : 0;
-#else
-        return 0;
-#endif
-}
-#endif
-
-/*
- * Tracepoint for accounting sleeptime (time the task is sleeping
- * or waiting for I/O).
- */
-TRACE_EVENT(sched_stat_sleeptime,
-
-        TP_PROTO(struct task_struct *tsk, u64 now),
-
-        TP_ARGS(tsk, now),
-
-        TP_STRUCT__entry(
-                __array( char,  comm,   TASK_COMM_LEN   )
-                __field( pid_t, pid                     )
-                __field( u64,   sleeptime               )
-        ),
-
-        TP_fast_assign(
-                memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN);
-                __entry->pid            = tsk->pid;
-                __entry->sleeptime = trace_get_sleeptime(tsk);
-                __entry->sleeptime = __entry->sleeptime ?
-                                now - __entry->sleeptime : 0;
-        )
-        TP_perf_assign(
-                __perf_count(__entry->sleeptime);
-        ),
-
-        TP_printk("comm=%s pid=%d sleeptime=%Lu [ns]",
-                        __entry->comm, __entry->pid,
-                        (unsigned long long)__entry->sleeptime)
-);
-
 /*
  * Tracepoint for showing priority inheritance modifying a tasks
  * priority.
diff --git a/kernel/events/hw_breakpoint.c b/kernel/events/hw_breakpoint.c
index b7971d6f38bf..ee706ce44aa0 100644
--- a/kernel/events/hw_breakpoint.c
+++ b/kernel/events/hw_breakpoint.c
@@ -651,10 +651,10 @@ int __init init_hw_breakpoint(void)
 
  err_alloc:
         for_each_possible_cpu(err_cpu) {
-                if (err_cpu == cpu)
-                        break;
                 for (i = 0; i < TYPE_MAX; i++)
                         kfree(per_cpu(nr_task_bp_pinned[i], cpu));
+                if (err_cpu == cpu)
+                        break;
         }
 
         return -ENOMEM;
diff --git a/kernel/fork.c b/kernel/fork.c
index b77fd559c78e..e2cd3e2a5ae8 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -66,6 +66,7 @@
 #include <linux/user-return-notifier.h>
 #include <linux/oom.h>
 #include <linux/khugepaged.h>
+#include <linux/signalfd.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -935,8 +936,10 @@ static int copy_sighand(unsigned long clone_flags, struct task_struct *tsk)
 
 void __cleanup_sighand(struct sighand_struct *sighand)
 {
-        if (atomic_dec_and_test(&sighand->count))
+        if (atomic_dec_and_test(&sighand->count)) {
+                signalfd_cleanup(sighand);
                 kmem_cache_free(sighand_cachep, sighand);
+        }
 }
 
 
diff --git a/kernel/irq/autoprobe.c b/kernel/irq/autoprobe.c
index 342d8f44e401..0119b9d467ae 100644
--- a/kernel/irq/autoprobe.c
+++ b/kernel/irq/autoprobe.c
@@ -53,7 +53,7 @@ unsigned long probe_irq_on(void)
                         if (desc->irq_data.chip->irq_set_type)
                                 desc->irq_data.chip->irq_set_type(&desc->irq_data,
                                                          IRQ_TYPE_PROBE);
-                        irq_startup(desc);
+                        irq_startup(desc, false);
                 }
                 raw_spin_unlock_irq(&desc->lock);
         }
@@ -70,7 +70,7 @@ unsigned long probe_irq_on(void)
                 raw_spin_lock_irq(&desc->lock);
                 if (!desc->action && irq_settings_can_probe(desc)) {
                         desc->istate |= IRQS_AUTODETECT | IRQS_WAITING;
-                        if (irq_startup(desc))
+                        if (irq_startup(desc, false))
                                 desc->istate |= IRQS_PENDING;
                 }
                 raw_spin_unlock_irq(&desc->lock);
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index f7c543a801d9..fb7db75ee0c8 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -157,19 +157,22 @@ static void irq_state_set_masked(struct irq_desc *desc)
         irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
 }
 
-int irq_startup(struct irq_desc *desc)
+int irq_startup(struct irq_desc *desc, bool resend)
 {
+        int ret = 0;
+
         irq_state_clr_disabled(desc);
         desc->depth = 0;
 
         if (desc->irq_data.chip->irq_startup) {
-                int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
+                ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
                 irq_state_clr_masked(desc);
-                return ret;
+        } else {
+                irq_enable(desc);
         }
-
-        irq_enable(desc);
-        return 0;
+        if (resend)
+                check_irq_resend(desc, desc->irq_data.irq);
+        return ret;
 }
 
 void irq_shutdown(struct irq_desc *desc)
@@ -330,6 +333,24 @@ out_unlock:
 }
 EXPORT_SYMBOL_GPL(handle_simple_irq);
 
+/*
+ * Called unconditionally from handle_level_irq() and only for oneshot
+ * interrupts from handle_fasteoi_irq()
+ */
+static void cond_unmask_irq(struct irq_desc *desc)
+{
+        /*
+         * We need to unmask in the following cases:
+         * - Standard level irq (IRQF_ONESHOT is not set)
+         * - Oneshot irq which did not wake the thread (caused by a
+         *   spurious interrupt or a primary handler handling it
+         *   completely).
+         */
+        if (!irqd_irq_disabled(&desc->irq_data) &&
+            irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
+                unmask_irq(desc);
+}
+
 /**
  *      handle_level_irq - Level type irq handler
  *      @irq:   the interrupt number
@@ -362,8 +383,8 @@ handle_level_irq(unsigned int irq, struct irq_desc *desc)
 
         handle_irq_event(desc);
 
-        if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
-                unmask_irq(desc);
+        cond_unmask_irq(desc);
+
 out_unlock:
         raw_spin_unlock(&desc->lock);
 }
@@ -417,6 +438,9 @@ handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
         preflow_handler(desc);
         handle_irq_event(desc);
 
+        if (desc->istate & IRQS_ONESHOT)
+                cond_unmask_irq(desc);
+
 out_eoi:
         desc->irq_data.chip->irq_eoi(&desc->irq_data);
 out_unlock:
@@ -625,7 +649,7 @@ __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
                 irq_settings_set_noprobe(desc);
                 irq_settings_set_norequest(desc);
                 irq_settings_set_nothread(desc);
-                irq_startup(desc);
+                irq_startup(desc, true);
         }
 out:
         irq_put_desc_busunlock(desc, flags);
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index b7952316016a..40378ff877e7 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -67,7 +67,7 @@ extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
 extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp);
 extern void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume);
 
-extern int irq_startup(struct irq_desc *desc);
+extern int irq_startup(struct irq_desc *desc, bool resend);
 extern void irq_shutdown(struct irq_desc *desc);
 extern void irq_enable(struct irq_desc *desc);
 extern void irq_disable(struct irq_desc *desc);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index a9a9dbe49fea..32313c084442 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1027,7 +1027,7 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
                         desc->istate |= IRQS_ONESHOT;
 
                 if (irq_settings_can_autoenable(desc))
-                        irq_startup(desc);
+                        irq_startup(desc, true);
                 else
                         /* Undo nested disables: */
                         desc->depth = 1;
diff --git a/kernel/pid.c b/kernel/pid.c
index ce8e00deaccb..9f08dfabaf13 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -543,12 +543,12 @@ struct pid *find_ge_pid(int nr, struct pid_namespace *ns)
  */
 void __init pidhash_init(void)
 {
-        int i, pidhash_size;
+        unsigned int i, pidhash_size;
 
         pid_hash = alloc_large_system_hash("PID", sizeof(*pid_hash), 0, 18,
                                            HASH_EARLY | HASH_SMALL,
                                            &pidhash_shift, NULL, 4096);
-        pidhash_size = 1 << pidhash_shift;
+        pidhash_size = 1U << pidhash_shift;
 
         for (i = 0; i < pidhash_size; i++)
                 INIT_HLIST_HEAD(&pid_hash[i]);
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 5255c9d2e053..33a0676ea744 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -1932,7 +1932,6 @@ static void finish_task_switch(struct rq *rq, struct task_struct *prev)
         local_irq_enable();
 #endif /* __ARCH_WANT_INTERRUPTS_ON_CTXSW */
         finish_lock_switch(rq, prev);
-        trace_sched_stat_sleeptime(current, rq->clock);
 
         fire_sched_in_preempt_notifiers(current);
         if (mm)
@@ -6729,7 +6728,7 @@ int __init sched_create_sysfs_power_savings_entries(struct device *dev)
 static int cpuset_cpu_active(struct notifier_block *nfb, unsigned long action,
                              void *hcpu)
 {
-        switch (action & ~CPU_TASKS_FROZEN) {
+        switch (action) {
         case CPU_ONLINE:
         case CPU_DOWN_FAILED:
                 cpuset_update_active_cpus();
@@ -6742,7 +6741,7 @@ static int cpuset_cpu_active(struct notifier_block *nfb, unsigned long action,
 static int cpuset_cpu_inactive(struct notifier_block *nfb, unsigned long action,
                                void *hcpu)
 {
-        switch (action & ~CPU_TASKS_FROZEN) {
+        switch (action) {
         case CPU_DOWN_PREPARE:
                 cpuset_update_active_cpus();
                 return NOTIFY_OK;
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 7c6414fc669d..aca16b843b7e 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -1003,6 +1003,7 @@ static void enqueue_sleeper(struct cfs_rq *cfs_rq, struct sched_entity *se)
                 if (unlikely(delta > se->statistics.sleep_max))
                         se->statistics.sleep_max = delta;
 
+                se->statistics.sleep_start = 0;
                 se->statistics.sum_sleep_runtime += delta;
 
                 if (tsk) {
@@ -1019,6 +1020,7 @@ static void enqueue_sleeper(struct cfs_rq *cfs_rq, struct sched_entity *se)
                 if (unlikely(delta > se->statistics.block_max))
                         se->statistics.block_max = delta;
 
+                se->statistics.block_start = 0;
                 se->statistics.sum_sleep_runtime += delta;
 
                 if (tsk) {
diff --git a/mm/memblock.c b/mm/memblock.c
index 77b5f227e1d8..99f285599501 100644
--- a/mm/memblock.c
+++ b/mm/memblock.c
@@ -99,9 +99,6 @@ phys_addr_t __init_memblock memblock_find_in_range_node(phys_addr_t start,
         phys_addr_t this_start, this_end, cand;
         u64 i;
 
-        /* align @size to avoid excessive fragmentation on reserved array */
-        size = round_up(size, align);
-
         /* pump up @end */
         if (end == MEMBLOCK_ALLOC_ACCESSIBLE)
                 end = memblock.current_limit;
@@ -731,6 +728,9 @@ static phys_addr_t __init memblock_alloc_base_nid(phys_addr_t size,
 {
         phys_addr_t found;
 
+        /* align @size to avoid excessive fragmentation on reserved array */
+        size = round_up(size, align);
+
         found = memblock_find_in_range_node(0, max_addr, size, align, nid);
         if (found && !memblock_reserve(found, size))
                 return found;
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 6728a7ae6f2d..228d6461c12a 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -4414,6 +4414,9 @@ static void mem_cgroup_usage_unregister_event(struct cgroup *cgrp,
          */
         BUG_ON(!thresholds);
 
+        if (!thresholds->primary)
+                goto unlock;
+
         usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
 
         /* Check if a threshold crossed before removing */
@@ -4462,7 +4465,7 @@ swap_buffers:
 
         /* To be sure that nobody uses thresholds */
         synchronize_rcu();
-
+unlock:
         mutex_unlock(&memcg->thresholds_lock);
 }
 
diff --git a/mm/nommu.c b/mm/nommu.c
index b982290fd962..f59e170fceb4 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -696,9 +696,11 @@ static void add_vma_to_mm(struct mm_struct *mm, struct vm_area_struct *vma)
         if (vma->vm_file) {
                 mapping = vma->vm_file->f_mapping;
 
+                mutex_lock(&mapping->i_mmap_mutex);
                 flush_dcache_mmap_lock(mapping);
                 vma_prio_tree_insert(vma, &mapping->i_mmap);
                 flush_dcache_mmap_unlock(mapping);
+                mutex_unlock(&mapping->i_mmap_mutex);
         }
 
         /* add the VMA to the tree */
@@ -760,9 +762,11 @@ static void delete_vma_from_mm(struct vm_area_struct *vma)
         if (vma->vm_file) {
                 mapping = vma->vm_file->f_mapping;
 
+                mutex_lock(&mapping->i_mmap_mutex);
                 flush_dcache_mmap_lock(mapping);
                 vma_prio_tree_remove(vma, &mapping->i_mmap);
                 flush_dcache_mmap_unlock(mapping);
+                mutex_unlock(&mapping->i_mmap_mutex);
         }
 
         /* remove from the MM's tree and list */
@@ -775,8 +779,6 @@ static void delete_vma_from_mm(struct vm_area_struct *vma)
 
         if (vma->vm_next)
                 vma->vm_next->vm_prev = vma->vm_prev;
-
-        vma->vm_mm = NULL;
 }
 
 /*
@@ -2052,6 +2054,7 @@ int nommu_shrink_inode_mappings(struct inode *inode, size_t size,
         high = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
 
         down_write(&nommu_region_sem);
+        mutex_lock(&inode->i_mapping->i_mmap_mutex);
 
         /* search for VMAs that fall within the dead zone */
         vma_prio_tree_foreach(vma, &iter, &inode->i_mapping->i_mmap,
@@ -2059,6 +2062,7 @@ int nommu_shrink_inode_mappings(struct inode *inode, size_t size,
                 /* found one - only interested if it's shared out of the page
                  * cache */
                 if (vma->vm_flags & VM_SHARED) {
+                        mutex_unlock(&inode->i_mapping->i_mmap_mutex);
                         up_write(&nommu_region_sem);
                         return -ETXTBSY; /* not quite true, but near enough */
                 }
@@ -2086,6 +2090,7 @@ int nommu_shrink_inode_mappings(struct inode *inode, size_t size,
                 }
         }
 
+        mutex_unlock(&inode->i_mapping->i_mmap_mutex);
         up_write(&nommu_region_sem);
         return 0;
 }
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index d2186ecb36f7..a13ded1938f0 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -5236,6 +5236,7 @@ void *__init alloc_large_system_hash(const char *tablename,
                 max = ((unsigned long long)nr_all_pages << PAGE_SHIFT) >> 4;
                 do_div(max, bucketsize);
         }
+        max = min(max, 0x80000000ULL);
 
         if (numentries > max)
                 numentries = max;
diff --git a/net/atm/clip.c b/net/atm/clip.c
index c12c2582457c..127fe70a1baa 100644
--- a/net/atm/clip.c
+++ b/net/atm/clip.c
@@ -46,8 +46,8 @@
 
 static struct net_device *clip_devs;
 static struct atm_vcc *atmarpd;
-static struct neigh_table clip_tbl;
 static struct timer_list idle_timer;
+static const struct neigh_ops clip_neigh_ops;
 
 static int to_atmarpd(enum atmarp_ctrl_type type, int itf, __be32 ip)
 {
@@ -123,6 +123,8 @@ static int neigh_check_cb(struct neighbour *n)
         struct atmarp_entry *entry = neighbour_priv(n);
         struct clip_vcc *cv;
 
+        if (n->ops != &clip_neigh_ops)
+                return 0;
         for (cv = entry->vccs; cv; cv = cv->next) {
                 unsigned long exp = cv->last_use + cv->idle_timeout;
 
@@ -154,10 +156,10 @@ static int neigh_check_cb(struct neighbour *n)
 
 static void idle_timer_check(unsigned long dummy)
 {
-        write_lock(&clip_tbl.lock);
-        __neigh_for_each_release(&clip_tbl, neigh_check_cb);
+        write_lock(&arp_tbl.lock);
+        __neigh_for_each_release(&arp_tbl, neigh_check_cb);
         mod_timer(&idle_timer, jiffies + CLIP_CHECK_INTERVAL * HZ);
-        write_unlock(&clip_tbl.lock);
+        write_unlock(&arp_tbl.lock);
 }
 
 static int clip_arp_rcv(struct sk_buff *skb)
diff --git a/net/bluetooth/af_bluetooth.c b/net/bluetooth/af_bluetooth.c
index ef92864ac625..72eb187a5f60 100644
--- a/net/bluetooth/af_bluetooth.c
+++ b/net/bluetooth/af_bluetooth.c
@@ -71,19 +71,16 @@ static const char *const bt_slock_key_strings[BT_MAX_PROTO] = {
         "slock-AF_BLUETOOTH-BTPROTO_AVDTP",
 };
 
-static inline void bt_sock_reclassify_lock(struct socket *sock, int proto)
+void bt_sock_reclassify_lock(struct sock *sk, int proto)
 {
-        struct sock *sk = sock->sk;
-
-        if (!sk)
-                return;
-
+        BUG_ON(!sk);
         BUG_ON(sock_owned_by_user(sk));
 
         sock_lock_init_class_and_name(sk,
                         bt_slock_key_strings[proto], &bt_slock_key[proto],
                                 bt_key_strings[proto], &bt_lock_key[proto]);
 }
+EXPORT_SYMBOL(bt_sock_reclassify_lock);
 
 int bt_sock_register(int proto, const struct net_proto_family *ops)
 {
@@ -145,7 +142,8 @@ static int bt_sock_create(struct net *net, struct socket *sock, int proto,
 
         if (bt_proto[proto] && try_module_get(bt_proto[proto]->owner)) {
                 err = bt_proto[proto]->create(net, sock, proto, kern);
-                bt_sock_reclassify_lock(sock, proto);
+                if (!err)
+                        bt_sock_reclassify_lock(sock->sk, proto);
                 module_put(bt_proto[proto]->owner);
         }
 
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 3db432473ad5..07bc69ed9498 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -635,6 +635,10 @@ static int hci_conn_auth(struct hci_conn *conn, __u8 sec_level, __u8 auth_type)
 
         if (!test_and_set_bit(HCI_CONN_AUTH_PEND, &conn->pend)) {
                 struct hci_cp_auth_requested cp;
+
+                /* encrypt must be pending if auth is also pending */
+                set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend);
+
                 cp.handle = cpu_to_le16(conn->handle);
                 hci_send_cmd(conn->hdev, HCI_OP_AUTH_REQUESTED,
                                                         sizeof(cp), &cp);
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 9de93714213a..5aeb62491198 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -640,7 +640,8 @@ static int hci_dev_do_close(struct hci_dev *hdev)
         /* Reset device */
         skb_queue_purge(&hdev->cmd_q);
         atomic_set(&hdev->cmd_cnt, 1);
-        if (!test_bit(HCI_RAW, &hdev->flags)) {
+        if (!test_bit(HCI_RAW, &hdev->flags) &&
+                                test_bit(HCI_QUIRK_NO_RESET, &hdev->quirks)) {
                 set_bit(HCI_INIT, &hdev->flags);
                 __hci_request(hdev, hci_reset_req, 0,
                                         msecs_to_jiffies(250));
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index faf0b11ac1d3..32d338c30e65 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -1018,10 +1018,10 @@ static void l2cap_conn_del(struct hci_conn *hcon, int err)
         hci_chan_del(conn->hchan);
 
         if (conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_SENT)
-                __cancel_delayed_work(&conn->info_timer);
+                cancel_delayed_work_sync(&conn->info_timer);
 
         if (test_and_clear_bit(HCI_CONN_LE_SMP_PEND, &hcon->pend)) {
-                __cancel_delayed_work(&conn->security_timer);
+                cancel_delayed_work_sync(&conn->security_timer);
                 smp_chan_destroy(conn);
         }
 
@@ -1120,7 +1120,7 @@ static struct l2cap_chan *l2cap_global_chan_by_psm(int state, __le16 psm, bdaddr
         return c1;
 }
 
-inline int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, bdaddr_t *dst)
+int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, bdaddr_t *dst)
 {
         struct sock *sk = chan->sk;
         bdaddr_t *src = &bt_sk(sk)->src;
@@ -2574,7 +2574,7 @@ static inline int l2cap_command_rej(struct l2cap_conn *conn, struct l2cap_cmd_hd
 
         if ((conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_SENT) &&
                                         cmd->ident == conn->info_ident) {
-                __cancel_delayed_work(&conn->info_timer);
+                cancel_delayed_work(&conn->info_timer);
 
                 conn->info_state |= L2CAP_INFO_FEAT_MASK_REQ_DONE;
                 conn->info_ident = 0;
@@ -2970,7 +2970,8 @@ static inline int l2cap_config_rsp(struct l2cap_conn *conn, struct l2cap_cmd_hdr
 
         default:
                 sk->sk_err = ECONNRESET;
-                __set_chan_timer(chan, L2CAP_DISC_REJ_TIMEOUT);
+                __set_chan_timer(chan,
+                                msecs_to_jiffies(L2CAP_DISC_REJ_TIMEOUT));
                 l2cap_send_disconn_req(conn, chan, ECONNRESET);
                 goto done;
         }
@@ -3120,7 +3121,7 @@ static inline int l2cap_information_rsp(struct l2cap_conn *conn, struct l2cap_cm
                         conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_DONE)
                 return 0;
 
-        __cancel_delayed_work(&conn->info_timer);
+        cancel_delayed_work(&conn->info_timer);
 
         if (result != L2CAP_IR_SUCCESS) {
                 conn->info_state |= L2CAP_INFO_FEAT_MASK_REQ_DONE;
@@ -4478,7 +4479,8 @@ static inline void l2cap_check_encryption(struct l2cap_chan *chan, u8 encrypt)
         if (encrypt == 0x00) {
                 if (chan->sec_level == BT_SECURITY_MEDIUM) {
                         __clear_chan_timer(chan);
-                        __set_chan_timer(chan, L2CAP_ENC_TIMEOUT);
+                        __set_chan_timer(chan,
+                                        msecs_to_jiffies(L2CAP_ENC_TIMEOUT));
                 } else if (chan->sec_level == BT_SECURITY_HIGH)
                         l2cap_chan_close(chan, ECONNREFUSED);
         } else {
@@ -4499,7 +4501,7 @@ int l2cap_security_cfm(struct hci_conn *hcon, u8 status, u8 encrypt)
 
         if (hcon->type == LE_LINK) {
                 smp_distribute_keys(conn, 0);
-                __cancel_delayed_work(&conn->security_timer);
+                cancel_delayed_work(&conn->security_timer);
         }
 
         rcu_read_lock();
@@ -4546,7 +4548,8 @@ int l2cap_security_cfm(struct hci_conn *hcon, u8 status, u8 encrypt)
                                         L2CAP_CONN_REQ, sizeof(req), &req);
                         } else {
                                 __clear_chan_timer(chan);
-                                __set_chan_timer(chan, L2CAP_DISC_TIMEOUT);
+                                __set_chan_timer(chan,
+                                        msecs_to_jiffies(L2CAP_DISC_TIMEOUT));
                         }
                 } else if (chan->state == BT_CONNECT2) {
                         struct l2cap_conn_rsp rsp;
@@ -4566,7 +4569,8 @@ int l2cap_security_cfm(struct hci_conn *hcon, u8 status, u8 encrypt)
                                 }
                         } else {
                                 l2cap_state_change(chan, BT_DISCONN);
-                                __set_chan_timer(chan, L2CAP_DISC_TIMEOUT);
+                                __set_chan_timer(chan,
+                                        msecs_to_jiffies(L2CAP_DISC_TIMEOUT));
                                 res = L2CAP_CR_SEC_BLOCK;
                                 stat = L2CAP_CS_NO_INFO;
                         }
diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c
index c61d967012b2..401d9428ae4c 100644
--- a/net/bluetooth/l2cap_sock.c
+++ b/net/bluetooth/l2cap_sock.c
@@ -849,6 +849,8 @@ static struct l2cap_chan *l2cap_sock_new_connection_cb(void *data)
         if (!sk)
                 return NULL;
 
+        bt_sock_reclassify_lock(sk, BTPROTO_L2CAP);
+
         l2cap_sock_init(sk, parent);
 
         return l2cap_pi(sk)->chan;
@@ -1002,7 +1004,7 @@ static struct sock *l2cap_sock_alloc(struct net *net, struct socket *sock, int p
         INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
 
         sk->sk_destruct = l2cap_sock_destruct;
-        sk->sk_sndtimeo = L2CAP_CONN_TIMEOUT;
+        sk->sk_sndtimeo = msecs_to_jiffies(L2CAP_CONN_TIMEOUT);
 
         sock_reset_flag(sk, SOCK_ZAPPED);
 
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
index 501649bf5596..8a602388f1e7 100644
--- a/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
@@ -1164,12 +1164,18 @@ static int rfcomm_recv_ua(struct rfcomm_session *s, u8 dlci)
                         break;
 
                 case BT_DISCONN:
-                        /* When socket is closed and we are not RFCOMM
-                         * initiator rfcomm_process_rx already calls
-                         * rfcomm_session_put() */
-                        if (s->sock->sk->sk_state != BT_CLOSED)
-                                if (list_empty(&s->dlcs))
-                                        rfcomm_session_put(s);
+                        /* rfcomm_session_put is called later so don't do
+                         * anything here otherwise we will mess up the session
+                         * reference counter:
+                         *
+                         * (a) when we are the initiator dlc_unlink will drive
+                         * the reference counter to 0 (there is no initial put
+                         * after session_add)
+                         *
+                         * (b) when we are not the initiator rfcomm_rx_process
+                         * will explicitly call put to balance the initial hold
+                         * done after session add.
+                         */
                         break;
                 }
         }
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index f066678faeee..22169c3f1482 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -956,6 +956,8 @@ int rfcomm_connect_ind(struct rfcomm_session *s, u8 channel, struct rfcomm_dlc *
         if (!sk)
                 goto done;
 
+        bt_sock_reclassify_lock(sk, BTPROTO_RFCOMM);
+
         rfcomm_sock_init(sk, parent);
         bacpy(&bt_sk(sk)->src, &src);
         bacpy(&bt_sk(sk)->dst, &dst);
diff --git a/net/core/neighbour.c b/net/core/neighbour.c
index e287346e0934..2a83914b0277 100644
--- a/net/core/neighbour.c
+++ b/net/core/neighbour.c
@@ -826,6 +826,8 @@ next_elt:
                 write_unlock_bh(&tbl->lock);
                 cond_resched();
                 write_lock_bh(&tbl->lock);
+                nht = rcu_dereference_protected(tbl->nht,
+                                                lockdep_is_held(&tbl->lock));
         }
         /* Cycle through all hash buckets every base_reachable_time/2 ticks.
          * ARP entry timeouts range from 1/2 base_reachable_time to 3/2
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 65aebd450027..606a6e8f3671 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -60,7 +60,6 @@ struct rtnl_link {
 };
 
 static DEFINE_MUTEX(rtnl_mutex);
-static u16 min_ifinfo_dump_size;
 
 void rtnl_lock(void)
 {
@@ -724,10 +723,11 @@ static void copy_rtnl_link_stats64(void *v, const struct rtnl_link_stats64 *b)
 }
 
 /* All VF info */
-static inline int rtnl_vfinfo_size(const struct net_device *dev)
+static inline int rtnl_vfinfo_size(const struct net_device *dev,
+                                   u32 ext_filter_mask)
 {
-        if (dev->dev.parent && dev_is_pci(dev->dev.parent)) {
-
+        if (dev->dev.parent && dev_is_pci(dev->dev.parent) &&
+            (ext_filter_mask & RTEXT_FILTER_VF)) {
                 int num_vfs = dev_num_vf(dev->dev.parent);
                 size_t size = nla_total_size(sizeof(struct nlattr));
                 size += nla_total_size(num_vfs * sizeof(struct nlattr));
@@ -766,7 +766,8 @@ static size_t rtnl_port_size(const struct net_device *dev)
                 return port_self_size;
 }
 
-static noinline size_t if_nlmsg_size(const struct net_device *dev)
+static noinline size_t if_nlmsg_size(const struct net_device *dev,
+                                     u32 ext_filter_mask)
 {
         return NLMSG_ALIGN(sizeof(struct ifinfomsg))
                + nla_total_size(IFNAMSIZ) /* IFLA_IFNAME */
@@ -784,8 +785,9 @@ static noinline size_t if_nlmsg_size(const struct net_device *dev)
                + nla_total_size(4) /* IFLA_MASTER */
                + nla_total_size(1) /* IFLA_OPERSTATE */
                + nla_total_size(1) /* IFLA_LINKMODE */
-               + nla_total_size(4) /* IFLA_NUM_VF */
-               + rtnl_vfinfo_size(dev) /* IFLA_VFINFO_LIST */
+               + nla_total_size(ext_filter_mask
+                                & RTEXT_FILTER_VF ? 4 : 0) /* IFLA_NUM_VF */
+               + rtnl_vfinfo_size(dev, ext_filter_mask) /* IFLA_VFINFO_LIST */
                + rtnl_port_size(dev) /* IFLA_VF_PORTS + IFLA_PORT_SELF */
                + rtnl_link_get_size(dev) /* IFLA_LINKINFO */
                + rtnl_link_get_af_size(dev); /* IFLA_AF_SPEC */
@@ -868,7 +870,7 @@ static int rtnl_port_fill(struct sk_buff *skb, struct net_device *dev)
 
 static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
                             int type, u32 pid, u32 seq, u32 change,
-                            unsigned int flags)
+                            unsigned int flags, u32 ext_filter_mask)
 {
         struct ifinfomsg *ifm;
         struct nlmsghdr *nlh;
@@ -941,10 +943,11 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
                 goto nla_put_failure;
         copy_rtnl_link_stats64(nla_data(attr), stats);
 
-        if (dev->dev.parent)
+        if (dev->dev.parent && (ext_filter_mask & RTEXT_FILTER_VF))
                 NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent));
 
-        if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) {
+        if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent
+            && (ext_filter_mask & RTEXT_FILTER_VF)) {
                 int i;
 
                 struct nlattr *vfinfo, *vf;
@@ -1048,6 +1051,8 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
         struct net_device *dev;
         struct hlist_head *head;
         struct hlist_node *node;
+        struct nlattr *tb[IFLA_MAX+1];
+        u32 ext_filter_mask = 0;
 
         s_h = cb->args[0];
         s_idx = cb->args[1];
@@ -1055,6 +1060,12 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
         rcu_read_lock();
         cb->seq = net->dev_base_seq;
 
+        nlmsg_parse(cb->nlh, sizeof(struct rtgenmsg), tb, IFLA_MAX,
+                    ifla_policy);
+
+        if (tb[IFLA_EXT_MASK])
+                ext_filter_mask = nla_get_u32(tb[IFLA_EXT_MASK]);
+
         for (h = s_h; h < NETDEV_HASHENTRIES; h++, s_idx = 0) {
                 idx = 0;
                 head = &net->dev_index_head[h];
@@ -1064,7 +1075,8 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
                         if (rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK,
                                              NETLINK_CB(cb->skb).pid,
                                              cb->nlh->nlmsg_seq, 0,
-                                             NLM_F_MULTI) <= 0)
+                                             NLM_F_MULTI,
+                                             ext_filter_mask) <= 0)
                                 goto out;
 
                         nl_dump_check_consistent(cb, nlmsg_hdr(skb));
@@ -1100,6 +1112,7 @@ const struct nla_policy ifla_policy[IFLA_MAX+1] = {
         [IFLA_VF_PORTS]         = { .type = NLA_NESTED },
         [IFLA_PORT_SELF]        = { .type = NLA_NESTED },
         [IFLA_AF_SPEC]          = { .type = NLA_NESTED },
+        [IFLA_EXT_MASK]         = { .type = NLA_U32 },
 };
 EXPORT_SYMBOL(ifla_policy);
 
@@ -1509,8 +1522,6 @@ errout:
 
         if (send_addr_notify)
                 call_netdevice_notifiers(NETDEV_CHANGEADDR, dev);
-        min_ifinfo_dump_size = max_t(u16, if_nlmsg_size(dev),
-                                     min_ifinfo_dump_size);
 
         return err;
 }
@@ -1842,6 +1853,7 @@ static int rtnl_getlink(struct sk_buff *skb, struct nlmsghdr* nlh, void *arg)
         struct net_device *dev = NULL;
         struct sk_buff *nskb;
         int err;
+        u32 ext_filter_mask = 0;
 
         err = nlmsg_parse(nlh, sizeof(*ifm), tb, IFLA_MAX, ifla_policy);
         if (err < 0)
@@ -1850,6 +1862,9 @@ static int rtnl_getlink(struct sk_buff *skb, struct nlmsghdr* nlh, void *arg)
         if (tb[IFLA_IFNAME])
                 nla_strlcpy(ifname, tb[IFLA_IFNAME], IFNAMSIZ);
 
+        if (tb[IFLA_EXT_MASK])
+                ext_filter_mask = nla_get_u32(tb[IFLA_EXT_MASK]);
+
         ifm = nlmsg_data(nlh);
         if (ifm->ifi_index > 0)
                 dev = __dev_get_by_index(net, ifm->ifi_index);
@@ -1861,12 +1876,12 @@ static int rtnl_getlink(struct sk_buff *skb, struct nlmsghdr* nlh, void *arg)
         if (dev == NULL)
                 return -ENODEV;
 
-        nskb = nlmsg_new(if_nlmsg_size(dev), GFP_KERNEL);
+        nskb = nlmsg_new(if_nlmsg_size(dev, ext_filter_mask), GFP_KERNEL);
         if (nskb == NULL)
                 return -ENOBUFS;
 
         err = rtnl_fill_ifinfo(nskb, dev, RTM_NEWLINK, NETLINK_CB(skb).pid,
-                               nlh->nlmsg_seq, 0, 0);
+                               nlh->nlmsg_seq, 0, 0, ext_filter_mask);
         if (err < 0) {
                 /* -EMSGSIZE implies BUG in if_nlmsg_size */
                 WARN_ON(err == -EMSGSIZE);
@@ -1877,8 +1892,31 @@ static int rtnl_getlink(struct sk_buff *skb, struct nlmsghdr* nlh, void *arg)
         return err;
 }
 
-static u16 rtnl_calcit(struct sk_buff *skb)
+static u16 rtnl_calcit(struct sk_buff *skb, struct nlmsghdr *nlh)
 {
+        struct net *net = sock_net(skb->sk);
+        struct net_device *dev;
+        struct nlattr *tb[IFLA_MAX+1];
+        u32 ext_filter_mask = 0;
+        u16 min_ifinfo_dump_size = 0;
+
+        nlmsg_parse(nlh, sizeof(struct rtgenmsg), tb, IFLA_MAX, ifla_policy);
+
+        if (tb[IFLA_EXT_MASK])
+                ext_filter_mask = nla_get_u32(tb[IFLA_EXT_MASK]);
+
+        if (!ext_filter_mask)
+                return NLMSG_GOODSIZE;
+        /*
+         * traverse the list of net devices and compute the minimum
+         * buffer size based upon the filter mask.
+         */
+        list_for_each_entry(dev, &net->dev_base_head, dev_list) {
+                min_ifinfo_dump_size = max_t(u16, min_ifinfo_dump_size,
+                                             if_nlmsg_size(dev,
+                                                           ext_filter_mask));
+        }
+
         return min_ifinfo_dump_size;
 }
 
@@ -1913,13 +1951,11 @@ void rtmsg_ifinfo(int type, struct net_device *dev, unsigned change)
         int err = -ENOBUFS;
         size_t if_info_size;
 
-        skb = nlmsg_new((if_info_size = if_nlmsg_size(dev)), GFP_KERNEL);
+        skb = nlmsg_new((if_info_size = if_nlmsg_size(dev, 0)), GFP_KERNEL);
         if (skb == NULL)
                 goto errout;
 
-        min_ifinfo_dump_size = max_t(u16, if_info_size, min_ifinfo_dump_size);
-
-        err = rtnl_fill_ifinfo(skb, dev, type, 0, 0, change, 0);
+        err = rtnl_fill_ifinfo(skb, dev, type, 0, 0, change, 0, 0);
         if (err < 0) {
                 /* -EMSGSIZE implies BUG in if_nlmsg_size() */
                 WARN_ON(err == -EMSGSIZE);
@@ -1977,7 +2013,7 @@ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
                         return -EOPNOTSUPP;
                 calcit = rtnl_get_calcit(family, type);
                 if (calcit)
-                        min_dump_alloc = calcit(skb);
+                        min_dump_alloc = calcit(skb, nlh);
 
                 __rtnl_unlock();
                 rtnl = net->rtnl;
diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c
index 6b3ca5ba4450..38673d2860e2 100644
--- a/net/ipv4/ip_gre.c
+++ b/net/ipv4/ip_gre.c
@@ -65,7 +65,7 @@
    it is infeasible task. The most general solutions would be
    to keep skb->encapsulation counter (sort of local ttl),
    and silently drop packet when it expires. It is a good
-   solution, but it supposes maintaing new variable in ALL
+   solution, but it supposes maintaining new variable in ALL
    skb, even if no tunneling is used.
 
    Current solution: xmit_recursion breaks dead loops. This is a percpu
@@ -91,14 +91,14 @@
 
    One of them is to parse packet trying to detect inner encapsulation
    made by our node. It is difficult or even impossible, especially,
-   taking into account fragmentation. TO be short, tt is not solution at all.
+   taking into account fragmentation. TO be short, ttl is not solution at all.
 
    Current solution: The solution was UNEXPECTEDLY SIMPLE.
    We force DF flag on tunnels with preconfigured hop limit,
    that is ALL. :-) Well, it does not remove the problem completely,
    but exponential growth of network traffic is changed to linear
    (branches, that exceed pmtu are pruned) and tunnel mtu
-   fastly degrades to value <68, where looping stops.
+   rapidly degrades to value <68, where looping stops.
    Yes, it is not good if there exists a router in the loop,
    which does not force DF, even when encapsulating packets have DF set.
    But it is not our problem! Nobody could accuse us, we made
@@ -457,8 +457,8 @@ static void ipgre_err(struct sk_buff *skb, u32 info)
    GRE tunnels with enabled checksum. Tell them "thank you".
 
    Well, I wonder, rfc1812 was written by Cisco employee,
-   what the hell these idiots break standrads established
-   by themself???
+   what the hell these idiots break standards established
+   by themselves???
  */
 
         const struct iphdr *iph = (const struct iphdr *)skb->data;
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index aea5a199c37a..b072386cee21 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -630,6 +630,7 @@ static int ping_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
 
         pr_debug("ping_recvmsg(sk=%p,sk->num=%u)\n", isk, isk->inet_num);
 
+        err = -EOPNOTSUPP;
         if (flags & MSG_OOB)
                 goto out;
 
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 37755ccc0e96..22ef5f9fd2ff 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -3240,7 +3240,8 @@ void __init tcp_init(void)
 {
         struct sk_buff *skb = NULL;
         unsigned long limit;
-        int i, max_share, cnt;
+        int max_share, cnt;
+        unsigned int i;
         unsigned long jiffy = jiffies;
 
         BUILD_BUG_ON(sizeof(struct tcp_skb_cb) > sizeof(skb->cb));
@@ -3283,7 +3284,7 @@ void __init tcp_init(void)
                                         &tcp_hashinfo.bhash_size,
                                         NULL,
                                         64 * 1024);
-        tcp_hashinfo.bhash_size = 1 << tcp_hashinfo.bhash_size;
+        tcp_hashinfo.bhash_size = 1U << tcp_hashinfo.bhash_size;
         for (i = 0; i < tcp_hashinfo.bhash_size; i++) {
                 spin_lock_init(&tcp_hashinfo.bhash[i].lock);
                 INIT_HLIST_HEAD(&tcp_hashinfo.bhash[i].chain);
diff --git a/net/ipv4/xfrm4_mode_beet.c b/net/ipv4/xfrm4_mode_beet.c
index 63418185f524..e3db3f915114 100644
--- a/net/ipv4/xfrm4_mode_beet.c
+++ b/net/ipv4/xfrm4_mode_beet.c
@@ -110,10 +110,7 @@ static int xfrm4_beet_input(struct xfrm_state *x, struct sk_buff *skb)
 
         skb_push(skb, sizeof(*iph));
         skb_reset_network_header(skb);
-
-        memmove(skb->data - skb->mac_len, skb_mac_header(skb),
-                skb->mac_len);
-        skb_set_mac_header(skb, -skb->mac_len);
+        skb_mac_header_rebuild(skb);
 
         xfrm4_beet_make_header(skb);
 
diff --git a/net/ipv4/xfrm4_mode_tunnel.c b/net/ipv4/xfrm4_mode_tunnel.c
index 534972e114ac..ed4bf11ef9f4 100644
--- a/net/ipv4/xfrm4_mode_tunnel.c
+++ b/net/ipv4/xfrm4_mode_tunnel.c
@@ -66,7 +66,6 @@ static int xfrm4_mode_tunnel_output(struct xfrm_state *x, struct sk_buff *skb)
 
 static int xfrm4_mode_tunnel_input(struct xfrm_state *x, struct sk_buff *skb)
 {
-        const unsigned char *old_mac;
         int err = -EINVAL;
 
         if (XFRM_MODE_SKB_CB(skb)->protocol != IPPROTO_IPIP)
@@ -84,10 +83,9 @@ static int xfrm4_mode_tunnel_input(struct xfrm_state *x, struct sk_buff *skb)
         if (!(x->props.flags & XFRM_STATE_NOECN))
                 ipip_ecn_decapsulate(skb);
 
-        old_mac = skb_mac_header(skb);
-        skb_set_mac_header(skb, -skb->mac_len);
-        memmove(skb_mac_header(skb), old_mac, skb->mac_len);
         skb_reset_network_header(skb);
+        skb_mac_header_rebuild(skb);
+
         err = 0;
 
 out:
diff --git a/net/ipv6/ip6mr.c b/net/ipv6/ip6mr.c
index c7e95c8c579f..5aa3981a3922 100644
--- a/net/ipv6/ip6mr.c
+++ b/net/ipv6/ip6mr.c
@@ -1926,8 +1926,10 @@ static int ip6mr_forward2(struct net *net, struct mr6_table *mrt,
         };
 
         dst = ip6_route_output(net, NULL, &fl6);
-        if (!dst)
+        if (dst->error) {
+                dst_release(dst);
                 goto out_free;
+        }
 
         skb_dst_drop(skb);
         skb_dst_set(skb, dst);
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c
index d8f02ef88e59..c964958ac470 100644
--- a/net/ipv6/ndisc.c
+++ b/net/ipv6/ndisc.c
@@ -1545,9 +1545,10 @@ void ndisc_send_redirect(struct sk_buff *skb, struct neighbour *neigh,
                          &saddr_buf, &ipv6_hdr(skb)->saddr, dev->ifindex);
 
         dst = ip6_route_output(net, NULL, &fl6);
-        if (dst == NULL)
+        if (dst->error) {
+                dst_release(dst);
                 return;
-
+        }
         dst = xfrm_lookup(net, dst, flowi6_to_flowi(&fl6), NULL, 0);
         if (IS_ERR(dst))
                 return;
diff --git a/net/ipv6/xfrm6_mode_beet.c b/net/ipv6/xfrm6_mode_beet.c
index a81ce9450750..9949a356d62c 100644
--- a/net/ipv6/xfrm6_mode_beet.c
+++ b/net/ipv6/xfrm6_mode_beet.c
@@ -80,7 +80,6 @@ static int xfrm6_beet_output(struct xfrm_state *x, struct sk_buff *skb)
 static int xfrm6_beet_input(struct xfrm_state *x, struct sk_buff *skb)
 {
         struct ipv6hdr *ip6h;
-        const unsigned char *old_mac;
         int size = sizeof(struct ipv6hdr);
         int err;
 
@@ -90,10 +89,7 @@ static int xfrm6_beet_input(struct xfrm_state *x, struct sk_buff *skb)
 
         __skb_push(skb, size);
         skb_reset_network_header(skb);
-
-        old_mac = skb_mac_header(skb);
-        skb_set_mac_header(skb, -skb->mac_len);
-        memmove(skb_mac_header(skb), old_mac, skb->mac_len);
+        skb_mac_header_rebuild(skb);
 
         xfrm6_beet_make_header(skb);
 
diff --git a/net/ipv6/xfrm6_mode_tunnel.c b/net/ipv6/xfrm6_mode_tunnel.c
index 261e6e6f487e..9f2095b19ad0 100644
--- a/net/ipv6/xfrm6_mode_tunnel.c
+++ b/net/ipv6/xfrm6_mode_tunnel.c
@@ -63,7 +63,6 @@ static int xfrm6_mode_tunnel_output(struct xfrm_state *x, struct sk_buff *skb)
 static int xfrm6_mode_tunnel_input(struct xfrm_state *x, struct sk_buff *skb)
 {
         int err = -EINVAL;
-        const unsigned char *old_mac;
 
         if (XFRM_MODE_SKB_CB(skb)->protocol != IPPROTO_IPV6)
                 goto out;
@@ -80,10 +79,9 @@ static int xfrm6_mode_tunnel_input(struct xfrm_state *x, struct sk_buff *skb)
         if (!(x->props.flags & XFRM_STATE_NOECN))
                 ipip6_ecn_decapsulate(skb);
 
-        old_mac = skb_mac_header(skb);
-        skb_set_mac_header(skb, -skb->mac_len);
-        memmove(skb_mac_header(skb), old_mac, skb->mac_len);
         skb_reset_network_header(skb);
+        skb_mac_header_rebuild(skb);
+
         err = 0;
 
 out:
diff --git a/net/mac80211/debugfs_sta.c b/net/mac80211/debugfs_sta.c
index 2406b3e7393f..d86217d56bd7 100644
--- a/net/mac80211/debugfs_sta.c
+++ b/net/mac80211/debugfs_sta.c
@@ -63,14 +63,14 @@ static ssize_t sta_flags_read(struct file *file, char __user *userbuf,
         test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
 
         int res = scnprintf(buf, sizeof(buf),
-                            "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+                            "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
                             TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
                             TEST(PS_DRIVER), TEST(AUTHORIZED),
                             TEST(SHORT_PREAMBLE),
                             TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
                             TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
                             TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
-                            TEST(TDLS_PEER_AUTH));
+                            TEST(TDLS_PEER_AUTH), TEST(RATE_CONTROL));
 #undef TEST
         return simple_read_from_buffer(userbuf, count, ppos, buf, res);
 }
diff --git a/net/mac80211/rate.c b/net/mac80211/rate.c
index 5a5a7767d541..ad64f4d5271a 100644
--- a/net/mac80211/rate.c
+++ b/net/mac80211/rate.c
@@ -336,7 +336,7 @@ void rate_control_get_rate(struct ieee80211_sub_if_data *sdata,
         int i;
         u32 mask;
 
-        if (sta) {
+        if (sta && test_sta_flag(sta, WLAN_STA_RATE_CONTROL)) {
                 ista = &sta->sta;
                 priv_sta = sta->rate_ctrl_priv;
         }
diff --git a/net/mac80211/rate.h b/net/mac80211/rate.h
index 168427b0ffdc..80cfc006dd74 100644
--- a/net/mac80211/rate.h
+++ b/net/mac80211/rate.h
@@ -41,7 +41,7 @@ static inline void rate_control_tx_status(struct ieee80211_local *local,
         struct ieee80211_sta *ista = &sta->sta;
         void *priv_sta = sta->rate_ctrl_priv;
 
-        if (!ref)
+        if (!ref || !test_sta_flag(sta, WLAN_STA_RATE_CONTROL))
                 return;
 
         ref->ops->tx_status(ref->priv, sband, ista, priv_sta, skb);
@@ -62,6 +62,7 @@ static inline void rate_control_rate_init(struct sta_info *sta)
         sband = local->hw.wiphy->bands[local->hw.conf.channel->band];
 
         ref->ops->rate_init(ref->priv, sband, ista, priv_sta);
+        set_sta_flag(sta, WLAN_STA_RATE_CONTROL);
 }
 
 static inline void rate_control_rate_update(struct ieee80211_local *local,
diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h
index 6f77f12dc3fc..bfed851d0d36 100644
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -52,6 +52,7 @@
  * @WLAN_STA_SP: Station is in a service period, so don't try to
  *      reply to other uAPSD trigger frames or PS-Poll.
  * @WLAN_STA_4ADDR_EVENT: 4-addr event was already sent for this frame.
+ * @WLAN_STA_RATE_CONTROL: rate control was initialized for this station.
  */
 enum ieee80211_sta_info_flags {
         WLAN_STA_AUTH,
@@ -71,6 +72,7 @@ enum ieee80211_sta_info_flags {
         WLAN_STA_UAPSD,
         WLAN_STA_SP,
         WLAN_STA_4ADDR_EVENT,
+        WLAN_STA_RATE_CONTROL,
 };
 
 enum ieee80211_sta_state {
diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c
index 611c3359b94d..2555816e7788 100644
--- a/net/netfilter/ipvs/ip_vs_core.c
+++ b/net/netfilter/ipvs/ip_vs_core.c
@@ -232,6 +232,7 @@ ip_vs_sched_persist(struct ip_vs_service *svc,
         __be16 dport = 0;               /* destination port to forward */
         unsigned int flags;
         struct ip_vs_conn_param param;
+        const union nf_inet_addr fwmark = { .ip = htonl(svc->fwmark) };
         union nf_inet_addr snet;        /* source network of the client,
                                            after masking */
 
@@ -267,7 +268,6 @@ ip_vs_sched_persist(struct ip_vs_service *svc,
         {
                 int protocol = iph.protocol;
                 const union nf_inet_addr *vaddr = &iph.daddr;
-                const union nf_inet_addr fwmark = { .ip = htonl(svc->fwmark) };
                 __be16 vport = 0;
 
                 if (dst_port == svc->port) {
diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
index 76613f5a55c0..ed86a3be678e 100644
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -404,19 +404,49 @@ static void __nf_conntrack_hash_insert(struct nf_conn *ct,
                            &net->ct.hash[repl_hash]);
 }
 
-void nf_conntrack_hash_insert(struct nf_conn *ct)
+int
+nf_conntrack_hash_check_insert(struct nf_conn *ct)
 {
         struct net *net = nf_ct_net(ct);
         unsigned int hash, repl_hash;
+        struct nf_conntrack_tuple_hash *h;
+        struct hlist_nulls_node *n;
         u16 zone;
 
         zone = nf_ct_zone(ct);
-        hash = hash_conntrack(net, zone, &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
-        repl_hash = hash_conntrack(net, zone, &ct->tuplehash[IP_CT_DIR_REPLY].tuple);
+        hash = hash_conntrack(net, zone,
+                              &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
+        repl_hash = hash_conntrack(net, zone,
+                                   &ct->tuplehash[IP_CT_DIR_REPLY].tuple);
+
+        spin_lock_bh(&nf_conntrack_lock);
 
+        /* See if there's one in the list already, including reverse */
+        hlist_nulls_for_each_entry(h, n, &net->ct.hash[hash], hnnode)
+                if (nf_ct_tuple_equal(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple,
+                                      &h->tuple) &&
+                    zone == nf_ct_zone(nf_ct_tuplehash_to_ctrack(h)))
+                        goto out;
+        hlist_nulls_for_each_entry(h, n, &net->ct.hash[repl_hash], hnnode)
+                if (nf_ct_tuple_equal(&ct->tuplehash[IP_CT_DIR_REPLY].tuple,
+                                      &h->tuple) &&
+                    zone == nf_ct_zone(nf_ct_tuplehash_to_ctrack(h)))
+                        goto out;
+
+        add_timer(&ct->timeout);
+        nf_conntrack_get(&ct->ct_general);
         __nf_conntrack_hash_insert(ct, hash, repl_hash);
+        NF_CT_STAT_INC(net, insert);
+        spin_unlock_bh(&nf_conntrack_lock);
+
+        return 0;
+
+out:
+        NF_CT_STAT_INC(net, insert_failed);
+        spin_unlock_bh(&nf_conntrack_lock);
+        return -EEXIST;
 }
-EXPORT_SYMBOL_GPL(nf_conntrack_hash_insert);
+EXPORT_SYMBOL_GPL(nf_conntrack_hash_check_insert);
 
 /* Confirm a connection given skb; places it in hash table */
 int
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index 9307b033c0c9..30c9d4ca0218 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -1367,15 +1367,12 @@ ctnetlink_create_conntrack(struct net *net, u16 zone,
                                                     nf_ct_protonum(ct));
                 if (helper == NULL) {
                         rcu_read_unlock();
-                        spin_unlock_bh(&nf_conntrack_lock);
 #ifdef CONFIG_MODULES
                         if (request_module("nfct-helper-%s", helpname) < 0) {
-                                spin_lock_bh(&nf_conntrack_lock);
                                 err = -EOPNOTSUPP;
                                 goto err1;
                         }
 
-                        spin_lock_bh(&nf_conntrack_lock);
                         rcu_read_lock();
                         helper = __nf_conntrack_helper_find(helpname,
                                                             nf_ct_l3num(ct),
@@ -1468,8 +1465,10 @@ ctnetlink_create_conntrack(struct net *net, u16 zone,
         if (tstamp)
                 tstamp->start = ktime_to_ns(ktime_get_real());
 
-        add_timer(&ct->timeout);
-        nf_conntrack_hash_insert(ct);
+        err = nf_conntrack_hash_check_insert(ct);
+        if (err < 0)
+                goto err2;
+
         rcu_read_unlock();
 
         return ct;
@@ -1490,6 +1489,7 @@ ctnetlink_new_conntrack(struct sock *ctnl, struct sk_buff *skb,
         struct nf_conntrack_tuple otuple, rtuple;
         struct nf_conntrack_tuple_hash *h = NULL;
         struct nfgenmsg *nfmsg = nlmsg_data(nlh);
+        struct nf_conn *ct;
         u_int8_t u3 = nfmsg->nfgen_family;
         u16 zone;
         int err;
@@ -1510,27 +1510,22 @@ ctnetlink_new_conntrack(struct sock *ctnl, struct sk_buff *skb,
                         return err;
         }
 
-        spin_lock_bh(&nf_conntrack_lock);
         if (cda[CTA_TUPLE_ORIG])
-                h = __nf_conntrack_find(net, zone, &otuple);
+                h = nf_conntrack_find_get(net, zone, &otuple);
         else if (cda[CTA_TUPLE_REPLY])
-                h = __nf_conntrack_find(net, zone, &rtuple);
+                h = nf_conntrack_find_get(net, zone, &rtuple);
 
         if (h == NULL) {
                 err = -ENOENT;
                 if (nlh->nlmsg_flags & NLM_F_CREATE) {
-                        struct nf_conn *ct;
                         enum ip_conntrack_events events;
 
                         ct = ctnetlink_create_conntrack(net, zone, cda, &otuple,
                                                         &rtuple, u3);
-                        if (IS_ERR(ct)) {
-                                err = PTR_ERR(ct);
-                                goto out_unlock;
-                        }
+                        if (IS_ERR(ct))
+                                return PTR_ERR(ct);
+
                         err = 0;
-                        nf_conntrack_get(&ct->ct_general);
-                        spin_unlock_bh(&nf_conntrack_lock);
                         if (test_bit(IPS_EXPECTED_BIT, &ct->status))
                                 events = IPCT_RELATED;
                         else
@@ -1545,23 +1540,19 @@ ctnetlink_new_conntrack(struct sock *ctnl, struct sk_buff *skb,
                                                       ct, NETLINK_CB(skb).pid,
                                                       nlmsg_report(nlh));
                         nf_ct_put(ct);
-                } else
-                        spin_unlock_bh(&nf_conntrack_lock);
+                }
 
                 return err;
         }
         /* implicit 'else' */
 
-        /* We manipulate the conntrack inside the global conntrack table lock,
-         * so there's no need to increase the refcount */
         err = -EEXIST;
+        ct = nf_ct_tuplehash_to_ctrack(h);
         if (!(nlh->nlmsg_flags & NLM_F_EXCL)) {
-                struct nf_conn *ct = nf_ct_tuplehash_to_ctrack(h);
-
+                spin_lock_bh(&nf_conntrack_lock);
                 err = ctnetlink_change_conntrack(ct, cda);
+                spin_unlock_bh(&nf_conntrack_lock);
                 if (err == 0) {
-                        nf_conntrack_get(&ct->ct_general);
-                        spin_unlock_bh(&nf_conntrack_lock);
                         nf_conntrack_eventmask_report((1 << IPCT_REPLY) |
                                                       (1 << IPCT_ASSURED) |
                                                       (1 << IPCT_HELPER) |
@@ -1570,15 +1561,10 @@ ctnetlink_new_conntrack(struct sock *ctnl, struct sk_buff *skb,
                                                       (1 << IPCT_MARK),
                                                       ct, NETLINK_CB(skb).pid,
                                                       nlmsg_report(nlh));
-                        nf_ct_put(ct);
-                } else
-                        spin_unlock_bh(&nf_conntrack_lock);
-
-                return err;
+                }
         }
 
-out_unlock:
-        spin_unlock_bh(&nf_conntrack_lock);
+        nf_ct_put(ct);
         return err;
 }
 
diff --git a/net/netfilter/nf_queue.c b/net/netfilter/nf_queue.c
index b3a7db678b8d..ce60cf0f6c11 100644
--- a/net/netfilter/nf_queue.c
+++ b/net/netfilter/nf_queue.c
@@ -203,6 +203,27 @@ err:
         return status;
 }
 
+#ifdef CONFIG_BRIDGE_NETFILTER
+/* When called from bridge netfilter, skb->data must point to MAC header
+ * before calling skb_gso_segment(). Else, original MAC header is lost
+ * and segmented skbs will be sent to wrong destination.
+ */
+static void nf_bridge_adjust_skb_data(struct sk_buff *skb)
+{
+        if (skb->nf_bridge)
+                __skb_push(skb, skb->network_header - skb->mac_header);
+}
+
+static void nf_bridge_adjust_segmented_data(struct sk_buff *skb)
+{
+        if (skb->nf_bridge)
+                __skb_pull(skb, skb->network_header - skb->mac_header);
+}
+#else
+#define nf_bridge_adjust_skb_data(s) do {} while (0)
+#define nf_bridge_adjust_segmented_data(s) do {} while (0)
+#endif
+
 int nf_queue(struct sk_buff *skb,
              struct list_head *elem,
              u_int8_t pf, unsigned int hook,
@@ -212,7 +233,7 @@ int nf_queue(struct sk_buff *skb,
              unsigned int queuenum)
 {
         struct sk_buff *segs;
-        int err;
+        int err = -EINVAL;
         unsigned int queued;
 
         if (!skb_is_gso(skb))
@@ -228,23 +249,25 @@ int nf_queue(struct sk_buff *skb,
                 break;
         }
 
+        nf_bridge_adjust_skb_data(skb);
         segs = skb_gso_segment(skb, 0);
         /* Does not use PTR_ERR to limit the number of error codes that can be
          * returned by nf_queue.  For instance, callers rely on -ECANCELED to mean
          * 'ignore this hook'.
          */
         if (IS_ERR(segs))
-                return -EINVAL;
-
+                goto out_err;
         queued = 0;
         err = 0;
         do {
                 struct sk_buff *nskb = segs->next;
 
                 segs->next = NULL;
-                if (err == 0)
+                if (err == 0) {
+                        nf_bridge_adjust_segmented_data(segs);
                         err = __nf_queue(segs, elem, pf, hook, indev,
                                            outdev, okfn, queuenum);
+                }
                 if (err == 0)
                         queued++;
                 else
@@ -252,11 +275,12 @@ int nf_queue(struct sk_buff *skb,
                 segs = nskb;
         } while (segs);
 
-        /* also free orig skb if only some segments were queued */
-        if (unlikely(err && queued))
-                err = 0;
-        if (err == 0)
+        if (queued) {
                 kfree_skb(skb);
+                return 0;
+        }
+  out_err:
+        nf_bridge_adjust_segmented_data(skb);
         return err;
 }
 
diff --git a/net/netfilter/xt_TEE.c b/net/netfilter/xt_TEE.c
index 3aae66facf9f..4d5057902839 100644
--- a/net/netfilter/xt_TEE.c
+++ b/net/netfilter/xt_TEE.c
@@ -152,9 +152,10 @@ tee_tg_route6(struct sk_buff *skb, const struct xt_tee_tginfo *info)
         fl6.flowlabel = ((iph->flow_lbl[0] & 0xF) << 16) |
                            (iph->flow_lbl[1] << 8) | iph->flow_lbl[2];
         dst = ip6_route_output(net, NULL, &fl6);
-        if (dst == NULL)
+        if (dst->error) {
+                dst_release(dst);
                 return false;
-
+        }
         skb_dst_drop(skb);
         skb_dst_set(skb, dst);
         skb->dev      = dst->dev;
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index e83d61ca78ca..5da548fa7ae9 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -501,9 +501,8 @@ tfifo_dequeue:
 
                 /* if more time remaining? */
                 if (cb->time_to_send <= psched_get_time()) {
-                        skb = qdisc_dequeue_tail(sch);
-                        if (unlikely(!skb))
-                                goto qdisc_dequeue;
+                        __skb_unlink(skb, &sch->q);
+                        sch->qstats.backlog -= qdisc_pkt_len(skb);
 
 #ifdef CONFIG_NET_CLS_ACT
                         /*
@@ -539,7 +538,6 @@ deliver:
                 qdisc_watchdog_schedule(&q->watchdog, cb->time_to_send);
         }
 
-qdisc_dequeue:
         if (q->qdisc) {
                 skb = q->qdisc->ops->dequeue(q->qdisc);
                 if (skb)
diff --git a/scripts/coccicheck b/scripts/coccicheck
index 3c2776466d87..823e972149e5 100755
--- a/scripts/coccicheck
+++ b/scripts/coccicheck
@@ -9,15 +9,10 @@ if [ "$C" = "1" -o "$C" = "2" ]; then
 #    FLAGS="-ignore_unknown_options -very_quiet"
 #    OPTIONS=$*
 
-    if [ "$KBUILD_EXTMOD" = "" ] ; then
-        # Workaround for Coccinelle < 0.2.3
-        FLAGS="-I $srctree/include -very_quiet"
-        shift $(( $# - 1 ))
-        OPTIONS=$1
-    else
-        echo M= is not currently supported when C=1 or C=2
-        exit 1
-    fi
+# Workaround for Coccinelle < 0.2.3
+        FLAGS="-I $srctree/include -very_quiet"
+        shift $(( $# - 1 ))
+        OPTIONS=$1
 else
     ONLINE=0
     FLAGS="-very_quiet"
diff --git a/scripts/depmod.sh b/scripts/depmod.sh
index a27235685949..2ae481703141 100755
--- a/scripts/depmod.sh
+++ b/scripts/depmod.sh
@@ -9,12 +9,6 @@ fi
 DEPMOD=$1
 KERNELRELEASE=$2
 
-if ! "$DEPMOD" -V 2>/dev/null | grep -q module-init-tools; then
-        echo "Warning: you may need to install module-init-tools" >&2
-        echo "See http://www.codemonkey.org.uk/docs/post-halloween-2.6.txt" >&2
-        sleep 1
-fi
-
 if ! test -r System.map -a -x "$DEPMOD"; then
         exit 0
 fi
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index d0de2a2c3a2d..b89efe6e4c85 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -46,11 +46,37 @@ struct devtable {
         void *function;
 };
 
+#define ___cat(a,b) a ## b
+#define __cat(a,b) ___cat(a,b)
+
+/* we need some special handling for this host tool running eventually on
+ * Darwin. The Mach-O section handling is a bit different than ELF section
+ * handling. The differnces in detail are:
+ *  a) we have segments which have sections
+ *  b) we need a API call to get the respective section symbols */
+#if defined(__MACH__)
+#include <mach-o/getsect.h>
+
+#define INIT_SECTION(name)  do {                                        \
+                unsigned long name ## _len;                             \
+                char *__cat(pstart_,name) = getsectdata("__TEXT",       \
+                        #name, &__cat(name,_len));                      \
+                char *__cat(pstop_,name) = __cat(pstart_,name) +        \
+                        __cat(name, _len);                              \
+                __cat(__start_,name) = (void *)__cat(pstart_,name);     \
+                __cat(__stop_,name) = (void *)__cat(pstop_,name);       \
+        } while (0)
+#define SECTION(name)   __attribute__((section("__TEXT, " #name)))
+
+struct devtable **__start___devtable, **__stop___devtable;
+#else
+#define INIT_SECTION(name) /* no-op for ELF */
+#define SECTION(name)   __attribute__((section(#name)))
+
 /* We construct a table of pointers in an ELF section (pointers generally
  * go unpadded by gcc).  ld creates boundary syms for us. */
 extern struct devtable *__start___devtable[], *__stop___devtable[];
-#define ___cat(a,b) a ## b
-#define __cat(a,b) ___cat(a,b)
+#endif /* __MACH__ */
 
 #if __GNUC__ == 3 && __GNUC_MINOR__ < 3
 # define __used                 __attribute__((__unused__))
@@ -65,8 +91,8 @@ extern struct devtable *__start___devtable[], *__stop___devtable[];
                                                 (type *)NULL,           \
                                                 (char *)NULL)),         \
                 sizeof(type), (function) };                             \
-        static struct devtable *__attribute__((section("__devtable"))) \
-                __used __cat(devtable_ptr,__LINE__) = &__cat(devtable,__LINE__)
+        static struct devtable *SECTION(__devtable) __used \
+                __cat(devtable_ptr,__LINE__) = &__cat(devtable,__LINE__)
 
 #define ADD(str, sep, cond, field)                              \
 do {                                                            \
@@ -1080,6 +1106,7 @@ void handle_moddevtable(struct module *mod, struct elf_info *info,
                 do_pnp_card_entries(symval, sym->st_size, mod);
         else {
                 struct devtable **p;
+                INIT_SECTION(__devtable);
 
                 for (p = __start___devtable; p < __stop___devtable; p++) {
                         if (sym_is(name, namelen, (*p)->device_id)) {
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 2bd594e6d1b4..9adb667dd31a 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -1494,6 +1494,13 @@ static int addend_386_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
         return 0;
 }
 
+#ifndef R_ARM_CALL
+#define R_ARM_CALL      28
+#endif
+#ifndef R_ARM_JUMP24
+#define R_ARM_JUMP24    29
+#endif
+
 static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
 {
         unsigned int r_typ = ELF_R_TYPE(r->r_info);
@@ -1505,6 +1512,8 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
                               (elf->symtab_start + ELF_R_SYM(r->r_info));
                 break;
         case R_ARM_PC24:
+        case R_ARM_CALL:
+        case R_ARM_JUMP24:
                 /* From ARM ABI: ((S + A) | T) - P */
                 r->r_addend = (int)(long)(elf->hdr +
                               sechdr->sh_offset +
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index f6cbc3ddb68b..3c6c0b14c807 100644
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -238,14 +238,14 @@ EOF
 fi
 
 # Build header package
-(cd $srctree; find . -name Makefile -o -name Kconfig\* -o -name \*.pl > /tmp/files$$)
-(cd $srctree; find arch/$SRCARCH/include include scripts -type f >> /tmp/files$$)
-(cd $objtree; find .config Module.symvers include scripts -type f >> /tmp/objfiles$$)
+(cd $srctree; find . -name Makefile -o -name Kconfig\* -o -name \*.pl > "$objtree/debian/hdrsrcfiles")
+(cd $srctree; find arch/$SRCARCH/include include scripts -type f >> "$objtree/debian/hdrsrcfiles")
+(cd $objtree; find .config Module.symvers include scripts -type f >> "$objtree/debian/hdrobjfiles")
 destdir=$kernel_headers_dir/usr/src/linux-headers-$version
 mkdir -p "$destdir"
-(cd $srctree; tar -c -f - -T /tmp/files$$) | (cd $destdir; tar -xf -)
-(cd $objtree; tar -c -f - -T /tmp/objfiles$$) | (cd $destdir; tar -xf -)
-rm -f /tmp/files$$ /tmp/objfiles$$
+(cd $srctree; tar -c -f - -T "$objtree/debian/hdrsrcfiles") | (cd $destdir; tar -xf -)
+(cd $objtree; tar -c -f - -T "$objtree/debian/hdrobjfiles") | (cd $destdir; tar -xf -)
+rm -f "$objtree/debian/hdrsrcfiles" "$objtree/debian/hdrobjfiles"
 arch=$(dpkg --print-architecture)
 
 cat <<EOF >> debian/control
diff --git a/sound/pci/azt3328.c b/sound/pci/azt3328.c
index 95ffa6a9db6e..496f14c1a731 100644
--- a/sound/pci/azt3328.c
+++ b/sound/pci/azt3328.c
@@ -2684,10 +2684,9 @@ snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
                 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
                 if (err < 0)
                         goto out_err;
+                opl3->private_data = chip;
         }
 
-        opl3->private_data = chip;
-
         sprintf(card->longname, "%s at 0x%lx, irq %i",
                 card->shortname, chip->ctrl_io, chip->irq);
 
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index c2c65f63bf06..684307372d73 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -1759,7 +1759,11 @@ static void put_vol_mute(struct hda_codec *codec, struct hda_amp_info *info,
         parm = ch ? AC_AMP_SET_RIGHT : AC_AMP_SET_LEFT;
         parm |= direction == HDA_OUTPUT ? AC_AMP_SET_OUTPUT : AC_AMP_SET_INPUT;
         parm |= index << AC_AMP_SET_INDEX_SHIFT;
-        parm |= val;
+        if ((val & HDA_AMP_MUTE) && !(info->amp_caps & AC_AMPCAP_MUTE) &&
+            (info->amp_caps & AC_AMPCAP_MIN_MUTE))
+                ; /* set the zero value as a fake mute */
+        else
+                parm |= val;
         snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE, parm);
         info->vol[ch] = val;
 }
@@ -2026,7 +2030,7 @@ int snd_hda_mixer_amp_tlv(struct snd_kcontrol *kcontrol, int op_flag,
         val1 = -((caps & AC_AMPCAP_OFFSET) >> AC_AMPCAP_OFFSET_SHIFT);
         val1 += ofs;
         val1 = ((int)val1) * ((int)val2);
-        if (min_mute)
+        if (min_mute || (caps & AC_AMPCAP_MIN_MUTE))
                 val2 |= TLV_DB_SCALE_MUTE;
         if (put_user(SNDRV_CTL_TLVT_DB_SCALE, _tlv))
                 return -EFAULT;
@@ -5114,7 +5118,7 @@ static int fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid,
         const char *pfx = "", *sfx = "";
 
         /* handle as a speaker if it's a fixed line-out */
-        if (!strcmp(name, "Line-Out") && attr == INPUT_PIN_ATTR_INT)
+        if (!strcmp(name, "Line Out") && attr == INPUT_PIN_ATTR_INT)
                 name = "Speaker";
         /* check the location */
         switch (attr) {
@@ -5173,7 +5177,7 @@ int snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid,
 
         switch (get_defcfg_device(def_conf)) {
         case AC_JACK_LINE_OUT:
-                return fill_audio_out_name(codec, nid, cfg, "Line-Out",
+                return fill_audio_out_name(codec, nid, cfg, "Line Out",
                                            label, maxlen, indexp);
         case AC_JACK_SPEAKER:
                 return fill_audio_out_name(codec, nid, cfg, "Speaker",
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h
index e9f71dc0d464..f0f1943a4b2c 100644
--- a/sound/pci/hda/hda_codec.h
+++ b/sound/pci/hda/hda_codec.h
@@ -298,6 +298,9 @@ enum {
 #define AC_AMPCAP_MUTE                  (1<<31)    /* mute capable */
 #define AC_AMPCAP_MUTE_SHIFT            31
 
+/* driver-specific amp-caps: using bits 24-30 */
+#define AC_AMPCAP_MIN_MUTE              (1 << 30) /* min-volume = mute */
+
 /* Connection list */
 #define AC_CLIST_LENGTH                 (0x7f<<0)
 #define AC_CLIST_LONG                   (1<<7)
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index bc5a993d1146..c83ccdba1e5a 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -609,7 +609,7 @@ static int add_output(struct hda_codec *codec, hda_nid_t dac, int idx,
                 "Front Speaker", "Surround Speaker", "Bass Speaker"
         };
         static const char * const line_outs[] = {
-                "Front Line-Out", "Surround Line-Out", "Bass Line-Out"
+                "Front Line Out", "Surround Line Out", "Bass Line Out"
         };
 
         fix_volume_caps(codec, dac);
@@ -635,7 +635,7 @@ static int add_output(struct hda_codec *codec, hda_nid_t dac, int idx,
                 if (num_ctls > 1)
                         name = line_outs[idx];
                 else
-                        name = "Line-Out";
+                        name = "Line Out";
                 break;
         }
 
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index a7a5733aa4d2..d29d6d377904 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -3482,7 +3482,7 @@ static int cx_automute_mode_info(struct snd_kcontrol *kcontrol,
                 "Disabled", "Enabled"
         };
         static const char * const texts3[] = {
-                "Disabled", "Speaker Only", "Line-Out+Speaker"
+                "Disabled", "Speaker Only", "Line Out+Speaker"
         };
         const char * const *texts;
 
@@ -4079,7 +4079,8 @@ static int cx_auto_add_volume_idx(struct hda_codec *codec, const char *basename,
                 err = snd_hda_ctl_add(codec, nid, kctl);
                 if (err < 0)
                         return err;
-                if (!(query_amp_caps(codec, nid, hda_dir) & AC_AMPCAP_MUTE))
+                if (!(query_amp_caps(codec, nid, hda_dir) &
+                      (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE)))
                         break;
         }
         return 0;
@@ -4379,6 +4380,22 @@ static const struct snd_pci_quirk cxt_fixups[] = {
         {}
 };
 
+/* add "fake" mute amp-caps to DACs on cx5051 so that mixer mute switches
+ * can be created (bko#42825)
+ */
+static void add_cx5051_fake_mutes(struct hda_codec *codec)
+{
+        static hda_nid_t out_nids[] = {
+                0x10, 0x11, 0
+        };
+        hda_nid_t *p;
+
+        for (p = out_nids; *p; p++)
+                snd_hda_override_amp_caps(codec, *p, HDA_OUTPUT,
+                                          AC_AMPCAP_MIN_MUTE |
+                                          query_amp_caps(codec, *p, HDA_OUTPUT));
+}
+
 static int patch_conexant_auto(struct hda_codec *codec)
 {
         struct conexant_spec *spec;
@@ -4397,6 +4414,9 @@ static int patch_conexant_auto(struct hda_codec *codec)
         case 0x14f15045:
                 spec->single_adc_amp = 1;
                 break;
+        case 0x14f15051:
+                add_cx5051_fake_mutes(codec);
+                break;
         }
 
         apply_pin_fixup(codec, cxt_fixups, cxt_pincfg_tbl);
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 1358987c49d8..f286bb8fda13 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -80,6 +80,8 @@ enum {
         ALC_AUTOMUTE_MIXER,     /* mute/unmute mixer widget AMP */
 };
 
+#define MAX_VOL_NIDS    0x40
+
 struct alc_spec {
         /* codec parameterization */
         const struct snd_kcontrol_new *mixers[5];       /* mixer arrays */
@@ -118,8 +120,8 @@ struct alc_spec {
         const hda_nid_t *capsrc_nids;
         hda_nid_t dig_in_nid;           /* digital-in NID; optional */
         hda_nid_t mixer_nid;            /* analog-mixer NID */
-        DECLARE_BITMAP(vol_ctls, 0x20 << 1);
-        DECLARE_BITMAP(sw_ctls, 0x20 << 1);
+        DECLARE_BITMAP(vol_ctls, MAX_VOL_NIDS << 1);
+        DECLARE_BITMAP(sw_ctls, MAX_VOL_NIDS << 1);
 
         /* capture setup for dynamic dual-adc switch */
         hda_nid_t cur_adc;
@@ -800,7 +802,7 @@ static int alc_automute_mode_info(struct snd_kcontrol *kcontrol,
                 "Disabled", "Enabled"
         };
         static const char * const texts3[] = {
-                "Disabled", "Speaker Only", "Line-Out+Speaker"
+                "Disabled", "Speaker Only", "Line Out+Speaker"
         };
         const char * const *texts;
 
@@ -1854,7 +1856,7 @@ static const char * const alc_slave_vols[] = {
         "Headphone Playback Volume",
         "Speaker Playback Volume",
         "Mono Playback Volume",
-        "Line-Out Playback Volume",
+        "Line Out Playback Volume",
         "CLFE Playback Volume",
         "Bass Speaker Playback Volume",
         "PCM Playback Volume",
@@ -1871,7 +1873,7 @@ static const char * const alc_slave_sws[] = {
         "Speaker Playback Switch",
         "Mono Playback Switch",
         "IEC958 Playback Switch",
-        "Line-Out Playback Switch",
+        "Line Out Playback Switch",
         "CLFE Playback Switch",
         "Bass Speaker Playback Switch",
         "PCM Playback Switch",
@@ -3149,7 +3151,10 @@ static int alc_auto_fill_dac_nids(struct hda_codec *codec)
 static inline unsigned int get_ctl_pos(unsigned int data)
 {
         hda_nid_t nid = get_amp_nid_(data);
-        unsigned int dir = get_amp_direction_(data);
+        unsigned int dir;
+        if (snd_BUG_ON(nid >= MAX_VOL_NIDS))
+                return 0;
+        dir = get_amp_direction_(data);
         return (nid << 1) | dir;
 }
 
@@ -3792,7 +3797,7 @@ static void alc_auto_init_input_src(struct hda_codec *codec)
         else
                 nums = spec->num_adc_nids;
         for (c = 0; c < nums; c++)
-                alc_mux_select(codec, 0, spec->cur_mux[c], true);
+                alc_mux_select(codec, c, spec->cur_mux[c], true);
 }
 
 /* add mic boosts if needed */
@@ -4436,12 +4441,20 @@ static void alc889_fixup_dac_route(struct hda_codec *codec,
                                    const struct alc_fixup *fix, int action)
 {
         if (action == ALC_FIXUP_ACT_PRE_PROBE) {
+                /* fake the connections during parsing the tree */
                 hda_nid_t conn1[2] = { 0x0c, 0x0d };
                 hda_nid_t conn2[2] = { 0x0e, 0x0f };
                 snd_hda_override_conn_list(codec, 0x14, 2, conn1);
                 snd_hda_override_conn_list(codec, 0x15, 2, conn1);
                 snd_hda_override_conn_list(codec, 0x18, 2, conn2);
                 snd_hda_override_conn_list(codec, 0x1a, 2, conn2);
+        } else if (action == ALC_FIXUP_ACT_PROBE) {
+                /* restore the connections */
+                hda_nid_t conn[5] = { 0x0c, 0x0d, 0x0e, 0x0f, 0x26 };
+                snd_hda_override_conn_list(codec, 0x14, 5, conn);
+                snd_hda_override_conn_list(codec, 0x15, 5, conn);
+                snd_hda_override_conn_list(codec, 0x18, 5, conn);
+                snd_hda_override_conn_list(codec, 0x1a, 5, conn);
         }
 }
 
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 6345df131a00..9dbb5735d778 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -4629,7 +4629,7 @@ static void stac92xx_hp_detect(struct hda_codec *codec)
                 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
                 if (no_hp_sensing(spec, i))
                         continue;
-                if (presence)
+                if (1 /*presence*/)
                         stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
 #if 0 /* FIXME */
 /* Resetting the pinctl like below may lead to (a sort of) regressions
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 5ef70b5d27e4..278c0a0575f5 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -146,13 +146,10 @@ static const struct snd_kcontrol_new ak4642_snd_controls[] = {
 
         SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
                          0, 0xFF, 1, out_tlv),
-
-        SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
 };
 
-static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
-        SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
-};
+static const struct snd_kcontrol_new ak4642_headphone_control =
+        SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
 
 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
         SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
@@ -165,13 +162,12 @@ static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
         SND_SOC_DAPM_OUTPUT("HPOUTR"),
         SND_SOC_DAPM_OUTPUT("LINEOUT"),
 
-        SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
-                           &ak4642_hpout_mixer_controls[0],
-                           ARRAY_SIZE(ak4642_hpout_mixer_controls)),
+        SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
+        SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
+        SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
+                            &ak4642_headphone_control),
 
-        SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
-                           &ak4642_hpout_mixer_controls[0],
-                           ARRAY_SIZE(ak4642_hpout_mixer_controls)),
+        SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
 
         SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
                            &ak4642_lout_mixer_controls[0],
@@ -184,12 +180,17 @@ static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
 static const struct snd_soc_dapm_route ak4642_intercon[] = {
 
         /* Outputs */
-        {"HPOUTL", NULL, "HPOUTL Mixer"},
-        {"HPOUTR", NULL, "HPOUTR Mixer"},
+        {"HPOUTL", NULL, "HPL Out"},
+        {"HPOUTR", NULL, "HPR Out"},
         {"LINEOUT", NULL, "LINEOUT Mixer"},
 
-        {"HPOUTL Mixer", "DACH", "DAC"},
-        {"HPOUTR Mixer", "DACH", "DAC"},
+        {"HPL Out", NULL, "Headphone Enable"},
+        {"HPR Out", NULL, "Headphone Enable"},
+
+        {"Headphone Enable", "Switch", "DACH"},
+
+        {"DACH", NULL, "DAC"},
+
         {"LINEOUT Mixer", "DACL", "DAC"},
 };
 
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 29c4b02c4790..0ac228b7dc04 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -2564,7 +2564,7 @@ static int dsp2_event(struct snd_soc_dapm_widget *w,
         return 0;
 }
 
-static const char *st_text[] = { "None", "Right", "Left" };
+static const char *st_text[] = { "None", "Left", "Right" };
 
 static const struct soc_enum str_enum =
         SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_1, 2, 3, st_text);
diff --git a/sound/soc/imx/imx-ssi.c b/sound/soc/imx/imx-ssi.c
index 01d1f749cf02..b6adbed6e506 100644
--- a/sound/soc/imx/imx-ssi.c
+++ b/sound/soc/imx/imx-ssi.c
@@ -112,7 +112,7 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
                 break;
         case SND_SOC_DAIFMT_DSP_A:
                 /* data on rising edge of bclk, frame high 1clk before data */
-                strcr |= SSI_STCR_TFSL | SSI_STCR_TEFS;
+                strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
                 break;
         }
 
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 1f55ded4047f..1315663c1c09 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -3068,9 +3068,13 @@ static void soc_dapm_shutdown_codec(struct snd_soc_dapm_context *dapm)
          * standby.
          */
         if (powerdown) {
-                snd_soc_dapm_set_bias_level(dapm, SND_SOC_BIAS_PREPARE);
+                if (dapm->bias_level == SND_SOC_BIAS_ON)
+                        snd_soc_dapm_set_bias_level(dapm,
+                                                    SND_SOC_BIAS_PREPARE);
                 dapm_seq_run(dapm, &down_list, 0, false);
-                snd_soc_dapm_set_bias_level(dapm, SND_SOC_BIAS_STANDBY);
+                if (dapm->bias_level == SND_SOC_BIAS_PREPARE)
+                        snd_soc_dapm_set_bias_level(dapm,
+                                                    SND_SOC_BIAS_STANDBY);
         }
 }
 
@@ -3083,7 +3087,9 @@ void snd_soc_dapm_shutdown(struct snd_soc_card *card)
 
         list_for_each_entry(codec, &card->codec_dev_list, list) {
                 soc_dapm_shutdown_codec(&codec->dapm);
-                snd_soc_dapm_set_bias_level(&codec->dapm, SND_SOC_BIAS_OFF);
+                if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY)
+                        snd_soc_dapm_set_bias_level(&codec->dapm,
+                                                    SND_SOC_BIAS_OFF);
         }
 }
 
diff --git a/sound/usb/caiaq/audio.c b/sound/usb/caiaq/audio.c
index 2cf87f5afed4..fde9a7a29cb6 100644
--- a/sound/usb/caiaq/audio.c
+++ b/sound/usb/caiaq/audio.c
@@ -311,8 +311,10 @@ snd_usb_caiaq_pcm_pointer(struct snd_pcm_substream *sub)
 
         spin_lock(&dev->spinlock);
 
-        if (dev->input_panic || dev->output_panic)
+        if (dev->input_panic || dev->output_panic) {
                 ptr = SNDRV_PCM_POS_XRUN;
+                goto unlock;
+        }
 
         if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK)
                 ptr = bytes_to_frames(sub->runtime,
@@ -321,6 +323,7 @@ snd_usb_caiaq_pcm_pointer(struct snd_pcm_substream *sub)
                 ptr = bytes_to_frames(sub->runtime,
                                         dev->audio_in_buf_pos[index]);
 
+unlock:
         spin_unlock(&dev->spinlock);
         return ptr;
 }
diff --git a/sound/usb/card.h b/sound/usb/card.h
index a39edcc32a93..da5fa1ac4eda 100644
--- a/sound/usb/card.h
+++ b/sound/usb/card.h
@@ -1,6 +1,7 @@
 #ifndef __USBAUDIO_CARD_H
 #define __USBAUDIO_CARD_H
 
+#define MAX_NR_RATES    1024
 #define MAX_PACKS       20
 #define MAX_PACKS_HS    (MAX_PACKS * 8) /* in high speed mode */
 #define MAX_URBS        8
diff --git a/sound/usb/format.c b/sound/usb/format.c
index e09aba19375c..ddfef57c4c9f 100644
--- a/sound/usb/format.c
+++ b/sound/usb/format.c
@@ -209,8 +209,6 @@ static int parse_audio_format_rates_v1(struct snd_usb_audio *chip, struct audiof
         return 0;
 }
 
-#define MAX_UAC2_NR_RATES 1024
-
 /*
  * Helper function to walk the array of sample rate triplets reported by
  * the device. The problem is that we need to parse whole array first to
@@ -255,7 +253,7 @@ static int parse_uac2_sample_rate_range(struct audioformat *fp, int nr_triplets,
                         fp->rates |= snd_pcm_rate_to_rate_bit(rate);
 
                         nr_rates++;
-                        if (nr_rates >= MAX_UAC2_NR_RATES) {
+                        if (nr_rates >= MAX_NR_RATES) {
                                 snd_printk(KERN_ERR "invalid uac2 rates\n");
                                 break;
                         }
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index a3ddac0deffd..27817266867a 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -132,10 +132,14 @@ static int create_fixed_stream_quirk(struct snd_usb_audio *chip,
         unsigned *rate_table = NULL;
 
         fp = kmemdup(quirk->data, sizeof(*fp), GFP_KERNEL);
-        if (! fp) {
+        if (!fp) {
                 snd_printk(KERN_ERR "cannot memdup\n");
                 return -ENOMEM;
         }
+        if (fp->nr_rates > MAX_NR_RATES) {
+                kfree(fp);
+                return -EINVAL;
+        }
         if (fp->nr_rates > 0) {
                 rate_table = kmemdup(fp->rate_table,
                                      sizeof(int) * fp->nr_rates, GFP_KERNEL);
diff --git a/tools/perf/util/event.c b/tools/perf/util/event.c
index 2044324b755a..2a6f33cd888c 100644
--- a/tools/perf/util/event.c
+++ b/tools/perf/util/event.c
@@ -74,6 +74,7 @@ static pid_t perf_event__get_comm_tgid(pid_t pid, char *comm, size_t len)
                         if (size >= len)
                                 size = len - 1;
                         memcpy(comm, name, size);
+                        comm[size] = '\0';
 
                 } else if (memcmp(bf, "Tgid:", 5) == 0) {
                         char *tgids = bf + 5;
diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index 3f16e08a5c8d..ea32a061f1c8 100644
--- a/tools/perf/util/evlist.c
+++ b/tools/perf/util/evlist.c
@@ -349,6 +349,10 @@ struct perf_evsel *perf_evlist__id2evsel(struct perf_evlist *evlist, u64 id)
         hlist_for_each_entry(sid, pos, head, node)
                 if (sid->id == id)
                         return sid->evsel;
+
+        if (!perf_evlist__sample_id_all(evlist))
+                return list_entry(evlist->entries.next, struct perf_evsel, node);
+
         return NULL;
 }
 
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index 29cb65459811..e33554a562b3 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -1867,6 +1867,12 @@ static int convert_to_probe_trace_events(struct perf_probe_event *pev,
                            tev->point.symbol);
                 ret = -ENOENT;
                 goto error;
+        } else if (tev->point.offset > sym->end - sym->start) {
+                pr_warning("Offset specified is greater than size of %s\n",
+                           tev->point.symbol);
+                ret = -ENOENT;
+                goto error;
+
         }
 
         return 1;
diff --git a/tools/perf/util/probe-finder.c b/tools/perf/util/probe-finder.c
index 5d732621a462..74bd2e63c4b4 100644
--- a/tools/perf/util/probe-finder.c
+++ b/tools/perf/util/probe-finder.c
@@ -672,7 +672,7 @@ static int find_variable(Dwarf_Die *sc_die, struct probe_finder *pf)
 static int convert_to_trace_point(Dwarf_Die *sp_die, Dwarf_Addr paddr,
                                   bool retprobe, struct probe_trace_point *tp)
 {
-        Dwarf_Addr eaddr;
+        Dwarf_Addr eaddr, highaddr;
         const char *name;
 
         /* Copy the name of probe point */
@@ -683,6 +683,16 @@ static int convert_to_trace_point(Dwarf_Die *sp_die, Dwarf_Addr paddr,
                                    dwarf_diename(sp_die));
                         return -ENOENT;
                 }
+                if (dwarf_highpc(sp_die, &highaddr) != 0) {
+                        pr_warning("Failed to get end address of %s\n",
+                                   dwarf_diename(sp_die));
+                        return -ENOENT;
+                }
+                if (paddr > highaddr) {
+                        pr_warning("Offset specified is greater than size of %s\n",
+                                   dwarf_diename(sp_die));
+                        return -EINVAL;
+                }
                 tp->symbol = strdup(name);
                 if (tp->symbol == NULL)
                         return -ENOMEM;
diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl
index 62a134dc421a..9507c4b251a8 100755
--- a/tools/testing/ktest/ktest.pl
+++ b/tools/testing/ktest/ktest.pl
@@ -3244,9 +3244,11 @@ sub make_min_config {
         $in_bisect = 1;
 
         my $failed = 0;
-        build "oldconfig";
-        start_monitor_and_boot or $failed = 1;
-        end_monitor;
+        build "oldconfig" or $failed = 1;
+        if (!$failed) {
+                start_monitor_and_boot or $failed = 1;
+                end_monitor;
+        }
 
         $in_bisect = 0;