diff options
-rw-r--r-- | Documentation/devicetree/bindings/misc/at25.txt | 21 | ||||
-rw-r--r-- | Documentation/misc-devices/mei/mei.txt | 14 | ||||
-rw-r--r-- | drivers/char/bsr.c | 6 | ||||
-rw-r--r-- | drivers/misc/eeprom/at25.c | 61 | ||||
-rw-r--r-- | drivers/misc/hpilo.c | 33 | ||||
-rw-r--r-- | drivers/misc/hpilo.h | 4 | ||||
-rw-r--r-- | drivers/misc/mei/init.c | 4 | ||||
-rw-r--r-- | drivers/misc/mei/interface.c | 85 | ||||
-rw-r--r-- | drivers/misc/mei/interface.h | 18 | ||||
-rw-r--r-- | drivers/misc/mei/interrupt.c | 169 | ||||
-rw-r--r-- | drivers/misc/mei/iorw.c | 8 | ||||
-rw-r--r-- | drivers/misc/mei/main.c | 48 | ||||
-rw-r--r-- | drivers/misc/mei/mei_dev.h | 24 | ||||
-rw-r--r-- | drivers/misc/mei/wd.c | 6 |
14 files changed, 242 insertions, 259 deletions
diff --git a/Documentation/devicetree/bindings/misc/at25.txt b/Documentation/devicetree/bindings/misc/at25.txt new file mode 100644 index 000000000000..ab3c327929dd --- /dev/null +++ b/Documentation/devicetree/bindings/misc/at25.txt | |||
@@ -0,0 +1,21 @@ | |||
1 | Atmel AT25 eeprom | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : "atmel,at25". | ||
5 | - reg : chip select number | ||
6 | - spi-max-frequency : max spi frequency to use | ||
7 | |||
8 | - at25,byte-len : total eeprom size in bytes | ||
9 | - at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h | ||
10 | - at25,page-size : size of the eeprom page | ||
11 | |||
12 | Examples: | ||
13 | at25@0 { | ||
14 | compatible = "atmel,at25"; | ||
15 | reg = <0> | ||
16 | spi-max-frequency = <5000000>; | ||
17 | |||
18 | at25,byte-len = <0x8000>; | ||
19 | at25,addr-mode = <2>; | ||
20 | at25,page-size = <64>; | ||
21 | }; | ||
diff --git a/Documentation/misc-devices/mei/mei.txt b/Documentation/misc-devices/mei/mei.txt index 2785697da59d..6ec702950719 100644 --- a/Documentation/misc-devices/mei/mei.txt +++ b/Documentation/misc-devices/mei/mei.txt | |||
@@ -50,25 +50,25 @@ Intel MEI Driver | |||
50 | The driver exposes a misc device called /dev/mei. | 50 | The driver exposes a misc device called /dev/mei. |
51 | 51 | ||
52 | An application maintains communication with an Intel ME feature while | 52 | An application maintains communication with an Intel ME feature while |
53 | /dev/mei is open. The binding to a specific features is performed by calling | 53 | /dev/mei is open. The binding to a specific feature is performed by calling |
54 | MEI_CONNECT_CLIENT_IOCTL, which passes the desired UUID. | 54 | MEI_CONNECT_CLIENT_IOCTL, which passes the desired UUID. |
55 | The number of instances of an Intel ME feature that can be opened | 55 | The number of instances of an Intel ME feature that can be opened |
56 | at the same time depends on the Intel ME feature, but most of the | 56 | at the same time depends on the Intel ME feature, but most of the |
57 | features allow only a single instance. | 57 | features allow only a single instance. |
58 | 58 | ||
59 | The Intel AMT Host Interface (Intel AMTHI) feature supports multiple | 59 | The Intel AMT Host Interface (Intel AMTHI) feature supports multiple |
60 | simultaneous user applications. Therefore, the Intel MEI driver handles | 60 | simultaneous user connected applications. The Intel MEI driver |
61 | this internally by maintaining request queues for the applications. | 61 | handles this internally by maintaining request queues for the applications. |
62 | 62 | ||
63 | The driver is oblivious to data that is passed between firmware feature | 63 | The driver is transparent to data that are passed between firmware feature |
64 | and host application. | 64 | and host application. |
65 | 65 | ||
66 | Because some of the Intel ME features can change the system | 66 | Because some of the Intel ME features can change the system |
67 | configuration, the driver by default allows only a privileged | 67 | configuration, the driver by default allows only a privileged |
68 | user to access it. | 68 | user to access it. |
69 | 69 | ||
70 | A code snippet for an application communicating with | 70 | A code snippet for an application communicating with Intel AMTHI client: |
71 | Intel AMTHI client: | 71 | |
72 | struct mei_connect_client_data data; | 72 | struct mei_connect_client_data data; |
73 | fd = open(MEI_DEVICE); | 73 | fd = open(MEI_DEVICE); |
74 | 74 | ||
@@ -185,7 +185,7 @@ The Intel AMT Watchdog is composed of two parts: | |||
185 | 2) Intel MEI driver - connects to the watchdog feature, configures the | 185 | 2) Intel MEI driver - connects to the watchdog feature, configures the |
186 | watchdog and sends the heartbeats. | 186 | watchdog and sends the heartbeats. |
187 | 187 | ||
188 | The Intel MEI driver uses the kernel watchdog to configure the Intel AMT | 188 | The Intel MEI driver uses the kernel watchdog API to configure the Intel AMT |
189 | Watchdog and to send heartbeats to it. The default timeout of the | 189 | Watchdog and to send heartbeats to it. The default timeout of the |
190 | watchdog is 120 seconds. | 190 | watchdog is 120 seconds. |
191 | 191 | ||
diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c index 0c688232aab3..97467053a01b 100644 --- a/drivers/char/bsr.c +++ b/drivers/char/bsr.c | |||
@@ -297,7 +297,6 @@ static int __init bsr_init(void) | |||
297 | struct device_node *np; | 297 | struct device_node *np; |
298 | dev_t bsr_dev; | 298 | dev_t bsr_dev; |
299 | int ret = -ENODEV; | 299 | int ret = -ENODEV; |
300 | int result; | ||
301 | 300 | ||
302 | np = of_find_compatible_node(NULL, NULL, "ibm,bsr"); | 301 | np = of_find_compatible_node(NULL, NULL, "ibm,bsr"); |
303 | if (!np) | 302 | if (!np) |
@@ -306,13 +305,14 @@ static int __init bsr_init(void) | |||
306 | bsr_class = class_create(THIS_MODULE, "bsr"); | 305 | bsr_class = class_create(THIS_MODULE, "bsr"); |
307 | if (IS_ERR(bsr_class)) { | 306 | if (IS_ERR(bsr_class)) { |
308 | printk(KERN_ERR "class_create() failed for bsr_class\n"); | 307 | printk(KERN_ERR "class_create() failed for bsr_class\n"); |
308 | ret = PTR_ERR(bsr_class); | ||
309 | goto out_err_1; | 309 | goto out_err_1; |
310 | } | 310 | } |
311 | bsr_class->dev_attrs = bsr_dev_attrs; | 311 | bsr_class->dev_attrs = bsr_dev_attrs; |
312 | 312 | ||
313 | result = alloc_chrdev_region(&bsr_dev, 0, BSR_MAX_DEVS, "bsr"); | 313 | ret = alloc_chrdev_region(&bsr_dev, 0, BSR_MAX_DEVS, "bsr"); |
314 | bsr_major = MAJOR(bsr_dev); | 314 | bsr_major = MAJOR(bsr_dev); |
315 | if (result < 0) { | 315 | if (ret < 0) { |
316 | printk(KERN_ERR "alloc_chrdev_region() failed for bsr\n"); | 316 | printk(KERN_ERR "alloc_chrdev_region() failed for bsr\n"); |
317 | goto out_err_2; | 317 | goto out_err_2; |
318 | } | 318 | } |
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c index 0842c2994ee2..25003d6ceb56 100644 --- a/drivers/misc/eeprom/at25.c +++ b/drivers/misc/eeprom/at25.c | |||
@@ -19,7 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/spi/spi.h> | 20 | #include <linux/spi/spi.h> |
21 | #include <linux/spi/eeprom.h> | 21 | #include <linux/spi/eeprom.h> |
22 | 22 | #include <linux/of.h> | |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * NOTE: this is an *EEPROM* driver. The vagaries of product naming | 25 | * NOTE: this is an *EEPROM* driver. The vagaries of product naming |
@@ -305,25 +305,54 @@ static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf, | |||
305 | static int at25_probe(struct spi_device *spi) | 305 | static int at25_probe(struct spi_device *spi) |
306 | { | 306 | { |
307 | struct at25_data *at25 = NULL; | 307 | struct at25_data *at25 = NULL; |
308 | const struct spi_eeprom *chip; | 308 | struct spi_eeprom chip; |
309 | struct device_node *np = spi->dev.of_node; | ||
309 | int err; | 310 | int err; |
310 | int sr; | 311 | int sr; |
311 | int addrlen; | 312 | int addrlen; |
312 | 313 | ||
313 | /* Chip description */ | 314 | /* Chip description */ |
314 | chip = spi->dev.platform_data; | 315 | if (!spi->dev.platform_data) { |
315 | if (!chip) { | 316 | if (np) { |
316 | dev_dbg(&spi->dev, "no chip description\n"); | 317 | u32 val; |
317 | err = -ENODEV; | 318 | |
318 | goto fail; | 319 | memset(&chip, 0, sizeof(chip)); |
319 | } | 320 | strncpy(chip.name, np->name, 10); |
321 | |||
322 | err = of_property_read_u32(np, "at25,byte-len", &val); | ||
323 | if (err) { | ||
324 | dev_dbg(&spi->dev, "invalid chip dt description\n"); | ||
325 | goto fail; | ||
326 | } | ||
327 | chip.byte_len = val; | ||
328 | |||
329 | err = of_property_read_u32(np, "at25,addr-mode", &val); | ||
330 | if (err) { | ||
331 | dev_dbg(&spi->dev, "invalid chip dt description\n"); | ||
332 | goto fail; | ||
333 | } | ||
334 | chip.flags = (u16)val; | ||
335 | |||
336 | err = of_property_read_u32(np, "at25,page-size", &val); | ||
337 | if (err) { | ||
338 | dev_dbg(&spi->dev, "invalid chip dt description\n"); | ||
339 | goto fail; | ||
340 | } | ||
341 | chip.page_size = (u16)val; | ||
342 | } else { | ||
343 | dev_dbg(&spi->dev, "no chip description\n"); | ||
344 | err = -ENODEV; | ||
345 | goto fail; | ||
346 | } | ||
347 | } else | ||
348 | chip = *(struct spi_eeprom *)spi->dev.platform_data; | ||
320 | 349 | ||
321 | /* For now we only support 8/16/24 bit addressing */ | 350 | /* For now we only support 8/16/24 bit addressing */ |
322 | if (chip->flags & EE_ADDR1) | 351 | if (chip.flags & EE_ADDR1) |
323 | addrlen = 1; | 352 | addrlen = 1; |
324 | else if (chip->flags & EE_ADDR2) | 353 | else if (chip.flags & EE_ADDR2) |
325 | addrlen = 2; | 354 | addrlen = 2; |
326 | else if (chip->flags & EE_ADDR3) | 355 | else if (chip.flags & EE_ADDR3) |
327 | addrlen = 3; | 356 | addrlen = 3; |
328 | else { | 357 | else { |
329 | dev_dbg(&spi->dev, "unsupported address type\n"); | 358 | dev_dbg(&spi->dev, "unsupported address type\n"); |
@@ -348,7 +377,7 @@ static int at25_probe(struct spi_device *spi) | |||
348 | } | 377 | } |
349 | 378 | ||
350 | mutex_init(&at25->lock); | 379 | mutex_init(&at25->lock); |
351 | at25->chip = *chip; | 380 | at25->chip = chip; |
352 | at25->spi = spi_dev_get(spi); | 381 | at25->spi = spi_dev_get(spi); |
353 | dev_set_drvdata(&spi->dev, at25); | 382 | dev_set_drvdata(&spi->dev, at25); |
354 | at25->addrlen = addrlen; | 383 | at25->addrlen = addrlen; |
@@ -369,7 +398,7 @@ static int at25_probe(struct spi_device *spi) | |||
369 | at25->mem.read = at25_mem_read; | 398 | at25->mem.read = at25_mem_read; |
370 | 399 | ||
371 | at25->bin.size = at25->chip.byte_len; | 400 | at25->bin.size = at25->chip.byte_len; |
372 | if (!(chip->flags & EE_READONLY)) { | 401 | if (!(chip.flags & EE_READONLY)) { |
373 | at25->bin.write = at25_bin_write; | 402 | at25->bin.write = at25_bin_write; |
374 | at25->bin.attr.mode |= S_IWUSR; | 403 | at25->bin.attr.mode |= S_IWUSR; |
375 | at25->mem.write = at25_mem_write; | 404 | at25->mem.write = at25_mem_write; |
@@ -379,8 +408,8 @@ static int at25_probe(struct spi_device *spi) | |||
379 | if (err) | 408 | if (err) |
380 | goto fail; | 409 | goto fail; |
381 | 410 | ||
382 | if (chip->setup) | 411 | if (chip.setup) |
383 | chip->setup(&at25->mem, chip->context); | 412 | chip.setup(&at25->mem, chip.context); |
384 | 413 | ||
385 | dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n", | 414 | dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n", |
386 | (at25->bin.size < 1024) | 415 | (at25->bin.size < 1024) |
@@ -388,7 +417,7 @@ static int at25_probe(struct spi_device *spi) | |||
388 | : (at25->bin.size / 1024), | 417 | : (at25->bin.size / 1024), |
389 | (at25->bin.size < 1024) ? "Byte" : "KByte", | 418 | (at25->bin.size < 1024) ? "Byte" : "KByte", |
390 | at25->chip.name, | 419 | at25->chip.name, |
391 | (chip->flags & EE_READONLY) ? " (readonly)" : "", | 420 | (chip.flags & EE_READONLY) ? " (readonly)" : "", |
392 | at25->chip.page_size); | 421 | at25->chip.page_size); |
393 | return 0; | 422 | return 0; |
394 | fail: | 423 | fail: |
diff --git a/drivers/misc/hpilo.c b/drivers/misc/hpilo.c index fffc227181b0..6df0da4085e3 100644 --- a/drivers/misc/hpilo.c +++ b/drivers/misc/hpilo.c | |||
@@ -30,6 +30,7 @@ | |||
30 | 30 | ||
31 | static struct class *ilo_class; | 31 | static struct class *ilo_class; |
32 | static unsigned int ilo_major; | 32 | static unsigned int ilo_major; |
33 | static unsigned int max_ccb = MIN_CCB; | ||
33 | static char ilo_hwdev[MAX_ILO_DEV]; | 34 | static char ilo_hwdev[MAX_ILO_DEV]; |
34 | 35 | ||
35 | static inline int get_entry_id(int entry) | 36 | static inline int get_entry_id(int entry) |
@@ -424,7 +425,7 @@ static void ilo_set_reset(struct ilo_hwinfo *hw) | |||
424 | * Mapped memory is zeroed on ilo reset, so set a per ccb flag | 425 | * Mapped memory is zeroed on ilo reset, so set a per ccb flag |
425 | * to indicate that this ccb needs to be closed and reopened. | 426 | * to indicate that this ccb needs to be closed and reopened. |
426 | */ | 427 | */ |
427 | for (slot = 0; slot < MAX_CCB; slot++) { | 428 | for (slot = 0; slot < max_ccb; slot++) { |
428 | if (!hw->ccb_alloc[slot]) | 429 | if (!hw->ccb_alloc[slot]) |
429 | continue; | 430 | continue; |
430 | set_channel_reset(&hw->ccb_alloc[slot]->driver_ccb); | 431 | set_channel_reset(&hw->ccb_alloc[slot]->driver_ccb); |
@@ -535,7 +536,7 @@ static int ilo_close(struct inode *ip, struct file *fp) | |||
535 | struct ilo_hwinfo *hw; | 536 | struct ilo_hwinfo *hw; |
536 | unsigned long flags; | 537 | unsigned long flags; |
537 | 538 | ||
538 | slot = iminor(ip) % MAX_CCB; | 539 | slot = iminor(ip) % max_ccb; |
539 | hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev); | 540 | hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev); |
540 | 541 | ||
541 | spin_lock(&hw->open_lock); | 542 | spin_lock(&hw->open_lock); |
@@ -566,7 +567,7 @@ static int ilo_open(struct inode *ip, struct file *fp) | |||
566 | struct ilo_hwinfo *hw; | 567 | struct ilo_hwinfo *hw; |
567 | unsigned long flags; | 568 | unsigned long flags; |
568 | 569 | ||
569 | slot = iminor(ip) % MAX_CCB; | 570 | slot = iminor(ip) % max_ccb; |
570 | hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev); | 571 | hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev); |
571 | 572 | ||
572 | /* new ccb allocation */ | 573 | /* new ccb allocation */ |
@@ -663,7 +664,7 @@ static irqreturn_t ilo_isr(int irq, void *data) | |||
663 | ilo_set_reset(hw); | 664 | ilo_set_reset(hw); |
664 | } | 665 | } |
665 | 666 | ||
666 | for (i = 0; i < MAX_CCB; i++) { | 667 | for (i = 0; i < max_ccb; i++) { |
667 | if (!hw->ccb_alloc[i]) | 668 | if (!hw->ccb_alloc[i]) |
668 | continue; | 669 | continue; |
669 | if (pending & (1 << i)) | 670 | if (pending & (1 << i)) |
@@ -697,14 +698,14 @@ static int __devinit ilo_map_device(struct pci_dev *pdev, struct ilo_hwinfo *hw) | |||
697 | } | 698 | } |
698 | 699 | ||
699 | /* map the adapter shared memory region */ | 700 | /* map the adapter shared memory region */ |
700 | hw->ram_vaddr = pci_iomap(pdev, 2, MAX_CCB * ILOHW_CCB_SZ); | 701 | hw->ram_vaddr = pci_iomap(pdev, 2, max_ccb * ILOHW_CCB_SZ); |
701 | if (hw->ram_vaddr == NULL) { | 702 | if (hw->ram_vaddr == NULL) { |
702 | dev_err(&pdev->dev, "Error mapping shared mem\n"); | 703 | dev_err(&pdev->dev, "Error mapping shared mem\n"); |
703 | goto mmio_free; | 704 | goto mmio_free; |
704 | } | 705 | } |
705 | 706 | ||
706 | /* map the doorbell aperture */ | 707 | /* map the doorbell aperture */ |
707 | hw->db_vaddr = pci_iomap(pdev, 3, MAX_CCB * ONE_DB_SIZE); | 708 | hw->db_vaddr = pci_iomap(pdev, 3, max_ccb * ONE_DB_SIZE); |
708 | if (hw->db_vaddr == NULL) { | 709 | if (hw->db_vaddr == NULL) { |
709 | dev_err(&pdev->dev, "Error mapping doorbell\n"); | 710 | dev_err(&pdev->dev, "Error mapping doorbell\n"); |
710 | goto ram_free; | 711 | goto ram_free; |
@@ -727,7 +728,7 @@ static void ilo_remove(struct pci_dev *pdev) | |||
727 | clear_device(ilo_hw); | 728 | clear_device(ilo_hw); |
728 | 729 | ||
729 | minor = MINOR(ilo_hw->cdev.dev); | 730 | minor = MINOR(ilo_hw->cdev.dev); |
730 | for (i = minor; i < minor + MAX_CCB; i++) | 731 | for (i = minor; i < minor + max_ccb; i++) |
731 | device_destroy(ilo_class, MKDEV(ilo_major, i)); | 732 | device_destroy(ilo_class, MKDEV(ilo_major, i)); |
732 | 733 | ||
733 | cdev_del(&ilo_hw->cdev); | 734 | cdev_del(&ilo_hw->cdev); |
@@ -737,7 +738,7 @@ static void ilo_remove(struct pci_dev *pdev) | |||
737 | pci_release_regions(pdev); | 738 | pci_release_regions(pdev); |
738 | pci_disable_device(pdev); | 739 | pci_disable_device(pdev); |
739 | kfree(ilo_hw); | 740 | kfree(ilo_hw); |
740 | ilo_hwdev[(minor / MAX_CCB)] = 0; | 741 | ilo_hwdev[(minor / max_ccb)] = 0; |
741 | } | 742 | } |
742 | 743 | ||
743 | static int __devinit ilo_probe(struct pci_dev *pdev, | 744 | static int __devinit ilo_probe(struct pci_dev *pdev, |
@@ -746,6 +747,11 @@ static int __devinit ilo_probe(struct pci_dev *pdev, | |||
746 | int devnum, minor, start, error; | 747 | int devnum, minor, start, error; |
747 | struct ilo_hwinfo *ilo_hw; | 748 | struct ilo_hwinfo *ilo_hw; |
748 | 749 | ||
750 | if (max_ccb > MAX_CCB) | ||
751 | max_ccb = MAX_CCB; | ||
752 | else if (max_ccb < MIN_CCB) | ||
753 | max_ccb = MIN_CCB; | ||
754 | |||
749 | /* find a free range for device files */ | 755 | /* find a free range for device files */ |
750 | for (devnum = 0; devnum < MAX_ILO_DEV; devnum++) { | 756 | for (devnum = 0; devnum < MAX_ILO_DEV; devnum++) { |
751 | if (ilo_hwdev[devnum] == 0) { | 757 | if (ilo_hwdev[devnum] == 0) { |
@@ -795,14 +801,14 @@ static int __devinit ilo_probe(struct pci_dev *pdev, | |||
795 | 801 | ||
796 | cdev_init(&ilo_hw->cdev, &ilo_fops); | 802 | cdev_init(&ilo_hw->cdev, &ilo_fops); |
797 | ilo_hw->cdev.owner = THIS_MODULE; | 803 | ilo_hw->cdev.owner = THIS_MODULE; |
798 | start = devnum * MAX_CCB; | 804 | start = devnum * max_ccb; |
799 | error = cdev_add(&ilo_hw->cdev, MKDEV(ilo_major, start), MAX_CCB); | 805 | error = cdev_add(&ilo_hw->cdev, MKDEV(ilo_major, start), max_ccb); |
800 | if (error) { | 806 | if (error) { |
801 | dev_err(&pdev->dev, "Could not add cdev\n"); | 807 | dev_err(&pdev->dev, "Could not add cdev\n"); |
802 | goto remove_isr; | 808 | goto remove_isr; |
803 | } | 809 | } |
804 | 810 | ||
805 | for (minor = 0 ; minor < MAX_CCB; minor++) { | 811 | for (minor = 0 ; minor < max_ccb; minor++) { |
806 | struct device *dev; | 812 | struct device *dev; |
807 | dev = device_create(ilo_class, &pdev->dev, | 813 | dev = device_create(ilo_class, &pdev->dev, |
808 | MKDEV(ilo_major, minor), NULL, | 814 | MKDEV(ilo_major, minor), NULL, |
@@ -879,11 +885,14 @@ static void __exit ilo_exit(void) | |||
879 | class_destroy(ilo_class); | 885 | class_destroy(ilo_class); |
880 | } | 886 | } |
881 | 887 | ||
882 | MODULE_VERSION("1.2"); | 888 | MODULE_VERSION("1.3"); |
883 | MODULE_ALIAS(ILO_NAME); | 889 | MODULE_ALIAS(ILO_NAME); |
884 | MODULE_DESCRIPTION(ILO_NAME); | 890 | MODULE_DESCRIPTION(ILO_NAME); |
885 | MODULE_AUTHOR("David Altobelli <david.altobelli@hp.com>"); | 891 | MODULE_AUTHOR("David Altobelli <david.altobelli@hp.com>"); |
886 | MODULE_LICENSE("GPL v2"); | 892 | MODULE_LICENSE("GPL v2"); |
887 | 893 | ||
894 | module_param(max_ccb, uint, 0444); | ||
895 | MODULE_PARM_DESC(max_ccb, "Maximum number of HP iLO channels to attach (8)"); | ||
896 | |||
888 | module_init(ilo_init); | 897 | module_init(ilo_init); |
889 | module_exit(ilo_exit); | 898 | module_exit(ilo_exit); |
diff --git a/drivers/misc/hpilo.h b/drivers/misc/hpilo.h index 54e43adbdea1..b97672e0cf90 100644 --- a/drivers/misc/hpilo.h +++ b/drivers/misc/hpilo.h | |||
@@ -14,7 +14,9 @@ | |||
14 | #define ILO_NAME "hpilo" | 14 | #define ILO_NAME "hpilo" |
15 | 15 | ||
16 | /* max number of open channel control blocks per device, hw limited to 32 */ | 16 | /* max number of open channel control blocks per device, hw limited to 32 */ |
17 | #define MAX_CCB 8 | 17 | #define MAX_CCB 24 |
18 | /* min number of open channel control blocks per device, hw limited to 32 */ | ||
19 | #define MIN_CCB 8 | ||
18 | /* max number of supported devices */ | 20 | /* max number of supported devices */ |
19 | #define MAX_ILO_DEV 1 | 21 | #define MAX_ILO_DEV 1 |
20 | /* max number of files */ | 22 | /* max number of files */ |
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c index a7d0bb0880ec..e77f86e69fb5 100644 --- a/drivers/misc/mei/init.c +++ b/drivers/misc/mei/init.c | |||
@@ -162,6 +162,9 @@ int mei_hw_init(struct mei_device *dev) | |||
162 | if ((dev->host_hw_state & H_IS) == H_IS) | 162 | if ((dev->host_hw_state & H_IS) == H_IS) |
163 | mei_reg_write(dev, H_CSR, dev->host_hw_state); | 163 | mei_reg_write(dev, H_CSR, dev->host_hw_state); |
164 | 164 | ||
165 | /* Doesn't change in runtime */ | ||
166 | dev->hbuf_depth = (dev->host_hw_state & H_CBD) >> 24; | ||
167 | |||
165 | dev->recvd_msg = false; | 168 | dev->recvd_msg = false; |
166 | dev_dbg(&dev->pdev->dev, "reset in start the mei device.\n"); | 169 | dev_dbg(&dev->pdev->dev, "reset in start the mei device.\n"); |
167 | 170 | ||
@@ -303,7 +306,6 @@ void mei_reset(struct mei_device *dev, int interrupts_enabled) | |||
303 | dev->iamthif_cl.host_client_id); | 306 | dev->iamthif_cl.host_client_id); |
304 | 307 | ||
305 | mei_reset_iamthif_params(dev); | 308 | mei_reset_iamthif_params(dev); |
306 | dev->wd_due_counter = 0; | ||
307 | dev->extra_write_index = 0; | 309 | dev->extra_write_index = 0; |
308 | } | 310 | } |
309 | 311 | ||
diff --git a/drivers/misc/mei/interface.c b/drivers/misc/mei/interface.c index 428d21e36416..509c3957ff45 100644 --- a/drivers/misc/mei/interface.c +++ b/drivers/misc/mei/interface.c | |||
@@ -58,16 +58,18 @@ void mei_disable_interrupts(struct mei_device *dev) | |||
58 | } | 58 | } |
59 | 59 | ||
60 | /** | 60 | /** |
61 | * _host_get_filled_slots - gets number of device filled buffer slots | 61 | * mei_hbuf_filled_slots - gets number of device filled buffer slots |
62 | * | 62 | * |
63 | * @device: the device structure | 63 | * @device: the device structure |
64 | * | 64 | * |
65 | * returns number of filled slots | 65 | * returns number of filled slots |
66 | */ | 66 | */ |
67 | static unsigned char _host_get_filled_slots(const struct mei_device *dev) | 67 | static unsigned char mei_hbuf_filled_slots(struct mei_device *dev) |
68 | { | 68 | { |
69 | char read_ptr, write_ptr; | 69 | char read_ptr, write_ptr; |
70 | 70 | ||
71 | dev->host_hw_state = mei_hcsr_read(dev); | ||
72 | |||
71 | read_ptr = (char) ((dev->host_hw_state & H_CBRP) >> 8); | 73 | read_ptr = (char) ((dev->host_hw_state & H_CBRP) >> 8); |
72 | write_ptr = (char) ((dev->host_hw_state & H_CBWP) >> 16); | 74 | write_ptr = (char) ((dev->host_hw_state & H_CBWP) >> 16); |
73 | 75 | ||
@@ -75,43 +77,33 @@ static unsigned char _host_get_filled_slots(const struct mei_device *dev) | |||
75 | } | 77 | } |
76 | 78 | ||
77 | /** | 79 | /** |
78 | * mei_host_buffer_is_empty - checks if host buffer is empty. | 80 | * mei_hbuf_is_empty - checks if host buffer is empty. |
79 | * | 81 | * |
80 | * @dev: the device structure | 82 | * @dev: the device structure |
81 | * | 83 | * |
82 | * returns 1 if empty, 0 - otherwise. | 84 | * returns true if empty, false - otherwise. |
83 | */ | 85 | */ |
84 | int mei_host_buffer_is_empty(struct mei_device *dev) | 86 | bool mei_hbuf_is_empty(struct mei_device *dev) |
85 | { | 87 | { |
86 | unsigned char filled_slots; | 88 | return mei_hbuf_filled_slots(dev) == 0; |
87 | |||
88 | dev->host_hw_state = mei_hcsr_read(dev); | ||
89 | filled_slots = _host_get_filled_slots(dev); | ||
90 | |||
91 | if (filled_slots == 0) | ||
92 | return 1; | ||
93 | |||
94 | return 0; | ||
95 | } | 89 | } |
96 | 90 | ||
97 | /** | 91 | /** |
98 | * mei_count_empty_write_slots - counts write empty slots. | 92 | * mei_hbuf_empty_slots - counts write empty slots. |
99 | * | 93 | * |
100 | * @dev: the device structure | 94 | * @dev: the device structure |
101 | * | 95 | * |
102 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count | 96 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count |
103 | */ | 97 | */ |
104 | int mei_count_empty_write_slots(struct mei_device *dev) | 98 | int mei_hbuf_empty_slots(struct mei_device *dev) |
105 | { | 99 | { |
106 | unsigned char buffer_depth, filled_slots, empty_slots; | 100 | unsigned char filled_slots, empty_slots; |
107 | 101 | ||
108 | dev->host_hw_state = mei_hcsr_read(dev); | 102 | filled_slots = mei_hbuf_filled_slots(dev); |
109 | buffer_depth = (unsigned char) ((dev->host_hw_state & H_CBD) >> 24); | 103 | empty_slots = dev->hbuf_depth - filled_slots; |
110 | filled_slots = _host_get_filled_slots(dev); | ||
111 | empty_slots = buffer_depth - filled_slots; | ||
112 | 104 | ||
113 | /* check for overflow */ | 105 | /* check for overflow */ |
114 | if (filled_slots > buffer_depth) | 106 | if (filled_slots > dev->hbuf_depth) |
115 | return -EOVERFLOW; | 107 | return -EOVERFLOW; |
116 | 108 | ||
117 | return empty_slots; | 109 | return empty_slots; |
@@ -127,52 +119,39 @@ int mei_count_empty_write_slots(struct mei_device *dev) | |||
127 | * | 119 | * |
128 | * This function returns -EIO if write has failed | 120 | * This function returns -EIO if write has failed |
129 | */ | 121 | */ |
130 | int mei_write_message(struct mei_device *dev, | 122 | int mei_write_message(struct mei_device *dev, struct mei_msg_hdr *header, |
131 | struct mei_msg_hdr *header, | 123 | unsigned char *buf, unsigned long length) |
132 | unsigned char *write_buffer, | ||
133 | unsigned long write_length) | ||
134 | { | 124 | { |
135 | u32 temp_msg = 0; | 125 | unsigned long rem, dw_cnt; |
136 | unsigned long bytes_written = 0; | 126 | u32 *reg_buf = (u32 *)buf; |
137 | unsigned char buffer_depth, filled_slots, empty_slots; | 127 | int i; |
138 | unsigned long dw_to_write; | 128 | int empty_slots; |
139 | |||
140 | dev->host_hw_state = mei_hcsr_read(dev); | ||
141 | 129 | ||
142 | dev_dbg(&dev->pdev->dev, | ||
143 | "host_hw_state = 0x%08x.\n", | ||
144 | dev->host_hw_state); | ||
145 | 130 | ||
146 | dev_dbg(&dev->pdev->dev, | 131 | dev_dbg(&dev->pdev->dev, |
147 | "mei_write_message header=%08x.\n", | 132 | "mei_write_message header=%08x.\n", |
148 | *((u32 *) header)); | 133 | *((u32 *) header)); |
149 | 134 | ||
150 | buffer_depth = (unsigned char) ((dev->host_hw_state & H_CBD) >> 24); | 135 | empty_slots = mei_hbuf_empty_slots(dev); |
151 | filled_slots = _host_get_filled_slots(dev); | 136 | dev_dbg(&dev->pdev->dev, "empty slots = %hu.\n", empty_slots); |
152 | empty_slots = buffer_depth - filled_slots; | ||
153 | dev_dbg(&dev->pdev->dev, | ||
154 | "filled = %hu, empty = %hu.\n", | ||
155 | filled_slots, empty_slots); | ||
156 | |||
157 | dw_to_write = ((write_length + 3) / 4); | ||
158 | 137 | ||
159 | if (dw_to_write > empty_slots) | 138 | dw_cnt = mei_data2slots(length); |
139 | if (empty_slots < 0 || dw_cnt > empty_slots) | ||
160 | return -EIO; | 140 | return -EIO; |
161 | 141 | ||
162 | mei_reg_write(dev, H_CB_WW, *((u32 *) header)); | 142 | mei_reg_write(dev, H_CB_WW, *((u32 *) header)); |
163 | 143 | ||
164 | while (write_length >= 4) { | 144 | for (i = 0; i < length / 4; i++) |
165 | mei_reg_write(dev, H_CB_WW, | 145 | mei_reg_write(dev, H_CB_WW, reg_buf[i]); |
166 | *(u32 *) (write_buffer + bytes_written)); | ||
167 | bytes_written += 4; | ||
168 | write_length -= 4; | ||
169 | } | ||
170 | 146 | ||
171 | if (write_length > 0) { | 147 | rem = length & 0x3; |
172 | memcpy(&temp_msg, &write_buffer[bytes_written], write_length); | 148 | if (rem > 0) { |
173 | mei_reg_write(dev, H_CB_WW, temp_msg); | 149 | u32 reg = 0; |
150 | memcpy(®, &buf[length - rem], rem); | ||
151 | mei_reg_write(dev, H_CB_WW, reg); | ||
174 | } | 152 | } |
175 | 153 | ||
154 | dev->host_hw_state = mei_hcsr_read(dev); | ||
176 | dev->host_hw_state |= H_IG; | 155 | dev->host_hw_state |= H_IG; |
177 | mei_hcsr_set(dev); | 156 | mei_hcsr_set(dev); |
178 | dev->me_hw_state = mei_mecsr_read(dev); | 157 | dev->me_hw_state = mei_mecsr_read(dev); |
diff --git a/drivers/misc/mei/interface.h b/drivers/misc/mei/interface.h index ddff5d16616f..fb5c7db4723b 100644 --- a/drivers/misc/mei/interface.h +++ b/drivers/misc/mei/interface.h | |||
@@ -41,14 +41,28 @@ int mei_write_message(struct mei_device *dev, | |||
41 | unsigned char *write_buffer, | 41 | unsigned char *write_buffer, |
42 | unsigned long write_length); | 42 | unsigned long write_length); |
43 | 43 | ||
44 | int mei_host_buffer_is_empty(struct mei_device *dev); | 44 | bool mei_hbuf_is_empty(struct mei_device *dev); |
45 | |||
46 | int mei_hbuf_empty_slots(struct mei_device *dev); | ||
47 | |||
48 | static inline size_t mei_hbuf_max_data(const struct mei_device *dev) | ||
49 | { | ||
50 | return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr); | ||
51 | } | ||
52 | |||
53 | /* get slots (dwords) from a message length + header (bytes) */ | ||
54 | static inline unsigned char mei_data2slots(size_t length) | ||
55 | { | ||
56 | return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4); | ||
57 | } | ||
45 | 58 | ||
46 | int mei_count_full_read_slots(struct mei_device *dev); | 59 | int mei_count_full_read_slots(struct mei_device *dev); |
47 | 60 | ||
48 | int mei_count_empty_write_slots(struct mei_device *dev); | ||
49 | 61 | ||
50 | int mei_flow_ctrl_creds(struct mei_device *dev, struct mei_cl *cl); | 62 | int mei_flow_ctrl_creds(struct mei_device *dev, struct mei_cl *cl); |
51 | 63 | ||
64 | |||
65 | |||
52 | int mei_wd_send(struct mei_device *dev); | 66 | int mei_wd_send(struct mei_device *dev); |
53 | int mei_wd_stop(struct mei_device *dev, bool preserve); | 67 | int mei_wd_stop(struct mei_device *dev, bool preserve); |
54 | int mei_wd_host_init(struct mei_device *dev); | 68 | int mei_wd_host_init(struct mei_device *dev); |
diff --git a/drivers/misc/mei/interrupt.c b/drivers/misc/mei/interrupt.c index 23f5463d4cae..c6ffbbe5a6c0 100644 --- a/drivers/misc/mei/interrupt.c +++ b/drivers/misc/mei/interrupt.c | |||
@@ -267,8 +267,7 @@ static int _mei_irq_thread_iamthif_read(struct mei_device *dev, s32 *slots) | |||
267 | + sizeof(struct hbm_flow_control))) { | 267 | + sizeof(struct hbm_flow_control))) { |
268 | return -EMSGSIZE; | 268 | return -EMSGSIZE; |
269 | } | 269 | } |
270 | *slots -= (sizeof(struct mei_msg_hdr) + | 270 | *slots -= mei_data2slots(sizeof(struct hbm_flow_control)); |
271 | sizeof(struct hbm_flow_control) + 3) / 4; | ||
272 | if (mei_send_flow_control(dev, &dev->iamthif_cl)) { | 271 | if (mei_send_flow_control(dev, &dev->iamthif_cl)) { |
273 | dev_dbg(&dev->pdev->dev, "iamthif flow control failed\n"); | 272 | dev_dbg(&dev->pdev->dev, "iamthif flow control failed\n"); |
274 | return -EIO; | 273 | return -EIO; |
@@ -280,7 +279,7 @@ static int _mei_irq_thread_iamthif_read(struct mei_device *dev, s32 *slots) | |||
280 | dev->iamthif_msg_buf_index = 0; | 279 | dev->iamthif_msg_buf_index = 0; |
281 | dev->iamthif_msg_buf_size = 0; | 280 | dev->iamthif_msg_buf_size = 0; |
282 | dev->iamthif_stall_timer = IAMTHIF_STALL_TIMER; | 281 | dev->iamthif_stall_timer = IAMTHIF_STALL_TIMER; |
283 | dev->mei_host_buffer_is_empty = mei_host_buffer_is_empty(dev); | 282 | dev->mei_host_buffer_is_empty = mei_hbuf_is_empty(dev); |
284 | return 0; | 283 | return 0; |
285 | } | 284 | } |
286 | 285 | ||
@@ -300,28 +299,25 @@ static int _mei_irq_thread_close(struct mei_device *dev, s32 *slots, | |||
300 | struct mei_cl *cl, | 299 | struct mei_cl *cl, |
301 | struct mei_io_list *cmpl_list) | 300 | struct mei_io_list *cmpl_list) |
302 | { | 301 | { |
303 | if ((*slots * sizeof(u32)) >= (sizeof(struct mei_msg_hdr) + | 302 | if ((*slots * sizeof(u32)) < (sizeof(struct mei_msg_hdr) + |
304 | sizeof(struct hbm_client_disconnect_request))) { | 303 | sizeof(struct hbm_client_disconnect_request))) |
305 | *slots -= (sizeof(struct mei_msg_hdr) + | 304 | return -EBADMSG; |
306 | sizeof(struct hbm_client_disconnect_request) + 3) / 4; | ||
307 | 305 | ||
308 | if (mei_disconnect(dev, cl)) { | 306 | *slots -= mei_data2slots(sizeof(struct hbm_client_disconnect_request)); |
309 | cl->status = 0; | 307 | |
310 | cb_pos->information = 0; | 308 | if (mei_disconnect(dev, cl)) { |
311 | list_move_tail(&cb_pos->cb_list, | 309 | cl->status = 0; |
312 | &cmpl_list->mei_cb.cb_list); | 310 | cb_pos->information = 0; |
313 | return -EMSGSIZE; | 311 | list_move_tail(&cb_pos->cb_list, |
314 | } else { | 312 | &cmpl_list->mei_cb.cb_list); |
315 | cl->state = MEI_FILE_DISCONNECTING; | 313 | return -EMSGSIZE; |
316 | cl->status = 0; | ||
317 | cb_pos->information = 0; | ||
318 | list_move_tail(&cb_pos->cb_list, | ||
319 | &dev->ctrl_rd_list.mei_cb.cb_list); | ||
320 | cl->timer_count = MEI_CONNECT_TIMEOUT; | ||
321 | } | ||
322 | } else { | 314 | } else { |
323 | /* return the cancel routine */ | 315 | cl->state = MEI_FILE_DISCONNECTING; |
324 | return -EBADMSG; | 316 | cl->status = 0; |
317 | cb_pos->information = 0; | ||
318 | list_move_tail(&cb_pos->cb_list, | ||
319 | &dev->ctrl_rd_list.mei_cb.cb_list); | ||
320 | cl->timer_count = MEI_CONNECT_TIMEOUT; | ||
325 | } | 321 | } |
326 | 322 | ||
327 | return 0; | 323 | return 0; |
@@ -575,10 +571,9 @@ static void mei_client_disconnect_request(struct mei_device *dev, | |||
575 | disconnect_req->me_addr); | 571 | disconnect_req->me_addr); |
576 | cl_pos->state = MEI_FILE_DISCONNECTED; | 572 | cl_pos->state = MEI_FILE_DISCONNECTED; |
577 | cl_pos->timer_count = 0; | 573 | cl_pos->timer_count = 0; |
578 | if (cl_pos == &dev->wd_cl) { | 574 | if (cl_pos == &dev->wd_cl) |
579 | dev->wd_due_counter = 0; | ||
580 | dev->wd_pending = false; | 575 | dev->wd_pending = false; |
581 | } else if (cl_pos == &dev->iamthif_cl) | 576 | else if (cl_pos == &dev->iamthif_cl) |
582 | dev->iamthif_timer = 0; | 577 | dev->iamthif_timer = 0; |
583 | 578 | ||
584 | /* prepare disconnect response */ | 579 | /* prepare disconnect response */ |
@@ -842,8 +837,8 @@ static int _mei_irq_thread_read(struct mei_device *dev, s32 *slots, | |||
842 | return -EBADMSG; | 837 | return -EBADMSG; |
843 | } | 838 | } |
844 | 839 | ||
845 | *slots -= (sizeof(struct mei_msg_hdr) + | 840 | *slots -= mei_data2slots(sizeof(struct hbm_flow_control)); |
846 | sizeof(struct hbm_flow_control) + 3) / 4; | 841 | |
847 | if (mei_send_flow_control(dev, cl)) { | 842 | if (mei_send_flow_control(dev, cl)) { |
848 | cl->status = -ENODEV; | 843 | cl->status = -ENODEV; |
849 | cb_pos->information = 0; | 844 | cb_pos->information = 0; |
@@ -872,27 +867,25 @@ static int _mei_irq_thread_ioctl(struct mei_device *dev, s32 *slots, | |||
872 | struct mei_cl *cl, | 867 | struct mei_cl *cl, |
873 | struct mei_io_list *cmpl_list) | 868 | struct mei_io_list *cmpl_list) |
874 | { | 869 | { |
875 | if ((*slots * sizeof(u32)) >= (sizeof(struct mei_msg_hdr) + | 870 | if ((*slots * sizeof(u32)) < (sizeof(struct mei_msg_hdr) + |
876 | sizeof(struct hbm_client_connect_request))) { | 871 | sizeof(struct hbm_client_connect_request))) { |
877 | cl->state = MEI_FILE_CONNECTING; | ||
878 | *slots -= (sizeof(struct mei_msg_hdr) + | ||
879 | sizeof(struct hbm_client_connect_request) + 3) / 4; | ||
880 | if (mei_connect(dev, cl)) { | ||
881 | cl->status = -ENODEV; | ||
882 | cb_pos->information = 0; | ||
883 | list_del(&cb_pos->cb_list); | ||
884 | return -ENODEV; | ||
885 | } else { | ||
886 | list_move_tail(&cb_pos->cb_list, | ||
887 | &dev->ctrl_rd_list.mei_cb.cb_list); | ||
888 | cl->timer_count = MEI_CONNECT_TIMEOUT; | ||
889 | } | ||
890 | } else { | ||
891 | /* return the cancel routine */ | 872 | /* return the cancel routine */ |
892 | list_del(&cb_pos->cb_list); | 873 | list_del(&cb_pos->cb_list); |
893 | return -EBADMSG; | 874 | return -EBADMSG; |
894 | } | 875 | } |
895 | 876 | ||
877 | cl->state = MEI_FILE_CONNECTING; | ||
878 | *slots -= mei_data2slots(sizeof(struct hbm_client_connect_request)); | ||
879 | if (mei_connect(dev, cl)) { | ||
880 | cl->status = -ENODEV; | ||
881 | cb_pos->information = 0; | ||
882 | list_del(&cb_pos->cb_list); | ||
883 | return -ENODEV; | ||
884 | } else { | ||
885 | list_move_tail(&cb_pos->cb_list, | ||
886 | &dev->ctrl_rd_list.mei_cb.cb_list); | ||
887 | cl->timer_count = MEI_CONNECT_TIMEOUT; | ||
888 | } | ||
896 | return 0; | 889 | return 0; |
897 | } | 890 | } |
898 | 891 | ||
@@ -932,8 +925,7 @@ static int _mei_irq_thread_cmpl(struct mei_device *dev, s32 *slots, | |||
932 | cb_pos->information); | 925 | cb_pos->information); |
933 | dev_dbg(&dev->pdev->dev, "mei_hdr->length =%d\n", | 926 | dev_dbg(&dev->pdev->dev, "mei_hdr->length =%d\n", |
934 | mei_hdr->length); | 927 | mei_hdr->length); |
935 | *slots -= (sizeof(struct mei_msg_hdr) + | 928 | *slots -= mei_data2slots(mei_hdr->length); |
936 | mei_hdr->length + 3) / 4; | ||
937 | if (mei_write_message(dev, mei_hdr, | 929 | if (mei_write_message(dev, mei_hdr, |
938 | (unsigned char *) | 930 | (unsigned char *) |
939 | (cb_pos->request_buffer.data + | 931 | (cb_pos->request_buffer.data + |
@@ -951,7 +943,7 @@ static int _mei_irq_thread_cmpl(struct mei_device *dev, s32 *slots, | |||
951 | list_move_tail(&cb_pos->cb_list, | 943 | list_move_tail(&cb_pos->cb_list, |
952 | &dev->write_waiting_list.mei_cb.cb_list); | 944 | &dev->write_waiting_list.mei_cb.cb_list); |
953 | } | 945 | } |
954 | } else if (*slots == ((dev->host_hw_state & H_CBD) >> 24)) { | 946 | } else if (*slots == dev->hbuf_depth) { |
955 | /* buffer is still empty */ | 947 | /* buffer is still empty */ |
956 | mei_hdr = (struct mei_msg_hdr *) &dev->wr_msg_buf[0]; | 948 | mei_hdr = (struct mei_msg_hdr *) &dev->wr_msg_buf[0]; |
957 | mei_hdr->host_addr = cl->host_client_id; | 949 | mei_hdr->host_addr = cl->host_client_id; |
@@ -960,9 +952,7 @@ static int _mei_irq_thread_cmpl(struct mei_device *dev, s32 *slots, | |||
960 | (*slots * sizeof(u32)) - sizeof(struct mei_msg_hdr); | 952 | (*slots * sizeof(u32)) - sizeof(struct mei_msg_hdr); |
961 | mei_hdr->msg_complete = 0; | 953 | mei_hdr->msg_complete = 0; |
962 | mei_hdr->reserved = 0; | 954 | mei_hdr->reserved = 0; |
963 | 955 | *slots -= mei_data2slots(mei_hdr->length); | |
964 | (*slots) -= (sizeof(struct mei_msg_hdr) + | ||
965 | mei_hdr->length + 3) / 4; | ||
966 | if (mei_write_message(dev, mei_hdr, | 956 | if (mei_write_message(dev, mei_hdr, |
967 | (unsigned char *) | 957 | (unsigned char *) |
968 | (cb_pos->request_buffer.data + | 958 | (cb_pos->request_buffer.data + |
@@ -1021,8 +1011,7 @@ static int _mei_irq_thread_cmpl_iamthif(struct mei_device *dev, s32 *slots, | |||
1021 | mei_hdr->msg_complete = 1; | 1011 | mei_hdr->msg_complete = 1; |
1022 | mei_hdr->reserved = 0; | 1012 | mei_hdr->reserved = 0; |
1023 | 1013 | ||
1024 | *slots -= (sizeof(struct mei_msg_hdr) + | 1014 | *slots -= mei_data2slots(mei_hdr->length); |
1025 | mei_hdr->length + 3) / 4; | ||
1026 | 1015 | ||
1027 | if (mei_write_message(dev, mei_hdr, | 1016 | if (mei_write_message(dev, mei_hdr, |
1028 | (dev->iamthif_msg_buf + | 1017 | (dev->iamthif_msg_buf + |
@@ -1046,8 +1035,8 @@ static int _mei_irq_thread_cmpl_iamthif(struct mei_device *dev, s32 *slots, | |||
1046 | &dev->write_waiting_list.mei_cb.cb_list); | 1035 | &dev->write_waiting_list.mei_cb.cb_list); |
1047 | 1036 | ||
1048 | } | 1037 | } |
1049 | } else if (*slots == ((dev->host_hw_state & H_CBD) >> 24)) { | 1038 | } else if (*slots == dev->hbuf_depth) { |
1050 | /* buffer is still empty */ | 1039 | /* buffer is still empty */ |
1051 | mei_hdr = (struct mei_msg_hdr *) &dev->wr_msg_buf[0]; | 1040 | mei_hdr = (struct mei_msg_hdr *) &dev->wr_msg_buf[0]; |
1052 | mei_hdr->host_addr = cl->host_client_id; | 1041 | mei_hdr->host_addr = cl->host_client_id; |
1053 | mei_hdr->me_addr = cl->me_client_id; | 1042 | mei_hdr->me_addr = cl->me_client_id; |
@@ -1056,8 +1045,7 @@ static int _mei_irq_thread_cmpl_iamthif(struct mei_device *dev, s32 *slots, | |||
1056 | mei_hdr->msg_complete = 0; | 1045 | mei_hdr->msg_complete = 0; |
1057 | mei_hdr->reserved = 0; | 1046 | mei_hdr->reserved = 0; |
1058 | 1047 | ||
1059 | *slots -= (sizeof(struct mei_msg_hdr) + | 1048 | *slots -= mei_data2slots(mei_hdr->length); |
1060 | mei_hdr->length + 3) / 4; | ||
1061 | 1049 | ||
1062 | if (mei_write_message(dev, mei_hdr, | 1050 | if (mei_write_message(dev, mei_hdr, |
1063 | (dev->iamthif_msg_buf + | 1051 | (dev->iamthif_msg_buf + |
@@ -1199,17 +1187,19 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list, | |||
1199 | struct mei_io_list *list; | 1187 | struct mei_io_list *list; |
1200 | int ret; | 1188 | int ret; |
1201 | 1189 | ||
1202 | if (!mei_host_buffer_is_empty(dev)) { | 1190 | if (!mei_hbuf_is_empty(dev)) { |
1203 | dev_dbg(&dev->pdev->dev, "host buffer is not empty.\n"); | 1191 | dev_dbg(&dev->pdev->dev, "host buffer is not empty.\n"); |
1204 | return 0; | 1192 | return 0; |
1205 | } | 1193 | } |
1206 | *slots = mei_count_empty_write_slots(dev); | 1194 | *slots = mei_hbuf_empty_slots(dev); |
1195 | if (*slots <= 0) | ||
1196 | return -EMSGSIZE; | ||
1197 | |||
1207 | /* complete all waiting for write CB */ | 1198 | /* complete all waiting for write CB */ |
1208 | dev_dbg(&dev->pdev->dev, "complete all waiting for write cb.\n"); | 1199 | dev_dbg(&dev->pdev->dev, "complete all waiting for write cb.\n"); |
1209 | 1200 | ||
1210 | list = &dev->write_waiting_list; | 1201 | list = &dev->write_waiting_list; |
1211 | list_for_each_entry_safe(pos, next, | 1202 | list_for_each_entry_safe(pos, next, &list->mei_cb.cb_list, cb_list) { |
1212 | &list->mei_cb.cb_list, cb_list) { | ||
1213 | cl = (struct mei_cl *)pos->file_private; | 1203 | cl = (struct mei_cl *)pos->file_private; |
1214 | if (cl == NULL) | 1204 | if (cl == NULL) |
1215 | continue; | 1205 | continue; |
@@ -1219,17 +1209,15 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list, | |||
1219 | if (MEI_WRITING == cl->writing_state && | 1209 | if (MEI_WRITING == cl->writing_state && |
1220 | (pos->major_file_operations == MEI_WRITE) && | 1210 | (pos->major_file_operations == MEI_WRITE) && |
1221 | (cl != &dev->iamthif_cl)) { | 1211 | (cl != &dev->iamthif_cl)) { |
1222 | dev_dbg(&dev->pdev->dev, | 1212 | dev_dbg(&dev->pdev->dev, "MEI WRITE COMPLETE\n"); |
1223 | "MEI WRITE COMPLETE\n"); | ||
1224 | cl->writing_state = MEI_WRITE_COMPLETE; | 1213 | cl->writing_state = MEI_WRITE_COMPLETE; |
1225 | list_add_tail(&pos->cb_list, | 1214 | list_add_tail(&pos->cb_list, |
1226 | &cmpl_list->mei_cb.cb_list); | 1215 | &cmpl_list->mei_cb.cb_list); |
1227 | } | 1216 | } |
1228 | if (cl == &dev->iamthif_cl) { | 1217 | if (cl == &dev->iamthif_cl) { |
1229 | dev_dbg(&dev->pdev->dev, "check iamthif flow control.\n"); | 1218 | dev_dbg(&dev->pdev->dev, "check iamthif flow control.\n"); |
1230 | if (dev->iamthif_flow_control_pending) { | 1219 | if (dev->iamthif_flow_control_pending) { |
1231 | ret = _mei_irq_thread_iamthif_read( | 1220 | ret = _mei_irq_thread_iamthif_read(dev, slots); |
1232 | dev, slots); | ||
1233 | if (ret) | 1221 | if (ret) |
1234 | return ret; | 1222 | return ret; |
1235 | } | 1223 | } |
@@ -1254,25 +1242,18 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list, | |||
1254 | } | 1242 | } |
1255 | if (dev->mei_state == MEI_ENABLED) { | 1243 | if (dev->mei_state == MEI_ENABLED) { |
1256 | if (dev->wd_pending && | 1244 | if (dev->wd_pending && |
1257 | mei_flow_ctrl_creds(dev, &dev->wd_cl) > 0) { | 1245 | mei_flow_ctrl_creds(dev, &dev->wd_cl) > 0) { |
1258 | if (mei_wd_send(dev)) | 1246 | if (mei_wd_send(dev)) |
1259 | dev_dbg(&dev->pdev->dev, "wd send failed.\n"); | 1247 | dev_dbg(&dev->pdev->dev, "wd send failed.\n"); |
1260 | else | 1248 | else if (mei_flow_ctrl_reduce(dev, &dev->wd_cl)) |
1261 | if (mei_flow_ctrl_reduce(dev, &dev->wd_cl)) | 1249 | return -ENODEV; |
1262 | return -ENODEV; | ||
1263 | 1250 | ||
1264 | dev->wd_pending = false; | 1251 | dev->wd_pending = false; |
1265 | 1252 | ||
1266 | if (dev->wd_timeout) { | 1253 | if (dev->wd_timeout) |
1267 | *slots -= (sizeof(struct mei_msg_hdr) + | 1254 | *slots -= mei_data2slots(MEI_START_WD_DATA_SIZE); |
1268 | MEI_START_WD_DATA_SIZE + 3) / 4; | 1255 | else |
1269 | dev->wd_due_counter = 2; | 1256 | *slots -= mei_data2slots(MEI_START_WD_DATA_SIZE); |
1270 | } else { | ||
1271 | *slots -= (sizeof(struct mei_msg_hdr) + | ||
1272 | MEI_WD_PARAMS_SIZE + 3) / 4; | ||
1273 | dev->wd_due_counter = 0; | ||
1274 | } | ||
1275 | |||
1276 | } | 1257 | } |
1277 | } | 1258 | } |
1278 | if (dev->stop) | 1259 | if (dev->stop) |
@@ -1320,42 +1301,34 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list, | |||
1320 | /* complete write list CB */ | 1301 | /* complete write list CB */ |
1321 | dev_dbg(&dev->pdev->dev, "complete write list cb.\n"); | 1302 | dev_dbg(&dev->pdev->dev, "complete write list cb.\n"); |
1322 | list_for_each_entry_safe(pos, next, | 1303 | list_for_each_entry_safe(pos, next, |
1323 | &dev->write_list.mei_cb.cb_list, cb_list) { | 1304 | &dev->write_list.mei_cb.cb_list, cb_list) { |
1324 | cl = (struct mei_cl *)pos->file_private; | 1305 | cl = (struct mei_cl *)pos->file_private; |
1325 | if (cl == NULL) | 1306 | if (cl == NULL) |
1326 | continue; | 1307 | continue; |
1327 | 1308 | ||
1328 | if (cl != &dev->iamthif_cl) { | 1309 | if (cl != &dev->iamthif_cl) { |
1329 | if (!mei_flow_ctrl_creds(dev, cl)) { | 1310 | if (mei_flow_ctrl_creds(dev, cl) <= 0) { |
1330 | dev_dbg(&dev->pdev->dev, | 1311 | dev_dbg(&dev->pdev->dev, |
1331 | "No flow control" | 1312 | "No flow control credentials for client %d, not sending.\n", |
1332 | " credentials for client" | 1313 | cl->host_client_id); |
1333 | " %d, not sending.\n", | ||
1334 | cl->host_client_id); | ||
1335 | continue; | 1314 | continue; |
1336 | } | 1315 | } |
1337 | ret = _mei_irq_thread_cmpl(dev, slots, | 1316 | ret = _mei_irq_thread_cmpl(dev, slots, pos, |
1338 | pos, | 1317 | cl, cmpl_list); |
1339 | cl, cmpl_list); | ||
1340 | if (ret) | 1318 | if (ret) |
1341 | return ret; | 1319 | return ret; |
1342 | 1320 | ||
1343 | } else if (cl == &dev->iamthif_cl) { | 1321 | } else if (cl == &dev->iamthif_cl) { |
1344 | /* IAMTHIF IOCTL */ | 1322 | /* IAMTHIF IOCTL */ |
1345 | dev_dbg(&dev->pdev->dev, "complete amthi write cb.\n"); | 1323 | dev_dbg(&dev->pdev->dev, "complete amthi write cb.\n"); |
1346 | if (!mei_flow_ctrl_creds(dev, cl)) { | 1324 | if (mei_flow_ctrl_creds(dev, cl) <= 0) { |
1347 | dev_dbg(&dev->pdev->dev, | 1325 | dev_dbg(&dev->pdev->dev, |
1348 | "No flow control" | 1326 | "No flow control credentials for amthi client %d.\n", |
1349 | " credentials for amthi" | 1327 | cl->host_client_id); |
1350 | " client %d.\n", | ||
1351 | cl->host_client_id); | ||
1352 | continue; | 1328 | continue; |
1353 | } | 1329 | } |
1354 | ret = _mei_irq_thread_cmpl_iamthif(dev, | 1330 | ret = _mei_irq_thread_cmpl_iamthif(dev, slots, pos, |
1355 | slots, | 1331 | cl, cmpl_list); |
1356 | pos, | ||
1357 | cl, | ||
1358 | cmpl_list); | ||
1359 | if (ret) | 1332 | if (ret) |
1360 | return ret; | 1333 | return ret; |
1361 | 1334 | ||
@@ -1555,7 +1528,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id) | |||
1555 | end: | 1528 | end: |
1556 | dev_dbg(&dev->pdev->dev, "end of bottom half function.\n"); | 1529 | dev_dbg(&dev->pdev->dev, "end of bottom half function.\n"); |
1557 | dev->host_hw_state = mei_hcsr_read(dev); | 1530 | dev->host_hw_state = mei_hcsr_read(dev); |
1558 | dev->mei_host_buffer_is_empty = mei_host_buffer_is_empty(dev); | 1531 | dev->mei_host_buffer_is_empty = mei_hbuf_is_empty(dev); |
1559 | 1532 | ||
1560 | bus_message_received = false; | 1533 | bus_message_received = false; |
1561 | if (dev->recvd_msg && waitqueue_active(&dev->wait_recvd_msg)) { | 1534 | if (dev->recvd_msg && waitqueue_active(&dev->wait_recvd_msg)) { |
diff --git a/drivers/misc/mei/iorw.c b/drivers/misc/mei/iorw.c index f9cced69b65e..50f52e21f587 100644 --- a/drivers/misc/mei/iorw.c +++ b/drivers/misc/mei/iorw.c | |||
@@ -481,12 +481,8 @@ int amthi_write(struct mei_device *dev, struct mei_cl_cb *cb) | |||
481 | if (ret && dev->mei_host_buffer_is_empty) { | 481 | if (ret && dev->mei_host_buffer_is_empty) { |
482 | ret = 0; | 482 | ret = 0; |
483 | dev->mei_host_buffer_is_empty = false; | 483 | dev->mei_host_buffer_is_empty = false; |
484 | if (cb->request_buffer.size > | 484 | if (cb->request_buffer.size > mei_hbuf_max_data(dev)) { |
485 | (((dev->host_hw_state & H_CBD) >> 24) * sizeof(u32)) | 485 | mei_hdr.length = mei_hbuf_max_data(dev); |
486 | -sizeof(struct mei_msg_hdr)) { | ||
487 | mei_hdr.length = | ||
488 | (((dev->host_hw_state & H_CBD) >> 24) * | ||
489 | sizeof(u32)) - sizeof(struct mei_msg_hdr); | ||
490 | mei_hdr.msg_complete = 0; | 486 | mei_hdr.msg_complete = 0; |
491 | } else { | 487 | } else { |
492 | mei_hdr.length = cb->request_buffer.size; | 488 | mei_hdr.length = cb->request_buffer.size; |
diff --git a/drivers/misc/mei/main.c b/drivers/misc/mei/main.c index 783fcd7365bc..092330208869 100644 --- a/drivers/misc/mei/main.c +++ b/drivers/misc/mei/main.c | |||
@@ -714,13 +714,8 @@ static ssize_t mei_write(struct file *file, const char __user *ubuf, | |||
714 | if (rets && dev->mei_host_buffer_is_empty) { | 714 | if (rets && dev->mei_host_buffer_is_empty) { |
715 | rets = 0; | 715 | rets = 0; |
716 | dev->mei_host_buffer_is_empty = false; | 716 | dev->mei_host_buffer_is_empty = false; |
717 | if (length > ((((dev->host_hw_state & H_CBD) >> 24) * | 717 | if (length > mei_hbuf_max_data(dev)) { |
718 | sizeof(u32)) - sizeof(struct mei_msg_hdr))) { | 718 | mei_hdr.length = mei_hbuf_max_data(dev); |
719 | |||
720 | mei_hdr.length = | ||
721 | (((dev->host_hw_state & H_CBD) >> 24) * | ||
722 | sizeof(u32)) - | ||
723 | sizeof(struct mei_msg_hdr); | ||
724 | mei_hdr.msg_complete = 0; | 719 | mei_hdr.msg_complete = 0; |
725 | } else { | 720 | } else { |
726 | mei_hdr.length = length; | 721 | mei_hdr.length = length; |
@@ -1187,44 +1182,7 @@ static struct pci_driver mei_driver = { | |||
1187 | .driver.pm = MEI_PM_OPS, | 1182 | .driver.pm = MEI_PM_OPS, |
1188 | }; | 1183 | }; |
1189 | 1184 | ||
1190 | /** | 1185 | module_pci_driver(mei_driver); |
1191 | * mei_init_module - Driver Registration Routine | ||
1192 | * | ||
1193 | * mei_init_module is the first routine called when the driver is | ||
1194 | * loaded. All it does is to register with the PCI subsystem. | ||
1195 | * | ||
1196 | * returns 0 on success, <0 on failure. | ||
1197 | */ | ||
1198 | static int __init mei_init_module(void) | ||
1199 | { | ||
1200 | int ret; | ||
1201 | |||
1202 | pr_debug("loading.\n"); | ||
1203 | /* init pci module */ | ||
1204 | ret = pci_register_driver(&mei_driver); | ||
1205 | if (ret < 0) | ||
1206 | pr_err("error registering driver.\n"); | ||
1207 | |||
1208 | return ret; | ||
1209 | } | ||
1210 | |||
1211 | module_init(mei_init_module); | ||
1212 | |||
1213 | /** | ||
1214 | * mei_exit_module - Driver Exit Cleanup Routine | ||
1215 | * | ||
1216 | * mei_exit_module is called just before the driver is removed | ||
1217 | * from memory. | ||
1218 | */ | ||
1219 | static void __exit mei_exit_module(void) | ||
1220 | { | ||
1221 | pci_unregister_driver(&mei_driver); | ||
1222 | |||
1223 | pr_debug("unloaded successfully.\n"); | ||
1224 | } | ||
1225 | |||
1226 | module_exit(mei_exit_module); | ||
1227 | |||
1228 | 1186 | ||
1229 | MODULE_AUTHOR("Intel Corporation"); | 1187 | MODULE_AUTHOR("Intel Corporation"); |
1230 | MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); | 1188 | MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); |
diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h index 63d7ee97c5fb..d61c4ddfc80c 100644 --- a/drivers/misc/mei/mei_dev.h +++ b/drivers/misc/mei/mei_dev.h | |||
@@ -167,7 +167,10 @@ struct mei_io_list { | |||
167 | struct mei_cl_cb mei_cb; | 167 | struct mei_cl_cb mei_cb; |
168 | }; | 168 | }; |
169 | 169 | ||
170 | /* MEI private device struct */ | 170 | /** |
171 | * struct mei_deive - MEI private device struct | ||
172 | * @hbuf_depth - depth of host(write) buffer | ||
173 | */ | ||
171 | struct mei_device { | 174 | struct mei_device { |
172 | struct pci_dev *pdev; /* pointer to pci device struct */ | 175 | struct pci_dev *pdev; /* pointer to pci device struct */ |
173 | /* | 176 | /* |
@@ -205,6 +208,7 @@ struct mei_device { | |||
205 | */ | 208 | */ |
206 | u32 host_hw_state; | 209 | u32 host_hw_state; |
207 | u32 me_hw_state; | 210 | u32 me_hw_state; |
211 | u8 hbuf_depth; | ||
208 | /* | 212 | /* |
209 | * waiting queue for receive message from FW | 213 | * waiting queue for receive message from FW |
210 | */ | 214 | */ |
@@ -237,15 +241,14 @@ struct mei_device { | |||
237 | bool mei_host_buffer_is_empty; | 241 | bool mei_host_buffer_is_empty; |
238 | 242 | ||
239 | struct mei_cl wd_cl; | 243 | struct mei_cl wd_cl; |
244 | bool wd_interface_reg; | ||
240 | bool wd_pending; | 245 | bool wd_pending; |
241 | bool wd_stopped; | 246 | bool wd_stopped; |
242 | bool wd_bypass; /* if false, don't refresh watchdog ME client */ | 247 | bool wd_bypass; /* if false, don't refresh watchdog ME client */ |
243 | u16 wd_timeout; /* seconds ((wd_data[1] << 8) + wd_data[0]) */ | 248 | u16 wd_timeout; /* seconds ((wd_data[1] << 8) + wd_data[0]) */ |
244 | u16 wd_due_counter; | ||
245 | unsigned char wd_data[MEI_START_WD_DATA_SIZE]; | 249 | unsigned char wd_data[MEI_START_WD_DATA_SIZE]; |
246 | 250 | ||
247 | 251 | ||
248 | |||
249 | struct file *iamthif_file_object; | 252 | struct file *iamthif_file_object; |
250 | struct mei_cl iamthif_cl; | 253 | struct mei_cl iamthif_cl; |
251 | struct mei_cl_cb *iamthif_current_cb; | 254 | struct mei_cl_cb *iamthif_current_cb; |
@@ -259,8 +262,6 @@ struct mei_device { | |||
259 | bool iamthif_flow_control_pending; | 262 | bool iamthif_flow_control_pending; |
260 | bool iamthif_ioctl; | 263 | bool iamthif_ioctl; |
261 | bool iamthif_canceled; | 264 | bool iamthif_canceled; |
262 | |||
263 | bool wd_interface_reg; | ||
264 | }; | 265 | }; |
265 | 266 | ||
266 | 267 | ||
@@ -361,7 +362,8 @@ int mei_find_me_client_index(const struct mei_device *dev, uuid_le cuuid); | |||
361 | * | 362 | * |
362 | * returns register value (u32) | 363 | * returns register value (u32) |
363 | */ | 364 | */ |
364 | static inline u32 mei_reg_read(struct mei_device *dev, unsigned long offset) | 365 | static inline u32 mei_reg_read(const struct mei_device *dev, |
366 | unsigned long offset) | ||
365 | { | 367 | { |
366 | return ioread32(dev->mem_addr + offset); | 368 | return ioread32(dev->mem_addr + offset); |
367 | } | 369 | } |
@@ -373,8 +375,8 @@ static inline u32 mei_reg_read(struct mei_device *dev, unsigned long offset) | |||
373 | * @offset: offset from which to write the data | 375 | * @offset: offset from which to write the data |
374 | * @value: register value to write (u32) | 376 | * @value: register value to write (u32) |
375 | */ | 377 | */ |
376 | static inline void mei_reg_write(struct mei_device *dev, | 378 | static inline void mei_reg_write(const struct mei_device *dev, |
377 | unsigned long offset, u32 value) | 379 | unsigned long offset, u32 value) |
378 | { | 380 | { |
379 | iowrite32(value, dev->mem_addr + offset); | 381 | iowrite32(value, dev->mem_addr + offset); |
380 | } | 382 | } |
@@ -386,7 +388,7 @@ static inline void mei_reg_write(struct mei_device *dev, | |||
386 | * | 388 | * |
387 | * returns the byte read. | 389 | * returns the byte read. |
388 | */ | 390 | */ |
389 | static inline u32 mei_hcsr_read(struct mei_device *dev) | 391 | static inline u32 mei_hcsr_read(const struct mei_device *dev) |
390 | { | 392 | { |
391 | return mei_reg_read(dev, H_CSR); | 393 | return mei_reg_read(dev, H_CSR); |
392 | } | 394 | } |
@@ -398,7 +400,7 @@ static inline u32 mei_hcsr_read(struct mei_device *dev) | |||
398 | * | 400 | * |
399 | * returns ME_CSR_HA register value (u32) | 401 | * returns ME_CSR_HA register value (u32) |
400 | */ | 402 | */ |
401 | static inline u32 mei_mecsr_read(struct mei_device *dev) | 403 | static inline u32 mei_mecsr_read(const struct mei_device *dev) |
402 | { | 404 | { |
403 | return mei_reg_read(dev, ME_CSR_HA); | 405 | return mei_reg_read(dev, ME_CSR_HA); |
404 | } | 406 | } |
@@ -410,7 +412,7 @@ static inline u32 mei_mecsr_read(struct mei_device *dev) | |||
410 | * | 412 | * |
411 | * returns ME_CB_RW register value (u32) | 413 | * returns ME_CB_RW register value (u32) |
412 | */ | 414 | */ |
413 | static inline u32 mei_mecbrw_read(struct mei_device *dev) | 415 | static inline u32 mei_mecbrw_read(const struct mei_device *dev) |
414 | { | 416 | { |
415 | return mei_reg_read(dev, ME_CB_RW); | 417 | return mei_reg_read(dev, ME_CB_RW); |
416 | } | 418 | } |
diff --git a/drivers/misc/mei/wd.c b/drivers/misc/mei/wd.c index e2ec0505eb5c..5133fd77b91c 100644 --- a/drivers/misc/mei/wd.c +++ b/drivers/misc/mei/wd.c | |||
@@ -53,11 +53,12 @@ static void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout) | |||
53 | } | 53 | } |
54 | 54 | ||
55 | /** | 55 | /** |
56 | * host_init_wd - mei initialization wd. | 56 | * mei_wd_host_init - connect to the watchdog client |
57 | * | 57 | * |
58 | * @dev: the device structure | 58 | * @dev: the device structure |
59 | * returns -ENENT if wd client cannot be found | 59 | * returns -ENENT if wd client cannot be found |
60 | * -EIO if write has failed | 60 | * -EIO if write has failed |
61 | * 0 on success | ||
61 | */ | 62 | */ |
62 | int mei_wd_host_init(struct mei_device *dev) | 63 | int mei_wd_host_init(struct mei_device *dev) |
63 | { | 64 | { |
@@ -137,7 +138,6 @@ int mei_wd_stop(struct mei_device *dev, bool preserve) | |||
137 | return 0; | 138 | return 0; |
138 | 139 | ||
139 | dev->wd_timeout = 0; | 140 | dev->wd_timeout = 0; |
140 | dev->wd_due_counter = 0; | ||
141 | memcpy(dev->wd_data, mei_stop_wd_params, MEI_WD_PARAMS_SIZE); | 141 | memcpy(dev->wd_data, mei_stop_wd_params, MEI_WD_PARAMS_SIZE); |
142 | dev->stop = true; | 142 | dev->stop = true; |
143 | 143 | ||
@@ -357,8 +357,6 @@ void mei_watchdog_register(struct mei_device *dev) | |||
357 | { | 357 | { |
358 | dev_dbg(&dev->pdev->dev, "dev->wd_timeout =%d.\n", dev->wd_timeout); | 358 | dev_dbg(&dev->pdev->dev, "dev->wd_timeout =%d.\n", dev->wd_timeout); |
359 | 359 | ||
360 | dev->wd_due_counter = !!dev->wd_timeout; | ||
361 | |||
362 | if (watchdog_register_device(&amt_wd_dev)) { | 360 | if (watchdog_register_device(&amt_wd_dev)) { |
363 | dev_err(&dev->pdev->dev, | 361 | dev_err(&dev->pdev->dev, |
364 | "wd: unable to register watchdog device.\n"); | 362 | "wd: unable to register watchdog device.\n"); |