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-rw-r--r--arch/x86/include/asm/io_apic.h3
-rw-r--r--arch/x86/include/asm/x86_init.h1
-rw-r--r--arch/x86/kernel/apic/io_apic.c109
-rw-r--r--arch/x86/kernel/x86_init.c1
-rw-r--r--drivers/iommu/intel_irq_remapping.c8
5 files changed, 69 insertions, 53 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index d59e17232c4d..21aa81e6ec27 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -180,6 +180,8 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
180extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val); 180extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
181extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val); 181extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
182extern void native_disable_io_apic(void); 182extern void native_disable_io_apic(void);
183extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
184extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
183 185
184static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) 186static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
185{ 187{
@@ -225,6 +227,7 @@ static inline void disable_ioapic_support(void) { }
225#define native_io_apic_write NULL 227#define native_io_apic_write NULL
226#define native_io_apic_modify NULL 228#define native_io_apic_modify NULL
227#define native_disable_io_apic NULL 229#define native_disable_io_apic NULL
230#define native_io_apic_print_entries NULL
228#endif 231#endif
229 232
230#endif /* _ASM_X86_IO_APIC_H */ 233#endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index b1d2d6aefcc9..8ff79f7d3630 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -195,6 +195,7 @@ struct x86_io_apic_ops {
195 void (*write) (unsigned int apic, unsigned int reg, unsigned int value); 195 void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
196 void (*modify) (unsigned int apic, unsigned int reg, unsigned int value); 196 void (*modify) (unsigned int apic, unsigned int reg, unsigned int value);
197 void (*disable)(void); 197 void (*disable)(void);
198 void (*print_entries)(unsigned int apic, unsigned int nr_entries);
198}; 199};
199 200
200extern struct x86_init_ops x86_init; 201extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index cd5f4d7cc163..a18e27a8882a 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1513,9 +1513,63 @@ static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,
1513 ioapic_write_entry(ioapic_idx, pin, entry); 1513 ioapic_write_entry(ioapic_idx, pin, entry);
1514} 1514}
1515 1515
1516__apicdebuginit(void) print_IO_APIC(int ioapic_idx) 1516void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
1517{
1518 int i;
1519
1520 pr_debug(" NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:\n");
1521
1522 for (i = 0; i <= nr_entries; i++) {
1523 struct IO_APIC_route_entry entry;
1524
1525 entry = ioapic_read_entry(apic, i);
1526
1527 pr_debug(" %02x %02X ", i, entry.dest);
1528 pr_cont("%1d %1d %1d %1d %1d "
1529 "%1d %1d %02X\n",
1530 entry.mask,
1531 entry.trigger,
1532 entry.irr,
1533 entry.polarity,
1534 entry.delivery_status,
1535 entry.dest_mode,
1536 entry.delivery_mode,
1537 entry.vector);
1538 }
1539}
1540
1541void intel_ir_io_apic_print_entries(unsigned int apic,
1542 unsigned int nr_entries)
1517{ 1543{
1518 int i; 1544 int i;
1545
1546 pr_debug(" NR Indx Fmt Mask Trig IRR Pol Stat Indx2 Zero Vect:\n");
1547
1548 for (i = 0; i <= nr_entries; i++) {
1549 struct IR_IO_APIC_route_entry *ir_entry;
1550 struct IO_APIC_route_entry entry;
1551
1552 entry = ioapic_read_entry(apic, i);
1553
1554 ir_entry = (struct IR_IO_APIC_route_entry *)&entry;
1555
1556 pr_debug(" %02x %04X ", i, ir_entry->index);
1557 pr_cont("%1d %1d %1d %1d %1d "
1558 "%1d %1d %X %02X\n",
1559 ir_entry->format,
1560 ir_entry->mask,
1561 ir_entry->trigger,
1562 ir_entry->irr,
1563 ir_entry->polarity,
1564 ir_entry->delivery_status,
1565 ir_entry->index2,
1566 ir_entry->zero,
1567 ir_entry->vector);
1568 }
1569}
1570
1571__apicdebuginit(void) print_IO_APIC(int ioapic_idx)
1572{
1519 union IO_APIC_reg_00 reg_00; 1573 union IO_APIC_reg_00 reg_00;
1520 union IO_APIC_reg_01 reg_01; 1574 union IO_APIC_reg_01 reg_01;
1521 union IO_APIC_reg_02 reg_02; 1575 union IO_APIC_reg_02 reg_02;
@@ -1568,58 +1622,7 @@ __apicdebuginit(void) print_IO_APIC(int ioapic_idx)
1568 1622
1569 printk(KERN_DEBUG ".... IRQ redirection table:\n"); 1623 printk(KERN_DEBUG ".... IRQ redirection table:\n");
1570 1624
1571 if (irq_remapping_enabled) { 1625 x86_io_apic_ops.print_entries(ioapic_idx, reg_01.bits.entries);
1572 printk(KERN_DEBUG " NR Indx Fmt Mask Trig IRR"
1573 " Pol Stat Indx2 Zero Vect:\n");
1574 } else {
1575 printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"
1576 " Stat Dmod Deli Vect:\n");
1577 }
1578
1579 for (i = 0; i <= reg_01.bits.entries; i++) {
1580 if (irq_remapping_enabled) {
1581 struct IO_APIC_route_entry entry;
1582 struct IR_IO_APIC_route_entry *ir_entry;
1583
1584 entry = ioapic_read_entry(ioapic_idx, i);
1585 ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
1586 printk(KERN_DEBUG " %02x %04X ",
1587 i,
1588 ir_entry->index
1589 );
1590 pr_cont("%1d %1d %1d %1d %1d "
1591 "%1d %1d %X %02X\n",
1592 ir_entry->format,
1593 ir_entry->mask,
1594 ir_entry->trigger,
1595 ir_entry->irr,
1596 ir_entry->polarity,
1597 ir_entry->delivery_status,
1598 ir_entry->index2,
1599 ir_entry->zero,
1600 ir_entry->vector
1601 );
1602 } else {
1603 struct IO_APIC_route_entry entry;
1604
1605 entry = ioapic_read_entry(ioapic_idx, i);
1606 printk(KERN_DEBUG " %02x %02X ",
1607 i,
1608 entry.dest
1609 );
1610 pr_cont("%1d %1d %1d %1d %1d "
1611 "%1d %1d %02X\n",
1612 entry.mask,
1613 entry.trigger,
1614 entry.irr,
1615 entry.polarity,
1616 entry.delivery_status,
1617 entry.dest_mode,
1618 entry.delivery_mode,
1619 entry.vector
1620 );
1621 }
1622 }
1623} 1626}
1624 1627
1625__apicdebuginit(void) print_IO_APICs(void) 1628__apicdebuginit(void) print_IO_APICs(void)
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 754524acc845..ee4af8b04841 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -123,4 +123,5 @@ struct x86_io_apic_ops x86_io_apic_ops = {
123 .write = native_io_apic_write, 123 .write = native_io_apic_write,
124 .modify = native_io_apic_modify, 124 .modify = native_io_apic_modify,
125 .disable = native_disable_io_apic, 125 .disable = native_disable_io_apic,
126 .print_entries = native_io_apic_print_entries,
126}; 127};
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index af8904de1d44..cb9a72d4cc09 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -617,6 +617,14 @@ static int __init intel_enable_irq_remapping(void)
617 goto error; 617 goto error;
618 618
619 irq_remapping_enabled = 1; 619 irq_remapping_enabled = 1;
620
621 /*
622 * VT-d has a different layout for IO-APIC entries when
623 * interrupt remapping is enabled. So it needs a special routine
624 * to print IO-APIC entries for debugging purposes too.
625 */
626 x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries;
627
620 pr_info("Enabled IRQ remapping in %s mode\n", eim ? "x2apic" : "xapic"); 628 pr_info("Enabled IRQ remapping in %s mode\n", eim ? "x2apic" : "xapic");
621 629
622 return eim ? IRQ_REMAP_X2APIC_MODE : IRQ_REMAP_XAPIC_MODE; 630 return eim ? IRQ_REMAP_X2APIC_MODE : IRQ_REMAP_XAPIC_MODE;