diff options
-rw-r--r-- | drivers/pwm/pwm-lpc32xx.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index adb87f0c1633..c9b2eb5932b1 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c | |||
@@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, | |||
49 | c = 0; /* 0 set division by 256 */ | 49 | c = 0; /* 0 set division by 256 */ |
50 | period_cycles = c; | 50 | period_cycles = c; |
51 | 51 | ||
52 | /* The duty-cycle value is as follows: | ||
53 | * | ||
54 | * DUTY-CYCLE HIGH LEVEL | ||
55 | * 1 99.9% | ||
56 | * 25 90.0% | ||
57 | * 128 50.0% | ||
58 | * 220 10.0% | ||
59 | * 255 0.1% | ||
60 | * 0 0.0% | ||
61 | * | ||
62 | * In other words, the register value is duty-cycle % 256 with | ||
63 | * duty-cycle in the range 1-256. | ||
64 | */ | ||
52 | c = 256 * duty_ns; | 65 | c = 256 * duty_ns; |
53 | do_div(c, period_ns); | 66 | do_div(c, period_ns); |
54 | duty_cycles = c; | 67 | if (c > 255) |
68 | c = 255; | ||
69 | duty_cycles = 256 - c; | ||
55 | 70 | ||
56 | writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles), | 71 | writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles), |
57 | lpc32xx->base + (pwm->hwpwm << 2)); | 72 | lpc32xx->base + (pwm->hwpwm << 2)); |