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-rw-r--r--arch/mips/Kconfig24
-rw-r--r--arch/mips/au1000/Kconfig1
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/csrc-r4k.c29
-rw-r--r--arch/mips/kernel/smp-up.c67
-rw-r--r--arch/mips/kernel/time.c25
-rw-r--r--arch/mips/pmc-sierra/Kconfig2
-rw-r--r--arch/mips/vr41xx/Kconfig6
-rw-r--r--include/asm-mips/time.h11
9 files changed, 142 insertions, 25 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2f2ce0c28bc0..7750829b416a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,6 +22,7 @@ config MACH_ALCHEMY
22config BASLER_EXCITE 22config BASLER_EXCITE
23 bool "Basler eXcite smart camera" 23 bool "Basler eXcite smart camera"
24 select CEVT_R4K 24 select CEVT_R4K
25 select CSRC_R4K
25 select DMA_COHERENT 26 select DMA_COHERENT
26 select HW_HAS_PCI 27 select HW_HAS_PCI
27 select IRQ_CPU 28 select IRQ_CPU
@@ -49,6 +50,7 @@ config BASLER_EXCITE_PROTOTYPE
49config BCM47XX 50config BCM47XX
50 bool "BCM47XX based boards" 51 bool "BCM47XX based boards"
51 select CEVT_R4K 52 select CEVT_R4K
53 select CSRC_R4K
52 select DMA_NONCOHERENT 54 select DMA_NONCOHERENT
53 select HW_HAS_PCI 55 select HW_HAS_PCI
54 select IRQ_CPU 56 select IRQ_CPU
@@ -66,6 +68,7 @@ config BCM47XX
66config MIPS_COBALT 68config MIPS_COBALT
67 bool "Cobalt Server" 69 bool "Cobalt Server"
68 select CEVT_R4K 70 select CEVT_R4K
71 select CSRC_R4K
69 select CEVT_GT641XX 72 select CEVT_GT641XX
70 select DMA_NONCOHERENT 73 select DMA_NONCOHERENT
71 select HW_HAS_PCI 74 select HW_HAS_PCI
@@ -85,6 +88,7 @@ config MACH_DECSTATION
85 bool "DECstations" 88 bool "DECstations"
86 select BOOT_ELF32 89 select BOOT_ELF32
87 select CEVT_R4K 90 select CEVT_R4K
91 select CSRC_R4K
88 select DMA_NONCOHERENT 92 select DMA_NONCOHERENT
89 select NO_IOPORT 93 select NO_IOPORT
90 select IRQ_CPU 94 select IRQ_CPU
@@ -117,6 +121,7 @@ config MACH_JAZZ
117 select ARC32 121 select ARC32
118 select ARCH_MAY_HAVE_PC_FDC 122 select ARCH_MAY_HAVE_PC_FDC
119 select CEVT_R4K 123 select CEVT_R4K
124 select CSRC_R4K
120 select GENERIC_ISA_DMA 125 select GENERIC_ISA_DMA
121 select IRQ_CPU 126 select IRQ_CPU
122 select I8253 127 select I8253
@@ -137,6 +142,7 @@ config MACH_JAZZ
137config LASAT 142config LASAT
138 bool "LASAT Networks platforms" 143 bool "LASAT Networks platforms"
139 select CEVT_R4K 144 select CEVT_R4K
145 select CSRC_R4K
140 select DMA_NONCOHERENT 146 select DMA_NONCOHERENT
141 select SYS_HAS_EARLY_PRINTK 147 select SYS_HAS_EARLY_PRINTK
142 select HW_HAS_PCI 148 select HW_HAS_PCI
@@ -154,6 +160,7 @@ config LEMOTE_FULONG
154 bool "Lemote Fulong mini-PC" 160 bool "Lemote Fulong mini-PC"
155 select ARCH_SPARSEMEM_ENABLE 161 select ARCH_SPARSEMEM_ENABLE
156 select CEVT_R4K 162 select CEVT_R4K
163 select CSRC_R4K
157 select SYS_HAS_CPU_LOONGSON2 164 select SYS_HAS_CPU_LOONGSON2
158 select DMA_NONCOHERENT 165 select DMA_NONCOHERENT
159 select BOOT_ELF32 166 select BOOT_ELF32
@@ -179,6 +186,7 @@ config MIPS_ATLAS
179 bool "MIPS Atlas board" 186 bool "MIPS Atlas board"
180 select BOOT_ELF32 187 select BOOT_ELF32
181 select CEVT_R4K 188 select CEVT_R4K
189 select CSRC_R4K
182 select DMA_NONCOHERENT 190 select DMA_NONCOHERENT
183 select SYS_HAS_EARLY_PRINTK 191 select SYS_HAS_EARLY_PRINTK
184 select IRQ_CPU 192 select IRQ_CPU
@@ -210,6 +218,7 @@ config MIPS_MALTA
210 select ARCH_MAY_HAVE_PC_FDC 218 select ARCH_MAY_HAVE_PC_FDC
211 select BOOT_ELF32 219 select BOOT_ELF32
212 select CEVT_R4K 220 select CEVT_R4K
221 select CSRC_R4K
213 select DMA_NONCOHERENT 222 select DMA_NONCOHERENT
214 select GENERIC_ISA_DMA 223 select GENERIC_ISA_DMA
215 select IRQ_CPU 224 select IRQ_CPU
@@ -241,6 +250,7 @@ config MIPS_MALTA
241config MIPS_SEAD 250config MIPS_SEAD
242 bool "MIPS SEAD board" 251 bool "MIPS SEAD board"
243 select CEVT_R4K 252 select CEVT_R4K
253 select CSRC_R4K
244 select IRQ_CPU 254 select IRQ_CPU
245 select DMA_NONCOHERENT 255 select DMA_NONCOHERENT
246 select SYS_HAS_EARLY_PRINTK 256 select SYS_HAS_EARLY_PRINTK
@@ -260,6 +270,7 @@ config MIPS_SEAD
260config MIPS_SIM 270config MIPS_SIM
261 bool 'MIPS simulator (MIPSsim)' 271 bool 'MIPS simulator (MIPSsim)'
262 select CEVT_R4K 272 select CEVT_R4K
273 select CSRC_R4K
263 select DMA_NONCOHERENT 274 select DMA_NONCOHERENT
264 select SYS_HAS_EARLY_PRINTK 275 select SYS_HAS_EARLY_PRINTK
265 select IRQ_CPU 276 select IRQ_CPU
@@ -278,6 +289,7 @@ config MIPS_SIM
278config MARKEINS 289config MARKEINS
279 bool "NEC EMMA2RH Mark-eins" 290 bool "NEC EMMA2RH Mark-eins"
280 select CEVT_R4K 291 select CEVT_R4K
292 select CSRC_R4K
281 select DMA_NONCOHERENT 293 select DMA_NONCOHERENT
282 select HW_HAS_PCI 294 select HW_HAS_PCI
283 select IRQ_CPU 295 select IRQ_CPU
@@ -293,6 +305,7 @@ config MARKEINS
293config MACH_VR41XX 305config MACH_VR41XX
294 bool "NEC VR4100 series based machines" 306 bool "NEC VR4100 series based machines"
295 select CEVT_R4K 307 select CEVT_R4K
308 select CSRC_R4K
296 select SYS_HAS_CPU_VR41XX 309 select SYS_HAS_CPU_VR41XX
297 select GENERIC_HARDIRQS_NO__DO_IRQ 310 select GENERIC_HARDIRQS_NO__DO_IRQ
298 311
@@ -330,6 +343,7 @@ config PMC_MSP
330config PMC_YOSEMITE 343config PMC_YOSEMITE
331 bool "PMC-Sierra Yosemite eval board" 344 bool "PMC-Sierra Yosemite eval board"
332 select CEVT_R4K 345 select CEVT_R4K
346 select CSRC_R4K
333 select DMA_COHERENT 347 select DMA_COHERENT
334 select HW_HAS_PCI 348 select HW_HAS_PCI
335 select IRQ_CPU 349 select IRQ_CPU
@@ -351,6 +365,7 @@ config PMC_YOSEMITE
351config QEMU 365config QEMU
352 bool "Qemu" 366 bool "Qemu"
353 select CEVT_R4K 367 select CEVT_R4K
368 select CSRC_R4K
354 select DMA_COHERENT 369 select DMA_COHERENT
355 select GENERIC_ISA_DMA 370 select GENERIC_ISA_DMA
356 select HAVE_STD_PC_SERIAL_PORT 371 select HAVE_STD_PC_SERIAL_PORT
@@ -382,6 +397,7 @@ config SGI_IP22
382 select ARC32 397 select ARC32
383 select BOOT_ELF32 398 select BOOT_ELF32
384 select CEVT_R4K 399 select CEVT_R4K
400 select CSRC_R4K
385 select DMA_NONCOHERENT 401 select DMA_NONCOHERENT
386 select HW_HAS_EISA 402 select HW_HAS_EISA
387 select I8253 403 select I8253
@@ -427,6 +443,7 @@ config SGI_IP32
427 select ARC32 443 select ARC32
428 select BOOT_ELF32 444 select BOOT_ELF32
429 select CEVT_R4K 445 select CEVT_R4K
446 select CSRC_R4K
430 select DMA_NONCOHERENT 447 select DMA_NONCOHERENT
431 select HW_HAS_PCI 448 select HW_HAS_PCI
432 select IRQ_CPU 449 select IRQ_CPU
@@ -556,6 +573,7 @@ config SNI_RM
556 select ARCH_MAY_HAVE_PC_FDC 573 select ARCH_MAY_HAVE_PC_FDC
557 select BOOT_ELF32 574 select BOOT_ELF32
558 select CEVT_R4K 575 select CEVT_R4K
576 select CSRC_R4K
559 select DMA_NONCOHERENT 577 select DMA_NONCOHERENT
560 select GENERIC_ISA_DMA 578 select GENERIC_ISA_DMA
561 select HW_HAS_EISA 579 select HW_HAS_EISA
@@ -599,6 +617,7 @@ config TOSHIBA_JMR3927
599config TOSHIBA_RBTX4927 617config TOSHIBA_RBTX4927
600 bool "Toshiba RBTX49[23]7 board" 618 bool "Toshiba RBTX49[23]7 board"
601 select CEVT_R4K 619 select CEVT_R4K
620 select CSRC_R4K
602 select CEVT_TXX9 621 select CEVT_TXX9
603 select DMA_NONCOHERENT 622 select DMA_NONCOHERENT
604 select HAS_TXX9_SERIAL 623 select HAS_TXX9_SERIAL
@@ -621,6 +640,7 @@ config TOSHIBA_RBTX4927
621config TOSHIBA_RBTX4938 640config TOSHIBA_RBTX4938
622 bool "Toshiba RBTX4938 board" 641 bool "Toshiba RBTX4938 board"
623 select CEVT_R4K 642 select CEVT_R4K
643 select CSRC_R4K
624 select CEVT_TXX9 644 select CEVT_TXX9
625 select DMA_NONCOHERENT 645 select DMA_NONCOHERENT
626 select HAS_TXX9_SERIAL 646 select HAS_TXX9_SERIAL
@@ -642,6 +662,7 @@ config TOSHIBA_RBTX4938
642config WR_PPMC 662config WR_PPMC
643 bool "Wind River PPMC board" 663 bool "Wind River PPMC board"
644 select CEVT_R4K 664 select CEVT_R4K
665 select CSRC_R4K
645 select IRQ_CPU 666 select IRQ_CPU
646 select BOOT_ELF32 667 select BOOT_ELF32
647 select DMA_NONCOHERENT 668 select DMA_NONCOHERENT
@@ -752,6 +773,9 @@ config CEVT_TXX9
752config CSRC_BCM1480 773config CSRC_BCM1480
753 bool 774 bool
754 775
776config CSRC_R4K
777 bool
778
755config CSRC_SB1250 779config CSRC_SB1250
756 bool 780 bool
757 781
diff --git a/arch/mips/au1000/Kconfig b/arch/mips/au1000/Kconfig
index b36cec58a9a8..05d1354aad3a 100644
--- a/arch/mips/au1000/Kconfig
+++ b/arch/mips/au1000/Kconfig
@@ -138,6 +138,7 @@ config SOC_AU1X00
138 bool 138 bool
139 select 64BIT_PHYS_ADDR 139 select 64BIT_PHYS_ADDR
140 select CEVT_R4K 140 select CEVT_R4K
141 select CSRC_R4K
141 select IRQ_CPU 142 select IRQ_CPU
142 select SYS_HAS_CPU_MIPS32_R1 143 select SYS_HAS_CPU_MIPS32_R1
143 select SYS_SUPPORTS_32BIT_KERNEL 144 select SYS_SUPPORTS_32BIT_KERNEL
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index b551535b7e48..ffa08362de17 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o
14obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o 14obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o
15obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o 15obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o
16obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o 16obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o
17obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o
17obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o 18obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
18 19
19binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ 20binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
@@ -43,6 +44,7 @@ obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o
43obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o 44obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o
44 45
45obj-$(CONFIG_SMP) += smp.o 46obj-$(CONFIG_SMP) += smp.o
47obj-$(CONFIG_SMP_UP) += smp-up.o
46 48
47obj-$(CONFIG_MIPS_MT) += mips-mt.o 49obj-$(CONFIG_MIPS_MT) += mips-mt.o
48obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o 50obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
new file mode 100644
index 000000000000..74c5c62365a8
--- /dev/null
+++ b/arch/mips/kernel/csrc-r4k.c
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 by Ralf Baechle
7 */
8
9static cycle_t c0_hpt_read(void)
10{
11 return read_c0_count();
12}
13
14static struct clocksource clocksource_mips = {
15 .name = "MIPS",
16 .read = c0_hpt_read,
17 .mask = CLOCKSOURCE_MASK(32),
18 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
19};
20
21static void __init init_mips_clocksource(void)
22{
23 /* Calclate a somewhat reasonable rating value */
24 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
25
26 clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
27
28 clocksource_register(&clocksource_mips);
29}
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
new file mode 100644
index 000000000000..ead6c30eeb14
--- /dev/null
+++ b/arch/mips/kernel/smp-up.c
@@ -0,0 +1,67 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 by Ralf Baechle (ralf@linux-mips.org)
7 *
8 * Symmetric Uniprocessor (TM) Support
9 */
10#include <linux/kernel.h>
11#include <linux/sched.h>
12
13/*
14 * Send inter-processor interrupt
15 */
16void up_send_ipi_single(int cpu, unsigned int action)
17{
18 panic(KERN_ERR "%s called", __func__);
19}
20
21static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action)
22{
23 panic(KERN_ERR "%s called", __func__);
24}
25
26/*
27 * After we've done initial boot, this function is called to allow the
28 * board code to clean up state, if needed
29 */
30void __cpuinit up_init_secondary(void)
31{
32}
33
34void __cpuinit up_smp_finish(void)
35{
36}
37
38/* Hook for after all CPUs are online */
39void up_cpus_done(void)
40{
41}
42
43/*
44 * Firmware CPU startup hook
45 */
46void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
47{
48}
49
50void __init up_smp_setup(void)
51{
52}
53
54void __init up_prepare_cpus(unsigned int max_cpus)
55{
56}
57
58struct plat_smp_ops up_smp_ops = {
59 .send_ipi_single = up_send_ipi_single,
60 .send_ipi_mask = up_send_ipi_mask,
61 .init_secondary = up_init_secondary,
62 .smp_finish = up_smp_finish,
63 .cpus_done = up_cpus_done,
64 .boot_secondary = up_boot_secondary,
65 .smp_setup = up_smp_setup,
66 .prepare_cpus = up_prepare_cpus,
67};
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index d7d52efff51f..52075426c373 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -50,14 +50,6 @@ int update_persistent_clock(struct timespec now)
50 return rtc_mips_set_mmss(now.tv_sec); 50 return rtc_mips_set_mmss(now.tv_sec);
51} 51}
52 52
53/*
54 * High precision timer functions for a R4k-compatible timer.
55 */
56static cycle_t c0_hpt_read(void)
57{
58 return read_c0_count();
59}
60
61int (*mips_timer_state)(void); 53int (*mips_timer_state)(void);
62 54
63int null_perf_irq(void) 55int null_perf_irq(void)
@@ -84,13 +76,6 @@ EXPORT_SYMBOL(perf_irq);
84 76
85unsigned int mips_hpt_frequency; 77unsigned int mips_hpt_frequency;
86 78
87static struct clocksource clocksource_mips = {
88 .name = "MIPS",
89 .read = c0_hpt_read,
90 .mask = CLOCKSOURCE_MASK(32),
91 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
92};
93
94void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock) 79void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
95{ 80{
96 u64 temp; 81 u64 temp;
@@ -124,16 +109,6 @@ void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
124 cd->mult = (u32) temp; 109 cd->mult = (u32) temp;
125} 110}
126 111
127static void __init init_mips_clocksource(void)
128{
129 /* Calclate a somewhat reasonable rating value */
130 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
131
132 clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
133
134 clocksource_register(&clocksource_mips);
135}
136
137void __init __weak plat_time_init(void) 112void __init __weak plat_time_init(void)
138{ 113{
139} 114}
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig
index 6b293ce0935f..90261b83db04 100644
--- a/arch/mips/pmc-sierra/Kconfig
+++ b/arch/mips/pmc-sierra/Kconfig
@@ -5,12 +5,14 @@ choice
5config PMC_MSP4200_EVAL 5config PMC_MSP4200_EVAL
6 bool "PMC-Sierra MSP4200 Eval Board" 6 bool "PMC-Sierra MSP4200 Eval Board"
7 select CEVT_R4K 7 select CEVT_R4K
8 select CSRC_R4K
8 select IRQ_MSP_SLP 9 select IRQ_MSP_SLP
9 select HW_HAS_PCI 10 select HW_HAS_PCI
10 11
11config PMC_MSP4200_GW 12config PMC_MSP4200_GW
12 bool "PMC-Sierra MSP4200 VoIP Gateway" 13 bool "PMC-Sierra MSP4200 VoIP Gateway"
13 select CEVT_R4K 14 select CEVT_R4K
15 select CSRC_R4K
14 select IRQ_MSP_SLP 16 select IRQ_MSP_SLP
15 select HW_HAS_PCI 17 select HW_HAS_PCI
16 18
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index eeb089f20c0d..559acc09c819 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -6,6 +6,7 @@ choice
6config CASIO_E55 6config CASIO_E55
7 bool "CASIO CASSIOPEIA E-10/15/55/65" 7 bool "CASIO CASSIOPEIA E-10/15/55/65"
8 select CEVT_R4K 8 select CEVT_R4K
9 select CSRC_R4K
9 select DMA_NONCOHERENT 10 select DMA_NONCOHERENT
10 select IRQ_CPU 11 select IRQ_CPU
11 select ISA 12 select ISA
@@ -15,6 +16,7 @@ config CASIO_E55
15config IBM_WORKPAD 16config IBM_WORKPAD
16 bool "IBM WorkPad z50" 17 bool "IBM WorkPad z50"
17 select CEVT_R4K 18 select CEVT_R4K
19 select CSRC_R4K
18 select DMA_NONCOHERENT 20 select DMA_NONCOHERENT
19 select IRQ_CPU 21 select IRQ_CPU
20 select ISA 22 select ISA
@@ -24,6 +26,7 @@ config IBM_WORKPAD
24config NEC_CMBVR4133 26config NEC_CMBVR4133
25 bool "NEC CMB-VR4133" 27 bool "NEC CMB-VR4133"
26 select CEVT_R4K 28 select CEVT_R4K
29 select CSRC_R4K
27 select DMA_NONCOHERENT 30 select DMA_NONCOHERENT
28 select IRQ_CPU 31 select IRQ_CPU
29 select HW_HAS_PCI 32 select HW_HAS_PCI
@@ -33,6 +36,7 @@ config NEC_CMBVR4133
33config TANBAC_TB022X 36config TANBAC_TB022X
34 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM" 37 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
35 select CEVT_R4K 38 select CEVT_R4K
39 select CSRC_R4K
36 select DMA_NONCOHERENT 40 select DMA_NONCOHERENT
37 select IRQ_CPU 41 select IRQ_CPU
38 select HW_HAS_PCI 42 select HW_HAS_PCI
@@ -48,6 +52,7 @@ config TANBAC_TB022X
48config VICTOR_MPC30X 52config VICTOR_MPC30X
49 bool "Victor MP-C303/304" 53 bool "Victor MP-C303/304"
50 select CEVT_R4K 54 select CEVT_R4K
55 select CSRC_R4K
51 select DMA_NONCOHERENT 56 select DMA_NONCOHERENT
52 select IRQ_CPU 57 select IRQ_CPU
53 select HW_HAS_PCI 58 select HW_HAS_PCI
@@ -58,6 +63,7 @@ config VICTOR_MPC30X
58config ZAO_CAPCELLA 63config ZAO_CAPCELLA
59 bool "ZAO Networks Capcella" 64 bool "ZAO Networks Capcella"
60 select CEVT_R4K 65 select CEVT_R4K
66 select CSRC_R4K
61 select DMA_NONCOHERENT 67 select DMA_NONCOHERENT
62 select IRQ_CPU 68 select IRQ_CPU
63 select HW_HAS_PCI 69 select HW_HAS_PCI
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 1922494a0d9e..7717934f94c3 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -67,6 +67,17 @@ static inline int mips_clockevent_init(void)
67} 67}
68#endif 68#endif
69 69
70/*
71 * Initialize the count register as a clocksource
72 */
73#ifdef CONFIG_CEVT_R4K
74extern void init_mips_clocksource(void);
75#else
76static inline void init_mips_clocksource(void)
77{
78}
79#endif
80
70extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock); 81extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
71extern void clockevent_set_clock(struct clock_event_device *cd, 82extern void clockevent_set_clock(struct clock_event_device *cd,
72 unsigned int clock); 83 unsigned int clock);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 10:41:30 -0400