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-rw-r--r--drivers/video/pmagb-b-fb.c417
-rw-r--r--include/video/pmagb-b-fb.h74
2 files changed, 358 insertions, 133 deletions
diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c
index d14eaee91cff..a483b13e117b 100644
--- a/drivers/video/pmagb-b-fb.c
+++ b/drivers/video/pmagb-b-fb.c
@@ -1,114 +1,128 @@
1/* 1/*
2 * linux/drivers/video/pmagb-b-fb.c 2 * linux/drivers/video/pmagb-b-fb.c
3 * 3 *
4 * PMAGB-B TurboChannel framebuffer card support ... derived from: 4 * PMAGB-B TURBOchannel Smart Frame Buffer (SFB) card support,
5 * derived from:
5 * "HP300 Topcat framebuffer support (derived from macfb of all things) 6 * "HP300 Topcat framebuffer support (derived from macfb of all things)
6 * Phil Blundell <philb@gnu.org> 1998", the original code can be 7 * Phil Blundell <philb@gnu.org> 1998", the original code can be
7 * found in the file hpfb.c in the same directory. 8 * found in the file hpfb.c in the same directory.
8 * 9 *
9 * DECstation related code Copyright (C) 1999, 2000, 2001 by 10 * DECstation related code Copyright (C) 1999, 2000, 2001 by
10 * Michael Engel <engel@unix-ag.org>, 11 * Michael Engel <engel@unix-ag.org>,
11 * Karsten Merker <merker@linuxtag.org> and 12 * Karsten Merker <merker@linuxtag.org> and
12 * Harald Koerfgen. 13 * Harald Koerfgen.
13 * This file is subject to the terms and conditions of the GNU General 14 * Copyright (c) 2005 Maciej W. Rozycki
14 * Public License. See the file COPYING in the main directory of this
15 * archive for more details.
16 * 15 *
16 * This file is subject to the terms and conditions of the GNU General
17 * Public License. See the file COPYING in the main directory of this
18 * archive for more details.
17 */ 19 */
18 20
19/* 21#include <linux/compiler.h>
20 * We currently only support the PMAGB-B in high resolution mode
21 * as I know of no way to detect low resolution mode set via jumper.
22 * KM, 2001/01/07
23 */
24
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/sched.h>
28#include <linux/errno.h>
29#include <linux/string.h>
30#include <linux/timer.h>
31#include <linux/mm.h>
32#include <linux/tty.h>
33#include <linux/slab.h>
34#include <linux/delay.h> 22#include <linux/delay.h>
35#include <linux/init.h> 23#include <linux/errno.h>
36#include <linux/fb.h> 24#include <linux/fb.h>
37#include <asm/bootinfo.h> 25#include <linux/init.h>
38#include <asm/dec/machtype.h> 26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/types.h>
29
30#include <asm/bug.h>
31#include <asm/io.h>
32#include <asm/system.h>
33
39#include <asm/dec/tc.h> 34#include <asm/dec/tc.h>
35
40#include <video/pmagb-b-fb.h> 36#include <video/pmagb-b-fb.h>
41 37
42struct pmagb_b_ramdac_regs { 38
43 unsigned char addr_low; 39struct pmagbbfb_par {
44 unsigned char pad0[3]; 40 struct fb_info *next;
45 unsigned char addr_hi; 41 volatile void __iomem *mmio;
46 unsigned char pad1[3]; 42 volatile void __iomem *smem;
47 unsigned char data; 43 volatile u32 __iomem *sfb;
48 unsigned char pad2[3]; 44 volatile u32 __iomem *dac;
49 unsigned char cmap; 45 unsigned int osc0;
46 unsigned int osc1;
47 int slot;
50}; 48};
51 49
52/*
53 * Max 3 TURBOchannel slots -> max 3 PMAGB-B :)
54 */
55static struct fb_info pmagbb_fb_info[3];
56 50
57static struct fb_var_screeninfo pmagbbfb_defined = { 51static struct fb_info *root_pmagbbfb_dev;
58 .xres = 1280, 52
59 .yres = 1024, 53static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
60 .xres_virtual = 1280,
61 .yres_virtual = 1024,
62 .bits_per_pixel = 8, 54 .bits_per_pixel = 8,
63 .red.length = 8, 55 .red.length = 8,
64 .green.length = 8, 56 .green.length = 8,
65 .blue.length = 8, 57 .blue.length = 8,
66 .activate = FB_ACTIVATE_NOW, 58 .activate = FB_ACTIVATE_NOW,
67 .height = 274, 59 .height = -1,
68 .width = 195, 60 .width = -1,
69 .accel_flags = FB_ACCEL_NONE, 61 .accel_flags = FB_ACCEL_NONE,
62 .sync = FB_SYNC_ON_GREEN,
70 .vmode = FB_VMODE_NONINTERLACED, 63 .vmode = FB_VMODE_NONINTERLACED,
71}; 64};
72 65
73static struct fb_fix_screeninfo pmagbafb_fix = { 66static struct fb_fix_screeninfo pmagbbfb_fix __initdata = {
74 .id = "PMAGB-BA", 67 .id = "PMAGB-BA",
75 .smem_len = (1280 * 1024), 68 .smem_len = (2048 * 1024),
76 .type = FB_TYPE_PACKED_PIXELS, 69 .type = FB_TYPE_PACKED_PIXELS,
77 .visual = FB_VISUAL_PSEUDOCOLOR, 70 .visual = FB_VISUAL_PSEUDOCOLOR,
78 .line_length = 1280, 71 .mmio_len = PMAGB_B_FBMEM,
72};
73
74
75static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v)
76{
77 writel(v, par->sfb + reg / 4);
79} 78}
80 79
81/* 80static inline u32 sfb_read(struct pmagbbfb_par *par, unsigned int reg)
82 * Turn hardware cursor off 81{
83 */ 82 return readl(par->sfb + reg / 4);
84void pmagbbfb_erase_cursor(struct pmagb_b_ramdac_regs *bt459_regs) 83}
84
85static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v)
85{ 86{
86 bt459_regs->addr_low = 0; 87 writeb(v, par->dac + reg / 4);
87 bt459_regs->addr_hi = 3;
88 bt459_regs->data = 0;
89} 88}
90 89
90static inline u8 dac_read(struct pmagbbfb_par *par, unsigned int reg)
91{
92 return readb(par->dac + reg / 4);
93}
94
95static inline void gp0_write(struct pmagbbfb_par *par, u32 v)
96{
97 writel(v, par->mmio + PMAGB_B_GP0);
98}
99
100
91/* 101/*
92 * Set the palette. 102 * Set the palette.
93 */ 103 */
94static int pmagbbfb_setcolreg(unsigned regno, unsigned red, unsigned green, 104static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
95 unsigned blue, unsigned transp, 105 unsigned int green, unsigned int blue,
96 struct fb_info *info) 106 unsigned int transp, struct fb_info *info)
97{ 107{
98 struct pmagb_b_ramdac_regs *bt459_regs = (struct pmagb_b_ramdac_regs *) info->par; 108 struct pmagbbfb_par *par = info->par;
99 109
100 if (regno >= info->cmap.len) 110 BUG_ON(regno >= info->cmap.len);
101 return 1;
102 111
103 red >>= 8; /* The cmap fields are 16 bits */ 112 red >>= 8; /* The cmap fields are 16 bits */
104 green >>= 8; /* wide, but the harware colormap */ 113 green >>= 8; /* wide, but the hardware colormap */
105 blue >>= 8; /* registers are only 8 bits wide */ 114 blue >>= 8; /* registers are only 8 bits wide */
106 115
107 bt459_regs->addr_low = (__u8) regno; 116 mb();
108 bt459_regs->addr_hi = 0; 117 dac_write(par, BT459_ADDR_LO, regno);
109 bt459_regs->cmap = red; 118 dac_write(par, BT459_ADDR_HI, 0x00);
110 bt459_regs->cmap = green; 119 wmb();
111 bt459_regs->cmap = blue; 120 dac_write(par, BT459_CMAP, red);
121 wmb();
122 dac_write(par, BT459_CMAP, green);
123 wmb();
124 dac_write(par, BT459_CMAP, blue);
125
112 return 0; 126 return 0;
113} 127}
114 128
@@ -121,62 +135,247 @@ static struct fb_ops pmagbbfb_ops = {
121 .fb_cursor = soft_cursor, 135 .fb_cursor = soft_cursor,
122}; 136};
123 137
124int __init pmagbbfb_init_one(int slot) 138
139/*
140 * Turn the hardware cursor off.
141 */
142static void __init pmagbbfb_erase_cursor(struct fb_info *info)
143{
144 struct pmagbbfb_par *par = info->par;
145
146 mb();
147 dac_write(par, BT459_ADDR_LO, 0x00);
148 dac_write(par, BT459_ADDR_HI, 0x03);
149 wmb();
150 dac_write(par, BT459_DATA, 0x00);
151}
152
153/*
154 * Set up screen parameters.
155 */
156static void __init pmagbbfb_screen_setup(struct fb_info *info)
157{
158 struct pmagbbfb_par *par = info->par;
159
160 info->var.xres = ((sfb_read(par, SFB_REG_VID_HOR) >>
161 SFB_VID_HOR_PIX_SHIFT) & SFB_VID_HOR_PIX_MASK) * 4;
162 info->var.xres_virtual = info->var.xres;
163 info->var.yres = (sfb_read(par, SFB_REG_VID_VER) >>
164 SFB_VID_VER_SL_SHIFT) & SFB_VID_VER_SL_MASK;
165 info->var.yres_virtual = info->var.yres;
166 info->var.left_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
167 SFB_VID_HOR_BP_SHIFT) &
168 SFB_VID_HOR_BP_MASK) * 4;
169 info->var.right_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
170 SFB_VID_HOR_FP_SHIFT) &
171 SFB_VID_HOR_FP_MASK) * 4;
172 info->var.upper_margin = (sfb_read(par, SFB_REG_VID_VER) >>
173 SFB_VID_VER_BP_SHIFT) & SFB_VID_VER_BP_MASK;
174 info->var.lower_margin = (sfb_read(par, SFB_REG_VID_VER) >>
175 SFB_VID_VER_FP_SHIFT) & SFB_VID_VER_FP_MASK;
176 info->var.hsync_len = ((sfb_read(par, SFB_REG_VID_HOR) >>
177 SFB_VID_HOR_SYN_SHIFT) &
178 SFB_VID_HOR_SYN_MASK) * 4;
179 info->var.vsync_len = (sfb_read(par, SFB_REG_VID_VER) >>
180 SFB_VID_VER_SYN_SHIFT) & SFB_VID_VER_SYN_MASK;
181
182 info->fix.line_length = info->var.xres;
183};
184
185/*
186 * Determine oscillator configuration.
187 */
188static void __init pmagbbfb_osc_setup(struct fb_info *info)
125{ 189{
126 unsigned long base_addr = get_tc_base_addr(slot); 190 static unsigned int pmagbbfb_freqs[] __initdata = {
127 struct fb_info *info = &pmagbb_fb_info[slot]; 191 130808, 119843, 104000, 92980, 74367, 72800,
128 192 69197, 66000, 65000, 50350, 36000, 32000, 25175
129 printk("PMAGB-BA framebuffer in slot %d\n", slot); 193 };
130 /* 194 struct pmagbbfb_par *par = info->par;
131 * Framebuffer display memory base address and friends 195 u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8;
132 */ 196 u32 freq0, freq1, freqtc = get_tc_speed() / 250;
133 pmagbbfb_fix.smem_start = base_addr + PMAGB_B_ONBOARD_FBMEM_OFFSET; 197 int i, j;
134 info->par = (base_addr + PMAGB_B_BT459_OFFSET); 198
135 199 gp0_write(par, 0); /* select Osc0 */
136 /* 200 for (j = 0; j < 16; j++) {
137 * Configure the Bt459 RAM DAC 201 mb();
138 */ 202 sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
139 pmagbbfb_erase_cursor((struct pmagb_b_ramdac_regs *) info->par); 203 mb();
140 204 for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
141 /* 205 if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
142 * Let there be consoles.. 206 break;
143 */ 207 udelay(1);
208 }
209 count0 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
210 }
211
212 gp0_write(par, 1); /* select Osc1 */
213 for (j = 0; j < 16; j++) {
214 mb();
215 sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
216
217 for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
218 if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
219 break;
220 udelay(1);
221 }
222 count1 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
223 }
224
225 freq0 = (freqtc * count0 + counttc / 2) / counttc;
226 par->osc0 = freq0;
227 if (freq0 >= pmagbbfb_freqs[0] - (pmagbbfb_freqs[0] + 32) / 64 &&
228 freq0 <= pmagbbfb_freqs[0] + (pmagbbfb_freqs[0] + 32) / 64)
229 par->osc0 = pmagbbfb_freqs[0];
230
231 freq1 = (par->osc0 * count1 + count0 / 2) / count0;
232 par->osc1 = freq1;
233 for (i = 0; i < sizeof(pmagbbfb_freqs) / sizeof(*pmagbbfb_freqs); i++)
234 if (freq1 >= pmagbbfb_freqs[i] -
235 (pmagbbfb_freqs[i] + 128) / 256 &&
236 freq1 <= pmagbbfb_freqs[i] +
237 (pmagbbfb_freqs[i] + 128) / 256) {
238 par->osc1 = pmagbbfb_freqs[i];
239 break;
240 }
241
242 if (par->osc0 - par->osc1 <= (par->osc0 + par->osc1 + 256) / 512 ||
243 par->osc1 - par->osc0 <= (par->osc0 + par->osc1 + 256) / 512)
244 par->osc1 = 0;
245
246 gp0_write(par, par->osc1 != 0); /* reselect OscX */
247
248 info->var.pixclock = par->osc1 ?
249 (1000000000 + par->osc1 / 2) / par->osc1 :
250 (1000000000 + par->osc0 / 2) / par->osc0;
251};
252
253
254static int __init pmagbbfb_init_one(int slot)
255{
256 char freq0[12], freq1[12];
257 struct fb_info *info;
258 struct pmagbbfb_par *par;
259 unsigned long base_addr;
260 u32 vid_base;
261
262 info = framebuffer_alloc(sizeof(struct pmagbbfb_par), NULL);
263 if (!info)
264 return -ENOMEM;
265
266 par = info->par;
267 par->slot = slot;
268 claim_tc_card(par->slot);
269
270 base_addr = get_tc_base_addr(par->slot);
271
272 par->next = root_pmagbbfb_dev;
273 root_pmagbbfb_dev = info;
274
275 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
276 goto err_alloc;
277
144 info->fbops = &pmagbbfb_ops; 278 info->fbops = &pmagbbfb_ops;
145 info->var = pmagbbfb_defined;
146 info->fix = pmagbbfb_fix; 279 info->fix = pmagbbfb_fix;
147 info->screen_base = pmagbbfb_fix.smem_start; 280 info->var = pmagbbfb_defined;
148 info->flags = FBINFO_DEFAULT; 281 info->flags = FBINFO_DEFAULT;
149 282
150 fb_alloc_cmap(&fb_info.cmap, 256, 0); 283 /* MMIO mapping setup. */
284 info->fix.mmio_start = base_addr;
285 par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
286 if (!par->mmio)
287 goto err_cmap;
288 par->sfb = par->mmio + PMAGB_B_SFB;
289 par->dac = par->mmio + PMAGB_B_BT459;
290
291 /* Frame buffer mapping setup. */
292 info->fix.smem_start = base_addr + PMAGB_B_FBMEM;
293 par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len);
294 if (!par->smem)
295 goto err_mmio_map;
296 vid_base = sfb_read(par, SFB_REG_VID_BASE);
297 info->screen_base = (void __iomem *)par->smem + vid_base * 0x1000;
298 info->screen_size = info->fix.smem_len - 2 * vid_base * 0x1000;
299
300 pmagbbfb_erase_cursor(info);
301 pmagbbfb_screen_setup(info);
302 pmagbbfb_osc_setup(info);
151 303
152 if (register_framebuffer(info) < 0) 304 if (register_framebuffer(info) < 0)
153 return 1; 305 goto err_smem_map;
306
307 snprintf(freq0, sizeof(freq0), "%u.%03uMHz",
308 par->osc0 / 1000, par->osc0 % 1000);
309 snprintf(freq1, sizeof(freq1), "%u.%03uMHz",
310 par->osc1 / 1000, par->osc1 % 1000);
311
312 pr_info("fb%d: %s frame buffer device in slot %d\n",
313 info->node, info->fix.id, par->slot);
314 pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n",
315 info->node, freq0, par->osc1 ? freq1 : "disabled",
316 par->osc1 != 0);
317
154 return 0; 318 return 0;
319
320
321err_smem_map:
322 iounmap(par->smem);
323
324err_mmio_map:
325 iounmap(par->mmio);
326
327err_cmap:
328 fb_dealloc_cmap(&info->cmap);
329
330err_alloc:
331 root_pmagbbfb_dev = par->next;
332 release_tc_card(par->slot);
333 framebuffer_release(info);
334 return -ENXIO;
155} 335}
156 336
157/* 337static void __exit pmagbbfb_exit_one(void)
158 * Initialise the framebuffer 338{
159 */ 339 struct fb_info *info = root_pmagbbfb_dev;
340 struct pmagbbfb_par *par = info->par;
341
342 unregister_framebuffer(info);
343 iounmap(par->smem);
344 iounmap(par->mmio);
345 fb_dealloc_cmap(&info->cmap);
346 root_pmagbbfb_dev = par->next;
347 release_tc_card(par->slot);
348 framebuffer_release(info);
349}
160 350
161int __init pmagbbfb_init(void) 351
352/*
353 * Initialise the framebuffer.
354 */
355static int __init pmagbbfb_init(void)
162{ 356{
163 int sid; 357 int count = 0;
164 int found = 0; 358 int slot;
165 359
166 if (fb_get_options("pmagbbfb", NULL)) 360 if (fb_get_options("pmagbbfb", NULL))
167 return -ENODEV; 361 return -ENXIO;
168 362
169 if (TURBOCHANNEL) { 363 while ((slot = search_tc_card("PMAGB-BA")) >= 0) {
170 while ((sid = search_tc_card("PMAGB-BA")) >= 0) { 364 if (pmagbbfb_init_one(slot) < 0)
171 found = 1; 365 break;
172 claim_tc_card(sid); 366 count++;
173 pmagbbfb_init_one(sid);
174 }
175 return found ? 0 : -ENODEV;
176 } else {
177 return -ENODEV;
178 } 367 }
368 return (count > 0) ? 0 : -ENXIO;
369}
370
371static void __exit pmagbbfb_exit(void)
372{
373 while (root_pmagbbfb_dev)
374 pmagbbfb_exit_one();
179} 375}
180 376
377
181module_init(pmagbbfb_init); 378module_init(pmagbbfb_init);
379module_exit(pmagbbfb_exit);
380
182MODULE_LICENSE("GPL"); 381MODULE_LICENSE("GPL");
diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h
index 87b81a555139..7539b9087a80 100644
--- a/include/video/pmagb-b-fb.h
+++ b/include/video/pmagb-b-fb.h
@@ -1,32 +1,58 @@
1/* 1/*
2 * linux/drivers/video/pmagb-b-fb.h 2 * linux/include/video/pmagb-b-fb.h
3 * 3 *
4 * TurboChannel PMAGB-B framebuffer card support, 4 * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
5 * Copyright (C) 1999, 2000, 2001 by 5 * Copyright (C) 1999, 2000, 2001 by
6 * Michael Engel <engel@unix-ag.org> and 6 * Michael Engel <engel@unix-ag.org> and
7 * Karsten Merker <merker@linuxtag.org> 7 * Karsten Merker <merker@linuxtag.org>
8 * This file is subject to the terms and conditions of the GNU General 8 * Copyright (c) 2005 Maciej W. Rozycki
9 * Public License. See the file COPYING in the main directory of this 9 *
10 * archive for more details. 10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
11 */ 13 */
12 14
15/* IOmem resource offsets. */
16#define PMAGB_B_ROM 0x000000 /* REX option ROM */
17#define PMAGB_B_SFB 0x100000 /* SFB ASIC */
18#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
19#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
20#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
21#define PMAGB_B_FBMEM 0x200000 /* frame buffer */
22#define PMAGB_B_SIZE 0x400000 /* address space size */
13 23
14/* 24/* IOmem register offsets. */
15 * Bt459 RAM DAC register base offset (rel. to TC slot base address) 25#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
16 */ 26#define SFB_REG_VID_VER 0x68 /* video vertical setup */
17#define PMAGB_B_BT459_OFFSET 0x001C0000 27#define SFB_REG_VID_BASE 0x6c /* video base address */
28#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */
29#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */
18 30
19/* 31/* Video horizontal setup register constants. All bits are r/w. */
20 * Begin of PMAGB-B framebuffer memory, resolution is configurable: 32#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */
21 * 1024x864x8 or 1280x1024x8, settable by jumper on the card 33#define SFB_VID_HOR_BP_MASK 0x7f
22 */ 34#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */
23#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000 35#define SFB_VID_HOR_SYN_MASK 0x7f
36#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */
37#define SFB_VID_HOR_FP_MASK 0x1f
38#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */
39#define SFB_VID_HOR_PIX_MASK 0x1ff
24 40
25/* 41/* Video vertical setup register constants. All bits are r/w. */
26 * Bt459 register offsets, byte-wide registers 42#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */
27 */ 43#define SFB_VID_VER_BP_MASK 0x3f
44#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */
45#define SFB_VID_VER_SYN_MASK 0x3f
46#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */
47#define SFB_VID_VER_FP_MASK 0x1f
48#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */
49#define SFB_VID_VER_SL_MASK 0x7ff
50
51/* Video base address register constants. All bits are r/w. */
52#define SFB_VID_BASE_MASK 0x1ff /* video base row address */
28 53
29#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */ 54/* Bt459 register offsets, byte-wide registers. */
30#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */ 55#define BT459_ADDR_LO 0x0 /* address low */
31#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */ 56#define BT459_ADDR_HI 0x4 /* address high */
32#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */ 57#define BT459_DATA 0x8 /* data window register */
58#define BT459_CMAP 0xc /* color map window register */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 12:24:44 -0400