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-rw-r--r--arch/arm/mach-tegra/Makefile1
-rw-r--r--arch/arm/mach-tegra/board-dt.c16
-rw-r--r--arch/arm/mach-tegra/board-harmony-pcie.c9
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c22
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c24
-rw-r--r--arch/arm/mach-tegra/board-paz00.c27
-rw-r--r--arch/arm/mach-tegra/board-paz00.h3
-rw-r--r--arch/arm/mach-tegra/board-pinmux.c104
-rw-r--r--arch/arm/mach-tegra/board-pinmux.h38
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c120
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c26
-rw-r--r--arch/arm/mach-tegra/pcie.c1
12 files changed, 269 insertions, 122 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 91a07e187208..e98c49aabd10 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,3 +1,4 @@
1obj-y += board-pinmux.o
1obj-y += common.o 2obj-y += common.o
2obj-y += devices.o 3obj-y += devices.o
3obj-y += io.o 4obj-y += io.o
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index f6f03ce340fc..86237b641060 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -51,6 +51,8 @@ void seaboard_pinmux_init(void);
51void ventana_pinmux_init(void); 51void ventana_pinmux_init(void);
52 52
53struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { 53struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
54 OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
54 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), 56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), 57 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), 58 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
@@ -102,13 +104,6 @@ static void __init tegra_dt_init(void)
102 104
103 tegra_clk_init_from_table(tegra_dt_clk_init_table); 105 tegra_clk_init_from_table(tegra_dt_clk_init_table);
104 106
105 /*
106 * Finished with the static registrations now; fill in the missing
107 * devices
108 */
109 of_platform_populate(NULL, tegra_dt_match_table,
110 tegra20_auxdata_lookup, NULL);
111
112 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 107 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
113 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 108 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
114 pinmux_configs[i].init(); 109 pinmux_configs[i].init();
@@ -118,6 +113,13 @@ static void __init tegra_dt_init(void)
118 113
119 WARN(i == ARRAY_SIZE(pinmux_configs), 114 WARN(i == ARRAY_SIZE(pinmux_configs),
120 "Unknown platform! Pinmuxing not initialized\n"); 115 "Unknown platform! Pinmuxing not initialized\n");
116
117 /*
118 * Finished with the static registrations now; fill in the missing
119 * devices
120 */
121 of_platform_populate(NULL, tegra_dt_match_table,
122 tegra20_auxdata_lookup, NULL);
121} 123}
122 124
123static const char * tegra_dt_board_compat[] = { 125static const char * tegra_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index 6db7d699ef1c..33c4fedab840 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/pinmux.h>
26#include "board.h" 25#include "board.h"
27#include "board-harmony.h" 26#include "board-harmony.h"
28 27
@@ -48,10 +47,6 @@ static int __init harmony_pcie_init(void)
48 47
49 regulator_enable(regulator); 48 regulator_enable(regulator);
50 49
51 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
52 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
54
55 err = tegra_pcie_init(true, true); 50 err = tegra_pcie_init(true, true);
56 if (err) 51 if (err)
57 goto err_pcie; 52 goto err_pcie;
@@ -59,10 +54,6 @@ static int __init harmony_pcie_init(void)
59 return 0; 54 return 0;
60 55
61err_pcie: 56err_pcie:
62 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE);
63 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
64 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
65
66 regulator_disable(regulator); 57 regulator_disable(regulator);
67 regulator_put(regulator); 58 regulator_put(regulator);
68err_reg: 59err_reg:
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 7a4a26d5174c..5038f5b130e6 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -22,7 +22,7 @@
22 22
23#include "gpio-names.h" 23#include "gpio-names.h"
24#include "board-harmony.h" 24#include "board-harmony.h"
25#include "devices.h" 25#include "board-pinmux.h"
26 26
27static struct tegra_pingroup_config harmony_pinmux[] = { 27static struct tegra_pingroup_config harmony_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -143,11 +143,6 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 144};
145 145
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 146static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 147 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
153 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@@ -161,13 +156,14 @@ static struct tegra_gpio_table gpio_table[] = {
161 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true }, 156 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
162}; 157};
163 158
159static struct tegra_board_pinmux_conf conf = {
160 .pgs = harmony_pinmux,
161 .pg_count = ARRAY_SIZE(harmony_pinmux),
162 .gpios = gpio_table,
163 .gpio_count = ARRAY_SIZE(gpio_table),
164};
165
164void harmony_pinmux_init(void) 166void harmony_pinmux_init(void)
165{ 167{
166 if (!of_machine_is_compatible("nvidia,tegra20")) 168 tegra_board_pinmux_init(&conf, NULL);
167 platform_add_devices(pinmux_devices,
168 ARRAY_SIZE(pinmux_devices));
169
170 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
171
172 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
173} 169}
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index be30e215f4b7..d6b37daf3252 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -22,7 +22,7 @@
22 22
23#include "gpio-names.h" 23#include "gpio-names.h"
24#include "board-paz00.h" 24#include "board-paz00.h"
25#include "devices.h" 25#include "board-pinmux.h"
26 26
27static struct tegra_pingroup_config paz00_pinmux[] = { 27static struct tegra_pingroup_config paz00_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -30,7 +30,7 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 31 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 32 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
33 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 33 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
34 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 34 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 35 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
@@ -143,11 +143,6 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 144};
145 145
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 146static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, 147 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
153 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@@ -158,13 +153,14 @@ static struct tegra_gpio_table gpio_table[] = {
158 { .gpio = TEGRA_WIFI_LED, .enable = true }, 153 { .gpio = TEGRA_WIFI_LED, .enable = true },
159}; 154};
160 155
156static struct tegra_board_pinmux_conf conf = {
157 .pgs = paz00_pinmux,
158 .pg_count = ARRAY_SIZE(paz00_pinmux),
159 .gpios = gpio_table,
160 .gpio_count = ARRAY_SIZE(gpio_table),
161};
162
161void paz00_pinmux_init(void) 163void paz00_pinmux_init(void)
162{ 164{
163 if (!of_machine_is_compatible("nvidia,tegra20")) 165 tegra_board_pinmux_init(&conf, NULL);
164 platform_add_devices(pinmux_devices,
165 ARRAY_SIZE(pinmux_devices));
166
167 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
168
169 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
170} 166}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 0b7e1cfee70d..e5480b47c8e7 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -23,8 +23,10 @@
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/gpio_keys.h>
26#include <linux/pda_power.h> 27#include <linux/pda_power.h>
27#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/input.h>
28#include <linux/i2c.h> 30#include <linux/i2c.h>
29#include <linux/gpio.h> 31#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 32#include <linux/rfkill-gpio.h>
@@ -115,12 +117,37 @@ static struct platform_device leds_gpio = {
115 }, 117 },
116}; 118};
117 119
120static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
121 {
122 .code = KEY_POWER,
123 .gpio = TEGRA_GPIO_POWERKEY,
124 .active_low = 1,
125 .desc = "Power",
126 .type = EV_KEY,
127 .wakeup = 1,
128 },
129};
130
131static struct gpio_keys_platform_data paz00_gpio_keys = {
132 .buttons = paz00_gpio_keys_buttons,
133 .nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
134};
135
136static struct platform_device gpio_keys_device = {
137 .name = "gpio-keys",
138 .id = -1,
139 .dev = {
140 .platform_data = &paz00_gpio_keys,
141 },
142};
143
118static struct platform_device *paz00_devices[] __initdata = { 144static struct platform_device *paz00_devices[] __initdata = {
119 &debug_uart, 145 &debug_uart,
120 &tegra_sdhci_device4, 146 &tegra_sdhci_device4,
121 &tegra_sdhci_device1, 147 &tegra_sdhci_device1,
122 &wifi_rfkill_device, 148 &wifi_rfkill_device,
123 &leds_gpio, 149 &leds_gpio,
150 &gpio_keys_device,
124}; 151};
125 152
126static void paz00_i2c_init(void) 153static void paz00_i2c_init(void)
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index 8aff06eb58c3..ffa83f580db6 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -32,6 +32,9 @@
32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1 32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0 33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
34 34
35/* WakeUp */
36#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
37
35void paz00_pinmux_init(void); 38void paz00_pinmux_init(void);
36 39
37#endif 40#endif
diff --git a/arch/arm/mach-tegra/board-pinmux.c b/arch/arm/mach-tegra/board-pinmux.c
new file mode 100644
index 000000000000..adc3efe979b3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.c
@@ -0,0 +1,104 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/notifier.h>
18#include <linux/of.h>
19#include <linux/string.h>
20
21#include <mach/gpio-tegra.h>
22#include <mach/pinmux.h>
23
24#include "board-pinmux.h"
25#include "devices.h"
26
27struct tegra_board_pinmux_conf *confs[2];
28
29static void tegra_board_pinmux_setup_gpios(void)
30{
31 int i;
32
33 for (i = 0; i < ARRAY_SIZE(confs); i++) {
34 if (!confs[i])
35 continue;
36
37 tegra_gpio_config(confs[i]->gpios, confs[i]->gpio_count);
38 }
39}
40
41static void tegra_board_pinmux_setup_pinmux(void)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(confs); i++) {
46 if (!confs[i])
47 continue;
48
49 tegra_pinmux_config_table(confs[i]->pgs, confs[i]->pg_count);
50
51 if (confs[i]->drives)
52 tegra_drive_pinmux_config_table(confs[i]->drives,
53 confs[i]->drive_count);
54 }
55}
56
57static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,
58 unsigned long event, void *vdev)
59{
60 static bool had_gpio;
61 static bool had_pinmux;
62
63 struct device *dev = vdev;
64 const char *devname;
65
66 if (event != BUS_NOTIFY_BOUND_DRIVER)
67 return NOTIFY_DONE;
68
69 devname = dev_name(dev);
70
71 if (!had_gpio && !strcmp(devname, GPIO_DEV)) {
72 tegra_board_pinmux_setup_gpios();
73 had_gpio = true;
74 } else if (!had_pinmux && !strcmp(devname, PINMUX_DEV)) {
75 tegra_board_pinmux_setup_pinmux();
76 had_pinmux = true;
77 }
78
79 if (had_gpio && had_pinmux)
80 return NOTIFY_STOP_MASK;
81 else
82 return NOTIFY_DONE;
83}
84
85static struct notifier_block nb = {
86 .notifier_call = tegra_board_pinmux_bus_notify,
87};
88
89static struct platform_device *devices[] = {
90 &tegra_gpio_device,
91 &tegra_pinmux_device,
92};
93
94void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
95 struct tegra_board_pinmux_conf *conf_b)
96{
97 confs[0] = conf_a;
98 confs[1] = conf_b;
99
100 bus_register_notifier(&platform_bus_type, &nb);
101
102 if (!of_machine_is_compatible("nvidia,tegra20"))
103 platform_add_devices(devices, ARRAY_SIZE(devices));
104}
diff --git a/arch/arm/mach-tegra/board-pinmux.h b/arch/arm/mach-tegra/board-pinmux.h
new file mode 100644
index 000000000000..4aac73546f54
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#ifndef __MACH_TEGRA_BOARD_PINMUX_H
16#define __MACH_TEGRA_BOARD_PINMUX_H
17
18#define GPIO_DEV "tegra-gpio"
19#define PINMUX_DEV "tegra-pinmux"
20
21struct tegra_pingroup_config;
22struct tegra_gpio_table;
23
24struct tegra_board_pinmux_conf {
25 struct tegra_pingroup_config *pgs;
26 int pg_count;
27
28 struct tegra_drive_pingroup_config *drives;
29 int drive_count;
30
31 struct tegra_gpio_table *gpios;
32 int gpio_count;
33};
34
35void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
36 struct tegra_board_pinmux_conf *conf_b);
37
38#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index b1c2972f62fe..a448f29fbbb2 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -22,8 +22,8 @@
22#include <mach/pinmux-t2.h> 22#include <mach/pinmux-t2.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-seaboard.h" 26#include "board-seaboard.h"
26#include "devices.h"
27 27
28#define DEFAULT_DRIVE(_name) \ 28#define DEFAULT_DRIVE(_name) \
29 { \ 29 { \
@@ -37,11 +37,11 @@
37 .slew_falling = TEGRA_SLEW_SLOWEST, \ 37 .slew_falling = TEGRA_SLEW_SLOWEST, \
38 } 38 }
39 39
40static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = { 40static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
41 DEFAULT_DRIVE(SDIO1), 41 DEFAULT_DRIVE(SDIO1),
42}; 42};
43 43
44static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { 44static struct tegra_pingroup_config common_pinmux[] = {
45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -55,7 +55,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
59 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 58 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 59 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 60 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
@@ -65,7 +64,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
65 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 64 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 65 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
67 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 66 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 67 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 68 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 69 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -108,13 +106,8 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
108 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
109 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 108 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
114 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 111 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 113 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -122,25 +115,19 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
122 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 115 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
123 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 117 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
125 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 118 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 120 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
129 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 121 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
130 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 122 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
131 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
132 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
133 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 124 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 125 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 126 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
138 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 127 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
139 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 128 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
141 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 129 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
142 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 130 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
143 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
144 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 131 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
145 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 132 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
146 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 133 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -160,13 +147,24 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
160 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 147 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161}; 148};
162 149
163static __initdata struct tegra_pingroup_config ventana_pinmux[] = { 150static struct tegra_pingroup_config seaboard_pinmux[] = {
164 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 151 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
152 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
153 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
154 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
155 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
156 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
157 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
158 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
159 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
160 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
162 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
163 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
164};
165
166static struct tegra_pingroup_config ventana_pinmux[] = {
165 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 167 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
166 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
167 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
168 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
169 {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
170 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 168 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
171 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 169 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
172 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 170 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -181,65 +179,59 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
181 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 179 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
182}; 180};
183 181
184static struct platform_device *pinmux_devices[] = {
185 &tegra_gpio_device,
186 &tegra_pinmux_device,
187};
188
189static struct tegra_gpio_table common_gpio_table[] = { 182static struct tegra_gpio_table common_gpio_table[] = {
190 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 183 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
191 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 184 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 185 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
186 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
187};
188
189static struct tegra_gpio_table seaboard_gpio_table[] = {
193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 190 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 191 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, 192 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 193 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
198 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 194 { .gpio = TEGRA_GPIO_USB1, .enable = true },
199}; 195};
200 196
201static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) 197static struct tegra_gpio_table ventana_gpio_table[] = {
202{ 198 /* hp_det */
203 int i, j; 199 { .gpio = TEGRA_GPIO_PW2, .enable = true },
204 struct tegra_pingroup_config *new_pingroup, *base_pingroup; 200 /* int_mic_en */
205 201 { .gpio = TEGRA_GPIO_PX0, .enable = true },
206 /* Update base seaboard pinmux table with secondary board 202 /* ext_mic_en */
207 * specific pinmux table table. 203 { .gpio = TEGRA_GPIO_PX1, .enable = true },
208 */ 204};
209 for (i = 0; i < size; i++) {
210 new_pingroup = &newtbl[i];
211 for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) {
212 base_pingroup = &seaboard_pinmux[j];
213 if (new_pingroup->pingroup == base_pingroup->pingroup) {
214 *base_pingroup = *new_pingroup;
215 break;
216 }
217 }
218 }
219}
220
221void __init seaboard_common_pinmux_init(void)
222{
223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
226 205
227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 206static struct tegra_board_pinmux_conf common_conf = {
207 .pgs = common_pinmux,
208 .pg_count = ARRAY_SIZE(common_pinmux),
209 .gpios = common_gpio_table,
210 .gpio_count = ARRAY_SIZE(common_gpio_table),
211};
228 212
229 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, 213static struct tegra_board_pinmux_conf seaboard_conf = {
230 ARRAY_SIZE(seaboard_drive_pinmux)); 214 .pgs = seaboard_pinmux,
215 .pg_count = ARRAY_SIZE(seaboard_pinmux),
216 .drives = seaboard_drive_pinmux,
217 .drive_count = ARRAY_SIZE(seaboard_drive_pinmux),
218 .gpios = seaboard_gpio_table,
219 .gpio_count = ARRAY_SIZE(seaboard_gpio_table),
220};
231 221
232 tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); 222static struct tegra_board_pinmux_conf ventana_conf = {
233} 223 .pgs = ventana_pinmux,
224 .pg_count = ARRAY_SIZE(ventana_pinmux),
225 .gpios = ventana_gpio_table,
226 .gpio_count = ARRAY_SIZE(ventana_gpio_table),
227};
234 228
235void __init seaboard_pinmux_init(void) 229void seaboard_pinmux_init(void)
236{ 230{
237 seaboard_common_pinmux_init(); 231 tegra_board_pinmux_init(&common_conf, &seaboard_conf);
238} 232}
239 233
240void __init ventana_pinmux_init(void) 234void ventana_pinmux_init(void)
241{ 235{
242 update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); 236 tegra_board_pinmux_init(&common_conf, &ventana_conf);
243 seaboard_common_pinmux_init();
244} 237}
245
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 7ab719d46da0..1b3ccec45ea5 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -21,10 +21,10 @@
21#include <mach/pinmux.h> 21#include <mach/pinmux.h>
22 22
23#include "gpio-names.h" 23#include "gpio-names.h"
24#include "board-pinmux.h"
24#include "board-trimslice.h" 25#include "board-trimslice.h"
25#include "devices.h"
26 26
27static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 27static struct tegra_pingroup_config trimslice_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
29 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -105,7 +105,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
105 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 105 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
106 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 106 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
107 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 108 {TEGRA_PINGROUP_PTA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 109 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
110 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 111 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -143,11 +143,6 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 144};
145 145
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 146static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ 147 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
153 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ 148 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@@ -156,11 +151,14 @@ static struct tegra_gpio_table gpio_table[] = {
156 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */ 151 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
157}; 152};
158 153
159void __init trimslice_pinmux_init(void) 154static struct tegra_board_pinmux_conf conf = {
155 .pgs = trimslice_pinmux,
156 .pg_count = ARRAY_SIZE(trimslice_pinmux),
157 .gpios = gpio_table,
158 .gpio_count = ARRAY_SIZE(gpio_table),
159};
160
161void trimslice_pinmux_init(void)
160{ 162{
161 if (!of_machine_is_compatible("nvidia,tegra20")) 163 tegra_board_pinmux_init(&conf, NULL);
162 platform_add_devices(pinmux_devices,
163 ARRAY_SIZE(pinmux_devices));
164 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
165 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
166} 164}
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 97ef3e55dfdf..ec63c6b2b6b5 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,7 +37,6 @@
37#include <asm/sizes.h> 37#include <asm/sizes.h>
38#include <asm/mach/pci.h> 38#include <asm/mach/pci.h>
39 39
40#include <mach/pinmux.h>
41#include <mach/iomap.h> 40#include <mach/iomap.h>
42#include <mach/clk.h> 41#include <mach/clk.h>
43#include <mach/powergate.h> 42#include <mach/powergate.h>