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-rw-r--r--arch/arm/mm/init.c7
-rw-r--r--include/asm-arm/arch-cl7500/hardware.h4
-rw-r--r--include/asm-arm/arch-cl7500/memory.h6
-rw-r--r--include/asm-arm/arch-ebsa110/hardware.h3
-rw-r--r--include/asm-arm/arch-ebsa110/memory.h6
-rw-r--r--include/asm-arm/arch-ebsa285/hardware.h7
-rw-r--r--include/asm-arm/arch-ebsa285/memory.h12
-rw-r--r--include/asm-arm/arch-l7200/hardware.h3
-rw-r--r--include/asm-arm/arch-l7200/memory.h6
-rw-r--r--include/asm-arm/arch-rpc/hardware.h3
-rw-r--r--include/asm-arm/arch-rpc/memory.h6
-rw-r--r--include/asm-arm/arch-sa1100/hardware.h4
-rw-r--r--include/asm-arm/arch-sa1100/memory.h7
-rw-r--r--include/asm-arm/arch-shark/hardware.h6
-rw-r--r--include/asm-arm/arch-shark/memory.h6
15 files changed, 53 insertions, 33 deletions
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 88279124317a..9ea1f87a7079 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/setup.h> 22#include <asm/setup.h>
23#include <asm/sizes.h>
23#include <asm/tlb.h> 24#include <asm/tlb.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -455,14 +456,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
455#ifdef FLUSH_BASE 456#ifdef FLUSH_BASE
456 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS); 457 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
457 map.virtual = FLUSH_BASE; 458 map.virtual = FLUSH_BASE;
458 map.length = PGDIR_SIZE; 459 map.length = SZ_1M;
459 map.type = MT_CACHECLEAN; 460 map.type = MT_CACHECLEAN;
460 create_mapping(&map); 461 create_mapping(&map);
461#endif 462#endif
462#ifdef FLUSH_BASE_MINICACHE 463#ifdef FLUSH_BASE_MINICACHE
463 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE); 464 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + SZ_1M);
464 map.virtual = FLUSH_BASE_MINICACHE; 465 map.virtual = FLUSH_BASE_MINICACHE;
465 map.length = PGDIR_SIZE; 466 map.length = SZ_1M;
466 map.type = MT_MINICLEAN; 467 map.type = MT_MINICLEAN;
467 create_mapping(&map); 468 create_mapping(&map);
468#endif 469#endif
diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
index 2339b764f69f..1adfd18e6154 100644
--- a/include/asm-arm/arch-cl7500/hardware.h
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -53,16 +53,12 @@
53#define SCREEN_END 0xdfc00000 53#define SCREEN_END 0xdfc00000
54#define SCREEN_BASE 0xdf800000 54#define SCREEN_BASE 0xdf800000
55 55
56#define FLUSH_BASE 0xdf000000
57
58#define VIDC_BASE (void __iomem *)0xe0400000 56#define VIDC_BASE (void __iomem *)0xe0400000
59#define IOMD_BASE IOMEM(0xe0200000) 57#define IOMD_BASE IOMEM(0xe0200000)
60#define IOC_BASE IOMEM(0xe0200000) 58#define IOC_BASE IOMEM(0xe0200000)
61#define FLOPPYDMA_BASE IOMEM(0xe002a000) 59#define FLOPPYDMA_BASE IOMEM(0xe002a000)
62#define PCIO_BASE IOMEM(0xe0010000) 60#define PCIO_BASE IOMEM(0xe0010000)
63 61
64#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
65
66#define vidc_writel(val) __raw_writel(val, VIDC_BASE) 62#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
67 63
68/* in/out bias for the ISA slot region */ 64/* in/out bias for the ISA slot region */
diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
index 34f40a6cec30..3178140e24ca 100644
--- a/include/asm-arm/arch-cl7500/memory.h
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -26,4 +26,10 @@
26#define __virt_to_bus(x) __virt_to_phys(x) 26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x) 27#define __bus_to_virt(x) __phys_to_virt(x)
28 28
29/*
30 * Cache flushing area - ROM
31 */
32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000
34
29#endif 35#endif
diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h
index 4e41c2358f4e..3ce864def41e 100644
--- a/include/asm-arm/arch-ebsa110/hardware.h
+++ b/include/asm-arm/arch-ebsa110/hardware.h
@@ -57,9 +57,6 @@
57/* 57/*
58 * RAM definitions 58 * RAM definitions
59 */ 59 */
60#define FLUSH_BASE_PHYS 0x40000000
61#define FLUSH_BASE 0xdf000000
62
63#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */ 60#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
64 61
65#endif 62#endif
diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h
index 02f144520c10..c7c500e176d0 100644
--- a/include/asm-arm/arch-ebsa110/memory.h
+++ b/include/asm-arm/arch-ebsa110/memory.h
@@ -28,4 +28,10 @@
28#define __virt_to_bus(x) (x) 28#define __virt_to_bus(x) (x)
29#define __bus_to_virt(x) (x) 29#define __bus_to_virt(x) (x)
30 30
31/*
32 * Cache flushing area - SRAM
33 */
34#define FLUSH_BASE_PHYS 0x40000000
35#define FLUSH_BASE 0xdf000000
36
31#endif 37#endif
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index 2ef2200f108c..ec51fe92483b 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -48,9 +48,6 @@
48#define PCICFG0_SIZE 0x01000000 48#define PCICFG0_SIZE 0x01000000
49#define PCICFG0_BASE 0xfa000000 49#define PCICFG0_BASE 0xfa000000
50 50
51#define FLUSH_SIZE 0x00100000
52#define FLUSH_BASE 0xf9000000
53
54#define PCIMEM_SIZE 0x01000000 51#define PCIMEM_SIZE 0x01000000
55#define PCIMEM_BASE 0xf0000000 52#define PCIMEM_BASE 0xf0000000
56 53
@@ -61,9 +58,6 @@
61#define PCIMEM_SIZE 0x80000000 58#define PCIMEM_SIZE 0x80000000
62#define PCIMEM_BASE 0x80000000 59#define PCIMEM_BASE 0x80000000
63 60
64#define FLUSH_SIZE 0x00100000
65#define FLUSH_BASE 0x7e000000
66
67#define WFLUSH_SIZE 0x01000000 61#define WFLUSH_SIZE 0x01000000
68#define WFLUSH_BASE 0x7d000000 62#define WFLUSH_BASE 0x7d000000
69 63
@@ -94,7 +88,6 @@
94#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) 88#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
95#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) 89#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
96 90
97#define FLUSH_BASE_PHYS 0x50000000
98#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) 91#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
99 92
100 93
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index 09e335cd687d..99181ffc7e27 100644
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long);
49#define TASK_SIZE UL(0xbf000000) 49#define TASK_SIZE UL(0xbf000000)
50#define PAGE_OFFSET UL(0xc0000000) 50#define PAGE_OFFSET UL(0xc0000000)
51 51
52/*
53 * Cache flushing area.
54 */
55#define FLUSH_BASE 0xf9000000
56
52#elif defined(CONFIG_ARCH_CO285) 57#elif defined(CONFIG_ARCH_CO285)
53 58
54/* Task size and page offset at 1.5GB */ 59/* Task size and page offset at 1.5GB */
55#define TASK_SIZE UL(0x5f000000) 60#define TASK_SIZE UL(0x5f000000)
56#define PAGE_OFFSET UL(0x60000000) 61#define PAGE_OFFSET UL(0x60000000)
57 62
63/*
64 * Cache flushing area.
65 */
66#define FLUSH_BASE 0x7e000000
67
58#else 68#else
59 69
60#error "Undefined footbridge architecture" 70#error "Undefined footbridge architecture"
@@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long);
72 */ 82 */
73#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) 83#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
74 84
85#define FLUSH_BASE_PHYS 0x50000000
86
75#endif 87#endif
diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h
index b755079befab..2ab43f3a4a8d 100644
--- a/include/asm-arm/arch-l7200/hardware.h
+++ b/include/asm-arm/arch-l7200/hardware.h
@@ -52,9 +52,6 @@
52#define ISA_SIZE 0x20000000 52#define ISA_SIZE 0x20000000
53#define ISA_BASE 0xe0000000 53#define ISA_BASE 0xe0000000
54 54
55#define FLUSH_BASE_PHYS 0x40000000 /* ROM */
56#define FLUSH_BASE 0xdf000000
57
58#define PCIO_BASE IO_BASE 55#define PCIO_BASE IO_BASE
59 56
60#endif 57#endif
diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h
index 9e50a171f78a..402df637e740 100644
--- a/include/asm-arm/arch-l7200/memory.h
+++ b/include/asm-arm/arch-l7200/memory.h
@@ -20,4 +20,10 @@
20#define __virt_to_bus(x) __virt_to_phys(x) 20#define __virt_to_bus(x) __virt_to_phys(x)
21#define __bus_to_virt(x) __phys_to_virt(x) 21#define __bus_to_virt(x) __phys_to_virt(x)
22 22
23/*
24 * Cache flushing area - ROM
25 */
26#define FLUSH_BASE_PHYS 0x40000000
27#define FLUSH_BASE 0xdf000000
28
23#endif 29#endif
diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h
index 9d7f87375aa7..7480f4e8d974 100644
--- a/include/asm-arm/arch-rpc/hardware.h
+++ b/include/asm-arm/arch-rpc/hardware.h
@@ -46,7 +46,6 @@
46#define SCREEN_END 0xdfc00000 46#define SCREEN_END 0xdfc00000
47#define SCREEN_BASE 0xdf800000 47#define SCREEN_BASE 0xdf800000
48 48
49#define FLUSH_BASE 0xdf000000
50#define UNCACHEABLE_ADDR 0xdf010000 49#define UNCACHEABLE_ADDR 0xdf010000
51 50
52/* 51/*
@@ -59,8 +58,6 @@
59#define PCIO_BASE IOMEM(0xe0010000) 58#define PCIO_BASE IOMEM(0xe0010000)
60#define FLOPPYDMA_BASE IOMEM(0xe002a000) 59#define FLOPPYDMA_BASE IOMEM(0xe002a000)
61 60
62#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
63
64#define vidc_writel(val) __raw_writel(val, VIDC_BASE) 61#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
65 62
66#define IO_EC_EASI_BASE 0x81400000 63#define IO_EC_EASI_BASE 0x81400000
diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h
index 0592cb3f0c74..303c424ce673 100644
--- a/include/asm-arm/arch-rpc/memory.h
+++ b/include/asm-arm/arch-rpc/memory.h
@@ -30,4 +30,10 @@
30#define __virt_to_bus(x) __virt_to_phys(x) 30#define __virt_to_bus(x) __virt_to_phys(x)
31#define __bus_to_virt(x) __phys_to_virt(x) 31#define __bus_to_virt(x) __phys_to_virt(x)
32 32
33/*
34 * Cache flushing area - ROM
35 */
36#define FLUSH_BASE_PHYS 0x00000000
37#define FLUSH_BASE 0xdf000000
38
33#endif 39#endif
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 28711aaa4968..ee008a5484f3 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -14,10 +14,6 @@
14 14
15#include <linux/config.h> 15#include <linux/config.h>
16 16
17/* Flushing areas */
18#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */
19#define FLUSH_BASE 0xf5000000
20#define FLUSH_BASE_MINICACHE 0xf5800000
21#define UNCACHEABLE_ADDR 0xfa050000 17#define UNCACHEABLE_ADDR 0xfa050000
22 18
23 19
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 018a9f0e3986..a29fac1387ca 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
91 91
92#endif 92#endif
93 93
94/*
95 * Cache flushing area - SA1100 zero bank
96 */
97#define FLUSH_BASE_PHYS 0xe0000000
98#define FLUSH_BASE 0xf5000000
99#define FLUSH_BASE_MINICACHE 0xf5100000
100
94#endif 101#endif
diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h
index 4d35f8c154c3..ecba45260898 100644
--- a/include/asm-arm/arch-shark/hardware.h
+++ b/include/asm-arm/arch-shark/hardware.h
@@ -17,11 +17,6 @@
17 */ 17 */
18#define IO_BASE 0xe0000000 18#define IO_BASE 0xe0000000
19 19
20/*
21 * RAM definitions
22 */
23#define FLUSH_BASE_PHYS 0x80000000
24
25#else 20#else
26 21
27#define IO_BASE 0 22#define IO_BASE 0
@@ -33,7 +28,6 @@
33#define ROMCARD_SIZE 0x08000000 28#define ROMCARD_SIZE 0x08000000
34#define ROMCARD_START 0x10000000 29#define ROMCARD_START 0x10000000
35 30
36#define FLUSH_BASE 0xdf000000
37#define PCIO_BASE 0xe0000000 31#define PCIO_BASE 0xe0000000
38 32
39 33
diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h
index 95a29b4bc5d0..6968d6103ea0 100644
--- a/include/asm-arm/arch-shark/memory.h
+++ b/include/asm-arm/arch-shark/memory.h
@@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
39#define __virt_to_bus(x) __virt_to_phys(x) 39#define __virt_to_bus(x) __virt_to_phys(x)
40#define __bus_to_virt(x) __phys_to_virt(x) 40#define __bus_to_virt(x) __phys_to_virt(x)
41 41
42/*
43 * Cache flushing area
44 */
45#define FLUSH_BASE_PHYS 0x80000000
46#define FLUSH_BASE 0xdf000000
47
42#endif 48#endif