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-rw-r--r--drivers/video/omap2/dss/dispc.c4
-rw-r--r--drivers/video/omap2/dss/dsi.c10
2 files changed, 8 insertions, 6 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 7781c65bbeba..212cb800a5d2 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2198,7 +2198,7 @@ unsigned long dispc_fclk_rate(void)
2198{ 2198{
2199 unsigned long r = 0; 2199 unsigned long r = 0;
2200 2200
2201 if (dss_get_dispc_clk_source() == 0) 2201 if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK)
2202 r = dss_clk_get_rate(DSS_CLK_FCK1); 2202 r = dss_clk_get_rate(DSS_CLK_FCK1);
2203 else 2203 else
2204#ifdef CONFIG_OMAP2_DSS_DSI 2204#ifdef CONFIG_OMAP2_DSS_DSI
@@ -2251,7 +2251,7 @@ void dispc_dump_clocks(struct seq_file *s)
2251 seq_printf(s, "- DISPC -\n"); 2251 seq_printf(s, "- DISPC -\n");
2252 2252
2253 seq_printf(s, "dispc fclk source = %s\n", 2253 seq_printf(s, "dispc fclk source = %s\n",
2254 dss_get_dispc_clk_source() == 0 ? 2254 dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
2255 "dss1_alwon_fclk" : "dsi1_pll_fclk"); 2255 "dss1_alwon_fclk" : "dsi1_pll_fclk");
2256 2256
2257 seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); 2257 seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate());
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 4b85ed202d50..928b5e44a3dd 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -778,7 +778,7 @@ static unsigned long dsi_fclk_rate(void)
778{ 778{
779 unsigned long r; 779 unsigned long r;
780 780
781 if (dss_get_dsi_clk_source() == 0) { 781 if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) {
782 /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ 782 /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */
783 r = dss_clk_get_rate(DSS_CLK_FCK1); 783 r = dss_clk_get_rate(DSS_CLK_FCK1);
784 } else { 784 } else {
@@ -1231,17 +1231,19 @@ void dsi_dump_clocks(struct seq_file *s)
1231 seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n", 1231 seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n",
1232 cinfo->dsi1_pll_fclk, 1232 cinfo->dsi1_pll_fclk,
1233 cinfo->regm3, 1233 cinfo->regm3,
1234 dss_get_dispc_clk_source() == 0 ? "off" : "on"); 1234 dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
1235 "off" : "on");
1235 1236
1236 seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n", 1237 seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n",
1237 cinfo->dsi2_pll_fclk, 1238 cinfo->dsi2_pll_fclk,
1238 cinfo->regm4, 1239 cinfo->regm4,
1239 dss_get_dsi_clk_source() == 0 ? "off" : "on"); 1240 dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
1241 "off" : "on");
1240 1242
1241 seq_printf(s, "- DSI -\n"); 1243 seq_printf(s, "- DSI -\n");
1242 1244
1243 seq_printf(s, "dsi fclk source = %s\n", 1245 seq_printf(s, "dsi fclk source = %s\n",
1244 dss_get_dsi_clk_source() == 0 ? 1246 dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
1245 "dss1_alwon_fclk" : "dsi2_pll_fclk"); 1247 "dss1_alwon_fclk" : "dsi2_pll_fclk");
1246 1248
1247 seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate()); 1249 seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate());