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-rw-r--r--arch/ppc/syslib/ibm44x_common.c11
-rw-r--r--include/asm-ppc/ibm44x.h18
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
index 5152c8e41340..ebae2e2fcea6 100644
--- a/arch/ppc/syslib/ibm44x_common.c
+++ b/arch/ppc/syslib/ibm44x_common.c
@@ -214,9 +214,20 @@ void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned lo
214/* Called from machine_check_exception */ 214/* Called from machine_check_exception */
215void platform_machine_check(struct pt_regs *regs) 215void platform_machine_check(struct pt_regs *regs)
216{ 216{
217#ifdef CONFIG_440SP
218 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
219 mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL),
220 mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESRH),
221 mfdcr(DCRN_PLB0_BESRL));
222 printk("PLB1: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
223 mfdcr(DCRN_PLB1_BEARH), mfdcr(DCRN_PLB1_BEARL),
224 mfdcr(DCRN_PLB1_ACR), mfdcr(DCRN_PLB1_BESRH),
225 mfdcr(DCRN_PLB1_BESRL));
226#else
217 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n", 227 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
218 mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), 228 mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL),
219 mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESR)); 229 mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESR));
230#endif
220 printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n", 231 printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n",
221 mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL), 232 mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL),
222 mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1)); 233 mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1));
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
index 197a9ff23dd5..0c2ba03a1d49 100644
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -302,6 +302,23 @@
302#define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */ 302#define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */
303#define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */ 303#define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */
304 304
305#if defined(CONFIG_440SP)
306/* 440SP PLB Arbiter DCRs */
307#define DCRN_PLB_REVID 0x080 /* PLB Revision ID */
308#define DCRN_PLB_CCR 0x088 /* PLB Crossbar Control */
309
310#define DCRN_PLB0_ACR 0x081 /* PLB Arbiter Control */
311#define DCRN_PLB0_BESRL 0x082 /* PLB Error Status */
312#define DCRN_PLB0_BESRH 0x083 /* PLB Error Status */
313#define DCRN_PLB0_BEARL 0x084 /* PLB Error Address Low */
314#define DCRN_PLB0_BEARH 0x085 /* PLB Error Address High */
315
316#define DCRN_PLB1_ACR 0x089 /* PLB Arbiter Control */
317#define DCRN_PLB1_BESRL 0x08a /* PLB Error Status */
318#define DCRN_PLB1_BESRH 0x08b /* PLB Error Status */
319#define DCRN_PLB1_BEARL 0x08c /* PLB Error Address Low */
320#define DCRN_PLB1_BEARH 0x08d /* PLB Error Address High */
321#else
305/* 440GP/GX PLB Arbiter DCRs */ 322/* 440GP/GX PLB Arbiter DCRs */
306#define DCRN_PLB0_REVID 0x082 /* PLB Arbiter Revision ID */ 323#define DCRN_PLB0_REVID 0x082 /* PLB Arbiter Revision ID */
307#define DCRN_PLB0_ACR 0x083 /* PLB Arbiter Control */ 324#define DCRN_PLB0_ACR 0x083 /* PLB Arbiter Control */
@@ -309,6 +326,7 @@
309#define DCRN_PLB0_BEARL 0x086 /* PLB Error Address Low */ 326#define DCRN_PLB0_BEARL 0x086 /* PLB Error Address Low */
310#define DCRN_PLB0_BEAR DCRN_PLB0_BEARL /* 40x compatibility */ 327#define DCRN_PLB0_BEAR DCRN_PLB0_BEARL /* 40x compatibility */
311#define DCRN_PLB0_BEARH 0x087 /* PLB Error Address High */ 328#define DCRN_PLB0_BEARH 0x087 /* PLB Error Address High */
329#endif
312 330
313/* 440GP/GX PLB to OPB bridge DCRs */ 331/* 440GP/GX PLB to OPB bridge DCRs */
314#define DCRN_POB0_BESR0 0x090 332#define DCRN_POB0_BESR0 0x090