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-rw-r--r--arch/arm/mach-pxa/generic.h1
-rw-r--r--arch/arm/mach-pxa/gpio.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h5
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index bc12c9421cef..3465268ca716 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -20,7 +20,6 @@ extern void __init pxa3xx_init_irq(void);
20extern void __init pxa_map_io(void); 20extern void __init pxa_map_io(void);
21 21
22extern unsigned int get_clk_frequency_khz(int info); 22extern unsigned int get_clk_frequency_khz(int info);
23extern int pxa_last_gpio;
24 23
25#define SET_BANK(__nr,__start,__size) \ 24#define SET_BANK(__nr,__start,__size) \
26 mi->bank[__nr].start = (__start), \ 25 mi->bank[__nr].start = (__start), \
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 9a33eb07fe0a..41935590e990 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -20,6 +20,8 @@
20 20
21#include <mach/gpio.h> 21#include <mach/gpio.h>
22 22
23int pxa_last_gpio;
24
23#define GPIO0_BASE (GPIO_REGS_VIRT + 0x0000) 25#define GPIO0_BASE (GPIO_REGS_VIRT + 0x0000)
24#define GPIO1_BASE (GPIO_REGS_VIRT + 0x0004) 26#define GPIO1_BASE (GPIO_REGS_VIRT + 0x0004)
25#define GPIO2_BASE (GPIO_REGS_VIRT + 0x0008) 27#define GPIO2_BASE (GPIO_REGS_VIRT + 0x0008)
@@ -38,8 +40,6 @@ struct pxa_gpio_chip {
38 void __iomem *regbase; 40 void __iomem *regbase;
39}; 41};
40 42
41int pxa_last_gpio;
42
43static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 43static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
44{ 44{
45 unsigned long flags; 45 unsigned long flags;
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index be4900ea32da..4049b234eda3 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -100,8 +100,11 @@
100 100
101 101
102/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). 102/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
103 * Those cases currently cause holes in the GPIO number space. 103 * Those cases currently cause holes in the GPIO number space, the
104 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
104 */ 105 */
106extern int pxa_last_gpio;
107
105#define NR_BUILTIN_GPIO 128 108#define NR_BUILTIN_GPIO 128
106 109
107static inline int gpio_get_value(unsigned gpio) 110static inline int gpio_get_value(unsigned gpio)