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-rw-r--r--arch/ia64/include/asm/Kbuild14
-rw-r--r--arch/ia64/include/asm/gcc_intrin.h615
-rw-r--r--arch/ia64/include/asm/intrinsics.h120
-rw-r--r--arch/ia64/include/asm/kvm_para.h10
-rw-r--r--arch/ia64/include/asm/mman.h12
-rw-r--r--arch/ia64/include/asm/param.h22
-rw-r--r--arch/ia64/include/asm/perfmon.h171
-rw-r--r--arch/ia64/include/asm/ptrace.h236
-rw-r--r--arch/ia64/include/asm/siginfo.h118
-rw-r--r--arch/ia64/include/asm/signal.h122
-rw-r--r--arch/ia64/include/asm/termios.h46
-rw-r--r--arch/ia64/include/asm/types.h19
-rw-r--r--arch/ia64/include/asm/unistd.h324
-rw-r--r--arch/ia64/include/asm/ustack.h11
-rw-r--r--arch/ia64/include/uapi/asm/Kbuild45
-rw-r--r--arch/ia64/include/uapi/asm/auxvec.h (renamed from arch/ia64/include/asm/auxvec.h)0
-rw-r--r--arch/ia64/include/uapi/asm/bitsperlong.h (renamed from arch/ia64/include/asm/bitsperlong.h)0
-rw-r--r--arch/ia64/include/uapi/asm/break.h (renamed from arch/ia64/include/asm/break.h)0
-rw-r--r--arch/ia64/include/uapi/asm/byteorder.h (renamed from arch/ia64/include/asm/byteorder.h)0
-rw-r--r--arch/ia64/include/uapi/asm/cmpxchg.h (renamed from arch/ia64/include/asm/cmpxchg.h)0
-rw-r--r--arch/ia64/include/uapi/asm/errno.h (renamed from arch/ia64/include/asm/errno.h)0
-rw-r--r--arch/ia64/include/uapi/asm/fcntl.h (renamed from arch/ia64/include/asm/fcntl.h)0
-rw-r--r--arch/ia64/include/uapi/asm/fpu.h (renamed from arch/ia64/include/asm/fpu.h)0
-rw-r--r--arch/ia64/include/uapi/asm/gcc_intrin.h618
-rw-r--r--arch/ia64/include/uapi/asm/ia64regs.h (renamed from arch/ia64/include/asm/ia64regs.h)0
-rw-r--r--arch/ia64/include/uapi/asm/intel_intrin.h (renamed from arch/ia64/include/asm/intel_intrin.h)0
-rw-r--r--arch/ia64/include/uapi/asm/intrinsics.h124
-rw-r--r--arch/ia64/include/uapi/asm/ioctl.h (renamed from arch/ia64/include/asm/ioctl.h)0
-rw-r--r--arch/ia64/include/uapi/asm/ioctls.h (renamed from arch/ia64/include/asm/ioctls.h)0
-rw-r--r--arch/ia64/include/uapi/asm/ipcbuf.h (renamed from arch/ia64/include/asm/ipcbuf.h)0
-rw-r--r--arch/ia64/include/uapi/asm/kvm.h (renamed from arch/ia64/include/asm/kvm.h)0
-rw-r--r--arch/ia64/include/uapi/asm/kvm_para.h0
-rw-r--r--arch/ia64/include/uapi/asm/mman.h16
-rw-r--r--arch/ia64/include/uapi/asm/msgbuf.h (renamed from arch/ia64/include/asm/msgbuf.h)0
-rw-r--r--arch/ia64/include/uapi/asm/param.h29
-rw-r--r--arch/ia64/include/uapi/asm/perfmon.h177
-rw-r--r--arch/ia64/include/uapi/asm/perfmon_default_smpl.h (renamed from arch/ia64/include/asm/perfmon_default_smpl.h)0
-rw-r--r--arch/ia64/include/uapi/asm/poll.h (renamed from arch/ia64/include/asm/poll.h)0
-rw-r--r--arch/ia64/include/uapi/asm/posix_types.h (renamed from arch/ia64/include/asm/posix_types.h)0
-rw-r--r--arch/ia64/include/uapi/asm/ptrace.h247
-rw-r--r--arch/ia64/include/uapi/asm/ptrace_offsets.h (renamed from arch/ia64/include/asm/ptrace_offsets.h)0
-rw-r--r--arch/ia64/include/uapi/asm/resource.h (renamed from arch/ia64/include/asm/resource.h)0
-rw-r--r--arch/ia64/include/uapi/asm/rse.h (renamed from arch/ia64/include/asm/rse.h)0
-rw-r--r--arch/ia64/include/uapi/asm/sembuf.h (renamed from arch/ia64/include/asm/sembuf.h)0
-rw-r--r--arch/ia64/include/uapi/asm/setup.h (renamed from arch/ia64/include/asm/setup.h)0
-rw-r--r--arch/ia64/include/uapi/asm/shmbuf.h (renamed from arch/ia64/include/asm/shmbuf.h)0
-rw-r--r--arch/ia64/include/uapi/asm/sigcontext.h (renamed from arch/ia64/include/asm/sigcontext.h)0
-rw-r--r--arch/ia64/include/uapi/asm/siginfo.h121
-rw-r--r--arch/ia64/include/uapi/asm/signal.h127
-rw-r--r--arch/ia64/include/uapi/asm/socket.h (renamed from arch/ia64/include/asm/socket.h)0
-rw-r--r--arch/ia64/include/uapi/asm/sockios.h (renamed from arch/ia64/include/asm/sockios.h)0
-rw-r--r--arch/ia64/include/uapi/asm/stat.h (renamed from arch/ia64/include/asm/stat.h)0
-rw-r--r--arch/ia64/include/uapi/asm/statfs.h (renamed from arch/ia64/include/asm/statfs.h)0
-rw-r--r--arch/ia64/include/uapi/asm/swab.h (renamed from arch/ia64/include/asm/swab.h)0
-rw-r--r--arch/ia64/include/uapi/asm/termbits.h (renamed from arch/ia64/include/asm/termbits.h)0
-rw-r--r--arch/ia64/include/uapi/asm/termios.h50
-rw-r--r--arch/ia64/include/uapi/asm/types.h31
-rw-r--r--arch/ia64/include/uapi/asm/ucontext.h (renamed from arch/ia64/include/asm/ucontext.h)0
-rw-r--r--arch/ia64/include/uapi/asm/unistd.h328
-rw-r--r--arch/ia64/include/uapi/asm/ustack.h12
60 files changed, 1961 insertions, 1804 deletions
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index 562f59315847..4a159da23633 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -1,17 +1,3 @@
1include include/asm-generic/Kbuild.asm
2 1
3header-y += break.h
4header-y += cmpxchg.h
5header-y += fpu.h
6header-y += gcc_intrin.h
7header-y += ia64regs.h
8header-y += intel_intrin.h
9header-y += intrinsics.h
10header-y += perfmon.h
11header-y += perfmon_default_smpl.h
12header-y += ptrace_offsets.h
13header-y += rse.h
14header-y += ucontext.h
15header-y += ustack.h
16generic-y += clkdev.h 2generic-y += clkdev.h
17generic-y += exec.h 3generic-y += exec.h
diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h
index 21ddee54adae..f9495b1757a8 100644
--- a/arch/ia64/include/asm/gcc_intrin.h
+++ b/arch/ia64/include/asm/gcc_intrin.h
@@ -1,621 +1,12 @@
1#ifndef _ASM_IA64_GCC_INTRIN_H
2#define _ASM_IA64_GCC_INTRIN_H
3/* 1/*
4 * 2 *
5 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com> 3 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
6 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com> 4 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
7 */ 5 */
6#ifndef _ASM_IA64_GCC_INTRIN_H
7#define _ASM_IA64_GCC_INTRIN_H
8 8
9#include <linux/types.h> 9#include <uapi/asm/gcc_intrin.h>
10#include <linux/compiler.h>
11
12/* define this macro to get some asm stmts included in 'c' files */
13#define ASM_SUPPORTED
14
15/* Optimization barrier */
16/* The "volatile" is due to gcc bugs */
17#define ia64_barrier() asm volatile ("":::"memory")
18
19#define ia64_stop() asm volatile (";;"::)
20
21#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
22
23#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
24
25#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
26
27#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
28
29extern void ia64_bad_param_for_setreg (void);
30extern void ia64_bad_param_for_getreg (void);
31 10
32#ifdef __KERNEL__
33register unsigned long ia64_r13 asm ("r13") __used; 11register unsigned long ia64_r13 asm ("r13") __used;
34#endif
35
36#define ia64_native_setreg(regnum, val) \
37({ \
38 switch (regnum) { \
39 case _IA64_REG_PSR_L: \
40 asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
41 break; \
42 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
43 asm volatile ("mov ar%0=%1" :: \
44 "i" (regnum - _IA64_REG_AR_KR0), \
45 "r"(val): "memory"); \
46 break; \
47 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
48 asm volatile ("mov cr%0=%1" :: \
49 "i" (regnum - _IA64_REG_CR_DCR), \
50 "r"(val): "memory" ); \
51 break; \
52 case _IA64_REG_SP: \
53 asm volatile ("mov r12=%0" :: \
54 "r"(val): "memory"); \
55 break; \
56 case _IA64_REG_GP: \
57 asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
58 break; \
59 default: \
60 ia64_bad_param_for_setreg(); \
61 break; \
62 } \
63})
64
65#define ia64_native_getreg(regnum) \
66({ \
67 __u64 ia64_intri_res; \
68 \
69 switch (regnum) { \
70 case _IA64_REG_GP: \
71 asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
72 break; \
73 case _IA64_REG_IP: \
74 asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
75 break; \
76 case _IA64_REG_PSR: \
77 asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
78 break; \
79 case _IA64_REG_TP: /* for current() */ \
80 ia64_intri_res = ia64_r13; \
81 break; \
82 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
83 asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
84 : "i"(regnum - _IA64_REG_AR_KR0)); \
85 break; \
86 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
87 asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
88 : "i" (regnum - _IA64_REG_CR_DCR)); \
89 break; \
90 case _IA64_REG_SP: \
91 asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
92 break; \
93 default: \
94 ia64_bad_param_for_getreg(); \
95 break; \
96 } \
97 ia64_intri_res; \
98})
99
100#define ia64_hint_pause 0
101
102#define ia64_hint(mode) \
103({ \
104 switch (mode) { \
105 case ia64_hint_pause: \
106 asm volatile ("hint @pause" ::: "memory"); \
107 break; \
108 } \
109})
110
111
112/* Integer values for mux1 instruction */
113#define ia64_mux1_brcst 0
114#define ia64_mux1_mix 8
115#define ia64_mux1_shuf 9
116#define ia64_mux1_alt 10
117#define ia64_mux1_rev 11
118
119#define ia64_mux1(x, mode) \
120({ \
121 __u64 ia64_intri_res; \
122 \
123 switch (mode) { \
124 case ia64_mux1_brcst: \
125 asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
126 break; \
127 case ia64_mux1_mix: \
128 asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
129 break; \
130 case ia64_mux1_shuf: \
131 asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
132 break; \
133 case ia64_mux1_alt: \
134 asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
135 break; \
136 case ia64_mux1_rev: \
137 asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
138 break; \
139 } \
140 ia64_intri_res; \
141})
142
143#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
144# define ia64_popcnt(x) __builtin_popcountl(x)
145#else
146# define ia64_popcnt(x) \
147 ({ \
148 __u64 ia64_intri_res; \
149 asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
150 \
151 ia64_intri_res; \
152 })
153#endif
154
155#define ia64_getf_exp(x) \
156({ \
157 long ia64_intri_res; \
158 \
159 asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
160 \
161 ia64_intri_res; \
162})
163
164#define ia64_shrp(a, b, count) \
165({ \
166 __u64 ia64_intri_res; \
167 asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
168 ia64_intri_res; \
169})
170
171#define ia64_ldfs(regnum, x) \
172({ \
173 register double __f__ asm ("f"#regnum); \
174 asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
175})
176
177#define ia64_ldfd(regnum, x) \
178({ \
179 register double __f__ asm ("f"#regnum); \
180 asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
181})
182
183#define ia64_ldfe(regnum, x) \
184({ \
185 register double __f__ asm ("f"#regnum); \
186 asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
187})
188
189#define ia64_ldf8(regnum, x) \
190({ \
191 register double __f__ asm ("f"#regnum); \
192 asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
193})
194
195#define ia64_ldf_fill(regnum, x) \
196({ \
197 register double __f__ asm ("f"#regnum); \
198 asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
199})
200
201#define ia64_st4_rel_nta(m, val) \
202({ \
203 asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
204})
205
206#define ia64_stfs(x, regnum) \
207({ \
208 register double __f__ asm ("f"#regnum); \
209 asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
210})
211
212#define ia64_stfd(x, regnum) \
213({ \
214 register double __f__ asm ("f"#regnum); \
215 asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
216})
217
218#define ia64_stfe(x, regnum) \
219({ \
220 register double __f__ asm ("f"#regnum); \
221 asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
222})
223
224#define ia64_stf8(x, regnum) \
225({ \
226 register double __f__ asm ("f"#regnum); \
227 asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
228})
229
230#define ia64_stf_spill(x, regnum) \
231({ \
232 register double __f__ asm ("f"#regnum); \
233 asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
234})
235
236#define ia64_fetchadd4_acq(p, inc) \
237({ \
238 \
239 __u64 ia64_intri_res; \
240 asm volatile ("fetchadd4.acq %0=[%1],%2" \
241 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
242 : "memory"); \
243 \
244 ia64_intri_res; \
245})
246
247#define ia64_fetchadd4_rel(p, inc) \
248({ \
249 __u64 ia64_intri_res; \
250 asm volatile ("fetchadd4.rel %0=[%1],%2" \
251 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
252 : "memory"); \
253 \
254 ia64_intri_res; \
255})
256
257#define ia64_fetchadd8_acq(p, inc) \
258({ \
259 \
260 __u64 ia64_intri_res; \
261 asm volatile ("fetchadd8.acq %0=[%1],%2" \
262 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
263 : "memory"); \
264 \
265 ia64_intri_res; \
266})
267
268#define ia64_fetchadd8_rel(p, inc) \
269({ \
270 __u64 ia64_intri_res; \
271 asm volatile ("fetchadd8.rel %0=[%1],%2" \
272 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
273 : "memory"); \
274 \
275 ia64_intri_res; \
276})
277
278#define ia64_xchg1(ptr,x) \
279({ \
280 __u64 ia64_intri_res; \
281 asm volatile ("xchg1 %0=[%1],%2" \
282 : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
283 ia64_intri_res; \
284})
285
286#define ia64_xchg2(ptr,x) \
287({ \
288 __u64 ia64_intri_res; \
289 asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
290 : "r" (ptr), "r" (x) : "memory"); \
291 ia64_intri_res; \
292})
293
294#define ia64_xchg4(ptr,x) \
295({ \
296 __u64 ia64_intri_res; \
297 asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
298 : "r" (ptr), "r" (x) : "memory"); \
299 ia64_intri_res; \
300})
301
302#define ia64_xchg8(ptr,x) \
303({ \
304 __u64 ia64_intri_res; \
305 asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
306 : "r" (ptr), "r" (x) : "memory"); \
307 ia64_intri_res; \
308})
309
310#define ia64_cmpxchg1_acq(ptr, new, old) \
311({ \
312 __u64 ia64_intri_res; \
313 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
314 asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
315 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
316 ia64_intri_res; \
317})
318
319#define ia64_cmpxchg1_rel(ptr, new, old) \
320({ \
321 __u64 ia64_intri_res; \
322 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
323 asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
324 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
325 ia64_intri_res; \
326})
327
328#define ia64_cmpxchg2_acq(ptr, new, old) \
329({ \
330 __u64 ia64_intri_res; \
331 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
332 asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
333 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
334 ia64_intri_res; \
335})
336
337#define ia64_cmpxchg2_rel(ptr, new, old) \
338({ \
339 __u64 ia64_intri_res; \
340 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
341 \
342 asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
343 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
344 ia64_intri_res; \
345})
346
347#define ia64_cmpxchg4_acq(ptr, new, old) \
348({ \
349 __u64 ia64_intri_res; \
350 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
351 asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
352 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
353 ia64_intri_res; \
354})
355
356#define ia64_cmpxchg4_rel(ptr, new, old) \
357({ \
358 __u64 ia64_intri_res; \
359 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
360 asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
361 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
362 ia64_intri_res; \
363})
364
365#define ia64_cmpxchg8_acq(ptr, new, old) \
366({ \
367 __u64 ia64_intri_res; \
368 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
369 asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
370 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
371 ia64_intri_res; \
372})
373
374#define ia64_cmpxchg8_rel(ptr, new, old) \
375({ \
376 __u64 ia64_intri_res; \
377 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
378 \
379 asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
380 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
381 ia64_intri_res; \
382})
383
384#define ia64_mf() asm volatile ("mf" ::: "memory")
385#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
386
387#define ia64_invala() asm volatile ("invala" ::: "memory")
388
389#define ia64_native_thash(addr) \
390({ \
391 unsigned long ia64_intri_res; \
392 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
393 ia64_intri_res; \
394})
395
396#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
397#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
398
399#ifdef HAVE_SERIALIZE_DIRECTIVE
400# define ia64_dv_serialize_data() asm volatile (".serialize.data");
401# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction");
402#else
403# define ia64_dv_serialize_data()
404# define ia64_dv_serialize_instruction()
405#endif
406
407#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
408
409#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
410
411#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
412
413
414#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
415 :: "r"(trnum), "r"(addr) : "memory")
416
417#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
418 :: "r"(trnum), "r"(addr) : "memory")
419
420#define ia64_tpa(addr) \
421({ \
422 unsigned long ia64_pa; \
423 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
424 ia64_pa; \
425})
426
427#define __ia64_set_dbr(index, val) \
428 asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
429
430#define ia64_set_ibr(index, val) \
431 asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
432
433#define ia64_set_pkr(index, val) \
434 asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
435
436#define ia64_set_pmc(index, val) \
437 asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
438
439#define ia64_set_pmd(index, val) \
440 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
441
442#define ia64_native_set_rr(index, val) \
443 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
444
445#define ia64_native_get_cpuid(index) \
446({ \
447 unsigned long ia64_intri_res; \
448 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
449 ia64_intri_res; \
450})
451
452#define __ia64_get_dbr(index) \
453({ \
454 unsigned long ia64_intri_res; \
455 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
456 ia64_intri_res; \
457})
458
459#define ia64_get_ibr(index) \
460({ \
461 unsigned long ia64_intri_res; \
462 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
463 ia64_intri_res; \
464})
465
466#define ia64_get_pkr(index) \
467({ \
468 unsigned long ia64_intri_res; \
469 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
470 ia64_intri_res; \
471})
472
473#define ia64_get_pmc(index) \
474({ \
475 unsigned long ia64_intri_res; \
476 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
477 ia64_intri_res; \
478})
479
480
481#define ia64_native_get_pmd(index) \
482({ \
483 unsigned long ia64_intri_res; \
484 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
485 ia64_intri_res; \
486})
487
488#define ia64_native_get_rr(index) \
489({ \
490 unsigned long ia64_intri_res; \
491 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
492 ia64_intri_res; \
493})
494
495#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
496
497
498#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
499
500#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
501#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
502#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
503#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
504
505#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
506
507#define ia64_native_ptcga(addr, size) \
508do { \
509 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
510 ia64_dv_serialize_data(); \
511} while (0)
512
513#define ia64_ptcl(addr, size) \
514do { \
515 asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
516 ia64_dv_serialize_data(); \
517} while (0)
518
519#define ia64_ptri(addr, size) \
520 asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
521
522#define ia64_ptrd(addr, size) \
523 asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
524
525#define ia64_ttag(addr) \
526({ \
527 __u64 ia64_intri_res; \
528 asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
529 ia64_intri_res; \
530})
531
532
533/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
534
535#define ia64_lfhint_none 0
536#define ia64_lfhint_nt1 1
537#define ia64_lfhint_nt2 2
538#define ia64_lfhint_nta 3
539
540#define ia64_lfetch(lfhint, y) \
541({ \
542 switch (lfhint) { \
543 case ia64_lfhint_none: \
544 asm volatile ("lfetch [%0]" : : "r"(y)); \
545 break; \
546 case ia64_lfhint_nt1: \
547 asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
548 break; \
549 case ia64_lfhint_nt2: \
550 asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
551 break; \
552 case ia64_lfhint_nta: \
553 asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
554 break; \
555 } \
556})
557
558#define ia64_lfetch_excl(lfhint, y) \
559({ \
560 switch (lfhint) { \
561 case ia64_lfhint_none: \
562 asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
563 break; \
564 case ia64_lfhint_nt1: \
565 asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
566 break; \
567 case ia64_lfhint_nt2: \
568 asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
569 break; \
570 case ia64_lfhint_nta: \
571 asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
572 break; \
573 } \
574})
575
576#define ia64_lfetch_fault(lfhint, y) \
577({ \
578 switch (lfhint) { \
579 case ia64_lfhint_none: \
580 asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
581 break; \
582 case ia64_lfhint_nt1: \
583 asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
584 break; \
585 case ia64_lfhint_nt2: \
586 asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
587 break; \
588 case ia64_lfhint_nta: \
589 asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
590 break; \
591 } \
592})
593
594#define ia64_lfetch_fault_excl(lfhint, y) \
595({ \
596 switch (lfhint) { \
597 case ia64_lfhint_none: \
598 asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
599 break; \
600 case ia64_lfhint_nt1: \
601 asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
602 break; \
603 case ia64_lfhint_nt2: \
604 asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
605 break; \
606 case ia64_lfhint_nta: \
607 asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
608 break; \
609 } \
610})
611
612#define ia64_native_intrin_local_irq_restore(x) \
613do { \
614 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
615 "(p6) ssm psr.i;" \
616 "(p7) rsm psr.i;;" \
617 "(p6) srlz.d" \
618 :: "r"((x)) : "p6", "p7", "memory"); \
619} while (0)
620
621#endif /* _ASM_IA64_GCC_INTRIN_H */ 12#endif /* _ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index d129e367e764..20477ea111ba 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -1,99 +1,16 @@
1#ifndef _ASM_IA64_INTRINSICS_H
2#define _ASM_IA64_INTRINSICS_H
3
4/* 1/*
5 * Compiler-dependent intrinsics. 2 * Compiler-dependent intrinsics.
6 * 3 *
7 * Copyright (C) 2002-2003 Hewlett-Packard Co 4 * Copyright (C) 2002-2003 Hewlett-Packard Co
8 * David Mosberger-Tang <davidm@hpl.hp.com> 5 * David Mosberger-Tang <davidm@hpl.hp.com>
9 */ 6 */
7#ifndef _ASM_IA64_INTRINSICS_H
8#define _ASM_IA64_INTRINSICS_H
10 9
11#ifndef __ASSEMBLY__
12
13#include <linux/types.h>
14/* include compiler specific intrinsics */
15#include <asm/ia64regs.h>
16#ifdef __INTEL_COMPILER
17# include <asm/intel_intrin.h>
18#else
19# include <asm/gcc_intrin.h>
20#endif
21#include <asm/cmpxchg.h>
22
23#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
24
25#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
26do { \
27 ia64_native_set_rr(0x0000000000000000UL, (val0)); \
28 ia64_native_set_rr(0x2000000000000000UL, (val1)); \
29 ia64_native_set_rr(0x4000000000000000UL, (val2)); \
30 ia64_native_set_rr(0x6000000000000000UL, (val3)); \
31 ia64_native_set_rr(0x8000000000000000UL, (val4)); \
32} while (0)
33
34/*
35 * Force an unresolved reference if someone tries to use
36 * ia64_fetch_and_add() with a bad value.
37 */
38extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
39extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
40
41#define IA64_FETCHADD(tmp,v,n,sz,sem) \
42({ \
43 switch (sz) { \
44 case 4: \
45 tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
46 break; \
47 \
48 case 8: \
49 tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
50 break; \
51 \
52 default: \
53 __bad_size_for_ia64_fetch_and_add(); \
54 } \
55})
56
57#define ia64_fetchadd(i,v,sem) \
58({ \
59 __u64 _tmp; \
60 volatile __typeof__(*(v)) *_v = (v); \
61 /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
62 if ((i) == -16) \
63 IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
64 else if ((i) == -8) \
65 IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
66 else if ((i) == -4) \
67 IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
68 else if ((i) == -1) \
69 IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
70 else if ((i) == 1) \
71 IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
72 else if ((i) == 4) \
73 IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
74 else if ((i) == 8) \
75 IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
76 else if ((i) == 16) \
77 IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
78 else \
79 _tmp = __bad_increment_for_ia64_fetch_and_add(); \
80 (__typeof__(*(v))) (_tmp); /* return old value */ \
81})
82
83#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
84
85#endif
86
87#ifdef __KERNEL__
88#include <asm/paravirt_privop.h> 10#include <asm/paravirt_privop.h>
89#endif 11#include <uapi/asm/intrinsics.h>
90 12
91#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
92
93#define IA64_INTRINSIC_API(name) ia64_native_ ## name
94#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
95
96#if defined(__KERNEL__)
97#if defined(CONFIG_PARAVIRT) 14#if defined(CONFIG_PARAVIRT)
98# undef IA64_INTRINSIC_API 15# undef IA64_INTRINSIC_API
99# undef IA64_INTRINSIC_MACRO 16# undef IA64_INTRINSIC_MACRO
@@ -104,36 +21,5 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
104# endif 21# endif
105#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name 22#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
106#endif 23#endif
107#endif
108
109/************************************************/
110/* Instructions paravirtualized for correctness */
111/************************************************/
112/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
113/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
114 * is not currently used (though it may be in a long-format VHPT system!)
115 */
116#define ia64_fc IA64_INTRINSIC_API(fc)
117#define ia64_thash IA64_INTRINSIC_API(thash)
118#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
119#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
120
121
122/************************************************/
123/* Instructions paravirtualized for performance */
124/************************************************/
125#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
126#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
127#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
128#define ia64_setreg IA64_INTRINSIC_API(setreg)
129#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
130#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
131#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
132#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
133#define ia64_intrin_local_irq_restore \
134 IA64_INTRINSIC_API(intrin_local_irq_restore)
135#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
136
137#endif /* !__ASSEMBLY__ */ 24#endif /* !__ASSEMBLY__ */
138
139#endif /* _ASM_IA64_INTRINSICS_H */ 25#endif /* _ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/asm/kvm_para.h b/arch/ia64/include/asm/kvm_para.h
index 2019cb99335e..47c00f910434 100644
--- a/arch/ia64/include/asm/kvm_para.h
+++ b/arch/ia64/include/asm/kvm_para.h
@@ -1,6 +1,3 @@
1#ifndef __IA64_KVM_PARA_H
2#define __IA64_KVM_PARA_H
3
4/* 1/*
5 * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com> 2 * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
6 * 3 *
@@ -18,8 +15,11 @@
18 * Place - Suite 330, Boston, MA 02111-1307 USA. 15 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 * 16 *
20 */ 17 */
18#ifndef __IA64_KVM_PARA_H
19#define __IA64_KVM_PARA_H
20
21#include <uapi/asm/kvm_para.h>
21 22
22#ifdef __KERNEL__
23 23
24static inline unsigned int kvm_arch_para_features(void) 24static inline unsigned int kvm_arch_para_features(void)
25{ 25{
@@ -32,5 +32,3 @@ static inline bool kvm_check_and_clear_guest_paused(void)
32} 32}
33 33
34#endif 34#endif
35
36#endif
diff --git a/arch/ia64/include/asm/mman.h b/arch/ia64/include/asm/mman.h
index 4459028e5aa8..fdd5f5229f78 100644
--- a/arch/ia64/include/asm/mman.h
+++ b/arch/ia64/include/asm/mman.h
@@ -1,23 +1,17 @@
1#ifndef _ASM_IA64_MMAN_H
2#define _ASM_IA64_MMAN_H
3
4/* 1/*
5 * Based on <asm-i386/mman.h>. 2 * Based on <asm-i386/mman.h>.
6 * 3 *
7 * Modified 1998-2000, 2002 4 * Modified 1998-2000, 2002
8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
9 */ 6 */
7#ifndef _ASM_IA64_MMAN_H
8#define _ASM_IA64_MMAN_H
10 9
11#include <asm-generic/mman.h> 10#include <uapi/asm/mman.h>
12
13#define MAP_GROWSUP 0x0200 /* register stack-like segment */
14 11
15#ifdef __KERNEL__
16#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
17#define arch_mmap_check ia64_mmap_check 13#define arch_mmap_check ia64_mmap_check
18int ia64_mmap_check(unsigned long addr, unsigned long len, 14int ia64_mmap_check(unsigned long addr, unsigned long len,
19 unsigned long flags); 15 unsigned long flags);
20#endif 16#endif
21#endif
22
23#endif /* _ASM_IA64_MMAN_H */ 17#endif /* _ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/asm/param.h b/arch/ia64/include/asm/param.h
index 0964c32c1358..1295913d6a82 100644
--- a/arch/ia64/include/asm/param.h
+++ b/arch/ia64/include/asm/param.h
@@ -1,6 +1,3 @@
1#ifndef _ASM_IA64_PARAM_H
2#define _ASM_IA64_PARAM_H
3
4/* 1/*
5 * Fundamental kernel parameters. 2 * Fundamental kernel parameters.
6 * 3 *
@@ -9,25 +6,12 @@
9 * Modified 1998, 1999, 2002-2003 6 * Modified 1998, 1999, 2002-2003
10 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 7 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
11 */ 8 */
9#ifndef _ASM_IA64_PARAM_H
10#define _ASM_IA64_PARAM_H
12 11
13#define EXEC_PAGESIZE 65536 12#include <uapi/asm/param.h>
14
15#ifndef NOGROUP
16# define NOGROUP (-1)
17#endif
18
19#define MAXHOSTNAMELEN 64 /* max length of hostname */
20 13
21#ifdef __KERNEL__
22# define HZ CONFIG_HZ 14# define HZ CONFIG_HZ
23# define USER_HZ HZ 15# define USER_HZ HZ
24# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ 16# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
25#else
26 /*
27 * Technically, this is wrong, but some old apps still refer to it. The proper way to
28 * get the HZ value is via sysconf(_SC_CLK_TCK).
29 */
30# define HZ 1024
31#endif
32
33#endif /* _ASM_IA64_PARAM_H */ 17#endif /* _ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/asm/perfmon.h b/arch/ia64/include/asm/perfmon.h
index d551183fee90..15476dd3a8b0 100644
--- a/arch/ia64/include/asm/perfmon.h
+++ b/arch/ia64/include/asm/perfmon.h
@@ -2,179 +2,12 @@
2 * Copyright (C) 2001-2003 Hewlett-Packard Co 2 * Copyright (C) 2001-2003 Hewlett-Packard Co
3 * Stephane Eranian <eranian@hpl.hp.com> 3 * Stephane Eranian <eranian@hpl.hp.com>
4 */ 4 */
5
6#ifndef _ASM_IA64_PERFMON_H 5#ifndef _ASM_IA64_PERFMON_H
7#define _ASM_IA64_PERFMON_H 6#define _ASM_IA64_PERFMON_H
8 7
9/* 8#include <uapi/asm/perfmon.h>
10 * perfmon commands supported on all CPU models
11 */
12#define PFM_WRITE_PMCS 0x01
13#define PFM_WRITE_PMDS 0x02
14#define PFM_READ_PMDS 0x03
15#define PFM_STOP 0x04
16#define PFM_START 0x05
17#define PFM_ENABLE 0x06 /* obsolete */
18#define PFM_DISABLE 0x07 /* obsolete */
19#define PFM_CREATE_CONTEXT 0x08
20#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */
21#define PFM_RESTART 0x0a
22#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */
23#define PFM_GET_FEATURES 0x0c
24#define PFM_DEBUG 0x0d
25#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */
26#define PFM_GET_PMC_RESET_VAL 0x0f
27#define PFM_LOAD_CONTEXT 0x10
28#define PFM_UNLOAD_CONTEXT 0x11
29
30/*
31 * PMU model specific commands (may not be supported on all PMU models)
32 */
33#define PFM_WRITE_IBRS 0x20
34#define PFM_WRITE_DBRS 0x21
35
36/*
37 * context flags
38 */
39#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */
40#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */
41#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */
42
43/*
44 * event set flags
45 */
46#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */
47
48/*
49 * PMC flags
50 */
51#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */
52#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
53
54/*
55 * PMD/PMC/IBR/DBR return flags (ignored on input)
56 *
57 * Those flags are used on output and must be checked in case EAGAIN is returned
58 * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
59 */
60#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
61#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */
62#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
63
64#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0)
65
66typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */
67
68/*
69 * Request structure used to define a context
70 */
71typedef struct {
72 pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */
73 unsigned long ctx_flags; /* noblock/block */
74 unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */
75 unsigned short ctx_reserved1; /* for future use */
76 int ctx_fd; /* return arg: unique identification for context */
77 void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */
78 unsigned long ctx_reserved2[11];/* for future use */
79} pfarg_context_t;
80
81/*
82 * Request structure used to write/read a PMC or PMD
83 */
84typedef struct {
85 unsigned int reg_num; /* which register */
86 unsigned short reg_set; /* event set for this register */
87 unsigned short reg_reserved1; /* for future use */
88
89 unsigned long reg_value; /* initial pmc/pmd value */
90 unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */
91
92 unsigned long reg_long_reset; /* reset after buffer overflow notification */
93 unsigned long reg_short_reset; /* reset after counter overflow */
94
95 unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */
96 unsigned long reg_random_seed; /* seed value when randomization is used */
97 unsigned long reg_random_mask; /* bitmask used to limit random value */
98 unsigned long reg_last_reset_val;/* return: PMD last reset value */
99
100 unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */
101 unsigned long reg_smpl_eventid; /* opaque sampling event identifier */
102
103 unsigned long reg_reserved2[3]; /* for future use */
104} pfarg_reg_t;
105
106typedef struct {
107 unsigned int dbreg_num; /* which debug register */
108 unsigned short dbreg_set; /* event set for this register */
109 unsigned short dbreg_reserved1; /* for future use */
110 unsigned long dbreg_value; /* value for debug register */
111 unsigned long dbreg_flags; /* return: dbreg error */
112 unsigned long dbreg_reserved2[1]; /* for future use */
113} pfarg_dbreg_t;
114
115typedef struct {
116 unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */
117 unsigned int ft_reserved; /* reserved for future use */
118 unsigned long reserved[4]; /* for future use */
119} pfarg_features_t;
120
121typedef struct {
122 pid_t load_pid; /* process to load the context into */
123 unsigned short load_set; /* first event set to load */
124 unsigned short load_reserved1; /* for future use */
125 unsigned long load_reserved2[3]; /* for future use */
126} pfarg_load_t;
127
128typedef struct {
129 int msg_type; /* generic message header */
130 int msg_ctx_fd; /* generic message header */
131 unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */
132 unsigned short msg_active_set; /* active set at the time of overflow */
133 unsigned short msg_reserved1; /* for future use */
134 unsigned int msg_reserved2; /* for future use */
135 unsigned long msg_tstamp; /* for perf tuning/debug */
136} pfm_ovfl_msg_t;
137
138typedef struct {
139 int msg_type; /* generic message header */
140 int msg_ctx_fd; /* generic message header */
141 unsigned long msg_tstamp; /* for perf tuning */
142} pfm_end_msg_t;
143
144typedef struct {
145 int msg_type; /* type of the message */
146 int msg_ctx_fd; /* unique identifier for the context */
147 unsigned long msg_tstamp; /* for perf tuning */
148} pfm_gen_msg_t;
149
150#define PFM_MSG_OVFL 1 /* an overflow happened */
151#define PFM_MSG_END 2 /* task to which context was attached ended */
152
153typedef union {
154 pfm_ovfl_msg_t pfm_ovfl_msg;
155 pfm_end_msg_t pfm_end_msg;
156 pfm_gen_msg_t pfm_gen_msg;
157} pfm_msg_t;
158
159/*
160 * Define the version numbers for both perfmon as a whole and the sampling buffer format.
161 */
162#define PFM_VERSION_MAJ 2U
163#define PFM_VERSION_MIN 0U
164#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
165#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff)
166#define PFM_VERSION_MINOR(x) ((x) & 0xffff)
167 9
168 10
169/*
170 * miscellaneous architected definitions
171 */
172#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */
173#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
174#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
175
176#ifdef __KERNEL__
177
178extern long perfmonctl(int fd, int cmd, void *arg, int narg); 11extern long perfmonctl(int fd, int cmd, void *arg, int narg);
179 12
180typedef struct { 13typedef struct {
@@ -274,6 +107,4 @@ typedef struct {
274extern pfm_sysctl_t pfm_sysctl; 107extern pfm_sysctl_t pfm_sysctl;
275 108
276 109
277#endif /* __KERNEL__ */
278
279#endif /* _ASM_IA64_PERFMON_H */ 110#endif /* _ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 68c98f5b3ca6..b0e973649cb9 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -1,6 +1,3 @@
1#ifndef _ASM_IA64_PTRACE_H
2#define _ASM_IA64_PTRACE_H
3
4/* 1/*
5 * Copyright (C) 1998-2004 Hewlett-Packard Co 2 * Copyright (C) 1998-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com> 3 * David Mosberger-Tang <davidm@hpl.hp.com>
@@ -15,52 +12,13 @@
15 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack" 12 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
16 * 13 *
17 */ 14 */
18/* 15#ifndef _ASM_IA64_PTRACE_H
19 * When a user process is blocked, its state looks as follows: 16#define _ASM_IA64_PTRACE_H
20 *
21 * +----------------------+ ------- IA64_STK_OFFSET
22 * | | ^
23 * | struct pt_regs | |
24 * | | |
25 * +----------------------+ |
26 * | | |
27 * | memory stack | |
28 * | (growing downwards) | |
29 * //.....................// |
30 * |
31 * //.....................// |
32 * | | |
33 * +----------------------+ |
34 * | struct switch_stack | |
35 * | | |
36 * +----------------------+ |
37 * | | |
38 * //.....................// |
39 * |
40 * //.....................// |
41 * | | |
42 * | register stack | |
43 * | (growing upwards) | |
44 * | | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
48 * | | | |
49 * | struct task_struct | | |
50 * current -> | | | |
51 * +----------------------+ -------
52 *
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
55 */
56
57
58#include <asm/fpu.h>
59 17
60#ifdef __KERNEL__
61#ifndef ASM_OFFSETS_C 18#ifndef ASM_OFFSETS_C
62#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
63#endif 20#endif
21#include <uapi/asm/ptrace.h>
64 22
65/* 23/*
66 * Base-2 logarithm of number of pages to allocate per task structure 24 * Base-2 logarithm of number of pages to allocate per task structure
@@ -81,155 +39,8 @@
81 39
82#define KERNEL_STACK_SIZE IA64_STK_OFFSET 40#define KERNEL_STACK_SIZE IA64_STK_OFFSET
83 41
84#endif /* __KERNEL__ */
85
86#ifndef __ASSEMBLY__ 42#ifndef __ASSEMBLY__
87 43
88/*
89 * This struct defines the way the registers are saved on system
90 * calls.
91 *
92 * We don't save all floating point register because the kernel
93 * is compiled to use only a very small subset, so the other are
94 * untouched.
95 *
96 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
97 * (because the memory stack pointer MUST ALWAYS be aligned this way)
98 *
99 */
100struct pt_regs {
101 /* The following registers are saved by SAVE_MIN: */
102 unsigned long b6; /* scratch */
103 unsigned long b7; /* scratch */
104
105 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
106 unsigned long ar_ssd; /* reserved for future use (scratch) */
107
108 unsigned long r8; /* scratch (return value register 0) */
109 unsigned long r9; /* scratch (return value register 1) */
110 unsigned long r10; /* scratch (return value register 2) */
111 unsigned long r11; /* scratch (return value register 3) */
112
113 unsigned long cr_ipsr; /* interrupted task's psr */
114 unsigned long cr_iip; /* interrupted task's instruction pointer */
115 /*
116 * interrupted task's function state; if bit 63 is cleared, it
117 * contains syscall's ar.pfs.pfm:
118 */
119 unsigned long cr_ifs;
120
121 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
122 unsigned long ar_pfs; /* prev function state */
123 unsigned long ar_rsc; /* RSE configuration */
124 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
125 unsigned long ar_rnat; /* RSE NaT */
126 unsigned long ar_bspstore; /* RSE bspstore */
127
128 unsigned long pr; /* 64 predicate registers (1 bit each) */
129 unsigned long b0; /* return pointer (bp) */
130 unsigned long loadrs; /* size of dirty partition << 16 */
131
132 unsigned long r1; /* the gp pointer */
133 unsigned long r12; /* interrupted task's memory stack pointer */
134 unsigned long r13; /* thread pointer */
135
136 unsigned long ar_fpsr; /* floating point status (preserved) */
137 unsigned long r15; /* scratch */
138
139 /* The remaining registers are NOT saved for system calls. */
140
141 unsigned long r14; /* scratch */
142 unsigned long r2; /* scratch */
143 unsigned long r3; /* scratch */
144
145 /* The following registers are saved by SAVE_REST: */
146 unsigned long r16; /* scratch */
147 unsigned long r17; /* scratch */
148 unsigned long r18; /* scratch */
149 unsigned long r19; /* scratch */
150 unsigned long r20; /* scratch */
151 unsigned long r21; /* scratch */
152 unsigned long r22; /* scratch */
153 unsigned long r23; /* scratch */
154 unsigned long r24; /* scratch */
155 unsigned long r25; /* scratch */
156 unsigned long r26; /* scratch */
157 unsigned long r27; /* scratch */
158 unsigned long r28; /* scratch */
159 unsigned long r29; /* scratch */
160 unsigned long r30; /* scratch */
161 unsigned long r31; /* scratch */
162
163 unsigned long ar_ccv; /* compare/exchange value (scratch) */
164
165 /*
166 * Floating point registers that the kernel considers scratch:
167 */
168 struct ia64_fpreg f6; /* scratch */
169 struct ia64_fpreg f7; /* scratch */
170 struct ia64_fpreg f8; /* scratch */
171 struct ia64_fpreg f9; /* scratch */
172 struct ia64_fpreg f10; /* scratch */
173 struct ia64_fpreg f11; /* scratch */
174};
175
176/*
177 * This structure contains the addition registers that need to
178 * preserved across a context switch. This generally consists of
179 * "preserved" registers.
180 */
181struct switch_stack {
182 unsigned long caller_unat; /* user NaT collection register (preserved) */
183 unsigned long ar_fpsr; /* floating-point status register */
184
185 struct ia64_fpreg f2; /* preserved */
186 struct ia64_fpreg f3; /* preserved */
187 struct ia64_fpreg f4; /* preserved */
188 struct ia64_fpreg f5; /* preserved */
189
190 struct ia64_fpreg f12; /* scratch, but untouched by kernel */
191 struct ia64_fpreg f13; /* scratch, but untouched by kernel */
192 struct ia64_fpreg f14; /* scratch, but untouched by kernel */
193 struct ia64_fpreg f15; /* scratch, but untouched by kernel */
194 struct ia64_fpreg f16; /* preserved */
195 struct ia64_fpreg f17; /* preserved */
196 struct ia64_fpreg f18; /* preserved */
197 struct ia64_fpreg f19; /* preserved */
198 struct ia64_fpreg f20; /* preserved */
199 struct ia64_fpreg f21; /* preserved */
200 struct ia64_fpreg f22; /* preserved */
201 struct ia64_fpreg f23; /* preserved */
202 struct ia64_fpreg f24; /* preserved */
203 struct ia64_fpreg f25; /* preserved */
204 struct ia64_fpreg f26; /* preserved */
205 struct ia64_fpreg f27; /* preserved */
206 struct ia64_fpreg f28; /* preserved */
207 struct ia64_fpreg f29; /* preserved */
208 struct ia64_fpreg f30; /* preserved */
209 struct ia64_fpreg f31; /* preserved */
210
211 unsigned long r4; /* preserved */
212 unsigned long r5; /* preserved */
213 unsigned long r6; /* preserved */
214 unsigned long r7; /* preserved */
215
216 unsigned long b0; /* so we can force a direct return in copy_thread */
217 unsigned long b1;
218 unsigned long b2;
219 unsigned long b3;
220 unsigned long b4;
221 unsigned long b5;
222
223 unsigned long ar_pfs; /* previous function state */
224 unsigned long ar_lc; /* loop counter (preserved) */
225 unsigned long ar_unat; /* NaT bits for r4-r7 */
226 unsigned long ar_rnat; /* RSE NaT collection register */
227 unsigned long ar_bspstore; /* RSE dirty base (preserved) */
228 unsigned long pr; /* 64 predicate registers (1 bit each) */
229};
230
231#ifdef __KERNEL__
232
233#include <asm/current.h> 44#include <asm/current.h>
234#include <asm/page.h> 45#include <asm/page.h>
235 46
@@ -331,46 +142,5 @@ static inline long regs_return_value(struct pt_regs *regs)
331 #define arch_has_single_step() (1) 142 #define arch_has_single_step() (1)
332 #define arch_has_block_step() (1) 143 #define arch_has_block_step() (1)
333 144
334#endif /* !__KERNEL__ */
335
336/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
337struct pt_all_user_regs {
338 unsigned long nat;
339 unsigned long cr_iip;
340 unsigned long cfm;
341 unsigned long cr_ipsr;
342 unsigned long pr;
343
344 unsigned long gr[32];
345 unsigned long br[8];
346 unsigned long ar[128];
347 struct ia64_fpreg fr[128];
348};
349
350#endif /* !__ASSEMBLY__ */ 145#endif /* !__ASSEMBLY__ */
351
352/* indices to application-registers array in pt_all_user_regs */
353#define PT_AUR_RSC 16
354#define PT_AUR_BSP 17
355#define PT_AUR_BSPSTORE 18
356#define PT_AUR_RNAT 19
357#define PT_AUR_CCV 32
358#define PT_AUR_UNAT 36
359#define PT_AUR_FPSR 40
360#define PT_AUR_PFS 64
361#define PT_AUR_LC 65
362#define PT_AUR_EC 66
363
364/*
365 * The numbers chosen here are somewhat arbitrary but absolutely MUST
366 * not overlap with any of the number assigned in <linux/ptrace.h>.
367 */
368#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
369#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
370#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
371#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
372#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
373
374#define PTRACE_OLDSETOPTIONS 21
375
376#endif /* _ASM_IA64_PTRACE_H */ 146#endif /* _ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/asm/siginfo.h b/arch/ia64/include/asm/siginfo.h
index c8fcaa2ac48f..6f2e2dd0f28f 100644
--- a/arch/ia64/include/asm/siginfo.h
+++ b/arch/ia64/include/asm/siginfo.h
@@ -1,124 +1,14 @@
1#ifndef _ASM_IA64_SIGINFO_H
2#define _ASM_IA64_SIGINFO_H
3
4/* 1/*
5 * Based on <asm-i386/siginfo.h>. 2 * Based on <asm-i386/siginfo.h>.
6 * 3 *
7 * Modified 1998-2002 4 * Modified 1998-2002
8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
9 */ 6 */
7#ifndef _ASM_IA64_SIGINFO_H
8#define _ASM_IA64_SIGINFO_H
10 9
11#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
12
13#define HAVE_ARCH_SIGINFO_T
14#define HAVE_ARCH_COPY_SIGINFO
15#define HAVE_ARCH_COPY_SIGINFO_TO_USER
16
17#include <asm-generic/siginfo.h>
18
19typedef struct siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23 int __pad0;
24
25 union {
26 int _pad[SI_PAD_SIZE];
27
28 /* kill() */
29 struct {
30 pid_t _pid; /* sender's pid */
31 uid_t _uid; /* sender's uid */
32 } _kill;
33
34 /* POSIX.1b timers */
35 struct {
36 timer_t _tid; /* timer id */
37 int _overrun; /* overrun count */
38 char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
39 sigval_t _sigval; /* must overlay ._rt._sigval! */
40 int _sys_private; /* not to be passed to user */
41 } _timer;
42
43 /* POSIX.1b signals */
44 struct {
45 pid_t _pid; /* sender's pid */
46 uid_t _uid; /* sender's uid */
47 sigval_t _sigval;
48 } _rt;
49
50 /* SIGCHLD */
51 struct {
52 pid_t _pid; /* which child */
53 uid_t _uid; /* sender's uid */
54 int _status; /* exit code */
55 clock_t _utime;
56 clock_t _stime;
57 } _sigchld;
58
59 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
60 struct {
61 void __user *_addr; /* faulting insn/memory ref. */
62 int _imm; /* immediate value for "break" */
63 unsigned int _flags; /* see below */
64 unsigned long _isr; /* isr */
65 short _addr_lsb; /* lsb of faulting address */
66 } _sigfault;
67
68 /* SIGPOLL */
69 struct {
70 long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
71 int _fd;
72 } _sigpoll;
73 } _sifields;
74} siginfo_t;
75
76#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */
77#define si_flags _sifields._sigfault._flags
78/*
79 * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
80 * si_code is non-zero and __ISR_VALID is set in si_flags.
81 */
82#define si_isr _sifields._sigfault._isr
83
84/*
85 * Flag values for si_flags:
86 */
87#define __ISR_VALID_BIT 0
88#define __ISR_VALID (1 << __ISR_VALID_BIT)
89
90/*
91 * SIGILL si_codes
92 */
93#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */
94#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */
95#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */
96#undef NSIGILL
97#define NSIGILL 11
98
99/*
100 * SIGFPE si_codes
101 */
102#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */
103#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */
104#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */
105#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */
106#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */
107#undef NSIGFPE
108#define NSIGFPE 13
109
110/*
111 * SIGSEGV si_codes
112 */
113#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
114#undef NSIGSEGV
115#define NSIGSEGV 3
116
117#undef NSIGTRAP
118#define NSIGTRAP 4
119
120#ifdef __KERNEL__
121#include <linux/string.h> 10#include <linux/string.h>
11#include <uapi/asm/siginfo.h>
122 12
123static inline void 13static inline void
124copy_siginfo (siginfo_t *to, siginfo_t *from) 14copy_siginfo (siginfo_t *to, siginfo_t *from)
@@ -130,6 +20,4 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
130 memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld)); 20 memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
131} 21}
132 22
133#endif /* __KERNEL__ */
134
135#endif /* _ASM_IA64_SIGINFO_H */ 23#endif /* _ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/asm/signal.h b/arch/ia64/include/asm/signal.h
index b166248d49a4..aecda5b9eb4e 100644
--- a/arch/ia64/include/asm/signal.h
+++ b/arch/ia64/include/asm/signal.h
@@ -1,6 +1,3 @@
1#ifndef _ASM_IA64_SIGNAL_H
2#define _ASM_IA64_SIGNAL_H
3
4/* 1/*
5 * Modified 1998-2001, 2003 2 * Modified 1998-2001, 2003
6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
@@ -8,129 +5,18 @@
8 * Unfortunately, this file is being included by bits/signal.h in 5 * Unfortunately, this file is being included by bits/signal.h in
9 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness. 6 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness.
10 */ 7 */
8#ifndef _ASM_IA64_SIGNAL_H
9#define _ASM_IA64_SIGNAL_H
11 10
12#define SIGHUP 1 11#include <uapi/asm/signal.h>
13#define SIGINT 2
14#define SIGQUIT 3
15#define SIGILL 4
16#define SIGTRAP 5
17#define SIGABRT 6
18#define SIGIOT 6
19#define SIGBUS 7
20#define SIGFPE 8
21#define SIGKILL 9
22#define SIGUSR1 10
23#define SIGSEGV 11
24#define SIGUSR2 12
25#define SIGPIPE 13
26#define SIGALRM 14
27#define SIGTERM 15
28#define SIGSTKFLT 16
29#define SIGCHLD 17
30#define SIGCONT 18
31#define SIGSTOP 19
32#define SIGTSTP 20
33#define SIGTTIN 21
34#define SIGTTOU 22
35#define SIGURG 23
36#define SIGXCPU 24
37#define SIGXFSZ 25
38#define SIGVTALRM 26
39#define SIGPROF 27
40#define SIGWINCH 28
41#define SIGIO 29
42#define SIGPOLL SIGIO
43/*
44#define SIGLOST 29
45*/
46#define SIGPWR 30
47#define SIGSYS 31
48/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
49#define SIGUNUSED 31
50
51/* These should not be considered constants from userland. */
52#define SIGRTMIN 32
53#define SIGRTMAX _NSIG
54
55/*
56 * SA_FLAGS values:
57 *
58 * SA_ONSTACK indicates that a registered stack_t will be used.
59 * SA_RESTART flag to get restarting signals (which were the default long ago)
60 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
61 * SA_RESETHAND clears the handler when the signal is delivered.
62 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
63 * SA_NODEFER prevents the current signal from being masked in the handler.
64 *
65 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
66 * Unix names RESETHAND and NODEFER respectively.
67 */
68#define SA_NOCLDSTOP 0x00000001
69#define SA_NOCLDWAIT 0x00000002
70#define SA_SIGINFO 0x00000004
71#define SA_ONSTACK 0x08000000
72#define SA_RESTART 0x10000000
73#define SA_NODEFER 0x40000000
74#define SA_RESETHAND 0x80000000
75
76#define SA_NOMASK SA_NODEFER
77#define SA_ONESHOT SA_RESETHAND
78
79#define SA_RESTORER 0x04000000
80
81/*
82 * sigaltstack controls
83 */
84#define SS_ONSTACK 1
85#define SS_DISABLE 2
86
87/*
88 * The minimum stack size needs to be fairly large because we want to
89 * be sure that an app compiled for today's CPUs will continue to run
90 * on all future CPU models. The CPU model matters because the signal
91 * frame needs to have space for the complete machine state, including
92 * all physical stacked registers. The number of physical stacked
93 * registers is CPU model dependent, but given that the width of
94 * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
95 * more than 16KB of space.
96 */
97#if 1
98 /*
99 * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
100 * in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the
101 * incorrect value and fix libc only.
102 */
103# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */
104#else
105# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */
106#endif
107#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */
108 12
109#ifdef __KERNEL__
110 13
111#define _NSIG 64 14#define _NSIG 64
112#define _NSIG_BPW 64 15#define _NSIG_BPW 64
113#define _NSIG_WORDS (_NSIG / _NSIG_BPW) 16#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
114 17
115#endif /* __KERNEL__ */
116
117#include <asm-generic/signal-defs.h>
118
119# ifndef __ASSEMBLY__ 18# ifndef __ASSEMBLY__
120 19
121# include <linux/types.h>
122
123/* Avoid too many header ordering problems. */
124struct siginfo;
125
126typedef struct sigaltstack {
127 void __user *ss_sp;
128 int ss_flags;
129 size_t ss_size;
130} stack_t;
131
132#ifdef __KERNEL__
133
134/* Most things should be clean enough to redefine this at will, if care 20/* Most things should be clean enough to redefine this at will, if care
135 is taken to make libc match. */ 21 is taken to make libc match. */
136 22
@@ -154,7 +40,5 @@ struct k_sigaction {
154 40
155#define ptrace_signal_deliver(regs, cookie) do { } while (0) 41#define ptrace_signal_deliver(regs, cookie) do { } while (0)
156 42
157#endif /* __KERNEL__ */
158
159# endif /* !__ASSEMBLY__ */ 43# endif /* !__ASSEMBLY__ */
160#endif /* _ASM_IA64_SIGNAL_H */ 44#endif /* _ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/asm/termios.h b/arch/ia64/include/asm/termios.h
index 689d218c0c28..a42f870ca4f6 100644
--- a/arch/ia64/include/asm/termios.h
+++ b/arch/ia64/include/asm/termios.h
@@ -1,52 +1,14 @@
1#ifndef _ASM_IA64_TERMIOS_H
2#define _ASM_IA64_TERMIOS_H
3
4/* 1/*
5 * Modified 1999 2 * Modified 1999
6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
7 * 4 *
8 * 99/01/28 Added N_IRDA and N_SMSBLOCK 5 * 99/01/28 Added N_IRDA and N_SMSBLOCK
9 */ 6 */
7#ifndef _ASM_IA64_TERMIOS_H
8#define _ASM_IA64_TERMIOS_H
10 9
11#include <asm/termbits.h> 10#include <uapi/asm/termios.h>
12#include <asm/ioctls.h>
13
14struct winsize {
15 unsigned short ws_row;
16 unsigned short ws_col;
17 unsigned short ws_xpixel;
18 unsigned short ws_ypixel;
19};
20
21#define NCC 8
22struct termio {
23 unsigned short c_iflag; /* input mode flags */
24 unsigned short c_oflag; /* output mode flags */
25 unsigned short c_cflag; /* control mode flags */
26 unsigned short c_lflag; /* local mode flags */
27 unsigned char c_line; /* line discipline */
28 unsigned char c_cc[NCC]; /* control characters */
29};
30
31/* modem lines */
32#define TIOCM_LE 0x001
33#define TIOCM_DTR 0x002
34#define TIOCM_RTS 0x004
35#define TIOCM_ST 0x008
36#define TIOCM_SR 0x010
37#define TIOCM_CTS 0x020
38#define TIOCM_CAR 0x040
39#define TIOCM_RNG 0x080
40#define TIOCM_DSR 0x100
41#define TIOCM_CD TIOCM_CAR
42#define TIOCM_RI TIOCM_RNG
43#define TIOCM_OUT1 0x2000
44#define TIOCM_OUT2 0x4000
45#define TIOCM_LOOP 0x8000
46
47/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
48 11
49# ifdef __KERNEL__
50 12
51/* intr=^C quit=^\ erase=del kill=^U 13/* intr=^C quit=^\ erase=del kill=^U
52 eof=^D vtime=\0 vmin=\1 sxtc=\0 14 eof=^D vtime=\0 vmin=\1 sxtc=\0
@@ -92,6 +54,4 @@ struct termio {
92#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) 54#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
93#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) 55#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
94 56
95# endif /* __KERNEL__ */
96
97#endif /* _ASM_IA64_TERMIOS_H */ 57#endif /* _ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index 3f5b122d9975..4c351b169da2 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -1,6 +1,3 @@
1#ifndef _ASM_IA64_TYPES_H
2#define _ASM_IA64_TYPES_H
3
4/* 1/*
5 * This file is never included by application software unless explicitly 2 * This file is never included by application software unless explicitly
6 * requested (e.g., via linux/types.h) in which case the application is 3 * requested (e.g., via linux/types.h) in which case the application is
@@ -13,32 +10,22 @@
13 * Modified 1998-2000, 2002 10 * Modified 1998-2000, 2002
14 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 11 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
15 */ 12 */
13#ifndef _ASM_IA64_TYPES_H
14#define _ASM_IA64_TYPES_H
16 15
17#ifdef __KERNEL__
18#include <asm-generic/int-ll64.h> 16#include <asm-generic/int-ll64.h>
19#else 17#include <uapi/asm/types.h>
20#include <asm-generic/int-l64.h>
21#endif
22 18
23#ifdef __ASSEMBLY__ 19#ifdef __ASSEMBLY__
24# define __IA64_UL(x) (x)
25# define __IA64_UL_CONST(x) x
26
27#else 20#else
28# define __IA64_UL(x) ((unsigned long)(x))
29# define __IA64_UL_CONST(x) x##UL
30
31/* 21/*
32 * These aren't exported outside the kernel to avoid name space clashes 22 * These aren't exported outside the kernel to avoid name space clashes
33 */ 23 */
34# ifdef __KERNEL__
35 24
36struct fnptr { 25struct fnptr {
37 unsigned long ip; 26 unsigned long ip;
38 unsigned long gp; 27 unsigned long gp;
39}; 28};
40 29
41# endif /* __KERNEL__ */
42#endif /* !__ASSEMBLY__ */ 30#endif /* !__ASSEMBLY__ */
43
44#endif /* _ASM_IA64_TYPES_H */ 31#endif /* _ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 7a3bd2524944..8b3ff2f5b861 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -1,331 +1,14 @@
1#ifndef _ASM_IA64_UNISTD_H
2#define _ASM_IA64_UNISTD_H
3
4/* 1/*
5 * IA-64 Linux syscall numbers and inline-functions. 2 * IA-64 Linux syscall numbers and inline-functions.
6 * 3 *
7 * Copyright (C) 1998-2005 Hewlett-Packard Co 4 * Copyright (C) 1998-2005 Hewlett-Packard Co
8 * David Mosberger-Tang <davidm@hpl.hp.com> 5 * David Mosberger-Tang <davidm@hpl.hp.com>
9 */ 6 */
7#ifndef _ASM_IA64_UNISTD_H
8#define _ASM_IA64_UNISTD_H
10 9
11#include <asm/break.h> 10#include <uapi/asm/unistd.h>
12
13#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL
14
15#define __NR_ni_syscall 1024
16#define __NR_exit 1025
17#define __NR_read 1026
18#define __NR_write 1027
19#define __NR_open 1028
20#define __NR_close 1029
21#define __NR_creat 1030
22#define __NR_link 1031
23#define __NR_unlink 1032
24#define __NR_execve 1033
25#define __NR_chdir 1034
26#define __NR_fchdir 1035
27#define __NR_utimes 1036
28#define __NR_mknod 1037
29#define __NR_chmod 1038
30#define __NR_chown 1039
31#define __NR_lseek 1040
32#define __NR_getpid 1041
33#define __NR_getppid 1042
34#define __NR_mount 1043
35#define __NR_umount 1044
36#define __NR_setuid 1045
37#define __NR_getuid 1046
38#define __NR_geteuid 1047
39#define __NR_ptrace 1048
40#define __NR_access 1049
41#define __NR_sync 1050
42#define __NR_fsync 1051
43#define __NR_fdatasync 1052
44#define __NR_kill 1053
45#define __NR_rename 1054
46#define __NR_mkdir 1055
47#define __NR_rmdir 1056
48#define __NR_dup 1057
49#define __NR_pipe 1058
50#define __NR_times 1059
51#define __NR_brk 1060
52#define __NR_setgid 1061
53#define __NR_getgid 1062
54#define __NR_getegid 1063
55#define __NR_acct 1064
56#define __NR_ioctl 1065
57#define __NR_fcntl 1066
58#define __NR_umask 1067
59#define __NR_chroot 1068
60#define __NR_ustat 1069
61#define __NR_dup2 1070
62#define __NR_setreuid 1071
63#define __NR_setregid 1072
64#define __NR_getresuid 1073
65#define __NR_setresuid 1074
66#define __NR_getresgid 1075
67#define __NR_setresgid 1076
68#define __NR_getgroups 1077
69#define __NR_setgroups 1078
70#define __NR_getpgid 1079
71#define __NR_setpgid 1080
72#define __NR_setsid 1081
73#define __NR_getsid 1082
74#define __NR_sethostname 1083
75#define __NR_setrlimit 1084
76#define __NR_getrlimit 1085
77#define __NR_getrusage 1086
78#define __NR_gettimeofday 1087
79#define __NR_settimeofday 1088
80#define __NR_select 1089
81#define __NR_poll 1090
82#define __NR_symlink 1091
83#define __NR_readlink 1092
84#define __NR_uselib 1093
85#define __NR_swapon 1094
86#define __NR_swapoff 1095
87#define __NR_reboot 1096
88#define __NR_truncate 1097
89#define __NR_ftruncate 1098
90#define __NR_fchmod 1099
91#define __NR_fchown 1100
92#define __NR_getpriority 1101
93#define __NR_setpriority 1102
94#define __NR_statfs 1103
95#define __NR_fstatfs 1104
96#define __NR_gettid 1105
97#define __NR_semget 1106
98#define __NR_semop 1107
99#define __NR_semctl 1108
100#define __NR_msgget 1109
101#define __NR_msgsnd 1110
102#define __NR_msgrcv 1111
103#define __NR_msgctl 1112
104#define __NR_shmget 1113
105#define __NR_shmat 1114
106#define __NR_shmdt 1115
107#define __NR_shmctl 1116
108/* also known as klogctl() in GNU libc: */
109#define __NR_syslog 1117
110#define __NR_setitimer 1118
111#define __NR_getitimer 1119
112/* 1120 was __NR_old_stat */
113/* 1121 was __NR_old_lstat */
114/* 1122 was __NR_old_fstat */
115#define __NR_vhangup 1123
116#define __NR_lchown 1124
117#define __NR_remap_file_pages 1125
118#define __NR_wait4 1126
119#define __NR_sysinfo 1127
120#define __NR_clone 1128
121#define __NR_setdomainname 1129
122#define __NR_uname 1130
123#define __NR_adjtimex 1131
124/* 1132 was __NR_create_module */
125#define __NR_init_module 1133
126#define __NR_delete_module 1134
127/* 1135 was __NR_get_kernel_syms */
128/* 1136 was __NR_query_module */
129#define __NR_quotactl 1137
130#define __NR_bdflush 1138
131#define __NR_sysfs 1139
132#define __NR_personality 1140
133#define __NR_afs_syscall 1141
134#define __NR_setfsuid 1142
135#define __NR_setfsgid 1143
136#define __NR_getdents 1144
137#define __NR_flock 1145
138#define __NR_readv 1146
139#define __NR_writev 1147
140#define __NR_pread64 1148
141#define __NR_pwrite64 1149
142#define __NR__sysctl 1150
143#define __NR_mmap 1151
144#define __NR_munmap 1152
145#define __NR_mlock 1153
146#define __NR_mlockall 1154
147#define __NR_mprotect 1155
148#define __NR_mremap 1156
149#define __NR_msync 1157
150#define __NR_munlock 1158
151#define __NR_munlockall 1159
152#define __NR_sched_getparam 1160
153#define __NR_sched_setparam 1161
154#define __NR_sched_getscheduler 1162
155#define __NR_sched_setscheduler 1163
156#define __NR_sched_yield 1164
157#define __NR_sched_get_priority_max 1165
158#define __NR_sched_get_priority_min 1166
159#define __NR_sched_rr_get_interval 1167
160#define __NR_nanosleep 1168
161#define __NR_nfsservctl 1169
162#define __NR_prctl 1170
163/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
164#define __NR_mmap2 1172
165#define __NR_pciconfig_read 1173
166#define __NR_pciconfig_write 1174
167#define __NR_perfmonctl 1175
168#define __NR_sigaltstack 1176
169#define __NR_rt_sigaction 1177
170#define __NR_rt_sigpending 1178
171#define __NR_rt_sigprocmask 1179
172#define __NR_rt_sigqueueinfo 1180
173#define __NR_rt_sigreturn 1181
174#define __NR_rt_sigsuspend 1182
175#define __NR_rt_sigtimedwait 1183
176#define __NR_getcwd 1184
177#define __NR_capget 1185
178#define __NR_capset 1186
179#define __NR_sendfile 1187
180#define __NR_getpmsg 1188
181#define __NR_putpmsg 1189
182#define __NR_socket 1190
183#define __NR_bind 1191
184#define __NR_connect 1192
185#define __NR_listen 1193
186#define __NR_accept 1194
187#define __NR_getsockname 1195
188#define __NR_getpeername 1196
189#define __NR_socketpair 1197
190#define __NR_send 1198
191#define __NR_sendto 1199
192#define __NR_recv 1200
193#define __NR_recvfrom 1201
194#define __NR_shutdown 1202
195#define __NR_setsockopt 1203
196#define __NR_getsockopt 1204
197#define __NR_sendmsg 1205
198#define __NR_recvmsg 1206
199#define __NR_pivot_root 1207
200#define __NR_mincore 1208
201#define __NR_madvise 1209
202#define __NR_stat 1210
203#define __NR_lstat 1211
204#define __NR_fstat 1212
205#define __NR_clone2 1213
206#define __NR_getdents64 1214
207#define __NR_getunwind 1215
208#define __NR_readahead 1216
209#define __NR_setxattr 1217
210#define __NR_lsetxattr 1218
211#define __NR_fsetxattr 1219
212#define __NR_getxattr 1220
213#define __NR_lgetxattr 1221
214#define __NR_fgetxattr 1222
215#define __NR_listxattr 1223
216#define __NR_llistxattr 1224
217#define __NR_flistxattr 1225
218#define __NR_removexattr 1226
219#define __NR_lremovexattr 1227
220#define __NR_fremovexattr 1228
221#define __NR_tkill 1229
222#define __NR_futex 1230
223#define __NR_sched_setaffinity 1231
224#define __NR_sched_getaffinity 1232
225#define __NR_set_tid_address 1233
226#define __NR_fadvise64 1234
227#define __NR_tgkill 1235
228#define __NR_exit_group 1236
229#define __NR_lookup_dcookie 1237
230#define __NR_io_setup 1238
231#define __NR_io_destroy 1239
232#define __NR_io_getevents 1240
233#define __NR_io_submit 1241
234#define __NR_io_cancel 1242
235#define __NR_epoll_create 1243
236#define __NR_epoll_ctl 1244
237#define __NR_epoll_wait 1245
238#define __NR_restart_syscall 1246
239#define __NR_semtimedop 1247
240#define __NR_timer_create 1248
241#define __NR_timer_settime 1249
242#define __NR_timer_gettime 1250
243#define __NR_timer_getoverrun 1251
244#define __NR_timer_delete 1252
245#define __NR_clock_settime 1253
246#define __NR_clock_gettime 1254
247#define __NR_clock_getres 1255
248#define __NR_clock_nanosleep 1256
249#define __NR_fstatfs64 1257
250#define __NR_statfs64 1258
251#define __NR_mbind 1259
252#define __NR_get_mempolicy 1260
253#define __NR_set_mempolicy 1261
254#define __NR_mq_open 1262
255#define __NR_mq_unlink 1263
256#define __NR_mq_timedsend 1264
257#define __NR_mq_timedreceive 1265
258#define __NR_mq_notify 1266
259#define __NR_mq_getsetattr 1267
260#define __NR_kexec_load 1268
261#define __NR_vserver 1269
262#define __NR_waitid 1270
263#define __NR_add_key 1271
264#define __NR_request_key 1272
265#define __NR_keyctl 1273
266#define __NR_ioprio_set 1274
267#define __NR_ioprio_get 1275
268#define __NR_move_pages 1276
269#define __NR_inotify_init 1277
270#define __NR_inotify_add_watch 1278
271#define __NR_inotify_rm_watch 1279
272#define __NR_migrate_pages 1280
273#define __NR_openat 1281
274#define __NR_mkdirat 1282
275#define __NR_mknodat 1283
276#define __NR_fchownat 1284
277#define __NR_futimesat 1285
278#define __NR_newfstatat 1286
279#define __NR_unlinkat 1287
280#define __NR_renameat 1288
281#define __NR_linkat 1289
282#define __NR_symlinkat 1290
283#define __NR_readlinkat 1291
284#define __NR_fchmodat 1292
285#define __NR_faccessat 1293
286#define __NR_pselect6 1294
287#define __NR_ppoll 1295
288#define __NR_unshare 1296
289#define __NR_splice 1297
290#define __NR_set_robust_list 1298
291#define __NR_get_robust_list 1299
292#define __NR_sync_file_range 1300
293#define __NR_tee 1301
294#define __NR_vmsplice 1302
295#define __NR_fallocate 1303
296#define __NR_getcpu 1304
297#define __NR_epoll_pwait 1305
298#define __NR_utimensat 1306
299#define __NR_signalfd 1307
300#define __NR_timerfd 1308
301#define __NR_eventfd 1309
302#define __NR_timerfd_create 1310
303#define __NR_timerfd_settime 1311
304#define __NR_timerfd_gettime 1312
305#define __NR_signalfd4 1313
306#define __NR_eventfd2 1314
307#define __NR_epoll_create1 1315
308#define __NR_dup3 1316
309#define __NR_pipe2 1317
310#define __NR_inotify_init1 1318
311#define __NR_preadv 1319
312#define __NR_pwritev 1320
313#define __NR_rt_tgsigqueueinfo 1321
314#define __NR_recvmmsg 1322
315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
322#define __NR_setns 1330
323#define __NR_sendmmsg 1331
324#define __NR_process_vm_readv 1332
325#define __NR_process_vm_writev 1333
326#define __NR_accept4 1334
327 11
328#ifdef __KERNEL__
329 12
330 13
331#define NR_syscalls 311 /* length of syscall table */ 14#define NR_syscalls 311 /* length of syscall table */
@@ -382,5 +65,4 @@ asmlinkage long sys_rt_sigaction(int sig,
382#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall"))) 65#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
383 66
384#endif /* !__ASSEMBLY__ */ 67#endif /* !__ASSEMBLY__ */
385#endif /* __KERNEL__ */
386#endif /* _ASM_IA64_UNISTD_H */ 68#endif /* _ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/asm/ustack.h b/arch/ia64/include/asm/ustack.h
index 504167c35b8b..b275401b96d3 100644
--- a/arch/ia64/include/asm/ustack.h
+++ b/arch/ia64/include/asm/ustack.h
@@ -1,20 +1,11 @@
1#ifndef _ASM_IA64_USTACK_H 1#ifndef _ASM_IA64_USTACK_H
2#define _ASM_IA64_USTACK_H 2#define _ASM_IA64_USTACK_H
3 3
4/*
5 * Constants for the user stack size
6 */
7
8#ifdef __KERNEL__
9#include <asm/page.h> 4#include <asm/page.h>
5#include <uapi/asm/ustack.h>
10 6
11/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */ 7/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */
12#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2) 8#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2)
13#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT) 9#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT)
14#define STACK_TOP_MAX STACK_TOP 10#define STACK_TOP_MAX STACK_TOP
15#endif
16
17/* Make a default stack size of 2GiB */
18#define DEFAULT_USER_STACK_SIZE (1UL << 31)
19
20#endif /* _ASM_IA64_USTACK_H */ 11#endif /* _ASM_IA64_USTACK_H */
diff --git a/arch/ia64/include/uapi/asm/Kbuild b/arch/ia64/include/uapi/asm/Kbuild
index baebb3da1d44..30cafac93703 100644
--- a/arch/ia64/include/uapi/asm/Kbuild
+++ b/arch/ia64/include/uapi/asm/Kbuild
@@ -1,3 +1,48 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += auxvec.h
5header-y += bitsperlong.h
6header-y += break.h
7header-y += byteorder.h
8header-y += cmpxchg.h
9header-y += errno.h
10header-y += fcntl.h
11header-y += fpu.h
12header-y += gcc_intrin.h
13header-y += ia64regs.h
14header-y += intel_intrin.h
15header-y += intrinsics.h
16header-y += ioctl.h
17header-y += ioctls.h
18header-y += ipcbuf.h
19header-y += kvm.h
20header-y += kvm_para.h
21header-y += mman.h
22header-y += msgbuf.h
23header-y += param.h
24header-y += perfmon.h
25header-y += perfmon_default_smpl.h
26header-y += poll.h
27header-y += posix_types.h
28header-y += ptrace.h
29header-y += ptrace_offsets.h
30header-y += resource.h
31header-y += rse.h
32header-y += sembuf.h
33header-y += setup.h
34header-y += shmbuf.h
35header-y += sigcontext.h
36header-y += siginfo.h
37header-y += signal.h
38header-y += socket.h
39header-y += sockios.h
40header-y += stat.h
41header-y += statfs.h
42header-y += swab.h
43header-y += termbits.h
44header-y += termios.h
45header-y += types.h
46header-y += ucontext.h
47header-y += unistd.h
48header-y += ustack.h
diff --git a/arch/ia64/include/asm/auxvec.h b/arch/ia64/include/uapi/asm/auxvec.h
index 58277fc650ef..58277fc650ef 100644
--- a/arch/ia64/include/asm/auxvec.h
+++ b/arch/ia64/include/uapi/asm/auxvec.h
diff --git a/arch/ia64/include/asm/bitsperlong.h b/arch/ia64/include/uapi/asm/bitsperlong.h
index ec4db3c970b7..ec4db3c970b7 100644
--- a/arch/ia64/include/asm/bitsperlong.h
+++ b/arch/ia64/include/uapi/asm/bitsperlong.h
diff --git a/arch/ia64/include/asm/break.h b/arch/ia64/include/uapi/asm/break.h
index e90c40ec9edf..e90c40ec9edf 100644
--- a/arch/ia64/include/asm/break.h
+++ b/arch/ia64/include/uapi/asm/break.h
diff --git a/arch/ia64/include/asm/byteorder.h b/arch/ia64/include/uapi/asm/byteorder.h
index a8dd73558150..a8dd73558150 100644
--- a/arch/ia64/include/asm/byteorder.h
+++ b/arch/ia64/include/uapi/asm/byteorder.h
diff --git a/arch/ia64/include/asm/cmpxchg.h b/arch/ia64/include/uapi/asm/cmpxchg.h
index 4f37dbbb8640..4f37dbbb8640 100644
--- a/arch/ia64/include/asm/cmpxchg.h
+++ b/arch/ia64/include/uapi/asm/cmpxchg.h
diff --git a/arch/ia64/include/asm/errno.h b/arch/ia64/include/uapi/asm/errno.h
index 4c82b503d92f..4c82b503d92f 100644
--- a/arch/ia64/include/asm/errno.h
+++ b/arch/ia64/include/uapi/asm/errno.h
diff --git a/arch/ia64/include/asm/fcntl.h b/arch/ia64/include/uapi/asm/fcntl.h
index 1dd275dc8f65..1dd275dc8f65 100644
--- a/arch/ia64/include/asm/fcntl.h
+++ b/arch/ia64/include/uapi/asm/fcntl.h
diff --git a/arch/ia64/include/asm/fpu.h b/arch/ia64/include/uapi/asm/fpu.h
index b6395ad1500a..b6395ad1500a 100644
--- a/arch/ia64/include/asm/fpu.h
+++ b/arch/ia64/include/uapi/asm/fpu.h
diff --git a/arch/ia64/include/uapi/asm/gcc_intrin.h b/arch/ia64/include/uapi/asm/gcc_intrin.h
new file mode 100644
index 000000000000..61d0d0111978
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/gcc_intrin.h
@@ -0,0 +1,618 @@
1/*
2 *
3 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
4 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6#ifndef _UAPI_ASM_IA64_GCC_INTRIN_H
7#define _UAPI_ASM_IA64_GCC_INTRIN_H
8
9#include <linux/types.h>
10#include <linux/compiler.h>
11
12/* define this macro to get some asm stmts included in 'c' files */
13#define ASM_SUPPORTED
14
15/* Optimization barrier */
16/* The "volatile" is due to gcc bugs */
17#define ia64_barrier() asm volatile ("":::"memory")
18
19#define ia64_stop() asm volatile (";;"::)
20
21#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
22
23#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
24
25#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
26
27#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
28
29extern void ia64_bad_param_for_setreg (void);
30extern void ia64_bad_param_for_getreg (void);
31
32
33#define ia64_native_setreg(regnum, val) \
34({ \
35 switch (regnum) { \
36 case _IA64_REG_PSR_L: \
37 asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
38 break; \
39 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
40 asm volatile ("mov ar%0=%1" :: \
41 "i" (regnum - _IA64_REG_AR_KR0), \
42 "r"(val): "memory"); \
43 break; \
44 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
45 asm volatile ("mov cr%0=%1" :: \
46 "i" (regnum - _IA64_REG_CR_DCR), \
47 "r"(val): "memory" ); \
48 break; \
49 case _IA64_REG_SP: \
50 asm volatile ("mov r12=%0" :: \
51 "r"(val): "memory"); \
52 break; \
53 case _IA64_REG_GP: \
54 asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
55 break; \
56 default: \
57 ia64_bad_param_for_setreg(); \
58 break; \
59 } \
60})
61
62#define ia64_native_getreg(regnum) \
63({ \
64 __u64 ia64_intri_res; \
65 \
66 switch (regnum) { \
67 case _IA64_REG_GP: \
68 asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
69 break; \
70 case _IA64_REG_IP: \
71 asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
72 break; \
73 case _IA64_REG_PSR: \
74 asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
75 break; \
76 case _IA64_REG_TP: /* for current() */ \
77 ia64_intri_res = ia64_r13; \
78 break; \
79 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
80 asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
81 : "i"(regnum - _IA64_REG_AR_KR0)); \
82 break; \
83 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
84 asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
85 : "i" (regnum - _IA64_REG_CR_DCR)); \
86 break; \
87 case _IA64_REG_SP: \
88 asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
89 break; \
90 default: \
91 ia64_bad_param_for_getreg(); \
92 break; \
93 } \
94 ia64_intri_res; \
95})
96
97#define ia64_hint_pause 0
98
99#define ia64_hint(mode) \
100({ \
101 switch (mode) { \
102 case ia64_hint_pause: \
103 asm volatile ("hint @pause" ::: "memory"); \
104 break; \
105 } \
106})
107
108
109/* Integer values for mux1 instruction */
110#define ia64_mux1_brcst 0
111#define ia64_mux1_mix 8
112#define ia64_mux1_shuf 9
113#define ia64_mux1_alt 10
114#define ia64_mux1_rev 11
115
116#define ia64_mux1(x, mode) \
117({ \
118 __u64 ia64_intri_res; \
119 \
120 switch (mode) { \
121 case ia64_mux1_brcst: \
122 asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
123 break; \
124 case ia64_mux1_mix: \
125 asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
126 break; \
127 case ia64_mux1_shuf: \
128 asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
129 break; \
130 case ia64_mux1_alt: \
131 asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
132 break; \
133 case ia64_mux1_rev: \
134 asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
135 break; \
136 } \
137 ia64_intri_res; \
138})
139
140#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
141# define ia64_popcnt(x) __builtin_popcountl(x)
142#else
143# define ia64_popcnt(x) \
144 ({ \
145 __u64 ia64_intri_res; \
146 asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
147 \
148 ia64_intri_res; \
149 })
150#endif
151
152#define ia64_getf_exp(x) \
153({ \
154 long ia64_intri_res; \
155 \
156 asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
157 \
158 ia64_intri_res; \
159})
160
161#define ia64_shrp(a, b, count) \
162({ \
163 __u64 ia64_intri_res; \
164 asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
165 ia64_intri_res; \
166})
167
168#define ia64_ldfs(regnum, x) \
169({ \
170 register double __f__ asm ("f"#regnum); \
171 asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
172})
173
174#define ia64_ldfd(regnum, x) \
175({ \
176 register double __f__ asm ("f"#regnum); \
177 asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
178})
179
180#define ia64_ldfe(regnum, x) \
181({ \
182 register double __f__ asm ("f"#regnum); \
183 asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
184})
185
186#define ia64_ldf8(regnum, x) \
187({ \
188 register double __f__ asm ("f"#regnum); \
189 asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
190})
191
192#define ia64_ldf_fill(regnum, x) \
193({ \
194 register double __f__ asm ("f"#regnum); \
195 asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
196})
197
198#define ia64_st4_rel_nta(m, val) \
199({ \
200 asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
201})
202
203#define ia64_stfs(x, regnum) \
204({ \
205 register double __f__ asm ("f"#regnum); \
206 asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
207})
208
209#define ia64_stfd(x, regnum) \
210({ \
211 register double __f__ asm ("f"#regnum); \
212 asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
213})
214
215#define ia64_stfe(x, regnum) \
216({ \
217 register double __f__ asm ("f"#regnum); \
218 asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
219})
220
221#define ia64_stf8(x, regnum) \
222({ \
223 register double __f__ asm ("f"#regnum); \
224 asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
225})
226
227#define ia64_stf_spill(x, regnum) \
228({ \
229 register double __f__ asm ("f"#regnum); \
230 asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
231})
232
233#define ia64_fetchadd4_acq(p, inc) \
234({ \
235 \
236 __u64 ia64_intri_res; \
237 asm volatile ("fetchadd4.acq %0=[%1],%2" \
238 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
239 : "memory"); \
240 \
241 ia64_intri_res; \
242})
243
244#define ia64_fetchadd4_rel(p, inc) \
245({ \
246 __u64 ia64_intri_res; \
247 asm volatile ("fetchadd4.rel %0=[%1],%2" \
248 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
249 : "memory"); \
250 \
251 ia64_intri_res; \
252})
253
254#define ia64_fetchadd8_acq(p, inc) \
255({ \
256 \
257 __u64 ia64_intri_res; \
258 asm volatile ("fetchadd8.acq %0=[%1],%2" \
259 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
260 : "memory"); \
261 \
262 ia64_intri_res; \
263})
264
265#define ia64_fetchadd8_rel(p, inc) \
266({ \
267 __u64 ia64_intri_res; \
268 asm volatile ("fetchadd8.rel %0=[%1],%2" \
269 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
270 : "memory"); \
271 \
272 ia64_intri_res; \
273})
274
275#define ia64_xchg1(ptr,x) \
276({ \
277 __u64 ia64_intri_res; \
278 asm volatile ("xchg1 %0=[%1],%2" \
279 : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
280 ia64_intri_res; \
281})
282
283#define ia64_xchg2(ptr,x) \
284({ \
285 __u64 ia64_intri_res; \
286 asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
287 : "r" (ptr), "r" (x) : "memory"); \
288 ia64_intri_res; \
289})
290
291#define ia64_xchg4(ptr,x) \
292({ \
293 __u64 ia64_intri_res; \
294 asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
295 : "r" (ptr), "r" (x) : "memory"); \
296 ia64_intri_res; \
297})
298
299#define ia64_xchg8(ptr,x) \
300({ \
301 __u64 ia64_intri_res; \
302 asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
303 : "r" (ptr), "r" (x) : "memory"); \
304 ia64_intri_res; \
305})
306
307#define ia64_cmpxchg1_acq(ptr, new, old) \
308({ \
309 __u64 ia64_intri_res; \
310 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
311 asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
312 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
313 ia64_intri_res; \
314})
315
316#define ia64_cmpxchg1_rel(ptr, new, old) \
317({ \
318 __u64 ia64_intri_res; \
319 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
320 asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
321 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
322 ia64_intri_res; \
323})
324
325#define ia64_cmpxchg2_acq(ptr, new, old) \
326({ \
327 __u64 ia64_intri_res; \
328 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
329 asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
330 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
331 ia64_intri_res; \
332})
333
334#define ia64_cmpxchg2_rel(ptr, new, old) \
335({ \
336 __u64 ia64_intri_res; \
337 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
338 \
339 asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
340 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
341 ia64_intri_res; \
342})
343
344#define ia64_cmpxchg4_acq(ptr, new, old) \
345({ \
346 __u64 ia64_intri_res; \
347 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
348 asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
349 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
350 ia64_intri_res; \
351})
352
353#define ia64_cmpxchg4_rel(ptr, new, old) \
354({ \
355 __u64 ia64_intri_res; \
356 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
357 asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
358 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
359 ia64_intri_res; \
360})
361
362#define ia64_cmpxchg8_acq(ptr, new, old) \
363({ \
364 __u64 ia64_intri_res; \
365 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
366 asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
367 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
368 ia64_intri_res; \
369})
370
371#define ia64_cmpxchg8_rel(ptr, new, old) \
372({ \
373 __u64 ia64_intri_res; \
374 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
375 \
376 asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
377 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
378 ia64_intri_res; \
379})
380
381#define ia64_mf() asm volatile ("mf" ::: "memory")
382#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
383
384#define ia64_invala() asm volatile ("invala" ::: "memory")
385
386#define ia64_native_thash(addr) \
387({ \
388 unsigned long ia64_intri_res; \
389 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
390 ia64_intri_res; \
391})
392
393#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
394#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
395
396#ifdef HAVE_SERIALIZE_DIRECTIVE
397# define ia64_dv_serialize_data() asm volatile (".serialize.data");
398# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction");
399#else
400# define ia64_dv_serialize_data()
401# define ia64_dv_serialize_instruction()
402#endif
403
404#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
405
406#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
407
408#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
409
410
411#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
412 :: "r"(trnum), "r"(addr) : "memory")
413
414#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
415 :: "r"(trnum), "r"(addr) : "memory")
416
417#define ia64_tpa(addr) \
418({ \
419 unsigned long ia64_pa; \
420 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
421 ia64_pa; \
422})
423
424#define __ia64_set_dbr(index, val) \
425 asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
426
427#define ia64_set_ibr(index, val) \
428 asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
429
430#define ia64_set_pkr(index, val) \
431 asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
432
433#define ia64_set_pmc(index, val) \
434 asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
435
436#define ia64_set_pmd(index, val) \
437 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
438
439#define ia64_native_set_rr(index, val) \
440 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
441
442#define ia64_native_get_cpuid(index) \
443({ \
444 unsigned long ia64_intri_res; \
445 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
446 ia64_intri_res; \
447})
448
449#define __ia64_get_dbr(index) \
450({ \
451 unsigned long ia64_intri_res; \
452 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
453 ia64_intri_res; \
454})
455
456#define ia64_get_ibr(index) \
457({ \
458 unsigned long ia64_intri_res; \
459 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
460 ia64_intri_res; \
461})
462
463#define ia64_get_pkr(index) \
464({ \
465 unsigned long ia64_intri_res; \
466 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
467 ia64_intri_res; \
468})
469
470#define ia64_get_pmc(index) \
471({ \
472 unsigned long ia64_intri_res; \
473 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
474 ia64_intri_res; \
475})
476
477
478#define ia64_native_get_pmd(index) \
479({ \
480 unsigned long ia64_intri_res; \
481 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
482 ia64_intri_res; \
483})
484
485#define ia64_native_get_rr(index) \
486({ \
487 unsigned long ia64_intri_res; \
488 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
489 ia64_intri_res; \
490})
491
492#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
493
494
495#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
496
497#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
498#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
499#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
500#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
501
502#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
503
504#define ia64_native_ptcga(addr, size) \
505do { \
506 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
507 ia64_dv_serialize_data(); \
508} while (0)
509
510#define ia64_ptcl(addr, size) \
511do { \
512 asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
513 ia64_dv_serialize_data(); \
514} while (0)
515
516#define ia64_ptri(addr, size) \
517 asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
518
519#define ia64_ptrd(addr, size) \
520 asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
521
522#define ia64_ttag(addr) \
523({ \
524 __u64 ia64_intri_res; \
525 asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
526 ia64_intri_res; \
527})
528
529
530/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
531
532#define ia64_lfhint_none 0
533#define ia64_lfhint_nt1 1
534#define ia64_lfhint_nt2 2
535#define ia64_lfhint_nta 3
536
537#define ia64_lfetch(lfhint, y) \
538({ \
539 switch (lfhint) { \
540 case ia64_lfhint_none: \
541 asm volatile ("lfetch [%0]" : : "r"(y)); \
542 break; \
543 case ia64_lfhint_nt1: \
544 asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
545 break; \
546 case ia64_lfhint_nt2: \
547 asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
548 break; \
549 case ia64_lfhint_nta: \
550 asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
551 break; \
552 } \
553})
554
555#define ia64_lfetch_excl(lfhint, y) \
556({ \
557 switch (lfhint) { \
558 case ia64_lfhint_none: \
559 asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
560 break; \
561 case ia64_lfhint_nt1: \
562 asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
563 break; \
564 case ia64_lfhint_nt2: \
565 asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
566 break; \
567 case ia64_lfhint_nta: \
568 asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
569 break; \
570 } \
571})
572
573#define ia64_lfetch_fault(lfhint, y) \
574({ \
575 switch (lfhint) { \
576 case ia64_lfhint_none: \
577 asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
578 break; \
579 case ia64_lfhint_nt1: \
580 asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
581 break; \
582 case ia64_lfhint_nt2: \
583 asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
584 break; \
585 case ia64_lfhint_nta: \
586 asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
587 break; \
588 } \
589})
590
591#define ia64_lfetch_fault_excl(lfhint, y) \
592({ \
593 switch (lfhint) { \
594 case ia64_lfhint_none: \
595 asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
596 break; \
597 case ia64_lfhint_nt1: \
598 asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
599 break; \
600 case ia64_lfhint_nt2: \
601 asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
602 break; \
603 case ia64_lfhint_nta: \
604 asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
605 break; \
606 } \
607})
608
609#define ia64_native_intrin_local_irq_restore(x) \
610do { \
611 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
612 "(p6) ssm psr.i;" \
613 "(p7) rsm psr.i;;" \
614 "(p6) srlz.d" \
615 :: "r"((x)) : "p6", "p7", "memory"); \
616} while (0)
617
618#endif /* _UAPI_ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/asm/ia64regs.h b/arch/ia64/include/uapi/asm/ia64regs.h
index 1757f1c11ad4..1757f1c11ad4 100644
--- a/arch/ia64/include/asm/ia64regs.h
+++ b/arch/ia64/include/uapi/asm/ia64regs.h
diff --git a/arch/ia64/include/asm/intel_intrin.h b/arch/ia64/include/uapi/asm/intel_intrin.h
index 53cec577558a..53cec577558a 100644
--- a/arch/ia64/include/asm/intel_intrin.h
+++ b/arch/ia64/include/uapi/asm/intel_intrin.h
diff --git a/arch/ia64/include/uapi/asm/intrinsics.h b/arch/ia64/include/uapi/asm/intrinsics.h
new file mode 100644
index 000000000000..5829978ff466
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/intrinsics.h
@@ -0,0 +1,124 @@
1/*
2 * Compiler-dependent intrinsics.
3 *
4 * Copyright (C) 2002-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */
7#ifndef _UAPI_ASM_IA64_INTRINSICS_H
8#define _UAPI_ASM_IA64_INTRINSICS_H
9
10
11#ifndef __ASSEMBLY__
12
13#include <linux/types.h>
14/* include compiler specific intrinsics */
15#include <asm/ia64regs.h>
16#ifdef __INTEL_COMPILER
17# include <asm/intel_intrin.h>
18#else
19# include <asm/gcc_intrin.h>
20#endif
21#include <asm/cmpxchg.h>
22
23#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
24
25#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
26do { \
27 ia64_native_set_rr(0x0000000000000000UL, (val0)); \
28 ia64_native_set_rr(0x2000000000000000UL, (val1)); \
29 ia64_native_set_rr(0x4000000000000000UL, (val2)); \
30 ia64_native_set_rr(0x6000000000000000UL, (val3)); \
31 ia64_native_set_rr(0x8000000000000000UL, (val4)); \
32} while (0)
33
34/*
35 * Force an unresolved reference if someone tries to use
36 * ia64_fetch_and_add() with a bad value.
37 */
38extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
39extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
40
41#define IA64_FETCHADD(tmp,v,n,sz,sem) \
42({ \
43 switch (sz) { \
44 case 4: \
45 tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
46 break; \
47 \
48 case 8: \
49 tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
50 break; \
51 \
52 default: \
53 __bad_size_for_ia64_fetch_and_add(); \
54 } \
55})
56
57#define ia64_fetchadd(i,v,sem) \
58({ \
59 __u64 _tmp; \
60 volatile __typeof__(*(v)) *_v = (v); \
61 /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
62 if ((i) == -16) \
63 IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
64 else if ((i) == -8) \
65 IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
66 else if ((i) == -4) \
67 IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
68 else if ((i) == -1) \
69 IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
70 else if ((i) == 1) \
71 IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
72 else if ((i) == 4) \
73 IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
74 else if ((i) == 8) \
75 IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
76 else if ((i) == 16) \
77 IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
78 else \
79 _tmp = __bad_increment_for_ia64_fetch_and_add(); \
80 (__typeof__(*(v))) (_tmp); /* return old value */ \
81})
82
83#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
84
85#endif
86
87
88#ifndef __ASSEMBLY__
89
90#define IA64_INTRINSIC_API(name) ia64_native_ ## name
91#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
92
93
94/************************************************/
95/* Instructions paravirtualized for correctness */
96/************************************************/
97/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
98/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
99 * is not currently used (though it may be in a long-format VHPT system!)
100 */
101#define ia64_fc IA64_INTRINSIC_API(fc)
102#define ia64_thash IA64_INTRINSIC_API(thash)
103#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
104#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
105
106
107/************************************************/
108/* Instructions paravirtualized for performance */
109/************************************************/
110#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
111#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
112#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
113#define ia64_setreg IA64_INTRINSIC_API(setreg)
114#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
115#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
116#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
117#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
118#define ia64_intrin_local_irq_restore \
119 IA64_INTRINSIC_API(intrin_local_irq_restore)
120#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
121
122#endif /* !__ASSEMBLY__ */
123
124#endif /* _UAPI_ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/asm/ioctl.h b/arch/ia64/include/uapi/asm/ioctl.h
index b279fe06dfe5..b279fe06dfe5 100644
--- a/arch/ia64/include/asm/ioctl.h
+++ b/arch/ia64/include/uapi/asm/ioctl.h
diff --git a/arch/ia64/include/asm/ioctls.h b/arch/ia64/include/uapi/asm/ioctls.h
index f3aab5512e98..f3aab5512e98 100644
--- a/arch/ia64/include/asm/ioctls.h
+++ b/arch/ia64/include/uapi/asm/ioctls.h
diff --git a/arch/ia64/include/asm/ipcbuf.h b/arch/ia64/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d0..84c7e51cb6d0 100644
--- a/arch/ia64/include/asm/ipcbuf.h
+++ b/arch/ia64/include/uapi/asm/ipcbuf.h
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/uapi/asm/kvm.h
index ec6c6b301238..ec6c6b301238 100644
--- a/arch/ia64/include/asm/kvm.h
+++ b/arch/ia64/include/uapi/asm/kvm.h
diff --git a/arch/ia64/include/uapi/asm/kvm_para.h b/arch/ia64/include/uapi/asm/kvm_para.h
new file mode 100644
index 000000000000..e69de29bb2d1
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/kvm_para.h
diff --git a/arch/ia64/include/uapi/asm/mman.h b/arch/ia64/include/uapi/asm/mman.h
new file mode 100644
index 000000000000..8740819adc54
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/mman.h
@@ -0,0 +1,16 @@
1/*
2 * Based on <asm-i386/mman.h>.
3 *
4 * Modified 1998-2000, 2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */
7#ifndef _UAPI_ASM_IA64_MMAN_H
8#define _UAPI_ASM_IA64_MMAN_H
9
10
11#include <asm-generic/mman.h>
12
13#define MAP_GROWSUP 0x0200 /* register stack-like segment */
14
15
16#endif /* _UAPI_ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/asm/msgbuf.h b/arch/ia64/include/uapi/asm/msgbuf.h
index 6c64c0d2aae1..6c64c0d2aae1 100644
--- a/arch/ia64/include/asm/msgbuf.h
+++ b/arch/ia64/include/uapi/asm/msgbuf.h
diff --git a/arch/ia64/include/uapi/asm/param.h b/arch/ia64/include/uapi/asm/param.h
new file mode 100644
index 000000000000..d7da41d9497d
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/param.h
@@ -0,0 +1,29 @@
1/*
2 * Fundamental kernel parameters.
3 *
4 * Based on <asm-i386/param.h>.
5 *
6 * Modified 1998, 1999, 2002-2003
7 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
8 */
9#ifndef _UAPI_ASM_IA64_PARAM_H
10#define _UAPI_ASM_IA64_PARAM_H
11
12
13#define EXEC_PAGESIZE 65536
14
15#ifndef NOGROUP
16# define NOGROUP (-1)
17#endif
18
19#define MAXHOSTNAMELEN 64 /* max length of hostname */
20
21#ifndef __KERNEL__
22 /*
23 * Technically, this is wrong, but some old apps still refer to it. The proper way to
24 * get the HZ value is via sysconf(_SC_CLK_TCK).
25 */
26# define HZ 1024
27#endif
28
29#endif /* _UAPI_ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/uapi/asm/perfmon.h b/arch/ia64/include/uapi/asm/perfmon.h
new file mode 100644
index 000000000000..1a10a2dd58a1
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/perfmon.h
@@ -0,0 +1,177 @@
1/*
2 * Copyright (C) 2001-2003 Hewlett-Packard Co
3 * Stephane Eranian <eranian@hpl.hp.com>
4 */
5
6#ifndef _UAPI_ASM_IA64_PERFMON_H
7#define _UAPI_ASM_IA64_PERFMON_H
8
9/*
10 * perfmon commands supported on all CPU models
11 */
12#define PFM_WRITE_PMCS 0x01
13#define PFM_WRITE_PMDS 0x02
14#define PFM_READ_PMDS 0x03
15#define PFM_STOP 0x04
16#define PFM_START 0x05
17#define PFM_ENABLE 0x06 /* obsolete */
18#define PFM_DISABLE 0x07 /* obsolete */
19#define PFM_CREATE_CONTEXT 0x08
20#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */
21#define PFM_RESTART 0x0a
22#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */
23#define PFM_GET_FEATURES 0x0c
24#define PFM_DEBUG 0x0d
25#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */
26#define PFM_GET_PMC_RESET_VAL 0x0f
27#define PFM_LOAD_CONTEXT 0x10
28#define PFM_UNLOAD_CONTEXT 0x11
29
30/*
31 * PMU model specific commands (may not be supported on all PMU models)
32 */
33#define PFM_WRITE_IBRS 0x20
34#define PFM_WRITE_DBRS 0x21
35
36/*
37 * context flags
38 */
39#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */
40#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */
41#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */
42
43/*
44 * event set flags
45 */
46#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */
47
48/*
49 * PMC flags
50 */
51#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */
52#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
53
54/*
55 * PMD/PMC/IBR/DBR return flags (ignored on input)
56 *
57 * Those flags are used on output and must be checked in case EAGAIN is returned
58 * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
59 */
60#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
61#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */
62#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
63
64#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0)
65
66typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */
67
68/*
69 * Request structure used to define a context
70 */
71typedef struct {
72 pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */
73 unsigned long ctx_flags; /* noblock/block */
74 unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */
75 unsigned short ctx_reserved1; /* for future use */
76 int ctx_fd; /* return arg: unique identification for context */
77 void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */
78 unsigned long ctx_reserved2[11];/* for future use */
79} pfarg_context_t;
80
81/*
82 * Request structure used to write/read a PMC or PMD
83 */
84typedef struct {
85 unsigned int reg_num; /* which register */
86 unsigned short reg_set; /* event set for this register */
87 unsigned short reg_reserved1; /* for future use */
88
89 unsigned long reg_value; /* initial pmc/pmd value */
90 unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */
91
92 unsigned long reg_long_reset; /* reset after buffer overflow notification */
93 unsigned long reg_short_reset; /* reset after counter overflow */
94
95 unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */
96 unsigned long reg_random_seed; /* seed value when randomization is used */
97 unsigned long reg_random_mask; /* bitmask used to limit random value */
98 unsigned long reg_last_reset_val;/* return: PMD last reset value */
99
100 unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */
101 unsigned long reg_smpl_eventid; /* opaque sampling event identifier */
102
103 unsigned long reg_reserved2[3]; /* for future use */
104} pfarg_reg_t;
105
106typedef struct {
107 unsigned int dbreg_num; /* which debug register */
108 unsigned short dbreg_set; /* event set for this register */
109 unsigned short dbreg_reserved1; /* for future use */
110 unsigned long dbreg_value; /* value for debug register */
111 unsigned long dbreg_flags; /* return: dbreg error */
112 unsigned long dbreg_reserved2[1]; /* for future use */
113} pfarg_dbreg_t;
114
115typedef struct {
116 unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */
117 unsigned int ft_reserved; /* reserved for future use */
118 unsigned long reserved[4]; /* for future use */
119} pfarg_features_t;
120
121typedef struct {
122 pid_t load_pid; /* process to load the context into */
123 unsigned short load_set; /* first event set to load */
124 unsigned short load_reserved1; /* for future use */
125 unsigned long load_reserved2[3]; /* for future use */
126} pfarg_load_t;
127
128typedef struct {
129 int msg_type; /* generic message header */
130 int msg_ctx_fd; /* generic message header */
131 unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */
132 unsigned short msg_active_set; /* active set at the time of overflow */
133 unsigned short msg_reserved1; /* for future use */
134 unsigned int msg_reserved2; /* for future use */
135 unsigned long msg_tstamp; /* for perf tuning/debug */
136} pfm_ovfl_msg_t;
137
138typedef struct {
139 int msg_type; /* generic message header */
140 int msg_ctx_fd; /* generic message header */
141 unsigned long msg_tstamp; /* for perf tuning */
142} pfm_end_msg_t;
143
144typedef struct {
145 int msg_type; /* type of the message */
146 int msg_ctx_fd; /* unique identifier for the context */
147 unsigned long msg_tstamp; /* for perf tuning */
148} pfm_gen_msg_t;
149
150#define PFM_MSG_OVFL 1 /* an overflow happened */
151#define PFM_MSG_END 2 /* task to which context was attached ended */
152
153typedef union {
154 pfm_ovfl_msg_t pfm_ovfl_msg;
155 pfm_end_msg_t pfm_end_msg;
156 pfm_gen_msg_t pfm_gen_msg;
157} pfm_msg_t;
158
159/*
160 * Define the version numbers for both perfmon as a whole and the sampling buffer format.
161 */
162#define PFM_VERSION_MAJ 2U
163#define PFM_VERSION_MIN 0U
164#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
165#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff)
166#define PFM_VERSION_MINOR(x) ((x) & 0xffff)
167
168
169/*
170 * miscellaneous architected definitions
171 */
172#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */
173#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
174#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
175
176
177#endif /* _UAPI_ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
index a2d560c67230..a2d560c67230 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
diff --git a/arch/ia64/include/asm/poll.h b/arch/ia64/include/uapi/asm/poll.h
index c98509d3149e..c98509d3149e 100644
--- a/arch/ia64/include/asm/poll.h
+++ b/arch/ia64/include/uapi/asm/poll.h
diff --git a/arch/ia64/include/asm/posix_types.h b/arch/ia64/include/uapi/asm/posix_types.h
index 99ee1d6510cf..99ee1d6510cf 100644
--- a/arch/ia64/include/asm/posix_types.h
+++ b/arch/ia64/include/uapi/asm/posix_types.h
diff --git a/arch/ia64/include/uapi/asm/ptrace.h b/arch/ia64/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..0a02f634e12b
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ptrace.h
@@ -0,0 +1,247 @@
1/*
2 * Copyright (C) 1998-2004 Hewlett-Packard Co
3 * David Mosberger-Tang <davidm@hpl.hp.com>
4 * Stephane Eranian <eranian@hpl.hp.com>
5 * Copyright (C) 2003 Intel Co
6 * Suresh Siddha <suresh.b.siddha@intel.com>
7 * Fenghua Yu <fenghua.yu@intel.com>
8 * Arun Sharma <arun.sharma@intel.com>
9 *
10 * 12/07/98 S. Eranian added pt_regs & switch_stack
11 * 12/21/98 D. Mosberger updated to match latest code
12 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
13 *
14 */
15#ifndef _UAPI_ASM_IA64_PTRACE_H
16#define _UAPI_ASM_IA64_PTRACE_H
17
18/*
19 * When a user process is blocked, its state looks as follows:
20 *
21 * +----------------------+ ------- IA64_STK_OFFSET
22 * | | ^
23 * | struct pt_regs | |
24 * | | |
25 * +----------------------+ |
26 * | | |
27 * | memory stack | |
28 * | (growing downwards) | |
29 * //.....................// |
30 * |
31 * //.....................// |
32 * | | |
33 * +----------------------+ |
34 * | struct switch_stack | |
35 * | | |
36 * +----------------------+ |
37 * | | |
38 * //.....................// |
39 * |
40 * //.....................// |
41 * | | |
42 * | register stack | |
43 * | (growing upwards) | |
44 * | | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
48 * | | | |
49 * | struct task_struct | | |
50 * current -> | | | |
51 * +----------------------+ -------
52 *
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
55 */
56
57
58#include <asm/fpu.h>
59
60
61#ifndef __ASSEMBLY__
62
63/*
64 * This struct defines the way the registers are saved on system
65 * calls.
66 *
67 * We don't save all floating point register because the kernel
68 * is compiled to use only a very small subset, so the other are
69 * untouched.
70 *
71 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
72 * (because the memory stack pointer MUST ALWAYS be aligned this way)
73 *
74 */
75struct pt_regs {
76 /* The following registers are saved by SAVE_MIN: */
77 unsigned long b6; /* scratch */
78 unsigned long b7; /* scratch */
79
80 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
81 unsigned long ar_ssd; /* reserved for future use (scratch) */
82
83 unsigned long r8; /* scratch (return value register 0) */
84 unsigned long r9; /* scratch (return value register 1) */
85 unsigned long r10; /* scratch (return value register 2) */
86 unsigned long r11; /* scratch (return value register 3) */
87
88 unsigned long cr_ipsr; /* interrupted task's psr */
89 unsigned long cr_iip; /* interrupted task's instruction pointer */
90 /*
91 * interrupted task's function state; if bit 63 is cleared, it
92 * contains syscall's ar.pfs.pfm:
93 */
94 unsigned long cr_ifs;
95
96 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
97 unsigned long ar_pfs; /* prev function state */
98 unsigned long ar_rsc; /* RSE configuration */
99 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
100 unsigned long ar_rnat; /* RSE NaT */
101 unsigned long ar_bspstore; /* RSE bspstore */
102
103 unsigned long pr; /* 64 predicate registers (1 bit each) */
104 unsigned long b0; /* return pointer (bp) */
105 unsigned long loadrs; /* size of dirty partition << 16 */
106
107 unsigned long r1; /* the gp pointer */
108 unsigned long r12; /* interrupted task's memory stack pointer */
109 unsigned long r13; /* thread pointer */
110
111 unsigned long ar_fpsr; /* floating point status (preserved) */
112 unsigned long r15; /* scratch */
113
114 /* The remaining registers are NOT saved for system calls. */
115
116 unsigned long r14; /* scratch */
117 unsigned long r2; /* scratch */
118 unsigned long r3; /* scratch */
119
120 /* The following registers are saved by SAVE_REST: */
121 unsigned long r16; /* scratch */
122 unsigned long r17; /* scratch */
123 unsigned long r18; /* scratch */
124 unsigned long r19; /* scratch */
125 unsigned long r20; /* scratch */
126 unsigned long r21; /* scratch */
127 unsigned long r22; /* scratch */
128 unsigned long r23; /* scratch */
129 unsigned long r24; /* scratch */
130 unsigned long r25; /* scratch */
131 unsigned long r26; /* scratch */
132 unsigned long r27; /* scratch */
133 unsigned long r28; /* scratch */
134 unsigned long r29; /* scratch */
135 unsigned long r30; /* scratch */
136 unsigned long r31; /* scratch */
137
138 unsigned long ar_ccv; /* compare/exchange value (scratch) */
139
140 /*
141 * Floating point registers that the kernel considers scratch:
142 */
143 struct ia64_fpreg f6; /* scratch */
144 struct ia64_fpreg f7; /* scratch */
145 struct ia64_fpreg f8; /* scratch */
146 struct ia64_fpreg f9; /* scratch */
147 struct ia64_fpreg f10; /* scratch */
148 struct ia64_fpreg f11; /* scratch */
149};
150
151/*
152 * This structure contains the addition registers that need to
153 * preserved across a context switch. This generally consists of
154 * "preserved" registers.
155 */
156struct switch_stack {
157 unsigned long caller_unat; /* user NaT collection register (preserved) */
158 unsigned long ar_fpsr; /* floating-point status register */
159
160 struct ia64_fpreg f2; /* preserved */
161 struct ia64_fpreg f3; /* preserved */
162 struct ia64_fpreg f4; /* preserved */
163 struct ia64_fpreg f5; /* preserved */
164
165 struct ia64_fpreg f12; /* scratch, but untouched by kernel */
166 struct ia64_fpreg f13; /* scratch, but untouched by kernel */
167 struct ia64_fpreg f14; /* scratch, but untouched by kernel */
168 struct ia64_fpreg f15; /* scratch, but untouched by kernel */
169 struct ia64_fpreg f16; /* preserved */
170 struct ia64_fpreg f17; /* preserved */
171 struct ia64_fpreg f18; /* preserved */
172 struct ia64_fpreg f19; /* preserved */
173 struct ia64_fpreg f20; /* preserved */
174 struct ia64_fpreg f21; /* preserved */
175 struct ia64_fpreg f22; /* preserved */
176 struct ia64_fpreg f23; /* preserved */
177 struct ia64_fpreg f24; /* preserved */
178 struct ia64_fpreg f25; /* preserved */
179 struct ia64_fpreg f26; /* preserved */
180 struct ia64_fpreg f27; /* preserved */
181 struct ia64_fpreg f28; /* preserved */
182 struct ia64_fpreg f29; /* preserved */
183 struct ia64_fpreg f30; /* preserved */
184 struct ia64_fpreg f31; /* preserved */
185
186 unsigned long r4; /* preserved */
187 unsigned long r5; /* preserved */
188 unsigned long r6; /* preserved */
189 unsigned long r7; /* preserved */
190
191 unsigned long b0; /* so we can force a direct return in copy_thread */
192 unsigned long b1;
193 unsigned long b2;
194 unsigned long b3;
195 unsigned long b4;
196 unsigned long b5;
197
198 unsigned long ar_pfs; /* previous function state */
199 unsigned long ar_lc; /* loop counter (preserved) */
200 unsigned long ar_unat; /* NaT bits for r4-r7 */
201 unsigned long ar_rnat; /* RSE NaT collection register */
202 unsigned long ar_bspstore; /* RSE dirty base (preserved) */
203 unsigned long pr; /* 64 predicate registers (1 bit each) */
204};
205
206
207/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
208struct pt_all_user_regs {
209 unsigned long nat;
210 unsigned long cr_iip;
211 unsigned long cfm;
212 unsigned long cr_ipsr;
213 unsigned long pr;
214
215 unsigned long gr[32];
216 unsigned long br[8];
217 unsigned long ar[128];
218 struct ia64_fpreg fr[128];
219};
220
221#endif /* !__ASSEMBLY__ */
222
223/* indices to application-registers array in pt_all_user_regs */
224#define PT_AUR_RSC 16
225#define PT_AUR_BSP 17
226#define PT_AUR_BSPSTORE 18
227#define PT_AUR_RNAT 19
228#define PT_AUR_CCV 32
229#define PT_AUR_UNAT 36
230#define PT_AUR_FPSR 40
231#define PT_AUR_PFS 64
232#define PT_AUR_LC 65
233#define PT_AUR_EC 66
234
235/*
236 * The numbers chosen here are somewhat arbitrary but absolutely MUST
237 * not overlap with any of the number assigned in <linux/ptrace.h>.
238 */
239#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
240#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
241#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
242#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
243#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
244
245#define PTRACE_OLDSETOPTIONS 21
246
247#endif /* _UAPI_ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/asm/ptrace_offsets.h b/arch/ia64/include/uapi/asm/ptrace_offsets.h
index b712773c759e..b712773c759e 100644
--- a/arch/ia64/include/asm/ptrace_offsets.h
+++ b/arch/ia64/include/uapi/asm/ptrace_offsets.h
diff --git a/arch/ia64/include/asm/resource.h b/arch/ia64/include/uapi/asm/resource.h
index ba2272a87fc7..ba2272a87fc7 100644
--- a/arch/ia64/include/asm/resource.h
+++ b/arch/ia64/include/uapi/asm/resource.h
diff --git a/arch/ia64/include/asm/rse.h b/arch/ia64/include/uapi/asm/rse.h
index 02830a3b0196..02830a3b0196 100644
--- a/arch/ia64/include/asm/rse.h
+++ b/arch/ia64/include/uapi/asm/rse.h
diff --git a/arch/ia64/include/asm/sembuf.h b/arch/ia64/include/uapi/asm/sembuf.h
index 1340fbc04d3e..1340fbc04d3e 100644
--- a/arch/ia64/include/asm/sembuf.h
+++ b/arch/ia64/include/uapi/asm/sembuf.h
diff --git a/arch/ia64/include/asm/setup.h b/arch/ia64/include/uapi/asm/setup.h
index 8d56458310b3..8d56458310b3 100644
--- a/arch/ia64/include/asm/setup.h
+++ b/arch/ia64/include/uapi/asm/setup.h
diff --git a/arch/ia64/include/asm/shmbuf.h b/arch/ia64/include/uapi/asm/shmbuf.h
index 585002a77acd..585002a77acd 100644
--- a/arch/ia64/include/asm/shmbuf.h
+++ b/arch/ia64/include/uapi/asm/shmbuf.h
diff --git a/arch/ia64/include/asm/sigcontext.h b/arch/ia64/include/uapi/asm/sigcontext.h
index 57ff777bcc40..57ff777bcc40 100644
--- a/arch/ia64/include/asm/sigcontext.h
+++ b/arch/ia64/include/uapi/asm/sigcontext.h
diff --git a/arch/ia64/include/uapi/asm/siginfo.h b/arch/ia64/include/uapi/asm/siginfo.h
new file mode 100644
index 000000000000..4ea6225196bb
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/siginfo.h
@@ -0,0 +1,121 @@
1/*
2 * Based on <asm-i386/siginfo.h>.
3 *
4 * Modified 1998-2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */
7#ifndef _UAPI_ASM_IA64_SIGINFO_H
8#define _UAPI_ASM_IA64_SIGINFO_H
9
10
11#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
12
13#define HAVE_ARCH_SIGINFO_T
14#define HAVE_ARCH_COPY_SIGINFO
15#define HAVE_ARCH_COPY_SIGINFO_TO_USER
16
17#include <asm-generic/siginfo.h>
18
19typedef struct siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23 int __pad0;
24
25 union {
26 int _pad[SI_PAD_SIZE];
27
28 /* kill() */
29 struct {
30 pid_t _pid; /* sender's pid */
31 uid_t _uid; /* sender's uid */
32 } _kill;
33
34 /* POSIX.1b timers */
35 struct {
36 timer_t _tid; /* timer id */
37 int _overrun; /* overrun count */
38 char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
39 sigval_t _sigval; /* must overlay ._rt._sigval! */
40 int _sys_private; /* not to be passed to user */
41 } _timer;
42
43 /* POSIX.1b signals */
44 struct {
45 pid_t _pid; /* sender's pid */
46 uid_t _uid; /* sender's uid */
47 sigval_t _sigval;
48 } _rt;
49
50 /* SIGCHLD */
51 struct {
52 pid_t _pid; /* which child */
53 uid_t _uid; /* sender's uid */
54 int _status; /* exit code */
55 clock_t _utime;
56 clock_t _stime;
57 } _sigchld;
58
59 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
60 struct {
61 void __user *_addr; /* faulting insn/memory ref. */
62 int _imm; /* immediate value for "break" */
63 unsigned int _flags; /* see below */
64 unsigned long _isr; /* isr */
65 short _addr_lsb; /* lsb of faulting address */
66 } _sigfault;
67
68 /* SIGPOLL */
69 struct {
70 long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
71 int _fd;
72 } _sigpoll;
73 } _sifields;
74} siginfo_t;
75
76#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */
77#define si_flags _sifields._sigfault._flags
78/*
79 * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
80 * si_code is non-zero and __ISR_VALID is set in si_flags.
81 */
82#define si_isr _sifields._sigfault._isr
83
84/*
85 * Flag values for si_flags:
86 */
87#define __ISR_VALID_BIT 0
88#define __ISR_VALID (1 << __ISR_VALID_BIT)
89
90/*
91 * SIGILL si_codes
92 */
93#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */
94#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */
95#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */
96#undef NSIGILL
97#define NSIGILL 11
98
99/*
100 * SIGFPE si_codes
101 */
102#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */
103#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */
104#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */
105#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */
106#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */
107#undef NSIGFPE
108#define NSIGFPE 13
109
110/*
111 * SIGSEGV si_codes
112 */
113#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
114#undef NSIGSEGV
115#define NSIGSEGV 3
116
117#undef NSIGTRAP
118#define NSIGTRAP 4
119
120
121#endif /* _UAPI_ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/uapi/asm/signal.h b/arch/ia64/include/uapi/asm/signal.h
new file mode 100644
index 000000000000..e531c424434c
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/signal.h
@@ -0,0 +1,127 @@
1/*
2 * Modified 1998-2001, 2003
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
4 *
5 * Unfortunately, this file is being included by bits/signal.h in
6 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness.
7 */
8#ifndef _UAPI_ASM_IA64_SIGNAL_H
9#define _UAPI_ASM_IA64_SIGNAL_H
10
11
12#define SIGHUP 1
13#define SIGINT 2
14#define SIGQUIT 3
15#define SIGILL 4
16#define SIGTRAP 5
17#define SIGABRT 6
18#define SIGIOT 6
19#define SIGBUS 7
20#define SIGFPE 8
21#define SIGKILL 9
22#define SIGUSR1 10
23#define SIGSEGV 11
24#define SIGUSR2 12
25#define SIGPIPE 13
26#define SIGALRM 14
27#define SIGTERM 15
28#define SIGSTKFLT 16
29#define SIGCHLD 17
30#define SIGCONT 18
31#define SIGSTOP 19
32#define SIGTSTP 20
33#define SIGTTIN 21
34#define SIGTTOU 22
35#define SIGURG 23
36#define SIGXCPU 24
37#define SIGXFSZ 25
38#define SIGVTALRM 26
39#define SIGPROF 27
40#define SIGWINCH 28
41#define SIGIO 29
42#define SIGPOLL SIGIO
43/*
44#define SIGLOST 29
45*/
46#define SIGPWR 30
47#define SIGSYS 31
48/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
49#define SIGUNUSED 31
50
51/* These should not be considered constants from userland. */
52#define SIGRTMIN 32
53#define SIGRTMAX _NSIG
54
55/*
56 * SA_FLAGS values:
57 *
58 * SA_ONSTACK indicates that a registered stack_t will be used.
59 * SA_RESTART flag to get restarting signals (which were the default long ago)
60 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
61 * SA_RESETHAND clears the handler when the signal is delivered.
62 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
63 * SA_NODEFER prevents the current signal from being masked in the handler.
64 *
65 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
66 * Unix names RESETHAND and NODEFER respectively.
67 */
68#define SA_NOCLDSTOP 0x00000001
69#define SA_NOCLDWAIT 0x00000002
70#define SA_SIGINFO 0x00000004
71#define SA_ONSTACK 0x08000000
72#define SA_RESTART 0x10000000
73#define SA_NODEFER 0x40000000
74#define SA_RESETHAND 0x80000000
75
76#define SA_NOMASK SA_NODEFER
77#define SA_ONESHOT SA_RESETHAND
78
79#define SA_RESTORER 0x04000000
80
81/*
82 * sigaltstack controls
83 */
84#define SS_ONSTACK 1
85#define SS_DISABLE 2
86
87/*
88 * The minimum stack size needs to be fairly large because we want to
89 * be sure that an app compiled for today's CPUs will continue to run
90 * on all future CPU models. The CPU model matters because the signal
91 * frame needs to have space for the complete machine state, including
92 * all physical stacked registers. The number of physical stacked
93 * registers is CPU model dependent, but given that the width of
94 * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
95 * more than 16KB of space.
96 */
97#if 1
98 /*
99 * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
100 * in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the
101 * incorrect value and fix libc only.
102 */
103# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */
104#else
105# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */
106#endif
107#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */
108
109
110#include <asm-generic/signal-defs.h>
111
112# ifndef __ASSEMBLY__
113
114# include <linux/types.h>
115
116/* Avoid too many header ordering problems. */
117struct siginfo;
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125
126# endif /* !__ASSEMBLY__ */
127#endif /* _UAPI_ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/asm/socket.h b/arch/ia64/include/uapi/asm/socket.h
index 41fc28a4a18a..41fc28a4a18a 100644
--- a/arch/ia64/include/asm/socket.h
+++ b/arch/ia64/include/uapi/asm/socket.h
diff --git a/arch/ia64/include/asm/sockios.h b/arch/ia64/include/uapi/asm/sockios.h
index 15c92468ad38..15c92468ad38 100644
--- a/arch/ia64/include/asm/sockios.h
+++ b/arch/ia64/include/uapi/asm/sockios.h
diff --git a/arch/ia64/include/asm/stat.h b/arch/ia64/include/uapi/asm/stat.h
index 367bb90cdffa..367bb90cdffa 100644
--- a/arch/ia64/include/asm/stat.h
+++ b/arch/ia64/include/uapi/asm/stat.h
diff --git a/arch/ia64/include/asm/statfs.h b/arch/ia64/include/uapi/asm/statfs.h
index 1e589669de56..1e589669de56 100644
--- a/arch/ia64/include/asm/statfs.h
+++ b/arch/ia64/include/uapi/asm/statfs.h
diff --git a/arch/ia64/include/asm/swab.h b/arch/ia64/include/uapi/asm/swab.h
index c89a8cb5d8a5..c89a8cb5d8a5 100644
--- a/arch/ia64/include/asm/swab.h
+++ b/arch/ia64/include/uapi/asm/swab.h
diff --git a/arch/ia64/include/asm/termbits.h b/arch/ia64/include/uapi/asm/termbits.h
index c009b94e58d9..c009b94e58d9 100644
--- a/arch/ia64/include/asm/termbits.h
+++ b/arch/ia64/include/uapi/asm/termbits.h
diff --git a/arch/ia64/include/uapi/asm/termios.h b/arch/ia64/include/uapi/asm/termios.h
new file mode 100644
index 000000000000..d59b48c307f8
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/termios.h
@@ -0,0 +1,50 @@
1/*
2 * Modified 1999
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
4 *
5 * 99/01/28 Added N_IRDA and N_SMSBLOCK
6 */
7#ifndef _UAPI_ASM_IA64_TERMIOS_H
8#define _UAPI_ASM_IA64_TERMIOS_H
9
10
11#include <asm/termbits.h>
12#include <asm/ioctls.h>
13
14struct winsize {
15 unsigned short ws_row;
16 unsigned short ws_col;
17 unsigned short ws_xpixel;
18 unsigned short ws_ypixel;
19};
20
21#define NCC 8
22struct termio {
23 unsigned short c_iflag; /* input mode flags */
24 unsigned short c_oflag; /* output mode flags */
25 unsigned short c_cflag; /* control mode flags */
26 unsigned short c_lflag; /* local mode flags */
27 unsigned char c_line; /* line discipline */
28 unsigned char c_cc[NCC]; /* control characters */
29};
30
31/* modem lines */
32#define TIOCM_LE 0x001
33#define TIOCM_DTR 0x002
34#define TIOCM_RTS 0x004
35#define TIOCM_ST 0x008
36#define TIOCM_SR 0x010
37#define TIOCM_CTS 0x020
38#define TIOCM_CAR 0x040
39#define TIOCM_RNG 0x080
40#define TIOCM_DSR 0x100
41#define TIOCM_CD TIOCM_CAR
42#define TIOCM_RI TIOCM_RNG
43#define TIOCM_OUT1 0x2000
44#define TIOCM_OUT2 0x4000
45#define TIOCM_LOOP 0x8000
46
47/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
48
49
50#endif /* _UAPI_ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/uapi/asm/types.h b/arch/ia64/include/uapi/asm/types.h
new file mode 100644
index 000000000000..321193b05eed
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/types.h
@@ -0,0 +1,31 @@
1/*
2 * This file is never included by application software unless explicitly
3 * requested (e.g., via linux/types.h) in which case the application is
4 * Linux specific so (user-) name space pollution is not a major issue.
5 * However, for interoperability, libraries still need to be careful to
6 * avoid naming clashes.
7 *
8 * Based on <asm-alpha/types.h>.
9 *
10 * Modified 1998-2000, 2002
11 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
12 */
13#ifndef _UAPI_ASM_IA64_TYPES_H
14#define _UAPI_ASM_IA64_TYPES_H
15
16
17#ifndef __KERNEL__
18#include <asm-generic/int-l64.h>
19#endif
20
21#ifdef __ASSEMBLY__
22# define __IA64_UL(x) (x)
23# define __IA64_UL_CONST(x) x
24
25#else
26# define __IA64_UL(x) ((unsigned long)(x))
27# define __IA64_UL_CONST(x) x##UL
28
29#endif /* !__ASSEMBLY__ */
30
31#endif /* _UAPI_ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/asm/ucontext.h b/arch/ia64/include/uapi/asm/ucontext.h
index bf573dc8ca6a..bf573dc8ca6a 100644
--- a/arch/ia64/include/asm/ucontext.h
+++ b/arch/ia64/include/uapi/asm/ucontext.h
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
new file mode 100644
index 000000000000..b706aa54df20
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -0,0 +1,328 @@
1/*
2 * IA-64 Linux syscall numbers and inline-functions.
3 *
4 * Copyright (C) 1998-2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */
7#ifndef _UAPI_ASM_IA64_UNISTD_H
8#define _UAPI_ASM_IA64_UNISTD_H
9
10
11#include <asm/break.h>
12
13#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL
14
15#define __NR_ni_syscall 1024
16#define __NR_exit 1025
17#define __NR_read 1026
18#define __NR_write 1027
19#define __NR_open 1028
20#define __NR_close 1029
21#define __NR_creat 1030
22#define __NR_link 1031
23#define __NR_unlink 1032
24#define __NR_execve 1033
25#define __NR_chdir 1034
26#define __NR_fchdir 1035
27#define __NR_utimes 1036
28#define __NR_mknod 1037
29#define __NR_chmod 1038
30#define __NR_chown 1039
31#define __NR_lseek 1040
32#define __NR_getpid 1041
33#define __NR_getppid 1042
34#define __NR_mount 1043
35#define __NR_umount 1044
36#define __NR_setuid 1045
37#define __NR_getuid 1046
38#define __NR_geteuid 1047
39#define __NR_ptrace 1048
40#define __NR_access 1049
41#define __NR_sync 1050
42#define __NR_fsync 1051
43#define __NR_fdatasync 1052
44#define __NR_kill 1053
45#define __NR_rename 1054
46#define __NR_mkdir 1055
47#define __NR_rmdir 1056
48#define __NR_dup 1057
49#define __NR_pipe 1058
50#define __NR_times 1059
51#define __NR_brk 1060
52#define __NR_setgid 1061
53#define __NR_getgid 1062
54#define __NR_getegid 1063
55#define __NR_acct 1064
56#define __NR_ioctl 1065
57#define __NR_fcntl 1066
58#define __NR_umask 1067
59#define __NR_chroot 1068
60#define __NR_ustat 1069
61#define __NR_dup2 1070
62#define __NR_setreuid 1071
63#define __NR_setregid 1072
64#define __NR_getresuid 1073
65#define __NR_setresuid 1074
66#define __NR_getresgid 1075
67#define __NR_setresgid 1076
68#define __NR_getgroups 1077
69#define __NR_setgroups 1078
70#define __NR_getpgid 1079
71#define __NR_setpgid 1080
72#define __NR_setsid 1081
73#define __NR_getsid 1082
74#define __NR_sethostname 1083
75#define __NR_setrlimit 1084
76#define __NR_getrlimit 1085
77#define __NR_getrusage 1086
78#define __NR_gettimeofday 1087
79#define __NR_settimeofday 1088
80#define __NR_select 1089
81#define __NR_poll 1090
82#define __NR_symlink 1091
83#define __NR_readlink 1092
84#define __NR_uselib 1093
85#define __NR_swapon 1094
86#define __NR_swapoff 1095
87#define __NR_reboot 1096
88#define __NR_truncate 1097
89#define __NR_ftruncate 1098
90#define __NR_fchmod 1099
91#define __NR_fchown 1100
92#define __NR_getpriority 1101
93#define __NR_setpriority 1102
94#define __NR_statfs 1103
95#define __NR_fstatfs 1104
96#define __NR_gettid 1105
97#define __NR_semget 1106
98#define __NR_semop 1107
99#define __NR_semctl 1108
100#define __NR_msgget 1109
101#define __NR_msgsnd 1110
102#define __NR_msgrcv 1111
103#define __NR_msgctl 1112
104#define __NR_shmget 1113
105#define __NR_shmat 1114
106#define __NR_shmdt 1115
107#define __NR_shmctl 1116
108/* also known as klogctl() in GNU libc: */
109#define __NR_syslog 1117
110#define __NR_setitimer 1118
111#define __NR_getitimer 1119
112/* 1120 was __NR_old_stat */
113/* 1121 was __NR_old_lstat */
114/* 1122 was __NR_old_fstat */
115#define __NR_vhangup 1123
116#define __NR_lchown 1124
117#define __NR_remap_file_pages 1125
118#define __NR_wait4 1126
119#define __NR_sysinfo 1127
120#define __NR_clone 1128
121#define __NR_setdomainname 1129
122#define __NR_uname 1130
123#define __NR_adjtimex 1131
124/* 1132 was __NR_create_module */
125#define __NR_init_module 1133
126#define __NR_delete_module 1134
127/* 1135 was __NR_get_kernel_syms */
128/* 1136 was __NR_query_module */
129#define __NR_quotactl 1137
130#define __NR_bdflush 1138
131#define __NR_sysfs 1139
132#define __NR_personality 1140
133#define __NR_afs_syscall 1141
134#define __NR_setfsuid 1142
135#define __NR_setfsgid 1143
136#define __NR_getdents 1144
137#define __NR_flock 1145
138#define __NR_readv 1146
139#define __NR_writev 1147
140#define __NR_pread64 1148
141#define __NR_pwrite64 1149
142#define __NR__sysctl 1150
143#define __NR_mmap 1151
144#define __NR_munmap 1152
145#define __NR_mlock 1153
146#define __NR_mlockall 1154
147#define __NR_mprotect 1155
148#define __NR_mremap 1156
149#define __NR_msync 1157
150#define __NR_munlock 1158
151#define __NR_munlockall 1159
152#define __NR_sched_getparam 1160
153#define __NR_sched_setparam 1161
154#define __NR_sched_getscheduler 1162
155#define __NR_sched_setscheduler 1163
156#define __NR_sched_yield 1164
157#define __NR_sched_get_priority_max 1165
158#define __NR_sched_get_priority_min 1166
159#define __NR_sched_rr_get_interval 1167
160#define __NR_nanosleep 1168
161#define __NR_nfsservctl 1169
162#define __NR_prctl 1170
163/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
164#define __NR_mmap2 1172
165#define __NR_pciconfig_read 1173
166#define __NR_pciconfig_write 1174
167#define __NR_perfmonctl 1175
168#define __NR_sigaltstack 1176
169#define __NR_rt_sigaction 1177
170#define __NR_rt_sigpending 1178
171#define __NR_rt_sigprocmask 1179
172#define __NR_rt_sigqueueinfo 1180
173#define __NR_rt_sigreturn 1181
174#define __NR_rt_sigsuspend 1182
175#define __NR_rt_sigtimedwait 1183
176#define __NR_getcwd 1184
177#define __NR_capget 1185
178#define __NR_capset 1186
179#define __NR_sendfile 1187
180#define __NR_getpmsg 1188
181#define __NR_putpmsg 1189
182#define __NR_socket 1190
183#define __NR_bind 1191
184#define __NR_connect 1192
185#define __NR_listen 1193
186#define __NR_accept 1194
187#define __NR_getsockname 1195
188#define __NR_getpeername 1196
189#define __NR_socketpair 1197
190#define __NR_send 1198
191#define __NR_sendto 1199
192#define __NR_recv 1200
193#define __NR_recvfrom 1201
194#define __NR_shutdown 1202
195#define __NR_setsockopt 1203
196#define __NR_getsockopt 1204
197#define __NR_sendmsg 1205
198#define __NR_recvmsg 1206
199#define __NR_pivot_root 1207
200#define __NR_mincore 1208
201#define __NR_madvise 1209
202#define __NR_stat 1210
203#define __NR_lstat 1211
204#define __NR_fstat 1212
205#define __NR_clone2 1213
206#define __NR_getdents64 1214
207#define __NR_getunwind 1215
208#define __NR_readahead 1216
209#define __NR_setxattr 1217
210#define __NR_lsetxattr 1218
211#define __NR_fsetxattr 1219
212#define __NR_getxattr 1220
213#define __NR_lgetxattr 1221
214#define __NR_fgetxattr 1222
215#define __NR_listxattr 1223
216#define __NR_llistxattr 1224
217#define __NR_flistxattr 1225
218#define __NR_removexattr 1226
219#define __NR_lremovexattr 1227
220#define __NR_fremovexattr 1228
221#define __NR_tkill 1229
222#define __NR_futex 1230
223#define __NR_sched_setaffinity 1231
224#define __NR_sched_getaffinity 1232
225#define __NR_set_tid_address 1233
226#define __NR_fadvise64 1234
227#define __NR_tgkill 1235
228#define __NR_exit_group 1236
229#define __NR_lookup_dcookie 1237
230#define __NR_io_setup 1238
231#define __NR_io_destroy 1239
232#define __NR_io_getevents 1240
233#define __NR_io_submit 1241
234#define __NR_io_cancel 1242
235#define __NR_epoll_create 1243
236#define __NR_epoll_ctl 1244
237#define __NR_epoll_wait 1245
238#define __NR_restart_syscall 1246
239#define __NR_semtimedop 1247
240#define __NR_timer_create 1248
241#define __NR_timer_settime 1249
242#define __NR_timer_gettime 1250
243#define __NR_timer_getoverrun 1251
244#define __NR_timer_delete 1252
245#define __NR_clock_settime 1253
246#define __NR_clock_gettime 1254
247#define __NR_clock_getres 1255
248#define __NR_clock_nanosleep 1256
249#define __NR_fstatfs64 1257
250#define __NR_statfs64 1258
251#define __NR_mbind 1259
252#define __NR_get_mempolicy 1260
253#define __NR_set_mempolicy 1261
254#define __NR_mq_open 1262
255#define __NR_mq_unlink 1263
256#define __NR_mq_timedsend 1264
257#define __NR_mq_timedreceive 1265
258#define __NR_mq_notify 1266
259#define __NR_mq_getsetattr 1267
260#define __NR_kexec_load 1268
261#define __NR_vserver 1269
262#define __NR_waitid 1270
263#define __NR_add_key 1271
264#define __NR_request_key 1272
265#define __NR_keyctl 1273
266#define __NR_ioprio_set 1274
267#define __NR_ioprio_get 1275
268#define __NR_move_pages 1276
269#define __NR_inotify_init 1277
270#define __NR_inotify_add_watch 1278
271#define __NR_inotify_rm_watch 1279
272#define __NR_migrate_pages 1280
273#define __NR_openat 1281
274#define __NR_mkdirat 1282
275#define __NR_mknodat 1283
276#define __NR_fchownat 1284
277#define __NR_futimesat 1285
278#define __NR_newfstatat 1286
279#define __NR_unlinkat 1287
280#define __NR_renameat 1288
281#define __NR_linkat 1289
282#define __NR_symlinkat 1290
283#define __NR_readlinkat 1291
284#define __NR_fchmodat 1292
285#define __NR_faccessat 1293
286#define __NR_pselect6 1294
287#define __NR_ppoll 1295
288#define __NR_unshare 1296
289#define __NR_splice 1297
290#define __NR_set_robust_list 1298
291#define __NR_get_robust_list 1299
292#define __NR_sync_file_range 1300
293#define __NR_tee 1301
294#define __NR_vmsplice 1302
295#define __NR_fallocate 1303
296#define __NR_getcpu 1304
297#define __NR_epoll_pwait 1305
298#define __NR_utimensat 1306
299#define __NR_signalfd 1307
300#define __NR_timerfd 1308
301#define __NR_eventfd 1309
302#define __NR_timerfd_create 1310
303#define __NR_timerfd_settime 1311
304#define __NR_timerfd_gettime 1312
305#define __NR_signalfd4 1313
306#define __NR_eventfd2 1314
307#define __NR_epoll_create1 1315
308#define __NR_dup3 1316
309#define __NR_pipe2 1317
310#define __NR_inotify_init1 1318
311#define __NR_preadv 1319
312#define __NR_pwritev 1320
313#define __NR_rt_tgsigqueueinfo 1321
314#define __NR_recvmmsg 1322
315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
322#define __NR_setns 1330
323#define __NR_sendmmsg 1331
324#define __NR_process_vm_readv 1332
325#define __NR_process_vm_writev 1333
326#define __NR_accept4 1334
327
328#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/uapi/asm/ustack.h b/arch/ia64/include/uapi/asm/ustack.h
new file mode 100644
index 000000000000..1dfebc622692
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ustack.h
@@ -0,0 +1,12 @@
1#ifndef _UAPI_ASM_IA64_USTACK_H
2#define _UAPI_ASM_IA64_USTACK_H
3
4/*
5 * Constants for the user stack size
6 */
7
8
9/* Make a default stack size of 2GiB */
10#define DEFAULT_USER_STACK_SIZE (1UL << 31)
11
12#endif /* _UAPI_ASM_IA64_USTACK_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 07:34:45 -0500