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-rw-r--r--drivers/usb/host/Kconfig5
-rw-r--r--drivers/usb/host/ehci-dbg.c24
-rw-r--r--drivers/usb/host/ehci-fsl.c8
-rw-r--r--drivers/usb/host/ehci-hcd.c92
-rw-r--r--drivers/usb/host/ehci-hub.c118
-rw-r--r--drivers/usb/host/ehci-pci.c38
-rw-r--r--drivers/usb/host/ehci-q.c16
-rw-r--r--drivers/usb/host/ehci-sched.c22
-rw-r--r--drivers/usb/host/ehci.h32
9 files changed, 213 insertions, 142 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index faabce8bf39f..832599852106 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -67,6 +67,11 @@ config USB_EHCI_TT_NEWSCHED
67 67
68 If unsure, say N. 68 If unsure, say N.
69 69
70config USB_EHCI_BIG_ENDIAN_MMIO
71 bool
72 depends on USB_EHCI_HCD
73 default n
74
70config USB_ISP116X_HCD 75config USB_ISP116X_HCD
71 tristate "ISP116X HCD support" 76 tristate "ISP116X HCD support"
72 depends on USB 77 depends on USB
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
index 56349d21e6ea..246afea9e83b 100644
--- a/drivers/usb/host/ehci-dbg.c
+++ b/drivers/usb/host/ehci-dbg.c
@@ -43,7 +43,7 @@
43 */ 43 */
44static void dbg_hcs_params (struct ehci_hcd *ehci, char *label) 44static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
45{ 45{
46 u32 params = readl (&ehci->caps->hcs_params); 46 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
47 47
48 ehci_dbg (ehci, 48 ehci_dbg (ehci,
49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n", 49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
@@ -87,7 +87,7 @@ static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
87 * */ 87 * */
88static void dbg_hcc_params (struct ehci_hcd *ehci, char *label) 88static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
89{ 89{
90 u32 params = readl (&ehci->caps->hcc_params); 90 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
91 91
92 if (HCC_ISOC_CACHE (params)) { 92 if (HCC_ISOC_CACHE (params)) {
93 ehci_dbg (ehci, 93 ehci_dbg (ehci,
@@ -653,7 +653,7 @@ show_registers (struct class_device *class_dev, char *buf)
653 } 653 }
654 654
655 /* Capability Registers */ 655 /* Capability Registers */
656 i = HC_VERSION(readl (&ehci->caps->hc_capbase)); 656 i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
657 temp = scnprintf (next, size, 657 temp = scnprintf (next, size,
658 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 658 "bus %s, device %s (driver " DRIVER_VERSION ")\n"
659 "%s\n" 659 "%s\n"
@@ -673,7 +673,7 @@ show_registers (struct class_device *class_dev, char *buf)
673 unsigned count = 256/4; 673 unsigned count = 256/4;
674 674
675 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 675 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
676 offset = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 676 offset = HCC_EXT_CAPS (ehci_readl(ehci, &ehci->caps->hcc_params));
677 while (offset && count--) { 677 while (offset && count--) {
678 pci_read_config_dword (pdev, offset, &cap); 678 pci_read_config_dword (pdev, offset, &cap);
679 switch (cap & 0xff) { 679 switch (cap & 0xff) {
@@ -704,50 +704,50 @@ show_registers (struct class_device *class_dev, char *buf)
704#endif 704#endif
705 705
706 // FIXME interpret both types of params 706 // FIXME interpret both types of params
707 i = readl (&ehci->caps->hcs_params); 707 i = ehci_readl(ehci, &ehci->caps->hcs_params);
708 temp = scnprintf (next, size, "structural params 0x%08x\n", i); 708 temp = scnprintf (next, size, "structural params 0x%08x\n", i);
709 size -= temp; 709 size -= temp;
710 next += temp; 710 next += temp;
711 711
712 i = readl (&ehci->caps->hcc_params); 712 i = ehci_readl(ehci, &ehci->caps->hcc_params);
713 temp = scnprintf (next, size, "capability params 0x%08x\n", i); 713 temp = scnprintf (next, size, "capability params 0x%08x\n", i);
714 size -= temp; 714 size -= temp;
715 next += temp; 715 next += temp;
716 716
717 /* Operational Registers */ 717 /* Operational Registers */
718 temp = dbg_status_buf (scratch, sizeof scratch, label, 718 temp = dbg_status_buf (scratch, sizeof scratch, label,
719 readl (&ehci->regs->status)); 719 ehci_readl(ehci, &ehci->regs->status));
720 temp = scnprintf (next, size, fmt, temp, scratch); 720 temp = scnprintf (next, size, fmt, temp, scratch);
721 size -= temp; 721 size -= temp;
722 next += temp; 722 next += temp;
723 723
724 temp = dbg_command_buf (scratch, sizeof scratch, label, 724 temp = dbg_command_buf (scratch, sizeof scratch, label,
725 readl (&ehci->regs->command)); 725 ehci_readl(ehci, &ehci->regs->command));
726 temp = scnprintf (next, size, fmt, temp, scratch); 726 temp = scnprintf (next, size, fmt, temp, scratch);
727 size -= temp; 727 size -= temp;
728 next += temp; 728 next += temp;
729 729
730 temp = dbg_intr_buf (scratch, sizeof scratch, label, 730 temp = dbg_intr_buf (scratch, sizeof scratch, label,
731 readl (&ehci->regs->intr_enable)); 731 ehci_readl(ehci, &ehci->regs->intr_enable));
732 temp = scnprintf (next, size, fmt, temp, scratch); 732 temp = scnprintf (next, size, fmt, temp, scratch);
733 size -= temp; 733 size -= temp;
734 next += temp; 734 next += temp;
735 735
736 temp = scnprintf (next, size, "uframe %04x\n", 736 temp = scnprintf (next, size, "uframe %04x\n",
737 readl (&ehci->regs->frame_index)); 737 ehci_readl(ehci, &ehci->regs->frame_index));
738 size -= temp; 738 size -= temp;
739 next += temp; 739 next += temp;
740 740
741 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) { 741 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
742 temp = dbg_port_buf (scratch, sizeof scratch, label, i, 742 temp = dbg_port_buf (scratch, sizeof scratch, label, i,
743 readl (&ehci->regs->port_status [i - 1])); 743 ehci_readl(ehci, &ehci->regs->port_status [i - 1]));
744 temp = scnprintf (next, size, fmt, temp, scratch); 744 temp = scnprintf (next, size, fmt, temp, scratch);
745 size -= temp; 745 size -= temp;
746 next += temp; 746 next += temp;
747 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) { 747 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
748 temp = scnprintf (next, size, 748 temp = scnprintf (next, size,
749 " debug control %08x\n", 749 " debug control %08x\n",
750 readl (&ehci->debug->control)); 750 ehci_readl(ehci, &ehci->debug->control));
751 size -= temp; 751 size -= temp;
752 next += temp; 752 next += temp;
753 } 753 }
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 1a915e982c1c..a52480505f78 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -177,7 +177,7 @@ static void mpc83xx_setup_phy(struct ehci_hcd *ehci,
177 case FSL_USB2_PHY_NONE: 177 case FSL_USB2_PHY_NONE:
178 break; 178 break;
179 } 179 }
180 writel(portsc, &ehci->regs->port_status[port_offset]); 180 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
181} 181}
182 182
183static void mpc83xx_usb_setup(struct usb_hcd *hcd) 183static void mpc83xx_usb_setup(struct usb_hcd *hcd)
@@ -214,7 +214,7 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
214 } 214 }
215 215
216 /* put controller in host mode. */ 216 /* put controller in host mode. */
217 writel(0x00000003, non_ehci + FSL_SOC_USB_USBMODE); 217 ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
218 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); 218 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
219 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); 219 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
220 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); 220 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
@@ -238,12 +238,12 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
238 /* EHCI registers start at offset 0x100 */ 238 /* EHCI registers start at offset 0x100 */
239 ehci->caps = hcd->regs + 0x100; 239 ehci->caps = hcd->regs + 0x100;
240 ehci->regs = hcd->regs + 0x100 + 240 ehci->regs = hcd->regs + 0x100 +
241 HC_LENGTH(readl(&ehci->caps->hc_capbase)); 241 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
242 dbg_hcs_params(ehci, "reset"); 242 dbg_hcs_params(ehci, "reset");
243 dbg_hcc_params(ehci, "reset"); 243 dbg_hcc_params(ehci, "reset");
244 244
245 /* cache this readonly data; minimize chip reads */ 245 /* cache this readonly data; minimize chip reads */
246 ehci->hcs_params = readl(&ehci->caps->hcs_params); 246 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
247 247
248 retval = ehci_halt(ehci); 248 retval = ehci_halt(ehci);
249 if (retval) 249 if (retval)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 025d33313681..03d567e4d00a 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -157,12 +157,13 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
157 * before driver shutdown. But it also seems to be caused by bugs in cardbus 157 * before driver shutdown. But it also seems to be caused by bugs in cardbus
158 * bridge shutdown: shutting down the bridge before the devices using it. 158 * bridge shutdown: shutting down the bridge before the devices using it.
159 */ 159 */
160static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec) 160static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
161 u32 mask, u32 done, int usec)
161{ 162{
162 u32 result; 163 u32 result;
163 164
164 do { 165 do {
165 result = readl (ptr); 166 result = ehci_readl(ehci, ptr);
166 if (result == ~(u32)0) /* card removed */ 167 if (result == ~(u32)0) /* card removed */
167 return -ENODEV; 168 return -ENODEV;
168 result &= mask; 169 result &= mask;
@@ -177,18 +178,19 @@ static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec)
177/* force HC to halt state from unknown (EHCI spec section 2.3) */ 178/* force HC to halt state from unknown (EHCI spec section 2.3) */
178static int ehci_halt (struct ehci_hcd *ehci) 179static int ehci_halt (struct ehci_hcd *ehci)
179{ 180{
180 u32 temp = readl (&ehci->regs->status); 181 u32 temp = ehci_readl(ehci, &ehci->regs->status);
181 182
182 /* disable any irqs left enabled by previous code */ 183 /* disable any irqs left enabled by previous code */
183 writel (0, &ehci->regs->intr_enable); 184 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
184 185
185 if ((temp & STS_HALT) != 0) 186 if ((temp & STS_HALT) != 0)
186 return 0; 187 return 0;
187 188
188 temp = readl (&ehci->regs->command); 189 temp = ehci_readl(ehci, &ehci->regs->command);
189 temp &= ~CMD_RUN; 190 temp &= ~CMD_RUN;
190 writel (temp, &ehci->regs->command); 191 ehci_writel(ehci, temp, &ehci->regs->command);
191 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125); 192 return handshake (ehci, &ehci->regs->status,
193 STS_HALT, STS_HALT, 16 * 125);
192} 194}
193 195
194/* put TDI/ARC silicon into EHCI mode */ 196/* put TDI/ARC silicon into EHCI mode */
@@ -198,23 +200,24 @@ static void tdi_reset (struct ehci_hcd *ehci)
198 u32 tmp; 200 u32 tmp;
199 201
200 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68); 202 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
201 tmp = readl (reg_ptr); 203 tmp = ehci_readl(ehci, reg_ptr);
202 tmp |= 0x3; 204 tmp |= 0x3;
203 writel (tmp, reg_ptr); 205 ehci_writel(ehci, tmp, reg_ptr);
204} 206}
205 207
206/* reset a non-running (STS_HALT == 1) controller */ 208/* reset a non-running (STS_HALT == 1) controller */
207static int ehci_reset (struct ehci_hcd *ehci) 209static int ehci_reset (struct ehci_hcd *ehci)
208{ 210{
209 int retval; 211 int retval;
210 u32 command = readl (&ehci->regs->command); 212 u32 command = ehci_readl(ehci, &ehci->regs->command);
211 213
212 command |= CMD_RESET; 214 command |= CMD_RESET;
213 dbg_cmd (ehci, "reset", command); 215 dbg_cmd (ehci, "reset", command);
214 writel (command, &ehci->regs->command); 216 ehci_writel(ehci, command, &ehci->regs->command);
215 ehci_to_hcd(ehci)->state = HC_STATE_HALT; 217 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
216 ehci->next_statechange = jiffies; 218 ehci->next_statechange = jiffies;
217 retval = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000); 219 retval = handshake (ehci, &ehci->regs->command,
220 CMD_RESET, 0, 250 * 1000);
218 221
219 if (retval) 222 if (retval)
220 return retval; 223 return retval;
@@ -236,21 +239,21 @@ static void ehci_quiesce (struct ehci_hcd *ehci)
236#endif 239#endif
237 240
238 /* wait for any schedule enables/disables to take effect */ 241 /* wait for any schedule enables/disables to take effect */
239 temp = readl (&ehci->regs->command) << 10; 242 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
240 temp &= STS_ASS | STS_PSS; 243 temp &= STS_ASS | STS_PSS;
241 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, 244 if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
242 temp, 16 * 125) != 0) { 245 temp, 16 * 125) != 0) {
243 ehci_to_hcd(ehci)->state = HC_STATE_HALT; 246 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
244 return; 247 return;
245 } 248 }
246 249
247 /* then disable anything that's still active */ 250 /* then disable anything that's still active */
248 temp = readl (&ehci->regs->command); 251 temp = ehci_readl(ehci, &ehci->regs->command);
249 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); 252 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
250 writel (temp, &ehci->regs->command); 253 ehci_writel(ehci, temp, &ehci->regs->command);
251 254
252 /* hardware can take 16 microframes to turn off ... */ 255 /* hardware can take 16 microframes to turn off ... */
253 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, 256 if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
254 0, 16 * 125) != 0) { 257 0, 16 * 125) != 0) {
255 ehci_to_hcd(ehci)->state = HC_STATE_HALT; 258 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
256 return; 259 return;
@@ -277,11 +280,11 @@ static void ehci_watchdog (unsigned long param)
277 280
278 /* lost IAA irqs wedge things badly; seen with a vt8235 */ 281 /* lost IAA irqs wedge things badly; seen with a vt8235 */
279 if (ehci->reclaim) { 282 if (ehci->reclaim) {
280 u32 status = readl (&ehci->regs->status); 283 u32 status = ehci_readl(ehci, &ehci->regs->status);
281 if (status & STS_IAA) { 284 if (status & STS_IAA) {
282 ehci_vdbg (ehci, "lost IAA\n"); 285 ehci_vdbg (ehci, "lost IAA\n");
283 COUNT (ehci->stats.lost_iaa); 286 COUNT (ehci->stats.lost_iaa);
284 writel (STS_IAA, &ehci->regs->status); 287 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
285 ehci->reclaim_ready = 1; 288 ehci->reclaim_ready = 1;
286 } 289 }
287 } 290 }
@@ -309,7 +312,7 @@ ehci_shutdown (struct usb_hcd *hcd)
309 (void) ehci_halt (ehci); 312 (void) ehci_halt (ehci);
310 313
311 /* make BIOS/etc use companion controller during reboot */ 314 /* make BIOS/etc use companion controller during reboot */
312 writel (0, &ehci->regs->configured_flag); 315 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
313} 316}
314 317
315static void ehci_port_power (struct ehci_hcd *ehci, int is_on) 318static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
@@ -379,11 +382,11 @@ static void ehci_stop (struct usb_hcd *hcd)
379 ehci_quiesce (ehci); 382 ehci_quiesce (ehci);
380 383
381 ehci_reset (ehci); 384 ehci_reset (ehci);
382 writel (0, &ehci->regs->intr_enable); 385 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
383 spin_unlock_irq(&ehci->lock); 386 spin_unlock_irq(&ehci->lock);
384 387
385 /* let companion controllers work when we aren't */ 388 /* let companion controllers work when we aren't */
386 writel (0, &ehci->regs->configured_flag); 389 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
387 390
388 remove_debug_files (ehci); 391 remove_debug_files (ehci);
389 392
@@ -402,7 +405,8 @@ static void ehci_stop (struct usb_hcd *hcd)
402 ehci->stats.complete, ehci->stats.unlink); 405 ehci->stats.complete, ehci->stats.unlink);
403#endif 406#endif
404 407
405 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); 408 dbg_status (ehci, "ehci_stop completed",
409 ehci_readl(ehci, &ehci->regs->status));
406} 410}
407 411
408/* one-time init, only for memory state */ 412/* one-time init, only for memory state */
@@ -428,7 +432,7 @@ static int ehci_init(struct usb_hcd *hcd)
428 return retval; 432 return retval;
429 433
430 /* controllers may cache some of the periodic schedule ... */ 434 /* controllers may cache some of the periodic schedule ... */
431 hcc_params = readl(&ehci->caps->hcc_params); 435 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
432 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache 436 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
433 ehci->i_thresh = 8; 437 ehci->i_thresh = 8;
434 else // N microframes cached 438 else // N microframes cached
@@ -501,8 +505,8 @@ static int ehci_run (struct usb_hcd *hcd)
501 ehci_mem_cleanup(ehci); 505 ehci_mem_cleanup(ehci);
502 return retval; 506 return retval;
503 } 507 }
504 writel(ehci->periodic_dma, &ehci->regs->frame_list); 508 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
505 writel((u32)ehci->async->qh_dma, &ehci->regs->async_next); 509 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
506 510
507 /* 511 /*
508 * hcc_params controls whether ehci->regs->segment must (!!!) 512 * hcc_params controls whether ehci->regs->segment must (!!!)
@@ -516,9 +520,9 @@ static int ehci_run (struct usb_hcd *hcd)
516 * Scsi_Host.highmem_io, and so forth. It's readonly to all 520 * Scsi_Host.highmem_io, and so forth. It's readonly to all
517 * host side drivers though. 521 * host side drivers though.
518 */ 522 */
519 hcc_params = readl(&ehci->caps->hcc_params); 523 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
520 if (HCC_64BIT_ADDR(hcc_params)) { 524 if (HCC_64BIT_ADDR(hcc_params)) {
521 writel(0, &ehci->regs->segment); 525 ehci_writel(ehci, 0, &ehci->regs->segment);
522#if 0 526#if 0
523// this is deeply broken on almost all architectures 527// this is deeply broken on almost all architectures
524 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK)) 528 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
@@ -531,7 +535,7 @@ static int ehci_run (struct usb_hcd *hcd)
531 // root hub will detect new devices (why?); NEC doesn't 535 // root hub will detect new devices (why?); NEC doesn't
532 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 536 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
533 ehci->command |= CMD_RUN; 537 ehci->command |= CMD_RUN;
534 writel (ehci->command, &ehci->regs->command); 538 ehci_writel(ehci, ehci->command, &ehci->regs->command);
535 dbg_cmd (ehci, "init", ehci->command); 539 dbg_cmd (ehci, "init", ehci->command);
536 540
537 /* 541 /*
@@ -541,17 +545,18 @@ static int ehci_run (struct usb_hcd *hcd)
541 * and there's no companion controller unless maybe for USB OTG.) 545 * and there's no companion controller unless maybe for USB OTG.)
542 */ 546 */
543 hcd->state = HC_STATE_RUNNING; 547 hcd->state = HC_STATE_RUNNING;
544 writel (FLAG_CF, &ehci->regs->configured_flag); 548 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
545 readl (&ehci->regs->command); /* unblock posted writes */ 549 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
546 550
547 temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); 551 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
548 ehci_info (ehci, 552 ehci_info (ehci,
549 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n", 553 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
550 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 554 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
551 temp >> 8, temp & 0xff, DRIVER_VERSION, 555 temp >> 8, temp & 0xff, DRIVER_VERSION,
552 ignore_oc ? ", overcurrent ignored" : ""); 556 ignore_oc ? ", overcurrent ignored" : "");
553 557
554 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */ 558 ehci_writel(ehci, INTR_MASK,
559 &ehci->regs->intr_enable); /* Turn On Interrupts */
555 560
556 /* GRR this is run-once init(), being done every time the HC starts. 561 /* GRR this is run-once init(), being done every time the HC starts.
557 * So long as they're part of class devices, we can't do it init() 562 * So long as they're part of class devices, we can't do it init()
@@ -572,7 +577,7 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
572 577
573 spin_lock (&ehci->lock); 578 spin_lock (&ehci->lock);
574 579
575 status = readl (&ehci->regs->status); 580 status = ehci_readl(ehci, &ehci->regs->status);
576 581
577 /* e.g. cardbus physical eject */ 582 /* e.g. cardbus physical eject */
578 if (status == ~(u32) 0) { 583 if (status == ~(u32) 0) {
@@ -587,8 +592,8 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
587 } 592 }
588 593
589 /* clear (just) interrupts */ 594 /* clear (just) interrupts */
590 writel (status, &ehci->regs->status); 595 ehci_writel(ehci, status, &ehci->regs->status);
591 readl (&ehci->regs->command); /* unblock posted write */ 596 ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
592 bh = 0; 597 bh = 0;
593 598
594#ifdef EHCI_VERBOSE_DEBUG 599#ifdef EHCI_VERBOSE_DEBUG
@@ -619,11 +624,12 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
619 unsigned i = HCS_N_PORTS (ehci->hcs_params); 624 unsigned i = HCS_N_PORTS (ehci->hcs_params);
620 625
621 /* resume root hub? */ 626 /* resume root hub? */
622 if (!(readl(&ehci->regs->command) & CMD_RUN)) 627 if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
623 usb_hcd_resume_root_hub(hcd); 628 usb_hcd_resume_root_hub(hcd);
624 629
625 while (i--) { 630 while (i--) {
626 int pstatus = readl (&ehci->regs->port_status [i]); 631 int pstatus = ehci_readl(ehci,
632 &ehci->regs->port_status [i]);
627 633
628 if (pstatus & PORT_OWNER) 634 if (pstatus & PORT_OWNER)
629 continue; 635 continue;
@@ -643,14 +649,15 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
643 /* PCI errors [4.15.2.4] */ 649 /* PCI errors [4.15.2.4] */
644 if (unlikely ((status & STS_FATAL) != 0)) { 650 if (unlikely ((status & STS_FATAL) != 0)) {
645 /* bogus "fatal" IRQs appear on some chips... why? */ 651 /* bogus "fatal" IRQs appear on some chips... why? */
646 status = readl (&ehci->regs->status); 652 status = ehci_readl(ehci, &ehci->regs->status);
647 dbg_cmd (ehci, "fatal", readl (&ehci->regs->command)); 653 dbg_cmd (ehci, "fatal", ehci_readl(ehci,
654 &ehci->regs->command));
648 dbg_status (ehci, "fatal", status); 655 dbg_status (ehci, "fatal", status);
649 if (status & STS_HALT) { 656 if (status & STS_HALT) {
650 ehci_err (ehci, "fatal error\n"); 657 ehci_err (ehci, "fatal error\n");
651dead: 658dead:
652 ehci_reset (ehci); 659 ehci_reset (ehci);
653 writel (0, &ehci->regs->configured_flag); 660 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
654 /* generic layer kills/unlinks all urbs, then 661 /* generic layer kills/unlinks all urbs, then
655 * uses ehci_stop to clean up the rest 662 * uses ehci_stop to clean up the rest
656 */ 663 */
@@ -873,7 +880,8 @@ done:
873static int ehci_get_frame (struct usb_hcd *hcd) 880static int ehci_get_frame (struct usb_hcd *hcd)
874{ 881{
875 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 882 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
876 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size; 883 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
884 ehci->periodic_size;
877} 885}
878 886
879/*-------------------------------------------------------------------------*/ 887/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index bfe5f307cba6..df00fcbadfbc 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -47,7 +47,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
47 ehci_quiesce (ehci); 47 ehci_quiesce (ehci);
48 hcd->state = HC_STATE_QUIESCING; 48 hcd->state = HC_STATE_QUIESCING;
49 } 49 }
50 ehci->command = readl (&ehci->regs->command); 50 ehci->command = ehci_readl(ehci, &ehci->regs->command);
51 if (ehci->reclaim) 51 if (ehci->reclaim)
52 ehci->reclaim_ready = 1; 52 ehci->reclaim_ready = 1;
53 ehci_work(ehci); 53 ehci_work(ehci);
@@ -60,7 +60,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
60 ehci->bus_suspended = 0; 60 ehci->bus_suspended = 0;
61 while (port--) { 61 while (port--) {
62 u32 __iomem *reg = &ehci->regs->port_status [port]; 62 u32 __iomem *reg = &ehci->regs->port_status [port];
63 u32 t1 = readl (reg) & ~PORT_RWC_BITS; 63 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
64 u32 t2 = t1; 64 u32 t2 = t1;
65 65
66 /* keep track of which ports we suspend */ 66 /* keep track of which ports we suspend */
@@ -79,7 +79,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
79 if (t1 != t2) { 79 if (t1 != t2) {
80 ehci_vdbg (ehci, "port %d, %08x -> %08x\n", 80 ehci_vdbg (ehci, "port %d, %08x -> %08x\n",
81 port + 1, t1, t2); 81 port + 1, t1, t2);
82 writel (t2, reg); 82 ehci_writel(ehci, t2, reg);
83 } 83 }
84 } 84 }
85 85
@@ -92,8 +92,8 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
92 mask = INTR_MASK; 92 mask = INTR_MASK;
93 if (!device_may_wakeup(&hcd->self.root_hub->dev)) 93 if (!device_may_wakeup(&hcd->self.root_hub->dev))
94 mask &= ~STS_PCD; 94 mask &= ~STS_PCD;
95 writel(mask, &ehci->regs->intr_enable); 95 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
96 readl(&ehci->regs->intr_enable); 96 ehci_readl(ehci, &ehci->regs->intr_enable);
97 97
98 ehci->next_statechange = jiffies + msecs_to_jiffies(10); 98 ehci->next_statechange = jiffies + msecs_to_jiffies(10);
99 spin_unlock_irq (&ehci->lock); 99 spin_unlock_irq (&ehci->lock);
@@ -118,26 +118,26 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
118 * the last user of the controller, not reset/pm hardware keeping 118 * the last user of the controller, not reset/pm hardware keeping
119 * state we gave to it. 119 * state we gave to it.
120 */ 120 */
121 temp = readl(&ehci->regs->intr_enable); 121 temp = ehci_readl(ehci, &ehci->regs->intr_enable);
122 ehci_dbg(ehci, "resume root hub%s\n", temp ? "" : " after power loss"); 122 ehci_dbg(ehci, "resume root hub%s\n", temp ? "" : " after power loss");
123 123
124 /* at least some APM implementations will try to deliver 124 /* at least some APM implementations will try to deliver
125 * IRQs right away, so delay them until we're ready. 125 * IRQs right away, so delay them until we're ready.
126 */ 126 */
127 writel(0, &ehci->regs->intr_enable); 127 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
128 128
129 /* re-init operational registers */ 129 /* re-init operational registers */
130 writel(0, &ehci->regs->segment); 130 ehci_writel(ehci, 0, &ehci->regs->segment);
131 writel(ehci->periodic_dma, &ehci->regs->frame_list); 131 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
132 writel((u32) ehci->async->qh_dma, &ehci->regs->async_next); 132 ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
133 133
134 /* restore CMD_RUN, framelist size, and irq threshold */ 134 /* restore CMD_RUN, framelist size, and irq threshold */
135 writel (ehci->command, &ehci->regs->command); 135 ehci_writel(ehci, ehci->command, &ehci->regs->command);
136 136
137 /* manually resume the ports we suspended during bus_suspend() */ 137 /* manually resume the ports we suspended during bus_suspend() */
138 i = HCS_N_PORTS (ehci->hcs_params); 138 i = HCS_N_PORTS (ehci->hcs_params);
139 while (i--) { 139 while (i--) {
140 temp = readl (&ehci->regs->port_status [i]); 140 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
141 temp &= ~(PORT_RWC_BITS 141 temp &= ~(PORT_RWC_BITS
142 | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E); 142 | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
143 if (test_bit(i, &ehci->bus_suspended) && 143 if (test_bit(i, &ehci->bus_suspended) &&
@@ -145,20 +145,20 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
145 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); 145 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
146 temp |= PORT_RESUME; 146 temp |= PORT_RESUME;
147 } 147 }
148 writel (temp, &ehci->regs->port_status [i]); 148 ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
149 } 149 }
150 i = HCS_N_PORTS (ehci->hcs_params); 150 i = HCS_N_PORTS (ehci->hcs_params);
151 mdelay (20); 151 mdelay (20);
152 while (i--) { 152 while (i--) {
153 temp = readl (&ehci->regs->port_status [i]); 153 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
154 if (test_bit(i, &ehci->bus_suspended) && 154 if (test_bit(i, &ehci->bus_suspended) &&
155 (temp & PORT_SUSPEND)) { 155 (temp & PORT_SUSPEND)) {
156 temp &= ~(PORT_RWC_BITS | PORT_RESUME); 156 temp &= ~(PORT_RWC_BITS | PORT_RESUME);
157 writel (temp, &ehci->regs->port_status [i]); 157 ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
158 ehci_vdbg (ehci, "resumed port %d\n", i + 1); 158 ehci_vdbg (ehci, "resumed port %d\n", i + 1);
159 } 159 }
160 } 160 }
161 (void) readl (&ehci->regs->command); 161 (void) ehci_readl(ehci, &ehci->regs->command);
162 162
163 /* maybe re-activate the schedule(s) */ 163 /* maybe re-activate the schedule(s) */
164 temp = 0; 164 temp = 0;
@@ -168,14 +168,14 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
168 temp |= CMD_PSE; 168 temp |= CMD_PSE;
169 if (temp) { 169 if (temp) {
170 ehci->command |= temp; 170 ehci->command |= temp;
171 writel (ehci->command, &ehci->regs->command); 171 ehci_writel(ehci, ehci->command, &ehci->regs->command);
172 } 172 }
173 173
174 ehci->next_statechange = jiffies + msecs_to_jiffies(5); 174 ehci->next_statechange = jiffies + msecs_to_jiffies(5);
175 hcd->state = HC_STATE_RUNNING; 175 hcd->state = HC_STATE_RUNNING;
176 176
177 /* Now we can safely re-enable irqs */ 177 /* Now we can safely re-enable irqs */
178 writel(INTR_MASK, &ehci->regs->intr_enable); 178 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
179 179
180 spin_unlock_irq (&ehci->lock); 180 spin_unlock_irq (&ehci->lock);
181 return 0; 181 return 0;
@@ -217,7 +217,8 @@ static int check_reset_complete (
217 // what happens if HCS_N_CC(params) == 0 ? 217 // what happens if HCS_N_CC(params) == 0 ?
218 port_status |= PORT_OWNER; 218 port_status |= PORT_OWNER;
219 port_status &= ~PORT_RWC_BITS; 219 port_status &= ~PORT_RWC_BITS;
220 writel (port_status, &ehci->regs->port_status [index]); 220 ehci_writel(ehci, port_status,
221 &ehci->regs->port_status [index]);
221 222
222 } else 223 } else
223 ehci_dbg (ehci, "port %d high speed\n", index + 1); 224 ehci_dbg (ehci, "port %d high speed\n", index + 1);
@@ -268,13 +269,14 @@ ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
268 /* port N changes (bit N)? */ 269 /* port N changes (bit N)? */
269 spin_lock_irqsave (&ehci->lock, flags); 270 spin_lock_irqsave (&ehci->lock, flags);
270 for (i = 0; i < ports; i++) { 271 for (i = 0; i < ports; i++) {
271 temp = readl (&ehci->regs->port_status [i]); 272 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
272 if (temp & PORT_OWNER) { 273 if (temp & PORT_OWNER) {
273 /* don't report this in GetPortStatus */ 274 /* don't report this in GetPortStatus */
274 if (temp & PORT_CSC) { 275 if (temp & PORT_CSC) {
275 temp &= ~PORT_RWC_BITS; 276 temp &= ~PORT_RWC_BITS;
276 temp |= PORT_CSC; 277 temp |= PORT_CSC;
277 writel (temp, &ehci->regs->port_status [i]); 278 ehci_writel(ehci, temp,
279 &ehci->regs->port_status [i]);
278 } 280 }
279 continue; 281 continue;
280 } 282 }
@@ -373,18 +375,18 @@ static int ehci_hub_control (
373 if (!wIndex || wIndex > ports) 375 if (!wIndex || wIndex > ports)
374 goto error; 376 goto error;
375 wIndex--; 377 wIndex--;
376 temp = readl (&ehci->regs->port_status [wIndex]); 378 temp = ehci_readl(ehci, &ehci->regs->port_status [wIndex]);
377 if (temp & PORT_OWNER) 379 if (temp & PORT_OWNER)
378 break; 380 break;
379 381
380 switch (wValue) { 382 switch (wValue) {
381 case USB_PORT_FEAT_ENABLE: 383 case USB_PORT_FEAT_ENABLE:
382 writel (temp & ~PORT_PE, 384 ehci_writel(ehci, temp & ~PORT_PE,
383 &ehci->regs->port_status [wIndex]); 385 &ehci->regs->port_status [wIndex]);
384 break; 386 break;
385 case USB_PORT_FEAT_C_ENABLE: 387 case USB_PORT_FEAT_C_ENABLE:
386 writel((temp & ~PORT_RWC_BITS) | PORT_PEC, 388 ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_PEC,
387 &ehci->regs->port_status [wIndex]); 389 &ehci->regs->port_status [wIndex]);
388 break; 390 break;
389 case USB_PORT_FEAT_SUSPEND: 391 case USB_PORT_FEAT_SUSPEND:
390 if (temp & PORT_RESET) 392 if (temp & PORT_RESET)
@@ -396,8 +398,8 @@ static int ehci_hub_control (
396 goto error; 398 goto error;
397 /* resume signaling for 20 msec */ 399 /* resume signaling for 20 msec */
398 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); 400 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
399 writel (temp | PORT_RESUME, 401 ehci_writel(ehci, temp | PORT_RESUME,
400 &ehci->regs->port_status [wIndex]); 402 &ehci->regs->port_status [wIndex]);
401 ehci->reset_done [wIndex] = jiffies 403 ehci->reset_done [wIndex] = jiffies
402 + msecs_to_jiffies (20); 404 + msecs_to_jiffies (20);
403 } 405 }
@@ -407,16 +409,17 @@ static int ehci_hub_control (
407 break; 409 break;
408 case USB_PORT_FEAT_POWER: 410 case USB_PORT_FEAT_POWER:
409 if (HCS_PPC (ehci->hcs_params)) 411 if (HCS_PPC (ehci->hcs_params))
410 writel (temp & ~(PORT_RWC_BITS | PORT_POWER), 412 ehci_writel(ehci,
411 &ehci->regs->port_status [wIndex]); 413 temp & ~(PORT_RWC_BITS | PORT_POWER),
414 &ehci->regs->port_status [wIndex]);
412 break; 415 break;
413 case USB_PORT_FEAT_C_CONNECTION: 416 case USB_PORT_FEAT_C_CONNECTION:
414 writel((temp & ~PORT_RWC_BITS) | PORT_CSC, 417 ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_CSC,
415 &ehci->regs->port_status [wIndex]); 418 &ehci->regs->port_status [wIndex]);
416 break; 419 break;
417 case USB_PORT_FEAT_C_OVER_CURRENT: 420 case USB_PORT_FEAT_C_OVER_CURRENT:
418 writel((temp & ~PORT_RWC_BITS) | PORT_OCC, 421 ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_OCC,
419 &ehci->regs->port_status [wIndex]); 422 &ehci->regs->port_status [wIndex]);
420 break; 423 break;
421 case USB_PORT_FEAT_C_RESET: 424 case USB_PORT_FEAT_C_RESET:
422 /* GetPortStatus clears reset */ 425 /* GetPortStatus clears reset */
@@ -424,7 +427,7 @@ static int ehci_hub_control (
424 default: 427 default:
425 goto error; 428 goto error;
426 } 429 }
427 readl (&ehci->regs->command); /* unblock posted write */ 430 ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
428 break; 431 break;
429 case GetHubDescriptor: 432 case GetHubDescriptor:
430 ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *) 433 ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
@@ -440,7 +443,7 @@ static int ehci_hub_control (
440 goto error; 443 goto error;
441 wIndex--; 444 wIndex--;
442 status = 0; 445 status = 0;
443 temp = readl (&ehci->regs->port_status [wIndex]); 446 temp = ehci_readl(ehci, &ehci->regs->port_status [wIndex]);
444 447
445 // wPortChange bits 448 // wPortChange bits
446 if (temp & PORT_CSC) 449 if (temp & PORT_CSC)
@@ -458,12 +461,14 @@ static int ehci_hub_control (
458 ehci->reset_done [wIndex] = 0; 461 ehci->reset_done [wIndex] = 0;
459 462
460 /* stop resume signaling */ 463 /* stop resume signaling */
461 temp = readl (&ehci->regs->port_status [wIndex]); 464 temp = ehci_readl(ehci,
462 writel (temp & ~(PORT_RWC_BITS | PORT_RESUME), 465 &ehci->regs->port_status [wIndex]);
463 &ehci->regs->port_status [wIndex]); 466 ehci_writel(ehci,
464 retval = handshake ( 467 temp & ~(PORT_RWC_BITS | PORT_RESUME),
465 &ehci->regs->port_status [wIndex], 468 &ehci->regs->port_status [wIndex]);
466 PORT_RESUME, 0, 2000 /* 2msec */); 469 retval = handshake(ehci,
470 &ehci->regs->port_status [wIndex],
471 PORT_RESUME, 0, 2000 /* 2msec */);
467 if (retval != 0) { 472 if (retval != 0) {
468 ehci_err (ehci, "port %d resume error %d\n", 473 ehci_err (ehci, "port %d resume error %d\n",
469 wIndex + 1, retval); 474 wIndex + 1, retval);
@@ -480,13 +485,13 @@ static int ehci_hub_control (
480 ehci->reset_done [wIndex] = 0; 485 ehci->reset_done [wIndex] = 0;
481 486
482 /* force reset to complete */ 487 /* force reset to complete */
483 writel (temp & ~(PORT_RWC_BITS | PORT_RESET), 488 ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
484 &ehci->regs->port_status [wIndex]); 489 &ehci->regs->port_status [wIndex]);
485 /* REVISIT: some hardware needs 550+ usec to clear 490 /* REVISIT: some hardware needs 550+ usec to clear
486 * this bit; seems too long to spin routinely... 491 * this bit; seems too long to spin routinely...
487 */ 492 */
488 retval = handshake ( 493 retval = handshake(ehci,
489 &ehci->regs->port_status [wIndex], 494 &ehci->regs->port_status [wIndex],
490 PORT_RESET, 0, 750); 495 PORT_RESET, 0, 750);
491 if (retval != 0) { 496 if (retval != 0) {
492 ehci_err (ehci, "port %d reset error %d\n", 497 ehci_err (ehci, "port %d reset error %d\n",
@@ -496,7 +501,8 @@ static int ehci_hub_control (
496 501
497 /* see what we found out */ 502 /* see what we found out */
498 temp = check_reset_complete (ehci, wIndex, 503 temp = check_reset_complete (ehci, wIndex,
499 readl (&ehci->regs->port_status [wIndex])); 504 ehci_readl(ehci,
505 &ehci->regs->port_status [wIndex]));
500 } 506 }
501 507
502 // don't show wPortStatus if it's owned by a companion hc 508 // don't show wPortStatus if it's owned by a companion hc
@@ -541,7 +547,7 @@ static int ehci_hub_control (
541 if (!wIndex || wIndex > ports) 547 if (!wIndex || wIndex > ports)
542 goto error; 548 goto error;
543 wIndex--; 549 wIndex--;
544 temp = readl (&ehci->regs->port_status [wIndex]); 550 temp = ehci_readl(ehci, &ehci->regs->port_status [wIndex]);
545 if (temp & PORT_OWNER) 551 if (temp & PORT_OWNER)
546 break; 552 break;
547 553
@@ -555,13 +561,13 @@ static int ehci_hub_control (
555 goto error; 561 goto error;
556 if (device_may_wakeup(&hcd->self.root_hub->dev)) 562 if (device_may_wakeup(&hcd->self.root_hub->dev))
557 temp |= PORT_WAKE_BITS; 563 temp |= PORT_WAKE_BITS;
558 writel (temp | PORT_SUSPEND, 564 ehci_writel(ehci, temp | PORT_SUSPEND,
559 &ehci->regs->port_status [wIndex]); 565 &ehci->regs->port_status [wIndex]);
560 break; 566 break;
561 case USB_PORT_FEAT_POWER: 567 case USB_PORT_FEAT_POWER:
562 if (HCS_PPC (ehci->hcs_params)) 568 if (HCS_PPC (ehci->hcs_params))
563 writel (temp | PORT_POWER, 569 ehci_writel(ehci, temp | PORT_POWER,
564 &ehci->regs->port_status [wIndex]); 570 &ehci->regs->port_status [wIndex]);
565 break; 571 break;
566 case USB_PORT_FEAT_RESET: 572 case USB_PORT_FEAT_RESET:
567 if (temp & PORT_RESUME) 573 if (temp & PORT_RESUME)
@@ -589,7 +595,8 @@ static int ehci_hub_control (
589 ehci->reset_done [wIndex] = jiffies 595 ehci->reset_done [wIndex] = jiffies
590 + msecs_to_jiffies (50); 596 + msecs_to_jiffies (50);
591 } 597 }
592 writel (temp, &ehci->regs->port_status [wIndex]); 598 ehci_writel(ehci, temp,
599 &ehci->regs->port_status [wIndex]);
593 break; 600 break;
594 601
595 /* For downstream facing ports (these): one hub port is put 602 /* For downstream facing ports (these): one hub port is put
@@ -604,13 +611,14 @@ static int ehci_hub_control (
604 ehci_quiesce(ehci); 611 ehci_quiesce(ehci);
605 ehci_halt(ehci); 612 ehci_halt(ehci);
606 temp |= selector << 16; 613 temp |= selector << 16;
607 writel (temp, &ehci->regs->port_status [wIndex]); 614 ehci_writel(ehci, temp,
615 &ehci->regs->port_status [wIndex]);
608 break; 616 break;
609 617
610 default: 618 default:
611 goto error; 619 goto error;
612 } 620 }
613 readl (&ehci->regs->command); /* unblock posted writes */ 621 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
614 break; 622 break;
615 623
616 default: 624 default:
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 4bc7970ba3ef..12edc723ec73 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -38,7 +38,7 @@ static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
38 if ((temp & (3 << 13)) == (1 << 13)) { 38 if ((temp & (3 << 13)) == (1 << 13)) {
39 temp &= 0x1fff; 39 temp &= 0x1fff;
40 ehci->debug = ehci_to_hcd(ehci)->regs + temp; 40 ehci->debug = ehci_to_hcd(ehci)->regs + temp;
41 temp = readl(&ehci->debug->control); 41 temp = ehci_readl(ehci, &ehci->debug->control);
42 ehci_info(ehci, "debug port %d%s\n", 42 ehci_info(ehci, "debug port %d%s\n",
43 HCS_DEBUG_PORT(ehci->hcs_params), 43 HCS_DEBUG_PORT(ehci->hcs_params),
44 (temp & DBGP_ENABLED) 44 (temp & DBGP_ENABLED)
@@ -71,8 +71,24 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
71 u32 temp; 71 u32 temp;
72 int retval; 72 int retval;
73 73
74 switch (pdev->vendor) {
75 case PCI_VENDOR_ID_TOSHIBA_2:
76 /* celleb's companion chip */
77 if (pdev->device == 0x01b5) {
78#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
79 ehci->big_endian_mmio = 1;
80#else
81 ehci_warn(ehci,
82 "unsupported big endian Toshiba quirk\n");
83#endif
84 }
85 break;
86 }
87
74 ehci->caps = hcd->regs; 88 ehci->caps = hcd->regs;
75 ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); 89 ehci->regs = hcd->regs +
90 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
91
76 dbg_hcs_params(ehci, "reset"); 92 dbg_hcs_params(ehci, "reset");
77 dbg_hcc_params(ehci, "reset"); 93 dbg_hcc_params(ehci, "reset");
78 94
@@ -101,7 +117,7 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
101 } 117 }
102 118
103 /* cache this readonly data; minimize chip reads */ 119 /* cache this readonly data; minimize chip reads */
104 ehci->hcs_params = readl(&ehci->caps->hcs_params); 120 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
105 121
106 retval = ehci_halt(ehci); 122 retval = ehci_halt(ehci);
107 if (retval) 123 if (retval)
@@ -235,8 +251,8 @@ static int ehci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
235 rc = -EINVAL; 251 rc = -EINVAL;
236 goto bail; 252 goto bail;
237 } 253 }
238 writel (0, &ehci->regs->intr_enable); 254 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
239 (void)readl(&ehci->regs->intr_enable); 255 (void)ehci_readl(ehci, &ehci->regs->intr_enable);
240 256
241 /* make sure snapshot being resumed re-enumerates everything */ 257 /* make sure snapshot being resumed re-enumerates everything */
242 if (message.event == PM_EVENT_PRETHAW) { 258 if (message.event == PM_EVENT_PRETHAW) {
@@ -270,13 +286,13 @@ static int ehci_pci_resume(struct usb_hcd *hcd)
270 /* If CF is still set, we maintained PCI Vaux power. 286 /* If CF is still set, we maintained PCI Vaux power.
271 * Just undo the effect of ehci_pci_suspend(). 287 * Just undo the effect of ehci_pci_suspend().
272 */ 288 */
273 if (readl(&ehci->regs->configured_flag) == FLAG_CF) { 289 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
274 int mask = INTR_MASK; 290 int mask = INTR_MASK;
275 291
276 if (!device_may_wakeup(&hcd->self.root_hub->dev)) 292 if (!device_may_wakeup(&hcd->self.root_hub->dev))
277 mask &= ~STS_PCD; 293 mask &= ~STS_PCD;
278 writel(mask, &ehci->regs->intr_enable); 294 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
279 readl(&ehci->regs->intr_enable); 295 ehci_readl(ehci, &ehci->regs->intr_enable);
280 return 0; 296 return 0;
281 } 297 }
282 298
@@ -300,9 +316,9 @@ static int ehci_pci_resume(struct usb_hcd *hcd)
300 /* here we "know" root ports should always stay powered */ 316 /* here we "know" root ports should always stay powered */
301 ehci_port_power(ehci, 1); 317 ehci_port_power(ehci, 1);
302 318
303 writel(ehci->command, &ehci->regs->command); 319 ehci_writel(ehci, ehci->command, &ehci->regs->command);
304 writel(FLAG_CF, &ehci->regs->configured_flag); 320 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
305 readl(&ehci->regs->command); /* unblock posted writes */ 321 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
306 322
307 hcd->state = HC_STATE_SUSPENDED; 323 hcd->state = HC_STATE_SUSPENDED;
308 return 0; 324 return 0;
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 62e46dc60e86..e7fbbd00e7cd 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -789,13 +789,14 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
789 head = ehci->async; 789 head = ehci->async;
790 timer_action_done (ehci, TIMER_ASYNC_OFF); 790 timer_action_done (ehci, TIMER_ASYNC_OFF);
791 if (!head->qh_next.qh) { 791 if (!head->qh_next.qh) {
792 u32 cmd = readl (&ehci->regs->command); 792 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
793 793
794 if (!(cmd & CMD_ASE)) { 794 if (!(cmd & CMD_ASE)) {
795 /* in case a clear of CMD_ASE didn't take yet */ 795 /* in case a clear of CMD_ASE didn't take yet */
796 (void) handshake (&ehci->regs->status, STS_ASS, 0, 150); 796 (void)handshake(ehci, &ehci->regs->status,
797 STS_ASS, 0, 150);
797 cmd |= CMD_ASE | CMD_RUN; 798 cmd |= CMD_ASE | CMD_RUN;
798 writel (cmd, &ehci->regs->command); 799 ehci_writel(ehci, cmd, &ehci->regs->command);
799 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; 800 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
800 /* posted write need not be known to HC yet ... */ 801 /* posted write need not be known to HC yet ... */
801 } 802 }
@@ -1007,7 +1008,7 @@ static void end_unlink_async (struct ehci_hcd *ehci)
1007 1008
1008static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) 1009static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1009{ 1010{
1010 int cmd = readl (&ehci->regs->command); 1011 int cmd = ehci_readl(ehci, &ehci->regs->command);
1011 struct ehci_qh *prev; 1012 struct ehci_qh *prev;
1012 1013
1013#ifdef DEBUG 1014#ifdef DEBUG
@@ -1025,7 +1026,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1025 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT 1026 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1026 && !ehci->reclaim) { 1027 && !ehci->reclaim) {
1027 /* ... and CMD_IAAD clear */ 1028 /* ... and CMD_IAAD clear */
1028 writel (cmd & ~CMD_ASE, &ehci->regs->command); 1029 ehci_writel(ehci, cmd & ~CMD_ASE,
1030 &ehci->regs->command);
1029 wmb (); 1031 wmb ();
1030 // handshake later, if we need to 1032 // handshake later, if we need to
1031 timer_action_done (ehci, TIMER_ASYNC_OFF); 1033 timer_action_done (ehci, TIMER_ASYNC_OFF);
@@ -1054,8 +1056,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1054 1056
1055 ehci->reclaim_ready = 0; 1057 ehci->reclaim_ready = 0;
1056 cmd |= CMD_IAAD; 1058 cmd |= CMD_IAAD;
1057 writel (cmd, &ehci->regs->command); 1059 ehci_writel(ehci, cmd, &ehci->regs->command);
1058 (void) readl (&ehci->regs->command); 1060 (void)ehci_readl(ehci, &ehci->regs->command);
1059 timer_action (ehci, TIMER_IAA_WATCHDOG); 1061 timer_action (ehci, TIMER_IAA_WATCHDOG);
1060} 1062}
1061 1063
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 65c402a0fa7a..7b5ae7111f23 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -433,20 +433,20 @@ static int enable_periodic (struct ehci_hcd *ehci)
433 /* did clearing PSE did take effect yet? 433 /* did clearing PSE did take effect yet?
434 * takes effect only at frame boundaries... 434 * takes effect only at frame boundaries...
435 */ 435 */
436 status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125); 436 status = handshake(ehci, &ehci->regs->status, STS_PSS, 0, 9 * 125);
437 if (status != 0) { 437 if (status != 0) {
438 ehci_to_hcd(ehci)->state = HC_STATE_HALT; 438 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
439 return status; 439 return status;
440 } 440 }
441 441
442 cmd = readl (&ehci->regs->command) | CMD_PSE; 442 cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
443 writel (cmd, &ehci->regs->command); 443 ehci_writel(ehci, cmd, &ehci->regs->command);
444 /* posted write ... PSS happens later */ 444 /* posted write ... PSS happens later */
445 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; 445 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
446 446
447 /* make sure ehci_work scans these */ 447 /* make sure ehci_work scans these */
448 ehci->next_uframe = readl (&ehci->regs->frame_index) 448 ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
449 % (ehci->periodic_size << 3); 449 % (ehci->periodic_size << 3);
450 return 0; 450 return 0;
451} 451}
452 452
@@ -458,14 +458,14 @@ static int disable_periodic (struct ehci_hcd *ehci)
458 /* did setting PSE not take effect yet? 458 /* did setting PSE not take effect yet?
459 * takes effect only at frame boundaries... 459 * takes effect only at frame boundaries...
460 */ 460 */
461 status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125); 461 status = handshake(ehci, &ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
462 if (status != 0) { 462 if (status != 0) {
463 ehci_to_hcd(ehci)->state = HC_STATE_HALT; 463 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
464 return status; 464 return status;
465 } 465 }
466 466
467 cmd = readl (&ehci->regs->command) & ~CMD_PSE; 467 cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
468 writel (cmd, &ehci->regs->command); 468 ehci_writel(ehci, cmd, &ehci->regs->command);
469 /* posted write ... */ 469 /* posted write ... */
470 470
471 ehci->next_uframe = -1; 471 ehci->next_uframe = -1;
@@ -1336,7 +1336,7 @@ iso_stream_schedule (
1336 goto fail; 1336 goto fail;
1337 } 1337 }
1338 1338
1339 now = readl (&ehci->regs->frame_index) % mod; 1339 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1340 1340
1341 /* when's the last uframe this urb could start? */ 1341 /* when's the last uframe this urb could start? */
1342 max = now + mod; 1342 max = now + mod;
@@ -2088,7 +2088,7 @@ scan_periodic (struct ehci_hcd *ehci)
2088 */ 2088 */
2089 now_uframe = ehci->next_uframe; 2089 now_uframe = ehci->next_uframe;
2090 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) 2090 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2091 clock = readl (&ehci->regs->frame_index); 2091 clock = ehci_readl(ehci, &ehci->regs->frame_index);
2092 else 2092 else
2093 clock = now_uframe + mod - 1; 2093 clock = now_uframe + mod - 1;
2094 clock %= mod; 2094 clock %= mod;
@@ -2213,7 +2213,7 @@ restart:
2213 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) 2213 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2214 break; 2214 break;
2215 ehci->next_uframe = now_uframe; 2215 ehci->next_uframe = now_uframe;
2216 now = readl (&ehci->regs->frame_index) % mod; 2216 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
2217 if (now_uframe == now) 2217 if (now_uframe == now)
2218 break; 2218 break;
2219 2219
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 74dbc6c8228f..5f28b74bb8d3 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -92,6 +92,7 @@ struct ehci_hcd { /* one per controller */
92 unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */ 92 unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */
93 unsigned no_selective_suspend:1; 93 unsigned no_selective_suspend:1;
94 unsigned has_fsl_port_bug:1; /* FreeScale */ 94 unsigned has_fsl_port_bug:1; /* FreeScale */
95 unsigned big_endian_mmio:1;
95 96
96 u8 sbrn; /* packed release number */ 97 u8 sbrn; /* packed release number */
97 98
@@ -651,6 +652,37 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
651#define ehci_has_fsl_portno_bug(e) (0) 652#define ehci_has_fsl_portno_bug(e) (0)
652#endif 653#endif
653 654
655/*
656 * While most USB host controllers implement their registers in
657 * little-endian format, a minority (celleb companion chip) implement
658 * them in big endian format.
659 *
660 * This attempts to support either format at compile time without a
661 * runtime penalty, or both formats with the additional overhead
662 * of checking a flag bit.
663 */
664
665#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
666#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
667#else
668#define ehci_big_endian_mmio(e) 0
669#endif
670
671static inline unsigned int ehci_readl (const struct ehci_hcd *ehci,
672 __u32 __iomem * regs)
673{
674 return ehci_big_endian_mmio(ehci) ?
675 readl_be((__force u32 *)regs) :
676 readl((__force u32 *)regs);
677}
678
679static inline void ehci_writel (const struct ehci_hcd *ehci,
680 const unsigned int val, __u32 __iomem *regs)
681{
682 ehci_big_endian_mmio(ehci) ?
683 writel_be(val, (__force u32 *)regs) :
684 writel(val, (__force u32 *)regs);
685}
654 686
655/*-------------------------------------------------------------------------*/ 687/*-------------------------------------------------------------------------*/
656 688