diff options
252 files changed, 9377 insertions, 12238 deletions
diff --git a/Documentation/filesystems/fuse.txt b/Documentation/filesystems/fuse.txt index 6b5741e651a2..33f74310d161 100644 --- a/Documentation/filesystems/fuse.txt +++ b/Documentation/filesystems/fuse.txt | |||
@@ -86,6 +86,62 @@ Mount options | |||
86 | The default is infinite. Note that the size of read requests is | 86 | The default is infinite. Note that the size of read requests is |
87 | limited anyway to 32 pages (which is 128kbyte on i386). | 87 | limited anyway to 32 pages (which is 128kbyte on i386). |
88 | 88 | ||
89 | Sysfs | ||
90 | ~~~~~ | ||
91 | |||
92 | FUSE sets up the following hierarchy in sysfs: | ||
93 | |||
94 | /sys/fs/fuse/connections/N/ | ||
95 | |||
96 | where N is an increasing number allocated to each new connection. | ||
97 | |||
98 | For each connection the following attributes are defined: | ||
99 | |||
100 | 'waiting' | ||
101 | |||
102 | The number of requests which are waiting to be transfered to | ||
103 | userspace or being processed by the filesystem daemon. If there is | ||
104 | no filesystem activity and 'waiting' is non-zero, then the | ||
105 | filesystem is hung or deadlocked. | ||
106 | |||
107 | 'abort' | ||
108 | |||
109 | Writing anything into this file will abort the filesystem | ||
110 | connection. This means that all waiting requests will be aborted an | ||
111 | error returned for all aborted and new requests. | ||
112 | |||
113 | Only a privileged user may read or write these attributes. | ||
114 | |||
115 | Aborting a filesystem connection | ||
116 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
117 | |||
118 | It is possible to get into certain situations where the filesystem is | ||
119 | not responding. Reasons for this may be: | ||
120 | |||
121 | a) Broken userspace filesystem implementation | ||
122 | |||
123 | b) Network connection down | ||
124 | |||
125 | c) Accidental deadlock | ||
126 | |||
127 | d) Malicious deadlock | ||
128 | |||
129 | (For more on c) and d) see later sections) | ||
130 | |||
131 | In either of these cases it may be useful to abort the connection to | ||
132 | the filesystem. There are several ways to do this: | ||
133 | |||
134 | - Kill the filesystem daemon. Works in case of a) and b) | ||
135 | |||
136 | - Kill the filesystem daemon and all users of the filesystem. Works | ||
137 | in all cases except some malicious deadlocks | ||
138 | |||
139 | - Use forced umount (umount -f). Works in all cases but only if | ||
140 | filesystem is still attached (it hasn't been lazy unmounted) | ||
141 | |||
142 | - Abort filesystem through the sysfs interface. Most powerful | ||
143 | method, always works. | ||
144 | |||
89 | How do non-privileged mounts work? | 145 | How do non-privileged mounts work? |
90 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 146 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
91 | 147 | ||
@@ -313,3 +369,10 @@ faulted with get_user_pages(). The 'req->locked' flag indicates | |||
313 | when the copy is taking place, and interruption is delayed until | 369 | when the copy is taking place, and interruption is delayed until |
314 | this flag is unset. | 370 | this flag is unset. |
315 | 371 | ||
372 | Scenario 3 - Tricky deadlock with asynchronous read | ||
373 | --------------------------------------------------- | ||
374 | |||
375 | The same situation as above, except thread-1 will wait on page lock | ||
376 | and hence it will be uninterruptible as well. The solution is to | ||
377 | abort the connection with forced umount (if mount is attached) or | ||
378 | through the abort attribute in sysfs. | ||
diff --git a/Documentation/video4linux/CARDLIST.tuner b/Documentation/video4linux/CARDLIST.tuner index 0bf3d5bf9ef8..f6d0cf7b7922 100644 --- a/Documentation/video4linux/CARDLIST.tuner +++ b/Documentation/video4linux/CARDLIST.tuner | |||
@@ -68,3 +68,4 @@ tuner=66 - LG NTSC (TALN mini series) | |||
68 | tuner=67 - Philips TD1316 Hybrid Tuner | 68 | tuner=67 - Philips TD1316 Hybrid Tuner |
69 | tuner=68 - Philips TUV1236D ATSC/NTSC dual in | 69 | tuner=68 - Philips TUV1236D ATSC/NTSC dual in |
70 | tuner=69 - Tena TNF 5335 MF | 70 | tuner=69 - Tena TNF 5335 MF |
71 | tuner=70 - Samsung TCPN 2121P30A | ||
@@ -106,12 +106,13 @@ KBUILD_OUTPUT := $(shell cd $(KBUILD_OUTPUT) && /bin/pwd) | |||
106 | $(if $(KBUILD_OUTPUT),, \ | 106 | $(if $(KBUILD_OUTPUT),, \ |
107 | $(error output directory "$(saved-output)" does not exist)) | 107 | $(error output directory "$(saved-output)" does not exist)) |
108 | 108 | ||
109 | .PHONY: $(MAKECMDGOALS) | 109 | .PHONY: $(MAKECMDGOALS) cdbuilddir |
110 | $(MAKECMDGOALS) _all: cdbuilddir | ||
110 | 111 | ||
111 | $(filter-out _all,$(MAKECMDGOALS)) _all: | 112 | cdbuilddir: |
112 | $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \ | 113 | $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \ |
113 | KBUILD_SRC=$(CURDIR) \ | 114 | KBUILD_SRC=$(CURDIR) \ |
114 | KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $@ | 115 | KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $(MAKECMDGOALS) |
115 | 116 | ||
116 | # Leave processing to above invocation of make | 117 | # Leave processing to above invocation of make |
117 | skip-makefile := 1 | 118 | skip-makefile := 1 |
@@ -262,6 +263,13 @@ export quiet Q KBUILD_VERBOSE | |||
262 | # cc support functions to be used (only) in arch/$(ARCH)/Makefile | 263 | # cc support functions to be used (only) in arch/$(ARCH)/Makefile |
263 | # See documentation in Documentation/kbuild/makefiles.txt | 264 | # See documentation in Documentation/kbuild/makefiles.txt |
264 | 265 | ||
266 | # as-option | ||
267 | # Usage: cflags-y += $(call as-option, -Wa$(comma)-isa=foo,) | ||
268 | |||
269 | as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \ | ||
270 | -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \ | ||
271 | else echo "$(2)"; fi ;) | ||
272 | |||
265 | # cc-option | 273 | # cc-option |
266 | # Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586) | 274 | # Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586) |
267 | 275 | ||
@@ -337,8 +345,9 @@ AFLAGS := -D__ASSEMBLY__ | |||
337 | 345 | ||
338 | # Read KERNELRELEASE from .kernelrelease (if it exists) | 346 | # Read KERNELRELEASE from .kernelrelease (if it exists) |
339 | KERNELRELEASE = $(shell cat .kernelrelease 2> /dev/null) | 347 | KERNELRELEASE = $(shell cat .kernelrelease 2> /dev/null) |
348 | KERNELVERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) | ||
340 | 349 | ||
341 | export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE \ | 350 | export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION \ |
342 | ARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC \ | 351 | ARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC \ |
343 | CPP AR NM STRIP OBJCOPY OBJDUMP MAKE AWK GENKSYMS PERL UTS_MACHINE \ | 352 | CPP AR NM STRIP OBJCOPY OBJDUMP MAKE AWK GENKSYMS PERL UTS_MACHINE \ |
344 | HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS | 353 | HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS |
@@ -433,6 +442,7 @@ export KBUILD_DEFCONFIG | |||
433 | config %config: scripts_basic outputmakefile FORCE | 442 | config %config: scripts_basic outputmakefile FORCE |
434 | $(Q)mkdir -p include/linux | 443 | $(Q)mkdir -p include/linux |
435 | $(Q)$(MAKE) $(build)=scripts/kconfig $@ | 444 | $(Q)$(MAKE) $(build)=scripts/kconfig $@ |
445 | $(Q)$(MAKE) .kernelrelease | ||
436 | 446 | ||
437 | else | 447 | else |
438 | # =========================================================================== | 448 | # =========================================================================== |
@@ -542,7 +552,7 @@ export INSTALL_PATH ?= /boot | |||
542 | # makefile but the arguement can be passed to make if needed. | 552 | # makefile but the arguement can be passed to make if needed. |
543 | # | 553 | # |
544 | 554 | ||
545 | MODLIB := $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE) | 555 | MODLIB = $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE) |
546 | export MODLIB | 556 | export MODLIB |
547 | 557 | ||
548 | 558 | ||
@@ -783,12 +793,10 @@ endif | |||
783 | localver-full = $(localver)$(localver-auto) | 793 | localver-full = $(localver)$(localver-auto) |
784 | 794 | ||
785 | # Store (new) KERNELRELASE string in .kernelrelease | 795 | # Store (new) KERNELRELASE string in .kernelrelease |
786 | kernelrelease = \ | 796 | kernelrelease = $(KERNELVERSION)$(localver-full) |
787 | $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)$(localver-full) | ||
788 | .kernelrelease: FORCE | 797 | .kernelrelease: FORCE |
789 | $(Q)rm -f .kernelrelease | 798 | $(Q)rm -f $@ |
790 | $(Q)echo $(kernelrelease) > .kernelrelease | 799 | $(Q)echo $(kernelrelease) > $@ |
791 | $(Q)echo " Building kernel $(kernelrelease)" | ||
792 | 800 | ||
793 | 801 | ||
794 | # Things we need to do before we recursively start building the kernel | 802 | # Things we need to do before we recursively start building the kernel |
@@ -898,7 +906,7 @@ define filechk_version.h | |||
898 | ) | 906 | ) |
899 | endef | 907 | endef |
900 | 908 | ||
901 | include/linux/version.h: $(srctree)/Makefile FORCE | 909 | include/linux/version.h: $(srctree)/Makefile .config FORCE |
902 | $(call filechk,version.h) | 910 | $(call filechk,version.h) |
903 | 911 | ||
904 | # --------------------------------------------------------------------------- | 912 | # --------------------------------------------------------------------------- |
@@ -1301,9 +1309,10 @@ checkstack: | |||
1301 | $(PERL) $(src)/scripts/checkstack.pl $(ARCH) | 1309 | $(PERL) $(src)/scripts/checkstack.pl $(ARCH) |
1302 | 1310 | ||
1303 | kernelrelease: | 1311 | kernelrelease: |
1304 | @echo $(KERNELRELEASE) | 1312 | $(if $(wildcard .kernelrelease), $(Q)echo $(KERNELRELEASE), \ |
1313 | $(error kernelrelease not valid - run 'make *config' to update it)) | ||
1305 | kernelversion: | 1314 | kernelversion: |
1306 | @echo $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) | 1315 | @echo $(KERNELVERSION) |
1307 | 1316 | ||
1308 | # FIXME Should go into a make.lib or something | 1317 | # FIXME Should go into a make.lib or something |
1309 | # =========================================================================== | 1318 | # =========================================================================== |
@@ -1,4 +1,4 @@ | |||
1 | Linux kernel release 2.6.xx | 1 | Linux kernel release 2.6.xx <http://kernel.org> |
2 | 2 | ||
3 | These are the release notes for Linux version 2.6. Read them carefully, | 3 | These are the release notes for Linux version 2.6. Read them carefully, |
4 | as they tell you what this is all about, explain how to install the | 4 | as they tell you what this is all about, explain how to install the |
@@ -6,23 +6,31 @@ kernel, and what to do if something goes wrong. | |||
6 | 6 | ||
7 | WHAT IS LINUX? | 7 | WHAT IS LINUX? |
8 | 8 | ||
9 | Linux is a Unix clone written from scratch by Linus Torvalds with | 9 | Linux is a clone of the operating system Unix, written from scratch by |
10 | assistance from a loosely-knit team of hackers across the Net. | 10 | Linus Torvalds with assistance from a loosely-knit team of hackers across |
11 | It aims towards POSIX compliance. | 11 | the Net. It aims towards POSIX and Single UNIX Specification compliance. |
12 | 12 | ||
13 | It has all the features you would expect in a modern fully-fledged | 13 | It has all the features you would expect in a modern fully-fledged Unix, |
14 | Unix, including true multitasking, virtual memory, shared libraries, | 14 | including true multitasking, virtual memory, shared libraries, demand |
15 | demand loading, shared copy-on-write executables, proper memory | 15 | loading, shared copy-on-write executables, proper memory management, |
16 | management and TCP/IP networking. | 16 | and multistack networking including IPv4 and IPv6. |
17 | 17 | ||
18 | It is distributed under the GNU General Public License - see the | 18 | It is distributed under the GNU General Public License - see the |
19 | accompanying COPYING file for more details. | 19 | accompanying COPYING file for more details. |
20 | 20 | ||
21 | ON WHAT HARDWARE DOES IT RUN? | 21 | ON WHAT HARDWARE DOES IT RUN? |
22 | 22 | ||
23 | Linux was first developed for 386/486-based PCs. These days it also | 23 | Although originally developed first for 32-bit x86-based PCs (386 or higher), |
24 | runs on ARMs, DEC Alphas, SUN Sparcs, M68000 machines (like Atari and | 24 | today Linux also runs on (at least) the Compaq Alpha AXP, Sun SPARC and |
25 | Amiga), MIPS and PowerPC, and others. | 25 | UltraSPARC, Motorola 68000, PowerPC, PowerPC64, ARM, Hitachi SuperH, |
26 | IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64, AXIS CRIS, | ||
27 | and Renesas M32R architectures. | ||
28 | |||
29 | Linux is easily portable to most general-purpose 32- or 64-bit architectures | ||
30 | as long as they have a paged memory management unit (PMMU) and a port of the | ||
31 | GNU C compiler (gcc) (part of The GNU Compiler Collection, GCC). Linux has | ||
32 | also been ported to a number of architectures without a PMMU, although | ||
33 | functionality is then obviously somewhat limited. | ||
26 | 34 | ||
27 | DOCUMENTATION: | 35 | DOCUMENTATION: |
28 | 36 | ||
diff --git a/arch/arm26/kernel/irq.c b/arch/arm26/kernel/irq.c index f3cc1036e5bc..0934e6fba606 100644 --- a/arch/arm26/kernel/irq.c +++ b/arch/arm26/kernel/irq.c | |||
@@ -141,7 +141,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
141 | if (i < NR_IRQS) { | 141 | if (i < NR_IRQS) { |
142 | action = irq_desc[i].action; | 142 | action = irq_desc[i].action; |
143 | if (!action) | 143 | if (!action) |
144 | continue; | 144 | goto out; |
145 | seq_printf(p, "%3d: %10u ", i, kstat_irqs(i)); | 145 | seq_printf(p, "%3d: %10u ", i, kstat_irqs(i)); |
146 | seq_printf(p, " %s", action->name); | 146 | seq_printf(p, " %s", action->name); |
147 | for (action = action->next; action; action = action->next) { | 147 | for (action = action->next; action; action = action->next) { |
@@ -152,6 +152,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
152 | show_fiq_list(p, v); | 152 | show_fiq_list(p, v); |
153 | seq_printf(p, "Err: %10lu\n", irq_err_count); | 153 | seq_printf(p, "Err: %10lu\n", irq_err_count); |
154 | } | 154 | } |
155 | out: | ||
155 | return 0; | 156 | return 0; |
156 | } | 157 | } |
157 | 158 | ||
diff --git a/arch/arm26/kernel/ptrace.c b/arch/arm26/kernel/ptrace.c index 3c3371d4683e..282e24d79328 100644 --- a/arch/arm26/kernel/ptrace.c +++ b/arch/arm26/kernel/ptrace.c | |||
@@ -527,7 +527,7 @@ static int ptrace_getfpregs(struct task_struct *tsk, void *ufp) | |||
527 | static int ptrace_setfpregs(struct task_struct *tsk, void *ufp) | 527 | static int ptrace_setfpregs(struct task_struct *tsk, void *ufp) |
528 | { | 528 | { |
529 | set_stopped_child_used_math(tsk); | 529 | set_stopped_child_used_math(tsk); |
530 | return copy_from_user(&task_threas_info(tsk)->fpstate, ufp, | 530 | return copy_from_user(&task_thread_info(tsk)->fpstate, ufp, |
531 | sizeof(struct user_fp)) ? -EFAULT : 0; | 531 | sizeof(struct user_fp)) ? -EFAULT : 0; |
532 | } | 532 | } |
533 | 533 | ||
diff --git a/arch/i386/Makefile b/arch/i386/Makefile index bd2d53a9dd2b..36bef6543ac1 100644 --- a/arch/i386/Makefile +++ b/arch/i386/Makefile | |||
@@ -37,10 +37,7 @@ CFLAGS += $(call cc-option,-mpreferred-stack-boundary=2) | |||
37 | # CPU-specific tuning. Anything which can be shared with UML should go here. | 37 | # CPU-specific tuning. Anything which can be shared with UML should go here. |
38 | include $(srctree)/arch/i386/Makefile.cpu | 38 | include $(srctree)/arch/i386/Makefile.cpu |
39 | 39 | ||
40 | # -mregparm=3 works ok on gcc-3.0 and later | 40 | cflags-$(CONFIG_REGPARM) += -mregparm=3 |
41 | # | ||
42 | cflags-$(CONFIG_REGPARM) += $(shell if [ $(call cc-version) -ge 0300 ] ; then \ | ||
43 | echo "-mregparm=3"; fi ;) | ||
44 | 41 | ||
45 | # Disable unit-at-a-time mode on pre-gcc-4.0 compilers, it makes gcc use | 42 | # Disable unit-at-a-time mode on pre-gcc-4.0 compilers, it makes gcc use |
46 | # a lot more stack due to the lack of sharing of stacklots: | 43 | # a lot more stack due to the lack of sharing of stacklots: |
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c index 0fbbd4c1072e..e11a09207ec8 100644 --- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c | |||
@@ -980,7 +980,7 @@ static int powernowk8_verify(struct cpufreq_policy *pol) | |||
980 | } | 980 | } |
981 | 981 | ||
982 | /* per CPU init entry point to the driver */ | 982 | /* per CPU init entry point to the driver */ |
983 | static int __init powernowk8_cpu_init(struct cpufreq_policy *pol) | 983 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
984 | { | 984 | { |
985 | struct powernow_k8_data *data; | 985 | struct powernow_k8_data *data; |
986 | cpumask_t oldmask = CPU_MASK_ALL; | 986 | cpumask_t oldmask = CPU_MASK_ALL; |
@@ -1141,7 +1141,7 @@ static struct cpufreq_driver cpufreq_amd64_driver = { | |||
1141 | }; | 1141 | }; |
1142 | 1142 | ||
1143 | /* driver entry point for init */ | 1143 | /* driver entry point for init */ |
1144 | static int __init powernowk8_init(void) | 1144 | static int __cpuinit powernowk8_init(void) |
1145 | { | 1145 | { |
1146 | unsigned int i, supported_cpus = 0; | 1146 | unsigned int i, supported_cpus = 0; |
1147 | 1147 | ||
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c index 7df494b51a5b..2700f01994ba 100644 --- a/arch/i386/mm/init.c +++ b/arch/i386/mm/init.c | |||
@@ -268,7 +268,7 @@ static void __init permanent_kmaps_init(pgd_t *pgd_base) | |||
268 | pkmap_page_table = pte; | 268 | pkmap_page_table = pte; |
269 | } | 269 | } |
270 | 270 | ||
271 | static void __devinit free_new_highpage(struct page *page) | 271 | static void __meminit free_new_highpage(struct page *page) |
272 | { | 272 | { |
273 | set_page_count(page, 1); | 273 | set_page_count(page, 1); |
274 | __free_page(page); | 274 | __free_page(page); |
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c index bd87cb6b7a81..2ea4b39efffa 100644 --- a/arch/ia64/kernel/perfmon.c +++ b/arch/ia64/kernel/perfmon.c | |||
@@ -628,9 +628,11 @@ static int pfm_write_ibr_dbr(int mode, pfm_context_t *ctx, void *arg, int count, | |||
628 | 628 | ||
629 | #include "perfmon_itanium.h" | 629 | #include "perfmon_itanium.h" |
630 | #include "perfmon_mckinley.h" | 630 | #include "perfmon_mckinley.h" |
631 | #include "perfmon_montecito.h" | ||
631 | #include "perfmon_generic.h" | 632 | #include "perfmon_generic.h" |
632 | 633 | ||
633 | static pmu_config_t *pmu_confs[]={ | 634 | static pmu_config_t *pmu_confs[]={ |
635 | &pmu_conf_mont, | ||
634 | &pmu_conf_mck, | 636 | &pmu_conf_mck, |
635 | &pmu_conf_ita, | 637 | &pmu_conf_ita, |
636 | &pmu_conf_gen, /* must be last */ | 638 | &pmu_conf_gen, /* must be last */ |
diff --git a/arch/ia64/kernel/perfmon_montecito.h b/arch/ia64/kernel/perfmon_montecito.h new file mode 100644 index 000000000000..cd06ac6a686c --- /dev/null +++ b/arch/ia64/kernel/perfmon_montecito.h | |||
@@ -0,0 +1,269 @@ | |||
1 | /* | ||
2 | * This file contains the Montecito PMU register description tables | ||
3 | * and pmc checker used by perfmon.c. | ||
4 | * | ||
5 | * Copyright (c) 2005-2006 Hewlett-Packard Development Company, L.P. | ||
6 | * Contributed by Stephane Eranian <eranian@hpl.hp.com> | ||
7 | */ | ||
8 | static int pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs); | ||
9 | |||
10 | #define RDEP_MONT_ETB (RDEP(38)|RDEP(39)|RDEP(48)|RDEP(49)|RDEP(50)|RDEP(51)|RDEP(52)|RDEP(53)|RDEP(54)|\ | ||
11 | RDEP(55)|RDEP(56)|RDEP(57)|RDEP(58)|RDEP(59)|RDEP(60)|RDEP(61)|RDEP(62)|RDEP(63)) | ||
12 | #define RDEP_MONT_DEAR (RDEP(32)|RDEP(33)|RDEP(36)) | ||
13 | #define RDEP_MONT_IEAR (RDEP(34)|RDEP(35)) | ||
14 | |||
15 | static pfm_reg_desc_t pfm_mont_pmc_desc[PMU_MAX_PMCS]={ | ||
16 | /* pmc0 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
17 | /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
18 | /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
19 | /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
20 | /* pmc4 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(4),0, 0, 0}, {0,0, 0, 0}}, | ||
21 | /* pmc5 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(5),0, 0, 0}, {0,0, 0, 0}}, | ||
22 | /* pmc6 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(6),0, 0, 0}, {0,0, 0, 0}}, | ||
23 | /* pmc7 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(7),0, 0, 0}, {0,0, 0, 0}}, | ||
24 | /* pmc8 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(8),0, 0, 0}, {0,0, 0, 0}}, | ||
25 | /* pmc9 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(9),0, 0, 0}, {0,0, 0, 0}}, | ||
26 | /* pmc10 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(10),0, 0, 0}, {0,0, 0, 0}}, | ||
27 | /* pmc11 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(11),0, 0, 0}, {0,0, 0, 0}}, | ||
28 | /* pmc12 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(12),0, 0, 0}, {0,0, 0, 0}}, | ||
29 | /* pmc13 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(13),0, 0, 0}, {0,0, 0, 0}}, | ||
30 | /* pmc14 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(14),0, 0, 0}, {0,0, 0, 0}}, | ||
31 | /* pmc15 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(15),0, 0, 0}, {0,0, 0, 0}}, | ||
32 | /* pmc16 */ { PFM_REG_NOTIMPL, }, | ||
33 | /* pmc17 */ { PFM_REG_NOTIMPL, }, | ||
34 | /* pmc18 */ { PFM_REG_NOTIMPL, }, | ||
35 | /* pmc19 */ { PFM_REG_NOTIMPL, }, | ||
36 | /* pmc20 */ { PFM_REG_NOTIMPL, }, | ||
37 | /* pmc21 */ { PFM_REG_NOTIMPL, }, | ||
38 | /* pmc22 */ { PFM_REG_NOTIMPL, }, | ||
39 | /* pmc23 */ { PFM_REG_NOTIMPL, }, | ||
40 | /* pmc24 */ { PFM_REG_NOTIMPL, }, | ||
41 | /* pmc25 */ { PFM_REG_NOTIMPL, }, | ||
42 | /* pmc26 */ { PFM_REG_NOTIMPL, }, | ||
43 | /* pmc27 */ { PFM_REG_NOTIMPL, }, | ||
44 | /* pmc28 */ { PFM_REG_NOTIMPL, }, | ||
45 | /* pmc29 */ { PFM_REG_NOTIMPL, }, | ||
46 | /* pmc30 */ { PFM_REG_NOTIMPL, }, | ||
47 | /* pmc31 */ { PFM_REG_NOTIMPL, }, | ||
48 | /* pmc32 */ { PFM_REG_CONFIG, 0, 0x30f01ffffffffff, 0x30f01ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
49 | /* pmc33 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
50 | /* pmc34 */ { PFM_REG_CONFIG, 0, 0xf01ffffffffff, 0xf01ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
51 | /* pmc35 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
52 | /* pmc36 */ { PFM_REG_CONFIG, 0, 0xfffffff0, 0xf, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
53 | /* pmc37 */ { PFM_REG_MONITOR, 4, 0x0, 0x3fff, NULL, pfm_mont_pmc_check, {RDEP_MONT_IEAR, 0, 0, 0}, {0, 0, 0, 0}}, | ||
54 | /* pmc38 */ { PFM_REG_CONFIG, 0, 0xdb6, 0x2492, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
55 | /* pmc39 */ { PFM_REG_MONITOR, 6, 0x0, 0xffcf, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}}, | ||
56 | /* pmc40 */ { PFM_REG_MONITOR, 6, 0x2000000, 0xf01cf, NULL, pfm_mont_pmc_check, {RDEP_MONT_DEAR,0, 0, 0}, {0,0, 0, 0}}, | ||
57 | /* pmc41 */ { PFM_REG_CONFIG, 0, 0x00002078fefefefe, 0x1e00018181818, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, | ||
58 | /* pmc42 */ { PFM_REG_MONITOR, 6, 0x0, 0x7ff4f, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}}, | ||
59 | { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */ | ||
60 | }; | ||
61 | |||
62 | static pfm_reg_desc_t pfm_mont_pmd_desc[PMU_MAX_PMDS]={ | ||
63 | /* pmd0 */ { PFM_REG_NOTIMPL, }, | ||
64 | /* pmd1 */ { PFM_REG_NOTIMPL, }, | ||
65 | /* pmd2 */ { PFM_REG_NOTIMPL, }, | ||
66 | /* pmd3 */ { PFM_REG_NOTIMPL, }, | ||
67 | /* pmd4 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(4),0, 0, 0}}, | ||
68 | /* pmd5 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(5),0, 0, 0}}, | ||
69 | /* pmd6 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(6),0, 0, 0}}, | ||
70 | /* pmd7 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(7),0, 0, 0}}, | ||
71 | /* pmd8 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(8),0, 0, 0}}, | ||
72 | /* pmd9 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(9),0, 0, 0}}, | ||
73 | /* pmd10 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(10),0, 0, 0}}, | ||
74 | /* pmd11 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(11),0, 0, 0}}, | ||
75 | /* pmd12 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(12),0, 0, 0}}, | ||
76 | /* pmd13 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(13),0, 0, 0}}, | ||
77 | /* pmd14 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(14),0, 0, 0}}, | ||
78 | /* pmd15 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(15),0, 0, 0}}, | ||
79 | /* pmd16 */ { PFM_REG_NOTIMPL, }, | ||
80 | /* pmd17 */ { PFM_REG_NOTIMPL, }, | ||
81 | /* pmd18 */ { PFM_REG_NOTIMPL, }, | ||
82 | /* pmd19 */ { PFM_REG_NOTIMPL, }, | ||
83 | /* pmd20 */ { PFM_REG_NOTIMPL, }, | ||
84 | /* pmd21 */ { PFM_REG_NOTIMPL, }, | ||
85 | /* pmd22 */ { PFM_REG_NOTIMPL, }, | ||
86 | /* pmd23 */ { PFM_REG_NOTIMPL, }, | ||
87 | /* pmd24 */ { PFM_REG_NOTIMPL, }, | ||
88 | /* pmd25 */ { PFM_REG_NOTIMPL, }, | ||
89 | /* pmd26 */ { PFM_REG_NOTIMPL, }, | ||
90 | /* pmd27 */ { PFM_REG_NOTIMPL, }, | ||
91 | /* pmd28 */ { PFM_REG_NOTIMPL, }, | ||
92 | /* pmd29 */ { PFM_REG_NOTIMPL, }, | ||
93 | /* pmd30 */ { PFM_REG_NOTIMPL, }, | ||
94 | /* pmd31 */ { PFM_REG_NOTIMPL, }, | ||
95 | /* pmd32 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(33)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}}, | ||
96 | /* pmd33 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}}, | ||
97 | /* pmd34 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(35),0, 0, 0}, {RDEP(37),0, 0, 0}}, | ||
98 | /* pmd35 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(34),0, 0, 0}, {RDEP(37),0, 0, 0}}, | ||
99 | /* pmd36 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(33),0, 0, 0}, {RDEP(40),0, 0, 0}}, | ||
100 | /* pmd37 */ { PFM_REG_NOTIMPL, }, | ||
101 | /* pmd38 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
102 | /* pmd39 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
103 | /* pmd40 */ { PFM_REG_NOTIMPL, }, | ||
104 | /* pmd41 */ { PFM_REG_NOTIMPL, }, | ||
105 | /* pmd42 */ { PFM_REG_NOTIMPL, }, | ||
106 | /* pmd43 */ { PFM_REG_NOTIMPL, }, | ||
107 | /* pmd44 */ { PFM_REG_NOTIMPL, }, | ||
108 | /* pmd45 */ { PFM_REG_NOTIMPL, }, | ||
109 | /* pmd46 */ { PFM_REG_NOTIMPL, }, | ||
110 | /* pmd47 */ { PFM_REG_NOTIMPL, }, | ||
111 | /* pmd48 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
112 | /* pmd49 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
113 | /* pmd50 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
114 | /* pmd51 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
115 | /* pmd52 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
116 | /* pmd53 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
117 | /* pmd54 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
118 | /* pmd55 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
119 | /* pmd56 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
120 | /* pmd57 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
121 | /* pmd58 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
122 | /* pmd59 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
123 | /* pmd60 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
124 | /* pmd61 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
125 | /* pmd62 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
126 | /* pmd63 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, | ||
127 | { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */ | ||
128 | }; | ||
129 | |||
130 | /* | ||
131 | * PMC reserved fields must have their power-up values preserved | ||
132 | */ | ||
133 | static int | ||
134 | pfm_mont_reserved(unsigned int cnum, unsigned long *val, struct pt_regs *regs) | ||
135 | { | ||
136 | unsigned long tmp1, tmp2, ival = *val; | ||
137 | |||
138 | /* remove reserved areas from user value */ | ||
139 | tmp1 = ival & PMC_RSVD_MASK(cnum); | ||
140 | |||
141 | /* get reserved fields values */ | ||
142 | tmp2 = PMC_DFL_VAL(cnum) & ~PMC_RSVD_MASK(cnum); | ||
143 | |||
144 | *val = tmp1 | tmp2; | ||
145 | |||
146 | DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n", | ||
147 | cnum, ival, PMC_RSVD_MASK(cnum), PMC_DFL_VAL(cnum), *val)); | ||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | /* | ||
152 | * task can be NULL if the context is unloaded | ||
153 | */ | ||
154 | static int | ||
155 | pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs) | ||
156 | { | ||
157 | int ret = 0; | ||
158 | unsigned long val32 = 0, val38 = 0, val41 = 0; | ||
159 | unsigned long tmpval; | ||
160 | int check_case1 = 0; | ||
161 | int is_loaded; | ||
162 | |||
163 | /* first preserve the reserved fields */ | ||
164 | pfm_mont_reserved(cnum, val, regs); | ||
165 | |||
166 | tmpval = *val; | ||
167 | |||
168 | /* sanity check */ | ||
169 | if (ctx == NULL) return -EINVAL; | ||
170 | |||
171 | is_loaded = ctx->ctx_state == PFM_CTX_LOADED || ctx->ctx_state == PFM_CTX_MASKED; | ||
172 | |||
173 | /* | ||
174 | * we must clear the debug registers if pmc41 has a value which enable | ||
175 | * memory pipeline event constraints. In this case we need to clear the | ||
176 | * the debug registers if they have not yet been accessed. This is required | ||
177 | * to avoid picking stale state. | ||
178 | * PMC41 is "active" if: | ||
179 | * one of the pmc41.cfg_dtagXX field is different from 0x3 | ||
180 | * AND | ||
181 | * at the corresponding pmc41.en_dbrpXX is set. | ||
182 | * AND | ||
183 | * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used) | ||
184 | */ | ||
185 | DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, tmpval, ctx->ctx_fl_using_dbreg, is_loaded)); | ||
186 | |||
187 | if (cnum == 41 && is_loaded | ||
188 | && (tmpval & 0x1e00000000000) && (tmpval & 0x18181818UL) != 0x18181818UL && ctx->ctx_fl_using_dbreg == 0) { | ||
189 | |||
190 | DPRINT(("pmc[%d]=0x%lx has active pmc41 settings, clearing dbr\n", cnum, tmpval)); | ||
191 | |||
192 | /* don't mix debug with perfmon */ | ||
193 | if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; | ||
194 | |||
195 | /* | ||
196 | * a count of 0 will mark the debug registers if: | ||
197 | * AND | ||
198 | */ | ||
199 | ret = pfm_write_ibr_dbr(PFM_DATA_RR, ctx, NULL, 0, regs); | ||
200 | if (ret) return ret; | ||
201 | } | ||
202 | /* | ||
203 | * we must clear the (instruction) debug registers if: | ||
204 | * pmc38.ig_ibrpX is 0 (enabled) | ||
205 | * AND | ||
206 | * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used) | ||
207 | */ | ||
208 | if (cnum == 38 && is_loaded && ((tmpval & 0x492UL) != 0x492UL) && ctx->ctx_fl_using_dbreg == 0) { | ||
209 | |||
210 | DPRINT(("pmc38=0x%lx has active pmc38 settings, clearing ibr\n", tmpval)); | ||
211 | |||
212 | /* don't mix debug with perfmon */ | ||
213 | if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; | ||
214 | |||
215 | /* | ||
216 | * a count of 0 will mark the debug registers as in use and also | ||
217 | * ensure that they are properly cleared. | ||
218 | */ | ||
219 | ret = pfm_write_ibr_dbr(PFM_CODE_RR, ctx, NULL, 0, regs); | ||
220 | if (ret) return ret; | ||
221 | |||
222 | } | ||
223 | switch(cnum) { | ||
224 | case 32: val32 = *val; | ||
225 | val38 = ctx->ctx_pmcs[38]; | ||
226 | val41 = ctx->ctx_pmcs[41]; | ||
227 | check_case1 = 1; | ||
228 | break; | ||
229 | case 38: val38 = *val; | ||
230 | val32 = ctx->ctx_pmcs[32]; | ||
231 | val41 = ctx->ctx_pmcs[41]; | ||
232 | check_case1 = 1; | ||
233 | break; | ||
234 | case 41: val41 = *val; | ||
235 | val32 = ctx->ctx_pmcs[32]; | ||
236 | val38 = ctx->ctx_pmcs[38]; | ||
237 | check_case1 = 1; | ||
238 | break; | ||
239 | } | ||
240 | /* check illegal configuration which can produce inconsistencies in tagging | ||
241 | * i-side events in L1D and L2 caches | ||
242 | */ | ||
243 | if (check_case1) { | ||
244 | ret = (((val41 >> 45) & 0xf) == 0 && ((val32>>57) & 0x1) == 0) | ||
245 | && ((((val38>>1) & 0x3) == 0x2 || ((val38>>1) & 0x3) == 0) | ||
246 | || (((val38>>4) & 0x3) == 0x2 || ((val38>>4) & 0x3) == 0)); | ||
247 | if (ret) { | ||
248 | DPRINT(("invalid config pmc38=0x%lx pmc41=0x%lx pmc32=0x%lx\n", val38, val41, val32)); | ||
249 | return -EINVAL; | ||
250 | } | ||
251 | } | ||
252 | *val = tmpval; | ||
253 | return 0; | ||
254 | } | ||
255 | |||
256 | /* | ||
257 | * impl_pmcs, impl_pmds are computed at runtime to minimize errors! | ||
258 | */ | ||
259 | static pmu_config_t pmu_conf_mont={ | ||
260 | .pmu_name = "Montecito", | ||
261 | .pmu_family = 0x20, | ||
262 | .flags = PFM_PMU_IRQ_RESEND, | ||
263 | .ovfl_val = (1UL << 47) - 1, | ||
264 | .pmd_desc = pfm_mont_pmd_desc, | ||
265 | .pmc_desc = pfm_mont_pmc_desc, | ||
266 | .num_ibrs = 8, | ||
267 | .num_dbrs = 8, | ||
268 | .use_rr_dbregs = 1 /* debug register are use for range retrictions */ | ||
269 | }; | ||
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index e3215ba64ffd..b38b6d213c15 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c | |||
@@ -635,3 +635,39 @@ mem_init (void) | |||
635 | ia32_mem_init(); | 635 | ia32_mem_init(); |
636 | #endif | 636 | #endif |
637 | } | 637 | } |
638 | |||
639 | #ifdef CONFIG_MEMORY_HOTPLUG | ||
640 | void online_page(struct page *page) | ||
641 | { | ||
642 | ClearPageReserved(page); | ||
643 | set_page_count(page, 1); | ||
644 | __free_page(page); | ||
645 | totalram_pages++; | ||
646 | num_physpages++; | ||
647 | } | ||
648 | |||
649 | int add_memory(u64 start, u64 size) | ||
650 | { | ||
651 | pg_data_t *pgdat; | ||
652 | struct zone *zone; | ||
653 | unsigned long start_pfn = start >> PAGE_SHIFT; | ||
654 | unsigned long nr_pages = size >> PAGE_SHIFT; | ||
655 | int ret; | ||
656 | |||
657 | pgdat = NODE_DATA(0); | ||
658 | |||
659 | zone = pgdat->node_zones + ZONE_NORMAL; | ||
660 | ret = __add_pages(zone, start_pfn, nr_pages); | ||
661 | |||
662 | if (ret) | ||
663 | printk("%s: Problem encountered in __add_pages() as ret=%d\n", | ||
664 | __FUNCTION__, ret); | ||
665 | |||
666 | return ret; | ||
667 | } | ||
668 | |||
669 | int remove_memory(u64 start, u64 size) | ||
670 | { | ||
671 | return -EINVAL; | ||
672 | } | ||
673 | #endif | ||
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 30dbc98bf0b3..d27ecdcb6fca 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -454,14 +454,13 @@ static int __devinit is_valid_resource(struct pci_dev *dev, int idx) | |||
454 | return 0; | 454 | return 0; |
455 | } | 455 | } |
456 | 456 | ||
457 | static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) | 457 | static void __devinit |
458 | pcibios_fixup_resources(struct pci_dev *dev, int start, int limit) | ||
458 | { | 459 | { |
459 | struct pci_bus_region region; | 460 | struct pci_bus_region region; |
460 | int i; | 461 | int i; |
461 | int limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ? \ | ||
462 | PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES; | ||
463 | 462 | ||
464 | for (i = 0; i < limit; i++) { | 463 | for (i = start; i < limit; i++) { |
465 | if (!dev->resource[i].flags) | 464 | if (!dev->resource[i].flags) |
466 | continue; | 465 | continue; |
467 | region.start = dev->resource[i].start; | 466 | region.start = dev->resource[i].start; |
@@ -472,6 +471,16 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) | |||
472 | } | 471 | } |
473 | } | 472 | } |
474 | 473 | ||
474 | static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) | ||
475 | { | ||
476 | pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES); | ||
477 | } | ||
478 | |||
479 | static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev) | ||
480 | { | ||
481 | pcibios_fixup_resources(dev, PCI_BRIDGE_RESOURCES, PCI_NUM_RESOURCES); | ||
482 | } | ||
483 | |||
475 | /* | 484 | /* |
476 | * Called after each bus is probed, but before its children are examined. | 485 | * Called after each bus is probed, but before its children are examined. |
477 | */ | 486 | */ |
@@ -482,7 +491,7 @@ pcibios_fixup_bus (struct pci_bus *b) | |||
482 | 491 | ||
483 | if (b->self) { | 492 | if (b->self) { |
484 | pci_read_bridge_bases(b); | 493 | pci_read_bridge_bases(b); |
485 | pcibios_fixup_device_resources(b->self); | 494 | pcibios_fixup_bridge_resources(b->self); |
486 | } | 495 | } |
487 | list_for_each_entry(dev, &b->devices, bus_list) | 496 | list_for_each_entry(dev, &b->devices, bus_list) |
488 | pcibios_fixup_device_resources(dev); | 497 | pcibios_fixup_device_resources(dev); |
diff --git a/arch/ia64/sn/include/xtalk/hubdev.h b/arch/ia64/sn/include/xtalk/hubdev.h index 4d417c301201..7c88e9a58516 100644 --- a/arch/ia64/sn/include/xtalk/hubdev.h +++ b/arch/ia64/sn/include/xtalk/hubdev.h | |||
@@ -40,8 +40,8 @@ struct sn_flush_device_common { | |||
40 | unsigned long sfdl_force_int_addr; | 40 | unsigned long sfdl_force_int_addr; |
41 | unsigned long sfdl_flush_value; | 41 | unsigned long sfdl_flush_value; |
42 | volatile unsigned long *sfdl_flush_addr; | 42 | volatile unsigned long *sfdl_flush_addr; |
43 | uint32_t sfdl_persistent_busnum; | 43 | u32 sfdl_persistent_busnum; |
44 | uint32_t sfdl_persistent_segment; | 44 | u32 sfdl_persistent_segment; |
45 | struct pcibus_info *sfdl_pcibus_info; | 45 | struct pcibus_info *sfdl_pcibus_info; |
46 | }; | 46 | }; |
47 | 47 | ||
@@ -56,7 +56,7 @@ struct sn_flush_device_kernel { | |||
56 | */ | 56 | */ |
57 | struct sn_flush_nasid_entry { | 57 | struct sn_flush_nasid_entry { |
58 | struct sn_flush_device_kernel **widget_p; // Used as an array of wid_num | 58 | struct sn_flush_device_kernel **widget_p; // Used as an array of wid_num |
59 | uint64_t iio_itte[8]; | 59 | u64 iio_itte[8]; |
60 | }; | 60 | }; |
61 | 61 | ||
62 | struct hubdev_info { | 62 | struct hubdev_info { |
@@ -70,8 +70,8 @@ struct hubdev_info { | |||
70 | 70 | ||
71 | void *hdi_nodepda; | 71 | void *hdi_nodepda; |
72 | void *hdi_node_vertex; | 72 | void *hdi_node_vertex; |
73 | uint32_t max_segment_number; | 73 | u32 max_segment_number; |
74 | uint32_t max_pcibus_number; | 74 | u32 max_pcibus_number; |
75 | }; | 75 | }; |
76 | 76 | ||
77 | extern void hubdev_init_node(nodepda_t *, cnodeid_t); | 77 | extern void hubdev_init_node(nodepda_t *, cnodeid_t); |
diff --git a/arch/ia64/sn/include/xtalk/xbow.h b/arch/ia64/sn/include/xtalk/xbow.h index ec56b3432f17..90f37a4133d0 100644 --- a/arch/ia64/sn/include/xtalk/xbow.h +++ b/arch/ia64/sn/include/xtalk/xbow.h | |||
@@ -3,7 +3,8 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All Rights Reserved. | 6 | * Copyright (C) 1992-1997,2000-2006 Silicon Graphics, Inc. All Rights |
7 | * Reserved. | ||
7 | */ | 8 | */ |
8 | #ifndef _ASM_IA64_SN_XTALK_XBOW_H | 9 | #ifndef _ASM_IA64_SN_XTALK_XBOW_H |
9 | #define _ASM_IA64_SN_XTALK_XBOW_H | 10 | #define _ASM_IA64_SN_XTALK_XBOW_H |
@@ -21,94 +22,94 @@ | |||
21 | 22 | ||
22 | /* Register set for each xbow link */ | 23 | /* Register set for each xbow link */ |
23 | typedef volatile struct xb_linkregs_s { | 24 | typedef volatile struct xb_linkregs_s { |
24 | /* | 25 | /* |
25 | * we access these through synergy unswizzled space, so the address | 26 | * we access these through synergy unswizzled space, so the address |
26 | * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.) | 27 | * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.) |
27 | * That's why we put the register first and filler second. | 28 | * That's why we put the register first and filler second. |
28 | */ | 29 | */ |
29 | uint32_t link_ibf; | 30 | u32 link_ibf; |
30 | uint32_t filler0; /* filler for proper alignment */ | 31 | u32 filler0; /* filler for proper alignment */ |
31 | uint32_t link_control; | 32 | u32 link_control; |
32 | uint32_t filler1; | 33 | u32 filler1; |
33 | uint32_t link_status; | 34 | u32 link_status; |
34 | uint32_t filler2; | 35 | u32 filler2; |
35 | uint32_t link_arb_upper; | 36 | u32 link_arb_upper; |
36 | uint32_t filler3; | 37 | u32 filler3; |
37 | uint32_t link_arb_lower; | 38 | u32 link_arb_lower; |
38 | uint32_t filler4; | 39 | u32 filler4; |
39 | uint32_t link_status_clr; | 40 | u32 link_status_clr; |
40 | uint32_t filler5; | 41 | u32 filler5; |
41 | uint32_t link_reset; | 42 | u32 link_reset; |
42 | uint32_t filler6; | 43 | u32 filler6; |
43 | uint32_t link_aux_status; | 44 | u32 link_aux_status; |
44 | uint32_t filler7; | 45 | u32 filler7; |
45 | } xb_linkregs_t; | 46 | } xb_linkregs_t; |
46 | 47 | ||
47 | typedef volatile struct xbow_s { | 48 | typedef volatile struct xbow_s { |
48 | /* standard widget configuration 0x000000-0x000057 */ | 49 | /* standard widget configuration 0x000000-0x000057 */ |
49 | struct widget_cfg xb_widget; /* 0x000000 */ | 50 | struct widget_cfg xb_widget; /* 0x000000 */ |
50 | 51 | ||
51 | /* helper fieldnames for accessing bridge widget */ | 52 | /* helper fieldnames for accessing bridge widget */ |
52 | 53 | ||
53 | #define xb_wid_id xb_widget.w_id | 54 | #define xb_wid_id xb_widget.w_id |
54 | #define xb_wid_stat xb_widget.w_status | 55 | #define xb_wid_stat xb_widget.w_status |
55 | #define xb_wid_err_upper xb_widget.w_err_upper_addr | 56 | #define xb_wid_err_upper xb_widget.w_err_upper_addr |
56 | #define xb_wid_err_lower xb_widget.w_err_lower_addr | 57 | #define xb_wid_err_lower xb_widget.w_err_lower_addr |
57 | #define xb_wid_control xb_widget.w_control | 58 | #define xb_wid_control xb_widget.w_control |
58 | #define xb_wid_req_timeout xb_widget.w_req_timeout | 59 | #define xb_wid_req_timeout xb_widget.w_req_timeout |
59 | #define xb_wid_int_upper xb_widget.w_intdest_upper_addr | 60 | #define xb_wid_int_upper xb_widget.w_intdest_upper_addr |
60 | #define xb_wid_int_lower xb_widget.w_intdest_lower_addr | 61 | #define xb_wid_int_lower xb_widget.w_intdest_lower_addr |
61 | #define xb_wid_err_cmdword xb_widget.w_err_cmd_word | 62 | #define xb_wid_err_cmdword xb_widget.w_err_cmd_word |
62 | #define xb_wid_llp xb_widget.w_llp_cfg | 63 | #define xb_wid_llp xb_widget.w_llp_cfg |
63 | #define xb_wid_stat_clr xb_widget.w_tflush | 64 | #define xb_wid_stat_clr xb_widget.w_tflush |
64 | 65 | ||
65 | /* | 66 | /* |
66 | * we access these through synergy unswizzled space, so the address | 67 | * we access these through synergy unswizzled space, so the address |
67 | * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.) | 68 | * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.) |
68 | * That's why we put the register first and filler second. | 69 | * That's why we put the register first and filler second. |
69 | */ | 70 | */ |
70 | /* xbow-specific widget configuration 0x000058-0x0000FF */ | 71 | /* xbow-specific widget configuration 0x000058-0x0000FF */ |
71 | uint32_t xb_wid_arb_reload; /* 0x00005C */ | 72 | u32 xb_wid_arb_reload; /* 0x00005C */ |
72 | uint32_t _pad_000058; | 73 | u32 _pad_000058; |
73 | uint32_t xb_perf_ctr_a; /* 0x000064 */ | 74 | u32 xb_perf_ctr_a; /* 0x000064 */ |
74 | uint32_t _pad_000060; | 75 | u32 _pad_000060; |
75 | uint32_t xb_perf_ctr_b; /* 0x00006c */ | 76 | u32 xb_perf_ctr_b; /* 0x00006c */ |
76 | uint32_t _pad_000068; | 77 | u32 _pad_000068; |
77 | uint32_t xb_nic; /* 0x000074 */ | 78 | u32 xb_nic; /* 0x000074 */ |
78 | uint32_t _pad_000070; | 79 | u32 _pad_000070; |
79 | 80 | ||
80 | /* Xbridge only */ | 81 | /* Xbridge only */ |
81 | uint32_t xb_w0_rst_fnc; /* 0x00007C */ | 82 | u32 xb_w0_rst_fnc; /* 0x00007C */ |
82 | uint32_t _pad_000078; | 83 | u32 _pad_000078; |
83 | uint32_t xb_l8_rst_fnc; /* 0x000084 */ | 84 | u32 xb_l8_rst_fnc; /* 0x000084 */ |
84 | uint32_t _pad_000080; | 85 | u32 _pad_000080; |
85 | uint32_t xb_l9_rst_fnc; /* 0x00008c */ | 86 | u32 xb_l9_rst_fnc; /* 0x00008c */ |
86 | uint32_t _pad_000088; | 87 | u32 _pad_000088; |
87 | uint32_t xb_la_rst_fnc; /* 0x000094 */ | 88 | u32 xb_la_rst_fnc; /* 0x000094 */ |
88 | uint32_t _pad_000090; | 89 | u32 _pad_000090; |
89 | uint32_t xb_lb_rst_fnc; /* 0x00009c */ | 90 | u32 xb_lb_rst_fnc; /* 0x00009c */ |
90 | uint32_t _pad_000098; | 91 | u32 _pad_000098; |
91 | uint32_t xb_lc_rst_fnc; /* 0x0000a4 */ | 92 | u32 xb_lc_rst_fnc; /* 0x0000a4 */ |
92 | uint32_t _pad_0000a0; | 93 | u32 _pad_0000a0; |
93 | uint32_t xb_ld_rst_fnc; /* 0x0000ac */ | 94 | u32 xb_ld_rst_fnc; /* 0x0000ac */ |
94 | uint32_t _pad_0000a8; | 95 | u32 _pad_0000a8; |
95 | uint32_t xb_le_rst_fnc; /* 0x0000b4 */ | 96 | u32 xb_le_rst_fnc; /* 0x0000b4 */ |
96 | uint32_t _pad_0000b0; | 97 | u32 _pad_0000b0; |
97 | uint32_t xb_lf_rst_fnc; /* 0x0000bc */ | 98 | u32 xb_lf_rst_fnc; /* 0x0000bc */ |
98 | uint32_t _pad_0000b8; | 99 | u32 _pad_0000b8; |
99 | uint32_t xb_lock; /* 0x0000c4 */ | 100 | u32 xb_lock; /* 0x0000c4 */ |
100 | uint32_t _pad_0000c0; | 101 | u32 _pad_0000c0; |
101 | uint32_t xb_lock_clr; /* 0x0000cc */ | 102 | u32 xb_lock_clr; /* 0x0000cc */ |
102 | uint32_t _pad_0000c8; | 103 | u32 _pad_0000c8; |
103 | /* end of Xbridge only */ | 104 | /* end of Xbridge only */ |
104 | uint32_t _pad_0000d0[12]; | 105 | u32 _pad_0000d0[12]; |
105 | 106 | ||
106 | /* Link Specific Registers, port 8..15 0x000100-0x000300 */ | 107 | /* Link Specific Registers, port 8..15 0x000100-0x000300 */ |
107 | xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS]; | 108 | xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS]; |
108 | #define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)] | ||
109 | |||
110 | } xbow_t; | 109 | } xbow_t; |
111 | 110 | ||
111 | #define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)] | ||
112 | |||
112 | #define XB_FLAGS_EXISTS 0x1 /* device exists */ | 113 | #define XB_FLAGS_EXISTS 0x1 /* device exists */ |
113 | #define XB_FLAGS_MASTER 0x2 | 114 | #define XB_FLAGS_MASTER 0x2 |
114 | #define XB_FLAGS_SLAVE 0x0 | 115 | #define XB_FLAGS_SLAVE 0x0 |
@@ -160,7 +161,7 @@ typedef volatile struct xbow_s { | |||
160 | /* End of Xbridge only */ | 161 | /* End of Xbridge only */ |
161 | 162 | ||
162 | /* used only in ide, but defined here within the reserved portion */ | 163 | /* used only in ide, but defined here within the reserved portion */ |
163 | /* of the widget0 address space (before 0xf4) */ | 164 | /* of the widget0 address space (before 0xf4) */ |
164 | #define XBOW_WID_UNDEF 0xe4 | 165 | #define XBOW_WID_UNDEF 0xe4 |
165 | 166 | ||
166 | /* xbow link register set base, legal value for x is 0x8..0xf */ | 167 | /* xbow link register set base, legal value for x is 0x8..0xf */ |
@@ -179,29 +180,37 @@ typedef volatile struct xbow_s { | |||
179 | 180 | ||
180 | /* link_control(x) */ | 181 | /* link_control(x) */ |
181 | #define XB_CTRL_LINKALIVE_IE 0x80000000 /* link comes alive */ | 182 | #define XB_CTRL_LINKALIVE_IE 0x80000000 /* link comes alive */ |
182 | /* reserved: 0x40000000 */ | 183 | /* reserved: 0x40000000 */ |
183 | #define XB_CTRL_PERF_CTR_MODE_MSK 0x30000000 /* perf counter mode */ | 184 | #define XB_CTRL_PERF_CTR_MODE_MSK 0x30000000 /* perf counter mode */ |
184 | #define XB_CTRL_IBUF_LEVEL_MSK 0x0e000000 /* input packet buffer level */ | 185 | #define XB_CTRL_IBUF_LEVEL_MSK 0x0e000000 /* input packet buffer |
185 | #define XB_CTRL_8BIT_MODE 0x01000000 /* force link into 8 bit mode */ | 186 | level */ |
186 | #define XB_CTRL_BAD_LLP_PKT 0x00800000 /* force bad LLP packet */ | 187 | #define XB_CTRL_8BIT_MODE 0x01000000 /* force link into 8 |
187 | #define XB_CTRL_WIDGET_CR_MSK 0x007c0000 /* LLP widget credit mask */ | 188 | bit mode */ |
188 | #define XB_CTRL_WIDGET_CR_SHFT 18 /* LLP widget credit shift */ | 189 | #define XB_CTRL_BAD_LLP_PKT 0x00800000 /* force bad LLP |
189 | #define XB_CTRL_ILLEGAL_DST_IE 0x00020000 /* illegal destination */ | 190 | packet */ |
190 | #define XB_CTRL_OALLOC_IBUF_IE 0x00010000 /* overallocated input buffer */ | 191 | #define XB_CTRL_WIDGET_CR_MSK 0x007c0000 /* LLP widget credit |
191 | /* reserved: 0x0000fe00 */ | 192 | mask */ |
193 | #define XB_CTRL_WIDGET_CR_SHFT 18 /* LLP widget credit | ||
194 | shift */ | ||
195 | #define XB_CTRL_ILLEGAL_DST_IE 0x00020000 /* illegal destination | ||
196 | */ | ||
197 | #define XB_CTRL_OALLOC_IBUF_IE 0x00010000 /* overallocated input | ||
198 | buffer */ | ||
199 | /* reserved: 0x0000fe00 */ | ||
192 | #define XB_CTRL_BNDWDTH_ALLOC_IE 0x00000100 /* bandwidth alloc */ | 200 | #define XB_CTRL_BNDWDTH_ALLOC_IE 0x00000100 /* bandwidth alloc */ |
193 | #define XB_CTRL_RCV_CNT_OFLOW_IE 0x00000080 /* rcv retry overflow */ | 201 | #define XB_CTRL_RCV_CNT_OFLOW_IE 0x00000080 /* rcv retry overflow */ |
194 | #define XB_CTRL_XMT_CNT_OFLOW_IE 0x00000040 /* xmt retry overflow */ | 202 | #define XB_CTRL_XMT_CNT_OFLOW_IE 0x00000040 /* xmt retry overflow */ |
195 | #define XB_CTRL_XMT_MAX_RTRY_IE 0x00000020 /* max transmit retry */ | 203 | #define XB_CTRL_XMT_MAX_RTRY_IE 0x00000020 /* max transmit retry */ |
196 | #define XB_CTRL_RCV_IE 0x00000010 /* receive */ | 204 | #define XB_CTRL_RCV_IE 0x00000010 /* receive */ |
197 | #define XB_CTRL_XMT_RTRY_IE 0x00000008 /* transmit retry */ | 205 | #define XB_CTRL_XMT_RTRY_IE 0x00000008 /* transmit retry */ |
198 | /* reserved: 0x00000004 */ | 206 | /* reserved: 0x00000004 */ |
199 | #define XB_CTRL_MAXREQ_TOUT_IE 0x00000002 /* maximum request timeout */ | 207 | #define XB_CTRL_MAXREQ_TOUT_IE 0x00000002 /* maximum request |
208 | timeout */ | ||
200 | #define XB_CTRL_SRC_TOUT_IE 0x00000001 /* source timeout */ | 209 | #define XB_CTRL_SRC_TOUT_IE 0x00000001 /* source timeout */ |
201 | 210 | ||
202 | /* link_status(x) */ | 211 | /* link_status(x) */ |
203 | #define XB_STAT_LINKALIVE XB_CTRL_LINKALIVE_IE | 212 | #define XB_STAT_LINKALIVE XB_CTRL_LINKALIVE_IE |
204 | /* reserved: 0x7ff80000 */ | 213 | /* reserved: 0x7ff80000 */ |
205 | #define XB_STAT_MULTI_ERR 0x00040000 /* multi error */ | 214 | #define XB_STAT_MULTI_ERR 0x00040000 /* multi error */ |
206 | #define XB_STAT_ILLEGAL_DST_ERR XB_CTRL_ILLEGAL_DST_IE | 215 | #define XB_STAT_ILLEGAL_DST_ERR XB_CTRL_ILLEGAL_DST_IE |
207 | #define XB_STAT_OALLOC_IBUF_ERR XB_CTRL_OALLOC_IBUF_IE | 216 | #define XB_STAT_OALLOC_IBUF_ERR XB_CTRL_OALLOC_IBUF_IE |
@@ -211,7 +220,7 @@ typedef volatile struct xbow_s { | |||
211 | #define XB_STAT_XMT_MAX_RTRY_ERR XB_CTRL_XMT_MAX_RTRY_IE | 220 | #define XB_STAT_XMT_MAX_RTRY_ERR XB_CTRL_XMT_MAX_RTRY_IE |
212 | #define XB_STAT_RCV_ERR XB_CTRL_RCV_IE | 221 | #define XB_STAT_RCV_ERR XB_CTRL_RCV_IE |
213 | #define XB_STAT_XMT_RTRY_ERR XB_CTRL_XMT_RTRY_IE | 222 | #define XB_STAT_XMT_RTRY_ERR XB_CTRL_XMT_RTRY_IE |
214 | /* reserved: 0x00000004 */ | 223 | /* reserved: 0x00000004 */ |
215 | #define XB_STAT_MAXREQ_TOUT_ERR XB_CTRL_MAXREQ_TOUT_IE | 224 | #define XB_STAT_MAXREQ_TOUT_ERR XB_CTRL_MAXREQ_TOUT_IE |
216 | #define XB_STAT_SRC_TOUT_ERR XB_CTRL_SRC_TOUT_IE | 225 | #define XB_STAT_SRC_TOUT_ERR XB_CTRL_SRC_TOUT_IE |
217 | 226 | ||
@@ -222,7 +231,7 @@ typedef volatile struct xbow_s { | |||
222 | #define XB_AUX_LINKFAIL_RST_BAD 0x00000040 | 231 | #define XB_AUX_LINKFAIL_RST_BAD 0x00000040 |
223 | #define XB_AUX_STAT_PRESENT 0x00000020 | 232 | #define XB_AUX_STAT_PRESENT 0x00000020 |
224 | #define XB_AUX_STAT_PORT_WIDTH 0x00000010 | 233 | #define XB_AUX_STAT_PORT_WIDTH 0x00000010 |
225 | /* reserved: 0x0000000f */ | 234 | /* reserved: 0x0000000f */ |
226 | 235 | ||
227 | /* | 236 | /* |
228 | * link_arb_upper/link_arb_lower(x), (reg) should be the link_arb_upper | 237 | * link_arb_upper/link_arb_lower(x), (reg) should be the link_arb_upper |
@@ -238,7 +247,8 @@ typedef volatile struct xbow_s { | |||
238 | /* XBOW_WID_STAT */ | 247 | /* XBOW_WID_STAT */ |
239 | #define XB_WID_STAT_LINK_INTR_SHFT (24) | 248 | #define XB_WID_STAT_LINK_INTR_SHFT (24) |
240 | #define XB_WID_STAT_LINK_INTR_MASK (0xFF << XB_WID_STAT_LINK_INTR_SHFT) | 249 | #define XB_WID_STAT_LINK_INTR_MASK (0xFF << XB_WID_STAT_LINK_INTR_SHFT) |
241 | #define XB_WID_STAT_LINK_INTR(x) (0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT)) | 250 | #define XB_WID_STAT_LINK_INTR(x) \ |
251 | (0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT)) | ||
242 | #define XB_WID_STAT_WIDGET0_INTR 0x00800000 | 252 | #define XB_WID_STAT_WIDGET0_INTR 0x00800000 |
243 | #define XB_WID_STAT_SRCID_MASK 0x000003c0 /* Xbridge only */ | 253 | #define XB_WID_STAT_SRCID_MASK 0x000003c0 /* Xbridge only */ |
244 | #define XB_WID_STAT_REG_ACC_ERR 0x00000020 | 254 | #define XB_WID_STAT_REG_ACC_ERR 0x00000020 |
@@ -264,7 +274,7 @@ typedef volatile struct xbow_s { | |||
264 | #define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbridge */ | 274 | #define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbridge */ |
265 | #define XBOW_WIDGET_MFGR_NUM 0x0 | 275 | #define XBOW_WIDGET_MFGR_NUM 0x0 |
266 | #define XXBOW_WIDGET_MFGR_NUM 0x0 | 276 | #define XXBOW_WIDGET_MFGR_NUM 0x0 |
267 | #define PXBOW_WIDGET_PART_NUM 0xd100 /* PIC */ | 277 | #define PXBOW_WIDGET_PART_NUM 0xd100 /* PIC */ |
268 | 278 | ||
269 | #define XBOW_REV_1_0 0x1 /* xbow rev 1.0 is "1" */ | 279 | #define XBOW_REV_1_0 0x1 /* xbow rev 1.0 is "1" */ |
270 | #define XBOW_REV_1_1 0x2 /* xbow rev 1.1 is "2" */ | 280 | #define XBOW_REV_1_1 0x2 /* xbow rev 1.1 is "2" */ |
@@ -279,13 +289,13 @@ typedef volatile struct xbow_s { | |||
279 | #define XBOW_WID_ARB_RELOAD_INT 0x3f /* GBR reload interval */ | 289 | #define XBOW_WID_ARB_RELOAD_INT 0x3f /* GBR reload interval */ |
280 | 290 | ||
281 | #define IS_XBRIDGE_XBOW(wid) \ | 291 | #define IS_XBRIDGE_XBOW(wid) \ |
282 | (XWIDGET_PART_NUM(wid) == XXBOW_WIDGET_PART_NUM && \ | 292 | (XWIDGET_PART_NUM(wid) == XXBOW_WIDGET_PART_NUM && \ |
283 | XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM) | 293 | XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM) |
284 | 294 | ||
285 | #define IS_PIC_XBOW(wid) \ | 295 | #define IS_PIC_XBOW(wid) \ |
286 | (XWIDGET_PART_NUM(wid) == PXBOW_WIDGET_PART_NUM && \ | 296 | (XWIDGET_PART_NUM(wid) == PXBOW_WIDGET_PART_NUM && \ |
287 | XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM) | 297 | XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM) |
288 | 298 | ||
289 | #define XBOW_WAR_ENABLED(pv, widid) ((1 << XWIDGET_REV_NUM(widid)) & pv) | 299 | #define XBOW_WAR_ENABLED(pv, widid) ((1 << XWIDGET_REV_NUM(widid)) & pv) |
290 | 300 | ||
291 | #endif /* _ASM_IA64_SN_XTALK_XBOW_H */ | 301 | #endif /* _ASM_IA64_SN_XTALK_XBOW_H */ |
diff --git a/arch/ia64/sn/include/xtalk/xwidgetdev.h b/arch/ia64/sn/include/xtalk/xwidgetdev.h index c5f4bc5cc033..2800eda0fd68 100644 --- a/arch/ia64/sn/include/xtalk/xwidgetdev.h +++ b/arch/ia64/sn/include/xtalk/xwidgetdev.h | |||
@@ -25,28 +25,28 @@ | |||
25 | 25 | ||
26 | /* widget configuration registers */ | 26 | /* widget configuration registers */ |
27 | struct widget_cfg{ | 27 | struct widget_cfg{ |
28 | uint32_t w_id; /* 0x04 */ | 28 | u32 w_id; /* 0x04 */ |
29 | uint32_t w_pad_0; /* 0x00 */ | 29 | u32 w_pad_0; /* 0x00 */ |
30 | uint32_t w_status; /* 0x0c */ | 30 | u32 w_status; /* 0x0c */ |
31 | uint32_t w_pad_1; /* 0x08 */ | 31 | u32 w_pad_1; /* 0x08 */ |
32 | uint32_t w_err_upper_addr; /* 0x14 */ | 32 | u32 w_err_upper_addr; /* 0x14 */ |
33 | uint32_t w_pad_2; /* 0x10 */ | 33 | u32 w_pad_2; /* 0x10 */ |
34 | uint32_t w_err_lower_addr; /* 0x1c */ | 34 | u32 w_err_lower_addr; /* 0x1c */ |
35 | uint32_t w_pad_3; /* 0x18 */ | 35 | u32 w_pad_3; /* 0x18 */ |
36 | uint32_t w_control; /* 0x24 */ | 36 | u32 w_control; /* 0x24 */ |
37 | uint32_t w_pad_4; /* 0x20 */ | 37 | u32 w_pad_4; /* 0x20 */ |
38 | uint32_t w_req_timeout; /* 0x2c */ | 38 | u32 w_req_timeout; /* 0x2c */ |
39 | uint32_t w_pad_5; /* 0x28 */ | 39 | u32 w_pad_5; /* 0x28 */ |
40 | uint32_t w_intdest_upper_addr; /* 0x34 */ | 40 | u32 w_intdest_upper_addr; /* 0x34 */ |
41 | uint32_t w_pad_6; /* 0x30 */ | 41 | u32 w_pad_6; /* 0x30 */ |
42 | uint32_t w_intdest_lower_addr; /* 0x3c */ | 42 | u32 w_intdest_lower_addr; /* 0x3c */ |
43 | uint32_t w_pad_7; /* 0x38 */ | 43 | u32 w_pad_7; /* 0x38 */ |
44 | uint32_t w_err_cmd_word; /* 0x44 */ | 44 | u32 w_err_cmd_word; /* 0x44 */ |
45 | uint32_t w_pad_8; /* 0x40 */ | 45 | u32 w_pad_8; /* 0x40 */ |
46 | uint32_t w_llp_cfg; /* 0x4c */ | 46 | u32 w_llp_cfg; /* 0x4c */ |
47 | uint32_t w_pad_9; /* 0x48 */ | 47 | u32 w_pad_9; /* 0x48 */ |
48 | uint32_t w_tflush; /* 0x54 */ | 48 | u32 w_tflush; /* 0x54 */ |
49 | uint32_t w_pad_10; /* 0x50 */ | 49 | u32 w_pad_10; /* 0x50 */ |
50 | }; | 50 | }; |
51 | 51 | ||
52 | /* | 52 | /* |
@@ -63,7 +63,7 @@ struct xwidget_info{ | |||
63 | struct xwidget_hwid xwi_hwid; /* Widget Identification */ | 63 | struct xwidget_hwid xwi_hwid; /* Widget Identification */ |
64 | char xwi_masterxid; /* Hub's Widget Port Number */ | 64 | char xwi_masterxid; /* Hub's Widget Port Number */ |
65 | void *xwi_hubinfo; /* Hub's provider private info */ | 65 | void *xwi_hubinfo; /* Hub's provider private info */ |
66 | uint64_t *xwi_hub_provider; /* prom provider functions */ | 66 | u64 *xwi_hub_provider; /* prom provider functions */ |
67 | void *xwi_vertex; | 67 | void *xwi_vertex; |
68 | }; | 68 | }; |
69 | 69 | ||
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c index 258d9d7aff98..233d55115d33 100644 --- a/arch/ia64/sn/kernel/io_init.c +++ b/arch/ia64/sn/kernel/io_init.c | |||
@@ -132,8 +132,8 @@ static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address) | |||
132 | * Retrieve the pci device information given the bus and device|function number. | 132 | * Retrieve the pci device information given the bus and device|function number. |
133 | */ | 133 | */ |
134 | static inline u64 | 134 | static inline u64 |
135 | sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, | 135 | sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, |
136 | u64 sn_irq_info) | 136 | u64 sn_irq_info) |
137 | { | 137 | { |
138 | struct ia64_sal_retval ret_stuff; | 138 | struct ia64_sal_retval ret_stuff; |
139 | ret_stuff.status = 0; | 139 | ret_stuff.status = 0; |
@@ -141,7 +141,7 @@ sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, | |||
141 | 141 | ||
142 | SAL_CALL_NOLOCK(ret_stuff, | 142 | SAL_CALL_NOLOCK(ret_stuff, |
143 | (u64) SN_SAL_IOIF_GET_PCIDEV_INFO, | 143 | (u64) SN_SAL_IOIF_GET_PCIDEV_INFO, |
144 | (u64) segment, (u64) bus_number, (u64) devfn, | 144 | (u64) segment, (u64) bus_number, (u64) devfn, |
145 | (u64) pci_dev, | 145 | (u64) pci_dev, |
146 | sn_irq_info, 0, 0); | 146 | sn_irq_info, 0, 0); |
147 | return ret_stuff.v0; | 147 | return ret_stuff.v0; |
@@ -268,7 +268,7 @@ static void sn_fixup_ionodes(void) | |||
268 | */ | 268 | */ |
269 | static void | 269 | static void |
270 | sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, | 270 | sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, |
271 | int64_t * pci_addrs) | 271 | s64 * pci_addrs) |
272 | { | 272 | { |
273 | struct pci_controller *controller = PCI_CONTROLLER(dev->bus); | 273 | struct pci_controller *controller = PCI_CONTROLLER(dev->bus); |
274 | unsigned int i; | 274 | unsigned int i; |
@@ -328,7 +328,7 @@ void sn_pci_fixup_slot(struct pci_dev *dev) | |||
328 | struct pci_bus *host_pci_bus; | 328 | struct pci_bus *host_pci_bus; |
329 | struct pci_dev *host_pci_dev; | 329 | struct pci_dev *host_pci_dev; |
330 | struct pcidev_info *pcidev_info; | 330 | struct pcidev_info *pcidev_info; |
331 | int64_t pci_addrs[PCI_ROM_RESOURCE + 1]; | 331 | s64 pci_addrs[PCI_ROM_RESOURCE + 1]; |
332 | struct sn_irq_info *sn_irq_info; | 332 | struct sn_irq_info *sn_irq_info; |
333 | unsigned long size; | 333 | unsigned long size; |
334 | unsigned int bus_no, devfn; | 334 | unsigned int bus_no, devfn; |
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 01d18b7b5bb3..ec37084bdc17 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c | |||
@@ -28,7 +28,7 @@ extern int sn_ioif_inited; | |||
28 | static struct list_head **sn_irq_lh; | 28 | static struct list_head **sn_irq_lh; |
29 | static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */ | 29 | static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */ |
30 | 30 | ||
31 | static inline uint64_t sn_intr_alloc(nasid_t local_nasid, int local_widget, | 31 | static inline u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, |
32 | u64 sn_irq_info, | 32 | u64 sn_irq_info, |
33 | int req_irq, nasid_t req_nasid, | 33 | int req_irq, nasid_t req_nasid, |
34 | int req_slice) | 34 | int req_slice) |
@@ -123,7 +123,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) | |||
123 | 123 | ||
124 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, | 124 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, |
125 | sn_irq_lh[irq], list) { | 125 | sn_irq_lh[irq], list) { |
126 | uint64_t bridge; | 126 | u64 bridge; |
127 | int local_widget, status; | 127 | int local_widget, status; |
128 | nasid_t local_nasid; | 128 | nasid_t local_nasid; |
129 | struct sn_irq_info *new_irq_info; | 129 | struct sn_irq_info *new_irq_info; |
@@ -134,7 +134,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) | |||
134 | break; | 134 | break; |
135 | memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info)); | 135 | memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info)); |
136 | 136 | ||
137 | bridge = (uint64_t) new_irq_info->irq_bridge; | 137 | bridge = (u64) new_irq_info->irq_bridge; |
138 | if (!bridge) { | 138 | if (!bridge) { |
139 | kfree(new_irq_info); | 139 | kfree(new_irq_info); |
140 | break; /* irq is not a device interrupt */ | 140 | break; /* irq is not a device interrupt */ |
@@ -349,10 +349,10 @@ static void force_interrupt(int irq) | |||
349 | */ | 349 | */ |
350 | static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) | 350 | static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) |
351 | { | 351 | { |
352 | uint64_t regval; | 352 | u64 regval; |
353 | int irr_reg_num; | 353 | int irr_reg_num; |
354 | int irr_bit; | 354 | int irr_bit; |
355 | uint64_t irr_reg; | 355 | u64 irr_reg; |
356 | struct pcidev_info *pcidev_info; | 356 | struct pcidev_info *pcidev_info; |
357 | struct pcibus_info *pcibus_info; | 357 | struct pcibus_info *pcibus_info; |
358 | 358 | ||
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c index 6a7939b16a1c..d263d3e8fbb9 100644 --- a/arch/ia64/sn/kernel/tiocx.c +++ b/arch/ia64/sn/kernel/tiocx.c | |||
@@ -245,7 +245,7 @@ static int cx_device_reload(struct cx_dev *cx_dev) | |||
245 | cx_dev->bt); | 245 | cx_dev->bt); |
246 | } | 246 | } |
247 | 247 | ||
248 | static inline uint64_t tiocx_intr_alloc(nasid_t nasid, int widget, | 248 | static inline u64 tiocx_intr_alloc(nasid_t nasid, int widget, |
249 | u64 sn_irq_info, | 249 | u64 sn_irq_info, |
250 | int req_irq, nasid_t req_nasid, | 250 | int req_irq, nasid_t req_nasid, |
251 | int req_slice) | 251 | int req_slice) |
@@ -302,7 +302,7 @@ struct sn_irq_info *tiocx_irq_alloc(nasid_t nasid, int widget, int irq, | |||
302 | 302 | ||
303 | void tiocx_irq_free(struct sn_irq_info *sn_irq_info) | 303 | void tiocx_irq_free(struct sn_irq_info *sn_irq_info) |
304 | { | 304 | { |
305 | uint64_t bridge = (uint64_t) sn_irq_info->irq_bridge; | 305 | u64 bridge = (u64) sn_irq_info->irq_bridge; |
306 | nasid_t nasid = NASID_GET(bridge); | 306 | nasid_t nasid = NASID_GET(bridge); |
307 | int widget; | 307 | int widget; |
308 | 308 | ||
@@ -313,12 +313,12 @@ void tiocx_irq_free(struct sn_irq_info *sn_irq_info) | |||
313 | } | 313 | } |
314 | } | 314 | } |
315 | 315 | ||
316 | uint64_t tiocx_dma_addr(uint64_t addr) | 316 | u64 tiocx_dma_addr(u64 addr) |
317 | { | 317 | { |
318 | return PHYS_TO_TIODMA(addr); | 318 | return PHYS_TO_TIODMA(addr); |
319 | } | 319 | } |
320 | 320 | ||
321 | uint64_t tiocx_swin_base(int nasid) | 321 | u64 tiocx_swin_base(int nasid) |
322 | { | 322 | { |
323 | return TIO_SWIN_BASE(nasid, TIOCX_CORELET); | 323 | return TIO_SWIN_BASE(nasid, TIOCX_CORELET); |
324 | } | 324 | } |
@@ -335,8 +335,8 @@ EXPORT_SYMBOL(tiocx_swin_base); | |||
335 | 335 | ||
336 | static void tio_conveyor_set(nasid_t nasid, int enable_flag) | 336 | static void tio_conveyor_set(nasid_t nasid, int enable_flag) |
337 | { | 337 | { |
338 | uint64_t ice_frz; | 338 | u64 ice_frz; |
339 | uint64_t disable_cb = (1ull << 61); | 339 | u64 disable_cb = (1ull << 61); |
340 | 340 | ||
341 | if (!(nasid & 1)) | 341 | if (!(nasid & 1)) |
342 | return; | 342 | return; |
@@ -388,7 +388,7 @@ static int is_fpga_tio(int nasid, int *bt) | |||
388 | 388 | ||
389 | static int bitstream_loaded(nasid_t nasid) | 389 | static int bitstream_loaded(nasid_t nasid) |
390 | { | 390 | { |
391 | uint64_t cx_credits; | 391 | u64 cx_credits; |
392 | 392 | ||
393 | cx_credits = REMOTE_HUB_L(nasid, TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3); | 393 | cx_credits = REMOTE_HUB_L(nasid, TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3); |
394 | cx_credits &= TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3_CREDIT_CNT_MASK; | 394 | cx_credits &= TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3_CREDIT_CNT_MASK; |
@@ -404,14 +404,14 @@ static int tiocx_reload(struct cx_dev *cx_dev) | |||
404 | nasid_t nasid = cx_dev->cx_id.nasid; | 404 | nasid_t nasid = cx_dev->cx_id.nasid; |
405 | 405 | ||
406 | if (bitstream_loaded(nasid)) { | 406 | if (bitstream_loaded(nasid)) { |
407 | uint64_t cx_id; | 407 | u64 cx_id; |
408 | int rv; | 408 | int rv; |
409 | 409 | ||
410 | rv = ia64_sn_sysctl_tio_clock_reset(nasid); | 410 | rv = ia64_sn_sysctl_tio_clock_reset(nasid); |
411 | if (rv) { | 411 | if (rv) { |
412 | printk(KERN_ALERT "CX port JTAG reset failed.\n"); | 412 | printk(KERN_ALERT "CX port JTAG reset failed.\n"); |
413 | } else { | 413 | } else { |
414 | cx_id = *(volatile uint64_t *) | 414 | cx_id = *(volatile u64 *) |
415 | (TIO_SWIN_BASE(nasid, TIOCX_CORELET) + | 415 | (TIO_SWIN_BASE(nasid, TIOCX_CORELET) + |
416 | WIDGET_ID); | 416 | WIDGET_ID); |
417 | part_num = XWIDGET_PART_NUM(cx_id); | 417 | part_num = XWIDGET_PART_NUM(cx_id); |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_ate.c b/arch/ia64/sn/pci/pcibr/pcibr_ate.c index d1647b863e61..aa3fa5152a32 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_ate.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_ate.c | |||
@@ -18,10 +18,10 @@ int pcibr_invalidate_ate = 0; /* by default don't invalidate ATE on free */ | |||
18 | * mark_ate: Mark the ate as either free or inuse. | 18 | * mark_ate: Mark the ate as either free or inuse. |
19 | */ | 19 | */ |
20 | static void mark_ate(struct ate_resource *ate_resource, int start, int number, | 20 | static void mark_ate(struct ate_resource *ate_resource, int start, int number, |
21 | uint64_t value) | 21 | u64 value) |
22 | { | 22 | { |
23 | 23 | ||
24 | uint64_t *ate = ate_resource->ate; | 24 | u64 *ate = ate_resource->ate; |
25 | int index; | 25 | int index; |
26 | int length = 0; | 26 | int length = 0; |
27 | 27 | ||
@@ -38,7 +38,7 @@ static int find_free_ate(struct ate_resource *ate_resource, int start, | |||
38 | int count) | 38 | int count) |
39 | { | 39 | { |
40 | 40 | ||
41 | uint64_t *ate = ate_resource->ate; | 41 | u64 *ate = ate_resource->ate; |
42 | int index; | 42 | int index; |
43 | int start_free; | 43 | int start_free; |
44 | 44 | ||
@@ -119,7 +119,7 @@ static inline int alloc_ate_resource(struct ate_resource *ate_resource, | |||
119 | int pcibr_ate_alloc(struct pcibus_info *pcibus_info, int count) | 119 | int pcibr_ate_alloc(struct pcibus_info *pcibus_info, int count) |
120 | { | 120 | { |
121 | int status = 0; | 121 | int status = 0; |
122 | uint64_t flag; | 122 | u64 flag; |
123 | 123 | ||
124 | flag = pcibr_lock(pcibus_info); | 124 | flag = pcibr_lock(pcibus_info); |
125 | status = alloc_ate_resource(&pcibus_info->pbi_int_ate_resource, count); | 125 | status = alloc_ate_resource(&pcibus_info->pbi_int_ate_resource, count); |
@@ -139,7 +139,7 @@ int pcibr_ate_alloc(struct pcibus_info *pcibus_info, int count) | |||
139 | * Setup an Address Translation Entry as specified. Use either the Bridge | 139 | * Setup an Address Translation Entry as specified. Use either the Bridge |
140 | * internal maps or the external map RAM, as appropriate. | 140 | * internal maps or the external map RAM, as appropriate. |
141 | */ | 141 | */ |
142 | static inline uint64_t *pcibr_ate_addr(struct pcibus_info *pcibus_info, | 142 | static inline u64 *pcibr_ate_addr(struct pcibus_info *pcibus_info, |
143 | int ate_index) | 143 | int ate_index) |
144 | { | 144 | { |
145 | if (ate_index < pcibus_info->pbi_int_ate_size) { | 145 | if (ate_index < pcibus_info->pbi_int_ate_size) { |
@@ -153,7 +153,7 @@ static inline uint64_t *pcibr_ate_addr(struct pcibus_info *pcibus_info, | |||
153 | */ | 153 | */ |
154 | void inline | 154 | void inline |
155 | ate_write(struct pcibus_info *pcibus_info, int ate_index, int count, | 155 | ate_write(struct pcibus_info *pcibus_info, int ate_index, int count, |
156 | volatile uint64_t ate) | 156 | volatile u64 ate) |
157 | { | 157 | { |
158 | while (count-- > 0) { | 158 | while (count-- > 0) { |
159 | if (ate_index < pcibus_info->pbi_int_ate_size) { | 159 | if (ate_index < pcibus_info->pbi_int_ate_size) { |
@@ -171,9 +171,9 @@ ate_write(struct pcibus_info *pcibus_info, int ate_index, int count, | |||
171 | void pcibr_ate_free(struct pcibus_info *pcibus_info, int index) | 171 | void pcibr_ate_free(struct pcibus_info *pcibus_info, int index) |
172 | { | 172 | { |
173 | 173 | ||
174 | volatile uint64_t ate; | 174 | volatile u64 ate; |
175 | int count; | 175 | int count; |
176 | uint64_t flags; | 176 | u64 flags; |
177 | 177 | ||
178 | if (pcibr_invalidate_ate) { | 178 | if (pcibr_invalidate_ate) { |
179 | /* For debugging purposes, clear the valid bit in the ATE */ | 179 | /* For debugging purposes, clear the valid bit in the ATE */ |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index e68332d93171..54ce5b7ceed2 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c | |||
@@ -41,21 +41,21 @@ extern int sn_ioif_inited; | |||
41 | 41 | ||
42 | static dma_addr_t | 42 | static dma_addr_t |
43 | pcibr_dmamap_ate32(struct pcidev_info *info, | 43 | pcibr_dmamap_ate32(struct pcidev_info *info, |
44 | uint64_t paddr, size_t req_size, uint64_t flags) | 44 | u64 paddr, size_t req_size, u64 flags) |
45 | { | 45 | { |
46 | 46 | ||
47 | struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info; | 47 | struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info; |
48 | struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info-> | 48 | struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info-> |
49 | pdi_pcibus_info; | 49 | pdi_pcibus_info; |
50 | uint8_t internal_device = (PCI_SLOT(pcidev_info->pdi_host_pcidev_info-> | 50 | u8 internal_device = (PCI_SLOT(pcidev_info->pdi_host_pcidev_info-> |
51 | pdi_linux_pcidev->devfn)) - 1; | 51 | pdi_linux_pcidev->devfn)) - 1; |
52 | int ate_count; | 52 | int ate_count; |
53 | int ate_index; | 53 | int ate_index; |
54 | uint64_t ate_flags = flags | PCI32_ATE_V; | 54 | u64 ate_flags = flags | PCI32_ATE_V; |
55 | uint64_t ate; | 55 | u64 ate; |
56 | uint64_t pci_addr; | 56 | u64 pci_addr; |
57 | uint64_t xio_addr; | 57 | u64 xio_addr; |
58 | uint64_t offset; | 58 | u64 offset; |
59 | 59 | ||
60 | /* PIC in PCI-X mode does not supports 32bit PageMap mode */ | 60 | /* PIC in PCI-X mode does not supports 32bit PageMap mode */ |
61 | if (IS_PIC_SOFT(pcibus_info) && IS_PCIX(pcibus_info)) { | 61 | if (IS_PIC_SOFT(pcibus_info) && IS_PCIX(pcibus_info)) { |
@@ -109,12 +109,12 @@ pcibr_dmamap_ate32(struct pcidev_info *info, | |||
109 | } | 109 | } |
110 | 110 | ||
111 | static dma_addr_t | 111 | static dma_addr_t |
112 | pcibr_dmatrans_direct64(struct pcidev_info * info, uint64_t paddr, | 112 | pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr, |
113 | uint64_t dma_attributes) | 113 | u64 dma_attributes) |
114 | { | 114 | { |
115 | struct pcibus_info *pcibus_info = (struct pcibus_info *) | 115 | struct pcibus_info *pcibus_info = (struct pcibus_info *) |
116 | ((info->pdi_host_pcidev_info)->pdi_pcibus_info); | 116 | ((info->pdi_host_pcidev_info)->pdi_pcibus_info); |
117 | uint64_t pci_addr; | 117 | u64 pci_addr; |
118 | 118 | ||
119 | /* Translate to Crosstalk View of Physical Address */ | 119 | /* Translate to Crosstalk View of Physical Address */ |
120 | pci_addr = (IS_PIC_SOFT(pcibus_info) ? PHYS_TO_DMA(paddr) : | 120 | pci_addr = (IS_PIC_SOFT(pcibus_info) ? PHYS_TO_DMA(paddr) : |
@@ -127,7 +127,7 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, uint64_t paddr, | |||
127 | /* Handle Bridge Chipset differences */ | 127 | /* Handle Bridge Chipset differences */ |
128 | if (IS_PIC_SOFT(pcibus_info)) { | 128 | if (IS_PIC_SOFT(pcibus_info)) { |
129 | pci_addr |= | 129 | pci_addr |= |
130 | ((uint64_t) pcibus_info-> | 130 | ((u64) pcibus_info-> |
131 | pbi_hub_xid << PIC_PCI64_ATTR_TARG_SHFT); | 131 | pbi_hub_xid << PIC_PCI64_ATTR_TARG_SHFT); |
132 | } else | 132 | } else |
133 | pci_addr |= TIOCP_PCI64_CMDTYPE_MEM; | 133 | pci_addr |= TIOCP_PCI64_CMDTYPE_MEM; |
@@ -142,17 +142,17 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, uint64_t paddr, | |||
142 | 142 | ||
143 | static dma_addr_t | 143 | static dma_addr_t |
144 | pcibr_dmatrans_direct32(struct pcidev_info * info, | 144 | pcibr_dmatrans_direct32(struct pcidev_info * info, |
145 | uint64_t paddr, size_t req_size, uint64_t flags) | 145 | u64 paddr, size_t req_size, u64 flags) |
146 | { | 146 | { |
147 | 147 | ||
148 | struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info; | 148 | struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info; |
149 | struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info-> | 149 | struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info-> |
150 | pdi_pcibus_info; | 150 | pdi_pcibus_info; |
151 | uint64_t xio_addr; | 151 | u64 xio_addr; |
152 | 152 | ||
153 | uint64_t xio_base; | 153 | u64 xio_base; |
154 | uint64_t offset; | 154 | u64 offset; |
155 | uint64_t endoff; | 155 | u64 endoff; |
156 | 156 | ||
157 | if (IS_PCIX(pcibus_info)) { | 157 | if (IS_PCIX(pcibus_info)) { |
158 | return 0; | 158 | return 0; |
@@ -209,14 +209,14 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction) | |||
209 | * unlike the PIC Device(x) Write Request Buffer Flush register. | 209 | * unlike the PIC Device(x) Write Request Buffer Flush register. |
210 | */ | 210 | */ |
211 | 211 | ||
212 | void sn_dma_flush(uint64_t addr) | 212 | void sn_dma_flush(u64 addr) |
213 | { | 213 | { |
214 | nasid_t nasid; | 214 | nasid_t nasid; |
215 | int is_tio; | 215 | int is_tio; |
216 | int wid_num; | 216 | int wid_num; |
217 | int i, j; | 217 | int i, j; |
218 | uint64_t flags; | 218 | u64 flags; |
219 | uint64_t itte; | 219 | u64 itte; |
220 | struct hubdev_info *hubinfo; | 220 | struct hubdev_info *hubinfo; |
221 | volatile struct sn_flush_device_kernel *p; | 221 | volatile struct sn_flush_device_kernel *p; |
222 | volatile struct sn_flush_device_common *common; | 222 | volatile struct sn_flush_device_common *common; |
@@ -299,8 +299,8 @@ void sn_dma_flush(uint64_t addr) | |||
299 | * If CE ever needs the sn_dma_flush mechanism, we will have | 299 | * If CE ever needs the sn_dma_flush mechanism, we will have |
300 | * to account for that here and in tioce_bus_fixup(). | 300 | * to account for that here and in tioce_bus_fixup(). |
301 | */ | 301 | */ |
302 | uint32_t tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID)); | 302 | u32 tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID)); |
303 | uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id); | 303 | u32 revnum = XWIDGET_PART_REV_NUM(tio_id); |
304 | 304 | ||
305 | /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */ | 305 | /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */ |
306 | if ((1 << XWIDGET_PART_REV_NUM_REV(revnum)) & PV907516) { | 306 | if ((1 << XWIDGET_PART_REV_NUM_REV(revnum)) & PV907516) { |
@@ -315,7 +315,7 @@ void sn_dma_flush(uint64_t addr) | |||
315 | *common->sfdl_flush_addr = 0; | 315 | *common->sfdl_flush_addr = 0; |
316 | 316 | ||
317 | /* force an interrupt. */ | 317 | /* force an interrupt. */ |
318 | *(volatile uint32_t *)(common->sfdl_force_int_addr) = 1; | 318 | *(volatile u32 *)(common->sfdl_force_int_addr) = 1; |
319 | 319 | ||
320 | /* wait for the interrupt to come back. */ | 320 | /* wait for the interrupt to come back. */ |
321 | while (*(common->sfdl_flush_addr) != 0x10f) | 321 | while (*(common->sfdl_flush_addr) != 0x10f) |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c index e328e948175d..77a1262751d3 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c | |||
@@ -23,7 +23,7 @@ int | |||
23 | sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp) | 23 | sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp) |
24 | { | 24 | { |
25 | struct ia64_sal_retval ret_stuff; | 25 | struct ia64_sal_retval ret_stuff; |
26 | uint64_t busnum; | 26 | u64 busnum; |
27 | 27 | ||
28 | ret_stuff.status = 0; | 28 | ret_stuff.status = 0; |
29 | ret_stuff.v0 = 0; | 29 | ret_stuff.v0 = 0; |
@@ -40,7 +40,7 @@ sal_pcibr_slot_disable(struct pcibus_info *soft, int device, int action, | |||
40 | void *resp) | 40 | void *resp) |
41 | { | 41 | { |
42 | struct ia64_sal_retval ret_stuff; | 42 | struct ia64_sal_retval ret_stuff; |
43 | uint64_t busnum; | 43 | u64 busnum; |
44 | 44 | ||
45 | ret_stuff.status = 0; | 45 | ret_stuff.status = 0; |
46 | ret_stuff.v0 = 0; | 46 | ret_stuff.v0 = 0; |
@@ -56,7 +56,7 @@ sal_pcibr_slot_disable(struct pcibus_info *soft, int device, int action, | |||
56 | static int sal_pcibr_error_interrupt(struct pcibus_info *soft) | 56 | static int sal_pcibr_error_interrupt(struct pcibus_info *soft) |
57 | { | 57 | { |
58 | struct ia64_sal_retval ret_stuff; | 58 | struct ia64_sal_retval ret_stuff; |
59 | uint64_t busnum; | 59 | u64 busnum; |
60 | int segment; | 60 | int segment; |
61 | ret_stuff.status = 0; | 61 | ret_stuff.status = 0; |
62 | ret_stuff.v0 = 0; | 62 | ret_stuff.v0 = 0; |
@@ -159,9 +159,9 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
159 | /* Setup the PMU ATE map */ | 159 | /* Setup the PMU ATE map */ |
160 | soft->pbi_int_ate_resource.lowest_free_index = 0; | 160 | soft->pbi_int_ate_resource.lowest_free_index = 0; |
161 | soft->pbi_int_ate_resource.ate = | 161 | soft->pbi_int_ate_resource.ate = |
162 | kmalloc(soft->pbi_int_ate_size * sizeof(uint64_t), GFP_KERNEL); | 162 | kmalloc(soft->pbi_int_ate_size * sizeof(u64), GFP_KERNEL); |
163 | memset(soft->pbi_int_ate_resource.ate, 0, | 163 | memset(soft->pbi_int_ate_resource.ate, 0, |
164 | (soft->pbi_int_ate_size * sizeof(uint64_t))); | 164 | (soft->pbi_int_ate_size * sizeof(u64))); |
165 | 165 | ||
166 | if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) { | 166 | if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) { |
167 | /* TIO PCI Bridge: find nearest node with CPUs */ | 167 | /* TIO PCI Bridge: find nearest node with CPUs */ |
@@ -203,7 +203,7 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) | |||
203 | struct pcidev_info *pcidev_info; | 203 | struct pcidev_info *pcidev_info; |
204 | struct pcibus_info *pcibus_info; | 204 | struct pcibus_info *pcibus_info; |
205 | int bit = sn_irq_info->irq_int_bit; | 205 | int bit = sn_irq_info->irq_int_bit; |
206 | uint64_t xtalk_addr = sn_irq_info->irq_xtalkaddr; | 206 | u64 xtalk_addr = sn_irq_info->irq_xtalkaddr; |
207 | 207 | ||
208 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | 208 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
209 | if (pcidev_info) { | 209 | if (pcidev_info) { |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c index 79fdb91d7259..8b8bbd51d433 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c | |||
@@ -23,7 +23,7 @@ union br_ptr { | |||
23 | /* | 23 | /* |
24 | * Control Register Access -- Read/Write 0000_0020 | 24 | * Control Register Access -- Read/Write 0000_0020 |
25 | */ | 25 | */ |
26 | void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) | 26 | void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, u64 bits) |
27 | { | 27 | { |
28 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 28 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
29 | 29 | ||
@@ -43,7 +43,7 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) | |||
43 | } | 43 | } |
44 | } | 44 | } |
45 | 45 | ||
46 | void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) | 46 | void pcireg_control_bit_set(struct pcibus_info *pcibus_info, u64 bits) |
47 | { | 47 | { |
48 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 48 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
49 | 49 | ||
@@ -66,10 +66,10 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) | |||
66 | /* | 66 | /* |
67 | * PCI/PCIX Target Flush Register Access -- Read Only 0000_0050 | 67 | * PCI/PCIX Target Flush Register Access -- Read Only 0000_0050 |
68 | */ | 68 | */ |
69 | uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info) | 69 | u64 pcireg_tflush_get(struct pcibus_info *pcibus_info) |
70 | { | 70 | { |
71 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 71 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
72 | uint64_t ret = 0; | 72 | u64 ret = 0; |
73 | 73 | ||
74 | if (pcibus_info) { | 74 | if (pcibus_info) { |
75 | switch (pcibus_info->pbi_bridge_type) { | 75 | switch (pcibus_info->pbi_bridge_type) { |
@@ -96,10 +96,10 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info) | |||
96 | /* | 96 | /* |
97 | * Interrupt Status Register Access -- Read Only 0000_0100 | 97 | * Interrupt Status Register Access -- Read Only 0000_0100 |
98 | */ | 98 | */ |
99 | uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info) | 99 | u64 pcireg_intr_status_get(struct pcibus_info * pcibus_info) |
100 | { | 100 | { |
101 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 101 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
102 | uint64_t ret = 0; | 102 | u64 ret = 0; |
103 | 103 | ||
104 | if (pcibus_info) { | 104 | if (pcibus_info) { |
105 | switch (pcibus_info->pbi_bridge_type) { | 105 | switch (pcibus_info->pbi_bridge_type) { |
@@ -121,7 +121,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info) | |||
121 | /* | 121 | /* |
122 | * Interrupt Enable Register Access -- Read/Write 0000_0108 | 122 | * Interrupt Enable Register Access -- Read/Write 0000_0108 |
123 | */ | 123 | */ |
124 | void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) | 124 | void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, u64 bits) |
125 | { | 125 | { |
126 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 126 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
127 | 127 | ||
@@ -141,7 +141,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) | |||
141 | } | 141 | } |
142 | } | 142 | } |
143 | 143 | ||
144 | void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) | 144 | void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, u64 bits) |
145 | { | 145 | { |
146 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 146 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
147 | 147 | ||
@@ -165,7 +165,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) | |||
165 | * Intr Host Address Register (int_addr) -- Read/Write 0000_0130 - 0000_0168 | 165 | * Intr Host Address Register (int_addr) -- Read/Write 0000_0130 - 0000_0168 |
166 | */ | 166 | */ |
167 | void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n, | 167 | void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n, |
168 | uint64_t addr) | 168 | u64 addr) |
169 | { | 169 | { |
170 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 170 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
171 | 171 | ||
@@ -217,10 +217,10 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n) | |||
217 | /* | 217 | /* |
218 | * Device(x) Write Buffer Flush Reg Access -- Read Only 0000_0240 - 0000_0258 | 218 | * Device(x) Write Buffer Flush Reg Access -- Read Only 0000_0240 - 0000_0258 |
219 | */ | 219 | */ |
220 | uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device) | 220 | u64 pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device) |
221 | { | 221 | { |
222 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 222 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
223 | uint64_t ret = 0; | 223 | u64 ret = 0; |
224 | 224 | ||
225 | if (pcibus_info) { | 225 | if (pcibus_info) { |
226 | switch (pcibus_info->pbi_bridge_type) { | 226 | switch (pcibus_info->pbi_bridge_type) { |
@@ -242,7 +242,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device) | |||
242 | } | 242 | } |
243 | 243 | ||
244 | void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index, | 244 | void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index, |
245 | uint64_t val) | 245 | u64 val) |
246 | { | 246 | { |
247 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 247 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
248 | 248 | ||
@@ -262,10 +262,10 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index, | |||
262 | } | 262 | } |
263 | } | 263 | } |
264 | 264 | ||
265 | uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index) | 265 | u64 __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index) |
266 | { | 266 | { |
267 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; | 267 | union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base; |
268 | uint64_t __iomem *ret = NULL; | 268 | u64 __iomem *ret = NULL; |
269 | 269 | ||
270 | if (pcibus_info) { | 270 | if (pcibus_info) { |
271 | switch (pcibus_info->pbi_bridge_type) { | 271 | switch (pcibus_info->pbi_bridge_type) { |
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c index 27aa1842dacc..7571a4025529 100644 --- a/arch/ia64/sn/pci/tioca_provider.c +++ b/arch/ia64/sn/pci/tioca_provider.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <asm/sn/pcibus_provider_defs.h> | 16 | #include <asm/sn/pcibus_provider_defs.h> |
17 | #include <asm/sn/tioca_provider.h> | 17 | #include <asm/sn/tioca_provider.h> |
18 | 18 | ||
19 | uint32_t tioca_gart_found; | 19 | u32 tioca_gart_found; |
20 | EXPORT_SYMBOL(tioca_gart_found); /* used by agp-sgi */ | 20 | EXPORT_SYMBOL(tioca_gart_found); /* used by agp-sgi */ |
21 | 21 | ||
22 | LIST_HEAD(tioca_list); | 22 | LIST_HEAD(tioca_list); |
@@ -34,8 +34,8 @@ static int tioca_gart_init(struct tioca_kernel *); | |||
34 | static int | 34 | static int |
35 | tioca_gart_init(struct tioca_kernel *tioca_kern) | 35 | tioca_gart_init(struct tioca_kernel *tioca_kern) |
36 | { | 36 | { |
37 | uint64_t ap_reg; | 37 | u64 ap_reg; |
38 | uint64_t offset; | 38 | u64 offset; |
39 | struct page *tmp; | 39 | struct page *tmp; |
40 | struct tioca_common *tioca_common; | 40 | struct tioca_common *tioca_common; |
41 | struct tioca __iomem *ca_base; | 41 | struct tioca __iomem *ca_base; |
@@ -214,7 +214,7 @@ void | |||
214 | tioca_fastwrite_enable(struct tioca_kernel *tioca_kern) | 214 | tioca_fastwrite_enable(struct tioca_kernel *tioca_kern) |
215 | { | 215 | { |
216 | int cap_ptr; | 216 | int cap_ptr; |
217 | uint32_t reg; | 217 | u32 reg; |
218 | struct tioca __iomem *tioca_base; | 218 | struct tioca __iomem *tioca_base; |
219 | struct pci_dev *pdev; | 219 | struct pci_dev *pdev; |
220 | struct tioca_common *common; | 220 | struct tioca_common *common; |
@@ -276,7 +276,7 @@ EXPORT_SYMBOL(tioca_fastwrite_enable); /* used by agp-sgi */ | |||
276 | * We will always use 0x1 | 276 | * We will always use 0x1 |
277 | * 55:55 - Swap bytes Currently unused | 277 | * 55:55 - Swap bytes Currently unused |
278 | */ | 278 | */ |
279 | static uint64_t | 279 | static u64 |
280 | tioca_dma_d64(unsigned long paddr) | 280 | tioca_dma_d64(unsigned long paddr) |
281 | { | 281 | { |
282 | dma_addr_t bus_addr; | 282 | dma_addr_t bus_addr; |
@@ -318,15 +318,15 @@ tioca_dma_d64(unsigned long paddr) | |||
318 | * and so a given CA can only directly target nodes in the range | 318 | * and so a given CA can only directly target nodes in the range |
319 | * xxx - xxx+255. | 319 | * xxx - xxx+255. |
320 | */ | 320 | */ |
321 | static uint64_t | 321 | static u64 |
322 | tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr) | 322 | tioca_dma_d48(struct pci_dev *pdev, u64 paddr) |
323 | { | 323 | { |
324 | struct tioca_common *tioca_common; | 324 | struct tioca_common *tioca_common; |
325 | struct tioca __iomem *ca_base; | 325 | struct tioca __iomem *ca_base; |
326 | uint64_t ct_addr; | 326 | u64 ct_addr; |
327 | dma_addr_t bus_addr; | 327 | dma_addr_t bus_addr; |
328 | uint32_t node_upper; | 328 | u32 node_upper; |
329 | uint64_t agp_dma_extn; | 329 | u64 agp_dma_extn; |
330 | struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev); | 330 | struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev); |
331 | 331 | ||
332 | tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info; | 332 | tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info; |
@@ -367,10 +367,10 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr) | |||
367 | * dma_addr_t is guarenteed to be contiguous in CA bus space. | 367 | * dma_addr_t is guarenteed to be contiguous in CA bus space. |
368 | */ | 368 | */ |
369 | static dma_addr_t | 369 | static dma_addr_t |
370 | tioca_dma_mapped(struct pci_dev *pdev, uint64_t paddr, size_t req_size) | 370 | tioca_dma_mapped(struct pci_dev *pdev, u64 paddr, size_t req_size) |
371 | { | 371 | { |
372 | int i, ps, ps_shift, entry, entries, mapsize, last_entry; | 372 | int i, ps, ps_shift, entry, entries, mapsize, last_entry; |
373 | uint64_t xio_addr, end_xio_addr; | 373 | u64 xio_addr, end_xio_addr; |
374 | struct tioca_common *tioca_common; | 374 | struct tioca_common *tioca_common; |
375 | struct tioca_kernel *tioca_kern; | 375 | struct tioca_kernel *tioca_kern; |
376 | dma_addr_t bus_addr = 0; | 376 | dma_addr_t bus_addr = 0; |
@@ -514,10 +514,10 @@ tioca_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir) | |||
514 | * The mapping mode used is based on the devices dma_mask. As a last resort | 514 | * The mapping mode used is based on the devices dma_mask. As a last resort |
515 | * use the GART mapped mode. | 515 | * use the GART mapped mode. |
516 | */ | 516 | */ |
517 | static uint64_t | 517 | static u64 |
518 | tioca_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | 518 | tioca_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count) |
519 | { | 519 | { |
520 | uint64_t mapaddr; | 520 | u64 mapaddr; |
521 | 521 | ||
522 | /* | 522 | /* |
523 | * If card is 64 or 48 bit addresable, use a direct mapping. 32 | 523 | * If card is 64 or 48 bit addresable, use a direct mapping. 32 |
@@ -554,8 +554,8 @@ tioca_error_intr_handler(int irq, void *arg, struct pt_regs *pt) | |||
554 | { | 554 | { |
555 | struct tioca_common *soft = arg; | 555 | struct tioca_common *soft = arg; |
556 | struct ia64_sal_retval ret_stuff; | 556 | struct ia64_sal_retval ret_stuff; |
557 | uint64_t segment; | 557 | u64 segment; |
558 | uint64_t busnum; | 558 | u64 busnum; |
559 | ret_stuff.status = 0; | 559 | ret_stuff.status = 0; |
560 | ret_stuff.v0 = 0; | 560 | ret_stuff.v0 = 0; |
561 | 561 | ||
@@ -620,7 +620,7 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
620 | INIT_LIST_HEAD(&tioca_kern->ca_dmamaps); | 620 | INIT_LIST_HEAD(&tioca_kern->ca_dmamaps); |
621 | tioca_kern->ca_closest_node = | 621 | tioca_kern->ca_closest_node = |
622 | nasid_to_cnodeid(tioca_common->ca_closest_nasid); | 622 | nasid_to_cnodeid(tioca_common->ca_closest_nasid); |
623 | tioca_common->ca_kernel_private = (uint64_t) tioca_kern; | 623 | tioca_common->ca_kernel_private = (u64) tioca_kern; |
624 | 624 | ||
625 | bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment, | 625 | bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment, |
626 | tioca_common->ca_common.bs_persist_busnum); | 626 | tioca_common->ca_common.bs_persist_busnum); |
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index dda196c9e324..e52831ed93eb 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c | |||
@@ -81,10 +81,10 @@ | |||
81 | * 61 - 0 since this is not an MSI transaction | 81 | * 61 - 0 since this is not an MSI transaction |
82 | * 60:54 - reserved, MBZ | 82 | * 60:54 - reserved, MBZ |
83 | */ | 83 | */ |
84 | static uint64_t | 84 | static u64 |
85 | tioce_dma_d64(unsigned long ct_addr) | 85 | tioce_dma_d64(unsigned long ct_addr) |
86 | { | 86 | { |
87 | uint64_t bus_addr; | 87 | u64 bus_addr; |
88 | 88 | ||
89 | bus_addr = ct_addr | (1UL << 63); | 89 | bus_addr = ct_addr | (1UL << 63); |
90 | 90 | ||
@@ -141,9 +141,9 @@ pcidev_to_tioce(struct pci_dev *pdev, struct tioce **base, | |||
141 | * length, and if enough resources exist, fill in the ATE's and construct a | 141 | * length, and if enough resources exist, fill in the ATE's and construct a |
142 | * tioce_dmamap struct to track the mapping. | 142 | * tioce_dmamap struct to track the mapping. |
143 | */ | 143 | */ |
144 | static uint64_t | 144 | static u64 |
145 | tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, | 145 | tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, |
146 | uint64_t ct_addr, int len) | 146 | u64 ct_addr, int len) |
147 | { | 147 | { |
148 | int i; | 148 | int i; |
149 | int j; | 149 | int j; |
@@ -152,11 +152,11 @@ tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, | |||
152 | int entries; | 152 | int entries; |
153 | int nates; | 153 | int nates; |
154 | int pagesize; | 154 | int pagesize; |
155 | uint64_t *ate_shadow; | 155 | u64 *ate_shadow; |
156 | uint64_t *ate_reg; | 156 | u64 *ate_reg; |
157 | uint64_t addr; | 157 | u64 addr; |
158 | struct tioce *ce_mmr; | 158 | struct tioce *ce_mmr; |
159 | uint64_t bus_base; | 159 | u64 bus_base; |
160 | struct tioce_dmamap *map; | 160 | struct tioce_dmamap *map; |
161 | 161 | ||
162 | ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base; | 162 | ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base; |
@@ -224,7 +224,7 @@ tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, | |||
224 | 224 | ||
225 | addr = ct_addr; | 225 | addr = ct_addr; |
226 | for (j = 0; j < nates; j++) { | 226 | for (j = 0; j < nates; j++) { |
227 | uint64_t ate; | 227 | u64 ate; |
228 | 228 | ||
229 | ate = ATE_MAKE(addr, pagesize); | 229 | ate = ATE_MAKE(addr, pagesize); |
230 | ate_shadow[i + j] = ate; | 230 | ate_shadow[i + j] = ate; |
@@ -252,15 +252,15 @@ tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, | |||
252 | * | 252 | * |
253 | * Map @paddr into 32-bit bus space of the CE associated with @pcidev_info. | 253 | * Map @paddr into 32-bit bus space of the CE associated with @pcidev_info. |
254 | */ | 254 | */ |
255 | static uint64_t | 255 | static u64 |
256 | tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr) | 256 | tioce_dma_d32(struct pci_dev *pdev, u64 ct_addr) |
257 | { | 257 | { |
258 | int dma_ok; | 258 | int dma_ok; |
259 | int port; | 259 | int port; |
260 | struct tioce *ce_mmr; | 260 | struct tioce *ce_mmr; |
261 | struct tioce_kernel *ce_kern; | 261 | struct tioce_kernel *ce_kern; |
262 | uint64_t ct_upper; | 262 | u64 ct_upper; |
263 | uint64_t ct_lower; | 263 | u64 ct_lower; |
264 | dma_addr_t bus_addr; | 264 | dma_addr_t bus_addr; |
265 | 265 | ||
266 | ct_upper = ct_addr & ~0x3fffffffUL; | 266 | ct_upper = ct_addr & ~0x3fffffffUL; |
@@ -269,7 +269,7 @@ tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr) | |||
269 | pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port); | 269 | pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port); |
270 | 270 | ||
271 | if (ce_kern->ce_port[port].dirmap_refcnt == 0) { | 271 | if (ce_kern->ce_port[port].dirmap_refcnt == 0) { |
272 | uint64_t tmp; | 272 | u64 tmp; |
273 | 273 | ||
274 | ce_kern->ce_port[port].dirmap_shadow = ct_upper; | 274 | ce_kern->ce_port[port].dirmap_shadow = ct_upper; |
275 | writeq(ct_upper, &ce_mmr->ce_ure_dir_map[port]); | 275 | writeq(ct_upper, &ce_mmr->ce_ure_dir_map[port]); |
@@ -295,10 +295,10 @@ tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr) | |||
295 | * Given a TIOCE bus address, set the appropriate bit to indicate barrier | 295 | * Given a TIOCE bus address, set the appropriate bit to indicate barrier |
296 | * attributes. | 296 | * attributes. |
297 | */ | 297 | */ |
298 | static uint64_t | 298 | static u64 |
299 | tioce_dma_barrier(uint64_t bus_addr, int on) | 299 | tioce_dma_barrier(u64 bus_addr, int on) |
300 | { | 300 | { |
301 | uint64_t barrier_bit; | 301 | u64 barrier_bit; |
302 | 302 | ||
303 | /* barrier not supported in M40/M40S mode */ | 303 | /* barrier not supported in M40/M40S mode */ |
304 | if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr)) | 304 | if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr)) |
@@ -351,7 +351,7 @@ tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir) | |||
351 | 351 | ||
352 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, | 352 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, |
353 | ce_dmamap_list) { | 353 | ce_dmamap_list) { |
354 | uint64_t last; | 354 | u64 last; |
355 | 355 | ||
356 | last = map->pci_start + map->nbytes - 1; | 356 | last = map->pci_start + map->nbytes - 1; |
357 | if (bus_addr >= map->pci_start && bus_addr <= last) | 357 | if (bus_addr >= map->pci_start && bus_addr <= last) |
@@ -385,17 +385,17 @@ tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir) | |||
385 | * This is the main wrapper for mapping host physical pages to CE PCI space. | 385 | * This is the main wrapper for mapping host physical pages to CE PCI space. |
386 | * The mapping mode used is based on the device's dma_mask. | 386 | * The mapping mode used is based on the device's dma_mask. |
387 | */ | 387 | */ |
388 | static uint64_t | 388 | static u64 |
389 | tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count, | 389 | tioce_do_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count, |
390 | int barrier) | 390 | int barrier) |
391 | { | 391 | { |
392 | unsigned long flags; | 392 | unsigned long flags; |
393 | uint64_t ct_addr; | 393 | u64 ct_addr; |
394 | uint64_t mapaddr = 0; | 394 | u64 mapaddr = 0; |
395 | struct tioce_kernel *ce_kern; | 395 | struct tioce_kernel *ce_kern; |
396 | struct tioce_dmamap *map; | 396 | struct tioce_dmamap *map; |
397 | int port; | 397 | int port; |
398 | uint64_t dma_mask; | 398 | u64 dma_mask; |
399 | 399 | ||
400 | dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask; | 400 | dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask; |
401 | 401 | ||
@@ -425,7 +425,7 @@ tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count, | |||
425 | * address bits than this device can support. | 425 | * address bits than this device can support. |
426 | */ | 426 | */ |
427 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) { | 427 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) { |
428 | uint64_t last; | 428 | u64 last; |
429 | 429 | ||
430 | last = map->ct_start + map->nbytes - 1; | 430 | last = map->ct_start + map->nbytes - 1; |
431 | if (ct_addr >= map->ct_start && | 431 | if (ct_addr >= map->ct_start && |
@@ -501,8 +501,8 @@ dma_map_done: | |||
501 | * Simply call tioce_do_dma_map() to create a map with the barrier bit clear | 501 | * Simply call tioce_do_dma_map() to create a map with the barrier bit clear |
502 | * in the address. | 502 | * in the address. |
503 | */ | 503 | */ |
504 | static uint64_t | 504 | static u64 |
505 | tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | 505 | tioce_dma(struct pci_dev *pdev, u64 paddr, size_t byte_count) |
506 | { | 506 | { |
507 | return tioce_do_dma_map(pdev, paddr, byte_count, 0); | 507 | return tioce_do_dma_map(pdev, paddr, byte_count, 0); |
508 | } | 508 | } |
@@ -515,8 +515,8 @@ tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | |||
515 | * | 515 | * |
516 | * Simply call tioce_do_dma_map() to create a map with the barrier bit set | 516 | * Simply call tioce_do_dma_map() to create a map with the barrier bit set |
517 | * in the address. | 517 | * in the address. |
518 | */ static uint64_t | 518 | */ static u64 |
519 | tioce_dma_consistent(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | 519 | tioce_dma_consistent(struct pci_dev *pdev, u64 paddr, size_t byte_count) |
520 | { | 520 | { |
521 | return tioce_do_dma_map(pdev, paddr, byte_count, 1); | 521 | return tioce_do_dma_map(pdev, paddr, byte_count, 1); |
522 | } | 522 | } |
@@ -551,7 +551,7 @@ tioce_error_intr_handler(int irq, void *arg, struct pt_regs *pt) | |||
551 | tioce_kern_init(struct tioce_common *tioce_common) | 551 | tioce_kern_init(struct tioce_common *tioce_common) |
552 | { | 552 | { |
553 | int i; | 553 | int i; |
554 | uint32_t tmp; | 554 | u32 tmp; |
555 | struct tioce *tioce_mmr; | 555 | struct tioce *tioce_mmr; |
556 | struct tioce_kernel *tioce_kern; | 556 | struct tioce_kernel *tioce_kern; |
557 | 557 | ||
@@ -563,7 +563,7 @@ tioce_kern_init(struct tioce_common *tioce_common) | |||
563 | tioce_kern->ce_common = tioce_common; | 563 | tioce_kern->ce_common = tioce_common; |
564 | spin_lock_init(&tioce_kern->ce_lock); | 564 | spin_lock_init(&tioce_kern->ce_lock); |
565 | INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list); | 565 | INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list); |
566 | tioce_common->ce_kernel_private = (uint64_t) tioce_kern; | 566 | tioce_common->ce_kernel_private = (u64) tioce_kern; |
567 | 567 | ||
568 | /* | 568 | /* |
569 | * Determine the secondary bus number of the port2 logical PPB. | 569 | * Determine the secondary bus number of the port2 logical PPB. |
@@ -575,7 +575,7 @@ tioce_kern_init(struct tioce_common *tioce_common) | |||
575 | raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment, | 575 | raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment, |
576 | tioce_common->ce_pcibus.bs_persist_busnum, | 576 | tioce_common->ce_pcibus.bs_persist_busnum, |
577 | PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp); | 577 | PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp); |
578 | tioce_kern->ce_port1_secondary = (uint8_t) tmp; | 578 | tioce_kern->ce_port1_secondary = (u8) tmp; |
579 | 579 | ||
580 | /* | 580 | /* |
581 | * Set PMU pagesize to the largest size available, and zero out | 581 | * Set PMU pagesize to the largest size available, and zero out |
@@ -615,7 +615,7 @@ tioce_force_interrupt(struct sn_irq_info *sn_irq_info) | |||
615 | struct pcidev_info *pcidev_info; | 615 | struct pcidev_info *pcidev_info; |
616 | struct tioce_common *ce_common; | 616 | struct tioce_common *ce_common; |
617 | struct tioce *ce_mmr; | 617 | struct tioce *ce_mmr; |
618 | uint64_t force_int_val; | 618 | u64 force_int_val; |
619 | 619 | ||
620 | if (!sn_irq_info->irq_bridge) | 620 | if (!sn_irq_info->irq_bridge) |
621 | return; | 621 | return; |
@@ -687,7 +687,7 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info) | |||
687 | struct tioce_common *ce_common; | 687 | struct tioce_common *ce_common; |
688 | struct tioce *ce_mmr; | 688 | struct tioce *ce_mmr; |
689 | int bit; | 689 | int bit; |
690 | uint64_t vector; | 690 | u64 vector; |
691 | 691 | ||
692 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | 692 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
693 | if (!pcidev_info) | 693 | if (!pcidev_info) |
@@ -699,7 +699,7 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info) | |||
699 | bit = sn_irq_info->irq_int_bit; | 699 | bit = sn_irq_info->irq_int_bit; |
700 | 700 | ||
701 | __sn_setq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit)); | 701 | __sn_setq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit)); |
702 | vector = (uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT; | 702 | vector = (u64)sn_irq_info->irq_irq << INTR_VECTOR_SHFT; |
703 | vector |= sn_irq_info->irq_xtalkaddr; | 703 | vector |= sn_irq_info->irq_xtalkaddr; |
704 | writeq(vector, &ce_mmr->ce_adm_int_dest[bit]); | 704 | writeq(vector, &ce_mmr->ce_adm_int_dest[bit]); |
705 | __sn_clrq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit)); | 705 | __sn_clrq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit)); |
diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c index ae2ba67b7ef6..5e37df3111ad 100644 --- a/arch/mips/kernel/reset.c +++ b/arch/mips/kernel/reset.c | |||
@@ -12,6 +12,9 @@ | |||
12 | #include <linux/reboot.h> | 12 | #include <linux/reboot.h> |
13 | #include <asm/reboot.h> | 13 | #include <asm/reboot.h> |
14 | 14 | ||
15 | void (*pm_power_off)(void); | ||
16 | EXPORT_SYMBOL(pm_power_off); | ||
17 | |||
15 | /* | 18 | /* |
16 | * Urgs ... Too many MIPS machines to handle this in a generic way. | 19 | * Urgs ... Too many MIPS machines to handle this in a generic way. |
17 | * So handle all using function pointers to machine specific | 20 | * So handle all using function pointers to machine specific |
@@ -33,6 +36,9 @@ void machine_halt(void) | |||
33 | 36 | ||
34 | void machine_power_off(void) | 37 | void machine_power_off(void) |
35 | { | 38 | { |
39 | if (pm_power_off) | ||
40 | pm_power_off(); | ||
41 | |||
36 | _machine_power_off(); | 42 | _machine_power_off(); |
37 | } | 43 | } |
38 | 44 | ||
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 8cf6d437a630..01bc7d589afe 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -33,9 +33,11 @@ config GENERIC_CALIBRATE_DELAY | |||
33 | bool | 33 | bool |
34 | default y | 34 | default y |
35 | 35 | ||
36 | config GENERIC_IOMAP | ||
37 | bool | ||
38 | |||
36 | config ARCH_MAY_HAVE_PC_FDC | 39 | config ARCH_MAY_HAVE_PC_FDC |
37 | bool | 40 | bool |
38 | default y | ||
39 | 41 | ||
40 | source "init/Kconfig" | 42 | source "init/Kconfig" |
41 | 43 | ||
@@ -53,24 +55,28 @@ config SH_SOLUTION_ENGINE | |||
53 | 55 | ||
54 | config SH_7751_SOLUTION_ENGINE | 56 | config SH_7751_SOLUTION_ENGINE |
55 | bool "SolutionEngine7751" | 57 | bool "SolutionEngine7751" |
58 | select CPU_SUBTYPE_SH7751 | ||
56 | help | 59 | help |
57 | Select 7751 SolutionEngine if configuring for a Hitachi SH7751 | 60 | Select 7751 SolutionEngine if configuring for a Hitachi SH7751 |
58 | evaluation board. | 61 | evaluation board. |
59 | 62 | ||
60 | config SH_7300_SOLUTION_ENGINE | 63 | config SH_7300_SOLUTION_ENGINE |
61 | bool "SolutionEngine7300" | 64 | bool "SolutionEngine7300" |
65 | select CPU_SUBTYPE_SH7300 | ||
62 | help | 66 | help |
63 | Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) | 67 | Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) |
64 | evaluation board. | 68 | evaluation board. |
65 | 69 | ||
66 | config SH_73180_SOLUTION_ENGINE | 70 | config SH_73180_SOLUTION_ENGINE |
67 | bool "SolutionEngine73180" | 71 | bool "SolutionEngine73180" |
72 | select CPU_SUBTYPE_SH73180 | ||
68 | help | 73 | help |
69 | Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3) | 74 | Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3) |
70 | evaluation board. | 75 | evaluation board. |
71 | 76 | ||
72 | config SH_7751_SYSTEMH | 77 | config SH_7751_SYSTEMH |
73 | bool "SystemH7751R" | 78 | bool "SystemH7751R" |
79 | select CPU_SUBTYPE_SH7751R | ||
74 | help | 80 | help |
75 | Select SystemH if you are configuring for a Renesas SystemH | 81 | Select SystemH if you are configuring for a Renesas SystemH |
76 | 7751R evaluation board. | 82 | 7751R evaluation board. |
@@ -81,27 +87,13 @@ config SH_STB1_HARP | |||
81 | config SH_STB1_OVERDRIVE | 87 | config SH_STB1_OVERDRIVE |
82 | bool "STB1_Overdrive" | 88 | bool "STB1_Overdrive" |
83 | 89 | ||
84 | config SH_HP620 | 90 | config SH_HP6XX |
85 | bool "HP620" | 91 | bool "HP6XX" |
86 | help | 92 | help |
87 | Select HP620 if configuring for a HP jornada HP620. | 93 | Select HP6XX if configuring for a HP jornada HP6xx. |
88 | More information (hardware only) at | 94 | More information (hardware only) at |
89 | <http://www.hp.com/jornada/>. | 95 | <http://www.hp.com/jornada/>. |
90 | 96 | ||
91 | config SH_HP680 | ||
92 | bool "HP680" | ||
93 | help | ||
94 | Select HP680 if configuring for a HP Jornada HP680. | ||
95 | More information (hardware only) at | ||
96 | <http://www.hp.com/jornada/products/680/>. | ||
97 | |||
98 | config SH_HP690 | ||
99 | bool "HP690" | ||
100 | help | ||
101 | Select HP690 if configuring for a HP Jornada HP690. | ||
102 | More information (hardware only) | ||
103 | at <http://www.hp.com/jornada/products/680/>. | ||
104 | |||
105 | config SH_CQREEK | 97 | config SH_CQREEK |
106 | bool "CqREEK" | 98 | bool "CqREEK" |
107 | help | 99 | help |
@@ -123,11 +115,13 @@ config SH_EC3104 | |||
123 | 115 | ||
124 | config SH_SATURN | 116 | config SH_SATURN |
125 | bool "Saturn" | 117 | bool "Saturn" |
118 | select CPU_SUBTYPE_SH7604 | ||
126 | help | 119 | help |
127 | Select Saturn if configuring for a SEGA Saturn. | 120 | Select Saturn if configuring for a SEGA Saturn. |
128 | 121 | ||
129 | config SH_DREAMCAST | 122 | config SH_DREAMCAST |
130 | bool "Dreamcast" | 123 | bool "Dreamcast" |
124 | select CPU_SUBTYPE_SH7091 | ||
131 | help | 125 | help |
132 | Select Dreamcast if configuring for a SEGA Dreamcast. | 126 | Select Dreamcast if configuring for a SEGA Dreamcast. |
133 | More information at | 127 | More information at |
@@ -142,6 +136,7 @@ config SH_BIGSUR | |||
142 | 136 | ||
143 | config SH_SH2000 | 137 | config SH_SH2000 |
144 | bool "SH2000" | 138 | bool "SH2000" |
139 | select CPU_SUBTYPE_SH7709 | ||
145 | help | 140 | help |
146 | SH-2000 is a single-board computer based around SH7709A chip | 141 | SH-2000 is a single-board computer based around SH7709A chip |
147 | intended for embedded applications. | 142 | intended for embedded applications. |
@@ -153,20 +148,22 @@ config SH_ADX | |||
153 | bool "ADX" | 148 | bool "ADX" |
154 | 149 | ||
155 | config SH_MPC1211 | 150 | config SH_MPC1211 |
156 | bool "MPC1211" | 151 | bool "Interface MPC1211" |
152 | help | ||
153 | CTP/PCI-SH02 is a CPU module computer that is produced | ||
154 | by Interface Corporation. | ||
155 | More information at <http://www.interface.co.jp> | ||
157 | 156 | ||
158 | config SH_SH03 | 157 | config SH_SH03 |
159 | bool "SH03" | 158 | bool "Interface CTP/PCI-SH03" |
160 | help | 159 | help |
161 | CTP/PCI-SH03 is a CPU module computer that produced | 160 | CTP/PCI-SH03 is a CPU module computer that is produced |
162 | by Interface Corporation. | 161 | by Interface Corporation. |
163 | It is compact and excellent in durability. | ||
164 | It will play an active part in your factory or laboratory | ||
165 | as a FA computer. | ||
166 | More information at <http://www.interface.co.jp> | 162 | More information at <http://www.interface.co.jp> |
167 | 163 | ||
168 | config SH_SECUREEDGE5410 | 164 | config SH_SECUREEDGE5410 |
169 | bool "SecureEdge5410" | 165 | bool "SecureEdge5410" |
166 | select CPU_SUBTYPE_SH7751R | ||
170 | help | 167 | help |
171 | Select SecureEdge5410 if configuring for a SnapGear SH board. | 168 | Select SecureEdge5410 if configuring for a SnapGear SH board. |
172 | This includes both the OEM SecureEdge products as well as the | 169 | This includes both the OEM SecureEdge products as well as the |
@@ -174,25 +171,49 @@ config SH_SECUREEDGE5410 | |||
174 | 171 | ||
175 | config SH_HS7751RVOIP | 172 | config SH_HS7751RVOIP |
176 | bool "HS7751RVOIP" | 173 | bool "HS7751RVOIP" |
174 | select CPU_SUBTYPE_SH7751R | ||
177 | help | 175 | help |
178 | Select HS7751RVOIP if configuring for a Renesas Technology | 176 | Select HS7751RVOIP if configuring for a Renesas Technology |
179 | Sales VoIP board. | 177 | Sales VoIP board. |
180 | 178 | ||
181 | config SH_RTS7751R2D | 179 | config SH_RTS7751R2D |
182 | bool "RTS7751R2D" | 180 | bool "RTS7751R2D" |
181 | select CPU_SUBTYPE_SH7751R | ||
183 | help | 182 | help |
184 | Select RTS7751R2D if configuring for a Renesas Technology | 183 | Select RTS7751R2D if configuring for a Renesas Technology |
185 | Sales SH-Graphics board. | 184 | Sales SH-Graphics board. |
186 | 185 | ||
186 | config SH_R7780RP | ||
187 | bool "R7780RP-1" | ||
188 | select CPU_SUBTYPE_SH7780 | ||
189 | help | ||
190 | Select R7780RP-1 if configuring for a Renesas Solutions | ||
191 | HIGHLANDER board. | ||
192 | |||
187 | config SH_EDOSK7705 | 193 | config SH_EDOSK7705 |
188 | bool "EDOSK7705" | 194 | bool "EDOSK7705" |
195 | select CPU_SUBTYPE_SH7705 | ||
189 | 196 | ||
190 | config SH_SH4202_MICRODEV | 197 | config SH_SH4202_MICRODEV |
191 | bool "SH4-202 MicroDev" | 198 | bool "SH4-202 MicroDev" |
199 | select CPU_SUBTYPE_SH4_202 | ||
192 | help | 200 | help |
193 | Select SH4-202 MicroDev if configuring for a SuperH MicroDev board | 201 | Select SH4-202 MicroDev if configuring for a SuperH MicroDev board |
194 | with an SH4-202 CPU. | 202 | with an SH4-202 CPU. |
195 | 203 | ||
204 | config SH_LANDISK | ||
205 | bool "LANDISK" | ||
206 | select CPU_SUBTYPE_SH7751R | ||
207 | help | ||
208 | I-O DATA DEVICE, INC. "LANDISK Series" support. | ||
209 | |||
210 | config SH_TITAN | ||
211 | bool "TITAN" | ||
212 | select CPU_SUBTYPE_SH7751R | ||
213 | help | ||
214 | Select Titan if you are configuring for a Nimble Microsystems | ||
215 | NetEngine NP51R. | ||
216 | |||
196 | config SH_UNKNOWN | 217 | config SH_UNKNOWN |
197 | bool "BareCPU" | 218 | bool "BareCPU" |
198 | help | 219 | help |
@@ -207,168 +228,27 @@ config SH_UNKNOWN | |||
207 | 228 | ||
208 | endchoice | 229 | endchoice |
209 | 230 | ||
210 | choice | 231 | source "arch/sh/mm/Kconfig" |
211 | prompt "Processor family" | ||
212 | default CPU_SH4 | ||
213 | help | ||
214 | This option determines the CPU family to compile for. Supported | ||
215 | targets are SH-2, SH-3, and SH-4. These options are independent of | ||
216 | CPU functionality. As such, SH-DSP users will still want to select | ||
217 | their respective processor family in addition to the DSP support | ||
218 | option. | ||
219 | |||
220 | config CPU_SH2 | ||
221 | bool "SH-2" | ||
222 | select SH_WRITETHROUGH | ||
223 | |||
224 | config CPU_SH3 | ||
225 | bool "SH-3" | ||
226 | |||
227 | config CPU_SH4 | ||
228 | bool "SH-4" | ||
229 | |||
230 | endchoice | ||
231 | |||
232 | choice | ||
233 | prompt "Processor subtype" | ||
234 | |||
235 | config CPU_SUBTYPE_SH7604 | ||
236 | bool "SH7604" | ||
237 | depends on CPU_SH2 | ||
238 | help | ||
239 | Select SH7604 if you have SH7604 | ||
240 | |||
241 | config CPU_SUBTYPE_SH7300 | ||
242 | bool "SH7300" | ||
243 | depends on CPU_SH3 | ||
244 | |||
245 | config CPU_SUBTYPE_SH7705 | ||
246 | bool "SH7705" | ||
247 | depends on CPU_SH3 | ||
248 | |||
249 | config CPU_SUBTYPE_SH7707 | ||
250 | bool "SH7707" | ||
251 | depends on CPU_SH3 | ||
252 | help | ||
253 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | ||
254 | |||
255 | config CPU_SUBTYPE_SH7708 | ||
256 | bool "SH7708" | ||
257 | depends on CPU_SH3 | ||
258 | help | ||
259 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | ||
260 | if you have a 100 Mhz SH-3 HD6417708R CPU. | ||
261 | |||
262 | config CPU_SUBTYPE_SH7709 | ||
263 | bool "SH7709" | ||
264 | depends on CPU_SH3 | ||
265 | help | ||
266 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | ||
267 | |||
268 | config CPU_SUBTYPE_SH7750 | ||
269 | bool "SH7750" | ||
270 | depends on CPU_SH4 | ||
271 | help | ||
272 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | ||
273 | |||
274 | config CPU_SUBTYPE_SH7751 | ||
275 | bool "SH7751/SH7751R" | ||
276 | depends on CPU_SH4 | ||
277 | help | ||
278 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | ||
279 | or if you have a HD6417751R CPU. | ||
280 | |||
281 | config CPU_SUBTYPE_SH7760 | ||
282 | bool "SH7760" | ||
283 | depends on CPU_SH4 | ||
284 | |||
285 | config CPU_SUBTYPE_SH73180 | ||
286 | bool "SH73180" | ||
287 | depends on CPU_SH4 | ||
288 | |||
289 | config CPU_SUBTYPE_ST40STB1 | ||
290 | bool "ST40STB1 / ST40RA" | ||
291 | depends on CPU_SH4 | ||
292 | help | ||
293 | Select ST40STB1 if you have a ST40RA CPU. | ||
294 | This was previously called the ST40STB1, hence the option name. | ||
295 | |||
296 | config CPU_SUBTYPE_ST40GX1 | ||
297 | bool "ST40GX1" | ||
298 | depends on CPU_SH4 | ||
299 | help | ||
300 | Select ST40GX1 if you have a ST40GX1 CPU. | ||
301 | |||
302 | config CPU_SUBTYPE_SH4_202 | ||
303 | bool "SH4-202" | ||
304 | depends on CPU_SH4 | ||
305 | |||
306 | endchoice | ||
307 | |||
308 | config SH7705_CACHE_32KB | ||
309 | bool "Enable 32KB cache size for SH7705" | ||
310 | depends on CPU_SUBTYPE_SH7705 | ||
311 | default y | ||
312 | |||
313 | config MMU | ||
314 | bool "Support for memory management hardware" | ||
315 | depends on !CPU_SH2 | ||
316 | default y | ||
317 | help | ||
318 | Early SH processors (such as the SH7604) lack an MMU. In order to | ||
319 | boot on these systems, this option must not be set. | ||
320 | |||
321 | On other systems (such as the SH-3 and 4) where an MMU exists, | ||
322 | turning this off will boot the kernel on these machines with the | ||
323 | MMU implicitly switched off. | ||
324 | |||
325 | choice | ||
326 | prompt "HugeTLB page size" | ||
327 | depends on HUGETLB_PAGE && CPU_SH4 && MMU | ||
328 | default HUGETLB_PAGE_SIZE_64K | ||
329 | |||
330 | config HUGETLB_PAGE_SIZE_64K | ||
331 | bool "64K" | ||
332 | |||
333 | config HUGETLB_PAGE_SIZE_1MB | ||
334 | bool "1MB" | ||
335 | |||
336 | endchoice | ||
337 | |||
338 | config CMDLINE_BOOL | ||
339 | bool "Default bootloader kernel arguments" | ||
340 | |||
341 | config CMDLINE | ||
342 | string "Initial kernel command string" | ||
343 | depends on CMDLINE_BOOL | ||
344 | default "console=ttySC1,115200" | ||
345 | 232 | ||
346 | # Platform-specific memory start and size definitions | ||
347 | config MEMORY_START | 233 | config MEMORY_START |
348 | hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE | 234 | hex "Physical memory start address" |
349 | default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV | 235 | default "0x08000000" |
350 | default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705) | ||
351 | ---help--- | 236 | ---help--- |
352 | Computers built with Hitachi SuperH processors always | 237 | Computers built with Hitachi SuperH processors always |
353 | map the ROM starting at address zero. But the processor | 238 | map the ROM starting at address zero. But the processor |
354 | does not specify the range that RAM takes. | 239 | does not specify the range that RAM takes. |
355 | 240 | ||
356 | The physical memory (RAM) start address will be automatically | 241 | The physical memory (RAM) start address will be automatically |
357 | set to 08000000, unless you selected one of the following | 242 | set to 08000000. Other platforms, such as the Solution Engine |
358 | processor types: SolutionEngine, Overdrive, HP620, HP680, HP690, | 243 | boards typically map RAM at 0C000000. |
359 | in which case the start address will be set to 0c000000. | ||
360 | 244 | ||
361 | Tweak this only when porting to a new machine which is not already | 245 | Tweak this only when porting to a new machine which does not |
362 | known by the config system. Changing it from the known correct | 246 | already have a defconfig. Changing it from the known correct |
363 | value on any of the known systems will only lead to disaster. | 247 | value on any of the known systems will only lead to disaster. |
364 | 248 | ||
365 | config MEMORY_SIZE | 249 | config MEMORY_SIZE |
366 | hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE | 250 | hex "Physical memory size" |
367 | default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000) | 251 | default "0x00400000" |
368 | default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705 | ||
369 | default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE) | ||
370 | default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV) | ||
371 | default "0x08000000" if SH_MPC1211 || SH_SH03 | ||
372 | help | 252 | help |
373 | This sets the default memory size assumed by your SH kernel. It can | 253 | This sets the default memory size assumed by your SH kernel. It can |
374 | be overridden as normal by the 'mem=' argument on the kernel command | 254 | be overridden as normal by the 'mem=' argument on the kernel command |
@@ -376,21 +256,6 @@ config MEMORY_SIZE | |||
376 | as 0x00400000 which was the default value before this became | 256 | as 0x00400000 which was the default value before this became |
377 | configurable. | 257 | configurable. |
378 | 258 | ||
379 | config MEMORY_SET | ||
380 | bool | ||
381 | depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705) | ||
382 | default y | ||
383 | help | ||
384 | This is an option about which you will never be asked a question. | ||
385 | Therefore, I conclude that you do not exist - go away. | ||
386 | |||
387 | There is a grue here. | ||
388 | |||
389 | # If none of the above have set memory start/size, ask the user. | ||
390 | config MEMORY_OVERRIDE | ||
391 | bool "Override default load address and memory size" | ||
392 | |||
393 | # XXX: break these out into the board-specific configs below | ||
394 | config CF_ENABLER | 259 | config CF_ENABLER |
395 | bool "Compact Flash Enabler support" | 260 | bool "Compact Flash Enabler support" |
396 | depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03 | 261 | depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03 |
@@ -434,10 +299,21 @@ config CF_BASE_ADDR | |||
434 | default "0xb8000000" if CF_AREA6 | 299 | default "0xb8000000" if CF_AREA6 |
435 | default "0xb4000000" if CF_AREA5 | 300 | default "0xb4000000" if CF_AREA5 |
436 | 301 | ||
302 | menu "Processor features" | ||
303 | |||
304 | config CPU_LITTLE_ENDIAN | ||
305 | bool "Little Endian" | ||
306 | help | ||
307 | Some SuperH machines can be configured for either little or big | ||
308 | endian byte order. These modes require different kernels. Say Y if | ||
309 | your machine is little endian, N if it's a big endian machine. | ||
310 | |||
437 | # The SH7750 RTC module is disabled in the Dreamcast | 311 | # The SH7750 RTC module is disabled in the Dreamcast |
438 | config SH_RTC | 312 | config SH_RTC |
439 | bool | 313 | bool |
440 | depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE | 314 | depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \ |
315 | !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \ | ||
316 | !SH_R7780RP | ||
441 | default y | 317 | default y |
442 | help | 318 | help |
443 | Selecting this option will allow the Linux kernel to emulate | 319 | Selecting this option will allow the Linux kernel to emulate |
@@ -476,104 +352,131 @@ config SH_ADC | |||
476 | 352 | ||
477 | If unsure, say N. | 353 | If unsure, say N. |
478 | 354 | ||
479 | config SH_HP600 | 355 | config SH_STORE_QUEUES |
356 | bool "Support for Store Queues" | ||
357 | depends on CPU_SH4 | ||
358 | help | ||
359 | Selecting this option will enable an in-kernel API for manipulating | ||
360 | the store queues integrated in the SH-4 processors. | ||
361 | |||
362 | config CPU_HAS_INTEVT | ||
480 | bool | 363 | bool |
481 | depends on SH_HP620 || SH_HP680 || SH_HP690 | ||
482 | default y | ||
483 | 364 | ||
484 | config CPU_SUBTYPE_ST40 | 365 | config CPU_HAS_PINT_IRQ |
485 | bool | 366 | bool |
486 | depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1 | ||
487 | default y | ||
488 | 367 | ||
489 | source "mm/Kconfig" | 368 | config CPU_HAS_INTC2_IRQ |
369 | bool | ||
490 | 370 | ||
491 | config ZERO_PAGE_OFFSET | 371 | config CPU_HAS_SR_RB |
492 | hex "Zero page offset" | 372 | bool "CPU has SR.RB" |
493 | default "0x00001000" if !(SH_MPC1211 || SH_SH03) | 373 | depends on CPU_SH3 || CPU_SH4 |
494 | default "0x00004000" if SH_MPC1211 || SH_SH03 | 374 | default y |
495 | help | 375 | help |
496 | This sets the default offset of zero page. | 376 | This will enable the use of SR.RB register bank usage. Processors |
377 | that are lacking this bit must have another method in place for | ||
378 | accomplishing what is taken care of by the banked registers. | ||
497 | 379 | ||
498 | # XXX: needs to lose subtype for system type | 380 | See <file:Documentation/sh/register-banks.txt> for further |
499 | config ST40_LMI_MEMORY | 381 | information on SR.RB and register banking in the kernel in general. |
500 | bool "Memory on LMI" | ||
501 | depends on CPU_SUBTYPE_ST40STB1 | ||
502 | 382 | ||
503 | config MEMORY_START | 383 | endmenu |
504 | hex | ||
505 | depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY | ||
506 | default "0x08000000" | ||
507 | 384 | ||
508 | config MEMORY_SIZE | 385 | menu "Timer support" |
509 | hex | ||
510 | depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY | ||
511 | default "0x00400000" | ||
512 | 386 | ||
513 | config MEMORY_SET | 387 | config SH_TMU |
514 | bool | 388 | bool "TMU timer support" |
515 | depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY | ||
516 | default y | 389 | default y |
517 | |||
518 | config BOOT_LINK_OFFSET | ||
519 | hex "Link address offset for booting" | ||
520 | default "0x00800000" | ||
521 | help | 390 | help |
522 | This option allows you to set the link address offset of the zImage. | 391 | This enables the use of the TMU as the system timer. |
523 | This can be useful if you are on a board which has a small amount of | ||
524 | memory. | ||
525 | 392 | ||
526 | config CPU_LITTLE_ENDIAN | 393 | endmenu |
527 | bool "Little Endian" | ||
528 | help | ||
529 | Some SuperH machines can be configured for either little or big | ||
530 | endian byte order. These modes require different kernels. Say Y if | ||
531 | your machine is little endian, N if it's a big endian machine. | ||
532 | 394 | ||
533 | config PREEMPT | 395 | source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" |
534 | bool "Preemptible Kernel (EXPERIMENTAL)" | ||
535 | depends on EXPERIMENTAL | ||
536 | 396 | ||
537 | config UBC_WAKEUP | 397 | source "arch/sh/boards/renesas/rts7751r2d/Kconfig" |
538 | bool "Wakeup UBC on startup" | 398 | |
399 | config SH_PCLK_FREQ_BOOL | ||
400 | bool "Set default pclk frequency" | ||
401 | default y if !SH_RTC | ||
402 | default n | ||
403 | |||
404 | config SH_PCLK_FREQ | ||
405 | int "Peripheral clock frequency (in Hz)" | ||
406 | depends on SH_PCLK_FREQ_BOOL | ||
407 | default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 | ||
408 | default "60000000" if CPU_SUBTYPE_SH7751 | ||
409 | default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760 | ||
410 | default "27000000" if CPU_SUBTYPE_SH73180 | ||
411 | default "66000000" if CPU_SUBTYPE_SH4_202 | ||
539 | help | 412 | help |
540 | Selecting this option will wakeup the User Break Controller (UBC) on | 413 | This option is used to specify the peripheral clock frequency. |
541 | startup. Although the UBC is left in an awake state when the processor | 414 | This is necessary for determining the reference clock value on |
542 | comes up, some boot loaders misbehave by putting the UBC to sleep in a | 415 | platforms lacking an RTC. |
543 | power saving state, which causes issues with things like ptrace(). | ||
544 | 416 | ||
545 | If unsure, say N. | 417 | menu "CPU Frequency scaling" |
418 | |||
419 | source "drivers/cpufreq/Kconfig" | ||
546 | 420 | ||
547 | config SH_WRITETHROUGH | 421 | config SH_CPU_FREQ |
548 | bool "Use write-through caching" | 422 | tristate "SuperH CPU Frequency driver" |
549 | default y if CPU_SH2 | 423 | depends on CPU_FREQ |
424 | select CPU_FREQ_TABLE | ||
550 | help | 425 | help |
551 | Selecting this option will configure the caches in write-through | 426 | This adds the cpufreq driver for SuperH. At present, only |
552 | mode, as opposed to the default write-back configuration. | 427 | the SH-4 is supported. |
553 | 428 | ||
554 | Since there's sill some aliasing issues on SH-4, this option will | 429 | For details, take a look at <file:Documentation/cpu-freq>. |
555 | unfortunately still require the majority of flushing functions to | ||
556 | be implemented to deal with aliasing. | ||
557 | 430 | ||
558 | If unsure, say N. | 431 | If unsure, say N. |
559 | 432 | ||
560 | config SH_OCRAM | 433 | endmenu |
561 | bool "Operand Cache RAM (OCRAM) support" | 434 | |
435 | source "arch/sh/drivers/dma/Kconfig" | ||
436 | |||
437 | source "arch/sh/cchips/Kconfig" | ||
438 | |||
439 | config HEARTBEAT | ||
440 | bool "Heartbeat LED" | ||
441 | depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \ | ||
442 | SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \ | ||
443 | SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \ | ||
444 | SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \ | ||
445 | SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK | ||
562 | help | 446 | help |
563 | Selecting this option will automatically tear down the number of | 447 | Use the power-on LED on your machine as a load meter. The exact |
564 | sets in the dcache by half, which in turn exposes a memory range. | 448 | behavior is platform-dependent, but normally the flash frequency is |
449 | a hyperbolic function of the 5-minute load average. | ||
565 | 450 | ||
566 | The addresses for the OC RAM base will vary according to the | 451 | endmenu |
567 | processor version. Consult vendor documentation for specifics. | ||
568 | 452 | ||
569 | If unsure, say N. | 453 | config ISA_DMA_API |
454 | bool | ||
455 | depends on MPC1211 | ||
456 | default y | ||
570 | 457 | ||
571 | config SH_STORE_QUEUES | 458 | menu "Kernel features" |
572 | bool "Support for Store Queues" | 459 | |
573 | depends on CPU_SH4 | 460 | config KEXEC |
461 | bool "kexec system call (EXPERIMENTAL)" | ||
462 | depends on EXPERIMENTAL | ||
574 | help | 463 | help |
575 | Selecting this option will enable an in-kernel API for manipulating | 464 | kexec is a system call that implements the ability to shutdown your |
576 | the store queues integrated in the SH-4 processors. | 465 | current kernel, and to start another kernel. It is like a reboot |
466 | but it is indepedent of the system firmware. And like a reboot | ||
467 | you can start any kernel with it, not just Linux. | ||
468 | |||
469 | The name comes from the similiarity to the exec system call. | ||
470 | |||
471 | It is an ongoing process to be certain the hardware in a machine | ||
472 | is properly shutdown, so do not be surprised if this code does not | ||
473 | initially work for you. It may help to enable device hotplugging | ||
474 | support. As of this writing the exact hardware interface is | ||
475 | strongly in flux, so no good recommendation can be made. | ||
476 | |||
477 | config PREEMPT | ||
478 | bool "Preemptible Kernel (EXPERIMENTAL)" | ||
479 | depends on EXPERIMENTAL | ||
577 | 480 | ||
578 | config SMP | 481 | config SMP |
579 | bool "Symmetric multi-processing support" | 482 | bool "Symmetric multi-processing support" |
@@ -610,87 +513,58 @@ config NR_CPUS | |||
610 | This is purely to save memory - each supported CPU adds | 513 | This is purely to save memory - each supported CPU adds |
611 | approximately eight kilobytes to the kernel image. | 514 | approximately eight kilobytes to the kernel image. |
612 | 515 | ||
613 | config HS7751RVOIP_CODEC | 516 | config CPU_HAS_SR_RB |
614 | bool "Support VoIP Codec section" | 517 | bool "CPU has SR.RB" |
615 | depends on SH_HS7751RVOIP | 518 | depends on CPU_SH3 || CPU_SH4 |
616 | help | ||
617 | Selecting this option will support CODEC section. | ||
618 | |||
619 | config RTS7751R2D_REV11 | ||
620 | bool "RTS7751R2D Rev. 1.1 board support" | ||
621 | depends on SH_RTS7751R2D | ||
622 | help | ||
623 | Selecting this option will support version rev. 1.1. | ||
624 | |||
625 | config SH_PCLK_CALC | ||
626 | bool | ||
627 | default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180 | ||
628 | default y | 519 | default y |
629 | help | 520 | help |
630 | This option will cause the PCLK value to be probed at run-time. It | 521 | This will enable the use of SR.RB register bank usage. Processors |
631 | will display a notification if the probed value has greater than a | 522 | that are lacking this bit must have another method in place for |
632 | 1% variance of the hardcoded CONFIG_SH_PCLK_FREQ. | 523 | accomplishing what is taken care of by the banked registers. |
633 | 524 | ||
634 | config SH_PCLK_FREQ | 525 | See <file:Documentation/sh/register-banks.txt> for further |
635 | int "Peripheral clock frequency (in Hz)" | 526 | information on SR.RB and register banking in the kernel in general. |
636 | default "50000000" if CPU_SUBTYPE_SH7750 | ||
637 | default "60000000" if CPU_SUBTYPE_SH7751 | ||
638 | default "33333333" if CPU_SUBTYPE_SH7300 | ||
639 | default "27000000" if CPU_SUBTYPE_SH73180 | ||
640 | default "66000000" if CPU_SUBTYPE_SH4_202 | ||
641 | default "1193182" | ||
642 | help | ||
643 | This option is used to specify the peripheral clock frequency. This | ||
644 | option must be set for each processor in order for the kernel to | ||
645 | function reliably. If no sane default exists, we use a default from | ||
646 | the legacy i8254. Any discrepancies will be reported on boot time | ||
647 | with an auto-probed frequency which should be considered the proper | ||
648 | value for your hardware. | ||
649 | 527 | ||
650 | menu "CPU Frequency scaling" | 528 | endmenu |
651 | 529 | ||
652 | source "drivers/cpufreq/Kconfig" | 530 | menu "Boot options" |
653 | 531 | ||
654 | config SH_CPU_FREQ | 532 | config ZERO_PAGE_OFFSET |
655 | tristate "SuperH CPU Frequency driver" | 533 | hex "Zero page offset" |
656 | depends on CPU_FREQ | 534 | default "0x00004000" if SH_MPC1211 || SH_SH03 |
657 | select CPU_FREQ_TABLE | 535 | default "0x00001000" |
658 | help | 536 | help |
659 | This adds the cpufreq driver for SuperH. At present, only | 537 | This sets the default offset of zero page. |
660 | the SH-4 is supported. | ||
661 | |||
662 | For details, take a look at <file:Documentation/cpu-freq>. | ||
663 | |||
664 | If unsure, say N. | ||
665 | 538 | ||
666 | endmenu | 539 | config BOOT_LINK_OFFSET |
540 | hex "Link address offset for booting" | ||
541 | default "0x00800000" | ||
542 | help | ||
543 | This option allows you to set the link address offset of the zImage. | ||
544 | This can be useful if you are on a board which has a small amount of | ||
545 | memory. | ||
667 | 546 | ||
668 | source "arch/sh/drivers/dma/Kconfig" | 547 | config UBC_WAKEUP |
548 | bool "Wakeup UBC on startup" | ||
549 | help | ||
550 | Selecting this option will wakeup the User Break Controller (UBC) on | ||
551 | startup. Although the UBC is left in an awake state when the processor | ||
552 | comes up, some boot loaders misbehave by putting the UBC to sleep in a | ||
553 | power saving state, which causes issues with things like ptrace(). | ||
669 | 554 | ||
670 | source "arch/sh/cchips/Kconfig" | 555 | If unsure, say N. |
671 | 556 | ||
672 | config HEARTBEAT | 557 | config CMDLINE_BOOL |
673 | bool "Heartbeat LED" | 558 | bool "Default bootloader kernel arguments" |
674 | depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV | ||
675 | help | ||
676 | Use the power-on LED on your machine as a load meter. The exact | ||
677 | behavior is platform-dependent, but normally the flash frequency is | ||
678 | a hyperbolic function of the 5-minute load average. | ||
679 | 559 | ||
680 | config RTC_9701JE | 560 | config CMDLINE |
681 | tristate "EPSON RTC-9701JE support" | 561 | string "Initial kernel command string" |
682 | depends on SH_RTS7751R2D | 562 | depends on CMDLINE_BOOL |
683 | help | 563 | default "console=ttySC1,115200" |
684 | Selecting this option will support EPSON RTC-9701JE. | ||
685 | 564 | ||
686 | endmenu | 565 | endmenu |
687 | 566 | ||
688 | config ISA_DMA_API | 567 | menu "Bus options" |
689 | bool | ||
690 | depends on MPC1211 | ||
691 | default y | ||
692 | |||
693 | menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" | ||
694 | 568 | ||
695 | # Even on SuperH devices which don't have an ISA bus, | 569 | # Even on SuperH devices which don't have an ISA bus, |
696 | # this variable helps the PCMCIA modules handle | 570 | # this variable helps the PCMCIA modules handle |
@@ -701,7 +575,7 @@ menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" | |||
701 | # PCMCIA outright. -- PFM. | 575 | # PCMCIA outright. -- PFM. |
702 | config ISA | 576 | config ISA |
703 | bool | 577 | bool |
704 | default y if PCMCIA || SMC91X | 578 | default y if PCMCIA |
705 | help | 579 | help |
706 | Find out whether you have ISA slots on your motherboard. ISA is the | 580 | Find out whether you have ISA slots on your motherboard. ISA is the |
707 | name of a bus system, i.e. the way the CPU talks to the other stuff | 581 | name of a bus system, i.e. the way the CPU talks to the other stuff |
@@ -735,10 +609,9 @@ config MCA | |||
735 | config SBUS | 609 | config SBUS |
736 | bool | 610 | bool |
737 | 611 | ||
738 | config MAPLE | 612 | config SUPERHYWAY |
739 | tristate "Maple Bus support" | 613 | tristate "SuperHyway Bus support" |
740 | depends on SH_DREAMCAST | 614 | depends on CPU_SUBTYPE_SH4_202 |
741 | default y | ||
742 | 615 | ||
743 | source "arch/sh/drivers/pci/Kconfig" | 616 | source "arch/sh/drivers/pci/Kconfig" |
744 | 617 | ||
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 3fab181da364..8fb31ab2c02c 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
@@ -17,7 +17,7 @@ config SH_STANDARD_BIOS | |||
17 | 17 | ||
18 | config EARLY_SCIF_CONSOLE | 18 | config EARLY_SCIF_CONSOLE |
19 | bool "Use early SCIF console" | 19 | bool "Use early SCIF console" |
20 | depends on CPU_SH4 | 20 | depends on CPU_SH4 || CPU_SH2A && !SH_STANDARD_BIOS |
21 | 21 | ||
22 | config EARLY_PRINTK | 22 | config EARLY_PRINTK |
23 | bool "Early printk support" | 23 | bool "Early printk support" |
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 67192d6b00d8..08c9515c4806 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
@@ -17,10 +17,30 @@ | |||
17 | cflags-y := -mb | 17 | cflags-y := -mb |
18 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml | 18 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml |
19 | 19 | ||
20 | isa-y := any | ||
21 | isa-$(CONFIG_CPU_SH2) := sh2 | ||
22 | isa-$(CONFIG_CPU_SH3) := sh3 | ||
23 | isa-$(CONFIG_CPU_SH4) := sh4 | ||
24 | isa-$(CONFIG_CPU_SH4A) := sh4a | ||
25 | isa-$(CONFIG_CPU_SH2A) := sh2a | ||
26 | |||
27 | isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp | ||
28 | |||
29 | ifndef CONFIG_MMU | ||
30 | isa-y := $(isa-y)-nommu | ||
31 | endif | ||
32 | |||
33 | ifndef CONFIG_SH_FPU | ||
34 | isa-y := $(isa-y)-nofpu | ||
35 | endif | ||
36 | |||
37 | cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) | ||
38 | |||
20 | cflags-$(CONFIG_CPU_SH2) += -m2 | 39 | cflags-$(CONFIG_CPU_SH2) += -m2 |
21 | cflags-$(CONFIG_CPU_SH3) += -m3 | 40 | cflags-$(CONFIG_CPU_SH3) += -m3 |
22 | cflags-$(CONFIG_CPU_SH4) += -m4 \ | 41 | cflags-$(CONFIG_CPU_SH4) += -m4 \ |
23 | $(call cc-option,-mno-implicit-fp,-m4-nofpu) | 42 | $(call cc-option,-mno-implicit-fp,-m4-nofpu) |
43 | cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a-nofpu,) | ||
24 | 44 | ||
25 | cflags-$(CONFIG_SH_DSP) += -Wa,-dsp | 45 | cflags-$(CONFIG_SH_DSP) += -Wa,-dsp |
26 | cflags-$(CONFIG_SH_KGDB) += -g | 46 | cflags-$(CONFIG_SH_KGDB) += -g |
@@ -67,9 +87,7 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300 | |||
67 | machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 | 87 | machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 |
68 | machdir-$(CONFIG_SH_STB1_HARP) := harp | 88 | machdir-$(CONFIG_SH_STB1_HARP) := harp |
69 | machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive | 89 | machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive |
70 | machdir-$(CONFIG_SH_HP620) := hp6xx/hp620 | 90 | machdir-$(CONFIG_SH_HP6XX) := hp6xx |
71 | machdir-$(CONFIG_SH_HP680) := hp6xx/hp680 | ||
72 | machdir-$(CONFIG_SH_HP690) := hp6xx/hp690 | ||
73 | machdir-$(CONFIG_SH_CQREEK) := cqreek | 91 | machdir-$(CONFIG_SH_CQREEK) := cqreek |
74 | machdir-$(CONFIG_SH_DMIDA) := dmida | 92 | machdir-$(CONFIG_SH_DMIDA) := dmida |
75 | machdir-$(CONFIG_SH_EC3104) := ec3104 | 93 | machdir-$(CONFIG_SH_EC3104) := ec3104 |
@@ -119,31 +137,39 @@ boot := arch/sh/boot | |||
119 | 137 | ||
120 | CPPFLAGS_vmlinux.lds := -traditional | 138 | CPPFLAGS_vmlinux.lds := -traditional |
121 | 139 | ||
140 | ifneq ($(KBUILD_SRC),) | ||
141 | incdir-prefix := $(srctree)/include/asm-sh/ | ||
142 | else | ||
143 | incdir-prefix := | ||
144 | endif | ||
145 | |||
122 | # Update machine arch and proc symlinks if something which affects | 146 | # Update machine arch and proc symlinks if something which affects |
123 | # them changed. We use .arch and .mach to indicate when they were | 147 | # them changed. We use .arch and .mach to indicate when they were |
124 | # updated last, otherwise make uses the target directory mtime. | 148 | # updated last, otherwise make uses the target directory mtime. |
125 | 149 | ||
126 | include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER | 150 | include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER |
127 | @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)' | 151 | @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)' |
128 | ifneq ($(KBUILD_SRC),) | 152 | $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi |
129 | $(Q)mkdir -p include/asm-sh | 153 | $(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu |
130 | $(Q)ln -fsn $(srctree)/include/asm-sh/$(cpuincdir-y) include/asm-sh/cpu | ||
131 | else | ||
132 | $(Q)ln -fsn $(cpuincdir-y) include/asm-sh/cpu | ||
133 | endif | ||
134 | @touch $@ | 154 | @touch $@ |
135 | 155 | ||
156 | # Most boards have their own mach directories. For the ones that | ||
157 | # don't, just reference the parent directory so the semantics are | ||
158 | # kept roughly the same. | ||
159 | |||
136 | include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER | 160 | include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER |
137 | @echo ' SYMLINK include/asm-sh/mach -> include/asm-sh/$(incdir-y)' | 161 | @echo -n ' SYMLINK include/asm-sh/mach -> ' |
138 | ifneq ($(KBUILD_SRC),) | 162 | $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi |
139 | $(Q)mkdir -p include/asm-sh | 163 | $(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \ |
140 | $(Q)ln -fsn $(srctree)/include/asm-sh/$(incdir-y) include/asm-sh/mach | 164 | echo -e 'include/asm-sh/$(incdir-y)'; \ |
141 | else | 165 | ln -fsn $(incdir-prefix)$(incdir-y) \ |
142 | $(Q)ln -fsn $(incdir-y) include/asm-sh/mach | 166 | include/asm-sh/mach; \ |
143 | endif | 167 | else \ |
168 | echo -e 'include/asm-sh'; \ | ||
169 | ln -fsn $(incdir-prefix) include/asm-sh/mach; \ | ||
170 | fi | ||
144 | @touch $@ | 171 | @touch $@ |
145 | 172 | ||
146 | |||
147 | archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach | 173 | archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach |
148 | 174 | ||
149 | .PHONY: maketools FORCE | 175 | .PHONY: maketools FORCE |
diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile new file mode 100644 index 000000000000..927fe0aa5dfa --- /dev/null +++ b/arch/sh/boards/hp6xx/Makefile | |||
@@ -0,0 +1,6 @@ | |||
1 | # | ||
2 | # Makefile for the HP6xx specific parts of the kernel | ||
3 | # | ||
4 | |||
5 | obj-y := mach.o setup.o | ||
6 | |||
diff --git a/arch/sh/boards/hp6xx/hp620/Makefile b/arch/sh/boards/hp6xx/hp620/Makefile deleted file mode 100644 index 20691dbce347..000000000000 --- a/arch/sh/boards/hp6xx/hp620/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the HP620 specific parts of the kernel | ||
3 | # | ||
4 | |||
5 | obj-y := mach.o setup.o | ||
6 | |||
diff --git a/arch/sh/boards/hp6xx/hp620/mach.c b/arch/sh/boards/hp6xx/hp620/mach.c deleted file mode 100644 index 0392d82b4a7b..000000000000 --- a/arch/sh/boards/hp6xx/hp620/mach.c +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/sh/boards/hp6xx/hp620/mach.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * Machine vector for the HP620 | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | |||
14 | #include <asm/machvec.h> | ||
15 | #include <asm/rtc.h> | ||
16 | #include <asm/machvec_init.h> | ||
17 | |||
18 | #include <asm/io.h> | ||
19 | #include <asm/hd64461/hd64461.h> | ||
20 | #include <asm/irq.h> | ||
21 | |||
22 | /* | ||
23 | * The Machine Vector | ||
24 | */ | ||
25 | |||
26 | struct sh_machine_vector mv_hp620 __initmv = { | ||
27 | .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM, | ||
28 | |||
29 | .mv_inb = hd64461_inb, | ||
30 | .mv_inw = hd64461_inw, | ||
31 | .mv_inl = hd64461_inl, | ||
32 | .mv_outb = hd64461_outb, | ||
33 | .mv_outw = hd64461_outw, | ||
34 | .mv_outl = hd64461_outl, | ||
35 | |||
36 | .mv_inb_p = hd64461_inb_p, | ||
37 | .mv_inw_p = hd64461_inw, | ||
38 | .mv_inl_p = hd64461_inl, | ||
39 | .mv_outb_p = hd64461_outb_p, | ||
40 | .mv_outw_p = hd64461_outw, | ||
41 | .mv_outl_p = hd64461_outl, | ||
42 | |||
43 | .mv_insb = hd64461_insb, | ||
44 | .mv_insw = hd64461_insw, | ||
45 | .mv_insl = hd64461_insl, | ||
46 | .mv_outsb = hd64461_outsb, | ||
47 | .mv_outsw = hd64461_outsw, | ||
48 | .mv_outsl = hd64461_outsl, | ||
49 | |||
50 | .mv_irq_demux = hd64461_irq_demux, | ||
51 | }; | ||
52 | ALIAS_MV(hp620) | ||
diff --git a/arch/sh/boards/hp6xx/hp620/setup.c b/arch/sh/boards/hp6xx/hp620/setup.c deleted file mode 100644 index 045fc5da7274..000000000000 --- a/arch/sh/boards/hp6xx/hp620/setup.c +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/sh/boards/hp6xx/hp620/setup.c | ||
3 | * | ||
4 | * Copyright (C) 2002 Andriy Skulysh, 2005 Kristoffer Ericson | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See Linux/COPYING for more information. | ||
8 | * | ||
9 | * Setup code for an HP620. | ||
10 | * Due to similiarity with hp680/hp690 same inits are done (for now) | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <asm/hd64461/hd64461.h> | ||
16 | #include <asm/io.h> | ||
17 | #include <asm/hp6xx/hp6xx.h> | ||
18 | #include <asm/cpu/dac.h> | ||
19 | |||
20 | const char *get_system_type(void) | ||
21 | { | ||
22 | return "HP620"; | ||
23 | } | ||
24 | |||
25 | int __init platform_setup(void) | ||
26 | { | ||
27 | u16 v; | ||
28 | |||
29 | v = inw(HD64461_STBCR); | ||
30 | v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | | ||
31 | HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | | ||
32 | HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | | ||
33 | HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST | | ||
34 | HD64461_STBCR_SAFECKE_IST; | ||
35 | outw(v, HD64461_STBCR); | ||
36 | |||
37 | v = inw(HD64461_GPADR); | ||
38 | v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; | ||
39 | outw(v, HD64461_GPADR); | ||
40 | |||
41 | sh_dac_disable(DAC_SPEAKER_VOLUME); | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | |||
diff --git a/arch/sh/boards/hp6xx/hp680/Makefile b/arch/sh/boards/hp6xx/hp680/Makefile deleted file mode 100644 index 0beef11d9b11..000000000000 --- a/arch/sh/boards/hp6xx/hp680/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the HP680 specific parts of the kernel | ||
3 | # | ||
4 | |||
5 | obj-y := mach.o setup.o | ||
6 | |||
diff --git a/arch/sh/boards/hp6xx/hp690/Makefile b/arch/sh/boards/hp6xx/hp690/Makefile deleted file mode 100644 index fbbe95e75f83..000000000000 --- a/arch/sh/boards/hp6xx/hp690/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the HP690 specific parts of the kernel | ||
3 | # | ||
4 | |||
5 | obj-y := mach.o | ||
6 | |||
diff --git a/arch/sh/boards/hp6xx/hp690/mach.c b/arch/sh/boards/hp6xx/hp690/mach.c deleted file mode 100644 index 2a4c68783cd6..000000000000 --- a/arch/sh/boards/hp6xx/hp690/mach.c +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/sh/boards/hp6xx/hp690/mach.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * Machine vector for the HP690 | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | |||
14 | #include <asm/machvec.h> | ||
15 | #include <asm/rtc.h> | ||
16 | #include <asm/machvec_init.h> | ||
17 | |||
18 | #include <asm/io.h> | ||
19 | #include <asm/hd64461/hd64461.h> | ||
20 | #include <asm/irq.h> | ||
21 | |||
22 | struct sh_machine_vector mv_hp690 __initmv = { | ||
23 | .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM, | ||
24 | |||
25 | .mv_inb = hd64461_inb, | ||
26 | .mv_inw = hd64461_inw, | ||
27 | .mv_inl = hd64461_inl, | ||
28 | .mv_outb = hd64461_outb, | ||
29 | .mv_outw = hd64461_outw, | ||
30 | .mv_outl = hd64461_outl, | ||
31 | |||
32 | .mv_inb_p = hd64461_inb_p, | ||
33 | .mv_inw_p = hd64461_inw, | ||
34 | .mv_inl_p = hd64461_inl, | ||
35 | .mv_outb_p = hd64461_outb_p, | ||
36 | .mv_outw_p = hd64461_outw, | ||
37 | .mv_outl_p = hd64461_outl, | ||
38 | |||
39 | .mv_insb = hd64461_insb, | ||
40 | .mv_insw = hd64461_insw, | ||
41 | .mv_insl = hd64461_insl, | ||
42 | .mv_outsb = hd64461_outsb, | ||
43 | .mv_outsw = hd64461_outsw, | ||
44 | .mv_outsl = hd64461_outsl, | ||
45 | |||
46 | .mv_irq_demux = hd64461_irq_demux, | ||
47 | }; | ||
48 | ALIAS_MV(hp690) | ||
diff --git a/arch/sh/boards/hp6xx/hp680/mach.c b/arch/sh/boards/hp6xx/mach.c index d73486136045..08dbba910f74 100644 --- a/arch/sh/boards/hp6xx/hp680/mach.c +++ b/arch/sh/boards/hp6xx/mach.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/sh/boards/hp6xx/hp680/mach.c | 2 | * linux/arch/sh/boards/hp6xx/mach.c |
3 | * | 3 | * |
4 | * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) | 4 | * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) |
5 | * | 5 | * |
@@ -8,19 +8,12 @@ | |||
8 | * | 8 | * |
9 | * Machine vector for the HP680 | 9 | * Machine vector for the HP680 |
10 | */ | 10 | */ |
11 | |||
12 | #include <linux/init.h> | ||
13 | |||
14 | #include <asm/machvec.h> | 11 | #include <asm/machvec.h> |
15 | #include <asm/rtc.h> | 12 | #include <asm/hd64461.h> |
16 | #include <asm/machvec_init.h> | ||
17 | |||
18 | #include <asm/io.h> | 13 | #include <asm/io.h> |
19 | #include <asm/hd64461/hd64461.h> | ||
20 | #include <asm/hp6xx/io.h> | ||
21 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
22 | 15 | ||
23 | struct sh_machine_vector mv_hp680 __initmv = { | 16 | struct sh_machine_vector mv_hp6xx __initmv = { |
24 | .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM, | 17 | .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM, |
25 | 18 | ||
26 | .mv_inb = hd64461_inb, | 19 | .mv_inb = hd64461_inb, |
@@ -50,4 +43,4 @@ struct sh_machine_vector mv_hp680 __initmv = { | |||
50 | .mv_irq_demux = hd64461_irq_demux, | 43 | .mv_irq_demux = hd64461_irq_demux, |
51 | }; | 44 | }; |
52 | 45 | ||
53 | ALIAS_MV(hp680) | 46 | ALIAS_MV(hp6xx) |
diff --git a/arch/sh/boards/hp6xx/hp680/setup.c b/arch/sh/boards/hp6xx/setup.c index 4170190f2644..6d94a8e2e67a 100644 --- a/arch/sh/boards/hp6xx/hp680/setup.c +++ b/arch/sh/boards/hp6xx/setup.c | |||
@@ -11,18 +11,19 @@ | |||
11 | 11 | ||
12 | #include <linux/config.h> | 12 | #include <linux/config.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <asm/hd64461/hd64461.h> | ||
15 | #include <asm/io.h> | 14 | #include <asm/io.h> |
15 | #include <asm/hd64461.h> | ||
16 | #include <asm/hp6xx/hp6xx.h> | 16 | #include <asm/hp6xx/hp6xx.h> |
17 | #include <asm/cpu/dac.h> | 17 | #include <asm/cpu/dac.h> |
18 | 18 | ||
19 | const char *get_system_type(void) | 19 | const char *get_system_type(void) |
20 | { | 20 | { |
21 | return "HP680"; | 21 | return "HP6xx"; |
22 | } | 22 | } |
23 | 23 | ||
24 | int __init platform_setup(void) | 24 | int __init platform_setup(void) |
25 | { | 25 | { |
26 | u8 v8; | ||
26 | u16 v; | 27 | u16 v; |
27 | v = inw(HD64461_STBCR); | 28 | v = inw(HD64461_STBCR); |
28 | v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | | 29 | v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | |
@@ -30,12 +31,25 @@ int __init platform_setup(void) | |||
30 | HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | | 31 | HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | |
31 | HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST | | 32 | HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST | |
32 | HD64461_STBCR_SAFECKE_IST; | 33 | HD64461_STBCR_SAFECKE_IST; |
34 | #ifndef CONFIG_HD64461_ENABLER | ||
35 | v |= HD64461_STBCR_SPC1ST; | ||
36 | #endif | ||
33 | outw(v, HD64461_STBCR); | 37 | outw(v, HD64461_STBCR); |
34 | v = inw(HD64461_GPADR); | 38 | v = inw(HD64461_GPADR); |
35 | v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; | 39 | v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; |
36 | outw(v, HD64461_GPADR); | 40 | outw(v, HD64461_GPADR); |
37 | 41 | ||
42 | outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC0GCR); | ||
43 | |||
44 | #ifndef CONFIG_HD64461_ENABLER | ||
45 | outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC1GCR); | ||
46 | #endif | ||
47 | |||
48 | sh_dac_output(0, DAC_SPEAKER_VOLUME); | ||
38 | sh_dac_disable(DAC_SPEAKER_VOLUME); | 49 | sh_dac_disable(DAC_SPEAKER_VOLUME); |
50 | v8 = ctrl_inb(DACR); | ||
51 | v8 &= ~DACR_DAE; | ||
52 | ctrl_outb(v8,DACR); | ||
39 | 53 | ||
40 | return 0; | 54 | return 0; |
41 | } | 55 | } |
diff --git a/arch/sh/boards/overdrive/Makefile b/arch/sh/boards/overdrive/Makefile index 1762b59e9279..245f03baf762 100644 --- a/arch/sh/boards/overdrive/Makefile +++ b/arch/sh/boards/overdrive/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the STMicroelectronics Overdrive specific parts of the kernel | 2 | # Makefile for the STMicroelectronics Overdrive specific parts of the kernel |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := mach.o setup.o io.o irq.o led.o time.o | 5 | obj-y := mach.o setup.o io.o irq.o led.o |
6 | 6 | ||
7 | obj-$(CONFIG_PCI) += fpga.o galileo.o pcidma.o | 7 | obj-$(CONFIG_PCI) += fpga.o galileo.o pcidma.o |
8 | 8 | ||
diff --git a/arch/sh/boards/overdrive/setup.c b/arch/sh/boards/overdrive/setup.c index a36ce0284ed3..94f6165d33b8 100644 --- a/arch/sh/boards/overdrive/setup.c +++ b/arch/sh/boards/overdrive/setup.c | |||
@@ -17,8 +17,6 @@ | |||
17 | #include <asm/overdrive/overdrive.h> | 17 | #include <asm/overdrive/overdrive.h> |
18 | #include <asm/overdrive/fpga.h> | 18 | #include <asm/overdrive/fpga.h> |
19 | 19 | ||
20 | extern void od_time_init(void); | ||
21 | |||
22 | const char *get_system_type(void) | 20 | const char *get_system_type(void) |
23 | { | 21 | { |
24 | return "SH7750 Overdrive"; | 22 | return "SH7750 Overdrive"; |
@@ -31,11 +29,9 @@ int __init platform_setup(void) | |||
31 | { | 29 | { |
32 | #ifdef CONFIG_PCI | 30 | #ifdef CONFIG_PCI |
33 | init_overdrive_fpga(); | 31 | init_overdrive_fpga(); |
34 | galileo_init(); | 32 | galileo_init(); |
35 | #endif | 33 | #endif |
36 | 34 | ||
37 | board_time_init = od_time_init; | ||
38 | |||
39 | /* Enable RS232 receive buffers */ | 35 | /* Enable RS232 receive buffers */ |
40 | writel(0x1e, OVERDRIVE_CTRL); | 36 | writel(0x1e, OVERDRIVE_CTRL); |
41 | } | 37 | } |
diff --git a/arch/sh/boards/overdrive/time.c b/arch/sh/boards/overdrive/time.c deleted file mode 100644 index 68533690e097..000000000000 --- a/arch/sh/boards/overdrive/time.c +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | /* | ||
2 | * arch/sh/boards/overdrive/time.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) | ||
5 | * Copyright (C) 2002 Paul Mundt (lethal@chaoticdreams.org) | ||
6 | * | ||
7 | * May be copied or modified under the terms of the GNU General Public | ||
8 | * License. See linux/COPYING for more information. | ||
9 | * | ||
10 | * STMicroelectronics Overdrive Support. | ||
11 | */ | ||
12 | |||
13 | void od_time_init(void) | ||
14 | { | ||
15 | struct frqcr_data { | ||
16 | unsigned short frqcr; | ||
17 | struct { | ||
18 | unsigned char multiplier; | ||
19 | unsigned char divisor; | ||
20 | } factor[3]; | ||
21 | }; | ||
22 | |||
23 | static struct frqcr_data st40_frqcr_table[] = { | ||
24 | { 0x000, {{1,1}, {1,1}, {1,2}}}, | ||
25 | { 0x002, {{1,1}, {1,1}, {1,4}}}, | ||
26 | { 0x004, {{1,1}, {1,1}, {1,8}}}, | ||
27 | { 0x008, {{1,1}, {1,2}, {1,2}}}, | ||
28 | { 0x00A, {{1,1}, {1,2}, {1,4}}}, | ||
29 | { 0x00C, {{1,1}, {1,2}, {1,8}}}, | ||
30 | { 0x011, {{1,1}, {2,3}, {1,6}}}, | ||
31 | { 0x013, {{1,1}, {2,3}, {1,3}}}, | ||
32 | { 0x01A, {{1,1}, {1,2}, {1,4}}}, | ||
33 | { 0x01C, {{1,1}, {1,2}, {1,8}}}, | ||
34 | { 0x023, {{1,1}, {2,3}, {1,3}}}, | ||
35 | { 0x02C, {{1,1}, {1,2}, {1,8}}}, | ||
36 | { 0x048, {{1,2}, {1,2}, {1,4}}}, | ||
37 | { 0x04A, {{1,2}, {1,2}, {1,6}}}, | ||
38 | { 0x04C, {{1,2}, {1,2}, {1,8}}}, | ||
39 | { 0x05A, {{1,2}, {1,3}, {1,6}}}, | ||
40 | { 0x05C, {{1,2}, {1,3}, {1,6}}}, | ||
41 | { 0x063, {{1,2}, {1,4}, {1,4}}}, | ||
42 | { 0x06C, {{1,2}, {1,4}, {1,8}}}, | ||
43 | { 0x091, {{1,3}, {1,3}, {1,6}}}, | ||
44 | { 0x093, {{1,3}, {1,3}, {1,6}}}, | ||
45 | { 0x0A3, {{1,3}, {1,6}, {1,6}}}, | ||
46 | { 0x0DA, {{1,4}, {1,4}, {1,8}}}, | ||
47 | { 0x0DC, {{1,4}, {1,4}, {1,8}}}, | ||
48 | { 0x0EC, {{1,4}, {1,8}, {1,8}}}, | ||
49 | { 0x123, {{1,4}, {1,4}, {1,8}}}, | ||
50 | { 0x16C, {{1,4}, {1,8}, {1,8}}}, | ||
51 | }; | ||
52 | |||
53 | struct memclk_data { | ||
54 | unsigned char multiplier; | ||
55 | unsigned char divisor; | ||
56 | }; | ||
57 | static struct memclk_data st40_memclk_table[8] = { | ||
58 | {1,1}, // 000 | ||
59 | {1,2}, // 001 | ||
60 | {1,3}, // 010 | ||
61 | {2,3}, // 011 | ||
62 | {1,4}, // 100 | ||
63 | {1,6}, // 101 | ||
64 | {1,8}, // 110 | ||
65 | {1,8} // 111 | ||
66 | }; | ||
67 | |||
68 | unsigned long pvr; | ||
69 | |||
70 | /* | ||
71 | * This should probably be moved into the SH3 probing code, and then | ||
72 | * use the processor structure to determine which CPU we are running | ||
73 | * on. | ||
74 | */ | ||
75 | pvr = ctrl_inl(CCN_PVR); | ||
76 | printk("PVR %08x\n", pvr); | ||
77 | |||
78 | if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1) { | ||
79 | /* | ||
80 | * Unfortunatly the STB1 FRQCR values are different from the | ||
81 | * 7750 ones. | ||
82 | */ | ||
83 | struct frqcr_data *d; | ||
84 | int a; | ||
85 | unsigned long memclkcr; | ||
86 | struct memclk_data *e; | ||
87 | |||
88 | for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) { | ||
89 | d = &st40_frqcr_table[a]; | ||
90 | if (d->frqcr == (frqcr & 0x1ff)) | ||
91 | break; | ||
92 | } | ||
93 | if (a == ARRAY_SIZE(st40_frqcr_table)) { | ||
94 | d = st40_frqcr_table; | ||
95 | printk("ERROR: Unrecognised FRQCR value, using default multipliers\n"); | ||
96 | } | ||
97 | |||
98 | memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR); | ||
99 | e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK]; | ||
100 | |||
101 | printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n", | ||
102 | d->factor[0].multiplier, d->factor[0].divisor, | ||
103 | d->factor[1].multiplier, d->factor[1].divisor, | ||
104 | e->multiplier, e->divisor, | ||
105 | d->factor[2].multiplier, d->factor[2].divisor); | ||
106 | |||
107 | current_cpu_data.master_clock = current_cpu_data.module_clock * | ||
108 | d->factor[2].divisor / | ||
109 | d->factor[2].multiplier; | ||
110 | current_cpu_data.bus_clock = current_cpu_data.master_clock * | ||
111 | d->factor[1].multiplier / | ||
112 | d->factor[1].divisor; | ||
113 | current_cpu_data.memory_clock = current_cpu_data.master_clock * | ||
114 | e->multiplier / e->divisor; | ||
115 | current_cpu_data.cpu_clock = current_cpu_data.master_clock * | ||
116 | d->factor[0].multiplier / | ||
117 | d->factor[0].divisor; | ||
118 | } | ||
119 | |||
diff --git a/arch/sh/configs/hp680_defconfig b/arch/sh/configs/hp6xx_defconfig index c85d3655b53c..b36f102cec81 100644 --- a/arch/sh/configs/hp680_defconfig +++ b/arch/sh/configs/hp6xx_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.11-sh | 3 | # Linux kernel version: 2.6.15-sh |
4 | # Wed Mar 2 15:09:41 2005 | 4 | # Wed Jan 4 15:32:56 2006 |
5 | # | 5 | # |
6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
7 | CONFIG_UID16=y | 7 | CONFIG_UID16=y |
@@ -17,31 +17,36 @@ CONFIG_EXPERIMENTAL=y | |||
17 | # CONFIG_CLEAN_COMPILE is not set | 17 | # CONFIG_CLEAN_COMPILE is not set |
18 | CONFIG_BROKEN=y | 18 | CONFIG_BROKEN=y |
19 | CONFIG_BROKEN_ON_SMP=y | 19 | CONFIG_BROKEN_ON_SMP=y |
20 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
20 | 21 | ||
21 | # | 22 | # |
22 | # General setup | 23 | # General setup |
23 | # | 24 | # |
24 | CONFIG_LOCALVERSION="" | 25 | CONFIG_LOCALVERSION="" |
26 | CONFIG_LOCALVERSION_AUTO=y | ||
25 | CONFIG_SWAP=y | 27 | CONFIG_SWAP=y |
26 | # CONFIG_SYSVIPC is not set | 28 | # CONFIG_SYSVIPC is not set |
27 | # CONFIG_BSD_PROCESS_ACCT is not set | 29 | # CONFIG_BSD_PROCESS_ACCT is not set |
28 | # CONFIG_SYSCTL is not set | 30 | # CONFIG_SYSCTL is not set |
29 | # CONFIG_AUDIT is not set | 31 | CONFIG_HOTPLUG=y |
30 | CONFIG_LOG_BUF_SHIFT=14 | ||
31 | # CONFIG_HOTPLUG is not set | ||
32 | # CONFIG_IKCONFIG is not set | 32 | # CONFIG_IKCONFIG is not set |
33 | CONFIG_INITRAMFS_SOURCE="" | ||
34 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
33 | # CONFIG_EMBEDDED is not set | 35 | # CONFIG_EMBEDDED is not set |
34 | CONFIG_KALLSYMS=y | 36 | CONFIG_KALLSYMS=y |
35 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 37 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
38 | CONFIG_PRINTK=y | ||
39 | CONFIG_BUG=y | ||
40 | CONFIG_BASE_FULL=y | ||
36 | CONFIG_FUTEX=y | 41 | CONFIG_FUTEX=y |
37 | CONFIG_EPOLL=y | 42 | CONFIG_EPOLL=y |
38 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
39 | CONFIG_SHMEM=y | 43 | CONFIG_SHMEM=y |
40 | CONFIG_CC_ALIGN_FUNCTIONS=0 | 44 | CONFIG_CC_ALIGN_FUNCTIONS=0 |
41 | CONFIG_CC_ALIGN_LABELS=0 | 45 | CONFIG_CC_ALIGN_LABELS=0 |
42 | CONFIG_CC_ALIGN_LOOPS=0 | 46 | CONFIG_CC_ALIGN_LOOPS=0 |
43 | CONFIG_CC_ALIGN_JUMPS=0 | 47 | CONFIG_CC_ALIGN_JUMPS=0 |
44 | # CONFIG_TINY_SHMEM is not set | 48 | # CONFIG_TINY_SHMEM is not set |
49 | CONFIG_BASE_SMALL=0 | ||
45 | 50 | ||
46 | # | 51 | # |
47 | # Loadable module support | 52 | # Loadable module support |
@@ -49,6 +54,24 @@ CONFIG_CC_ALIGN_JUMPS=0 | |||
49 | # CONFIG_MODULES is not set | 54 | # CONFIG_MODULES is not set |
50 | 55 | ||
51 | # | 56 | # |
57 | # Block layer | ||
58 | # | ||
59 | # CONFIG_LBD is not set | ||
60 | |||
61 | # | ||
62 | # IO Schedulers | ||
63 | # | ||
64 | CONFIG_IOSCHED_NOOP=y | ||
65 | CONFIG_IOSCHED_AS=y | ||
66 | CONFIG_IOSCHED_DEADLINE=y | ||
67 | CONFIG_IOSCHED_CFQ=y | ||
68 | CONFIG_DEFAULT_AS=y | ||
69 | # CONFIG_DEFAULT_DEADLINE is not set | ||
70 | # CONFIG_DEFAULT_CFQ is not set | ||
71 | # CONFIG_DEFAULT_NOOP is not set | ||
72 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
73 | |||
74 | # | ||
52 | # System type | 75 | # System type |
53 | # | 76 | # |
54 | # CONFIG_SH_SOLUTION_ENGINE is not set | 77 | # CONFIG_SH_SOLUTION_ENGINE is not set |
@@ -58,9 +81,7 @@ CONFIG_CC_ALIGN_JUMPS=0 | |||
58 | # CONFIG_SH_7751_SYSTEMH is not set | 81 | # CONFIG_SH_7751_SYSTEMH is not set |
59 | # CONFIG_SH_STB1_HARP is not set | 82 | # CONFIG_SH_STB1_HARP is not set |
60 | # CONFIG_SH_STB1_OVERDRIVE is not set | 83 | # CONFIG_SH_STB1_OVERDRIVE is not set |
61 | # CONFIG_SH_HP620 is not set | 84 | CONFIG_SH_HP6XX=y |
62 | CONFIG_SH_HP680=y | ||
63 | # CONFIG_SH_HP690 is not set | ||
64 | # CONFIG_SH_CQREEK is not set | 85 | # CONFIG_SH_CQREEK is not set |
65 | # CONFIG_SH_DMIDA is not set | 86 | # CONFIG_SH_DMIDA is not set |
66 | # CONFIG_SH_EC3104 is not set | 87 | # CONFIG_SH_EC3104 is not set |
@@ -77,43 +98,90 @@ CONFIG_SH_HP680=y | |||
77 | # CONFIG_SH_RTS7751R2D is not set | 98 | # CONFIG_SH_RTS7751R2D is not set |
78 | # CONFIG_SH_EDOSK7705 is not set | 99 | # CONFIG_SH_EDOSK7705 is not set |
79 | # CONFIG_SH_SH4202_MICRODEV is not set | 100 | # CONFIG_SH_SH4202_MICRODEV is not set |
101 | # CONFIG_SH_LANDISK is not set | ||
102 | # CONFIG_SH_TITAN is not set | ||
80 | # CONFIG_SH_UNKNOWN is not set | 103 | # CONFIG_SH_UNKNOWN is not set |
81 | # CONFIG_CPU_SH2 is not set | 104 | |
105 | # | ||
106 | # Processor selection | ||
107 | # | ||
82 | CONFIG_CPU_SH3=y | 108 | CONFIG_CPU_SH3=y |
83 | # CONFIG_CPU_SH4 is not set | 109 | |
110 | # | ||
111 | # SH-2 Processor Support | ||
112 | # | ||
84 | # CONFIG_CPU_SUBTYPE_SH7604 is not set | 113 | # CONFIG_CPU_SUBTYPE_SH7604 is not set |
114 | |||
115 | # | ||
116 | # SH-3 Processor Support | ||
117 | # | ||
85 | # CONFIG_CPU_SUBTYPE_SH7300 is not set | 118 | # CONFIG_CPU_SUBTYPE_SH7300 is not set |
86 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | 119 | # CONFIG_CPU_SUBTYPE_SH7705 is not set |
87 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | 120 | # CONFIG_CPU_SUBTYPE_SH7707 is not set |
88 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | 121 | # CONFIG_CPU_SUBTYPE_SH7708 is not set |
89 | CONFIG_CPU_SUBTYPE_SH7709=y | 122 | CONFIG_CPU_SUBTYPE_SH7709=y |
123 | |||
124 | # | ||
125 | # SH-4 Processor Support | ||
126 | # | ||
90 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | 127 | # CONFIG_CPU_SUBTYPE_SH7750 is not set |
128 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
129 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
130 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
91 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | 131 | # CONFIG_CPU_SUBTYPE_SH7751 is not set |
132 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
92 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | 133 | # CONFIG_CPU_SUBTYPE_SH7760 is not set |
93 | # CONFIG_CPU_SUBTYPE_SH73180 is not set | 134 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set |
135 | |||
136 | # | ||
137 | # ST40 Processor Support | ||
138 | # | ||
94 | # CONFIG_CPU_SUBTYPE_ST40STB1 is not set | 139 | # CONFIG_CPU_SUBTYPE_ST40STB1 is not set |
95 | # CONFIG_CPU_SUBTYPE_ST40GX1 is not set | 140 | # CONFIG_CPU_SUBTYPE_ST40GX1 is not set |
96 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | 141 | |
142 | # | ||
143 | # SH-4A Processor Support | ||
144 | # | ||
145 | # CONFIG_CPU_SUBTYPE_SH73180 is not set | ||
146 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
147 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
148 | |||
149 | # | ||
150 | # Memory management options | ||
151 | # | ||
97 | CONFIG_MMU=y | 152 | CONFIG_MMU=y |
98 | # CONFIG_CMDLINE_BOOL is not set | 153 | CONFIG_SELECT_MEMORY_MODEL=y |
154 | CONFIG_FLATMEM_MANUAL=y | ||
155 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
156 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
157 | CONFIG_FLATMEM=y | ||
158 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
159 | # CONFIG_SPARSEMEM_STATIC is not set | ||
160 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
161 | |||
162 | # | ||
163 | # Cache configuration | ||
164 | # | ||
165 | # CONFIG_SH_DIRECT_MAPPED is not set | ||
166 | # CONFIG_SH_WRITETHROUGH is not set | ||
167 | # CONFIG_SH_OCRAM is not set | ||
99 | CONFIG_MEMORY_START=0x0c000000 | 168 | CONFIG_MEMORY_START=0x0c000000 |
100 | CONFIG_MEMORY_SIZE=0x00400000 | 169 | CONFIG_MEMORY_SIZE=0x00400000 |
101 | CONFIG_MEMORY_SET=y | 170 | |
102 | # CONFIG_MEMORY_OVERRIDE is not set | 171 | # |
172 | # Processor features | ||
173 | # | ||
174 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
103 | CONFIG_SH_RTC=y | 175 | CONFIG_SH_RTC=y |
104 | # CONFIG_SH_DSP is not set | 176 | # CONFIG_SH_DSP is not set |
105 | CONFIG_SH_ADC=y | 177 | CONFIG_SH_ADC=y |
106 | CONFIG_SH_HP600=y | 178 | |
107 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | 179 | # |
108 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | 180 | # Timer support |
109 | CONFIG_CPU_LITTLE_ENDIAN=y | 181 | # |
110 | # CONFIG_PREEMPT is not set | 182 | CONFIG_SH_TMU=y |
111 | # CONFIG_UBC_WAKEUP is not set | 183 | CONFIG_SH_PCLK_FREQ_BOOL=y |
112 | # CONFIG_SH_WRITETHROUGH is not set | 184 | CONFIG_SH_PCLK_FREQ=22110000 |
113 | # CONFIG_SH_OCRAM is not set | ||
114 | # CONFIG_SMP is not set | ||
115 | CONFIG_SH_PCLK_CALC=y | ||
116 | CONFIG_SH_PCLK_FREQ=1193182 | ||
117 | 185 | ||
118 | # | 186 | # |
119 | # CPU Frequency scaling | 187 | # CPU Frequency scaling |
@@ -123,7 +191,10 @@ CONFIG_SH_PCLK_FREQ=1193182 | |||
123 | # | 191 | # |
124 | # DMA support | 192 | # DMA support |
125 | # | 193 | # |
126 | # CONFIG_SH_DMA is not set | 194 | CONFIG_SH_DMA=y |
195 | CONFIG_NR_ONCHIP_DMA_CHANNELS=4 | ||
196 | # CONFIG_NR_DMA_CHANNELS_BOOL is not set | ||
197 | # CONFIG_DMA_PAGE_OPS is not set | ||
127 | 198 | ||
128 | # | 199 | # |
129 | # Companion Chips | 200 | # Companion Chips |
@@ -132,21 +203,47 @@ CONFIG_HD6446X_SERIES=y | |||
132 | CONFIG_HD64461=y | 203 | CONFIG_HD64461=y |
133 | # CONFIG_HD64465 is not set | 204 | # CONFIG_HD64465 is not set |
134 | CONFIG_HD64461_IRQ=36 | 205 | CONFIG_HD64461_IRQ=36 |
135 | # CONFIG_HD64461_ENABLER is not set | 206 | CONFIG_HD64461_IOBASE=0xb0000000 |
207 | CONFIG_HD64461_ENABLER=y | ||
208 | |||
209 | # | ||
210 | # Kernel features | ||
211 | # | ||
212 | # CONFIG_KEXEC is not set | ||
213 | # CONFIG_PREEMPT is not set | ||
214 | # CONFIG_SMP is not set | ||
136 | 215 | ||
137 | # | 216 | # |
138 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | 217 | # Boot options |
139 | # | 218 | # |
219 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
220 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
221 | # CONFIG_UBC_WAKEUP is not set | ||
222 | # CONFIG_CMDLINE_BOOL is not set | ||
223 | |||
224 | # | ||
225 | # Bus options | ||
226 | # | ||
227 | CONFIG_ISA=y | ||
140 | # CONFIG_PCI is not set | 228 | # CONFIG_PCI is not set |
141 | 229 | ||
142 | # | 230 | # |
143 | # PCCARD (PCMCIA/CardBus) support | 231 | # PCCARD (PCMCIA/CardBus) support |
144 | # | 232 | # |
145 | # CONFIG_PCCARD is not set | 233 | CONFIG_PCCARD=y |
234 | # CONFIG_PCMCIA_DEBUG is not set | ||
235 | CONFIG_PCMCIA=y | ||
236 | CONFIG_PCMCIA_LOAD_CIS=y | ||
237 | CONFIG_PCMCIA_IOCTL=y | ||
146 | 238 | ||
147 | # | 239 | # |
148 | # PC-card bridges | 240 | # PC-card bridges |
149 | # | 241 | # |
242 | # CONFIG_I82365 is not set | ||
243 | # CONFIG_TCIC is not set | ||
244 | CONFIG_HD64461_PCMCIA=y | ||
245 | CONFIG_HD64461_PCMCIA_SOCKETS=1 | ||
246 | CONFIG_PCMCIA_PROBE=y | ||
150 | 247 | ||
151 | # | 248 | # |
152 | # PCI Hotplug Support | 249 | # PCI Hotplug Support |
@@ -160,9 +257,9 @@ CONFIG_BINFMT_ELF=y | |||
160 | # CONFIG_BINFMT_MISC is not set | 257 | # CONFIG_BINFMT_MISC is not set |
161 | 258 | ||
162 | # | 259 | # |
163 | # SH initrd options | 260 | # Networking |
164 | # | 261 | # |
165 | # CONFIG_EMBEDDED_RAMDISK is not set | 262 | # CONFIG_NET is not set |
166 | 263 | ||
167 | # | 264 | # |
168 | # Device Drivers | 265 | # Device Drivers |
@@ -173,7 +270,11 @@ CONFIG_BINFMT_ELF=y | |||
173 | # | 270 | # |
174 | # CONFIG_STANDALONE is not set | 271 | # CONFIG_STANDALONE is not set |
175 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 272 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
176 | # CONFIG_FW_LOADER is not set | 273 | CONFIG_FW_LOADER=y |
274 | |||
275 | # | ||
276 | # Connector - unified userspace <-> kernelspace linker | ||
277 | # | ||
177 | 278 | ||
178 | # | 279 | # |
179 | # Memory Technology Devices (MTD) | 280 | # Memory Technology Devices (MTD) |
@@ -188,30 +289,20 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y | |||
188 | # | 289 | # |
189 | # Plug and Play support | 290 | # Plug and Play support |
190 | # | 291 | # |
292 | # CONFIG_PNP is not set | ||
191 | 293 | ||
192 | # | 294 | # |
193 | # Block devices | 295 | # Block devices |
194 | # | 296 | # |
195 | # CONFIG_BLK_DEV_FD is not set | ||
196 | # CONFIG_BLK_DEV_COW_COMMON is not set | 297 | # CONFIG_BLK_DEV_COW_COMMON is not set |
197 | # CONFIG_BLK_DEV_LOOP is not set | 298 | # CONFIG_BLK_DEV_LOOP is not set |
198 | CONFIG_BLK_DEV_RAM=y | 299 | CONFIG_BLK_DEV_RAM=y |
199 | CONFIG_BLK_DEV_RAM_COUNT=16 | 300 | CONFIG_BLK_DEV_RAM_COUNT=16 |
200 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 301 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
201 | CONFIG_BLK_DEV_INITRD=y | 302 | CONFIG_BLK_DEV_INITRD=y |
202 | CONFIG_INITRAMFS_SOURCE="" | ||
203 | # CONFIG_LBD is not set | ||
204 | # CONFIG_CDROM_PKTCDVD is not set | 303 | # CONFIG_CDROM_PKTCDVD is not set |
205 | 304 | ||
206 | # | 305 | # |
207 | # IO Schedulers | ||
208 | # | ||
209 | CONFIG_IOSCHED_NOOP=y | ||
210 | CONFIG_IOSCHED_AS=y | ||
211 | CONFIG_IOSCHED_DEADLINE=y | ||
212 | CONFIG_IOSCHED_CFQ=y | ||
213 | |||
214 | # | ||
215 | # ATA/ATAPI/MFM/RLL support | 306 | # ATA/ATAPI/MFM/RLL support |
216 | # | 307 | # |
217 | CONFIG_IDE=y | 308 | CONFIG_IDE=y |
@@ -224,6 +315,7 @@ CONFIG_BLK_DEV_IDE=y | |||
224 | # CONFIG_BLK_DEV_IDE_SATA is not set | 315 | # CONFIG_BLK_DEV_IDE_SATA is not set |
225 | CONFIG_BLK_DEV_IDEDISK=y | 316 | CONFIG_BLK_DEV_IDEDISK=y |
226 | # CONFIG_IDEDISK_MULTI_MODE is not set | 317 | # CONFIG_IDEDISK_MULTI_MODE is not set |
318 | # CONFIG_BLK_DEV_IDECS is not set | ||
227 | # CONFIG_BLK_DEV_IDECD is not set | 319 | # CONFIG_BLK_DEV_IDECD is not set |
228 | # CONFIG_BLK_DEV_IDETAPE is not set | 320 | # CONFIG_BLK_DEV_IDETAPE is not set |
229 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | 321 | # CONFIG_BLK_DEV_IDEFLOPPY is not set |
@@ -235,6 +327,7 @@ CONFIG_BLK_DEV_IDEDISK=y | |||
235 | CONFIG_IDE_GENERIC=y | 327 | CONFIG_IDE_GENERIC=y |
236 | CONFIG_IDE_SH=y | 328 | CONFIG_IDE_SH=y |
237 | # CONFIG_IDE_ARM is not set | 329 | # CONFIG_IDE_ARM is not set |
330 | # CONFIG_IDE_CHIPSETS is not set | ||
238 | # CONFIG_BLK_DEV_IDEDMA is not set | 331 | # CONFIG_BLK_DEV_IDEDMA is not set |
239 | # CONFIG_IDEDMA_AUTO is not set | 332 | # CONFIG_IDEDMA_AUTO is not set |
240 | # CONFIG_BLK_DEV_HD is not set | 333 | # CONFIG_BLK_DEV_HD is not set |
@@ -242,9 +335,15 @@ CONFIG_IDE_SH=y | |||
242 | # | 335 | # |
243 | # SCSI device support | 336 | # SCSI device support |
244 | # | 337 | # |
338 | # CONFIG_RAID_ATTRS is not set | ||
245 | # CONFIG_SCSI is not set | 339 | # CONFIG_SCSI is not set |
246 | 340 | ||
247 | # | 341 | # |
342 | # Old CD-ROM drivers (not SCSI, not IDE) | ||
343 | # | ||
344 | # CONFIG_CD_NO_IDESCSI is not set | ||
345 | |||
346 | # | ||
248 | # Multi-device support (RAID and LVM) | 347 | # Multi-device support (RAID and LVM) |
249 | # | 348 | # |
250 | # CONFIG_MD is not set | 349 | # CONFIG_MD is not set |
@@ -252,6 +351,7 @@ CONFIG_IDE_SH=y | |||
252 | # | 351 | # |
253 | # Fusion MPT device support | 352 | # Fusion MPT device support |
254 | # | 353 | # |
354 | # CONFIG_FUSION is not set | ||
255 | 355 | ||
256 | # | 356 | # |
257 | # IEEE 1394 (FireWire) support | 357 | # IEEE 1394 (FireWire) support |
@@ -263,9 +363,8 @@ CONFIG_IDE_SH=y | |||
263 | # | 363 | # |
264 | 364 | ||
265 | # | 365 | # |
266 | # Networking support | 366 | # Network device support |
267 | # | 367 | # |
268 | # CONFIG_NET is not set | ||
269 | # CONFIG_NETPOLL is not set | 368 | # CONFIG_NETPOLL is not set |
270 | # CONFIG_NET_POLL_CONTROLLER is not set | 369 | # CONFIG_NET_POLL_CONTROLLER is not set |
271 | 370 | ||
@@ -296,17 +395,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
296 | # CONFIG_INPUT_EVBUG is not set | 395 | # CONFIG_INPUT_EVBUG is not set |
297 | 396 | ||
298 | # | 397 | # |
299 | # Input I/O drivers | ||
300 | # | ||
301 | # CONFIG_GAMEPORT is not set | ||
302 | CONFIG_SOUND_GAMEPORT=y | ||
303 | CONFIG_SERIO=y | ||
304 | # CONFIG_SERIO_I8042 is not set | ||
305 | # CONFIG_SERIO_SERPORT is not set | ||
306 | # CONFIG_SERIO_CT82C710 is not set | ||
307 | # CONFIG_SERIO_RAW is not set | ||
308 | |||
309 | # | ||
310 | # Input Device Drivers | 398 | # Input Device Drivers |
311 | # | 399 | # |
312 | # CONFIG_INPUT_KEYBOARD is not set | 400 | # CONFIG_INPUT_KEYBOARD is not set |
@@ -316,6 +404,15 @@ CONFIG_SERIO=y | |||
316 | # CONFIG_INPUT_MISC is not set | 404 | # CONFIG_INPUT_MISC is not set |
317 | 405 | ||
318 | # | 406 | # |
407 | # Hardware I/O ports | ||
408 | # | ||
409 | CONFIG_SERIO=y | ||
410 | # CONFIG_SERIO_I8042 is not set | ||
411 | # CONFIG_SERIO_SERPORT is not set | ||
412 | # CONFIG_SERIO_RAW is not set | ||
413 | # CONFIG_GAMEPORT is not set | ||
414 | |||
415 | # | ||
319 | # Character devices | 416 | # Character devices |
320 | # | 417 | # |
321 | CONFIG_VT=y | 418 | CONFIG_VT=y |
@@ -353,10 +450,22 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
353 | # | 450 | # |
354 | # Ftape, the floppy tape device driver | 451 | # Ftape, the floppy tape device driver |
355 | # | 452 | # |
356 | # CONFIG_DRM is not set | 453 | |
454 | # | ||
455 | # PCMCIA character devices | ||
456 | # | ||
457 | # CONFIG_SYNCLINK_CS is not set | ||
458 | # CONFIG_CARDMAN_4000 is not set | ||
459 | # CONFIG_CARDMAN_4040 is not set | ||
357 | # CONFIG_RAW_DRIVER is not set | 460 | # CONFIG_RAW_DRIVER is not set |
358 | 461 | ||
359 | # | 462 | # |
463 | # TPM devices | ||
464 | # | ||
465 | # CONFIG_TCG_TPM is not set | ||
466 | # CONFIG_TELCLOCK is not set | ||
467 | |||
468 | # | ||
360 | # I2C support | 469 | # I2C support |
361 | # | 470 | # |
362 | # CONFIG_I2C is not set | 471 | # CONFIG_I2C is not set |
@@ -367,10 +476,21 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
367 | # CONFIG_W1 is not set | 476 | # CONFIG_W1 is not set |
368 | 477 | ||
369 | # | 478 | # |
479 | # Hardware Monitoring support | ||
480 | # | ||
481 | CONFIG_HWMON=y | ||
482 | # CONFIG_HWMON_VID is not set | ||
483 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
484 | |||
485 | # | ||
370 | # Misc devices | 486 | # Misc devices |
371 | # | 487 | # |
372 | 488 | ||
373 | # | 489 | # |
490 | # Multimedia Capabilities Port drivers | ||
491 | # | ||
492 | |||
493 | # | ||
374 | # Multimedia devices | 494 | # Multimedia devices |
375 | # | 495 | # |
376 | # CONFIG_VIDEO_DEV is not set | 496 | # CONFIG_VIDEO_DEV is not set |
@@ -383,27 +503,35 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
383 | # Graphics support | 503 | # Graphics support |
384 | # | 504 | # |
385 | CONFIG_FB=y | 505 | CONFIG_FB=y |
506 | CONFIG_FB_CFB_FILLRECT=y | ||
507 | CONFIG_FB_CFB_COPYAREA=y | ||
508 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
509 | # CONFIG_FB_MACMODES is not set | ||
386 | # CONFIG_FB_MODE_HELPERS is not set | 510 | # CONFIG_FB_MODE_HELPERS is not set |
387 | # CONFIG_FB_TILEBLITTING is not set | 511 | # CONFIG_FB_TILEBLITTING is not set |
388 | # CONFIG_FB_EPSON1355 is not set | 512 | # CONFIG_FB_EPSON1355 is not set |
513 | # CONFIG_FB_S1D13XXX is not set | ||
389 | CONFIG_FB_HIT=y | 514 | CONFIG_FB_HIT=y |
390 | # CONFIG_FB_VIRTUAL is not set | 515 | # CONFIG_FB_VIRTUAL is not set |
391 | 516 | ||
392 | # | 517 | # |
393 | # Console display driver support | 518 | # Console display driver support |
394 | # | 519 | # |
395 | # CONFIG_VGA_CONSOLE is not set | 520 | # CONFIG_MDA_CONSOLE is not set |
396 | CONFIG_DUMMY_CONSOLE=y | 521 | CONFIG_DUMMY_CONSOLE=y |
397 | CONFIG_FRAMEBUFFER_CONSOLE=y | 522 | CONFIG_FRAMEBUFFER_CONSOLE=y |
523 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
398 | CONFIG_FONTS=y | 524 | CONFIG_FONTS=y |
399 | # CONFIG_FONT_8x8 is not set | 525 | # CONFIG_FONT_8x8 is not set |
400 | # CONFIG_FONT_8x16 is not set | 526 | # CONFIG_FONT_8x16 is not set |
401 | # CONFIG_FONT_6x11 is not set | 527 | # CONFIG_FONT_6x11 is not set |
528 | # CONFIG_FONT_7x14 is not set | ||
402 | CONFIG_FONT_PEARL_8x8=y | 529 | CONFIG_FONT_PEARL_8x8=y |
403 | # CONFIG_FONT_ACORN_8x8 is not set | 530 | # CONFIG_FONT_ACORN_8x8 is not set |
404 | # CONFIG_FONT_MINI_4x6 is not set | 531 | # CONFIG_FONT_MINI_4x6 is not set |
405 | # CONFIG_FONT_SUN8x16 is not set | 532 | # CONFIG_FONT_SUN8x16 is not set |
406 | # CONFIG_FONT_SUN12x22 is not set | 533 | # CONFIG_FONT_SUN12x22 is not set |
534 | # CONFIG_FONT_10x18 is not set | ||
407 | 535 | ||
408 | # | 536 | # |
409 | # Logo configuration | 537 | # Logo configuration |
@@ -414,7 +542,22 @@ CONFIG_FONT_PEARL_8x8=y | |||
414 | # | 542 | # |
415 | # Sound | 543 | # Sound |
416 | # | 544 | # |
417 | # CONFIG_SOUND is not set | 545 | CONFIG_SOUND=y |
546 | |||
547 | # | ||
548 | # Advanced Linux Sound Architecture | ||
549 | # | ||
550 | # CONFIG_SND is not set | ||
551 | |||
552 | # | ||
553 | # Open Sound System | ||
554 | # | ||
555 | CONFIG_SOUND_PRIME=y | ||
556 | # CONFIG_OBSOLETE_OSS_DRIVER is not set | ||
557 | # CONFIG_SOUND_MSNDCLAS is not set | ||
558 | # CONFIG_SOUND_MSNDPIN is not set | ||
559 | CONFIG_SOUND_SH_DAC_AUDIO=y | ||
560 | CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL=1 | ||
418 | 561 | ||
419 | # | 562 | # |
420 | # USB support | 563 | # USB support |
@@ -423,7 +566,7 @@ CONFIG_FONT_PEARL_8x8=y | |||
423 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 566 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
424 | 567 | ||
425 | # | 568 | # |
426 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information | 569 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' |
427 | # | 570 | # |
428 | 571 | ||
429 | # | 572 | # |
@@ -442,25 +585,29 @@ CONFIG_FONT_PEARL_8x8=y | |||
442 | # CONFIG_INFINIBAND is not set | 585 | # CONFIG_INFINIBAND is not set |
443 | 586 | ||
444 | # | 587 | # |
588 | # SN Devices | ||
589 | # | ||
590 | |||
591 | # | ||
445 | # File systems | 592 | # File systems |
446 | # | 593 | # |
447 | CONFIG_EXT2_FS=y | 594 | CONFIG_EXT2_FS=y |
448 | # CONFIG_EXT2_FS_XATTR is not set | 595 | # CONFIG_EXT2_FS_XATTR is not set |
596 | # CONFIG_EXT2_FS_XIP is not set | ||
449 | # CONFIG_EXT3_FS is not set | 597 | # CONFIG_EXT3_FS is not set |
450 | # CONFIG_JBD is not set | 598 | # CONFIG_JBD is not set |
451 | # CONFIG_REISERFS_FS is not set | 599 | # CONFIG_REISERFS_FS is not set |
452 | # CONFIG_JFS_FS is not set | 600 | # CONFIG_JFS_FS is not set |
453 | 601 | # CONFIG_FS_POSIX_ACL is not set | |
454 | # | ||
455 | # XFS support | ||
456 | # | ||
457 | # CONFIG_XFS_FS is not set | 602 | # CONFIG_XFS_FS is not set |
458 | # CONFIG_MINIX_FS is not set | 603 | # CONFIG_MINIX_FS is not set |
459 | # CONFIG_ROMFS_FS is not set | 604 | # CONFIG_ROMFS_FS is not set |
605 | CONFIG_INOTIFY=y | ||
460 | # CONFIG_QUOTA is not set | 606 | # CONFIG_QUOTA is not set |
461 | CONFIG_DNOTIFY=y | 607 | CONFIG_DNOTIFY=y |
462 | # CONFIG_AUTOFS_FS is not set | 608 | # CONFIG_AUTOFS_FS is not set |
463 | # CONFIG_AUTOFS4_FS is not set | 609 | # CONFIG_AUTOFS4_FS is not set |
610 | # CONFIG_FUSE_FS is not set | ||
464 | 611 | ||
465 | # | 612 | # |
466 | # CD-ROM/DVD Filesystems | 613 | # CD-ROM/DVD Filesystems |
@@ -471,8 +618,11 @@ CONFIG_DNOTIFY=y | |||
471 | # | 618 | # |
472 | # DOS/FAT/NT Filesystems | 619 | # DOS/FAT/NT Filesystems |
473 | # | 620 | # |
621 | CONFIG_FAT_FS=y | ||
474 | # CONFIG_MSDOS_FS is not set | 622 | # CONFIG_MSDOS_FS is not set |
475 | # CONFIG_VFAT_FS is not set | 623 | CONFIG_VFAT_FS=y |
624 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
625 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
476 | # CONFIG_NTFS_FS is not set | 626 | # CONFIG_NTFS_FS is not set |
477 | 627 | ||
478 | # | 628 | # |
@@ -481,14 +631,11 @@ CONFIG_DNOTIFY=y | |||
481 | CONFIG_PROC_FS=y | 631 | CONFIG_PROC_FS=y |
482 | CONFIG_PROC_KCORE=y | 632 | CONFIG_PROC_KCORE=y |
483 | CONFIG_SYSFS=y | 633 | CONFIG_SYSFS=y |
484 | CONFIG_DEVFS_FS=y | ||
485 | CONFIG_DEVFS_MOUNT=y | ||
486 | # CONFIG_DEVFS_DEBUG is not set | ||
487 | # CONFIG_DEVPTS_FS_XATTR is not set | ||
488 | # CONFIG_TMPFS is not set | 634 | # CONFIG_TMPFS is not set |
489 | # CONFIG_HUGETLBFS is not set | 635 | # CONFIG_HUGETLBFS is not set |
490 | # CONFIG_HUGETLB_PAGE is not set | 636 | # CONFIG_HUGETLB_PAGE is not set |
491 | CONFIG_RAMFS=y | 637 | CONFIG_RAMFS=y |
638 | # CONFIG_RELAYFS_FS is not set | ||
492 | 639 | ||
493 | # | 640 | # |
494 | # Miscellaneous filesystems | 641 | # Miscellaneous filesystems |
@@ -516,7 +663,46 @@ CONFIG_MSDOS_PARTITION=y | |||
516 | # | 663 | # |
517 | # Native Language Support | 664 | # Native Language Support |
518 | # | 665 | # |
519 | # CONFIG_NLS is not set | 666 | CONFIG_NLS=y |
667 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
668 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
669 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
670 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
671 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
672 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
673 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
674 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
675 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
676 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
677 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
678 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
679 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
680 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
681 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
682 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
683 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
684 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
685 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
686 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
687 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
688 | # CONFIG_NLS_ISO8859_8 is not set | ||
689 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
690 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
691 | # CONFIG_NLS_ASCII is not set | ||
692 | # CONFIG_NLS_ISO8859_1 is not set | ||
693 | # CONFIG_NLS_ISO8859_2 is not set | ||
694 | # CONFIG_NLS_ISO8859_3 is not set | ||
695 | # CONFIG_NLS_ISO8859_4 is not set | ||
696 | # CONFIG_NLS_ISO8859_5 is not set | ||
697 | # CONFIG_NLS_ISO8859_6 is not set | ||
698 | # CONFIG_NLS_ISO8859_7 is not set | ||
699 | # CONFIG_NLS_ISO8859_9 is not set | ||
700 | # CONFIG_NLS_ISO8859_13 is not set | ||
701 | # CONFIG_NLS_ISO8859_14 is not set | ||
702 | # CONFIG_NLS_ISO8859_15 is not set | ||
703 | # CONFIG_NLS_KOI8_R is not set | ||
704 | # CONFIG_NLS_KOI8_U is not set | ||
705 | # CONFIG_NLS_UTF8 is not set | ||
520 | 706 | ||
521 | # | 707 | # |
522 | # Profiling support | 708 | # Profiling support |
@@ -526,7 +712,9 @@ CONFIG_MSDOS_PARTITION=y | |||
526 | # | 712 | # |
527 | # Kernel hacking | 713 | # Kernel hacking |
528 | # | 714 | # |
715 | # CONFIG_PRINTK_TIME is not set | ||
529 | # CONFIG_DEBUG_KERNEL is not set | 716 | # CONFIG_DEBUG_KERNEL is not set |
717 | CONFIG_LOG_BUF_SHIFT=14 | ||
530 | # CONFIG_FRAME_POINTER is not set | 718 | # CONFIG_FRAME_POINTER is not set |
531 | # CONFIG_SH_STANDARD_BIOS is not set | 719 | # CONFIG_SH_STANDARD_BIOS is not set |
532 | # CONFIG_KGDB is not set | 720 | # CONFIG_KGDB is not set |
@@ -550,5 +738,6 @@ CONFIG_MSDOS_PARTITION=y | |||
550 | # Library routines | 738 | # Library routines |
551 | # | 739 | # |
552 | # CONFIG_CRC_CCITT is not set | 740 | # CONFIG_CRC_CCITT is not set |
741 | # CONFIG_CRC16 is not set | ||
553 | CONFIG_CRC32=y | 742 | CONFIG_CRC32=y |
554 | # CONFIG_LIBCRC32C is not set | 743 | # CONFIG_LIBCRC32C is not set |
diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c index 96e3036ec2bb..47c3e837599b 100644 --- a/arch/sh/drivers/dma/dma-api.c +++ b/arch/sh/drivers/dma/dma-api.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * SuperH-specific DMA management API | 4 | * SuperH-specific DMA management API |
5 | * | 5 | * |
6 | * Copyright (C) 2003, 2004 Paul Mundt | 6 | * Copyright (C) 2003, 2004, 2005 Paul Mundt |
7 | * | 7 | * |
8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/spinlock.h> | 15 | #include <linux/spinlock.h> |
16 | #include <linux/proc_fs.h> | 16 | #include <linux/proc_fs.h> |
17 | #include <linux/list.h> | 17 | #include <linux/list.h> |
18 | #include <linux/platform_device.h> | ||
18 | #include <asm/dma.h> | 19 | #include <asm/dma.h> |
19 | 20 | ||
20 | DEFINE_SPINLOCK(dma_spin_lock); | 21 | DEFINE_SPINLOCK(dma_spin_lock); |
@@ -55,16 +56,14 @@ static LIST_HEAD(registered_dmac_list); | |||
55 | 56 | ||
56 | struct dma_info *get_dma_info(unsigned int chan) | 57 | struct dma_info *get_dma_info(unsigned int chan) |
57 | { | 58 | { |
58 | struct list_head *pos, *tmp; | 59 | struct dma_info *info; |
59 | unsigned int total = 0; | 60 | unsigned int total = 0; |
60 | 61 | ||
61 | /* | 62 | /* |
62 | * Look for each DMAC's range to determine who the owner of | 63 | * Look for each DMAC's range to determine who the owner of |
63 | * the channel is. | 64 | * the channel is. |
64 | */ | 65 | */ |
65 | list_for_each_safe(pos, tmp, ®istered_dmac_list) { | 66 | list_for_each_entry(info, ®istered_dmac_list, list) { |
66 | struct dma_info *info = list_entry(pos, struct dma_info, list); | ||
67 | |||
68 | total += info->nr_channels; | 67 | total += info->nr_channels; |
69 | if (chan > total) | 68 | if (chan > total) |
70 | continue; | 69 | continue; |
@@ -75,6 +74,20 @@ struct dma_info *get_dma_info(unsigned int chan) | |||
75 | return NULL; | 74 | return NULL; |
76 | } | 75 | } |
77 | 76 | ||
77 | static unsigned int get_nr_channels(void) | ||
78 | { | ||
79 | struct dma_info *info; | ||
80 | unsigned int nr = 0; | ||
81 | |||
82 | if (unlikely(list_empty(®istered_dmac_list))) | ||
83 | return nr; | ||
84 | |||
85 | list_for_each_entry(info, ®istered_dmac_list, list) | ||
86 | nr += info->nr_channels; | ||
87 | |||
88 | return nr; | ||
89 | } | ||
90 | |||
78 | struct dma_channel *get_dma_channel(unsigned int chan) | 91 | struct dma_channel *get_dma_channel(unsigned int chan) |
79 | { | 92 | { |
80 | struct dma_info *info = get_dma_info(chan); | 93 | struct dma_info *info = get_dma_info(chan); |
@@ -173,7 +186,7 @@ int dma_xfer(unsigned int chan, unsigned long from, | |||
173 | static int dma_read_proc(char *buf, char **start, off_t off, | 186 | static int dma_read_proc(char *buf, char **start, off_t off, |
174 | int len, int *eof, void *data) | 187 | int len, int *eof, void *data) |
175 | { | 188 | { |
176 | struct list_head *pos, *tmp; | 189 | struct dma_info *info; |
177 | char *p = buf; | 190 | char *p = buf; |
178 | 191 | ||
179 | if (list_empty(®istered_dmac_list)) | 192 | if (list_empty(®istered_dmac_list)) |
@@ -182,8 +195,7 @@ static int dma_read_proc(char *buf, char **start, off_t off, | |||
182 | /* | 195 | /* |
183 | * Iterate over each registered DMAC | 196 | * Iterate over each registered DMAC |
184 | */ | 197 | */ |
185 | list_for_each_safe(pos, tmp, ®istered_dmac_list) { | 198 | list_for_each_entry(info, ®istered_dmac_list, list) { |
186 | struct dma_info *info = list_entry(pos, struct dma_info, list); | ||
187 | int i; | 199 | int i; |
188 | 200 | ||
189 | /* | 201 | /* |
@@ -205,9 +217,9 @@ static int dma_read_proc(char *buf, char **start, off_t off, | |||
205 | #endif | 217 | #endif |
206 | 218 | ||
207 | 219 | ||
208 | int __init register_dmac(struct dma_info *info) | 220 | int register_dmac(struct dma_info *info) |
209 | { | 221 | { |
210 | int i; | 222 | unsigned int total_channels, i; |
211 | 223 | ||
212 | INIT_LIST_HEAD(&info->list); | 224 | INIT_LIST_HEAD(&info->list); |
213 | 225 | ||
@@ -217,6 +229,11 @@ int __init register_dmac(struct dma_info *info) | |||
217 | 229 | ||
218 | BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); | 230 | BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); |
219 | 231 | ||
232 | info->pdev = platform_device_register_simple((char *)info->name, -1, | ||
233 | NULL, 0); | ||
234 | if (IS_ERR(info->pdev)) | ||
235 | return PTR_ERR(info->pdev); | ||
236 | |||
220 | /* | 237 | /* |
221 | * Don't touch pre-configured channels | 238 | * Don't touch pre-configured channels |
222 | */ | 239 | */ |
@@ -232,10 +249,12 @@ int __init register_dmac(struct dma_info *info) | |||
232 | memset(info->channels, 0, size); | 249 | memset(info->channels, 0, size); |
233 | } | 250 | } |
234 | 251 | ||
252 | total_channels = get_nr_channels(); | ||
235 | for (i = 0; i < info->nr_channels; i++) { | 253 | for (i = 0; i < info->nr_channels; i++) { |
236 | struct dma_channel *chan = info->channels + i; | 254 | struct dma_channel *chan = info->channels + i; |
237 | 255 | ||
238 | chan->chan = i; | 256 | chan->chan = i; |
257 | chan->vchan = i + total_channels; | ||
239 | 258 | ||
240 | memcpy(chan->dev_id, "Unused", 7); | 259 | memcpy(chan->dev_id, "Unused", 7); |
241 | 260 | ||
@@ -245,9 +264,7 @@ int __init register_dmac(struct dma_info *info) | |||
245 | init_MUTEX(&chan->sem); | 264 | init_MUTEX(&chan->sem); |
246 | init_waitqueue_head(&chan->wait_queue); | 265 | init_waitqueue_head(&chan->wait_queue); |
247 | 266 | ||
248 | #ifdef CONFIG_SYSFS | 267 | dma_create_sysfs_files(chan, info); |
249 | dma_create_sysfs_files(chan); | ||
250 | #endif | ||
251 | } | 268 | } |
252 | 269 | ||
253 | list_add(&info->list, ®istered_dmac_list); | 270 | list_add(&info->list, ®istered_dmac_list); |
@@ -255,12 +272,18 @@ int __init register_dmac(struct dma_info *info) | |||
255 | return 0; | 272 | return 0; |
256 | } | 273 | } |
257 | 274 | ||
258 | void __exit unregister_dmac(struct dma_info *info) | 275 | void unregister_dmac(struct dma_info *info) |
259 | { | 276 | { |
277 | unsigned int i; | ||
278 | |||
279 | for (i = 0; i < info->nr_channels; i++) | ||
280 | dma_remove_sysfs_files(info->channels + i, info); | ||
281 | |||
260 | if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) | 282 | if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) |
261 | kfree(info->channels); | 283 | kfree(info->channels); |
262 | 284 | ||
263 | list_del(&info->list); | 285 | list_del(&info->list); |
286 | platform_device_unregister(info->pdev); | ||
264 | } | 287 | } |
265 | 288 | ||
266 | static int __init dma_api_init(void) | 289 | static int __init dma_api_init(void) |
diff --git a/arch/sh/drivers/dma/dma-g2.c b/arch/sh/drivers/dma/dma-g2.c index 231e3f6fb28f..5afab6f56ec3 100644 --- a/arch/sh/drivers/dma/dma-g2.c +++ b/arch/sh/drivers/dma/dma-g2.c | |||
@@ -140,7 +140,7 @@ static struct dma_ops g2_dma_ops = { | |||
140 | }; | 140 | }; |
141 | 141 | ||
142 | static struct dma_info g2_dma_info = { | 142 | static struct dma_info g2_dma_info = { |
143 | .name = "G2 DMA", | 143 | .name = "g2_dmac", |
144 | .nr_channels = 4, | 144 | .nr_channels = 4, |
145 | .ops = &g2_dma_ops, | 145 | .ops = &g2_dma_ops, |
146 | .flags = DMAC_CHANNELS_TEI_CAPABLE, | 146 | .flags = DMAC_CHANNELS_TEI_CAPABLE, |
@@ -160,6 +160,7 @@ static int __init g2_dma_init(void) | |||
160 | static void __exit g2_dma_exit(void) | 160 | static void __exit g2_dma_exit(void) |
161 | { | 161 | { |
162 | free_irq(HW_EVENT_G2_DMA, 0); | 162 | free_irq(HW_EVENT_G2_DMA, 0); |
163 | unregister_dmac(&g2_dma_info); | ||
163 | } | 164 | } |
164 | 165 | ||
165 | subsys_initcall(g2_dma_init); | 166 | subsys_initcall(g2_dma_init); |
diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c index 1c9bc45b8bcb..05a74ffdb68d 100644 --- a/arch/sh/drivers/dma/dma-isa.c +++ b/arch/sh/drivers/dma/dma-isa.c | |||
@@ -25,14 +25,14 @@ | |||
25 | * such, this code is meant for only the simplest of tasks (and shouldn't be | 25 | * such, this code is meant for only the simplest of tasks (and shouldn't be |
26 | * used in any new drivers at all). | 26 | * used in any new drivers at all). |
27 | * | 27 | * |
28 | * It should also be noted that various functions here are labelled as | 28 | * NOTE: ops->xfer() is the preferred way of doing things. However, there |
29 | * being deprecated. This is due to the fact that the ops->xfer() method is | 29 | * are some users of the ISA DMA API that exist in common code that we |
30 | * the preferred way of doing things (as well as just grabbing the spinlock | 30 | * don't necessarily want to go out of our way to break, so we still |
31 | * directly). As such, any users of this interface will be warned rather | 31 | * allow for some compatability at that level. Any new code is strongly |
32 | * loudly. | 32 | * advised to run far away from the ISA DMA API and use the SH DMA API |
33 | * directly. | ||
33 | */ | 34 | */ |
34 | 35 | unsigned long claim_dma_lock(void) | |
35 | unsigned long __deprecated claim_dma_lock(void) | ||
36 | { | 36 | { |
37 | unsigned long flags; | 37 | unsigned long flags; |
38 | 38 | ||
@@ -42,19 +42,19 @@ unsigned long __deprecated claim_dma_lock(void) | |||
42 | } | 42 | } |
43 | EXPORT_SYMBOL(claim_dma_lock); | 43 | EXPORT_SYMBOL(claim_dma_lock); |
44 | 44 | ||
45 | void __deprecated release_dma_lock(unsigned long flags) | 45 | void release_dma_lock(unsigned long flags) |
46 | { | 46 | { |
47 | spin_unlock_irqrestore(&dma_spin_lock, flags); | 47 | spin_unlock_irqrestore(&dma_spin_lock, flags); |
48 | } | 48 | } |
49 | EXPORT_SYMBOL(release_dma_lock); | 49 | EXPORT_SYMBOL(release_dma_lock); |
50 | 50 | ||
51 | void __deprecated disable_dma(unsigned int chan) | 51 | void disable_dma(unsigned int chan) |
52 | { | 52 | { |
53 | /* Nothing */ | 53 | /* Nothing */ |
54 | } | 54 | } |
55 | EXPORT_SYMBOL(disable_dma); | 55 | EXPORT_SYMBOL(disable_dma); |
56 | 56 | ||
57 | void __deprecated enable_dma(unsigned int chan) | 57 | void enable_dma(unsigned int chan) |
58 | { | 58 | { |
59 | struct dma_info *info = get_dma_info(chan); | 59 | struct dma_info *info = get_dma_info(chan); |
60 | struct dma_channel *channel = &info->channels[chan]; | 60 | struct dma_channel *channel = &info->channels[chan]; |
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c index 2e1d58f2d1b9..df604975ccc8 100644 --- a/arch/sh/drivers/dma/dma-pvr2.c +++ b/arch/sh/drivers/dma/dma-pvr2.c | |||
@@ -80,7 +80,7 @@ static struct dma_ops pvr2_dma_ops = { | |||
80 | }; | 80 | }; |
81 | 81 | ||
82 | static struct dma_info pvr2_dma_info = { | 82 | static struct dma_info pvr2_dma_info = { |
83 | .name = "PowerVR 2 DMA", | 83 | .name = "pvr2_dmac", |
84 | .nr_channels = 1, | 84 | .nr_channels = 1, |
85 | .ops = &pvr2_dma_ops, | 85 | .ops = &pvr2_dma_ops, |
86 | .flags = DMAC_CHANNELS_TEI_CAPABLE, | 86 | .flags = DMAC_CHANNELS_TEI_CAPABLE, |
@@ -98,6 +98,7 @@ static void __exit pvr2_dma_exit(void) | |||
98 | { | 98 | { |
99 | free_dma(PVR2_CASCADE_CHAN); | 99 | free_dma(PVR2_CASCADE_CHAN); |
100 | free_irq(HW_EVENT_PVR2_DMA, 0); | 100 | free_irq(HW_EVENT_PVR2_DMA, 0); |
101 | unregister_dmac(&pvr2_dma_info); | ||
101 | } | 102 | } |
102 | 103 | ||
103 | subsys_initcall(pvr2_dma_init); | 104 | subsys_initcall(pvr2_dma_init); |
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 31dacd4444b2..cca26c4c9d1b 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c | |||
@@ -5,6 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Copyright (C) 2000 Takashi YOSHII | 6 | * Copyright (C) 2000 Takashi YOSHII |
7 | * Copyright (C) 2003, 2004 Paul Mundt | 7 | * Copyright (C) 2003, 2004 Paul Mundt |
8 | * Copyright (C) 2005 Andriy Skulysh | ||
8 | * | 9 | * |
9 | * This file is subject to the terms and conditions of the GNU General Public | 10 | * This file is subject to the terms and conditions of the GNU General Public |
10 | * License. See the file "COPYING" in the main directory of this archive | 11 | * License. See the file "COPYING" in the main directory of this archive |
@@ -16,51 +17,28 @@ | |||
16 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
17 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
18 | #include <linux/module.h> | 19 | #include <linux/module.h> |
20 | #include <asm/dreamcast/dma.h> | ||
19 | #include <asm/signal.h> | 21 | #include <asm/signal.h> |
20 | #include <asm/irq.h> | 22 | #include <asm/irq.h> |
21 | #include <asm/dma.h> | 23 | #include <asm/dma.h> |
22 | #include <asm/io.h> | 24 | #include <asm/io.h> |
23 | #include "dma-sh.h" | 25 | #include "dma-sh.h" |
24 | 26 | ||
25 | /* | ||
26 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
27 | * with their respective values as they appear in the CHCR registers. | ||
28 | * | ||
29 | * Defaults to a 64-bit transfer size. | ||
30 | */ | ||
31 | enum { | ||
32 | XMIT_SZ_64BIT, | ||
33 | XMIT_SZ_8BIT, | ||
34 | XMIT_SZ_16BIT, | ||
35 | XMIT_SZ_32BIT, | ||
36 | XMIT_SZ_256BIT, | ||
37 | }; | ||
38 | |||
39 | /* | ||
40 | * The DMA count is defined as the number of bytes to transfer. | ||
41 | */ | ||
42 | static unsigned int ts_shift[] = { | ||
43 | [XMIT_SZ_64BIT] = 3, | ||
44 | [XMIT_SZ_8BIT] = 0, | ||
45 | [XMIT_SZ_16BIT] = 1, | ||
46 | [XMIT_SZ_32BIT] = 2, | ||
47 | [XMIT_SZ_256BIT] = 5, | ||
48 | }; | ||
49 | |||
50 | static inline unsigned int get_dmte_irq(unsigned int chan) | 27 | static inline unsigned int get_dmte_irq(unsigned int chan) |
51 | { | 28 | { |
52 | unsigned int irq; | 29 | unsigned int irq = 0; |
53 | 30 | ||
54 | /* | 31 | /* |
55 | * Normally we could just do DMTE0_IRQ + chan outright, though in the | 32 | * Normally we could just do DMTE0_IRQ + chan outright, though in the |
56 | * case of the 7751R, the DMTE IRQs for channels > 4 start right above | 33 | * case of the 7751R, the DMTE IRQs for channels > 4 start right above |
57 | * the SCIF | 34 | * the SCIF |
58 | */ | 35 | */ |
59 | |||
60 | if (chan < 4) { | 36 | if (chan < 4) { |
61 | irq = DMTE0_IRQ + chan; | 37 | irq = DMTE0_IRQ + chan; |
62 | } else { | 38 | } else { |
39 | #ifdef DMTE4_IRQ | ||
63 | irq = DMTE4_IRQ + chan - 4; | 40 | irq = DMTE4_IRQ + chan - 4; |
41 | #endif | ||
64 | } | 42 | } |
65 | 43 | ||
66 | return irq; | 44 | return irq; |
@@ -78,9 +56,7 @@ static inline unsigned int calc_xmit_shift(struct dma_channel *chan) | |||
78 | { | 56 | { |
79 | u32 chcr = ctrl_inl(CHCR[chan->chan]); | 57 | u32 chcr = ctrl_inl(CHCR[chan->chan]); |
80 | 58 | ||
81 | chcr >>= 4; | 59 | return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT]; |
82 | |||
83 | return ts_shift[chcr & 0x0007]; | ||
84 | } | 60 | } |
85 | 61 | ||
86 | /* | 62 | /* |
@@ -109,8 +85,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs) | |||
109 | 85 | ||
110 | static int sh_dmac_request_dma(struct dma_channel *chan) | 86 | static int sh_dmac_request_dma(struct dma_channel *chan) |
111 | { | 87 | { |
88 | char name[32]; | ||
89 | |||
90 | snprintf(name, sizeof(name), "DMAC Transfer End (Channel %d)", | ||
91 | chan->chan); | ||
92 | |||
112 | return request_irq(get_dmte_irq(chan->chan), dma_tei, | 93 | return request_irq(get_dmte_irq(chan->chan), dma_tei, |
113 | SA_INTERRUPT, "DMAC Transfer End", chan); | 94 | SA_INTERRUPT, name, chan); |
114 | } | 95 | } |
115 | 96 | ||
116 | static void sh_dmac_free_dma(struct dma_channel *chan) | 97 | static void sh_dmac_free_dma(struct dma_channel *chan) |
@@ -118,10 +99,18 @@ static void sh_dmac_free_dma(struct dma_channel *chan) | |||
118 | free_irq(get_dmte_irq(chan->chan), chan); | 99 | free_irq(get_dmte_irq(chan->chan), chan); |
119 | } | 100 | } |
120 | 101 | ||
121 | static void sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) | 102 | static void |
103 | sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) | ||
122 | { | 104 | { |
123 | if (!chcr) | 105 | if (!chcr) |
124 | chcr = RS_DUAL; | 106 | chcr = RS_DUAL | CHCR_IE; |
107 | |||
108 | if (chcr & CHCR_IE) { | ||
109 | chcr &= ~CHCR_IE; | ||
110 | chan->flags |= DMA_TEI_CAPABLE; | ||
111 | } else { | ||
112 | chan->flags &= ~DMA_TEI_CAPABLE; | ||
113 | } | ||
125 | 114 | ||
126 | ctrl_outl(chcr, CHCR[chan->chan]); | 115 | ctrl_outl(chcr, CHCR[chan->chan]); |
127 | 116 | ||
@@ -130,22 +119,32 @@ static void sh_dmac_configure_channel(struct dma_channel *chan, unsigned long ch | |||
130 | 119 | ||
131 | static void sh_dmac_enable_dma(struct dma_channel *chan) | 120 | static void sh_dmac_enable_dma(struct dma_channel *chan) |
132 | { | 121 | { |
133 | int irq = get_dmte_irq(chan->chan); | 122 | int irq; |
134 | u32 chcr; | 123 | u32 chcr; |
135 | 124 | ||
136 | chcr = ctrl_inl(CHCR[chan->chan]); | 125 | chcr = ctrl_inl(CHCR[chan->chan]); |
137 | chcr |= CHCR_DE | CHCR_IE; | 126 | chcr |= CHCR_DE; |
127 | |||
128 | if (chan->flags & DMA_TEI_CAPABLE) | ||
129 | chcr |= CHCR_IE; | ||
130 | |||
138 | ctrl_outl(chcr, CHCR[chan->chan]); | 131 | ctrl_outl(chcr, CHCR[chan->chan]); |
139 | 132 | ||
140 | enable_irq(irq); | 133 | if (chan->flags & DMA_TEI_CAPABLE) { |
134 | irq = get_dmte_irq(chan->chan); | ||
135 | enable_irq(irq); | ||
136 | } | ||
141 | } | 137 | } |
142 | 138 | ||
143 | static void sh_dmac_disable_dma(struct dma_channel *chan) | 139 | static void sh_dmac_disable_dma(struct dma_channel *chan) |
144 | { | 140 | { |
145 | int irq = get_dmte_irq(chan->chan); | 141 | int irq; |
146 | u32 chcr; | 142 | u32 chcr; |
147 | 143 | ||
148 | disable_irq(irq); | 144 | if (chan->flags & DMA_TEI_CAPABLE) { |
145 | irq = get_dmte_irq(chan->chan); | ||
146 | disable_irq(irq); | ||
147 | } | ||
149 | 148 | ||
150 | chcr = ctrl_inl(CHCR[chan->chan]); | 149 | chcr = ctrl_inl(CHCR[chan->chan]); |
151 | chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); | 150 | chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); |
@@ -158,7 +157,7 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan) | |||
158 | * If we haven't pre-configured the channel with special flags, use | 157 | * If we haven't pre-configured the channel with special flags, use |
159 | * the defaults. | 158 | * the defaults. |
160 | */ | 159 | */ |
161 | if (!(chan->flags & DMA_CONFIGURED)) | 160 | if (unlikely(!(chan->flags & DMA_CONFIGURED))) |
162 | sh_dmac_configure_channel(chan, 0); | 161 | sh_dmac_configure_channel(chan, 0); |
163 | 162 | ||
164 | sh_dmac_disable_dma(chan); | 163 | sh_dmac_disable_dma(chan); |
@@ -178,9 +177,11 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan) | |||
178 | * cascading to the PVR2 DMAC. In this case, we still need to write | 177 | * cascading to the PVR2 DMAC. In this case, we still need to write |
179 | * SAR and DAR, regardless of value, in order for cascading to work. | 178 | * SAR and DAR, regardless of value, in order for cascading to work. |
180 | */ | 179 | */ |
181 | if (chan->sar || (mach_is_dreamcast() && chan->chan == 2)) | 180 | if (chan->sar || (mach_is_dreamcast() && |
181 | chan->chan == PVR2_CASCADE_CHAN)) | ||
182 | ctrl_outl(chan->sar, SAR[chan->chan]); | 182 | ctrl_outl(chan->sar, SAR[chan->chan]); |
183 | if (chan->dar || (mach_is_dreamcast() && chan->chan == 2)) | 183 | if (chan->dar || (mach_is_dreamcast() && |
184 | chan->chan == PVR2_CASCADE_CHAN)) | ||
184 | ctrl_outl(chan->dar, DAR[chan->chan]); | 185 | ctrl_outl(chan->dar, DAR[chan->chan]); |
185 | 186 | ||
186 | ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]); | 187 | ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]); |
@@ -198,17 +199,38 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan) | |||
198 | return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); | 199 | return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); |
199 | } | 200 | } |
200 | 201 | ||
201 | #if defined(CONFIG_CPU_SH4) | 202 | #ifdef CONFIG_CPU_SUBTYPE_SH7780 |
202 | static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) | 203 | #define dmaor_read_reg() ctrl_inw(DMAOR) |
204 | #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) | ||
205 | #else | ||
206 | #define dmaor_read_reg() ctrl_inl(DMAOR) | ||
207 | #define dmaor_write_reg(data) ctrl_outl(data, DMAOR) | ||
208 | #endif | ||
209 | |||
210 | static inline int dmaor_reset(void) | ||
203 | { | 211 | { |
204 | unsigned long dmaor = ctrl_inl(DMAOR); | 212 | unsigned long dmaor = dmaor_read_reg(); |
213 | |||
214 | /* Try to clear the error flags first, incase they are set */ | ||
215 | dmaor &= ~(DMAOR_NMIF | DMAOR_AE); | ||
216 | dmaor_write_reg(dmaor); | ||
205 | 217 | ||
206 | printk("DMAE: DMAOR=%lx\n", dmaor); | 218 | dmaor |= DMAOR_INIT; |
219 | dmaor_write_reg(dmaor); | ||
207 | 220 | ||
208 | ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_NMIF, DMAOR); | 221 | /* See if we got an error again */ |
209 | ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_AE, DMAOR); | 222 | if ((dmaor_read_reg() & (DMAOR_AE | DMAOR_NMIF))) { |
210 | ctrl_outl(ctrl_inl(DMAOR)|DMAOR_DME, DMAOR); | 223 | printk(KERN_ERR "dma-sh: Can't initialize DMAOR.\n"); |
224 | return -EINVAL; | ||
225 | } | ||
211 | 226 | ||
227 | return 0; | ||
228 | } | ||
229 | |||
230 | #if defined(CONFIG_CPU_SH4) | ||
231 | static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) | ||
232 | { | ||
233 | dmaor_reset(); | ||
212 | disable_irq(irq); | 234 | disable_irq(irq); |
213 | 235 | ||
214 | return IRQ_HANDLED; | 236 | return IRQ_HANDLED; |
@@ -224,8 +246,8 @@ static struct dma_ops sh_dmac_ops = { | |||
224 | }; | 246 | }; |
225 | 247 | ||
226 | static struct dma_info sh_dmac_info = { | 248 | static struct dma_info sh_dmac_info = { |
227 | .name = "SuperH DMAC", | 249 | .name = "sh_dmac", |
228 | .nr_channels = 4, | 250 | .nr_channels = CONFIG_NR_ONCHIP_DMA_CHANNELS, |
229 | .ops = &sh_dmac_ops, | 251 | .ops = &sh_dmac_ops, |
230 | .flags = DMAC_CHANNELS_TEI_CAPABLE, | 252 | .flags = DMAC_CHANNELS_TEI_CAPABLE, |
231 | }; | 253 | }; |
@@ -248,7 +270,13 @@ static int __init sh_dmac_init(void) | |||
248 | make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); | 270 | make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); |
249 | } | 271 | } |
250 | 272 | ||
251 | ctrl_outl(0x8000 | DMAOR_DME, DMAOR); | 273 | /* |
274 | * Initialize DMAOR, and clean up any error flags that may have | ||
275 | * been set. | ||
276 | */ | ||
277 | i = dmaor_reset(); | ||
278 | if (i < 0) | ||
279 | return i; | ||
252 | 280 | ||
253 | return register_dmac(info); | 281 | return register_dmac(info); |
254 | } | 282 | } |
@@ -258,10 +286,12 @@ static void __exit sh_dmac_exit(void) | |||
258 | #ifdef CONFIG_CPU_SH4 | 286 | #ifdef CONFIG_CPU_SH4 |
259 | free_irq(DMAE_IRQ, 0); | 287 | free_irq(DMAE_IRQ, 0); |
260 | #endif | 288 | #endif |
289 | unregister_dmac(&sh_dmac_info); | ||
261 | } | 290 | } |
262 | 291 | ||
263 | subsys_initcall(sh_dmac_init); | 292 | subsys_initcall(sh_dmac_init); |
264 | module_exit(sh_dmac_exit); | 293 | module_exit(sh_dmac_exit); |
265 | 294 | ||
295 | MODULE_AUTHOR("Takashi YOSHII, Paul Mundt, Andriy Skulysh"); | ||
296 | MODULE_DESCRIPTION("SuperH On-Chip DMAC Support"); | ||
266 | MODULE_LICENSE("GPL"); | 297 | MODULE_LICENSE("GPL"); |
267 | |||
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h index dd9d547539a2..0f591fbc922d 100644 --- a/arch/sh/drivers/dma/dma-sh.h +++ b/arch/sh/drivers/dma/dma-sh.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef __DMA_SH_H | 11 | #ifndef __DMA_SH_H |
12 | #define __DMA_SH_H | 12 | #define __DMA_SH_H |
13 | 13 | ||
14 | #include <asm/cpu/dma.h> | ||
15 | |||
14 | /* Definitions for the SuperH DMAC */ | 16 | /* Definitions for the SuperH DMAC */ |
15 | #define REQ_L 0x00000000 | 17 | #define REQ_L 0x00000000 |
16 | #define REQ_E 0x00080000 | 18 | #define REQ_E 0x00080000 |
@@ -26,27 +28,47 @@ | |||
26 | #define SM_DEC 0x00002000 | 28 | #define SM_DEC 0x00002000 |
27 | #define RS_IN 0x00000200 | 29 | #define RS_IN 0x00000200 |
28 | #define RS_OUT 0x00000300 | 30 | #define RS_OUT 0x00000300 |
29 | #define TM_BURST 0x0000080 | ||
30 | #define TS_8 0x00000010 | ||
31 | #define TS_16 0x00000020 | ||
32 | #define TS_32 0x00000030 | ||
33 | #define TS_64 0x00000000 | ||
34 | #define TS_BLK 0x00000040 | 31 | #define TS_BLK 0x00000040 |
35 | #define CHCR_DE 0x00000001 | 32 | #define CHCR_DE 0x00000001 |
36 | #define CHCR_TE 0x00000002 | 33 | #define CHCR_TE 0x00000002 |
37 | #define CHCR_IE 0x00000004 | 34 | #define CHCR_IE 0x00000004 |
38 | 35 | ||
39 | /* Define the default configuration for dual address memory-memory transfer. | 36 | /* DMAOR definitions */ |
40 | * The 0x400 value represents auto-request, external->external. | ||
41 | */ | ||
42 | #define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) | ||
43 | |||
44 | #define DMAOR_COD 0x00000008 | ||
45 | #define DMAOR_AE 0x00000004 | 37 | #define DMAOR_AE 0x00000004 |
46 | #define DMAOR_NMIF 0x00000002 | 38 | #define DMAOR_NMIF 0x00000002 |
47 | #define DMAOR_DME 0x00000001 | 39 | #define DMAOR_DME 0x00000001 |
48 | 40 | ||
41 | /* | ||
42 | * Define the default configuration for dual address memory-memory transfer. | ||
43 | * The 0x400 value represents auto-request, external->external. | ||
44 | */ | ||
45 | #define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) | ||
46 | |||
49 | #define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) | 47 | #define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) |
50 | 48 | ||
49 | /* | ||
50 | * Subtypes that have fewer channels than this simply need to change | ||
51 | * CONFIG_NR_ONCHIP_DMA_CHANNELS. Likewise, subtypes with a larger number | ||
52 | * of channels should expand on this. | ||
53 | * | ||
54 | * For most subtypes we can easily figure these values out with some | ||
55 | * basic calculation, unfortunately on other subtypes these are more | ||
56 | * scattered, so we just leave it unrolled for simplicity. | ||
57 | */ | ||
58 | #define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \ | ||
59 | SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30, \ | ||
60 | SH_DMAC_BASE + 0x50, SH_DMAC_BASE + 0x60}) | ||
61 | #define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \ | ||
62 | SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34, \ | ||
63 | SH_DMAC_BASE + 0x54, SH_DMAC_BASE + 0x64}) | ||
64 | #define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \ | ||
65 | SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38, \ | ||
66 | SH_DMAC_BASE + 0x58, SH_DMAC_BASE + 0x68}) | ||
67 | #define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \ | ||
68 | SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c, \ | ||
69 | SH_DMAC_BASE + 0x5c, SH_DMAC_BASE + 0x6c}) | ||
70 | |||
71 | #define DMAOR (SH_DMAC_BASE + 0x40) | ||
72 | |||
51 | #endif /* __DMA_SH_H */ | 73 | #endif /* __DMA_SH_H */ |
52 | 74 | ||
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c index 6e3b58bd8795..70a5d82eb2f8 100644 --- a/arch/sh/drivers/dma/dma-sysfs.c +++ b/arch/sh/drivers/dma/dma-sysfs.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * sysfs interface for SH DMA API | 4 | * sysfs interface for SH DMA API |
5 | * | 5 | * |
6 | * Copyright (C) 2004 Paul Mundt | 6 | * Copyright (C) 2004, 2005 Paul Mundt |
7 | * | 7 | * |
8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
@@ -12,7 +12,9 @@ | |||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/sysdev.h> | 14 | #include <linux/sysdev.h> |
15 | #include <linux/platform_device.h> | ||
15 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/err.h> | ||
16 | #include <linux/string.h> | 18 | #include <linux/string.h> |
17 | #include <asm/dma.h> | 19 | #include <asm/dma.h> |
18 | 20 | ||
@@ -77,7 +79,7 @@ static ssize_t dma_store_config(struct sys_device *dev, | |||
77 | unsigned long config; | 79 | unsigned long config; |
78 | 80 | ||
79 | config = simple_strtoul(buf, NULL, 0); | 81 | config = simple_strtoul(buf, NULL, 0); |
80 | dma_configure_channel(channel->chan, config); | 82 | dma_configure_channel(channel->vchan, config); |
81 | 83 | ||
82 | return count; | 84 | return count; |
83 | } | 85 | } |
@@ -111,12 +113,13 @@ static SYSDEV_ATTR(field, S_IRUGO, dma_show_##field, NULL); | |||
111 | dma_ro_attr(count, "0x%08x\n"); | 113 | dma_ro_attr(count, "0x%08x\n"); |
112 | dma_ro_attr(flags, "0x%08lx\n"); | 114 | dma_ro_attr(flags, "0x%08lx\n"); |
113 | 115 | ||
114 | int __init dma_create_sysfs_files(struct dma_channel *chan) | 116 | int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info) |
115 | { | 117 | { |
116 | struct sys_device *dev = &chan->dev; | 118 | struct sys_device *dev = &chan->dev; |
119 | char name[16]; | ||
117 | int ret; | 120 | int ret; |
118 | 121 | ||
119 | dev->id = chan->chan; | 122 | dev->id = chan->vchan; |
120 | dev->cls = &dma_sysclass; | 123 | dev->cls = &dma_sysclass; |
121 | 124 | ||
122 | ret = sysdev_register(dev); | 125 | ret = sysdev_register(dev); |
@@ -129,6 +132,24 @@ int __init dma_create_sysfs_files(struct dma_channel *chan) | |||
129 | sysdev_create_file(dev, &attr_flags); | 132 | sysdev_create_file(dev, &attr_flags); |
130 | sysdev_create_file(dev, &attr_config); | 133 | sysdev_create_file(dev, &attr_config); |
131 | 134 | ||
132 | return 0; | 135 | snprintf(name, sizeof(name), "dma%d", chan->chan); |
136 | return sysfs_create_link(&info->pdev->dev.kobj, &dev->kobj, name); | ||
137 | } | ||
138 | |||
139 | void dma_remove_sysfs_files(struct dma_channel *chan, struct dma_info *info) | ||
140 | { | ||
141 | struct sys_device *dev = &chan->dev; | ||
142 | char name[16]; | ||
143 | |||
144 | sysdev_remove_file(dev, &attr_dev_id); | ||
145 | sysdev_remove_file(dev, &attr_count); | ||
146 | sysdev_remove_file(dev, &attr_mode); | ||
147 | sysdev_remove_file(dev, &attr_flags); | ||
148 | sysdev_remove_file(dev, &attr_config); | ||
149 | |||
150 | snprintf(name, sizeof(name), "dma%d", chan->chan); | ||
151 | sysfs_remove_link(&info->pdev->dev.kobj, name); | ||
152 | |||
153 | sysdev_unregister(dev); | ||
133 | } | 154 | } |
134 | 155 | ||
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 8b819698df14..7a86eeb22655 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile | |||
@@ -17,6 +17,4 @@ obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o | |||
17 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | 17 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o |
18 | obj-$(CONFIG_MODULES) += module.o | 18 | obj-$(CONFIG_MODULES) += module.o |
19 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 19 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
20 | 20 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | |
21 | USE_STANDARD_AS_RULE := true | ||
22 | |||
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index cd43714df61a..5bfc33bec5d0 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile | |||
@@ -2,15 +2,12 @@ | |||
2 | # Makefile for the Linux/SuperH CPU-specifc backends. | 2 | # Makefile for the Linux/SuperH CPU-specifc backends. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := irq_ipr.o irq_imask.o init.o bus.o | 5 | obj-y += irq/ init.o bus.o clock.o |
6 | 6 | ||
7 | obj-$(CONFIG_CPU_SH2) += sh2/ | 7 | obj-$(CONFIG_CPU_SH2) += sh2/ |
8 | obj-$(CONFIG_CPU_SH3) += sh3/ | 8 | obj-$(CONFIG_CPU_SH3) += sh3/ |
9 | obj-$(CONFIG_CPU_SH4) += sh4/ | 9 | obj-$(CONFIG_CPU_SH4) += sh4/ |
10 | 10 | ||
11 | obj-$(CONFIG_SH_RTC) += rtc.o | 11 | obj-$(CONFIG_SH_RTC) += rtc.o |
12 | obj-$(CONFIG_UBC_WAKEUP) += ubc.o | 12 | obj-$(CONFIG_UBC_WAKEUP) += ubc.o |
13 | obj-$(CONFIG_SH_ADC) += adc.o | 13 | obj-$(CONFIG_SH_ADC) += adc.o |
14 | |||
15 | USE_STANDARD_AS_RULE := true | ||
16 | |||
diff --git a/arch/sh/kernel/cpu/bus.c b/arch/sh/kernel/cpu/bus.c index 3278d234bb1b..fc6c4bd40c65 100644 --- a/arch/sh/kernel/cpu/bus.c +++ b/arch/sh/kernel/cpu/bus.c | |||
@@ -109,6 +109,8 @@ int sh_device_register(struct sh_dev *dev) | |||
109 | /* This is needed for USB OHCI to work */ | 109 | /* This is needed for USB OHCI to work */ |
110 | if (dev->dma_mask) | 110 | if (dev->dma_mask) |
111 | dev->dev.dma_mask = dev->dma_mask; | 111 | dev->dev.dma_mask = dev->dma_mask; |
112 | if (dev->coherent_dma_mask) | ||
113 | dev->dev.coherent_dma_mask = dev->coherent_dma_mask; | ||
112 | 114 | ||
113 | snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u", | 115 | snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u", |
114 | dev->name, dev->dev_id); | 116 | dev->name, dev->dev_id); |
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c new file mode 100644 index 000000000000..989e7fdd524d --- /dev/null +++ b/arch/sh/kernel/cpu/clock.c | |||
@@ -0,0 +1,287 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/clock.c - SuperH clock framework | ||
3 | * | ||
4 | * Copyright (C) 2005 Paul Mundt | ||
5 | * | ||
6 | * This clock framework is derived from the OMAP version by: | ||
7 | * | ||
8 | * Copyright (C) 2004 Nokia Corporation | ||
9 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/list.h> | ||
19 | #include <linux/kref.h> | ||
20 | #include <linux/seq_file.h> | ||
21 | #include <linux/err.h> | ||
22 | #include <asm/clock.h> | ||
23 | #include <asm/timer.h> | ||
24 | |||
25 | static LIST_HEAD(clock_list); | ||
26 | static DEFINE_SPINLOCK(clock_lock); | ||
27 | static DECLARE_MUTEX(clock_list_sem); | ||
28 | |||
29 | /* | ||
30 | * Each subtype is expected to define the init routines for these clocks, | ||
31 | * as each subtype (or processor family) will have these clocks at the | ||
32 | * very least. These are all provided through the CPG, which even some of | ||
33 | * the more quirky parts (such as ST40, SH4-202, etc.) still have. | ||
34 | * | ||
35 | * The processor-specific code is expected to register any additional | ||
36 | * clock sources that are of interest. | ||
37 | */ | ||
38 | static struct clk master_clk = { | ||
39 | .name = "master_clk", | ||
40 | .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, | ||
41 | #ifdef CONFIG_SH_PCLK_FREQ_BOOL | ||
42 | .rate = CONFIG_SH_PCLK_FREQ, | ||
43 | #endif | ||
44 | }; | ||
45 | |||
46 | static struct clk module_clk = { | ||
47 | .name = "module_clk", | ||
48 | .parent = &master_clk, | ||
49 | .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, | ||
50 | }; | ||
51 | |||
52 | static struct clk bus_clk = { | ||
53 | .name = "bus_clk", | ||
54 | .parent = &master_clk, | ||
55 | .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, | ||
56 | }; | ||
57 | |||
58 | static struct clk cpu_clk = { | ||
59 | .name = "cpu_clk", | ||
60 | .parent = &master_clk, | ||
61 | .flags = CLK_ALWAYS_ENABLED, | ||
62 | }; | ||
63 | |||
64 | /* | ||
65 | * The ordering of these clocks matters, do not change it. | ||
66 | */ | ||
67 | static struct clk *onchip_clocks[] = { | ||
68 | &master_clk, | ||
69 | &module_clk, | ||
70 | &bus_clk, | ||
71 | &cpu_clk, | ||
72 | }; | ||
73 | |||
74 | static void propagate_rate(struct clk *clk) | ||
75 | { | ||
76 | struct clk *clkp; | ||
77 | |||
78 | list_for_each_entry(clkp, &clock_list, node) { | ||
79 | if (likely(clkp->parent != clk)) | ||
80 | continue; | ||
81 | if (likely(clkp->ops && clkp->ops->recalc)) | ||
82 | clkp->ops->recalc(clkp); | ||
83 | } | ||
84 | } | ||
85 | |||
86 | int __clk_enable(struct clk *clk) | ||
87 | { | ||
88 | /* | ||
89 | * See if this is the first time we're enabling the clock, some | ||
90 | * clocks that are always enabled still require "special" | ||
91 | * initialization. This is especially true if the clock mode | ||
92 | * changes and the clock needs to hunt for the proper set of | ||
93 | * divisors to use before it can effectively recalc. | ||
94 | */ | ||
95 | if (unlikely(atomic_read(&clk->kref.refcount) == 1)) | ||
96 | if (clk->ops && clk->ops->init) | ||
97 | clk->ops->init(clk); | ||
98 | |||
99 | if (clk->flags & CLK_ALWAYS_ENABLED) | ||
100 | return 0; | ||
101 | |||
102 | if (likely(clk->ops && clk->ops->enable)) | ||
103 | clk->ops->enable(clk); | ||
104 | |||
105 | kref_get(&clk->kref); | ||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | int clk_enable(struct clk *clk) | ||
110 | { | ||
111 | unsigned long flags; | ||
112 | int ret; | ||
113 | |||
114 | spin_lock_irqsave(&clock_lock, flags); | ||
115 | ret = __clk_enable(clk); | ||
116 | spin_unlock_irqrestore(&clock_lock, flags); | ||
117 | |||
118 | return ret; | ||
119 | } | ||
120 | |||
121 | static void clk_kref_release(struct kref *kref) | ||
122 | { | ||
123 | /* Nothing to do */ | ||
124 | } | ||
125 | |||
126 | void __clk_disable(struct clk *clk) | ||
127 | { | ||
128 | if (clk->flags & CLK_ALWAYS_ENABLED) | ||
129 | return; | ||
130 | |||
131 | kref_put(&clk->kref, clk_kref_release); | ||
132 | } | ||
133 | |||
134 | void clk_disable(struct clk *clk) | ||
135 | { | ||
136 | unsigned long flags; | ||
137 | |||
138 | spin_lock_irqsave(&clock_lock, flags); | ||
139 | __clk_disable(clk); | ||
140 | spin_unlock_irqrestore(&clock_lock, flags); | ||
141 | } | ||
142 | |||
143 | int clk_register(struct clk *clk) | ||
144 | { | ||
145 | down(&clock_list_sem); | ||
146 | |||
147 | list_add(&clk->node, &clock_list); | ||
148 | kref_init(&clk->kref); | ||
149 | |||
150 | up(&clock_list_sem); | ||
151 | |||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | void clk_unregister(struct clk *clk) | ||
156 | { | ||
157 | down(&clock_list_sem); | ||
158 | list_del(&clk->node); | ||
159 | up(&clock_list_sem); | ||
160 | } | ||
161 | |||
162 | inline unsigned long clk_get_rate(struct clk *clk) | ||
163 | { | ||
164 | return clk->rate; | ||
165 | } | ||
166 | |||
167 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
168 | { | ||
169 | int ret = -EOPNOTSUPP; | ||
170 | |||
171 | if (likely(clk->ops && clk->ops->set_rate)) { | ||
172 | unsigned long flags; | ||
173 | |||
174 | spin_lock_irqsave(&clock_lock, flags); | ||
175 | ret = clk->ops->set_rate(clk, rate); | ||
176 | spin_unlock_irqrestore(&clock_lock, flags); | ||
177 | } | ||
178 | |||
179 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) | ||
180 | propagate_rate(clk); | ||
181 | |||
182 | return ret; | ||
183 | } | ||
184 | |||
185 | void clk_recalc_rate(struct clk *clk) | ||
186 | { | ||
187 | if (likely(clk->ops && clk->ops->recalc)) { | ||
188 | unsigned long flags; | ||
189 | |||
190 | spin_lock_irqsave(&clock_lock, flags); | ||
191 | clk->ops->recalc(clk); | ||
192 | spin_unlock_irqrestore(&clock_lock, flags); | ||
193 | } | ||
194 | |||
195 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) | ||
196 | propagate_rate(clk); | ||
197 | } | ||
198 | |||
199 | struct clk *clk_get(const char *id) | ||
200 | { | ||
201 | struct clk *p, *clk = ERR_PTR(-ENOENT); | ||
202 | |||
203 | down(&clock_list_sem); | ||
204 | list_for_each_entry(p, &clock_list, node) { | ||
205 | if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | ||
206 | clk = p; | ||
207 | break; | ||
208 | } | ||
209 | } | ||
210 | up(&clock_list_sem); | ||
211 | |||
212 | return clk; | ||
213 | } | ||
214 | |||
215 | void clk_put(struct clk *clk) | ||
216 | { | ||
217 | if (clk && !IS_ERR(clk)) | ||
218 | module_put(clk->owner); | ||
219 | } | ||
220 | |||
221 | void __init __attribute__ ((weak)) | ||
222 | arch_init_clk_ops(struct clk_ops **ops, int type) | ||
223 | { | ||
224 | } | ||
225 | |||
226 | int __init clk_init(void) | ||
227 | { | ||
228 | int i, ret = 0; | ||
229 | |||
230 | if (unlikely(!master_clk.rate)) | ||
231 | /* | ||
232 | * NOTE: This will break if the default divisor has been | ||
233 | * changed. | ||
234 | * | ||
235 | * No one should be changing the default on us however, | ||
236 | * expect that a sane value for CONFIG_SH_PCLK_FREQ will | ||
237 | * be defined in the event of a different divisor. | ||
238 | */ | ||
239 | master_clk.rate = get_timer_frequency() * 4; | ||
240 | |||
241 | for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { | ||
242 | struct clk *clk = onchip_clocks[i]; | ||
243 | |||
244 | arch_init_clk_ops(&clk->ops, i); | ||
245 | ret |= clk_register(clk); | ||
246 | clk_enable(clk); | ||
247 | } | ||
248 | |||
249 | /* Kick the child clocks.. */ | ||
250 | propagate_rate(&master_clk); | ||
251 | propagate_rate(&bus_clk); | ||
252 | |||
253 | return ret; | ||
254 | } | ||
255 | |||
256 | int show_clocks(struct seq_file *m) | ||
257 | { | ||
258 | struct clk *clk; | ||
259 | |||
260 | list_for_each_entry_reverse(clk, &clock_list, node) { | ||
261 | unsigned long rate = clk_get_rate(clk); | ||
262 | |||
263 | /* | ||
264 | * Don't bother listing dummy clocks with no ancestry | ||
265 | * that only support enable and disable ops. | ||
266 | */ | ||
267 | if (unlikely(!rate && !clk->parent)) | ||
268 | continue; | ||
269 | |||
270 | seq_printf(m, "%-12s\t: %ld.%02ldMHz\n", clk->name, | ||
271 | rate / 1000000, (rate % 1000000) / 10000); | ||
272 | } | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | EXPORT_SYMBOL_GPL(clk_register); | ||
278 | EXPORT_SYMBOL_GPL(clk_unregister); | ||
279 | EXPORT_SYMBOL_GPL(clk_get); | ||
280 | EXPORT_SYMBOL_GPL(clk_put); | ||
281 | EXPORT_SYMBOL_GPL(clk_enable); | ||
282 | EXPORT_SYMBOL_GPL(clk_disable); | ||
283 | EXPORT_SYMBOL_GPL(__clk_enable); | ||
284 | EXPORT_SYMBOL_GPL(__clk_disable); | ||
285 | EXPORT_SYMBOL_GPL(clk_get_rate); | ||
286 | EXPORT_SYMBOL_GPL(clk_set_rate); | ||
287 | EXPORT_SYMBOL_GPL(clk_recalc_rate); | ||
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile new file mode 100644 index 000000000000..e3cccea15e1d --- /dev/null +++ b/arch/sh/kernel/cpu/irq/Makefile | |||
@@ -0,0 +1,7 @@ | |||
1 | # | ||
2 | # Makefile for the Linux/SuperH CPU-specifc IRQ handlers. | ||
3 | # | ||
4 | obj-y += ipr.o imask.o | ||
5 | |||
6 | obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o | ||
7 | obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o | ||
diff --git a/arch/sh/kernel/cpu/irq_imask.c b/arch/sh/kernel/cpu/irq/imask.c index a963d00a971e..baed9a550d39 100644 --- a/arch/sh/kernel/cpu/irq_imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c | |||
@@ -1,16 +1,12 @@ | |||
1 | /* $Id: irq_imask.c,v 1.1.2.1 2002/11/17 10:53:43 mrbrown Exp $ | 1 | /* |
2 | * | 2 | * arch/sh/kernel/cpu/irq/imask.c |
3 | * linux/arch/sh/kernel/irq_imask.c | ||
4 | * | 3 | * |
5 | * Copyright (C) 1999, 2000 Niibe Yutaka | 4 | * Copyright (C) 1999, 2000 Niibe Yutaka |
6 | * | 5 | * |
7 | * Simple interrupt handling using IMASK of SR register. | 6 | * Simple interrupt handling using IMASK of SR register. |
8 | * | 7 | * |
9 | */ | 8 | */ |
10 | |||
11 | /* NOTE: Will not work on level 15 */ | 9 | /* NOTE: Will not work on level 15 */ |
12 | |||
13 | |||
14 | #include <linux/ptrace.h> | 10 | #include <linux/ptrace.h> |
15 | #include <linux/errno.h> | 11 | #include <linux/errno.h> |
16 | #include <linux/kernel_stat.h> | 12 | #include <linux/kernel_stat.h> |
@@ -19,13 +15,11 @@ | |||
19 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
20 | #include <linux/init.h> | 16 | #include <linux/init.h> |
21 | #include <linux/bitops.h> | 17 | #include <linux/bitops.h> |
22 | |||
23 | #include <asm/system.h> | ||
24 | #include <asm/irq.h> | ||
25 | |||
26 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
27 | #include <linux/cache.h> | 19 | #include <linux/cache.h> |
28 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
21 | #include <asm/system.h> | ||
22 | #include <asm/irq.h> | ||
29 | 23 | ||
30 | /* Bitmap of IRQ masked */ | 24 | /* Bitmap of IRQ masked */ |
31 | static unsigned long imask_mask = 0x7fff; | 25 | static unsigned long imask_mask = 0x7fff; |
@@ -40,7 +34,7 @@ static void end_imask_irq(unsigned int irq); | |||
40 | #define IMASK_PRIORITY 15 | 34 | #define IMASK_PRIORITY 15 |
41 | 35 | ||
42 | static unsigned int startup_imask_irq(unsigned int irq) | 36 | static unsigned int startup_imask_irq(unsigned int irq) |
43 | { | 37 | { |
44 | /* Nothing to do */ | 38 | /* Nothing to do */ |
45 | return 0; /* never anything pending */ | 39 | return 0; /* never anything pending */ |
46 | } | 40 | } |
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c new file mode 100644 index 000000000000..06e8afab32e4 --- /dev/null +++ b/arch/sh/kernel/cpu/irq/intc2.c | |||
@@ -0,0 +1,284 @@ | |||
1 | /* | ||
2 | * Interrupt handling for INTC2-based IRQ. | ||
3 | * | ||
4 | * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) | ||
5 | * Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org) | ||
6 | * | ||
7 | * May be copied or modified under the terms of the GNU General Public | ||
8 | * License. See linux/COPYING for more information. | ||
9 | * | ||
10 | * These are the "new Hitachi style" interrupts, as present on the | ||
11 | * Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <asm/system.h> | ||
18 | #include <asm/io.h> | ||
19 | #include <asm/machvec.h> | ||
20 | |||
21 | struct intc2_data { | ||
22 | unsigned char msk_offset; | ||
23 | unsigned char msk_shift; | ||
24 | |||
25 | int (*clear_irq) (int); | ||
26 | }; | ||
27 | |||
28 | static struct intc2_data intc2_data[NR_INTC2_IRQS]; | ||
29 | |||
30 | static void enable_intc2_irq(unsigned int irq); | ||
31 | static void disable_intc2_irq(unsigned int irq); | ||
32 | |||
33 | /* shutdown is same as "disable" */ | ||
34 | #define shutdown_intc2_irq disable_intc2_irq | ||
35 | |||
36 | static void mask_and_ack_intc2(unsigned int); | ||
37 | static void end_intc2_irq(unsigned int irq); | ||
38 | |||
39 | static unsigned int startup_intc2_irq(unsigned int irq) | ||
40 | { | ||
41 | enable_intc2_irq(irq); | ||
42 | return 0; /* never anything pending */ | ||
43 | } | ||
44 | |||
45 | static struct hw_interrupt_type intc2_irq_type = { | ||
46 | .typename = "INTC2-IRQ", | ||
47 | .startup = startup_intc2_irq, | ||
48 | .shutdown = shutdown_intc2_irq, | ||
49 | .enable = enable_intc2_irq, | ||
50 | .disable = disable_intc2_irq, | ||
51 | .ack = mask_and_ack_intc2, | ||
52 | .end = end_intc2_irq | ||
53 | }; | ||
54 | |||
55 | static void disable_intc2_irq(unsigned int irq) | ||
56 | { | ||
57 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
58 | int msk_shift, msk_offset; | ||
59 | |||
60 | /* Sanity check */ | ||
61 | if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS)) | ||
62 | return; | ||
63 | |||
64 | msk_shift = intc2_data[irq_offset].msk_shift; | ||
65 | msk_offset = intc2_data[irq_offset].msk_offset; | ||
66 | |||
67 | ctrl_outl(1 << msk_shift, | ||
68 | INTC2_BASE + INTC2_INTMSK_OFFSET + msk_offset); | ||
69 | } | ||
70 | |||
71 | static void enable_intc2_irq(unsigned int irq) | ||
72 | { | ||
73 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
74 | int msk_shift, msk_offset; | ||
75 | |||
76 | /* Sanity check */ | ||
77 | if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS)) | ||
78 | return; | ||
79 | |||
80 | msk_shift = intc2_data[irq_offset].msk_shift; | ||
81 | msk_offset = intc2_data[irq_offset].msk_offset; | ||
82 | |||
83 | ctrl_outl(1 << msk_shift, | ||
84 | INTC2_BASE + INTC2_INTMSKCLR_OFFSET + msk_offset); | ||
85 | } | ||
86 | |||
87 | static void mask_and_ack_intc2(unsigned int irq) | ||
88 | { | ||
89 | disable_intc2_irq(irq); | ||
90 | } | ||
91 | |||
92 | static void end_intc2_irq(unsigned int irq) | ||
93 | { | ||
94 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
95 | enable_intc2_irq(irq); | ||
96 | |||
97 | if (unlikely(intc2_data[irq - INTC2_FIRST_IRQ].clear_irq)) | ||
98 | intc2_data[irq - INTC2_FIRST_IRQ].clear_irq(irq); | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * Setup an INTC2 style interrupt. | ||
103 | * NOTE: Unlike IPR interrupts, parameters are not shifted by this code, | ||
104 | * allowing the use of the numbers straight out of the datasheet. | ||
105 | * For example: | ||
106 | * PIO1 which is INTPRI00[19,16] and INTMSK00[13] | ||
107 | * would be: ^ ^ ^ ^ | ||
108 | * | | | | | ||
109 | * make_intc2_irq(84, 0, 16, 0, 13); | ||
110 | */ | ||
111 | void make_intc2_irq(unsigned int irq, | ||
112 | unsigned int ipr_offset, unsigned int ipr_shift, | ||
113 | unsigned int msk_offset, unsigned int msk_shift, | ||
114 | unsigned int priority) | ||
115 | { | ||
116 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
117 | unsigned int flags; | ||
118 | unsigned long ipr; | ||
119 | |||
120 | if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS)) | ||
121 | return; | ||
122 | |||
123 | disable_irq_nosync(irq); | ||
124 | |||
125 | /* Fill the data we need */ | ||
126 | intc2_data[irq_offset].msk_offset = msk_offset; | ||
127 | intc2_data[irq_offset].msk_shift = msk_shift; | ||
128 | intc2_data[irq_offset].clear_irq = NULL; | ||
129 | |||
130 | /* Set the priority level */ | ||
131 | local_irq_save(flags); | ||
132 | |||
133 | ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset); | ||
134 | ipr &= ~(0xf << ipr_shift); | ||
135 | ipr |= priority << ipr_shift; | ||
136 | ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset); | ||
137 | |||
138 | local_irq_restore(flags); | ||
139 | |||
140 | irq_desc[irq].handler = &intc2_irq_type; | ||
141 | |||
142 | disable_intc2_irq(irq); | ||
143 | } | ||
144 | |||
145 | static struct intc2_init { | ||
146 | unsigned short irq; | ||
147 | unsigned char ipr_offset, ipr_shift; | ||
148 | unsigned char msk_offset, msk_shift; | ||
149 | unsigned char priority; | ||
150 | } intc2_init_data[] __initdata = { | ||
151 | #if defined(CONFIG_CPU_SUBTYPE_ST40) | ||
152 | {64, 0, 0, 0, 0, 13}, /* PCI serr */ | ||
153 | {65, 0, 4, 0, 1, 13}, /* PCI err */ | ||
154 | {66, 0, 4, 0, 2, 13}, /* PCI ad */ | ||
155 | {67, 0, 4, 0, 3, 13}, /* PCI pwd down */ | ||
156 | {72, 0, 8, 0, 5, 13}, /* DMAC INT0 */ | ||
157 | {73, 0, 8, 0, 6, 13}, /* DMAC INT1 */ | ||
158 | {74, 0, 8, 0, 7, 13}, /* DMAC INT2 */ | ||
159 | {75, 0, 8, 0, 8, 13}, /* DMAC INT3 */ | ||
160 | {76, 0, 8, 0, 9, 13}, /* DMAC INT4 */ | ||
161 | {78, 0, 8, 0, 11, 13}, /* DMAC ERR */ | ||
162 | {80, 0, 12, 0, 12, 13}, /* PIO0 */ | ||
163 | {84, 0, 16, 0, 13, 13}, /* PIO1 */ | ||
164 | {88, 0, 20, 0, 14, 13}, /* PIO2 */ | ||
165 | {112, 4, 0, 4, 0, 13}, /* Mailbox */ | ||
166 | #ifdef CONFIG_CPU_SUBTYPE_ST40GX1 | ||
167 | {116, 4, 4, 4, 4, 13}, /* SSC0 */ | ||
168 | {120, 4, 8, 4, 8, 13}, /* IR Blaster */ | ||
169 | {124, 4, 12, 4, 12, 13}, /* USB host */ | ||
170 | {128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */ | ||
171 | {132, 4, 20, 4, 20, 13}, /* UART0 */ | ||
172 | {134, 4, 20, 4, 22, 13}, /* UART2 */ | ||
173 | {136, 4, 24, 4, 24, 13}, /* IO_PIO0 */ | ||
174 | {140, 4, 28, 4, 28, 13}, /* EMPI */ | ||
175 | {144, 8, 0, 8, 0, 13}, /* MAFE */ | ||
176 | {148, 8, 4, 8, 4, 13}, /* PWM */ | ||
177 | {152, 8, 8, 8, 8, 13}, /* SSC1 */ | ||
178 | {156, 8, 12, 8, 12, 13}, /* IO_PIO1 */ | ||
179 | {160, 8, 16, 8, 16, 13}, /* USB target */ | ||
180 | {164, 8, 20, 8, 20, 13}, /* UART1 */ | ||
181 | {168, 8, 24, 8, 24, 13}, /* Teletext */ | ||
182 | {172, 8, 28, 8, 28, 13}, /* VideoSync VTG */ | ||
183 | {173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */ | ||
184 | {174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */ | ||
185 | #endif | ||
186 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
187 | /* | ||
188 | * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0 | ||
189 | */ | ||
190 | /* INTPRIO0 | INTMSK0 */ | ||
191 | {48, 0, 28, 0, 31, 3}, /* IRQ 4 */ | ||
192 | {49, 0, 24, 0, 30, 3}, /* IRQ 3 */ | ||
193 | {50, 0, 20, 0, 29, 3}, /* IRQ 2 */ | ||
194 | {51, 0, 16, 0, 28, 3}, /* IRQ 1 */ | ||
195 | /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */ | ||
196 | /* INTPRIO4 | INTMSK0 */ | ||
197 | {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */ | ||
198 | {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */ | ||
199 | {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */ | ||
200 | {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */ | ||
201 | {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */ | ||
202 | {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */ | ||
203 | {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */ | ||
204 | {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */ | ||
205 | /* INTPRIO8 | INTMSK0 */ | ||
206 | {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */ | ||
207 | {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */ | ||
208 | {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */ | ||
209 | {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */ | ||
210 | {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */ | ||
211 | {65, 8, 24, 0, 16, 3}, /* LCDC */ | ||
212 | /* 66, 67 unused */ | ||
213 | {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */ | ||
214 | {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */ | ||
215 | {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */ | ||
216 | /* 71 unused */ | ||
217 | {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */ | ||
218 | {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */ | ||
219 | {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */ | ||
220 | {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */ | ||
221 | {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */ | ||
222 | {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */ | ||
223 | {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */ | ||
224 | {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */ | ||
225 | /* | INTMSK4 */ | ||
226 | {80, 8, 4, 4, 23, 3}, /* SIM_ERI */ | ||
227 | {81, 8, 4, 4, 22, 3}, /* SIM_RXI */ | ||
228 | {82, 8, 4, 4, 21, 3}, /* SIM_TXI */ | ||
229 | {83, 8, 4, 4, 20, 3}, /* SIM_TEI */ | ||
230 | {84, 8, 0, 4, 19, 3}, /* HSPII */ | ||
231 | /* INTPRIOC | INTMSK4 */ | ||
232 | /* 85-87 unused/reserved */ | ||
233 | {88, 12, 20, 4, 18, 3}, /* MMCI0 */ | ||
234 | {89, 12, 20, 4, 17, 3}, /* MMCI1 */ | ||
235 | {90, 12, 20, 4, 16, 3}, /* MMCI2 */ | ||
236 | {91, 12, 20, 4, 15, 3}, /* MMCI3 */ | ||
237 | {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/ | ||
238 | /* 93-107 reserved/undocumented */ | ||
239 | {108,12, 4, 4, 1, 3}, /* ADC */ | ||
240 | {109,12, 0, 4, 0, 3}, /* CMTI */ | ||
241 | /* 110-111 reserved/unused */ | ||
242 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
243 | { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2}, | ||
244 | #ifdef CONFIG_SH_RTC | ||
245 | { RTC_IRQ, 4, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY }, | ||
246 | #endif | ||
247 | { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
248 | { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
249 | { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
250 | { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
251 | |||
252 | { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | ||
253 | { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | ||
254 | { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | ||
255 | { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | ||
256 | |||
257 | { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY }, | ||
258 | { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY }, | ||
259 | { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY }, | ||
260 | { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY }, | ||
261 | { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY }, | ||
262 | #endif | ||
263 | }; | ||
264 | |||
265 | void __init init_IRQ_intc2(void) | ||
266 | { | ||
267 | int i; | ||
268 | |||
269 | for (i = 0; i < ARRAY_SIZE(intc2_init_data); i++) { | ||
270 | struct intc2_init *p = intc2_init_data + i; | ||
271 | make_intc2_irq(p->irq, p->ipr_offset, p->ipr_shift, | ||
272 | p-> msk_offset, p->msk_shift, p->priority); | ||
273 | } | ||
274 | } | ||
275 | |||
276 | /* Adds a termination callback to the interrupt */ | ||
277 | void intc2_add_clear_irq(int irq, int (*fn)(int)) | ||
278 | { | ||
279 | if (unlikely(irq < INTC2_FIRST_IRQ)) | ||
280 | return; | ||
281 | |||
282 | intc2_data[irq - INTC2_FIRST_IRQ].clear_irq = fn; | ||
283 | } | ||
284 | |||
diff --git a/arch/sh/kernel/cpu/irq_ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 71f92096132b..fdbd718ae5c6 100644 --- a/arch/sh/kernel/cpu/irq_ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c | |||
@@ -1,6 +1,5 @@ | |||
1 | /* $Id: irq_ipr.c,v 1.1.2.1 2002/11/17 10:53:43 mrbrown Exp $ | 1 | /* |
2 | * | 2 | * arch/sh/kernel/cpu/irq/ipr.c |
3 | * linux/arch/sh/kernel/irq_ipr.c | ||
4 | * | 3 | * |
5 | * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi | 4 | * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi |
6 | * Copyright (C) 2000 Kazumoto Kojima | 5 | * Copyright (C) 2000 Kazumoto Kojima |
@@ -109,7 +108,8 @@ static void end_ipr_irq(unsigned int irq) | |||
109 | enable_ipr_irq(irq); | 108 | enable_ipr_irq(irq); |
110 | } | 109 | } |
111 | 110 | ||
112 | void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) | 111 | void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, |
112 | int priority, int maskpos) | ||
113 | { | 113 | { |
114 | disable_irq_nosync(irq); | 114 | disable_irq_nosync(irq); |
115 | ipr_data[irq].addr = addr; | 115 | ipr_data[irq].addr = addr; |
@@ -120,126 +120,47 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) | |||
120 | disable_ipr_irq(irq); | 120 | disable_ipr_irq(irq); |
121 | } | 121 | } |
122 | 122 | ||
123 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | ||
124 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | ||
125 | defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
126 | static unsigned char pint_map[256]; | ||
127 | static unsigned long portcr_mask = 0; | ||
128 | |||
129 | static void enable_pint_irq(unsigned int irq); | ||
130 | static void disable_pint_irq(unsigned int irq); | ||
131 | |||
132 | /* shutdown is same as "disable" */ | ||
133 | #define shutdown_pint_irq disable_pint_irq | ||
134 | |||
135 | static void mask_and_ack_pint(unsigned int); | ||
136 | static void end_pint_irq(unsigned int irq); | ||
137 | |||
138 | static unsigned int startup_pint_irq(unsigned int irq) | ||
139 | { | ||
140 | enable_pint_irq(irq); | ||
141 | return 0; /* never anything pending */ | ||
142 | } | ||
143 | |||
144 | static struct hw_interrupt_type pint_irq_type = { | ||
145 | .typename = "PINT-IRQ", | ||
146 | .startup = startup_pint_irq, | ||
147 | .shutdown = shutdown_pint_irq, | ||
148 | .enable = enable_pint_irq, | ||
149 | .disable = disable_pint_irq, | ||
150 | .ack = mask_and_ack_pint, | ||
151 | .end = end_pint_irq | ||
152 | }; | ||
153 | |||
154 | static void disable_pint_irq(unsigned int irq) | ||
155 | { | ||
156 | unsigned long val, flags; | ||
157 | |||
158 | local_irq_save(flags); | ||
159 | val = ctrl_inw(INTC_INTER); | ||
160 | val &= ~(1 << (irq - PINT_IRQ_BASE)); | ||
161 | ctrl_outw(val, INTC_INTER); /* disable PINTn */ | ||
162 | portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); | ||
163 | local_irq_restore(flags); | ||
164 | } | ||
165 | |||
166 | static void enable_pint_irq(unsigned int irq) | ||
167 | { | ||
168 | unsigned long val, flags; | ||
169 | |||
170 | local_irq_save(flags); | ||
171 | val = ctrl_inw(INTC_INTER); | ||
172 | val |= 1 << (irq - PINT_IRQ_BASE); | ||
173 | ctrl_outw(val, INTC_INTER); /* enable PINTn */ | ||
174 | portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; | ||
175 | local_irq_restore(flags); | ||
176 | } | ||
177 | |||
178 | static void mask_and_ack_pint(unsigned int irq) | ||
179 | { | ||
180 | disable_pint_irq(irq); | ||
181 | } | ||
182 | |||
183 | static void end_pint_irq(unsigned int irq) | ||
184 | { | ||
185 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
186 | enable_pint_irq(irq); | ||
187 | } | ||
188 | |||
189 | void make_pint_irq(unsigned int irq) | ||
190 | { | ||
191 | disable_irq_nosync(irq); | ||
192 | irq_desc[irq].handler = &pint_irq_type; | ||
193 | disable_pint_irq(irq); | ||
194 | } | ||
195 | #endif | ||
196 | |||
197 | void __init init_IRQ(void) | 123 | void __init init_IRQ(void) |
198 | { | 124 | { |
199 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 125 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 |
200 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | 126 | make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY, 0); |
201 | defined(CONFIG_CPU_SUBTYPE_SH7709) | 127 | make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY, 0); |
202 | int i; | ||
203 | #endif | ||
204 | |||
205 | make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); | ||
206 | make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); | ||
207 | #if defined(CONFIG_SH_RTC) | 128 | #if defined(CONFIG_SH_RTC) |
208 | make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); | 129 | make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY, 0); |
209 | #endif | 130 | #endif |
210 | 131 | ||
211 | #ifdef SCI_ERI_IRQ | 132 | #ifdef SCI_ERI_IRQ |
212 | make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); | 133 | make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); |
213 | make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); | 134 | make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); |
214 | make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); | 135 | make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); |
215 | #endif | 136 | #endif |
216 | 137 | ||
217 | #ifdef SCIF1_ERI_IRQ | 138 | #ifdef SCIF1_ERI_IRQ |
218 | make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); | 139 | make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); |
219 | make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); | 140 | make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); |
220 | make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); | 141 | make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); |
221 | make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); | 142 | make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); |
222 | #endif | 143 | #endif |
223 | 144 | ||
224 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) | 145 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) |
225 | make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY); | 146 | make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY, 0); |
226 | make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); | 147 | make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); |
227 | make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); | 148 | make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); |
228 | make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); | 149 | make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY, 0); |
229 | #endif | 150 | #endif |
230 | 151 | ||
231 | #ifdef SCIF_ERI_IRQ | 152 | #ifdef SCIF_ERI_IRQ |
232 | make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); | 153 | make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); |
233 | make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); | 154 | make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); |
234 | make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); | 155 | make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); |
235 | make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); | 156 | make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); |
236 | #endif | 157 | #endif |
237 | 158 | ||
238 | #ifdef IRDA_ERI_IRQ | 159 | #ifdef IRDA_ERI_IRQ |
239 | make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); | 160 | make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); |
240 | make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); | 161 | make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); |
241 | make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); | 162 | make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); |
242 | make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); | 163 | make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); |
243 | #endif | 164 | #endif |
244 | 165 | ||
245 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | 166 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ |
@@ -254,86 +175,32 @@ void __init init_IRQ(void) | |||
254 | * You should set corresponding bits of PFC to "00" | 175 | * You should set corresponding bits of PFC to "00" |
255 | * to enable these interrupts. | 176 | * to enable these interrupts. |
256 | */ | 177 | */ |
257 | make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY); | 178 | make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY, 0); |
258 | make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY); | 179 | make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY, 0); |
259 | make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY); | 180 | make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY, 0); |
260 | make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY); | 181 | make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY, 0); |
261 | make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY); | 182 | make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY, 0); |
262 | make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY); | 183 | make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY, 0); |
263 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) | 184 | #endif |
264 | make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY); | 185 | #endif |
265 | make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY); | ||
266 | enable_ipr_irq(PINT0_IRQ); | ||
267 | enable_ipr_irq(PINT8_IRQ); | ||
268 | 186 | ||
269 | for(i = 0; i < 16; i++) | 187 | #ifdef CONFIG_CPU_HAS_PINT_IRQ |
270 | make_pint_irq(PINT_IRQ_BASE + i); | 188 | init_IRQ_pint(); |
271 | for(i = 0; i < 256; i++) | 189 | #endif |
272 | { | ||
273 | if(i & 1) pint_map[i] = 0; | ||
274 | else if(i & 2) pint_map[i] = 1; | ||
275 | else if(i & 4) pint_map[i] = 2; | ||
276 | else if(i & 8) pint_map[i] = 3; | ||
277 | else if(i & 0x10) pint_map[i] = 4; | ||
278 | else if(i & 0x20) pint_map[i] = 5; | ||
279 | else if(i & 0x40) pint_map[i] = 6; | ||
280 | else if(i & 0x80) pint_map[i] = 7; | ||
281 | } | ||
282 | #endif /* !CONFIG_CPU_SUBTYPE_SH7300 */ | ||
283 | #endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 || CONFIG_CPU_SUBTYPE_SH7300*/ | ||
284 | 190 | ||
285 | #ifdef CONFIG_CPU_SUBTYPE_ST40 | 191 | #ifdef CONFIG_CPU_HAS_INTC2_IRQ |
286 | init_IRQ_intc2(); | 192 | init_IRQ_intc2(); |
287 | #endif | 193 | #endif |
288 | |||
289 | /* Perform the machine specific initialisation */ | 194 | /* Perform the machine specific initialisation */ |
290 | if (sh_mv.mv_init_irq != NULL) { | 195 | if (sh_mv.mv_init_irq != NULL) |
291 | sh_mv.mv_init_irq(); | 196 | sh_mv.mv_init_irq(); |
292 | } | ||
293 | } | 197 | } |
294 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | 198 | |
295 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) | 199 | #if !defined(CONFIG_CPU_HAS_PINT_IRQ) |
296 | int ipr_irq_demux(int irq) | 200 | int ipr_irq_demux(int irq) |
297 | { | 201 | { |
298 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
299 | unsigned long creg, dreg, d, sav; | ||
300 | |||
301 | if(irq == PINT0_IRQ) | ||
302 | { | ||
303 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
304 | creg = PORT_PACR; | ||
305 | dreg = PORT_PADR; | ||
306 | #else | ||
307 | creg = PORT_PCCR; | ||
308 | dreg = PORT_PCDR; | ||
309 | #endif | ||
310 | sav = ctrl_inw(creg); | ||
311 | ctrl_outw(sav | portcr_mask, creg); | ||
312 | d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) & ctrl_inw(INTC_INTER) & 0xff; | ||
313 | ctrl_outw(sav, creg); | ||
314 | if(d == 0) return irq; | ||
315 | return PINT_IRQ_BASE + pint_map[d]; | ||
316 | } | ||
317 | else if(irq == PINT8_IRQ) | ||
318 | { | ||
319 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
320 | creg = PORT_PBCR; | ||
321 | dreg = PORT_PBDR; | ||
322 | #else | ||
323 | creg = PORT_PFCR; | ||
324 | dreg = PORT_PFDR; | ||
325 | #endif | ||
326 | sav = ctrl_inw(creg); | ||
327 | ctrl_outw(sav | (portcr_mask >> 16), creg); | ||
328 | d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) & (ctrl_inw(INTC_INTER) >> 8) & 0xff; | ||
329 | ctrl_outw(sav, creg); | ||
330 | if(d == 0) return irq; | ||
331 | return PINT_IRQ_BASE + 8 + pint_map[d]; | ||
332 | } | ||
333 | #endif | ||
334 | return irq; | 202 | return irq; |
335 | } | 203 | } |
336 | #endif | 204 | #endif |
337 | 205 | ||
338 | EXPORT_SYMBOL(make_ipr_irq); | 206 | EXPORT_SYMBOL(make_ipr_irq); |
339 | |||
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c new file mode 100644 index 000000000000..95d6024fe1ae --- /dev/null +++ b/arch/sh/kernel/cpu/irq/pint.c | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs. | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi | ||
5 | * Copyright (C) 2000 Kazumoto Kojima | ||
6 | * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/module.h> | ||
17 | |||
18 | #include <asm/system.h> | ||
19 | #include <asm/io.h> | ||
20 | #include <asm/machvec.h> | ||
21 | |||
22 | static unsigned char pint_map[256]; | ||
23 | static unsigned long portcr_mask; | ||
24 | |||
25 | static void enable_pint_irq(unsigned int irq); | ||
26 | static void disable_pint_irq(unsigned int irq); | ||
27 | |||
28 | /* shutdown is same as "disable" */ | ||
29 | #define shutdown_pint_irq disable_pint_irq | ||
30 | |||
31 | static void mask_and_ack_pint(unsigned int); | ||
32 | static void end_pint_irq(unsigned int irq); | ||
33 | |||
34 | static unsigned int startup_pint_irq(unsigned int irq) | ||
35 | { | ||
36 | enable_pint_irq(irq); | ||
37 | return 0; /* never anything pending */ | ||
38 | } | ||
39 | |||
40 | static struct hw_interrupt_type pint_irq_type = { | ||
41 | .typename = "PINT-IRQ", | ||
42 | .startup = startup_pint_irq, | ||
43 | .shutdown = shutdown_pint_irq, | ||
44 | .enable = enable_pint_irq, | ||
45 | .disable = disable_pint_irq, | ||
46 | .ack = mask_and_ack_pint, | ||
47 | .end = end_pint_irq | ||
48 | }; | ||
49 | |||
50 | static void disable_pint_irq(unsigned int irq) | ||
51 | { | ||
52 | unsigned long val, flags; | ||
53 | |||
54 | local_irq_save(flags); | ||
55 | val = ctrl_inw(INTC_INTER); | ||
56 | val &= ~(1 << (irq - PINT_IRQ_BASE)); | ||
57 | ctrl_outw(val, INTC_INTER); /* disable PINTn */ | ||
58 | portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); | ||
59 | local_irq_restore(flags); | ||
60 | } | ||
61 | |||
62 | static void enable_pint_irq(unsigned int irq) | ||
63 | { | ||
64 | unsigned long val, flags; | ||
65 | |||
66 | local_irq_save(flags); | ||
67 | val = ctrl_inw(INTC_INTER); | ||
68 | val |= 1 << (irq - PINT_IRQ_BASE); | ||
69 | ctrl_outw(val, INTC_INTER); /* enable PINTn */ | ||
70 | portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; | ||
71 | local_irq_restore(flags); | ||
72 | } | ||
73 | |||
74 | static void mask_and_ack_pint(unsigned int irq) | ||
75 | { | ||
76 | disable_pint_irq(irq); | ||
77 | } | ||
78 | |||
79 | static void end_pint_irq(unsigned int irq) | ||
80 | { | ||
81 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
82 | enable_pint_irq(irq); | ||
83 | } | ||
84 | |||
85 | void make_pint_irq(unsigned int irq) | ||
86 | { | ||
87 | disable_irq_nosync(irq); | ||
88 | irq_desc[irq].handler = &pint_irq_type; | ||
89 | disable_pint_irq(irq); | ||
90 | } | ||
91 | |||
92 | void __init init_IRQ_pint(void) | ||
93 | { | ||
94 | int i; | ||
95 | |||
96 | make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY); | ||
97 | make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY); | ||
98 | |||
99 | enable_irq(PINT0_IRQ); | ||
100 | enable_irq(PINT8_IRQ); | ||
101 | |||
102 | for(i = 0; i < 16; i++) | ||
103 | make_pint_irq(PINT_IRQ_BASE + i); | ||
104 | |||
105 | for(i = 0; i < 256; i++) { | ||
106 | if (i & 1) | ||
107 | pint_map[i] = 0; | ||
108 | else if (i & 2) | ||
109 | pint_map[i] = 1; | ||
110 | else if (i & 4) | ||
111 | pint_map[i] = 2; | ||
112 | else if (i & 8) | ||
113 | pint_map[i] = 3; | ||
114 | else if (i & 0x10) | ||
115 | pint_map[i] = 4; | ||
116 | else if (i & 0x20) | ||
117 | pint_map[i] = 5; | ||
118 | else if (i & 0x40) | ||
119 | pint_map[i] = 6; | ||
120 | else if (i & 0x80) | ||
121 | pint_map[i] = 7; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | int ipr_irq_demux(int irq) | ||
126 | { | ||
127 | unsigned long creg, dreg, d, sav; | ||
128 | |||
129 | if (irq == PINT0_IRQ) { | ||
130 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
131 | creg = PORT_PACR; | ||
132 | dreg = PORT_PADR; | ||
133 | #else | ||
134 | creg = PORT_PCCR; | ||
135 | dreg = PORT_PCDR; | ||
136 | #endif | ||
137 | sav = ctrl_inw(creg); | ||
138 | ctrl_outw(sav | portcr_mask, creg); | ||
139 | d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) & | ||
140 | ctrl_inw(INTC_INTER) & 0xff; | ||
141 | ctrl_outw(sav, creg); | ||
142 | |||
143 | if (d == 0) | ||
144 | return irq; | ||
145 | |||
146 | return PINT_IRQ_BASE + pint_map[d]; | ||
147 | } else if (irq == PINT8_IRQ) { | ||
148 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
149 | creg = PORT_PBCR; | ||
150 | dreg = PORT_PBDR; | ||
151 | #else | ||
152 | creg = PORT_PFCR; | ||
153 | dreg = PORT_PFDR; | ||
154 | #endif | ||
155 | sav = ctrl_inw(creg); | ||
156 | ctrl_outw(sav | (portcr_mask >> 16), creg); | ||
157 | d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) & | ||
158 | (ctrl_inw(INTC_INTER) >> 8) & 0xff; | ||
159 | ctrl_outw(sav, creg); | ||
160 | |||
161 | if (d == 0) | ||
162 | return irq; | ||
163 | |||
164 | return PINT_IRQ_BASE + 8 + pint_map[d]; | ||
165 | } | ||
166 | |||
167 | return irq; | ||
168 | } | ||
169 | |||
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index a64532e4dc63..b54dbb9a0c86 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile | |||
@@ -4,3 +4,10 @@ | |||
4 | 4 | ||
5 | obj-y := ex.o probe.o | 5 | obj-y := ex.o probe.o |
6 | 6 | ||
7 | clock-$(CONFIG_CPU_SH3) := clock-sh3.o | ||
8 | clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o | ||
9 | clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o | ||
10 | clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o | ||
11 | |||
12 | obj-y += $(clock-y) | ||
13 | |||
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c new file mode 100644 index 000000000000..c3c945958baf --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c | |||
@@ -0,0 +1,89 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh3/clock-sh3.c | ||
3 | * | ||
4 | * Generic SH-3 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * FRQCR parsing hacked out of arch/sh/kernel/time.c | ||
9 | * | ||
10 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
11 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
12 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file "COPYING" in the main directory of this archive | ||
17 | * for more details. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/clock.h> | ||
22 | #include <asm/freq.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
26 | static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 }; | ||
27 | static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
28 | |||
29 | static void master_clk_init(struct clk *clk) | ||
30 | { | ||
31 | int frqcr = ctrl_inw(FRQCR); | ||
32 | int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); | ||
33 | |||
34 | clk->rate *= pfc_divisors[idx]; | ||
35 | } | ||
36 | |||
37 | static struct clk_ops sh3_master_clk_ops = { | ||
38 | .init = master_clk_init, | ||
39 | }; | ||
40 | |||
41 | static void module_clk_recalc(struct clk *clk) | ||
42 | { | ||
43 | int frqcr = ctrl_inw(FRQCR); | ||
44 | int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); | ||
45 | |||
46 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
47 | } | ||
48 | |||
49 | static struct clk_ops sh3_module_clk_ops = { | ||
50 | .recalc = module_clk_recalc, | ||
51 | }; | ||
52 | |||
53 | static void bus_clk_recalc(struct clk *clk) | ||
54 | { | ||
55 | int frqcr = ctrl_inw(FRQCR); | ||
56 | int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); | ||
57 | |||
58 | clk->rate = clk->parent->rate / stc_multipliers[idx]; | ||
59 | } | ||
60 | |||
61 | static struct clk_ops sh3_bus_clk_ops = { | ||
62 | .recalc = bus_clk_recalc, | ||
63 | }; | ||
64 | |||
65 | static void cpu_clk_recalc(struct clk *clk) | ||
66 | { | ||
67 | int frqcr = ctrl_inw(FRQCR); | ||
68 | int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); | ||
69 | |||
70 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
71 | } | ||
72 | |||
73 | static struct clk_ops sh3_cpu_clk_ops = { | ||
74 | .recalc = cpu_clk_recalc, | ||
75 | }; | ||
76 | |||
77 | static struct clk_ops *sh3_clk_ops[] = { | ||
78 | &sh3_master_clk_ops, | ||
79 | &sh3_module_clk_ops, | ||
80 | &sh3_bus_clk_ops, | ||
81 | &sh3_cpu_clk_ops, | ||
82 | }; | ||
83 | |||
84 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
85 | { | ||
86 | if (idx < ARRAY_SIZE(sh3_clk_ops)) | ||
87 | *ops = sh3_clk_ops[idx]; | ||
88 | } | ||
89 | |||
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7300.c b/arch/sh/kernel/cpu/sh3/clock-sh7300.c new file mode 100644 index 000000000000..e804174b9625 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh7300.c | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh3/clock-sh7300.c | ||
3 | * | ||
4 | * SH7300 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * FRQCR parsing hacked out of arch/sh/kernel/time.c | ||
9 | * | ||
10 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
11 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
12 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file "COPYING" in the main directory of this archive | ||
17 | * for more details. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/clock.h> | ||
22 | #include <asm/freq.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 }; | ||
26 | |||
27 | static void master_clk_init(struct clk *clk) | ||
28 | { | ||
29 | clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; | ||
30 | } | ||
31 | |||
32 | static struct clk_ops sh7300_master_clk_ops = { | ||
33 | .init = master_clk_init, | ||
34 | }; | ||
35 | |||
36 | static void module_clk_recalc(struct clk *clk) | ||
37 | { | ||
38 | int idx = (ctrl_inw(FRQCR) & 0x0007); | ||
39 | clk->rate = clk->parent->rate / md_table[idx]; | ||
40 | } | ||
41 | |||
42 | static struct clk_ops sh7300_module_clk_ops = { | ||
43 | .recalc = module_clk_recalc, | ||
44 | }; | ||
45 | |||
46 | static void bus_clk_recalc(struct clk *clk) | ||
47 | { | ||
48 | int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8; | ||
49 | clk->rate = clk->parent->rate / md_table[idx]; | ||
50 | } | ||
51 | |||
52 | static struct clk_ops sh7300_bus_clk_ops = { | ||
53 | .recalc = bus_clk_recalc, | ||
54 | }; | ||
55 | |||
56 | static void cpu_clk_recalc(struct clk *clk) | ||
57 | { | ||
58 | int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4; | ||
59 | clk->rate = clk->parent->rate / md_table[idx]; | ||
60 | } | ||
61 | |||
62 | static struct clk_ops sh7300_cpu_clk_ops = { | ||
63 | .recalc = cpu_clk_recalc, | ||
64 | }; | ||
65 | |||
66 | static struct clk_ops *sh7300_clk_ops[] = { | ||
67 | &sh7300_master_clk_ops, | ||
68 | &sh7300_module_clk_ops, | ||
69 | &sh7300_bus_clk_ops, | ||
70 | &sh7300_cpu_clk_ops, | ||
71 | }; | ||
72 | |||
73 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
74 | { | ||
75 | if (idx < ARRAY_SIZE(sh7300_clk_ops)) | ||
76 | *ops = sh7300_clk_ops[idx]; | ||
77 | } | ||
78 | |||
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c new file mode 100644 index 000000000000..dfdbf3277fd7 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c | |||
@@ -0,0 +1,84 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh3/clock-sh7705.c | ||
3 | * | ||
4 | * SH7705 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * FRQCR parsing hacked out of arch/sh/kernel/time.c | ||
9 | * | ||
10 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
11 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
12 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file "COPYING" in the main directory of this archive | ||
17 | * for more details. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/clock.h> | ||
22 | #include <asm/freq.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | /* | ||
26 | * SH7705 uses the same divisors as the generic SH-3 case, it's just the | ||
27 | * FRQCR layout that is a bit different.. | ||
28 | */ | ||
29 | static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
30 | static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 }; | ||
31 | static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
32 | |||
33 | static void master_clk_init(struct clk *clk) | ||
34 | { | ||
35 | clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003]; | ||
36 | } | ||
37 | |||
38 | static struct clk_ops sh7705_master_clk_ops = { | ||
39 | .init = master_clk_init, | ||
40 | }; | ||
41 | |||
42 | static void module_clk_recalc(struct clk *clk) | ||
43 | { | ||
44 | int idx = ctrl_inw(FRQCR) & 0x0003; | ||
45 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
46 | } | ||
47 | |||
48 | static struct clk_ops sh7705_module_clk_ops = { | ||
49 | .recalc = module_clk_recalc, | ||
50 | }; | ||
51 | |||
52 | static void bus_clk_recalc(struct clk *clk) | ||
53 | { | ||
54 | int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8; | ||
55 | clk->rate = clk->parent->rate / stc_multipliers[idx]; | ||
56 | } | ||
57 | |||
58 | static struct clk_ops sh7705_bus_clk_ops = { | ||
59 | .recalc = bus_clk_recalc, | ||
60 | }; | ||
61 | |||
62 | static void cpu_clk_recalc(struct clk *clk) | ||
63 | { | ||
64 | int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4; | ||
65 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
66 | } | ||
67 | |||
68 | static struct clk_ops sh7705_cpu_clk_ops = { | ||
69 | .recalc = cpu_clk_recalc, | ||
70 | }; | ||
71 | |||
72 | static struct clk_ops *sh7705_clk_ops[] = { | ||
73 | &sh7705_master_clk_ops, | ||
74 | &sh7705_module_clk_ops, | ||
75 | &sh7705_bus_clk_ops, | ||
76 | &sh7705_cpu_clk_ops, | ||
77 | }; | ||
78 | |||
79 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
80 | { | ||
81 | if (idx < ARRAY_SIZE(sh7705_clk_ops)) | ||
82 | *ops = sh7705_clk_ops[idx]; | ||
83 | } | ||
84 | |||
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c new file mode 100644 index 000000000000..10461a745e5f --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh3/clock-sh7709.c | ||
3 | * | ||
4 | * SH7709 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Andriy Skulysh | ||
7 | * | ||
8 | * Based on arch/sh/kernel/cpu/sh3/clock-sh7705.c | ||
9 | * Copyright (C) 2005 Paul Mundt | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <asm/clock.h> | ||
18 | #include <asm/freq.h> | ||
19 | #include <asm/io.h> | ||
20 | |||
21 | static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 }; | ||
22 | static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; | ||
23 | static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; | ||
24 | |||
25 | static void set_bus_parent(struct clk *clk) | ||
26 | { | ||
27 | struct clk *bus_clk = clk_get("bus_clk"); | ||
28 | clk->parent = bus_clk; | ||
29 | clk_put(bus_clk); | ||
30 | } | ||
31 | |||
32 | static void master_clk_init(struct clk *clk) | ||
33 | { | ||
34 | int frqcr = ctrl_inw(FRQCR); | ||
35 | int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); | ||
36 | |||
37 | clk->rate *= pfc_divisors[idx]; | ||
38 | } | ||
39 | |||
40 | static struct clk_ops sh7709_master_clk_ops = { | ||
41 | .init = master_clk_init, | ||
42 | }; | ||
43 | |||
44 | static void module_clk_recalc(struct clk *clk) | ||
45 | { | ||
46 | int frqcr = ctrl_inw(FRQCR); | ||
47 | int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); | ||
48 | |||
49 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
50 | } | ||
51 | |||
52 | static struct clk_ops sh7709_module_clk_ops = { | ||
53 | #ifdef CLOCK_MODE_0_1_2_7 | ||
54 | .init = set_bus_parent, | ||
55 | #endif | ||
56 | .recalc = module_clk_recalc, | ||
57 | }; | ||
58 | |||
59 | static void bus_clk_recalc(struct clk *clk) | ||
60 | { | ||
61 | int frqcr = ctrl_inw(FRQCR); | ||
62 | int idx = (frqcr & 0x0080) ? | ||
63 | ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1; | ||
64 | |||
65 | clk->rate = clk->parent->rate * stc_multipliers[idx]; | ||
66 | } | ||
67 | |||
68 | static struct clk_ops sh7709_bus_clk_ops = { | ||
69 | .recalc = bus_clk_recalc, | ||
70 | }; | ||
71 | |||
72 | static void cpu_clk_recalc(struct clk *clk) | ||
73 | { | ||
74 | int frqcr = ctrl_inw(FRQCR); | ||
75 | int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); | ||
76 | |||
77 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
78 | } | ||
79 | |||
80 | static struct clk_ops sh7709_cpu_clk_ops = { | ||
81 | .init = set_bus_parent, | ||
82 | .recalc = cpu_clk_recalc, | ||
83 | }; | ||
84 | |||
85 | static struct clk_ops *sh7709_clk_ops[] = { | ||
86 | &sh7709_master_clk_ops, | ||
87 | &sh7709_module_clk_ops, | ||
88 | &sh7709_bus_clk_ops, | ||
89 | &sh7709_cpu_clk_ops, | ||
90 | }; | ||
91 | |||
92 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
93 | { | ||
94 | if (idx < ARRAY_SIZE(sh7709_clk_ops)) | ||
95 | *ops = sh7709_clk_ops[idx]; | ||
96 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index ead1071eac73..3d5cafc71ae3 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile | |||
@@ -5,6 +5,15 @@ | |||
5 | obj-y := ex.o probe.o | 5 | obj-y := ex.o probe.o |
6 | 6 | ||
7 | obj-$(CONFIG_SH_FPU) += fpu.o | 7 | obj-$(CONFIG_SH_FPU) += fpu.o |
8 | obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += irq_intc2.o | ||
9 | obj-$(CONFIG_SH_STORE_QUEUES) += sq.o | 8 | obj-$(CONFIG_SH_STORE_QUEUES) += sq.o |
10 | 9 | ||
10 | # Primary on-chip clocks (common) | ||
11 | clock-$(CONFIG_CPU_SH4) := clock-sh4.o | ||
12 | clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o | ||
13 | clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o | ||
14 | clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o | ||
15 | |||
16 | # Additional clocks by subtype | ||
17 | clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o | ||
18 | |||
19 | obj-y += $(clock-y) | ||
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c new file mode 100644 index 000000000000..bfdf5fe8d948 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c | |||
@@ -0,0 +1,179 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4/clock-sh4-202.c | ||
3 | * | ||
4 | * Additional SH4-202 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/err.h> | ||
15 | #include <asm/clock.h> | ||
16 | #include <asm/freq.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | #define CPG2_FRQCR3 0xfe0a0018 | ||
20 | |||
21 | static int frqcr3_divisors[] = { 1, 2, 3, 4, 6, 8, 16 }; | ||
22 | static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 }; | ||
23 | |||
24 | static void emi_clk_recalc(struct clk *clk) | ||
25 | { | ||
26 | int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007; | ||
27 | clk->rate = clk->parent->rate / frqcr3_divisors[idx]; | ||
28 | } | ||
29 | |||
30 | static inline int frqcr3_lookup(struct clk *clk, unsigned long rate) | ||
31 | { | ||
32 | int divisor = clk->parent->rate / rate; | ||
33 | int i; | ||
34 | |||
35 | for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) | ||
36 | if (frqcr3_divisors[i] == divisor) | ||
37 | return frqcr3_values[i]; | ||
38 | |||
39 | /* Safe fallback */ | ||
40 | return 5; | ||
41 | } | ||
42 | |||
43 | static struct clk_ops sh4202_emi_clk_ops = { | ||
44 | .recalc = emi_clk_recalc, | ||
45 | }; | ||
46 | |||
47 | static struct clk sh4202_emi_clk = { | ||
48 | .name = "emi_clk", | ||
49 | .flags = CLK_ALWAYS_ENABLED, | ||
50 | .ops = &sh4202_emi_clk_ops, | ||
51 | }; | ||
52 | |||
53 | static void femi_clk_recalc(struct clk *clk) | ||
54 | { | ||
55 | int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007; | ||
56 | clk->rate = clk->parent->rate / frqcr3_divisors[idx]; | ||
57 | } | ||
58 | |||
59 | static struct clk_ops sh4202_femi_clk_ops = { | ||
60 | .recalc = femi_clk_recalc, | ||
61 | }; | ||
62 | |||
63 | static struct clk sh4202_femi_clk = { | ||
64 | .name = "femi_clk", | ||
65 | .flags = CLK_ALWAYS_ENABLED, | ||
66 | .ops = &sh4202_femi_clk_ops, | ||
67 | }; | ||
68 | |||
69 | static void shoc_clk_init(struct clk *clk) | ||
70 | { | ||
71 | int i; | ||
72 | |||
73 | /* | ||
74 | * For some reason, the shoc_clk seems to be set to some really | ||
75 | * insane value at boot (values outside of the allowable frequency | ||
76 | * range for instance). We deal with this by scaling it back down | ||
77 | * to something sensible just in case. | ||
78 | * | ||
79 | * Start scaling from the high end down until we find something | ||
80 | * that passes rate verification.. | ||
81 | */ | ||
82 | for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { | ||
83 | int divisor = frqcr3_divisors[i]; | ||
84 | |||
85 | if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) | ||
86 | break; | ||
87 | } | ||
88 | |||
89 | WARN_ON(i == ARRAY_SIZE(frqcr3_divisors)); /* Undefined clock */ | ||
90 | } | ||
91 | |||
92 | static void shoc_clk_recalc(struct clk *clk) | ||
93 | { | ||
94 | int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007; | ||
95 | clk->rate = clk->parent->rate / frqcr3_divisors[idx]; | ||
96 | } | ||
97 | |||
98 | static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) | ||
99 | { | ||
100 | struct clk *bclk = clk_get("bus_clk"); | ||
101 | unsigned long bclk_rate = clk_get_rate(bclk); | ||
102 | |||
103 | clk_put(bclk); | ||
104 | |||
105 | if (rate > bclk_rate) | ||
106 | return 1; | ||
107 | if (rate > 66000000) | ||
108 | return 1; | ||
109 | |||
110 | return 0; | ||
111 | } | ||
112 | |||
113 | static int shoc_clk_set_rate(struct clk *clk, unsigned long rate) | ||
114 | { | ||
115 | unsigned long frqcr3; | ||
116 | unsigned int tmp; | ||
117 | |||
118 | /* Make sure we have something sensible to switch to */ | ||
119 | if (shoc_clk_verify_rate(clk, rate) != 0) | ||
120 | return -EINVAL; | ||
121 | |||
122 | tmp = frqcr3_lookup(clk, rate); | ||
123 | |||
124 | frqcr3 = ctrl_inl(CPG2_FRQCR3); | ||
125 | frqcr3 &= ~(0x0007 << 6); | ||
126 | frqcr3 |= tmp << 6; | ||
127 | ctrl_outl(frqcr3, CPG2_FRQCR3); | ||
128 | |||
129 | clk->rate = clk->parent->rate / frqcr3_divisors[tmp]; | ||
130 | |||
131 | return 0; | ||
132 | } | ||
133 | |||
134 | static struct clk_ops sh4202_shoc_clk_ops = { | ||
135 | .init = shoc_clk_init, | ||
136 | .recalc = shoc_clk_recalc, | ||
137 | .set_rate = shoc_clk_set_rate, | ||
138 | }; | ||
139 | |||
140 | static struct clk sh4202_shoc_clk = { | ||
141 | .name = "shoc_clk", | ||
142 | .flags = CLK_ALWAYS_ENABLED, | ||
143 | .ops = &sh4202_shoc_clk_ops, | ||
144 | }; | ||
145 | |||
146 | static struct clk *sh4202_onchip_clocks[] = { | ||
147 | &sh4202_emi_clk, | ||
148 | &sh4202_femi_clk, | ||
149 | &sh4202_shoc_clk, | ||
150 | }; | ||
151 | |||
152 | static int __init sh4202_clk_init(void) | ||
153 | { | ||
154 | struct clk *clk = clk_get("master_clk"); | ||
155 | int i; | ||
156 | |||
157 | for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { | ||
158 | struct clk *clkp = sh4202_onchip_clocks[i]; | ||
159 | |||
160 | clkp->parent = clk; | ||
161 | clk_register(clkp); | ||
162 | clk_enable(clkp); | ||
163 | } | ||
164 | |||
165 | /* | ||
166 | * Now that we have the rest of the clocks registered, we need to | ||
167 | * force the parent clock to propagate so that these clocks will | ||
168 | * automatically figure out their rate. We cheat by handing the | ||
169 | * parent clock its current rate and forcing child propagation. | ||
170 | */ | ||
171 | clk_set_rate(clk, clk_get_rate(clk)); | ||
172 | |||
173 | clk_put(clk); | ||
174 | |||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | arch_initcall(sh4202_clk_init); | ||
179 | |||
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c new file mode 100644 index 000000000000..dca9f87a12d6 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c | |||
@@ -0,0 +1,80 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4/clock-sh4.c | ||
3 | * | ||
4 | * Generic SH-4 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * FRQCR parsing hacked out of arch/sh/kernel/time.c | ||
9 | * | ||
10 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
11 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
12 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file "COPYING" in the main directory of this archive | ||
17 | * for more details. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/clock.h> | ||
22 | #include <asm/freq.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 }; | ||
26 | #define bfc_divisors ifc_divisors /* Same */ | ||
27 | static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 }; | ||
28 | |||
29 | static void master_clk_init(struct clk *clk) | ||
30 | { | ||
31 | clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007]; | ||
32 | } | ||
33 | |||
34 | static struct clk_ops sh4_master_clk_ops = { | ||
35 | .init = master_clk_init, | ||
36 | }; | ||
37 | |||
38 | static void module_clk_recalc(struct clk *clk) | ||
39 | { | ||
40 | int idx = (ctrl_inw(FRQCR) & 0x0007); | ||
41 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
42 | } | ||
43 | |||
44 | static struct clk_ops sh4_module_clk_ops = { | ||
45 | .recalc = module_clk_recalc, | ||
46 | }; | ||
47 | |||
48 | static void bus_clk_recalc(struct clk *clk) | ||
49 | { | ||
50 | int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007; | ||
51 | clk->rate = clk->parent->rate / bfc_divisors[idx]; | ||
52 | } | ||
53 | |||
54 | static struct clk_ops sh4_bus_clk_ops = { | ||
55 | .recalc = bus_clk_recalc, | ||
56 | }; | ||
57 | |||
58 | static void cpu_clk_recalc(struct clk *clk) | ||
59 | { | ||
60 | int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007; | ||
61 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
62 | } | ||
63 | |||
64 | static struct clk_ops sh4_cpu_clk_ops = { | ||
65 | .recalc = cpu_clk_recalc, | ||
66 | }; | ||
67 | |||
68 | static struct clk_ops *sh4_clk_ops[] = { | ||
69 | &sh4_master_clk_ops, | ||
70 | &sh4_module_clk_ops, | ||
71 | &sh4_bus_clk_ops, | ||
72 | &sh4_cpu_clk_ops, | ||
73 | }; | ||
74 | |||
75 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
76 | { | ||
77 | if (idx < ARRAY_SIZE(sh4_clk_ops)) | ||
78 | *ops = sh4_clk_ops[idx]; | ||
79 | } | ||
80 | |||
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh73180.c b/arch/sh/kernel/cpu/sh4/clock-sh73180.c new file mode 100644 index 000000000000..2fa5cb2ae68d --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/clock-sh73180.c | |||
@@ -0,0 +1,81 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4/clock-sh73180.c | ||
3 | * | ||
4 | * SH73180 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * FRQCR parsing hacked out of arch/sh/kernel/time.c | ||
9 | * | ||
10 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
11 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
12 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file "COPYING" in the main directory of this archive | ||
17 | * for more details. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/clock.h> | ||
22 | #include <asm/freq.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | /* | ||
26 | * SH73180 uses a common set of divisors, so this is quite simple.. | ||
27 | */ | ||
28 | static int divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 }; | ||
29 | |||
30 | static void master_clk_init(struct clk *clk) | ||
31 | { | ||
32 | clk->rate *= divisors[ctrl_inl(FRQCR) & 0x0007]; | ||
33 | } | ||
34 | |||
35 | static struct clk_ops sh73180_master_clk_ops = { | ||
36 | .init = master_clk_init, | ||
37 | }; | ||
38 | |||
39 | static void module_clk_recalc(struct clk *clk) | ||
40 | { | ||
41 | int idx = (ctrl_inl(FRQCR) & 0x0007); | ||
42 | clk->rate = clk->parent->rate / divisors[idx]; | ||
43 | } | ||
44 | |||
45 | static struct clk_ops sh73180_module_clk_ops = { | ||
46 | .recalc = module_clk_recalc, | ||
47 | }; | ||
48 | |||
49 | static void bus_clk_recalc(struct clk *clk) | ||
50 | { | ||
51 | int idx = (ctrl_inl(FRQCR) >> 12) & 0x0007; | ||
52 | clk->rate = clk->parent->rate / divisors[idx]; | ||
53 | } | ||
54 | |||
55 | static struct clk_ops sh73180_bus_clk_ops = { | ||
56 | .recalc = bus_clk_recalc, | ||
57 | }; | ||
58 | |||
59 | static void cpu_clk_recalc(struct clk *clk) | ||
60 | { | ||
61 | int idx = (ctrl_inl(FRQCR) >> 20) & 0x0007; | ||
62 | clk->rate = clk->parent->rate / divisors[idx]; | ||
63 | } | ||
64 | |||
65 | static struct clk_ops sh73180_cpu_clk_ops = { | ||
66 | .recalc = cpu_clk_recalc, | ||
67 | }; | ||
68 | |||
69 | static struct clk_ops *sh73180_clk_ops[] = { | ||
70 | &sh73180_master_clk_ops, | ||
71 | &sh73180_module_clk_ops, | ||
72 | &sh73180_bus_clk_ops, | ||
73 | &sh73180_cpu_clk_ops, | ||
74 | }; | ||
75 | |||
76 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
77 | { | ||
78 | if (idx < ARRAY_SIZE(sh73180_clk_ops)) | ||
79 | *ops = sh73180_clk_ops[idx]; | ||
80 | } | ||
81 | |||
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh7770.c b/arch/sh/kernel/cpu/sh4/clock-sh7770.c new file mode 100644 index 000000000000..c8694bac6477 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/clock-sh7770.c | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4/clock-sh7770.c | ||
3 | * | ||
4 | * SH7770 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <asm/clock.h> | ||
15 | #include <asm/freq.h> | ||
16 | #include <asm/io.h> | ||
17 | |||
18 | static int ifc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 1 }; | ||
19 | static int bfc_divisors[] = { 1, 1, 1, 1, 1, 8,12, 1 }; | ||
20 | static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 }; | ||
21 | |||
22 | static void master_clk_init(struct clk *clk) | ||
23 | { | ||
24 | clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f]; | ||
25 | } | ||
26 | |||
27 | static struct clk_ops sh7770_master_clk_ops = { | ||
28 | .init = master_clk_init, | ||
29 | }; | ||
30 | |||
31 | static void module_clk_recalc(struct clk *clk) | ||
32 | { | ||
33 | int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f); | ||
34 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
35 | } | ||
36 | |||
37 | static struct clk_ops sh7770_module_clk_ops = { | ||
38 | .recalc = module_clk_recalc, | ||
39 | }; | ||
40 | |||
41 | static void bus_clk_recalc(struct clk *clk) | ||
42 | { | ||
43 | int idx = (ctrl_inl(FRQCR) & 0x000f); | ||
44 | clk->rate = clk->parent->rate / bfc_divisors[idx]; | ||
45 | } | ||
46 | |||
47 | static struct clk_ops sh7770_bus_clk_ops = { | ||
48 | .recalc = bus_clk_recalc, | ||
49 | }; | ||
50 | |||
51 | static void cpu_clk_recalc(struct clk *clk) | ||
52 | { | ||
53 | int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f); | ||
54 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
55 | } | ||
56 | |||
57 | static struct clk_ops sh7770_cpu_clk_ops = { | ||
58 | .recalc = cpu_clk_recalc, | ||
59 | }; | ||
60 | |||
61 | static struct clk_ops *sh7770_clk_ops[] = { | ||
62 | &sh7770_master_clk_ops, | ||
63 | &sh7770_module_clk_ops, | ||
64 | &sh7770_bus_clk_ops, | ||
65 | &sh7770_cpu_clk_ops, | ||
66 | }; | ||
67 | |||
68 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
69 | { | ||
70 | if (idx < ARRAY_SIZE(sh7770_clk_ops)) | ||
71 | *ops = sh7770_clk_ops[idx]; | ||
72 | } | ||
73 | |||
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh7780.c b/arch/sh/kernel/cpu/sh4/clock-sh7780.c new file mode 100644 index 000000000000..93ad367342c9 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/clock-sh7780.c | |||
@@ -0,0 +1,126 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4/clock-sh7780.c | ||
3 | * | ||
4 | * SH7780 support for the clock framework | ||
5 | * | ||
6 | * Copyright (C) 2005 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <asm/clock.h> | ||
15 | #include <asm/freq.h> | ||
16 | #include <asm/io.h> | ||
17 | |||
18 | static int ifc_divisors[] = { 2, 4 }; | ||
19 | static int bfc_divisors[] = { 1, 1, 1, 8, 12, 16, 24, 1 }; | ||
20 | static int pfc_divisors[] = { 1, 24, 24, 1 }; | ||
21 | static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 }; | ||
22 | |||
23 | static void master_clk_init(struct clk *clk) | ||
24 | { | ||
25 | clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003]; | ||
26 | } | ||
27 | |||
28 | static struct clk_ops sh7780_master_clk_ops = { | ||
29 | .init = master_clk_init, | ||
30 | }; | ||
31 | |||
32 | static void module_clk_recalc(struct clk *clk) | ||
33 | { | ||
34 | int idx = (ctrl_inl(FRQCR) & 0x0003); | ||
35 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
36 | } | ||
37 | |||
38 | static struct clk_ops sh7780_module_clk_ops = { | ||
39 | .recalc = module_clk_recalc, | ||
40 | }; | ||
41 | |||
42 | static void bus_clk_recalc(struct clk *clk) | ||
43 | { | ||
44 | int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007); | ||
45 | clk->rate = clk->parent->rate / bfc_divisors[idx]; | ||
46 | } | ||
47 | |||
48 | static struct clk_ops sh7780_bus_clk_ops = { | ||
49 | .recalc = bus_clk_recalc, | ||
50 | }; | ||
51 | |||
52 | static void cpu_clk_recalc(struct clk *clk) | ||
53 | { | ||
54 | int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001); | ||
55 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
56 | } | ||
57 | |||
58 | static struct clk_ops sh7780_cpu_clk_ops = { | ||
59 | .recalc = cpu_clk_recalc, | ||
60 | }; | ||
61 | |||
62 | static struct clk_ops *sh7780_clk_ops[] = { | ||
63 | &sh7780_master_clk_ops, | ||
64 | &sh7780_module_clk_ops, | ||
65 | &sh7780_bus_clk_ops, | ||
66 | &sh7780_cpu_clk_ops, | ||
67 | }; | ||
68 | |||
69 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
70 | { | ||
71 | if (idx < ARRAY_SIZE(sh7780_clk_ops)) | ||
72 | *ops = sh7780_clk_ops[idx]; | ||
73 | } | ||
74 | |||
75 | static void shyway_clk_recalc(struct clk *clk) | ||
76 | { | ||
77 | int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007); | ||
78 | clk->rate = clk->parent->rate / cfc_divisors[idx]; | ||
79 | } | ||
80 | |||
81 | static struct clk_ops sh7780_shyway_clk_ops = { | ||
82 | .recalc = shyway_clk_recalc, | ||
83 | }; | ||
84 | |||
85 | static struct clk sh7780_shyway_clk = { | ||
86 | .name = "shyway_clk", | ||
87 | .flags = CLK_ALWAYS_ENABLED, | ||
88 | .ops = &sh7780_shyway_clk_ops, | ||
89 | }; | ||
90 | |||
91 | /* | ||
92 | * Additional SH7780-specific on-chip clocks that aren't already part of the | ||
93 | * clock framework | ||
94 | */ | ||
95 | static struct clk *sh7780_onchip_clocks[] = { | ||
96 | &sh7780_shyway_clk, | ||
97 | }; | ||
98 | |||
99 | static int __init sh7780_clk_init(void) | ||
100 | { | ||
101 | struct clk *clk = clk_get("master_clk"); | ||
102 | int i; | ||
103 | |||
104 | for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { | ||
105 | struct clk *clkp = sh7780_onchip_clocks[i]; | ||
106 | |||
107 | clkp->parent = clk; | ||
108 | clk_register(clkp); | ||
109 | clk_enable(clkp); | ||
110 | } | ||
111 | |||
112 | /* | ||
113 | * Now that we have the rest of the clocks registered, we need to | ||
114 | * force the parent clock to propagate so that these clocks will | ||
115 | * automatically figure out their rate. We cheat by handing the | ||
116 | * parent clock its current rate and forcing child propagation. | ||
117 | */ | ||
118 | clk_set_rate(clk, clk_get_rate(clk)); | ||
119 | |||
120 | clk_put(clk); | ||
121 | |||
122 | return 0; | ||
123 | } | ||
124 | |||
125 | arch_initcall(sh7780_clk_init); | ||
126 | |||
diff --git a/arch/sh/kernel/cpu/sh4/irq_intc2.c b/arch/sh/kernel/cpu/sh4/irq_intc2.c deleted file mode 100644 index f6b16ba01932..000000000000 --- a/arch/sh/kernel/cpu/sh4/irq_intc2.c +++ /dev/null | |||
@@ -1,222 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/sh/kernel/irq_intc2.c | ||
3 | * | ||
4 | * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * Interrupt handling for INTC2-based IRQ. | ||
10 | * | ||
11 | * These are the "new Hitachi style" interrupts, as present on the | ||
12 | * Hitachi 7751 and the STM ST40 STB1. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/irq.h> | ||
18 | |||
19 | #include <asm/system.h> | ||
20 | #include <asm/io.h> | ||
21 | #include <asm/machvec.h> | ||
22 | |||
23 | |||
24 | struct intc2_data { | ||
25 | unsigned char msk_offset; | ||
26 | unsigned char msk_shift; | ||
27 | #ifdef CONFIG_CPU_SUBTYPE_ST40 | ||
28 | int (*clear_irq) (int); | ||
29 | #endif | ||
30 | }; | ||
31 | |||
32 | |||
33 | static struct intc2_data intc2_data[NR_INTC2_IRQS]; | ||
34 | |||
35 | static void enable_intc2_irq(unsigned int irq); | ||
36 | static void disable_intc2_irq(unsigned int irq); | ||
37 | |||
38 | /* shutdown is same as "disable" */ | ||
39 | #define shutdown_intc2_irq disable_intc2_irq | ||
40 | |||
41 | static void mask_and_ack_intc2(unsigned int); | ||
42 | static void end_intc2_irq(unsigned int irq); | ||
43 | |||
44 | static unsigned int startup_intc2_irq(unsigned int irq) | ||
45 | { | ||
46 | enable_intc2_irq(irq); | ||
47 | return 0; /* never anything pending */ | ||
48 | } | ||
49 | |||
50 | static struct hw_interrupt_type intc2_irq_type = { | ||
51 | .typename = "INTC2-IRQ", | ||
52 | .startup = startup_intc2_irq, | ||
53 | .shutdown = shutdown_intc2_irq, | ||
54 | .enable = enable_intc2_irq, | ||
55 | .disable = disable_intc2_irq, | ||
56 | .ack = mask_and_ack_intc2, | ||
57 | .end = end_intc2_irq | ||
58 | }; | ||
59 | |||
60 | static void disable_intc2_irq(unsigned int irq) | ||
61 | { | ||
62 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
63 | int msk_shift, msk_offset; | ||
64 | |||
65 | // Sanity check | ||
66 | if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS)) | ||
67 | return; | ||
68 | |||
69 | msk_shift = intc2_data[irq_offset].msk_shift; | ||
70 | msk_offset = intc2_data[irq_offset].msk_offset; | ||
71 | |||
72 | ctrl_outl(1<<msk_shift, | ||
73 | INTC2_BASE+INTC2_INTMSK_OFFSET+msk_offset); | ||
74 | } | ||
75 | |||
76 | static void enable_intc2_irq(unsigned int irq) | ||
77 | { | ||
78 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
79 | int msk_shift, msk_offset; | ||
80 | |||
81 | /* Sanity check */ | ||
82 | if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS)) | ||
83 | return; | ||
84 | |||
85 | msk_shift = intc2_data[irq_offset].msk_shift; | ||
86 | msk_offset = intc2_data[irq_offset].msk_offset; | ||
87 | |||
88 | ctrl_outl(1<<msk_shift, | ||
89 | INTC2_BASE+INTC2_INTMSKCLR_OFFSET+msk_offset); | ||
90 | } | ||
91 | |||
92 | static void mask_and_ack_intc2(unsigned int irq) | ||
93 | { | ||
94 | disable_intc2_irq(irq); | ||
95 | } | ||
96 | |||
97 | static void end_intc2_irq(unsigned int irq) | ||
98 | { | ||
99 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
100 | enable_intc2_irq(irq); | ||
101 | |||
102 | #ifdef CONFIG_CPU_SUBTYPE_ST40 | ||
103 | if (intc2_data[irq - INTC2_FIRST_IRQ].clear_irq) | ||
104 | intc2_data[irq - INTC2_FIRST_IRQ].clear_irq (irq); | ||
105 | #endif | ||
106 | } | ||
107 | |||
108 | /* | ||
109 | * Setup an INTC2 style interrupt. | ||
110 | * NOTE: Unlike IPR interrupts, parameters are not shifted by this code, | ||
111 | * allowing the use of the numbers straight out of the datasheet. | ||
112 | * For example: | ||
113 | * PIO1 which is INTPRI00[19,16] and INTMSK00[13] | ||
114 | * would be: ^ ^ ^ ^ | ||
115 | * | | | | | ||
116 | * make_intc2_irq(84, 0, 16, 0, 13); | ||
117 | */ | ||
118 | void make_intc2_irq(unsigned int irq, | ||
119 | unsigned int ipr_offset, unsigned int ipr_shift, | ||
120 | unsigned int msk_offset, unsigned int msk_shift, | ||
121 | unsigned int priority) | ||
122 | { | ||
123 | int irq_offset = irq - INTC2_FIRST_IRQ; | ||
124 | unsigned int flags; | ||
125 | unsigned long ipr; | ||
126 | |||
127 | if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS)) | ||
128 | return; | ||
129 | |||
130 | disable_irq_nosync(irq); | ||
131 | |||
132 | /* Fill the data we need */ | ||
133 | intc2_data[irq_offset].msk_offset = msk_offset; | ||
134 | intc2_data[irq_offset].msk_shift = msk_shift; | ||
135 | #ifdef CONFIG_CPU_SUBTYPE_ST40 | ||
136 | intc2_data[irq_offset].clear_irq = NULL; | ||
137 | #endif | ||
138 | |||
139 | /* Set the priority level */ | ||
140 | local_irq_save(flags); | ||
141 | |||
142 | ipr=ctrl_inl(INTC2_BASE+INTC2_INTPRI_OFFSET+ipr_offset); | ||
143 | ipr&=~(0xf<<ipr_shift); | ||
144 | ipr|=(priority)<<ipr_shift; | ||
145 | ctrl_outl(ipr, INTC2_BASE+INTC2_INTPRI_OFFSET+ipr_offset); | ||
146 | |||
147 | local_irq_restore(flags); | ||
148 | |||
149 | irq_desc[irq].handler=&intc2_irq_type; | ||
150 | |||
151 | disable_intc2_irq(irq); | ||
152 | } | ||
153 | |||
154 | #ifdef CONFIG_CPU_SUBTYPE_ST40 | ||
155 | |||
156 | struct intc2_init { | ||
157 | unsigned short irq; | ||
158 | unsigned char ipr_offset, ipr_shift; | ||
159 | unsigned char msk_offset, msk_shift; | ||
160 | }; | ||
161 | |||
162 | static struct intc2_init intc2_init_data[] __initdata = { | ||
163 | {64, 0, 0, 0, 0}, /* PCI serr */ | ||
164 | {65, 0, 4, 0, 1}, /* PCI err */ | ||
165 | {66, 0, 4, 0, 2}, /* PCI ad */ | ||
166 | {67, 0, 4, 0, 3}, /* PCI pwd down */ | ||
167 | {72, 0, 8, 0, 5}, /* DMAC INT0 */ | ||
168 | {73, 0, 8, 0, 6}, /* DMAC INT1 */ | ||
169 | {74, 0, 8, 0, 7}, /* DMAC INT2 */ | ||
170 | {75, 0, 8, 0, 8}, /* DMAC INT3 */ | ||
171 | {76, 0, 8, 0, 9}, /* DMAC INT4 */ | ||
172 | {78, 0, 8, 0, 11}, /* DMAC ERR */ | ||
173 | {80, 0, 12, 0, 12}, /* PIO0 */ | ||
174 | {84, 0, 16, 0, 13}, /* PIO1 */ | ||
175 | {88, 0, 20, 0, 14}, /* PIO2 */ | ||
176 | {112, 4, 0, 4, 0}, /* Mailbox */ | ||
177 | #ifdef CONFIG_CPU_SUBTYPE_ST40GX1 | ||
178 | {116, 4, 4, 4, 4}, /* SSC0 */ | ||
179 | {120, 4, 8, 4, 8}, /* IR Blaster */ | ||
180 | {124, 4, 12, 4, 12}, /* USB host */ | ||
181 | {128, 4, 16, 4, 16}, /* Video processor BLITTER */ | ||
182 | {132, 4, 20, 4, 20}, /* UART0 */ | ||
183 | {134, 4, 20, 4, 22}, /* UART2 */ | ||
184 | {136, 4, 24, 4, 24}, /* IO_PIO0 */ | ||
185 | {140, 4, 28, 4, 28}, /* EMPI */ | ||
186 | {144, 8, 0, 8, 0}, /* MAFE */ | ||
187 | {148, 8, 4, 8, 4}, /* PWM */ | ||
188 | {152, 8, 8, 8, 8}, /* SSC1 */ | ||
189 | {156, 8, 12, 8, 12}, /* IO_PIO1 */ | ||
190 | {160, 8, 16, 8, 16}, /* USB target */ | ||
191 | {164, 8, 20, 8, 20}, /* UART1 */ | ||
192 | {168, 8, 24, 8, 24}, /* Teletext */ | ||
193 | {172, 8, 28, 8, 28}, /* VideoSync VTG */ | ||
194 | {173, 8, 28, 8, 29}, /* VideoSync DVP0 */ | ||
195 | {174, 8, 28, 8, 30}, /* VideoSync DVP1 */ | ||
196 | #endif | ||
197 | }; | ||
198 | |||
199 | void __init init_IRQ_intc2(void) | ||
200 | { | ||
201 | struct intc2_init *p; | ||
202 | |||
203 | printk(KERN_ALERT "init_IRQ_intc2\n"); | ||
204 | |||
205 | for (p = intc2_init_data; | ||
206 | p<intc2_init_data+ARRAY_SIZE(intc2_init_data); | ||
207 | p++) { | ||
208 | make_intc2_irq(p->irq, p->ipr_offset, p->ipr_shift, | ||
209 | p-> msk_offset, p->msk_shift, 13); | ||
210 | } | ||
211 | } | ||
212 | |||
213 | /* Adds a termination callback to the interrupt */ | ||
214 | void intc2_add_clear_irq(int irq, int (*fn)(int)) | ||
215 | { | ||
216 | if (irq < INTC2_FIRST_IRQ) | ||
217 | return; | ||
218 | |||
219 | intc2_data[irq - INTC2_FIRST_IRQ].clear_irq = fn; | ||
220 | } | ||
221 | |||
222 | #endif /* CONFIG_CPU_SUBTYPE_ST40 */ | ||
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c index d9932f25993b..71c9fde2fd90 100644 --- a/arch/sh/kernel/io.c +++ b/arch/sh/kernel/io.c | |||
@@ -2,58 +2,73 @@ | |||
2 | * linux/arch/sh/kernel/io.c | 2 | * linux/arch/sh/kernel/io.c |
3 | * | 3 | * |
4 | * Copyright (C) 2000 Stuart Menefy | 4 | * Copyright (C) 2000 Stuart Menefy |
5 | * Copyright (C) 2005 Paul Mundt | ||
5 | * | 6 | * |
6 | * Provide real functions which expand to whatever the header file defined. | 7 | * Provide real functions which expand to whatever the header file defined. |
7 | * Also definitions of machine independent IO functions. | 8 | * Also definitions of machine independent IO functions. |
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
8 | */ | 13 | */ |
9 | |||
10 | #include <asm/io.h> | ||
11 | #include <linux/module.h> | 14 | #include <linux/module.h> |
15 | #include <asm/machvec.h> | ||
16 | #include <asm/io.h> | ||
12 | 17 | ||
13 | /* | 18 | /* |
14 | * Copy data from IO memory space to "real" memory space. | 19 | * Copy data from IO memory space to "real" memory space. |
15 | * This needs to be optimized. | 20 | * This needs to be optimized. |
16 | */ | 21 | */ |
17 | void memcpy_fromio(void * to, unsigned long from, unsigned long count) | 22 | void memcpy_fromio(void *to, volatile void __iomem *from, unsigned long count) |
18 | { | 23 | { |
19 | char *p = to; | 24 | char *p = to; |
20 | while (count) { | 25 | while (count) { |
21 | count--; | 26 | count--; |
22 | *p = readb(from); | 27 | *p = readb((void __iomem *)from); |
23 | p++; | 28 | p++; |
24 | from++; | 29 | from++; |
25 | } | 30 | } |
26 | } | 31 | } |
27 | 32 | EXPORT_SYMBOL(memcpy_fromio); | |
33 | |||
28 | /* | 34 | /* |
29 | * Copy data from "real" memory space to IO memory space. | 35 | * Copy data from "real" memory space to IO memory space. |
30 | * This needs to be optimized. | 36 | * This needs to be optimized. |
31 | */ | 37 | */ |
32 | void memcpy_toio(unsigned long to, const void * from, unsigned long count) | 38 | void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count) |
33 | { | 39 | { |
34 | const char *p = from; | 40 | const char *p = from; |
35 | while (count) { | 41 | while (count) { |
36 | count--; | 42 | count--; |
37 | writeb(*p, to); | 43 | writeb(*p, (void __iomem *)to); |
38 | p++; | 44 | p++; |
39 | to++; | 45 | to++; |
40 | } | 46 | } |
41 | } | 47 | } |
42 | 48 | EXPORT_SYMBOL(memcpy_toio); | |
49 | |||
43 | /* | 50 | /* |
44 | * "memset" on IO memory space. | 51 | * "memset" on IO memory space. |
45 | * This needs to be optimized. | 52 | * This needs to be optimized. |
46 | */ | 53 | */ |
47 | void memset_io(unsigned long dst, int c, unsigned long count) | 54 | void memset_io(volatile void __iomem *dst, int c, unsigned long count) |
48 | { | 55 | { |
49 | while (count) { | 56 | while (count) { |
50 | count--; | 57 | count--; |
51 | writeb(c, dst); | 58 | writeb(c, (void __iomem *)dst); |
52 | dst++; | 59 | dst++; |
53 | } | 60 | } |
54 | } | 61 | } |
55 | |||
56 | EXPORT_SYMBOL(memcpy_fromio); | ||
57 | EXPORT_SYMBOL(memcpy_toio); | ||
58 | EXPORT_SYMBOL(memset_io); | 62 | EXPORT_SYMBOL(memset_io); |
59 | 63 | ||
64 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
65 | { | ||
66 | return sh_mv.mv_ioport_map(port, nr); | ||
67 | } | ||
68 | EXPORT_SYMBOL(ioport_map); | ||
69 | |||
70 | void ioport_unmap(void __iomem *addr) | ||
71 | { | ||
72 | sh_mv.mv_ioport_unmap(addr); | ||
73 | } | ||
74 | EXPORT_SYMBOL(ioport_unmap); | ||
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c index a911b0149d1f..28ec7487de8c 100644 --- a/arch/sh/kernel/io_generic.c +++ b/arch/sh/kernel/io_generic.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * linux/arch/sh/kernel/io_generic.c | 3 | * linux/arch/sh/kernel/io_generic.c |
4 | * | 4 | * |
5 | * Copyright (C) 2000 Niibe Yutaka | 5 | * Copyright (C) 2000 Niibe Yutaka |
6 | * Copyright (C) 2005 Paul Mundt | ||
6 | * | 7 | * |
7 | * Generic I/O routine. These can be used where a machine specific version | 8 | * Generic I/O routine. These can be used where a machine specific version |
8 | * is not required. | 9 | * is not required. |
@@ -10,21 +11,20 @@ | |||
10 | * This file is subject to the terms and conditions of the GNU General Public | 11 | * This file is subject to the terms and conditions of the GNU General Public |
11 | * License. See the file "COPYING" in the main directory of this archive | 12 | * License. See the file "COPYING" in the main directory of this archive |
12 | * for more details. | 13 | * for more details. |
13 | * | ||
14 | */ | 14 | */ |
15 | 15 | #include <linux/module.h> | |
16 | #include <asm/io.h> | 16 | #include <asm/io.h> |
17 | #include <asm/machvec.h> | 17 | #include <asm/machvec.h> |
18 | #include <linux/module.h> | ||
19 | 18 | ||
20 | #if defined(CONFIG_CPU_SH3) | 19 | #ifdef CONFIG_CPU_SH3 |
20 | /* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a | ||
21 | * workaround. */ | ||
21 | /* I'm not sure SH7709 has this kind of bug */ | 22 | /* I'm not sure SH7709 has this kind of bug */ |
22 | #define SH3_PCMCIA_BUG_WORKAROUND 1 | 23 | #define dummy_read() ctrl_inb(0xba000000) |
23 | #define DUMMY_READ_AREA6 0xba000000 | 24 | #else |
25 | #define dummy_read() | ||
24 | #endif | 26 | #endif |
25 | 27 | ||
26 | #define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x)) | ||
27 | |||
28 | unsigned long generic_io_base; | 28 | unsigned long generic_io_base; |
29 | 29 | ||
30 | static inline void delay(void) | 30 | static inline void delay(void) |
@@ -32,40 +32,40 @@ static inline void delay(void) | |||
32 | ctrl_inw(0xa0000000); | 32 | ctrl_inw(0xa0000000); |
33 | } | 33 | } |
34 | 34 | ||
35 | unsigned char generic_inb(unsigned long port) | 35 | u8 generic_inb(unsigned long port) |
36 | { | 36 | { |
37 | return *(volatile unsigned char*)PORT2ADDR(port); | 37 | return ctrl_inb((unsigned long __force)ioport_map(port, 1)); |
38 | } | 38 | } |
39 | 39 | ||
40 | unsigned short generic_inw(unsigned long port) | 40 | u16 generic_inw(unsigned long port) |
41 | { | 41 | { |
42 | return *(volatile unsigned short*)PORT2ADDR(port); | 42 | return ctrl_inw((unsigned long __force)ioport_map(port, 2)); |
43 | } | 43 | } |
44 | 44 | ||
45 | unsigned int generic_inl(unsigned long port) | 45 | u32 generic_inl(unsigned long port) |
46 | { | 46 | { |
47 | return *(volatile unsigned long*)PORT2ADDR(port); | 47 | return ctrl_inl((unsigned long __force)ioport_map(port, 4)); |
48 | } | 48 | } |
49 | 49 | ||
50 | unsigned char generic_inb_p(unsigned long port) | 50 | u8 generic_inb_p(unsigned long port) |
51 | { | 51 | { |
52 | unsigned long v = *(volatile unsigned char*)PORT2ADDR(port); | 52 | unsigned long v = generic_inb(port); |
53 | 53 | ||
54 | delay(); | 54 | delay(); |
55 | return v; | 55 | return v; |
56 | } | 56 | } |
57 | 57 | ||
58 | unsigned short generic_inw_p(unsigned long port) | 58 | u16 generic_inw_p(unsigned long port) |
59 | { | 59 | { |
60 | unsigned long v = *(volatile unsigned short*)PORT2ADDR(port); | 60 | unsigned long v = generic_inw(port); |
61 | 61 | ||
62 | delay(); | 62 | delay(); |
63 | return v; | 63 | return v; |
64 | } | 64 | } |
65 | 65 | ||
66 | unsigned int generic_inl_p(unsigned long port) | 66 | u32 generic_inl_p(unsigned long port) |
67 | { | 67 | { |
68 | unsigned long v = *(volatile unsigned long*)PORT2ADDR(port); | 68 | unsigned long v = generic_inl(port); |
69 | 69 | ||
70 | delay(); | 70 | delay(); |
71 | return v; | 71 | return v; |
@@ -77,75 +77,70 @@ unsigned int generic_inl_p(unsigned long port) | |||
77 | * convert the port address to real address once. | 77 | * convert the port address to real address once. |
78 | */ | 78 | */ |
79 | 79 | ||
80 | void generic_insb(unsigned long port, void *buffer, unsigned long count) | 80 | void generic_insb(unsigned long port, void *dst, unsigned long count) |
81 | { | 81 | { |
82 | volatile unsigned char *port_addr; | 82 | volatile u8 *port_addr; |
83 | unsigned char *buf=buffer; | 83 | u8 *buf = dst; |
84 | |||
85 | port_addr = (volatile unsigned char *)PORT2ADDR(port); | ||
86 | 84 | ||
87 | while(count--) | 85 | port_addr = (volatile u8 *)ioport_map(port, 1); |
88 | *buf++ = *port_addr; | 86 | while (count--) |
87 | *buf++ = *port_addr; | ||
89 | } | 88 | } |
90 | 89 | ||
91 | void generic_insw(unsigned long port, void *buffer, unsigned long count) | 90 | void generic_insw(unsigned long port, void *dst, unsigned long count) |
92 | { | 91 | { |
93 | volatile unsigned short *port_addr; | 92 | volatile u16 *port_addr; |
94 | unsigned short *buf=buffer; | 93 | u16 *buf = dst; |
95 | 94 | ||
96 | port_addr = (volatile unsigned short *)PORT2ADDR(port); | 95 | port_addr = (volatile u16 *)ioport_map(port, 2); |
96 | while (count--) | ||
97 | *buf++ = *port_addr; | ||
97 | 98 | ||
98 | while(count--) | 99 | dummy_read(); |
99 | *buf++ = *port_addr; | ||
100 | #ifdef SH3_PCMCIA_BUG_WORKAROUND | ||
101 | ctrl_inb (DUMMY_READ_AREA6); | ||
102 | #endif | ||
103 | } | 100 | } |
104 | 101 | ||
105 | void generic_insl(unsigned long port, void *buffer, unsigned long count) | 102 | void generic_insl(unsigned long port, void *dst, unsigned long count) |
106 | { | 103 | { |
107 | volatile unsigned long *port_addr; | 104 | volatile u32 *port_addr; |
108 | unsigned long *buf=buffer; | 105 | u32 *buf = dst; |
109 | 106 | ||
110 | port_addr = (volatile unsigned long *)PORT2ADDR(port); | 107 | port_addr = (volatile u32 *)ioport_map(port, 4); |
108 | while (count--) | ||
109 | *buf++ = *port_addr; | ||
111 | 110 | ||
112 | while(count--) | 111 | dummy_read(); |
113 | *buf++ = *port_addr; | ||
114 | #ifdef SH3_PCMCIA_BUG_WORKAROUND | ||
115 | ctrl_inb (DUMMY_READ_AREA6); | ||
116 | #endif | ||
117 | } | 112 | } |
118 | 113 | ||
119 | void generic_outb(unsigned char b, unsigned long port) | 114 | void generic_outb(u8 b, unsigned long port) |
120 | { | 115 | { |
121 | *(volatile unsigned char*)PORT2ADDR(port) = b; | 116 | ctrl_outb(b, (unsigned long __force)ioport_map(port, 1)); |
122 | } | 117 | } |
123 | 118 | ||
124 | void generic_outw(unsigned short b, unsigned long port) | 119 | void generic_outw(u16 b, unsigned long port) |
125 | { | 120 | { |
126 | *(volatile unsigned short*)PORT2ADDR(port) = b; | 121 | ctrl_outw(b, (unsigned long __force)ioport_map(port, 2)); |
127 | } | 122 | } |
128 | 123 | ||
129 | void generic_outl(unsigned int b, unsigned long port) | 124 | void generic_outl(u32 b, unsigned long port) |
130 | { | 125 | { |
131 | *(volatile unsigned long*)PORT2ADDR(port) = b; | 126 | ctrl_outl(b, (unsigned long __force)ioport_map(port, 4)); |
132 | } | 127 | } |
133 | 128 | ||
134 | void generic_outb_p(unsigned char b, unsigned long port) | 129 | void generic_outb_p(u8 b, unsigned long port) |
135 | { | 130 | { |
136 | *(volatile unsigned char*)PORT2ADDR(port) = b; | 131 | generic_outb(b, port); |
137 | delay(); | 132 | delay(); |
138 | } | 133 | } |
139 | 134 | ||
140 | void generic_outw_p(unsigned short b, unsigned long port) | 135 | void generic_outw_p(u16 b, unsigned long port) |
141 | { | 136 | { |
142 | *(volatile unsigned short*)PORT2ADDR(port) = b; | 137 | generic_outw(b, port); |
143 | delay(); | 138 | delay(); |
144 | } | 139 | } |
145 | 140 | ||
146 | void generic_outl_p(unsigned int b, unsigned long port) | 141 | void generic_outl_p(u32 b, unsigned long port) |
147 | { | 142 | { |
148 | *(volatile unsigned long*)PORT2ADDR(port) = b; | 143 | generic_outl(b, port); |
149 | delay(); | 144 | delay(); |
150 | } | 145 | } |
151 | 146 | ||
@@ -154,90 +149,77 @@ void generic_outl_p(unsigned int b, unsigned long port) | |||
154 | * address. However as the port address doesn't change we only need to | 149 | * address. However as the port address doesn't change we only need to |
155 | * convert the port address to real address once. | 150 | * convert the port address to real address once. |
156 | */ | 151 | */ |
157 | 152 | void generic_outsb(unsigned long port, const void *src, unsigned long count) | |
158 | void generic_outsb(unsigned long port, const void *buffer, unsigned long count) | ||
159 | { | 153 | { |
160 | volatile unsigned char *port_addr; | 154 | volatile u8 *port_addr; |
161 | const unsigned char *buf=buffer; | 155 | const u8 *buf = src; |
162 | 156 | ||
163 | port_addr = (volatile unsigned char *)PORT2ADDR(port); | 157 | port_addr = (volatile u8 __force *)ioport_map(port, 1); |
164 | 158 | ||
165 | while(count--) | 159 | while (count--) |
166 | *port_addr = *buf++; | 160 | *port_addr = *buf++; |
167 | } | 161 | } |
168 | 162 | ||
169 | void generic_outsw(unsigned long port, const void *buffer, unsigned long count) | 163 | void generic_outsw(unsigned long port, const void *src, unsigned long count) |
170 | { | 164 | { |
171 | volatile unsigned short *port_addr; | 165 | volatile u16 *port_addr; |
172 | const unsigned short *buf=buffer; | 166 | const u16 *buf = src; |
173 | 167 | ||
174 | port_addr = (volatile unsigned short *)PORT2ADDR(port); | 168 | port_addr = (volatile u16 __force *)ioport_map(port, 2); |
175 | 169 | ||
176 | while(count--) | 170 | while (count--) |
177 | *port_addr = *buf++; | 171 | *port_addr = *buf++; |
178 | 172 | ||
179 | #ifdef SH3_PCMCIA_BUG_WORKAROUND | 173 | dummy_read(); |
180 | ctrl_inb (DUMMY_READ_AREA6); | ||
181 | #endif | ||
182 | } | 174 | } |
183 | 175 | ||
184 | void generic_outsl(unsigned long port, const void *buffer, unsigned long count) | 176 | void generic_outsl(unsigned long port, const void *src, unsigned long count) |
185 | { | 177 | { |
186 | volatile unsigned long *port_addr; | 178 | volatile u32 *port_addr; |
187 | const unsigned long *buf=buffer; | 179 | const u32 *buf = src; |
188 | 180 | ||
189 | port_addr = (volatile unsigned long *)PORT2ADDR(port); | 181 | port_addr = (volatile u32 __force *)ioport_map(port, 4); |
182 | while (count--) | ||
183 | *port_addr = *buf++; | ||
190 | 184 | ||
191 | while(count--) | 185 | dummy_read(); |
192 | *port_addr = *buf++; | ||
193 | |||
194 | #ifdef SH3_PCMCIA_BUG_WORKAROUND | ||
195 | ctrl_inb (DUMMY_READ_AREA6); | ||
196 | #endif | ||
197 | } | ||
198 | |||
199 | unsigned char generic_readb(unsigned long addr) | ||
200 | { | ||
201 | return *(volatile unsigned char*)addr; | ||
202 | } | 186 | } |
203 | 187 | ||
204 | unsigned short generic_readw(unsigned long addr) | 188 | u8 generic_readb(void __iomem *addr) |
205 | { | 189 | { |
206 | return *(volatile unsigned short*)addr; | 190 | return ctrl_inb((unsigned long __force)addr); |
207 | } | 191 | } |
208 | 192 | ||
209 | unsigned int generic_readl(unsigned long addr) | 193 | u16 generic_readw(void __iomem *addr) |
210 | { | 194 | { |
211 | return *(volatile unsigned long*)addr; | 195 | return ctrl_inw((unsigned long __force)addr); |
212 | } | 196 | } |
213 | 197 | ||
214 | void generic_writeb(unsigned char b, unsigned long addr) | 198 | u32 generic_readl(void __iomem *addr) |
215 | { | 199 | { |
216 | *(volatile unsigned char*)addr = b; | 200 | return ctrl_inl((unsigned long __force)addr); |
217 | } | 201 | } |
218 | 202 | ||
219 | void generic_writew(unsigned short b, unsigned long addr) | 203 | void generic_writeb(u8 b, void __iomem *addr) |
220 | { | 204 | { |
221 | *(volatile unsigned short*)addr = b; | 205 | ctrl_outb(b, (unsigned long __force)addr); |
222 | } | 206 | } |
223 | 207 | ||
224 | void generic_writel(unsigned int b, unsigned long addr) | 208 | void generic_writew(u16 b, void __iomem *addr) |
225 | { | 209 | { |
226 | *(volatile unsigned long*)addr = b; | 210 | ctrl_outw(b, (unsigned long __force)addr); |
227 | } | 211 | } |
228 | 212 | ||
229 | void * generic_ioremap(unsigned long offset, unsigned long size) | 213 | void generic_writel(u32 b, void __iomem *addr) |
230 | { | 214 | { |
231 | return (void *) P2SEGADDR(offset); | 215 | ctrl_outl(b, (unsigned long __force)addr); |
232 | } | 216 | } |
233 | EXPORT_SYMBOL(generic_ioremap); | ||
234 | 217 | ||
235 | void generic_iounmap(void *addr) | 218 | void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) |
236 | { | 219 | { |
220 | return (void __iomem *)(addr + generic_io_base); | ||
237 | } | 221 | } |
238 | EXPORT_SYMBOL(generic_iounmap); | ||
239 | 222 | ||
240 | unsigned long generic_isa_port2addr(unsigned long offset) | 223 | void generic_ioport_unmap(void __iomem *addr) |
241 | { | 224 | { |
242 | return offset + generic_io_base; | ||
243 | } | 225 | } |
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 54c171225b78..6883c00728cb 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c | |||
@@ -8,38 +8,13 @@ | |||
8 | * SuperH version: Copyright (C) 1999 Niibe Yutaka | 8 | * SuperH version: Copyright (C) 1999 Niibe Yutaka |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /* | 11 | #include <linux/irq.h> |
12 | * IRQs are in fact implemented a bit like signal handlers for the kernel. | ||
13 | * Naturally it's not a 1:1 relation, but there are similarities. | ||
14 | */ | ||
15 | |||
16 | #include <linux/config.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/ptrace.h> | ||
19 | #include <linux/errno.h> | ||
20 | #include <linux/kernel_stat.h> | ||
21 | #include <linux/signal.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/ioport.h> | ||
24 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
25 | #include <linux/timex.h> | 13 | #include <linux/kernel_stat.h> |
26 | #include <linux/mm.h> | ||
27 | #include <linux/slab.h> | ||
28 | #include <linux/random.h> | ||
29 | #include <linux/smp.h> | ||
30 | #include <linux/smp_lock.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <linux/seq_file.h> | 14 | #include <linux/seq_file.h> |
33 | #include <linux/kallsyms.h> | ||
34 | #include <linux/bitops.h> | ||
35 | |||
36 | #include <asm/system.h> | ||
37 | #include <asm/io.h> | ||
38 | #include <asm/pgalloc.h> | ||
39 | #include <asm/delay.h> | ||
40 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
41 | #include <linux/irq.h> | 16 | #include <asm/processor.h> |
42 | 17 | #include <asm/cpu/mmu_context.h> | |
43 | 18 | ||
44 | /* | 19 | /* |
45 | * 'what should we do if we get a hw irq event on an illegal vector'. | 20 | * 'what should we do if we get a hw irq event on an illegal vector'. |
@@ -66,7 +41,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
66 | seq_putc(p, '\n'); | 41 | seq_putc(p, '\n'); |
67 | } | 42 | } |
68 | 43 | ||
69 | if (i < ACTUAL_NR_IRQS) { | 44 | if (i < NR_IRQS) { |
70 | spin_lock_irqsave(&irq_desc[i].lock, flags); | 45 | spin_lock_irqsave(&irq_desc[i].lock, flags); |
71 | action = irq_desc[i].action; | 46 | action = irq_desc[i].action; |
72 | if (!action) | 47 | if (!action) |
@@ -86,19 +61,32 @@ unlock: | |||
86 | } | 61 | } |
87 | #endif | 62 | #endif |
88 | 63 | ||
64 | |||
89 | asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, | 65 | asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, |
90 | unsigned long r6, unsigned long r7, | 66 | unsigned long r6, unsigned long r7, |
91 | struct pt_regs regs) | 67 | struct pt_regs regs) |
92 | { | 68 | { |
93 | int irq; | 69 | int irq = r4; |
94 | 70 | ||
95 | irq_enter(); | 71 | irq_enter(); |
96 | asm volatile("stc r2_bank, %0\n\t" | 72 | |
97 | "shlr2 %0\n\t" | 73 | #ifdef CONFIG_CPU_HAS_INTEVT |
98 | "shlr2 %0\n\t" | 74 | __asm__ __volatile__ ( |
99 | "shlr %0\n\t" | 75 | #ifdef CONFIG_CPU_HAS_SR_RB |
100 | "add #-16, %0\n\t" | 76 | "stc r2_bank, %0\n\t" |
101 | :"=z" (irq)); | 77 | #else |
78 | "mov.l @%1, %0\n\t" | ||
79 | #endif | ||
80 | "shlr2 %0\n\t" | ||
81 | "shlr2 %0\n\t" | ||
82 | "shlr %0\n\t" | ||
83 | "add #-16, %0\n\t" | ||
84 | : "=z" (irq), "=r" (r4) | ||
85 | : "1" (INTEVT) | ||
86 | : "memory" | ||
87 | ); | ||
88 | #endif | ||
89 | |||
102 | irq = irq_demux(irq); | 90 | irq = irq_demux(irq); |
103 | __do_IRQ(irq, ®s); | 91 | __do_IRQ(irq, ®s); |
104 | irq_exit(); | 92 | irq_exit(); |
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c new file mode 100644 index 000000000000..43546525f28f --- /dev/null +++ b/arch/sh/kernel/machine_kexec.c | |||
@@ -0,0 +1,112 @@ | |||
1 | /* | ||
2 | * machine_kexec.c - handle transition of Linux booting another kernel | ||
3 | * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com> | ||
4 | * | ||
5 | * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz | ||
6 | * LANDISK/sh4 supported by kogiidena | ||
7 | * | ||
8 | * This source code is licensed under the GNU General Public License, | ||
9 | * Version 2. See the file COPYING for more details. | ||
10 | */ | ||
11 | |||
12 | #include <linux/mm.h> | ||
13 | #include <linux/kexec.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/reboot.h> | ||
16 | #include <asm/pgtable.h> | ||
17 | #include <asm/pgalloc.h> | ||
18 | #include <asm/mmu_context.h> | ||
19 | #include <asm/io.h> | ||
20 | #include <asm/cacheflush.h> | ||
21 | |||
22 | typedef NORET_TYPE void (*relocate_new_kernel_t)( | ||
23 | unsigned long indirection_page, | ||
24 | unsigned long reboot_code_buffer, | ||
25 | unsigned long start_address, | ||
26 | unsigned long vbr_reg) ATTRIB_NORET; | ||
27 | |||
28 | const extern unsigned char relocate_new_kernel[]; | ||
29 | const extern unsigned int relocate_new_kernel_size; | ||
30 | extern void *gdb_vbr_vector; | ||
31 | |||
32 | /* | ||
33 | * Provide a dummy crash_notes definition while crash dump arrives to ppc. | ||
34 | * This prevents breakage of crash_notes attribute in kernel/ksysfs.c. | ||
35 | */ | ||
36 | void *crash_notes = NULL; | ||
37 | |||
38 | void machine_shutdown(void) | ||
39 | { | ||
40 | } | ||
41 | |||
42 | void machine_crash_shutdown(struct pt_regs *regs) | ||
43 | { | ||
44 | } | ||
45 | |||
46 | /* | ||
47 | * Do what every setup is needed on image and the | ||
48 | * reboot code buffer to allow us to avoid allocations | ||
49 | * later. | ||
50 | */ | ||
51 | int machine_kexec_prepare(struct kimage *image) | ||
52 | { | ||
53 | return 0; | ||
54 | } | ||
55 | |||
56 | void machine_kexec_cleanup(struct kimage *image) | ||
57 | { | ||
58 | } | ||
59 | |||
60 | static void kexec_info(struct kimage *image) | ||
61 | { | ||
62 | int i; | ||
63 | printk("kexec information\n"); | ||
64 | for (i = 0; i < image->nr_segments; i++) { | ||
65 | printk(" segment[%d]: 0x%08x - 0x%08x (0x%08x)\n", | ||
66 | i, | ||
67 | (unsigned int)image->segment[i].mem, | ||
68 | (unsigned int)image->segment[i].mem + image->segment[i].memsz, | ||
69 | (unsigned int)image->segment[i].memsz); | ||
70 | } | ||
71 | printk(" start : 0x%08x\n\n", (unsigned int)image->start); | ||
72 | } | ||
73 | |||
74 | |||
75 | /* | ||
76 | * Do not allocate memory (or fail in any way) in machine_kexec(). | ||
77 | * We are past the point of no return, committed to rebooting now. | ||
78 | */ | ||
79 | NORET_TYPE void machine_kexec(struct kimage *image) | ||
80 | { | ||
81 | |||
82 | unsigned long page_list; | ||
83 | unsigned long reboot_code_buffer; | ||
84 | unsigned long vbr_reg; | ||
85 | relocate_new_kernel_t rnk; | ||
86 | |||
87 | #if defined(CONFIG_SH_STANDARD_BIOS) | ||
88 | vbr_reg = ((unsigned long )gdb_vbr_vector) - 0x100; | ||
89 | #else | ||
90 | vbr_reg = 0x80000000; // dummy | ||
91 | #endif | ||
92 | /* Interrupts aren't acceptable while we reboot */ | ||
93 | local_irq_disable(); | ||
94 | |||
95 | page_list = image->head; | ||
96 | |||
97 | /* we need both effective and real address here */ | ||
98 | reboot_code_buffer = | ||
99 | (unsigned long)page_address(image->control_code_page); | ||
100 | |||
101 | /* copy our kernel relocation code to the control code page */ | ||
102 | memcpy((void *)reboot_code_buffer, relocate_new_kernel, | ||
103 | relocate_new_kernel_size); | ||
104 | |||
105 | kexec_info(image); | ||
106 | flush_cache_all(); | ||
107 | |||
108 | /* now call it */ | ||
109 | rnk = (relocate_new_kernel_t) reboot_code_buffer; | ||
110 | (*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg); | ||
111 | } | ||
112 | |||
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index aac15e42d03b..a4dc2b532e10 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c | |||
@@ -71,6 +71,16 @@ void cpu_idle(void) | |||
71 | 71 | ||
72 | void machine_restart(char * __unused) | 72 | void machine_restart(char * __unused) |
73 | { | 73 | { |
74 | |||
75 | #ifdef CONFIG_KEXEC | ||
76 | struct kimage *image; | ||
77 | image = xchg(&kexec_image, 0); | ||
78 | if (image) { | ||
79 | machine_shutdown(); | ||
80 | machine_kexec(image); | ||
81 | } | ||
82 | #endif | ||
83 | |||
74 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ | 84 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ |
75 | asm volatile("ldc %0, sr\n\t" | 85 | asm volatile("ldc %0, sr\n\t" |
76 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); | 86 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); |
diff --git a/arch/sh/kernel/relocate_kernel.S b/arch/sh/kernel/relocate_kernel.S new file mode 100644 index 000000000000..b0695cffec6e --- /dev/null +++ b/arch/sh/kernel/relocate_kernel.S | |||
@@ -0,0 +1,102 @@ | |||
1 | /* | ||
2 | * relocate_kernel.S - put the kernel image in place to boot | ||
3 | * 2005.9.17 kogiidena@eggplant.ddo.jp | ||
4 | * | ||
5 | * LANDISK/sh4 is supported. Maybe, SH archtecture works well. | ||
6 | * | ||
7 | * This source code is licensed under the GNU General Public License, | ||
8 | * Version 2. See the file COPYING for more details. | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/linkage.h> | ||
13 | |||
14 | #define PAGE_SIZE 4096 /* must be same value as in <asm/page.h> */ | ||
15 | |||
16 | |||
17 | .globl relocate_new_kernel | ||
18 | relocate_new_kernel: | ||
19 | /* r4 = indirection_page */ | ||
20 | /* r5 = reboot_code_buffer */ | ||
21 | /* r6 = start_address */ | ||
22 | /* r7 = vbr_reg */ | ||
23 | |||
24 | mov.l 10f,r8 /* 4096 */ | ||
25 | mov.l 11f,r9 /* 0xa0000000 */ | ||
26 | |||
27 | /* stack setting */ | ||
28 | add r8,r5 | ||
29 | mov r5,r15 | ||
30 | |||
31 | bra 1f | ||
32 | mov r4,r0 /* cmd = indirection_page */ | ||
33 | 0: | ||
34 | mov.l @r4+,r0 /* cmd = *ind++ */ | ||
35 | |||
36 | 1: /* addr = (cmd | 0xa0000000) & 0xfffffff0 */ | ||
37 | mov r0,r2 | ||
38 | or r9,r2 | ||
39 | mov #-16,r1 | ||
40 | and r1,r2 | ||
41 | |||
42 | /* if(cmd & IND_DESTINATION) dst = addr */ | ||
43 | tst #1,r0 | ||
44 | bt 2f | ||
45 | bra 0b | ||
46 | mov r2,r5 | ||
47 | |||
48 | 2: /* else if(cmd & IND_INDIRECTION) ind = addr */ | ||
49 | tst #2,r0 | ||
50 | bt 3f | ||
51 | bra 0b | ||
52 | mov r2,r4 | ||
53 | |||
54 | 3: /* else if(cmd & IND_DONE) goto 6 */ | ||
55 | tst #4,r0 | ||
56 | bt 4f | ||
57 | bra 6f | ||
58 | nop | ||
59 | |||
60 | 4: /* else if(cmd & IND_SOURCE) memcpy(dst,addr,PAGE_SIZE) */ | ||
61 | tst #8,r0 | ||
62 | bt 0b | ||
63 | |||
64 | mov r8,r3 | ||
65 | shlr2 r3 | ||
66 | shlr2 r3 | ||
67 | 5: | ||
68 | dt r3 | ||
69 | mov.l @r2+,r1 /* 16n+0 */ | ||
70 | mov.l r1,@r5 | ||
71 | add #4,r5 | ||
72 | mov.l @r2+,r1 /* 16n+4 */ | ||
73 | mov.l r1,@r5 | ||
74 | add #4,r5 | ||
75 | mov.l @r2+,r1 /* 16n+8 */ | ||
76 | mov.l r1,@r5 | ||
77 | add #4,r5 | ||
78 | mov.l @r2+,r1 /* 16n+12 */ | ||
79 | mov.l r1,@r5 | ||
80 | add #4,r5 | ||
81 | bf 5b | ||
82 | |||
83 | bra 0b | ||
84 | nop | ||
85 | 6: | ||
86 | #ifdef CONFIG_SH_STANDARD_BIOS | ||
87 | ldc r7, vbr | ||
88 | #endif | ||
89 | jmp @r6 | ||
90 | nop | ||
91 | |||
92 | .align 2 | ||
93 | 10: | ||
94 | .long PAGE_SIZE | ||
95 | 11: | ||
96 | .long 0xa0000000 | ||
97 | |||
98 | relocate_new_kernel_end: | ||
99 | |||
100 | .globl relocate_new_kernel_size | ||
101 | relocate_new_kernel_size: | ||
102 | .long relocate_new_kernel_end - relocate_new_kernel | ||
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 671b876416bf..314a275c04e0 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | 4 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka |
5 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | 5 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> |
6 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | 6 | * Copyright (C) 2002, 2003, 2004, 2005 Paul Mundt |
7 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | 7 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> |
8 | * | 8 | * |
9 | * Some code taken from i386 version. | 9 | * Some code taken from i386 version. |
@@ -11,50 +11,21 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/config.h> | 13 | #include <linux/config.h> |
14 | #include <linux/errno.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/sched.h> | ||
17 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
18 | #include <linux/param.h> | 15 | #include <linux/module.h> |
19 | #include <linux/string.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/time.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/init.h> | 16 | #include <linux/init.h> |
25 | #include <linux/smp.h> | ||
26 | #include <linux/profile.h> | 17 | #include <linux/profile.h> |
27 | 18 | #include <asm/clock.h> | |
28 | #include <asm/processor.h> | ||
29 | #include <asm/uaccess.h> | ||
30 | #include <asm/io.h> | ||
31 | #include <asm/irq.h> | ||
32 | #include <asm/delay.h> | ||
33 | #include <asm/machvec.h> | ||
34 | #include <asm/rtc.h> | 19 | #include <asm/rtc.h> |
35 | #include <asm/freq.h> | 20 | #include <asm/timer.h> |
36 | #include <asm/cpu/timer.h> | ||
37 | #ifdef CONFIG_SH_KGDB | ||
38 | #include <asm/kgdb.h> | 21 | #include <asm/kgdb.h> |
39 | #endif | ||
40 | |||
41 | #include <linux/timex.h> | ||
42 | #include <linux/irq.h> | ||
43 | |||
44 | #define TMU_TOCR_INIT 0x00 | ||
45 | #define TMU0_TCR_INIT 0x0020 | ||
46 | #define TMU_TSTR_INIT 1 | ||
47 | |||
48 | #define TMU0_TCR_CALIB 0x0000 | ||
49 | |||
50 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | ||
51 | #define CLOCKGEN_MEMCLKCR 0xbb040038 | ||
52 | #define MEMCLKCR_RATIO_MASK 0x7 | ||
53 | #endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */ | ||
54 | 22 | ||
55 | extern unsigned long wall_jiffies; | 23 | extern unsigned long wall_jiffies; |
56 | #define TICK_SIZE (tick_nsec / 1000) | 24 | struct sys_timer *sys_timer; |
57 | DEFINE_SPINLOCK(tmu0_lock); | 25 | |
26 | /* Move this somewhere more sensible.. */ | ||
27 | DEFINE_SPINLOCK(rtc_lock); | ||
28 | EXPORT_SYMBOL(rtc_lock); | ||
58 | 29 | ||
59 | /* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want | 30 | /* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want |
60 | * these routines anywhere... */ | 31 | * these routines anywhere... */ |
@@ -66,98 +37,14 @@ void (*rtc_get_time)(struct timespec *); | |||
66 | int (*rtc_set_time)(const time_t); | 37 | int (*rtc_set_time)(const time_t); |
67 | #endif | 38 | #endif |
68 | 39 | ||
69 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
70 | static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 }; | ||
71 | #endif | ||
72 | #if defined(CONFIG_CPU_SH3) | ||
73 | static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
74 | static int stc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 }; | ||
75 | #define bfc_divisors stc_multipliers | ||
76 | #define bfc_values stc_values | ||
77 | static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 }; | ||
78 | static int ifc_values[] = { 0, 1, 4, 2, 0, 0, 0, 0 }; | ||
79 | static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; | ||
80 | static int pfc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 }; | ||
81 | #elif defined(CONFIG_CPU_SH4) | ||
82 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) | ||
83 | static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 }; | ||
84 | static int ifc_values[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; | ||
85 | #define bfc_divisors ifc_divisors /* Same */ | ||
86 | #define bfc_values ifc_values | ||
87 | #define pfc_divisors ifc_divisors /* Same */ | ||
88 | #define pfc_values ifc_values | ||
89 | #else | ||
90 | static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 }; | ||
91 | static int ifc_values[] = { 0, 1, 2, 3, 0, 4, 0, 5 }; | ||
92 | #define bfc_divisors ifc_divisors /* Same */ | ||
93 | #define bfc_values ifc_values | ||
94 | static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 }; | ||
95 | static int pfc_values[] = { 0, 0, 1, 2, 0, 3, 0, 4 }; | ||
96 | #endif | ||
97 | #else | ||
98 | #error "Unknown ifc/bfc/pfc/stc values for this processor" | ||
99 | #endif | ||
100 | |||
101 | /* | 40 | /* |
102 | * Scheduler clock - returns current time in nanosec units. | 41 | * Scheduler clock - returns current time in nanosec units. |
103 | */ | 42 | */ |
104 | unsigned long long sched_clock(void) | 43 | unsigned long long __attribute__ ((weak)) sched_clock(void) |
105 | { | 44 | { |
106 | return (unsigned long long)jiffies * (1000000000 / HZ); | 45 | return (unsigned long long)jiffies * (1000000000 / HZ); |
107 | } | 46 | } |
108 | 47 | ||
109 | static unsigned long do_gettimeoffset(void) | ||
110 | { | ||
111 | int count; | ||
112 | unsigned long flags; | ||
113 | |||
114 | static int count_p = 0x7fffffff; /* for the first call after boot */ | ||
115 | static unsigned long jiffies_p = 0; | ||
116 | |||
117 | /* | ||
118 | * cache volatile jiffies temporarily; we have IRQs turned off. | ||
119 | */ | ||
120 | unsigned long jiffies_t; | ||
121 | |||
122 | spin_lock_irqsave(&tmu0_lock, flags); | ||
123 | /* timer count may underflow right here */ | ||
124 | count = ctrl_inl(TMU0_TCNT); /* read the latched count */ | ||
125 | |||
126 | jiffies_t = jiffies; | ||
127 | |||
128 | /* | ||
129 | * avoiding timer inconsistencies (they are rare, but they happen)... | ||
130 | * there is one kind of problem that must be avoided here: | ||
131 | * 1. the timer counter underflows | ||
132 | */ | ||
133 | |||
134 | if( jiffies_t == jiffies_p ) { | ||
135 | if( count > count_p ) { | ||
136 | /* the nutcase */ | ||
137 | |||
138 | if(ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */ | ||
139 | /* | ||
140 | * We cannot detect lost timer interrupts ... | ||
141 | * well, that's why we call them lost, don't we? :) | ||
142 | * [hmm, on the Pentium and Alpha we can ... sort of] | ||
143 | */ | ||
144 | count -= LATCH; | ||
145 | } else { | ||
146 | printk("do_slow_gettimeoffset(): hardware timer problem?\n"); | ||
147 | } | ||
148 | } | ||
149 | } else | ||
150 | jiffies_p = jiffies_t; | ||
151 | |||
152 | count_p = count; | ||
153 | spin_unlock_irqrestore(&tmu0_lock, flags); | ||
154 | |||
155 | count = ((LATCH-1) - count) * TICK_SIZE; | ||
156 | count = (count + LATCH/2) / LATCH; | ||
157 | |||
158 | return count; | ||
159 | } | ||
160 | |||
161 | void do_gettimeofday(struct timeval *tv) | 48 | void do_gettimeofday(struct timeval *tv) |
162 | { | 49 | { |
163 | unsigned long seq; | 50 | unsigned long seq; |
@@ -166,7 +53,7 @@ void do_gettimeofday(struct timeval *tv) | |||
166 | 53 | ||
167 | do { | 54 | do { |
168 | seq = read_seqbegin(&xtime_lock); | 55 | seq = read_seqbegin(&xtime_lock); |
169 | usec = do_gettimeoffset(); | 56 | usec = get_timer_offset(); |
170 | 57 | ||
171 | lost = jiffies - wall_jiffies; | 58 | lost = jiffies - wall_jiffies; |
172 | if (lost) | 59 | if (lost) |
@@ -202,7 +89,7 @@ int do_settimeofday(struct timespec *tv) | |||
202 | * wall time. Discover what correction gettimeofday() would have | 89 | * wall time. Discover what correction gettimeofday() would have |
203 | * made, and then undo it! | 90 | * made, and then undo it! |
204 | */ | 91 | */ |
205 | nsec -= 1000 * (do_gettimeoffset() + | 92 | nsec -= 1000 * (get_timer_offset() + |
206 | (jiffies - wall_jiffies) * (1000000 / HZ)); | 93 | (jiffies - wall_jiffies) * (1000000 / HZ)); |
207 | 94 | ||
208 | wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); | 95 | wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); |
@@ -224,10 +111,10 @@ EXPORT_SYMBOL(do_settimeofday); | |||
224 | static long last_rtc_update; | 111 | static long last_rtc_update; |
225 | 112 | ||
226 | /* | 113 | /* |
227 | * timer_interrupt() needs to keep up the real-time clock, | 114 | * handle_timer_tick() needs to keep up the real-time clock, |
228 | * as well as call the "do_timer()" routine every clocktick | 115 | * as well as call the "do_timer()" routine every clocktick |
229 | */ | 116 | */ |
230 | static inline void do_timer_interrupt(int irq, struct pt_regs *regs) | 117 | void handle_timer_tick(struct pt_regs *regs) |
231 | { | 118 | { |
232 | do_timer(regs); | 119 | do_timer(regs); |
233 | #ifndef CONFIG_SMP | 120 | #ifndef CONFIG_SMP |
@@ -252,337 +139,35 @@ static inline void do_timer_interrupt(int irq, struct pt_regs *regs) | |||
252 | if (rtc_set_time(xtime.tv_sec) == 0) | 139 | if (rtc_set_time(xtime.tv_sec) == 0) |
253 | last_rtc_update = xtime.tv_sec; | 140 | last_rtc_update = xtime.tv_sec; |
254 | else | 141 | else |
255 | last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ | 142 | /* do it again in 60s */ |
143 | last_rtc_update = xtime.tv_sec - 600; | ||
256 | } | 144 | } |
257 | } | 145 | } |
258 | 146 | ||
259 | /* | 147 | static struct sysdev_class timer_sysclass = { |
260 | * This is the same as the above, except we _also_ save the current | 148 | set_kset_name("timer"), |
261 | * Time Stamp Counter value at the time of the timer interrupt, so that | ||
262 | * we later on can estimate the time of day more exactly. | ||
263 | */ | ||
264 | static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
265 | { | ||
266 | unsigned long timer_status; | ||
267 | |||
268 | /* Clear UNF bit */ | ||
269 | timer_status = ctrl_inw(TMU0_TCR); | ||
270 | timer_status &= ~0x100; | ||
271 | ctrl_outw(timer_status, TMU0_TCR); | ||
272 | |||
273 | /* | ||
274 | * Here we are in the timer irq handler. We just have irqs locally | ||
275 | * disabled but we don't know if the timer_bh is running on the other | ||
276 | * CPU. We need to avoid to SMP race with it. NOTE: we don' t need | ||
277 | * the irq version of write_lock because as just said we have irq | ||
278 | * locally disabled. -arca | ||
279 | */ | ||
280 | write_seqlock(&xtime_lock); | ||
281 | do_timer_interrupt(irq, regs); | ||
282 | write_sequnlock(&xtime_lock); | ||
283 | |||
284 | return IRQ_HANDLED; | ||
285 | } | ||
286 | |||
287 | /* | ||
288 | * Hah! We'll see if this works (switching from usecs to nsecs). | ||
289 | */ | ||
290 | static unsigned int __init get_timer_frequency(void) | ||
291 | { | ||
292 | u32 freq; | ||
293 | struct timespec ts1, ts2; | ||
294 | unsigned long diff_nsec; | ||
295 | unsigned long factor; | ||
296 | |||
297 | /* Setup the timer: We don't want to generate interrupts, just | ||
298 | * have it count down at its natural rate. | ||
299 | */ | ||
300 | ctrl_outb(0, TMU_TSTR); | ||
301 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
302 | ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); | ||
303 | #endif | ||
304 | ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); | ||
305 | ctrl_outl(0xffffffff, TMU0_TCOR); | ||
306 | ctrl_outl(0xffffffff, TMU0_TCNT); | ||
307 | |||
308 | rtc_get_time(&ts2); | ||
309 | |||
310 | do { | ||
311 | rtc_get_time(&ts1); | ||
312 | } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); | ||
313 | |||
314 | /* actually start the timer */ | ||
315 | ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); | ||
316 | |||
317 | do { | ||
318 | rtc_get_time(&ts2); | ||
319 | } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); | ||
320 | |||
321 | freq = 0xffffffff - ctrl_inl(TMU0_TCNT); | ||
322 | if (ts2.tv_nsec < ts1.tv_nsec) { | ||
323 | ts2.tv_nsec += 1000000000; | ||
324 | ts2.tv_sec--; | ||
325 | } | ||
326 | |||
327 | diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec); | ||
328 | |||
329 | /* this should work well if the RTC has a precision of n Hz, where | ||
330 | * n is an integer. I don't think we have to worry about the other | ||
331 | * cases. */ | ||
332 | factor = (1000000000 + diff_nsec/2) / diff_nsec; | ||
333 | |||
334 | if (factor * diff_nsec > 1100000000 || | ||
335 | factor * diff_nsec < 900000000) | ||
336 | panic("weird RTC (diff_nsec %ld)", diff_nsec); | ||
337 | |||
338 | return freq * factor; | ||
339 | } | ||
340 | |||
341 | void (*board_time_init)(void); | ||
342 | void (*board_timer_setup)(struct irqaction *irq); | ||
343 | |||
344 | static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ; | ||
345 | |||
346 | static int __init sh_pclk_setup(char *str) | ||
347 | { | ||
348 | unsigned int freq; | ||
349 | |||
350 | if (get_option(&str, &freq)) | ||
351 | sh_pclk_freq = freq; | ||
352 | |||
353 | return 1; | ||
354 | } | ||
355 | __setup("sh_pclk=", sh_pclk_setup); | ||
356 | |||
357 | static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; | ||
358 | |||
359 | void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsigned int *pfc) | ||
360 | { | ||
361 | unsigned int frqcr = ctrl_inw(FRQCR); | ||
362 | |||
363 | #if defined(CONFIG_CPU_SH3) | ||
364 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
365 | *ifc = md_table[((frqcr & 0x0070) >> 4)]; | ||
366 | *bfc = md_table[((frqcr & 0x0700) >> 8)]; | ||
367 | *pfc = md_table[frqcr & 0x0007]; | ||
368 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
369 | *bfc = stc_multipliers[(frqcr & 0x0300) >> 8]; | ||
370 | *ifc = ifc_divisors[(frqcr & 0x0030) >> 4]; | ||
371 | *pfc = pfc_divisors[frqcr & 0x0003]; | ||
372 | #else | ||
373 | unsigned int tmp; | ||
374 | |||
375 | tmp = (frqcr & 0x8000) >> 13; | ||
376 | tmp |= (frqcr & 0x0030) >> 4; | ||
377 | *bfc = stc_multipliers[tmp]; | ||
378 | tmp = (frqcr & 0x4000) >> 12; | ||
379 | tmp |= (frqcr & 0x000c) >> 2; | ||
380 | *ifc = ifc_divisors[tmp]; | ||
381 | tmp = (frqcr & 0x2000) >> 11; | ||
382 | tmp |= frqcr & 0x0003; | ||
383 | *pfc = pfc_divisors[tmp]; | ||
384 | #endif | ||
385 | #elif defined(CONFIG_CPU_SH4) | ||
386 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) | ||
387 | *ifc = ifc_divisors[(frqcr>> 20) & 0x0007]; | ||
388 | *bfc = bfc_divisors[(frqcr>> 12) & 0x0007]; | ||
389 | *pfc = pfc_divisors[frqcr & 0x0007]; | ||
390 | #else | ||
391 | *ifc = ifc_divisors[(frqcr >> 6) & 0x0007]; | ||
392 | *bfc = bfc_divisors[(frqcr >> 3) & 0x0007]; | ||
393 | *pfc = pfc_divisors[frqcr & 0x0007]; | ||
394 | #endif | ||
395 | #endif | ||
396 | } | ||
397 | |||
398 | /* | ||
399 | * This bit of ugliness builds up accessor routines to get at both | ||
400 | * the divisors and the physical values. | ||
401 | */ | ||
402 | #define _FREQ_TABLE(x) \ | ||
403 | unsigned int get_##x##_divisor(unsigned int value) \ | ||
404 | { return x##_divisors[value]; } \ | ||
405 | \ | ||
406 | unsigned int get_##x##_value(unsigned int divisor) \ | ||
407 | { return x##_values[(divisor - 1)]; } | ||
408 | |||
409 | _FREQ_TABLE(ifc); | ||
410 | _FREQ_TABLE(bfc); | ||
411 | _FREQ_TABLE(pfc); | ||
412 | |||
413 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | ||
414 | |||
415 | /* | ||
416 | * The ST40 divisors are totally different so we set the cpu data | ||
417 | * clocks using a different algorithm | ||
418 | * | ||
419 | * I've just plugged this from the 2.4 code | ||
420 | * - Alex Bennee <kernel-hacker@bennee.com> | ||
421 | */ | ||
422 | #define CCN_PVR_CHIP_SHIFT 24 | ||
423 | #define CCN_PVR_CHIP_MASK 0xff | ||
424 | #define CCN_PVR_CHIP_ST40STB1 0x4 | ||
425 | |||
426 | |||
427 | struct frqcr_data { | ||
428 | unsigned short frqcr; | ||
429 | |||
430 | struct { | ||
431 | unsigned char multiplier; | ||
432 | unsigned char divisor; | ||
433 | } factor[3]; | ||
434 | }; | ||
435 | |||
436 | static struct frqcr_data st40_frqcr_table[] = { | ||
437 | { 0x000, {{1,1}, {1,1}, {1,2}}}, | ||
438 | { 0x002, {{1,1}, {1,1}, {1,4}}}, | ||
439 | { 0x004, {{1,1}, {1,1}, {1,8}}}, | ||
440 | { 0x008, {{1,1}, {1,2}, {1,2}}}, | ||
441 | { 0x00A, {{1,1}, {1,2}, {1,4}}}, | ||
442 | { 0x00C, {{1,1}, {1,2}, {1,8}}}, | ||
443 | { 0x011, {{1,1}, {2,3}, {1,6}}}, | ||
444 | { 0x013, {{1,1}, {2,3}, {1,3}}}, | ||
445 | { 0x01A, {{1,1}, {1,2}, {1,4}}}, | ||
446 | { 0x01C, {{1,1}, {1,2}, {1,8}}}, | ||
447 | { 0x023, {{1,1}, {2,3}, {1,3}}}, | ||
448 | { 0x02C, {{1,1}, {1,2}, {1,8}}}, | ||
449 | { 0x048, {{1,2}, {1,2}, {1,4}}}, | ||
450 | { 0x04A, {{1,2}, {1,2}, {1,6}}}, | ||
451 | { 0x04C, {{1,2}, {1,2}, {1,8}}}, | ||
452 | { 0x05A, {{1,2}, {1,3}, {1,6}}}, | ||
453 | { 0x05C, {{1,2}, {1,3}, {1,6}}}, | ||
454 | { 0x063, {{1,2}, {1,4}, {1,4}}}, | ||
455 | { 0x06C, {{1,2}, {1,4}, {1,8}}}, | ||
456 | { 0x091, {{1,3}, {1,3}, {1,6}}}, | ||
457 | { 0x093, {{1,3}, {1,3}, {1,6}}}, | ||
458 | { 0x0A3, {{1,3}, {1,6}, {1,6}}}, | ||
459 | { 0x0DA, {{1,4}, {1,4}, {1,8}}}, | ||
460 | { 0x0DC, {{1,4}, {1,4}, {1,8}}}, | ||
461 | { 0x0EC, {{1,4}, {1,8}, {1,8}}}, | ||
462 | { 0x123, {{1,4}, {1,4}, {1,8}}}, | ||
463 | { 0x16C, {{1,4}, {1,8}, {1,8}}}, | ||
464 | }; | 149 | }; |
465 | 150 | ||
466 | struct memclk_data { | 151 | static int __init timer_init_sysfs(void) |
467 | unsigned char multiplier; | ||
468 | unsigned char divisor; | ||
469 | }; | ||
470 | |||
471 | static struct memclk_data st40_memclk_table[8] = { | ||
472 | {1,1}, // 000 | ||
473 | {1,2}, // 001 | ||
474 | {1,3}, // 010 | ||
475 | {2,3}, // 011 | ||
476 | {1,4}, // 100 | ||
477 | {1,6}, // 101 | ||
478 | {1,8}, // 110 | ||
479 | {1,8} // 111 | ||
480 | }; | ||
481 | |||
482 | static void st40_specific_time_init(unsigned int module_clock, unsigned short frqcr) | ||
483 | { | 152 | { |
484 | unsigned int cpu_clock, master_clock, bus_clock, memory_clock; | 153 | int ret = sysdev_class_register(&timer_sysclass); |
485 | struct frqcr_data *d; | 154 | if (ret != 0) |
486 | int a; | 155 | return ret; |
487 | unsigned long memclkcr; | ||
488 | struct memclk_data *e; | ||
489 | 156 | ||
490 | for (a = 0; a < ARRAY_SIZE(st40_frqcr_table); a++) { | 157 | sys_timer->dev.cls = &timer_sysclass; |
491 | d = &st40_frqcr_table[a]; | 158 | return sysdev_register(&sys_timer->dev); |
492 | 159 | } | |
493 | if (d->frqcr == (frqcr & 0x1ff)) | ||
494 | break; | ||
495 | } | ||
496 | 160 | ||
497 | if (a == ARRAY_SIZE(st40_frqcr_table)) { | 161 | device_initcall(timer_init_sysfs); |
498 | d = st40_frqcr_table; | ||
499 | 162 | ||
500 | printk("ERROR: Unrecognised FRQCR value (0x%x), " | 163 | void (*board_time_init)(void); |
501 | "using default multipliers\n", frqcr); | ||
502 | } | ||
503 | |||
504 | memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR); | ||
505 | e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK]; | ||
506 | |||
507 | printk(KERN_INFO "Clock multipliers: CPU: %d/%d Bus: %d/%d " | ||
508 | "Mem: %d/%d Periph: %d/%d\n", | ||
509 | d->factor[0].multiplier, d->factor[0].divisor, | ||
510 | d->factor[1].multiplier, d->factor[1].divisor, | ||
511 | e->multiplier, e->divisor, | ||
512 | d->factor[2].multiplier, d->factor[2].divisor); | ||
513 | |||
514 | master_clock = module_clock * d->factor[2].divisor | ||
515 | / d->factor[2].multiplier; | ||
516 | bus_clock = master_clock * d->factor[1].multiplier | ||
517 | / d->factor[1].divisor; | ||
518 | memory_clock = master_clock * e->multiplier | ||
519 | / e->divisor; | ||
520 | cpu_clock = master_clock * d->factor[0].multiplier | ||
521 | / d->factor[0].divisor; | ||
522 | |||
523 | current_cpu_data.cpu_clock = cpu_clock; | ||
524 | current_cpu_data.master_clock = master_clock; | ||
525 | current_cpu_data.bus_clock = bus_clock; | ||
526 | current_cpu_data.memory_clock = memory_clock; | ||
527 | current_cpu_data.module_clock = module_clock; | ||
528 | } | ||
529 | #endif | ||
530 | 164 | ||
531 | void __init time_init(void) | 165 | void __init time_init(void) |
532 | { | 166 | { |
533 | unsigned int timer_freq = 0; | ||
534 | unsigned int ifc, pfc, bfc; | ||
535 | unsigned long interval; | ||
536 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | ||
537 | unsigned long pvr; | ||
538 | unsigned short frqcr; | ||
539 | #endif | ||
540 | |||
541 | if (board_time_init) | 167 | if (board_time_init) |
542 | board_time_init(); | 168 | board_time_init(); |
543 | 169 | ||
544 | /* | 170 | clk_init(); |
545 | * If we don't have an RTC (such as with the SH7300), don't attempt to | ||
546 | * probe the timer frequency. Rely on an either hardcoded peripheral | ||
547 | * clock value, or on the sh_pclk command line option. Note that we | ||
548 | * still need to have CONFIG_SH_PCLK_FREQ set in order for things like | ||
549 | * CLOCK_TICK_RATE to be sane. | ||
550 | */ | ||
551 | current_cpu_data.module_clock = sh_pclk_freq; | ||
552 | |||
553 | #ifdef CONFIG_SH_PCLK_CALC | ||
554 | /* XXX: Switch this over to a more generic test. */ | ||
555 | { | ||
556 | unsigned int freq; | ||
557 | |||
558 | /* | ||
559 | * If we've specified a peripheral clock frequency, and we have | ||
560 | * an RTC, compare it against the autodetected value. Complain | ||
561 | * if there's a mismatch. | ||
562 | */ | ||
563 | timer_freq = get_timer_frequency(); | ||
564 | freq = timer_freq * 4; | ||
565 | |||
566 | if (sh_pclk_freq && (sh_pclk_freq/100*99 > freq || sh_pclk_freq/100*101 < freq)) { | ||
567 | printk(KERN_NOTICE "Calculated peripheral clock value " | ||
568 | "%d differs from sh_pclk value %d, fixing..\n", | ||
569 | freq, sh_pclk_freq); | ||
570 | current_cpu_data.module_clock = freq; | ||
571 | } | ||
572 | } | ||
573 | #endif | ||
574 | |||
575 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | ||
576 | /* XXX: Update ST40 code to use board_time_init() */ | ||
577 | pvr = ctrl_inl(CCN_PVR); | ||
578 | frqcr = ctrl_inw(FRQCR); | ||
579 | printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr); | ||
580 | |||
581 | if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1) | ||
582 | st40_specific_time_init(current_cpu_data.module_clock, frqcr); | ||
583 | else | ||
584 | #endif | ||
585 | get_current_frequency_divisors(&ifc, &bfc, &pfc); | ||
586 | 171 | ||
587 | if (rtc_get_time) { | 172 | if (rtc_get_time) { |
588 | rtc_get_time(&xtime); | 173 | rtc_get_time(&xtime); |
@@ -594,51 +179,12 @@ void __init time_init(void) | |||
594 | set_normalized_timespec(&wall_to_monotonic, | 179 | set_normalized_timespec(&wall_to_monotonic, |
595 | -xtime.tv_sec, -xtime.tv_nsec); | 180 | -xtime.tv_sec, -xtime.tv_nsec); |
596 | 181 | ||
597 | if (board_timer_setup) { | ||
598 | board_timer_setup(&irq0); | ||
599 | } else { | ||
600 | setup_irq(TIMER_IRQ, &irq0); | ||
601 | } | ||
602 | |||
603 | /* | 182 | /* |
604 | * for ST40 chips the current_cpu_data should already be set | 183 | * Find the timer to use as the system timer, it will be |
605 | * so not having valid pfc/bfc/ifc shouldn't be a problem | 184 | * initialized for us. |
606 | */ | 185 | */ |
607 | if (!current_cpu_data.master_clock) | 186 | sys_timer = get_sys_timer(); |
608 | current_cpu_data.master_clock = current_cpu_data.module_clock * pfc; | 187 | printk(KERN_INFO "Using %s for system timer\n", sys_timer->name); |
609 | if (!current_cpu_data.bus_clock) | ||
610 | current_cpu_data.bus_clock = current_cpu_data.master_clock / bfc; | ||
611 | if (!current_cpu_data.cpu_clock) | ||
612 | current_cpu_data.cpu_clock = current_cpu_data.master_clock / ifc; | ||
613 | |||
614 | printk("CPU clock: %d.%02dMHz\n", | ||
615 | (current_cpu_data.cpu_clock / 1000000), | ||
616 | (current_cpu_data.cpu_clock % 1000000)/10000); | ||
617 | printk("Bus clock: %d.%02dMHz\n", | ||
618 | (current_cpu_data.bus_clock / 1000000), | ||
619 | (current_cpu_data.bus_clock % 1000000)/10000); | ||
620 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | ||
621 | printk("Memory clock: %d.%02dMHz\n", | ||
622 | (current_cpu_data.memory_clock / 1000000), | ||
623 | (current_cpu_data.memory_clock % 1000000)/10000); | ||
624 | #endif | ||
625 | printk("Module clock: %d.%02dMHz\n", | ||
626 | (current_cpu_data.module_clock / 1000000), | ||
627 | (current_cpu_data.module_clock % 1000000)/10000); | ||
628 | |||
629 | interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ; | ||
630 | |||
631 | printk("Interval = %ld\n", interval); | ||
632 | |||
633 | /* Start TMU0 */ | ||
634 | ctrl_outb(0, TMU_TSTR); | ||
635 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
636 | ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); | ||
637 | #endif | ||
638 | ctrl_outw(TMU0_TCR_INIT, TMU0_TCR); | ||
639 | ctrl_outl(interval, TMU0_TCOR); | ||
640 | ctrl_outl(interval, TMU0_TCNT); | ||
641 | ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); | ||
642 | 188 | ||
643 | #if defined(CONFIG_SH_KGDB) | 189 | #if defined(CONFIG_SH_KGDB) |
644 | /* | 190 | /* |
diff --git a/arch/sh/kernel/timers/Makefile b/arch/sh/kernel/timers/Makefile new file mode 100644 index 000000000000..151a6a304cec --- /dev/null +++ b/arch/sh/kernel/timers/Makefile | |||
@@ -0,0 +1,8 @@ | |||
1 | # | ||
2 | # Makefile for the various Linux/SuperH timers | ||
3 | # | ||
4 | |||
5 | obj-y := timer.o | ||
6 | |||
7 | obj-$(CONFIG_SH_TMU) += timer-tmu.o | ||
8 | |||
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c new file mode 100644 index 000000000000..96a64cb13106 --- /dev/null +++ b/arch/sh/kernel/timers/timer-tmu.c | |||
@@ -0,0 +1,229 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/timers/timer-tmu.c - TMU Timer Support | ||
3 | * | ||
4 | * Copyright (C) 2005 Paul Mundt | ||
5 | * | ||
6 | * TMU handling code hacked out of arch/sh/kernel/time.c | ||
7 | * | ||
8 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
9 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
10 | * Copyright (C) 2002, 2003, 2004 Paul Mundt | ||
11 | * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> | ||
12 | * | ||
13 | * This file is subject to the terms and conditions of the GNU General Public | ||
14 | * License. See the file "COPYING" in the main directory of this archive | ||
15 | * for more details. | ||
16 | */ | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/spinlock.h> | ||
21 | #include <linux/seqlock.h> | ||
22 | #include <asm/timer.h> | ||
23 | #include <asm/rtc.h> | ||
24 | #include <asm/io.h> | ||
25 | #include <asm/irq.h> | ||
26 | #include <asm/clock.h> | ||
27 | |||
28 | #define TMU_TOCR_INIT 0x00 | ||
29 | #define TMU0_TCR_INIT 0x0020 | ||
30 | #define TMU_TSTR_INIT 1 | ||
31 | |||
32 | #define TMU0_TCR_CALIB 0x0000 | ||
33 | |||
34 | static DEFINE_SPINLOCK(tmu0_lock); | ||
35 | |||
36 | static unsigned long tmu_timer_get_offset(void) | ||
37 | { | ||
38 | int count; | ||
39 | unsigned long flags; | ||
40 | |||
41 | static int count_p = 0x7fffffff; /* for the first call after boot */ | ||
42 | static unsigned long jiffies_p = 0; | ||
43 | |||
44 | /* | ||
45 | * cache volatile jiffies temporarily; we have IRQs turned off. | ||
46 | */ | ||
47 | unsigned long jiffies_t; | ||
48 | |||
49 | spin_lock_irqsave(&tmu0_lock, flags); | ||
50 | /* timer count may underflow right here */ | ||
51 | count = ctrl_inl(TMU0_TCNT); /* read the latched count */ | ||
52 | |||
53 | jiffies_t = jiffies; | ||
54 | |||
55 | /* | ||
56 | * avoiding timer inconsistencies (they are rare, but they happen)... | ||
57 | * there is one kind of problem that must be avoided here: | ||
58 | * 1. the timer counter underflows | ||
59 | */ | ||
60 | |||
61 | if (jiffies_t == jiffies_p) { | ||
62 | if (count > count_p) { | ||
63 | /* the nutcase */ | ||
64 | if (ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */ | ||
65 | count -= LATCH; | ||
66 | } else { | ||
67 | printk("%s (): hardware timer problem?\n", | ||
68 | __FUNCTION__); | ||
69 | } | ||
70 | } | ||
71 | } else | ||
72 | jiffies_p = jiffies_t; | ||
73 | |||
74 | count_p = count; | ||
75 | spin_unlock_irqrestore(&tmu0_lock, flags); | ||
76 | |||
77 | count = ((LATCH-1) - count) * TICK_SIZE; | ||
78 | count = (count + LATCH/2) / LATCH; | ||
79 | |||
80 | return count; | ||
81 | } | ||
82 | |||
83 | static irqreturn_t tmu_timer_interrupt(int irq, void *dev_id, | ||
84 | struct pt_regs *regs) | ||
85 | { | ||
86 | unsigned long timer_status; | ||
87 | |||
88 | /* Clear UNF bit */ | ||
89 | timer_status = ctrl_inw(TMU0_TCR); | ||
90 | timer_status &= ~0x100; | ||
91 | ctrl_outw(timer_status, TMU0_TCR); | ||
92 | |||
93 | /* | ||
94 | * Here we are in the timer irq handler. We just have irqs locally | ||
95 | * disabled but we don't know if the timer_bh is running on the other | ||
96 | * CPU. We need to avoid to SMP race with it. NOTE: we don' t need | ||
97 | * the irq version of write_lock because as just said we have irq | ||
98 | * locally disabled. -arca | ||
99 | */ | ||
100 | write_seqlock(&xtime_lock); | ||
101 | handle_timer_tick(regs); | ||
102 | write_sequnlock(&xtime_lock); | ||
103 | |||
104 | return IRQ_HANDLED; | ||
105 | } | ||
106 | |||
107 | static struct irqaction tmu_irq = { | ||
108 | .name = "timer", | ||
109 | .handler = tmu_timer_interrupt, | ||
110 | .flags = SA_INTERRUPT, | ||
111 | .mask = CPU_MASK_NONE, | ||
112 | }; | ||
113 | |||
114 | /* | ||
115 | * Hah! We'll see if this works (switching from usecs to nsecs). | ||
116 | */ | ||
117 | static unsigned long tmu_timer_get_frequency(void) | ||
118 | { | ||
119 | u32 freq; | ||
120 | struct timespec ts1, ts2; | ||
121 | unsigned long diff_nsec; | ||
122 | unsigned long factor; | ||
123 | |||
124 | /* Setup the timer: We don't want to generate interrupts, just | ||
125 | * have it count down at its natural rate. | ||
126 | */ | ||
127 | ctrl_outb(0, TMU_TSTR); | ||
128 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
129 | ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); | ||
130 | #endif | ||
131 | ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); | ||
132 | ctrl_outl(0xffffffff, TMU0_TCOR); | ||
133 | ctrl_outl(0xffffffff, TMU0_TCNT); | ||
134 | |||
135 | rtc_get_time(&ts2); | ||
136 | |||
137 | do { | ||
138 | rtc_get_time(&ts1); | ||
139 | } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); | ||
140 | |||
141 | /* actually start the timer */ | ||
142 | ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); | ||
143 | |||
144 | do { | ||
145 | rtc_get_time(&ts2); | ||
146 | } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); | ||
147 | |||
148 | freq = 0xffffffff - ctrl_inl(TMU0_TCNT); | ||
149 | if (ts2.tv_nsec < ts1.tv_nsec) { | ||
150 | ts2.tv_nsec += 1000000000; | ||
151 | ts2.tv_sec--; | ||
152 | } | ||
153 | |||
154 | diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec); | ||
155 | |||
156 | /* this should work well if the RTC has a precision of n Hz, where | ||
157 | * n is an integer. I don't think we have to worry about the other | ||
158 | * cases. */ | ||
159 | factor = (1000000000 + diff_nsec/2) / diff_nsec; | ||
160 | |||
161 | if (factor * diff_nsec > 1100000000 || | ||
162 | factor * diff_nsec < 900000000) | ||
163 | panic("weird RTC (diff_nsec %ld)", diff_nsec); | ||
164 | |||
165 | return freq * factor; | ||
166 | } | ||
167 | |||
168 | static void tmu_clk_init(struct clk *clk) | ||
169 | { | ||
170 | u8 divisor = TMU0_TCR_INIT & 0x7; | ||
171 | ctrl_outw(TMU0_TCR_INIT, TMU0_TCR); | ||
172 | clk->rate = clk->parent->rate / (4 << (divisor << 1)); | ||
173 | } | ||
174 | |||
175 | static void tmu_clk_recalc(struct clk *clk) | ||
176 | { | ||
177 | u8 divisor = ctrl_inw(TMU0_TCR) & 0x7; | ||
178 | clk->rate = clk->parent->rate / (4 << (divisor << 1)); | ||
179 | } | ||
180 | |||
181 | static struct clk_ops tmu_clk_ops = { | ||
182 | .init = tmu_clk_init, | ||
183 | .recalc = tmu_clk_recalc, | ||
184 | }; | ||
185 | |||
186 | static struct clk tmu0_clk = { | ||
187 | .name = "tmu0_clk", | ||
188 | .ops = &tmu_clk_ops, | ||
189 | }; | ||
190 | |||
191 | static int tmu_timer_init(void) | ||
192 | { | ||
193 | unsigned long interval; | ||
194 | |||
195 | setup_irq(TIMER_IRQ, &tmu_irq); | ||
196 | |||
197 | tmu0_clk.parent = clk_get("module_clk"); | ||
198 | |||
199 | /* Start TMU0 */ | ||
200 | ctrl_outb(0, TMU_TSTR); | ||
201 | #if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
202 | ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); | ||
203 | #endif | ||
204 | |||
205 | clk_register(&tmu0_clk); | ||
206 | clk_enable(&tmu0_clk); | ||
207 | |||
208 | interval = (clk_get_rate(&tmu0_clk) + HZ / 2) / HZ; | ||
209 | printk(KERN_INFO "Interval = %ld\n", interval); | ||
210 | |||
211 | ctrl_outl(interval, TMU0_TCOR); | ||
212 | ctrl_outl(interval, TMU0_TCNT); | ||
213 | |||
214 | ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); | ||
215 | |||
216 | return 0; | ||
217 | } | ||
218 | |||
219 | struct sys_timer_ops tmu_timer_ops = { | ||
220 | .init = tmu_timer_init, | ||
221 | .get_frequency = tmu_timer_get_frequency, | ||
222 | .get_offset = tmu_timer_get_offset, | ||
223 | }; | ||
224 | |||
225 | struct sys_timer tmu_timer = { | ||
226 | .name = "tmu", | ||
227 | .ops = &tmu_timer_ops, | ||
228 | }; | ||
229 | |||
diff --git a/arch/sh/kernel/timers/timer.c b/arch/sh/kernel/timers/timer.c new file mode 100644 index 000000000000..dc1f631053a8 --- /dev/null +++ b/arch/sh/kernel/timers/timer.c | |||
@@ -0,0 +1,50 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/timers/timer.c - Common timer code | ||
3 | * | ||
4 | * Copyright (C) 2005 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/timer.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <asm/timer.h> | ||
15 | |||
16 | static struct sys_timer *sys_timers[] __initdata = { | ||
17 | #ifdef CONFIG_SH_TMU | ||
18 | &tmu_timer, | ||
19 | #endif | ||
20 | NULL, | ||
21 | }; | ||
22 | |||
23 | static char timer_override[10] __initdata; | ||
24 | static int __init timer_setup(char *str) | ||
25 | { | ||
26 | if (str) | ||
27 | strlcpy(timer_override, str, sizeof(timer_override)); | ||
28 | return 1; | ||
29 | } | ||
30 | __setup("timer=", timer_setup); | ||
31 | |||
32 | struct sys_timer *get_sys_timer(void) | ||
33 | { | ||
34 | int i; | ||
35 | |||
36 | for (i = 0; i < ARRAY_SIZE(sys_timers); i++) { | ||
37 | struct sys_timer *t = sys_timers[i]; | ||
38 | |||
39 | if (unlikely(!t)) | ||
40 | break; | ||
41 | if (unlikely(timer_override[0])) | ||
42 | if ((strcmp(timer_override, t->name) != 0)) | ||
43 | continue; | ||
44 | if (likely(t->ops->init() == 0)) | ||
45 | return t; | ||
46 | } | ||
47 | |||
48 | return NULL; | ||
49 | } | ||
50 | |||
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig new file mode 100644 index 000000000000..fb586b1cf8bb --- /dev/null +++ b/arch/sh/mm/Kconfig | |||
@@ -0,0 +1,233 @@ | |||
1 | menu "Processor selection" | ||
2 | |||
3 | # | ||
4 | # Processor families | ||
5 | # | ||
6 | config CPU_SH2 | ||
7 | bool | ||
8 | select SH_WRITETHROUGH | ||
9 | |||
10 | config CPU_SH3 | ||
11 | bool | ||
12 | select CPU_HAS_INTEVT | ||
13 | select CPU_HAS_SR_RB | ||
14 | |||
15 | config CPU_SH4 | ||
16 | bool | ||
17 | select CPU_HAS_INTEVT | ||
18 | select CPU_HAS_SR_RB | ||
19 | |||
20 | config CPU_SH4A | ||
21 | bool | ||
22 | select CPU_SH4 | ||
23 | select CPU_HAS_INTC2_IRQ | ||
24 | |||
25 | config CPU_SUBTYPE_ST40 | ||
26 | bool | ||
27 | select CPU_SH4 | ||
28 | select CPU_HAS_INTC2_IRQ | ||
29 | |||
30 | # | ||
31 | # Processor subtypes | ||
32 | # | ||
33 | |||
34 | comment "SH-2 Processor Support" | ||
35 | |||
36 | config CPU_SUBTYPE_SH7604 | ||
37 | bool "Support SH7604 processor" | ||
38 | select CPU_SH2 | ||
39 | |||
40 | comment "SH-3 Processor Support" | ||
41 | |||
42 | config CPU_SUBTYPE_SH7300 | ||
43 | bool "Support SH7300 processor" | ||
44 | select CPU_SH3 | ||
45 | |||
46 | config CPU_SUBTYPE_SH7705 | ||
47 | bool "Support SH7705 processor" | ||
48 | select CPU_SH3 | ||
49 | select CPU_HAS_PINT_IRQ | ||
50 | |||
51 | config CPU_SUBTYPE_SH7707 | ||
52 | bool "Support SH7707 processor" | ||
53 | select CPU_SH3 | ||
54 | select CPU_HAS_PINT_IRQ | ||
55 | help | ||
56 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | ||
57 | |||
58 | config CPU_SUBTYPE_SH7708 | ||
59 | bool "Support SH7708 processor" | ||
60 | select CPU_SH3 | ||
61 | help | ||
62 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | ||
63 | if you have a 100 Mhz SH-3 HD6417708R CPU. | ||
64 | |||
65 | config CPU_SUBTYPE_SH7709 | ||
66 | bool "Support SH7709 processor" | ||
67 | select CPU_SH3 | ||
68 | select CPU_HAS_PINT_IRQ | ||
69 | help | ||
70 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | ||
71 | |||
72 | comment "SH-4 Processor Support" | ||
73 | |||
74 | config CPU_SUBTYPE_SH7750 | ||
75 | bool "Support SH7750 processor" | ||
76 | select CPU_SH4 | ||
77 | help | ||
78 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | ||
79 | |||
80 | config CPU_SUBTYPE_SH7091 | ||
81 | bool "Support SH7091 processor" | ||
82 | select CPU_SH4 | ||
83 | select CPU_SUBTYPE_SH7750 | ||
84 | help | ||
85 | Select SH7091 if you have an SH-4 based Sega device (such as | ||
86 | the Dreamcast, Naomi, and Naomi 2). | ||
87 | |||
88 | config CPU_SUBTYPE_SH7750R | ||
89 | bool "Support SH7750R processor" | ||
90 | select CPU_SH4 | ||
91 | select CPU_SUBTYPE_SH7750 | ||
92 | |||
93 | config CPU_SUBTYPE_SH7750S | ||
94 | bool "Support SH7750S processor" | ||
95 | select CPU_SH4 | ||
96 | select CPU_SUBTYPE_SH7750 | ||
97 | |||
98 | config CPU_SUBTYPE_SH7751 | ||
99 | bool "Support SH7751 processor" | ||
100 | select CPU_SH4 | ||
101 | help | ||
102 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | ||
103 | or if you have a HD6417751R CPU. | ||
104 | |||
105 | config CPU_SUBTYPE_SH7751R | ||
106 | bool "Support SH7751R processor" | ||
107 | select CPU_SH4 | ||
108 | select CPU_SUBTYPE_SH7751 | ||
109 | |||
110 | config CPU_SUBTYPE_SH7760 | ||
111 | bool "Support SH7760 processor" | ||
112 | select CPU_SH4 | ||
113 | select CPU_HAS_INTC2_IRQ | ||
114 | |||
115 | config CPU_SUBTYPE_SH4_202 | ||
116 | bool "Support SH4-202 processor" | ||
117 | select CPU_SH4 | ||
118 | |||
119 | comment "ST40 Processor Support" | ||
120 | |||
121 | config CPU_SUBTYPE_ST40STB1 | ||
122 | bool "Support ST40STB1/ST40RA processors" | ||
123 | select CPU_SUBTYPE_ST40 | ||
124 | help | ||
125 | Select ST40STB1 if you have a ST40RA CPU. | ||
126 | This was previously called the ST40STB1, hence the option name. | ||
127 | |||
128 | config CPU_SUBTYPE_ST40GX1 | ||
129 | bool "Support ST40GX1 processor" | ||
130 | select CPU_SUBTYPE_ST40 | ||
131 | help | ||
132 | Select ST40GX1 if you have a ST40GX1 CPU. | ||
133 | |||
134 | comment "SH-4A Processor Support" | ||
135 | |||
136 | config CPU_SUBTYPE_SH73180 | ||
137 | bool "Support SH73180 processor" | ||
138 | select CPU_SH4A | ||
139 | |||
140 | config CPU_SUBTYPE_SH7770 | ||
141 | bool "Support SH7770 processor" | ||
142 | select CPU_SH4A | ||
143 | |||
144 | config CPU_SUBTYPE_SH7780 | ||
145 | bool "Support SH7780 processor" | ||
146 | select CPU_SH4A | ||
147 | |||
148 | endmenu | ||
149 | |||
150 | menu "Memory management options" | ||
151 | |||
152 | config MMU | ||
153 | bool "Support for memory management hardware" | ||
154 | depends on !CPU_SH2 | ||
155 | default y | ||
156 | help | ||
157 | Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to | ||
158 | boot on these systems, this option must not be set. | ||
159 | |||
160 | On other systems (such as the SH-3 and 4) where an MMU exists, | ||
161 | turning this off will boot the kernel on these machines with the | ||
162 | MMU implicitly switched off. | ||
163 | |||
164 | config 32BIT | ||
165 | bool "Support 32-bit physical addressing through PMB" | ||
166 | depends on CPU_SH4A | ||
167 | default y | ||
168 | help | ||
169 | If you say Y here, physical addressing will be extended to | ||
170 | 32-bits through the SH-4A PMB. If this is not set, legacy | ||
171 | 29-bit physical addressing will be used. | ||
172 | |||
173 | choice | ||
174 | prompt "HugeTLB page size" | ||
175 | depends on HUGETLB_PAGE && CPU_SH4 && MMU | ||
176 | default HUGETLB_PAGE_SIZE_64K | ||
177 | |||
178 | config HUGETLB_PAGE_SIZE_64K | ||
179 | bool "64K" | ||
180 | |||
181 | config HUGETLB_PAGE_SIZE_1MB | ||
182 | bool "1MB" | ||
183 | |||
184 | endchoice | ||
185 | |||
186 | source "mm/Kconfig" | ||
187 | |||
188 | endmenu | ||
189 | |||
190 | menu "Cache configuration" | ||
191 | |||
192 | config SH7705_CACHE_32KB | ||
193 | bool "Enable 32KB cache size for SH7705" | ||
194 | depends on CPU_SUBTYPE_SH7705 | ||
195 | default y | ||
196 | |||
197 | config SH_DIRECT_MAPPED | ||
198 | bool "Use direct-mapped caching" | ||
199 | default n | ||
200 | help | ||
201 | Selecting this option will configure the caches to be direct-mapped, | ||
202 | even if the cache supports a 2 or 4-way mode. This is useful primarily | ||
203 | for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, | ||
204 | SH4-202, SH4-501, etc.) | ||
205 | |||
206 | Turn this option off for platforms that do not have a direct-mapped | ||
207 | cache, and you have no need to run the caches in such a configuration. | ||
208 | |||
209 | config SH_WRITETHROUGH | ||
210 | bool "Use write-through caching" | ||
211 | default y if CPU_SH2 | ||
212 | help | ||
213 | Selecting this option will configure the caches in write-through | ||
214 | mode, as opposed to the default write-back configuration. | ||
215 | |||
216 | Since there's sill some aliasing issues on SH-4, this option will | ||
217 | unfortunately still require the majority of flushing functions to | ||
218 | be implemented to deal with aliasing. | ||
219 | |||
220 | If unsure, say N. | ||
221 | |||
222 | config SH_OCRAM | ||
223 | bool "Operand Cache RAM (OCRAM) support" | ||
224 | help | ||
225 | Selecting this option will automatically tear down the number of | ||
226 | sets in the dcache by half, which in turn exposes a memory range. | ||
227 | |||
228 | The addresses for the OC RAM base will vary according to the | ||
229 | processor version. Consult vendor documentation for specifics. | ||
230 | |||
231 | If unsure, say N. | ||
232 | |||
233 | endmenu | ||
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap.c index e794e27a72f1..96fa4a999e2a 100644 --- a/arch/sh/mm/ioremap.c +++ b/arch/sh/mm/ioremap.c | |||
@@ -6,13 +6,19 @@ | |||
6 | * 640k-1MB IO memory area on PC's | 6 | * 640k-1MB IO memory area on PC's |
7 | * | 7 | * |
8 | * (C) Copyright 1995 1996 Linus Torvalds | 8 | * (C) Copyright 1995 1996 Linus Torvalds |
9 | * (C) Copyright 2005, 2006 Paul Mundt | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of this | ||
13 | * archive for more details. | ||
9 | */ | 14 | */ |
10 | |||
11 | #include <linux/vmalloc.h> | 15 | #include <linux/vmalloc.h> |
16 | #include <linux/module.h> | ||
12 | #include <linux/mm.h> | 17 | #include <linux/mm.h> |
13 | #include <asm/io.h> | 18 | #include <asm/io.h> |
14 | #include <asm/page.h> | 19 | #include <asm/page.h> |
15 | #include <asm/pgalloc.h> | 20 | #include <asm/pgalloc.h> |
21 | #include <asm/addrspace.h> | ||
16 | #include <asm/cacheflush.h> | 22 | #include <asm/cacheflush.h> |
17 | #include <asm/tlbflush.h> | 23 | #include <asm/tlbflush.h> |
18 | 24 | ||
@@ -80,9 +86,15 @@ int remap_area_pages(unsigned long address, unsigned long phys_addr, | |||
80 | if (address >= end) | 86 | if (address >= end) |
81 | BUG(); | 87 | BUG(); |
82 | do { | 88 | do { |
89 | pud_t *pud; | ||
83 | pmd_t *pmd; | 90 | pmd_t *pmd; |
84 | pmd = pmd_alloc(&init_mm, dir, address); | 91 | |
85 | error = -ENOMEM; | 92 | error = -ENOMEM; |
93 | |||
94 | pud = pud_alloc(&init_mm, dir, address); | ||
95 | if (!pud) | ||
96 | break; | ||
97 | pmd = pmd_alloc(&init_mm, pud, address); | ||
86 | if (!pmd) | 98 | if (!pmd) |
87 | break; | 99 | break; |
88 | if (remap_area_pmd(pmd, address, end - address, | 100 | if (remap_area_pmd(pmd, address, end - address, |
@@ -97,10 +109,6 @@ int remap_area_pages(unsigned long address, unsigned long phys_addr, | |||
97 | } | 109 | } |
98 | 110 | ||
99 | /* | 111 | /* |
100 | * Generic mapping function (not visible outside): | ||
101 | */ | ||
102 | |||
103 | /* | ||
104 | * Remap an arbitrary physical address space into the kernel virtual | 112 | * Remap an arbitrary physical address space into the kernel virtual |
105 | * address space. Needed when the kernel wants to access high addresses | 113 | * address space. Needed when the kernel wants to access high addresses |
106 | * directly. | 114 | * directly. |
@@ -109,11 +117,11 @@ int remap_area_pages(unsigned long address, unsigned long phys_addr, | |||
109 | * have to convert them into an offset in a page-aligned mapping, but the | 117 | * have to convert them into an offset in a page-aligned mapping, but the |
110 | * caller shouldn't need to know that small detail. | 118 | * caller shouldn't need to know that small detail. |
111 | */ | 119 | */ |
112 | void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags) | 120 | void __iomem *__ioremap(unsigned long phys_addr, unsigned long size, |
121 | unsigned long flags) | ||
113 | { | 122 | { |
114 | void * addr; | ||
115 | struct vm_struct * area; | 123 | struct vm_struct * area; |
116 | unsigned long offset, last_addr; | 124 | unsigned long offset, last_addr, addr, orig_addr; |
117 | 125 | ||
118 | /* Don't allow wraparound or zero size */ | 126 | /* Don't allow wraparound or zero size */ |
119 | last_addr = phys_addr + size - 1; | 127 | last_addr = phys_addr + size - 1; |
@@ -124,7 +132,7 @@ void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long fla | |||
124 | * Don't remap the low PCI/ISA area, it's always mapped.. | 132 | * Don't remap the low PCI/ISA area, it's always mapped.. |
125 | */ | 133 | */ |
126 | if (phys_addr >= 0xA0000 && last_addr < 0x100000) | 134 | if (phys_addr >= 0xA0000 && last_addr < 0x100000) |
127 | return phys_to_virt(phys_addr); | 135 | return (void __iomem *)phys_to_virt(phys_addr); |
128 | 136 | ||
129 | /* | 137 | /* |
130 | * Don't allow anybody to remap normal RAM that we're using.. | 138 | * Don't allow anybody to remap normal RAM that we're using.. |
@@ -146,16 +154,71 @@ void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long fla | |||
146 | if (!area) | 154 | if (!area) |
147 | return NULL; | 155 | return NULL; |
148 | area->phys_addr = phys_addr; | 156 | area->phys_addr = phys_addr; |
149 | addr = area->addr; | 157 | orig_addr = addr = (unsigned long)area->addr; |
150 | if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) { | 158 | |
151 | vunmap(addr); | 159 | #ifdef CONFIG_32BIT |
152 | return NULL; | 160 | /* |
161 | * First try to remap through the PMB once a valid VMA has been | ||
162 | * established. Smaller allocations (or the rest of the size | ||
163 | * remaining after a PMB mapping due to the size not being | ||
164 | * perfectly aligned on a PMB size boundary) are then mapped | ||
165 | * through the UTLB using conventional page tables. | ||
166 | * | ||
167 | * PMB entries are all pre-faulted. | ||
168 | */ | ||
169 | if (unlikely(size >= 0x1000000)) { | ||
170 | unsigned long mapped = pmb_remap(addr, phys_addr, size, flags); | ||
171 | |||
172 | if (likely(mapped)) { | ||
173 | addr += mapped; | ||
174 | phys_addr += mapped; | ||
175 | size -= mapped; | ||
176 | } | ||
153 | } | 177 | } |
154 | return (void *) (offset + (char *)addr); | 178 | #endif |
179 | |||
180 | if (likely(size)) | ||
181 | if (remap_area_pages(addr, phys_addr, size, flags)) { | ||
182 | vunmap((void *)orig_addr); | ||
183 | return NULL; | ||
184 | } | ||
185 | |||
186 | return (void __iomem *)(offset + (char *)orig_addr); | ||
155 | } | 187 | } |
188 | EXPORT_SYMBOL(__ioremap); | ||
156 | 189 | ||
157 | void p3_iounmap(void *addr) | 190 | void __iounmap(void __iomem *addr) |
158 | { | 191 | { |
159 | if (addr > high_memory) | 192 | unsigned long vaddr = (unsigned long __force)addr; |
160 | vfree((void *)(PAGE_MASK & (unsigned long)addr)); | 193 | struct vm_struct *p; |
194 | |||
195 | if (PXSEG(vaddr) < P3SEG) | ||
196 | return; | ||
197 | |||
198 | #ifdef CONFIG_32BIT | ||
199 | /* | ||
200 | * Purge any PMB entries that may have been established for this | ||
201 | * mapping, then proceed with conventional VMA teardown. | ||
202 | * | ||
203 | * XXX: Note that due to the way that remove_vm_area() does | ||
204 | * matching of the resultant VMA, we aren't able to fast-forward | ||
205 | * the address past the PMB space until the end of the VMA where | ||
206 | * the page tables reside. As such, unmap_vm_area() will be | ||
207 | * forced to linearly scan over the area until it finds the page | ||
208 | * tables where PTEs that need to be unmapped actually reside, | ||
209 | * which is far from optimal. Perhaps we need to use a separate | ||
210 | * VMA for the PMB mappings? | ||
211 | * -- PFM. | ||
212 | */ | ||
213 | pmb_unmap(vaddr); | ||
214 | #endif | ||
215 | |||
216 | p = remove_vm_area((void *)(vaddr & PAGE_MASK)); | ||
217 | if (!p) { | ||
218 | printk(KERN_ERR "%s: bad address %p\n", __FUNCTION__, addr); | ||
219 | return; | ||
220 | } | ||
221 | |||
222 | kfree(p); | ||
161 | } | 223 | } |
224 | EXPORT_SYMBOL(__iounmap); | ||
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index 0693fbd1f956..182fe9092577 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types | |||
@@ -10,10 +10,7 @@ SE SH_SOLUTION_ENGINE | |||
10 | 7300SE SH_7300_SOLUTION_ENGINE | 10 | 7300SE SH_7300_SOLUTION_ENGINE |
11 | 73180SE SH_73180_SOLUTION_ENGINE | 11 | 73180SE SH_73180_SOLUTION_ENGINE |
12 | 7751SYSTEMH SH_7751_SYSTEMH | 12 | 7751SYSTEMH SH_7751_SYSTEMH |
13 | HP600 SH_HP600 | 13 | HP6XX SH_HP6XX |
14 | HP620 SH_HP620 | ||
15 | HP680 SH_HP680 | ||
16 | HP690 SH_HP690 | ||
17 | HD64461 HD64461 | 14 | HD64461 HD64461 |
18 | HD64465 HD64465 | 15 | HD64465 HD64465 |
19 | SH2000 SH_SH2000 | 16 | SH2000 SH_SH2000 |
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig index 2efc4be22709..2f9deca31cc9 100644 --- a/arch/x86_64/Kconfig +++ b/arch/x86_64/Kconfig | |||
@@ -305,7 +305,11 @@ config ARCH_DISCONTIGMEM_DEFAULT | |||
305 | 305 | ||
306 | config ARCH_SPARSEMEM_ENABLE | 306 | config ARCH_SPARSEMEM_ENABLE |
307 | def_bool y | 307 | def_bool y |
308 | depends on NUMA | 308 | depends on (NUMA || EXPERIMENTAL) |
309 | |||
310 | config ARCH_MEMORY_PROBE | ||
311 | def_bool y | ||
312 | depends on MEMORY_HOTPLUG | ||
309 | 313 | ||
310 | config ARCH_FLATMEM_ENABLE | 314 | config ARCH_FLATMEM_ENABLE |
311 | def_bool y | 315 | def_bool y |
@@ -315,6 +319,7 @@ source "mm/Kconfig" | |||
315 | 319 | ||
316 | config HAVE_ARCH_EARLY_PFN_TO_NID | 320 | config HAVE_ARCH_EARLY_PFN_TO_NID |
317 | def_bool y | 321 | def_bool y |
322 | depends on NUMA | ||
318 | 323 | ||
319 | config NR_CPUS | 324 | config NR_CPUS |
320 | int "Maximum number of CPUs (2-256)" | 325 | int "Maximum number of CPUs (2-256)" |
@@ -350,7 +355,7 @@ config HPET_TIMER | |||
350 | <http://www.intel.com/hardwaredesign/hpetspec.htm>. | 355 | <http://www.intel.com/hardwaredesign/hpetspec.htm>. |
351 | 356 | ||
352 | config X86_PM_TIMER | 357 | config X86_PM_TIMER |
353 | bool "PM timer" | 358 | bool "PM timer" if EMBEDDED |
354 | depends on ACPI | 359 | depends on ACPI |
355 | default y | 360 | default y |
356 | help | 361 | help |
diff --git a/arch/x86_64/defconfig b/arch/x86_64/defconfig index 054dcd8a5e9d..5231fe83ea4b 100644 --- a/arch/x86_64/defconfig +++ b/arch/x86_64/defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.15-git7 | 3 | # Linux kernel version: 2.6.15-git12 |
4 | # Wed Jan 11 11:57:36 2006 | 4 | # Mon Jan 16 13:09:08 2006 |
5 | # | 5 | # |
6 | CONFIG_X86_64=y | 6 | CONFIG_X86_64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
@@ -319,6 +319,11 @@ CONFIG_IPV6=y | |||
319 | # CONFIG_ATALK is not set | 319 | # CONFIG_ATALK is not set |
320 | # CONFIG_X25 is not set | 320 | # CONFIG_X25 is not set |
321 | # CONFIG_LAPB is not set | 321 | # CONFIG_LAPB is not set |
322 | |||
323 | # | ||
324 | # TIPC Configuration (EXPERIMENTAL) | ||
325 | # | ||
326 | # CONFIG_TIPC is not set | ||
322 | # CONFIG_NET_DIVERT is not set | 327 | # CONFIG_NET_DIVERT is not set |
323 | # CONFIG_ECONET is not set | 328 | # CONFIG_ECONET is not set |
324 | # CONFIG_WAN_ROUTER is not set | 329 | # CONFIG_WAN_ROUTER is not set |
@@ -537,8 +542,7 @@ CONFIG_SCSI_SATA_INTEL_COMBINED=y | |||
537 | # CONFIG_SCSI_IPR is not set | 542 | # CONFIG_SCSI_IPR is not set |
538 | # CONFIG_SCSI_QLOGIC_FC is not set | 543 | # CONFIG_SCSI_QLOGIC_FC is not set |
539 | # CONFIG_SCSI_QLOGIC_1280 is not set | 544 | # CONFIG_SCSI_QLOGIC_1280 is not set |
540 | CONFIG_SCSI_QLA2XXX=y | 545 | # CONFIG_SCSI_QLA_FC is not set |
541 | # CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE is not set | ||
542 | # CONFIG_SCSI_LPFC is not set | 546 | # CONFIG_SCSI_LPFC is not set |
543 | # CONFIG_SCSI_DC395x is not set | 547 | # CONFIG_SCSI_DC395x is not set |
544 | # CONFIG_SCSI_DC390T is not set | 548 | # CONFIG_SCSI_DC390T is not set |
@@ -805,6 +809,7 @@ CONFIG_SOFT_WATCHDOG=y | |||
805 | # CONFIG_W83877F_WDT is not set | 809 | # CONFIG_W83877F_WDT is not set |
806 | # CONFIG_W83977F_WDT is not set | 810 | # CONFIG_W83977F_WDT is not set |
807 | # CONFIG_MACHZ_WDT is not set | 811 | # CONFIG_MACHZ_WDT is not set |
812 | # CONFIG_SBC_EPX_C3_WATCHDOG is not set | ||
808 | 813 | ||
809 | # | 814 | # |
810 | # PCI-based Watchdog Cards | 815 | # PCI-based Watchdog Cards |
@@ -850,6 +855,12 @@ CONFIG_HPET_MMAP=y | |||
850 | # CONFIG_I2C is not set | 855 | # CONFIG_I2C is not set |
851 | 856 | ||
852 | # | 857 | # |
858 | # SPI support | ||
859 | # | ||
860 | # CONFIG_SPI is not set | ||
861 | # CONFIG_SPI_MASTER is not set | ||
862 | |||
863 | # | ||
853 | # Dallas's 1-wire bus | 864 | # Dallas's 1-wire bus |
854 | # | 865 | # |
855 | # CONFIG_W1 is not set | 866 | # CONFIG_W1 is not set |
@@ -992,6 +1003,7 @@ CONFIG_USB_STORAGE=y | |||
992 | # | 1003 | # |
993 | CONFIG_USB_HID=y | 1004 | CONFIG_USB_HID=y |
994 | CONFIG_USB_HIDINPUT=y | 1005 | CONFIG_USB_HIDINPUT=y |
1006 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
995 | # CONFIG_HID_FF is not set | 1007 | # CONFIG_HID_FF is not set |
996 | # CONFIG_USB_HIDDEV is not set | 1008 | # CONFIG_USB_HIDDEV is not set |
997 | # CONFIG_USB_AIPTEK is not set | 1009 | # CONFIG_USB_AIPTEK is not set |
@@ -1276,6 +1288,7 @@ CONFIG_DETECT_SOFTLOCKUP=y | |||
1276 | CONFIG_DEBUG_FS=y | 1288 | CONFIG_DEBUG_FS=y |
1277 | # CONFIG_DEBUG_VM is not set | 1289 | # CONFIG_DEBUG_VM is not set |
1278 | # CONFIG_FRAME_POINTER is not set | 1290 | # CONFIG_FRAME_POINTER is not set |
1291 | # CONFIG_FORCED_INLINING is not set | ||
1279 | # CONFIG_RCU_TORTURE_TEST is not set | 1292 | # CONFIG_RCU_TORTURE_TEST is not set |
1280 | CONFIG_INIT_DEBUG=y | 1293 | CONFIG_INIT_DEBUG=y |
1281 | # CONFIG_DEBUG_RODATA is not set | 1294 | # CONFIG_DEBUG_RODATA is not set |
diff --git a/arch/x86_64/ia32/Makefile b/arch/x86_64/ia32/Makefile index 051608d55920..929e6b0771f8 100644 --- a/arch/x86_64/ia32/Makefile +++ b/arch/x86_64/ia32/Makefile | |||
@@ -3,7 +3,8 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_IA32_EMULATION) := ia32entry.o sys_ia32.o ia32_signal.o tls32.o \ | 5 | obj-$(CONFIG_IA32_EMULATION) := ia32entry.o sys_ia32.o ia32_signal.o tls32.o \ |
6 | ia32_binfmt.o fpu32.o ptrace32.o syscall32.o syscall32_syscall.o | 6 | ia32_binfmt.o fpu32.o ptrace32.o syscall32.o syscall32_syscall.o \ |
7 | mmap32.o | ||
7 | 8 | ||
8 | sysv-$(CONFIG_SYSVIPC) := ipc32.o | 9 | sysv-$(CONFIG_SYSVIPC) := ipc32.o |
9 | obj-$(CONFIG_IA32_EMULATION) += $(sysv-y) | 10 | obj-$(CONFIG_IA32_EMULATION) += $(sysv-y) |
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c index 029bddab0459..572b3b28772d 100644 --- a/arch/x86_64/ia32/ia32_binfmt.c +++ b/arch/x86_64/ia32/ia32_binfmt.c | |||
@@ -293,8 +293,6 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top, int | |||
293 | } while(0) | 293 | } while(0) |
294 | 294 | ||
295 | 295 | ||
296 | #define elf_map elf32_map | ||
297 | |||
298 | #include <linux/module.h> | 296 | #include <linux/module.h> |
299 | 297 | ||
300 | MODULE_DESCRIPTION("Binary format loader for compatibility with IA32 ELF binaries."); | 298 | MODULE_DESCRIPTION("Binary format loader for compatibility with IA32 ELF binaries."); |
@@ -390,21 +388,6 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top, | |||
390 | } | 388 | } |
391 | EXPORT_SYMBOL(ia32_setup_arg_pages); | 389 | EXPORT_SYMBOL(ia32_setup_arg_pages); |
392 | 390 | ||
393 | static unsigned long | ||
394 | elf32_map (struct file *filep, unsigned long addr, struct elf_phdr *eppnt, int prot, int type) | ||
395 | { | ||
396 | unsigned long map_addr; | ||
397 | struct task_struct *me = current; | ||
398 | |||
399 | down_write(&me->mm->mmap_sem); | ||
400 | map_addr = do_mmap(filep, ELF_PAGESTART(addr), | ||
401 | eppnt->p_filesz + ELF_PAGEOFFSET(eppnt->p_vaddr), prot, | ||
402 | type, | ||
403 | eppnt->p_offset - ELF_PAGEOFFSET(eppnt->p_vaddr)); | ||
404 | up_write(&me->mm->mmap_sem); | ||
405 | return(map_addr); | ||
406 | } | ||
407 | |||
408 | #ifdef CONFIG_SYSCTL | 391 | #ifdef CONFIG_SYSCTL |
409 | /* Register vsyscall32 into the ABI table */ | 392 | /* Register vsyscall32 into the ABI table */ |
410 | #include <linux/sysctl.h> | 393 | #include <linux/sysctl.h> |
diff --git a/arch/x86_64/ia32/mmap32.c b/arch/x86_64/ia32/mmap32.c new file mode 100644 index 000000000000..079f4132575c --- /dev/null +++ b/arch/x86_64/ia32/mmap32.c | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * linux/arch/x86_64/ia32/mm/mmap.c | ||
3 | * | ||
4 | * flexible mmap layout support | ||
5 | * | ||
6 | * Based on the i386 version which was | ||
7 | * | ||
8 | * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina. | ||
9 | * All Rights Reserved. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | * | ||
25 | * | ||
26 | * Started by Ingo Molnar <mingo@elte.hu> | ||
27 | */ | ||
28 | |||
29 | #include <linux/personality.h> | ||
30 | #include <linux/mm.h> | ||
31 | #include <linux/random.h> | ||
32 | |||
33 | /* | ||
34 | * Top of mmap area (just below the process stack). | ||
35 | * | ||
36 | * Leave an at least ~128 MB hole. | ||
37 | */ | ||
38 | #define MIN_GAP (128*1024*1024) | ||
39 | #define MAX_GAP (TASK_SIZE/6*5) | ||
40 | |||
41 | static inline unsigned long mmap_base(struct mm_struct *mm) | ||
42 | { | ||
43 | unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur; | ||
44 | unsigned long random_factor = 0; | ||
45 | |||
46 | if (current->flags & PF_RANDOMIZE) | ||
47 | random_factor = get_random_int() % (1024*1024); | ||
48 | |||
49 | if (gap < MIN_GAP) | ||
50 | gap = MIN_GAP; | ||
51 | else if (gap > MAX_GAP) | ||
52 | gap = MAX_GAP; | ||
53 | |||
54 | return PAGE_ALIGN(TASK_SIZE - gap - random_factor); | ||
55 | } | ||
56 | |||
57 | /* | ||
58 | * This function, called very early during the creation of a new | ||
59 | * process VM image, sets up which VM layout function to use: | ||
60 | */ | ||
61 | void ia32_pick_mmap_layout(struct mm_struct *mm) | ||
62 | { | ||
63 | /* | ||
64 | * Fall back to the standard layout if the personality | ||
65 | * bit is set, or if the expected stack growth is unlimited: | ||
66 | */ | ||
67 | if (sysctl_legacy_va_layout || | ||
68 | (current->personality & ADDR_COMPAT_LAYOUT) || | ||
69 | current->signal->rlim[RLIMIT_STACK].rlim_cur == RLIM_INFINITY) { | ||
70 | mm->mmap_base = TASK_UNMAPPED_BASE; | ||
71 | mm->get_unmapped_area = arch_get_unmapped_area; | ||
72 | mm->unmap_area = arch_unmap_area; | ||
73 | } else { | ||
74 | mm->mmap_base = mmap_base(mm); | ||
75 | mm->get_unmapped_area = arch_get_unmapped_area_topdown; | ||
76 | mm->unmap_area = arch_unmap_area_topdown; | ||
77 | } | ||
78 | } | ||
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c index 8fdd089fd17e..5d3c5b07b8db 100644 --- a/arch/x86_64/kernel/apic.c +++ b/arch/x86_64/kernel/apic.c | |||
@@ -499,13 +499,10 @@ static int lapic_resume(struct sys_device *dev) | |||
499 | if (!apic_pm_state.active) | 499 | if (!apic_pm_state.active) |
500 | return 0; | 500 | return 0; |
501 | 501 | ||
502 | /* XXX: Pavel needs this for S3 resume, but can't explain why */ | ||
503 | set_fixmap_nocache(FIX_APIC_BASE, APIC_DEFAULT_PHYS_BASE); | ||
504 | |||
505 | local_irq_save(flags); | 502 | local_irq_save(flags); |
506 | rdmsr(MSR_IA32_APICBASE, l, h); | 503 | rdmsr(MSR_IA32_APICBASE, l, h); |
507 | l &= ~MSR_IA32_APICBASE_BASE; | 504 | l &= ~MSR_IA32_APICBASE_BASE; |
508 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; | 505 | l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; |
509 | wrmsr(MSR_IA32_APICBASE, l, h); | 506 | wrmsr(MSR_IA32_APICBASE, l, h); |
510 | apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); | 507 | apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); |
511 | apic_write(APIC_ID, apic_pm_state.apic_id); | 508 | apic_write(APIC_ID, apic_pm_state.apic_id); |
diff --git a/arch/x86_64/kernel/asm-offsets.c b/arch/x86_64/kernel/asm-offsets.c index cfb4f9cebea4..38834bbbae11 100644 --- a/arch/x86_64/kernel/asm-offsets.c +++ b/arch/x86_64/kernel/asm-offsets.c | |||
@@ -43,6 +43,7 @@ int main(void) | |||
43 | ENTRY(irqcount); | 43 | ENTRY(irqcount); |
44 | ENTRY(cpunumber); | 44 | ENTRY(cpunumber); |
45 | ENTRY(irqstackptr); | 45 | ENTRY(irqstackptr); |
46 | ENTRY(data_offset); | ||
46 | BLANK(); | 47 | BLANK(); |
47 | #undef ENTRY | 48 | #undef ENTRY |
48 | #ifdef CONFIG_IA32_EMULATION | 49 | #ifdef CONFIG_IA32_EMULATION |
@@ -66,8 +67,6 @@ int main(void) | |||
66 | DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); | 67 | DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); |
67 | DEFINE(pbe_next, offsetof(struct pbe, next)); | 68 | DEFINE(pbe_next, offsetof(struct pbe, next)); |
68 | BLANK(); | 69 | BLANK(); |
69 | #if DEBUG_STKSZ > EXCEPTION_STKSZ | 70 | DEFINE(TSS_ist, offsetof(struct tss_struct, ist)); |
70 | DEFINE(DEBUG_IST, DEBUG_STACK); | ||
71 | #endif | ||
72 | return 0; | 71 | return 0; |
73 | } | 72 | } |
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S index 632fc0f59fcc..dbdba56e8faa 100644 --- a/arch/x86_64/kernel/entry.S +++ b/arch/x86_64/kernel/entry.S | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <asm/unistd.h> | 41 | #include <asm/unistd.h> |
42 | #include <asm/thread_info.h> | 42 | #include <asm/thread_info.h> |
43 | #include <asm/hw_irq.h> | 43 | #include <asm/hw_irq.h> |
44 | #include <asm/page.h> | ||
44 | 45 | ||
45 | .code64 | 46 | .code64 |
46 | 47 | ||
@@ -674,9 +675,6 @@ ENTRY(spurious_interrupt) | |||
674 | 675 | ||
675 | /* error code is on the stack already */ | 676 | /* error code is on the stack already */ |
676 | /* handle NMI like exceptions that can happen everywhere */ | 677 | /* handle NMI like exceptions that can happen everywhere */ |
677 | #ifndef DEBUG_IST | ||
678 | # define DEBUG_IST 0 | ||
679 | #endif | ||
680 | .macro paranoidentry sym, ist=0 | 678 | .macro paranoidentry sym, ist=0 |
681 | SAVE_ALL | 679 | SAVE_ALL |
682 | cld | 680 | cld |
@@ -695,11 +693,11 @@ ENTRY(spurious_interrupt) | |||
695 | movq ORIG_RAX(%rsp),%rsi | 693 | movq ORIG_RAX(%rsp),%rsi |
696 | movq $-1,ORIG_RAX(%rsp) | 694 | movq $-1,ORIG_RAX(%rsp) |
697 | .if \ist | 695 | .if \ist |
698 | subq $EXCEPTION_STACK_SIZE, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) | 696 | subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) |
699 | .endif | 697 | .endif |
700 | call \sym | 698 | call \sym |
701 | .if \ist | 699 | .if \ist |
702 | addq $EXCEPTION_STACK_SIZE, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) | 700 | addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) |
703 | .endif | 701 | .endif |
704 | cli | 702 | cli |
705 | .endm | 703 | .endm |
@@ -918,7 +916,7 @@ KPROBE_ENTRY(debug) | |||
918 | INTR_FRAME | 916 | INTR_FRAME |
919 | pushq $0 | 917 | pushq $0 |
920 | CFI_ADJUST_CFA_OFFSET 8 | 918 | CFI_ADJUST_CFA_OFFSET 8 |
921 | paranoidentry do_debug, DEBUG_IST | 919 | paranoidentry do_debug, DEBUG_STACK |
922 | jmp paranoid_exit | 920 | jmp paranoid_exit |
923 | CFI_ENDPROC | 921 | CFI_ENDPROC |
924 | .previous .text | 922 | .previous .text |
@@ -976,7 +974,7 @@ KPROBE_ENTRY(int3) | |||
976 | INTR_FRAME | 974 | INTR_FRAME |
977 | pushq $0 | 975 | pushq $0 |
978 | CFI_ADJUST_CFA_OFFSET 8 | 976 | CFI_ADJUST_CFA_OFFSET 8 |
979 | paranoidentry do_int3, DEBUG_IST | 977 | paranoidentry do_int3, DEBUG_STACK |
980 | jmp paranoid_exit | 978 | jmp paranoid_exit |
981 | CFI_ENDPROC | 979 | CFI_ENDPROC |
982 | .previous .text | 980 | .previous .text |
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S index 38fc3d5112e7..692c737feddb 100644 --- a/arch/x86_64/kernel/head.S +++ b/arch/x86_64/kernel/head.S | |||
@@ -241,104 +241,70 @@ ljumpvector: | |||
241 | ENTRY(stext) | 241 | ENTRY(stext) |
242 | ENTRY(_stext) | 242 | ENTRY(_stext) |
243 | 243 | ||
244 | .org 0x1000 | 244 | $page = 0 |
245 | ENTRY(init_level4_pgt) | 245 | #define NEXT_PAGE(name) \ |
246 | $page = $page + 1; \ | ||
247 | .org $page * 0x1000; \ | ||
248 | phys_/**/name = $page * 0x1000 + __PHYSICAL_START; \ | ||
249 | ENTRY(name) | ||
250 | |||
251 | NEXT_PAGE(init_level4_pgt) | ||
246 | /* This gets initialized in x86_64_start_kernel */ | 252 | /* This gets initialized in x86_64_start_kernel */ |
247 | .fill 512,8,0 | 253 | .fill 512,8,0 |
248 | 254 | ||
249 | .org 0x2000 | 255 | NEXT_PAGE(level3_ident_pgt) |
250 | ENTRY(level3_ident_pgt) | 256 | .quad phys_level2_ident_pgt | 0x007 |
251 | .quad 0x0000000000004007 + __PHYSICAL_START | ||
252 | .fill 511,8,0 | 257 | .fill 511,8,0 |
253 | 258 | ||
254 | .org 0x3000 | 259 | NEXT_PAGE(level3_kernel_pgt) |
255 | ENTRY(level3_kernel_pgt) | ||
256 | .fill 510,8,0 | 260 | .fill 510,8,0 |
257 | /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ | 261 | /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ |
258 | .quad 0x0000000000005007 + __PHYSICAL_START /* -> level2_kernel_pgt */ | 262 | .quad phys_level2_kernel_pgt | 0x007 |
259 | .fill 1,8,0 | 263 | .fill 1,8,0 |
260 | 264 | ||
261 | .org 0x4000 | 265 | NEXT_PAGE(level2_ident_pgt) |
262 | ENTRY(level2_ident_pgt) | ||
263 | /* 40MB for bootup. */ | 266 | /* 40MB for bootup. */ |
264 | .quad 0x0000000000000083 | 267 | i = 0 |
265 | .quad 0x0000000000200083 | 268 | .rept 20 |
266 | .quad 0x0000000000400083 | 269 | .quad i << 21 | 0x083 |
267 | .quad 0x0000000000600083 | 270 | i = i + 1 |
268 | .quad 0x0000000000800083 | 271 | .endr |
269 | .quad 0x0000000000A00083 | ||
270 | .quad 0x0000000000C00083 | ||
271 | .quad 0x0000000000E00083 | ||
272 | .quad 0x0000000001000083 | ||
273 | .quad 0x0000000001200083 | ||
274 | .quad 0x0000000001400083 | ||
275 | .quad 0x0000000001600083 | ||
276 | .quad 0x0000000001800083 | ||
277 | .quad 0x0000000001A00083 | ||
278 | .quad 0x0000000001C00083 | ||
279 | .quad 0x0000000001E00083 | ||
280 | .quad 0x0000000002000083 | ||
281 | .quad 0x0000000002200083 | ||
282 | .quad 0x0000000002400083 | ||
283 | .quad 0x0000000002600083 | ||
284 | /* Temporary mappings for the super early allocator in arch/x86_64/mm/init.c */ | 272 | /* Temporary mappings for the super early allocator in arch/x86_64/mm/init.c */ |
285 | .globl temp_boot_pmds | 273 | .globl temp_boot_pmds |
286 | temp_boot_pmds: | 274 | temp_boot_pmds: |
287 | .fill 492,8,0 | 275 | .fill 492,8,0 |
288 | 276 | ||
289 | .org 0x5000 | 277 | NEXT_PAGE(level2_kernel_pgt) |
290 | ENTRY(level2_kernel_pgt) | ||
291 | /* 40MB kernel mapping. The kernel code cannot be bigger than that. | 278 | /* 40MB kernel mapping. The kernel code cannot be bigger than that. |
292 | When you change this change KERNEL_TEXT_SIZE in page.h too. */ | 279 | When you change this change KERNEL_TEXT_SIZE in page.h too. */ |
293 | /* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */ | 280 | /* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */ |
294 | .quad 0x0000000000000183 | 281 | i = 0 |
295 | .quad 0x0000000000200183 | 282 | .rept 20 |
296 | .quad 0x0000000000400183 | 283 | .quad i << 21 | 0x183 |
297 | .quad 0x0000000000600183 | 284 | i = i + 1 |
298 | .quad 0x0000000000800183 | 285 | .endr |
299 | .quad 0x0000000000A00183 | ||
300 | .quad 0x0000000000C00183 | ||
301 | .quad 0x0000000000E00183 | ||
302 | .quad 0x0000000001000183 | ||
303 | .quad 0x0000000001200183 | ||
304 | .quad 0x0000000001400183 | ||
305 | .quad 0x0000000001600183 | ||
306 | .quad 0x0000000001800183 | ||
307 | .quad 0x0000000001A00183 | ||
308 | .quad 0x0000000001C00183 | ||
309 | .quad 0x0000000001E00183 | ||
310 | .quad 0x0000000002000183 | ||
311 | .quad 0x0000000002200183 | ||
312 | .quad 0x0000000002400183 | ||
313 | .quad 0x0000000002600183 | ||
314 | /* Module mapping starts here */ | 286 | /* Module mapping starts here */ |
315 | .fill 492,8,0 | 287 | .fill 492,8,0 |
316 | 288 | ||
317 | .org 0x6000 | 289 | NEXT_PAGE(empty_zero_page) |
318 | ENTRY(empty_zero_page) | ||
319 | |||
320 | .org 0x7000 | ||
321 | ENTRY(empty_bad_page) | ||
322 | 290 | ||
323 | .org 0x8000 | 291 | NEXT_PAGE(level3_physmem_pgt) |
324 | ENTRY(empty_bad_pte_table) | 292 | .quad phys_level2_kernel_pgt | 0x007 /* so that __va works even before pagetable_init */ |
293 | .fill 511,8,0 | ||
325 | 294 | ||
326 | .org 0x9000 | 295 | #undef NEXT_PAGE |
327 | ENTRY(empty_bad_pmd_table) | ||
328 | 296 | ||
329 | .org 0xa000 | 297 | .data |
330 | ENTRY(level3_physmem_pgt) | ||
331 | .quad 0x0000000000005007 + __PHYSICAL_START /* -> level2_kernel_pgt (so that __va works even before pagetable_init) */ | ||
332 | 298 | ||
333 | .org 0xb000 | ||
334 | #ifdef CONFIG_ACPI_SLEEP | 299 | #ifdef CONFIG_ACPI_SLEEP |
300 | .align PAGE_SIZE | ||
335 | ENTRY(wakeup_level4_pgt) | 301 | ENTRY(wakeup_level4_pgt) |
336 | .quad 0x0000000000002007 + __PHYSICAL_START /* -> level3_ident_pgt */ | 302 | .quad phys_level3_ident_pgt | 0x007 |
337 | .fill 255,8,0 | 303 | .fill 255,8,0 |
338 | .quad 0x000000000000a007 + __PHYSICAL_START | 304 | .quad phys_level3_physmem_pgt | 0x007 |
339 | .fill 254,8,0 | 305 | .fill 254,8,0 |
340 | /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ | 306 | /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ |
341 | .quad 0x0000000000003007 + __PHYSICAL_START /* -> level3_kernel_pgt */ | 307 | .quad phys_level3_kernel_pgt | 0x007 |
342 | #endif | 308 | #endif |
343 | 309 | ||
344 | #ifndef CONFIG_HOTPLUG_CPU | 310 | #ifndef CONFIG_HOTPLUG_CPU |
@@ -352,12 +318,12 @@ ENTRY(wakeup_level4_pgt) | |||
352 | */ | 318 | */ |
353 | .align PAGE_SIZE | 319 | .align PAGE_SIZE |
354 | ENTRY(boot_level4_pgt) | 320 | ENTRY(boot_level4_pgt) |
355 | .quad 0x0000000000002007 + __PHYSICAL_START /* -> level3_ident_pgt */ | 321 | .quad phys_level3_ident_pgt | 0x007 |
356 | .fill 255,8,0 | 322 | .fill 255,8,0 |
357 | .quad 0x000000000000a007 + __PHYSICAL_START | 323 | .quad phys_level3_physmem_pgt | 0x007 |
358 | .fill 254,8,0 | 324 | .fill 254,8,0 |
359 | /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ | 325 | /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ |
360 | .quad 0x0000000000003007 + __PHYSICAL_START /* -> level3_kernel_pgt */ | 326 | .quad phys_level3_kernel_pgt | 0x007 |
361 | 327 | ||
362 | .data | 328 | .data |
363 | 329 | ||
diff --git a/arch/x86_64/kernel/setup64.c b/arch/x86_64/kernel/setup64.c index 6eff51e9400c..8ac4db09610a 100644 --- a/arch/x86_64/kernel/setup64.c +++ b/arch/x86_64/kernel/setup64.c | |||
@@ -38,7 +38,7 @@ struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table }; | |||
38 | char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned"))); | 38 | char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned"))); |
39 | 39 | ||
40 | unsigned long __supported_pte_mask __read_mostly = ~0UL; | 40 | unsigned long __supported_pte_mask __read_mostly = ~0UL; |
41 | static int do_not_nx __initdata = 0; | 41 | static int do_not_nx __cpuinitdata = 0; |
42 | 42 | ||
43 | /* noexec=on|off | 43 | /* noexec=on|off |
44 | Control non executable mappings for 64bit processes. | 44 | Control non executable mappings for 64bit processes. |
diff --git a/arch/x86_64/mm/Makefile b/arch/x86_64/mm/Makefile index 1d232a87f113..d25ac86fe27a 100644 --- a/arch/x86_64/mm/Makefile +++ b/arch/x86_64/mm/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the linux x86_64-specific parts of the memory manager. | 2 | # Makefile for the linux x86_64-specific parts of the memory manager. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := init.o fault.o ioremap.o extable.o pageattr.o | 5 | obj-y := init.o fault.o ioremap.o extable.o pageattr.o mmap.o |
6 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | 6 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o |
7 | obj-$(CONFIG_NUMA) += numa.o | 7 | obj-$(CONFIG_NUMA) += numa.o |
8 | obj-$(CONFIG_K8_NUMA) += k8topology.o | 8 | obj-$(CONFIG_K8_NUMA) += k8topology.o |
diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c index eca60125efc3..7af1742aa958 100644 --- a/arch/x86_64/mm/init.c +++ b/arch/x86_64/mm/init.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <linux/proc_fs.h> | 24 | #include <linux/proc_fs.h> |
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <linux/dma-mapping.h> | 26 | #include <linux/dma-mapping.h> |
27 | #include <linux/module.h> | ||
28 | #include <linux/memory_hotplug.h> | ||
27 | 29 | ||
28 | #include <asm/processor.h> | 30 | #include <asm/processor.h> |
29 | #include <asm/system.h> | 31 | #include <asm/system.h> |
@@ -180,13 +182,19 @@ static struct temp_map { | |||
180 | {} | 182 | {} |
181 | }; | 183 | }; |
182 | 184 | ||
183 | static __init void *alloc_low_page(int *index, unsigned long *phys) | 185 | static __meminit void *alloc_low_page(int *index, unsigned long *phys) |
184 | { | 186 | { |
185 | struct temp_map *ti; | 187 | struct temp_map *ti; |
186 | int i; | 188 | int i; |
187 | unsigned long pfn = table_end++, paddr; | 189 | unsigned long pfn = table_end++, paddr; |
188 | void *adr; | 190 | void *adr; |
189 | 191 | ||
192 | if (after_bootmem) { | ||
193 | adr = (void *)get_zeroed_page(GFP_ATOMIC); | ||
194 | *phys = __pa(adr); | ||
195 | return adr; | ||
196 | } | ||
197 | |||
190 | if (pfn >= end_pfn) | 198 | if (pfn >= end_pfn) |
191 | panic("alloc_low_page: ran out of memory"); | 199 | panic("alloc_low_page: ran out of memory"); |
192 | for (i = 0; temp_mappings[i].allocated; i++) { | 200 | for (i = 0; temp_mappings[i].allocated; i++) { |
@@ -199,55 +207,86 @@ static __init void *alloc_low_page(int *index, unsigned long *phys) | |||
199 | ti->allocated = 1; | 207 | ti->allocated = 1; |
200 | __flush_tlb(); | 208 | __flush_tlb(); |
201 | adr = ti->address + ((pfn << PAGE_SHIFT) & ~PMD_MASK); | 209 | adr = ti->address + ((pfn << PAGE_SHIFT) & ~PMD_MASK); |
210 | memset(adr, 0, PAGE_SIZE); | ||
202 | *index = i; | 211 | *index = i; |
203 | *phys = pfn * PAGE_SIZE; | 212 | *phys = pfn * PAGE_SIZE; |
204 | return adr; | 213 | return adr; |
205 | } | 214 | } |
206 | 215 | ||
207 | static __init void unmap_low_page(int i) | 216 | static __meminit void unmap_low_page(int i) |
208 | { | 217 | { |
209 | struct temp_map *ti = &temp_mappings[i]; | 218 | struct temp_map *ti; |
219 | |||
220 | if (after_bootmem) | ||
221 | return; | ||
222 | |||
223 | ti = &temp_mappings[i]; | ||
210 | set_pmd(ti->pmd, __pmd(0)); | 224 | set_pmd(ti->pmd, __pmd(0)); |
211 | ti->allocated = 0; | 225 | ti->allocated = 0; |
212 | } | 226 | } |
213 | 227 | ||
214 | static void __init phys_pud_init(pud_t *pud, unsigned long address, unsigned long end) | 228 | static void __meminit |
229 | phys_pmd_init(pmd_t *pmd, unsigned long address, unsigned long end) | ||
230 | { | ||
231 | int i; | ||
232 | |||
233 | for (i = 0; i < PTRS_PER_PMD; pmd++, i++, address += PMD_SIZE) { | ||
234 | unsigned long entry; | ||
235 | |||
236 | if (address > end) { | ||
237 | for (; i < PTRS_PER_PMD; i++, pmd++) | ||
238 | set_pmd(pmd, __pmd(0)); | ||
239 | break; | ||
240 | } | ||
241 | entry = _PAGE_NX|_PAGE_PSE|_KERNPG_TABLE|_PAGE_GLOBAL|address; | ||
242 | entry &= __supported_pte_mask; | ||
243 | set_pmd(pmd, __pmd(entry)); | ||
244 | } | ||
245 | } | ||
246 | |||
247 | static void __meminit | ||
248 | phys_pmd_update(pud_t *pud, unsigned long address, unsigned long end) | ||
249 | { | ||
250 | pmd_t *pmd = pmd_offset(pud, (unsigned long)__va(address)); | ||
251 | |||
252 | if (pmd_none(*pmd)) { | ||
253 | spin_lock(&init_mm.page_table_lock); | ||
254 | phys_pmd_init(pmd, address, end); | ||
255 | spin_unlock(&init_mm.page_table_lock); | ||
256 | __flush_tlb_all(); | ||
257 | } | ||
258 | } | ||
259 | |||
260 | static void __meminit phys_pud_init(pud_t *pud, unsigned long address, unsigned long end) | ||
215 | { | 261 | { |
216 | long i, j; | 262 | long i = pud_index(address); |
217 | 263 | ||
218 | i = pud_index(address); | ||
219 | pud = pud + i; | 264 | pud = pud + i; |
265 | |||
266 | if (after_bootmem && pud_val(*pud)) { | ||
267 | phys_pmd_update(pud, address, end); | ||
268 | return; | ||
269 | } | ||
270 | |||
220 | for (; i < PTRS_PER_PUD; pud++, i++) { | 271 | for (; i < PTRS_PER_PUD; pud++, i++) { |
221 | int map; | 272 | int map; |
222 | unsigned long paddr, pmd_phys; | 273 | unsigned long paddr, pmd_phys; |
223 | pmd_t *pmd; | 274 | pmd_t *pmd; |
224 | 275 | ||
225 | paddr = address + i*PUD_SIZE; | 276 | paddr = (address & PGDIR_MASK) + i*PUD_SIZE; |
226 | if (paddr >= end) { | 277 | if (paddr >= end) |
227 | for (; i < PTRS_PER_PUD; i++, pud++) | ||
228 | set_pud(pud, __pud(0)); | ||
229 | break; | 278 | break; |
230 | } | ||
231 | 279 | ||
232 | if (!e820_mapped(paddr, paddr+PUD_SIZE, 0)) { | 280 | if (!after_bootmem && !e820_mapped(paddr, paddr+PUD_SIZE, 0)) { |
233 | set_pud(pud, __pud(0)); | 281 | set_pud(pud, __pud(0)); |
234 | continue; | 282 | continue; |
235 | } | 283 | } |
236 | 284 | ||
237 | pmd = alloc_low_page(&map, &pmd_phys); | 285 | pmd = alloc_low_page(&map, &pmd_phys); |
286 | spin_lock(&init_mm.page_table_lock); | ||
238 | set_pud(pud, __pud(pmd_phys | _KERNPG_TABLE)); | 287 | set_pud(pud, __pud(pmd_phys | _KERNPG_TABLE)); |
239 | for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) { | 288 | phys_pmd_init(pmd, paddr, end); |
240 | unsigned long pe; | 289 | spin_unlock(&init_mm.page_table_lock); |
241 | |||
242 | if (paddr >= end) { | ||
243 | for (; j < PTRS_PER_PMD; j++, pmd++) | ||
244 | set_pmd(pmd, __pmd(0)); | ||
245 | break; | ||
246 | } | ||
247 | pe = _PAGE_NX|_PAGE_PSE | _KERNPG_TABLE | _PAGE_GLOBAL | paddr; | ||
248 | pe &= __supported_pte_mask; | ||
249 | set_pmd(pmd, __pmd(pe)); | ||
250 | } | ||
251 | unmap_low_page(map); | 290 | unmap_low_page(map); |
252 | } | 291 | } |
253 | __flush_tlb(); | 292 | __flush_tlb(); |
@@ -262,30 +301,25 @@ static void __init find_early_table_space(unsigned long end) | |||
262 | tables = round_up(puds * sizeof(pud_t), PAGE_SIZE) + | 301 | tables = round_up(puds * sizeof(pud_t), PAGE_SIZE) + |
263 | round_up(pmds * sizeof(pmd_t), PAGE_SIZE); | 302 | round_up(pmds * sizeof(pmd_t), PAGE_SIZE); |
264 | 303 | ||
265 | /* Put page tables beyond the DMA zones if possible. | 304 | /* RED-PEN putting page tables only on node 0 could |
266 | RED-PEN might be better to spread them out more over | 305 | cause a hotspot and fill up ZONE_DMA. The page tables |
267 | memory to avoid hotspots */ | 306 | need roughly 0.5KB per GB. */ |
268 | if (end > MAX_DMA32_PFN<<PAGE_SHIFT) | 307 | start = 0x8000; |
269 | start = MAX_DMA32_PFN << PAGE_SHIFT; | 308 | table_start = find_e820_area(start, end, tables); |
270 | else if (end > MAX_DMA_PFN << PAGE_SHIFT) | ||
271 | start = MAX_DMA_PFN << PAGE_SHIFT; | ||
272 | else | ||
273 | start = 0x8000; | ||
274 | |||
275 | table_start = find_e820_area(start, end, tables); | ||
276 | if (table_start == -1) | ||
277 | table_start = find_e820_area(0x8000, end, tables); | ||
278 | if (table_start == -1UL) | 309 | if (table_start == -1UL) |
279 | panic("Cannot find space for the kernel page tables"); | 310 | panic("Cannot find space for the kernel page tables"); |
280 | 311 | ||
281 | table_start >>= PAGE_SHIFT; | 312 | table_start >>= PAGE_SHIFT; |
282 | table_end = table_start; | 313 | table_end = table_start; |
314 | |||
315 | early_printk("kernel direct mapping tables up to %lx @ %lx-%lx\n", | ||
316 | end, table_start << PAGE_SHIFT, table_end << PAGE_SHIFT); | ||
283 | } | 317 | } |
284 | 318 | ||
285 | /* Setup the direct mapping of the physical memory at PAGE_OFFSET. | 319 | /* Setup the direct mapping of the physical memory at PAGE_OFFSET. |
286 | This runs before bootmem is initialized and gets pages directly from the | 320 | This runs before bootmem is initialized and gets pages directly from the |
287 | physical memory. To access them they are temporarily mapped. */ | 321 | physical memory. To access them they are temporarily mapped. */ |
288 | void __init init_memory_mapping(unsigned long start, unsigned long end) | 322 | void __meminit init_memory_mapping(unsigned long start, unsigned long end) |
289 | { | 323 | { |
290 | unsigned long next; | 324 | unsigned long next; |
291 | 325 | ||
@@ -297,7 +331,8 @@ void __init init_memory_mapping(unsigned long start, unsigned long end) | |||
297 | * mapped. Unfortunately this is done currently before the nodes are | 331 | * mapped. Unfortunately this is done currently before the nodes are |
298 | * discovered. | 332 | * discovered. |
299 | */ | 333 | */ |
300 | find_early_table_space(end); | 334 | if (!after_bootmem) |
335 | find_early_table_space(end); | ||
301 | 336 | ||
302 | start = (unsigned long)__va(start); | 337 | start = (unsigned long)__va(start); |
303 | end = (unsigned long)__va(end); | 338 | end = (unsigned long)__va(end); |
@@ -305,20 +340,26 @@ void __init init_memory_mapping(unsigned long start, unsigned long end) | |||
305 | for (; start < end; start = next) { | 340 | for (; start < end; start = next) { |
306 | int map; | 341 | int map; |
307 | unsigned long pud_phys; | 342 | unsigned long pud_phys; |
308 | pud_t *pud = alloc_low_page(&map, &pud_phys); | 343 | pgd_t *pgd = pgd_offset_k(start); |
344 | pud_t *pud; | ||
345 | |||
346 | if (after_bootmem) | ||
347 | pud = pud_offset_k(pgd, __PAGE_OFFSET); | ||
348 | else | ||
349 | pud = alloc_low_page(&map, &pud_phys); | ||
350 | |||
309 | next = start + PGDIR_SIZE; | 351 | next = start + PGDIR_SIZE; |
310 | if (next > end) | 352 | if (next > end) |
311 | next = end; | 353 | next = end; |
312 | phys_pud_init(pud, __pa(start), __pa(next)); | 354 | phys_pud_init(pud, __pa(start), __pa(next)); |
313 | set_pgd(pgd_offset_k(start), mk_kernel_pgd(pud_phys)); | 355 | if (!after_bootmem) |
356 | set_pgd(pgd_offset_k(start), mk_kernel_pgd(pud_phys)); | ||
314 | unmap_low_page(map); | 357 | unmap_low_page(map); |
315 | } | 358 | } |
316 | 359 | ||
317 | asm volatile("movq %%cr4,%0" : "=r" (mmu_cr4_features)); | 360 | if (!after_bootmem) |
361 | asm volatile("movq %%cr4,%0" : "=r" (mmu_cr4_features)); | ||
318 | __flush_tlb_all(); | 362 | __flush_tlb_all(); |
319 | early_printk("kernel direct mapping tables upto %lx @ %lx-%lx\n", end, | ||
320 | table_start<<PAGE_SHIFT, | ||
321 | table_end<<PAGE_SHIFT); | ||
322 | } | 363 | } |
323 | 364 | ||
324 | void __cpuinit zap_low_mappings(int cpu) | 365 | void __cpuinit zap_low_mappings(int cpu) |
@@ -393,6 +434,9 @@ size_zones(unsigned long *z, unsigned long *h, | |||
393 | void __init paging_init(void) | 434 | void __init paging_init(void) |
394 | { | 435 | { |
395 | unsigned long zones[MAX_NR_ZONES], holes[MAX_NR_ZONES]; | 436 | unsigned long zones[MAX_NR_ZONES], holes[MAX_NR_ZONES]; |
437 | |||
438 | memory_present(0, 0, end_pfn); | ||
439 | sparse_init(); | ||
396 | size_zones(zones, holes, 0, end_pfn); | 440 | size_zones(zones, holes, 0, end_pfn); |
397 | free_area_init_node(0, NODE_DATA(0), zones, | 441 | free_area_init_node(0, NODE_DATA(0), zones, |
398 | __pa(PAGE_OFFSET) >> PAGE_SHIFT, holes); | 442 | __pa(PAGE_OFFSET) >> PAGE_SHIFT, holes); |
@@ -433,6 +477,50 @@ void __init clear_kernel_mapping(unsigned long address, unsigned long size) | |||
433 | __flush_tlb_all(); | 477 | __flush_tlb_all(); |
434 | } | 478 | } |
435 | 479 | ||
480 | /* | ||
481 | * Memory hotplug specific functions | ||
482 | * These are only for non-NUMA machines right now. | ||
483 | */ | ||
484 | #ifdef CONFIG_MEMORY_HOTPLUG | ||
485 | |||
486 | void online_page(struct page *page) | ||
487 | { | ||
488 | ClearPageReserved(page); | ||
489 | set_page_count(page, 1); | ||
490 | __free_page(page); | ||
491 | totalram_pages++; | ||
492 | num_physpages++; | ||
493 | } | ||
494 | |||
495 | int add_memory(u64 start, u64 size) | ||
496 | { | ||
497 | struct pglist_data *pgdat = NODE_DATA(0); | ||
498 | struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2; | ||
499 | unsigned long start_pfn = start >> PAGE_SHIFT; | ||
500 | unsigned long nr_pages = size >> PAGE_SHIFT; | ||
501 | int ret; | ||
502 | |||
503 | ret = __add_pages(zone, start_pfn, nr_pages); | ||
504 | if (ret) | ||
505 | goto error; | ||
506 | |||
507 | init_memory_mapping(start, (start + size -1)); | ||
508 | |||
509 | return ret; | ||
510 | error: | ||
511 | printk("%s: Problem encountered in __add_pages!\n", __func__); | ||
512 | return ret; | ||
513 | } | ||
514 | EXPORT_SYMBOL_GPL(add_memory); | ||
515 | |||
516 | int remove_memory(u64 start, u64 size) | ||
517 | { | ||
518 | return -EINVAL; | ||
519 | } | ||
520 | EXPORT_SYMBOL_GPL(remove_memory); | ||
521 | |||
522 | #endif | ||
523 | |||
436 | static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules, | 524 | static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules, |
437 | kcore_vsyscall; | 525 | kcore_vsyscall; |
438 | 526 | ||
@@ -539,7 +627,7 @@ void mark_rodata_ro(void) | |||
539 | #ifdef CONFIG_BLK_DEV_INITRD | 627 | #ifdef CONFIG_BLK_DEV_INITRD |
540 | void free_initrd_mem(unsigned long start, unsigned long end) | 628 | void free_initrd_mem(unsigned long start, unsigned long end) |
541 | { | 629 | { |
542 | if (start < (unsigned long)&_end) | 630 | if (start >= end) |
543 | return; | 631 | return; |
544 | printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10); | 632 | printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10); |
545 | for (; start < end; start += PAGE_SIZE) { | 633 | for (; start < end; start += PAGE_SIZE) { |
diff --git a/arch/x86_64/mm/mmap.c b/arch/x86_64/mm/mmap.c new file mode 100644 index 000000000000..43e9b99bdf25 --- /dev/null +++ b/arch/x86_64/mm/mmap.c | |||
@@ -0,0 +1,30 @@ | |||
1 | /* Copyright 2005 Andi Kleen, SuSE Labs. | ||
2 | * Licensed under GPL, v.2 | ||
3 | */ | ||
4 | #include <linux/config.h> | ||
5 | #include <linux/mm.h> | ||
6 | #include <linux/sched.h> | ||
7 | #include <linux/random.h> | ||
8 | #include <asm/ia32.h> | ||
9 | |||
10 | /* Notebook: move the mmap code from sys_x86_64.c over here. */ | ||
11 | |||
12 | void arch_pick_mmap_layout(struct mm_struct *mm) | ||
13 | { | ||
14 | #ifdef CONFIG_IA32_EMULATION | ||
15 | if (current_thread_info()->flags & _TIF_IA32) | ||
16 | return ia32_pick_mmap_layout(mm); | ||
17 | #endif | ||
18 | mm->mmap_base = TASK_UNMAPPED_BASE; | ||
19 | if (current->flags & PF_RANDOMIZE) { | ||
20 | /* Add 28bit randomness which is about 40bits of address space | ||
21 | because mmap base has to be page aligned. | ||
22 | or ~1/128 of the total user VM | ||
23 | (total user address space is 47bits) */ | ||
24 | unsigned rnd = get_random_int() & 0xfffffff; | ||
25 | mm->mmap_base += ((unsigned long)rnd) << PAGE_SHIFT; | ||
26 | } | ||
27 | mm->get_unmapped_area = arch_get_unmapped_area; | ||
28 | mm->unmap_area = arch_unmap_area; | ||
29 | } | ||
30 | |||
diff --git a/drivers/block/ps2esdi.c b/drivers/block/ps2esdi.c index 43415f69839f..bea75f2cb211 100644 --- a/drivers/block/ps2esdi.c +++ b/drivers/block/ps2esdi.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <linux/init.h> | 43 | #include <linux/init.h> |
44 | #include <linux/ioport.h> | 44 | #include <linux/ioport.h> |
45 | #include <linux/module.h> | 45 | #include <linux/module.h> |
46 | #include <linux/hdreg.h> | ||
46 | 47 | ||
47 | #include <asm/system.h> | 48 | #include <asm/system.h> |
48 | #include <asm/io.h> | 49 | #include <asm/io.h> |
diff --git a/drivers/char/esp.c b/drivers/char/esp.c index dd5dc8fa490d..3f3ac039f4d9 100644 --- a/drivers/char/esp.c +++ b/drivers/char/esp.c | |||
@@ -2492,6 +2492,7 @@ static int __init espserial_init(void) | |||
2492 | } | 2492 | } |
2493 | 2493 | ||
2494 | memset((void *)info, 0, sizeof(struct esp_struct)); | 2494 | memset((void *)info, 0, sizeof(struct esp_struct)); |
2495 | spin_lock_init(&info->lock); | ||
2495 | /* rx_trigger, tx_trigger are needed by autoconfig */ | 2496 | /* rx_trigger, tx_trigger are needed by autoconfig */ |
2496 | info->config.rx_trigger = rx_trigger; | 2497 | info->config.rx_trigger = rx_trigger; |
2497 | info->config.tx_trigger = tx_trigger; | 2498 | info->config.tx_trigger = tx_trigger; |
@@ -2528,7 +2529,6 @@ static int __init espserial_init(void) | |||
2528 | init_waitqueue_head(&info->close_wait); | 2529 | init_waitqueue_head(&info->close_wait); |
2529 | init_waitqueue_head(&info->delta_msr_wait); | 2530 | init_waitqueue_head(&info->delta_msr_wait); |
2530 | init_waitqueue_head(&info->break_wait); | 2531 | init_waitqueue_head(&info->break_wait); |
2531 | spin_lock_init(&info->lock); | ||
2532 | ports = info; | 2532 | ports = info; |
2533 | printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ", | 2533 | printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ", |
2534 | info->line, info->port, info->irq); | 2534 | info->line, info->port, info->irq); |
diff --git a/drivers/char/rio/brates.h b/drivers/char/rio/brates.h deleted file mode 100644 index dd686d58fd66..000000000000 --- a/drivers/char/rio/brates.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* BRATES.H ******* | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Jeremy Rolls | ||
8 | Date : 1 Nov 1990 | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef _brates_h | ||
38 | #ifndef lint | ||
39 | /* static char * _brates_h_sccs = "@(#)brates.h 1.4"; */ | ||
40 | #endif | ||
41 | #define _brates_h 1 | ||
42 | /* List of baud rate defines. Most are borrowed from /usr/include/sys/termio.h | ||
43 | */ | ||
44 | #ifndef INKERNEL | ||
45 | |||
46 | #define B0 0x00 | ||
47 | #define B50 0x01 | ||
48 | #define B75 0x02 | ||
49 | #define B110 0x03 | ||
50 | #define B134 0x04 | ||
51 | #define B150 0x05 | ||
52 | #define B200 0x06 | ||
53 | #define B300 0x07 | ||
54 | #define B600 0x08 | ||
55 | #define B1200 0x09 | ||
56 | #define B1800 0x0a | ||
57 | #define B2400 0x0b | ||
58 | #define B4800 0x0c | ||
59 | #define B9600 0x0d | ||
60 | #define B19200 0x0e | ||
61 | #define B38400 0x0f | ||
62 | |||
63 | #endif | ||
64 | |||
65 | /* | ||
66 | ** The following baudrates may or may not be defined | ||
67 | ** on various UNIX systems. | ||
68 | ** If they are not then we define them. | ||
69 | ** If they are then we do not define them ;-) | ||
70 | ** | ||
71 | ** This is appalling that we use same definitions as UNIX | ||
72 | ** for our own download code as there is no garuntee that | ||
73 | ** B57600 will be defined as 0x11 by a UNIX system.... | ||
74 | ** Arghhhhh!!!!!!!!!!!!!! | ||
75 | */ | ||
76 | #if !defined(B56000) | ||
77 | #define B56000 0x10 | ||
78 | #endif | ||
79 | |||
80 | #if !defined(B57600) | ||
81 | #define B57600 0x11 | ||
82 | #endif | ||
83 | |||
84 | #if !defined(B64000) | ||
85 | #define B64000 0x12 | ||
86 | #endif | ||
87 | |||
88 | #if !defined(B115200) | ||
89 | #define B115200 0x13 | ||
90 | #endif | ||
91 | |||
92 | |||
93 | #if !defined(B2000) | ||
94 | #define B2000 0x14 | ||
95 | #endif | ||
96 | |||
97 | |||
98 | #define MAX_RATE B2000 | ||
99 | |||
100 | struct baud_rate { /* Tag for baud rates */ | ||
101 | /* short host_rate, *//* As passed by the driver */ | ||
102 | short divisor, /* The divisor */ | ||
103 | prescaler; /* The pre-scaler */ | ||
104 | }; | ||
105 | |||
106 | #endif | ||
diff --git a/drivers/char/rio/chan.h b/drivers/char/rio/chan.h deleted file mode 100644 index af14311f9b66..000000000000 --- a/drivers/char/rio/chan.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | #ifndef _chan_h | ||
20 | #define _chan_h | ||
21 | |||
22 | #ifndef lint | ||
23 | #ifdef SCCS | ||
24 | static char *_rio_chan_h_sccs = "@(#)chan.h 1.1"; | ||
25 | #endif | ||
26 | #endif | ||
27 | |||
28 | #define Link0 0 | ||
29 | #define Link1 1 | ||
30 | #define Link2 2 | ||
31 | #define Link3 3 | ||
32 | |||
33 | #endif | ||
diff --git a/drivers/char/rio/cmd.h b/drivers/char/rio/cmd.h deleted file mode 100644 index 797b62400c91..000000000000 --- a/drivers/char/rio/cmd.h +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | |||
2 | |||
3 | /**************************************************************************** | ||
4 | ******* ******* | ||
5 | ******* C O M M A N D P A C K E T H E A D E R S | ||
6 | ******* ******* | ||
7 | **************************************************************************** | ||
8 | |||
9 | Author : Ian Nandhra | ||
10 | Date : | ||
11 | |||
12 | * | ||
13 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, write to the Free Software | ||
27 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
28 | |||
29 | Version : 0.01 | ||
30 | |||
31 | |||
32 | Mods | ||
33 | ---------------------------------------------------------------------------- | ||
34 | Date By Description | ||
35 | ---------------------------------------------------------------------------- | ||
36 | |||
37 | ***************************************************************************/ | ||
38 | |||
39 | |||
40 | #ifndef _cmd_h | ||
41 | #define _cmd_h | ||
42 | |||
43 | #ifndef lint | ||
44 | #ifdef SCCS | ||
45 | static char *_rio_cmd_h_sccs = "@(#)cmd.h 1.1"; | ||
46 | #endif | ||
47 | #endif | ||
48 | |||
49 | |||
50 | #define PRE_EMPTIVE_CMD 0x80 | ||
51 | #define INLINE_CMD ~PRE_EMPTIVE_CMD | ||
52 | |||
53 | #define CMD_IGNORE_PKT ( (ushort) 0) | ||
54 | #define CMD_STATUS_REQ ( (ushort) 1) | ||
55 | #define CMD_UNIT_STATUS_REQ ( (ushort) 2) /* Is this needed ??? */ | ||
56 | #define CMD_CONF_PORT ( (ushort) 3) | ||
57 | #define CMD_CONF_UNIT ( (ushort) 4) | ||
58 | #define CMD_ROUTE_MAP_REQ ( (ushort) 5) | ||
59 | #define CMD_FLUSH_TX ( (ushort) 6) | ||
60 | #define CMD_FLUSH_RX ( (ushort) 7) | ||
61 | #define CMD_PARTION_PORT ( (ushort) 8) | ||
62 | #define CMD_RESET_PORT ( (ushort) 0x0a) | ||
63 | #define CMD_BOOT_UNIT ( (ushort) 0x0b) | ||
64 | #define CMD_FOUND_UNIT ( (ushort) 0x0c) | ||
65 | #define CMD_ATTACHED_RTA_2 ( (ushort) 0x0d) | ||
66 | #define CMD_PROVIDE_BOOT ( (ushort) 0x0e) | ||
67 | #define CMD_CIRRUS ( (ushort) 0x0f) | ||
68 | |||
69 | #define FORM_STATUS_PKT ( (ushort) 1 ) | ||
70 | #define FORM_POLL_PKT ( (ushort) 2 ) | ||
71 | #define FORM_LINK_STATUS_PKT ( (ushort) 3 ) | ||
72 | |||
73 | |||
74 | #define CMD_DATA_PORT ( (ushort) 1 ) | ||
75 | #define CMD_DATA ( (ushort) 2 ) | ||
76 | |||
77 | #define CMD_TX_PART ( (ushort) 2 ) | ||
78 | #define CMD_RX_PART ( (ushort) 3 ) | ||
79 | #define CMD_RX_LIMIT ( (ushort) 4 ) | ||
80 | |||
81 | #endif | ||
82 | |||
83 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/data.h b/drivers/char/rio/data.h deleted file mode 100644 index dabc2d1fa40f..000000000000 --- a/drivers/char/rio/data.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | * | ||
7 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | ** | ||
23 | ** Module : data.h | ||
24 | ** SID : 1.2 | ||
25 | ** Last Modified : 11/6/98 11:34:09 | ||
26 | ** Retrieved : 11/6/98 11:34:21 | ||
27 | ** | ||
28 | ** ident @(#)data.h 1.2 | ||
29 | ** | ||
30 | ** ----------------------------------------------------------------------------- | ||
31 | */ | ||
32 | |||
33 | #ifndef __rio_datadex__ | ||
34 | #define __rio_datadex__ | ||
35 | |||
36 | #ifndef lint | ||
37 | static char *_data_h_sccs_ = "@(#)data.h 1.2"; | ||
38 | #endif | ||
39 | |||
40 | #endif | ||
diff --git a/drivers/char/rio/debug.h b/drivers/char/rio/debug.h deleted file mode 100644 index 6ae95c00db4a..000000000000 --- a/drivers/char/rio/debug.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | ** File: debug.h | ||
3 | ** | ||
4 | ** Author: David Dix | ||
5 | ** | ||
6 | ** Created: 12th March 1993 | ||
7 | ** | ||
8 | ** Last modified: 93/04/27 | ||
9 | ** | ||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | */ | ||
27 | |||
28 | #ifndef _debug_h_ | ||
29 | #define _debug_h_ | ||
30 | |||
31 | |||
32 | #if defined(DCIRRUS) | ||
33 | #define DBPACKET(pkt, opt, str, chn) debug_packet((pkt), (opt), (str), (chn)) | ||
34 | #else | ||
35 | #define DBPACKET(pkt, opt, str, c) | ||
36 | #endif /* DCIRRUS */ | ||
37 | |||
38 | |||
39 | #endif /* _debug_h_ */ | ||
diff --git a/drivers/char/rio/eisa.h b/drivers/char/rio/eisa.h deleted file mode 100644 index c2abaf0eab04..000000000000 --- a/drivers/char/rio/eisa.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | |||
7 | * | ||
8 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | ** | ||
24 | ** Module : eisa.h | ||
25 | ** SID : 1.2 | ||
26 | ** Last Modified : 11/6/98 11:34:10 | ||
27 | ** Retrieved : 11/6/98 11:34:21 | ||
28 | ** | ||
29 | ** ident @(#)eisa.h 1.2 | ||
30 | ** | ||
31 | ** ----------------------------------------------------------------------------- | ||
32 | */ | ||
33 | |||
34 | #ifndef __rio_eisa_h__ | ||
35 | #define __rio_eisa_h__ | ||
36 | |||
37 | #ifdef SCCS_LABELS | ||
38 | #ifndef lint | ||
39 | static char *_eisa_h_sccs_ = "@(#)eisa.h 1.2"; | ||
40 | #endif | ||
41 | #endif | ||
42 | |||
43 | /* | ||
44 | ** things to do with the EISA bus | ||
45 | */ | ||
46 | |||
47 | #define RIO_EISA_STRING_ADDRESS 0xfffd9 /* where EISA is stored */ | ||
48 | |||
49 | #define RIO_MAX_EISA_SLOTS 16 /* how many EISA slots? */ | ||
50 | |||
51 | #define RIO_EISA_IDENT 0x984D /* Specialix */ | ||
52 | #define RIO_EISA_PRODUCT_CODE 0x14 /* Code 14 */ | ||
53 | #define RIO_EISA_ENABLE_BIT 0x01 /* To enable card */ | ||
54 | |||
55 | #define EISA_MEMORY_BASE_LO 0xC00 /* A16-A23 */ | ||
56 | #define EISA_MEMORY_BASE_HI 0xC01 /* A24-A31 */ | ||
57 | #define EISA_INTERRUPT_VEC 0xC02 /* see below */ | ||
58 | #define EISA_CONTROL_PORT 0xC02 /* see below */ | ||
59 | #define EISA_INTERRUPT_RESET 0xC03 /* read to clear IRQ */ | ||
60 | |||
61 | #define EISA_PRODUCT_IDENT_LO 0xC80 /* where RIO_EISA_IDENT is */ | ||
62 | #define EISA_PRODUCT_IDENT_HI 0xC81 | ||
63 | #define EISA_PRODUCT_NUMBER 0xC82 /* where PROD_CODE is */ | ||
64 | #define EISA_REVISION_NUMBER 0xC83 /* revision (1dp) */ | ||
65 | #define EISA_ENABLE 0xC84 /* set LSB to enable card */ | ||
66 | #define EISA_UNIQUE_NUM_0 0xC88 /* vomit */ | ||
67 | #define EISA_UNIQUE_NUM_1 0xC8A | ||
68 | #define EISA_UNIQUE_NUM_2 0xC90 /* bit strangely arranged */ | ||
69 | #define EISA_UNIQUE_NUM_3 0xC92 | ||
70 | #define EISA_MANUF_YEAR 0xC98 /* when */ | ||
71 | #define EISA_MANUF_WEEK 0xC9A /* more when */ | ||
72 | |||
73 | #define EISA_TP_BOOT_FROM_RAM 0x01 | ||
74 | #define EISA_TP_BOOT_FROM_LINK 0x00 | ||
75 | #define EISA_TP_FAST_LINKS 0x02 | ||
76 | #define EISA_TP_SLOW_LINKS 0x00 | ||
77 | #define EISA_TP_BUS_ENABLE 0x04 | ||
78 | #define EISA_TP_BUS_DISABLE 0x00 | ||
79 | #define EISA_TP_RUN 0x08 | ||
80 | #define EISA_TP_RESET 0x00 | ||
81 | #define EISA_POLLED 0x00 | ||
82 | #define EISA_IRQ_3 0x30 | ||
83 | #define EISA_IRQ_4 0x40 | ||
84 | #define EISA_IRQ_5 0x50 | ||
85 | #define EISA_IRQ_6 0x60 | ||
86 | #define EISA_IRQ_7 0x70 | ||
87 | #define EISA_IRQ_9 0x90 | ||
88 | #define EISA_IRQ_10 0xA0 | ||
89 | #define EISA_IRQ_11 0xB0 | ||
90 | #define EISA_IRQ_12 0xC0 | ||
91 | #define EISA_IRQ_14 0xE0 | ||
92 | #define EISA_IRQ_15 0xF0 | ||
93 | |||
94 | #define EISA_INTERRUPT_MASK 0xF0 | ||
95 | #define EISA_CONTROL_MASK 0x0F | ||
96 | |||
97 | #define RIO_EISA_DEFAULT_MODE EISA_TP_SLOW_LINKS | ||
98 | |||
99 | #define RIOEisaToIvec(X) (uchar )((uchar)((X) & EISA_INTERRUPT_MASK)>>4) | ||
100 | |||
101 | #define INBZ(z,x) inb(((z)<<12) | (x)) | ||
102 | #define OUTBZ(z,x,y) outb((((z)<<12) | (x)), y) | ||
103 | |||
104 | #endif /* __rio_eisa_h__ */ | ||
diff --git a/drivers/char/rio/enable.h b/drivers/char/rio/enable.h deleted file mode 100644 index e06673fa48cf..000000000000 --- a/drivers/char/rio/enable.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* E N A B L E H E A D E R S | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Ian Nandhra | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef lint | ||
38 | #ifdef SCCS | ||
39 | static char *_rio_enable_h_sccs = "@(#)enable.h 1.1"; | ||
40 | #endif | ||
41 | #endif | ||
42 | |||
43 | |||
44 | #define ENABLE_LTT TRUE | ||
45 | #define ENABLE_LRT TRUE | ||
46 | |||
47 | |||
48 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/formpkt.h b/drivers/char/rio/formpkt.h deleted file mode 100644 index 3c7c91ace3ee..000000000000 --- a/drivers/char/rio/formpkt.h +++ /dev/null | |||
@@ -1,153 +0,0 @@ | |||
1 | |||
2 | |||
3 | /**************************************************************************** | ||
4 | ******* ******* | ||
5 | ******* F O R M P A C K E T H E A D E R F I L E | ||
6 | ******* ******* | ||
7 | **************************************************************************** | ||
8 | |||
9 | Author : Ian Nandhra | ||
10 | Date : | ||
11 | |||
12 | * | ||
13 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, write to the Free Software | ||
27 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
28 | |||
29 | Version : 0.01 | ||
30 | |||
31 | |||
32 | Mods | ||
33 | ---------------------------------------------------------------------------- | ||
34 | Date By Description | ||
35 | ---------------------------------------------------------------------------- | ||
36 | |||
37 | ***************************************************************************/ | ||
38 | |||
39 | #ifndef _formpkt_h | ||
40 | #define _formpkt_h 1 | ||
41 | |||
42 | #ifndef lint | ||
43 | #ifdef SCCS | ||
44 | static char *_rio_formpkt_h_sccs = "@(#)formpkt.h 1.1"; | ||
45 | #endif | ||
46 | #endif | ||
47 | |||
48 | typedef struct FORM_BOOT_PKT_1 FORM_BOOT_PKT_1; | ||
49 | struct FORM_BOOT_PKT_1 { | ||
50 | ushort pkt_number; | ||
51 | ushort pkt_total; | ||
52 | ushort boot_top; | ||
53 | }; | ||
54 | |||
55 | typedef struct FORM_BOOT_PKT_2 FORM_BOOT_PKT_2; | ||
56 | struct FORM_BOOT_PKT_2 { | ||
57 | ushort pkt_number; | ||
58 | char boot_data[10]; | ||
59 | }; | ||
60 | |||
61 | |||
62 | typedef struct FORM_ATTACH_RTA FORM_ATTACH_RTA; | ||
63 | struct FORM_ATTACH_RTA { | ||
64 | char cmd_code; | ||
65 | char booter_serial[4]; | ||
66 | char booter_link; | ||
67 | char bootee_serial[4]; | ||
68 | char bootee_link; | ||
69 | }; | ||
70 | |||
71 | |||
72 | typedef struct FORM_BOOT_ID FORM_BOOT_ID; | ||
73 | struct FORM_BOOT_ID { | ||
74 | char cmd_code; | ||
75 | char bootee_serial[4]; | ||
76 | char bootee_prod_id; | ||
77 | char bootee_link; | ||
78 | }; | ||
79 | |||
80 | |||
81 | |||
82 | typedef struct FORM_ROUTE_1 FORM_ROUTE_1; | ||
83 | struct FORM_ROUTE_1 { | ||
84 | char cmd_code; | ||
85 | char pkt_number; | ||
86 | char total_in_sequence; | ||
87 | char unit_id; | ||
88 | char host_unit_id; | ||
89 | }; | ||
90 | |||
91 | typedef struct FORM_ROUTE_2 FORM_ROUTE_2; | ||
92 | struct FORM_ROUTE_2 { | ||
93 | char cmd_code; | ||
94 | char pkt_number; | ||
95 | char total_in_sequence; | ||
96 | char route_data[9]; | ||
97 | }; | ||
98 | |||
99 | typedef struct FORM_ROUTE_REQ FORM_ROUTE_REQ; | ||
100 | struct FORM_ROUTE_REQ { | ||
101 | char cmd_code; | ||
102 | char pkt_number; | ||
103 | char total_in_sequence; | ||
104 | char route_data[10]; | ||
105 | }; | ||
106 | |||
107 | |||
108 | typedef struct FORM_ERROR FORM_ERROR; | ||
109 | struct FORM_ERROR { | ||
110 | char cmd_code; | ||
111 | char error_code; | ||
112 | |||
113 | }; | ||
114 | |||
115 | typedef struct FORM_STATUS FORM_STATUS; | ||
116 | struct FORM_STATUS { | ||
117 | char cmd_code; | ||
118 | char status_code; | ||
119 | char last_packet_valid; | ||
120 | char tx_buffer; | ||
121 | char rx_buffer; | ||
122 | char port_status; | ||
123 | char phb_status; | ||
124 | }; | ||
125 | |||
126 | |||
127 | typedef struct FORM_LINK_STATUS FORM_LINK_STATUS; | ||
128 | struct FORM_LINK_STATUS { | ||
129 | char cmd_code; | ||
130 | char status_code; | ||
131 | char link_number; | ||
132 | ushort rx_errors; | ||
133 | ushort tx_errors; | ||
134 | ushort csum_errors; | ||
135 | ushort disconnects; | ||
136 | }; | ||
137 | |||
138 | |||
139 | |||
140 | typedef struct FORM_PARTITION FORM_PARTITION; | ||
141 | struct FORM_PARTITION { | ||
142 | char cmd_code; | ||
143 | char status_code; | ||
144 | char port_number; | ||
145 | char tx_max; | ||
146 | char rx_max; | ||
147 | char rx_limit; | ||
148 | }; | ||
149 | |||
150 | |||
151 | #endif | ||
152 | |||
153 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/hosthw.h b/drivers/char/rio/hosthw.h deleted file mode 100644 index 6281fe47f4e9..000000000000 --- a/drivers/char/rio/hosthw.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* H O S T H A R D W A R E | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Ian Nandhra / Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | |||
38 | #ifndef lint | ||
39 | #ifdef SCCS_LABELS | ||
40 | static char *_rio_hosthw_h_sccs = "@(#)hosthw.h 1.2"; | ||
41 | #endif | ||
42 | #endif | ||
43 | |||
44 | #define SET_OTHER_INTERRUPT ( (volatile u_short *) 0x7c80 ) | ||
45 | #define SET_EISA_INTERRUPT ( (volatile u_short *) 0x7ef0 ) | ||
46 | |||
47 | #define EISA_HOST 0x30 | ||
48 | #define AT_HOST 0xa0 | ||
49 | #define MCA_HOST 0xb0 | ||
50 | #define PCI_HOST 0xd0 | ||
51 | |||
52 | #define PRODUCT_MASK 0xf0 | ||
53 | |||
54 | |||
55 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/lrt.h b/drivers/char/rio/lrt.h deleted file mode 100644 index b41764d7a22a..000000000000 --- a/drivers/char/rio/lrt.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* L R T | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Ian Nandhra / Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef lint | ||
38 | #ifdef SCCS_LABELS | ||
39 | static char *_rio_lrt_h_sccs = "@(#)lrt.h 1.1"; | ||
40 | #endif | ||
41 | #endif | ||
42 | |||
43 | |||
44 | #ifdef DCIRRUS | ||
45 | #define LRT_STACK (unsigned short) 600 | ||
46 | #else | ||
47 | #define LRT_STACK (ushort) 200 | ||
48 | #endif | ||
49 | |||
50 | |||
51 | |||
52 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/ltt.h b/drivers/char/rio/ltt.h deleted file mode 100644 index ab04004d4048..000000000000 --- a/drivers/char/rio/ltt.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* L T T | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Ian Nandhra / Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef lint | ||
38 | #ifdef SCCS_LABELS | ||
39 | static char *_rio_ltt_h_sccs = "@(#)ltt.h 1.1"; | ||
40 | #endif | ||
41 | #endif | ||
42 | |||
43 | #ifdef DCIRRUS | ||
44 | #define LTT_STACK (unsigned short) 600 | ||
45 | #else | ||
46 | #define LTT_STACK (ushort) 200 | ||
47 | #endif | ||
48 | |||
49 | |||
50 | |||
51 | |||
52 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/lttwake.h b/drivers/char/rio/lttwake.h deleted file mode 100644 index fdf0c1f250ab..000000000000 --- a/drivers/char/rio/lttwake.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | |||
2 | |||
3 | |||
4 | /**************************************************************************** | ||
5 | ******* ******* | ||
6 | ******* L T T W A K E U P H E A D E R | ||
7 | ******* ******* | ||
8 | **************************************************************************** | ||
9 | |||
10 | Author : Ian Nandhra | ||
11 | Date : | ||
12 | |||
13 | * | ||
14 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU General Public License as published by | ||
18 | * the Free Software Foundation; either version 2 of the License, or | ||
19 | * (at your option) any later version. | ||
20 | * | ||
21 | * This program is distributed in the hope that it will be useful, | ||
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
24 | * GNU General Public License for more details. | ||
25 | * | ||
26 | * You should have received a copy of the GNU General Public License | ||
27 | * along with this program; if not, write to the Free Software | ||
28 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
29 | |||
30 | Version : 0.01 | ||
31 | |||
32 | |||
33 | Mods | ||
34 | ---------------------------------------------------------------------------- | ||
35 | Date By Description | ||
36 | ---------------------------------------------------------------------------- | ||
37 | |||
38 | ***************************************************************************/ | ||
39 | |||
40 | #ifndef lint | ||
41 | #ifdef SCCS_LABELS | ||
42 | static char *_rio_lttwake_h_sccs = "@(#)lttwake.h 1.1"; | ||
43 | #endif | ||
44 | #endif | ||
45 | |||
46 | #define LTT_WAKEUP_STACK 500 | ||
47 | #define LTT_WAKEUP_INTERVAL (int) (500 * MILLISECOND) | ||
48 | |||
49 | |||
50 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/mca.h b/drivers/char/rio/mca.h deleted file mode 100644 index d01e76be7a17..000000000000 --- a/drivers/char/rio/mca.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | * | ||
7 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | ** | ||
23 | ** Module : mca.h | ||
24 | ** SID : 1.2 | ||
25 | ** Last Modified : 11/6/98 11:34:11 | ||
26 | ** Retrieved : 11/6/98 11:34:21 | ||
27 | ** | ||
28 | ** ident @(#)mca.h 1.2 | ||
29 | ** | ||
30 | ** ----------------------------------------------------------------------------- | ||
31 | */ | ||
32 | |||
33 | #ifndef __rio_mca_h__ | ||
34 | #define __rio_mca_h__ | ||
35 | |||
36 | #ifdef SCCS_LABELS | ||
37 | static char *_mca_h_sccs_ = "@(#)mca.h 1.2"; | ||
38 | #endif | ||
39 | |||
40 | /* | ||
41 | ** Micro Channel stuff | ||
42 | */ | ||
43 | |||
44 | #define McaMaxSlots 8 | ||
45 | #define McaSlotSelect 0x96 | ||
46 | #define McaSlotEnable 0x08 | ||
47 | #define McaIdLow 0x100 | ||
48 | #define McaIdHigh 0x101 | ||
49 | #define McaIrqEnable 0x102 | ||
50 | #define McaMemory 0x103 | ||
51 | #define McaRIOId 0x6a5c | ||
52 | #define McaIrq9 0x00 | ||
53 | #define McaIrq3 0x02 | ||
54 | #define McaIrq4 0x04 | ||
55 | #define McaIrq7 0x06 | ||
56 | #define McaIrq10 0x08 | ||
57 | #define McaIrq11 0x0A | ||
58 | #define McaIrq12 0x0C | ||
59 | #define McaIrq15 0x0E | ||
60 | #define McaIrqMask 0x0E | ||
61 | #define McaCardEnable 0x01 | ||
62 | #define McaAddress(X) (((X)&0xFF)<<16) | ||
63 | |||
64 | #define McaTpFastLinks 0x40 | ||
65 | #define McaTpSlowLinks 0x00 | ||
66 | #define McaTpBootFromRam 0x01 | ||
67 | #define McaTpBootFromLink 0x00 | ||
68 | #define McaTpBusEnable 0x02 | ||
69 | #define McaTpBusDisable 0x00 | ||
70 | |||
71 | #define RIO_MCA_DEFAULT_MODE SLOW_LINKS | ||
72 | |||
73 | #endif /* __rio_mca_h__ */ | ||
diff --git a/drivers/char/rio/mesg.h b/drivers/char/rio/mesg.h deleted file mode 100644 index dd9be586ec6f..000000000000 --- a/drivers/char/rio/mesg.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | * | ||
7 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | ** | ||
23 | ** Module : mesg.h | ||
24 | ** SID : 1.2 | ||
25 | ** Last Modified : 11/6/98 11:34:12 | ||
26 | ** Retrieved : 11/6/98 11:34:21 | ||
27 | ** | ||
28 | ** ident @(#)mesg.h 1.2 | ||
29 | ** | ||
30 | ** ----------------------------------------------------------------------------- | ||
31 | */ | ||
32 | |||
33 | #ifndef __rio_mesg_h__ | ||
34 | #define __rio_mesg_h__ | ||
35 | |||
36 | #ifdef SCCS_LABELS | ||
37 | static char *_mesg_h_sccs_ = "@(#)mesg.h 1.2"; | ||
38 | #endif | ||
39 | |||
40 | |||
41 | #endif /* __rio_mesg_h__ */ | ||
diff --git a/drivers/char/rio/poll.h b/drivers/char/rio/poll.h deleted file mode 100644 index 9616ee4c6cd5..000000000000 --- a/drivers/char/rio/poll.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* P O L L | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Ian Nandhra / Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef _poll_h | ||
38 | #define _poll_h | ||
39 | |||
40 | #ifndef lint | ||
41 | #ifdef SCCS_LABELS | ||
42 | static char *_rio_poll_h_sccs = "@(#)poll.h 1.2"; | ||
43 | #endif | ||
44 | #endif | ||
45 | |||
46 | |||
47 | #ifdef HOST | ||
48 | #define POLL_STACK 100 | ||
49 | #endif | ||
50 | #ifdef RTA | ||
51 | #define POLL_STACK 200 | ||
52 | #endif | ||
53 | |||
54 | #define POLL_PERIOD (int) SECOND | ||
55 | |||
56 | /* The various poll commands */ | ||
57 | #define POLL_POLL 0 /* We are connected and happy.. */ | ||
58 | #define POLL_INTRO 1 /* Introduction packet */ | ||
59 | #define POLL_TOPOLOGY 2 /* Topology update */ | ||
60 | #define POLL_ASSIGN 3 /* ID assign */ | ||
61 | #define POLL_FOAD 4 /* F*** Off And Die */ | ||
62 | #define POLL_LMD 5 /* Let Me Die */ | ||
63 | #define POLL_DYB 6 /* Die You Ba***** */ | ||
64 | |||
65 | /* The way data fields are split up for POLL packets */ | ||
66 | #define POLL_HOST_SERIAL 2 /* Host who booted me */ | ||
67 | #define POLL_MY_SERIAL 6 /* My serial number */ | ||
68 | #define POLL_YOUR_ID 1 /* Your ID number */ | ||
69 | #define POLL_TOPOLOGY_FIELDS 2 /* Topology maps */ | ||
70 | |||
71 | #endif | ||
72 | |||
73 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/proto.h b/drivers/char/rio/proto.h deleted file mode 100644 index f9a3376333e5..000000000000 --- a/drivers/char/rio/proto.h +++ /dev/null | |||
@@ -1,244 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | #ifndef _prototypes_h | ||
20 | #define _prototypes_h | ||
21 | |||
22 | |||
23 | /* | ||
24 | ** boot.c | ||
25 | */ | ||
26 | void init_boot(char *p, short stage); | ||
27 | |||
28 | /* | ||
29 | ** disconct.c | ||
30 | */ | ||
31 | void kill_boot(LPB * link); | ||
32 | void disconnected(LPB * link); | ||
33 | short boot_3(LPB * link, PKT * pkt); | ||
34 | short send_3_pkt(LPB * link, PKT * pkt); | ||
35 | |||
36 | /* | ||
37 | ** error.c | ||
38 | */ | ||
39 | void du_error(void); | ||
40 | |||
41 | /* | ||
42 | ** formpkt.c | ||
43 | */ | ||
44 | ushort sum_it(PKT * pkt); | ||
45 | void form_rup_pkt(RUP * form_rup, PKT * pkt); | ||
46 | void form_poll_pkt(int type, LPB * link, int node); | ||
47 | void form_route_pkt(int type, PKT * pkt, LPB * link); | ||
48 | |||
49 | /* | ||
50 | ** idle.c | ||
51 | */ | ||
52 | void idle(Process * idle_p); | ||
53 | |||
54 | /* | ||
55 | ** init.c | ||
56 | */ | ||
57 | void general_init(void); | ||
58 | void mem_halt(int error); | ||
59 | |||
60 | /* | ||
61 | ** linkinit.c | ||
62 | */ | ||
63 | void initlink(u_short number, LPB * link); | ||
64 | void runlink(LPB * link); | ||
65 | |||
66 | /* | ||
67 | ** list.c | ||
68 | */ | ||
69 | PKT *get_free_start(void); | ||
70 | void put_free_start(PKT * pkt); | ||
71 | |||
72 | #ifdef HOST | ||
73 | int can_remove_transmit(PKT ** pkt, PKT * pointer); | ||
74 | #endif | ||
75 | |||
76 | #ifdef RTA | ||
77 | int spl7(void); | ||
78 | int spl0(void); | ||
79 | Q_BUF *get_free_q(void); | ||
80 | PKT *get_free_end(void); | ||
81 | int add_end(PKT * pkt, PHB * phb, int type); | ||
82 | unsigned short free_packets(PHB * phb, int type); | ||
83 | int can_remove_start(PKT ** pkt, PHB * phb, int type); | ||
84 | int can_add_start(PHB * phb, int type); | ||
85 | int can_add_end(PHB * phb, int type); | ||
86 | void put_free_end(PKT * pkt); | ||
87 | int remove_start(PKT ** pkt, PHB * phb, int type); | ||
88 | #endif | ||
89 | |||
90 | /* | ||
91 | ** Lrt.c | ||
92 | */ | ||
93 | void lrt(Process * lrt_p, LPB * link); | ||
94 | |||
95 | #ifdef RTA | ||
96 | void set_led_red(LPB * link); | ||
97 | #endif | ||
98 | |||
99 | /* | ||
100 | ** ltt.c | ||
101 | */ | ||
102 | void ltt(Process * ltt_p, LPB * link, PHB * phb_ptr[]); | ||
103 | void send_poll(LPB * link); | ||
104 | void request_id(LPB * link); | ||
105 | void send_topology_update(LPB * link); | ||
106 | void send_topology(LPB * link); | ||
107 | void supply_id(LPB * link); | ||
108 | |||
109 | #ifdef RTA | ||
110 | void redirect_queue(LPB * link, ushort flush); | ||
111 | int obtain_rup(int rup_number, PKT ** pkt_address, LPB * link); | ||
112 | #endif | ||
113 | |||
114 | #ifdef TESTING_PERF | ||
115 | int consume_cpu(void); | ||
116 | #endif | ||
117 | |||
118 | /* | ||
119 | ** lttwake.c | ||
120 | */ | ||
121 | #ifdef HOST | ||
122 | void ltt_wakeup(Process * ltt_wakeup_p); | ||
123 | #endif | ||
124 | |||
125 | /* | ||
126 | ** mapgen.c | ||
127 | */ | ||
128 | void generate_id_map(short mapping, ROUTE_STR route[]); | ||
129 | void gen_map(int mapping, int looking_at, int come_from, ROUTE_STR route[], int link, int *ttl); | ||
130 | void adjust_ttl(int mapping, int looking_at, int come_from, ROUTE_STR route[], int link, int *ttl); | ||
131 | void init_sys_map(void); | ||
132 | |||
133 | /* | ||
134 | ** mmu.c | ||
135 | */ | ||
136 | char *rio_malloc(unsigned int amount); | ||
137 | char *rio_calloc(unsigned int num, unsigned int size); | ||
138 | ERROR rio_mmu_init(uint total_mem); | ||
139 | |||
140 | /* | ||
141 | ** partn.c | ||
142 | */ | ||
143 | void partition_tx(struct PHB *phb, u_short tx_size, u_short rx_size, u_short rx_limit); | ||
144 | |||
145 | /* | ||
146 | ** poll.c | ||
147 | */ | ||
148 | void tx_poll(Process * tx_poll_p); | ||
149 | |||
150 | /* | ||
151 | ** process.c | ||
152 | */ | ||
153 | int get_proc_space(Process ** pd, int **pws, int wssize); | ||
154 | |||
155 | /* | ||
156 | ** readrom.c | ||
157 | */ | ||
158 | void read_serial_number(char *buf); | ||
159 | |||
160 | /* | ||
161 | ** rio.c | ||
162 | */ | ||
163 | int main(void); | ||
164 | |||
165 | /* | ||
166 | ** route.c | ||
167 | */ | ||
168 | void route_update(PKT * pkt, LPB * link); | ||
169 | |||
170 | /* | ||
171 | ** rtainit.c | ||
172 | */ | ||
173 | #if defined(RTA) | ||
174 | void rta_init(ushort RtaType); | ||
175 | #endif /* defined(RTA) */ | ||
176 | |||
177 | /* | ||
178 | ** rupboot.c | ||
179 | */ | ||
180 | void rup_boot(PKT * pkt, RUP * this_rup, LPB * link); | ||
181 | |||
182 | #ifdef RTA | ||
183 | void kill_your_neighbour(int link_to_kill); | ||
184 | #endif | ||
185 | |||
186 | /* | ||
187 | ** rupcmd.c | ||
188 | */ | ||
189 | void rup_command(PKT * pkt, struct RUP *this_rup, LPB * link); | ||
190 | |||
191 | /* | ||
192 | ** ruperr.c | ||
193 | */ | ||
194 | void rup_error(PKT * pkt, RUP * this_rup, LPB * link); | ||
195 | void illegal_cmd(PKT * src_pkt); | ||
196 | |||
197 | /* | ||
198 | ** ruppoll.c | ||
199 | */ | ||
200 | void rup_poll(PKT * pkt, RUP * this_rup, LPB * link); | ||
201 | |||
202 | /* | ||
203 | ** ruppower.c | ||
204 | */ | ||
205 | void rup_power(PKT * pkt, RUP * this_rup, LPB * link); | ||
206 | |||
207 | /* | ||
208 | ** ruprm.c | ||
209 | */ | ||
210 | void rup_route_map(PKT * pkt, RUP * this_rup, LPB * link); | ||
211 | |||
212 | /* | ||
213 | ** rupstat.c | ||
214 | */ | ||
215 | void rup_status(PKT * pkt, RUP * this_rup, LPB * link); | ||
216 | |||
217 | /* | ||
218 | ** rupsync.c | ||
219 | */ | ||
220 | void rup_sync(PKT * pkt); | ||
221 | |||
222 | /* | ||
223 | ** rxpkt.c | ||
224 | */ | ||
225 | ERROR rx_pkt(PKT_ptr_ptr pkt_address, LPB * link); | ||
226 | |||
227 | /* | ||
228 | ** sendsts.c | ||
229 | */ | ||
230 | void send_status(PKT * requesting_pkt, RUP * this_rup); | ||
231 | |||
232 | /* | ||
233 | ** serial.c | ||
234 | */ | ||
235 | void assign_serial(char *ser_in, char *ser_out); | ||
236 | int cmp_serial(char *ser_1, char *ser_2); | ||
237 | |||
238 | /* | ||
239 | ** txpkt.c | ||
240 | */ | ||
241 | ERROR tx_pkt(PKT * pkt, LPB * link); | ||
242 | short send_sync(LPB * link); | ||
243 | |||
244 | #endif /* _prototypes_h */ | ||
diff --git a/drivers/char/rio/rio_linux.c b/drivers/char/rio/rio_linux.c index 8825bd61b7d0..c9af283a811d 100644 --- a/drivers/char/rio/rio_linux.c +++ b/drivers/char/rio/rio_linux.c | |||
@@ -132,16 +132,6 @@ more than 512 ports.... */ | |||
132 | */ | 132 | */ |
133 | #define IRQ_RATE_LIMIT 200 | 133 | #define IRQ_RATE_LIMIT 200 |
134 | 134 | ||
135 | #if 0 | ||
136 | /* Not implemented */ | ||
137 | /* | ||
138 | * The following defines are mostly for testing purposes. But if you need | ||
139 | * some nice reporting in your syslog, you can define them also. | ||
140 | */ | ||
141 | #define RIO_REPORT_FIFO | ||
142 | #define RIO_REPORT_OVERRUN | ||
143 | #endif | ||
144 | |||
145 | 135 | ||
146 | /* These constants are derived from SCO Source */ | 136 | /* These constants are derived from SCO Source */ |
147 | static struct Conf | 137 | static struct Conf |
@@ -573,21 +563,6 @@ static void rio_shutdown_port(void *ptr) | |||
573 | 563 | ||
574 | PortP = (struct Port *) ptr; | 564 | PortP = (struct Port *) ptr; |
575 | PortP->gs.tty = NULL; | 565 | PortP->gs.tty = NULL; |
576 | #if 0 | ||
577 | port->gs.flags &= ~GS_ACTIVE; | ||
578 | if (!port->gs.tty) { | ||
579 | rio_dprintk(RIO_DBUG_TTY, "No tty.\n"); | ||
580 | return; | ||
581 | } | ||
582 | if (!port->gs.tty->termios) { | ||
583 | rio_dprintk(RIO_DEBUG_TTY, "No termios.\n"); | ||
584 | return; | ||
585 | } | ||
586 | if (port->gs.tty->termios->c_cflag & HUPCL) { | ||
587 | rio_setsignals(port, 0, 0); | ||
588 | } | ||
589 | #endif | ||
590 | |||
591 | func_exit(); | 566 | func_exit(); |
592 | } | 567 | } |
593 | 568 | ||
@@ -663,11 +638,6 @@ static int rio_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd | |||
663 | 638 | ||
664 | rc = 0; | 639 | rc = 0; |
665 | switch (cmd) { | 640 | switch (cmd) { |
666 | #if 0 | ||
667 | case TIOCGSOFTCAR: | ||
668 | rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0), (unsigned int *) arg); | ||
669 | break; | ||
670 | #endif | ||
671 | case TIOCSSOFTCAR: | 641 | case TIOCSSOFTCAR: |
672 | if ((rc = get_user(ival, (unsigned int *) arg)) == 0) { | 642 | if ((rc = get_user(ival, (unsigned int *) arg)) == 0) { |
673 | tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) | (ival ? CLOCAL : 0); | 643 | tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) | (ival ? CLOCAL : 0); |
@@ -709,36 +679,6 @@ static int rio_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd | |||
709 | if (access_ok(VERIFY_READ, (void *) arg, sizeof(struct serial_struct))) | 679 | if (access_ok(VERIFY_READ, (void *) arg, sizeof(struct serial_struct))) |
710 | rc = gs_setserial(&PortP->gs, (struct serial_struct *) arg); | 680 | rc = gs_setserial(&PortP->gs, (struct serial_struct *) arg); |
711 | break; | 681 | break; |
712 | #if 0 | ||
713 | /* | ||
714 | * note: these IOCTLs no longer reach here. Use | ||
715 | * tiocmset/tiocmget driver methods instead. The | ||
716 | * #if 0 disablement predates this comment. | ||
717 | */ | ||
718 | case TIOCMGET: | ||
719 | rc = -EFAULT; | ||
720 | if (access_ok(VERIFY_WRITE, (void *) arg, sizeof(unsigned int))) { | ||
721 | rc = 0; | ||
722 | ival = rio_getsignals(port); | ||
723 | put_user(ival, (unsigned int *) arg); | ||
724 | } | ||
725 | break; | ||
726 | case TIOCMBIS: | ||
727 | if ((rc = get_user(ival, (unsigned int *) arg)) == 0) { | ||
728 | rio_setsignals(port, ((ival & TIOCM_DTR) ? 1 : -1), ((ival & TIOCM_RTS) ? 1 : -1)); | ||
729 | } | ||
730 | break; | ||
731 | case TIOCMBIC: | ||
732 | if ((rc = get_user(ival, (unsigned int *) arg)) == 0) { | ||
733 | rio_setsignals(port, ((ival & TIOCM_DTR) ? 0 : -1), ((ival & TIOCM_RTS) ? 0 : -1)); | ||
734 | } | ||
735 | break; | ||
736 | case TIOCMSET: | ||
737 | if ((rc = get_user(ival, (unsigned int *) arg)) == 0) { | ||
738 | rio_setsignals(port, ((ival & TIOCM_DTR) ? 1 : 0), ((ival & TIOCM_RTS) ? 1 : 0)); | ||
739 | } | ||
740 | break; | ||
741 | #endif | ||
742 | default: | 682 | default: |
743 | rc = -ENOIOCTLCMD; | 683 | rc = -ENOIOCTLCMD; |
744 | break; | 684 | break; |
diff --git a/drivers/char/rio/rioboot.c b/drivers/char/rio/rioboot.c index 34cbb13aad4b..92df43552f15 100644 --- a/drivers/char/rio/rioboot.c +++ b/drivers/char/rio/rioboot.c | |||
@@ -665,13 +665,6 @@ struct PKT *PacketP; | |||
665 | struct CmdBlk *CmdBlkP; | 665 | struct CmdBlk *CmdBlkP; |
666 | uint sequence; | 666 | uint sequence; |
667 | 667 | ||
668 | #ifdef CHECK | ||
669 | CheckHost(Host); | ||
670 | CheckRup(Rup); | ||
671 | CheckHostP(HostP); | ||
672 | CheckPacketP(PacketP); | ||
673 | #endif | ||
674 | |||
675 | /* | 668 | /* |
676 | ** If we haven't been told what to boot, we can't boot it. | 669 | ** If we haven't been told what to boot, we can't boot it. |
677 | */ | 670 | */ |
@@ -956,11 +949,6 @@ static int RIOBootComplete( struct rio_info *p, struct Host *HostP, uint Rup, st | |||
956 | MyType = "RTA"; | 949 | MyType = "RTA"; |
957 | MyName = HostP->Mapping[Rup].Name; | 950 | MyName = HostP->Mapping[Rup].Name; |
958 | } | 951 | } |
959 | #ifdef CHECK | ||
960 | CheckString(MyType); | ||
961 | CheckString(MyName); | ||
962 | #endif | ||
963 | |||
964 | MyLink = RBYTE(PktCmdP->LinkNum); | 952 | MyLink = RBYTE(PktCmdP->LinkNum); |
965 | 953 | ||
966 | /* | 954 | /* |
@@ -1309,52 +1297,3 @@ struct Host *HostP; | |||
1309 | } | 1297 | } |
1310 | } | 1298 | } |
1311 | 1299 | ||
1312 | #if 0 | ||
1313 | /* | ||
1314 | Function: This function is to disable the disk interrupt | ||
1315 | Returns : Nothing | ||
1316 | */ | ||
1317 | void | ||
1318 | disable_interrupt(vector) | ||
1319 | int vector; | ||
1320 | { | ||
1321 | int ps; | ||
1322 | int val; | ||
1323 | |||
1324 | disable(ps); | ||
1325 | if (vector > 40) { | ||
1326 | val = 1 << (vector - 40); | ||
1327 | __outb(S8259+1, __inb(S8259+1) | val); | ||
1328 | } | ||
1329 | else { | ||
1330 | val = 1 << (vector - 32); | ||
1331 | __outb(M8259+1, __inb(M8259+1) | val); | ||
1332 | } | ||
1333 | restore(ps); | ||
1334 | } | ||
1335 | |||
1336 | /* | ||
1337 | Function: This function is to enable the disk interrupt | ||
1338 | Returns : Nothing | ||
1339 | */ | ||
1340 | void | ||
1341 | enable_interrupt(vector) | ||
1342 | int vector; | ||
1343 | { | ||
1344 | int ps; | ||
1345 | int val; | ||
1346 | |||
1347 | disable(ps); | ||
1348 | if (vector > 40) { | ||
1349 | val = 1 << (vector - 40); | ||
1350 | val = ~val; | ||
1351 | __outb(S8259+1, __inb(S8259+1) & val); | ||
1352 | } | ||
1353 | else { | ||
1354 | val = 1 << (vector - 32); | ||
1355 | val = ~val; | ||
1356 | __outb(M8259+1, __inb(M8259+1) & val); | ||
1357 | } | ||
1358 | restore(ps); | ||
1359 | } | ||
1360 | #endif | ||
diff --git a/drivers/char/rio/riocmd.c b/drivers/char/rio/riocmd.c index b97dd9fdb6ba..694bfb9d9378 100644 --- a/drivers/char/rio/riocmd.c +++ b/drivers/char/rio/riocmd.c | |||
@@ -387,12 +387,6 @@ static int RIOCommandRup(struct rio_info *p, uint Rup, struct Host *HostP, PKT * | |||
387 | 387 | ||
388 | func_enter(); | 388 | func_enter(); |
389 | 389 | ||
390 | #ifdef CHECK | ||
391 | CheckHost(Host); | ||
392 | CheckHostP(HostP); | ||
393 | CheckPacketP(PacketP); | ||
394 | #endif | ||
395 | |||
396 | /* | 390 | /* |
397 | ** 16 port RTA note: | 391 | ** 16 port RTA note: |
398 | ** Command rup packets coming from the RTA will have pkt->data[1] (which | 392 | ** Command rup packets coming from the RTA will have pkt->data[1] (which |
@@ -406,10 +400,6 @@ static int RIOCommandRup(struct rio_info *p, uint Rup, struct Host *HostP, PKT * | |||
406 | SysPort = UnixRupP->BaseSysPort + (RBYTE(PktCmdP->PhbNum) % (ushort) PORTS_PER_RTA); | 400 | SysPort = UnixRupP->BaseSysPort + (RBYTE(PktCmdP->PhbNum) % (ushort) PORTS_PER_RTA); |
407 | rio_dprintk(RIO_DEBUG_CMD, "Command on rup %d, port %d\n", rup, SysPort); | 401 | rio_dprintk(RIO_DEBUG_CMD, "Command on rup %d, port %d\n", rup, SysPort); |
408 | 402 | ||
409 | #ifdef CHECK | ||
410 | CheckRup(rup); | ||
411 | CheckUnixRupP(UnixRupP); | ||
412 | #endif | ||
413 | if (UnixRupP->BaseSysPort == NO_PORT) { | 403 | if (UnixRupP->BaseSysPort == NO_PORT) { |
414 | rio_dprintk(RIO_DEBUG_CMD, "OBSCURE ERROR!\n"); | 404 | rio_dprintk(RIO_DEBUG_CMD, "OBSCURE ERROR!\n"); |
415 | rio_dprintk(RIO_DEBUG_CMD, "Diagnostics follow. Please WRITE THESE DOWN and report them to Specialix Technical Support\n"); | 405 | rio_dprintk(RIO_DEBUG_CMD, "Diagnostics follow. Please WRITE THESE DOWN and report them to Specialix Technical Support\n"); |
@@ -429,9 +419,6 @@ static int RIOCommandRup(struct rio_info *p, uint Rup, struct Host *HostP, PKT * | |||
429 | rio_dprintk(RIO_DEBUG_CMD, "COMMAND information: Host Port Number 0x%x, " "Command Code 0x%x\n", PktCmdP->PhbNum, PktCmdP->Command); | 419 | rio_dprintk(RIO_DEBUG_CMD, "COMMAND information: Host Port Number 0x%x, " "Command Code 0x%x\n", PktCmdP->PhbNum, PktCmdP->Command); |
430 | return TRUE; | 420 | return TRUE; |
431 | } | 421 | } |
432 | #ifdef CHECK | ||
433 | CheckSysPort(SysPort); | ||
434 | #endif | ||
435 | PortP = p->RIOPortp[SysPort]; | 422 | PortP = p->RIOPortp[SysPort]; |
436 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 423 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
437 | switch (RBYTE(PktCmdP->Command)) { | 424 | switch (RBYTE(PktCmdP->Command)) { |
@@ -604,11 +591,6 @@ int RIOQueueCmdBlk(struct Host *HostP, uint Rup, struct CmdBlk *CmdBlkP) | |||
604 | struct UnixRup *UnixRupP; | 591 | struct UnixRup *UnixRupP; |
605 | unsigned long flags; | 592 | unsigned long flags; |
606 | 593 | ||
607 | #ifdef CHECK | ||
608 | CheckHostP(HostP); | ||
609 | CheckRup(Rup); | ||
610 | CheckCmdBlkP(CmdBlkP); | ||
611 | #endif | ||
612 | if (Rup >= (ushort) (MAX_RUP + LINKS_PER_UNIT)) { | 594 | if (Rup >= (ushort) (MAX_RUP + LINKS_PER_UNIT)) { |
613 | rio_dprintk(RIO_DEBUG_CMD, "Illegal rup number %d in RIOQueueCmdBlk\n", Rup); | 595 | rio_dprintk(RIO_DEBUG_CMD, "Illegal rup number %d in RIOQueueCmdBlk\n", Rup); |
614 | RIOFreeCmdBlk(CmdBlkP); | 596 | RIOFreeCmdBlk(CmdBlkP); |
@@ -806,9 +788,6 @@ void RIOPollHostCommands(struct rio_info *p, struct Host *HostP) | |||
806 | ** If it returns RIO_FAIL then don't | 788 | ** If it returns RIO_FAIL then don't |
807 | ** send this command yet! | 789 | ** send this command yet! |
808 | */ | 790 | */ |
809 | #ifdef CHECK | ||
810 | CheckCmdBlkP(CmdBlkP); | ||
811 | #endif | ||
812 | if (!(CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP) : TRUE)) { | 791 | if (!(CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP) : TRUE)) { |
813 | rio_dprintk(RIO_DEBUG_CMD, "Not ready to start command 0x%x\n", (int) CmdBlkP); | 792 | rio_dprintk(RIO_DEBUG_CMD, "Not ready to start command 0x%x\n", (int) CmdBlkP); |
814 | } else { | 793 | } else { |
@@ -816,9 +795,6 @@ void RIOPollHostCommands(struct rio_info *p, struct Host *HostP) | |||
816 | /* | 795 | /* |
817 | ** Whammy! blat that pack! | 796 | ** Whammy! blat that pack! |
818 | */ | 797 | */ |
819 | #ifdef CHECK | ||
820 | CheckPacketP((PKT *) RIO_PTR(HostP->Caddr, UnixRupP->RupP->txpkt)); | ||
821 | #endif | ||
822 | HostP->Copy((caddr_t) & CmdBlkP->Packet, RIO_PTR(HostP->Caddr, UnixRupP->RupP->txpkt), sizeof(PKT)); | 798 | HostP->Copy((caddr_t) & CmdBlkP->Packet, RIO_PTR(HostP->Caddr, UnixRupP->RupP->txpkt), sizeof(PKT)); |
823 | 799 | ||
824 | /* | 800 | /* |
@@ -852,9 +828,6 @@ int RIOWFlushMark(int iPortP, struct CmdBlk *CmdBlkP) | |||
852 | unsigned long flags; | 828 | unsigned long flags; |
853 | 829 | ||
854 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 830 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
855 | #ifdef CHECK | ||
856 | CheckPortP(PortP); | ||
857 | #endif | ||
858 | PortP->WflushFlag++; | 831 | PortP->WflushFlag++; |
859 | PortP->MagicFlags |= MAGIC_FLUSH; | 832 | PortP->MagicFlags |= MAGIC_FLUSH; |
860 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | 833 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); |
@@ -894,9 +867,6 @@ int RIOUnUse(int iPortP, struct CmdBlk *CmdBlkP) | |||
894 | 867 | ||
895 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 868 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
896 | 869 | ||
897 | #ifdef CHECK | ||
898 | CheckPortP(PortP); | ||
899 | #endif | ||
900 | rio_dprintk(RIO_DEBUG_CMD, "Decrement in use count for port\n"); | 870 | rio_dprintk(RIO_DEBUG_CMD, "Decrement in use count for port\n"); |
901 | 871 | ||
902 | if (PortP->InUse) { | 872 | if (PortP->InUse) { |
diff --git a/drivers/char/rio/rioctrl.c b/drivers/char/rio/rioctrl.c index 0b7700d2f049..fcf18a061228 100644 --- a/drivers/char/rio/rioctrl.c +++ b/drivers/char/rio/rioctrl.c | |||
@@ -308,12 +308,7 @@ int su; | |||
308 | } | 308 | } |
309 | 309 | ||
310 | case RIO_DEBUG_MEM: | 310 | case RIO_DEBUG_MEM: |
311 | #ifdef DEBUG_MEM_SUPPORT | 311 | return -EPERM; |
312 | RIO_DEBUG_CTRL, if (su) | ||
313 | return rio_RIODebugMemory(RIO_DEBUG_CTRL, arg); | ||
314 | else | ||
315 | #endif | ||
316 | return -EPERM; | ||
317 | 312 | ||
318 | case RIO_ALL_MODEM: | 313 | case RIO_ALL_MODEM: |
319 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_ALL_MODEM\n"); | 314 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_ALL_MODEM\n"); |
@@ -591,12 +586,7 @@ int su; | |||
591 | 586 | ||
592 | case RIO_GET_LOG: | 587 | case RIO_GET_LOG: |
593 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_LOG\n"); | 588 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_LOG\n"); |
594 | #ifdef LOGGING | ||
595 | RIOGetLog(arg); | ||
596 | return 0; | ||
597 | #else | ||
598 | return -EINVAL; | 589 | return -EINVAL; |
599 | #endif | ||
600 | 590 | ||
601 | case RIO_GET_MODTYPE: | 591 | case RIO_GET_MODTYPE: |
602 | if (copyin((int) arg, (caddr_t) & port, sizeof(uint)) == COPYFAIL) { | 592 | if (copyin((int) arg, (caddr_t) & port, sizeof(uint)) == COPYFAIL) { |
@@ -684,52 +674,6 @@ int su; | |||
684 | rio_dprintk(RIO_DEBUG_CTRL, "entering loop (%d %d)!\n", PortSetup.From, PortSetup.To); | 674 | rio_dprintk(RIO_DEBUG_CTRL, "entering loop (%d %d)!\n", PortSetup.From, PortSetup.To); |
685 | for (loop = PortSetup.From; loop <= PortSetup.To; loop++) { | 675 | for (loop = PortSetup.From; loop <= PortSetup.To; loop++) { |
686 | rio_dprintk(RIO_DEBUG_CTRL, "in loop (%d)!\n", loop); | 676 | rio_dprintk(RIO_DEBUG_CTRL, "in loop (%d)!\n", loop); |
687 | #if 0 | ||
688 | PortP = p->RIOPortp[loop]; | ||
689 | if (!PortP->TtyP) | ||
690 | PortP->TtyP = &p->channel[loop]; | ||
691 | |||
692 | rio_spin_lock_irqsave(&PortP->portSem, flags); | ||
693 | if (PortSetup.IxAny) | ||
694 | PortP->Config |= RIO_IXANY; | ||
695 | else | ||
696 | PortP->Config &= ~RIO_IXANY; | ||
697 | if (PortSetup.IxOn) | ||
698 | PortP->Config |= RIO_IXON; | ||
699 | else | ||
700 | PortP->Config &= ~RIO_IXON; | ||
701 | |||
702 | /* | ||
703 | ** If the port needs to wait for all a processes output | ||
704 | ** to drain before closing then this flag will be set. | ||
705 | */ | ||
706 | if (PortSetup.Drain) { | ||
707 | PortP->Config |= RIO_WAITDRAIN; | ||
708 | } else { | ||
709 | PortP->Config &= ~RIO_WAITDRAIN; | ||
710 | } | ||
711 | /* | ||
712 | ** Store settings if locking or unlocking port or if the | ||
713 | ** port is not locked, when setting the store option. | ||
714 | */ | ||
715 | if (PortP->Mapped && ((PortSetup.Lock && !PortP->Lock) || (!PortP->Lock && (PortSetup.Store && !PortP->Store)))) { | ||
716 | PortP->StoredTty.iflag = PortP->TtyP->tm.c_iflag; | ||
717 | PortP->StoredTty.oflag = PortP->TtyP->tm.c_oflag; | ||
718 | PortP->StoredTty.cflag = PortP->TtyP->tm.c_cflag; | ||
719 | PortP->StoredTty.lflag = PortP->TtyP->tm.c_lflag; | ||
720 | PortP->StoredTty.line = PortP->TtyP->tm.c_line; | ||
721 | bcopy(PortP->TtyP->tm.c_cc, PortP->StoredTty.cc, NCC + 5); | ||
722 | } | ||
723 | PortP->Lock = PortSetup.Lock; | ||
724 | PortP->Store = PortSetup.Store; | ||
725 | PortP->Xprint.XpCps = PortSetup.XpCps; | ||
726 | bcopy(PortSetup.XpOn, PortP->Xprint.XpOn, MAX_XP_CTRL_LEN); | ||
727 | bcopy(PortSetup.XpOff, PortP->Xprint.XpOff, MAX_XP_CTRL_LEN); | ||
728 | PortP->Xprint.XpOn[MAX_XP_CTRL_LEN - 1] = '\0'; | ||
729 | PortP->Xprint.XpOff[MAX_XP_CTRL_LEN - 1] = '\0'; | ||
730 | PortP->Xprint.XpLen = RIOStrlen(PortP->Xprint.XpOn) + RIOStrlen(PortP->Xprint.XpOff); | ||
731 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
732 | #endif | ||
733 | } | 677 | } |
734 | rio_dprintk(RIO_DEBUG_CTRL, "after loop (%d)!\n", loop); | 678 | rio_dprintk(RIO_DEBUG_CTRL, "after loop (%d)!\n", loop); |
735 | rio_dprintk(RIO_DEBUG_CTRL, "Retval:%x\n", retval); | 679 | rio_dprintk(RIO_DEBUG_CTRL, "Retval:%x\n", retval); |
@@ -801,12 +745,6 @@ int su; | |||
801 | 745 | ||
802 | rio_dprintk(RIO_DEBUG_CTRL, "Port %d\n", PortTty.port); | 746 | rio_dprintk(RIO_DEBUG_CTRL, "Port %d\n", PortTty.port); |
803 | PortP = (p->RIOPortp[PortTty.port]); | 747 | PortP = (p->RIOPortp[PortTty.port]); |
804 | #if 0 | ||
805 | PortTty.Tty.tm.c_iflag = PortP->TtyP->tm.c_iflag; | ||
806 | PortTty.Tty.tm.c_oflag = PortP->TtyP->tm.c_oflag; | ||
807 | PortTty.Tty.tm.c_cflag = PortP->TtyP->tm.c_cflag; | ||
808 | PortTty.Tty.tm.c_lflag = PortP->TtyP->tm.c_lflag; | ||
809 | #endif | ||
810 | if (copyout((caddr_t) & PortTty, (int) arg, sizeof(struct PortTty)) == COPYFAIL) { | 748 | if (copyout((caddr_t) & PortTty, (int) arg, sizeof(struct PortTty)) == COPYFAIL) { |
811 | p->RIOError.Error = COPYOUT_FAILED; | 749 | p->RIOError.Error = COPYOUT_FAILED; |
812 | return -EFAULT; | 750 | return -EFAULT; |
@@ -824,15 +762,6 @@ int su; | |||
824 | return -ENXIO; | 762 | return -ENXIO; |
825 | } | 763 | } |
826 | PortP = (p->RIOPortp[PortTty.port]); | 764 | PortP = (p->RIOPortp[PortTty.port]); |
827 | #if 0 | ||
828 | rio_spin_lock_irqsave(&PortP->portSem, flags); | ||
829 | PortP->TtyP->tm.c_iflag = PortTty.Tty.tm.c_iflag; | ||
830 | PortP->TtyP->tm.c_oflag = PortTty.Tty.tm.c_oflag; | ||
831 | PortP->TtyP->tm.c_cflag = PortTty.Tty.tm.c_cflag; | ||
832 | PortP->TtyP->tm.c_lflag = PortTty.Tty.tm.c_lflag; | ||
833 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
834 | #endif | ||
835 | |||
836 | RIOParam(PortP, CONFIG, PortP->State & RIO_MODEM, OK_TO_SLEEP); | 765 | RIOParam(PortP, CONFIG, PortP->State & RIO_MODEM, OK_TO_SLEEP); |
837 | return retval; | 766 | return retval; |
838 | 767 | ||
@@ -909,23 +838,6 @@ int su; | |||
909 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | 838 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); |
910 | return retval; | 839 | return retval; |
911 | 840 | ||
912 | #ifdef DEBUG_SUPPORTED | ||
913 | case RIO_READ_LEVELS: | ||
914 | { | ||
915 | int num; | ||
916 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_LEVELS\n"); | ||
917 | for (num = 0; RIODbInf[num].Flag; num++); | ||
918 | rio_dprintk(RIO_DEBUG_CTRL, "%d levels to copy\n", num); | ||
919 | if (copyout((caddr_t) RIODbInf, (int) arg, sizeof(struct DbInf) * (num + 1)) == COPYFAIL) { | ||
920 | rio_dprintk(RIO_DEBUG_CTRL, "ReadLevels Copy failed\n"); | ||
921 | p->RIOError.Error = COPYOUT_FAILED; | ||
922 | return -EFAULT; | ||
923 | } | ||
924 | rio_dprintk(RIO_DEBUG_CTRL, "%d levels to copied\n", num); | ||
925 | return retval; | ||
926 | } | ||
927 | #endif | ||
928 | |||
929 | case RIO_READ_CONFIG: | 841 | case RIO_READ_CONFIG: |
930 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_CONFIG\n"); | 842 | rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_CONFIG\n"); |
931 | if (copyout((caddr_t) & p->RIOConf, (int) arg, sizeof(struct Conf)) == COPYFAIL) { | 843 | if (copyout((caddr_t) & p->RIOConf, (int) arg, sizeof(struct Conf)) == COPYFAIL) { |
@@ -1084,30 +996,13 @@ int su; | |||
1084 | (void) RIOBoardTest(p->RIOHosts[Host].PaddrP, p->RIOHosts[Host].Caddr, p->RIOHosts[Host].Type, p->RIOHosts[Host].Slot); | 996 | (void) RIOBoardTest(p->RIOHosts[Host].PaddrP, p->RIOHosts[Host].Caddr, p->RIOHosts[Host].Type, p->RIOHosts[Host].Slot); |
1085 | bzero((caddr_t) & p->RIOHosts[Host].Flags, ((int) &p->RIOHosts[Host].____end_marker____) - ((int) &p->RIOHosts[Host].Flags)); | 997 | bzero((caddr_t) & p->RIOHosts[Host].Flags, ((int) &p->RIOHosts[Host].____end_marker____) - ((int) &p->RIOHosts[Host].Flags)); |
1086 | p->RIOHosts[Host].Flags = RC_WAITING; | 998 | p->RIOHosts[Host].Flags = RC_WAITING; |
1087 | #if 0 | ||
1088 | RIOSetupDataStructs(p); | ||
1089 | #endif | ||
1090 | } | 999 | } |
1091 | RIOFoadWakeup(p); | 1000 | RIOFoadWakeup(p); |
1092 | p->RIONumBootPkts = 0; | 1001 | p->RIONumBootPkts = 0; |
1093 | p->RIOBooting = 0; | 1002 | p->RIOBooting = 0; |
1094 | |||
1095 | #ifdef RINGBUFFER_SUPPORT | ||
1096 | for (loop = 0; loop < RIO_PORTS; loop++) | ||
1097 | if (p->RIOPortp[loop]->TxRingBuffer) | ||
1098 | sysfree((void *) p->RIOPortp[loop]->TxRingBuffer, RIOBufferSize); | ||
1099 | #endif | ||
1100 | #if 0 | ||
1101 | bzero((caddr_t) & p->RIOPortp[0], RIO_PORTS * sizeof(struct Port)); | ||
1102 | #else | ||
1103 | printk("HEEEEELP!\n"); | 1003 | printk("HEEEEELP!\n"); |
1104 | #endif | ||
1105 | 1004 | ||
1106 | for (loop = 0; loop < RIO_PORTS; loop++) { | 1005 | for (loop = 0; loop < RIO_PORTS; loop++) { |
1107 | #if 0 | ||
1108 | p->RIOPortp[loop]->TtyP = &p->channel[loop]; | ||
1109 | #endif | ||
1110 | |||
1111 | spin_lock_init(&p->RIOPortp[loop]->portSem); | 1006 | spin_lock_init(&p->RIOPortp[loop]->portSem); |
1112 | p->RIOPortp[loop]->InUse = NOT_INUSE; | 1007 | p->RIOPortp[loop]->InUse = NOT_INUSE; |
1113 | } | 1008 | } |
@@ -1653,10 +1548,6 @@ uchar Cmd; | |||
1653 | ushort rup; | 1548 | ushort rup; |
1654 | int port; | 1549 | int port; |
1655 | 1550 | ||
1656 | #ifdef CHECK | ||
1657 | CheckPortP(PortP); | ||
1658 | #endif | ||
1659 | |||
1660 | if (PortP->State & RIO_DELETED) { | 1551 | if (PortP->State & RIO_DELETED) { |
1661 | rio_dprintk(RIO_DEBUG_CTRL, "Preemptive command to deleted RTA ignored\n"); | 1552 | rio_dprintk(RIO_DEBUG_CTRL, "Preemptive command to deleted RTA ignored\n"); |
1662 | return RIO_FAIL; | 1553 | return RIO_FAIL; |
diff --git a/drivers/char/rio/rioinit.c b/drivers/char/rio/rioinit.c index 898a126ae3e6..0d44ef464e6b 100644 --- a/drivers/char/rio/rioinit.c +++ b/drivers/char/rio/rioinit.c | |||
@@ -87,222 +87,8 @@ static char *_rioinit_c_sccs_ = "@(#)rioinit.c 1.3"; | |||
87 | 87 | ||
88 | int RIOPCIinit(struct rio_info *p, int Mode); | 88 | int RIOPCIinit(struct rio_info *p, int Mode); |
89 | 89 | ||
90 | #if 0 | ||
91 | static void RIOAllocateInterrupts(struct rio_info *); | ||
92 | static int RIOReport(struct rio_info *); | ||
93 | static void RIOStopInterrupts(struct rio_info *, int, int); | ||
94 | #endif | ||
95 | |||
96 | static int RIOScrub(int, BYTE *, int); | 90 | static int RIOScrub(int, BYTE *, int); |
97 | 91 | ||
98 | #if 0 | ||
99 | extern int rio_intr(); | ||
100 | |||
101 | /* | ||
102 | ** Init time code. | ||
103 | */ | ||
104 | void | ||
105 | rioinit( p, info ) | ||
106 | struct rio_info * p; | ||
107 | struct RioHostInfo * info; | ||
108 | { | ||
109 | /* | ||
110 | ** Multi-Host card support - taking the easy way out - sorry ! | ||
111 | ** We allocate and set up the Host and Port structs when the | ||
112 | ** driver is called to 'install' the first host. | ||
113 | ** We check for this first 'call' by testing the RIOPortp pointer. | ||
114 | */ | ||
115 | if ( !p->RIOPortp ) | ||
116 | { | ||
117 | rio_dprintk (RIO_DEBUG_INIT, "Allocating and setting up driver data structures\n"); | ||
118 | |||
119 | RIOAllocDataStructs(p); /* allocate host/port structs */ | ||
120 | RIOSetupDataStructs(p); /* setup topology structs */ | ||
121 | } | ||
122 | |||
123 | RIOInitHosts( p, info ); /* hunt down the hardware */ | ||
124 | |||
125 | RIOAllocateInterrupts(p); /* allocate interrupts */ | ||
126 | RIOReport(p); /* show what we found */ | ||
127 | } | ||
128 | |||
129 | /* | ||
130 | ** Initialise the Cards | ||
131 | */ | ||
132 | void | ||
133 | RIOInitHosts(p, info) | ||
134 | struct rio_info * p; | ||
135 | struct RioHostInfo * info; | ||
136 | { | ||
137 | /* | ||
138 | ** 15.10.1998 ARG - ESIL 0762 part fix | ||
139 | ** If there is no ISA card definition - we always look for PCI cards. | ||
140 | ** As we currently only support one host card this lets an ISA card | ||
141 | ** definition take precedence over PLUG and PLAY. | ||
142 | ** No ISA card - we are PLUG and PLAY with PCI. | ||
143 | */ | ||
144 | |||
145 | /* | ||
146 | ** Note - for PCI both these will be zero, that's okay because | ||
147 | ** RIOPCIInit() fills them in if a card is found. | ||
148 | */ | ||
149 | p->RIOHosts[p->RIONumHosts].Ivec = info->vector; | ||
150 | p->RIOHosts[p->RIONumHosts].PaddrP = info->location; | ||
151 | |||
152 | /* | ||
153 | ** Check that we are able to accommodate another host | ||
154 | */ | ||
155 | if ( p->RIONumHosts >= RIO_HOSTS ) | ||
156 | { | ||
157 | p->RIOFailed++; | ||
158 | return; | ||
159 | } | ||
160 | |||
161 | if ( info->bus & ISA_BUS ) | ||
162 | { | ||
163 | rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (ISA)\n", p->RIONumHosts); | ||
164 | RIOISAinit(p, p->mode); | ||
165 | } | ||
166 | else | ||
167 | { | ||
168 | rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (PCI)\n", p->RIONumHosts); | ||
169 | RIOPCIinit(p, RIO_PCI_DEFAULT_MODE); | ||
170 | } | ||
171 | |||
172 | rio_dprintk (RIO_DEBUG_INIT, "Total hosts initialised so far : %d\n", p->RIONumHosts); | ||
173 | |||
174 | |||
175 | #ifdef FUTURE_RELEASE | ||
176 | if (p->bus & EISA_BUS) | ||
177 | /* EISA card */ | ||
178 | RIOEISAinit(p, RIO_EISA_DEFAULT_MODE); | ||
179 | |||
180 | if (p->bus & MCA_BUS) | ||
181 | /* MCA card */ | ||
182 | RIOMCAinit(p, RIO_MCA_DEFAULT_MODE); | ||
183 | #endif | ||
184 | } | ||
185 | |||
186 | /* | ||
187 | ** go through memory for an AT host that we pass in the device info | ||
188 | ** structure and initialise | ||
189 | */ | ||
190 | void | ||
191 | RIOISAinit(p, mode) | ||
192 | struct rio_info * p; | ||
193 | int mode; | ||
194 | { | ||
195 | |||
196 | /* XXX Need to implement this. */ | ||
197 | #if 0 | ||
198 | p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec, | ||
199 | (int (*)())rio_intr, (char*)p->RIONumHosts); | ||
200 | |||
201 | rio_dprintk (RIO_DEBUG_INIT, "Set interrupt handler, intr_tid = 0x%x\n", p->intr_tid ); | ||
202 | |||
203 | if (RIODoAT(p, p->RIOHosts[p->RIONumHosts].PaddrP, mode)) { | ||
204 | return; | ||
205 | } | ||
206 | else { | ||
207 | rio_dprintk (RIO_DEBUG_INIT, "RIODoAT failed\n"); | ||
208 | p->RIOFailed++; | ||
209 | } | ||
210 | #endif | ||
211 | |||
212 | } | ||
213 | |||
214 | /* | ||
215 | ** RIODoAT : | ||
216 | ** | ||
217 | ** Map in a boards physical address, check that the board is there, | ||
218 | ** test the board and if everything is okay assign the board an entry | ||
219 | ** in the Rio Hosts structure. | ||
220 | */ | ||
221 | int | ||
222 | RIODoAT(p, Base, mode) | ||
223 | struct rio_info * p; | ||
224 | int Base; | ||
225 | int mode; | ||
226 | { | ||
227 | #define FOUND 1 | ||
228 | #define NOT_FOUND 0 | ||
229 | |||
230 | caddr_t cardAddr; | ||
231 | |||
232 | /* | ||
233 | ** Check to see if we actually have a board at this physical address. | ||
234 | */ | ||
235 | if ((cardAddr = RIOCheckForATCard(Base)) != 0) { | ||
236 | /* | ||
237 | ** Now test the board to see if it is working. | ||
238 | */ | ||
239 | if (RIOBoardTest(Base, cardAddr, RIO_AT, 0) == RIO_SUCCESS) { | ||
240 | /* | ||
241 | ** Fill out a slot in the Rio host structure. | ||
242 | */ | ||
243 | if (RIOAssignAT(p, Base, cardAddr, mode)) { | ||
244 | return(FOUND); | ||
245 | } | ||
246 | } | ||
247 | RIOMapout(Base, RIO_AT_MEM_SIZE, cardAddr); | ||
248 | } | ||
249 | return(NOT_FOUND); | ||
250 | } | ||
251 | |||
252 | caddr_t | ||
253 | RIOCheckForATCard(Base) | ||
254 | int Base; | ||
255 | { | ||
256 | int off; | ||
257 | struct DpRam *cardp; /* (Points at the host) */ | ||
258 | caddr_t virtAddr; | ||
259 | unsigned char RIOSigTab[24]; | ||
260 | /* | ||
261 | ** Table of values to search for as prom signature of a host card | ||
262 | */ | ||
263 | strcpy(RIOSigTab, "JBJGPGGHINSMJPJR"); | ||
264 | |||
265 | /* | ||
266 | ** Hey! Yes, You reading this code! Yo, grab a load a this: | ||
267 | ** | ||
268 | ** IF the card is using WORD MODE rather than BYTE MODE | ||
269 | ** then it will occupy 128K of PHYSICAL memory area. So, | ||
270 | ** you might think that the following Mapin is wrong. Well, | ||
271 | ** it isn't, because the SECOND 64K of occupied space is an | ||
272 | ** EXACT COPY of the FIRST 64K. (good?), so, we need only | ||
273 | ** map it in in one 64K block. | ||
274 | */ | ||
275 | if (RIOMapin(Base, RIO_AT_MEM_SIZE, &virtAddr) == -1) { | ||
276 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't map the board in!\n"); | ||
277 | return((caddr_t)0); | ||
278 | } | ||
279 | |||
280 | /* | ||
281 | ** virtAddr points to the DP ram of the system. | ||
282 | ** We now cast this to a pointer to a RIO Host, | ||
283 | ** and have a rummage about in the PROM. | ||
284 | */ | ||
285 | cardp = (struct DpRam *)virtAddr; | ||
286 | |||
287 | for (off=0; RIOSigTab[off]; off++) { | ||
288 | if ((RBYTE(cardp->DpSignature[off]) & 0xFF) != RIOSigTab[off]) { | ||
289 | /* | ||
290 | ** Signature mismatch - card not at this address | ||
291 | */ | ||
292 | RIOMapout(Base, RIO_AT_MEM_SIZE, virtAddr); | ||
293 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't match the signature 0x%x 0x%x!\n", | ||
294 | (int)cardp, off); | ||
295 | return((caddr_t)0); | ||
296 | } | ||
297 | } | ||
298 | |||
299 | /* | ||
300 | ** If we get here then we must have found a valid board so return | ||
301 | ** its virtual address. | ||
302 | */ | ||
303 | return(virtAddr); | ||
304 | } | ||
305 | #endif | ||
306 | 92 | ||
307 | /** | 93 | /** |
308 | ** RIOAssignAT : | 94 | ** RIOAssignAT : |
@@ -367,667 +153,6 @@ int mode; | |||
367 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base); | 153 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base); |
368 | return(1); | 154 | return(1); |
369 | } | 155 | } |
370 | #if 0 | ||
371 | #ifdef FUTURE_RELEASE | ||
372 | int RIOMCAinit(int Mode) | ||
373 | { | ||
374 | uchar SlotNumber; | ||
375 | caddr_t Caddr; | ||
376 | uint Paddr; | ||
377 | uint Ivec; | ||
378 | int Handle; | ||
379 | int ret = 0; | ||
380 | |||
381 | /* | ||
382 | ** Valid mode information for MCA cards | ||
383 | ** is only FAST LINKS | ||
384 | */ | ||
385 | Mode = (Mode & FAST_LINKS) ? McaTpFastLinks : McaTpSlowLinks; | ||
386 | rio_dprintk (RIO_DEBUG_INIT, "RIOMCAinit(%d)\n",Mode); | ||
387 | |||
388 | |||
389 | /* | ||
390 | ** Check out each of the slots | ||
391 | */ | ||
392 | for (SlotNumber = 0; SlotNumber < McaMaxSlots; SlotNumber++) { | ||
393 | /* | ||
394 | ** Enable the slot we want to talk to | ||
395 | */ | ||
396 | outb( McaSlotSelect, SlotNumber | McaSlotEnable ); | ||
397 | |||
398 | /* | ||
399 | ** Read the ID word from the slot | ||
400 | */ | ||
401 | if (((inb(McaIdHigh)<< 8)|inb(McaIdLow)) == McaRIOId) | ||
402 | { | ||
403 | rio_dprintk (RIO_DEBUG_INIT, "Potential MCA card in slot %d\n", SlotNumber); | ||
404 | |||
405 | /* | ||
406 | ** Card appears to be a RIO MCA card! | ||
407 | */ | ||
408 | RIOMachineType |= (1<<RIO_MCA); | ||
409 | |||
410 | /* | ||
411 | ** Just check we haven't found too many wonderful objects | ||
412 | */ | ||
413 | if ( RIONumHosts >= RIO_HOSTS ) | ||
414 | { | ||
415 | Rprintf(RIOMesgTooManyCards); | ||
416 | return(ret); | ||
417 | } | ||
418 | |||
419 | /* | ||
420 | ** McaIrqEnable contains the interrupt vector, and a card | ||
421 | ** enable bit. | ||
422 | */ | ||
423 | Ivec = inb(McaIrqEnable); | ||
424 | |||
425 | rio_dprintk (RIO_DEBUG_INIT, "Ivec is %x\n", Ivec); | ||
426 | |||
427 | switch ( Ivec & McaIrqMask ) | ||
428 | { | ||
429 | case McaIrq9: | ||
430 | rio_dprintk (RIO_DEBUG_INIT, "IRQ9\n"); | ||
431 | break; | ||
432 | case McaIrq3: | ||
433 | rio_dprintk (RIO_DEBUG_INIT, "IRQ3\n"); | ||
434 | break; | ||
435 | case McaIrq4: | ||
436 | rio_dprintk (RIO_DEBUG_INIT, "IRQ4\n"); | ||
437 | break; | ||
438 | case McaIrq7: | ||
439 | rio_dprintk (RIO_DEBUG_INIT, "IRQ7\n"); | ||
440 | break; | ||
441 | case McaIrq10: | ||
442 | rio_dprintk (RIO_DEBUG_INIT, "IRQ10\n"); | ||
443 | break; | ||
444 | case McaIrq11: | ||
445 | rio_dprintk (RIO_DEBUG_INIT, "IRQ11\n"); | ||
446 | break; | ||
447 | case McaIrq12: | ||
448 | rio_dprintk (RIO_DEBUG_INIT, "IRQ12\n"); | ||
449 | break; | ||
450 | case McaIrq15: | ||
451 | rio_dprintk (RIO_DEBUG_INIT, "IRQ15\n"); | ||
452 | break; | ||
453 | } | ||
454 | |||
455 | /* | ||
456 | ** If the card enable bit isn't set, then set it! | ||
457 | */ | ||
458 | if ((Ivec & McaCardEnable) != McaCardEnable) { | ||
459 | rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable not set - setting!\n"); | ||
460 | outb(McaIrqEnable,Ivec|McaCardEnable); | ||
461 | } else | ||
462 | rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable already set\n"); | ||
463 | |||
464 | /* | ||
465 | ** Convert the IRQ enable mask into something useful | ||
466 | */ | ||
467 | Ivec = RIOMcaToIvec[Ivec & McaIrqMask]; | ||
468 | |||
469 | /* | ||
470 | ** Find the physical address | ||
471 | */ | ||
472 | rio_dprintk (RIO_DEBUG_INIT, "inb(McaMemory) is %x\n", inb(McaMemory)); | ||
473 | Paddr = McaAddress(inb(McaMemory)); | ||
474 | |||
475 | rio_dprintk (RIO_DEBUG_INIT, "MCA card has Ivec %d Addr %x\n", Ivec, Paddr); | ||
476 | |||
477 | if ( Paddr != 0 ) | ||
478 | { | ||
479 | |||
480 | /* | ||
481 | ** Tell the memory mapper that we want to talk to it | ||
482 | */ | ||
483 | Handle = RIOMapin( Paddr, RIO_MCA_MEM_SIZE, &Caddr ); | ||
484 | |||
485 | if ( Handle == -1 ) { | ||
486 | rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n", RIO_MCA_MEM_SIZE, Paddr; | ||
487 | continue; | ||
488 | } | ||
489 | |||
490 | rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr); | ||
491 | |||
492 | /* | ||
493 | ** And check that it is actually there! | ||
494 | */ | ||
495 | if ( RIOBoardTest( Paddr,Caddr,RIO_MCA,SlotNumber ) == RIO_SUCCESS ) | ||
496 | { | ||
497 | rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n"); | ||
498 | rio_dprintk (RIO_DEBUG_INIT, "Slot %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", | ||
499 | SlotNumber, RIO_MCA, Paddr, Caddr, Mode); | ||
500 | |||
501 | /* | ||
502 | ** Board has passed its scrub test. Fill in all the | ||
503 | ** transient stuff. | ||
504 | */ | ||
505 | p->RIOHosts[RIONumHosts].Slot = SlotNumber; | ||
506 | p->RIOHosts[RIONumHosts].Ivec = Ivec; | ||
507 | p->RIOHosts[RIONumHosts].Type = RIO_MCA; | ||
508 | p->RIOHosts[RIONumHosts].Copy = bcopy; | ||
509 | p->RIOHosts[RIONumHosts].PaddrP = Paddr; | ||
510 | p->RIOHosts[RIONumHosts].Caddr = Caddr; | ||
511 | p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr; | ||
512 | p->RIOHosts[RIONumHosts].Mode = Mode; | ||
513 | WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt , 0xff); | ||
514 | p->RIOHosts[RIONumHosts].UniqueNum = | ||
515 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)| | ||
516 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)| | ||
517 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)| | ||
518 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24); | ||
519 | RIONumHosts++; | ||
520 | ret++; | ||
521 | } | ||
522 | else | ||
523 | { | ||
524 | /* | ||
525 | ** It failed the test, so ignore it. | ||
526 | */ | ||
527 | rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n"); | ||
528 | RIOMapout(Paddr, RIO_MCA_MEM_SIZE, Caddr ); | ||
529 | } | ||
530 | } | ||
531 | else | ||
532 | { | ||
533 | rio_dprintk (RIO_DEBUG_INIT, "Slot %d - Paddr zero!\n", SlotNumber); | ||
534 | } | ||
535 | } | ||
536 | else | ||
537 | { | ||
538 | rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber); | ||
539 | } | ||
540 | } | ||
541 | /* | ||
542 | ** Now we have checked all the slots, turn off the MCA slot selector | ||
543 | */ | ||
544 | outb(McaSlotSelect,0); | ||
545 | rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber); | ||
546 | return ret; | ||
547 | } | ||
548 | |||
549 | int RIOEISAinit( int Mode ) | ||
550 | { | ||
551 | static int EISADone = 0; | ||
552 | uint Paddr; | ||
553 | int PollIntMixMsgDone = 0; | ||
554 | caddr_t Caddr; | ||
555 | ushort Ident; | ||
556 | uchar EisaSlot; | ||
557 | uchar Ivec; | ||
558 | int ret = 0; | ||
559 | |||
560 | /* | ||
561 | ** The only valid mode information for EISA hosts is fast or slow | ||
562 | ** links. | ||
563 | */ | ||
564 | Mode = (Mode & FAST_LINKS) ? EISA_TP_FAST_LINKS : EISA_TP_SLOW_LINKS; | ||
565 | |||
566 | if ( EISADone ) | ||
567 | { | ||
568 | rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit() - already done, return.\n"); | ||
569 | return(0); | ||
570 | } | ||
571 | |||
572 | EISADone++; | ||
573 | |||
574 | rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit()\n"); | ||
575 | |||
576 | |||
577 | /* | ||
578 | ** First check all cards to see if ANY are set for polled mode operation. | ||
579 | ** If so, set ALL to polled. | ||
580 | */ | ||
581 | |||
582 | for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ ) | ||
583 | { | ||
584 | Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) | | ||
585 | INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO); | ||
586 | |||
587 | if ( Ident == RIO_EISA_IDENT ) | ||
588 | { | ||
589 | rio_dprintk (RIO_DEBUG_INIT, "Found Specialix product\n"); | ||
590 | |||
591 | if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE ) | ||
592 | { | ||
593 | rio_dprintk (RIO_DEBUG_INIT, "Not Specialix RIO - Product number %x\n", | ||
594 | INBZ(EisaSlot, EISA_PRODUCT_NUMBER)); | ||
595 | continue; /* next slot */ | ||
596 | } | ||
597 | /* | ||
598 | ** Its a Specialix RIO! | ||
599 | */ | ||
600 | rio_dprintk (RIO_DEBUG_INIT, "RIO Revision %d\n", | ||
601 | INBZ(EisaSlot, EISA_REVISION_NUMBER)); | ||
602 | |||
603 | RIOMachineType |= (1<<RIO_EISA); | ||
604 | |||
605 | /* | ||
606 | ** Just check we haven't found too many wonderful objects | ||
607 | */ | ||
608 | if ( RIONumHosts >= RIO_HOSTS ) | ||
609 | { | ||
610 | Rprintf(RIOMesgTooManyCards); | ||
611 | return 0; | ||
612 | } | ||
613 | |||
614 | /* | ||
615 | ** Ensure that the enable bit is set! | ||
616 | */ | ||
617 | OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT ); | ||
618 | |||
619 | /* | ||
620 | ** EISA_INTERRUPT_VEC contains the interrupt vector. | ||
621 | */ | ||
622 | Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC); | ||
623 | |||
624 | #ifdef RIODEBUG | ||
625 | switch ( Ivec & EISA_INTERRUPT_MASK ) | ||
626 | { | ||
627 | case EISA_IRQ_3: | ||
628 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 3\n"); | ||
629 | break; | ||
630 | case EISA_IRQ_4: | ||
631 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 4\n"); | ||
632 | break; | ||
633 | case EISA_IRQ_5: | ||
634 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 5\n"); | ||
635 | break; | ||
636 | case EISA_IRQ_6: | ||
637 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 6\n"); | ||
638 | break; | ||
639 | case EISA_IRQ_7: | ||
640 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 7\n"); | ||
641 | break; | ||
642 | case EISA_IRQ_9: | ||
643 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 9\n"); | ||
644 | break; | ||
645 | case EISA_IRQ_10: | ||
646 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 10\n"); | ||
647 | break; | ||
648 | case EISA_IRQ_11: | ||
649 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 11\n"); | ||
650 | break; | ||
651 | case EISA_IRQ_12: | ||
652 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 12\n"); | ||
653 | break; | ||
654 | case EISA_IRQ_14: | ||
655 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 14\n"); | ||
656 | break; | ||
657 | case EISA_IRQ_15: | ||
658 | rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 15\n"); | ||
659 | break; | ||
660 | case EISA_POLLED: | ||
661 | rio_dprintk (RIO_DEBUG_INIT, "EISA POLLED\n"); | ||
662 | break; | ||
663 | default: | ||
664 | rio_dprintk (RIO_DEBUG_INIT, NULL,DBG_INIT|DBG_FAIL,"Shagged interrupt number!\n"); | ||
665 | Ivec &= EISA_CONTROL_MASK; | ||
666 | } | ||
667 | #endif | ||
668 | |||
669 | if ( (Ivec & EISA_INTERRUPT_MASK) == | ||
670 | EISA_POLLED ) | ||
671 | { | ||
672 | RIOWillPoll = 1; | ||
673 | break; /* From EisaSlot loop */ | ||
674 | } | ||
675 | } | ||
676 | } | ||
677 | |||
678 | /* | ||
679 | ** Do it all again now we know whether to change all cards to polled | ||
680 | ** mode or not | ||
681 | */ | ||
682 | |||
683 | for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ ) | ||
684 | { | ||
685 | Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) | | ||
686 | INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO); | ||
687 | |||
688 | if ( Ident == RIO_EISA_IDENT ) | ||
689 | { | ||
690 | if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE ) | ||
691 | continue; /* next slot */ | ||
692 | |||
693 | /* | ||
694 | ** Its a Specialix RIO! | ||
695 | */ | ||
696 | |||
697 | /* | ||
698 | ** Ensure that the enable bit is set! | ||
699 | */ | ||
700 | OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT ); | ||
701 | |||
702 | /* | ||
703 | ** EISA_INTERRUPT_VEC contains the interrupt vector. | ||
704 | */ | ||
705 | Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC); | ||
706 | |||
707 | if ( RIOWillPoll ) | ||
708 | { | ||
709 | /* | ||
710 | ** If we are going to operate in polled mode, but this | ||
711 | ** board is configured to be interrupt driven, display | ||
712 | ** the message explaining the situation to the punter, | ||
713 | ** assuming we haven't already done so. | ||
714 | */ | ||
715 | |||
716 | if ( !PollIntMixMsgDone && | ||
717 | (Ivec & EISA_INTERRUPT_MASK) != EISA_POLLED ) | ||
718 | { | ||
719 | Rprintf(RIOMesgAllPolled); | ||
720 | PollIntMixMsgDone = 1; | ||
721 | } | ||
722 | |||
723 | /* | ||
724 | ** Ungraciously ignore whatever the board reports as its | ||
725 | ** interrupt vector... | ||
726 | */ | ||
727 | |||
728 | Ivec &= ~EISA_INTERRUPT_MASK; | ||
729 | |||
730 | /* | ||
731 | ** ...and force it to dance to the poll tune. | ||
732 | */ | ||
733 | |||
734 | Ivec |= EISA_POLLED; | ||
735 | } | ||
736 | |||
737 | /* | ||
738 | ** Convert the IRQ enable mask into something useful (0-15) | ||
739 | */ | ||
740 | Ivec = RIOEisaToIvec(Ivec); | ||
741 | |||
742 | rio_dprintk (RIO_DEBUG_INIT, "EISA host in slot %d has Ivec 0x%x\n", | ||
743 | EisaSlot, Ivec); | ||
744 | |||
745 | /* | ||
746 | ** Find the physical address | ||
747 | */ | ||
748 | Paddr = (INBZ(EisaSlot,EISA_MEMORY_BASE_HI)<<24) | | ||
749 | (INBZ(EisaSlot,EISA_MEMORY_BASE_LO)<<16); | ||
750 | |||
751 | rio_dprintk (RIO_DEBUG_INIT, "EISA card has Ivec %d Addr %x\n", Ivec, Paddr); | ||
752 | |||
753 | if ( Paddr == 0 ) | ||
754 | { | ||
755 | rio_dprintk (RIO_DEBUG_INIT, | ||
756 | "Board in slot %d configured for address zero!\n", EisaSlot); | ||
757 | continue; | ||
758 | } | ||
759 | |||
760 | /* | ||
761 | ** Tell the memory mapper that we want to talk to it | ||
762 | */ | ||
763 | rio_dprintk (RIO_DEBUG_INIT, "About to map EISA card \n"); | ||
764 | |||
765 | if (RIOMapin( Paddr, RIO_EISA_MEM_SIZE, &Caddr) == -1) { | ||
766 | rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n", | ||
767 | RIO_EISA_MEM_SIZE,Paddr); | ||
768 | continue; | ||
769 | } | ||
770 | |||
771 | rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr); | ||
772 | |||
773 | /* | ||
774 | ** And check that it is actually there! | ||
775 | */ | ||
776 | if ( RIOBoardTest( Paddr,Caddr,RIO_EISA,EisaSlot) == RIO_SUCCESS ) | ||
777 | { | ||
778 | rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n"); | ||
779 | rio_dprintk (RIO_DEBUG_INIT, | ||
780 | "Slot %d. Ivec %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", | ||
781 | EisaSlot,Ivec,RIO_EISA,Paddr,Caddr,Mode); | ||
782 | |||
783 | /* | ||
784 | ** Board has passed its scrub test. Fill in all the | ||
785 | ** transient stuff. | ||
786 | */ | ||
787 | p->RIOHosts[RIONumHosts].Slot = EisaSlot; | ||
788 | p->RIOHosts[RIONumHosts].Ivec = Ivec; | ||
789 | p->RIOHosts[RIONumHosts].Type = RIO_EISA; | ||
790 | p->RIOHosts[RIONumHosts].Copy = bcopy; | ||
791 | p->RIOHosts[RIONumHosts].PaddrP = Paddr; | ||
792 | p->RIOHosts[RIONumHosts].Caddr = Caddr; | ||
793 | p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr; | ||
794 | p->RIOHosts[RIONumHosts].Mode = Mode; | ||
795 | /* | ||
796 | ** because the EISA prom is mapped into IO space, we | ||
797 | ** need to copy the unqiue number into the memory area | ||
798 | ** that it would have occupied, so that the download | ||
799 | ** code can determine its ID and card type. | ||
800 | */ | ||
801 | WBYTE(p->RIOHosts[RIONumHosts].Unique[0],INBZ(EisaSlot,EISA_UNIQUE_NUM_0)); | ||
802 | WBYTE(p->RIOHosts[RIONumHosts].Unique[1],INBZ(EisaSlot,EISA_UNIQUE_NUM_1)); | ||
803 | WBYTE(p->RIOHosts[RIONumHosts].Unique[2],INBZ(EisaSlot,EISA_UNIQUE_NUM_2)); | ||
804 | WBYTE(p->RIOHosts[RIONumHosts].Unique[3],INBZ(EisaSlot,EISA_UNIQUE_NUM_3)); | ||
805 | p->RIOHosts[RIONumHosts].UniqueNum = | ||
806 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)| | ||
807 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)| | ||
808 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)| | ||
809 | ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24); | ||
810 | INBZ(EisaSlot,EISA_INTERRUPT_RESET); | ||
811 | RIONumHosts++; | ||
812 | ret++; | ||
813 | } | ||
814 | else | ||
815 | { | ||
816 | /* | ||
817 | ** It failed the test, so ignore it. | ||
818 | */ | ||
819 | rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n"); | ||
820 | |||
821 | RIOMapout(Paddr, RIO_EISA_MEM_SIZE, Caddr ); | ||
822 | } | ||
823 | } | ||
824 | } | ||
825 | if (RIOMachineType & RIO_EISA) | ||
826 | return ret+1; | ||
827 | return ret; | ||
828 | } | ||
829 | #endif | ||
830 | |||
831 | |||
832 | #ifndef linux | ||
833 | |||
834 | #define CONFIG_ADDRESS 0xcf8 | ||
835 | #define CONFIG_DATA 0xcfc | ||
836 | #define FORWARD_REG 0xcfa | ||
837 | |||
838 | |||
839 | static int | ||
840 | read_config(int bus_number, int device_num, int r_number) | ||
841 | { | ||
842 | unsigned int cav; | ||
843 | unsigned int val; | ||
844 | |||
845 | /* | ||
846 | Build config_address_value: | ||
847 | |||
848 | 31 24 23 16 15 11 10 8 7 0 | ||
849 | ------------------------------------------------------ | ||
850 | |1| 0000000 | bus_number | device # | 000 | register | | ||
851 | ------------------------------------------------------ | ||
852 | */ | ||
853 | |||
854 | cav = r_number & 0xff; | ||
855 | cav |= ((device_num & 0x1f) << 11); | ||
856 | cav |= ((bus_number & 0xff) << 16); | ||
857 | cav |= 0x80000000; /* Enable bit */ | ||
858 | outpd(CONFIG_ADDRESS,cav); | ||
859 | val = inpd(CONFIG_DATA); | ||
860 | outpd(CONFIG_ADDRESS,0); | ||
861 | return val; | ||
862 | } | ||
863 | |||
864 | static | ||
865 | write_config(bus_number,device_num,r_number,val) | ||
866 | { | ||
867 | unsigned int cav; | ||
868 | |||
869 | /* | ||
870 | Build config_address_value: | ||
871 | |||
872 | 31 24 23 16 15 11 10 8 7 0 | ||
873 | ------------------------------------------------------ | ||
874 | |1| 0000000 | bus_number | device # | 000 | register | | ||
875 | ------------------------------------------------------ | ||
876 | */ | ||
877 | |||
878 | cav = r_number & 0xff; | ||
879 | cav |= ((device_num & 0x1f) << 11); | ||
880 | cav |= ((bus_number & 0xff) << 16); | ||
881 | cav |= 0x80000000; /* Enable bit */ | ||
882 | outpd(CONFIG_ADDRESS, cav); | ||
883 | outpd(CONFIG_DATA, val); | ||
884 | outpd(CONFIG_ADDRESS, 0); | ||
885 | return val; | ||
886 | } | ||
887 | #else | ||
888 | /* XXX Implement these... */ | ||
889 | static int | ||
890 | read_config(int bus_number, int device_num, int r_number) | ||
891 | { | ||
892 | return 0; | ||
893 | } | ||
894 | |||
895 | static int | ||
896 | write_config(int bus_number, int device_num, int r_number) | ||
897 | { | ||
898 | return 0; | ||
899 | } | ||
900 | |||
901 | #endif | ||
902 | |||
903 | int | ||
904 | RIOPCIinit(p, Mode) | ||
905 | struct rio_info *p; | ||
906 | int Mode; | ||
907 | { | ||
908 | #define MAX_PCI_SLOT 32 | ||
909 | #define RIO_PCI_JET_CARD 0x200011CB | ||
910 | |||
911 | static int slot; /* count of machine's PCI slots searched so far */ | ||
912 | caddr_t Caddr; /* Virtual address of the current PCI host card. */ | ||
913 | unsigned char Ivec; /* interrupt vector for the current PCI host */ | ||
914 | unsigned long Paddr; /* Physical address for the current PCI host */ | ||
915 | int Handle; /* Handle to Virtual memory allocated for current PCI host */ | ||
916 | |||
917 | |||
918 | rio_dprintk (RIO_DEBUG_INIT, "Search for a RIO PCI card - start at slot %d\n", slot); | ||
919 | |||
920 | /* | ||
921 | ** Initialise the search status | ||
922 | */ | ||
923 | p->RIOLastPCISearch = RIO_FAIL; | ||
924 | |||
925 | while ( (slot < MAX_PCI_SLOT) & (p->RIOLastPCISearch != RIO_SUCCESS) ) | ||
926 | { | ||
927 | rio_dprintk (RIO_DEBUG_INIT, "Currently testing slot %d\n", slot); | ||
928 | |||
929 | if (read_config(0,slot,0) == RIO_PCI_JET_CARD) { | ||
930 | p->RIOHosts[p->RIONumHosts].Ivec = 0; | ||
931 | Paddr = read_config(0,slot,0x18); | ||
932 | Paddr = Paddr - (Paddr & 0x1); /* Mask off the io bit */ | ||
933 | |||
934 | if ( (Paddr == 0) || ((Paddr & 0xffff0000) == 0xffff0000) ) { | ||
935 | rio_dprintk (RIO_DEBUG_INIT, "Goofed up slot\n"); /* what! */ | ||
936 | slot++; | ||
937 | continue; | ||
938 | } | ||
939 | |||
940 | p->RIOHosts[p->RIONumHosts].PaddrP = Paddr; | ||
941 | Ivec = (read_config(0,slot,0x3c) & 0xff); | ||
942 | |||
943 | rio_dprintk (RIO_DEBUG_INIT, "PCI Host at 0x%x, Intr %d\n", (int)Paddr, Ivec); | ||
944 | |||
945 | Handle = RIOMapin( Paddr, RIO_PCI_MEM_SIZE, &Caddr ); | ||
946 | if (Handle == -1) { | ||
947 | rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at 0x%x\n", RIO_PCI_MEM_SIZE, (int)Paddr); | ||
948 | slot++; | ||
949 | continue; | ||
950 | } | ||
951 | p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32; | ||
952 | p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec, | ||
953 | (int (*)())rio_intr, (char *)p->RIONumHosts); | ||
954 | if (RIOBoardTest( Paddr, Caddr, RIO_PCI, 0 ) == RIO_SUCCESS) { | ||
955 | rio_dprintk (RIO_DEBUG_INIT, ("Board has passed test\n"); | ||
956 | rio_dprintk (RIO_DEBUG_INIT, ("Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", Paddr, Caddr, Mode); | ||
957 | |||
958 | /* | ||
959 | ** Board has passed its scrub test. Fill in all the | ||
960 | ** transient stuff. | ||
961 | */ | ||
962 | p->RIOHosts[p->RIONumHosts].Slot = 0; | ||
963 | p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32; | ||
964 | p->RIOHosts[p->RIONumHosts].Type = RIO_PCI; | ||
965 | p->RIOHosts[p->RIONumHosts].Copy = rio_pcicopy; | ||
966 | p->RIOHosts[p->RIONumHosts].PaddrP = Paddr; | ||
967 | p->RIOHosts[p->RIONumHosts].Caddr = Caddr; | ||
968 | p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)Caddr; | ||
969 | p->RIOHosts[p->RIONumHosts].Mode = Mode; | ||
970 | |||
971 | #if 0 | ||
972 | WBYTE(p->RIOHosts[p->RIONumHosts].Control, | ||
973 | BOOT_FROM_RAM | EXTERNAL_BUS_OFF | | ||
974 | p->RIOHosts[p->RIONumHosts].Mode | | ||
975 | INTERRUPT_DISABLE ); | ||
976 | WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff); | ||
977 | WBYTE(p->RIOHosts[p->RIONumHosts].Control, | ||
978 | BOOT_FROM_RAM | EXTERNAL_BUS_OFF | | ||
979 | p->RIOHosts[p->RIONumHosts].Mode | | ||
980 | INTERRUPT_DISABLE ); | ||
981 | WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff); | ||
982 | #else | ||
983 | WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt, 0xff); | ||
984 | #endif | ||
985 | p->RIOHosts[p->RIONumHosts].UniqueNum = | ||
986 | ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)| | ||
987 | ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)| | ||
988 | ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)| | ||
989 | ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24); | ||
990 | |||
991 | rio_dprintk (RIO_DEBUG_INIT, "Unique no 0x%x.\n", | ||
992 | p->RIOHosts[p->RIONumHosts].UniqueNum); | ||
993 | |||
994 | p->RIOLastPCISearch = RIO_SUCCESS; | ||
995 | p->RIONumHosts++; | ||
996 | } | ||
997 | } | ||
998 | slot++; | ||
999 | } | ||
1000 | |||
1001 | if ( slot >= MAX_PCI_SLOT ) { | ||
1002 | rio_dprintk (RIO_DEBUG_INIT, "All %d PCI slots have tested for RIO cards !!!\n", | ||
1003 | MAX_PCI_SLOT); | ||
1004 | } | ||
1005 | |||
1006 | |||
1007 | /* | ||
1008 | ** I don't think we want to do this anymore | ||
1009 | ** | ||
1010 | |||
1011 | if (!p->RIOLastPCISearch == RIO_FAIL ) { | ||
1012 | p->RIOFailed++; | ||
1013 | } | ||
1014 | |||
1015 | ** | ||
1016 | */ | ||
1017 | } | ||
1018 | |||
1019 | #ifdef FUTURE_RELEASE | ||
1020 | void riohalt( void ) | ||
1021 | { | ||
1022 | int host; | ||
1023 | for ( host=0; host<p->RIONumHosts; host++ ) | ||
1024 | { | ||
1025 | rio_dprintk (RIO_DEBUG_INIT, "Stop host %d\n", host); | ||
1026 | (void)RIOBoardTest( p->RIOHosts[host].PaddrP, p->RIOHosts[host].Caddr, p->RIOHosts[host].Type,p->RIOHosts[host].Slot ); | ||
1027 | } | ||
1028 | } | ||
1029 | #endif | ||
1030 | #endif | ||
1031 | 156 | ||
1032 | static uchar val[] = { | 157 | static uchar val[] = { |
1033 | #ifdef VERY_LONG_TEST | 158 | #ifdef VERY_LONG_TEST |
@@ -1262,200 +387,6 @@ int size; | |||
1262 | return RIO_SUCCESS; | 387 | return RIO_SUCCESS; |
1263 | } | 388 | } |
1264 | 389 | ||
1265 | /* | ||
1266 | ** try to ensure that every host is either in polled mode | ||
1267 | ** or is in interrupt mode. Only allow interrupt mode if | ||
1268 | ** all hosts can interrupt (why?) | ||
1269 | ** and force into polled mode if told to. Patch up the | ||
1270 | ** interrupt vector & salute The Queen when you've done. | ||
1271 | */ | ||
1272 | #if 0 | ||
1273 | static void | ||
1274 | RIOAllocateInterrupts(p) | ||
1275 | struct rio_info * p; | ||
1276 | { | ||
1277 | int Host; | ||
1278 | |||
1279 | /* | ||
1280 | ** Easy case - if we have been told to poll, then we poll. | ||
1281 | */ | ||
1282 | if (p->mode & POLLED_MODE) { | ||
1283 | RIOStopInterrupts(p, 0, 0); | ||
1284 | return; | ||
1285 | } | ||
1286 | |||
1287 | /* | ||
1288 | ** check - if any host has been set to polled mode, then all must be. | ||
1289 | */ | ||
1290 | for (Host=0; Host<p->RIONumHosts; Host++) { | ||
1291 | if ( (p->RIOHosts[Host].Type != RIO_AT) && | ||
1292 | (p->RIOHosts[Host].Ivec == POLLED) ) { | ||
1293 | RIOStopInterrupts(p, 1, Host ); | ||
1294 | return; | ||
1295 | } | ||
1296 | } | ||
1297 | for (Host=0; Host<p->RIONumHosts; Host++) { | ||
1298 | if (p->RIOHosts[Host].Type == RIO_AT) { | ||
1299 | if ( (p->RIOHosts[Host].Ivec - 32) == 0) { | ||
1300 | RIOStopInterrupts(p, 2, Host ); | ||
1301 | return; | ||
1302 | } | ||
1303 | } | ||
1304 | } | ||
1305 | } | ||
1306 | |||
1307 | /* | ||
1308 | ** something has decided that we can't be doing with these | ||
1309 | ** new-fangled interrupt thingies. Set everything up to just | ||
1310 | ** poll. | ||
1311 | */ | ||
1312 | static void | ||
1313 | RIOStopInterrupts(p, Reason, Host) | ||
1314 | struct rio_info * p; | ||
1315 | int Reason; | ||
1316 | int Host; | ||
1317 | { | ||
1318 | #ifdef FUTURE_RELEASE | ||
1319 | switch (Reason) { | ||
1320 | case 0: /* forced into polling by rio_polled */ | ||
1321 | break; | ||
1322 | case 1: /* SCU has set 'Host' into polled mode */ | ||
1323 | break; | ||
1324 | case 2: /* there aren't enough interrupt vectors for 'Host' */ | ||
1325 | break; | ||
1326 | } | ||
1327 | #endif | ||
1328 | |||
1329 | for (Host=0; Host<p->RIONumHosts; Host++ ) { | ||
1330 | struct Host *HostP = &p->RIOHosts[Host]; | ||
1331 | |||
1332 | switch (HostP->Type) { | ||
1333 | case RIO_AT: | ||
1334 | /* | ||
1335 | ** The AT host has it's interrupts disabled by clearing the | ||
1336 | ** int_enable bit. | ||
1337 | */ | ||
1338 | HostP->Mode &= ~INTERRUPT_ENABLE; | ||
1339 | HostP->Ivec = POLLED; | ||
1340 | break; | ||
1341 | #ifdef FUTURE_RELEASE | ||
1342 | case RIO_EISA: | ||
1343 | /* | ||
1344 | ** The EISA host has it's interrupts disabled by setting the | ||
1345 | ** Ivec to zero | ||
1346 | */ | ||
1347 | HostP->Ivec = POLLED; | ||
1348 | break; | ||
1349 | #endif | ||
1350 | case RIO_PCI: | ||
1351 | /* | ||
1352 | ** The PCI host has it's interrupts disabled by clearing the | ||
1353 | ** int_enable bit, like a regular host card. | ||
1354 | */ | ||
1355 | HostP->Mode &= ~RIO_PCI_INT_ENABLE; | ||
1356 | HostP->Ivec = POLLED; | ||
1357 | break; | ||
1358 | #ifdef FUTURE_RELEASE | ||
1359 | case RIO_MCA: | ||
1360 | /* | ||
1361 | ** There's always one, isn't there? | ||
1362 | ** The MCA host card cannot have it's interrupts disabled. | ||
1363 | */ | ||
1364 | RIOPatchVec(HostP); | ||
1365 | break; | ||
1366 | #endif | ||
1367 | } | ||
1368 | } | ||
1369 | } | ||
1370 | |||
1371 | /* | ||
1372 | ** This function is called at init time to setup the data structures. | ||
1373 | */ | ||
1374 | void | ||
1375 | RIOAllocDataStructs(p) | ||
1376 | struct rio_info * p; | ||
1377 | { | ||
1378 | int port, | ||
1379 | host, | ||
1380 | tm; | ||
1381 | |||
1382 | p->RIOPortp = (struct Port *)sysbrk(RIO_PORTS * sizeof(struct Port)); | ||
1383 | if (!p->RIOPortp) { | ||
1384 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for port structures\n"); | ||
1385 | p->RIOFailed++; | ||
1386 | return; | ||
1387 | } | ||
1388 | bzero( p->RIOPortp, sizeof(struct Port) * RIO_PORTS ); | ||
1389 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for port structs\n"); | ||
1390 | rio_dprintk (RIO_DEBUG_INIT, "First RIO port struct @0x%x, size=0x%x bytes\n", | ||
1391 | (int)p->RIOPortp, sizeof(struct Port)); | ||
1392 | |||
1393 | for( port=0; port<RIO_PORTS; port++ ) { | ||
1394 | p->RIOPortp[port].PortNum = port; | ||
1395 | p->RIOPortp[port].TtyP = &p->channel[port]; | ||
1396 | sreset (p->RIOPortp[port].InUse); /* Let the first guy uses it */ | ||
1397 | p->RIOPortp[port].portSem = -1; /* Let the first guy takes it */ | ||
1398 | p->RIOPortp[port].ParamSem = -1; /* Let the first guy takes it */ | ||
1399 | p->RIOPortp[port].timeout_id = 0; /* Let the first guy takes it */ | ||
1400 | } | ||
1401 | |||
1402 | p->RIOHosts = (struct Host *)sysbrk(RIO_HOSTS * sizeof(struct Host)); | ||
1403 | if (!p->RIOHosts) { | ||
1404 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for host structures\n"); | ||
1405 | p->RIOFailed++; | ||
1406 | return; | ||
1407 | } | ||
1408 | bzero(p->RIOHosts, sizeof(struct Host)*RIO_HOSTS); | ||
1409 | rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for host structs\n"); | ||
1410 | rio_dprintk (RIO_DEBUG_INIT, "First RIO host struct @0x%x, size=0x%x bytes\n", | ||
1411 | (int)p->RIOHosts, sizeof(struct Host)); | ||
1412 | |||
1413 | for( host=0; host<RIO_HOSTS; host++ ) { | ||
1414 | spin_lock_init (&p->RIOHosts[host].HostLock); | ||
1415 | p->RIOHosts[host].timeout_id = 0; /* Let the first guy takes it */ | ||
1416 | } | ||
1417 | /* | ||
1418 | ** check that the buffer size is valid, round down to the next power of | ||
1419 | ** two if necessary; if the result is zero, then, hey, no double buffers. | ||
1420 | */ | ||
1421 | for ( tm = 1; tm && tm <= p->RIOConf.BufferSize; tm <<= 1 ) | ||
1422 | ; | ||
1423 | tm >>= 1; | ||
1424 | p->RIOBufferSize = tm; | ||
1425 | p->RIOBufferMask = tm ? tm - 1 : 0; | ||
1426 | } | ||
1427 | |||
1428 | /* | ||
1429 | ** this function gets called whenever the data structures need to be | ||
1430 | ** re-setup, for example, after a riohalt (why did I ever invent it?) | ||
1431 | */ | ||
1432 | void | ||
1433 | RIOSetupDataStructs(p) | ||
1434 | struct rio_info * p; | ||
1435 | { | ||
1436 | int host, entry, rup; | ||
1437 | |||
1438 | for ( host=0; host<RIO_HOSTS; host++ ) { | ||
1439 | struct Host *HostP = &p->RIOHosts[host]; | ||
1440 | for ( entry=0; entry<LINKS_PER_UNIT; entry++ ) { | ||
1441 | HostP->Topology[entry].Unit = ROUTE_DISCONNECT; | ||
1442 | HostP->Topology[entry].Link = NO_LINK; | ||
1443 | } | ||
1444 | bcopy("HOST X", HostP->Name, 7); | ||
1445 | HostP->Name[5] = '1'+host; | ||
1446 | for (rup=0; rup<(MAX_RUP + LINKS_PER_UNIT); rup++) { | ||
1447 | if (rup < MAX_RUP) { | ||
1448 | for (entry=0; entry<LINKS_PER_UNIT; entry++ ) { | ||
1449 | HostP->Mapping[rup].Topology[entry].Unit = ROUTE_DISCONNECT; | ||
1450 | HostP->Mapping[rup].Topology[entry].Link = NO_LINK; | ||
1451 | } | ||
1452 | RIODefaultName(p, HostP, rup); | ||
1453 | } | ||
1454 | spin_lock_init(&HostP->UnixRups[rup].RupLock); | ||
1455 | } | ||
1456 | } | ||
1457 | } | ||
1458 | #endif | ||
1459 | 390 | ||
1460 | int | 391 | int |
1461 | RIODefaultName(p, HostP, UnitId) | 392 | RIODefaultName(p, HostP, UnitId) |
@@ -1463,10 +394,6 @@ struct rio_info * p; | |||
1463 | struct Host * HostP; | 394 | struct Host * HostP; |
1464 | uint UnitId; | 395 | uint UnitId; |
1465 | { | 396 | { |
1466 | #ifdef CHECK | ||
1467 | CheckHost( Host ); | ||
1468 | CheckUnitId( UnitId ); | ||
1469 | #endif | ||
1470 | bcopy("UNKNOWN RTA X-XX",HostP->Mapping[UnitId].Name,17); | 397 | bcopy("UNKNOWN RTA X-XX",HostP->Mapping[UnitId].Name,17); |
1471 | HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts); | 398 | HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts); |
1472 | if ((UnitId+1) > 9) { | 399 | if ((UnitId+1) > 9) { |
@@ -1483,33 +410,6 @@ uint UnitId; | |||
1483 | #define RIO_RELEASE "Linux" | 410 | #define RIO_RELEASE "Linux" |
1484 | #define RELEASE_ID "1.0" | 411 | #define RELEASE_ID "1.0" |
1485 | 412 | ||
1486 | #if 0 | ||
1487 | static int | ||
1488 | RIOReport(p) | ||
1489 | struct rio_info * p; | ||
1490 | { | ||
1491 | char * RIORelease = RIO_RELEASE; | ||
1492 | char * RIORelID = RELEASE_ID; | ||
1493 | int host; | ||
1494 | |||
1495 | rio_dprintk (RIO_DEBUG_INIT, "RIO : Release: %s ID: %s\n", RIORelease, RIORelID); | ||
1496 | |||
1497 | if ( p->RIONumHosts==0 ) { | ||
1498 | rio_dprintk (RIO_DEBUG_INIT, "\nNo Hosts configured\n"); | ||
1499 | return(0); | ||
1500 | } | ||
1501 | |||
1502 | for ( host=0; host < p->RIONumHosts; host++ ) { | ||
1503 | struct Host *HostP = &p->RIOHosts[host]; | ||
1504 | switch ( HostP->Type ) { | ||
1505 | case RIO_AT: | ||
1506 | rio_dprintk (RIO_DEBUG_INIT, "AT BUS : found the card at 0x%x\n", HostP->PaddrP); | ||
1507 | } | ||
1508 | } | ||
1509 | return 0; | ||
1510 | } | ||
1511 | #endif | ||
1512 | |||
1513 | static struct rioVersion stVersion; | 413 | static struct rioVersion stVersion; |
1514 | 414 | ||
1515 | struct rioVersion * | 415 | struct rioVersion * |
@@ -1523,27 +423,6 @@ RIOVersid(void) | |||
1523 | return &stVersion; | 423 | return &stVersion; |
1524 | } | 424 | } |
1525 | 425 | ||
1526 | #if 0 | ||
1527 | int | ||
1528 | RIOMapin(paddr, size, vaddr) | ||
1529 | paddr_t paddr; | ||
1530 | int size; | ||
1531 | caddr_t * vaddr; | ||
1532 | { | ||
1533 | *vaddr = (caddr_t)permap( (long)paddr, size); | ||
1534 | return ((int)*vaddr); | ||
1535 | } | ||
1536 | |||
1537 | void | ||
1538 | RIOMapout(paddr, size, vaddr) | ||
1539 | paddr_t paddr; | ||
1540 | long size; | ||
1541 | caddr_t vaddr; | ||
1542 | { | ||
1543 | } | ||
1544 | #endif | ||
1545 | |||
1546 | |||
1547 | void | 426 | void |
1548 | RIOHostReset(Type, DpRamP, Slot) | 427 | RIOHostReset(Type, DpRamP, Slot) |
1549 | uint Type; | 428 | uint Type; |
@@ -1570,31 +449,6 @@ uint Slot; | |||
1570 | WBYTE(DpRamP->DpResetTpu, 0xFF); | 449 | WBYTE(DpRamP->DpResetTpu, 0xFF); |
1571 | udelay(3); | 450 | udelay(3); |
1572 | break; | 451 | break; |
1573 | #ifdef FUTURE_RELEASE | ||
1574 | case RIO_EISA: | ||
1575 | /* | ||
1576 | ** Bet this doesn't work! | ||
1577 | */ | ||
1578 | OUTBZ( Slot, EISA_CONTROL_PORT, | ||
1579 | EISA_TP_RUN | EISA_TP_BUS_DISABLE | | ||
1580 | EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM ); | ||
1581 | OUTBZ( Slot, EISA_CONTROL_PORT, | ||
1582 | EISA_TP_RESET | EISA_TP_BUS_DISABLE | | ||
1583 | EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM ); | ||
1584 | suspend( 3 ); | ||
1585 | OUTBZ( Slot, EISA_CONTROL_PORT, | ||
1586 | EISA_TP_RUN | EISA_TP_BUS_DISABLE | | ||
1587 | EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM ); | ||
1588 | break; | ||
1589 | case RIO_MCA: | ||
1590 | WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable ); | ||
1591 | WBYTE(DpRamP->DpResetTpu , 0xFF ); | ||
1592 | suspend( 3 ); | ||
1593 | WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable ); | ||
1594 | WBYTE(DpRamP->DpResetTpu , 0xFF ); | ||
1595 | suspend( 3 ); | ||
1596 | break; | ||
1597 | #endif | ||
1598 | case RIO_PCI: | 452 | case RIO_PCI: |
1599 | rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n"); | 453 | rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n"); |
1600 | DpRamP->DpControl = RIO_PCI_BOOT_FROM_RAM; | 454 | DpRamP->DpControl = RIO_PCI_BOOT_FROM_RAM; |
@@ -1604,12 +458,6 @@ uint Slot; | |||
1604 | /* for (i=0; i<6000; i++); */ | 458 | /* for (i=0; i<6000; i++); */ |
1605 | /* suspend( 3 ); */ | 459 | /* suspend( 3 ); */ |
1606 | break; | 460 | break; |
1607 | #ifdef FUTURE_RELEASE | ||
1608 | default: | ||
1609 | Rprintf(RIOMesgNoSupport,Type,DpRamP,Slot); | ||
1610 | return; | ||
1611 | #endif | ||
1612 | |||
1613 | default: | 461 | default: |
1614 | rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n"); | 462 | rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n"); |
1615 | break; | 463 | break; |
diff --git a/drivers/char/rio/riolocks.h b/drivers/char/rio/riolocks.h deleted file mode 100644 index 0e0cdacebe0b..000000000000 --- a/drivers/char/rio/riolocks.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | * | ||
7 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | ** | ||
23 | ** Module : riolocks.h | ||
24 | ** SID : 1.2 | ||
25 | ** Last Modified : 11/6/98 11:34:13 | ||
26 | ** Retrieved : 11/6/98 11:34:22 | ||
27 | ** | ||
28 | ** ident @(#)riolocks.h 1.2 | ||
29 | ** | ||
30 | ** ----------------------------------------------------------------------------- | ||
31 | */ | ||
32 | |||
33 | #ifndef __rio_riolocks_h__ | ||
34 | #define __rio_riolocks_h__ | ||
35 | |||
36 | #ifdef SCCS_LABELS | ||
37 | static char *_riolocks_h_sccs_ = "@(#)riolocks.h 1.2"; | ||
38 | #endif | ||
39 | |||
40 | #define LOCKB(lk) lockb(lk); | ||
41 | #define UNLOCKB(lk, oldspl) unlockb(lk, oldspl); | ||
42 | |||
43 | #endif | ||
diff --git a/drivers/char/rio/rioparam.c b/drivers/char/rio/rioparam.c index 4cc7f4942bfc..c622f46d6d77 100644 --- a/drivers/char/rio/rioparam.c +++ b/drivers/char/rio/rioparam.c | |||
@@ -195,27 +195,6 @@ int SleepFlag; | |||
195 | ** paramed with OPEN, we want to restore the saved port termio, but | 195 | ** paramed with OPEN, we want to restore the saved port termio, but |
196 | ** only if StoredTermio has been saved, i.e. NOT 1st open after reboot. | 196 | ** only if StoredTermio has been saved, i.e. NOT 1st open after reboot. |
197 | */ | 197 | */ |
198 | #if 0 | ||
199 | if (PortP->FirstOpen) { | ||
200 | PortP->StoredTty.iflag = TtyP->tm.c_iflag; | ||
201 | PortP->StoredTty.oflag = TtyP->tm.c_oflag; | ||
202 | PortP->StoredTty.cflag = TtyP->tm.c_cflag; | ||
203 | PortP->StoredTty.lflag = TtyP->tm.c_lflag; | ||
204 | PortP->StoredTty.line = TtyP->tm.c_line; | ||
205 | for (i = 0; i < NCC + 5; i++) | ||
206 | PortP->StoredTty.cc[i] = TtyP->tm.c_cc[i]; | ||
207 | PortP->FirstOpen = 0; | ||
208 | } else if (PortP->Store || PortP->Lock) { | ||
209 | rio_dprintk(RIO_DEBUG_PARAM, "OPEN: Restoring stored/locked params\n"); | ||
210 | TtyP->tm.c_iflag = PortP->StoredTty.iflag; | ||
211 | TtyP->tm.c_oflag = PortP->StoredTty.oflag; | ||
212 | TtyP->tm.c_cflag = PortP->StoredTty.cflag; | ||
213 | TtyP->tm.c_lflag = PortP->StoredTty.lflag; | ||
214 | TtyP->tm.c_line = PortP->StoredTty.line; | ||
215 | for (i = 0; i < NCC + 5; i++) | ||
216 | TtyP->tm.c_cc[i] = PortP->StoredTty.cc[i]; | ||
217 | } | ||
218 | #endif | ||
219 | } | 198 | } |
220 | 199 | ||
221 | /* | 200 | /* |
@@ -273,16 +252,6 @@ int SleepFlag; | |||
273 | phb_param_ptr = (struct phb_param *) PacketP->data; | 252 | phb_param_ptr = (struct phb_param *) PacketP->data; |
274 | 253 | ||
275 | 254 | ||
276 | #if 0 | ||
277 | /* | ||
278 | ** COR 1 | ||
279 | */ | ||
280 | if (TtyP->tm.c_iflag & INPCK) { | ||
281 | rio_dprintk(RIO_DEBUG_PARAM, "Parity checking on input enabled\n"); | ||
282 | Cor1 |= COR1_INPCK; | ||
283 | } | ||
284 | #endif | ||
285 | |||
286 | switch (TtyP->termios->c_cflag & CSIZE) { | 255 | switch (TtyP->termios->c_cflag & CSIZE) { |
287 | case CS5: | 256 | case CS5: |
288 | { | 257 | { |
@@ -524,10 +493,6 @@ int SleepFlag; | |||
524 | if (TtyP->termios->c_cflag & XMT1EN) | 493 | if (TtyP->termios->c_cflag & XMT1EN) |
525 | rio_dprintk(RIO_DEBUG_PARAM, "XMT1EN (?)\n"); | 494 | rio_dprintk(RIO_DEBUG_PARAM, "XMT1EN (?)\n"); |
526 | #endif | 495 | #endif |
527 | #if 0 | ||
528 | if (TtyP->termios->c_cflag & LOBLK) | ||
529 | rio_dprintk(RIO_DEBUG_PARAM, "LOBLK - JCL output blocks when not current\n"); | ||
530 | #endif | ||
531 | if (TtyP->termios->c_lflag & ISIG) | 496 | if (TtyP->termios->c_lflag & ISIG) |
532 | rio_dprintk(RIO_DEBUG_PARAM, "Input character signal generating enabled\n"); | 497 | rio_dprintk(RIO_DEBUG_PARAM, "Input character signal generating enabled\n"); |
533 | if (TtyP->termios->c_lflag & ICANON) | 498 | if (TtyP->termios->c_lflag & ICANON) |
@@ -572,14 +537,6 @@ int SleepFlag; | |||
572 | rio_dprintk(RIO_DEBUG_PARAM, "Carriage return delay set\n"); | 537 | rio_dprintk(RIO_DEBUG_PARAM, "Carriage return delay set\n"); |
573 | if (TtyP->termios->c_oflag & TABDLY) | 538 | if (TtyP->termios->c_oflag & TABDLY) |
574 | rio_dprintk(RIO_DEBUG_PARAM, "Tab delay set\n"); | 539 | rio_dprintk(RIO_DEBUG_PARAM, "Tab delay set\n"); |
575 | #if 0 | ||
576 | if (TtyP->termios->c_oflag & BSDLY) | ||
577 | rio_dprintk(RIO_DEBUG_PARAM, "Back-space delay set\n"); | ||
578 | if (TtyP->termios->c_oflag & VTDLY) | ||
579 | rio_dprintk(RIO_DEBUG_PARAM, "Vertical tab delay set\n"); | ||
580 | if (TtyP->termios->c_oflag & FFDLY) | ||
581 | rio_dprintk(RIO_DEBUG_PARAM, "Form-feed delay set\n"); | ||
582 | #endif | ||
583 | /* | 540 | /* |
584 | ** These things are kind of useful in a later life! | 541 | ** These things are kind of useful in a later life! |
585 | */ | 542 | */ |
diff --git a/drivers/char/rio/rioroute.c b/drivers/char/rio/rioroute.c index 0f4cd33ba641..f98888f52659 100644 --- a/drivers/char/rio/rioroute.c +++ b/drivers/char/rio/rioroute.c | |||
@@ -112,15 +112,6 @@ int RIORouteRup(struct rio_info *p, uint Rup, struct Host *HostP, PKT * PacketP) | |||
112 | int Lies; | 112 | int Lies; |
113 | unsigned long flags; | 113 | unsigned long flags; |
114 | 114 | ||
115 | #ifdef STACK | ||
116 | RIOStackCheck("RIORouteRup"); | ||
117 | #endif | ||
118 | #ifdef CHECK | ||
119 | CheckPacketP(PacketP); | ||
120 | CheckHostP(HostP); | ||
121 | CheckRup(Rup); | ||
122 | CheckHost(Host); | ||
123 | #endif | ||
124 | /* | 115 | /* |
125 | ** Is this unit telling us it's current link topology? | 116 | ** Is this unit telling us it's current link topology? |
126 | */ | 117 | */ |
@@ -540,9 +531,6 @@ uint unit; | |||
540 | 531 | ||
541 | for (port = 0; port < PORTS_PER_RTA; port++, PortN++) { | 532 | for (port = 0; port < PORTS_PER_RTA; port++, PortN++) { |
542 | ushort dest_port = port + 8; | 533 | ushort dest_port = port + 8; |
543 | #if 0 | ||
544 | uint PktInt; | ||
545 | #endif | ||
546 | WORD *TxPktP; | 534 | WORD *TxPktP; |
547 | PKT *Pkt; | 535 | PKT *Pkt; |
548 | 536 | ||
@@ -623,10 +611,6 @@ uint UnitId; | |||
623 | unsigned long flags; | 611 | unsigned long flags; |
624 | rio_spin_lock_irqsave(&HostP->HostLock, flags); | 612 | rio_spin_lock_irqsave(&HostP->HostLock, flags); |
625 | 613 | ||
626 | #ifdef CHECK | ||
627 | CheckHostP(HostP); | ||
628 | CheckUnitId(UnitId); | ||
629 | #endif | ||
630 | if (RIOCheck(HostP, UnitId)) { | 614 | if (RIOCheck(HostP, UnitId)) { |
631 | rio_dprintk(RIO_DEBUG_ROUTE, "Unit %d is NOT isolated\n", UnitId); | 615 | rio_dprintk(RIO_DEBUG_ROUTE, "Unit %d is NOT isolated\n", UnitId); |
632 | rio_spin_unlock_irqrestore(&HostP->HostLock, flags); | 616 | rio_spin_unlock_irqrestore(&HostP->HostLock, flags); |
@@ -651,10 +635,6 @@ uint UnitId; | |||
651 | { | 635 | { |
652 | uint link, unit; | 636 | uint link, unit; |
653 | 637 | ||
654 | #ifdef CHECK | ||
655 | CheckHostP(HostP); | ||
656 | CheckUnitId(UnitId); | ||
657 | #endif | ||
658 | UnitId--; /* this trick relies on the Unit Id being UNSIGNED! */ | 638 | UnitId--; /* this trick relies on the Unit Id being UNSIGNED! */ |
659 | 639 | ||
660 | if (UnitId >= MAX_RUP) /* dontcha just lurv unsigned maths! */ | 640 | if (UnitId >= MAX_RUP) /* dontcha just lurv unsigned maths! */ |
@@ -684,10 +664,6 @@ uint UnitId; | |||
684 | { | 664 | { |
685 | unsigned char link; | 665 | unsigned char link; |
686 | 666 | ||
687 | #ifdef CHECK | ||
688 | CheckHostP(HostP); | ||
689 | CheckUnitId(UnitId); | ||
690 | #endif | ||
691 | /* rio_dprint(RIO_DEBUG_ROUTE, ("Check to see if unit %d has a route to the host\n",UnitId)); */ | 667 | /* rio_dprint(RIO_DEBUG_ROUTE, ("Check to see if unit %d has a route to the host\n",UnitId)); */ |
692 | rio_dprintk(RIO_DEBUG_ROUTE, "RIOCheck : UnitID = %d\n", UnitId); | 668 | rio_dprintk(RIO_DEBUG_ROUTE, "RIOCheck : UnitID = %d\n", UnitId); |
693 | 669 | ||
diff --git a/drivers/char/rio/riotable.c b/drivers/char/rio/riotable.c index 42c3dffcbbb2..a86b216ab653 100644 --- a/drivers/char/rio/riotable.c +++ b/drivers/char/rio/riotable.c | |||
@@ -754,11 +754,6 @@ struct Map *HostMapP; | |||
754 | ushort RtaType; | 754 | ushort RtaType; |
755 | unsigned long flags; | 755 | unsigned long flags; |
756 | 756 | ||
757 | #ifdef CHECK | ||
758 | CheckHostP(HostP); | ||
759 | CheckHostMapP(HostMapP); | ||
760 | #endif | ||
761 | |||
762 | rio_dprintk(RIO_DEBUG_TABLE, "Mapping sysport %d to id %d\n", (int) HostMapP->SysPort, HostMapP->ID); | 757 | rio_dprintk(RIO_DEBUG_TABLE, "Mapping sysport %d to id %d\n", (int) HostMapP->SysPort, HostMapP->ID); |
763 | 758 | ||
764 | /* | 759 | /* |
@@ -784,9 +779,6 @@ struct Map *HostMapP; | |||
784 | 779 | ||
785 | rio_dprintk(RIO_DEBUG_TABLE, "c1 p = %p, p->rioPortp = %p\n", p, p->RIOPortp); | 780 | rio_dprintk(RIO_DEBUG_TABLE, "c1 p = %p, p->rioPortp = %p\n", p, p->RIOPortp); |
786 | PortP = p->RIOPortp[SysPort]; | 781 | PortP = p->RIOPortp[SysPort]; |
787 | #if 0 | ||
788 | PortP->TtyP = &p->channel[SysPort]; | ||
789 | #endif | ||
790 | rio_dprintk(RIO_DEBUG_TABLE, "Map port\n"); | 782 | rio_dprintk(RIO_DEBUG_TABLE, "Map port\n"); |
791 | 783 | ||
792 | /* | 784 | /* |
diff --git a/drivers/char/rio/riotime.h b/drivers/char/rio/riotime.h deleted file mode 100644 index 35e01cd103d0..000000000000 --- a/drivers/char/rio/riotime.h +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* T I M E | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | |||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
27 | |||
28 | Version : 0.01 | ||
29 | |||
30 | |||
31 | Mods | ||
32 | ---------------------------------------------------------------------------- | ||
33 | Date By Description | ||
34 | ---------------------------------------------------------------------------- | ||
35 | |||
36 | ***************************************************************************/ | ||
37 | |||
38 | #ifndef _riotime_h | ||
39 | #define _riotime_h 1 | ||
40 | |||
41 | #ifndef lint | ||
42 | #ifdef SCCS | ||
43 | static char *_rio_riotime_h_sccs = "@(#)riotime.h 1.1"; | ||
44 | #endif | ||
45 | #endif | ||
46 | |||
47 | #define TWO_POWER_FIFTEEN (ushort)32768 | ||
48 | #define RioTime() riotime | ||
49 | #define RioTimeAfter(time1,time2) ((ushort)time1 - (ushort)time2) < TWO_POWER_FIFTEEN | ||
50 | #define RioTimePlus(time1,time2) ((ushort)time1 + (ushort)time2) | ||
51 | |||
52 | /************************************** | ||
53 | * Convert a RIO tick (1/10th second) | ||
54 | * into transputer low priority ticks | ||
55 | *************************************/ | ||
56 | #define RioTimeToLow(time) (time*(100000 / 64)) | ||
57 | #define RioLowToTime(time) ((time*64)/100000) | ||
58 | |||
59 | #define RIOTENTHSECOND (ushort)1 | ||
60 | #define RIOSECOND (ushort)(RIOTENTHSECOND * 10) | ||
61 | #endif | ||
62 | |||
63 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/riotty.c b/drivers/char/rio/riotty.c index 5894a25b0113..6379816ed173 100644 --- a/drivers/char/rio/riotty.c +++ b/drivers/char/rio/riotty.c | |||
@@ -89,16 +89,9 @@ static char *_riotty_c_sccs_ = "@(#)riotty.c 1.3"; | |||
89 | #include "list.h" | 89 | #include "list.h" |
90 | #include "sam.h" | 90 | #include "sam.h" |
91 | 91 | ||
92 | #if 0 | ||
93 | static void ttyseth_pv(struct Port *, struct ttystatics *, struct termios *sg, int); | ||
94 | #endif | ||
95 | |||
96 | static void RIOClearUp(struct Port *PortP); | 92 | static void RIOClearUp(struct Port *PortP); |
97 | int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg); | 93 | int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg); |
98 | 94 | ||
99 | #if 0 | ||
100 | static int RIOCookMode(struct ttystatics *); | ||
101 | #endif | ||
102 | 95 | ||
103 | extern int conv_vb[]; /* now defined in ttymgr.c */ | 96 | extern int conv_vb[]; /* now defined in ttymgr.c */ |
104 | extern int conv_bv[]; /* now defined in ttymgr.c */ | 97 | extern int conv_bv[]; /* now defined in ttymgr.c */ |
@@ -226,33 +219,6 @@ int riotopen(struct tty_struct *tty, struct file *filp) | |||
226 | ** until the RTA is present then we must spin here waiting for | 219 | ** until the RTA is present then we must spin here waiting for |
227 | ** the RTA to boot. | 220 | ** the RTA to boot. |
228 | */ | 221 | */ |
229 | #if 0 | ||
230 | if (!(PortP->HostP->Mapping[PortP->RupNum].Flags & RTA_BOOTED)) { | ||
231 | if (PortP->WaitUntilBooted) { | ||
232 | rio_dprintk(RIO_DEBUG_TTY, "Waiting for RTA to boot\n"); | ||
233 | do { | ||
234 | if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { | ||
235 | rio_dprintk(RIO_DEBUG_TTY, "RTA EINTR in delay \n"); | ||
236 | func_exit(); | ||
237 | return -EINTR; | ||
238 | } | ||
239 | if (repeat_this-- <= 0) { | ||
240 | rio_dprintk(RIO_DEBUG_TTY, "Waiting for RTA to boot timeout\n"); | ||
241 | RIOPreemptiveCmd(p, PortP, FCLOSE); | ||
242 | pseterr(EINTR); | ||
243 | func_exit(); | ||
244 | return -EIO; | ||
245 | } | ||
246 | } while (!(PortP->HostP->Mapping[PortP->RupNum].Flags & RTA_BOOTED)); | ||
247 | rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n"); | ||
248 | } else { | ||
249 | rio_dprintk(RIO_DEBUG_TTY, "RTA never booted\n"); | ||
250 | pseterr(ENXIO); | ||
251 | func_exit(); | ||
252 | return 0; | ||
253 | } | ||
254 | } | ||
255 | #else | ||
256 | /* I find the above code a bit hairy. I find the below code | 222 | /* I find the above code a bit hairy. I find the below code |
257 | easier to read and shorter. Now, if it works too that would | 223 | easier to read and shorter. Now, if it works too that would |
258 | be great... -- REW | 224 | be great... -- REW |
@@ -281,21 +247,10 @@ int riotopen(struct tty_struct *tty, struct file *filp) | |||
281 | } | 247 | } |
282 | } | 248 | } |
283 | rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n"); | 249 | rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n"); |
284 | #endif | ||
285 | #if 0 | ||
286 | tp = PortP->TtyP; /* get tty struct */ | ||
287 | #endif | ||
288 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 250 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
289 | if (p->RIOHalted) { | 251 | if (p->RIOHalted) { |
290 | goto bombout; | 252 | goto bombout; |
291 | } | 253 | } |
292 | #if 0 | ||
293 | retval = gs_init_port(&PortP->gs); | ||
294 | if (retval) { | ||
295 | func_exit(); | ||
296 | return retval; | ||
297 | } | ||
298 | #endif | ||
299 | 254 | ||
300 | /* | 255 | /* |
301 | ** If the port is in the final throws of being closed, | 256 | ** If the port is in the final throws of being closed, |
@@ -363,11 +318,6 @@ int riotopen(struct tty_struct *tty, struct file *filp) | |||
363 | command piggybacks the parameters immediately. | 318 | command piggybacks the parameters immediately. |
364 | -- REW */ | 319 | -- REW */ |
365 | RIOParam(PortP, OPEN, Modem, OK_TO_SLEEP); /* Open the port */ | 320 | RIOParam(PortP, OPEN, Modem, OK_TO_SLEEP); /* Open the port */ |
366 | #if 0 | ||
367 | /* This delay of 1 second was annoying. I removed it. -- REW */ | ||
368 | RIODelay(PortP, HUNDRED_MS * 10); | ||
369 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); /* Config the port */ | ||
370 | #endif | ||
371 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 321 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
372 | 322 | ||
373 | /* | 323 | /* |
@@ -439,9 +389,6 @@ int riotopen(struct tty_struct *tty, struct file *filp) | |||
439 | PortP->State |= RIO_WOPEN; | 389 | PortP->State |= RIO_WOPEN; |
440 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | 390 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); |
441 | if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) | 391 | if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) |
442 | #if 0 | ||
443 | if (sleep((caddr_t) & tp->tm.c_canqo, TTIPRI | PCATCH)) | ||
444 | #endif | ||
445 | { | 392 | { |
446 | /* | 393 | /* |
447 | ** ACTION: verify that this is a good thing | 394 | ** ACTION: verify that this is a good thing |
@@ -505,10 +452,6 @@ int riotopen(struct tty_struct *tty, struct file *filp) | |||
505 | */ | 452 | */ |
506 | int riotclose(void *ptr) | 453 | int riotclose(void *ptr) |
507 | { | 454 | { |
508 | #if 0 | ||
509 | register uint SysPort = dev; | ||
510 | struct ttystatics *tp; /* pointer to our ttystruct */ | ||
511 | #endif | ||
512 | struct Port *PortP = ptr; /* pointer to the port structure */ | 455 | struct Port *PortP = ptr; /* pointer to the port structure */ |
513 | int deleted = 0; | 456 | int deleted = 0; |
514 | int try = -1; /* Disable the timeouts by setting them to -1 */ | 457 | int try = -1; /* Disable the timeouts by setting them to -1 */ |
@@ -534,13 +477,6 @@ int riotclose(void *ptr) | |||
534 | end_time = jiffies + MAX_SCHEDULE_TIMEOUT; | 477 | end_time = jiffies + MAX_SCHEDULE_TIMEOUT; |
535 | 478 | ||
536 | Modem = rio_ismodem(tty); | 479 | Modem = rio_ismodem(tty); |
537 | #if 0 | ||
538 | /* What F.CKING cache? Even then, a higly idle multiprocessor, | ||
539 | system with large caches this won't work . Better find out when | ||
540 | this doesn't work asap, and fix the cause. -- REW */ | ||
541 | |||
542 | RIODelay(PortP, HUNDRED_MS * 10); /* To flush the cache */ | ||
543 | #endif | ||
544 | rio_spin_lock_irqsave(&PortP->portSem, flags); | 480 | rio_spin_lock_irqsave(&PortP->portSem, flags); |
545 | 481 | ||
546 | /* | 482 | /* |
@@ -703,45 +639,6 @@ int riotclose(void *ptr) | |||
703 | } | 639 | } |
704 | 640 | ||
705 | 641 | ||
706 | /* | ||
707 | ** decide if we need to use the line discipline. | ||
708 | ** This routine can return one of three values: | ||
709 | ** COOK_RAW if no processing has to be done by the line discipline or the card | ||
710 | ** COOK_WELL if the line discipline must be used to do the processing | ||
711 | ** COOK_MEDIUM if the card can do all the processing necessary. | ||
712 | */ | ||
713 | #if 0 | ||
714 | static int RIOCookMode(struct ttystatics *tp) | ||
715 | { | ||
716 | /* | ||
717 | ** We can't handle tm.c_mstate != 0 on SCO | ||
718 | ** We can't handle mapping | ||
719 | ** We can't handle non-ttwrite line disc. | ||
720 | ** We can't handle lflag XCASE | ||
721 | ** We can handle oflag OPOST & (OCRNL, ONLCR, TAB3) | ||
722 | */ | ||
723 | |||
724 | #ifdef CHECK | ||
725 | CheckTtyP(tp); | ||
726 | #endif | ||
727 | if (!(tp->tm.c_oflag & OPOST)) /* No post processing */ | ||
728 | return COOK_RAW; /* Raw mode o/p */ | ||
729 | |||
730 | if (tp->tm.c_lflag & XCASE) | ||
731 | return COOK_WELL; /* Use line disc */ | ||
732 | |||
733 | if (tp->tm.c_oflag & ~(OPOST | ONLCR | OCRNL | TAB3)) | ||
734 | return COOK_WELL; /* Use line disc for strange modes */ | ||
735 | |||
736 | if (tp->tm.c_oflag == OPOST) /* If only OPOST is set, do RAW */ | ||
737 | return COOK_RAW; | ||
738 | |||
739 | /* | ||
740 | ** So, we need to output process! | ||
741 | */ | ||
742 | return COOK_MEDIUM; | ||
743 | } | ||
744 | #endif | ||
745 | 642 | ||
746 | static void RIOClearUp(PortP) | 643 | static void RIOClearUp(PortP) |
747 | struct Port *PortP; | 644 | struct Port *PortP; |
@@ -776,11 +673,6 @@ int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len | |||
776 | unsigned long flags; | 673 | unsigned long flags; |
777 | 674 | ||
778 | rio_dprintk(RIO_DEBUG_TTY, "entering shortcommand.\n"); | 675 | rio_dprintk(RIO_DEBUG_TTY, "entering shortcommand.\n"); |
779 | #ifdef CHECK | ||
780 | CheckPortP(PortP); | ||
781 | if (len < 1 || len > 2) | ||
782 | cprintf(("STUPID LENGTH %d\n", len)); | ||
783 | #endif | ||
784 | 676 | ||
785 | if (PortP->State & RIO_DELETED) { | 677 | if (PortP->State & RIO_DELETED) { |
786 | rio_dprintk(RIO_DEBUG_TTY, "Short command to deleted RTA ignored\n"); | 678 | rio_dprintk(RIO_DEBUG_TTY, "Short command to deleted RTA ignored\n"); |
@@ -852,478 +744,3 @@ int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len | |||
852 | } | 744 | } |
853 | 745 | ||
854 | 746 | ||
855 | #if 0 | ||
856 | /* | ||
857 | ** This is an ioctl interface. This is the twentieth century. You know what | ||
858 | ** its all about. | ||
859 | */ | ||
860 | int riotioctl(struct rio_info *p, struct tty_struct *tty, int cmd, caddr_t arg) | ||
861 | { | ||
862 | register struct Port *PortP; | ||
863 | register struct ttystatics *tp; | ||
864 | int current; | ||
865 | int ParamSemIncremented = 0; | ||
866 | int old_oflag, old_cflag, old_iflag, changed, oldcook; | ||
867 | int i; | ||
868 | unsigned char sio_regs[5]; /* Here be magic */ | ||
869 | short vpix_cflag; | ||
870 | short divisor; | ||
871 | int baud; | ||
872 | uint SysPort = rio_minor(tty); | ||
873 | int Modem = rio_ismodem(tty); | ||
874 | int ioctl_processed; | ||
875 | |||
876 | rio_dprintk(RIO_DEBUG_TTY, "port ioctl SysPort %d command 0x%x argument 0x%x %s\n", SysPort, cmd, arg, Modem ? "Modem" : "tty"); | ||
877 | |||
878 | if (SysPort >= RIO_PORTS) { | ||
879 | rio_dprintk(RIO_DEBUG_TTY, "Bad port number %d\n", SysPort); | ||
880 | return -ENXIO; | ||
881 | } | ||
882 | |||
883 | PortP = p->RIOPortp[SysPort]; | ||
884 | tp = PortP->TtyP; | ||
885 | |||
886 | rio_spin_lock_irqsave(&PortP->portSem, flags); | ||
887 | |||
888 | #ifdef STATS | ||
889 | PortP->Stat.IoctlCnt++; | ||
890 | #endif | ||
891 | |||
892 | if (PortP->State & RIO_DELETED) { | ||
893 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
894 | return -EIO; | ||
895 | } | ||
896 | |||
897 | |||
898 | if (p->RIOHalted) { | ||
899 | RIOClearUp(PortP); | ||
900 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
901 | return -EIO; | ||
902 | } | ||
903 | |||
904 | /* | ||
905 | ** Count ioctls for port statistics reporting | ||
906 | */ | ||
907 | if (PortP->statsGather) | ||
908 | PortP->ioctls++; | ||
909 | |||
910 | /* | ||
911 | ** Specialix RIO Ioctl calls | ||
912 | */ | ||
913 | switch (cmd) { | ||
914 | |||
915 | case TCRIOTRIAD: | ||
916 | if (arg) | ||
917 | PortP->State |= RIO_TRIAD_MODE; | ||
918 | else | ||
919 | PortP->State &= ~RIO_TRIAD_MODE; | ||
920 | /* | ||
921 | ** Normally, when istrip is set on a port, a config is | ||
922 | ** sent to the RTA instructing the CD1400 to do the | ||
923 | ** stripping. In TRIAD mode, the interrupt receive routine | ||
924 | ** must do the stripping instead, since it has to detect | ||
925 | ** an 8 bit function key sequence. If istrip is set with | ||
926 | ** TRIAD mode on(off), and 8 bit data is being read by | ||
927 | ** the port, the user then turns TRIAD mode off(on), the RTA | ||
928 | ** must be reconfigured (not) to do the stripping. | ||
929 | ** Hence we call RIOParam here. | ||
930 | */ | ||
931 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
932 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
933 | return 0; | ||
934 | |||
935 | case TCRIOTSTATE: | ||
936 | rio_dprintk(RIO_DEBUG_TTY, "tbusy/tstop monitoring %sabled\n", arg ? "en" : "dis"); | ||
937 | /* MonitorTstate = 0 ; */ | ||
938 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
939 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
940 | return 0; | ||
941 | |||
942 | case TCRIOSTATE: /* current state of Modem input pins */ | ||
943 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOSTATE\n"); | ||
944 | if (RIOPreemptiveCmd(p, PortP, MGET) == RIO_FAIL) | ||
945 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOSTATE command failed\n"); | ||
946 | PortP->State |= RIO_BUSY; | ||
947 | current = PortP->ModemState; | ||
948 | if (copyout((caddr_t) & current, (int) arg, sizeof(current)) == COPYFAIL) { | ||
949 | rio_dprintk(RIO_DEBUG_TTY, "Copyout failed\n"); | ||
950 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
951 | pseterr(EFAULT); | ||
952 | } | ||
953 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
954 | return 0; | ||
955 | |||
956 | case TCRIOMBIS: /* Set modem lines */ | ||
957 | case TCRIOMBIC: /* Clear modem lines */ | ||
958 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIS/TCRIOMBIC\n"); | ||
959 | if (cmd == TCRIOMBIS) { | ||
960 | uint state; | ||
961 | state = (uint) arg; | ||
962 | PortP->ModemState |= (ushort) state; | ||
963 | PortP->ModemLines = (ulong) arg; | ||
964 | if (RIOPreemptiveCmd(p, PortP, MBIS) == RIO_FAIL) | ||
965 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIS command failed\n"); | ||
966 | } else { | ||
967 | uint state; | ||
968 | |||
969 | state = (uint) arg; | ||
970 | PortP->ModemState &= ~(ushort) state; | ||
971 | PortP->ModemLines = (ulong) arg; | ||
972 | if (RIOPreemptiveCmd(p, PortP, MBIC) == RIO_FAIL) | ||
973 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIC command failed\n"); | ||
974 | } | ||
975 | PortP->State |= RIO_BUSY; | ||
976 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
977 | return 0; | ||
978 | |||
979 | case TCRIOXPON: /* set Xprint ON string */ | ||
980 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPON\n"); | ||
981 | if (copyin((int) arg, (caddr_t) PortP->Xprint.XpOn, MAX_XP_CTRL_LEN) == COPYFAIL) { | ||
982 | rio_dprintk(RIO_DEBUG_TTY, "Copyin failed\n"); | ||
983 | PortP->Xprint.XpOn[0] = '\0'; | ||
984 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
985 | pseterr(EFAULT); | ||
986 | } | ||
987 | PortP->Xprint.XpOn[MAX_XP_CTRL_LEN - 1] = '\0'; | ||
988 | PortP->Xprint.XpLen = strlen(PortP->Xprint.XpOn) + strlen(PortP->Xprint.XpOff); | ||
989 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
990 | return 0; | ||
991 | |||
992 | case TCRIOXPOFF: /* set Xprint OFF string */ | ||
993 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPOFF\n"); | ||
994 | if (copyin((int) arg, (caddr_t) PortP->Xprint.XpOff, MAX_XP_CTRL_LEN) == COPYFAIL) { | ||
995 | rio_dprintk(RIO_DEBUG_TTY, "Copyin failed\n"); | ||
996 | PortP->Xprint.XpOff[0] = '\0'; | ||
997 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
998 | pseterr(EFAULT); | ||
999 | } | ||
1000 | PortP->Xprint.XpOff[MAX_XP_CTRL_LEN - 1] = '\0'; | ||
1001 | PortP->Xprint.XpLen = strlen(PortP->Xprint.XpOn) + strlen(PortP->Xprint.XpOff); | ||
1002 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1003 | return 0; | ||
1004 | |||
1005 | case TCRIOXPCPS: /* set Xprint CPS string */ | ||
1006 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPCPS\n"); | ||
1007 | if ((uint) arg > p->RIOConf.MaxXpCps || (uint) arg < p->RIOConf.MinXpCps) { | ||
1008 | rio_dprintk(RIO_DEBUG_TTY, "%d CPS out of range\n", arg); | ||
1009 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1010 | pseterr(EINVAL); | ||
1011 | return 0; | ||
1012 | } | ||
1013 | PortP->Xprint.XpCps = (uint) arg; | ||
1014 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1015 | return 0; | ||
1016 | |||
1017 | case TCRIOXPRINT: | ||
1018 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPRINT\n"); | ||
1019 | if (copyout((caddr_t) & PortP->Xprint, (int) arg, sizeof(struct Xprint)) == COPYFAIL) { | ||
1020 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1021 | pseterr(EFAULT); | ||
1022 | } | ||
1023 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1024 | return 0; | ||
1025 | |||
1026 | case TCRIOIXANYON: | ||
1027 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXANYON\n"); | ||
1028 | PortP->Config |= RIO_IXANY; | ||
1029 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1030 | return 0; | ||
1031 | |||
1032 | case TCRIOIXANYOFF: | ||
1033 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXANYOFF\n"); | ||
1034 | PortP->Config &= ~RIO_IXANY; | ||
1035 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1036 | return 0; | ||
1037 | |||
1038 | case TCRIOIXONON: | ||
1039 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXONON\n"); | ||
1040 | PortP->Config |= RIO_IXON; | ||
1041 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1042 | return 0; | ||
1043 | |||
1044 | case TCRIOIXONOFF: | ||
1045 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXONOFF\n"); | ||
1046 | PortP->Config &= ~RIO_IXON; | ||
1047 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1048 | return 0; | ||
1049 | |||
1050 | /* | ||
1051 | ** 15.10.1998 ARG - ESIL 0761 part fix | ||
1052 | ** Added support for CTS and RTS flow control ioctls : | ||
1053 | */ | ||
1054 | case TCRIOCTSFLOWEN: | ||
1055 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOCTSFLOWEN\n"); | ||
1056 | PortP->Config |= RIO_CTSFLOW; | ||
1057 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1058 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
1059 | return 0; | ||
1060 | |||
1061 | case TCRIOCTSFLOWDIS: | ||
1062 | rio_dprintk(RIO_DEBUG_TTY, "TCRIOCTSFLOWDIS\n"); | ||
1063 | PortP->Config &= ~RIO_CTSFLOW; | ||
1064 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1065 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
1066 | return 0; | ||
1067 | |||
1068 | case TCRIORTSFLOWEN: | ||
1069 | rio_dprintk(RIO_DEBUG_TTY, "TCRIORTSFLOWEN\n"); | ||
1070 | PortP->Config |= RIO_RTSFLOW; | ||
1071 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1072 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
1073 | return 0; | ||
1074 | |||
1075 | case TCRIORTSFLOWDIS: | ||
1076 | rio_dprintk(RIO_DEBUG_TTY, "TCRIORTSFLOWDIS\n"); | ||
1077 | PortP->Config &= ~RIO_RTSFLOW; | ||
1078 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1079 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
1080 | return 0; | ||
1081 | |||
1082 | /* end ESIL 0761 part fix */ | ||
1083 | |||
1084 | } | ||
1085 | |||
1086 | |||
1087 | /* Lynx IOCTLS */ | ||
1088 | switch (cmd) { | ||
1089 | case TIOCSETP: | ||
1090 | case TIOCSETN: | ||
1091 | case OTIOCSETP: | ||
1092 | case OTIOCSETN: | ||
1093 | ioctl_processed++; | ||
1094 | ttyseth(PortP, tp, (struct old_sgttyb *) arg); | ||
1095 | break; | ||
1096 | case TCSETA: | ||
1097 | case TCSETAW: | ||
1098 | case TCSETAF: | ||
1099 | ioctl_processed++; | ||
1100 | rio_dprintk(RIO_DEBUG_TTY, "NON POSIX ioctl\n"); | ||
1101 | ttyseth_pv(PortP, tp, (struct termios *) arg, 0); | ||
1102 | break; | ||
1103 | case TCSETAP: /* posix tcsetattr() */ | ||
1104 | case TCSETAWP: /* posix tcsetattr() */ | ||
1105 | case TCSETAFP: /* posix tcsetattr() */ | ||
1106 | rio_dprintk(RIO_DEBUG_TTY, "NON POSIX SYSV ioctl\n"); | ||
1107 | ttyseth_pv(PortP, tp, (struct termios *) arg, 1); | ||
1108 | ioctl_processed++; | ||
1109 | break; | ||
1110 | } | ||
1111 | |||
1112 | /* | ||
1113 | ** If its any of the commands that require the port to be in the | ||
1114 | ** non-busy state wait until all output has drained | ||
1115 | */ | ||
1116 | if (!ioctl_processed) | ||
1117 | switch (cmd) { | ||
1118 | case TCSETAW: | ||
1119 | case TCSETAF: | ||
1120 | case TCSETA: | ||
1121 | case TCSBRK: | ||
1122 | #define OLD_POSIX ('x' << 8) | ||
1123 | #define OLD_POSIX_SETA (OLD_POSIX | 2) | ||
1124 | #define OLD_POSIX_SETAW (OLD_POSIX | 3) | ||
1125 | #define OLD_POSIX_SETAF (OLD_POSIX | 4) | ||
1126 | #define NEW_POSIX (('i' << 24) | ('X' << 16)) | ||
1127 | #define NEW_POSIX_SETA (NEW_POSIX | 2) | ||
1128 | #define NEW_POSIX_SETAW (NEW_POSIX | 3) | ||
1129 | #define NEW_POSIX_SETAF (NEW_POSIX | 4) | ||
1130 | case OLD_POSIX_SETA: | ||
1131 | case OLD_POSIX_SETAW: | ||
1132 | case OLD_POSIX_SETAF: | ||
1133 | case NEW_POSIX_SETA: | ||
1134 | case NEW_POSIX_SETAW: | ||
1135 | case NEW_POSIX_SETAF: | ||
1136 | #ifdef TIOCSETP | ||
1137 | case TIOCSETP: | ||
1138 | #endif | ||
1139 | case TIOCSETD: | ||
1140 | case TIOCSETN: | ||
1141 | rio_dprintk(RIO_DEBUG_TTY, "wait for non-BUSY, semaphore set\n"); | ||
1142 | /* | ||
1143 | ** Wait for drain here, at least as far as the double buffer | ||
1144 | ** being empty. | ||
1145 | */ | ||
1146 | /* XXX Does the above comment mean that this has | ||
1147 | still to be implemented? -- REW */ | ||
1148 | /* XXX Is the locking OK together with locking | ||
1149 | in txenable? (Deadlock?) -- REW */ | ||
1150 | |||
1151 | RIOTxEnable((char *) PortP); | ||
1152 | break; | ||
1153 | default: | ||
1154 | break; | ||
1155 | } | ||
1156 | |||
1157 | old_cflag = tp->tm.c_cflag; | ||
1158 | old_iflag = tp->tm.c_iflag; | ||
1159 | old_oflag = tp->tm.c_oflag; | ||
1160 | oldcook = PortP->CookMode; | ||
1161 | |||
1162 | if (p->RIOHalted) { | ||
1163 | RIOClearUp(PortP); | ||
1164 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1165 | pseterr(EIO); | ||
1166 | return 0; | ||
1167 | } | ||
1168 | |||
1169 | PortP->FlushCmdBodge = 0; | ||
1170 | |||
1171 | /* | ||
1172 | ** If the port is locked, and it is reconfigured, we want | ||
1173 | ** to restore the state of the tty structure so the change is NOT | ||
1174 | ** made. | ||
1175 | */ | ||
1176 | if (PortP->Lock) { | ||
1177 | tp->tm.c_iflag = PortP->StoredTty.iflag; | ||
1178 | tp->tm.c_oflag = PortP->StoredTty.oflag; | ||
1179 | tp->tm.c_cflag = PortP->StoredTty.cflag; | ||
1180 | tp->tm.c_lflag = PortP->StoredTty.lflag; | ||
1181 | tp->tm.c_line = PortP->StoredTty.line; | ||
1182 | for (i = 0; i < NCC + 1; i++) | ||
1183 | tp->tm.c_cc[i] = PortP->StoredTty.cc[i]; | ||
1184 | } else { | ||
1185 | /* | ||
1186 | ** If the port is set to store the parameters, and it is | ||
1187 | ** reconfigured, we want to save the current tty struct so it | ||
1188 | ** may be restored on the next open. | ||
1189 | */ | ||
1190 | if (PortP->Store) { | ||
1191 | PortP->StoredTty.iflag = tp->tm.c_iflag; | ||
1192 | PortP->StoredTty.oflag = tp->tm.c_oflag; | ||
1193 | PortP->StoredTty.cflag = tp->tm.c_cflag; | ||
1194 | PortP->StoredTty.lflag = tp->tm.c_lflag; | ||
1195 | PortP->StoredTty.line = tp->tm.c_line; | ||
1196 | for (i = 0; i < NCC + 1; i++) | ||
1197 | PortP->StoredTty.cc[i] = tp->tm.c_cc[i]; | ||
1198 | } | ||
1199 | } | ||
1200 | |||
1201 | changed = (tp->tm.c_cflag != old_cflag) || (tp->tm.c_iflag != old_iflag) || (tp->tm.c_oflag != old_oflag); | ||
1202 | |||
1203 | PortP->CookMode = RIOCookMode(tp); /* Set new cooking mode */ | ||
1204 | |||
1205 | rio_dprintk(RIO_DEBUG_TTY, "RIOIoctl changed %d newcook %d oldcook %d\n", changed, PortP->CookMode, oldcook); | ||
1206 | |||
1207 | #ifdef MODEM_SUPPORT | ||
1208 | /* | ||
1209 | ** kludge to force CARR_ON if CLOCAL set | ||
1210 | */ | ||
1211 | if ((tp->tm.c_cflag & CLOCAL) || (PortP->ModemState & MSVR1_CD)) { | ||
1212 | tp->tm.c_state |= CARR_ON; | ||
1213 | wakeup((caddr_t) & tp->tm.c_canq); | ||
1214 | } | ||
1215 | #endif | ||
1216 | |||
1217 | if (p->RIOHalted) { | ||
1218 | RIOClearUp(PortP); | ||
1219 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1220 | pseterr(EIO); | ||
1221 | return 0; | ||
1222 | } | ||
1223 | /* | ||
1224 | ** Re-configure if modes or cooking have changed | ||
1225 | */ | ||
1226 | if (changed || oldcook != PortP->CookMode || (ioctl_processed)) { | ||
1227 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1228 | rio_dprintk(RIO_DEBUG_TTY, "Ioctl changing the PORT settings\n"); | ||
1229 | RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); | ||
1230 | rio_spin_lock_irqsave(&PortP->portSem, flags); | ||
1231 | } | ||
1232 | |||
1233 | if (p->RIOHalted) { | ||
1234 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1235 | RIOClearUp(PortP); | ||
1236 | pseterr(EIO); | ||
1237 | return 0; | ||
1238 | } | ||
1239 | rio_spin_unlock_irqrestore(&PortP->portSem, flags); | ||
1240 | return 0; | ||
1241 | } | ||
1242 | |||
1243 | /* | ||
1244 | ttyseth -- set hardware dependent tty settings | ||
1245 | */ | ||
1246 | void ttyseth(PortP, s, sg) | ||
1247 | struct Port *PortP; | ||
1248 | struct ttystatics *s; | ||
1249 | struct old_sgttyb *sg; | ||
1250 | { | ||
1251 | struct old_sgttyb *tsg; | ||
1252 | struct termios *tp = &s->tm; | ||
1253 | |||
1254 | tsg = &s->sg; | ||
1255 | |||
1256 | if (sg->sg_flags & (EVENP | ODDP)) { | ||
1257 | tp->c_cflag &= PARENB; | ||
1258 | if (sg->sg_flags & EVENP) { | ||
1259 | if (sg->sg_flags & ODDP) { | ||
1260 | tp->c_cflag &= V_CS7; | ||
1261 | tp->c_cflag &= ~PARENB; | ||
1262 | } else { | ||
1263 | tp->c_cflag &= V_CS7; | ||
1264 | tp->c_cflag &= PARENB; | ||
1265 | tp->c_cflag &= PARODD; | ||
1266 | } | ||
1267 | } else if (sg->sg_flags & ODDP) { | ||
1268 | tp->c_cflag &= V_CS7; | ||
1269 | tp->c_cflag &= PARENB; | ||
1270 | tp->c_cflag &= PARODD; | ||
1271 | } else { | ||
1272 | tp->c_cflag &= V_CS7; | ||
1273 | tp->c_cflag &= PARENB; | ||
1274 | } | ||
1275 | } | ||
1276 | /* | ||
1277 | * Use ispeed as the desired speed. Most implementations don't handle | ||
1278 | * separate input and output speeds very well. If the RIO handles this, | ||
1279 | * I will have to use separate sets of flags to store them in the | ||
1280 | * Port structure. | ||
1281 | */ | ||
1282 | if (!sg->sg_ospeed) | ||
1283 | sg->sg_ospeed = sg->sg_ispeed; | ||
1284 | else | ||
1285 | sg->sg_ispeed = sg->sg_ospeed; | ||
1286 | if (sg->sg_ispeed > V_EXTB) | ||
1287 | sg->sg_ispeed = V_EXTB; | ||
1288 | if (sg->sg_ispeed < V_B0) | ||
1289 | sg->sg_ispeed = V_B0; | ||
1290 | *tsg = *sg; | ||
1291 | tp->c_cflag = (tp->c_cflag & ~V_CBAUD) | conv_bv[(int) sg->sg_ispeed]; | ||
1292 | } | ||
1293 | |||
1294 | /* | ||
1295 | ttyseth_pv -- set hardware dependent tty settings using either the | ||
1296 | POSIX termios structure or the System V termio structure. | ||
1297 | sysv = 0 => (POSIX): struct termios *sg | ||
1298 | sysv != 0 => (System V): struct termio *sg | ||
1299 | */ | ||
1300 | static void ttyseth_pv(PortP, s, sg, sysv) | ||
1301 | struct Port *PortP; | ||
1302 | struct ttystatics *s; | ||
1303 | struct termios *sg; | ||
1304 | int sysv; | ||
1305 | { | ||
1306 | int speed; | ||
1307 | unsigned char csize; | ||
1308 | unsigned char cread; | ||
1309 | unsigned int lcr_flags; | ||
1310 | int ps; | ||
1311 | |||
1312 | if (sysv) { | ||
1313 | /* sg points to a System V termio structure */ | ||
1314 | csize = ((struct termio *) sg)->c_cflag & CSIZE; | ||
1315 | cread = ((struct termio *) sg)->c_cflag & CREAD; | ||
1316 | speed = conv_vb[((struct termio *) sg)->c_cflag & V_CBAUD]; | ||
1317 | } else { | ||
1318 | /* sg points to a POSIX termios structure */ | ||
1319 | csize = sg->c_cflag & CSIZE; | ||
1320 | cread = sg->c_cflag & CREAD; | ||
1321 | speed = conv_vb[sg->c_cflag & V_CBAUD]; | ||
1322 | } | ||
1323 | if (s->sg.sg_ispeed != speed || s->sg.sg_ospeed != speed) { | ||
1324 | s->sg.sg_ispeed = speed; | ||
1325 | s->sg.sg_ospeed = speed; | ||
1326 | s->tm.c_cflag = (s->tm.c_cflag & ~V_CBAUD) | conv_bv[(int) s->sg.sg_ispeed]; | ||
1327 | } | ||
1328 | } | ||
1329 | #endif | ||
diff --git a/drivers/char/rio/riowinif.h b/drivers/char/rio/riowinif.h deleted file mode 100644 index f802d7593b80..000000000000 --- a/drivers/char/rio/riowinif.h +++ /dev/null | |||
@@ -1,1329 +0,0 @@ | |||
1 | /************************************************************************/ | ||
2 | /* */ | ||
3 | /* Title : RIO Shared Memory Window Inteface */ | ||
4 | /* */ | ||
5 | /* Author : N.P.Vassallo */ | ||
6 | /* */ | ||
7 | /* Creation : 7th June 1999 */ | ||
8 | /* */ | ||
9 | /* Version : 1.0.0 */ | ||
10 | /* */ | ||
11 | /* Copyright : (c) Specialix International Ltd. 1999 * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation; either version 2 of the License, or | ||
15 | * (at your option) any later version. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License | ||
23 | * along with this program; if not, write to the Free Software | ||
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | * */ | ||
26 | /* Description : Prototypes, structures and definitions */ | ||
27 | /* describing RIO host card shared memory */ | ||
28 | /* window interface structures: */ | ||
29 | /* PARMMAP */ | ||
30 | /* RUP */ | ||
31 | /* PHB */ | ||
32 | /* LPB */ | ||
33 | /* PKT */ | ||
34 | /* */ | ||
35 | /************************************************************************/ | ||
36 | |||
37 | /* History... | ||
38 | |||
39 | 1.0.0 07/06/99 NPV Creation. (based on PARMMAP.H) | ||
40 | |||
41 | */ | ||
42 | |||
43 | #ifndef _riowinif_h /* If RIOWINDIF.H not already defined */ | ||
44 | #define _riowinif_h 1 | ||
45 | |||
46 | /***************************************************************************** | ||
47 | ******************************** ********************************* | ||
48 | ******************************** General ********************************* | ||
49 | ******************************** ********************************* | ||
50 | *****************************************************************************/ | ||
51 | |||
52 | #define TPNULL ((_u16)(0x8000)) | ||
53 | |||
54 | /***************************************************************************** | ||
55 | ******************************** ******************************** | ||
56 | ******************************** PARM_MAP ******************************** | ||
57 | ******************************** ******************************** | ||
58 | *****************************************************************************/ | ||
59 | |||
60 | /* The PARM_MAP structure defines global values relating to the Host Card / RTA | ||
61 | and is the main structure from which all other structures are referenced. */ | ||
62 | |||
63 | typedef struct _PARM_MAP { | ||
64 | _u16 phb_ptr; /* 0x00 Pointer to the PHB array */ | ||
65 | _u16 phb_num_ptr; /* 0x02 Ptr to Number of PHB's */ | ||
66 | _u16 free_list; /* 0x04 Free List pointer */ | ||
67 | _u16 free_list_end; /* 0x06 Free List End pointer */ | ||
68 | _u16 q_free_list_ptr; /* 0x08 Ptr to Q_BUF variable */ | ||
69 | _u16 unit_id_ptr; /* 0x0A Unit Id */ | ||
70 | _u16 link_str_ptr; /* 0x0C Link Structure Array */ | ||
71 | _u16 bootloader_1; /* 0x0E 1st Stage Boot Loader */ | ||
72 | _u16 bootloader_2; /* 0x10 2nd Stage Boot Loader */ | ||
73 | _u16 port_route_map_ptr; /* 0x12 Port Route Map */ | ||
74 | _u16 route_ptr; /* 0x14 Route Map */ | ||
75 | _u16 map_present; /* 0x16 Route Map present */ | ||
76 | _u16 pkt_num; /* 0x18 Total number of packets */ | ||
77 | _u16 q_num; /* 0x1A Total number of Q packets */ | ||
78 | _u16 buffers_per_port; /* 0x1C Number of buffers per port */ | ||
79 | _u16 heap_size; /* 0x1E Initial size of heap */ | ||
80 | _u16 heap_left; /* 0x20 Current Heap left */ | ||
81 | _u16 error; /* 0x22 Error code */ | ||
82 | _u16 tx_max; /* 0x24 Max number of tx pkts per phb */ | ||
83 | _u16 rx_max; /* 0x26 Max number of rx pkts per phb */ | ||
84 | _u16 rx_limit; /* 0x28 For high / low watermarks */ | ||
85 | _u16 links; /* 0x2A Links to use */ | ||
86 | _u16 timer; /* 0x2C Interrupts per second */ | ||
87 | _u16 rups; /* 0x2E Pointer to the RUPs */ | ||
88 | _u16 max_phb; /* 0x30 Mostly for debugging */ | ||
89 | _u16 living; /* 0x32 Just increments!! */ | ||
90 | _u16 init_done; /* 0x34 Initialisation over */ | ||
91 | _u16 booting_link; /* 0x36 */ | ||
92 | _u16 idle_count; /* 0x38 Idle time counter */ | ||
93 | _u16 busy_count; /* 0x3A Busy counter */ | ||
94 | _u16 idle_control; /* 0x3C Control Idle Process */ | ||
95 | _u16 tx_intr; /* 0x3E TX interrupt pending */ | ||
96 | _u16 rx_intr; /* 0x40 RX interrupt pending */ | ||
97 | _u16 rup_intr; /* 0x42 RUP interrupt pending */ | ||
98 | |||
99 | } PARM_MAP; | ||
100 | |||
101 | /* Same thing again, but defined as offsets... */ | ||
102 | |||
103 | #define PM_phb_ptr 0x00 /* 0x00 Pointer to the PHB array */ | ||
104 | #define PM_phb_num_ptr 0x02 /* 0x02 Ptr to Number of PHB's */ | ||
105 | #define PM_free_list 0x04 /* 0x04 Free List pointer */ | ||
106 | #define PM_free_list_end 0x06 /* 0x06 Free List End pointer */ | ||
107 | #define PM_q_free_list_ptr 0x08 /* 0x08 Ptr to Q_BUF variable */ | ||
108 | #define PM_unit_id_ptr 0x0A /* 0x0A Unit Id */ | ||
109 | #define PM_link_str_ptr 0x0C /* 0x0C Link Structure Array */ | ||
110 | #define PM_bootloader_1 0x0E /* 0x0E 1st Stage Boot Loader */ | ||
111 | #define PM_bootloader_2 0x10 /* 0x10 2nd Stage Boot Loader */ | ||
112 | #define PM_port_route_map_ptr 0x12 /* 0x12 Port Route Map */ | ||
113 | #define PM_route_ptr 0x14 /* 0x14 Route Map */ | ||
114 | #define PM_map_present 0x16 /* 0x16 Route Map present */ | ||
115 | #define PM_pkt_num 0x18 /* 0x18 Total number of packets */ | ||
116 | #define PM_q_num 0x1A /* 0x1A Total number of Q packets */ | ||
117 | #define PM_buffers_per_port 0x1C /* 0x1C Number of buffers per port */ | ||
118 | #define PM_heap_size 0x1E /* 0x1E Initial size of heap */ | ||
119 | #define PM_heap_left 0x20 /* 0x20 Current Heap left */ | ||
120 | #define PM_error 0x22 /* 0x22 Error code */ | ||
121 | #define PM_tx_max 0x24 /* 0x24 Max number of tx pkts per phb */ | ||
122 | #define PM_rx_max 0x26 /* 0x26 Max number of rx pkts per phb */ | ||
123 | #define PM_rx_limit 0x28 /* 0x28 For high / low watermarks */ | ||
124 | #define PM_links 0x2A /* 0x2A Links to use */ | ||
125 | #define PM_timer 0x2C /* 0x2C Interrupts per second */ | ||
126 | #define PM_rups 0x2E /* 0x2E Pointer to the RUPs */ | ||
127 | #define PM_max_phb 0x30 /* 0x30 Mostly for debugging */ | ||
128 | #define PM_living 0x32 /* 0x32 Just increments!! */ | ||
129 | #define PM_init_done 0x34 /* 0x34 Initialisation over */ | ||
130 | #define PM_booting_link 0x36 /* 0x36 */ | ||
131 | #define PM_idle_count 0x38 /* 0x38 Idle time counter */ | ||
132 | #define PM_busy_count 0x3A /* 0x3A Busy counter */ | ||
133 | #define PM_idle_control 0x3C /* 0x3C Control Idle Process */ | ||
134 | #define PM_tx_intr 0x3E /* 0x4E TX interrupt pending */ | ||
135 | #define PM_rx_intr 0x40 /* 0x40 RX interrupt pending */ | ||
136 | #define PM_rup_intr 0x42 /* 0x42 RUP interrupt pending */ | ||
137 | #define sizeof_PARM_MAP 0x44 /* structure size = 0x44 */ | ||
138 | |||
139 | /* PARM_MAP.error definitions... */ | ||
140 | #define E_NO_ERROR 0x00 | ||
141 | #define E_PROCESS_NOT_INIT 0x01 | ||
142 | #define E_LINK_TIMEOUT 0x02 | ||
143 | #define E_NO_ROUTE 0x03 | ||
144 | #define E_CONFUSED 0x04 | ||
145 | #define E_HOME 0x05 | ||
146 | #define E_CSUM_FAIL 0x06 | ||
147 | #define E_DISCONNECTED 0x07 | ||
148 | #define E_BAD_RUP 0x08 | ||
149 | #define E_NO_VIRGIN 0x09 | ||
150 | #define E_BOOT_RUP_BUSY 0x10 | ||
151 | #define E_CHANALLOC 0x80 | ||
152 | #define E_POLL_ALLOC 0x81 | ||
153 | #define E_LTTWAKE 0x82 | ||
154 | #define E_LTT_ALLOC 0x83 | ||
155 | #define E_LRT_ALLOC 0x84 | ||
156 | #define E_CIRRUS 0x85 | ||
157 | #define E_MONITOR 0x86 | ||
158 | #define E_PHB_ALLOC 0x87 | ||
159 | #define E_ARRAY_ALLOC 0x88 | ||
160 | #define E_QBUF_ALLOC 0x89 | ||
161 | #define E_PKT_ALLOC 0x8a | ||
162 | #define E_GET_TX_Q_BUF 0x8b | ||
163 | #define E_GET_RX_Q_BUF 0x8c | ||
164 | #define E_MEM_OUT 0x8d | ||
165 | #define E_MMU_INIT 0x8e | ||
166 | #define E_LTT_INIT 0x8f | ||
167 | #define E_LRT_INIT 0x90 | ||
168 | #define E_LINK_RUN 0x91 | ||
169 | #define E_MONITOR_ALLOC 0x92 | ||
170 | #define E_MONITOR_INIT 0x93 | ||
171 | #define E_POLL_INIT 0x94 | ||
172 | |||
173 | /* PARM_MAP.links definitions... */ | ||
174 | #define RIO_LINK_ENABLE 0x80FF | ||
175 | |||
176 | /***************************************************************************** | ||
177 | ********************************** *********************************** | ||
178 | ********************************** RUP *********************************** | ||
179 | ********************************** *********************************** | ||
180 | *****************************************************************************/ | ||
181 | |||
182 | /* The RUP (Remote Unit Port) structure relates to the Remote Terminal Adapters | ||
183 | attached to the system and there is normally an array of MAX_RUPS (=16) structures | ||
184 | in a host card, defined by PARM_MAP->rup. */ | ||
185 | |||
186 | typedef struct _RUP { | ||
187 | _u16 txpkt; /* 0x00 Outgoing packet */ | ||
188 | _u16 rxpkt; /* 0x02 ncoming packet */ | ||
189 | _u16 link; /* 0x04 Which link to send packet down ? */ | ||
190 | _u8 rup_dest_unit[2]; /* 0x06 Destination Unit */ | ||
191 | _u16 handshake; /* 0x08 Handshaking */ | ||
192 | _u16 timeout; /* 0x0A Timeout */ | ||
193 | _u16 status; /* 0x0C Status */ | ||
194 | _u16 txcontrol; /* 0x0E Transmit control */ | ||
195 | _u16 rxcontrol; /* 0x10 Receive control */ | ||
196 | |||
197 | } RUP; | ||
198 | |||
199 | /* Same thing again, but defined as offsets... */ | ||
200 | |||
201 | #define RUP_txpkt 0x00 /* 0x00 Outgoing packet */ | ||
202 | #define RUP_rxpkt 0x02 /* 0x02 Incoming packet */ | ||
203 | #define RUP_link 0x04 /* 0x04 Which link to send packet down ? */ | ||
204 | #define RUP_rup_dest_unit 0x06 /* 0x06 Destination Unit */ | ||
205 | #define RUP_handshake 0x08 /* 0x08 Handshaking */ | ||
206 | #define RUP_timeout 0x0A /* 0x0A Timeout */ | ||
207 | #define RUP_status 0x0C /* 0x0C Status */ | ||
208 | #define RUP_txcontrol 0x0E /* 0x0E Transmit control */ | ||
209 | #define RUP_rxcontrol 0x10 /* 0x10 Receive control */ | ||
210 | #define sizeof_RUP 0x12 /* structure size = 0x12 */ | ||
211 | |||
212 | #define MAX_RUP 16 | ||
213 | |||
214 | /* RUP.txcontrol definitions... */ | ||
215 | #define TX_RUP_INACTIVE 0 /* Nothing to transmit */ | ||
216 | #define TX_PACKET_READY 1 /* Transmit packet ready */ | ||
217 | #define TX_LOCK_RUP 2 /* Transmit side locked */ | ||
218 | |||
219 | /* RUP.txcontrol definitions... */ | ||
220 | #define RX_RUP_INACTIVE 0 /* Nothing received */ | ||
221 | #define RX_PACKET_READY 1 /* Packet received */ | ||
222 | |||
223 | #define RUP_NO_OWNER 0xFF /* RUP not owned by any process */ | ||
224 | |||
225 | /***************************************************************************** | ||
226 | ********************************** *********************************** | ||
227 | ********************************** PHB *********************************** | ||
228 | ********************************** *********************************** | ||
229 | *****************************************************************************/ | ||
230 | |||
231 | /* The PHB (Port Header Block) structure relates to the serial ports attached | ||
232 | to the system and there is normally an array of MAX_PHBS (=128) structures | ||
233 | in a host card, defined by PARM_MAP->phb_ptr and PARM_MAP->phb_num_ptr. */ | ||
234 | |||
235 | typedef struct _PHB { | ||
236 | _u16 source; /* 0x00 Location of the PHB in the host card */ | ||
237 | _u16 handshake; /* 0x02 Used to manage receive packet flow control */ | ||
238 | _u16 status; /* 0x04 Internal port transmit/receive status */ | ||
239 | _u16 timeout; /* 0x06 Time period to wait for an ACK */ | ||
240 | _u16 link; /* 0x08 The host link associated with the PHB */ | ||
241 | _u16 destination; /* 0x0A Location of the remote port on the network */ | ||
242 | |||
243 | _u16 tx_start; /* 0x0C first entry in the packet array for transmit packets */ | ||
244 | _u16 tx_end; /* 0x0E last entry in the packet array for transmit packets */ | ||
245 | _u16 tx_add; /* 0x10 position in the packet array for new transmit packets */ | ||
246 | _u16 tx_remove; /* 0x12 current position in the packet pointer array */ | ||
247 | |||
248 | _u16 rx_start; /* 0x14 first entry in the packet array for receive packets */ | ||
249 | _u16 rx_end; /* 0x16 last entry in the packet array for receive packets */ | ||
250 | _u16 rx_add; /* 0x18 position in the packet array for new receive packets */ | ||
251 | _u16 rx_remove; /* 0x1A current position in the packet pointer array */ | ||
252 | |||
253 | } PHB; | ||
254 | |||
255 | /* Same thing again, but defined as offsets... */ | ||
256 | |||
257 | #define PHB_source 0x00 /* 0x00 Location of the PHB in the host card */ | ||
258 | #define PHB_handshake 0x02 /* 0x02 Used to manage receive packet flow control */ | ||
259 | #define PHB_status 0x04 /* 0x04 Internal port transmit/receive status */ | ||
260 | #define PHB_timeout 0x06 /* 0x06 Time period to wait for an ACK */ | ||
261 | #define PHB_link 0x08 /* 0x08 The host link associated with the PHB */ | ||
262 | #define PHB_destination 0x0A /* 0x0A Location of the remote port on the network */ | ||
263 | #define PHB_tx_start 0x0C /* 0x0C first entry in the packet array for transmit packets */ | ||
264 | #define PHB_tx_end 0x0E /* 0x0E last entry in the packet array for transmit packets */ | ||
265 | #define PHB_tx_add 0x10 /* 0x10 position in the packet array for new transmit packets */ | ||
266 | #define PHB_tx_remove 0x12 /* 0x12 current position in the packet pointer array */ | ||
267 | #define PHB_rx_start 0x14 /* 0x14 first entry in the packet array for receive packets */ | ||
268 | #define PHB_rx_end 0x16 /* 0x16 last entry in the packet array for receive packets */ | ||
269 | #define PHB_rx_add 0x18 /* 0x18 position in the packet array for new receive packets */ | ||
270 | #define PHB_rx_remove 0x1A /* 0x1A current position in the packet pointer array */ | ||
271 | #define sizeof_PHB 0x1C /* structure size = 0x1C */ | ||
272 | |||
273 | /* PHB.handshake definitions... */ | ||
274 | #define PHB_HANDSHAKE_SET 0x0001 /* Set by LRT */ | ||
275 | #define PHB_HANDSHAKE_RESET 0x0002 /* Set by ISR / driver */ | ||
276 | #define PHB_HANDSHAKE_FLAGS (PHB_HANDSHAKE_RESET|PHB_HANDSHAKE_SET) | ||
277 | /* Reset by ltt */ | ||
278 | |||
279 | #define MAX_PHB 128 /* range 0-127 */ | ||
280 | |||
281 | /***************************************************************************** | ||
282 | ********************************** *********************************** | ||
283 | ********************************** LPB *********************************** | ||
284 | ********************************** *********************************** | ||
285 | *****************************************************************************/ | ||
286 | |||
287 | /* The LPB (Link Parameter Block) structure relates to a RIO Network Link | ||
288 | and there is normally an array of MAX_LINKS (=4) structures in a host card, | ||
289 | defined by PARM_MAP->link_str_ptr. */ | ||
290 | |||
291 | typedef struct _LPB { | ||
292 | _u16 link_number; /* 0x00 Link Number */ | ||
293 | _u16 in_ch; /* 0x02 Link In Channel */ | ||
294 | _u16 out_ch; /* 0x04 Link Out Channel */ | ||
295 | _u8 attached_serial[4]; /* 0x06 Attached serial number */ | ||
296 | _u8 attached_host_serial[4]; /* 0x0A Serial number of Host who booted other end */ | ||
297 | _u16 descheduled; /* 0x0E Currently Descheduled */ | ||
298 | _u16 state; /* 0x10 Current state */ | ||
299 | _u16 send_poll; /* 0x12 Send a Poll Packet */ | ||
300 | _u16 ltt_p; /* 0x14 Process Descriptor */ | ||
301 | _u16 lrt_p; /* 0x16 Process Descriptor */ | ||
302 | _u16 lrt_status; /* 0x18 Current lrt status */ | ||
303 | _u16 ltt_status; /* 0x1A Current ltt status */ | ||
304 | _u16 timeout; /* 0x1C Timeout value */ | ||
305 | _u16 topology; /* 0x1E Topology bits */ | ||
306 | _u16 mon_ltt; /* 0x20 */ | ||
307 | _u16 mon_lrt; /* 0x22 */ | ||
308 | _u16 num_pkts; /* 0x24 */ | ||
309 | _u16 add_packet_list; /* 0x26 Add packets to here */ | ||
310 | _u16 remove_packet_list; /* 0x28 Send packets from here */ | ||
311 | |||
312 | _u16 lrt_fail_chan; /* 0x2A Lrt's failure channel */ | ||
313 | _u16 ltt_fail_chan; /* 0x2C Ltt's failure channel */ | ||
314 | |||
315 | RUP rup; /* 0x2E RUP structure for HOST to driver comms */ | ||
316 | RUP link_rup; /* 0x40 RUP for the link (POLL, topology etc.) */ | ||
317 | _u16 attached_link; /* 0x52 Number of attached link */ | ||
318 | _u16 csum_errors; /* 0x54 csum errors */ | ||
319 | _u16 num_disconnects; /* 0x56 number of disconnects */ | ||
320 | _u16 num_sync_rcvd; /* 0x58 # sync's received */ | ||
321 | _u16 num_sync_rqst; /* 0x5A # sync requests */ | ||
322 | _u16 num_tx; /* 0x5C Num pkts sent */ | ||
323 | _u16 num_rx; /* 0x5E Num pkts received */ | ||
324 | _u16 module_attached; /* 0x60 Module tpyes of attached */ | ||
325 | _u16 led_timeout; /* 0x62 LED timeout */ | ||
326 | _u16 first_port; /* 0x64 First port to service */ | ||
327 | _u16 last_port; /* 0x66 Last port to service */ | ||
328 | |||
329 | } LPB; | ||
330 | |||
331 | /* Same thing again, but defined as offsets... */ | ||
332 | |||
333 | #define LPB_link_number 0x00 /* 0x00 Link Number */ | ||
334 | #define LPB_in_ch 0x02 /* 0x02 Link In Channel */ | ||
335 | #define LPB_out_ch 0x04 /* 0x04 Link Out Channel */ | ||
336 | #define LPB_attached_serial 0x06 /* 0x06 Attached serial number */ | ||
337 | #define LPB_attached_host_serial 0x0A /* 0x0A Serial number of Host who booted other end */ | ||
338 | #define LPB_descheduled 0x0E /* 0x0E Currently Descheduled */ | ||
339 | #define LPB_state 0x10 /* 0x10 Current state */ | ||
340 | #define LPB_send_poll 0x12 /* 0x12 Send a Poll Packet */ | ||
341 | #define LPB_ltt_p 0x14 /* 0x14 Process Descriptor */ | ||
342 | #define LPB_lrt_p 0x16 /* 0x16 Process Descriptor */ | ||
343 | #define LPB_lrt_status 0x18 /* 0x18 Current lrt status */ | ||
344 | #define LPB_ltt_status 0x1A /* 0x1A Current ltt status */ | ||
345 | #define LPB_timeout 0x1C /* 0x1C Timeout value */ | ||
346 | #define LPB_topology 0x1E /* 0x1E Topology bits */ | ||
347 | #define LPB_mon_ltt 0x20 /* 0x20 */ | ||
348 | #define LPB_mon_lrt 0x22 /* 0x22 */ | ||
349 | #define LPB_num_pkts 0x24 /* 0x24 */ | ||
350 | #define LPB_add_packet_list 0x26 /* 0x26 Add packets to here */ | ||
351 | #define LPB_remove_packet_list 0x28 /* 0x28 Send packets from here */ | ||
352 | #define LPB_lrt_fail_chan 0x2A /* 0x2A Lrt's failure channel */ | ||
353 | #define LPB_ltt_fail_chan 0x2C /* 0x2C Ltt's failure channel */ | ||
354 | #define LPB_rup 0x2E /* 0x2E RUP structure for HOST to driver comms */ | ||
355 | #define LPB_link_rup 0x40 /* 0x40 RUP for the link (POLL, topology etc.) */ | ||
356 | #define LPB_attached_link 0x52 /* 0x52 Number of attached link */ | ||
357 | #define LPB_csum_errors 0x54 /* 0x54 csum errors */ | ||
358 | #define LPB_num_disconnects 0x56 /* 0x56 number of disconnects */ | ||
359 | #define LPB_num_sync_rcvd 0x58 /* 0x58 # sync's received */ | ||
360 | #define LPB_num_sync_rqst 0x5A /* 0x5A # sync requests */ | ||
361 | #define LPB_num_tx 0x5C /* 0x5C Num pkts sent */ | ||
362 | #define LPB_num_rx 0x5E /* 0x5E Num pkts received */ | ||
363 | #define LPB_module_attached 0x60 /* 0x60 Module tpyes of attached */ | ||
364 | #define LPB_led_timeout 0x62 /* 0x62 LED timeout */ | ||
365 | #define LPB_first_port 0x64 /* 0x64 First port to service */ | ||
366 | #define LPB_last_port 0x66 /* 0x66 Last port to service */ | ||
367 | #define sizeof_LPB 0x68 /* structure size = 0x68 */ | ||
368 | |||
369 | #define LINKS_PER_UNIT 4 /* number of links from a host */ | ||
370 | |||
371 | /***************************************************************************** | ||
372 | ******************************** ******************************* | ||
373 | ******************************** FREE_LIST ******************************* | ||
374 | ******************************** ******************************* | ||
375 | *****************************************************************************/ | ||
376 | |||
377 | /* Used to overlay packet headers when allocating/freeing packets from the free list */ | ||
378 | |||
379 | typedef struct _FREE_LIST { | ||
380 | _u16 next; /* 0x00 offset of next list item */ | ||
381 | _u16 prev; /* 0x02 offset of previous list item */ | ||
382 | |||
383 | } FREE_LIST; | ||
384 | |||
385 | /* Same thing again, but defined as offsets... */ | ||
386 | |||
387 | #define FL_next 0x00 /* 0x00 offset of next list item */ | ||
388 | #define FL_prev 0x02 /* 0x02 offset of previous list item */ | ||
389 | |||
390 | /***************************************************************************** | ||
391 | ********************************** *********************************** | ||
392 | ********************************** PKT *********************************** | ||
393 | ********************************** *********************************** | ||
394 | *****************************************************************************/ | ||
395 | |||
396 | /* The PKT is the main unit of communication between Host Cards and RTAs across | ||
397 | the RIO network. */ | ||
398 | |||
399 | #define PKT_MAX_DATA_LEN 72 /* Size of packet data */ | ||
400 | |||
401 | typedef struct _PKT { | ||
402 | _u8 dest_unit; /* 0x00 Destination Unit Id */ | ||
403 | _u8 dest_port; /* 0x01 Destination Port */ | ||
404 | _u8 src_unit; /* 0x02 Source Unit Id */ | ||
405 | _u8 src_port; /* 0x03 Source Port */ | ||
406 | _u8 len; /* 0x04 Length (in bytes) of data field */ | ||
407 | _u8 control; /* 0x05 */ | ||
408 | _u8 data[PKT_MAX_DATA_LEN]; /* 0x06 Actual data */ | ||
409 | _u16 csum; /* 0x4E C-SUM */ | ||
410 | |||
411 | } PKT; | ||
412 | |||
413 | /* Same thing again, but defined as offsets... */ | ||
414 | |||
415 | #define PKT_dest_unit 0x00 /* 0x00 Destination Unit Id */ | ||
416 | #define PKT_dest_port 0x01 /* 0x01 Destination Port */ | ||
417 | #define PKT_src_unit 0x02 /* 0x02 Source Unit Id */ | ||
418 | #define PKT_src_port 0x03 /* 0x03 Source Port */ | ||
419 | #define PKT_len 0x04 /* 0x04 Length (in bytes) of data field */ | ||
420 | #define PKT_control 0x05 /* 0x05 */ | ||
421 | #define PKT_data 0x06 /* 0x06 Actual data */ | ||
422 | #define PKT_csum 0x4E /* 0x4E C-SUM */ | ||
423 | #define sizeof_PKT 0x50 /* structure size = 0x50 */ | ||
424 | |||
425 | /* PKT.len definitions... */ | ||
426 | #define PKT_CMD_BIT 0x80 | ||
427 | #define PKT_CMD_DATA 0x80 | ||
428 | #define PKT_LEN_MASK 0x7F | ||
429 | |||
430 | /* PKT.control definitions... */ | ||
431 | #define PKT_ACK 0x40 | ||
432 | #define PKT_TGL 0x20 | ||
433 | #define DATA_WNDW 0x10 | ||
434 | #define PKT_TTL_MASK 0x0F | ||
435 | #define MAX_TTL 0x0F | ||
436 | |||
437 | /***************************************************************************** | ||
438 | ***************************** **************************** | ||
439 | ***************************** Control Packets **************************** | ||
440 | ***************************** **************************** | ||
441 | *****************************************************************************/ | ||
442 | |||
443 | /* The following definitions and structures define the control packets sent | ||
444 | between the driver and RIO Ports, RTAs and Host Cards. */ | ||
445 | |||
446 | #define PRE_EMPTIVE 0x80 /* Pre-emptive command (sent via port's RUP) */ | ||
447 | |||
448 | /* "in-band" and "pre-emptive" port commands... */ | ||
449 | #define OPEN 0x00 /* Driver->RIO Open a port */ | ||
450 | #define CONFIG 0x01 /* Driver->RIO Configure a port */ | ||
451 | #define MOPEN 0x02 /* Driver->RIO Modem open (wait for DCD) */ | ||
452 | #define CLOSE 0x03 /* Driver->RIO Close a port */ | ||
453 | #define WFLUSH (0x04|PRE_EMPTIVE) /* Driver->RIO Write flush */ | ||
454 | #define RFLUSH (0x05|PRE_EMPTIVE) /* Driver->RIO Read flush */ | ||
455 | #define RESUME (0x06|PRE_EMPTIVE) /* Driver->RIO Behave as if XON received */ | ||
456 | #define SBREAK 0x07 /* Driver->RIO Start break */ | ||
457 | #define EBREAK 0x08 /* Driver->RIO End break */ | ||
458 | #define SUSPEND (0x09|PRE_EMPTIVE) /* Driver->RIO Behave as if XOFF received */ | ||
459 | #define FCLOSE (0x0A|PRE_EMPTIVE) /* Driver->RIO Force close */ | ||
460 | #define XPRINT 0x0B /* Driver->RIO Xprint packet */ | ||
461 | #define MBIS (0x0C|PRE_EMPTIVE) /* Driver->RIO Set modem lines */ | ||
462 | #define MBIC (0x0D|PRE_EMPTIVE) /* Driver->RIO Clear modem lines */ | ||
463 | #define MSET (0x0E|PRE_EMPTIVE) /* Driver->RIO Set modem lines */ | ||
464 | #define PCLOSE 0x0F /* Driver->RIO Pseudo close */ | ||
465 | #define MGET (0x10|PRE_EMPTIVE) /* Driver->RIO Force update of modem status */ | ||
466 | #define MEMDUMP (0x11|PRE_EMPTIVE) /* Driver->RIO DEBUG request for RTA memory */ | ||
467 | #define READ_REGISTER (0x12|PRE_EMPTIVE) /* Driver->RIO DEBUG read CD1400 register */ | ||
468 | |||
469 | /* Remote Unit Port (RUP) packet definitions... (specified in PKT.dest_unit and PKT.src_unit) */ | ||
470 | #define SYNC_RUP 0xFF /* Download internal */ | ||
471 | #define COMMAND_RUP 0xFE /* Command ack/status */ | ||
472 | #define ERROR_RUP 0xFD /* Download internal */ | ||
473 | #define POLL_RUP 0xFC /* Download internal */ | ||
474 | #define BOOT_RUP 0xFB /* Used to boot RTAs */ | ||
475 | #define ROUTE_RUP 0xFA /* Used to specify routing/topology */ | ||
476 | #define STATUS_RUP 0xF9 /* Not used */ | ||
477 | #define POWER_RUP 0xF8 /* Download internal */ | ||
478 | |||
479 | /* COMMAND_RUP definitions... */ | ||
480 | #define COMPLETE (0x20|PRE_EMPTIVE) /* RIO->Driver Command complete */ | ||
481 | #define BREAK_RECEIVED (0x21|PRE_EMPTIVE) /* RIO->Driver Break received */ | ||
482 | #define MODEM_STATUS (0x22|PRE_EMPTIVE) /* RIO->Driver Modem status change */ | ||
483 | |||
484 | /* BOOT_RUP definitions... */ | ||
485 | #define BOOT_REQUEST 0x00 /* RIO->Driver Request for boot */ | ||
486 | #define BOOT_ABORT 0x01 /* Driver->RIO Abort a boot */ | ||
487 | #define BOOT_SEQUENCE 0x02 /* Driver->RIO Packet with firmware details */ | ||
488 | #define BOOT_COMPLETED 0x03 /* RIO->Driver Boot completed */ | ||
489 | #define IFOAD 0x2F /* Driver->RIO Shutdown/Reboot RTA (Fall Over And Die) */ | ||
490 | #define IDENTIFY 0x30 /* Driver->RIO Identify RTA */ | ||
491 | #define ZOMBIE 0x31 /* Driver->RIO Shutdown/Flash LEDs */ | ||
492 | #define UFOAD 0x32 /* Driver->RIO Shutdown/Reboot neighbouring RTA */ | ||
493 | #define IWAIT 0x33 /* Driver->RIO Pause booting process */ | ||
494 | |||
495 | /* ROUTE_RUP definitions... */ | ||
496 | #define ROUTE_REQUEST 0x00 /* RIO->Driver Request an ID */ | ||
497 | #define ROUTE_FOAD 0x01 /* Driver->RIO Shutdown/reboot RTA */ | ||
498 | #define ROUTE_ALREADY 0x02 /* Driver->RIO Not used */ | ||
499 | #define ROUTE_USED 0x03 /* Driver->RIO Not used */ | ||
500 | #define ROUTE_ALLOCATE 0x04 /* Driver->RIO Allocate RTA RUP numbers */ | ||
501 | #define ROUTE_REQ_TOP 0x05 /* Driver->RIO Not used */ | ||
502 | #define ROUTE_TOPOLOGY 0x06 /* RIO->Driver Route/Topology status */ | ||
503 | |||
504 | /***************************************************************************** | ||
505 | ********************************** ********************************** | ||
506 | ********************************** OPEN ********************************** | ||
507 | ********************************** ********************************** | ||
508 | *****************************************************************************/ | ||
509 | |||
510 | /* (Driver->RIO,in-band) | ||
511 | |||
512 | Sent to open a port. | ||
513 | Structure of configuration info used with OPEN, CONFIG and MOPEN packets... */ | ||
514 | |||
515 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
516 | #define PKT_Cor1 (PKT_Data+1) /* Channel Option Register 1 */ | ||
517 | #define PKT_Cor2 (PKT_Data+2) /* Channel Option Register 2 */ | ||
518 | #define PKT_Cor4 (PKT_Data+3) /* Channel Option Register 4 */ | ||
519 | #define PKT_Cor5 (PKT_Data+4) /* Channel Option Register 5 */ | ||
520 | #define PKT_TxXon (PKT_Data+5) /* Transmit XON character */ | ||
521 | #define PKT_TxXoff (PKT_Data+6) /* Transmit XOFF character */ | ||
522 | #define PKT_RxXon (PKT_Data+7) /* Receive XON character */ | ||
523 | #define PKT_RxXoff (PKT_Data+8) /* Receive XOFF character */ | ||
524 | #define PKT_Lnext (PKT_Data+9) /* Lnext character */ | ||
525 | #define PKT_TxBaud (PKT_Data+10) /* Transmit baud rate */ | ||
526 | #define PKT_RxBaud (PKT_Data+11) /* Receive baud rate */ | ||
527 | |||
528 | /* COR1 definitions... */ | ||
529 | #define COR1_PARITY 0xE0 /* Parity mask */ | ||
530 | #define COR1_NONE 0x00 /* No parity */ | ||
531 | #define COR1_SPACE 0x20 /* Space parity */ | ||
532 | #define COR1_EVEN 0x40 /* Even parity */ | ||
533 | #define COR1_MARK 0xA0 /* Mark parity */ | ||
534 | #define COR1_ODD 0xC0 /* Odd parity */ | ||
535 | |||
536 | #define COR1_STOPBITS 0x0C /* Stop bits mask */ | ||
537 | #define COR1_STOP1 0x00 /* 1 stop bit */ | ||
538 | #define COR1_STOP1_5 0x04 /* 1.5 stop bits */ | ||
539 | #define COR1_STOP2 0x08 /* 2 stop bits */ | ||
540 | |||
541 | #define COR1_DATABITS 0x03 /* Data bits mask */ | ||
542 | #define COR1_DATA5 0x00 /* 5 data bits */ | ||
543 | #define COR1_DATA6 0x01 /* 6 data bits */ | ||
544 | #define COR1_DATA7 0x02 /* 7 data bits */ | ||
545 | #define COR1_DATA8 0x03 /* 8 data bits */ | ||
546 | |||
547 | /* COR2 definitions... */ | ||
548 | #define COR2_XON_TXFLOW 0x40 /* XON/XOFF Transmit Flow */ | ||
549 | #define COR2_XANY_TXFLOW 0xC0 /* XON/XANY Transmit Flow */ | ||
550 | #define COR2_HUPCL 0x20 /* Hang Up On Close */ | ||
551 | #define COR2_DSR_TXFLOW 0x08 /* DSR Transmit Flow Control */ | ||
552 | #define COR2_RTS_RXFLOW 0x04 /* RTS Receive Flow Control */ | ||
553 | #define COR2_CTS_TXFLOW 0x02 /* CTS Transmit Flow Control */ | ||
554 | #define COR2_XON_RXFLOW 0x01 /* XON/XOFF Receive Flow */ | ||
555 | |||
556 | /* COR4 definition... */ | ||
557 | #define COR4_IGNCR 0x80 /* Discard received CR */ | ||
558 | #define COR4_ICRNL 0x40 /* Map received CR -> NL */ | ||
559 | #define COR4_INLCR 0x20 /* Map received NL -> CR */ | ||
560 | #define COR4_IGNBRK 0x10 /* Ignore Received Break */ | ||
561 | #define COR4_NBRKINT 0x08 /* No interrupt on rx Break */ | ||
562 | #define COR4_IGNPAR 0x04 /* ignore rx parity error chars */ | ||
563 | #define COR4_PARMRK 0x02 /* Mark rx parity error chars */ | ||
564 | #define COR4_RAISEMOD 0x01 /* Raise modem lines on !0 baud */ | ||
565 | |||
566 | /* COR5 definitions... */ | ||
567 | #define COR5_ISTRIP 0x80 /* Strip input chars to 7 bits */ | ||
568 | #define COR5_LNE 0x40 /* Enable LNEXT processing */ | ||
569 | #define COR5_CMOE 0x20 /* Match good & error characters */ | ||
570 | #define COR5_TAB3 0x10 /* TAB3 mode */ | ||
571 | #define COR5_TSTATE_ON 0x08 /* Enable tbusy/tstop monitoring */ | ||
572 | #define COR5_TSTATE_OFF 0x04 /* Disable tbusy/tstop monitoring */ | ||
573 | #define COR5_ONLCR 0x02 /* NL -> CR NL on output */ | ||
574 | #define COR5_OCRNL 0x01 /* CR -> NL on output */ | ||
575 | |||
576 | /* RxBaud and TxBaud definitions... */ | ||
577 | #define RIO_B0 0x00 /* RTS / DTR signals dropped */ | ||
578 | #define RIO_B50 0x01 /* 50 baud */ | ||
579 | #define RIO_B75 0x02 /* 75 baud */ | ||
580 | #define RIO_B110 0x03 /* 110 baud */ | ||
581 | #define RIO_B134 0x04 /* 134.5 baud */ | ||
582 | #define RIO_B150 0x05 /* 150 baud */ | ||
583 | #define RIO_B200 0x06 /* 200 baud */ | ||
584 | #define RIO_B300 0x07 /* 300 baud */ | ||
585 | #define RIO_B600 0x08 /* 600 baud */ | ||
586 | #define RIO_B1200 0x09 /* 1200 baud */ | ||
587 | #define RIO_B1800 0x0A /* 1800 baud */ | ||
588 | #define RIO_B2400 0x0B /* 2400 baud */ | ||
589 | #define RIO_B4800 0x0C /* 4800 baud */ | ||
590 | #define RIO_B9600 0x0D /* 9600 baud */ | ||
591 | #define RIO_B19200 0x0E /* 19200 baud */ | ||
592 | #define RIO_B38400 0x0F /* 38400 baud */ | ||
593 | #define RIO_B56000 0x10 /* 56000 baud */ | ||
594 | #define RIO_B57600 0x11 /* 57600 baud */ | ||
595 | #define RIO_B64000 0x12 /* 64000 baud */ | ||
596 | #define RIO_B115200 0x13 /* 115200 baud */ | ||
597 | #define RIO_B2000 0x14 /* 2000 baud */ | ||
598 | |||
599 | /***************************************************************************** | ||
600 | ********************************* ********************************* | ||
601 | ********************************* CONFIG ********************************* | ||
602 | ********************************* ********************************* | ||
603 | *****************************************************************************/ | ||
604 | |||
605 | /* (Driver->RIO,in-band) | ||
606 | |||
607 | CONFIG is sent from the driver to configure an already opened port. | ||
608 | Packet structure is same as OPEN. */ | ||
609 | |||
610 | /***************************************************************************** | ||
611 | ********************************* ********************************** | ||
612 | ********************************* MOPEN ********************************** | ||
613 | ********************************* ********************************** | ||
614 | *****************************************************************************/ | ||
615 | |||
616 | /* (Driver->RIO,in-band) | ||
617 | |||
618 | MOPEN is sent from the driver to open a port attached to a modem. (in-band) | ||
619 | Packet structure is same as OPEN. */ | ||
620 | |||
621 | /***************************************************************************** | ||
622 | ********************************* ********************************** | ||
623 | ********************************* CLOSE ********************************** | ||
624 | ********************************* ********************************** | ||
625 | *****************************************************************************/ | ||
626 | |||
627 | /* (Driver->RIO,in-band) | ||
628 | |||
629 | CLOSE is sent from the driver to close a previously opened port. | ||
630 | No parameters. | ||
631 | */ | ||
632 | #if 0 | ||
633 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
634 | #endif | ||
635 | /***************************************************************************** | ||
636 | ********************************* ********************************* | ||
637 | ********************************* WFLUSH ********************************* | ||
638 | ********************************* ********************************* | ||
639 | *****************************************************************************/ | ||
640 | |||
641 | /* (Driver->RIO,pre-emptive) | ||
642 | |||
643 | WFLUSH is sent pre-emptively from the driver to flush the write buffers and | ||
644 | packets of a port. (pre-emptive) | ||
645 | |||
646 | WFLUSH is also sent in-band from the driver to a port as a marker to end | ||
647 | write flushing previously started by a pre-emptive WFLUSH packet. (in-band) | ||
648 | */ | ||
649 | #if 0 | ||
650 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
651 | #endif | ||
652 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
653 | |||
654 | /***************************************************************************** | ||
655 | ********************************* ********************************* | ||
656 | ********************************* RFLUSH ********************************* | ||
657 | ********************************* ********************************* | ||
658 | *****************************************************************************/ | ||
659 | |||
660 | /* (Driver->RIO,pre-emptive) | ||
661 | |||
662 | RFLUSH is sent pre-emptively from the driver to flush the read buffers and | ||
663 | packets of a port. | ||
664 | */ | ||
665 | #if 0 | ||
666 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
667 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
668 | #endif | ||
669 | |||
670 | /***************************************************************************** | ||
671 | ********************************* ********************************* | ||
672 | ********************************* RESUME ********************************* | ||
673 | ********************************* ********************************* | ||
674 | *****************************************************************************/ | ||
675 | |||
676 | /* (Driver->RIO,pre-emptive) | ||
677 | |||
678 | RESUME is sent pre-emptively from the driver to cause a port to resume | ||
679 | transmission of data if blocked by XOFF. (as if XON had been received) | ||
680 | */ | ||
681 | #if 0 | ||
682 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
683 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
684 | #endif | ||
685 | |||
686 | /***************************************************************************** | ||
687 | ********************************* ********************************* | ||
688 | ********************************* SBREAK ********************************* | ||
689 | ********************************* ********************************* | ||
690 | *****************************************************************************/ | ||
691 | |||
692 | /* (Driver->RIO,in-band) | ||
693 | |||
694 | SBREAK is sent in-band from the driver to a port to suspend data and start | ||
695 | break signal transmission. | ||
696 | |||
697 | If the break delay is 0, the break signal will be acknowledged with a | ||
698 | RUP_COMMAND, COMPLETE packet and continue until an EBREAK packet is received. | ||
699 | |||
700 | Otherwise, there is no acknowledgement and the break signal will last for the | ||
701 | specified number of mS. | ||
702 | */ | ||
703 | #if 0 | ||
704 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
705 | #endif | ||
706 | #define PKT_BreakDelay (PKT_Data+1) /* Break delay in mS */ | ||
707 | |||
708 | /***************************************************************************** | ||
709 | ********************************* ********************************* | ||
710 | ********************************* EBREAK ********************************* | ||
711 | ********************************* ********************************* | ||
712 | *****************************************************************************/ | ||
713 | |||
714 | /* (Driver->RIO,in-band) | ||
715 | |||
716 | EBREAK is sent in-band from the driver to a port to stop transmission of a | ||
717 | break signal. | ||
718 | |||
719 | No parameters. */ | ||
720 | |||
721 | /***************************************************************************** | ||
722 | ********************************* ******************************** | ||
723 | ********************************* SUSPEND ******************************** | ||
724 | ********************************* ******************************** | ||
725 | *****************************************************************************/ | ||
726 | |||
727 | /* (Driver->RIO,pre-emptive) | ||
728 | |||
729 | SUSPEND is sent pre-emptively from the driver to cause a port to suspend | ||
730 | transmission of data. (as if XOFF had been received) | ||
731 | */ | ||
732 | #if 0 | ||
733 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
734 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
735 | #endif | ||
736 | |||
737 | /***************************************************************************** | ||
738 | ********************************* ********************************* | ||
739 | ********************************* FCLOSE ********************************* | ||
740 | ********************************* ********************************* | ||
741 | *****************************************************************************/ | ||
742 | |||
743 | /* (Driver->RIO,pre-emptive) | ||
744 | |||
745 | FCLOSE is sent pre-emptively from the driver to force close a port. | ||
746 | A force close flushes receive and transmit queues, and also lowers all output | ||
747 | modem signals if the COR5_HUPCL (Hang Up On Close) flag is set. | ||
748 | */ | ||
749 | #if 0 | ||
750 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
751 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
752 | #endif | ||
753 | |||
754 | /***************************************************************************** | ||
755 | ********************************* ********************************* | ||
756 | ********************************* XPRINT ********************************* | ||
757 | ********************************* ********************************* | ||
758 | *****************************************************************************/ | ||
759 | |||
760 | /* (Driver->RIO,in-band) | ||
761 | |||
762 | XPRINT is sent as a normal I/O data packet except that the PKT_CMD_BIT of | ||
763 | the "len" field is set, and the first "data" byte is XPRINT. | ||
764 | |||
765 | The I/O data in the XPRINT packet will contain the following: | ||
766 | - Transparent Print Start Sequence | ||
767 | - Transparent Print Data | ||
768 | - Transparent Print Stop Sequence. | ||
769 | */ | ||
770 | #if 0 | ||
771 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
772 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
773 | #endif | ||
774 | |||
775 | /***************************************************************************** | ||
776 | ********************************** ********************************** | ||
777 | ********************************** MBIS ********************************** | ||
778 | ********************************** ********************************** | ||
779 | *****************************************************************************/ | ||
780 | |||
781 | /* (Driver->RIO,pre-emptive) | ||
782 | |||
783 | MBIS is sent pre-emptively from the driver to set a port's modem signals. | ||
784 | */ | ||
785 | #if 0 | ||
786 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
787 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
788 | #endif | ||
789 | #define PKT_ModemSet (PKT_Data+4) /* Modem set signals mask */ | ||
790 | |||
791 | /* ModemSet definitions... */ | ||
792 | #define MBIS_RTS 0x01 /* RTS modem signal */ | ||
793 | #define MBIS_DTR 0x02 /* DTR modem signal */ | ||
794 | |||
795 | /***************************************************************************** | ||
796 | ********************************** ********************************** | ||
797 | ********************************** MBIC ********************************** | ||
798 | ********************************** ********************************** | ||
799 | *****************************************************************************/ | ||
800 | |||
801 | /* (Driver->RIO,pre-emptive) | ||
802 | |||
803 | MBIC is sent pre-emptively from the driver to clear a port's modem signals. | ||
804 | */ | ||
805 | #if 0 | ||
806 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
807 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
808 | #endif | ||
809 | |||
810 | #define PKT_ModemClear (PKT_Data+4) /* Modem clear signals mask */ | ||
811 | |||
812 | /* ModemClear definitions... */ | ||
813 | #define MBIC_RTS 0x01 /* RTS modem signal */ | ||
814 | #define MBIC_DTR 0x02 /* DTR modem signal */ | ||
815 | |||
816 | /***************************************************************************** | ||
817 | ********************************** ********************************** | ||
818 | ********************************** MSET ********************************** | ||
819 | ********************************** ********************************** | ||
820 | *****************************************************************************/ | ||
821 | |||
822 | /* (Driver->RIO,pre-emptive) | ||
823 | |||
824 | MSET is sent pre-emptively from the driver to set/clear a port's modem signals. */ | ||
825 | #if 0 | ||
826 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
827 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
828 | #endif | ||
829 | |||
830 | #define PKT_ModemSet (PKT_Data+4) /* Modem set signals mask */ | ||
831 | |||
832 | /* ModemSet definitions... */ | ||
833 | #define MSET_RTS 0x01 /* RTS modem signal */ | ||
834 | #define MSET_DTR 0x02 /* DTR modem signal */ | ||
835 | |||
836 | /***************************************************************************** | ||
837 | ********************************* ********************************* | ||
838 | ********************************* PCLOSE ********************************* | ||
839 | ********************************* ********************************* | ||
840 | *****************************************************************************/ | ||
841 | |||
842 | /* (Driver->RIO,in-band) | ||
843 | |||
844 | PCLOSE is sent from the driver to pseudo close a previously opened port. | ||
845 | |||
846 | The port will close when all data has been sent/received, however, the | ||
847 | port's transmit / receive and modem signals will be left enabled and the | ||
848 | port marked internally as Pseudo Closed. */ | ||
849 | |||
850 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
851 | |||
852 | /***************************************************************************** | ||
853 | ********************************** ********************************** | ||
854 | ********************************** MGET ********************************** | ||
855 | ********************************** ********************************** | ||
856 | *****************************************************************************/ | ||
857 | |||
858 | /* (Driver->RIO,pre-emptive) | ||
859 | |||
860 | MGET is sent pre-emptively from the driver to request the port's current modem signals. */ | ||
861 | |||
862 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
863 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
864 | |||
865 | /***************************************************************************** | ||
866 | ********************************* ******************************** | ||
867 | ********************************* MEMDUMP ******************************** | ||
868 | ********************************* ******************************** | ||
869 | *****************************************************************************/ | ||
870 | |||
871 | /* (Driver->RIO,pre-emptive) | ||
872 | |||
873 | MEMDUMP is sent pre-emptively from the driver to request a dump of 32 bytes | ||
874 | of the specified port's RTA address space. | ||
875 | */ | ||
876 | #if 0 | ||
877 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
878 | #endif | ||
879 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
880 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
881 | #define PKT_Address (PKT_Data+6) /* Requested address */ | ||
882 | |||
883 | /***************************************************************************** | ||
884 | ****************************** ***************************** | ||
885 | ****************************** READ_REGISTER ***************************** | ||
886 | ****************************** ***************************** | ||
887 | *****************************************************************************/ | ||
888 | |||
889 | /* (Driver->RIO,pre-emptive) | ||
890 | |||
891 | READ_REGISTER is sent pre-emptively from the driver to request the contents | ||
892 | of the CD1400 register specified in address. | ||
893 | */ | ||
894 | #if 0 | ||
895 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
896 | #endif | ||
897 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
898 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
899 | #define PKT_Address (PKT_Data+6) /* Requested address */ | ||
900 | |||
901 | /***************************************************************************** | ||
902 | ************************ ************************** | ||
903 | ************************ COMMAND_RUP - COMPLETE ************************** | ||
904 | ************************ ************************** | ||
905 | *****************************************************************************/ | ||
906 | |||
907 | /* (RIO->Driver,pre-emptive) | ||
908 | |||
909 | COMMAND_RUP - COMPLETE is sent in response to all port I/O control command | ||
910 | packets, except MEMDUMP and READ_REGISTER. | ||
911 | */ | ||
912 | #if 0 | ||
913 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
914 | #endif | ||
915 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
916 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
917 | #define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */ | ||
918 | #define PKT_PortStatus (PKT_Data+4) /* Port signal status */ | ||
919 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
920 | |||
921 | /* ModemStatus definitions... */ | ||
922 | #define MODEM_DSR 0x80 /* Data Set Ready modem state */ | ||
923 | #define MODEM_CTS 0x40 /* Clear To Send modem state */ | ||
924 | #define MODEM_RI 0x20 /* Ring Indicate modem state */ | ||
925 | #define MODEM_CD 0x10 /* Carrier Detect modem state */ | ||
926 | #define MODEM_TSTOP 0x08 /* Transmit Stopped state */ | ||
927 | #define MODEM_TEMPTY 0x04 /* Transmit Empty state */ | ||
928 | #define MODEM_DTR 0x02 /* DTR modem output state */ | ||
929 | #define MODEM_RTS 0x01 /* RTS modem output state */ | ||
930 | |||
931 | /* PortStatus definitions... */ | ||
932 | #define PORT_ISOPEN 0x01 /* Port open ? */ | ||
933 | #define PORT_HUPCL 0x02 /* Hangup on close? */ | ||
934 | #define PORT_MOPENPEND 0x04 /* Modem open pending */ | ||
935 | #define PORT_ISPARALLEL 0x08 /* Parallel port */ | ||
936 | #define PORT_BREAK 0x10 /* Port on break */ | ||
937 | #define PORT_STATUSPEND 0020 /* Status packet pending */ | ||
938 | #define PORT_BREAKPEND 0x40 /* Break packet pending */ | ||
939 | #define PORT_MODEMPEND 0x80 /* Modem status packet pending */ | ||
940 | |||
941 | /***************************************************************************** | ||
942 | ************************ ************************** | ||
943 | ************************ COMMAND_RUP - COMPLETE ************************** | ||
944 | ************************ ************************** | ||
945 | *****************************************************************************/ | ||
946 | |||
947 | /* (RIO->Driver,pre-emptive) | ||
948 | |||
949 | COMMAND_RUP - COMPLETE is sent in response to all port I/O control command | ||
950 | packets, except MEMDUMP and READ_REGISTER. | ||
951 | */ | ||
952 | #if 0 | ||
953 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
954 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
955 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
956 | #endif | ||
957 | #define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */ | ||
958 | #define PKT_PortStatus (PKT_Data+4) /* Port signal status */ | ||
959 | #if 0 | ||
960 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
961 | #endif | ||
962 | |||
963 | /* ModemStatus definitions... */ | ||
964 | #define MODEM_DSR 0x80 /* Data Set Ready modem state */ | ||
965 | #define MODEM_CTS 0x40 /* Clear To Send modem state */ | ||
966 | #define MODEM_RI 0x20 /* Ring Indicate modem state */ | ||
967 | #define MODEM_CD 0x10 /* Carrier Detect modem state */ | ||
968 | #define MODEM_TSTOP 0x08 /* Transmit Stopped state */ | ||
969 | #define MODEM_TEMPTY 0x04 /* Transmit Empty state */ | ||
970 | #define MODEM_DTR 0x02 /* DTR modem output state */ | ||
971 | #define MODEM_RTS 0x01 /* RTS modem output state */ | ||
972 | |||
973 | /* PortStatus definitions... */ | ||
974 | #define PORT_ISOPEN 0x01 /* Port open ? */ | ||
975 | #define PORT_HUPCL 0x02 /* Hangup on close? */ | ||
976 | #define PORT_MOPENPEND 0x04 /* Modem open pending */ | ||
977 | #define PORT_ISPARALLEL 0x08 /* Parallel port */ | ||
978 | #define PORT_BREAK 0x10 /* Port on break */ | ||
979 | #define PORT_STATUSPEND 0020 /* Status packet pending */ | ||
980 | #define PORT_BREAKPEND 0x40 /* Break packet pending */ | ||
981 | #define PORT_MODEMPEND 0x80 /* Modem status packet pending */ | ||
982 | |||
983 | /***************************************************************************** | ||
984 | ******************** ******************** | ||
985 | ******************** COMMAND_RUP - COMPLETE - MEMDUMP ******************** | ||
986 | ******************** ******************** | ||
987 | *****************************************************************************/ | ||
988 | |||
989 | /* (RIO->Driver,pre-emptive) | ||
990 | |||
991 | COMMAND_RUP - COMPLETE - MEMDUMP is sent as an acknowledgement for a MEMDUMP | ||
992 | port I/O control command packet. | ||
993 | */ | ||
994 | #if 0 | ||
995 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
996 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
997 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
998 | #define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */ | ||
999 | #define PKT_PortStatus (PKT_Data+4) /* Port signal status */ | ||
1000 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
1001 | #define PKT_Address (PKT_Data+6) /* Requested address */ | ||
1002 | #endif | ||
1003 | #define PKT_Dump (PKT_Data+8) /* 32bytes of requested dump data */ | ||
1004 | |||
1005 | /***************************************************************************** | ||
1006 | ***************** ***************** | ||
1007 | ***************** COMMAND_RUP - COMPLETE - READ_REGISTER ***************** | ||
1008 | ***************** ***************** | ||
1009 | *****************************************************************************/ | ||
1010 | |||
1011 | /* (RIO->Driver,pre-emptive) | ||
1012 | |||
1013 | COMMAND_RUP - COMPLETE - READ_REGISTER is sent as an acknowledgement for a | ||
1014 | READ_REGISTER port I/O control command packet. | ||
1015 | */ | ||
1016 | #if 0 | ||
1017 | #define PKT_Cmd (PKT_Data+0) /*Command code */ | ||
1018 | #define PKT_PhbNum (PKT_Data+1) /*Port number wrt RTA */ | ||
1019 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
1020 | #endif | ||
1021 | #define PKT_RegisterValue (PKT_Data+3) /* Modem signal status */ | ||
1022 | #if 0 | ||
1023 | #define PKT_PortStatus (PKT_Data+4) /* Port signal status */ | ||
1024 | #define PKT_SubCmd (PKT_Data+5) /* Sub Command */ | ||
1025 | #endif | ||
1026 | |||
1027 | /***************************************************************************** | ||
1028 | ********************* *********************** | ||
1029 | ********************* COMMAND_RUP - BREAK_RECEIVED *********************** | ||
1030 | ********************* *********************** | ||
1031 | *****************************************************************************/ | ||
1032 | |||
1033 | /* (RIO->Driver,pre-emptive) | ||
1034 | |||
1035 | COMMAND_RUP - BREAK_RECEIVED packets are sent when the port detects a receive BREAK signal. | ||
1036 | */ | ||
1037 | #if 0 | ||
1038 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1039 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
1040 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
1041 | #endif | ||
1042 | |||
1043 | /***************************************************************************** | ||
1044 | ********************* ************************* | ||
1045 | ********************* COMMAND_RUP - MODEM_STATUS ************************* | ||
1046 | ********************* ************************* | ||
1047 | *****************************************************************************/ | ||
1048 | |||
1049 | /* (RIO->Driver,pre-emptive) | ||
1050 | |||
1051 | COMMAND_RUP - MODEM_STATUS packets are sent whenever the port detects a | ||
1052 | change in the input modem signal states. | ||
1053 | |||
1054 | */ | ||
1055 | #if 0 | ||
1056 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1057 | #define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */ | ||
1058 | #define PKT_Cmd2 (PKT_Data+2) /* Command code copy */ | ||
1059 | #define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */ | ||
1060 | #endif | ||
1061 | |||
1062 | /***************************************************************************** | ||
1063 | ************************ ************************* | ||
1064 | ************************ BOOT_RUP - BOOT_REQUEST ************************* | ||
1065 | ************************ ************************* | ||
1066 | *****************************************************************************/ | ||
1067 | |||
1068 | /* (RIO->Driver,pre-emptive) | ||
1069 | |||
1070 | BOOT_RUP - BOOT_REQUEST packets are sent to the Driver from RIO to request | ||
1071 | firmware code to load onto attached RTAs. | ||
1072 | */ | ||
1073 | #if 0 | ||
1074 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1075 | #endif | ||
1076 | |||
1077 | /***************************************************************************** | ||
1078 | ************************ ************************ | ||
1079 | ************************ BOOT_RUP - BOOT_SEQUENCE ************************ | ||
1080 | ************************ ************************ | ||
1081 | *****************************************************************************/ | ||
1082 | |||
1083 | /* (Driver->RIO,pre-emptive) | ||
1084 | |||
1085 | BOOT_RUP - BOOT_SEQUENCE packets are sent from the Driver to RIO in response | ||
1086 | to a BOOT_RUP - BOOT_REQUEST packet. | ||
1087 | */ | ||
1088 | #if 0 | ||
1089 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1090 | #endif | ||
1091 | #define PKT_NumPackets (PKT_Data+2) /* Packets required to load firmware */ | ||
1092 | #define PKT_LoadBase (PKT_Data+4) /* RTA firmware load address */ | ||
1093 | #define PKT_CodeSize (PKT_Data+6) /* Size of firmware in bytes */ | ||
1094 | #define PKT_CmdString (PKT_Data+8) /* Command string */ | ||
1095 | |||
1096 | /***************************************************************************** | ||
1097 | ************************ *********************** | ||
1098 | ************************ BOOT_RUP - BOOT_COMPLETED *********************** | ||
1099 | ************************ *********************** | ||
1100 | *****************************************************************************/ | ||
1101 | |||
1102 | /* (RIO->Driver,pre-emptive) | ||
1103 | |||
1104 | BOOT_RUP - BOOT_COMPLETE is sent to the Driver from RIO when downloading of | ||
1105 | RTA firmware has completed. | ||
1106 | */ | ||
1107 | #if 0 | ||
1108 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1109 | #endif | ||
1110 | #define PKT_LinkNumber (PKT_Data+1) /* Link number RTA booted on */ | ||
1111 | #define PKT_SerialNumber (PKT_Data+2) /* 4 byte serial number */ | ||
1112 | |||
1113 | /***************************************************************************** | ||
1114 | ************************ *********************** | ||
1115 | ************************ BOOT_RUP - Packet Request *********************** | ||
1116 | ************************ *********************** | ||
1117 | *****************************************************************************/ | ||
1118 | |||
1119 | /* (RIO->Driver,pre-emptive) | ||
1120 | |||
1121 | BOOT_RUP packet without the PKT_CMD_BIT set in the PKT->len field is sent | ||
1122 | from RIO to the Driver as a request for a firmware boot packet. */ | ||
1123 | |||
1124 | #define PKT_SequenceNumber (PKT_Data+0) /* Packet sequence number */ | ||
1125 | |||
1126 | /***************************************************************************** | ||
1127 | *********************** *********************** | ||
1128 | *********************** BOOT_RUP - Packet Response *********************** | ||
1129 | *********************** *********************** | ||
1130 | *****************************************************************************/ | ||
1131 | |||
1132 | /* (Driver->RIO,pre-emptive) | ||
1133 | |||
1134 | In response to a BOOT_RUP boot packet request, the driver fills out the response | ||
1135 | packet with the 70 bytes of the requested sequence. | ||
1136 | */ | ||
1137 | #if 0 | ||
1138 | #define PKT_SequenceNumber (PKT_Data+0) /* Packet sequence number */ | ||
1139 | #endif | ||
1140 | #define PKT_FirmwarePacket (PKT_Data+2) /* Firmware packet */ | ||
1141 | |||
1142 | /***************************************************************************** | ||
1143 | **************************** **************************** | ||
1144 | **************************** BOOT_RUP - IFOAD **************************** | ||
1145 | **************************** **************************** | ||
1146 | *****************************************************************************/ | ||
1147 | |||
1148 | /* (Driver->RIO,pre-emptive) | ||
1149 | |||
1150 | BOOT_RUP - IFOAD packets are sent from the Driver to an RTA to cause the | ||
1151 | RTA to shut down and reboot. | ||
1152 | */ | ||
1153 | #if 0 | ||
1154 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1155 | #endif | ||
1156 | #define PKT_IfoadId1 (PKT_Data+2) /* IFOAD Id 1 */ | ||
1157 | #define PKT_IfoadId2 (PKT_Data+3) /* IFOAD Id 2 */ | ||
1158 | |||
1159 | #define IFOADID1 0xAD | ||
1160 | #define IFOADID2 0xF0 | ||
1161 | |||
1162 | /***************************************************************************** | ||
1163 | ************************** *************************** | ||
1164 | ************************** BOOT_RUP - IDENTIFY *************************** | ||
1165 | ************************** *************************** | ||
1166 | *****************************************************************************/ | ||
1167 | |||
1168 | /* (Driver->RIO,pre-emptive) | ||
1169 | |||
1170 | BOOT_RUP - IDENTIFY packets are sent from the Driver to an RTA to cause the | ||
1171 | RTA to flash its LEDs for a period of time. | ||
1172 | */ | ||
1173 | #if 0 | ||
1174 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1175 | #endif | ||
1176 | #define PKT_IdentifyId (PKT_Data+2) /* defines pattern to flash */ | ||
1177 | |||
1178 | /***************************************************************************** | ||
1179 | **************************** *************************** | ||
1180 | **************************** BOOT_RUP - ZOMBIE *************************** | ||
1181 | **************************** *************************** | ||
1182 | *****************************************************************************/ | ||
1183 | |||
1184 | /* (Driver->RIO,pre-emptive) | ||
1185 | |||
1186 | BOOT_RUP - ZOMBIE packets are sent from the Driver to an RTA to cause the | ||
1187 | RTA to shut down and flash it's LEDs. | ||
1188 | */ | ||
1189 | #if 0 | ||
1190 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1191 | #endif | ||
1192 | #define PKT_ZombieId1 (PKT_Data+2) /* ZOMBIE Id 1 */ | ||
1193 | #define PKT_ZombieId2 (PKT_Data+3) /* ZOMBIE Id 2 */ | ||
1194 | |||
1195 | #define ZOMBIEID1 0x52 | ||
1196 | #define ZOMBIEID2 0x21 | ||
1197 | |||
1198 | /***************************************************************************** | ||
1199 | **************************** **************************** | ||
1200 | **************************** BOOT_RUP - UFOAD **************************** | ||
1201 | **************************** **************************** | ||
1202 | *****************************************************************************/ | ||
1203 | |||
1204 | /* (Driver->RIO,pre-emptive) | ||
1205 | |||
1206 | BOOT_RUP - UFOAD packets are sent from the Driver to an RTA to cause the RTA | ||
1207 | to ask it's neighbouring RTA to shut down and reboot. | ||
1208 | */ | ||
1209 | #if 0 | ||
1210 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1211 | #define PKT_LinkNumber (PKT_Data+1) /* Link number of RTA to UFOAD */ | ||
1212 | #endif | ||
1213 | #define PKT_UfoadId1 (PKT_Data+2) /* UFOAD Id 1 */ | ||
1214 | #define PKT_UfoadId2 (PKT_Data+3) /* UFOAD Id 2 */ | ||
1215 | |||
1216 | #define UFOADID1 0x1E | ||
1217 | #define UFOADID2 0x0D | ||
1218 | |||
1219 | /***************************************************************************** | ||
1220 | **************************** **************************** | ||
1221 | **************************** BOOT_RUP - IWAIT **************************** | ||
1222 | **************************** **************************** | ||
1223 | *****************************************************************************/ | ||
1224 | |||
1225 | /* (Driver->RIO,pre-emptive) | ||
1226 | |||
1227 | BOOT_RUP - IWAIT packets are sent from the Driver to an RTA to cause the RTA | ||
1228 | to pause booting on the specified link for 30 seconds. | ||
1229 | */ | ||
1230 | #if 0 | ||
1231 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1232 | #define PKT_LinkNumber (PKT_Data+1) /* Link number of RTA to UFOAD */ | ||
1233 | #endif | ||
1234 | #define PKT_IwaitId1 (PKT_Data+2) /* IWAIT Id 1 */ | ||
1235 | #define PKT_IwaitId2 (PKT_Data+3) /* IWAIT Id 2 */ | ||
1236 | |||
1237 | #define IWAITID1 0xDE | ||
1238 | #define IWAITID2 0xB1 | ||
1239 | |||
1240 | /***************************************************************************** | ||
1241 | ************************ *********************** | ||
1242 | ************************ ROUTE_RUP - ROUTE_REQUEST *********************** | ||
1243 | ************************ *********************** | ||
1244 | *****************************************************************************/ | ||
1245 | |||
1246 | /* (RIO->Driver,pre-emptive) | ||
1247 | |||
1248 | ROUTE_RUP - ROUTE_REQUEST packets are sent from a newly booted or connected | ||
1249 | RTA to a Driver to request an ID (RUP or unit number). | ||
1250 | */ | ||
1251 | #if 0 | ||
1252 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1253 | #endif | ||
1254 | #define PKT_SerialNumber (PKT_Data+2) /* 4 byte serial number */ | ||
1255 | #define PKT_ModuleTypes (PKT_Data+6) /* RTA Module types */ | ||
1256 | |||
1257 | /* ModuleTypes definitions... */ | ||
1258 | #define MOD_BLANK 0x0F /* Blank plate attached */ | ||
1259 | #define MOD_RS232DB25 0x00 /* RS232 DB25 connector */ | ||
1260 | #define MOD_RS232RJ45 0x01 /* RS232 RJ45 connector */ | ||
1261 | #define MOD_RS422DB25 0x02 /* RS422 DB25 connector */ | ||
1262 | #define MOD_RS485DB25 0x03 /* RS485 DB25 connector */ | ||
1263 | #define MOD_PARALLEL 0x04 /* Centronics parallel */ | ||
1264 | |||
1265 | #define MOD2 0x08 /* Set to indicate Rev2 module */ | ||
1266 | |||
1267 | /***************************************************************************** | ||
1268 | ************************* ************************* | ||
1269 | ************************* ROUTE_RUP - ROUTE_FOAD ************************* | ||
1270 | ************************* ************************* | ||
1271 | *****************************************************************************/ | ||
1272 | |||
1273 | /* (Driver->RIO,pre-emptive) | ||
1274 | |||
1275 | ROUTE_RUP - ROUTE_FOAD packet is sent as a response to a ROUTE_RUP - ROUTE_REQUEST | ||
1276 | packet to cause the RTA to "Fall Over And Die"., i.e. shutdown and reboot. | ||
1277 | */ | ||
1278 | #if 0 | ||
1279 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1280 | #endif | ||
1281 | #define PKT_RouteCmdString (PKT_Data+2) /* Command string */ | ||
1282 | |||
1283 | /***************************************************************************** | ||
1284 | *********************** *********************** | ||
1285 | *********************** ROUTE_RUP - ROUTE_ALLOCATE *********************** | ||
1286 | *********************** *********************** | ||
1287 | *****************************************************************************/ | ||
1288 | |||
1289 | /* (Driver->RIO,pre-emptive) | ||
1290 | |||
1291 | ROUTE_RUP - ROUTE_ALLOCATE packet is sent as a response to a ROUTE_RUP - ROUTE_REQUEST | ||
1292 | packet to allocate the RTA's Id number (RUP number 1..16) | ||
1293 | */ | ||
1294 | #if 0 | ||
1295 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1296 | #endif | ||
1297 | #define PKT_IdNum (PKT_Data+1) /* RUP number for ports 1..8 */ | ||
1298 | #if 0 | ||
1299 | #define PKT_RouteCmdString (PKT_Data+2) /* Command string */ | ||
1300 | #endif | ||
1301 | #define PKT_IdNum2 (PKT_Data+0x17) /* RUP number for ports 9..16 */ | ||
1302 | |||
1303 | /***************************************************************************** | ||
1304 | *********************** *********************** | ||
1305 | *********************** ROUTE_RUP - ROUTE_TOPOLOGY *********************** | ||
1306 | *********************** *********************** | ||
1307 | *****************************************************************************/ | ||
1308 | |||
1309 | /* (RIO->Driver,pre-emptive) | ||
1310 | |||
1311 | ROUTE_RUP - ROUTE_TOPOLOGY packet is sent to inform the driver of an RTA's | ||
1312 | current link status. | ||
1313 | */ | ||
1314 | #if 0 | ||
1315 | #define PKT_Cmd (PKT_Data+0) /* Command code */ | ||
1316 | #endif | ||
1317 | #define PKT_Link1Rup (PKT_Data+2) /* Link 1 RUP number */ | ||
1318 | #define PKT_Link1Link (PKT_Data+3) /* Link 1 link number */ | ||
1319 | #define PKT_Link2Rup (PKT_Data+4) /* Link 2 RUP number */ | ||
1320 | #define PKT_Link2Link (PKT_Data+5) /* Link 2 link number */ | ||
1321 | #define PKT_Link3Rup (PKT_Data+6) /* Link 3 RUP number */ | ||
1322 | #define PKT_Link3Link (PKT_Data+7) /* Link 3 link number */ | ||
1323 | #define PKT_Link4Rup (PKT_Data+8) /* Link 4 RUP number */ | ||
1324 | #define PKT_Link4Link (PKT_Data+9) /* Link 4 link number */ | ||
1325 | #define PKT_RtaVpdProm (PKT_Data+10) /* 32 bytes of RTA VPD PROM Contents */ | ||
1326 | |||
1327 | #endif /* _sxwinif_h */ | ||
1328 | |||
1329 | /* End of RIOWINIF.H */ | ||
diff --git a/drivers/char/rio/riscos.h b/drivers/char/rio/riscos.h deleted file mode 100644 index 60d66d0056ae..000000000000 --- a/drivers/char/rio/riscos.h +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* | ||
2 | ** ----------------------------------------------------------------------------- | ||
3 | ** | ||
4 | ** Perle Specialix driver for Linux | ||
5 | ** Ported from existing RIO Driver for SCO sources. | ||
6 | * | ||
7 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | ** | ||
23 | ** Module : riscos.h | ||
24 | ** SID : 1.2 | ||
25 | ** Last Modified : 11/6/98 11:34:19 | ||
26 | ** Retrieved : 11/6/98 11:34:22 | ||
27 | ** | ||
28 | ** ident @(#)riscos.h 1.2 | ||
29 | ** | ||
30 | ** ----------------------------------------------------------------------------- | ||
31 | */ | ||
32 | |||
33 | #ifndef __rio_riscos_h__ | ||
34 | #define __rio_riscos_h__ | ||
35 | |||
36 | #ifdef SCCS_LABELS | ||
37 | static char *_riscos_h_sccs_ = "@(#)riscos.h 1.2"; | ||
38 | #endif | ||
39 | |||
40 | /* | ||
41 | ** This module used to define all those little itsy bits required for RISC/OS | ||
42 | ** now it's full of null macros. | ||
43 | */ | ||
44 | |||
45 | /* | ||
46 | ** RBYTE reads a byte from a location. | ||
47 | ** RWORD reads a word from a location. | ||
48 | ** WBYTE writes a byte to a location. | ||
49 | ** WWORD writes a word to a location. | ||
50 | ** RINDW reads a word through a pointer. | ||
51 | ** WINDW writes a word through a pointer. | ||
52 | ** RIOSWAB swaps the two bytes of a word, if needed. | ||
53 | */ | ||
54 | |||
55 | #define RIOSWAB(N) (N) | ||
56 | #define WBYTE(A,V) (A)=(uchar)(V) | ||
57 | #define WWORD(A,V) (A)=(ushort)(V) | ||
58 | #define RBYTE(A) (uchar)(A) | ||
59 | #define RWORD(A) (ushort)(A) | ||
60 | #define RINDW(A) (*(ushort *)(A)) | ||
61 | #define WINDW(A,V) (*(ushort *)(A)=(ushort)(V)) | ||
62 | |||
63 | #endif /* __rio_riscos_h__ */ | ||
diff --git a/drivers/char/rio/rtahw.h b/drivers/char/rio/rtahw.h deleted file mode 100644 index e6c2cdfd3a1f..000000000000 --- a/drivers/char/rio/rtahw.h +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | |||
2 | /**************************************************************************** | ||
3 | ******* ******* | ||
4 | ******* R T A H A R D W A R E | ||
5 | ******* ******* | ||
6 | **************************************************************************** | ||
7 | |||
8 | Author : Ian Nandhra | ||
9 | Date : | ||
10 | |||
11 | * | ||
12 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
27 | |||
28 | Version : 0.01 | ||
29 | |||
30 | |||
31 | Mods | ||
32 | ---------------------------------------------------------------------------- | ||
33 | Date By Description | ||
34 | ---------------------------------------------------------------------------- | ||
35 | |||
36 | ***************************************************************************/ | ||
37 | |||
38 | #ifndef lint | ||
39 | #ifdef SCCS_LABELS | ||
40 | static char *_rio_rtahw_h_sccs = "@(#)rtahw.h 1.5"; | ||
41 | #endif | ||
42 | #endif | ||
43 | |||
44 | #define WATCHDOG_ADDR ((unsigned short *)0x7a00) | ||
45 | #define RTA_LED_ADDR ((unsigned short *)0x7c00) | ||
46 | #define SERIALNUM_ADDR ((unsigned char *)0x7809) | ||
47 | #define LATCH_ADDR ((unsigned char *)0x7800) | ||
48 | |||
49 | /* | ||
50 | ** Here we define where the cd1400 chips are in memory. | ||
51 | */ | ||
52 | #define CD1400_ONE_ADDR (0x7300) | ||
53 | #define CD1400_TWO_ADDR (0x7200) | ||
54 | #define CD1400_THREE_ADDR (0x7100) | ||
55 | #define CD1400_FOUR_ADDR (0x7000) | ||
56 | |||
57 | /* | ||
58 | ** Define the different types of modules we can have | ||
59 | */ | ||
60 | enum module { | ||
61 | MOD_BLANK = 0x0f, /* Blank plate attached */ | ||
62 | MOD_RS232DB25 = 0x00, /* RS232 DB25 connector */ | ||
63 | MOD_RS232RJ45 = 0x01, /* RS232 RJ45 connector */ | ||
64 | MOD_RS422DB25 = 0x02, /* RS422 DB25 connector */ | ||
65 | MOD_RS485DB25 = 0x03, /* RS485 DB25 connector */ | ||
66 | MOD_PARALLEL = 0x04 /* Centronics parallel */ | ||
67 | }; | ||
68 | |||
69 | #define TYPE_HOST 0 | ||
70 | #define TYPE_RTA8 1 | ||
71 | #define TYPE_RTA16 2 | ||
72 | |||
73 | #define WATCH_DOG WATCHDOG_ADDR | ||
74 | |||
75 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/rupstat.h b/drivers/char/rio/rupstat.h deleted file mode 100644 index 56d828c63d28..000000000000 --- a/drivers/char/rio/rupstat.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | ******* ******* | ||
3 | ******* RUPSTAT | ||
4 | ******* ******* | ||
5 | **************************************************************************** | ||
6 | |||
7 | Author : Jeremy Rolls | ||
8 | Date : | ||
9 | |||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | |||
27 | Version : 0.01 | ||
28 | |||
29 | |||
30 | Mods | ||
31 | ---------------------------------------------------------------------------- | ||
32 | Date By Description | ||
33 | ---------------------------------------------------------------------------- | ||
34 | |||
35 | ***************************************************************************/ | ||
36 | |||
37 | #ifndef _rupstat_h | ||
38 | #define _rupstat_h | ||
39 | |||
40 | #ifndef lint | ||
41 | #ifdef SCCS_LABELS | ||
42 | static char *_rio_rupstat_h_sccs = "@(#)rupstat.h 1.1"; | ||
43 | #endif | ||
44 | #endif | ||
45 | |||
46 | #define STATUS_SYNC 0 | ||
47 | #define STATUS_REQ_TOP 1 | ||
48 | #define STATUS_TOPOLOGY 2 | ||
49 | |||
50 | #endif | ||
diff --git a/drivers/char/rio/selftest.h b/drivers/char/rio/selftest.h deleted file mode 100644 index 7a3dba352323..000000000000 --- a/drivers/char/rio/selftest.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | ** File: selftest.h | ||
3 | ** | ||
4 | ** Author: David Dix | ||
5 | ** | ||
6 | ** Created: 15th March 1993 | ||
7 | ** | ||
8 | ** Last modified: 94/06/14 | ||
9 | ** | ||
10 | * | ||
11 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | */ | ||
27 | |||
28 | #ifndef _selftests_h_ | ||
29 | #define _selftests_h_ | ||
30 | |||
31 | /* | ||
32 | ** Selftest identifier... | ||
33 | */ | ||
34 | #define SELFTEST_MAGIC 0x5a5a | ||
35 | |||
36 | /* | ||
37 | ** This is the structure of the packet that is sent back after each | ||
38 | ** selftest on a booting RTA. | ||
39 | */ | ||
40 | typedef struct { | ||
41 | short magic; /* Identifies packet type */ | ||
42 | int test; /* Test number, see below */ | ||
43 | unsigned int result; /* Result value */ | ||
44 | unsigned int dataIn; | ||
45 | unsigned int dataOut; | ||
46 | } selftestStruct; | ||
47 | |||
48 | /* | ||
49 | ** The different tests are identified by the following data values. | ||
50 | */ | ||
51 | enum test { | ||
52 | TESTS_COMPLETE = 0x00, | ||
53 | MEMTEST_ADDR = 0x01, | ||
54 | MEMTEST_BIT = 0x02, | ||
55 | MEMTEST_FILL = 0x03, | ||
56 | MEMTEST_DATABUS = 0x04, | ||
57 | MEMTEST_ADDRBUS = 0x05, | ||
58 | CD1400_INIT = 0x10, | ||
59 | CD1400_LOOP = 0x11, | ||
60 | CD1400_INTERRUPT = 0x12 | ||
61 | }; | ||
62 | |||
63 | enum result { | ||
64 | E_PORT = 0x10, | ||
65 | E_TX = 0x11, | ||
66 | E_RX = 0x12, | ||
67 | E_EXCEPT = 0x13, | ||
68 | E_COMPARE = 0x14, | ||
69 | E_MODEM = 0x15, | ||
70 | E_TIMEOUT = 0x16, | ||
71 | E_INTERRUPT = 0x17 | ||
72 | }; | ||
73 | #endif /* _selftests_h_ */ | ||
diff --git a/drivers/char/rio/sysmap.h b/drivers/char/rio/sysmap.h deleted file mode 100644 index e1c6f1160dff..000000000000 --- a/drivers/char/rio/sysmap.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | |||
2 | /**************************************************************************** | ||
3 | ******* ******* | ||
4 | ******* S Y S T E M M A P H E A D E R | ||
5 | ******* ******* | ||
6 | **************************************************************************** | ||
7 | |||
8 | Author : Ian Nandhra | ||
9 | Date : | ||
10 | |||
11 | * | ||
12 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
27 | |||
28 | Version : 0.01 | ||
29 | |||
30 | |||
31 | Mods | ||
32 | ---------------------------------------------------------------------------- | ||
33 | Date By Description | ||
34 | ---------------------------------------------------------------------------- | ||
35 | |||
36 | ***************************************************************************/ | ||
37 | |||
38 | #ifndef lint | ||
39 | #ifdef SCCS_LABELS | ||
40 | static char *_rio_sysmap_h_sccs = "@(#)sysmap.h 1.1"; | ||
41 | #endif | ||
42 | #endif | ||
43 | |||
44 | #define SYSTEM_MAP_LEN 64 /* Len of System Map array */ | ||
45 | |||
46 | |||
47 | typedef struct SYS_MAP SYS_MAP; | ||
48 | typedef struct SYS_MAP_LINK SYS_MAP_LINK; | ||
49 | |||
50 | struct SYS_MAP_LINK { | ||
51 | short id; /* Unit Id */ | ||
52 | short link; /* Id's Link */ | ||
53 | short been_here; /* Used by map_gen */ | ||
54 | }; | ||
55 | |||
56 | struct SYS_MAP { | ||
57 | char serial_num[4]; | ||
58 | SYS_MAP_LINK link[4]; | ||
59 | }; | ||
60 | |||
61 | |||
62 | /*********** end of file ***********/ | ||
diff --git a/drivers/char/rio/timeouts.h b/drivers/char/rio/timeouts.h deleted file mode 100644 index a8b5be3ca9bf..000000000000 --- a/drivers/char/rio/timeouts.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | |||
2 | /**************************************************************************** | ||
3 | ******* ******* | ||
4 | ******* T I M E O U T S | ||
5 | ******* ******* | ||
6 | **************************************************************************** | ||
7 | |||
8 | Author : Ian Nandhra | ||
9 | Date : | ||
10 | |||
11 | * | ||
12 | * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
27 | |||
28 | Version : 0.01 | ||
29 | |||
30 | |||
31 | Mods | ||
32 | ---------------------------------------------------------------------------- | ||
33 | Date By Description | ||
34 | ---------------------------------------------------------------------------- | ||
35 | |||
36 | ***************************************************************************/ | ||
37 | |||
38 | #ifndef lint | ||
39 | #ifdef SCCS_LABELS | ||
40 | static char *_rio_defaults_h_sccs = "@(#)timeouts.h 1.3"; | ||
41 | #endif | ||
42 | #endif | ||
43 | |||
44 | #define MILLISECOND (int) (1000/64) /* 15.625 low ticks */ | ||
45 | #define SECOND (int) 15625 /* Low priority ticks */ | ||
46 | |||
47 | #define TX_TIMEOUT (int) (200 * MILLISECOND) | ||
48 | |||
49 | |||
50 | /*********** end of file ***********/ | ||
diff --git a/drivers/ieee1394/amdtp.c b/drivers/ieee1394/amdtp.c deleted file mode 100644 index 17390d762cf7..000000000000 --- a/drivers/ieee1394/amdtp.c +++ /dev/null | |||
@@ -1,1297 +0,0 @@ | |||
1 | /* -*- c-basic-offset: 8 -*- | ||
2 | * | ||
3 | * amdtp.c - Audio and Music Data Transmission Protocol Driver | ||
4 | * Copyright (C) 2001 Kristian Høgsberg | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software Foundation, | ||
18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | /* OVERVIEW | ||
22 | * -------- | ||
23 | * | ||
24 | * The AMDTP driver is designed to expose the IEEE1394 bus as a | ||
25 | * regular OSS soundcard, i.e. you can link /dev/dsp to /dev/amdtp and | ||
26 | * then your favourite MP3 player, game or whatever sound program will | ||
27 | * output to an IEEE1394 isochronous channel. The signal destination | ||
28 | * could be a set of IEEE1394 loudspeakers (if and when such things | ||
29 | * become available) or an amplifier with IEEE1394 input (like the | ||
30 | * Sony STR-LSA1). The driver only handles the actual streaming, some | ||
31 | * connection management is also required for this to actually work. | ||
32 | * That is outside the scope of this driver, and furthermore it is not | ||
33 | * really standardized yet. | ||
34 | * | ||
35 | * The Audio and Music Data Tranmission Protocol is available at | ||
36 | * | ||
37 | * http://www.1394ta.org/Download/Technology/Specifications/2001/AM20Final-jf2.pdf | ||
38 | * | ||
39 | * | ||
40 | * TODO | ||
41 | * ---- | ||
42 | * | ||
43 | * - We should be able to change input sample format between LE/BE, as | ||
44 | * we already shift the bytes around when we construct the iso | ||
45 | * packets. | ||
46 | * | ||
47 | * - Fix DMA stop after bus reset! | ||
48 | * | ||
49 | * - Clean up iso context handling in ohci1394. | ||
50 | * | ||
51 | * | ||
52 | * MAYBE TODO | ||
53 | * ---------- | ||
54 | * | ||
55 | * - Receive data for local playback or recording. Playback requires | ||
56 | * soft syncing with the sound card. | ||
57 | * | ||
58 | * - Signal processing, i.e. receive packets, do some processing, and | ||
59 | * transmit them again using the same packet structure and timestamps | ||
60 | * offset by processing time. | ||
61 | * | ||
62 | * - Maybe make an ALSA interface, that is, create a file_ops | ||
63 | * implementation that recognizes ALSA ioctls and uses defaults for | ||
64 | * things that can't be controlled through ALSA (iso channel). | ||
65 | * | ||
66 | * Changes: | ||
67 | * | ||
68 | * - Audit copy_from_user in amdtp_write. | ||
69 | * Daniele Bellucci <bellucda@tiscali.it> | ||
70 | * | ||
71 | */ | ||
72 | |||
73 | #include <linux/module.h> | ||
74 | #include <linux/list.h> | ||
75 | #include <linux/sched.h> | ||
76 | #include <linux/types.h> | ||
77 | #include <linux/fs.h> | ||
78 | #include <linux/ioctl.h> | ||
79 | #include <linux/wait.h> | ||
80 | #include <linux/pci.h> | ||
81 | #include <linux/interrupt.h> | ||
82 | #include <linux/poll.h> | ||
83 | #include <linux/compat.h> | ||
84 | #include <linux/cdev.h> | ||
85 | #include <asm/uaccess.h> | ||
86 | #include <asm/atomic.h> | ||
87 | |||
88 | #include "hosts.h" | ||
89 | #include "highlevel.h" | ||
90 | #include "ieee1394.h" | ||
91 | #include "ieee1394_core.h" | ||
92 | #include "ohci1394.h" | ||
93 | |||
94 | #include "amdtp.h" | ||
95 | #include "cmp.h" | ||
96 | |||
97 | #define FMT_AMDTP 0x10 | ||
98 | #define FDF_AM824 0x00 | ||
99 | #define FDF_SFC_32KHZ 0x00 | ||
100 | #define FDF_SFC_44K1HZ 0x01 | ||
101 | #define FDF_SFC_48KHZ 0x02 | ||
102 | #define FDF_SFC_88K2HZ 0x03 | ||
103 | #define FDF_SFC_96KHZ 0x04 | ||
104 | #define FDF_SFC_176K4HZ 0x05 | ||
105 | #define FDF_SFC_192KHZ 0x06 | ||
106 | |||
107 | struct descriptor_block { | ||
108 | struct output_more_immediate { | ||
109 | u32 control; | ||
110 | u32 pad0; | ||
111 | u32 skip; | ||
112 | u32 pad1; | ||
113 | u32 header[4]; | ||
114 | } header_desc; | ||
115 | |||
116 | struct output_last { | ||
117 | u32 control; | ||
118 | u32 data_address; | ||
119 | u32 branch; | ||
120 | u32 status; | ||
121 | } payload_desc; | ||
122 | }; | ||
123 | |||
124 | struct packet { | ||
125 | struct descriptor_block *db; | ||
126 | dma_addr_t db_bus; | ||
127 | struct iso_packet *payload; | ||
128 | dma_addr_t payload_bus; | ||
129 | }; | ||
130 | |||
131 | #include <asm/byteorder.h> | ||
132 | |||
133 | #if defined __BIG_ENDIAN_BITFIELD | ||
134 | |||
135 | struct iso_packet { | ||
136 | /* First quadlet */ | ||
137 | unsigned int dbs : 8; | ||
138 | unsigned int eoh0 : 2; | ||
139 | unsigned int sid : 6; | ||
140 | |||
141 | unsigned int dbc : 8; | ||
142 | unsigned int fn : 2; | ||
143 | unsigned int qpc : 3; | ||
144 | unsigned int sph : 1; | ||
145 | unsigned int reserved : 2; | ||
146 | |||
147 | /* Second quadlet */ | ||
148 | unsigned int fdf : 8; | ||
149 | unsigned int eoh1 : 2; | ||
150 | unsigned int fmt : 6; | ||
151 | |||
152 | unsigned int syt : 16; | ||
153 | |||
154 | quadlet_t data[0]; | ||
155 | }; | ||
156 | |||
157 | #elif defined __LITTLE_ENDIAN_BITFIELD | ||
158 | |||
159 | struct iso_packet { | ||
160 | /* First quadlet */ | ||
161 | unsigned int sid : 6; | ||
162 | unsigned int eoh0 : 2; | ||
163 | unsigned int dbs : 8; | ||
164 | |||
165 | unsigned int reserved : 2; | ||
166 | unsigned int sph : 1; | ||
167 | unsigned int qpc : 3; | ||
168 | unsigned int fn : 2; | ||
169 | unsigned int dbc : 8; | ||
170 | |||
171 | /* Second quadlet */ | ||
172 | unsigned int fmt : 6; | ||
173 | unsigned int eoh1 : 2; | ||
174 | unsigned int fdf : 8; | ||
175 | |||
176 | unsigned int syt : 16; | ||
177 | |||
178 | quadlet_t data[0]; | ||
179 | }; | ||
180 | |||
181 | #else | ||
182 | |||
183 | #error Unknown bitfield type | ||
184 | |||
185 | #endif | ||
186 | |||
187 | struct fraction { | ||
188 | int integer; | ||
189 | int numerator; | ||
190 | int denominator; | ||
191 | }; | ||
192 | |||
193 | #define PACKET_LIST_SIZE 256 | ||
194 | #define MAX_PACKET_LISTS 4 | ||
195 | |||
196 | struct packet_list { | ||
197 | struct list_head link; | ||
198 | int last_cycle_count; | ||
199 | struct packet packets[PACKET_LIST_SIZE]; | ||
200 | }; | ||
201 | |||
202 | #define BUFFER_SIZE 128 | ||
203 | |||
204 | /* This implements a circular buffer for incoming samples. */ | ||
205 | |||
206 | struct buffer { | ||
207 | size_t head, tail, length, size; | ||
208 | unsigned char data[0]; | ||
209 | }; | ||
210 | |||
211 | struct stream { | ||
212 | int iso_channel; | ||
213 | int format; | ||
214 | int rate; | ||
215 | int dimension; | ||
216 | int fdf; | ||
217 | int mode; | ||
218 | int sample_format; | ||
219 | struct cmp_pcr *opcr; | ||
220 | |||
221 | /* Input samples are copied here. */ | ||
222 | struct buffer *input; | ||
223 | |||
224 | /* ISO Packer state */ | ||
225 | unsigned char dbc; | ||
226 | struct packet_list *current_packet_list; | ||
227 | int current_packet; | ||
228 | struct fraction ready_samples, samples_per_cycle; | ||
229 | |||
230 | /* We use these to generate control bits when we are packing | ||
231 | * iec958 data. | ||
232 | */ | ||
233 | int iec958_frame_count; | ||
234 | int iec958_rate_code; | ||
235 | |||
236 | /* The cycle_count and cycle_offset fields are used for the | ||
237 | * synchronization timestamps (syt) in the cip header. They | ||
238 | * are incremented by at least a cycle every time we put a | ||
239 | * time stamp in a packet. As we don't time stamp all | ||
240 | * packages, cycle_count isn't updated in every cycle, and | ||
241 | * sometimes it's incremented by 2. Thus, we have | ||
242 | * cycle_count2, which is simply incremented by one with each | ||
243 | * packet, so we can compare it to the transmission time | ||
244 | * written back in the dma programs. | ||
245 | */ | ||
246 | atomic_t cycle_count, cycle_count2; | ||
247 | struct fraction cycle_offset, ticks_per_syt_offset; | ||
248 | int syt_interval; | ||
249 | int stale_count; | ||
250 | |||
251 | /* Theses fields control the sample output to the DMA engine. | ||
252 | * The dma_packet_lists list holds packet lists currently | ||
253 | * queued for dma; the head of the list is currently being | ||
254 | * processed. The last program in a packet list generates an | ||
255 | * interrupt, which removes the head from dma_packet_lists and | ||
256 | * puts it back on the free list. | ||
257 | */ | ||
258 | struct list_head dma_packet_lists; | ||
259 | struct list_head free_packet_lists; | ||
260 | wait_queue_head_t packet_list_wait; | ||
261 | spinlock_t packet_list_lock; | ||
262 | struct ohci1394_iso_tasklet iso_tasklet; | ||
263 | struct pci_pool *descriptor_pool, *packet_pool; | ||
264 | |||
265 | /* Streams at a host controller are chained through this field. */ | ||
266 | struct list_head link; | ||
267 | struct amdtp_host *host; | ||
268 | }; | ||
269 | |||
270 | struct amdtp_host { | ||
271 | struct hpsb_host *host; | ||
272 | struct ti_ohci *ohci; | ||
273 | struct list_head stream_list; | ||
274 | spinlock_t stream_list_lock; | ||
275 | }; | ||
276 | |||
277 | static struct hpsb_highlevel amdtp_highlevel; | ||
278 | |||
279 | |||
280 | /* FIXME: This doesn't belong here... */ | ||
281 | |||
282 | #define OHCI1394_CONTEXT_CYCLE_MATCH 0x80000000 | ||
283 | #define OHCI1394_CONTEXT_RUN 0x00008000 | ||
284 | #define OHCI1394_CONTEXT_WAKE 0x00001000 | ||
285 | #define OHCI1394_CONTEXT_DEAD 0x00000800 | ||
286 | #define OHCI1394_CONTEXT_ACTIVE 0x00000400 | ||
287 | |||
288 | static void ohci1394_start_it_ctx(struct ti_ohci *ohci, int ctx, | ||
289 | dma_addr_t first_cmd, int z, int cycle_match) | ||
290 | { | ||
291 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << ctx); | ||
292 | reg_write(ohci, OHCI1394_IsoXmitCommandPtr + ctx * 16, first_cmd | z); | ||
293 | reg_write(ohci, OHCI1394_IsoXmitContextControlClear + ctx * 16, ~0); | ||
294 | wmb(); | ||
295 | reg_write(ohci, OHCI1394_IsoXmitContextControlSet + ctx * 16, | ||
296 | OHCI1394_CONTEXT_CYCLE_MATCH | (cycle_match << 16) | | ||
297 | OHCI1394_CONTEXT_RUN); | ||
298 | } | ||
299 | |||
300 | static void ohci1394_wake_it_ctx(struct ti_ohci *ohci, int ctx) | ||
301 | { | ||
302 | reg_write(ohci, OHCI1394_IsoXmitContextControlSet + ctx * 16, | ||
303 | OHCI1394_CONTEXT_WAKE); | ||
304 | } | ||
305 | |||
306 | static void ohci1394_stop_it_ctx(struct ti_ohci *ohci, int ctx, int synchronous) | ||
307 | { | ||
308 | u32 control; | ||
309 | int wait; | ||
310 | |||
311 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << ctx); | ||
312 | reg_write(ohci, OHCI1394_IsoXmitContextControlClear + ctx * 16, | ||
313 | OHCI1394_CONTEXT_RUN); | ||
314 | wmb(); | ||
315 | |||
316 | if (synchronous) { | ||
317 | for (wait = 0; wait < 5; wait++) { | ||
318 | control = reg_read(ohci, OHCI1394_IsoXmitContextControlSet + ctx * 16); | ||
319 | if ((control & OHCI1394_CONTEXT_ACTIVE) == 0) | ||
320 | break; | ||
321 | |||
322 | schedule_timeout_interruptible(1); | ||
323 | } | ||
324 | } | ||
325 | } | ||
326 | |||
327 | /* Note: we can test if free_packet_lists is empty without aquiring | ||
328 | * the packet_list_lock. The interrupt handler only adds to the free | ||
329 | * list, there is no race condition between testing the list non-empty | ||
330 | * and acquiring the lock. | ||
331 | */ | ||
332 | |||
333 | static struct packet_list *stream_get_free_packet_list(struct stream *s) | ||
334 | { | ||
335 | struct packet_list *pl; | ||
336 | unsigned long flags; | ||
337 | |||
338 | if (list_empty(&s->free_packet_lists)) | ||
339 | return NULL; | ||
340 | |||
341 | spin_lock_irqsave(&s->packet_list_lock, flags); | ||
342 | pl = list_entry(s->free_packet_lists.next, struct packet_list, link); | ||
343 | list_del(&pl->link); | ||
344 | spin_unlock_irqrestore(&s->packet_list_lock, flags); | ||
345 | |||
346 | return pl; | ||
347 | } | ||
348 | |||
349 | static void stream_start_dma(struct stream *s, struct packet_list *pl) | ||
350 | { | ||
351 | u32 syt_cycle, cycle_count, start_cycle; | ||
352 | |||
353 | cycle_count = reg_read(s->host->ohci, | ||
354 | OHCI1394_IsochronousCycleTimer) >> 12; | ||
355 | syt_cycle = (pl->last_cycle_count - PACKET_LIST_SIZE + 1) & 0x0f; | ||
356 | |||
357 | /* We program the DMA controller to start transmission at | ||
358 | * least 17 cycles from now - this happens when the lower four | ||
359 | * bits of cycle_count is 0x0f and syt_cycle is 0, in this | ||
360 | * case the start cycle is cycle_count - 15 + 32. */ | ||
361 | start_cycle = (cycle_count & ~0x0f) + 32 + syt_cycle; | ||
362 | if ((start_cycle & 0x1fff) >= 8000) | ||
363 | start_cycle = start_cycle - 8000 + 0x2000; | ||
364 | |||
365 | ohci1394_start_it_ctx(s->host->ohci, s->iso_tasklet.context, | ||
366 | pl->packets[0].db_bus, 3, | ||
367 | start_cycle & 0x7fff); | ||
368 | } | ||
369 | |||
370 | static void stream_put_dma_packet_list(struct stream *s, | ||
371 | struct packet_list *pl) | ||
372 | { | ||
373 | unsigned long flags; | ||
374 | struct packet_list *prev; | ||
375 | |||
376 | /* Remember the cycle_count used for timestamping the last packet. */ | ||
377 | pl->last_cycle_count = atomic_read(&s->cycle_count2) - 1; | ||
378 | pl->packets[PACKET_LIST_SIZE - 1].db->payload_desc.branch = 0; | ||
379 | |||
380 | spin_lock_irqsave(&s->packet_list_lock, flags); | ||
381 | list_add_tail(&pl->link, &s->dma_packet_lists); | ||
382 | spin_unlock_irqrestore(&s->packet_list_lock, flags); | ||
383 | |||
384 | prev = list_entry(pl->link.prev, struct packet_list, link); | ||
385 | if (pl->link.prev != &s->dma_packet_lists) { | ||
386 | struct packet *last = &prev->packets[PACKET_LIST_SIZE - 1]; | ||
387 | last->db->payload_desc.branch = pl->packets[0].db_bus | 3; | ||
388 | last->db->header_desc.skip = pl->packets[0].db_bus | 3; | ||
389 | ohci1394_wake_it_ctx(s->host->ohci, s->iso_tasklet.context); | ||
390 | } | ||
391 | else | ||
392 | stream_start_dma(s, pl); | ||
393 | } | ||
394 | |||
395 | static void stream_shift_packet_lists(unsigned long l) | ||
396 | { | ||
397 | struct stream *s = (struct stream *) l; | ||
398 | struct packet_list *pl; | ||
399 | struct packet *last; | ||
400 | int diff; | ||
401 | |||
402 | if (list_empty(&s->dma_packet_lists)) { | ||
403 | HPSB_ERR("empty dma_packet_lists in %s", __FUNCTION__); | ||
404 | return; | ||
405 | } | ||
406 | |||
407 | /* Now that we know the list is non-empty, we can get the head | ||
408 | * of the list without locking, because the process context | ||
409 | * only adds to the tail. | ||
410 | */ | ||
411 | pl = list_entry(s->dma_packet_lists.next, struct packet_list, link); | ||
412 | last = &pl->packets[PACKET_LIST_SIZE - 1]; | ||
413 | |||
414 | /* This is weird... if we stop dma processing in the middle of | ||
415 | * a packet list, the dma context immediately generates an | ||
416 | * interrupt if we enable it again later. This only happens | ||
417 | * when amdtp_release is interrupted while waiting for dma to | ||
418 | * complete, though. Anyway, we detect this by seeing that | ||
419 | * the status of the dma descriptor that we expected an | ||
420 | * interrupt from is still 0. | ||
421 | */ | ||
422 | if (last->db->payload_desc.status == 0) { | ||
423 | HPSB_INFO("weird interrupt..."); | ||
424 | return; | ||
425 | } | ||
426 | |||
427 | /* If the last descriptor block does not specify a branch | ||
428 | * address, we have a sample underflow. | ||
429 | */ | ||
430 | if (last->db->payload_desc.branch == 0) | ||
431 | HPSB_INFO("FIXME: sample underflow..."); | ||
432 | |||
433 | /* Here we check when (which cycle) the last packet was sent | ||
434 | * and compare it to what the iso packer was using at the | ||
435 | * time. If there is a mismatch, we adjust the cycle count in | ||
436 | * the iso packer. However, there are still up to | ||
437 | * MAX_PACKET_LISTS packet lists queued with bad time stamps, | ||
438 | * so we disable time stamp monitoring for the next | ||
439 | * MAX_PACKET_LISTS packet lists. | ||
440 | */ | ||
441 | diff = (last->db->payload_desc.status - pl->last_cycle_count) & 0xf; | ||
442 | if (diff > 0 && s->stale_count == 0) { | ||
443 | atomic_add(diff, &s->cycle_count); | ||
444 | atomic_add(diff, &s->cycle_count2); | ||
445 | s->stale_count = MAX_PACKET_LISTS; | ||
446 | } | ||
447 | |||
448 | if (s->stale_count > 0) | ||
449 | s->stale_count--; | ||
450 | |||
451 | /* Finally, we move the packet list that was just processed | ||
452 | * back to the free list, and notify any waiters. | ||
453 | */ | ||
454 | spin_lock(&s->packet_list_lock); | ||
455 | list_del(&pl->link); | ||
456 | list_add_tail(&pl->link, &s->free_packet_lists); | ||
457 | spin_unlock(&s->packet_list_lock); | ||
458 | |||
459 | wake_up_interruptible(&s->packet_list_wait); | ||
460 | } | ||
461 | |||
462 | static struct packet *stream_current_packet(struct stream *s) | ||
463 | { | ||
464 | if (s->current_packet_list == NULL && | ||
465 | (s->current_packet_list = stream_get_free_packet_list(s)) == NULL) | ||
466 | return NULL; | ||
467 | |||
468 | return &s->current_packet_list->packets[s->current_packet]; | ||
469 | } | ||
470 | |||
471 | static void stream_queue_packet(struct stream *s) | ||
472 | { | ||
473 | s->current_packet++; | ||
474 | if (s->current_packet == PACKET_LIST_SIZE) { | ||
475 | stream_put_dma_packet_list(s, s->current_packet_list); | ||
476 | s->current_packet_list = NULL; | ||
477 | s->current_packet = 0; | ||
478 | } | ||
479 | } | ||
480 | |||
481 | /* Integer fractional math. When we transmit a 44k1Hz signal we must | ||
482 | * send 5 41/80 samples per isochronous cycle, as these occur 8000 | ||
483 | * times a second. Of course, we must send an integral number of | ||
484 | * samples in a packet, so we use the integer math to alternate | ||
485 | * between sending 5 and 6 samples per packet. | ||
486 | */ | ||
487 | |||
488 | static void fraction_init(struct fraction *f, int numerator, int denominator) | ||
489 | { | ||
490 | f->integer = numerator / denominator; | ||
491 | f->numerator = numerator % denominator; | ||
492 | f->denominator = denominator; | ||
493 | } | ||
494 | |||
495 | static __inline__ void fraction_add(struct fraction *dst, | ||
496 | struct fraction *src1, | ||
497 | struct fraction *src2) | ||
498 | { | ||
499 | /* assert: src1->denominator == src2->denominator */ | ||
500 | |||
501 | int sum, denom; | ||
502 | |||
503 | /* We use these two local variables to allow gcc to optimize | ||
504 | * the division and the modulo into only one division. */ | ||
505 | |||
506 | sum = src1->numerator + src2->numerator; | ||
507 | denom = src1->denominator; | ||
508 | dst->integer = src1->integer + src2->integer + sum / denom; | ||
509 | dst->numerator = sum % denom; | ||
510 | dst->denominator = denom; | ||
511 | } | ||
512 | |||
513 | static __inline__ void fraction_sub_int(struct fraction *dst, | ||
514 | struct fraction *src, int integer) | ||
515 | { | ||
516 | dst->integer = src->integer - integer; | ||
517 | dst->numerator = src->numerator; | ||
518 | dst->denominator = src->denominator; | ||
519 | } | ||
520 | |||
521 | static __inline__ int fraction_floor(struct fraction *frac) | ||
522 | { | ||
523 | return frac->integer; | ||
524 | } | ||
525 | |||
526 | static __inline__ int fraction_ceil(struct fraction *frac) | ||
527 | { | ||
528 | return frac->integer + (frac->numerator > 0 ? 1 : 0); | ||
529 | } | ||
530 | |||
531 | static void packet_initialize(struct packet *p, struct packet *next) | ||
532 | { | ||
533 | /* Here we initialize the dma descriptor block for | ||
534 | * transferring one iso packet. We use two descriptors per | ||
535 | * packet: an OUTPUT_MORE_IMMMEDIATE descriptor for the | ||
536 | * IEEE1394 iso packet header and an OUTPUT_LAST descriptor | ||
537 | * for the payload. | ||
538 | */ | ||
539 | |||
540 | p->db->header_desc.control = | ||
541 | DMA_CTL_OUTPUT_MORE | DMA_CTL_IMMEDIATE | 8; | ||
542 | |||
543 | if (next) { | ||
544 | p->db->payload_desc.control = | ||
545 | DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH; | ||
546 | p->db->payload_desc.branch = next->db_bus | 3; | ||
547 | p->db->header_desc.skip = next->db_bus | 3; | ||
548 | } | ||
549 | else { | ||
550 | p->db->payload_desc.control = | ||
551 | DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH | | ||
552 | DMA_CTL_UPDATE | DMA_CTL_IRQ; | ||
553 | p->db->payload_desc.branch = 0; | ||
554 | p->db->header_desc.skip = 0; | ||
555 | } | ||
556 | p->db->payload_desc.data_address = p->payload_bus; | ||
557 | p->db->payload_desc.status = 0; | ||
558 | } | ||
559 | |||
560 | static struct packet_list *packet_list_alloc(struct stream *s) | ||
561 | { | ||
562 | int i; | ||
563 | struct packet_list *pl; | ||
564 | struct packet *next; | ||
565 | |||
566 | pl = kmalloc(sizeof *pl, SLAB_KERNEL); | ||
567 | if (pl == NULL) | ||
568 | return NULL; | ||
569 | |||
570 | for (i = 0; i < PACKET_LIST_SIZE; i++) { | ||
571 | struct packet *p = &pl->packets[i]; | ||
572 | p->db = pci_pool_alloc(s->descriptor_pool, SLAB_KERNEL, | ||
573 | &p->db_bus); | ||
574 | p->payload = pci_pool_alloc(s->packet_pool, SLAB_KERNEL, | ||
575 | &p->payload_bus); | ||
576 | } | ||
577 | |||
578 | for (i = 0; i < PACKET_LIST_SIZE; i++) { | ||
579 | if (i < PACKET_LIST_SIZE - 1) | ||
580 | next = &pl->packets[i + 1]; | ||
581 | else | ||
582 | next = NULL; | ||
583 | packet_initialize(&pl->packets[i], next); | ||
584 | } | ||
585 | |||
586 | return pl; | ||
587 | } | ||
588 | |||
589 | static void packet_list_free(struct packet_list *pl, struct stream *s) | ||
590 | { | ||
591 | int i; | ||
592 | |||
593 | for (i = 0; i < PACKET_LIST_SIZE; i++) { | ||
594 | struct packet *p = &pl->packets[i]; | ||
595 | pci_pool_free(s->descriptor_pool, p->db, p->db_bus); | ||
596 | pci_pool_free(s->packet_pool, p->payload, p->payload_bus); | ||
597 | } | ||
598 | kfree(pl); | ||
599 | } | ||
600 | |||
601 | static struct buffer *buffer_alloc(int size) | ||
602 | { | ||
603 | struct buffer *b; | ||
604 | |||
605 | b = kmalloc(sizeof *b + size, SLAB_KERNEL); | ||
606 | if (b == NULL) | ||
607 | return NULL; | ||
608 | b->head = 0; | ||
609 | b->tail = 0; | ||
610 | b->length = 0; | ||
611 | b->size = size; | ||
612 | |||
613 | return b; | ||
614 | } | ||
615 | |||
616 | static unsigned char *buffer_get_bytes(struct buffer *buffer, int size) | ||
617 | { | ||
618 | unsigned char *p; | ||
619 | |||
620 | if (buffer->head + size > buffer->size) | ||
621 | BUG(); | ||
622 | |||
623 | p = &buffer->data[buffer->head]; | ||
624 | buffer->head += size; | ||
625 | if (buffer->head == buffer->size) | ||
626 | buffer->head = 0; | ||
627 | buffer->length -= size; | ||
628 | |||
629 | return p; | ||
630 | } | ||
631 | |||
632 | static unsigned char *buffer_put_bytes(struct buffer *buffer, | ||
633 | size_t max, size_t *actual) | ||
634 | { | ||
635 | size_t length; | ||
636 | unsigned char *p; | ||
637 | |||
638 | p = &buffer->data[buffer->tail]; | ||
639 | length = min(buffer->size - buffer->length, max); | ||
640 | if (buffer->tail + length < buffer->size) { | ||
641 | *actual = length; | ||
642 | buffer->tail += length; | ||
643 | } | ||
644 | else { | ||
645 | *actual = buffer->size - buffer->tail; | ||
646 | buffer->tail = 0; | ||
647 | } | ||
648 | |||
649 | buffer->length += *actual; | ||
650 | return p; | ||
651 | } | ||
652 | |||
653 | static u32 get_iec958_header_bits(struct stream *s, int sub_frame, u32 sample) | ||
654 | { | ||
655 | int csi, parity, shift; | ||
656 | int block_start; | ||
657 | u32 bits; | ||
658 | |||
659 | switch (s->iec958_frame_count) { | ||
660 | case 1: | ||
661 | csi = s->format == AMDTP_FORMAT_IEC958_AC3; | ||
662 | break; | ||
663 | case 2: | ||
664 | case 9: | ||
665 | csi = 1; | ||
666 | break; | ||
667 | case 24 ... 27: | ||
668 | csi = (s->iec958_rate_code >> (27 - s->iec958_frame_count)) & 0x01; | ||
669 | break; | ||
670 | default: | ||
671 | csi = 0; | ||
672 | break; | ||
673 | } | ||
674 | |||
675 | block_start = (s->iec958_frame_count == 0 && sub_frame == 0); | ||
676 | |||
677 | /* The parity bit is the xor of the sample bits and the | ||
678 | * channel status info bit. */ | ||
679 | for (shift = 16, parity = sample ^ csi; shift > 0; shift >>= 1) | ||
680 | parity ^= (parity >> shift); | ||
681 | |||
682 | bits = (block_start << 5) | /* Block start bit */ | ||
683 | ((sub_frame == 0) << 4) | /* Subframe bit */ | ||
684 | ((parity & 1) << 3) | /* Parity bit */ | ||
685 | (csi << 2); /* Channel status info bit */ | ||
686 | |||
687 | return bits; | ||
688 | } | ||
689 | |||
690 | static u32 get_header_bits(struct stream *s, int sub_frame, u32 sample) | ||
691 | { | ||
692 | switch (s->format) { | ||
693 | case AMDTP_FORMAT_IEC958_PCM: | ||
694 | case AMDTP_FORMAT_IEC958_AC3: | ||
695 | return get_iec958_header_bits(s, sub_frame, sample); | ||
696 | |||
697 | case AMDTP_FORMAT_RAW: | ||
698 | return 0x40; | ||
699 | |||
700 | default: | ||
701 | return 0; | ||
702 | } | ||
703 | } | ||
704 | |||
705 | static void fill_payload_le16(struct stream *s, quadlet_t *data, int nevents) | ||
706 | { | ||
707 | quadlet_t *event, sample, bits; | ||
708 | unsigned char *p; | ||
709 | int i, j; | ||
710 | |||
711 | for (i = 0, event = data; i < nevents; i++) { | ||
712 | |||
713 | for (j = 0; j < s->dimension; j++) { | ||
714 | p = buffer_get_bytes(s->input, 2); | ||
715 | sample = (p[1] << 16) | (p[0] << 8); | ||
716 | bits = get_header_bits(s, j, sample); | ||
717 | event[j] = cpu_to_be32((bits << 24) | sample); | ||
718 | } | ||
719 | |||
720 | event += s->dimension; | ||
721 | if (++s->iec958_frame_count == 192) | ||
722 | s->iec958_frame_count = 0; | ||
723 | } | ||
724 | } | ||
725 | |||
726 | static void fill_packet(struct stream *s, struct packet *packet, int nevents) | ||
727 | { | ||
728 | int syt_index, syt, size; | ||
729 | u32 control; | ||
730 | |||
731 | size = (nevents * s->dimension + 2) * sizeof(quadlet_t); | ||
732 | |||
733 | /* Update DMA descriptors */ | ||
734 | packet->db->payload_desc.status = 0; | ||
735 | control = packet->db->payload_desc.control & 0xffff0000; | ||
736 | packet->db->payload_desc.control = control | size; | ||
737 | |||
738 | /* Fill IEEE1394 headers */ | ||
739 | packet->db->header_desc.header[0] = | ||
740 | (IEEE1394_SPEED_100 << 16) | (0x01 << 14) | | ||
741 | (s->iso_channel << 8) | (TCODE_ISO_DATA << 4); | ||
742 | packet->db->header_desc.header[1] = size << 16; | ||
743 | |||
744 | /* Calculate synchronization timestamp (syt). First we | ||
745 | * determine syt_index, that is, the index in the packet of | ||
746 | * the sample for which the timestamp is valid. */ | ||
747 | syt_index = (s->syt_interval - s->dbc) & (s->syt_interval - 1); | ||
748 | if (syt_index < nevents) { | ||
749 | syt = ((atomic_read(&s->cycle_count) << 12) | | ||
750 | s->cycle_offset.integer) & 0xffff; | ||
751 | fraction_add(&s->cycle_offset, | ||
752 | &s->cycle_offset, &s->ticks_per_syt_offset); | ||
753 | |||
754 | /* This next addition should be modulo 8000 (0x1f40), | ||
755 | * but we only use the lower 4 bits of cycle_count, so | ||
756 | * we don't need the modulo. */ | ||
757 | atomic_add(s->cycle_offset.integer / 3072, &s->cycle_count); | ||
758 | s->cycle_offset.integer %= 3072; | ||
759 | } | ||
760 | else | ||
761 | syt = 0xffff; | ||
762 | |||
763 | atomic_inc(&s->cycle_count2); | ||
764 | |||
765 | /* Fill cip header */ | ||
766 | packet->payload->eoh0 = 0; | ||
767 | packet->payload->sid = s->host->host->node_id & 0x3f; | ||
768 | packet->payload->dbs = s->dimension; | ||
769 | packet->payload->fn = 0; | ||
770 | packet->payload->qpc = 0; | ||
771 | packet->payload->sph = 0; | ||
772 | packet->payload->reserved = 0; | ||
773 | packet->payload->dbc = s->dbc; | ||
774 | packet->payload->eoh1 = 2; | ||
775 | packet->payload->fmt = FMT_AMDTP; | ||
776 | packet->payload->fdf = s->fdf; | ||
777 | packet->payload->syt = cpu_to_be16(syt); | ||
778 | |||
779 | switch (s->sample_format) { | ||
780 | case AMDTP_INPUT_LE16: | ||
781 | fill_payload_le16(s, packet->payload->data, nevents); | ||
782 | break; | ||
783 | } | ||
784 | |||
785 | s->dbc += nevents; | ||
786 | } | ||
787 | |||
788 | static void stream_flush(struct stream *s) | ||
789 | { | ||
790 | struct packet *p; | ||
791 | int nevents; | ||
792 | struct fraction next; | ||
793 | |||
794 | /* The AMDTP specifies two transmission modes: blocking and | ||
795 | * non-blocking. In blocking mode you always transfer | ||
796 | * syt_interval or zero samples, whereas in non-blocking mode | ||
797 | * you send as many samples as you have available at transfer | ||
798 | * time. | ||
799 | * | ||
800 | * The fraction samples_per_cycle specifies the number of | ||
801 | * samples that become available per cycle. We add this to | ||
802 | * the fraction ready_samples, which specifies the number of | ||
803 | * leftover samples from the previous transmission. The sum, | ||
804 | * stored in the fraction next, specifies the number of | ||
805 | * samples available for transmission, and from this we | ||
806 | * determine the number of samples to actually transmit. | ||
807 | */ | ||
808 | |||
809 | while (1) { | ||
810 | fraction_add(&next, &s->ready_samples, &s->samples_per_cycle); | ||
811 | if (s->mode == AMDTP_MODE_BLOCKING) { | ||
812 | if (fraction_floor(&next) >= s->syt_interval) | ||
813 | nevents = s->syt_interval; | ||
814 | else | ||
815 | nevents = 0; | ||
816 | } | ||
817 | else | ||
818 | nevents = fraction_floor(&next); | ||
819 | |||
820 | p = stream_current_packet(s); | ||
821 | if (s->input->length < nevents * s->dimension * 2 || p == NULL) | ||
822 | break; | ||
823 | |||
824 | fill_packet(s, p, nevents); | ||
825 | stream_queue_packet(s); | ||
826 | |||
827 | /* Now that we have successfully queued the packet for | ||
828 | * transmission, we update the fraction ready_samples. */ | ||
829 | fraction_sub_int(&s->ready_samples, &next, nevents); | ||
830 | } | ||
831 | } | ||
832 | |||
833 | static int stream_alloc_packet_lists(struct stream *s) | ||
834 | { | ||
835 | int max_nevents, max_packet_size, i; | ||
836 | |||
837 | if (s->mode == AMDTP_MODE_BLOCKING) | ||
838 | max_nevents = s->syt_interval; | ||
839 | else | ||
840 | max_nevents = fraction_ceil(&s->samples_per_cycle); | ||
841 | |||
842 | max_packet_size = max_nevents * s->dimension * 4 + 8; | ||
843 | s->packet_pool = pci_pool_create("packet pool", s->host->ohci->dev, | ||
844 | max_packet_size, 0, 0); | ||
845 | |||
846 | if (s->packet_pool == NULL) | ||
847 | return -1; | ||
848 | |||
849 | INIT_LIST_HEAD(&s->free_packet_lists); | ||
850 | INIT_LIST_HEAD(&s->dma_packet_lists); | ||
851 | for (i = 0; i < MAX_PACKET_LISTS; i++) { | ||
852 | struct packet_list *pl = packet_list_alloc(s); | ||
853 | if (pl == NULL) | ||
854 | break; | ||
855 | list_add_tail(&pl->link, &s->free_packet_lists); | ||
856 | } | ||
857 | |||
858 | return i < MAX_PACKET_LISTS ? -1 : 0; | ||
859 | } | ||
860 | |||
861 | static void stream_free_packet_lists(struct stream *s) | ||
862 | { | ||
863 | struct packet_list *packet_l, *packet_l_next; | ||
864 | |||
865 | if (s->current_packet_list != NULL) | ||
866 | packet_list_free(s->current_packet_list, s); | ||
867 | list_for_each_entry_safe(packet_l, packet_l_next, &s->dma_packet_lists, link) | ||
868 | packet_list_free(packet_l, s); | ||
869 | list_for_each_entry_safe(packet_l, packet_l_next, &s->free_packet_lists, link) | ||
870 | packet_list_free(packet_l, s); | ||
871 | if (s->packet_pool != NULL) | ||
872 | pci_pool_destroy(s->packet_pool); | ||
873 | |||
874 | s->current_packet_list = NULL; | ||
875 | INIT_LIST_HEAD(&s->free_packet_lists); | ||
876 | INIT_LIST_HEAD(&s->dma_packet_lists); | ||
877 | s->packet_pool = NULL; | ||
878 | } | ||
879 | |||
880 | static void plug_update(struct cmp_pcr *plug, void *data) | ||
881 | { | ||
882 | struct stream *s = data; | ||
883 | |||
884 | HPSB_INFO("plug update: p2p_count=%d, channel=%d", | ||
885 | plug->p2p_count, plug->channel); | ||
886 | s->iso_channel = plug->channel; | ||
887 | if (plug->p2p_count > 0) { | ||
888 | struct packet_list *pl; | ||
889 | |||
890 | pl = list_entry(s->dma_packet_lists.next, struct packet_list, link); | ||
891 | stream_start_dma(s, pl); | ||
892 | } | ||
893 | else { | ||
894 | ohci1394_stop_it_ctx(s->host->ohci, s->iso_tasklet.context, 0); | ||
895 | } | ||
896 | } | ||
897 | |||
898 | static int stream_configure(struct stream *s, int cmd, struct amdtp_ioctl *cfg) | ||
899 | { | ||
900 | const int transfer_delay = 9000; | ||
901 | |||
902 | if (cfg->format <= AMDTP_FORMAT_IEC958_AC3) | ||
903 | s->format = cfg->format; | ||
904 | else | ||
905 | return -EINVAL; | ||
906 | |||
907 | switch (cfg->rate) { | ||
908 | case 32000: | ||
909 | s->syt_interval = 8; | ||
910 | s->fdf = FDF_SFC_32KHZ; | ||
911 | s->iec958_rate_code = 0x0c; | ||
912 | break; | ||
913 | case 44100: | ||
914 | s->syt_interval = 8; | ||
915 | s->fdf = FDF_SFC_44K1HZ; | ||
916 | s->iec958_rate_code = 0x00; | ||
917 | break; | ||
918 | case 48000: | ||
919 | s->syt_interval = 8; | ||
920 | s->fdf = FDF_SFC_48KHZ; | ||
921 | s->iec958_rate_code = 0x04; | ||
922 | break; | ||
923 | case 88200: | ||
924 | s->syt_interval = 16; | ||
925 | s->fdf = FDF_SFC_88K2HZ; | ||
926 | s->iec958_rate_code = 0x00; | ||
927 | break; | ||
928 | case 96000: | ||
929 | s->syt_interval = 16; | ||
930 | s->fdf = FDF_SFC_96KHZ; | ||
931 | s->iec958_rate_code = 0x00; | ||
932 | break; | ||
933 | case 176400: | ||
934 | s->syt_interval = 32; | ||
935 | s->fdf = FDF_SFC_176K4HZ; | ||
936 | s->iec958_rate_code = 0x00; | ||
937 | break; | ||
938 | case 192000: | ||
939 | s->syt_interval = 32; | ||
940 | s->fdf = FDF_SFC_192KHZ; | ||
941 | s->iec958_rate_code = 0x00; | ||
942 | break; | ||
943 | |||
944 | default: | ||
945 | return -EINVAL; | ||
946 | } | ||
947 | |||
948 | s->rate = cfg->rate; | ||
949 | fraction_init(&s->samples_per_cycle, s->rate, 8000); | ||
950 | fraction_init(&s->ready_samples, 0, 8000); | ||
951 | |||
952 | /* The ticks_per_syt_offset is initialized to the number of | ||
953 | * ticks between syt_interval events. The number of ticks per | ||
954 | * second is 24.576e6, so the number of ticks between | ||
955 | * syt_interval events is 24.576e6 * syt_interval / rate. | ||
956 | */ | ||
957 | fraction_init(&s->ticks_per_syt_offset, | ||
958 | 24576000 * s->syt_interval, s->rate); | ||
959 | fraction_init(&s->cycle_offset, (transfer_delay % 3072) * s->rate, s->rate); | ||
960 | atomic_set(&s->cycle_count, transfer_delay / 3072); | ||
961 | atomic_set(&s->cycle_count2, 0); | ||
962 | |||
963 | s->mode = cfg->mode; | ||
964 | s->sample_format = AMDTP_INPUT_LE16; | ||
965 | |||
966 | /* When using the AM824 raw subformat we can stream signals of | ||
967 | * any dimension. The IEC958 subformat, however, only | ||
968 | * supports 2 channels. | ||
969 | */ | ||
970 | if (s->format == AMDTP_FORMAT_RAW || cfg->dimension == 2) | ||
971 | s->dimension = cfg->dimension; | ||
972 | else | ||
973 | return -EINVAL; | ||
974 | |||
975 | if (s->opcr != NULL) { | ||
976 | cmp_unregister_opcr(s->host->host, s->opcr); | ||
977 | s->opcr = NULL; | ||
978 | } | ||
979 | |||
980 | switch(cmd) { | ||
981 | case AMDTP_IOC_PLUG: | ||
982 | s->opcr = cmp_register_opcr(s->host->host, cfg->u.plug, | ||
983 | /*payload*/ 12, plug_update, s); | ||
984 | if (s->opcr == NULL) | ||
985 | return -EINVAL; | ||
986 | s->iso_channel = s->opcr->channel; | ||
987 | break; | ||
988 | |||
989 | case AMDTP_IOC_CHANNEL: | ||
990 | if (cfg->u.channel >= 0 && cfg->u.channel < 64) | ||
991 | s->iso_channel = cfg->u.channel; | ||
992 | else | ||
993 | return -EINVAL; | ||
994 | break; | ||
995 | } | ||
996 | |||
997 | /* The ioctl settings were all valid, so we realloc the packet | ||
998 | * lists to make sure the packet size is big enough. | ||
999 | */ | ||
1000 | if (s->packet_pool != NULL) | ||
1001 | stream_free_packet_lists(s); | ||
1002 | |||
1003 | if (stream_alloc_packet_lists(s) < 0) { | ||
1004 | stream_free_packet_lists(s); | ||
1005 | return -ENOMEM; | ||
1006 | } | ||
1007 | |||
1008 | return 0; | ||
1009 | } | ||
1010 | |||
1011 | static struct stream *stream_alloc(struct amdtp_host *host) | ||
1012 | { | ||
1013 | struct stream *s; | ||
1014 | unsigned long flags; | ||
1015 | |||
1016 | s = kmalloc(sizeof(struct stream), SLAB_KERNEL); | ||
1017 | if (s == NULL) | ||
1018 | return NULL; | ||
1019 | |||
1020 | memset(s, 0, sizeof(struct stream)); | ||
1021 | s->host = host; | ||
1022 | |||
1023 | s->input = buffer_alloc(BUFFER_SIZE); | ||
1024 | if (s->input == NULL) { | ||
1025 | kfree(s); | ||
1026 | return NULL; | ||
1027 | } | ||
1028 | |||
1029 | s->descriptor_pool = pci_pool_create("descriptor pool", host->ohci->dev, | ||
1030 | sizeof(struct descriptor_block), | ||
1031 | 16, 0); | ||
1032 | |||
1033 | if (s->descriptor_pool == NULL) { | ||
1034 | kfree(s->input); | ||
1035 | kfree(s); | ||
1036 | return NULL; | ||
1037 | } | ||
1038 | |||
1039 | INIT_LIST_HEAD(&s->free_packet_lists); | ||
1040 | INIT_LIST_HEAD(&s->dma_packet_lists); | ||
1041 | |||
1042 | init_waitqueue_head(&s->packet_list_wait); | ||
1043 | spin_lock_init(&s->packet_list_lock); | ||
1044 | |||
1045 | ohci1394_init_iso_tasklet(&s->iso_tasklet, OHCI_ISO_TRANSMIT, | ||
1046 | stream_shift_packet_lists, | ||
1047 | (unsigned long) s); | ||
1048 | |||
1049 | if (ohci1394_register_iso_tasklet(host->ohci, &s->iso_tasklet) < 0) { | ||
1050 | pci_pool_destroy(s->descriptor_pool); | ||
1051 | kfree(s->input); | ||
1052 | kfree(s); | ||
1053 | return NULL; | ||
1054 | } | ||
1055 | |||
1056 | spin_lock_irqsave(&host->stream_list_lock, flags); | ||
1057 | list_add_tail(&s->link, &host->stream_list); | ||
1058 | spin_unlock_irqrestore(&host->stream_list_lock, flags); | ||
1059 | |||
1060 | return s; | ||
1061 | } | ||
1062 | |||
1063 | static void stream_free(struct stream *s) | ||
1064 | { | ||
1065 | unsigned long flags; | ||
1066 | |||
1067 | /* Stop the DMA. We wait for the dma packet list to become | ||
1068 | * empty and let the dma controller run out of programs. This | ||
1069 | * seems to be more reliable than stopping it directly, since | ||
1070 | * that sometimes generates an it transmit interrupt if we | ||
1071 | * later re-enable the context. | ||
1072 | */ | ||
1073 | wait_event_interruptible(s->packet_list_wait, | ||
1074 | list_empty(&s->dma_packet_lists)); | ||
1075 | |||
1076 | ohci1394_stop_it_ctx(s->host->ohci, s->iso_tasklet.context, 1); | ||
1077 | ohci1394_unregister_iso_tasklet(s->host->ohci, &s->iso_tasklet); | ||
1078 | |||
1079 | if (s->opcr != NULL) | ||
1080 | cmp_unregister_opcr(s->host->host, s->opcr); | ||
1081 | |||
1082 | spin_lock_irqsave(&s->host->stream_list_lock, flags); | ||
1083 | list_del(&s->link); | ||
1084 | spin_unlock_irqrestore(&s->host->stream_list_lock, flags); | ||
1085 | |||
1086 | kfree(s->input); | ||
1087 | |||
1088 | stream_free_packet_lists(s); | ||
1089 | pci_pool_destroy(s->descriptor_pool); | ||
1090 | |||
1091 | kfree(s); | ||
1092 | } | ||
1093 | |||
1094 | /* File operations */ | ||
1095 | |||
1096 | static ssize_t amdtp_write(struct file *file, const char __user *buffer, size_t count, | ||
1097 | loff_t *offset_is_ignored) | ||
1098 | { | ||
1099 | struct stream *s = file->private_data; | ||
1100 | unsigned char *p; | ||
1101 | int i; | ||
1102 | size_t length; | ||
1103 | |||
1104 | if (s->packet_pool == NULL) | ||
1105 | return -EBADFD; | ||
1106 | |||
1107 | /* Fill the circular buffer from the input buffer and call the | ||
1108 | * iso packer when the buffer is full. The iso packer may | ||
1109 | * leave bytes in the buffer for two reasons: either the | ||
1110 | * remaining bytes wasn't enough to build a new packet, or | ||
1111 | * there were no free packet lists. In the first case we | ||
1112 | * re-fill the buffer and call the iso packer again or return | ||
1113 | * if we used all the data from userspace. In the second | ||
1114 | * case, the wait_event_interruptible will block until the irq | ||
1115 | * handler frees a packet list. | ||
1116 | */ | ||
1117 | |||
1118 | for (i = 0; i < count; i += length) { | ||
1119 | p = buffer_put_bytes(s->input, count - i, &length); | ||
1120 | if (copy_from_user(p, buffer + i, length)) | ||
1121 | return -EFAULT; | ||
1122 | if (s->input->length < s->input->size) | ||
1123 | continue; | ||
1124 | |||
1125 | stream_flush(s); | ||
1126 | |||
1127 | if (s->current_packet_list != NULL) | ||
1128 | continue; | ||
1129 | |||
1130 | if (file->f_flags & O_NONBLOCK) | ||
1131 | return i + length > 0 ? i + length : -EAGAIN; | ||
1132 | |||
1133 | if (wait_event_interruptible(s->packet_list_wait, | ||
1134 | !list_empty(&s->free_packet_lists))) | ||
1135 | return -EINTR; | ||
1136 | } | ||
1137 | |||
1138 | return count; | ||
1139 | } | ||
1140 | |||
1141 | static long amdtp_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | ||
1142 | { | ||
1143 | struct stream *s = file->private_data; | ||
1144 | struct amdtp_ioctl cfg; | ||
1145 | int err; | ||
1146 | lock_kernel(); | ||
1147 | switch(cmd) | ||
1148 | { | ||
1149 | case AMDTP_IOC_PLUG: | ||
1150 | case AMDTP_IOC_CHANNEL: | ||
1151 | if (copy_from_user(&cfg, (struct amdtp_ioctl __user *) arg, sizeof cfg)) | ||
1152 | err = -EFAULT; | ||
1153 | else | ||
1154 | err = stream_configure(s, cmd, &cfg); | ||
1155 | break; | ||
1156 | |||
1157 | default: | ||
1158 | err = -EINVAL; | ||
1159 | break; | ||
1160 | } | ||
1161 | unlock_kernel(); | ||
1162 | return err; | ||
1163 | } | ||
1164 | |||
1165 | static unsigned int amdtp_poll(struct file *file, poll_table *pt) | ||
1166 | { | ||
1167 | struct stream *s = file->private_data; | ||
1168 | |||
1169 | poll_wait(file, &s->packet_list_wait, pt); | ||
1170 | |||
1171 | if (!list_empty(&s->free_packet_lists)) | ||
1172 | return POLLOUT | POLLWRNORM; | ||
1173 | else | ||
1174 | return 0; | ||
1175 | } | ||
1176 | |||
1177 | static int amdtp_open(struct inode *inode, struct file *file) | ||
1178 | { | ||
1179 | struct amdtp_host *host; | ||
1180 | int i = ieee1394_file_to_instance(file); | ||
1181 | |||
1182 | host = hpsb_get_hostinfo_bykey(&amdtp_highlevel, i); | ||
1183 | if (host == NULL) | ||
1184 | return -ENODEV; | ||
1185 | |||
1186 | file->private_data = stream_alloc(host); | ||
1187 | if (file->private_data == NULL) | ||
1188 | return -ENOMEM; | ||
1189 | |||
1190 | return 0; | ||
1191 | } | ||
1192 | |||
1193 | static int amdtp_release(struct inode *inode, struct file *file) | ||
1194 | { | ||
1195 | struct stream *s = file->private_data; | ||
1196 | |||
1197 | stream_free(s); | ||
1198 | |||
1199 | return 0; | ||
1200 | } | ||
1201 | |||
1202 | static struct cdev amdtp_cdev; | ||
1203 | static struct file_operations amdtp_fops = | ||
1204 | { | ||
1205 | .owner = THIS_MODULE, | ||
1206 | .write = amdtp_write, | ||
1207 | .poll = amdtp_poll, | ||
1208 | .unlocked_ioctl = amdtp_ioctl, | ||
1209 | .compat_ioctl = amdtp_ioctl, /* All amdtp ioctls are compatible */ | ||
1210 | .open = amdtp_open, | ||
1211 | .release = amdtp_release | ||
1212 | }; | ||
1213 | |||
1214 | /* IEEE1394 Subsystem functions */ | ||
1215 | |||
1216 | static void amdtp_add_host(struct hpsb_host *host) | ||
1217 | { | ||
1218 | struct amdtp_host *ah; | ||
1219 | int minor; | ||
1220 | |||
1221 | if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME) != 0) | ||
1222 | return; | ||
1223 | |||
1224 | ah = hpsb_create_hostinfo(&amdtp_highlevel, host, sizeof(*ah)); | ||
1225 | if (!ah) { | ||
1226 | HPSB_ERR("amdtp: Unable able to alloc hostinfo"); | ||
1227 | return; | ||
1228 | } | ||
1229 | |||
1230 | ah->host = host; | ||
1231 | ah->ohci = host->hostdata; | ||
1232 | |||
1233 | hpsb_set_hostinfo_key(&amdtp_highlevel, host, ah->host->id); | ||
1234 | |||
1235 | minor = IEEE1394_MINOR_BLOCK_AMDTP * 16 + ah->host->id; | ||
1236 | |||
1237 | INIT_LIST_HEAD(&ah->stream_list); | ||
1238 | spin_lock_init(&ah->stream_list_lock); | ||
1239 | |||
1240 | devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor), | ||
1241 | S_IFCHR|S_IRUSR|S_IWUSR, "amdtp/%d", ah->host->id); | ||
1242 | } | ||
1243 | |||
1244 | static void amdtp_remove_host(struct hpsb_host *host) | ||
1245 | { | ||
1246 | struct amdtp_host *ah = hpsb_get_hostinfo(&amdtp_highlevel, host); | ||
1247 | |||
1248 | if (ah) | ||
1249 | devfs_remove("amdtp/%d", ah->host->id); | ||
1250 | |||
1251 | return; | ||
1252 | } | ||
1253 | |||
1254 | static struct hpsb_highlevel amdtp_highlevel = { | ||
1255 | .name = "amdtp", | ||
1256 | .add_host = amdtp_add_host, | ||
1257 | .remove_host = amdtp_remove_host, | ||
1258 | }; | ||
1259 | |||
1260 | /* Module interface */ | ||
1261 | |||
1262 | MODULE_AUTHOR("Kristian Hogsberg <hogsberg@users.sf.net>"); | ||
1263 | MODULE_DESCRIPTION("Driver for Audio & Music Data Transmission Protocol " | ||
1264 | "on OHCI boards."); | ||
1265 | MODULE_SUPPORTED_DEVICE("amdtp"); | ||
1266 | MODULE_LICENSE("GPL"); | ||
1267 | |||
1268 | static int __init amdtp_init_module (void) | ||
1269 | { | ||
1270 | cdev_init(&amdtp_cdev, &amdtp_fops); | ||
1271 | amdtp_cdev.owner = THIS_MODULE; | ||
1272 | kobject_set_name(&amdtp_cdev.kobj, "amdtp"); | ||
1273 | if (cdev_add(&amdtp_cdev, IEEE1394_AMDTP_DEV, 16)) { | ||
1274 | HPSB_ERR("amdtp: unable to add char device"); | ||
1275 | return -EIO; | ||
1276 | } | ||
1277 | |||
1278 | devfs_mk_dir("amdtp"); | ||
1279 | |||
1280 | hpsb_register_highlevel(&amdtp_highlevel); | ||
1281 | |||
1282 | HPSB_INFO("Loaded AMDTP driver"); | ||
1283 | |||
1284 | return 0; | ||
1285 | } | ||
1286 | |||
1287 | static void __exit amdtp_exit_module (void) | ||
1288 | { | ||
1289 | hpsb_unregister_highlevel(&amdtp_highlevel); | ||
1290 | devfs_remove("amdtp"); | ||
1291 | cdev_del(&amdtp_cdev); | ||
1292 | |||
1293 | HPSB_INFO("Unloaded AMDTP driver"); | ||
1294 | } | ||
1295 | |||
1296 | module_init(amdtp_init_module); | ||
1297 | module_exit(amdtp_exit_module); | ||
diff --git a/drivers/ieee1394/amdtp.h b/drivers/ieee1394/amdtp.h deleted file mode 100644 index 531f28e3ab50..000000000000 --- a/drivers/ieee1394/amdtp.h +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | /* -*- c-basic-offset: 8 -*- */ | ||
2 | |||
3 | #ifndef __AMDTP_H | ||
4 | #define __AMDTP_H | ||
5 | |||
6 | #include <asm/types.h> | ||
7 | #include "ieee1394-ioctl.h" | ||
8 | |||
9 | /* The userspace interface for the Audio & Music Data Transmission | ||
10 | * Protocol driver is really simple. First, open /dev/amdtp, use the | ||
11 | * ioctl to configure format, rate, dimension and either plug or | ||
12 | * channel, then start writing samples. | ||
13 | * | ||
14 | * The formats supported by the driver are listed below. | ||
15 | * AMDTP_FORMAT_RAW corresponds to the AM824 raw format, which can | ||
16 | * carry any number of channels, so use this if you're streaming | ||
17 | * multichannel audio. The AMDTP_FORMAT_IEC958_PCM corresponds to the | ||
18 | * AM824 IEC958 encapsulation without the IEC958 data bit set, using | ||
19 | * AMDTP_FORMAT_IEC958_AC3 will transmit the samples with the data bit | ||
20 | * set, suitable for transmitting compressed AC-3 audio. | ||
21 | * | ||
22 | * The rate field specifies the transmission rate; supported values | ||
23 | * are 32000, 44100, 48000, 88200, 96000, 176400 and 192000. | ||
24 | * | ||
25 | * The dimension field specifies the dimension of the signal, that is, | ||
26 | * the number of audio channels. Only AMDTP_FORMAT_RAW supports | ||
27 | * settings greater than 2. | ||
28 | * | ||
29 | * The mode field specifies which transmission mode to use. The AMDTP | ||
30 | * specifies two different transmission modes: blocking and | ||
31 | * non-blocking. The blocking transmission mode always send a fixed | ||
32 | * number of samples, typically 8, 16 or 32. To exactly match the | ||
33 | * transmission rate, the driver alternates between sending empty and | ||
34 | * non-empty packets. In non-blocking mode, the driver transmits as | ||
35 | * small packets as possible. For example, for a transmission rate of | ||
36 | * 44100Hz, the driver should send 5 41/80 samples in every cycle, but | ||
37 | * this is not possible so instead the driver alternates between | ||
38 | * sending 5 and 6 samples. | ||
39 | * | ||
40 | * The last thing to specify is either the isochronous channel to use | ||
41 | * or the output plug to connect to. If you know what channel the | ||
42 | * destination device will listen on, you can specify the channel | ||
43 | * directly and use the AMDTP_IOC_CHANNEL ioctl. However, if the | ||
44 | * destination device chooses the channel and uses the IEC61883-1 plug | ||
45 | * mechanism, you can specify an output plug to connect to. The | ||
46 | * driver will pick up the channel number from the plug once the | ||
47 | * destination device locks the output plug control register. In this | ||
48 | * case set the plug field and use the AMDTP_IOC_PLUG ioctl. | ||
49 | * | ||
50 | * Having configured the interface, the driver now accepts writes of | ||
51 | * regular 16 bit signed little endian samples, with the channels | ||
52 | * interleaved. For example, 4 channels would look like: | ||
53 | * | ||
54 | * | sample 0 | sample 1 ... | ||
55 | * | ch. 0 | ch. 1 | ch. 2 | ch. 3 | ch. 0 | ... | ||
56 | * | lsb | msb | lsb | msb | lsb | msb | lsb | msb | lsb | msb | ... | ||
57 | * | ||
58 | */ | ||
59 | |||
60 | enum { | ||
61 | AMDTP_FORMAT_RAW, | ||
62 | AMDTP_FORMAT_IEC958_PCM, | ||
63 | AMDTP_FORMAT_IEC958_AC3 | ||
64 | }; | ||
65 | |||
66 | enum { | ||
67 | AMDTP_MODE_BLOCKING, | ||
68 | AMDTP_MODE_NON_BLOCKING, | ||
69 | }; | ||
70 | |||
71 | enum { | ||
72 | AMDTP_INPUT_LE16, | ||
73 | AMDTP_INPUT_BE16, | ||
74 | }; | ||
75 | |||
76 | struct amdtp_ioctl { | ||
77 | __u32 format; | ||
78 | __u32 rate; | ||
79 | __u32 dimension; | ||
80 | __u32 mode; | ||
81 | union { __u32 channel; __u32 plug; } u; | ||
82 | }; | ||
83 | |||
84 | #endif /* __AMDTP_H */ | ||
diff --git a/drivers/ieee1394/cmp.c b/drivers/ieee1394/cmp.c deleted file mode 100644 index 69aed26e83a1..000000000000 --- a/drivers/ieee1394/cmp.c +++ /dev/null | |||
@@ -1,311 +0,0 @@ | |||
1 | /* -*- c-basic-offset: 8 -*- | ||
2 | * | ||
3 | * cmp.c - Connection Management Procedures | ||
4 | * Copyright (C) 2001 Kristian Høgsberg | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software Foundation, | ||
18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | /* TODO | ||
22 | * ---- | ||
23 | * | ||
24 | * - Implement IEC61883-1 output plugs and connection management. | ||
25 | * This should probably be part of the general subsystem, as it could | ||
26 | * be shared with dv1394. | ||
27 | * | ||
28 | * - Add IEC61883 unit directory when loading this module. This | ||
29 | * requires a run-time changeable config rom. | ||
30 | */ | ||
31 | |||
32 | #include <linux/module.h> | ||
33 | #include <linux/list.h> | ||
34 | #include <linux/sched.h> | ||
35 | #include <linux/types.h> | ||
36 | #include <linux/wait.h> | ||
37 | #include <linux/interrupt.h> | ||
38 | |||
39 | #include "hosts.h" | ||
40 | #include "highlevel.h" | ||
41 | #include "ieee1394.h" | ||
42 | #include "ieee1394_core.h" | ||
43 | #include "cmp.h" | ||
44 | |||
45 | struct plug { | ||
46 | union { | ||
47 | struct cmp_pcr pcr; | ||
48 | quadlet_t quadlet; | ||
49 | } u; | ||
50 | void (*update)(struct cmp_pcr *plug, void *data); | ||
51 | void *data; | ||
52 | }; | ||
53 | |||
54 | struct cmp_host { | ||
55 | struct hpsb_host *host; | ||
56 | |||
57 | union { | ||
58 | struct cmp_mpr ompr; | ||
59 | quadlet_t ompr_quadlet; | ||
60 | } u; | ||
61 | struct plug opcr[2]; | ||
62 | |||
63 | union { | ||
64 | struct cmp_mpr impr; | ||
65 | quadlet_t impr_quadlet; | ||
66 | } v; | ||
67 | struct plug ipcr[2]; | ||
68 | }; | ||
69 | |||
70 | enum { | ||
71 | CMP_P2P_CONNECTION, | ||
72 | CMP_BC_CONNECTION | ||
73 | }; | ||
74 | |||
75 | #define CSR_PCR_MAP 0x900 | ||
76 | #define CSR_PCR_MAP_END 0x9fc | ||
77 | |||
78 | static struct hpsb_highlevel cmp_highlevel; | ||
79 | |||
80 | static void cmp_add_host(struct hpsb_host *host); | ||
81 | static void cmp_host_reset(struct hpsb_host *host); | ||
82 | static int pcr_read(struct hpsb_host *host, int nodeid, quadlet_t *buf, | ||
83 | u64 addr, size_t length, u16 flags); | ||
84 | static int pcr_lock(struct hpsb_host *host, int nodeid, quadlet_t *store, | ||
85 | u64 addr, quadlet_t data, quadlet_t arg, int extcode, u16 flags); | ||
86 | |||
87 | static struct hpsb_highlevel cmp_highlevel = { | ||
88 | .name = "cmp", | ||
89 | .add_host = cmp_add_host, | ||
90 | .host_reset = cmp_host_reset, | ||
91 | }; | ||
92 | |||
93 | static struct hpsb_address_ops pcr_ops = { | ||
94 | .read = pcr_read, | ||
95 | .lock = pcr_lock, | ||
96 | }; | ||
97 | |||
98 | |||
99 | struct cmp_pcr * | ||
100 | cmp_register_opcr(struct hpsb_host *host, int opcr_number, int payload, | ||
101 | void (*update)(struct cmp_pcr *pcr, void *data), | ||
102 | void *data) | ||
103 | { | ||
104 | struct cmp_host *ch; | ||
105 | struct plug *plug; | ||
106 | |||
107 | ch = hpsb_get_hostinfo(&cmp_highlevel, host); | ||
108 | |||
109 | if (opcr_number >= ch->u.ompr.nplugs || | ||
110 | ch->opcr[opcr_number].update != NULL) | ||
111 | return NULL; | ||
112 | |||
113 | plug = &ch->opcr[opcr_number]; | ||
114 | plug->u.pcr.online = 1; | ||
115 | plug->u.pcr.bcast_count = 0; | ||
116 | plug->u.pcr.p2p_count = 0; | ||
117 | plug->u.pcr.overhead = 0; | ||
118 | plug->u.pcr.payload = payload; | ||
119 | plug->update = update; | ||
120 | plug->data = data; | ||
121 | |||
122 | return &plug->u.pcr; | ||
123 | } | ||
124 | |||
125 | void cmp_unregister_opcr(struct hpsb_host *host, struct cmp_pcr *opcr) | ||
126 | { | ||
127 | struct cmp_host *ch; | ||
128 | struct plug *plug; | ||
129 | |||
130 | ch = hpsb_get_hostinfo(&cmp_highlevel, host); | ||
131 | plug = (struct plug *)opcr; | ||
132 | if (plug - ch->opcr >= ch->u.ompr.nplugs) BUG(); | ||
133 | |||
134 | plug->u.pcr.online = 0; | ||
135 | plug->update = NULL; | ||
136 | } | ||
137 | |||
138 | static void reset_plugs(struct cmp_host *ch) | ||
139 | { | ||
140 | int i; | ||
141 | |||
142 | ch->u.ompr.non_persistent_ext = 0xff; | ||
143 | for (i = 0; i < ch->u.ompr.nplugs; i++) { | ||
144 | ch->opcr[i].u.pcr.bcast_count = 0; | ||
145 | ch->opcr[i].u.pcr.p2p_count = 0; | ||
146 | ch->opcr[i].u.pcr.overhead = 0; | ||
147 | } | ||
148 | } | ||
149 | |||
150 | static void cmp_add_host(struct hpsb_host *host) | ||
151 | { | ||
152 | struct cmp_host *ch = hpsb_create_hostinfo(&cmp_highlevel, host, sizeof (*ch)); | ||
153 | |||
154 | if (ch == NULL) { | ||
155 | HPSB_ERR("Failed to allocate cmp_host"); | ||
156 | return; | ||
157 | } | ||
158 | |||
159 | hpsb_register_addrspace(&cmp_highlevel, host, &pcr_ops, | ||
160 | CSR_REGISTER_BASE + CSR_PCR_MAP, | ||
161 | CSR_REGISTER_BASE + CSR_PCR_MAP_END); | ||
162 | |||
163 | ch->host = host; | ||
164 | ch->u.ompr.rate = IEEE1394_SPEED_100; | ||
165 | ch->u.ompr.bcast_channel_base = 63; | ||
166 | ch->u.ompr.nplugs = 2; | ||
167 | |||
168 | reset_plugs(ch); | ||
169 | } | ||
170 | |||
171 | static void cmp_host_reset(struct hpsb_host *host) | ||
172 | { | ||
173 | struct cmp_host *ch; | ||
174 | |||
175 | ch = hpsb_get_hostinfo(&cmp_highlevel, host); | ||
176 | if (ch == NULL) { | ||
177 | HPSB_ERR("cmp: Tried to reset unknown host"); | ||
178 | return; | ||
179 | } | ||
180 | |||
181 | reset_plugs(ch); | ||
182 | } | ||
183 | |||
184 | static int pcr_read(struct hpsb_host *host, int nodeid, quadlet_t *buf, | ||
185 | u64 addr, size_t length, u16 flags) | ||
186 | { | ||
187 | int csraddr = addr - CSR_REGISTER_BASE; | ||
188 | int plug; | ||
189 | struct cmp_host *ch; | ||
190 | |||
191 | if (length != 4) | ||
192 | return RCODE_TYPE_ERROR; | ||
193 | |||
194 | ch = hpsb_get_hostinfo(&cmp_highlevel, host); | ||
195 | if (csraddr == 0x900) { | ||
196 | *buf = cpu_to_be32(ch->u.ompr_quadlet); | ||
197 | return RCODE_COMPLETE; | ||
198 | } | ||
199 | else if (csraddr < 0x904 + ch->u.ompr.nplugs * 4) { | ||
200 | plug = (csraddr - 0x904) / 4; | ||
201 | *buf = cpu_to_be32(ch->opcr[plug].u.quadlet); | ||
202 | return RCODE_COMPLETE; | ||
203 | } | ||
204 | else if (csraddr < 0x980) { | ||
205 | return RCODE_ADDRESS_ERROR; | ||
206 | } | ||
207 | else if (csraddr == 0x980) { | ||
208 | *buf = cpu_to_be32(ch->v.impr_quadlet); | ||
209 | return RCODE_COMPLETE; | ||
210 | } | ||
211 | else if (csraddr < 0x984 + ch->v.impr.nplugs * 4) { | ||
212 | plug = (csraddr - 0x984) / 4; | ||
213 | *buf = cpu_to_be32(ch->ipcr[plug].u.quadlet); | ||
214 | return RCODE_COMPLETE; | ||
215 | } | ||
216 | else | ||
217 | return RCODE_ADDRESS_ERROR; | ||
218 | } | ||
219 | |||
220 | static int pcr_lock(struct hpsb_host *host, int nodeid, quadlet_t *store, | ||
221 | u64 addr, quadlet_t data, quadlet_t arg, int extcode, u16 flags) | ||
222 | { | ||
223 | int csraddr = addr - CSR_REGISTER_BASE; | ||
224 | int plug; | ||
225 | struct cmp_host *ch; | ||
226 | |||
227 | ch = hpsb_get_hostinfo(&cmp_highlevel, host); | ||
228 | |||
229 | if (extcode != EXTCODE_COMPARE_SWAP) | ||
230 | return RCODE_TYPE_ERROR; | ||
231 | |||
232 | if (csraddr == 0x900) { | ||
233 | /* FIXME: Ignore writes to bits 30-31 and 0-7 */ | ||
234 | *store = cpu_to_be32(ch->u.ompr_quadlet); | ||
235 | if (arg == cpu_to_be32(ch->u.ompr_quadlet)) | ||
236 | ch->u.ompr_quadlet = be32_to_cpu(data); | ||
237 | |||
238 | return RCODE_COMPLETE; | ||
239 | } | ||
240 | if (csraddr < 0x904 + ch->u.ompr.nplugs * 4) { | ||
241 | plug = (csraddr - 0x904) / 4; | ||
242 | *store = cpu_to_be32(ch->opcr[plug].u.quadlet); | ||
243 | |||
244 | if (arg == *store) | ||
245 | ch->opcr[plug].u.quadlet = be32_to_cpu(data); | ||
246 | |||
247 | if (be32_to_cpu(*store) != ch->opcr[plug].u.quadlet && | ||
248 | ch->opcr[plug].update != NULL) | ||
249 | ch->opcr[plug].update(&ch->opcr[plug].u.pcr, | ||
250 | ch->opcr[plug].data); | ||
251 | |||
252 | return RCODE_COMPLETE; | ||
253 | } | ||
254 | else if (csraddr < 0x980) { | ||
255 | return RCODE_ADDRESS_ERROR; | ||
256 | } | ||
257 | else if (csraddr == 0x980) { | ||
258 | /* FIXME: Ignore writes to bits 24-31 and 0-7 */ | ||
259 | *store = cpu_to_be32(ch->u.ompr_quadlet); | ||
260 | if (arg == cpu_to_be32(ch->u.ompr_quadlet)) | ||
261 | ch->u.ompr_quadlet = be32_to_cpu(data); | ||
262 | |||
263 | return RCODE_COMPLETE; | ||
264 | } | ||
265 | else if (csraddr < 0x984 + ch->v.impr.nplugs * 4) { | ||
266 | plug = (csraddr - 0x984) / 4; | ||
267 | *store = cpu_to_be32(ch->ipcr[plug].u.quadlet); | ||
268 | |||
269 | if (arg == *store) | ||
270 | ch->ipcr[plug].u.quadlet = be32_to_cpu(data); | ||
271 | |||
272 | if (be32_to_cpu(*store) != ch->ipcr[plug].u.quadlet && | ||
273 | ch->ipcr[plug].update != NULL) | ||
274 | ch->ipcr[plug].update(&ch->ipcr[plug].u.pcr, | ||
275 | ch->ipcr[plug].data); | ||
276 | |||
277 | return RCODE_COMPLETE; | ||
278 | } | ||
279 | else | ||
280 | return RCODE_ADDRESS_ERROR; | ||
281 | } | ||
282 | |||
283 | |||
284 | /* Module interface */ | ||
285 | |||
286 | MODULE_AUTHOR("Kristian Hogsberg <hogsberg@users.sf.net>"); | ||
287 | MODULE_DESCRIPTION("Connection Management Procedures (CMP)"); | ||
288 | MODULE_SUPPORTED_DEVICE("cmp"); | ||
289 | MODULE_LICENSE("GPL"); | ||
290 | |||
291 | EXPORT_SYMBOL(cmp_register_opcr); | ||
292 | EXPORT_SYMBOL(cmp_unregister_opcr); | ||
293 | |||
294 | static int __init cmp_init_module (void) | ||
295 | { | ||
296 | hpsb_register_highlevel (&cmp_highlevel); | ||
297 | |||
298 | HPSB_INFO("Loaded CMP driver"); | ||
299 | |||
300 | return 0; | ||
301 | } | ||
302 | |||
303 | static void __exit cmp_exit_module (void) | ||
304 | { | ||
305 | hpsb_unregister_highlevel(&cmp_highlevel); | ||
306 | |||
307 | HPSB_INFO("Unloaded CMP driver"); | ||
308 | } | ||
309 | |||
310 | module_init(cmp_init_module); | ||
311 | module_exit(cmp_exit_module); | ||
diff --git a/drivers/ieee1394/cmp.h b/drivers/ieee1394/cmp.h deleted file mode 100644 index f9288bfcd494..000000000000 --- a/drivers/ieee1394/cmp.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef __CMP_H | ||
2 | #define __CMP_H | ||
3 | |||
4 | struct cmp_mpr { | ||
5 | u32 nplugs:5; | ||
6 | u32 reserved:3; | ||
7 | u32 persistent_ext:8; | ||
8 | u32 non_persistent_ext:8; | ||
9 | u32 bcast_channel_base:6; | ||
10 | u32 rate:2; | ||
11 | } __attribute__((packed)); | ||
12 | |||
13 | struct cmp_pcr { | ||
14 | u32 payload:10; | ||
15 | u32 overhead:4; | ||
16 | u32 speed:2; | ||
17 | u32 channel:6; | ||
18 | u32 reserved:2; | ||
19 | u32 p2p_count:6; | ||
20 | u32 bcast_count:1; | ||
21 | u32 online:1; | ||
22 | } __attribute__((packed)); | ||
23 | |||
24 | struct cmp_pcr *cmp_register_opcr(struct hpsb_host *host, int plug, | ||
25 | int payload, | ||
26 | void (*update)(struct cmp_pcr *plug, | ||
27 | void *data), | ||
28 | void *data); | ||
29 | void cmp_unregister_opcr(struct hpsb_host *host, struct cmp_pcr *plug); | ||
30 | |||
31 | #endif /* __CMP_H */ | ||
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 2c674023a6ac..b1b14f8d4dd6 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig | |||
@@ -98,7 +98,7 @@ config TOUCHSCREEN_MK712 | |||
98 | 98 | ||
99 | config TOUCHSCREEN_HP600 | 99 | config TOUCHSCREEN_HP600 |
100 | tristate "HP Jornada 680/690 touchscreen" | 100 | tristate "HP Jornada 680/690 touchscreen" |
101 | depends on SH_HP600 && SH_ADC | 101 | depends on SH_HP6XX && SH_ADC |
102 | help | 102 | help |
103 | Say Y here if you have a HP Jornada 680 or 690 and want to | 103 | Say Y here if you have a HP Jornada 680 or 690 and want to |
104 | support the built-in touchscreen. | 104 | support the built-in touchscreen. |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 1778104e106c..7145cd150f7b 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -3395,6 +3395,7 @@ static int set_array_info(mddev_t * mddev, mdu_array_info_t *info) | |||
3395 | mddev->ctime = get_seconds(); | 3395 | mddev->ctime = get_seconds(); |
3396 | 3396 | ||
3397 | mddev->level = info->level; | 3397 | mddev->level = info->level; |
3398 | mddev->clevel[0] = 0; | ||
3398 | mddev->size = info->size; | 3399 | mddev->size = info->size; |
3399 | mddev->raid_disks = info->raid_disks; | 3400 | mddev->raid_disks = info->raid_disks; |
3400 | /* don't set md_minor, it is determined by which /dev/md* was | 3401 | /* don't set md_minor, it is determined by which /dev/md* was |
diff --git a/drivers/media/dvb/bt8xx/bt878.c b/drivers/media/dvb/bt8xx/bt878.c index f29571450038..a04bb61f21f4 100644 --- a/drivers/media/dvb/bt8xx/bt878.c +++ b/drivers/media/dvb/bt8xx/bt878.c | |||
@@ -542,7 +542,7 @@ static struct pci_driver bt878_pci_driver = { | |||
542 | .remove = bt878_remove, | 542 | .remove = bt878_remove, |
543 | }; | 543 | }; |
544 | 544 | ||
545 | static int bt878_pci_driver_registered = 0; | 545 | static int bt878_pci_driver_registered; |
546 | 546 | ||
547 | /*******************************/ | 547 | /*******************************/ |
548 | /* Module management functions */ | 548 | /* Module management functions */ |
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c index 44fcbe77c8f9..ea27b15007e9 100644 --- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c +++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c | |||
@@ -893,7 +893,7 @@ static int dvb_bt8xx_probe(struct bttv_sub_device *sub) | |||
893 | return 0; | 893 | return 0; |
894 | } | 894 | } |
895 | 895 | ||
896 | static int dvb_bt8xx_remove(struct bttv_sub_device *sub) | 896 | static void dvb_bt8xx_remove(struct bttv_sub_device *sub) |
897 | { | 897 | { |
898 | struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev); | 898 | struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev); |
899 | 899 | ||
@@ -911,8 +911,6 @@ static int dvb_bt8xx_remove(struct bttv_sub_device *sub) | |||
911 | dvb_unregister_adapter(&card->dvb_adapter); | 911 | dvb_unregister_adapter(&card->dvb_adapter); |
912 | 912 | ||
913 | kfree(card); | 913 | kfree(card); |
914 | |||
915 | return 0; | ||
916 | } | 914 | } |
917 | 915 | ||
918 | static struct bttv_sub_driver driver = { | 916 | static struct bttv_sub_driver driver = { |
diff --git a/drivers/media/dvb/dvb-core/dvbdev.c b/drivers/media/dvb/dvb-core/dvbdev.c index 06b696e9acbd..54f8b95717b0 100644 --- a/drivers/media/dvb/dvb-core/dvbdev.c +++ b/drivers/media/dvb/dvb-core/dvbdev.c | |||
@@ -33,7 +33,7 @@ | |||
33 | #include <linux/device.h> | 33 | #include <linux/device.h> |
34 | #include <linux/fs.h> | 34 | #include <linux/fs.h> |
35 | #include <linux/cdev.h> | 35 | #include <linux/cdev.h> |
36 | 36 | #include <linux/mutex.h> | |
37 | #include "dvbdev.h" | 37 | #include "dvbdev.h" |
38 | 38 | ||
39 | static int dvbdev_debug; | 39 | static int dvbdev_debug; |
@@ -44,7 +44,7 @@ MODULE_PARM_DESC(dvbdev_debug, "Turn on/off device debugging (default:off)."); | |||
44 | #define dprintk if (dvbdev_debug) printk | 44 | #define dprintk if (dvbdev_debug) printk |
45 | 45 | ||
46 | static LIST_HEAD(dvb_adapter_list); | 46 | static LIST_HEAD(dvb_adapter_list); |
47 | static DECLARE_MUTEX(dvbdev_register_lock); | 47 | static DEFINE_MUTEX(dvbdev_register_lock); |
48 | 48 | ||
49 | static const char * const dnames[] = { | 49 | static const char * const dnames[] = { |
50 | "video", "audio", "sec", "frontend", "demux", "dvr", "ca", | 50 | "video", "audio", "sec", "frontend", "demux", "dvr", "ca", |
@@ -202,11 +202,11 @@ int dvb_register_device(struct dvb_adapter *adap, struct dvb_device **pdvbdev, | |||
202 | struct dvb_device *dvbdev; | 202 | struct dvb_device *dvbdev; |
203 | int id; | 203 | int id; |
204 | 204 | ||
205 | if (down_interruptible (&dvbdev_register_lock)) | 205 | if (mutex_lock_interruptible(&dvbdev_register_lock)) |
206 | return -ERESTARTSYS; | 206 | return -ERESTARTSYS; |
207 | 207 | ||
208 | if ((id = dvbdev_get_free_id (adap, type)) < 0) { | 208 | if ((id = dvbdev_get_free_id (adap, type)) < 0) { |
209 | up (&dvbdev_register_lock); | 209 | mutex_unlock(&dvbdev_register_lock); |
210 | *pdvbdev = NULL; | 210 | *pdvbdev = NULL; |
211 | printk ("%s: could get find free device id...\n", __FUNCTION__); | 211 | printk ("%s: could get find free device id...\n", __FUNCTION__); |
212 | return -ENFILE; | 212 | return -ENFILE; |
@@ -215,11 +215,11 @@ int dvb_register_device(struct dvb_adapter *adap, struct dvb_device **pdvbdev, | |||
215 | *pdvbdev = dvbdev = kmalloc(sizeof(struct dvb_device), GFP_KERNEL); | 215 | *pdvbdev = dvbdev = kmalloc(sizeof(struct dvb_device), GFP_KERNEL); |
216 | 216 | ||
217 | if (!dvbdev) { | 217 | if (!dvbdev) { |
218 | up(&dvbdev_register_lock); | 218 | mutex_unlock(&dvbdev_register_lock); |
219 | return -ENOMEM; | 219 | return -ENOMEM; |
220 | } | 220 | } |
221 | 221 | ||
222 | up (&dvbdev_register_lock); | 222 | mutex_unlock(&dvbdev_register_lock); |
223 | 223 | ||
224 | memcpy(dvbdev, template, sizeof(struct dvb_device)); | 224 | memcpy(dvbdev, template, sizeof(struct dvb_device)); |
225 | dvbdev->type = type; | 225 | dvbdev->type = type; |
@@ -289,11 +289,11 @@ int dvb_register_adapter(struct dvb_adapter *adap, const char *name, struct modu | |||
289 | { | 289 | { |
290 | int num; | 290 | int num; |
291 | 291 | ||
292 | if (down_interruptible (&dvbdev_register_lock)) | 292 | if (mutex_lock_interruptible(&dvbdev_register_lock)) |
293 | return -ERESTARTSYS; | 293 | return -ERESTARTSYS; |
294 | 294 | ||
295 | if ((num = dvbdev_get_free_adapter_num ()) < 0) { | 295 | if ((num = dvbdev_get_free_adapter_num ()) < 0) { |
296 | up (&dvbdev_register_lock); | 296 | mutex_unlock(&dvbdev_register_lock); |
297 | return -ENFILE; | 297 | return -ENFILE; |
298 | } | 298 | } |
299 | 299 | ||
@@ -309,7 +309,7 @@ int dvb_register_adapter(struct dvb_adapter *adap, const char *name, struct modu | |||
309 | 309 | ||
310 | list_add_tail (&adap->list_head, &dvb_adapter_list); | 310 | list_add_tail (&adap->list_head, &dvb_adapter_list); |
311 | 311 | ||
312 | up (&dvbdev_register_lock); | 312 | mutex_unlock(&dvbdev_register_lock); |
313 | 313 | ||
314 | return num; | 314 | return num; |
315 | } | 315 | } |
@@ -320,10 +320,10 @@ int dvb_unregister_adapter(struct dvb_adapter *adap) | |||
320 | { | 320 | { |
321 | devfs_remove("dvb/adapter%d", adap->num); | 321 | devfs_remove("dvb/adapter%d", adap->num); |
322 | 322 | ||
323 | if (down_interruptible (&dvbdev_register_lock)) | 323 | if (mutex_lock_interruptible(&dvbdev_register_lock)) |
324 | return -ERESTARTSYS; | 324 | return -ERESTARTSYS; |
325 | list_del (&adap->list_head); | 325 | list_del (&adap->list_head); |
326 | up (&dvbdev_register_lock); | 326 | mutex_unlock(&dvbdev_register_lock); |
327 | return 0; | 327 | return 0; |
328 | } | 328 | } |
329 | EXPORT_SYMBOL(dvb_unregister_adapter); | 329 | EXPORT_SYMBOL(dvb_unregister_adapter); |
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c index 18d169836c9c..a7fb06f4cd34 100644 --- a/drivers/media/dvb/dvb-usb/cxusb.c +++ b/drivers/media/dvb/dvb-usb/cxusb.c | |||
@@ -691,6 +691,8 @@ module_init (cxusb_module_init); | |||
691 | module_exit (cxusb_module_exit); | 691 | module_exit (cxusb_module_exit); |
692 | 692 | ||
693 | MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); | 693 | MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); |
694 | MODULE_AUTHOR("Michael Krufky <mkrufky@m1k.net>"); | ||
695 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | ||
694 | MODULE_DESCRIPTION("Driver for Conexant USB2.0 hybrid reference design"); | 696 | MODULE_DESCRIPTION("Driver for Conexant USB2.0 hybrid reference design"); |
695 | MODULE_VERSION("1.0-alpha"); | 697 | MODULE_VERSION("1.0-alpha"); |
696 | MODULE_LICENSE("GPL"); | 698 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c index 757075f007c1..1b9934ea5b06 100644 --- a/drivers/media/dvb/frontends/dvb-pll.c +++ b/drivers/media/dvb/frontends/dvb-pll.c | |||
@@ -333,7 +333,7 @@ struct dvb_pll_desc dvb_pll_tbmv30111in = { | |||
333 | .name = "Samsung TBMV30111IN", | 333 | .name = "Samsung TBMV30111IN", |
334 | .min = 54000000, | 334 | .min = 54000000, |
335 | .max = 860000000, | 335 | .max = 860000000, |
336 | .count = 4, | 336 | .count = 6, |
337 | .entries = { | 337 | .entries = { |
338 | { 172000000, 44000000, 166666, 0xb4, 0x01 }, | 338 | { 172000000, 44000000, 166666, 0xb4, 0x01 }, |
339 | { 214000000, 44000000, 166666, 0xb4, 0x02 }, | 339 | { 214000000, 44000000, 166666, 0xb4, 0x02 }, |
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c index 327a8089193b..27494901975f 100644 --- a/drivers/media/dvb/ttpci/av7110.c +++ b/drivers/media/dvb/ttpci/av7110.c | |||
@@ -81,7 +81,7 @@ static int adac = DVB_ADAC_TI; | |||
81 | static int hw_sections; | 81 | static int hw_sections; |
82 | static int rgb_on; | 82 | static int rgb_on; |
83 | static int volume = 255; | 83 | static int volume = 255; |
84 | static int budgetpatch = 0; | 84 | static int budgetpatch; |
85 | 85 | ||
86 | module_param_named(debug, av7110_debug, int, 0644); | 86 | module_param_named(debug, av7110_debug, int, 0644); |
87 | MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)"); | 87 | MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)"); |
@@ -103,7 +103,7 @@ MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 | |||
103 | 103 | ||
104 | static void restart_feeds(struct av7110 *av7110); | 104 | static void restart_feeds(struct av7110 *av7110); |
105 | 105 | ||
106 | static int av7110_num = 0; | 106 | static int av7110_num; |
107 | 107 | ||
108 | #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \ | 108 | #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \ |
109 | {\ | 109 | {\ |
diff --git a/drivers/media/dvb/ttpci/av7110_hw.c b/drivers/media/dvb/ttpci/av7110_hw.c index cb377452b57d..b2e63e9fc053 100644 --- a/drivers/media/dvb/ttpci/av7110_hw.c +++ b/drivers/media/dvb/ttpci/av7110_hw.c | |||
@@ -146,52 +146,52 @@ static int load_dram(struct av7110 *av7110, u32 *data, int len) | |||
146 | { | 146 | { |
147 | int i; | 147 | int i; |
148 | int blocks, rest; | 148 | int blocks, rest; |
149 | u32 base, bootblock = BOOT_BLOCK; | 149 | u32 base, bootblock = AV7110_BOOT_BLOCK; |
150 | 150 | ||
151 | dprintk(4, "%p\n", av7110); | 151 | dprintk(4, "%p\n", av7110); |
152 | 152 | ||
153 | blocks = len / BOOT_MAX_SIZE; | 153 | blocks = len / AV7110_BOOT_MAX_SIZE; |
154 | rest = len % BOOT_MAX_SIZE; | 154 | rest = len % AV7110_BOOT_MAX_SIZE; |
155 | base = DRAM_START_CODE; | 155 | base = DRAM_START_CODE; |
156 | 156 | ||
157 | for (i = 0; i < blocks; i++) { | 157 | for (i = 0; i < blocks; i++) { |
158 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 158 | if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
159 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at block %d\n", i); | 159 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at block %d\n", i); |
160 | return -ETIMEDOUT; | 160 | return -ETIMEDOUT; |
161 | } | 161 | } |
162 | dprintk(4, "writing DRAM block %d\n", i); | 162 | dprintk(4, "writing DRAM block %d\n", i); |
163 | mwdebi(av7110, DEBISWAB, bootblock, | 163 | mwdebi(av7110, DEBISWAB, bootblock, |
164 | ((char*)data) + i * BOOT_MAX_SIZE, BOOT_MAX_SIZE); | 164 | ((char*)data) + i * AV7110_BOOT_MAX_SIZE, AV7110_BOOT_MAX_SIZE); |
165 | bootblock ^= 0x1400; | 165 | bootblock ^= 0x1400; |
166 | iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4); | 166 | iwdebi(av7110, DEBISWAB, AV7110_BOOT_BASE, swab32(base), 4); |
167 | iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, BOOT_MAX_SIZE, 2); | 167 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, AV7110_BOOT_MAX_SIZE, 2); |
168 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); | 168 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); |
169 | base += BOOT_MAX_SIZE; | 169 | base += AV7110_BOOT_MAX_SIZE; |
170 | } | 170 | } |
171 | 171 | ||
172 | if (rest > 0) { | 172 | if (rest > 0) { |
173 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 173 | if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
174 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at last block\n"); | 174 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at last block\n"); |
175 | return -ETIMEDOUT; | 175 | return -ETIMEDOUT; |
176 | } | 176 | } |
177 | if (rest > 4) | 177 | if (rest > 4) |
178 | mwdebi(av7110, DEBISWAB, bootblock, | 178 | mwdebi(av7110, DEBISWAB, bootblock, |
179 | ((char*)data) + i * BOOT_MAX_SIZE, rest); | 179 | ((char*)data) + i * AV7110_BOOT_MAX_SIZE, rest); |
180 | else | 180 | else |
181 | mwdebi(av7110, DEBISWAB, bootblock, | 181 | mwdebi(av7110, DEBISWAB, bootblock, |
182 | ((char*)data) + i * BOOT_MAX_SIZE - 4, rest + 4); | 182 | ((char*)data) + i * AV7110_BOOT_MAX_SIZE - 4, rest + 4); |
183 | 183 | ||
184 | iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4); | 184 | iwdebi(av7110, DEBISWAB, AV7110_BOOT_BASE, swab32(base), 4); |
185 | iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, rest, 2); | 185 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, rest, 2); |
186 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); | 186 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); |
187 | } | 187 | } |
188 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 188 | if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
189 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout after last block\n"); | 189 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout after last block\n"); |
190 | return -ETIMEDOUT; | 190 | return -ETIMEDOUT; |
191 | } | 191 | } |
192 | iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, 0, 2); | 192 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, 0, 2); |
193 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); | 193 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); |
194 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BOOT_COMPLETE) < 0) { | 194 | if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_AV7110_BOOT_COMPLETE) < 0) { |
195 | printk(KERN_ERR "dvb-ttpci: load_dram(): final handshake timeout\n"); | 195 | printk(KERN_ERR "dvb-ttpci: load_dram(): final handshake timeout\n"); |
196 | return -ETIMEDOUT; | 196 | return -ETIMEDOUT; |
197 | } | 197 | } |
@@ -262,7 +262,7 @@ int av7110_bootarm(struct av7110 *av7110) | |||
262 | //saa7146_setgpio(dev, 3, SAA7146_GPIO_INPUT); | 262 | //saa7146_setgpio(dev, 3, SAA7146_GPIO_INPUT); |
263 | 263 | ||
264 | mwdebi(av7110, DEBISWAB, DPRAM_BASE, bootcode, sizeof(bootcode)); | 264 | mwdebi(av7110, DEBISWAB, DPRAM_BASE, bootcode, sizeof(bootcode)); |
265 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); | 265 | iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); |
266 | 266 | ||
267 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { | 267 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { |
268 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " | 268 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " |
diff --git a/drivers/media/dvb/ttpci/av7110_hw.h b/drivers/media/dvb/ttpci/av7110_hw.h index 84b83299b8be..4e173c67fbb2 100644 --- a/drivers/media/dvb/ttpci/av7110_hw.h +++ b/drivers/media/dvb/ttpci/av7110_hw.h | |||
@@ -18,7 +18,7 @@ enum av7110_bootstate | |||
18 | { | 18 | { |
19 | BOOTSTATE_BUFFER_EMPTY = 0, | 19 | BOOTSTATE_BUFFER_EMPTY = 0, |
20 | BOOTSTATE_BUFFER_FULL = 1, | 20 | BOOTSTATE_BUFFER_FULL = 1, |
21 | BOOTSTATE_BOOT_COMPLETE = 2 | 21 | BOOTSTATE_AV7110_BOOT_COMPLETE = 2 |
22 | }; | 22 | }; |
23 | 23 | ||
24 | enum av7110_type_rec_play_format | 24 | enum av7110_type_rec_play_format |
@@ -295,11 +295,11 @@ enum av7110_command_type { | |||
295 | #define DPRAM_BASE 0x4000 | 295 | #define DPRAM_BASE 0x4000 |
296 | 296 | ||
297 | /* boot protocol area */ | 297 | /* boot protocol area */ |
298 | #define BOOT_STATE (DPRAM_BASE + 0x3F8) | 298 | #define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8) |
299 | #define BOOT_SIZE (DPRAM_BASE + 0x3FA) | 299 | #define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA) |
300 | #define BOOT_BASE (DPRAM_BASE + 0x3FC) | 300 | #define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC) |
301 | #define BOOT_BLOCK (DPRAM_BASE + 0x400) | 301 | #define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400) |
302 | #define BOOT_MAX_SIZE 0xc00 | 302 | #define AV7110_BOOT_MAX_SIZE 0xc00 |
303 | 303 | ||
304 | /* firmware command protocol area */ | 304 | /* firmware command protocol area */ |
305 | #define IRQ_STATE (DPRAM_BASE + 0x0F4) | 305 | #define IRQ_STATE (DPRAM_BASE + 0x0F4) |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index dd24896906fe..faf728366c4e 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
@@ -8,7 +8,8 @@ bttv-objs := bttv-driver.o bttv-cards.o bttv-if.o \ | |||
8 | zoran-objs := zr36120.o zr36120_i2c.o zr36120_mem.o | 8 | zoran-objs := zr36120.o zr36120_i2c.o zr36120_mem.o |
9 | zr36067-objs := zoran_procfs.o zoran_device.o \ | 9 | zr36067-objs := zoran_procfs.o zoran_device.o \ |
10 | zoran_driver.o zoran_card.o | 10 | zoran_driver.o zoran_card.o |
11 | tuner-objs := tuner-core.o tuner-simple.o mt20xx.o tda8290.o tea5767.o | 11 | tuner-objs := tuner-core.o tuner-types.o tuner-simple.o \ |
12 | mt20xx.o tda8290.o tea5767.o | ||
12 | 13 | ||
13 | msp3400-objs := msp3400-driver.o msp3400-kthreads.o | 14 | msp3400-objs := msp3400-driver.o msp3400-kthreads.o |
14 | 15 | ||
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c index 7d5a068353f2..994b75fe165a 100644 --- a/drivers/media/video/arv.c +++ b/drivers/media/video/arv.c | |||
@@ -129,9 +129,9 @@ static unsigned char yuv[MAX_AR_FRAME_BYTES]; | |||
129 | static int freq = DEFAULT_FREQ; /* BCLK: available 50 or 70 (MHz) */ | 129 | static int freq = DEFAULT_FREQ; /* BCLK: available 50 or 70 (MHz) */ |
130 | static int vga = 0; /* default mode(0:QVGA mode, other:VGA mode) */ | 130 | static int vga = 0; /* default mode(0:QVGA mode, other:VGA mode) */ |
131 | static int vga_interlace = 0; /* 0 is normal mode for, else interlace mode */ | 131 | static int vga_interlace = 0; /* 0 is normal mode for, else interlace mode */ |
132 | MODULE_PARM(freq, "i"); | 132 | module_param(freq, int, 0); |
133 | MODULE_PARM(vga, "i"); | 133 | module_param(vga, int, 0); |
134 | MODULE_PARM(vga_interlace, "i"); | 134 | module_param(vga_interlace, int, 0); |
135 | 135 | ||
136 | static int ar_initialize(struct video_device *dev); | 136 | static int ar_initialize(struct video_device *dev); |
137 | 137 | ||
diff --git a/drivers/media/video/bt832.c b/drivers/media/video/bt832.c index 07c78f1f7a44..cc54b62f4601 100644 --- a/drivers/media/video/bt832.c +++ b/drivers/media/video/bt832.c | |||
@@ -43,7 +43,7 @@ static unsigned short normal_i2c[] = { I2C_BT832_ALT1>>1, I2C_BT832_ALT2>>1, | |||
43 | I2C_CLIENT_END }; | 43 | I2C_CLIENT_END }; |
44 | I2C_CLIENT_INSMOD; | 44 | I2C_CLIENT_INSMOD; |
45 | 45 | ||
46 | int debug = 0; /* debug output */ | 46 | int debug; /* debug output */ |
47 | module_param(debug, int, 0644); | 47 | module_param(debug, int, 0644); |
48 | 48 | ||
49 | /* ---------------------------------------------------------------------- */ | 49 | /* ---------------------------------------------------------------------- */ |
diff --git a/drivers/media/video/btcx-risc.c b/drivers/media/video/btcx-risc.c index a48de3c0e3f0..b4aca7249276 100644 --- a/drivers/media/video/btcx-risc.c +++ b/drivers/media/video/btcx-risc.c | |||
@@ -37,7 +37,7 @@ MODULE_DESCRIPTION("some code shared by bttv and cx88xx drivers"); | |||
37 | MODULE_AUTHOR("Gerd Knorr"); | 37 | MODULE_AUTHOR("Gerd Knorr"); |
38 | MODULE_LICENSE("GPL"); | 38 | MODULE_LICENSE("GPL"); |
39 | 39 | ||
40 | static unsigned int debug = 0; | 40 | static unsigned int debug; |
41 | module_param(debug, int, 0644); | 41 | module_param(debug, int, 0644); |
42 | MODULE_PARM_DESC(debug,"debug messages, default is 0 (no)"); | 42 | MODULE_PARM_DESC(debug,"debug messages, default is 0 (no)"); |
43 | 43 | ||
diff --git a/drivers/media/video/bttv-cards.c b/drivers/media/video/bttv-cards.c index 65323e78d5fd..9749d6ed6231 100644 --- a/drivers/media/video/bttv-cards.c +++ b/drivers/media/video/bttv-cards.c | |||
@@ -92,8 +92,8 @@ static void identify_by_eeprom(struct bttv *btv, | |||
92 | static int __devinit pvr_boot(struct bttv *btv); | 92 | static int __devinit pvr_boot(struct bttv *btv); |
93 | 93 | ||
94 | /* config variables */ | 94 | /* config variables */ |
95 | static unsigned int triton1=0; | 95 | static unsigned int triton1; |
96 | static unsigned int vsfx=0; | 96 | static unsigned int vsfx; |
97 | static unsigned int latency = UNSET; | 97 | static unsigned int latency = UNSET; |
98 | int no_overlay=-1; | 98 | int no_overlay=-1; |
99 | 99 | ||
@@ -106,7 +106,7 @@ static struct bttv *master[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = NULL }; | |||
106 | #ifdef MODULE | 106 | #ifdef MODULE |
107 | static unsigned int autoload = 1; | 107 | static unsigned int autoload = 1; |
108 | #else | 108 | #else |
109 | static unsigned int autoload = 0; | 109 | static unsigned int autoload; |
110 | #endif | 110 | #endif |
111 | static unsigned int gpiomask = UNSET; | 111 | static unsigned int gpiomask = UNSET; |
112 | static unsigned int audioall = UNSET; | 112 | static unsigned int audioall = UNSET; |
diff --git a/drivers/media/video/bttv-driver.c b/drivers/media/video/bttv-driver.c index 0e6970346788..aa4c4c521880 100644 --- a/drivers/media/video/bttv-driver.c +++ b/drivers/media/video/bttv-driver.c | |||
@@ -48,47 +48,46 @@ | |||
48 | unsigned int bttv_num; /* number of Bt848s in use */ | 48 | unsigned int bttv_num; /* number of Bt848s in use */ |
49 | struct bttv bttvs[BTTV_MAX]; | 49 | struct bttv bttvs[BTTV_MAX]; |
50 | 50 | ||
51 | unsigned int bttv_debug = 0; | 51 | unsigned int bttv_debug; |
52 | unsigned int bttv_verbose = 1; | 52 | unsigned int bttv_verbose = 1; |
53 | unsigned int bttv_gpio = 0; | 53 | unsigned int bttv_gpio; |
54 | 54 | ||
55 | /* config variables */ | 55 | /* config variables */ |
56 | #ifdef __BIG_ENDIAN | 56 | #ifdef __BIG_ENDIAN |
57 | static unsigned int bigendian=1; | 57 | static unsigned int bigendian=1; |
58 | #else | 58 | #else |
59 | static unsigned int bigendian=0; | 59 | static unsigned int bigendian; |
60 | #endif | 60 | #endif |
61 | static unsigned int radio[BTTV_MAX]; | 61 | static unsigned int radio[BTTV_MAX]; |
62 | static unsigned int irq_debug = 0; | 62 | static unsigned int irq_debug; |
63 | static unsigned int gbuffers = 8; | 63 | static unsigned int gbuffers = 8; |
64 | static unsigned int gbufsize = 0x208000; | 64 | static unsigned int gbufsize = 0x208000; |
65 | 65 | ||
66 | static int video_nr = -1; | 66 | static int video_nr = -1; |
67 | static int radio_nr = -1; | 67 | static int radio_nr = -1; |
68 | static int vbi_nr = -1; | 68 | static int vbi_nr = -1; |
69 | static int debug_latency = 0; | 69 | static int debug_latency; |
70 | 70 | ||
71 | static unsigned int fdsr = 0; | 71 | static unsigned int fdsr; |
72 | 72 | ||
73 | /* options */ | 73 | /* options */ |
74 | static unsigned int combfilter = 0; | 74 | static unsigned int combfilter; |
75 | static unsigned int lumafilter = 0; | 75 | static unsigned int lumafilter; |
76 | static unsigned int automute = 1; | 76 | static unsigned int automute = 1; |
77 | static unsigned int chroma_agc = 0; | 77 | static unsigned int chroma_agc; |
78 | static unsigned int adc_crush = 1; | 78 | static unsigned int adc_crush = 1; |
79 | static unsigned int whitecrush_upper = 0xCF; | 79 | static unsigned int whitecrush_upper = 0xCF; |
80 | static unsigned int whitecrush_lower = 0x7F; | 80 | static unsigned int whitecrush_lower = 0x7F; |
81 | static unsigned int vcr_hack = 0; | 81 | static unsigned int vcr_hack; |
82 | static unsigned int irq_iswitch = 0; | 82 | static unsigned int irq_iswitch; |
83 | static unsigned int uv_ratio = 50; | 83 | static unsigned int uv_ratio = 50; |
84 | static unsigned int full_luma_range = 0; | 84 | static unsigned int full_luma_range; |
85 | static unsigned int coring = 0; | 85 | static unsigned int coring; |
86 | extern int no_overlay; | 86 | extern int no_overlay; |
87 | 87 | ||
88 | /* API features (turn on/off stuff for testing) */ | 88 | /* API features (turn on/off stuff for testing) */ |
89 | static unsigned int v4l2 = 1; | 89 | static unsigned int v4l2 = 1; |
90 | 90 | ||
91 | |||
92 | /* insmod args */ | 91 | /* insmod args */ |
93 | module_param(bttv_verbose, int, 0644); | 92 | module_param(bttv_verbose, int, 0644); |
94 | module_param(bttv_gpio, int, 0644); | 93 | module_param(bttv_gpio, int, 0644); |
@@ -685,16 +684,16 @@ int check_alloc_btres(struct bttv *btv, struct bttv_fh *fh, int bit) | |||
685 | return 1; | 684 | return 1; |
686 | 685 | ||
687 | /* is it free? */ | 686 | /* is it free? */ |
688 | down(&btv->reslock); | 687 | mutex_lock(&btv->reslock); |
689 | if (btv->resources & bit) { | 688 | if (btv->resources & bit) { |
690 | /* no, someone else uses it */ | 689 | /* no, someone else uses it */ |
691 | up(&btv->reslock); | 690 | mutex_unlock(&btv->reslock); |
692 | return 0; | 691 | return 0; |
693 | } | 692 | } |
694 | /* it's free, grab it */ | 693 | /* it's free, grab it */ |
695 | fh->resources |= bit; | 694 | fh->resources |= bit; |
696 | btv->resources |= bit; | 695 | btv->resources |= bit; |
697 | up(&btv->reslock); | 696 | mutex_unlock(&btv->reslock); |
698 | return 1; | 697 | return 1; |
699 | } | 698 | } |
700 | 699 | ||
@@ -717,10 +716,10 @@ void free_btres(struct bttv *btv, struct bttv_fh *fh, int bits) | |||
717 | /* trying to free ressources not allocated by us ... */ | 716 | /* trying to free ressources not allocated by us ... */ |
718 | printk("bttv: BUG! (btres)\n"); | 717 | printk("bttv: BUG! (btres)\n"); |
719 | } | 718 | } |
720 | down(&btv->reslock); | 719 | mutex_lock(&btv->reslock); |
721 | fh->resources &= ~bits; | 720 | fh->resources &= ~bits; |
722 | btv->resources &= ~bits; | 721 | btv->resources &= ~bits; |
723 | up(&btv->reslock); | 722 | mutex_unlock(&btv->reslock); |
724 | } | 723 | } |
725 | 724 | ||
726 | /* ----------------------------------------------------------------------- */ | 725 | /* ----------------------------------------------------------------------- */ |
@@ -1537,12 +1536,12 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1537 | case VIDIOCSFREQ: | 1536 | case VIDIOCSFREQ: |
1538 | { | 1537 | { |
1539 | unsigned long *freq = arg; | 1538 | unsigned long *freq = arg; |
1540 | down(&btv->lock); | 1539 | mutex_lock(&btv->lock); |
1541 | btv->freq=*freq; | 1540 | btv->freq=*freq; |
1542 | bttv_call_i2c_clients(btv,VIDIOCSFREQ,freq); | 1541 | bttv_call_i2c_clients(btv,VIDIOCSFREQ,freq); |
1543 | if (btv->has_matchbox && btv->radio_user) | 1542 | if (btv->has_matchbox && btv->radio_user) |
1544 | tea5757_set_freq(btv,*freq); | 1543 | tea5757_set_freq(btv,*freq); |
1545 | up(&btv->lock); | 1544 | mutex_unlock(&btv->lock); |
1546 | return 0; | 1545 | return 0; |
1547 | } | 1546 | } |
1548 | 1547 | ||
@@ -1572,10 +1571,10 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1572 | if (v->mode >= BTTV_TVNORMS) | 1571 | if (v->mode >= BTTV_TVNORMS) |
1573 | return -EINVAL; | 1572 | return -EINVAL; |
1574 | 1573 | ||
1575 | down(&btv->lock); | 1574 | mutex_lock(&btv->lock); |
1576 | set_tvnorm(btv,v->mode); | 1575 | set_tvnorm(btv,v->mode); |
1577 | bttv_call_i2c_clients(btv,cmd,v); | 1576 | bttv_call_i2c_clients(btv,cmd,v); |
1578 | up(&btv->lock); | 1577 | mutex_unlock(&btv->lock); |
1579 | return 0; | 1578 | return 0; |
1580 | } | 1579 | } |
1581 | 1580 | ||
@@ -1612,17 +1611,17 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1612 | if (v->norm >= BTTV_TVNORMS) | 1611 | if (v->norm >= BTTV_TVNORMS) |
1613 | return -EINVAL; | 1612 | return -EINVAL; |
1614 | 1613 | ||
1615 | down(&btv->lock); | 1614 | mutex_lock(&btv->lock); |
1616 | if (channel == btv->input && | 1615 | if (channel == btv->input && |
1617 | v->norm == btv->tvnorm) { | 1616 | v->norm == btv->tvnorm) { |
1618 | /* nothing to do */ | 1617 | /* nothing to do */ |
1619 | up(&btv->lock); | 1618 | mutex_unlock(&btv->lock); |
1620 | return 0; | 1619 | return 0; |
1621 | } | 1620 | } |
1622 | 1621 | ||
1623 | btv->tvnorm = v->norm; | 1622 | btv->tvnorm = v->norm; |
1624 | set_input(btv,v->channel); | 1623 | set_input(btv,v->channel); |
1625 | up(&btv->lock); | 1624 | mutex_unlock(&btv->lock); |
1626 | return 0; | 1625 | return 0; |
1627 | } | 1626 | } |
1628 | 1627 | ||
@@ -1635,14 +1634,14 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1635 | v->flags |= VIDEO_AUDIO_MUTABLE; | 1634 | v->flags |= VIDEO_AUDIO_MUTABLE; |
1636 | v->mode = VIDEO_SOUND_MONO; | 1635 | v->mode = VIDEO_SOUND_MONO; |
1637 | 1636 | ||
1638 | down(&btv->lock); | 1637 | mutex_lock(&btv->lock); |
1639 | bttv_call_i2c_clients(btv,cmd,v); | 1638 | bttv_call_i2c_clients(btv,cmd,v); |
1640 | 1639 | ||
1641 | /* card specific hooks */ | 1640 | /* card specific hooks */ |
1642 | if (btv->audio_hook) | 1641 | if (btv->audio_hook) |
1643 | btv->audio_hook(btv,v,0); | 1642 | btv->audio_hook(btv,v,0); |
1644 | 1643 | ||
1645 | up(&btv->lock); | 1644 | mutex_unlock(&btv->lock); |
1646 | return 0; | 1645 | return 0; |
1647 | } | 1646 | } |
1648 | case VIDIOCSAUDIO: | 1647 | case VIDIOCSAUDIO: |
@@ -1653,7 +1652,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1653 | if (audio >= bttv_tvcards[btv->c.type].audio_inputs) | 1652 | if (audio >= bttv_tvcards[btv->c.type].audio_inputs) |
1654 | return -EINVAL; | 1653 | return -EINVAL; |
1655 | 1654 | ||
1656 | down(&btv->lock); | 1655 | mutex_lock(&btv->lock); |
1657 | audio_mux(btv, (v->flags&VIDEO_AUDIO_MUTE) ? AUDIO_MUTE : AUDIO_UNMUTE); | 1656 | audio_mux(btv, (v->flags&VIDEO_AUDIO_MUTE) ? AUDIO_MUTE : AUDIO_UNMUTE); |
1658 | bttv_call_i2c_clients(btv,cmd,v); | 1657 | bttv_call_i2c_clients(btv,cmd,v); |
1659 | 1658 | ||
@@ -1661,7 +1660,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1661 | if (btv->audio_hook) | 1660 | if (btv->audio_hook) |
1662 | btv->audio_hook(btv,v,1); | 1661 | btv->audio_hook(btv,v,1); |
1663 | 1662 | ||
1664 | up(&btv->lock); | 1663 | mutex_unlock(&btv->lock); |
1665 | return 0; | 1664 | return 0; |
1666 | } | 1665 | } |
1667 | 1666 | ||
@@ -1695,10 +1694,10 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1695 | if (i == BTTV_TVNORMS) | 1694 | if (i == BTTV_TVNORMS) |
1696 | return -EINVAL; | 1695 | return -EINVAL; |
1697 | 1696 | ||
1698 | down(&btv->lock); | 1697 | mutex_lock(&btv->lock); |
1699 | set_tvnorm(btv,i); | 1698 | set_tvnorm(btv,i); |
1700 | i2c_vidiocschan(btv); | 1699 | i2c_vidiocschan(btv); |
1701 | up(&btv->lock); | 1700 | mutex_unlock(&btv->lock); |
1702 | return 0; | 1701 | return 0; |
1703 | } | 1702 | } |
1704 | case VIDIOC_QUERYSTD: | 1703 | case VIDIOC_QUERYSTD: |
@@ -1756,9 +1755,9 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1756 | 1755 | ||
1757 | if (*i > bttv_tvcards[btv->c.type].video_inputs) | 1756 | if (*i > bttv_tvcards[btv->c.type].video_inputs) |
1758 | return -EINVAL; | 1757 | return -EINVAL; |
1759 | down(&btv->lock); | 1758 | mutex_lock(&btv->lock); |
1760 | set_input(btv,*i); | 1759 | set_input(btv,*i); |
1761 | up(&btv->lock); | 1760 | mutex_unlock(&btv->lock); |
1762 | return 0; | 1761 | return 0; |
1763 | } | 1762 | } |
1764 | 1763 | ||
@@ -1770,7 +1769,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1770 | return -EINVAL; | 1769 | return -EINVAL; |
1771 | if (0 != t->index) | 1770 | if (0 != t->index) |
1772 | return -EINVAL; | 1771 | return -EINVAL; |
1773 | down(&btv->lock); | 1772 | mutex_lock(&btv->lock); |
1774 | memset(t,0,sizeof(*t)); | 1773 | memset(t,0,sizeof(*t)); |
1775 | strcpy(t->name, "Television"); | 1774 | strcpy(t->name, "Television"); |
1776 | t->type = V4L2_TUNER_ANALOG_TV; | 1775 | t->type = V4L2_TUNER_ANALOG_TV; |
@@ -1805,7 +1804,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1805 | } | 1804 | } |
1806 | } | 1805 | } |
1807 | /* FIXME: fill capability+audmode */ | 1806 | /* FIXME: fill capability+audmode */ |
1808 | up(&btv->lock); | 1807 | mutex_unlock(&btv->lock); |
1809 | return 0; | 1808 | return 0; |
1810 | } | 1809 | } |
1811 | case VIDIOC_S_TUNER: | 1810 | case VIDIOC_S_TUNER: |
@@ -1816,7 +1815,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1816 | return -EINVAL; | 1815 | return -EINVAL; |
1817 | if (0 != t->index) | 1816 | if (0 != t->index) |
1818 | return -EINVAL; | 1817 | return -EINVAL; |
1819 | down(&btv->lock); | 1818 | mutex_lock(&btv->lock); |
1820 | { | 1819 | { |
1821 | struct video_audio va; | 1820 | struct video_audio va; |
1822 | memset(&va, 0, sizeof(struct video_audio)); | 1821 | memset(&va, 0, sizeof(struct video_audio)); |
@@ -1833,7 +1832,7 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1833 | if (btv->audio_hook) | 1832 | if (btv->audio_hook) |
1834 | btv->audio_hook(btv,&va,1); | 1833 | btv->audio_hook(btv,&va,1); |
1835 | } | 1834 | } |
1836 | up(&btv->lock); | 1835 | mutex_unlock(&btv->lock); |
1837 | return 0; | 1836 | return 0; |
1838 | } | 1837 | } |
1839 | 1838 | ||
@@ -1854,12 +1853,12 @@ static int bttv_common_ioctls(struct bttv *btv, unsigned int cmd, void *arg) | |||
1854 | return -EINVAL; | 1853 | return -EINVAL; |
1855 | if (unlikely (f->type != V4L2_TUNER_ANALOG_TV)) | 1854 | if (unlikely (f->type != V4L2_TUNER_ANALOG_TV)) |
1856 | return -EINVAL; | 1855 | return -EINVAL; |
1857 | down(&btv->lock); | 1856 | mutex_lock(&btv->lock); |
1858 | btv->freq = f->frequency; | 1857 | btv->freq = f->frequency; |
1859 | bttv_call_i2c_clients(btv,VIDIOCSFREQ,&btv->freq); | 1858 | bttv_call_i2c_clients(btv,VIDIOCSFREQ,&btv->freq); |
1860 | if (btv->has_matchbox && btv->radio_user) | 1859 | if (btv->has_matchbox && btv->radio_user) |
1861 | tea5757_set_freq(btv,btv->freq); | 1860 | tea5757_set_freq(btv,btv->freq); |
1862 | up(&btv->lock); | 1861 | mutex_unlock(&btv->lock); |
1863 | return 0; | 1862 | return 0; |
1864 | } | 1863 | } |
1865 | case VIDIOC_LOG_STATUS: | 1864 | case VIDIOC_LOG_STATUS: |
@@ -3157,7 +3156,7 @@ static int radio_open(struct inode *inode, struct file *file) | |||
3157 | return -ENODEV; | 3156 | return -ENODEV; |
3158 | 3157 | ||
3159 | dprintk("bttv%d: open called (radio)\n",btv->c.nr); | 3158 | dprintk("bttv%d: open called (radio)\n",btv->c.nr); |
3160 | down(&btv->lock); | 3159 | mutex_lock(&btv->lock); |
3161 | 3160 | ||
3162 | btv->radio_user++; | 3161 | btv->radio_user++; |
3163 | 3162 | ||
@@ -3166,7 +3165,7 @@ static int radio_open(struct inode *inode, struct file *file) | |||
3166 | bttv_call_i2c_clients(btv,AUDC_SET_RADIO,&btv->tuner_type); | 3165 | bttv_call_i2c_clients(btv,AUDC_SET_RADIO,&btv->tuner_type); |
3167 | audio_mux(btv,AUDIO_RADIO); | 3166 | audio_mux(btv,AUDIO_RADIO); |
3168 | 3167 | ||
3169 | up(&btv->lock); | 3168 | mutex_unlock(&btv->lock); |
3170 | return 0; | 3169 | return 0; |
3171 | } | 3170 | } |
3172 | 3171 | ||
@@ -3921,8 +3920,8 @@ static int __devinit bttv_probe(struct pci_dev *dev, | |||
3921 | sprintf(btv->c.name,"bttv%d",btv->c.nr); | 3920 | sprintf(btv->c.name,"bttv%d",btv->c.nr); |
3922 | 3921 | ||
3923 | /* initialize structs / fill in defaults */ | 3922 | /* initialize structs / fill in defaults */ |
3924 | init_MUTEX(&btv->lock); | 3923 | mutex_init(&btv->lock); |
3925 | init_MUTEX(&btv->reslock); | 3924 | mutex_init(&btv->reslock); |
3926 | spin_lock_init(&btv->s_lock); | 3925 | spin_lock_init(&btv->s_lock); |
3927 | spin_lock_init(&btv->gpio_lock); | 3926 | spin_lock_init(&btv->gpio_lock); |
3928 | init_waitqueue_head(&btv->gpioq); | 3927 | init_waitqueue_head(&btv->gpioq); |
diff --git a/drivers/media/video/bttv-i2c.c b/drivers/media/video/bttv-i2c.c index 748d630c7fe4..614c12018557 100644 --- a/drivers/media/video/bttv-i2c.c +++ b/drivers/media/video/bttv-i2c.c | |||
@@ -41,9 +41,9 @@ static struct i2c_client bttv_i2c_client_template; | |||
41 | 41 | ||
42 | static int attach_inform(struct i2c_client *client); | 42 | static int attach_inform(struct i2c_client *client); |
43 | 43 | ||
44 | static int i2c_debug = 0; | 44 | static int i2c_debug; |
45 | static int i2c_hw = 0; | 45 | static int i2c_hw; |
46 | static int i2c_scan = 0; | 46 | static int i2c_scan; |
47 | module_param(i2c_debug, int, 0644); | 47 | module_param(i2c_debug, int, 0644); |
48 | module_param(i2c_hw, int, 0444); | 48 | module_param(i2c_hw, int, 0444); |
49 | module_param(i2c_scan, int, 0444); | 49 | module_param(i2c_scan, int, 0444); |
diff --git a/drivers/media/video/bttvp.h b/drivers/media/video/bttvp.h index dd00c20ab95e..9cb72f176f7d 100644 --- a/drivers/media/video/bttvp.h +++ b/drivers/media/video/bttvp.h | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/videodev.h> | 35 | #include <linux/videodev.h> |
36 | #include <linux/pci.h> | 36 | #include <linux/pci.h> |
37 | #include <linux/input.h> | 37 | #include <linux/input.h> |
38 | #include <linux/mutex.h> | ||
38 | #include <asm/scatterlist.h> | 39 | #include <asm/scatterlist.h> |
39 | #include <asm/io.h> | 40 | #include <asm/io.h> |
40 | 41 | ||
@@ -309,9 +310,9 @@ struct bttv { | |||
309 | 310 | ||
310 | /* locking */ | 311 | /* locking */ |
311 | spinlock_t s_lock; | 312 | spinlock_t s_lock; |
312 | struct semaphore lock; | 313 | struct mutex lock; |
313 | int resources; | 314 | int resources; |
314 | struct semaphore reslock; | 315 | struct mutex reslock; |
315 | #ifdef VIDIOC_G_PRIORITY | 316 | #ifdef VIDIOC_G_PRIORITY |
316 | struct v4l2_prio_state prio; | 317 | struct v4l2_prio_state prio; |
317 | #endif | 318 | #endif |
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index 1d75a42629d1..c66c2c1f4809 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c | |||
@@ -43,7 +43,7 @@ MODULE_LICENSE("GPL"); | |||
43 | static unsigned short normal_i2c[] = { 0x88 >> 1, I2C_CLIENT_END }; | 43 | static unsigned short normal_i2c[] = { 0x88 >> 1, I2C_CLIENT_END }; |
44 | 44 | ||
45 | 45 | ||
46 | int cx25840_debug = 0; | 46 | static int cx25840_debug; |
47 | 47 | ||
48 | module_param_named(debug,cx25840_debug, int, 0644); | 48 | module_param_named(debug,cx25840_debug, int, 0644); |
49 | 49 | ||
diff --git a/drivers/media/video/cx88/Kconfig b/drivers/media/video/cx88/Kconfig index 76fcb4e995c9..53308911ae6e 100644 --- a/drivers/media/video/cx88/Kconfig +++ b/drivers/media/video/cx88/Kconfig | |||
@@ -31,8 +31,7 @@ config VIDEO_CX88_DVB | |||
31 | 31 | ||
32 | config VIDEO_CX88_ALSA | 32 | config VIDEO_CX88_ALSA |
33 | tristate "ALSA DMA audio support" | 33 | tristate "ALSA DMA audio support" |
34 | depends on VIDEO_CX88 && SND | 34 | depends on VIDEO_CX88 && SND && EXPERIMENTAL |
35 | select SND_PCM_OSS | ||
36 | ---help--- | 35 | ---help--- |
37 | This is a video4linux driver for direct (DMA) audio on | 36 | This is a video4linux driver for direct (DMA) audio on |
38 | Conexant 2388x based TV cards. | 37 | Conexant 2388x based TV cards. |
diff --git a/drivers/media/video/cx88/Makefile b/drivers/media/video/cx88/Makefile index e4b2134fe567..6e5eaa22619e 100644 --- a/drivers/media/video/cx88/Makefile +++ b/drivers/media/video/cx88/Makefile | |||
@@ -5,6 +5,7 @@ cx8802-objs := cx88-mpeg.o | |||
5 | 5 | ||
6 | obj-$(CONFIG_VIDEO_CX88) += cx88xx.o cx8800.o cx8802.o cx88-blackbird.o | 6 | obj-$(CONFIG_VIDEO_CX88) += cx88xx.o cx8800.o cx8802.o cx88-blackbird.o |
7 | obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o cx88-vp3054-i2c.o | 7 | obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o cx88-vp3054-i2c.o |
8 | obj-$(CONFIG_VIDEO_CX88_ALSA) += cx88-alsa.o | ||
8 | 9 | ||
9 | EXTRA_CFLAGS += -I$(src)/.. | 10 | EXTRA_CFLAGS += -I$(src)/.. |
10 | EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core | 11 | EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core |
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c index 7695b521eb35..a2e36a1e5f59 100644 --- a/drivers/media/video/cx88/cx88-alsa.c +++ b/drivers/media/video/cx88/cx88-alsa.c | |||
@@ -116,7 +116,7 @@ MODULE_LICENSE("GPL"); | |||
116 | MODULE_SUPPORTED_DEVICE("{{Conexant,23881}," | 116 | MODULE_SUPPORTED_DEVICE("{{Conexant,23881}," |
117 | "{{Conexant,23882}," | 117 | "{{Conexant,23882}," |
118 | "{{Conexant,23883}"); | 118 | "{{Conexant,23883}"); |
119 | static unsigned int debug = 0; | 119 | static unsigned int debug; |
120 | module_param(debug,int,0644); | 120 | module_param(debug,int,0644); |
121 | MODULE_PARM_DESC(debug,"enable debug messages"); | 121 | MODULE_PARM_DESC(debug,"enable debug messages"); |
122 | 122 | ||
@@ -333,10 +333,10 @@ static snd_pcm_hardware_t snd_cx88_digital_hw = { | |||
333 | .channels_min = 1, | 333 | .channels_min = 1, |
334 | .channels_max = 2, | 334 | .channels_max = 2, |
335 | .buffer_bytes_max = (2*2048), | 335 | .buffer_bytes_max = (2*2048), |
336 | .period_bytes_min = 256, | 336 | .period_bytes_min = 2048, |
337 | .period_bytes_max = 2048, | 337 | .period_bytes_max = 2048, |
338 | .periods_min = 2, | 338 | .periods_min = 2, |
339 | .periods_max = 16, | 339 | .periods_max = 2, |
340 | }; | 340 | }; |
341 | 341 | ||
342 | /* | 342 | /* |
@@ -653,7 +653,7 @@ static void snd_cx88_dev_free(snd_card_t * card) | |||
653 | * Alsa Constructor - Component probe | 653 | * Alsa Constructor - Component probe |
654 | */ | 654 | */ |
655 | 655 | ||
656 | static int devno=0; | 656 | static int devno; |
657 | static int __devinit snd_cx88_create(snd_card_t *card, struct pci_dev *pci, | 657 | static int __devinit snd_cx88_create(snd_card_t *card, struct pci_dev *pci, |
658 | snd_cx88_card_t **rchip) | 658 | snd_cx88_card_t **rchip) |
659 | { | 659 | { |
@@ -805,7 +805,6 @@ static struct pci_driver cx88_audio_pci_driver = { | |||
805 | .id_table = cx88_audio_pci_tbl, | 805 | .id_table = cx88_audio_pci_tbl, |
806 | .probe = cx88_audio_initdev, | 806 | .probe = cx88_audio_initdev, |
807 | .remove = cx88_audio_finidev, | 807 | .remove = cx88_audio_finidev, |
808 | SND_PCI_PM_CALLBACKS | ||
809 | }; | 808 | }; |
810 | 809 | ||
811 | /**************************************************************************** | 810 | /**************************************************************************** |
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c index 194446f28c55..8d6d6a6cf785 100644 --- a/drivers/media/video/cx88/cx88-core.c +++ b/drivers/media/video/cx88/cx88-core.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/pci.h> | 32 | #include <linux/pci.h> |
33 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
34 | #include <linux/videodev2.h> | 34 | #include <linux/videodev2.h> |
35 | #include <linux/mutex.h> | ||
35 | 36 | ||
36 | #include "cx88.h" | 37 | #include "cx88.h" |
37 | #include <media/v4l2-common.h> | 38 | #include <media/v4l2-common.h> |
@@ -75,7 +76,7 @@ MODULE_PARM_DESC(nocomb,"disable comb filter"); | |||
75 | 76 | ||
76 | static unsigned int cx88_devcount; | 77 | static unsigned int cx88_devcount; |
77 | static LIST_HEAD(cx88_devlist); | 78 | static LIST_HEAD(cx88_devlist); |
78 | static DECLARE_MUTEX(devlist); | 79 | static DEFINE_MUTEX(devlist); |
79 | 80 | ||
80 | #define NO_SYNC_LINE (-1U) | 81 | #define NO_SYNC_LINE (-1U) |
81 | 82 | ||
@@ -1036,7 +1037,7 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci) | |||
1036 | struct list_head *item; | 1037 | struct list_head *item; |
1037 | int i; | 1038 | int i; |
1038 | 1039 | ||
1039 | down(&devlist); | 1040 | mutex_lock(&devlist); |
1040 | list_for_each(item,&cx88_devlist) { | 1041 | list_for_each(item,&cx88_devlist) { |
1041 | core = list_entry(item, struct cx88_core, devlist); | 1042 | core = list_entry(item, struct cx88_core, devlist); |
1042 | if (pci->bus->number != core->pci_bus) | 1043 | if (pci->bus->number != core->pci_bus) |
@@ -1047,7 +1048,7 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci) | |||
1047 | if (0 != get_ressources(core,pci)) | 1048 | if (0 != get_ressources(core,pci)) |
1048 | goto fail_unlock; | 1049 | goto fail_unlock; |
1049 | atomic_inc(&core->refcount); | 1050 | atomic_inc(&core->refcount); |
1050 | up(&devlist); | 1051 | mutex_unlock(&devlist); |
1051 | return core; | 1052 | return core; |
1052 | } | 1053 | } |
1053 | core = kzalloc(sizeof(*core),GFP_KERNEL); | 1054 | core = kzalloc(sizeof(*core),GFP_KERNEL); |
@@ -1122,13 +1123,13 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci) | |||
1122 | cx88_card_setup(core); | 1123 | cx88_card_setup(core); |
1123 | cx88_ir_init(core,pci); | 1124 | cx88_ir_init(core,pci); |
1124 | 1125 | ||
1125 | up(&devlist); | 1126 | mutex_unlock(&devlist); |
1126 | return core; | 1127 | return core; |
1127 | 1128 | ||
1128 | fail_free: | 1129 | fail_free: |
1129 | kfree(core); | 1130 | kfree(core); |
1130 | fail_unlock: | 1131 | fail_unlock: |
1131 | up(&devlist); | 1132 | mutex_unlock(&devlist); |
1132 | return NULL; | 1133 | return NULL; |
1133 | } | 1134 | } |
1134 | 1135 | ||
@@ -1140,14 +1141,14 @@ void cx88_core_put(struct cx88_core *core, struct pci_dev *pci) | |||
1140 | if (!atomic_dec_and_test(&core->refcount)) | 1141 | if (!atomic_dec_and_test(&core->refcount)) |
1141 | return; | 1142 | return; |
1142 | 1143 | ||
1143 | down(&devlist); | 1144 | mutex_lock(&devlist); |
1144 | cx88_ir_fini(core); | 1145 | cx88_ir_fini(core); |
1145 | if (0 == core->i2c_rc) | 1146 | if (0 == core->i2c_rc) |
1146 | i2c_bit_del_bus(&core->i2c_adap); | 1147 | i2c_bit_del_bus(&core->i2c_adap); |
1147 | list_del(&core->devlist); | 1148 | list_del(&core->devlist); |
1148 | iounmap(core->lmmio); | 1149 | iounmap(core->lmmio); |
1149 | cx88_devcount--; | 1150 | cx88_devcount--; |
1150 | up(&devlist); | 1151 | mutex_unlock(&devlist); |
1151 | kfree(core); | 1152 | kfree(core); |
1152 | } | 1153 | } |
1153 | 1154 | ||
diff --git a/drivers/media/video/cx88/cx88-tvaudio.c b/drivers/media/video/cx88/cx88-tvaudio.c index 24118e43e73a..da8d97ce0c4b 100644 --- a/drivers/media/video/cx88/cx88-tvaudio.c +++ b/drivers/media/video/cx88/cx88-tvaudio.c | |||
@@ -60,6 +60,11 @@ static unsigned int audio_debug = 0; | |||
60 | module_param(audio_debug, int, 0644); | 60 | module_param(audio_debug, int, 0644); |
61 | MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]"); | 61 | MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]"); |
62 | 62 | ||
63 | static unsigned int always_analog = 0; | ||
64 | module_param(always_analog,int,0644); | ||
65 | MODULE_PARM_DESC(always_analog,"force analog audio out"); | ||
66 | |||
67 | |||
63 | #define dprintk(fmt, arg...) if (audio_debug) \ | 68 | #define dprintk(fmt, arg...) if (audio_debug) \ |
64 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) | 69 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) |
65 | 70 | ||
@@ -155,7 +160,8 @@ static void set_audio_finish(struct cx88_core *core, u32 ctl) | |||
155 | cx_write(AUD_I2SOUTPUTCNTL, 1); | 160 | cx_write(AUD_I2SOUTPUTCNTL, 1); |
156 | cx_write(AUD_I2SCNTL, 0); | 161 | cx_write(AUD_I2SCNTL, 0); |
157 | /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ | 162 | /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ |
158 | } else { | 163 | } |
164 | if ((always_analog) || (!cx88_boards[core->board].blackbird)) { | ||
159 | ctl |= EN_DAC_ENABLE; | 165 | ctl |= EN_DAC_ENABLE; |
160 | cx_write(AUD_CTL, ctl); | 166 | cx_write(AUD_CTL, ctl); |
161 | } | 167 | } |
diff --git a/drivers/media/video/cx88/cx88-vp3054-i2c.c b/drivers/media/video/cx88/cx88-vp3054-i2c.c index 372cd29cedbd..751a754a45e9 100644 --- a/drivers/media/video/cx88/cx88-vp3054-i2c.c +++ b/drivers/media/video/cx88/cx88-vp3054-i2c.c | |||
@@ -32,6 +32,10 @@ | |||
32 | #include "cx88-vp3054-i2c.h" | 32 | #include "cx88-vp3054-i2c.h" |
33 | 33 | ||
34 | 34 | ||
35 | MODULE_DESCRIPTION("driver for cx2388x VP3054 design"); | ||
36 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | ||
37 | MODULE_LICENSE("GPL"); | ||
38 | |||
35 | /* ----------------------------------------------------------------------- */ | 39 | /* ----------------------------------------------------------------------- */ |
36 | 40 | ||
37 | static void vp3054_bit_setscl(void *data, int state) | 41 | static void vp3054_bit_setscl(void *data, int state) |
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c index 9b94f77d6fd7..30dfa5370c73 100644 --- a/drivers/media/video/em28xx/em28xx-input.c +++ b/drivers/media/video/em28xx/em28xx-input.c | |||
@@ -76,6 +76,58 @@ static IR_KEYTAB_TYPE ir_codes_em_terratec[IR_KEYTAB_SIZE] = { | |||
76 | [ 0x40 ] = KEY_ZOOM, | 76 | [ 0x40 ] = KEY_ZOOM, |
77 | }; | 77 | }; |
78 | 78 | ||
79 | static IR_KEYTAB_TYPE ir_codes_em_pinnacle_usb[IR_KEYTAB_SIZE] = { | ||
80 | [ 0x3a ] = KEY_KP0, | ||
81 | [ 0x31 ] = KEY_KP1, | ||
82 | [ 0x32 ] = KEY_KP2, | ||
83 | [ 0x33 ] = KEY_KP3, | ||
84 | [ 0x34 ] = KEY_KP4, | ||
85 | [ 0x35 ] = KEY_KP5, | ||
86 | [ 0x36 ] = KEY_KP6, | ||
87 | [ 0x37 ] = KEY_KP7, | ||
88 | [ 0x38 ] = KEY_KP8, | ||
89 | [ 0x39 ] = KEY_KP9, | ||
90 | |||
91 | [ 0x2f ] = KEY_POWER, | ||
92 | |||
93 | [ 0x2e ] = KEY_P, | ||
94 | [ 0x1f ] = KEY_L, | ||
95 | [ 0x2b ] = KEY_I, | ||
96 | |||
97 | [ 0x2d ] = KEY_ZOOM, | ||
98 | [ 0x1e ] = KEY_ZOOM, | ||
99 | [ 0x1b ] = KEY_VOLUMEUP, | ||
100 | [ 0x0f ] = KEY_VOLUMEDOWN, | ||
101 | [ 0x17 ] = KEY_CHANNELUP, | ||
102 | [ 0x1c ] = KEY_CHANNELDOWN, | ||
103 | [ 0x25 ] = KEY_INFO, | ||
104 | |||
105 | [ 0x3c ] = KEY_MUTE, | ||
106 | |||
107 | [ 0x3d ] = KEY_LEFT, | ||
108 | [ 0x3b ] = KEY_RIGHT, | ||
109 | |||
110 | [ 0x3f ] = KEY_UP, | ||
111 | [ 0x3e ] = KEY_DOWN, | ||
112 | [ 0x1a ] = KEY_PAUSE, | ||
113 | |||
114 | [ 0x1d ] = KEY_MENU, | ||
115 | [ 0x19 ] = KEY_PLAY, | ||
116 | [ 0x16 ] = KEY_REWIND, | ||
117 | [ 0x13 ] = KEY_FORWARD, | ||
118 | [ 0x15 ] = KEY_PAUSE, | ||
119 | [ 0x0e ] = KEY_REWIND, | ||
120 | [ 0x0d ] = KEY_PLAY, | ||
121 | [ 0x0b ] = KEY_STOP, | ||
122 | [ 0x07 ] = KEY_FORWARD, | ||
123 | [ 0x27 ] = KEY_RECORD, | ||
124 | [ 0x26 ] = KEY_TUNER, | ||
125 | [ 0x29 ] = KEY_TEXT, | ||
126 | [ 0x2a ] = KEY_MEDIA, | ||
127 | [ 0x18 ] = KEY_EPG, | ||
128 | [ 0x27 ] = KEY_RECORD, | ||
129 | }; | ||
130 | |||
79 | /* ----------------------------------------------------------------------- */ | 131 | /* ----------------------------------------------------------------------- */ |
80 | 132 | ||
81 | static int get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) | 133 | static int get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) |
@@ -138,6 +190,28 @@ static int get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) | |||
138 | return 1; | 190 | return 1; |
139 | } | 191 | } |
140 | 192 | ||
193 | static int get_key_pinnacle_usb(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) | ||
194 | { | ||
195 | unsigned char buf[3]; | ||
196 | |||
197 | /* poll IR chip */ | ||
198 | |||
199 | if (3 != i2c_master_recv(&ir->c,buf,3)) { | ||
200 | dprintk("read error\n"); | ||
201 | return -EIO; | ||
202 | } | ||
203 | |||
204 | dprintk("key %02x\n", buf[2]&0x3f); | ||
205 | if (buf[0]!=0x00){ | ||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | *ir_key = buf[2]&0x3f; | ||
210 | *ir_raw = buf[2]&0x3f; | ||
211 | |||
212 | return 1; | ||
213 | } | ||
214 | |||
141 | /* ----------------------------------------------------------------------- */ | 215 | /* ----------------------------------------------------------------------- */ |
142 | void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir) | 216 | void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir) |
143 | { | 217 | { |
@@ -159,6 +233,9 @@ void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir) | |||
159 | snprintf(ir->c.name, sizeof(ir->c.name), "i2c IR (EM28XX Terratec)"); | 233 | snprintf(ir->c.name, sizeof(ir->c.name), "i2c IR (EM28XX Terratec)"); |
160 | break; | 234 | break; |
161 | case (EM2820_BOARD_PINNACLE_USB_2): | 235 | case (EM2820_BOARD_PINNACLE_USB_2): |
236 | ir->ir_codes = ir_codes_em_pinnacle_usb; | ||
237 | ir->get_key = get_key_pinnacle_usb; | ||
238 | snprintf(ir->c.name, sizeof(ir->c.name), "i2c IR (EM28XX Pinnacle PCTV)"); | ||
162 | break; | 239 | break; |
163 | case (EM2820_BOARD_HAUPPAUGE_WINTV_USB_2): | 240 | case (EM2820_BOARD_HAUPPAUGE_WINTV_USB_2): |
164 | ir->ir_codes = ir_codes_hauppauge_new; | 241 | ir->ir_codes = ir_codes_hauppauge_new; |
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c index 3323dffe26a4..eea304f75176 100644 --- a/drivers/media/video/em28xx/em28xx-video.c +++ b/drivers/media/video/em28xx/em28xx-video.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/version.h> | 30 | #include <linux/version.h> |
31 | #include <linux/video_decoder.h> | 31 | #include <linux/video_decoder.h> |
32 | #include <linux/mutex.h> | ||
32 | 33 | ||
33 | #include "em28xx.h" | 34 | #include "em28xx.h" |
34 | #include <media/tuner.h> | 35 | #include <media/tuner.h> |
@@ -191,7 +192,7 @@ static struct v4l2_queryctrl saa711x_qctrl[] = { | |||
191 | 192 | ||
192 | static struct usb_driver em28xx_usb_driver; | 193 | static struct usb_driver em28xx_usb_driver; |
193 | 194 | ||
194 | static DECLARE_MUTEX(em28xx_sysfs_lock); | 195 | static DEFINE_MUTEX(em28xx_sysfs_lock); |
195 | static DECLARE_RWSEM(em28xx_disconnect); | 196 | static DECLARE_RWSEM(em28xx_disconnect); |
196 | 197 | ||
197 | /********************* v4l2 interface ******************************************/ | 198 | /********************* v4l2 interface ******************************************/ |
@@ -394,7 +395,7 @@ static int em28xx_v4l2_open(struct inode *inode, struct file *filp) | |||
394 | */ | 395 | */ |
395 | static void em28xx_release_resources(struct em28xx *dev) | 396 | static void em28xx_release_resources(struct em28xx *dev) |
396 | { | 397 | { |
397 | down(&em28xx_sysfs_lock); | 398 | mutex_lock(&em28xx_sysfs_lock); |
398 | 399 | ||
399 | em28xx_info("V4L2 device /dev/video%d deregistered\n", | 400 | em28xx_info("V4L2 device /dev/video%d deregistered\n", |
400 | dev->vdev->minor); | 401 | dev->vdev->minor); |
@@ -403,7 +404,7 @@ static void em28xx_release_resources(struct em28xx *dev) | |||
403 | /* video_unregister_device(dev->vbi_dev); */ | 404 | /* video_unregister_device(dev->vbi_dev); */ |
404 | em28xx_i2c_unregister(dev); | 405 | em28xx_i2c_unregister(dev); |
405 | usb_put_dev(dev->udev); | 406 | usb_put_dev(dev->udev); |
406 | up(&em28xx_sysfs_lock); | 407 | mutex_unlock(&em28xx_sysfs_lock); |
407 | } | 408 | } |
408 | 409 | ||
409 | /* | 410 | /* |
diff --git a/drivers/media/video/msp3400-driver.c b/drivers/media/video/msp3400-driver.c index 9b05a0ab776d..69ed369c2f48 100644 --- a/drivers/media/video/msp3400-driver.c +++ b/drivers/media/video/msp3400-driver.c | |||
@@ -66,12 +66,12 @@ MODULE_LICENSE("GPL"); | |||
66 | 66 | ||
67 | /* module parameters */ | 67 | /* module parameters */ |
68 | static int opmode = OPMODE_AUTO; | 68 | static int opmode = OPMODE_AUTO; |
69 | int msp_debug = 0; /* msp_debug output */ | 69 | int msp_debug; /* msp_debug output */ |
70 | int msp_once = 0; /* no continous stereo monitoring */ | 70 | int msp_once; /* no continous stereo monitoring */ |
71 | int msp_amsound = 0; /* hard-wire AM sound at 6.5 Hz (france), | 71 | int msp_amsound; /* hard-wire AM sound at 6.5 Hz (france), |
72 | the autoscan seems work well only with FM... */ | 72 | the autoscan seems work well only with FM... */ |
73 | int msp_standard = 1; /* Override auto detect of audio msp_standard, if needed. */ | 73 | int msp_standard = 1; /* Override auto detect of audio msp_standard, if needed. */ |
74 | int msp_dolby = 0; | 74 | int msp_dolby; |
75 | 75 | ||
76 | int msp_stereo_thresh = 0x190; /* a2 threshold for stereo/bilingual | 76 | int msp_stereo_thresh = 0x190; /* a2 threshold for stereo/bilingual |
77 | (msp34xxg only) 0x00a0-0x03c0 */ | 77 | (msp34xxg only) 0x00a0-0x03c0 */ |
@@ -1031,8 +1031,8 @@ static int msp_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
1031 | } | 1031 | } |
1032 | 1032 | ||
1033 | default: | 1033 | default: |
1034 | /* nothing */ | 1034 | /* unknown */ |
1035 | break; | 1035 | return -EINVAL; |
1036 | } | 1036 | } |
1037 | return 0; | 1037 | return 0; |
1038 | } | 1038 | } |
diff --git a/drivers/media/video/msp3400.h b/drivers/media/video/msp3400.h index 70a5ef8ba017..a9ac57d0700b 100644 --- a/drivers/media/video/msp3400.h +++ b/drivers/media/video/msp3400.h | |||
@@ -6,14 +6,6 @@ | |||
6 | 6 | ||
7 | /* ---------------------------------------------------------------------- */ | 7 | /* ---------------------------------------------------------------------- */ |
8 | 8 | ||
9 | struct msp_matrix { | ||
10 | int input; | ||
11 | int output; | ||
12 | }; | ||
13 | |||
14 | /* ioctl for MSP_SET_MATRIX will have to be registered */ | ||
15 | #define MSP_SET_MATRIX _IOW('m',17,struct msp_matrix) | ||
16 | |||
17 | /* This macro is allowed for *constants* only, gcc must calculate it | 9 | /* This macro is allowed for *constants* only, gcc must calculate it |
18 | at compile time. Remember -- no floats in kernel mode */ | 10 | at compile time. Remember -- no floats in kernel mode */ |
19 | #define MSP_CARRIER(freq) ((int)((float)(freq / 18.432) * (1 << 24))) | 11 | #define MSP_CARRIER(freq) ((int)((float)(freq / 18.432) * (1 << 24))) |
diff --git a/drivers/media/video/mt20xx.c b/drivers/media/video/mt20xx.c index 0bf1caac5887..c7c9f3f8715c 100644 --- a/drivers/media/video/mt20xx.c +++ b/drivers/media/video/mt20xx.c | |||
@@ -353,8 +353,8 @@ static int mt2032_init(struct i2c_client *c) | |||
353 | } while (xok != 1 ); | 353 | } while (xok != 1 ); |
354 | t->xogc=xogc; | 354 | t->xogc=xogc; |
355 | 355 | ||
356 | t->tv_freq = mt2032_set_tv_freq; | 356 | t->set_tv_freq = mt2032_set_tv_freq; |
357 | t->radio_freq = mt2032_set_radio_freq; | 357 | t->set_radio_freq = mt2032_set_radio_freq; |
358 | return(1); | 358 | return(1); |
359 | } | 359 | } |
360 | 360 | ||
@@ -481,8 +481,8 @@ static int mt2050_init(struct i2c_client *c) | |||
481 | i2c_master_recv(c,buf,1); | 481 | i2c_master_recv(c,buf,1); |
482 | 482 | ||
483 | tuner_dbg("mt2050: sro is %x\n",buf[0]); | 483 | tuner_dbg("mt2050: sro is %x\n",buf[0]); |
484 | t->tv_freq = mt2050_set_tv_freq; | 484 | t->set_tv_freq = mt2050_set_tv_freq; |
485 | t->radio_freq = mt2050_set_radio_freq; | 485 | t->set_radio_freq = mt2050_set_radio_freq; |
486 | return 0; | 486 | return 0; |
487 | } | 487 | } |
488 | 488 | ||
@@ -494,8 +494,8 @@ int microtune_init(struct i2c_client *c) | |||
494 | int company_code; | 494 | int company_code; |
495 | 495 | ||
496 | memset(buf,0,sizeof(buf)); | 496 | memset(buf,0,sizeof(buf)); |
497 | t->tv_freq = NULL; | 497 | t->set_tv_freq = NULL; |
498 | t->radio_freq = NULL; | 498 | t->set_radio_freq = NULL; |
499 | t->standby = NULL; | 499 | t->standby = NULL; |
500 | if (t->std & V4L2_STD_525_60) { | 500 | if (t->std & V4L2_STD_525_60) { |
501 | tuner_dbg("pinnacle ntsc\n"); | 501 | tuner_dbg("pinnacle ntsc\n"); |
diff --git a/drivers/media/video/planb.c b/drivers/media/video/planb.c index b19c33434eaf..f3fc361bec97 100644 --- a/drivers/media/video/planb.c +++ b/drivers/media/video/planb.c | |||
@@ -76,9 +76,9 @@ static volatile struct planb_registers *planb_regs; | |||
76 | static int def_norm = PLANB_DEF_NORM; /* default norm */ | 76 | static int def_norm = PLANB_DEF_NORM; /* default norm */ |
77 | static int video_nr = -1; | 77 | static int video_nr = -1; |
78 | 78 | ||
79 | MODULE_PARM(def_norm, "i"); | 79 | module_param(def_norm, int, 0); |
80 | MODULE_PARM_DESC(def_norm, "Default startup norm (0=PAL, 1=NTSC, 2=SECAM)"); | 80 | MODULE_PARM_DESC(def_norm, "Default startup norm (0=PAL, 1=NTSC, 2=SECAM)"); |
81 | MODULE_PARM(video_nr,"i"); | 81 | module_param(video_nr, int, 0); |
82 | MODULE_LICENSE("GPL"); | 82 | MODULE_LICENSE("GPL"); |
83 | 83 | ||
84 | 84 | ||
diff --git a/drivers/media/video/saa6588.c b/drivers/media/video/saa6588.c index e70b17ef36e9..d17395c4f55c 100644 --- a/drivers/media/video/saa6588.c +++ b/drivers/media/video/saa6588.c | |||
@@ -50,15 +50,15 @@ static unsigned int rbds = 0; | |||
50 | static unsigned int plvl = 0; | 50 | static unsigned int plvl = 0; |
51 | static unsigned int bufblocks = 100; | 51 | static unsigned int bufblocks = 100; |
52 | 52 | ||
53 | MODULE_PARM(debug, "i"); | 53 | module_param(debug, int, 0644); |
54 | MODULE_PARM_DESC(debug, "enable debug messages"); | 54 | MODULE_PARM_DESC(debug, "enable debug messages"); |
55 | MODULE_PARM(xtal, "i"); | 55 | module_param(xtal, int, 0); |
56 | MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0"); | 56 | MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0"); |
57 | MODULE_PARM(rbds, "i"); | 57 | module_param(rbds, int, 0); |
58 | MODULE_PARM_DESC(rbds, "select mode, 0=RDS, 1=RBDS, default 0"); | 58 | MODULE_PARM_DESC(rbds, "select mode, 0=RDS, 1=RBDS, default 0"); |
59 | MODULE_PARM(plvl, "i"); | 59 | module_param(plvl, int, 0); |
60 | MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0"); | 60 | MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0"); |
61 | MODULE_PARM(bufblocks, "i"); | 61 | module_param(bufblocks, int, 0); |
62 | MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100"); | 62 | MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100"); |
63 | 63 | ||
64 | MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder"); | 64 | MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder"); |
diff --git a/drivers/media/video/saa711x.c b/drivers/media/video/saa711x.c index ae53063875f9..6c161f2f5e2c 100644 --- a/drivers/media/video/saa711x.c +++ b/drivers/media/video/saa711x.c | |||
@@ -52,7 +52,7 @@ MODULE_LICENSE("GPL"); | |||
52 | #include <linux/video_decoder.h> | 52 | #include <linux/video_decoder.h> |
53 | 53 | ||
54 | static int debug = 0; | 54 | static int debug = 0; |
55 | MODULE_PARM(debug, "i"); | 55 | module_param(debug, int, 0644); |
56 | MODULE_PARM_DESC(debug, " Set the default Debug level. Default: 0 (Off) - (0-1)"); | 56 | MODULE_PARM_DESC(debug, " Set the default Debug level. Default: 0 (Off) - (0-1)"); |
57 | 57 | ||
58 | 58 | ||
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index 275d06af69d2..c64718aec9cb 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
@@ -2515,6 +2515,7 @@ struct saa7134_board saa7134_boards[] = { | |||
2515 | .tuner_addr = ADDR_UNSET, | 2515 | .tuner_addr = ADDR_UNSET, |
2516 | .radio_addr = ADDR_UNSET, | 2516 | .radio_addr = ADDR_UNSET, |
2517 | .mpeg = SAA7134_MPEG_DVB, | 2517 | .mpeg = SAA7134_MPEG_DVB, |
2518 | .gpiomask = 1 << 21, | ||
2518 | .inputs = {{ | 2519 | .inputs = {{ |
2519 | .name = name_tv, | 2520 | .name = name_tv, |
2520 | .vmux = 1, | 2521 | .vmux = 1, |
@@ -2529,6 +2530,11 @@ struct saa7134_board saa7134_boards[] = { | |||
2529 | .vmux = 8, | 2530 | .vmux = 8, |
2530 | .amux = LINE1, | 2531 | .amux = LINE1, |
2531 | }}, | 2532 | }}, |
2533 | .radio = { | ||
2534 | .name = name_radio, | ||
2535 | .amux = TV, | ||
2536 | .gpio = 0x0200000, | ||
2537 | }, | ||
2532 | }, | 2538 | }, |
2533 | [SAA7134_BOARD_MSI_TVATANYWHERE_PLUS] = { | 2539 | [SAA7134_BOARD_MSI_TVATANYWHERE_PLUS] = { |
2534 | .name = "MSI TV@Anywhere plus", | 2540 | .name = "MSI TV@Anywhere plus", |
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c index 3983a6524cac..028904bd94a2 100644 --- a/drivers/media/video/saa7134/saa7134-core.c +++ b/drivers/media/video/saa7134/saa7134-core.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <linux/sound.h> | 31 | #include <linux/sound.h> |
32 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
33 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
34 | #include <linux/mutex.h> | ||
34 | 35 | ||
35 | #include "saa7134-reg.h" | 36 | #include "saa7134-reg.h" |
36 | #include "saa7134.h" | 37 | #include "saa7134.h" |
@@ -84,7 +85,7 @@ MODULE_PARM_DESC(radio_nr, "radio device number"); | |||
84 | MODULE_PARM_DESC(tuner, "tuner type"); | 85 | MODULE_PARM_DESC(tuner, "tuner type"); |
85 | MODULE_PARM_DESC(card, "card type"); | 86 | MODULE_PARM_DESC(card, "card type"); |
86 | 87 | ||
87 | static DECLARE_MUTEX(devlist_lock); | 88 | static DEFINE_MUTEX(devlist_lock); |
88 | LIST_HEAD(saa7134_devlist); | 89 | LIST_HEAD(saa7134_devlist); |
89 | static LIST_HEAD(mops_list); | 90 | static LIST_HEAD(mops_list); |
90 | static unsigned int saa7134_devcount; | 91 | static unsigned int saa7134_devcount; |
@@ -140,7 +141,7 @@ static int pending_call(struct notifier_block *self, unsigned long state, | |||
140 | return NOTIFY_DONE; | 141 | return NOTIFY_DONE; |
141 | } | 142 | } |
142 | 143 | ||
143 | static int pending_registered=0; | 144 | static int pending_registered; |
144 | static struct notifier_block pending_notifier = { | 145 | static struct notifier_block pending_notifier = { |
145 | .notifier_call = pending_call, | 146 | .notifier_call = pending_call, |
146 | }; | 147 | }; |
@@ -969,13 +970,13 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev, | |||
969 | pci_set_drvdata(pci_dev,dev); | 970 | pci_set_drvdata(pci_dev,dev); |
970 | saa7134_devcount++; | 971 | saa7134_devcount++; |
971 | 972 | ||
972 | down(&devlist_lock); | 973 | mutex_lock(&devlist_lock); |
973 | list_for_each(item,&mops_list) { | 974 | list_for_each(item,&mops_list) { |
974 | mops = list_entry(item, struct saa7134_mpeg_ops, next); | 975 | mops = list_entry(item, struct saa7134_mpeg_ops, next); |
975 | mpeg_ops_attach(mops, dev); | 976 | mpeg_ops_attach(mops, dev); |
976 | } | 977 | } |
977 | list_add_tail(&dev->devlist,&saa7134_devlist); | 978 | list_add_tail(&dev->devlist,&saa7134_devlist); |
978 | up(&devlist_lock); | 979 | mutex_unlock(&devlist_lock); |
979 | 980 | ||
980 | /* check for signal */ | 981 | /* check for signal */ |
981 | saa7134_irq_video_intl(dev); | 982 | saa7134_irq_video_intl(dev); |
@@ -1031,13 +1032,13 @@ static void __devexit saa7134_finidev(struct pci_dev *pci_dev) | |||
1031 | saa7134_hwfini(dev); | 1032 | saa7134_hwfini(dev); |
1032 | 1033 | ||
1033 | /* unregister */ | 1034 | /* unregister */ |
1034 | down(&devlist_lock); | 1035 | mutex_lock(&devlist_lock); |
1035 | list_del(&dev->devlist); | 1036 | list_del(&dev->devlist); |
1036 | list_for_each(item,&mops_list) { | 1037 | list_for_each(item,&mops_list) { |
1037 | mops = list_entry(item, struct saa7134_mpeg_ops, next); | 1038 | mops = list_entry(item, struct saa7134_mpeg_ops, next); |
1038 | mpeg_ops_detach(mops, dev); | 1039 | mpeg_ops_detach(mops, dev); |
1039 | } | 1040 | } |
1040 | up(&devlist_lock); | 1041 | mutex_unlock(&devlist_lock); |
1041 | saa7134_devcount--; | 1042 | saa7134_devcount--; |
1042 | 1043 | ||
1043 | saa7134_i2c_unregister(dev); | 1044 | saa7134_i2c_unregister(dev); |
@@ -1071,13 +1072,13 @@ int saa7134_ts_register(struct saa7134_mpeg_ops *ops) | |||
1071 | struct list_head *item; | 1072 | struct list_head *item; |
1072 | struct saa7134_dev *dev; | 1073 | struct saa7134_dev *dev; |
1073 | 1074 | ||
1074 | down(&devlist_lock); | 1075 | mutex_lock(&devlist_lock); |
1075 | list_for_each(item,&saa7134_devlist) { | 1076 | list_for_each(item,&saa7134_devlist) { |
1076 | dev = list_entry(item, struct saa7134_dev, devlist); | 1077 | dev = list_entry(item, struct saa7134_dev, devlist); |
1077 | mpeg_ops_attach(ops, dev); | 1078 | mpeg_ops_attach(ops, dev); |
1078 | } | 1079 | } |
1079 | list_add_tail(&ops->next,&mops_list); | 1080 | list_add_tail(&ops->next,&mops_list); |
1080 | up(&devlist_lock); | 1081 | mutex_unlock(&devlist_lock); |
1081 | return 0; | 1082 | return 0; |
1082 | } | 1083 | } |
1083 | 1084 | ||
@@ -1086,13 +1087,13 @@ void saa7134_ts_unregister(struct saa7134_mpeg_ops *ops) | |||
1086 | struct list_head *item; | 1087 | struct list_head *item; |
1087 | struct saa7134_dev *dev; | 1088 | struct saa7134_dev *dev; |
1088 | 1089 | ||
1089 | down(&devlist_lock); | 1090 | mutex_lock(&devlist_lock); |
1090 | list_del(&ops->next); | 1091 | list_del(&ops->next); |
1091 | list_for_each(item,&saa7134_devlist) { | 1092 | list_for_each(item,&saa7134_devlist) { |
1092 | dev = list_entry(item, struct saa7134_dev, devlist); | 1093 | dev = list_entry(item, struct saa7134_dev, devlist); |
1093 | mpeg_ops_detach(ops, dev); | 1094 | mpeg_ops_detach(ops, dev); |
1094 | } | 1095 | } |
1095 | up(&devlist_lock); | 1096 | mutex_unlock(&devlist_lock); |
1096 | } | 1097 | } |
1097 | 1098 | ||
1098 | EXPORT_SYMBOL(saa7134_ts_register); | 1099 | EXPORT_SYMBOL(saa7134_ts_register); |
diff --git a/drivers/media/video/saa7134/saa7134-tvaudio.c b/drivers/media/video/saa7134/saa7134-tvaudio.c index 93268427750d..afa4dcb3f96d 100644 --- a/drivers/media/video/saa7134/saa7134-tvaudio.c +++ b/drivers/media/video/saa7134/saa7134-tvaudio.c | |||
@@ -180,8 +180,8 @@ static void tvaudio_init(struct saa7134_dev *dev) | |||
180 | saa_writeb(SAA7134_AUDIO_CLOCK0, clock & 0xff); | 180 | saa_writeb(SAA7134_AUDIO_CLOCK0, clock & 0xff); |
181 | saa_writeb(SAA7134_AUDIO_CLOCK1, (clock >> 8) & 0xff); | 181 | saa_writeb(SAA7134_AUDIO_CLOCK1, (clock >> 8) & 0xff); |
182 | saa_writeb(SAA7134_AUDIO_CLOCK2, (clock >> 16) & 0xff); | 182 | saa_writeb(SAA7134_AUDIO_CLOCK2, (clock >> 16) & 0xff); |
183 | // frame locked audio was reported not to be reliable | 183 | /* frame locked audio is mandatory for NICAM */ |
184 | saa_writeb(SAA7134_AUDIO_PLL_CTRL, 0x02); | 184 | saa_writeb(SAA7134_AUDIO_PLL_CTRL, 0x01); |
185 | 185 | ||
186 | saa_writeb(SAA7134_NICAM_ERROR_LOW, 0x14); | 186 | saa_writeb(SAA7134_NICAM_ERROR_LOW, 0x14); |
187 | saa_writeb(SAA7134_NICAM_ERROR_HIGH, 0x50); | 187 | saa_writeb(SAA7134_NICAM_ERROR_HIGH, 0x50); |
@@ -809,7 +809,12 @@ static int tvaudio_thread_ddep(void *data) | |||
809 | dprintk("ddep override: %s\n",stdres[audio_ddep]); | 809 | dprintk("ddep override: %s\n",stdres[audio_ddep]); |
810 | } else if (&card(dev).radio == dev->input) { | 810 | } else if (&card(dev).radio == dev->input) { |
811 | dprintk("FM Radio\n"); | 811 | dprintk("FM Radio\n"); |
812 | norms = (0x0f << 2) | 0x01; | 812 | if (dev->tuner_type == TUNER_PHILIPS_TDA8290) { |
813 | norms = (0x11 << 2) | 0x01; | ||
814 | saa_dsp_writel(dev, 0x42c >> 2, 0x729555); | ||
815 | } else { | ||
816 | norms = (0x0f << 2) | 0x01; | ||
817 | } | ||
813 | } else { | 818 | } else { |
814 | /* (let chip) scan for sound carrier */ | 819 | /* (let chip) scan for sound carrier */ |
815 | norms = 0; | 820 | norms = 0; |
diff --git a/drivers/media/video/tda8290.c b/drivers/media/video/tda8290.c index 2498b76df429..7b4fb282ac82 100644 --- a/drivers/media/video/tda8290.c +++ b/drivers/media/video/tda8290.c | |||
@@ -567,8 +567,8 @@ int tda8290_init(struct i2c_client *c) | |||
567 | } | 567 | } |
568 | tuner_info("tuner: type set to %s\n", c->name); | 568 | tuner_info("tuner: type set to %s\n", c->name); |
569 | 569 | ||
570 | t->tv_freq = set_tv_freq; | 570 | t->set_tv_freq = set_tv_freq; |
571 | t->radio_freq = set_radio_freq; | 571 | t->set_radio_freq = set_radio_freq; |
572 | t->has_signal = has_signal; | 572 | t->has_signal = has_signal; |
573 | t->standby = standby; | 573 | t->standby = standby; |
574 | t->tda827x_lpsel = 0; | 574 | t->tda827x_lpsel = 0; |
diff --git a/drivers/media/video/tea5767.c b/drivers/media/video/tea5767.c index 921fe72f23d5..c2b98f81c192 100644 --- a/drivers/media/video/tea5767.c +++ b/drivers/media/video/tea5767.c | |||
@@ -62,7 +62,7 @@ extern int tuner_debug; | |||
62 | 62 | ||
63 | #define TEA5767_PORT1_HIGH 0x01 | 63 | #define TEA5767_PORT1_HIGH 0x01 |
64 | 64 | ||
65 | /* Forth register */ | 65 | /* Fourth register */ |
66 | #define TEA5767_PORT2_HIGH 0x80 | 66 | #define TEA5767_PORT2_HIGH 0x80 |
67 | /* Chips stops working. Only I2C bus remains on */ | 67 | /* Chips stops working. Only I2C bus remains on */ |
68 | #define TEA5767_STDBY 0x40 | 68 | #define TEA5767_STDBY 0x40 |
@@ -85,7 +85,7 @@ extern int tuner_debug; | |||
85 | /* If activate PORT 1 indicates SEARCH or else it is used as PORT1 */ | 85 | /* If activate PORT 1 indicates SEARCH or else it is used as PORT1 */ |
86 | #define TEA5767_SRCH_IND 0x01 | 86 | #define TEA5767_SRCH_IND 0x01 |
87 | 87 | ||
88 | /* Fiveth register */ | 88 | /* Fifth register */ |
89 | 89 | ||
90 | /* By activating, it will use Xtal at 13 MHz as reference for divider */ | 90 | /* By activating, it will use Xtal at 13 MHz as reference for divider */ |
91 | #define TEA5767_PLLREF_ENABLE 0x80 | 91 | #define TEA5767_PLLREF_ENABLE 0x80 |
@@ -109,13 +109,13 @@ extern int tuner_debug; | |||
109 | #define TEA5767_STEREO_MASK 0x80 | 109 | #define TEA5767_STEREO_MASK 0x80 |
110 | #define TEA5767_IF_CNTR_MASK 0x7f | 110 | #define TEA5767_IF_CNTR_MASK 0x7f |
111 | 111 | ||
112 | /* Four register */ | 112 | /* Fourth register */ |
113 | #define TEA5767_ADC_LEVEL_MASK 0xf0 | 113 | #define TEA5767_ADC_LEVEL_MASK 0xf0 |
114 | 114 | ||
115 | /* should be 0 */ | 115 | /* should be 0 */ |
116 | #define TEA5767_CHIP_ID_MASK 0x0f | 116 | #define TEA5767_CHIP_ID_MASK 0x0f |
117 | 117 | ||
118 | /* Fiveth register */ | 118 | /* Fifth register */ |
119 | /* Reserved for future extensions */ | 119 | /* Reserved for future extensions */ |
120 | #define TEA5767_RESERVED_MASK 0xff | 120 | #define TEA5767_RESERVED_MASK 0xff |
121 | 121 | ||
@@ -220,19 +220,19 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq) | |||
220 | tuner_dbg ("TEA5767 radio HIGH LO inject xtal @ 13 MHz\n"); | 220 | tuner_dbg ("TEA5767 radio HIGH LO inject xtal @ 13 MHz\n"); |
221 | buffer[2] |= TEA5767_HIGH_LO_INJECT; | 221 | buffer[2] |= TEA5767_HIGH_LO_INJECT; |
222 | buffer[4] |= TEA5767_PLLREF_ENABLE; | 222 | buffer[4] |= TEA5767_PLLREF_ENABLE; |
223 | div = (frq * 4000 / 16 + 700000 + 225000 + 25000) / 50000; | 223 | div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000; |
224 | break; | 224 | break; |
225 | case TEA5767_LOW_LO_13MHz: | 225 | case TEA5767_LOW_LO_13MHz: |
226 | tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 13 MHz\n"); | 226 | tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 13 MHz\n"); |
227 | 227 | ||
228 | buffer[4] |= TEA5767_PLLREF_ENABLE; | 228 | buffer[4] |= TEA5767_PLLREF_ENABLE; |
229 | div = (frq * 4000 / 16 - 700000 - 225000 + 25000) / 50000; | 229 | div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000; |
230 | break; | 230 | break; |
231 | case TEA5767_LOW_LO_32768: | 231 | case TEA5767_LOW_LO_32768: |
232 | tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 32,768 MHz\n"); | 232 | tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 32,768 MHz\n"); |
233 | buffer[3] |= TEA5767_XTAL_32768; | 233 | buffer[3] |= TEA5767_XTAL_32768; |
234 | /* const 700=4000*175 Khz - to adjust freq to right value */ | 234 | /* const 700=4000*175 Khz - to adjust freq to right value */ |
235 | div = ((frq * 4000 / 16 - 700000 - 225000) + 16384) >> 15; | 235 | div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15; |
236 | break; | 236 | break; |
237 | case TEA5767_HIGH_LO_32768: | 237 | case TEA5767_HIGH_LO_32768: |
238 | default: | 238 | default: |
@@ -350,8 +350,8 @@ int tea5767_tuner_init(struct i2c_client *c) | |||
350 | tuner_info("type set to %d (%s)\n", t->type, "Philips TEA5767HN FM Radio"); | 350 | tuner_info("type set to %d (%s)\n", t->type, "Philips TEA5767HN FM Radio"); |
351 | strlcpy(c->name, "tea5767", sizeof(c->name)); | 351 | strlcpy(c->name, "tea5767", sizeof(c->name)); |
352 | 352 | ||
353 | t->tv_freq = set_tv_freq; | 353 | t->set_tv_freq = set_tv_freq; |
354 | t->radio_freq = set_radio_freq; | 354 | t->set_radio_freq = set_radio_freq; |
355 | t->has_signal = tea5767_signal; | 355 | t->has_signal = tea5767_signal; |
356 | t->is_stereo = tea5767_stereo; | 356 | t->is_stereo = tea5767_stereo; |
357 | t->standby = tea5767_standby; | 357 | t->standby = tea5767_standby; |
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c index f30ef79d795e..2995b22acb43 100644 --- a/drivers/media/video/tuner-core.c +++ b/drivers/media/video/tuner-core.c | |||
@@ -82,7 +82,7 @@ static void set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
82 | tuner_warn ("tuner type not set\n"); | 82 | tuner_warn ("tuner type not set\n"); |
83 | return; | 83 | return; |
84 | } | 84 | } |
85 | if (NULL == t->tv_freq) { | 85 | if (NULL == t->set_tv_freq) { |
86 | tuner_warn ("Tuner has no way to set tv freq\n"); | 86 | tuner_warn ("Tuner has no way to set tv freq\n"); |
87 | return; | 87 | return; |
88 | } | 88 | } |
@@ -90,8 +90,14 @@ static void set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
90 | tuner_dbg ("TV freq (%d.%02d) out of range (%d-%d)\n", | 90 | tuner_dbg ("TV freq (%d.%02d) out of range (%d-%d)\n", |
91 | freq / 16, freq % 16 * 100 / 16, tv_range[0], | 91 | freq / 16, freq % 16 * 100 / 16, tv_range[0], |
92 | tv_range[1]); | 92 | tv_range[1]); |
93 | /* V4L2 spec: if the freq is not possible then the closest | ||
94 | possible value should be selected */ | ||
95 | if (freq < tv_range[0] * 16) | ||
96 | freq = tv_range[0] * 16; | ||
97 | else | ||
98 | freq = tv_range[1] * 16; | ||
93 | } | 99 | } |
94 | t->tv_freq(c, freq); | 100 | t->set_tv_freq(c, freq); |
95 | } | 101 | } |
96 | 102 | ||
97 | static void set_radio_freq(struct i2c_client *c, unsigned int freq) | 103 | static void set_radio_freq(struct i2c_client *c, unsigned int freq) |
@@ -102,18 +108,23 @@ static void set_radio_freq(struct i2c_client *c, unsigned int freq) | |||
102 | tuner_warn ("tuner type not set\n"); | 108 | tuner_warn ("tuner type not set\n"); |
103 | return; | 109 | return; |
104 | } | 110 | } |
105 | if (NULL == t->radio_freq) { | 111 | if (NULL == t->set_radio_freq) { |
106 | tuner_warn ("tuner has no way to set radio frequency\n"); | 112 | tuner_warn ("tuner has no way to set radio frequency\n"); |
107 | return; | 113 | return; |
108 | } | 114 | } |
109 | if (freq <= radio_range[0] * 16000 || freq >= radio_range[1] * 16000) { | 115 | if (freq < radio_range[0] * 16000 || freq > radio_range[1] * 16000) { |
110 | tuner_dbg ("radio freq (%d.%02d) out of range (%d-%d)\n", | 116 | tuner_dbg ("radio freq (%d.%02d) out of range (%d-%d)\n", |
111 | freq / 16000, freq % 16000 * 100 / 16000, | 117 | freq / 16000, freq % 16000 * 100 / 16000, |
112 | radio_range[0], radio_range[1]); | 118 | radio_range[0], radio_range[1]); |
119 | /* V4L2 spec: if the freq is not possible then the closest | ||
120 | possible value should be selected */ | ||
121 | if (freq < radio_range[0] * 16000) | ||
122 | freq = radio_range[0] * 16000; | ||
123 | else | ||
124 | freq = radio_range[1] * 16000; | ||
113 | } | 125 | } |
114 | 126 | ||
115 | t->radio_freq(c, freq); | 127 | t->set_radio_freq(c, freq); |
116 | return; | ||
117 | } | 128 | } |
118 | 129 | ||
119 | static void set_freq(struct i2c_client *c, unsigned long freq) | 130 | static void set_freq(struct i2c_client *c, unsigned long freq) |
@@ -125,15 +136,16 @@ static void set_freq(struct i2c_client *c, unsigned long freq) | |||
125 | tuner_dbg("radio freq set to %lu.%02lu\n", | 136 | tuner_dbg("radio freq set to %lu.%02lu\n", |
126 | freq / 16000, freq % 16000 * 100 / 16000); | 137 | freq / 16000, freq % 16000 * 100 / 16000); |
127 | set_radio_freq(c, freq); | 138 | set_radio_freq(c, freq); |
139 | t->radio_freq = freq; | ||
128 | break; | 140 | break; |
129 | case V4L2_TUNER_ANALOG_TV: | 141 | case V4L2_TUNER_ANALOG_TV: |
130 | case V4L2_TUNER_DIGITAL_TV: | 142 | case V4L2_TUNER_DIGITAL_TV: |
131 | tuner_dbg("tv freq set to %lu.%02lu\n", | 143 | tuner_dbg("tv freq set to %lu.%02lu\n", |
132 | freq / 16, freq % 16 * 100 / 16); | 144 | freq / 16, freq % 16 * 100 / 16); |
133 | set_tv_freq(c, freq); | 145 | set_tv_freq(c, freq); |
146 | t->tv_freq = freq; | ||
134 | break; | 147 | break; |
135 | } | 148 | } |
136 | t->freq = freq; | ||
137 | } | 149 | } |
138 | 150 | ||
139 | static void set_type(struct i2c_client *c, unsigned int type, | 151 | static void set_type(struct i2c_client *c, unsigned int type, |
@@ -212,7 +224,7 @@ static void set_type(struct i2c_client *c, unsigned int type, | |||
212 | if (t->mode_mask == T_UNINITIALIZED) | 224 | if (t->mode_mask == T_UNINITIALIZED) |
213 | t->mode_mask = new_mode_mask; | 225 | t->mode_mask = new_mode_mask; |
214 | 226 | ||
215 | set_freq(c, t->freq); | 227 | set_freq(c, (V4L2_TUNER_RADIO == t->mode) ? t->radio_freq : t->tv_freq); |
216 | tuner_dbg("%s %s I2C addr 0x%02x with type %d used for 0x%02x\n", | 228 | tuner_dbg("%s %s I2C addr 0x%02x with type %d used for 0x%02x\n", |
217 | c->adapter->name, c->driver->driver.name, c->addr << 1, type, | 229 | c->adapter->name, c->driver->driver.name, c->addr << 1, type, |
218 | t->mode_mask); | 230 | t->mode_mask); |
@@ -377,11 +389,11 @@ static void tuner_status(struct i2c_client *client) | |||
377 | default: p = "undefined"; break; | 389 | default: p = "undefined"; break; |
378 | } | 390 | } |
379 | if (t->mode == V4L2_TUNER_RADIO) { | 391 | if (t->mode == V4L2_TUNER_RADIO) { |
380 | freq = t->freq / 16000; | 392 | freq = t->radio_freq / 16000; |
381 | freq_fraction = (t->freq % 16000) * 100 / 16000; | 393 | freq_fraction = (t->radio_freq % 16000) * 100 / 16000; |
382 | } else { | 394 | } else { |
383 | freq = t->freq / 16; | 395 | freq = t->tv_freq / 16; |
384 | freq_fraction = (t->freq % 16) * 100 / 16; | 396 | freq_fraction = (t->tv_freq % 16) * 100 / 16; |
385 | } | 397 | } |
386 | tuner_info("Tuner mode: %s\n", p); | 398 | tuner_info("Tuner mode: %s\n", p); |
387 | tuner_info("Frequency: %lu.%02lu MHz\n", freq, freq_fraction); | 399 | tuner_info("Frequency: %lu.%02lu MHz\n", freq, freq_fraction); |
@@ -456,7 +468,7 @@ static int tuner_attach(struct i2c_adapter *adap, int addr, int kind) | |||
456 | t->type = TUNER_TEA5767; | 468 | t->type = TUNER_TEA5767; |
457 | t->mode_mask = T_RADIO; | 469 | t->mode_mask = T_RADIO; |
458 | t->mode = T_STANDBY; | 470 | t->mode = T_STANDBY; |
459 | t->freq = 87.5 * 16; /* Sets freq to FM range */ | 471 | t->radio_freq = 87.5 * 16000; /* Sets freq to FM range */ |
460 | default_mode_mask &= ~T_RADIO; | 472 | default_mode_mask &= ~T_RADIO; |
461 | 473 | ||
462 | goto register_client; | 474 | goto register_client; |
@@ -469,7 +481,8 @@ static int tuner_attach(struct i2c_adapter *adap, int addr, int kind) | |||
469 | if (default_mode_mask != T_UNINITIALIZED) { | 481 | if (default_mode_mask != T_UNINITIALIZED) { |
470 | tuner_dbg ("Setting mode_mask to 0x%02x\n", default_mode_mask); | 482 | tuner_dbg ("Setting mode_mask to 0x%02x\n", default_mode_mask); |
471 | t->mode_mask = default_mode_mask; | 483 | t->mode_mask = default_mode_mask; |
472 | t->freq = 400 * 16; /* Sets freq to VHF High */ | 484 | t->tv_freq = 400 * 16; /* Sets freq to VHF High */ |
485 | t->radio_freq = 87.5 * 16000; /* Sets freq to FM range */ | ||
473 | default_mode_mask = T_UNINITIALIZED; | 486 | default_mode_mask = T_UNINITIALIZED; |
474 | } | 487 | } |
475 | 488 | ||
@@ -565,16 +578,18 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
565 | set_addr(client, (struct tuner_setup *)arg); | 578 | set_addr(client, (struct tuner_setup *)arg); |
566 | break; | 579 | break; |
567 | case AUDC_SET_RADIO: | 580 | case AUDC_SET_RADIO: |
568 | set_mode(client,t,V4L2_TUNER_RADIO, "AUDC_SET_RADIO"); | 581 | if (set_mode(client, t, V4L2_TUNER_RADIO, "AUDC_SET_RADIO") |
582 | == EINVAL) | ||
583 | return 0; | ||
584 | if (t->radio_freq) | ||
585 | set_freq(client, t->radio_freq); | ||
569 | break; | 586 | break; |
570 | case TUNER_SET_STANDBY: | 587 | case TUNER_SET_STANDBY: |
571 | { | 588 | if (check_mode(t, "TUNER_SET_STANDBY") == EINVAL) |
572 | if (check_mode(t, "TUNER_SET_STANDBY") == EINVAL) | 589 | return 0; |
573 | return 0; | 590 | if (t->standby) |
574 | if (t->standby) | 591 | t->standby (client); |
575 | t->standby (client); | 592 | break; |
576 | break; | ||
577 | } | ||
578 | case VIDIOCSAUDIO: | 593 | case VIDIOCSAUDIO: |
579 | if (check_mode(t, "VIDIOCSAUDIO") == EINVAL) | 594 | if (check_mode(t, "VIDIOCSAUDIO") == EINVAL) |
580 | return 0; | 595 | return 0; |
@@ -583,7 +598,6 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
583 | 598 | ||
584 | /* Should be implemented, since bttv calls it */ | 599 | /* Should be implemented, since bttv calls it */ |
585 | tuner_dbg("VIDIOCSAUDIO not implemented.\n"); | 600 | tuner_dbg("VIDIOCSAUDIO not implemented.\n"); |
586 | |||
587 | break; | 601 | break; |
588 | /* --- v4l ioctls --- */ | 602 | /* --- v4l ioctls --- */ |
589 | /* take care: bttv does userspace copying, we'll get a | 603 | /* take care: bttv does userspace copying, we'll get a |
@@ -609,8 +623,8 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
609 | if (vc->norm < ARRAY_SIZE(map)) | 623 | if (vc->norm < ARRAY_SIZE(map)) |
610 | t->std = map[vc->norm]; | 624 | t->std = map[vc->norm]; |
611 | tuner_fixup_std(t); | 625 | tuner_fixup_std(t); |
612 | if (t->freq) | 626 | if (t->tv_freq) |
613 | set_tv_freq(client, t->freq); | 627 | set_tv_freq(client, t->tv_freq); |
614 | return 0; | 628 | return 0; |
615 | } | 629 | } |
616 | case VIDIOCSFREQ: | 630 | case VIDIOCSFREQ: |
@@ -684,15 +698,14 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
684 | 698 | ||
685 | t->std = *id; | 699 | t->std = *id; |
686 | tuner_fixup_std(t); | 700 | tuner_fixup_std(t); |
687 | if (t->freq) | 701 | if (t->tv_freq) |
688 | set_freq(client, t->freq); | 702 | set_freq(client, t->tv_freq); |
689 | break; | 703 | break; |
690 | } | 704 | } |
691 | case VIDIOC_S_FREQUENCY: | 705 | case VIDIOC_S_FREQUENCY: |
692 | { | 706 | { |
693 | struct v4l2_frequency *f = arg; | 707 | struct v4l2_frequency *f = arg; |
694 | 708 | ||
695 | t->freq = f->frequency; | ||
696 | switch_v4l2(); | 709 | switch_v4l2(); |
697 | if (V4L2_TUNER_RADIO == f->type && | 710 | if (V4L2_TUNER_RADIO == f->type && |
698 | V4L2_TUNER_RADIO != t->mode) { | 711 | V4L2_TUNER_RADIO != t->mode) { |
@@ -700,7 +713,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
700 | == EINVAL) | 713 | == EINVAL) |
701 | return 0; | 714 | return 0; |
702 | } | 715 | } |
703 | set_freq(client,t->freq); | 716 | set_freq(client,f->frequency); |
704 | 717 | ||
705 | break; | 718 | break; |
706 | } | 719 | } |
@@ -712,7 +725,8 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
712 | return 0; | 725 | return 0; |
713 | switch_v4l2(); | 726 | switch_v4l2(); |
714 | f->type = t->mode; | 727 | f->type = t->mode; |
715 | f->frequency = t->freq; | 728 | f->frequency = (V4L2_TUNER_RADIO == t->mode) ? |
729 | t->radio_freq : t->tv_freq; | ||
716 | break; | 730 | break; |
717 | } | 731 | } |
718 | case VIDIOC_G_TUNER: | 732 | case VIDIOC_G_TUNER: |
@@ -763,7 +777,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) | |||
763 | 777 | ||
764 | if (V4L2_TUNER_RADIO == t->mode) { | 778 | if (V4L2_TUNER_RADIO == t->mode) { |
765 | t->audmode = tuner->audmode; | 779 | t->audmode = tuner->audmode; |
766 | set_radio_freq(client, t->freq); | 780 | set_radio_freq(client, t->radio_freq); |
767 | } | 781 | } |
768 | break; | 782 | break; |
769 | } | 783 | } |
@@ -791,8 +805,13 @@ static int tuner_resume(struct device *dev) | |||
791 | struct tuner *t = i2c_get_clientdata (c); | 805 | struct tuner *t = i2c_get_clientdata (c); |
792 | 806 | ||
793 | tuner_dbg ("resume\n"); | 807 | tuner_dbg ("resume\n"); |
794 | if (t->freq) | 808 | if (V4L2_TUNER_RADIO == t->mode) { |
795 | set_freq(c, t->freq); | 809 | if (t->radio_freq) |
810 | set_freq(c, t->radio_freq); | ||
811 | } else { | ||
812 | if (t->tv_freq) | ||
813 | set_freq(c, t->tv_freq); | ||
814 | } | ||
796 | return 0; | 815 | return 0; |
797 | } | 816 | } |
798 | 817 | ||
diff --git a/drivers/media/video/tuner-simple.c b/drivers/media/video/tuner-simple.c index e5fb74365836..37977ff49780 100644 --- a/drivers/media/video/tuner-simple.c +++ b/drivers/media/video/tuner-simple.c | |||
@@ -79,722 +79,16 @@ MODULE_PARM_DESC(offset,"Allows to specify an offset for tuner"); | |||
79 | #define TUNER_PLL_LOCKED 0x40 | 79 | #define TUNER_PLL_LOCKED 0x40 |
80 | #define TUNER_STEREO_MK3 0x04 | 80 | #define TUNER_STEREO_MK3 0x04 |
81 | 81 | ||
82 | #define TUNER_MAX_RANGES 3 | 82 | #define TUNER_PARAM_ANALOG 0 /* to be removed */ |
83 | 83 | /* FIXME: | |
84 | /* ---------------------------------------------------------------------- */ | 84 | * Right now, all tuners are using the first tuner_params[] array element |
85 | 85 | * for analog mode. In the future, we will be merging similar tuner | |
86 | struct tunertype | 86 | * definitions together, such that each tuner definition will have a |
87 | { | 87 | * tuner_params struct for each available video standard. At that point, |
88 | char *name; | 88 | * TUNER_PARAM_ANALOG will be removed, and the tuner_params[] array |
89 | 89 | * element will be chosen based on the video standard in use. | |
90 | int count; | 90 | * |
91 | struct { | ||
92 | unsigned short thresh; | ||
93 | unsigned char cb; | ||
94 | } ranges[TUNER_MAX_RANGES]; | ||
95 | unsigned char config; | ||
96 | }; | ||
97 | |||
98 | /* | ||
99 | * The floats in the tuner struct are computed at compile time | ||
100 | * by gcc and cast back to integers. Thus we don't violate the | ||
101 | * "no float in kernel" rule. | ||
102 | */ | 91 | */ |
103 | static struct tunertype tuners[] = { | ||
104 | /* 0-9 */ | ||
105 | [TUNER_TEMIC_PAL] = { /* TEMIC PAL */ | ||
106 | .name = "Temic PAL (4002 FH5)", | ||
107 | .count = 3, | ||
108 | .ranges = { | ||
109 | { 16 * 140.25 /*MHz*/, 0x02, }, | ||
110 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
111 | { 16 * 999.99 , 0x01, }, | ||
112 | }, | ||
113 | .config = 0x8e, | ||
114 | }, | ||
115 | [TUNER_PHILIPS_PAL_I] = { /* Philips PAL_I */ | ||
116 | .name = "Philips PAL_I (FI1246 and compatibles)", | ||
117 | .count = 3, | ||
118 | .ranges = { | ||
119 | { 16 * 140.25 /*MHz*/, 0xa0, }, | ||
120 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
121 | { 16 * 999.99 , 0x30, }, | ||
122 | }, | ||
123 | .config = 0x8e, | ||
124 | }, | ||
125 | [TUNER_PHILIPS_NTSC] = { /* Philips NTSC */ | ||
126 | .name = "Philips NTSC (FI1236,FM1236 and compatibles)", | ||
127 | .count = 3, | ||
128 | .ranges = { | ||
129 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
130 | { 16 * 451.25 /*MHz*/, 0x90, }, | ||
131 | { 16 * 999.99 , 0x30, }, | ||
132 | }, | ||
133 | .config = 0x8e, | ||
134 | }, | ||
135 | [TUNER_PHILIPS_SECAM] = { /* Philips SECAM */ | ||
136 | .name = "Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF)", | ||
137 | .count = 3, | ||
138 | .ranges = { | ||
139 | { 16 * 168.25 /*MHz*/, 0xa7, }, | ||
140 | { 16 * 447.25 /*MHz*/, 0x97, }, | ||
141 | { 16 * 999.99 , 0x37, }, | ||
142 | }, | ||
143 | .config = 0x8e, | ||
144 | }, | ||
145 | [TUNER_ABSENT] = { /* Tuner Absent */ | ||
146 | .name = "NoTuner", | ||
147 | .count = 1, | ||
148 | .ranges = { | ||
149 | { 0, 0x00, }, | ||
150 | }, | ||
151 | .config = 0x00, | ||
152 | }, | ||
153 | [TUNER_PHILIPS_PAL] = { /* Philips PAL */ | ||
154 | .name = "Philips PAL_BG (FI1216 and compatibles)", | ||
155 | .count = 3, | ||
156 | .ranges = { | ||
157 | { 16 * 168.25 /*MHz*/, 0xa0, }, | ||
158 | { 16 * 447.25 /*MHz*/, 0x90, }, | ||
159 | { 16 * 999.99 , 0x30, }, | ||
160 | }, | ||
161 | .config = 0x8e, | ||
162 | }, | ||
163 | [TUNER_TEMIC_NTSC] = { /* TEMIC NTSC */ | ||
164 | .name = "Temic NTSC (4032 FY5)", | ||
165 | .count = 3, | ||
166 | .ranges = { | ||
167 | { 16 * 157.25 /*MHz*/, 0x02, }, | ||
168 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
169 | { 16 * 999.99 , 0x01, }, | ||
170 | }, | ||
171 | .config = 0x8e, | ||
172 | }, | ||
173 | [TUNER_TEMIC_PAL_I] = { /* TEMIC PAL_I */ | ||
174 | .name = "Temic PAL_I (4062 FY5)", | ||
175 | .count = 3, | ||
176 | .ranges = { | ||
177 | { 16 * 170.00 /*MHz*/, 0x02, }, | ||
178 | { 16 * 450.00 /*MHz*/, 0x04, }, | ||
179 | { 16 * 999.99 , 0x01, }, | ||
180 | }, | ||
181 | .config = 0x8e, | ||
182 | }, | ||
183 | [TUNER_TEMIC_4036FY5_NTSC] = { /* TEMIC NTSC */ | ||
184 | .name = "Temic NTSC (4036 FY5)", | ||
185 | .count = 3, | ||
186 | .ranges = { | ||
187 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
188 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
189 | { 16 * 999.99 , 0x30, }, | ||
190 | }, | ||
191 | .config = 0x8e, | ||
192 | }, | ||
193 | [TUNER_ALPS_TSBH1_NTSC] = { /* TEMIC NTSC */ | ||
194 | .name = "Alps HSBH1", | ||
195 | .count = 3, | ||
196 | .ranges = { | ||
197 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
198 | { 16 * 385.25 /*MHz*/, 0x02, }, | ||
199 | { 16 * 999.99 , 0x08, }, | ||
200 | }, | ||
201 | .config = 0x8e, | ||
202 | }, | ||
203 | |||
204 | /* 10-19 */ | ||
205 | [TUNER_ALPS_TSBE1_PAL] = { /* TEMIC PAL */ | ||
206 | .name = "Alps TSBE1", | ||
207 | .count = 3, | ||
208 | .ranges = { | ||
209 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
210 | { 16 * 385.25 /*MHz*/, 0x02, }, | ||
211 | { 16 * 999.99 , 0x08, }, | ||
212 | }, | ||
213 | .config = 0x8e, | ||
214 | }, | ||
215 | [TUNER_ALPS_TSBB5_PAL_I] = { /* Alps PAL_I */ | ||
216 | .name = "Alps TSBB5", | ||
217 | .count = 3, | ||
218 | .ranges = { | ||
219 | { 16 * 133.25 /*MHz*/, 0x01, }, | ||
220 | { 16 * 351.25 /*MHz*/, 0x02, }, | ||
221 | { 16 * 999.99 , 0x08, }, | ||
222 | }, | ||
223 | .config = 0x8e, | ||
224 | }, | ||
225 | [TUNER_ALPS_TSBE5_PAL] = { /* Alps PAL */ | ||
226 | .name = "Alps TSBE5", | ||
227 | .count = 3, | ||
228 | .ranges = { | ||
229 | { 16 * 133.25 /*MHz*/, 0x01, }, | ||
230 | { 16 * 351.25 /*MHz*/, 0x02, }, | ||
231 | { 16 * 999.99 , 0x08, }, | ||
232 | }, | ||
233 | .config = 0x8e, | ||
234 | }, | ||
235 | [TUNER_ALPS_TSBC5_PAL] = { /* Alps PAL */ | ||
236 | .name = "Alps TSBC5", | ||
237 | .count = 3, | ||
238 | .ranges = { | ||
239 | { 16 * 133.25 /*MHz*/, 0x01, }, | ||
240 | { 16 * 351.25 /*MHz*/, 0x02, }, | ||
241 | { 16 * 999.99 , 0x08, }, | ||
242 | }, | ||
243 | .config = 0x8e, | ||
244 | }, | ||
245 | [TUNER_TEMIC_4006FH5_PAL] = { /* TEMIC PAL */ | ||
246 | .name = "Temic PAL_BG (4006FH5)", | ||
247 | .count = 3, | ||
248 | .ranges = { | ||
249 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
250 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
251 | { 16 * 999.99 , 0x30, }, | ||
252 | }, | ||
253 | .config = 0x8e, | ||
254 | }, | ||
255 | [TUNER_ALPS_TSHC6_NTSC] = { /* Alps NTSC */ | ||
256 | .name = "Alps TSCH6", | ||
257 | .count = 3, | ||
258 | .ranges = { | ||
259 | { 16 * 137.25 /*MHz*/, 0x14, }, | ||
260 | { 16 * 385.25 /*MHz*/, 0x12, }, | ||
261 | { 16 * 999.99 , 0x11, }, | ||
262 | }, | ||
263 | .config = 0x8e, | ||
264 | }, | ||
265 | [TUNER_TEMIC_PAL_DK] = { /* TEMIC PAL */ | ||
266 | .name = "Temic PAL_DK (4016 FY5)", | ||
267 | .count = 3, | ||
268 | .ranges = { | ||
269 | { 16 * 168.25 /*MHz*/, 0xa0, }, | ||
270 | { 16 * 456.25 /*MHz*/, 0x90, }, | ||
271 | { 16 * 999.99 , 0x30, }, | ||
272 | }, | ||
273 | .config = 0x8e, | ||
274 | }, | ||
275 | [TUNER_PHILIPS_NTSC_M] = { /* Philips NTSC */ | ||
276 | .name = "Philips NTSC_M (MK2)", | ||
277 | .count = 3, | ||
278 | .ranges = { | ||
279 | { 16 * 160.00 /*MHz*/, 0xa0, }, | ||
280 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
281 | { 16 * 999.99 , 0x30, }, | ||
282 | }, | ||
283 | .config = 0x8e, | ||
284 | }, | ||
285 | [TUNER_TEMIC_4066FY5_PAL_I] = { /* TEMIC PAL_I */ | ||
286 | .name = "Temic PAL_I (4066 FY5)", | ||
287 | .count = 3, | ||
288 | .ranges = { | ||
289 | { 16 * 169.00 /*MHz*/, 0xa0, }, | ||
290 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
291 | { 16 * 999.99 , 0x30, }, | ||
292 | }, | ||
293 | .config = 0x8e, | ||
294 | }, | ||
295 | [TUNER_TEMIC_4006FN5_MULTI_PAL] = { /* TEMIC PAL */ | ||
296 | .name = "Temic PAL* auto (4006 FN5)", | ||
297 | .count = 3, | ||
298 | .ranges = { | ||
299 | { 16 * 169.00 /*MHz*/, 0xa0, }, | ||
300 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
301 | { 16 * 999.99 , 0x30, }, | ||
302 | }, | ||
303 | .config = 0x8e, | ||
304 | }, | ||
305 | |||
306 | /* 20-29 */ | ||
307 | [TUNER_TEMIC_4009FR5_PAL] = { /* TEMIC PAL */ | ||
308 | .name = "Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)", | ||
309 | .count = 3, | ||
310 | .ranges = { | ||
311 | { 16 * 141.00 /*MHz*/, 0xa0, }, | ||
312 | { 16 * 464.00 /*MHz*/, 0x90, }, | ||
313 | { 16 * 999.99 , 0x30, }, | ||
314 | }, | ||
315 | .config = 0x8e, | ||
316 | }, | ||
317 | [TUNER_TEMIC_4039FR5_NTSC] = { /* TEMIC NTSC */ | ||
318 | .name = "Temic NTSC (4039 FR5)", | ||
319 | .count = 3, | ||
320 | .ranges = { | ||
321 | { 16 * 158.00 /*MHz*/, 0xa0, }, | ||
322 | { 16 * 453.00 /*MHz*/, 0x90, }, | ||
323 | { 16 * 999.99 , 0x30, }, | ||
324 | }, | ||
325 | .config = 0x8e, | ||
326 | }, | ||
327 | [TUNER_TEMIC_4046FM5] = { /* TEMIC PAL */ | ||
328 | .name = "Temic PAL/SECAM multi (4046 FM5)", | ||
329 | .count = 3, | ||
330 | .ranges = { | ||
331 | { 16 * 169.00 /*MHz*/, 0xa0, }, | ||
332 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
333 | { 16 * 999.99 , 0x30, }, | ||
334 | }, | ||
335 | .config = 0x8e, | ||
336 | }, | ||
337 | [TUNER_PHILIPS_PAL_DK] = { /* Philips PAL */ | ||
338 | .name = "Philips PAL_DK (FI1256 and compatibles)", | ||
339 | .count = 3, | ||
340 | .ranges = { | ||
341 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
342 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
343 | { 16 * 999.99 , 0x30, }, | ||
344 | }, | ||
345 | .config = 0x8e, | ||
346 | }, | ||
347 | [TUNER_PHILIPS_FQ1216ME] = { /* Philips PAL */ | ||
348 | .name = "Philips PAL/SECAM multi (FQ1216ME)", | ||
349 | .count = 3, | ||
350 | .ranges = { | ||
351 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
352 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
353 | { 16 * 999.99 , 0x30, }, | ||
354 | }, | ||
355 | .config = 0x8e, | ||
356 | }, | ||
357 | [TUNER_LG_PAL_I_FM] = { /* LGINNOTEK PAL_I */ | ||
358 | .name = "LG PAL_I+FM (TAPC-I001D)", | ||
359 | .count = 3, | ||
360 | .ranges = { | ||
361 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
362 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
363 | { 16 * 999.99 , 0x30, }, | ||
364 | }, | ||
365 | .config = 0x8e, | ||
366 | }, | ||
367 | [TUNER_LG_PAL_I] = { /* LGINNOTEK PAL_I */ | ||
368 | .name = "LG PAL_I (TAPC-I701D)", | ||
369 | .count = 3, | ||
370 | .ranges = { | ||
371 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
372 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
373 | { 16 * 999.99 , 0x30, }, | ||
374 | }, | ||
375 | .config = 0x8e, | ||
376 | }, | ||
377 | [TUNER_LG_NTSC_FM] = { /* LGINNOTEK NTSC */ | ||
378 | .name = "LG NTSC+FM (TPI8NSR01F)", | ||
379 | .count = 3, | ||
380 | .ranges = { | ||
381 | { 16 * 210.00 /*MHz*/, 0xa0, }, | ||
382 | { 16 * 497.00 /*MHz*/, 0x90, }, | ||
383 | { 16 * 999.99 , 0x30, }, | ||
384 | }, | ||
385 | .config = 0x8e, | ||
386 | }, | ||
387 | [TUNER_LG_PAL_FM] = { /* LGINNOTEK PAL */ | ||
388 | .name = "LG PAL_BG+FM (TPI8PSB01D)", | ||
389 | .count = 3, | ||
390 | .ranges = { | ||
391 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
392 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
393 | { 16 * 999.99 , 0x30, }, | ||
394 | }, | ||
395 | .config = 0x8e, | ||
396 | }, | ||
397 | [TUNER_LG_PAL] = { /* LGINNOTEK PAL */ | ||
398 | .name = "LG PAL_BG (TPI8PSB11D)", | ||
399 | .count = 3, | ||
400 | .ranges = { | ||
401 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
402 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
403 | { 16 * 999.99 , 0x30, }, | ||
404 | }, | ||
405 | .config = 0x8e, | ||
406 | }, | ||
407 | |||
408 | /* 30-39 */ | ||
409 | [TUNER_TEMIC_4009FN5_MULTI_PAL_FM] = { /* TEMIC PAL */ | ||
410 | .name = "Temic PAL* auto + FM (4009 FN5)", | ||
411 | .count = 3, | ||
412 | .ranges = { | ||
413 | { 16 * 141.00 /*MHz*/, 0xa0, }, | ||
414 | { 16 * 464.00 /*MHz*/, 0x90, }, | ||
415 | { 16 * 999.99 , 0x30, }, | ||
416 | }, | ||
417 | .config = 0x8e, | ||
418 | }, | ||
419 | [TUNER_SHARP_2U5JF5540_NTSC] = { /* SHARP NTSC */ | ||
420 | .name = "SHARP NTSC_JP (2U5JF5540)", | ||
421 | .count = 3, | ||
422 | .ranges = { | ||
423 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
424 | { 16 * 317.25 /*MHz*/, 0x02, }, | ||
425 | { 16 * 999.99 , 0x08, }, | ||
426 | }, | ||
427 | .config = 0x8e, | ||
428 | }, | ||
429 | [TUNER_Samsung_PAL_TCPM9091PD27] = { /* Samsung PAL */ | ||
430 | .name = "Samsung PAL TCPM9091PD27", | ||
431 | .count = 3, | ||
432 | .ranges = { | ||
433 | { 16 * 169 /*MHz*/, 0xa0, }, | ||
434 | { 16 * 464 /*MHz*/, 0x90, }, | ||
435 | { 16 * 999.99 , 0x30, }, | ||
436 | }, | ||
437 | .config = 0x8e, | ||
438 | }, | ||
439 | [TUNER_MT2032] = { /* Microtune PAL|NTSC */ | ||
440 | .name = "MT20xx universal", | ||
441 | /* see mt20xx.c for details */ }, | ||
442 | [TUNER_TEMIC_4106FH5] = { /* TEMIC PAL */ | ||
443 | .name = "Temic PAL_BG (4106 FH5)", | ||
444 | .count = 3, | ||
445 | .ranges = { | ||
446 | { 16 * 141.00 /*MHz*/, 0xa0, }, | ||
447 | { 16 * 464.00 /*MHz*/, 0x90, }, | ||
448 | { 16 * 999.99 , 0x30, }, | ||
449 | }, | ||
450 | .config = 0x8e, | ||
451 | }, | ||
452 | [TUNER_TEMIC_4012FY5] = { /* TEMIC PAL */ | ||
453 | .name = "Temic PAL_DK/SECAM_L (4012 FY5)", | ||
454 | .count = 3, | ||
455 | .ranges = { | ||
456 | { 16 * 140.25 /*MHz*/, 0x02, }, | ||
457 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
458 | { 16 * 999.99 , 0x01, }, | ||
459 | }, | ||
460 | .config = 0x8e, | ||
461 | }, | ||
462 | [TUNER_TEMIC_4136FY5] = { /* TEMIC NTSC */ | ||
463 | .name = "Temic NTSC (4136 FY5)", | ||
464 | .count = 3, | ||
465 | .ranges = { | ||
466 | { 16 * 158.00 /*MHz*/, 0xa0, }, | ||
467 | { 16 * 453.00 /*MHz*/, 0x90, }, | ||
468 | { 16 * 999.99 , 0x30, }, | ||
469 | }, | ||
470 | .config = 0x8e, | ||
471 | }, | ||
472 | [TUNER_LG_PAL_NEW_TAPC] = { /* LGINNOTEK PAL */ | ||
473 | .name = "LG PAL (newer TAPC series)", | ||
474 | .count = 3, | ||
475 | .ranges = { | ||
476 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
477 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
478 | { 16 * 999.99 , 0x08, }, | ||
479 | }, | ||
480 | .config = 0x8e, | ||
481 | }, | ||
482 | [TUNER_PHILIPS_FM1216ME_MK3] = { /* Philips PAL */ | ||
483 | .name = "Philips PAL/SECAM multi (FM1216ME MK3)", | ||
484 | .count = 3, | ||
485 | .ranges = { | ||
486 | { 16 * 158.00 /*MHz*/, 0x01, }, | ||
487 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
488 | { 16 * 999.99 , 0x04, }, | ||
489 | }, | ||
490 | .config = 0x8e, | ||
491 | }, | ||
492 | [TUNER_LG_NTSC_NEW_TAPC] = { /* LGINNOTEK NTSC */ | ||
493 | .name = "LG NTSC (newer TAPC series)", | ||
494 | .count = 3, | ||
495 | .ranges = { | ||
496 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
497 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
498 | { 16 * 999.99 , 0x08, }, | ||
499 | }, | ||
500 | .config = 0x8e, | ||
501 | }, | ||
502 | |||
503 | /* 40-49 */ | ||
504 | [TUNER_HITACHI_NTSC] = { /* HITACHI NTSC */ | ||
505 | .name = "HITACHI V7-J180AT", | ||
506 | .count = 3, | ||
507 | .ranges = { | ||
508 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
509 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
510 | { 16 * 999.99 , 0x08, }, | ||
511 | }, | ||
512 | .config = 0x8e, | ||
513 | }, | ||
514 | [TUNER_PHILIPS_PAL_MK] = { /* Philips PAL */ | ||
515 | .name = "Philips PAL_MK (FI1216 MK)", | ||
516 | .count = 3, | ||
517 | .ranges = { | ||
518 | { 16 * 140.25 /*MHz*/, 0x01, }, | ||
519 | { 16 * 463.25 /*MHz*/, 0xc2, }, | ||
520 | { 16 * 999.99 , 0xcf, }, | ||
521 | }, | ||
522 | .config = 0x8e, | ||
523 | }, | ||
524 | [TUNER_PHILIPS_ATSC] = { /* Philips ATSC */ | ||
525 | .name = "Philips 1236D ATSC/NTSC dual in", | ||
526 | .count = 3, | ||
527 | .ranges = { | ||
528 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
529 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
530 | { 16 * 999.99 , 0x30, }, | ||
531 | }, | ||
532 | .config = 0x8e, | ||
533 | }, | ||
534 | [TUNER_PHILIPS_FM1236_MK3] = { /* Philips NTSC */ | ||
535 | .name = "Philips NTSC MK3 (FM1236MK3 or FM1236/F)", | ||
536 | .count = 3, | ||
537 | .ranges = { | ||
538 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
539 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
540 | { 16 * 999.99 , 0x04, }, | ||
541 | }, | ||
542 | .config = 0x8e, | ||
543 | }, | ||
544 | [TUNER_PHILIPS_4IN1] = { /* Philips NTSC */ | ||
545 | .name = "Philips 4 in 1 (ATI TV Wonder Pro/Conexant)", | ||
546 | .count = 3, | ||
547 | .ranges = { | ||
548 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
549 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
550 | { 16 * 999.99 , 0x04, }, | ||
551 | }, | ||
552 | .config = 0x8e, | ||
553 | }, | ||
554 | [TUNER_MICROTUNE_4049FM5] = { /* Microtune PAL */ | ||
555 | .name = "Microtune 4049 FM5", | ||
556 | .count = 3, | ||
557 | .ranges = { | ||
558 | { 16 * 141.00 /*MHz*/, 0xa0, }, | ||
559 | { 16 * 464.00 /*MHz*/, 0x90, }, | ||
560 | { 16 * 999.99 , 0x30, }, | ||
561 | }, | ||
562 | .config = 0x8e, | ||
563 | }, | ||
564 | [TUNER_PANASONIC_VP27] = { /* Panasonic NTSC */ | ||
565 | .name = "Panasonic VP27s/ENGE4324D", | ||
566 | .count = 3, | ||
567 | .ranges = { | ||
568 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
569 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
570 | { 16 * 999.99 , 0x08, }, | ||
571 | }, | ||
572 | .config = 0xce, | ||
573 | }, | ||
574 | [TUNER_LG_NTSC_TAPE] = { /* LGINNOTEK NTSC */ | ||
575 | .name = "LG NTSC (TAPE series)", | ||
576 | .count = 3, | ||
577 | .ranges = { | ||
578 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
579 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
580 | { 16 * 999.99 , 0x04, }, | ||
581 | }, | ||
582 | .config = 0x8e, | ||
583 | }, | ||
584 | [TUNER_TNF_8831BGFF] = { /* Philips PAL */ | ||
585 | .name = "Tenna TNF 8831 BGFF)", | ||
586 | .count = 3, | ||
587 | .ranges = { | ||
588 | { 16 * 161.25 /*MHz*/, 0xa0, }, | ||
589 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
590 | { 16 * 999.99 , 0x30, }, | ||
591 | }, | ||
592 | .config = 0x8e, | ||
593 | }, | ||
594 | [TUNER_MICROTUNE_4042FI5] = { /* Microtune NTSC */ | ||
595 | .name = "Microtune 4042 FI5 ATSC/NTSC dual in", | ||
596 | .count = 3, | ||
597 | .ranges = { | ||
598 | { 16 * 162.00 /*MHz*/, 0xa2, }, | ||
599 | { 16 * 457.00 /*MHz*/, 0x94, }, | ||
600 | { 16 * 999.99 , 0x31, }, | ||
601 | }, | ||
602 | .config = 0x8e, | ||
603 | }, | ||
604 | |||
605 | /* 50-59 */ | ||
606 | [TUNER_TCL_2002N] = { /* TCL NTSC */ | ||
607 | .name = "TCL 2002N", | ||
608 | .count = 3, | ||
609 | .ranges = { | ||
610 | { 16 * 172.00 /*MHz*/, 0x01, }, | ||
611 | { 16 * 448.00 /*MHz*/, 0x02, }, | ||
612 | { 16 * 999.99 , 0x08, }, | ||
613 | }, | ||
614 | .config = 0x8e, | ||
615 | }, | ||
616 | [TUNER_PHILIPS_FM1256_IH3] = { /* Philips PAL */ | ||
617 | .name = "Philips PAL/SECAM_D (FM 1256 I-H3)", | ||
618 | .count = 3, | ||
619 | .ranges = { | ||
620 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
621 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
622 | { 16 * 999.99 , 0x04, }, | ||
623 | }, | ||
624 | .config = 0x8e, | ||
625 | }, | ||
626 | [TUNER_THOMSON_DTT7610] = { /* THOMSON ATSC */ | ||
627 | .name = "Thomson DTT 7610 (ATSC/NTSC)", | ||
628 | .count = 3, | ||
629 | .ranges = { | ||
630 | { 16 * 157.25 /*MHz*/, 0x39, }, | ||
631 | { 16 * 454.00 /*MHz*/, 0x3a, }, | ||
632 | { 16 * 999.99 , 0x3c, }, | ||
633 | }, | ||
634 | .config = 0x8e, | ||
635 | }, | ||
636 | [TUNER_PHILIPS_FQ1286] = { /* Philips NTSC */ | ||
637 | .name = "Philips FQ1286", | ||
638 | .count = 3, | ||
639 | .ranges = { | ||
640 | { 16 * 160.00 /*MHz*/, 0x41, }, | ||
641 | { 16 * 454.00 /*MHz*/, 0x42, }, | ||
642 | { 16 * 999.99 , 0x04, }, | ||
643 | }, | ||
644 | .config = 0x8e, | ||
645 | }, | ||
646 | [TUNER_PHILIPS_TDA8290] = { /* Philips PAL|NTSC */ | ||
647 | .name = "tda8290+75", | ||
648 | /* see tda8290.c for details */ }, | ||
649 | [TUNER_TCL_2002MB] = { /* TCL PAL */ | ||
650 | .name = "TCL 2002MB", | ||
651 | .count = 3, | ||
652 | .ranges = { | ||
653 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
654 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
655 | { 16 * 999.99 , 0x08, }, | ||
656 | }, | ||
657 | .config = 0xce, | ||
658 | }, | ||
659 | [TUNER_PHILIPS_FQ1216AME_MK4] = { /* Philips PAL */ | ||
660 | .name = "Philips PAL/SECAM multi (FQ1216AME MK4)", | ||
661 | .count = 3, | ||
662 | .ranges = { | ||
663 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
664 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
665 | { 16 * 999.99 , 0x04, }, | ||
666 | }, | ||
667 | .config = 0xce, | ||
668 | }, | ||
669 | [TUNER_PHILIPS_FQ1236A_MK4] = { /* Philips NTSC */ | ||
670 | .name = "Philips FQ1236A MK4", | ||
671 | .count = 3, | ||
672 | .ranges = { | ||
673 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
674 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
675 | { 16 * 999.99 , 0x04, }, | ||
676 | }, | ||
677 | .config = 0x8e, | ||
678 | }, | ||
679 | [TUNER_YMEC_TVF_8531MF] = { /* Philips NTSC */ | ||
680 | .name = "Ymec TVision TVF-8531MF/8831MF/8731MF", | ||
681 | .count = 3, | ||
682 | .ranges = { | ||
683 | { 16 * 160.00 /*MHz*/, 0xa0, }, | ||
684 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
685 | { 16 * 999.99 , 0x30, }, | ||
686 | }, | ||
687 | .config = 0x8e, | ||
688 | }, | ||
689 | [TUNER_YMEC_TVF_5533MF] = { /* Philips NTSC */ | ||
690 | .name = "Ymec TVision TVF-5533MF", | ||
691 | .count = 3, | ||
692 | .ranges = { | ||
693 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
694 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
695 | { 16 * 999.99 , 0x04, }, | ||
696 | }, | ||
697 | .config = 0x8e, | ||
698 | }, | ||
699 | |||
700 | /* 60-69 */ | ||
701 | [TUNER_THOMSON_DTT761X] = { /* THOMSON ATSC */ | ||
702 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ | ||
703 | .name = "Thomson DTT 761X (ATSC/NTSC)", | ||
704 | .count = 3, | ||
705 | .ranges = { | ||
706 | { 16 * 145.25 /*MHz*/, 0x39, }, | ||
707 | { 16 * 415.25 /*MHz*/, 0x3a, }, | ||
708 | { 16 * 999.99 , 0x3c, }, | ||
709 | }, | ||
710 | .config = 0x8e, | ||
711 | }, | ||
712 | [TUNER_TENA_9533_DI] = { /* Philips PAL */ | ||
713 | .name = "Tena TNF9533-D/IF/TNF9533-B/DF", | ||
714 | .count = 3, | ||
715 | .ranges = { | ||
716 | { 16 * 160.25 /*MHz*/, 0x01, }, | ||
717 | { 16 * 464.25 /*MHz*/, 0x02, }, | ||
718 | { 16 * 999.99 , 0x04, }, | ||
719 | }, | ||
720 | .config = 0x8e, | ||
721 | }, | ||
722 | [TUNER_TEA5767] = { /* Philips RADIO */ | ||
723 | .name = "Philips TEA5767HN FM Radio", | ||
724 | /* see tea5767.c for details */}, | ||
725 | [TUNER_PHILIPS_FMD1216ME_MK3] = { /* Philips PAL */ | ||
726 | .name = "Philips FMD1216ME MK3 Hybrid Tuner", | ||
727 | .count = 3, | ||
728 | .ranges = { | ||
729 | { 16 * 160.00 /*MHz*/, 0x51, }, | ||
730 | { 16 * 442.00 /*MHz*/, 0x52, }, | ||
731 | { 16 * 999.99 , 0x54, }, | ||
732 | }, | ||
733 | .config = 0x86, | ||
734 | }, | ||
735 | [TUNER_LG_TDVS_H062F] = { /* LGINNOTEK ATSC */ | ||
736 | .name = "LG TDVS-H062F/TUA6034", | ||
737 | .count = 3, | ||
738 | .ranges = { | ||
739 | { 16 * 160.00 /*MHz*/, 0x01 }, | ||
740 | { 16 * 455.00 /*MHz*/, 0x02 }, | ||
741 | { 16 * 999.99 , 0x04 }, | ||
742 | }, | ||
743 | .config = 0x8e, | ||
744 | }, | ||
745 | [TUNER_YMEC_TVF66T5_B_DFF] = { /* Philips PAL */ | ||
746 | .name = "Ymec TVF66T5-B/DFF", | ||
747 | .count = 3, | ||
748 | .ranges = { | ||
749 | { 16 * 160.25 /*MHz*/, 0x01, }, | ||
750 | { 16 * 464.25 /*MHz*/, 0x02, }, | ||
751 | { 16 * 999.99 , 0x08, }, | ||
752 | }, | ||
753 | .config = 0x8e, | ||
754 | }, | ||
755 | [TUNER_LG_NTSC_TALN_MINI] = { /* LGINNOTEK NTSC */ | ||
756 | .name = "LG NTSC (TALN mini series)", | ||
757 | .count = 3, | ||
758 | .ranges = { | ||
759 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
760 | { 16 * 373.25 /*MHz*/, 0x02, }, | ||
761 | { 16 * 999.99 , 0x08, }, | ||
762 | }, | ||
763 | .config = 0x8e, | ||
764 | }, | ||
765 | [TUNER_PHILIPS_TD1316] = { /* Philips PAL */ | ||
766 | .name = "Philips TD1316 Hybrid Tuner", | ||
767 | .count = 3, | ||
768 | .ranges = { | ||
769 | { 16 * 160.00 /*MHz*/, 0xa1, }, | ||
770 | { 16 * 442.00 /*MHz*/, 0xa2, }, | ||
771 | { 16 * 999.99 , 0xa4, }, | ||
772 | }, | ||
773 | .config = 0xc8, | ||
774 | }, | ||
775 | [TUNER_PHILIPS_TUV1236D] = { /* Philips ATSC */ | ||
776 | .name = "Philips TUV1236D ATSC/NTSC dual in", | ||
777 | .count = 3, | ||
778 | .ranges = { | ||
779 | { 16 * 157.25 /*MHz*/, 0x01, }, | ||
780 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
781 | { 16 * 999.99 , 0x04, }, | ||
782 | }, | ||
783 | .config = 0xce, | ||
784 | }, | ||
785 | [TUNER_TNF_5335MF] = { /* Philips NTSC */ | ||
786 | .name = "Tena TNF 5335 MF", | ||
787 | .count = 3, | ||
788 | .ranges = { | ||
789 | { 16 * 157.25 /*MHz*/, 0x01, }, | ||
790 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
791 | { 16 * 999.99 , 0x04, }, | ||
792 | }, | ||
793 | .config = 0x8e, | ||
794 | }, | ||
795 | }; | ||
796 | |||
797 | unsigned const int tuner_count = ARRAY_SIZE(tuners); | ||
798 | 92 | ||
799 | /* ---------------------------------------------------------------------- */ | 93 | /* ---------------------------------------------------------------------- */ |
800 | 94 | ||
@@ -842,16 +136,23 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
842 | u8 config, tuneraddr; | 136 | u8 config, tuneraddr; |
843 | u16 div; | 137 | u16 div; |
844 | struct tunertype *tun; | 138 | struct tunertype *tun; |
845 | unsigned char buffer[4]; | 139 | u8 buffer[4]; |
846 | int rc, IFPCoff, i; | 140 | int rc, IFPCoff, i, j; |
847 | 141 | ||
848 | tun = &tuners[t->type]; | 142 | tun = &tuners[t->type]; |
849 | for (i = 0; i < tun->count; i++) { | 143 | j = TUNER_PARAM_ANALOG; |
850 | if (freq > tun->ranges[i].thresh) | 144 | |
145 | for (i = 0; i < tun->params[j].count; i++) { | ||
146 | if (freq > tun->params[j].ranges[i].limit) | ||
851 | continue; | 147 | continue; |
852 | break; | 148 | break; |
853 | } | 149 | } |
854 | config = tun->ranges[i].cb; | 150 | if (i == tun->params[j].count) { |
151 | tuner_dbg("TV frequency out of range (%d > %d)", | ||
152 | freq, tun->params[j].ranges[i - 1].limit); | ||
153 | freq = tun->params[j].ranges[--i].limit; | ||
154 | } | ||
155 | config = tun->params[j].ranges[i].cb; | ||
855 | /* i == 0 -> VHF_LO */ | 156 | /* i == 0 -> VHF_LO */ |
856 | /* i == 1 -> VHF_HI */ | 157 | /* i == 1 -> VHF_HI */ |
857 | /* i == 2 -> UHF */ | 158 | /* i == 2 -> UHF */ |
@@ -914,7 +215,7 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
914 | 215 | ||
915 | case TUNER_MICROTUNE_4042FI5: | 216 | case TUNER_MICROTUNE_4042FI5: |
916 | /* Set the charge pump for fast tuning */ | 217 | /* Set the charge pump for fast tuning */ |
917 | tun->config |= TUNER_CHARGE_PUMP; | 218 | tun->params[j].config |= TUNER_CHARGE_PUMP; |
918 | break; | 219 | break; |
919 | 220 | ||
920 | case TUNER_PHILIPS_TUV1236D: | 221 | case TUNER_PHILIPS_TUV1236D: |
@@ -943,20 +244,6 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
943 | break; | 244 | break; |
944 | } | 245 | } |
945 | 246 | ||
946 | /* | ||
947 | * Philips FI1216MK2 remark from specification : | ||
948 | * for channel selection involving band switching, and to ensure | ||
949 | * smooth tuning to the desired channel without causing | ||
950 | * unnecessary charge pump action, it is recommended to consider | ||
951 | * the difference between wanted channel frequency and the | ||
952 | * current channel frequency. Unnecessary charge pump action | ||
953 | * will result in very low tuning voltage which may drive the | ||
954 | * oscillator to extreme conditions. | ||
955 | * | ||
956 | * Progfou: specification says to send config data before | ||
957 | * frequency in case (wanted frequency < current frequency). | ||
958 | */ | ||
959 | |||
960 | /* IFPCoff = Video Intermediate Frequency - Vif: | 247 | /* IFPCoff = Video Intermediate Frequency - Vif: |
961 | 940 =16*58.75 NTSC/J (Japan) | 248 | 940 =16*58.75 NTSC/J (Japan) |
962 | 732 =16*45.75 M/N STD | 249 | 732 =16*45.75 M/N STD |
@@ -988,17 +275,18 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
988 | offset / 16, offset % 16 * 100 / 16, | 275 | offset / 16, offset % 16 * 100 / 16, |
989 | div); | 276 | div); |
990 | 277 | ||
991 | if (t->type == TUNER_PHILIPS_SECAM && freq < t->freq) { | 278 | if (tuners[t->type].params->cb_first_if_lower_freq && div < t->last_div) { |
992 | buffer[0] = tun->config; | 279 | buffer[0] = tun->params[j].config; |
993 | buffer[1] = config; | 280 | buffer[1] = config; |
994 | buffer[2] = (div>>8) & 0x7f; | 281 | buffer[2] = (div>>8) & 0x7f; |
995 | buffer[3] = div & 0xff; | 282 | buffer[3] = div & 0xff; |
996 | } else { | 283 | } else { |
997 | buffer[0] = (div>>8) & 0x7f; | 284 | buffer[0] = (div>>8) & 0x7f; |
998 | buffer[1] = div & 0xff; | 285 | buffer[1] = div & 0xff; |
999 | buffer[2] = tun->config; | 286 | buffer[2] = tun->params[j].config; |
1000 | buffer[3] = config; | 287 | buffer[3] = config; |
1001 | } | 288 | } |
289 | t->last_div = div; | ||
1002 | tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", | 290 | tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", |
1003 | buffer[0],buffer[1],buffer[2],buffer[3]); | 291 | buffer[0],buffer[1],buffer[2],buffer[3]); |
1004 | 292 | ||
@@ -1024,10 +312,10 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) | |||
1024 | } | 312 | } |
1025 | 313 | ||
1026 | /* Set the charge pump for optimized phase noise figure */ | 314 | /* Set the charge pump for optimized phase noise figure */ |
1027 | tun->config &= ~TUNER_CHARGE_PUMP; | 315 | tun->params[j].config &= ~TUNER_CHARGE_PUMP; |
1028 | buffer[0] = (div>>8) & 0x7f; | 316 | buffer[0] = (div>>8) & 0x7f; |
1029 | buffer[1] = div & 0xff; | 317 | buffer[1] = div & 0xff; |
1030 | buffer[2] = tun->config; | 318 | buffer[2] = tun->params[j].config; |
1031 | buffer[3] = config; | 319 | buffer[3] = config; |
1032 | tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", | 320 | tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", |
1033 | buffer[0],buffer[1],buffer[2],buffer[3]); | 321 | buffer[0],buffer[1],buffer[2],buffer[3]); |
@@ -1041,13 +329,15 @@ static void default_set_radio_freq(struct i2c_client *c, unsigned int freq) | |||
1041 | { | 329 | { |
1042 | struct tunertype *tun; | 330 | struct tunertype *tun; |
1043 | struct tuner *t = i2c_get_clientdata(c); | 331 | struct tuner *t = i2c_get_clientdata(c); |
1044 | unsigned char buffer[4]; | 332 | u8 buffer[4]; |
1045 | unsigned div; | 333 | u16 div; |
1046 | int rc; | 334 | int rc, j; |
1047 | 335 | ||
1048 | tun = &tuners[t->type]; | 336 | tun = &tuners[t->type]; |
337 | j = TUNER_PARAM_ANALOG; | ||
338 | |||
1049 | div = (20 * freq / 16000) + (int)(20*10.7); /* IF 10.7 MHz */ | 339 | div = (20 * freq / 16000) + (int)(20*10.7); /* IF 10.7 MHz */ |
1050 | buffer[2] = (tun->config & ~TUNER_RATIO_MASK) | TUNER_RATIO_SELECT_50; /* 50 kHz step */ | 340 | buffer[2] = (tun->params[j].config & ~TUNER_RATIO_MASK) | TUNER_RATIO_SELECT_50; /* 50 kHz step */ |
1051 | 341 | ||
1052 | switch (t->type) { | 342 | switch (t->type) { |
1053 | case TUNER_TENA_9533_DI: | 343 | case TUNER_TENA_9533_DI: |
@@ -1076,9 +366,19 @@ static void default_set_radio_freq(struct i2c_client *c, unsigned int freq) | |||
1076 | } | 366 | } |
1077 | buffer[0] = (div>>8) & 0x7f; | 367 | buffer[0] = (div>>8) & 0x7f; |
1078 | buffer[1] = div & 0xff; | 368 | buffer[1] = div & 0xff; |
369 | if (tuners[t->type].params->cb_first_if_lower_freq && div < t->last_div) { | ||
370 | buffer[0] = buffer[2]; | ||
371 | buffer[1] = buffer[3]; | ||
372 | buffer[2] = (div>>8) & 0x7f; | ||
373 | buffer[3] = div & 0xff; | ||
374 | } else { | ||
375 | buffer[0] = (div>>8) & 0x7f; | ||
376 | buffer[1] = div & 0xff; | ||
377 | } | ||
1079 | 378 | ||
1080 | tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n", | 379 | tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n", |
1081 | buffer[0],buffer[1],buffer[2],buffer[3]); | 380 | buffer[0],buffer[1],buffer[2],buffer[3]); |
381 | t->last_div = div; | ||
1082 | 382 | ||
1083 | if (4 != (rc = i2c_master_send(c,buffer,4))) | 383 | if (4 != (rc = i2c_master_send(c,buffer,4))) |
1084 | tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc); | 384 | tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc); |
@@ -1092,10 +392,10 @@ int default_tuner_init(struct i2c_client *c) | |||
1092 | t->type, tuners[t->type].name); | 392 | t->type, tuners[t->type].name); |
1093 | strlcpy(c->name, tuners[t->type].name, sizeof(c->name)); | 393 | strlcpy(c->name, tuners[t->type].name, sizeof(c->name)); |
1094 | 394 | ||
1095 | t->tv_freq = default_set_tv_freq; | 395 | t->set_tv_freq = default_set_tv_freq; |
1096 | t->radio_freq = default_set_radio_freq; | 396 | t->set_radio_freq = default_set_radio_freq; |
1097 | t->has_signal = tuner_signal; | 397 | t->has_signal = tuner_signal; |
1098 | t->is_stereo = tuner_stereo; | 398 | t->is_stereo = tuner_stereo; |
1099 | t->standby = NULL; | 399 | t->standby = NULL; |
1100 | 400 | ||
1101 | return 0; | 401 | return 0; |
diff --git a/drivers/media/video/tuner-types.c b/drivers/media/video/tuner-types.c new file mode 100644 index 000000000000..6fe781798d89 --- /dev/null +++ b/drivers/media/video/tuner-types.c | |||
@@ -0,0 +1,1406 @@ | |||
1 | /* | ||
2 | * | ||
3 | * i2c tv tuner chip device type database. | ||
4 | * | ||
5 | */ | ||
6 | |||
7 | #include <linux/i2c.h> | ||
8 | #include <media/tuner.h> | ||
9 | #include <media/tuner-types.h> | ||
10 | |||
11 | /* ---------------------------------------------------------------------- */ | ||
12 | |||
13 | /* | ||
14 | * The floats in the tuner struct are computed at compile time | ||
15 | * by gcc and cast back to integers. Thus we don't violate the | ||
16 | * "no float in kernel" rule. | ||
17 | * | ||
18 | * A tuner_range may be referenced by multiple tuner_params structs. | ||
19 | * There are many duplicates in here. Reusing tuner_range structs, | ||
20 | * rather than defining new ones for each tuner, will cut down on | ||
21 | * memory usage, and is preferred when possible. | ||
22 | * | ||
23 | * Each tuner_params array may contain one or more elements, one | ||
24 | * for each video standard. | ||
25 | * | ||
26 | * FIXME: Some tuner_range definitions are duplicated, and | ||
27 | * should be eliminated. | ||
28 | * | ||
29 | * FIXME: tunertype struct contains an element, has_tda988x. | ||
30 | * We must set this for all tunertypes that contain a tda988x | ||
31 | * chip, and then we can remove this setting from the various | ||
32 | * card structs. | ||
33 | */ | ||
34 | |||
35 | /* 0-9 */ | ||
36 | /* ------------ TUNER_TEMIC_PAL - TEMIC PAL ------------ */ | ||
37 | |||
38 | static struct tuner_range tuner_temic_pal_ranges[] = { | ||
39 | { 16 * 140.25 /*MHz*/, 0x02, }, | ||
40 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
41 | { 16 * 999.99 , 0x01, }, | ||
42 | }; | ||
43 | |||
44 | static struct tuner_params tuner_temic_pal_params[] = { | ||
45 | { | ||
46 | .type = TUNER_PARAM_TYPE_PAL, | ||
47 | .ranges = tuner_temic_pal_ranges, | ||
48 | .count = ARRAY_SIZE(tuner_temic_pal_ranges), | ||
49 | .config = 0x8e, | ||
50 | }, | ||
51 | }; | ||
52 | |||
53 | /* ------------ TUNER_PHILIPS_PAL_I - Philips PAL_I ------------ */ | ||
54 | |||
55 | static struct tuner_range tuner_philips_pal_i_ranges[] = { | ||
56 | { 16 * 140.25 /*MHz*/, 0xa0, }, | ||
57 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
58 | { 16 * 999.99 , 0x30, }, | ||
59 | }; | ||
60 | |||
61 | static struct tuner_params tuner_philips_pal_i_params[] = { | ||
62 | { | ||
63 | .type = TUNER_PARAM_TYPE_PAL, | ||
64 | .ranges = tuner_philips_pal_i_ranges, | ||
65 | .count = ARRAY_SIZE(tuner_philips_pal_i_ranges), | ||
66 | .config = 0x8e, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | /* ------------ TUNER_PHILIPS_NTSC - Philips NTSC ------------ */ | ||
71 | |||
72 | static struct tuner_range tuner_philips_ntsc_ranges[] = { | ||
73 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
74 | { 16 * 451.25 /*MHz*/, 0x90, }, | ||
75 | { 16 * 999.99 , 0x30, }, | ||
76 | }; | ||
77 | |||
78 | static struct tuner_params tuner_philips_ntsc_params[] = { | ||
79 | { | ||
80 | .type = TUNER_PARAM_TYPE_NTSC, | ||
81 | .ranges = tuner_philips_ntsc_ranges, | ||
82 | .count = ARRAY_SIZE(tuner_philips_ntsc_ranges), | ||
83 | .config = 0x8e, | ||
84 | .cb_first_if_lower_freq = 1, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | /* ------------ TUNER_PHILIPS_SECAM - Philips SECAM ------------ */ | ||
89 | |||
90 | static struct tuner_range tuner_philips_secam_ranges[] = { | ||
91 | { 16 * 168.25 /*MHz*/, 0xa7, }, | ||
92 | { 16 * 447.25 /*MHz*/, 0x97, }, | ||
93 | { 16 * 999.99 , 0x37, }, | ||
94 | }; | ||
95 | |||
96 | static struct tuner_params tuner_philips_secam_params[] = { | ||
97 | { | ||
98 | .type = TUNER_PARAM_TYPE_SECAM, | ||
99 | .ranges = tuner_philips_secam_ranges, | ||
100 | .count = ARRAY_SIZE(tuner_philips_secam_ranges), | ||
101 | .config = 0x8e, | ||
102 | .cb_first_if_lower_freq = 1, | ||
103 | }, | ||
104 | }; | ||
105 | |||
106 | /* ------------ TUNER_PHILIPS_PAL - Philips PAL ------------ */ | ||
107 | |||
108 | static struct tuner_range tuner_philips_pal_ranges[] = { | ||
109 | { 16 * 168.25 /*MHz*/, 0xa0, }, | ||
110 | { 16 * 447.25 /*MHz*/, 0x90, }, | ||
111 | { 16 * 999.99 , 0x30, }, | ||
112 | }; | ||
113 | |||
114 | static struct tuner_params tuner_philips_pal_params[] = { | ||
115 | { | ||
116 | .type = TUNER_PARAM_TYPE_PAL, | ||
117 | .ranges = tuner_philips_pal_ranges, | ||
118 | .count = ARRAY_SIZE(tuner_philips_pal_ranges), | ||
119 | .config = 0x8e, | ||
120 | .cb_first_if_lower_freq = 1, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | /* ------------ TUNER_TEMIC_NTSC - TEMIC NTSC ------------ */ | ||
125 | |||
126 | static struct tuner_range tuner_temic_ntsc_ranges[] = { | ||
127 | { 16 * 157.25 /*MHz*/, 0x02, }, | ||
128 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
129 | { 16 * 999.99 , 0x01, }, | ||
130 | }; | ||
131 | |||
132 | static struct tuner_params tuner_temic_ntsc_params[] = { | ||
133 | { | ||
134 | .type = TUNER_PARAM_TYPE_NTSC, | ||
135 | .ranges = tuner_temic_ntsc_ranges, | ||
136 | .count = ARRAY_SIZE(tuner_temic_ntsc_ranges), | ||
137 | .config = 0x8e, | ||
138 | }, | ||
139 | }; | ||
140 | |||
141 | /* ------------ TUNER_TEMIC_PAL_I - TEMIC PAL_I ------------ */ | ||
142 | |||
143 | static struct tuner_range tuner_temic_pal_i_ranges[] = { | ||
144 | { 16 * 170.00 /*MHz*/, 0x02, }, | ||
145 | { 16 * 450.00 /*MHz*/, 0x04, }, | ||
146 | { 16 * 999.99 , 0x01, }, | ||
147 | }; | ||
148 | |||
149 | static struct tuner_params tuner_temic_pal_i_params[] = { | ||
150 | { | ||
151 | .type = TUNER_PARAM_TYPE_PAL, | ||
152 | .ranges = tuner_temic_pal_i_ranges, | ||
153 | .count = ARRAY_SIZE(tuner_temic_pal_i_ranges), | ||
154 | .config = 0x8e, | ||
155 | }, | ||
156 | }; | ||
157 | |||
158 | /* ------------ TUNER_TEMIC_4036FY5_NTSC - TEMIC NTSC ------------ */ | ||
159 | |||
160 | static struct tuner_range tuner_temic_4036fy5_ntsc_ranges[] = { | ||
161 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
162 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
163 | { 16 * 999.99 , 0x30, }, | ||
164 | }; | ||
165 | |||
166 | static struct tuner_params tuner_temic_4036fy5_ntsc_params[] = { | ||
167 | { | ||
168 | .type = TUNER_PARAM_TYPE_NTSC, | ||
169 | .ranges = tuner_temic_4036fy5_ntsc_ranges, | ||
170 | .count = ARRAY_SIZE(tuner_temic_4036fy5_ntsc_ranges), | ||
171 | .config = 0x8e, | ||
172 | }, | ||
173 | }; | ||
174 | |||
175 | /* ------------ TUNER_ALPS_TSBH1_NTSC - TEMIC NTSC ------------ */ | ||
176 | |||
177 | static struct tuner_range tuner_alps_tsb_1_ranges[] = { | ||
178 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
179 | { 16 * 385.25 /*MHz*/, 0x02, }, | ||
180 | { 16 * 999.99 , 0x08, }, | ||
181 | }; | ||
182 | |||
183 | static struct tuner_params tuner_alps_tsbh1_ntsc_params[] = { | ||
184 | { | ||
185 | .type = TUNER_PARAM_TYPE_NTSC, | ||
186 | .ranges = tuner_alps_tsb_1_ranges, | ||
187 | .count = ARRAY_SIZE(tuner_alps_tsb_1_ranges), | ||
188 | .config = 0x8e, | ||
189 | }, | ||
190 | }; | ||
191 | |||
192 | /* 10-19 */ | ||
193 | /* ------------ TUNER_ALPS_TSBE1_PAL - TEMIC PAL ------------ */ | ||
194 | |||
195 | static struct tuner_params tuner_alps_tsb_1_params[] = { | ||
196 | { | ||
197 | .type = TUNER_PARAM_TYPE_PAL, | ||
198 | .ranges = tuner_alps_tsb_1_ranges, | ||
199 | .count = ARRAY_SIZE(tuner_alps_tsb_1_ranges), | ||
200 | .config = 0x8e, | ||
201 | }, | ||
202 | }; | ||
203 | |||
204 | /* ------------ TUNER_ALPS_TSBB5_PAL_I - Alps PAL_I ------------ */ | ||
205 | |||
206 | static struct tuner_range tuner_alps_tsb_5_pal_ranges[] = { | ||
207 | { 16 * 133.25 /*MHz*/, 0x01, }, | ||
208 | { 16 * 351.25 /*MHz*/, 0x02, }, | ||
209 | { 16 * 999.99 , 0x08, }, | ||
210 | }; | ||
211 | |||
212 | static struct tuner_params tuner_alps_tsbb5_params[] = { | ||
213 | { | ||
214 | .type = TUNER_PARAM_TYPE_PAL, | ||
215 | .ranges = tuner_alps_tsb_5_pal_ranges, | ||
216 | .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges), | ||
217 | .config = 0x8e, | ||
218 | }, | ||
219 | }; | ||
220 | |||
221 | /* ------------ TUNER_ALPS_TSBE5_PAL - Alps PAL ------------ */ | ||
222 | |||
223 | static struct tuner_params tuner_alps_tsbe5_params[] = { | ||
224 | { | ||
225 | .type = TUNER_PARAM_TYPE_PAL, | ||
226 | .ranges = tuner_alps_tsb_5_pal_ranges, | ||
227 | .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges), | ||
228 | .config = 0x8e, | ||
229 | }, | ||
230 | }; | ||
231 | |||
232 | /* ------------ TUNER_ALPS_TSBC5_PAL - Alps PAL ------------ */ | ||
233 | |||
234 | static struct tuner_params tuner_alps_tsbc5_params[] = { | ||
235 | { | ||
236 | .type = TUNER_PARAM_TYPE_PAL, | ||
237 | .ranges = tuner_alps_tsb_5_pal_ranges, | ||
238 | .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges), | ||
239 | .config = 0x8e, | ||
240 | }, | ||
241 | }; | ||
242 | |||
243 | /* ------------ TUNER_TEMIC_4006FH5_PAL - TEMIC PAL ------------ */ | ||
244 | |||
245 | static struct tuner_range tuner_temic_4006fh5_pal_ranges[] = { | ||
246 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
247 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
248 | { 16 * 999.99 , 0x30, }, | ||
249 | }; | ||
250 | |||
251 | static struct tuner_params tuner_temic_4006fh5_params[] = { | ||
252 | { | ||
253 | .type = TUNER_PARAM_TYPE_PAL, | ||
254 | .ranges = tuner_temic_4006fh5_pal_ranges, | ||
255 | .count = ARRAY_SIZE(tuner_temic_4006fh5_pal_ranges), | ||
256 | .config = 0x8e, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | /* ------------ TUNER_ALPS_TSHC6_NTSC - Alps NTSC ------------ */ | ||
261 | |||
262 | static struct tuner_range tuner_alps_tshc6_ntsc_ranges[] = { | ||
263 | { 16 * 137.25 /*MHz*/, 0x14, }, | ||
264 | { 16 * 385.25 /*MHz*/, 0x12, }, | ||
265 | { 16 * 999.99 , 0x11, }, | ||
266 | }; | ||
267 | |||
268 | static struct tuner_params tuner_alps_tshc6_params[] = { | ||
269 | { | ||
270 | .type = TUNER_PARAM_TYPE_NTSC, | ||
271 | .ranges = tuner_alps_tshc6_ntsc_ranges, | ||
272 | .count = ARRAY_SIZE(tuner_alps_tshc6_ntsc_ranges), | ||
273 | .config = 0x8e, | ||
274 | }, | ||
275 | }; | ||
276 | |||
277 | /* ------------ TUNER_TEMIC_PAL_DK - TEMIC PAL ------------ */ | ||
278 | |||
279 | static struct tuner_range tuner_temic_pal_dk_ranges[] = { | ||
280 | { 16 * 168.25 /*MHz*/, 0xa0, }, | ||
281 | { 16 * 456.25 /*MHz*/, 0x90, }, | ||
282 | { 16 * 999.99 , 0x30, }, | ||
283 | }; | ||
284 | |||
285 | static struct tuner_params tuner_temic_pal_dk_params[] = { | ||
286 | { | ||
287 | .type = TUNER_PARAM_TYPE_PAL, | ||
288 | .ranges = tuner_temic_pal_dk_ranges, | ||
289 | .count = ARRAY_SIZE(tuner_temic_pal_dk_ranges), | ||
290 | .config = 0x8e, | ||
291 | }, | ||
292 | }; | ||
293 | |||
294 | /* ------------ TUNER_PHILIPS_NTSC_M - Philips NTSC ------------ */ | ||
295 | |||
296 | static struct tuner_range tuner_philips_ntsc_m_ranges[] = { | ||
297 | { 16 * 160.00 /*MHz*/, 0xa0, }, | ||
298 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
299 | { 16 * 999.99 , 0x30, }, | ||
300 | }; | ||
301 | |||
302 | static struct tuner_params tuner_philips_ntsc_m_params[] = { | ||
303 | { | ||
304 | .type = TUNER_PARAM_TYPE_NTSC, | ||
305 | .ranges = tuner_philips_ntsc_m_ranges, | ||
306 | .count = ARRAY_SIZE(tuner_philips_ntsc_m_ranges), | ||
307 | .config = 0x8e, | ||
308 | }, | ||
309 | }; | ||
310 | |||
311 | /* ------------ TUNER_TEMIC_4066FY5_PAL_I - TEMIC PAL_I ------------ */ | ||
312 | |||
313 | static struct tuner_range tuner_temic_40x6f_5_pal_ranges[] = { | ||
314 | { 16 * 169.00 /*MHz*/, 0xa0, }, | ||
315 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
316 | { 16 * 999.99 , 0x30, }, | ||
317 | }; | ||
318 | |||
319 | static struct tuner_params tuner_temic_4066fy5_pal_i_params[] = { | ||
320 | { | ||
321 | .type = TUNER_PARAM_TYPE_PAL, | ||
322 | .ranges = tuner_temic_40x6f_5_pal_ranges, | ||
323 | .count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges), | ||
324 | .config = 0x8e, | ||
325 | }, | ||
326 | }; | ||
327 | |||
328 | /* ------------ TUNER_TEMIC_4006FN5_MULTI_PAL - TEMIC PAL ------------ */ | ||
329 | |||
330 | static struct tuner_params tuner_temic_4006fn5_multi_params[] = { | ||
331 | { | ||
332 | .type = TUNER_PARAM_TYPE_PAL, | ||
333 | .ranges = tuner_temic_40x6f_5_pal_ranges, | ||
334 | .count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges), | ||
335 | .config = 0x8e, | ||
336 | }, | ||
337 | }; | ||
338 | |||
339 | /* 20-29 */ | ||
340 | /* ------------ TUNER_TEMIC_4009FR5_PAL - TEMIC PAL ------------ */ | ||
341 | |||
342 | static struct tuner_range tuner_temic_4009f_5_pal_ranges[] = { | ||
343 | { 16 * 141.00 /*MHz*/, 0xa0, }, | ||
344 | { 16 * 464.00 /*MHz*/, 0x90, }, | ||
345 | { 16 * 999.99 , 0x30, }, | ||
346 | }; | ||
347 | |||
348 | static struct tuner_params tuner_temic_4009f_5_params[] = { | ||
349 | { | ||
350 | .type = TUNER_PARAM_TYPE_PAL, | ||
351 | .ranges = tuner_temic_4009f_5_pal_ranges, | ||
352 | .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges), | ||
353 | .config = 0x8e, | ||
354 | }, | ||
355 | }; | ||
356 | |||
357 | /* ------------ TUNER_TEMIC_4039FR5_NTSC - TEMIC NTSC ------------ */ | ||
358 | |||
359 | static struct tuner_range tuner_temic_4039fr5_ntsc_ranges[] = { | ||
360 | { 16 * 158.00 /*MHz*/, 0xa0, }, | ||
361 | { 16 * 453.00 /*MHz*/, 0x90, }, | ||
362 | { 16 * 999.99 , 0x30, }, | ||
363 | }; | ||
364 | |||
365 | static struct tuner_params tuner_temic_4039fr5_params[] = { | ||
366 | { | ||
367 | .type = TUNER_PARAM_TYPE_NTSC, | ||
368 | .ranges = tuner_temic_4039fr5_ntsc_ranges, | ||
369 | .count = ARRAY_SIZE(tuner_temic_4039fr5_ntsc_ranges), | ||
370 | .config = 0x8e, | ||
371 | }, | ||
372 | }; | ||
373 | |||
374 | /* ------------ TUNER_TEMIC_4046FM5 - TEMIC PAL ------------ */ | ||
375 | |||
376 | static struct tuner_range tuner_temic_4046fm5_pal_ranges[] = { | ||
377 | { 16 * 169.00 /*MHz*/, 0xa0, }, | ||
378 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
379 | { 16 * 999.99 , 0x30, }, | ||
380 | }; | ||
381 | |||
382 | static struct tuner_params tuner_temic_4046fm5_params[] = { | ||
383 | { | ||
384 | .type = TUNER_PARAM_TYPE_PAL, | ||
385 | .ranges = tuner_temic_4046fm5_pal_ranges, | ||
386 | .count = ARRAY_SIZE(tuner_temic_4046fm5_pal_ranges), | ||
387 | .config = 0x8e, | ||
388 | }, | ||
389 | }; | ||
390 | |||
391 | /* ------------ TUNER_PHILIPS_PAL_DK - Philips PAL ------------ */ | ||
392 | |||
393 | static struct tuner_range tuner_lg_pal_ranges[] = { | ||
394 | { 16 * 170.00 /*MHz*/, 0xa0, }, | ||
395 | { 16 * 450.00 /*MHz*/, 0x90, }, | ||
396 | { 16 * 999.99 , 0x30, }, | ||
397 | }; | ||
398 | |||
399 | static struct tuner_params tuner_philips_pal_dk_params[] = { | ||
400 | { | ||
401 | .type = TUNER_PARAM_TYPE_PAL, | ||
402 | .ranges = tuner_lg_pal_ranges, | ||
403 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
404 | .config = 0x8e, | ||
405 | }, | ||
406 | }; | ||
407 | |||
408 | /* ------------ TUNER_PHILIPS_FQ1216ME - Philips PAL ------------ */ | ||
409 | |||
410 | static struct tuner_params tuner_philips_fq1216me_params[] = { | ||
411 | { | ||
412 | .type = TUNER_PARAM_TYPE_PAL, | ||
413 | .ranges = tuner_lg_pal_ranges, | ||
414 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
415 | .config = 0x8e, | ||
416 | }, | ||
417 | }; | ||
418 | |||
419 | /* ------------ TUNER_LG_PAL_I_FM - LGINNOTEK PAL_I ------------ */ | ||
420 | |||
421 | static struct tuner_params tuner_lg_pal_i_fm_params[] = { | ||
422 | { | ||
423 | .type = TUNER_PARAM_TYPE_PAL, | ||
424 | .ranges = tuner_lg_pal_ranges, | ||
425 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
426 | .config = 0x8e, | ||
427 | }, | ||
428 | }; | ||
429 | |||
430 | /* ------------ TUNER_LG_PAL_I - LGINNOTEK PAL_I ------------ */ | ||
431 | |||
432 | static struct tuner_params tuner_lg_pal_i_params[] = { | ||
433 | { | ||
434 | .type = TUNER_PARAM_TYPE_PAL, | ||
435 | .ranges = tuner_lg_pal_ranges, | ||
436 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
437 | .config = 0x8e, | ||
438 | }, | ||
439 | }; | ||
440 | |||
441 | /* ------------ TUNER_LG_NTSC_FM - LGINNOTEK NTSC ------------ */ | ||
442 | |||
443 | static struct tuner_range tuner_lg_ntsc_fm_ranges[] = { | ||
444 | { 16 * 210.00 /*MHz*/, 0xa0, }, | ||
445 | { 16 * 497.00 /*MHz*/, 0x90, }, | ||
446 | { 16 * 999.99 , 0x30, }, | ||
447 | }; | ||
448 | |||
449 | static struct tuner_params tuner_lg_ntsc_fm_params[] = { | ||
450 | { | ||
451 | .type = TUNER_PARAM_TYPE_NTSC, | ||
452 | .ranges = tuner_lg_ntsc_fm_ranges, | ||
453 | .count = ARRAY_SIZE(tuner_lg_ntsc_fm_ranges), | ||
454 | .config = 0x8e, | ||
455 | }, | ||
456 | }; | ||
457 | |||
458 | /* ------------ TUNER_LG_PAL_FM - LGINNOTEK PAL ------------ */ | ||
459 | |||
460 | static struct tuner_params tuner_lg_pal_fm_params[] = { | ||
461 | { | ||
462 | .type = TUNER_PARAM_TYPE_PAL, | ||
463 | .ranges = tuner_lg_pal_ranges, | ||
464 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
465 | .config = 0x8e, | ||
466 | }, | ||
467 | }; | ||
468 | |||
469 | /* ------------ TUNER_LG_PAL - LGINNOTEK PAL ------------ */ | ||
470 | |||
471 | static struct tuner_params tuner_lg_pal_params[] = { | ||
472 | { | ||
473 | .type = TUNER_PARAM_TYPE_PAL, | ||
474 | .ranges = tuner_lg_pal_ranges, | ||
475 | .count = ARRAY_SIZE(tuner_lg_pal_ranges), | ||
476 | .config = 0x8e, | ||
477 | }, | ||
478 | }; | ||
479 | |||
480 | /* 30-39 */ | ||
481 | /* ------------ TUNER_TEMIC_4009FN5_MULTI_PAL_FM - TEMIC PAL ------------ */ | ||
482 | |||
483 | static struct tuner_params tuner_temic_4009_fn5_multi_pal_fm_params[] = { | ||
484 | { | ||
485 | .type = TUNER_PARAM_TYPE_PAL, | ||
486 | .ranges = tuner_temic_4009f_5_pal_ranges, | ||
487 | .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges), | ||
488 | .config = 0x8e, | ||
489 | }, | ||
490 | }; | ||
491 | |||
492 | /* ------------ TUNER_SHARP_2U5JF5540_NTSC - SHARP NTSC ------------ */ | ||
493 | |||
494 | static struct tuner_range tuner_sharp_2u5jf5540_ntsc_ranges[] = { | ||
495 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
496 | { 16 * 317.25 /*MHz*/, 0x02, }, | ||
497 | { 16 * 999.99 , 0x08, }, | ||
498 | }; | ||
499 | |||
500 | static struct tuner_params tuner_sharp_2u5jf5540_params[] = { | ||
501 | { | ||
502 | .type = TUNER_PARAM_TYPE_NTSC, | ||
503 | .ranges = tuner_sharp_2u5jf5540_ntsc_ranges, | ||
504 | .count = ARRAY_SIZE(tuner_sharp_2u5jf5540_ntsc_ranges), | ||
505 | .config = 0x8e, | ||
506 | }, | ||
507 | }; | ||
508 | |||
509 | /* ------------ TUNER_Samsung_PAL_TCPM9091PD27 - Samsung PAL ------------ */ | ||
510 | |||
511 | static struct tuner_range tuner_samsung_pal_tcpm9091pd27_ranges[] = { | ||
512 | { 16 * 169 /*MHz*/, 0xa0, }, | ||
513 | { 16 * 464 /*MHz*/, 0x90, }, | ||
514 | { 16 * 999.99 , 0x30, }, | ||
515 | }; | ||
516 | |||
517 | static struct tuner_params tuner_samsung_pal_tcpm9091pd27_params[] = { | ||
518 | { | ||
519 | .type = TUNER_PARAM_TYPE_PAL, | ||
520 | .ranges = tuner_samsung_pal_tcpm9091pd27_ranges, | ||
521 | .count = ARRAY_SIZE(tuner_samsung_pal_tcpm9091pd27_ranges), | ||
522 | .config = 0x8e, | ||
523 | }, | ||
524 | }; | ||
525 | |||
526 | /* ------------ TUNER_TEMIC_4106FH5 - TEMIC PAL ------------ */ | ||
527 | |||
528 | static struct tuner_params tuner_temic_4106fh5_params[] = { | ||
529 | { | ||
530 | .type = TUNER_PARAM_TYPE_PAL, | ||
531 | .ranges = tuner_temic_4009f_5_pal_ranges, | ||
532 | .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges), | ||
533 | .config = 0x8e, | ||
534 | }, | ||
535 | }; | ||
536 | |||
537 | /* ------------ TUNER_TEMIC_4012FY5 - TEMIC PAL ------------ */ | ||
538 | |||
539 | static struct tuner_range tuner_temic_4012fy5_pal_ranges[] = { | ||
540 | { 16 * 140.25 /*MHz*/, 0x02, }, | ||
541 | { 16 * 463.25 /*MHz*/, 0x04, }, | ||
542 | { 16 * 999.99 , 0x01, }, | ||
543 | }; | ||
544 | |||
545 | static struct tuner_params tuner_temic_4012fy5_params[] = { | ||
546 | { | ||
547 | .type = TUNER_PARAM_TYPE_PAL, | ||
548 | .ranges = tuner_temic_4012fy5_pal_ranges, | ||
549 | .count = ARRAY_SIZE(tuner_temic_4012fy5_pal_ranges), | ||
550 | .config = 0x8e, | ||
551 | }, | ||
552 | }; | ||
553 | |||
554 | /* ------------ TUNER_TEMIC_4136FY5 - TEMIC NTSC ------------ */ | ||
555 | |||
556 | static struct tuner_range tuner_temic_4136_fy5_ntsc_ranges[] = { | ||
557 | { 16 * 158.00 /*MHz*/, 0xa0, }, | ||
558 | { 16 * 453.00 /*MHz*/, 0x90, }, | ||
559 | { 16 * 999.99 , 0x30, }, | ||
560 | }; | ||
561 | |||
562 | static struct tuner_params tuner_temic_4136_fy5_params[] = { | ||
563 | { | ||
564 | .type = TUNER_PARAM_TYPE_NTSC, | ||
565 | .ranges = tuner_temic_4136_fy5_ntsc_ranges, | ||
566 | .count = ARRAY_SIZE(tuner_temic_4136_fy5_ntsc_ranges), | ||
567 | .config = 0x8e, | ||
568 | }, | ||
569 | }; | ||
570 | |||
571 | /* ------------ TUNER_LG_PAL_NEW_TAPC - LGINNOTEK PAL ------------ */ | ||
572 | |||
573 | static struct tuner_range tuner_lg_new_tapc_ranges[] = { | ||
574 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
575 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
576 | { 16 * 999.99 , 0x08, }, | ||
577 | }; | ||
578 | |||
579 | static struct tuner_params tuner_lg_pal_new_tapc_params[] = { | ||
580 | { | ||
581 | .type = TUNER_PARAM_TYPE_PAL, | ||
582 | .ranges = tuner_lg_new_tapc_ranges, | ||
583 | .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges), | ||
584 | .config = 0x8e, | ||
585 | }, | ||
586 | }; | ||
587 | |||
588 | /* ------------ TUNER_PHILIPS_FM1216ME_MK3 - Philips PAL ------------ */ | ||
589 | |||
590 | static struct tuner_range tuner_fm1216me_mk3_pal_ranges[] = { | ||
591 | { 16 * 158.00 /*MHz*/, 0x01, }, | ||
592 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
593 | { 16 * 999.99 , 0x04, }, | ||
594 | }; | ||
595 | |||
596 | static struct tuner_params tuner_fm1216me_mk3_params[] = { | ||
597 | { | ||
598 | .type = TUNER_PARAM_TYPE_PAL, | ||
599 | .ranges = tuner_fm1216me_mk3_pal_ranges, | ||
600 | .count = ARRAY_SIZE(tuner_fm1216me_mk3_pal_ranges), | ||
601 | .config = 0x8e, | ||
602 | .cb_first_if_lower_freq = 1, | ||
603 | }, | ||
604 | }; | ||
605 | |||
606 | /* ------------ TUNER_LG_NTSC_NEW_TAPC - LGINNOTEK NTSC ------------ */ | ||
607 | |||
608 | static struct tuner_params tuner_lg_ntsc_new_tapc_params[] = { | ||
609 | { | ||
610 | .type = TUNER_PARAM_TYPE_NTSC, | ||
611 | .ranges = tuner_lg_new_tapc_ranges, | ||
612 | .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges), | ||
613 | .config = 0x8e, | ||
614 | }, | ||
615 | }; | ||
616 | |||
617 | /* 40-49 */ | ||
618 | /* ------------ TUNER_HITACHI_NTSC - HITACHI NTSC ------------ */ | ||
619 | |||
620 | static struct tuner_params tuner_hitachi_ntsc_params[] = { | ||
621 | { | ||
622 | .type = TUNER_PARAM_TYPE_NTSC, | ||
623 | .ranges = tuner_lg_new_tapc_ranges, | ||
624 | .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges), | ||
625 | .config = 0x8e, | ||
626 | }, | ||
627 | }; | ||
628 | |||
629 | /* ------------ TUNER_PHILIPS_PAL_MK - Philips PAL ------------ */ | ||
630 | |||
631 | static struct tuner_range tuner_philips_pal_mk_pal_ranges[] = { | ||
632 | { 16 * 140.25 /*MHz*/, 0x01, }, | ||
633 | { 16 * 463.25 /*MHz*/, 0xc2, }, | ||
634 | { 16 * 999.99 , 0xcf, }, | ||
635 | }; | ||
636 | |||
637 | static struct tuner_params tuner_philips_pal_mk_params[] = { | ||
638 | { | ||
639 | .type = TUNER_PARAM_TYPE_PAL, | ||
640 | .ranges = tuner_philips_pal_mk_pal_ranges, | ||
641 | .count = ARRAY_SIZE(tuner_philips_pal_mk_pal_ranges), | ||
642 | .config = 0x8e, | ||
643 | }, | ||
644 | }; | ||
645 | |||
646 | /* ------------ TUNER_PHILIPS_ATSC - Philips ATSC ------------ */ | ||
647 | |||
648 | static struct tuner_range tuner_philips_atsc_ranges[] = { | ||
649 | { 16 * 157.25 /*MHz*/, 0xa0, }, | ||
650 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
651 | { 16 * 999.99 , 0x30, }, | ||
652 | }; | ||
653 | |||
654 | static struct tuner_params tuner_philips_atsc_params[] = { | ||
655 | { | ||
656 | .type = TUNER_PARAM_TYPE_NTSC, | ||
657 | .ranges = tuner_philips_atsc_ranges, | ||
658 | .count = ARRAY_SIZE(tuner_philips_atsc_ranges), | ||
659 | .config = 0x8e, | ||
660 | }, | ||
661 | }; | ||
662 | |||
663 | /* ------------ TUNER_PHILIPS_FM1236_MK3 - Philips NTSC ------------ */ | ||
664 | |||
665 | static struct tuner_range tuner_fm1236_mk3_ntsc_ranges[] = { | ||
666 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
667 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
668 | { 16 * 999.99 , 0x04, }, | ||
669 | }; | ||
670 | |||
671 | static struct tuner_params tuner_fm1236_mk3_params[] = { | ||
672 | { | ||
673 | .type = TUNER_PARAM_TYPE_NTSC, | ||
674 | .ranges = tuner_fm1236_mk3_ntsc_ranges, | ||
675 | .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges), | ||
676 | .config = 0x8e, | ||
677 | .cb_first_if_lower_freq = 1, | ||
678 | }, | ||
679 | }; | ||
680 | |||
681 | /* ------------ TUNER_PHILIPS_4IN1 - Philips NTSC ------------ */ | ||
682 | |||
683 | static struct tuner_range tuner_philips_4in1_ntsc_ranges[] = { | ||
684 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
685 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
686 | { 16 * 999.99 , 0x04, }, | ||
687 | }; | ||
688 | |||
689 | static struct tuner_params tuner_philips_4in1_params[] = { | ||
690 | { | ||
691 | .type = TUNER_PARAM_TYPE_NTSC, | ||
692 | .ranges = tuner_philips_4in1_ntsc_ranges, | ||
693 | .count = ARRAY_SIZE(tuner_philips_4in1_ntsc_ranges), | ||
694 | .config = 0x8e, | ||
695 | }, | ||
696 | }; | ||
697 | |||
698 | /* ------------ TUNER_MICROTUNE_4049FM5 - Microtune PAL ------------ */ | ||
699 | |||
700 | static struct tuner_params tuner_microtune_4049_fm5_params[] = { | ||
701 | { | ||
702 | .type = TUNER_PARAM_TYPE_PAL, | ||
703 | .ranges = tuner_temic_4009f_5_pal_ranges, | ||
704 | .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges), | ||
705 | .config = 0x8e, | ||
706 | }, | ||
707 | }; | ||
708 | |||
709 | /* ------------ TUNER_PANASONIC_VP27 - Panasonic NTSC ------------ */ | ||
710 | |||
711 | static struct tuner_range tuner_panasonic_vp27_ntsc_ranges[] = { | ||
712 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
713 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
714 | { 16 * 999.99 , 0x08, }, | ||
715 | }; | ||
716 | |||
717 | static struct tuner_params tuner_panasonic_vp27_params[] = { | ||
718 | { | ||
719 | .type = TUNER_PARAM_TYPE_NTSC, | ||
720 | .ranges = tuner_panasonic_vp27_ntsc_ranges, | ||
721 | .count = ARRAY_SIZE(tuner_panasonic_vp27_ntsc_ranges), | ||
722 | .config = 0xce, | ||
723 | }, | ||
724 | }; | ||
725 | |||
726 | /* ------------ TUNER_LG_NTSC_TAPE - LGINNOTEK NTSC ------------ */ | ||
727 | |||
728 | static struct tuner_range tuner_lg_ntsc_tape_ranges[] = { | ||
729 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
730 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
731 | { 16 * 999.99 , 0x04, }, | ||
732 | }; | ||
733 | |||
734 | static struct tuner_params tuner_lg_ntsc_tape_params[] = { | ||
735 | { | ||
736 | .type = TUNER_PARAM_TYPE_NTSC, | ||
737 | .ranges = tuner_lg_ntsc_tape_ranges, | ||
738 | .count = ARRAY_SIZE(tuner_lg_ntsc_tape_ranges), | ||
739 | .config = 0x8e, | ||
740 | }, | ||
741 | }; | ||
742 | |||
743 | /* ------------ TUNER_TNF_8831BGFF - Philips PAL ------------ */ | ||
744 | |||
745 | static struct tuner_range tuner_tnf_8831bgff_pal_ranges[] = { | ||
746 | { 16 * 161.25 /*MHz*/, 0xa0, }, | ||
747 | { 16 * 463.25 /*MHz*/, 0x90, }, | ||
748 | { 16 * 999.99 , 0x30, }, | ||
749 | }; | ||
750 | |||
751 | static struct tuner_params tuner_tnf_8831bgff_params[] = { | ||
752 | { | ||
753 | .type = TUNER_PARAM_TYPE_PAL, | ||
754 | .ranges = tuner_tnf_8831bgff_pal_ranges, | ||
755 | .count = ARRAY_SIZE(tuner_tnf_8831bgff_pal_ranges), | ||
756 | .config = 0x8e, | ||
757 | }, | ||
758 | }; | ||
759 | |||
760 | /* ------------ TUNER_MICROTUNE_4042FI5 - Microtune NTSC ------------ */ | ||
761 | |||
762 | static struct tuner_range tuner_microtune_4042fi5_ntsc_ranges[] = { | ||
763 | { 16 * 162.00 /*MHz*/, 0xa2, }, | ||
764 | { 16 * 457.00 /*MHz*/, 0x94, }, | ||
765 | { 16 * 999.99 , 0x31, }, | ||
766 | }; | ||
767 | |||
768 | static struct tuner_params tuner_microtune_4042fi5_params[] = { | ||
769 | { | ||
770 | .type = TUNER_PARAM_TYPE_NTSC, | ||
771 | .ranges = tuner_microtune_4042fi5_ntsc_ranges, | ||
772 | .count = ARRAY_SIZE(tuner_microtune_4042fi5_ntsc_ranges), | ||
773 | .config = 0x8e, | ||
774 | }, | ||
775 | }; | ||
776 | |||
777 | /* 50-59 */ | ||
778 | /* ------------ TUNER_TCL_2002N - TCL NTSC ------------ */ | ||
779 | |||
780 | static struct tuner_range tuner_tcl_2002n_ntsc_ranges[] = { | ||
781 | { 16 * 172.00 /*MHz*/, 0x01, }, | ||
782 | { 16 * 448.00 /*MHz*/, 0x02, }, | ||
783 | { 16 * 999.99 , 0x08, }, | ||
784 | }; | ||
785 | |||
786 | static struct tuner_params tuner_tcl_2002n_params[] = { | ||
787 | { | ||
788 | .type = TUNER_PARAM_TYPE_NTSC, | ||
789 | .ranges = tuner_tcl_2002n_ntsc_ranges, | ||
790 | .count = ARRAY_SIZE(tuner_tcl_2002n_ntsc_ranges), | ||
791 | .config = 0x8e, | ||
792 | .cb_first_if_lower_freq = 1, | ||
793 | }, | ||
794 | }; | ||
795 | |||
796 | /* ------------ TUNER_PHILIPS_FM1256_IH3 - Philips PAL ------------ */ | ||
797 | |||
798 | static struct tuner_range tuner_philips_fm1256_ih3_pal_ranges[] = { | ||
799 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
800 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
801 | { 16 * 999.99 , 0x04, }, | ||
802 | }; | ||
803 | |||
804 | static struct tuner_params tuner_philips_fm1256_ih3_params[] = { | ||
805 | { | ||
806 | .type = TUNER_PARAM_TYPE_PAL, | ||
807 | .ranges = tuner_philips_fm1256_ih3_pal_ranges, | ||
808 | .count = ARRAY_SIZE(tuner_philips_fm1256_ih3_pal_ranges), | ||
809 | .config = 0x8e, | ||
810 | }, | ||
811 | }; | ||
812 | |||
813 | /* ------------ TUNER_THOMSON_DTT7610 - THOMSON ATSC ------------ */ | ||
814 | |||
815 | static struct tuner_range tuner_thomson_dtt7610_ntsc_ranges[] = { | ||
816 | { 16 * 157.25 /*MHz*/, 0x39, }, | ||
817 | { 16 * 454.00 /*MHz*/, 0x3a, }, | ||
818 | { 16 * 999.99 , 0x3c, }, | ||
819 | }; | ||
820 | |||
821 | static struct tuner_params tuner_thomson_dtt7610_params[] = { | ||
822 | { | ||
823 | .type = TUNER_PARAM_TYPE_NTSC, | ||
824 | .ranges = tuner_thomson_dtt7610_ntsc_ranges, | ||
825 | .count = ARRAY_SIZE(tuner_thomson_dtt7610_ntsc_ranges), | ||
826 | .config = 0x8e, | ||
827 | }, | ||
828 | }; | ||
829 | |||
830 | /* ------------ TUNER_PHILIPS_FQ1286 - Philips NTSC ------------ */ | ||
831 | |||
832 | static struct tuner_range tuner_philips_fq1286_ntsc_ranges[] = { | ||
833 | { 16 * 160.00 /*MHz*/, 0x41, }, | ||
834 | { 16 * 454.00 /*MHz*/, 0x42, }, | ||
835 | { 16 * 999.99 , 0x04, }, | ||
836 | }; | ||
837 | |||
838 | static struct tuner_params tuner_philips_fq1286_params[] = { | ||
839 | { | ||
840 | .type = TUNER_PARAM_TYPE_NTSC, | ||
841 | .ranges = tuner_philips_fq1286_ntsc_ranges, | ||
842 | .count = ARRAY_SIZE(tuner_philips_fq1286_ntsc_ranges), | ||
843 | .config = 0x8e, | ||
844 | }, | ||
845 | }; | ||
846 | |||
847 | /* ------------ TUNER_TCL_2002MB - TCL PAL ------------ */ | ||
848 | |||
849 | static struct tuner_range tuner_tcl_2002mb_pal_ranges[] = { | ||
850 | { 16 * 170.00 /*MHz*/, 0x01, }, | ||
851 | { 16 * 450.00 /*MHz*/, 0x02, }, | ||
852 | { 16 * 999.99 , 0x08, }, | ||
853 | }; | ||
854 | |||
855 | static struct tuner_params tuner_tcl_2002mb_params[] = { | ||
856 | { | ||
857 | .type = TUNER_PARAM_TYPE_PAL, | ||
858 | .ranges = tuner_tcl_2002mb_pal_ranges, | ||
859 | .count = ARRAY_SIZE(tuner_tcl_2002mb_pal_ranges), | ||
860 | .config = 0xce, | ||
861 | }, | ||
862 | }; | ||
863 | |||
864 | /* ------------ TUNER_PHILIPS_FQ1216AME_MK4 - Philips PAL ------------ */ | ||
865 | |||
866 | static struct tuner_range tuner_philips_fq12_6a___mk4_ranges[] = { | ||
867 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
868 | { 16 * 442.00 /*MHz*/, 0x02, }, | ||
869 | { 16 * 999.99 , 0x04, }, | ||
870 | }; | ||
871 | |||
872 | static struct tuner_params tuner_philips_fq1216ame_mk4_params[] = { | ||
873 | { | ||
874 | .type = TUNER_PARAM_TYPE_PAL, | ||
875 | .ranges = tuner_philips_fq12_6a___mk4_ranges, | ||
876 | .count = ARRAY_SIZE(tuner_philips_fq12_6a___mk4_ranges), | ||
877 | .config = 0xce, | ||
878 | }, | ||
879 | }; | ||
880 | |||
881 | /* ------------ TUNER_PHILIPS_FQ1236A_MK4 - Philips NTSC ------------ */ | ||
882 | |||
883 | static struct tuner_params tuner_philips_fq1236a_mk4_params[] = { | ||
884 | { | ||
885 | .type = TUNER_PARAM_TYPE_NTSC, | ||
886 | .ranges = tuner_philips_fq12_6a___mk4_ranges, | ||
887 | .count = ARRAY_SIZE(tuner_philips_fq12_6a___mk4_ranges), | ||
888 | .config = 0x8e, | ||
889 | }, | ||
890 | }; | ||
891 | |||
892 | /* ------------ TUNER_YMEC_TVF_8531MF - Philips NTSC ------------ */ | ||
893 | |||
894 | static struct tuner_range tuner_ymec_tvf_8531mf_ntsc_ranges[] = { | ||
895 | { 16 * 160.00 /*MHz*/, 0xa0, }, | ||
896 | { 16 * 454.00 /*MHz*/, 0x90, }, | ||
897 | { 16 * 999.99 , 0x30, }, | ||
898 | }; | ||
899 | |||
900 | static struct tuner_params tuner_ymec_tvf_8531mf_params[] = { | ||
901 | { | ||
902 | .type = TUNER_PARAM_TYPE_NTSC, | ||
903 | .ranges = tuner_ymec_tvf_8531mf_ntsc_ranges, | ||
904 | .count = ARRAY_SIZE(tuner_ymec_tvf_8531mf_ntsc_ranges), | ||
905 | .config = 0x8e, | ||
906 | }, | ||
907 | }; | ||
908 | |||
909 | /* ------------ TUNER_YMEC_TVF_5533MF - Philips NTSC ------------ */ | ||
910 | |||
911 | static struct tuner_range tuner_ymec_tvf_5533mf_ntsc_ranges[] = { | ||
912 | { 16 * 160.00 /*MHz*/, 0x01, }, | ||
913 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
914 | { 16 * 999.99 , 0x04, }, | ||
915 | }; | ||
916 | |||
917 | static struct tuner_params tuner_ymec_tvf_5533mf_params[] = { | ||
918 | { | ||
919 | .type = TUNER_PARAM_TYPE_NTSC, | ||
920 | .ranges = tuner_ymec_tvf_5533mf_ntsc_ranges, | ||
921 | .count = ARRAY_SIZE(tuner_ymec_tvf_5533mf_ntsc_ranges), | ||
922 | .config = 0x8e, | ||
923 | }, | ||
924 | }; | ||
925 | |||
926 | /* 60-69 */ | ||
927 | /* ------------ TUNER_THOMSON_DTT761X - THOMSON ATSC ------------ */ | ||
928 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ | ||
929 | |||
930 | static struct tuner_range tuner_thomson_dtt761x_ntsc_ranges[] = { | ||
931 | { 16 * 145.25 /*MHz*/, 0x39, }, | ||
932 | { 16 * 415.25 /*MHz*/, 0x3a, }, | ||
933 | { 16 * 999.99 , 0x3c, }, | ||
934 | }; | ||
935 | |||
936 | |||
937 | static struct tuner_params tuner_thomson_dtt761x_params[] = { | ||
938 | { | ||
939 | .type = TUNER_PARAM_TYPE_NTSC, | ||
940 | .ranges = tuner_thomson_dtt761x_ntsc_ranges, | ||
941 | .count = ARRAY_SIZE(tuner_thomson_dtt761x_ntsc_ranges), | ||
942 | .config = 0x8e, | ||
943 | }, | ||
944 | }; | ||
945 | |||
946 | /* ------------ TUNER_TENA_9533_DI - Philips PAL ------------ */ | ||
947 | |||
948 | static struct tuner_range tuner_tuner_tena_9533_di_pal_ranges[] = { | ||
949 | { 16 * 160.25 /*MHz*/, 0x01, }, | ||
950 | { 16 * 464.25 /*MHz*/, 0x02, }, | ||
951 | { 16 * 999.99 , 0x04, }, | ||
952 | }; | ||
953 | |||
954 | static struct tuner_params tuner_tena_9533_di_params[] = { | ||
955 | { | ||
956 | .type = TUNER_PARAM_TYPE_PAL, | ||
957 | .ranges = tuner_tuner_tena_9533_di_pal_ranges, | ||
958 | .count = ARRAY_SIZE(tuner_tuner_tena_9533_di_pal_ranges), | ||
959 | .config = 0x8e, | ||
960 | }, | ||
961 | }; | ||
962 | |||
963 | /* ------------ TUNER_PHILIPS_FMD1216ME_MK3 - Philips PAL ------------ */ | ||
964 | |||
965 | static struct tuner_range tuner_philips_fmd1216me_mk3_pal_ranges[] = { | ||
966 | { 16 * 160.00 /*MHz*/, 0x51, }, | ||
967 | { 16 * 442.00 /*MHz*/, 0x52, }, | ||
968 | { 16 * 999.99 , 0x54, }, | ||
969 | }; | ||
970 | |||
971 | |||
972 | static struct tuner_params tuner_tuner_philips_fmd1216me_mk3_params[] = { | ||
973 | { | ||
974 | .type = TUNER_PARAM_TYPE_PAL, | ||
975 | .ranges = tuner_philips_fmd1216me_mk3_pal_ranges, | ||
976 | .count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_pal_ranges), | ||
977 | .config = 0x86, | ||
978 | }, | ||
979 | }; | ||
980 | |||
981 | |||
982 | /* ------------ TUNER_LG_TDVS_H062F - INFINEON ATSC ------------ */ | ||
983 | |||
984 | static struct tuner_range tuner_tua6034_ntsc_ranges[] = { | ||
985 | { 16 * 160.00 /*MHz*/, 0x01 }, | ||
986 | { 16 * 455.00 /*MHz*/, 0x02 }, | ||
987 | { 16 * 999.99 , 0x04 }, | ||
988 | }; | ||
989 | |||
990 | |||
991 | static struct tuner_params tuner_tua6034_params[] = { | ||
992 | { | ||
993 | .type = TUNER_PARAM_TYPE_NTSC, | ||
994 | .ranges = tuner_tua6034_ntsc_ranges, | ||
995 | .count = ARRAY_SIZE(tuner_tua6034_ntsc_ranges), | ||
996 | .config = 0x8e, | ||
997 | }, | ||
998 | }; | ||
999 | |||
1000 | /* ------------ TUNER_YMEC_TVF66T5_B_DFF - Philips PAL ------------ */ | ||
1001 | |||
1002 | static struct tuner_range tuner_ymec_tvf66t5_b_dff_pal_ranges[] = { | ||
1003 | { 16 * 160.25 /*MHz*/, 0x01, }, | ||
1004 | { 16 * 464.25 /*MHz*/, 0x02, }, | ||
1005 | { 16 * 999.99 , 0x08, }, | ||
1006 | }; | ||
1007 | |||
1008 | static struct tuner_params tuner_ymec_tvf66t5_b_dff_params[] = { | ||
1009 | { | ||
1010 | .type = TUNER_PARAM_TYPE_PAL, | ||
1011 | .ranges = tuner_ymec_tvf66t5_b_dff_pal_ranges, | ||
1012 | .count = ARRAY_SIZE(tuner_ymec_tvf66t5_b_dff_pal_ranges), | ||
1013 | .config = 0x8e, | ||
1014 | }, | ||
1015 | }; | ||
1016 | |||
1017 | /* ------------ TUNER_LG_NTSC_TALN_MINI - LGINNOTEK NTSC ------------ */ | ||
1018 | |||
1019 | static struct tuner_range tuner_lg_taln_mini_ntsc_ranges[] = { | ||
1020 | { 16 * 137.25 /*MHz*/, 0x01, }, | ||
1021 | { 16 * 373.25 /*MHz*/, 0x02, }, | ||
1022 | { 16 * 999.99 , 0x08, }, | ||
1023 | }; | ||
1024 | |||
1025 | static struct tuner_params tuner_lg_taln_mini_params[] = { | ||
1026 | { | ||
1027 | .type = TUNER_PARAM_TYPE_NTSC, | ||
1028 | .ranges = tuner_lg_taln_mini_ntsc_ranges, | ||
1029 | .count = ARRAY_SIZE(tuner_lg_taln_mini_ntsc_ranges), | ||
1030 | .config = 0x8e, | ||
1031 | }, | ||
1032 | }; | ||
1033 | |||
1034 | /* ------------ TUNER_PHILIPS_TD1316 - Philips PAL ------------ */ | ||
1035 | |||
1036 | static struct tuner_range tuner_philips_td1316_pal_ranges[] = { | ||
1037 | { 16 * 160.00 /*MHz*/, 0xa1, }, | ||
1038 | { 16 * 442.00 /*MHz*/, 0xa2, }, | ||
1039 | { 16 * 999.99 , 0xa4, }, | ||
1040 | }; | ||
1041 | |||
1042 | static struct tuner_params tuner_philips_td1316_params[] = { | ||
1043 | { | ||
1044 | .type = TUNER_PARAM_TYPE_PAL, | ||
1045 | .ranges = tuner_philips_td1316_pal_ranges, | ||
1046 | .count = ARRAY_SIZE(tuner_philips_td1316_pal_ranges), | ||
1047 | .config = 0xc8, | ||
1048 | }, | ||
1049 | }; | ||
1050 | |||
1051 | /* ------------ TUNER_PHILIPS_TUV1236D - Philips ATSC ------------ */ | ||
1052 | |||
1053 | static struct tuner_range tuner_tuv1236d_ntsc_ranges[] = { | ||
1054 | { 16 * 157.25 /*MHz*/, 0x01, }, | ||
1055 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
1056 | { 16 * 999.99 , 0x04, }, | ||
1057 | }; | ||
1058 | |||
1059 | |||
1060 | static struct tuner_params tuner_tuner_tuv1236d_params[] = { | ||
1061 | { | ||
1062 | .type = TUNER_PARAM_TYPE_NTSC, | ||
1063 | .ranges = tuner_tuv1236d_ntsc_ranges, | ||
1064 | .count = ARRAY_SIZE(tuner_tuv1236d_ntsc_ranges), | ||
1065 | .config = 0xce, | ||
1066 | }, | ||
1067 | }; | ||
1068 | |||
1069 | /* ------------ TUNER_TNF_5335MF - Philips NTSC ------------ */ | ||
1070 | |||
1071 | static struct tuner_range tuner_tnf_5335mf_ntsc_ranges[] = { | ||
1072 | { 16 * 157.25 /*MHz*/, 0x01, }, | ||
1073 | { 16 * 454.00 /*MHz*/, 0x02, }, | ||
1074 | { 16 * 999.99 , 0x04, }, | ||
1075 | }; | ||
1076 | |||
1077 | static struct tuner_params tuner_tnf_5335mf_params[] = { | ||
1078 | { | ||
1079 | .type = TUNER_PARAM_TYPE_NTSC, | ||
1080 | .ranges = tuner_tnf_5335mf_ntsc_ranges, | ||
1081 | .count = ARRAY_SIZE(tuner_tnf_5335mf_ntsc_ranges), | ||
1082 | .config = 0x8e, | ||
1083 | }, | ||
1084 | }; | ||
1085 | |||
1086 | /* 70-79 */ | ||
1087 | /* ------------ TUNER_SAMSUNG_TCPN_2121P30A - Samsung NTSC ------------ */ | ||
1088 | |||
1089 | static struct tuner_range tuner_samsung_tcpn_2121p30a_ntsc_ranges[] = { | ||
1090 | { 16 * 175.75 /*MHz*/, 0x01, }, | ||
1091 | { 16 * 410.25 /*MHz*/, 0x02, }, | ||
1092 | { 16 * 999.99 , 0x08, }, | ||
1093 | }; | ||
1094 | |||
1095 | static struct tuner_params tuner_samsung_tcpn_2121p30a_params[] = { | ||
1096 | { | ||
1097 | .type = TUNER_PARAM_TYPE_NTSC, | ||
1098 | .ranges = tuner_samsung_tcpn_2121p30a_ntsc_ranges, | ||
1099 | .count = ARRAY_SIZE(tuner_samsung_tcpn_2121p30a_ntsc_ranges), | ||
1100 | .config = 0xce, | ||
1101 | }, | ||
1102 | }; | ||
1103 | |||
1104 | /* --------------------------------------------------------------------- */ | ||
1105 | |||
1106 | struct tunertype tuners[] = { | ||
1107 | /* 0-9 */ | ||
1108 | [TUNER_TEMIC_PAL] = { /* TEMIC PAL */ | ||
1109 | .name = "Temic PAL (4002 FH5)", | ||
1110 | .params = tuner_temic_pal_params, | ||
1111 | }, | ||
1112 | [TUNER_PHILIPS_PAL_I] = { /* Philips PAL_I */ | ||
1113 | .name = "Philips PAL_I (FI1246 and compatibles)", | ||
1114 | .params = tuner_philips_pal_i_params, | ||
1115 | }, | ||
1116 | [TUNER_PHILIPS_NTSC] = { /* Philips NTSC */ | ||
1117 | .name = "Philips NTSC (FI1236,FM1236 and compatibles)", | ||
1118 | .params = tuner_philips_ntsc_params, | ||
1119 | }, | ||
1120 | [TUNER_PHILIPS_SECAM] = { /* Philips SECAM */ | ||
1121 | .name = "Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF)", | ||
1122 | .params = tuner_philips_secam_params, | ||
1123 | }, | ||
1124 | [TUNER_ABSENT] = { /* Tuner Absent */ | ||
1125 | .name = "NoTuner", | ||
1126 | }, | ||
1127 | [TUNER_PHILIPS_PAL] = { /* Philips PAL */ | ||
1128 | .name = "Philips PAL_BG (FI1216 and compatibles)", | ||
1129 | .params = tuner_philips_pal_params, | ||
1130 | }, | ||
1131 | [TUNER_TEMIC_NTSC] = { /* TEMIC NTSC */ | ||
1132 | .name = "Temic NTSC (4032 FY5)", | ||
1133 | .params = tuner_temic_ntsc_params, | ||
1134 | }, | ||
1135 | [TUNER_TEMIC_PAL_I] = { /* TEMIC PAL_I */ | ||
1136 | .name = "Temic PAL_I (4062 FY5)", | ||
1137 | .params = tuner_temic_pal_i_params, | ||
1138 | }, | ||
1139 | [TUNER_TEMIC_4036FY5_NTSC] = { /* TEMIC NTSC */ | ||
1140 | .name = "Temic NTSC (4036 FY5)", | ||
1141 | .params = tuner_temic_4036fy5_ntsc_params, | ||
1142 | }, | ||
1143 | [TUNER_ALPS_TSBH1_NTSC] = { /* TEMIC NTSC */ | ||
1144 | .name = "Alps HSBH1", | ||
1145 | .params = tuner_alps_tsbh1_ntsc_params, | ||
1146 | }, | ||
1147 | |||
1148 | /* 10-19 */ | ||
1149 | [TUNER_ALPS_TSBE1_PAL] = { /* TEMIC PAL */ | ||
1150 | .name = "Alps TSBE1", | ||
1151 | .params = tuner_alps_tsb_1_params, | ||
1152 | }, | ||
1153 | [TUNER_ALPS_TSBB5_PAL_I] = { /* Alps PAL_I */ | ||
1154 | .name = "Alps TSBB5", | ||
1155 | .params = tuner_alps_tsbb5_params, | ||
1156 | }, | ||
1157 | [TUNER_ALPS_TSBE5_PAL] = { /* Alps PAL */ | ||
1158 | .name = "Alps TSBE5", | ||
1159 | .params = tuner_alps_tsbe5_params, | ||
1160 | }, | ||
1161 | [TUNER_ALPS_TSBC5_PAL] = { /* Alps PAL */ | ||
1162 | .name = "Alps TSBC5", | ||
1163 | .params = tuner_alps_tsbc5_params, | ||
1164 | }, | ||
1165 | [TUNER_TEMIC_4006FH5_PAL] = { /* TEMIC PAL */ | ||
1166 | .name = "Temic PAL_BG (4006FH5)", | ||
1167 | .params = tuner_temic_4006fh5_params, | ||
1168 | }, | ||
1169 | [TUNER_ALPS_TSHC6_NTSC] = { /* Alps NTSC */ | ||
1170 | .name = "Alps TSCH6", | ||
1171 | .params = tuner_alps_tshc6_params, | ||
1172 | }, | ||
1173 | [TUNER_TEMIC_PAL_DK] = { /* TEMIC PAL */ | ||
1174 | .name = "Temic PAL_DK (4016 FY5)", | ||
1175 | .params = tuner_temic_pal_dk_params, | ||
1176 | }, | ||
1177 | [TUNER_PHILIPS_NTSC_M] = { /* Philips NTSC */ | ||
1178 | .name = "Philips NTSC_M (MK2)", | ||
1179 | .params = tuner_philips_ntsc_m_params, | ||
1180 | }, | ||
1181 | [TUNER_TEMIC_4066FY5_PAL_I] = { /* TEMIC PAL_I */ | ||
1182 | .name = "Temic PAL_I (4066 FY5)", | ||
1183 | .params = tuner_temic_4066fy5_pal_i_params, | ||
1184 | }, | ||
1185 | [TUNER_TEMIC_4006FN5_MULTI_PAL] = { /* TEMIC PAL */ | ||
1186 | .name = "Temic PAL* auto (4006 FN5)", | ||
1187 | .params = tuner_temic_4006fn5_multi_params, | ||
1188 | }, | ||
1189 | |||
1190 | /* 20-29 */ | ||
1191 | [TUNER_TEMIC_4009FR5_PAL] = { /* TEMIC PAL */ | ||
1192 | .name = "Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)", | ||
1193 | .params = tuner_temic_4009f_5_params, | ||
1194 | }, | ||
1195 | [TUNER_TEMIC_4039FR5_NTSC] = { /* TEMIC NTSC */ | ||
1196 | .name = "Temic NTSC (4039 FR5)", | ||
1197 | .params = tuner_temic_4039fr5_params, | ||
1198 | }, | ||
1199 | [TUNER_TEMIC_4046FM5] = { /* TEMIC PAL */ | ||
1200 | .name = "Temic PAL/SECAM multi (4046 FM5)", | ||
1201 | .params = tuner_temic_4046fm5_params, | ||
1202 | }, | ||
1203 | [TUNER_PHILIPS_PAL_DK] = { /* Philips PAL */ | ||
1204 | .name = "Philips PAL_DK (FI1256 and compatibles)", | ||
1205 | .params = tuner_philips_pal_dk_params, | ||
1206 | }, | ||
1207 | [TUNER_PHILIPS_FQ1216ME] = { /* Philips PAL */ | ||
1208 | .name = "Philips PAL/SECAM multi (FQ1216ME)", | ||
1209 | .params = tuner_philips_fq1216me_params, | ||
1210 | }, | ||
1211 | [TUNER_LG_PAL_I_FM] = { /* LGINNOTEK PAL_I */ | ||
1212 | .name = "LG PAL_I+FM (TAPC-I001D)", | ||
1213 | .params = tuner_lg_pal_i_fm_params, | ||
1214 | }, | ||
1215 | [TUNER_LG_PAL_I] = { /* LGINNOTEK PAL_I */ | ||
1216 | .name = "LG PAL_I (TAPC-I701D)", | ||
1217 | .params = tuner_lg_pal_i_params, | ||
1218 | }, | ||
1219 | [TUNER_LG_NTSC_FM] = { /* LGINNOTEK NTSC */ | ||
1220 | .name = "LG NTSC+FM (TPI8NSR01F)", | ||
1221 | .params = tuner_lg_ntsc_fm_params, | ||
1222 | }, | ||
1223 | [TUNER_LG_PAL_FM] = { /* LGINNOTEK PAL */ | ||
1224 | .name = "LG PAL_BG+FM (TPI8PSB01D)", | ||
1225 | .params = tuner_lg_pal_fm_params, | ||
1226 | }, | ||
1227 | [TUNER_LG_PAL] = { /* LGINNOTEK PAL */ | ||
1228 | .name = "LG PAL_BG (TPI8PSB11D)", | ||
1229 | .params = tuner_lg_pal_params, | ||
1230 | }, | ||
1231 | |||
1232 | /* 30-39 */ | ||
1233 | [TUNER_TEMIC_4009FN5_MULTI_PAL_FM] = { /* TEMIC PAL */ | ||
1234 | .name = "Temic PAL* auto + FM (4009 FN5)", | ||
1235 | .params = tuner_temic_4009_fn5_multi_pal_fm_params, | ||
1236 | }, | ||
1237 | [TUNER_SHARP_2U5JF5540_NTSC] = { /* SHARP NTSC */ | ||
1238 | .name = "SHARP NTSC_JP (2U5JF5540)", | ||
1239 | .params = tuner_sharp_2u5jf5540_params, | ||
1240 | }, | ||
1241 | [TUNER_Samsung_PAL_TCPM9091PD27] = { /* Samsung PAL */ | ||
1242 | .name = "Samsung PAL TCPM9091PD27", | ||
1243 | .params = tuner_samsung_pal_tcpm9091pd27_params, | ||
1244 | }, | ||
1245 | [TUNER_MT2032] = { /* Microtune PAL|NTSC */ | ||
1246 | .name = "MT20xx universal", | ||
1247 | /* see mt20xx.c for details */ }, | ||
1248 | [TUNER_TEMIC_4106FH5] = { /* TEMIC PAL */ | ||
1249 | .name = "Temic PAL_BG (4106 FH5)", | ||
1250 | .params = tuner_temic_4106fh5_params, | ||
1251 | }, | ||
1252 | [TUNER_TEMIC_4012FY5] = { /* TEMIC PAL */ | ||
1253 | .name = "Temic PAL_DK/SECAM_L (4012 FY5)", | ||
1254 | .params = tuner_temic_4012fy5_params, | ||
1255 | }, | ||
1256 | [TUNER_TEMIC_4136FY5] = { /* TEMIC NTSC */ | ||
1257 | .name = "Temic NTSC (4136 FY5)", | ||
1258 | .params = tuner_temic_4136_fy5_params, | ||
1259 | }, | ||
1260 | [TUNER_LG_PAL_NEW_TAPC] = { /* LGINNOTEK PAL */ | ||
1261 | .name = "LG PAL (newer TAPC series)", | ||
1262 | .params = tuner_lg_pal_new_tapc_params, | ||
1263 | }, | ||
1264 | [TUNER_PHILIPS_FM1216ME_MK3] = { /* Philips PAL */ | ||
1265 | .name = "Philips PAL/SECAM multi (FM1216ME MK3)", | ||
1266 | .params = tuner_fm1216me_mk3_params, | ||
1267 | }, | ||
1268 | [TUNER_LG_NTSC_NEW_TAPC] = { /* LGINNOTEK NTSC */ | ||
1269 | .name = "LG NTSC (newer TAPC series)", | ||
1270 | .params = tuner_lg_ntsc_new_tapc_params, | ||
1271 | }, | ||
1272 | |||
1273 | /* 40-49 */ | ||
1274 | [TUNER_HITACHI_NTSC] = { /* HITACHI NTSC */ | ||
1275 | .name = "HITACHI V7-J180AT", | ||
1276 | .params = tuner_hitachi_ntsc_params, | ||
1277 | }, | ||
1278 | [TUNER_PHILIPS_PAL_MK] = { /* Philips PAL */ | ||
1279 | .name = "Philips PAL_MK (FI1216 MK)", | ||
1280 | .params = tuner_philips_pal_mk_params, | ||
1281 | }, | ||
1282 | [TUNER_PHILIPS_ATSC] = { /* Philips ATSC */ | ||
1283 | .name = "Philips 1236D ATSC/NTSC dual in", | ||
1284 | .params = tuner_philips_atsc_params, | ||
1285 | }, | ||
1286 | [TUNER_PHILIPS_FM1236_MK3] = { /* Philips NTSC */ | ||
1287 | .name = "Philips NTSC MK3 (FM1236MK3 or FM1236/F)", | ||
1288 | .params = tuner_fm1236_mk3_params, | ||
1289 | }, | ||
1290 | [TUNER_PHILIPS_4IN1] = { /* Philips NTSC */ | ||
1291 | .name = "Philips 4 in 1 (ATI TV Wonder Pro/Conexant)", | ||
1292 | .params = tuner_philips_4in1_params, | ||
1293 | }, | ||
1294 | [TUNER_MICROTUNE_4049FM5] = { /* Microtune PAL */ | ||
1295 | .name = "Microtune 4049 FM5", | ||
1296 | .params = tuner_microtune_4049_fm5_params, | ||
1297 | }, | ||
1298 | [TUNER_PANASONIC_VP27] = { /* Panasonic NTSC */ | ||
1299 | .name = "Panasonic VP27s/ENGE4324D", | ||
1300 | .params = tuner_panasonic_vp27_params, | ||
1301 | }, | ||
1302 | [TUNER_LG_NTSC_TAPE] = { /* LGINNOTEK NTSC */ | ||
1303 | .name = "LG NTSC (TAPE series)", | ||
1304 | .params = tuner_lg_ntsc_tape_params, | ||
1305 | }, | ||
1306 | [TUNER_TNF_8831BGFF] = { /* Philips PAL */ | ||
1307 | .name = "Tenna TNF 8831 BGFF)", | ||
1308 | .params = tuner_tnf_8831bgff_params, | ||
1309 | }, | ||
1310 | [TUNER_MICROTUNE_4042FI5] = { /* Microtune NTSC */ | ||
1311 | .name = "Microtune 4042 FI5 ATSC/NTSC dual in", | ||
1312 | .params = tuner_microtune_4042fi5_params, | ||
1313 | }, | ||
1314 | |||
1315 | /* 50-59 */ | ||
1316 | [TUNER_TCL_2002N] = { /* TCL NTSC */ | ||
1317 | .name = "TCL 2002N", | ||
1318 | .params = tuner_tcl_2002n_params, | ||
1319 | }, | ||
1320 | [TUNER_PHILIPS_FM1256_IH3] = { /* Philips PAL */ | ||
1321 | .name = "Philips PAL/SECAM_D (FM 1256 I-H3)", | ||
1322 | .params = tuner_philips_fm1256_ih3_params, | ||
1323 | }, | ||
1324 | [TUNER_THOMSON_DTT7610] = { /* THOMSON ATSC */ | ||
1325 | .name = "Thomson DTT 7610 (ATSC/NTSC)", | ||
1326 | .params = tuner_thomson_dtt7610_params, | ||
1327 | }, | ||
1328 | [TUNER_PHILIPS_FQ1286] = { /* Philips NTSC */ | ||
1329 | .name = "Philips FQ1286", | ||
1330 | .params = tuner_philips_fq1286_params, | ||
1331 | }, | ||
1332 | [TUNER_PHILIPS_TDA8290] = { /* Philips PAL|NTSC */ | ||
1333 | .name = "tda8290+75", | ||
1334 | /* see tda8290.c for details */ }, | ||
1335 | [TUNER_TCL_2002MB] = { /* TCL PAL */ | ||
1336 | .name = "TCL 2002MB", | ||
1337 | .params = tuner_tcl_2002mb_params, | ||
1338 | }, | ||
1339 | [TUNER_PHILIPS_FQ1216AME_MK4] = { /* Philips PAL */ | ||
1340 | .name = "Philips PAL/SECAM multi (FQ1216AME MK4)", | ||
1341 | .params = tuner_philips_fq1216ame_mk4_params, | ||
1342 | }, | ||
1343 | [TUNER_PHILIPS_FQ1236A_MK4] = { /* Philips NTSC */ | ||
1344 | .name = "Philips FQ1236A MK4", | ||
1345 | .params = tuner_philips_fq1236a_mk4_params, | ||
1346 | }, | ||
1347 | [TUNER_YMEC_TVF_8531MF] = { /* Philips NTSC */ | ||
1348 | .name = "Ymec TVision TVF-8531MF/8831MF/8731MF", | ||
1349 | .params = tuner_ymec_tvf_8531mf_params, | ||
1350 | }, | ||
1351 | [TUNER_YMEC_TVF_5533MF] = { /* Philips NTSC */ | ||
1352 | .name = "Ymec TVision TVF-5533MF", | ||
1353 | .params = tuner_ymec_tvf_5533mf_params, | ||
1354 | }, | ||
1355 | |||
1356 | /* 60-69 */ | ||
1357 | [TUNER_THOMSON_DTT761X] = { /* THOMSON ATSC */ | ||
1358 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ | ||
1359 | .name = "Thomson DTT 761X (ATSC/NTSC)", | ||
1360 | .params = tuner_thomson_dtt761x_params, | ||
1361 | }, | ||
1362 | [TUNER_TENA_9533_DI] = { /* Philips PAL */ | ||
1363 | .name = "Tena TNF9533-D/IF/TNF9533-B/DF", | ||
1364 | .params = tuner_tena_9533_di_params, | ||
1365 | }, | ||
1366 | [TUNER_TEA5767] = { /* Philips RADIO */ | ||
1367 | .name = "Philips TEA5767HN FM Radio", | ||
1368 | /* see tea5767.c for details */ | ||
1369 | }, | ||
1370 | [TUNER_PHILIPS_FMD1216ME_MK3] = { /* Philips PAL */ | ||
1371 | .name = "Philips FMD1216ME MK3 Hybrid Tuner", | ||
1372 | .params = tuner_tuner_philips_fmd1216me_mk3_params, | ||
1373 | }, | ||
1374 | [TUNER_LG_TDVS_H062F] = { /* LGINNOTEK ATSC */ | ||
1375 | .name = "LG TDVS-H062F/TUA6034", | ||
1376 | .params = tuner_tua6034_params, | ||
1377 | }, | ||
1378 | [TUNER_YMEC_TVF66T5_B_DFF] = { /* Philips PAL */ | ||
1379 | .name = "Ymec TVF66T5-B/DFF", | ||
1380 | .params = tuner_ymec_tvf66t5_b_dff_params, | ||
1381 | }, | ||
1382 | [TUNER_LG_NTSC_TALN_MINI] = { /* LGINNOTEK NTSC */ | ||
1383 | .name = "LG NTSC (TALN mini series)", | ||
1384 | .params = tuner_lg_taln_mini_params, | ||
1385 | }, | ||
1386 | [TUNER_PHILIPS_TD1316] = { /* Philips PAL */ | ||
1387 | .name = "Philips TD1316 Hybrid Tuner", | ||
1388 | .params = tuner_philips_td1316_params, | ||
1389 | }, | ||
1390 | [TUNER_PHILIPS_TUV1236D] = { /* Philips ATSC */ | ||
1391 | .name = "Philips TUV1236D ATSC/NTSC dual in", | ||
1392 | .params = tuner_tuner_tuv1236d_params, | ||
1393 | }, | ||
1394 | [TUNER_TNF_5335MF] = { /* Philips NTSC */ | ||
1395 | .name = "Tena TNF 5335 MF", | ||
1396 | .params = tuner_tnf_5335mf_params, | ||
1397 | }, | ||
1398 | |||
1399 | /* 70-79 */ | ||
1400 | [TUNER_SAMSUNG_TCPN_2121P30A] = { /* Samsung NTSC */ | ||
1401 | .name = "Samsung TCPN 2121P30A", | ||
1402 | .params = tuner_samsung_tcpn_2121p30a_params, | ||
1403 | }, | ||
1404 | }; | ||
1405 | |||
1406 | unsigned const int tuner_count = ARRAY_SIZE(tuners); | ||
diff --git a/drivers/media/video/tveeprom.c b/drivers/media/video/tveeprom.c index 5e71a354e879..582551b0969b 100644 --- a/drivers/media/video/tveeprom.c +++ b/drivers/media/video/tveeprom.c | |||
@@ -190,7 +190,7 @@ hauppauge_tuner[] = | |||
190 | { TUNER_LG_PAL_NEW_TAPC, "TCL 2002MI 3"}, | 190 | { TUNER_LG_PAL_NEW_TAPC, "TCL 2002MI 3"}, |
191 | { TUNER_TCL_2002N, "TCL 2002N 6A"}, | 191 | { TUNER_TCL_2002N, "TCL 2002N 6A"}, |
192 | { TUNER_PHILIPS_FM1236_MK3, "Philips FQ1236 MK3"}, | 192 | { TUNER_PHILIPS_FM1236_MK3, "Philips FQ1236 MK3"}, |
193 | { TUNER_ABSENT, "Samsung TCPN 2121P30A"}, | 193 | { TUNER_SAMSUNG_TCPN_2121P30A, "Samsung TCPN 2121P30A"}, |
194 | { TUNER_ABSENT, "Samsung TCPE 4121P30A"}, | 194 | { TUNER_ABSENT, "Samsung TCPE 4121P30A"}, |
195 | { TUNER_PHILIPS_FM1216ME_MK3, "TCL MFPE05 2"}, | 195 | { TUNER_PHILIPS_FM1216ME_MK3, "TCL MFPE05 2"}, |
196 | /* 90-99 */ | 196 | /* 90-99 */ |
diff --git a/drivers/media/video/tvp5150.c b/drivers/media/video/tvp5150.c index 9094fa9f2ecb..fad9ea0ae4f2 100644 --- a/drivers/media/video/tvp5150.c +++ b/drivers/media/video/tvp5150.c | |||
@@ -634,7 +634,7 @@ struct i2c_vbi_ram_value { | |||
634 | unsigned char values[26]; | 634 | unsigned char values[26]; |
635 | }; | 635 | }; |
636 | 636 | ||
637 | struct i2c_vbi_ram_value vbi_ram_default[] = | 637 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
638 | { | 638 | { |
639 | {0x010, /* WST SECAM 6 */ | 639 | {0x010, /* WST SECAM 6 */ |
640 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 } | 640 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 } |
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c index 5dbd7c1b362a..cd2c4475525e 100644 --- a/drivers/media/video/v4l2-common.c +++ b/drivers/media/video/v4l2-common.c | |||
@@ -306,6 +306,7 @@ static const char *v4l2_int_ioctls[] = { | |||
306 | #endif | 306 | #endif |
307 | [_IOC_NR(AUDC_SET_RADIO)] = "AUDC_SET_RADIO", | 307 | [_IOC_NR(AUDC_SET_RADIO)] = "AUDC_SET_RADIO", |
308 | [_IOC_NR(AUDC_SET_INPUT)] = "AUDC_SET_INPUT", | 308 | [_IOC_NR(AUDC_SET_INPUT)] = "AUDC_SET_INPUT", |
309 | [_IOC_NR(MSP_SET_MATRIX)] = "MSP_SET_MATRIX", | ||
309 | 310 | ||
310 | [_IOC_NR(TUNER_SET_TYPE_ADDR)] = "TUNER_SET_TYPE_ADDR", | 311 | [_IOC_NR(TUNER_SET_TYPE_ADDR)] = "TUNER_SET_TYPE_ADDR", |
311 | [_IOC_NR(TUNER_SET_STANDBY)] = "TUNER_SET_STANDBY", | 312 | [_IOC_NR(TUNER_SET_STANDBY)] = "TUNER_SET_STANDBY", |
diff --git a/drivers/media/video/videodev.c b/drivers/media/video/videodev.c index d5be25987142..078880e4c8c0 100644 --- a/drivers/media/video/videodev.c +++ b/drivers/media/video/videodev.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <linux/devfs_fs_kernel.h> | 29 | #include <linux/devfs_fs_kernel.h> |
30 | #include <asm/uaccess.h> | 30 | #include <asm/uaccess.h> |
31 | #include <asm/system.h> | 31 | #include <asm/system.h> |
32 | #include <asm/semaphore.h> | ||
33 | 32 | ||
34 | #include <linux/videodev.h> | 33 | #include <linux/videodev.h> |
35 | 34 | ||
@@ -83,7 +82,7 @@ static struct class video_class = { | |||
83 | */ | 82 | */ |
84 | 83 | ||
85 | static struct video_device *video_device[VIDEO_NUM_DEVICES]; | 84 | static struct video_device *video_device[VIDEO_NUM_DEVICES]; |
86 | static DECLARE_MUTEX(videodev_lock); | 85 | static DEFINE_MUTEX(videodev_lock); |
87 | 86 | ||
88 | struct video_device* video_devdata(struct file *file) | 87 | struct video_device* video_devdata(struct file *file) |
89 | { | 88 | { |
@@ -102,15 +101,15 @@ static int video_open(struct inode *inode, struct file *file) | |||
102 | 101 | ||
103 | if(minor>=VIDEO_NUM_DEVICES) | 102 | if(minor>=VIDEO_NUM_DEVICES) |
104 | return -ENODEV; | 103 | return -ENODEV; |
105 | down(&videodev_lock); | 104 | mutex_lock(&videodev_lock); |
106 | vfl=video_device[minor]; | 105 | vfl=video_device[minor]; |
107 | if(vfl==NULL) { | 106 | if(vfl==NULL) { |
108 | up(&videodev_lock); | 107 | mutex_unlock(&videodev_lock); |
109 | request_module("char-major-%d-%d", VIDEO_MAJOR, minor); | 108 | request_module("char-major-%d-%d", VIDEO_MAJOR, minor); |
110 | down(&videodev_lock); | 109 | mutex_lock(&videodev_lock); |
111 | vfl=video_device[minor]; | 110 | vfl=video_device[minor]; |
112 | if (vfl==NULL) { | 111 | if (vfl==NULL) { |
113 | up(&videodev_lock); | 112 | mutex_unlock(&videodev_lock); |
114 | return -ENODEV; | 113 | return -ENODEV; |
115 | } | 114 | } |
116 | } | 115 | } |
@@ -123,7 +122,7 @@ static int video_open(struct inode *inode, struct file *file) | |||
123 | file->f_op = fops_get(old_fops); | 122 | file->f_op = fops_get(old_fops); |
124 | } | 123 | } |
125 | fops_put(old_fops); | 124 | fops_put(old_fops); |
126 | up(&videodev_lock); | 125 | mutex_unlock(&videodev_lock); |
127 | return err; | 126 | return err; |
128 | } | 127 | } |
129 | 128 | ||
@@ -304,12 +303,12 @@ int video_register_device(struct video_device *vfd, int type, int nr) | |||
304 | } | 303 | } |
305 | 304 | ||
306 | /* pick a minor number */ | 305 | /* pick a minor number */ |
307 | down(&videodev_lock); | 306 | mutex_lock(&videodev_lock); |
308 | if (nr >= 0 && nr < end-base) { | 307 | if (nr >= 0 && nr < end-base) { |
309 | /* use the one the driver asked for */ | 308 | /* use the one the driver asked for */ |
310 | i = base+nr; | 309 | i = base+nr; |
311 | if (NULL != video_device[i]) { | 310 | if (NULL != video_device[i]) { |
312 | up(&videodev_lock); | 311 | mutex_unlock(&videodev_lock); |
313 | return -ENFILE; | 312 | return -ENFILE; |
314 | } | 313 | } |
315 | } else { | 314 | } else { |
@@ -318,13 +317,13 @@ int video_register_device(struct video_device *vfd, int type, int nr) | |||
318 | if (NULL == video_device[i]) | 317 | if (NULL == video_device[i]) |
319 | break; | 318 | break; |
320 | if (i == end) { | 319 | if (i == end) { |
321 | up(&videodev_lock); | 320 | mutex_unlock(&videodev_lock); |
322 | return -ENFILE; | 321 | return -ENFILE; |
323 | } | 322 | } |
324 | } | 323 | } |
325 | video_device[i]=vfd; | 324 | video_device[i]=vfd; |
326 | vfd->minor=i; | 325 | vfd->minor=i; |
327 | up(&videodev_lock); | 326 | mutex_unlock(&videodev_lock); |
328 | 327 | ||
329 | sprintf(vfd->devfs_name, "v4l/%s%d", name_base, i - base); | 328 | sprintf(vfd->devfs_name, "v4l/%s%d", name_base, i - base); |
330 | devfs_mk_cdev(MKDEV(VIDEO_MAJOR, vfd->minor), | 329 | devfs_mk_cdev(MKDEV(VIDEO_MAJOR, vfd->minor), |
@@ -362,14 +361,14 @@ int video_register_device(struct video_device *vfd, int type, int nr) | |||
362 | 361 | ||
363 | void video_unregister_device(struct video_device *vfd) | 362 | void video_unregister_device(struct video_device *vfd) |
364 | { | 363 | { |
365 | down(&videodev_lock); | 364 | mutex_lock(&videodev_lock); |
366 | if(video_device[vfd->minor]!=vfd) | 365 | if(video_device[vfd->minor]!=vfd) |
367 | panic("videodev: bad unregister"); | 366 | panic("videodev: bad unregister"); |
368 | 367 | ||
369 | devfs_remove(vfd->devfs_name); | 368 | devfs_remove(vfd->devfs_name); |
370 | video_device[vfd->minor]=NULL; | 369 | video_device[vfd->minor]=NULL; |
371 | class_device_unregister(&vfd->class_dev); | 370 | class_device_unregister(&vfd->class_dev); |
372 | up(&videodev_lock); | 371 | mutex_unlock(&videodev_lock); |
373 | } | 372 | } |
374 | 373 | ||
375 | 374 | ||
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig index eafa23f5cbd6..effa0d7a73ac 100644 --- a/drivers/mtd/chips/Kconfig +++ b/drivers/mtd/chips/Kconfig | |||
@@ -31,6 +31,7 @@ config MTD_JEDECPROBE | |||
31 | 31 | ||
32 | config MTD_GEN_PROBE | 32 | config MTD_GEN_PROBE |
33 | tristate | 33 | tristate |
34 | select OBSOLETE_INTERMODULE | ||
34 | 35 | ||
35 | config MTD_CFI_ADV_OPTIONS | 36 | config MTD_CFI_ADV_OPTIONS |
36 | bool "Flash chip driver advanced configuration options" | 37 | bool "Flash chip driver advanced configuration options" |
@@ -259,7 +260,7 @@ config MTD_ABSENT | |||
259 | with this driver will return -ENODEV upon access. | 260 | with this driver will return -ENODEV upon access. |
260 | 261 | ||
261 | config MTD_OBSOLETE_CHIPS | 262 | config MTD_OBSOLETE_CHIPS |
262 | depends on MTD && BROKEN | 263 | depends on MTD |
263 | bool "Older (theoretically obsoleted now) drivers for non-CFI chips" | 264 | bool "Older (theoretically obsoleted now) drivers for non-CFI chips" |
264 | help | 265 | help |
265 | This option does not enable any code directly, but will allow you to | 266 | This option does not enable any code directly, but will allow you to |
@@ -272,7 +273,7 @@ config MTD_OBSOLETE_CHIPS | |||
272 | 273 | ||
273 | config MTD_AMDSTD | 274 | config MTD_AMDSTD |
274 | tristate "AMD compatible flash chip support (non-CFI)" | 275 | tristate "AMD compatible flash chip support (non-CFI)" |
275 | depends on MTD && MTD_OBSOLETE_CHIPS | 276 | depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN |
276 | help | 277 | help |
277 | This option enables support for flash chips using AMD-compatible | 278 | This option enables support for flash chips using AMD-compatible |
278 | commands, including some which are not CFI-compatible and hence | 279 | commands, including some which are not CFI-compatible and hence |
@@ -290,7 +291,7 @@ config MTD_SHARP | |||
290 | 291 | ||
291 | config MTD_JEDEC | 292 | config MTD_JEDEC |
292 | tristate "JEDEC device support" | 293 | tristate "JEDEC device support" |
293 | depends on MTD && MTD_OBSOLETE_CHIPS | 294 | depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN |
294 | help | 295 | help |
295 | Enable older older JEDEC flash interface devices for self | 296 | Enable older older JEDEC flash interface devices for self |
296 | programming flash. It is commonly used in older AMD chips. It is | 297 | programming flash. It is commonly used in older AMD chips. It is |
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig index 5038e90ceb12..dd628cb51e31 100644 --- a/drivers/mtd/devices/Kconfig +++ b/drivers/mtd/devices/Kconfig | |||
@@ -218,6 +218,7 @@ config MTD_DOC2001PLUS | |||
218 | config MTD_DOCPROBE | 218 | config MTD_DOCPROBE |
219 | tristate | 219 | tristate |
220 | select MTD_DOCECC | 220 | select MTD_DOCECC |
221 | select OBSOLETE_INTERMODULE | ||
221 | 222 | ||
222 | config MTD_DOCECC | 223 | config MTD_DOCECC |
223 | tristate | 224 | tristate |
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index fab6586d87e9..ef54ebeb29b8 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c | |||
@@ -93,6 +93,9 @@ | |||
93 | Deepak Saxena : dsaxena@plexity.net | 93 | Deepak Saxena : dsaxena@plexity.net |
94 | : Intel IXDP2351 platform support | 94 | : Intel IXDP2351 platform support |
95 | 95 | ||
96 | Dmitry Pervushin : dpervushin@ru.mvista.com | ||
97 | : PNX010X platform support | ||
98 | |||
96 | */ | 99 | */ |
97 | 100 | ||
98 | /* Always include 'config.h' first in case the user wants to turn on | 101 | /* Always include 'config.h' first in case the user wants to turn on |
diff --git a/drivers/video/sbuslib.c b/drivers/video/sbuslib.c index 3a74a63dd4f2..55e6e2d60d3a 100644 --- a/drivers/video/sbuslib.c +++ b/drivers/video/sbuslib.c | |||
@@ -216,10 +216,10 @@ static int fbiogetputcmap(struct file *file, struct fb_info *info, | |||
216 | ret |= put_user(compat_ptr(addr), &p->blue); | 216 | ret |= put_user(compat_ptr(addr), &p->blue); |
217 | if (ret) | 217 | if (ret) |
218 | return -EFAULT; | 218 | return -EFAULT; |
219 | return info->fbops->fb_ioctl(file->f_dentry->d_inode, file, | 219 | return info->fbops->fb_ioctl(info, |
220 | (cmd == FBIOPUTCMAP32) ? | 220 | (cmd == FBIOPUTCMAP32) ? |
221 | FBIOPUTCMAP_SPARC : FBIOGETCMAP_SPARC, | 221 | FBIOPUTCMAP_SPARC : FBIOGETCMAP_SPARC, |
222 | (unsigned long)p, info); | 222 | (unsigned long)p); |
223 | } | 223 | } |
224 | 224 | ||
225 | struct fbcursor32 { | 225 | struct fbcursor32 { |
@@ -260,12 +260,11 @@ static int fbiogscursor(struct file *file, struct fb_info *info, | |||
260 | ret |= put_user(compat_ptr(addr), &p->image); | 260 | ret |= put_user(compat_ptr(addr), &p->image); |
261 | if (ret) | 261 | if (ret) |
262 | return -EFAULT; | 262 | return -EFAULT; |
263 | return info->fbops->fb_ioctl(file->f_dentry->d_inode, file, | 263 | return info->fbops->fb_ioctl(info, FBIOSCURSOR, (unsigned long)p); |
264 | FBIOSCURSOR, (unsigned long)p, info); | ||
265 | } | 264 | } |
266 | 265 | ||
267 | long sbusfb_compat_ioctl(struct file *file, unsigned int cmd, | 266 | long sbusfb_compat_ioctl(struct fb_info *info, unsigned int cmd, |
268 | unsigned long arg, struct fb_info *info) | 267 | unsigned long arg) |
269 | { | 268 | { |
270 | switch (cmd) { | 269 | switch (cmd) { |
271 | case FBIOGTYPE: | 270 | case FBIOGTYPE: |
@@ -278,14 +277,13 @@ long sbusfb_compat_ioctl(struct file *file, unsigned int cmd, | |||
278 | case FBIOSCURPOS: | 277 | case FBIOSCURPOS: |
279 | case FBIOGCURPOS: | 278 | case FBIOGCURPOS: |
280 | case FBIOGCURMAX: | 279 | case FBIOGCURMAX: |
281 | return info->fbops->fb_ioctl(file->f_dentry->d_inode, | 280 | return info->fbops->fb_ioctl(info, cmd, arg); |
282 | file, cmd, arg, info); | ||
283 | case FBIOPUTCMAP32: | 281 | case FBIOPUTCMAP32: |
284 | return fbiogetputcmap(file, info, cmd, arg); | 282 | return fbiogetputcmap(info, cmd, arg); |
285 | case FBIOGETCMAP32: | 283 | case FBIOGETCMAP32: |
286 | return fbiogetputcmap(file, info, cmd, arg); | 284 | return fbiogetputcmap(info, cmd, arg); |
287 | case FBIOSCURSOR32: | 285 | case FBIOSCURSOR32: |
288 | return fbiogscursor(file, info, arg); | 286 | return fbiogscursor(info, arg); |
289 | default: | 287 | default: |
290 | return -ENOIOCTLCMD; | 288 | return -ENOIOCTLCMD; |
291 | } | 289 | } |
diff --git a/drivers/video/sbuslib.h b/drivers/video/sbuslib.h index b470e52ce9e2..f753939013ed 100644 --- a/drivers/video/sbuslib.h +++ b/drivers/video/sbuslib.h | |||
@@ -20,7 +20,7 @@ extern int sbusfb_mmap_helper(struct sbus_mmap_map *map, | |||
20 | int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg, | 20 | int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg, |
21 | struct fb_info *info, | 21 | struct fb_info *info, |
22 | int type, int fb_depth, unsigned long fb_size); | 22 | int type, int fb_depth, unsigned long fb_size); |
23 | long sbusfb_compat_ioctl(struct file *file, unsigned int cmd, | 23 | long sbusfb_compat_ioctl(struct fb_info *info, unsigned int cmd, |
24 | unsigned long arg, struct fb_info *info); | 24 | unsigned long arg); |
25 | 25 | ||
26 | #endif /* _SBUSLIB_H */ | 26 | #endif /* _SBUSLIB_H */ |
diff --git a/fs/buffer.c b/fs/buffer.c index 7cdf48a9a501..3dc712f29d2d 100644 --- a/fs/buffer.c +++ b/fs/buffer.c | |||
@@ -1027,7 +1027,7 @@ try_again: | |||
1027 | /* Link the buffer to its page */ | 1027 | /* Link the buffer to its page */ |
1028 | set_bh_page(bh, page, offset); | 1028 | set_bh_page(bh, page, offset); |
1029 | 1029 | ||
1030 | bh->b_end_io = NULL; | 1030 | init_buffer(bh, NULL, NULL); |
1031 | } | 1031 | } |
1032 | return head; | 1032 | return head; |
1033 | /* | 1033 | /* |
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c index e08ab4702d97..4526da8907c6 100644 --- a/fs/fuse/dev.c +++ b/fs/fuse/dev.c | |||
@@ -21,18 +21,18 @@ MODULE_ALIAS_MISCDEV(FUSE_MINOR); | |||
21 | 21 | ||
22 | static kmem_cache_t *fuse_req_cachep; | 22 | static kmem_cache_t *fuse_req_cachep; |
23 | 23 | ||
24 | static inline struct fuse_conn *fuse_get_conn(struct file *file) | 24 | static struct fuse_conn *fuse_get_conn(struct file *file) |
25 | { | 25 | { |
26 | struct fuse_conn *fc; | 26 | struct fuse_conn *fc; |
27 | spin_lock(&fuse_lock); | 27 | spin_lock(&fuse_lock); |
28 | fc = file->private_data; | 28 | fc = file->private_data; |
29 | if (fc && !fc->mounted) | 29 | if (fc && !fc->connected) |
30 | fc = NULL; | 30 | fc = NULL; |
31 | spin_unlock(&fuse_lock); | 31 | spin_unlock(&fuse_lock); |
32 | return fc; | 32 | return fc; |
33 | } | 33 | } |
34 | 34 | ||
35 | static inline void fuse_request_init(struct fuse_req *req) | 35 | static void fuse_request_init(struct fuse_req *req) |
36 | { | 36 | { |
37 | memset(req, 0, sizeof(*req)); | 37 | memset(req, 0, sizeof(*req)); |
38 | INIT_LIST_HEAD(&req->list); | 38 | INIT_LIST_HEAD(&req->list); |
@@ -53,7 +53,7 @@ void fuse_request_free(struct fuse_req *req) | |||
53 | kmem_cache_free(fuse_req_cachep, req); | 53 | kmem_cache_free(fuse_req_cachep, req); |
54 | } | 54 | } |
55 | 55 | ||
56 | static inline void block_sigs(sigset_t *oldset) | 56 | static void block_sigs(sigset_t *oldset) |
57 | { | 57 | { |
58 | sigset_t mask; | 58 | sigset_t mask; |
59 | 59 | ||
@@ -61,7 +61,7 @@ static inline void block_sigs(sigset_t *oldset) | |||
61 | sigprocmask(SIG_BLOCK, &mask, oldset); | 61 | sigprocmask(SIG_BLOCK, &mask, oldset); |
62 | } | 62 | } |
63 | 63 | ||
64 | static inline void restore_sigs(sigset_t *oldset) | 64 | static void restore_sigs(sigset_t *oldset) |
65 | { | 65 | { |
66 | sigprocmask(SIG_SETMASK, oldset, NULL); | 66 | sigprocmask(SIG_SETMASK, oldset, NULL); |
67 | } | 67 | } |
@@ -109,18 +109,24 @@ struct fuse_req *fuse_get_request(struct fuse_conn *fc) | |||
109 | int intr; | 109 | int intr; |
110 | sigset_t oldset; | 110 | sigset_t oldset; |
111 | 111 | ||
112 | atomic_inc(&fc->num_waiting); | ||
112 | block_sigs(&oldset); | 113 | block_sigs(&oldset); |
113 | intr = down_interruptible(&fc->outstanding_sem); | 114 | intr = down_interruptible(&fc->outstanding_sem); |
114 | restore_sigs(&oldset); | 115 | restore_sigs(&oldset); |
115 | return intr ? NULL : do_get_request(fc); | 116 | if (intr) { |
117 | atomic_dec(&fc->num_waiting); | ||
118 | return NULL; | ||
119 | } | ||
120 | return do_get_request(fc); | ||
116 | } | 121 | } |
117 | 122 | ||
118 | static void fuse_putback_request(struct fuse_conn *fc, struct fuse_req *req) | 123 | static void fuse_putback_request(struct fuse_conn *fc, struct fuse_req *req) |
119 | { | 124 | { |
120 | spin_lock(&fuse_lock); | 125 | spin_lock(&fuse_lock); |
121 | if (req->preallocated) | 126 | if (req->preallocated) { |
127 | atomic_dec(&fc->num_waiting); | ||
122 | list_add(&req->list, &fc->unused_list); | 128 | list_add(&req->list, &fc->unused_list); |
123 | else | 129 | } else |
124 | fuse_request_free(req); | 130 | fuse_request_free(req); |
125 | 131 | ||
126 | /* If we are in debt decrease that first */ | 132 | /* If we are in debt decrease that first */ |
@@ -148,42 +154,23 @@ void fuse_release_background(struct fuse_req *req) | |||
148 | spin_unlock(&fuse_lock); | 154 | spin_unlock(&fuse_lock); |
149 | } | 155 | } |
150 | 156 | ||
151 | static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) | ||
152 | { | ||
153 | int i; | ||
154 | struct fuse_init_out *arg = &req->misc.init_out; | ||
155 | |||
156 | if (arg->major != FUSE_KERNEL_VERSION) | ||
157 | fc->conn_error = 1; | ||
158 | else { | ||
159 | fc->minor = arg->minor; | ||
160 | fc->max_write = arg->minor < 5 ? 4096 : arg->max_write; | ||
161 | } | ||
162 | |||
163 | /* After INIT reply is received other requests can go | ||
164 | out. So do (FUSE_MAX_OUTSTANDING - 1) number of | ||
165 | up()s on outstanding_sem. The last up() is done in | ||
166 | fuse_putback_request() */ | ||
167 | for (i = 1; i < FUSE_MAX_OUTSTANDING; i++) | ||
168 | up(&fc->outstanding_sem); | ||
169 | } | ||
170 | |||
171 | /* | 157 | /* |
172 | * This function is called when a request is finished. Either a reply | 158 | * This function is called when a request is finished. Either a reply |
173 | * has arrived or it was interrupted (and not yet sent) or some error | 159 | * has arrived or it was interrupted (and not yet sent) or some error |
174 | * occurred during communication with userspace, or the device file was | 160 | * occurred during communication with userspace, or the device file |
175 | * closed. It decreases the reference count for the request. In case | 161 | * was closed. In case of a background request the reference to the |
176 | * of a background request the reference to the stored objects are | 162 | * stored objects are released. The requester thread is woken up (if |
177 | * released. The requester thread is woken up (if still waiting), and | 163 | * still waiting), the 'end' callback is called if given, else the |
178 | * finally the request is either freed or put on the unused_list | 164 | * reference to the request is released |
179 | * | 165 | * |
180 | * Called with fuse_lock, unlocks it | 166 | * Called with fuse_lock, unlocks it |
181 | */ | 167 | */ |
182 | static void request_end(struct fuse_conn *fc, struct fuse_req *req) | 168 | static void request_end(struct fuse_conn *fc, struct fuse_req *req) |
183 | { | 169 | { |
184 | int putback; | 170 | void (*end) (struct fuse_conn *, struct fuse_req *) = req->end; |
185 | req->finished = 1; | 171 | req->end = NULL; |
186 | putback = atomic_dec_and_test(&req->count); | 172 | list_del(&req->list); |
173 | req->state = FUSE_REQ_FINISHED; | ||
187 | spin_unlock(&fuse_lock); | 174 | spin_unlock(&fuse_lock); |
188 | if (req->background) { | 175 | if (req->background) { |
189 | down_read(&fc->sbput_sem); | 176 | down_read(&fc->sbput_sem); |
@@ -192,18 +179,10 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req) | |||
192 | up_read(&fc->sbput_sem); | 179 | up_read(&fc->sbput_sem); |
193 | } | 180 | } |
194 | wake_up(&req->waitq); | 181 | wake_up(&req->waitq); |
195 | if (req->in.h.opcode == FUSE_INIT) | 182 | if (end) |
196 | process_init_reply(fc, req); | 183 | end(fc, req); |
197 | else if (req->in.h.opcode == FUSE_RELEASE && req->inode == NULL) { | 184 | else |
198 | /* Special case for failed iget in CREATE */ | 185 | fuse_put_request(fc, req); |
199 | u64 nodeid = req->in.h.nodeid; | ||
200 | __fuse_get_request(req); | ||
201 | fuse_reset_request(req); | ||
202 | fuse_send_forget(fc, req, nodeid, 1); | ||
203 | putback = 0; | ||
204 | } | ||
205 | if (putback) | ||
206 | fuse_putback_request(fc, req); | ||
207 | } | 186 | } |
208 | 187 | ||
209 | /* | 188 | /* |
@@ -254,14 +233,16 @@ static void request_wait_answer(struct fuse_conn *fc, struct fuse_req *req) | |||
254 | 233 | ||
255 | spin_unlock(&fuse_lock); | 234 | spin_unlock(&fuse_lock); |
256 | block_sigs(&oldset); | 235 | block_sigs(&oldset); |
257 | wait_event_interruptible(req->waitq, req->finished); | 236 | wait_event_interruptible(req->waitq, req->state == FUSE_REQ_FINISHED); |
258 | restore_sigs(&oldset); | 237 | restore_sigs(&oldset); |
259 | spin_lock(&fuse_lock); | 238 | spin_lock(&fuse_lock); |
260 | if (req->finished) | 239 | if (req->state == FUSE_REQ_FINISHED && !req->interrupted) |
261 | return; | 240 | return; |
262 | 241 | ||
263 | req->out.h.error = -EINTR; | 242 | if (!req->interrupted) { |
264 | req->interrupted = 1; | 243 | req->out.h.error = -EINTR; |
244 | req->interrupted = 1; | ||
245 | } | ||
265 | if (req->locked) { | 246 | if (req->locked) { |
266 | /* This is uninterruptible sleep, because data is | 247 | /* This is uninterruptible sleep, because data is |
267 | being copied to/from the buffers of req. During | 248 | being copied to/from the buffers of req. During |
@@ -272,10 +253,10 @@ static void request_wait_answer(struct fuse_conn *fc, struct fuse_req *req) | |||
272 | wait_event(req->waitq, !req->locked); | 253 | wait_event(req->waitq, !req->locked); |
273 | spin_lock(&fuse_lock); | 254 | spin_lock(&fuse_lock); |
274 | } | 255 | } |
275 | if (!req->sent && !list_empty(&req->list)) { | 256 | if (req->state == FUSE_REQ_PENDING) { |
276 | list_del(&req->list); | 257 | list_del(&req->list); |
277 | __fuse_put_request(req); | 258 | __fuse_put_request(req); |
278 | } else if (!req->finished && req->sent) | 259 | } else if (req->state == FUSE_REQ_SENT) |
279 | background_request(fc, req); | 260 | background_request(fc, req); |
280 | } | 261 | } |
281 | 262 | ||
@@ -310,6 +291,7 @@ static void queue_request(struct fuse_conn *fc, struct fuse_req *req) | |||
310 | fc->outstanding_debt++; | 291 | fc->outstanding_debt++; |
311 | } | 292 | } |
312 | list_add_tail(&req->list, &fc->pending); | 293 | list_add_tail(&req->list, &fc->pending); |
294 | req->state = FUSE_REQ_PENDING; | ||
313 | wake_up(&fc->waitq); | 295 | wake_up(&fc->waitq); |
314 | } | 296 | } |
315 | 297 | ||
@@ -362,34 +344,12 @@ void request_send_background(struct fuse_conn *fc, struct fuse_req *req) | |||
362 | request_send_nowait(fc, req); | 344 | request_send_nowait(fc, req); |
363 | } | 345 | } |
364 | 346 | ||
365 | void fuse_send_init(struct fuse_conn *fc) | ||
366 | { | ||
367 | /* This is called from fuse_read_super() so there's guaranteed | ||
368 | to be a request available */ | ||
369 | struct fuse_req *req = do_get_request(fc); | ||
370 | struct fuse_init_in *arg = &req->misc.init_in; | ||
371 | arg->major = FUSE_KERNEL_VERSION; | ||
372 | arg->minor = FUSE_KERNEL_MINOR_VERSION; | ||
373 | req->in.h.opcode = FUSE_INIT; | ||
374 | req->in.numargs = 1; | ||
375 | req->in.args[0].size = sizeof(*arg); | ||
376 | req->in.args[0].value = arg; | ||
377 | req->out.numargs = 1; | ||
378 | /* Variable length arguement used for backward compatibility | ||
379 | with interface version < 7.5. Rest of init_out is zeroed | ||
380 | by do_get_request(), so a short reply is not a problem */ | ||
381 | req->out.argvar = 1; | ||
382 | req->out.args[0].size = sizeof(struct fuse_init_out); | ||
383 | req->out.args[0].value = &req->misc.init_out; | ||
384 | request_send_background(fc, req); | ||
385 | } | ||
386 | |||
387 | /* | 347 | /* |
388 | * Lock the request. Up to the next unlock_request() there mustn't be | 348 | * Lock the request. Up to the next unlock_request() there mustn't be |
389 | * anything that could cause a page-fault. If the request was already | 349 | * anything that could cause a page-fault. If the request was already |
390 | * interrupted bail out. | 350 | * interrupted bail out. |
391 | */ | 351 | */ |
392 | static inline int lock_request(struct fuse_req *req) | 352 | static int lock_request(struct fuse_req *req) |
393 | { | 353 | { |
394 | int err = 0; | 354 | int err = 0; |
395 | if (req) { | 355 | if (req) { |
@@ -408,7 +368,7 @@ static inline int lock_request(struct fuse_req *req) | |||
408 | * requester thread is currently waiting for it to be unlocked, so | 368 | * requester thread is currently waiting for it to be unlocked, so |
409 | * wake it up. | 369 | * wake it up. |
410 | */ | 370 | */ |
411 | static inline void unlock_request(struct fuse_req *req) | 371 | static void unlock_request(struct fuse_req *req) |
412 | { | 372 | { |
413 | if (req) { | 373 | if (req) { |
414 | spin_lock(&fuse_lock); | 374 | spin_lock(&fuse_lock); |
@@ -444,7 +404,7 @@ static void fuse_copy_init(struct fuse_copy_state *cs, int write, | |||
444 | } | 404 | } |
445 | 405 | ||
446 | /* Unmap and put previous page of userspace buffer */ | 406 | /* Unmap and put previous page of userspace buffer */ |
447 | static inline void fuse_copy_finish(struct fuse_copy_state *cs) | 407 | static void fuse_copy_finish(struct fuse_copy_state *cs) |
448 | { | 408 | { |
449 | if (cs->mapaddr) { | 409 | if (cs->mapaddr) { |
450 | kunmap_atomic(cs->mapaddr, KM_USER0); | 410 | kunmap_atomic(cs->mapaddr, KM_USER0); |
@@ -493,8 +453,7 @@ static int fuse_copy_fill(struct fuse_copy_state *cs) | |||
493 | } | 453 | } |
494 | 454 | ||
495 | /* Do as much copy to/from userspace buffer as we can */ | 455 | /* Do as much copy to/from userspace buffer as we can */ |
496 | static inline int fuse_copy_do(struct fuse_copy_state *cs, void **val, | 456 | static int fuse_copy_do(struct fuse_copy_state *cs, void **val, unsigned *size) |
497 | unsigned *size) | ||
498 | { | 457 | { |
499 | unsigned ncpy = min(*size, cs->len); | 458 | unsigned ncpy = min(*size, cs->len); |
500 | if (val) { | 459 | if (val) { |
@@ -514,8 +473,8 @@ static inline int fuse_copy_do(struct fuse_copy_state *cs, void **val, | |||
514 | * Copy a page in the request to/from the userspace buffer. Must be | 473 | * Copy a page in the request to/from the userspace buffer. Must be |
515 | * done atomically | 474 | * done atomically |
516 | */ | 475 | */ |
517 | static inline int fuse_copy_page(struct fuse_copy_state *cs, struct page *page, | 476 | static int fuse_copy_page(struct fuse_copy_state *cs, struct page *page, |
518 | unsigned offset, unsigned count, int zeroing) | 477 | unsigned offset, unsigned count, int zeroing) |
519 | { | 478 | { |
520 | if (page && zeroing && count < PAGE_SIZE) { | 479 | if (page && zeroing && count < PAGE_SIZE) { |
521 | void *mapaddr = kmap_atomic(page, KM_USER1); | 480 | void *mapaddr = kmap_atomic(page, KM_USER1); |
@@ -597,7 +556,7 @@ static void request_wait(struct fuse_conn *fc) | |||
597 | DECLARE_WAITQUEUE(wait, current); | 556 | DECLARE_WAITQUEUE(wait, current); |
598 | 557 | ||
599 | add_wait_queue_exclusive(&fc->waitq, &wait); | 558 | add_wait_queue_exclusive(&fc->waitq, &wait); |
600 | while (fc->mounted && list_empty(&fc->pending)) { | 559 | while (fc->connected && list_empty(&fc->pending)) { |
601 | set_current_state(TASK_INTERRUPTIBLE); | 560 | set_current_state(TASK_INTERRUPTIBLE); |
602 | if (signal_pending(current)) | 561 | if (signal_pending(current)) |
603 | break; | 562 | break; |
@@ -637,14 +596,15 @@ static ssize_t fuse_dev_readv(struct file *file, const struct iovec *iov, | |||
637 | goto err_unlock; | 596 | goto err_unlock; |
638 | request_wait(fc); | 597 | request_wait(fc); |
639 | err = -ENODEV; | 598 | err = -ENODEV; |
640 | if (!fc->mounted) | 599 | if (!fc->connected) |
641 | goto err_unlock; | 600 | goto err_unlock; |
642 | err = -ERESTARTSYS; | 601 | err = -ERESTARTSYS; |
643 | if (list_empty(&fc->pending)) | 602 | if (list_empty(&fc->pending)) |
644 | goto err_unlock; | 603 | goto err_unlock; |
645 | 604 | ||
646 | req = list_entry(fc->pending.next, struct fuse_req, list); | 605 | req = list_entry(fc->pending.next, struct fuse_req, list); |
647 | list_del_init(&req->list); | 606 | req->state = FUSE_REQ_READING; |
607 | list_move(&req->list, &fc->io); | ||
648 | 608 | ||
649 | in = &req->in; | 609 | in = &req->in; |
650 | reqsize = in->h.len; | 610 | reqsize = in->h.len; |
@@ -677,8 +637,8 @@ static ssize_t fuse_dev_readv(struct file *file, const struct iovec *iov, | |||
677 | if (!req->isreply) | 637 | if (!req->isreply) |
678 | request_end(fc, req); | 638 | request_end(fc, req); |
679 | else { | 639 | else { |
680 | req->sent = 1; | 640 | req->state = FUSE_REQ_SENT; |
681 | list_add_tail(&req->list, &fc->processing); | 641 | list_move_tail(&req->list, &fc->processing); |
682 | spin_unlock(&fuse_lock); | 642 | spin_unlock(&fuse_lock); |
683 | } | 643 | } |
684 | return reqsize; | 644 | return reqsize; |
@@ -766,17 +726,23 @@ static ssize_t fuse_dev_writev(struct file *file, const struct iovec *iov, | |||
766 | goto err_finish; | 726 | goto err_finish; |
767 | 727 | ||
768 | spin_lock(&fuse_lock); | 728 | spin_lock(&fuse_lock); |
729 | err = -ENOENT; | ||
730 | if (!fc->connected) | ||
731 | goto err_unlock; | ||
732 | |||
769 | req = request_find(fc, oh.unique); | 733 | req = request_find(fc, oh.unique); |
770 | err = -EINVAL; | 734 | err = -EINVAL; |
771 | if (!req) | 735 | if (!req) |
772 | goto err_unlock; | 736 | goto err_unlock; |
773 | 737 | ||
774 | list_del_init(&req->list); | ||
775 | if (req->interrupted) { | 738 | if (req->interrupted) { |
776 | request_end(fc, req); | 739 | spin_unlock(&fuse_lock); |
777 | fuse_copy_finish(&cs); | 740 | fuse_copy_finish(&cs); |
741 | spin_lock(&fuse_lock); | ||
742 | request_end(fc, req); | ||
778 | return -ENOENT; | 743 | return -ENOENT; |
779 | } | 744 | } |
745 | list_move(&req->list, &fc->io); | ||
780 | req->out.h = oh; | 746 | req->out.h = oh; |
781 | req->locked = 1; | 747 | req->locked = 1; |
782 | cs.req = req; | 748 | cs.req = req; |
@@ -830,19 +796,90 @@ static unsigned fuse_dev_poll(struct file *file, poll_table *wait) | |||
830 | return mask; | 796 | return mask; |
831 | } | 797 | } |
832 | 798 | ||
833 | /* Abort all requests on the given list (pending or processing) */ | 799 | /* |
800 | * Abort all requests on the given list (pending or processing) | ||
801 | * | ||
802 | * This function releases and reacquires fuse_lock | ||
803 | */ | ||
834 | static void end_requests(struct fuse_conn *fc, struct list_head *head) | 804 | static void end_requests(struct fuse_conn *fc, struct list_head *head) |
835 | { | 805 | { |
836 | while (!list_empty(head)) { | 806 | while (!list_empty(head)) { |
837 | struct fuse_req *req; | 807 | struct fuse_req *req; |
838 | req = list_entry(head->next, struct fuse_req, list); | 808 | req = list_entry(head->next, struct fuse_req, list); |
839 | list_del_init(&req->list); | ||
840 | req->out.h.error = -ECONNABORTED; | 809 | req->out.h.error = -ECONNABORTED; |
841 | request_end(fc, req); | 810 | request_end(fc, req); |
842 | spin_lock(&fuse_lock); | 811 | spin_lock(&fuse_lock); |
843 | } | 812 | } |
844 | } | 813 | } |
845 | 814 | ||
815 | /* | ||
816 | * Abort requests under I/O | ||
817 | * | ||
818 | * The requests are set to interrupted and finished, and the request | ||
819 | * waiter is woken up. This will make request_wait_answer() wait | ||
820 | * until the request is unlocked and then return. | ||
821 | * | ||
822 | * If the request is asynchronous, then the end function needs to be | ||
823 | * called after waiting for the request to be unlocked (if it was | ||
824 | * locked). | ||
825 | */ | ||
826 | static void end_io_requests(struct fuse_conn *fc) | ||
827 | { | ||
828 | while (!list_empty(&fc->io)) { | ||
829 | struct fuse_req *req = | ||
830 | list_entry(fc->io.next, struct fuse_req, list); | ||
831 | void (*end) (struct fuse_conn *, struct fuse_req *) = req->end; | ||
832 | |||
833 | req->interrupted = 1; | ||
834 | req->out.h.error = -ECONNABORTED; | ||
835 | req->state = FUSE_REQ_FINISHED; | ||
836 | list_del_init(&req->list); | ||
837 | wake_up(&req->waitq); | ||
838 | if (end) { | ||
839 | req->end = NULL; | ||
840 | /* The end function will consume this reference */ | ||
841 | __fuse_get_request(req); | ||
842 | spin_unlock(&fuse_lock); | ||
843 | wait_event(req->waitq, !req->locked); | ||
844 | end(fc, req); | ||
845 | spin_lock(&fuse_lock); | ||
846 | } | ||
847 | } | ||
848 | } | ||
849 | |||
850 | /* | ||
851 | * Abort all requests. | ||
852 | * | ||
853 | * Emergency exit in case of a malicious or accidental deadlock, or | ||
854 | * just a hung filesystem. | ||
855 | * | ||
856 | * The same effect is usually achievable through killing the | ||
857 | * filesystem daemon and all users of the filesystem. The exception | ||
858 | * is the combination of an asynchronous request and the tricky | ||
859 | * deadlock (see Documentation/filesystems/fuse.txt). | ||
860 | * | ||
861 | * During the aborting, progression of requests from the pending and | ||
862 | * processing lists onto the io list, and progression of new requests | ||
863 | * onto the pending list is prevented by req->connected being false. | ||
864 | * | ||
865 | * Progression of requests under I/O to the processing list is | ||
866 | * prevented by the req->interrupted flag being true for these | ||
867 | * requests. For this reason requests on the io list must be aborted | ||
868 | * first. | ||
869 | */ | ||
870 | void fuse_abort_conn(struct fuse_conn *fc) | ||
871 | { | ||
872 | spin_lock(&fuse_lock); | ||
873 | if (fc->connected) { | ||
874 | fc->connected = 0; | ||
875 | end_io_requests(fc); | ||
876 | end_requests(fc, &fc->pending); | ||
877 | end_requests(fc, &fc->processing); | ||
878 | wake_up_all(&fc->waitq); | ||
879 | } | ||
880 | spin_unlock(&fuse_lock); | ||
881 | } | ||
882 | |||
846 | static int fuse_dev_release(struct inode *inode, struct file *file) | 883 | static int fuse_dev_release(struct inode *inode, struct file *file) |
847 | { | 884 | { |
848 | struct fuse_conn *fc; | 885 | struct fuse_conn *fc; |
@@ -853,9 +890,11 @@ static int fuse_dev_release(struct inode *inode, struct file *file) | |||
853 | fc->connected = 0; | 890 | fc->connected = 0; |
854 | end_requests(fc, &fc->pending); | 891 | end_requests(fc, &fc->pending); |
855 | end_requests(fc, &fc->processing); | 892 | end_requests(fc, &fc->processing); |
856 | fuse_release_conn(fc); | ||
857 | } | 893 | } |
858 | spin_unlock(&fuse_lock); | 894 | spin_unlock(&fuse_lock); |
895 | if (fc) | ||
896 | kobject_put(&fc->kobj); | ||
897 | |||
859 | return 0; | 898 | return 0; |
860 | } | 899 | } |
861 | 900 | ||
diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c index 417bcee466f6..21fd59c7bc24 100644 --- a/fs/fuse/dir.c +++ b/fs/fuse/dir.c | |||
@@ -23,8 +23,7 @@ | |||
23 | /* | 23 | /* |
24 | * Calculate the time in jiffies until a dentry/attributes are valid | 24 | * Calculate the time in jiffies until a dentry/attributes are valid |
25 | */ | 25 | */ |
26 | static inline unsigned long time_to_jiffies(unsigned long sec, | 26 | static unsigned long time_to_jiffies(unsigned long sec, unsigned long nsec) |
27 | unsigned long nsec) | ||
28 | { | 27 | { |
29 | struct timespec ts = {sec, nsec}; | 28 | struct timespec ts = {sec, nsec}; |
30 | return jiffies + timespec_to_jiffies(&ts); | 29 | return jiffies + timespec_to_jiffies(&ts); |
@@ -157,7 +156,7 @@ static int dir_alias(struct inode *inode) | |||
157 | return 0; | 156 | return 0; |
158 | } | 157 | } |
159 | 158 | ||
160 | static inline int invalid_nodeid(u64 nodeid) | 159 | static int invalid_nodeid(u64 nodeid) |
161 | { | 160 | { |
162 | return !nodeid || nodeid == FUSE_ROOT_ID; | 161 | return !nodeid || nodeid == FUSE_ROOT_ID; |
163 | } | 162 | } |
@@ -166,7 +165,7 @@ static struct dentry_operations fuse_dentry_operations = { | |||
166 | .d_revalidate = fuse_dentry_revalidate, | 165 | .d_revalidate = fuse_dentry_revalidate, |
167 | }; | 166 | }; |
168 | 167 | ||
169 | static inline int valid_mode(int m) | 168 | static int valid_mode(int m) |
170 | { | 169 | { |
171 | return S_ISREG(m) || S_ISDIR(m) || S_ISLNK(m) || S_ISCHR(m) || | 170 | return S_ISREG(m) || S_ISDIR(m) || S_ISLNK(m) || S_ISCHR(m) || |
172 | S_ISBLK(m) || S_ISFIFO(m) || S_ISSOCK(m); | 171 | S_ISBLK(m) || S_ISFIFO(m) || S_ISSOCK(m); |
@@ -763,13 +762,6 @@ static int parse_dirfile(char *buf, size_t nbytes, struct file *file, | |||
763 | return 0; | 762 | return 0; |
764 | } | 763 | } |
765 | 764 | ||
766 | static inline size_t fuse_send_readdir(struct fuse_req *req, struct file *file, | ||
767 | struct inode *inode, loff_t pos, | ||
768 | size_t count) | ||
769 | { | ||
770 | return fuse_send_read_common(req, file, inode, pos, count, 1); | ||
771 | } | ||
772 | |||
773 | static int fuse_readdir(struct file *file, void *dstbuf, filldir_t filldir) | 765 | static int fuse_readdir(struct file *file, void *dstbuf, filldir_t filldir) |
774 | { | 766 | { |
775 | int err; | 767 | int err; |
@@ -793,7 +785,9 @@ static int fuse_readdir(struct file *file, void *dstbuf, filldir_t filldir) | |||
793 | } | 785 | } |
794 | req->num_pages = 1; | 786 | req->num_pages = 1; |
795 | req->pages[0] = page; | 787 | req->pages[0] = page; |
796 | nbytes = fuse_send_readdir(req, file, inode, file->f_pos, PAGE_SIZE); | 788 | fuse_read_fill(req, file, inode, file->f_pos, PAGE_SIZE, FUSE_READDIR); |
789 | request_send(fc, req); | ||
790 | nbytes = req->out.args[0].size; | ||
797 | err = req->out.h.error; | 791 | err = req->out.h.error; |
798 | fuse_put_request(fc, req); | 792 | fuse_put_request(fc, req); |
799 | if (!err) | 793 | if (!err) |
diff --git a/fs/fuse/file.c b/fs/fuse/file.c index 63d2980df5c9..a7ef5e716f3c 100644 --- a/fs/fuse/file.c +++ b/fs/fuse/file.c | |||
@@ -113,6 +113,14 @@ int fuse_open_common(struct inode *inode, struct file *file, int isdir) | |||
113 | return err; | 113 | return err; |
114 | } | 114 | } |
115 | 115 | ||
116 | /* Special case for failed iget in CREATE */ | ||
117 | static void fuse_release_end(struct fuse_conn *fc, struct fuse_req *req) | ||
118 | { | ||
119 | u64 nodeid = req->in.h.nodeid; | ||
120 | fuse_reset_request(req); | ||
121 | fuse_send_forget(fc, req, nodeid, 1); | ||
122 | } | ||
123 | |||
116 | void fuse_send_release(struct fuse_conn *fc, struct fuse_file *ff, | 124 | void fuse_send_release(struct fuse_conn *fc, struct fuse_file *ff, |
117 | u64 nodeid, struct inode *inode, int flags, int isdir) | 125 | u64 nodeid, struct inode *inode, int flags, int isdir) |
118 | { | 126 | { |
@@ -128,6 +136,8 @@ void fuse_send_release(struct fuse_conn *fc, struct fuse_file *ff, | |||
128 | req->in.args[0].size = sizeof(struct fuse_release_in); | 136 | req->in.args[0].size = sizeof(struct fuse_release_in); |
129 | req->in.args[0].value = inarg; | 137 | req->in.args[0].value = inarg; |
130 | request_send_background(fc, req); | 138 | request_send_background(fc, req); |
139 | if (!inode) | ||
140 | req->end = fuse_release_end; | ||
131 | kfree(ff); | 141 | kfree(ff); |
132 | } | 142 | } |
133 | 143 | ||
@@ -240,38 +250,35 @@ static int fuse_fsync(struct file *file, struct dentry *de, int datasync) | |||
240 | return fuse_fsync_common(file, de, datasync, 0); | 250 | return fuse_fsync_common(file, de, datasync, 0); |
241 | } | 251 | } |
242 | 252 | ||
243 | size_t fuse_send_read_common(struct fuse_req *req, struct file *file, | 253 | void fuse_read_fill(struct fuse_req *req, struct file *file, |
244 | struct inode *inode, loff_t pos, size_t count, | 254 | struct inode *inode, loff_t pos, size_t count, int opcode) |
245 | int isdir) | ||
246 | { | 255 | { |
247 | struct fuse_conn *fc = get_fuse_conn(inode); | ||
248 | struct fuse_file *ff = file->private_data; | 256 | struct fuse_file *ff = file->private_data; |
249 | struct fuse_read_in inarg; | 257 | struct fuse_read_in *inarg = &req->misc.read_in; |
250 | 258 | ||
251 | memset(&inarg, 0, sizeof(struct fuse_read_in)); | 259 | inarg->fh = ff->fh; |
252 | inarg.fh = ff->fh; | 260 | inarg->offset = pos; |
253 | inarg.offset = pos; | 261 | inarg->size = count; |
254 | inarg.size = count; | 262 | req->in.h.opcode = opcode; |
255 | req->in.h.opcode = isdir ? FUSE_READDIR : FUSE_READ; | ||
256 | req->in.h.nodeid = get_node_id(inode); | 263 | req->in.h.nodeid = get_node_id(inode); |
257 | req->inode = inode; | 264 | req->inode = inode; |
258 | req->file = file; | 265 | req->file = file; |
259 | req->in.numargs = 1; | 266 | req->in.numargs = 1; |
260 | req->in.args[0].size = sizeof(struct fuse_read_in); | 267 | req->in.args[0].size = sizeof(struct fuse_read_in); |
261 | req->in.args[0].value = &inarg; | 268 | req->in.args[0].value = inarg; |
262 | req->out.argpages = 1; | 269 | req->out.argpages = 1; |
263 | req->out.argvar = 1; | 270 | req->out.argvar = 1; |
264 | req->out.numargs = 1; | 271 | req->out.numargs = 1; |
265 | req->out.args[0].size = count; | 272 | req->out.args[0].size = count; |
266 | request_send(fc, req); | ||
267 | return req->out.args[0].size; | ||
268 | } | 273 | } |
269 | 274 | ||
270 | static inline size_t fuse_send_read(struct fuse_req *req, struct file *file, | 275 | static size_t fuse_send_read(struct fuse_req *req, struct file *file, |
271 | struct inode *inode, loff_t pos, | 276 | struct inode *inode, loff_t pos, size_t count) |
272 | size_t count) | ||
273 | { | 277 | { |
274 | return fuse_send_read_common(req, file, inode, pos, count, 0); | 278 | struct fuse_conn *fc = get_fuse_conn(inode); |
279 | fuse_read_fill(req, file, inode, pos, count, FUSE_READ); | ||
280 | request_send(fc, req); | ||
281 | return req->out.args[0].size; | ||
275 | } | 282 | } |
276 | 283 | ||
277 | static int fuse_readpage(struct file *file, struct page *page) | 284 | static int fuse_readpage(struct file *file, struct page *page) |
@@ -304,21 +311,33 @@ static int fuse_readpage(struct file *file, struct page *page) | |||
304 | return err; | 311 | return err; |
305 | } | 312 | } |
306 | 313 | ||
307 | static int fuse_send_readpages(struct fuse_req *req, struct file *file, | 314 | static void fuse_readpages_end(struct fuse_conn *fc, struct fuse_req *req) |
308 | struct inode *inode) | ||
309 | { | 315 | { |
310 | loff_t pos = page_offset(req->pages[0]); | 316 | int i; |
311 | size_t count = req->num_pages << PAGE_CACHE_SHIFT; | 317 | |
312 | unsigned i; | 318 | fuse_invalidate_attr(req->pages[0]->mapping->host); /* atime changed */ |
313 | req->out.page_zeroing = 1; | 319 | |
314 | fuse_send_read(req, file, inode, pos, count); | ||
315 | for (i = 0; i < req->num_pages; i++) { | 320 | for (i = 0; i < req->num_pages; i++) { |
316 | struct page *page = req->pages[i]; | 321 | struct page *page = req->pages[i]; |
317 | if (!req->out.h.error) | 322 | if (!req->out.h.error) |
318 | SetPageUptodate(page); | 323 | SetPageUptodate(page); |
324 | else | ||
325 | SetPageError(page); | ||
319 | unlock_page(page); | 326 | unlock_page(page); |
320 | } | 327 | } |
321 | return req->out.h.error; | 328 | fuse_put_request(fc, req); |
329 | } | ||
330 | |||
331 | static void fuse_send_readpages(struct fuse_req *req, struct file *file, | ||
332 | struct inode *inode) | ||
333 | { | ||
334 | struct fuse_conn *fc = get_fuse_conn(inode); | ||
335 | loff_t pos = page_offset(req->pages[0]); | ||
336 | size_t count = req->num_pages << PAGE_CACHE_SHIFT; | ||
337 | req->out.page_zeroing = 1; | ||
338 | req->end = fuse_readpages_end; | ||
339 | fuse_read_fill(req, file, inode, pos, count, FUSE_READ); | ||
340 | request_send_background(fc, req); | ||
322 | } | 341 | } |
323 | 342 | ||
324 | struct fuse_readpages_data { | 343 | struct fuse_readpages_data { |
@@ -338,12 +357,12 @@ static int fuse_readpages_fill(void *_data, struct page *page) | |||
338 | (req->num_pages == FUSE_MAX_PAGES_PER_REQ || | 357 | (req->num_pages == FUSE_MAX_PAGES_PER_REQ || |
339 | (req->num_pages + 1) * PAGE_CACHE_SIZE > fc->max_read || | 358 | (req->num_pages + 1) * PAGE_CACHE_SIZE > fc->max_read || |
340 | req->pages[req->num_pages - 1]->index + 1 != page->index)) { | 359 | req->pages[req->num_pages - 1]->index + 1 != page->index)) { |
341 | int err = fuse_send_readpages(req, data->file, inode); | 360 | fuse_send_readpages(req, data->file, inode); |
342 | if (err) { | 361 | data->req = req = fuse_get_request(fc); |
362 | if (!req) { | ||
343 | unlock_page(page); | 363 | unlock_page(page); |
344 | return err; | 364 | return -EINTR; |
345 | } | 365 | } |
346 | fuse_reset_request(req); | ||
347 | } | 366 | } |
348 | req->pages[req->num_pages] = page; | 367 | req->pages[req->num_pages] = page; |
349 | req->num_pages ++; | 368 | req->num_pages ++; |
@@ -368,10 +387,8 @@ static int fuse_readpages(struct file *file, struct address_space *mapping, | |||
368 | return -EINTR; | 387 | return -EINTR; |
369 | 388 | ||
370 | err = read_cache_pages(mapping, pages, fuse_readpages_fill, &data); | 389 | err = read_cache_pages(mapping, pages, fuse_readpages_fill, &data); |
371 | if (!err && data.req->num_pages) | 390 | if (!err) |
372 | err = fuse_send_readpages(data.req, file, inode); | 391 | fuse_send_readpages(data.req, file, inode); |
373 | fuse_put_request(fc, data.req); | ||
374 | fuse_invalidate_attr(inode); /* atime changed */ | ||
375 | return err; | 392 | return err; |
376 | } | 393 | } |
377 | 394 | ||
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h index 74c8d098a14a..46cf933aa3bf 100644 --- a/fs/fuse/fuse_i.h +++ b/fs/fuse/fuse_i.h | |||
@@ -94,6 +94,11 @@ struct fuse_out { | |||
94 | /** Header returned from userspace */ | 94 | /** Header returned from userspace */ |
95 | struct fuse_out_header h; | 95 | struct fuse_out_header h; |
96 | 96 | ||
97 | /* | ||
98 | * The following bitfields are not changed during the request | ||
99 | * processing | ||
100 | */ | ||
101 | |||
97 | /** Last argument is variable length (can be shorter than | 102 | /** Last argument is variable length (can be shorter than |
98 | arg->size) */ | 103 | arg->size) */ |
99 | unsigned argvar:1; | 104 | unsigned argvar:1; |
@@ -111,12 +116,23 @@ struct fuse_out { | |||
111 | struct fuse_arg args[3]; | 116 | struct fuse_arg args[3]; |
112 | }; | 117 | }; |
113 | 118 | ||
119 | /** The request state */ | ||
120 | enum fuse_req_state { | ||
121 | FUSE_REQ_INIT = 0, | ||
122 | FUSE_REQ_PENDING, | ||
123 | FUSE_REQ_READING, | ||
124 | FUSE_REQ_SENT, | ||
125 | FUSE_REQ_FINISHED | ||
126 | }; | ||
127 | |||
128 | struct fuse_conn; | ||
129 | |||
114 | /** | 130 | /** |
115 | * A request to the client | 131 | * A request to the client |
116 | */ | 132 | */ |
117 | struct fuse_req { | 133 | struct fuse_req { |
118 | /** This can be on either unused_list, pending or processing | 134 | /** This can be on either unused_list, pending processing or |
119 | lists in fuse_conn */ | 135 | io lists in fuse_conn */ |
120 | struct list_head list; | 136 | struct list_head list; |
121 | 137 | ||
122 | /** Entry on the background list */ | 138 | /** Entry on the background list */ |
@@ -125,6 +141,12 @@ struct fuse_req { | |||
125 | /** refcount */ | 141 | /** refcount */ |
126 | atomic_t count; | 142 | atomic_t count; |
127 | 143 | ||
144 | /* | ||
145 | * The following bitfields are either set once before the | ||
146 | * request is queued or setting/clearing them is protected by | ||
147 | * fuse_lock | ||
148 | */ | ||
149 | |||
128 | /** True if the request has reply */ | 150 | /** True if the request has reply */ |
129 | unsigned isreply:1; | 151 | unsigned isreply:1; |
130 | 152 | ||
@@ -140,11 +162,8 @@ struct fuse_req { | |||
140 | /** Data is being copied to/from the request */ | 162 | /** Data is being copied to/from the request */ |
141 | unsigned locked:1; | 163 | unsigned locked:1; |
142 | 164 | ||
143 | /** Request has been sent to userspace */ | 165 | /** State of the request */ |
144 | unsigned sent:1; | 166 | enum fuse_req_state state; |
145 | |||
146 | /** The request is finished */ | ||
147 | unsigned finished:1; | ||
148 | 167 | ||
149 | /** The request input */ | 168 | /** The request input */ |
150 | struct fuse_in in; | 169 | struct fuse_in in; |
@@ -161,6 +180,7 @@ struct fuse_req { | |||
161 | struct fuse_release_in release_in; | 180 | struct fuse_release_in release_in; |
162 | struct fuse_init_in init_in; | 181 | struct fuse_init_in init_in; |
163 | struct fuse_init_out init_out; | 182 | struct fuse_init_out init_out; |
183 | struct fuse_read_in read_in; | ||
164 | } misc; | 184 | } misc; |
165 | 185 | ||
166 | /** page vector */ | 186 | /** page vector */ |
@@ -180,6 +200,9 @@ struct fuse_req { | |||
180 | 200 | ||
181 | /** File used in the request (or NULL) */ | 201 | /** File used in the request (or NULL) */ |
182 | struct file *file; | 202 | struct file *file; |
203 | |||
204 | /** Request completion callback */ | ||
205 | void (*end)(struct fuse_conn *, struct fuse_req *); | ||
183 | }; | 206 | }; |
184 | 207 | ||
185 | /** | 208 | /** |
@@ -190,9 +213,6 @@ struct fuse_req { | |||
190 | * unmounted. | 213 | * unmounted. |
191 | */ | 214 | */ |
192 | struct fuse_conn { | 215 | struct fuse_conn { |
193 | /** Reference count */ | ||
194 | int count; | ||
195 | |||
196 | /** The user id for this mount */ | 216 | /** The user id for this mount */ |
197 | uid_t user_id; | 217 | uid_t user_id; |
198 | 218 | ||
@@ -217,6 +237,9 @@ struct fuse_conn { | |||
217 | /** The list of requests being processed */ | 237 | /** The list of requests being processed */ |
218 | struct list_head processing; | 238 | struct list_head processing; |
219 | 239 | ||
240 | /** The list of requests under I/O */ | ||
241 | struct list_head io; | ||
242 | |||
220 | /** Requests put in the background (RELEASE or any other | 243 | /** Requests put in the background (RELEASE or any other |
221 | interrupted request) */ | 244 | interrupted request) */ |
222 | struct list_head background; | 245 | struct list_head background; |
@@ -238,14 +261,22 @@ struct fuse_conn { | |||
238 | u64 reqctr; | 261 | u64 reqctr; |
239 | 262 | ||
240 | /** Mount is active */ | 263 | /** Mount is active */ |
241 | unsigned mounted : 1; | 264 | unsigned mounted; |
242 | 265 | ||
243 | /** Connection established */ | 266 | /** Connection established, cleared on umount, connection |
244 | unsigned connected : 1; | 267 | abort and device release */ |
268 | unsigned connected; | ||
245 | 269 | ||
246 | /** Connection failed (version mismatch) */ | 270 | /** Connection failed (version mismatch). Cannot race with |
271 | setting other bitfields since it is only set once in INIT | ||
272 | reply, before any other request, and never cleared */ | ||
247 | unsigned conn_error : 1; | 273 | unsigned conn_error : 1; |
248 | 274 | ||
275 | /* | ||
276 | * The following bitfields are only for optimization purposes | ||
277 | * and hence races in setting them will not cause malfunction | ||
278 | */ | ||
279 | |||
249 | /** Is fsync not implemented by fs? */ | 280 | /** Is fsync not implemented by fs? */ |
250 | unsigned no_fsync : 1; | 281 | unsigned no_fsync : 1; |
251 | 282 | ||
@@ -273,21 +304,22 @@ struct fuse_conn { | |||
273 | /** Is create not implemented by fs? */ | 304 | /** Is create not implemented by fs? */ |
274 | unsigned no_create : 1; | 305 | unsigned no_create : 1; |
275 | 306 | ||
307 | /** The number of requests waiting for completion */ | ||
308 | atomic_t num_waiting; | ||
309 | |||
276 | /** Negotiated minor version */ | 310 | /** Negotiated minor version */ |
277 | unsigned minor; | 311 | unsigned minor; |
278 | 312 | ||
279 | /** Backing dev info */ | 313 | /** Backing dev info */ |
280 | struct backing_dev_info bdi; | 314 | struct backing_dev_info bdi; |
281 | }; | ||
282 | 315 | ||
283 | static inline struct fuse_conn **get_fuse_conn_super_p(struct super_block *sb) | 316 | /** kobject */ |
284 | { | 317 | struct kobject kobj; |
285 | return (struct fuse_conn **) &sb->s_fs_info; | 318 | }; |
286 | } | ||
287 | 319 | ||
288 | static inline struct fuse_conn *get_fuse_conn_super(struct super_block *sb) | 320 | static inline struct fuse_conn *get_fuse_conn_super(struct super_block *sb) |
289 | { | 321 | { |
290 | return *get_fuse_conn_super_p(sb); | 322 | return sb->s_fs_info; |
291 | } | 323 | } |
292 | 324 | ||
293 | static inline struct fuse_conn *get_fuse_conn(struct inode *inode) | 325 | static inline struct fuse_conn *get_fuse_conn(struct inode *inode) |
@@ -295,6 +327,11 @@ static inline struct fuse_conn *get_fuse_conn(struct inode *inode) | |||
295 | return get_fuse_conn_super(inode->i_sb); | 327 | return get_fuse_conn_super(inode->i_sb); |
296 | } | 328 | } |
297 | 329 | ||
330 | static inline struct fuse_conn *get_fuse_conn_kobj(struct kobject *obj) | ||
331 | { | ||
332 | return container_of(obj, struct fuse_conn, kobj); | ||
333 | } | ||
334 | |||
298 | static inline struct fuse_inode *get_fuse_inode(struct inode *inode) | 335 | static inline struct fuse_inode *get_fuse_inode(struct inode *inode) |
299 | { | 336 | { |
300 | return container_of(inode, struct fuse_inode, inode); | 337 | return container_of(inode, struct fuse_inode, inode); |
@@ -336,11 +373,10 @@ void fuse_send_forget(struct fuse_conn *fc, struct fuse_req *req, | |||
336 | unsigned long nodeid, u64 nlookup); | 373 | unsigned long nodeid, u64 nlookup); |
337 | 374 | ||
338 | /** | 375 | /** |
339 | * Send READ or READDIR request | 376 | * Initialize READ or READDIR request |
340 | */ | 377 | */ |
341 | size_t fuse_send_read_common(struct fuse_req *req, struct file *file, | 378 | void fuse_read_fill(struct fuse_req *req, struct file *file, |
342 | struct inode *inode, loff_t pos, size_t count, | 379 | struct inode *inode, loff_t pos, size_t count, int opcode); |
343 | int isdir); | ||
344 | 380 | ||
345 | /** | 381 | /** |
346 | * Send OPEN or OPENDIR request | 382 | * Send OPEN or OPENDIR request |
@@ -395,12 +431,6 @@ void fuse_init_symlink(struct inode *inode); | |||
395 | void fuse_change_attributes(struct inode *inode, struct fuse_attr *attr); | 431 | void fuse_change_attributes(struct inode *inode, struct fuse_attr *attr); |
396 | 432 | ||
397 | /** | 433 | /** |
398 | * Check if the connection can be released, and if yes, then free the | ||
399 | * connection structure | ||
400 | */ | ||
401 | void fuse_release_conn(struct fuse_conn *fc); | ||
402 | |||
403 | /** | ||
404 | * Initialize the client device | 434 | * Initialize the client device |
405 | */ | 435 | */ |
406 | int fuse_dev_init(void); | 436 | int fuse_dev_init(void); |
@@ -456,6 +486,9 @@ void request_send_background(struct fuse_conn *fc, struct fuse_req *req); | |||
456 | */ | 486 | */ |
457 | void fuse_release_background(struct fuse_req *req); | 487 | void fuse_release_background(struct fuse_req *req); |
458 | 488 | ||
489 | /* Abort all requests */ | ||
490 | void fuse_abort_conn(struct fuse_conn *fc); | ||
491 | |||
459 | /** | 492 | /** |
460 | * Get the attributes of a file | 493 | * Get the attributes of a file |
461 | */ | 494 | */ |
@@ -465,8 +498,3 @@ int fuse_do_getattr(struct inode *inode); | |||
465 | * Invalidate inode attributes | 498 | * Invalidate inode attributes |
466 | */ | 499 | */ |
467 | void fuse_invalidate_attr(struct inode *inode); | 500 | void fuse_invalidate_attr(struct inode *inode); |
468 | |||
469 | /** | ||
470 | * Send the INIT message | ||
471 | */ | ||
472 | void fuse_send_init(struct fuse_conn *fc); | ||
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c index 04c80cc957a3..c755a0440a66 100644 --- a/fs/fuse/inode.c +++ b/fs/fuse/inode.c | |||
@@ -24,6 +24,13 @@ MODULE_LICENSE("GPL"); | |||
24 | 24 | ||
25 | spinlock_t fuse_lock; | 25 | spinlock_t fuse_lock; |
26 | static kmem_cache_t *fuse_inode_cachep; | 26 | static kmem_cache_t *fuse_inode_cachep; |
27 | static struct subsystem connections_subsys; | ||
28 | |||
29 | struct fuse_conn_attr { | ||
30 | struct attribute attr; | ||
31 | ssize_t (*show)(struct fuse_conn *, char *); | ||
32 | ssize_t (*store)(struct fuse_conn *, const char *, size_t); | ||
33 | }; | ||
27 | 34 | ||
28 | #define FUSE_SUPER_MAGIC 0x65735546 | 35 | #define FUSE_SUPER_MAGIC 0x65735546 |
29 | 36 | ||
@@ -189,6 +196,11 @@ struct inode *fuse_iget(struct super_block *sb, unsigned long nodeid, | |||
189 | return inode; | 196 | return inode; |
190 | } | 197 | } |
191 | 198 | ||
199 | static void fuse_umount_begin(struct super_block *sb) | ||
200 | { | ||
201 | fuse_abort_conn(get_fuse_conn_super(sb)); | ||
202 | } | ||
203 | |||
192 | static void fuse_put_super(struct super_block *sb) | 204 | static void fuse_put_super(struct super_block *sb) |
193 | { | 205 | { |
194 | struct fuse_conn *fc = get_fuse_conn_super(sb); | 206 | struct fuse_conn *fc = get_fuse_conn_super(sb); |
@@ -200,14 +212,13 @@ static void fuse_put_super(struct super_block *sb) | |||
200 | 212 | ||
201 | spin_lock(&fuse_lock); | 213 | spin_lock(&fuse_lock); |
202 | fc->mounted = 0; | 214 | fc->mounted = 0; |
203 | fc->user_id = 0; | 215 | fc->connected = 0; |
204 | fc->group_id = 0; | 216 | spin_unlock(&fuse_lock); |
205 | fc->flags = 0; | 217 | up_write(&fc->sbput_sem); |
206 | /* Flush all readers on this fs */ | 218 | /* Flush all readers on this fs */ |
207 | wake_up_all(&fc->waitq); | 219 | wake_up_all(&fc->waitq); |
208 | up_write(&fc->sbput_sem); | 220 | kobject_del(&fc->kobj); |
209 | fuse_release_conn(fc); | 221 | kobject_put(&fc->kobj); |
210 | spin_unlock(&fuse_lock); | ||
211 | } | 222 | } |
212 | 223 | ||
213 | static void convert_fuse_statfs(struct kstatfs *stbuf, struct fuse_kstatfs *attr) | 224 | static void convert_fuse_statfs(struct kstatfs *stbuf, struct fuse_kstatfs *attr) |
@@ -356,8 +367,10 @@ static int fuse_show_options(struct seq_file *m, struct vfsmount *mnt) | |||
356 | return 0; | 367 | return 0; |
357 | } | 368 | } |
358 | 369 | ||
359 | static void free_conn(struct fuse_conn *fc) | 370 | static void fuse_conn_release(struct kobject *kobj) |
360 | { | 371 | { |
372 | struct fuse_conn *fc = get_fuse_conn_kobj(kobj); | ||
373 | |||
361 | while (!list_empty(&fc->unused_list)) { | 374 | while (!list_empty(&fc->unused_list)) { |
362 | struct fuse_req *req; | 375 | struct fuse_req *req; |
363 | req = list_entry(fc->unused_list.next, struct fuse_req, list); | 376 | req = list_entry(fc->unused_list.next, struct fuse_req, list); |
@@ -367,33 +380,28 @@ static void free_conn(struct fuse_conn *fc) | |||
367 | kfree(fc); | 380 | kfree(fc); |
368 | } | 381 | } |
369 | 382 | ||
370 | /* Must be called with the fuse lock held */ | ||
371 | void fuse_release_conn(struct fuse_conn *fc) | ||
372 | { | ||
373 | fc->count--; | ||
374 | if (!fc->count) | ||
375 | free_conn(fc); | ||
376 | } | ||
377 | |||
378 | static struct fuse_conn *new_conn(void) | 383 | static struct fuse_conn *new_conn(void) |
379 | { | 384 | { |
380 | struct fuse_conn *fc; | 385 | struct fuse_conn *fc; |
381 | 386 | ||
382 | fc = kmalloc(sizeof(*fc), GFP_KERNEL); | 387 | fc = kzalloc(sizeof(*fc), GFP_KERNEL); |
383 | if (fc != NULL) { | 388 | if (fc) { |
384 | int i; | 389 | int i; |
385 | memset(fc, 0, sizeof(*fc)); | ||
386 | init_waitqueue_head(&fc->waitq); | 390 | init_waitqueue_head(&fc->waitq); |
387 | INIT_LIST_HEAD(&fc->pending); | 391 | INIT_LIST_HEAD(&fc->pending); |
388 | INIT_LIST_HEAD(&fc->processing); | 392 | INIT_LIST_HEAD(&fc->processing); |
393 | INIT_LIST_HEAD(&fc->io); | ||
389 | INIT_LIST_HEAD(&fc->unused_list); | 394 | INIT_LIST_HEAD(&fc->unused_list); |
390 | INIT_LIST_HEAD(&fc->background); | 395 | INIT_LIST_HEAD(&fc->background); |
391 | sema_init(&fc->outstanding_sem, 0); | 396 | sema_init(&fc->outstanding_sem, 1); /* One for INIT */ |
392 | init_rwsem(&fc->sbput_sem); | 397 | init_rwsem(&fc->sbput_sem); |
398 | kobj_set_kset_s(fc, connections_subsys); | ||
399 | kobject_init(&fc->kobj); | ||
400 | atomic_set(&fc->num_waiting, 0); | ||
393 | for (i = 0; i < FUSE_MAX_OUTSTANDING; i++) { | 401 | for (i = 0; i < FUSE_MAX_OUTSTANDING; i++) { |
394 | struct fuse_req *req = fuse_request_alloc(); | 402 | struct fuse_req *req = fuse_request_alloc(); |
395 | if (!req) { | 403 | if (!req) { |
396 | free_conn(fc); | 404 | kobject_put(&fc->kobj); |
397 | return NULL; | 405 | return NULL; |
398 | } | 406 | } |
399 | list_add(&req->list, &fc->unused_list); | 407 | list_add(&req->list, &fc->unused_list); |
@@ -408,25 +416,32 @@ static struct fuse_conn *new_conn(void) | |||
408 | static struct fuse_conn *get_conn(struct file *file, struct super_block *sb) | 416 | static struct fuse_conn *get_conn(struct file *file, struct super_block *sb) |
409 | { | 417 | { |
410 | struct fuse_conn *fc; | 418 | struct fuse_conn *fc; |
419 | int err; | ||
411 | 420 | ||
421 | err = -EINVAL; | ||
412 | if (file->f_op != &fuse_dev_operations) | 422 | if (file->f_op != &fuse_dev_operations) |
413 | return ERR_PTR(-EINVAL); | 423 | goto out_err; |
424 | |||
425 | err = -ENOMEM; | ||
414 | fc = new_conn(); | 426 | fc = new_conn(); |
415 | if (fc == NULL) | 427 | if (!fc) |
416 | return ERR_PTR(-ENOMEM); | 428 | goto out_err; |
429 | |||
417 | spin_lock(&fuse_lock); | 430 | spin_lock(&fuse_lock); |
418 | if (file->private_data) { | 431 | err = -EINVAL; |
419 | free_conn(fc); | 432 | if (file->private_data) |
420 | fc = ERR_PTR(-EINVAL); | 433 | goto out_unlock; |
421 | } else { | 434 | |
422 | file->private_data = fc; | 435 | kobject_get(&fc->kobj); |
423 | *get_fuse_conn_super_p(sb) = fc; | 436 | file->private_data = fc; |
424 | fc->mounted = 1; | ||
425 | fc->connected = 1; | ||
426 | fc->count = 2; | ||
427 | } | ||
428 | spin_unlock(&fuse_lock); | 437 | spin_unlock(&fuse_lock); |
429 | return fc; | 438 | return fc; |
439 | |||
440 | out_unlock: | ||
441 | spin_unlock(&fuse_lock); | ||
442 | kobject_put(&fc->kobj); | ||
443 | out_err: | ||
444 | return ERR_PTR(err); | ||
430 | } | 445 | } |
431 | 446 | ||
432 | static struct inode *get_root_inode(struct super_block *sb, unsigned mode) | 447 | static struct inode *get_root_inode(struct super_block *sb, unsigned mode) |
@@ -445,16 +460,74 @@ static struct super_operations fuse_super_operations = { | |||
445 | .read_inode = fuse_read_inode, | 460 | .read_inode = fuse_read_inode, |
446 | .clear_inode = fuse_clear_inode, | 461 | .clear_inode = fuse_clear_inode, |
447 | .put_super = fuse_put_super, | 462 | .put_super = fuse_put_super, |
463 | .umount_begin = fuse_umount_begin, | ||
448 | .statfs = fuse_statfs, | 464 | .statfs = fuse_statfs, |
449 | .show_options = fuse_show_options, | 465 | .show_options = fuse_show_options, |
450 | }; | 466 | }; |
451 | 467 | ||
468 | static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) | ||
469 | { | ||
470 | int i; | ||
471 | struct fuse_init_out *arg = &req->misc.init_out; | ||
472 | |||
473 | if (req->out.h.error || arg->major != FUSE_KERNEL_VERSION) | ||
474 | fc->conn_error = 1; | ||
475 | else { | ||
476 | fc->minor = arg->minor; | ||
477 | fc->max_write = arg->minor < 5 ? 4096 : arg->max_write; | ||
478 | } | ||
479 | |||
480 | /* After INIT reply is received other requests can go | ||
481 | out. So do (FUSE_MAX_OUTSTANDING - 1) number of | ||
482 | up()s on outstanding_sem. The last up() is done in | ||
483 | fuse_putback_request() */ | ||
484 | for (i = 1; i < FUSE_MAX_OUTSTANDING; i++) | ||
485 | up(&fc->outstanding_sem); | ||
486 | |||
487 | fuse_put_request(fc, req); | ||
488 | } | ||
489 | |||
490 | static void fuse_send_init(struct fuse_conn *fc) | ||
491 | { | ||
492 | /* This is called from fuse_read_super() so there's guaranteed | ||
493 | to be exactly one request available */ | ||
494 | struct fuse_req *req = fuse_get_request(fc); | ||
495 | struct fuse_init_in *arg = &req->misc.init_in; | ||
496 | |||
497 | arg->major = FUSE_KERNEL_VERSION; | ||
498 | arg->minor = FUSE_KERNEL_MINOR_VERSION; | ||
499 | req->in.h.opcode = FUSE_INIT; | ||
500 | req->in.numargs = 1; | ||
501 | req->in.args[0].size = sizeof(*arg); | ||
502 | req->in.args[0].value = arg; | ||
503 | req->out.numargs = 1; | ||
504 | /* Variable length arguement used for backward compatibility | ||
505 | with interface version < 7.5. Rest of init_out is zeroed | ||
506 | by do_get_request(), so a short reply is not a problem */ | ||
507 | req->out.argvar = 1; | ||
508 | req->out.args[0].size = sizeof(struct fuse_init_out); | ||
509 | req->out.args[0].value = &req->misc.init_out; | ||
510 | req->end = process_init_reply; | ||
511 | request_send_background(fc, req); | ||
512 | } | ||
513 | |||
514 | static unsigned long long conn_id(void) | ||
515 | { | ||
516 | static unsigned long long ctr = 1; | ||
517 | unsigned long long val; | ||
518 | spin_lock(&fuse_lock); | ||
519 | val = ctr++; | ||
520 | spin_unlock(&fuse_lock); | ||
521 | return val; | ||
522 | } | ||
523 | |||
452 | static int fuse_fill_super(struct super_block *sb, void *data, int silent) | 524 | static int fuse_fill_super(struct super_block *sb, void *data, int silent) |
453 | { | 525 | { |
454 | struct fuse_conn *fc; | 526 | struct fuse_conn *fc; |
455 | struct inode *root; | 527 | struct inode *root; |
456 | struct fuse_mount_data d; | 528 | struct fuse_mount_data d; |
457 | struct file *file; | 529 | struct file *file; |
530 | struct dentry *root_dentry; | ||
458 | int err; | 531 | int err; |
459 | 532 | ||
460 | if (!parse_fuse_opt((char *) data, &d)) | 533 | if (!parse_fuse_opt((char *) data, &d)) |
@@ -482,23 +555,42 @@ static int fuse_fill_super(struct super_block *sb, void *data, int silent) | |||
482 | if (fc->max_read / PAGE_CACHE_SIZE < fc->bdi.ra_pages) | 555 | if (fc->max_read / PAGE_CACHE_SIZE < fc->bdi.ra_pages) |
483 | fc->bdi.ra_pages = fc->max_read / PAGE_CACHE_SIZE; | 556 | fc->bdi.ra_pages = fc->max_read / PAGE_CACHE_SIZE; |
484 | 557 | ||
558 | /* Used by get_root_inode() */ | ||
559 | sb->s_fs_info = fc; | ||
560 | |||
485 | err = -ENOMEM; | 561 | err = -ENOMEM; |
486 | root = get_root_inode(sb, d.rootmode); | 562 | root = get_root_inode(sb, d.rootmode); |
487 | if (root == NULL) | 563 | if (!root) |
488 | goto err; | 564 | goto err; |
489 | 565 | ||
490 | sb->s_root = d_alloc_root(root); | 566 | root_dentry = d_alloc_root(root); |
491 | if (!sb->s_root) { | 567 | if (!root_dentry) { |
492 | iput(root); | 568 | iput(root); |
493 | goto err; | 569 | goto err; |
494 | } | 570 | } |
571 | |||
572 | err = kobject_set_name(&fc->kobj, "%llu", conn_id()); | ||
573 | if (err) | ||
574 | goto err_put_root; | ||
575 | |||
576 | err = kobject_add(&fc->kobj); | ||
577 | if (err) | ||
578 | goto err_put_root; | ||
579 | |||
580 | sb->s_root = root_dentry; | ||
581 | spin_lock(&fuse_lock); | ||
582 | fc->mounted = 1; | ||
583 | fc->connected = 1; | ||
584 | spin_unlock(&fuse_lock); | ||
585 | |||
495 | fuse_send_init(fc); | 586 | fuse_send_init(fc); |
587 | |||
496 | return 0; | 588 | return 0; |
497 | 589 | ||
590 | err_put_root: | ||
591 | dput(root_dentry); | ||
498 | err: | 592 | err: |
499 | spin_lock(&fuse_lock); | 593 | kobject_put(&fc->kobj); |
500 | fuse_release_conn(fc); | ||
501 | spin_unlock(&fuse_lock); | ||
502 | return err; | 594 | return err; |
503 | } | 595 | } |
504 | 596 | ||
@@ -516,6 +608,69 @@ static struct file_system_type fuse_fs_type = { | |||
516 | .kill_sb = kill_anon_super, | 608 | .kill_sb = kill_anon_super, |
517 | }; | 609 | }; |
518 | 610 | ||
611 | static ssize_t fuse_conn_waiting_show(struct fuse_conn *fc, char *page) | ||
612 | { | ||
613 | return sprintf(page, "%i\n", atomic_read(&fc->num_waiting)); | ||
614 | } | ||
615 | |||
616 | static ssize_t fuse_conn_abort_store(struct fuse_conn *fc, const char *page, | ||
617 | size_t count) | ||
618 | { | ||
619 | fuse_abort_conn(fc); | ||
620 | return count; | ||
621 | } | ||
622 | |||
623 | static struct fuse_conn_attr fuse_conn_waiting = | ||
624 | __ATTR(waiting, 0400, fuse_conn_waiting_show, NULL); | ||
625 | static struct fuse_conn_attr fuse_conn_abort = | ||
626 | __ATTR(abort, 0600, NULL, fuse_conn_abort_store); | ||
627 | |||
628 | static struct attribute *fuse_conn_attrs[] = { | ||
629 | &fuse_conn_waiting.attr, | ||
630 | &fuse_conn_abort.attr, | ||
631 | NULL, | ||
632 | }; | ||
633 | |||
634 | static ssize_t fuse_conn_attr_show(struct kobject *kobj, | ||
635 | struct attribute *attr, | ||
636 | char *page) | ||
637 | { | ||
638 | struct fuse_conn_attr *fca = | ||
639 | container_of(attr, struct fuse_conn_attr, attr); | ||
640 | |||
641 | if (fca->show) | ||
642 | return fca->show(get_fuse_conn_kobj(kobj), page); | ||
643 | else | ||
644 | return -EACCES; | ||
645 | } | ||
646 | |||
647 | static ssize_t fuse_conn_attr_store(struct kobject *kobj, | ||
648 | struct attribute *attr, | ||
649 | const char *page, size_t count) | ||
650 | { | ||
651 | struct fuse_conn_attr *fca = | ||
652 | container_of(attr, struct fuse_conn_attr, attr); | ||
653 | |||
654 | if (fca->store) | ||
655 | return fca->store(get_fuse_conn_kobj(kobj), page, count); | ||
656 | else | ||
657 | return -EACCES; | ||
658 | } | ||
659 | |||
660 | static struct sysfs_ops fuse_conn_sysfs_ops = { | ||
661 | .show = &fuse_conn_attr_show, | ||
662 | .store = &fuse_conn_attr_store, | ||
663 | }; | ||
664 | |||
665 | static struct kobj_type ktype_fuse_conn = { | ||
666 | .release = fuse_conn_release, | ||
667 | .sysfs_ops = &fuse_conn_sysfs_ops, | ||
668 | .default_attrs = fuse_conn_attrs, | ||
669 | }; | ||
670 | |||
671 | static decl_subsys(fuse, NULL, NULL); | ||
672 | static decl_subsys(connections, &ktype_fuse_conn, NULL); | ||
673 | |||
519 | static void fuse_inode_init_once(void *foo, kmem_cache_t *cachep, | 674 | static void fuse_inode_init_once(void *foo, kmem_cache_t *cachep, |
520 | unsigned long flags) | 675 | unsigned long flags) |
521 | { | 676 | { |
@@ -553,6 +708,34 @@ static void fuse_fs_cleanup(void) | |||
553 | kmem_cache_destroy(fuse_inode_cachep); | 708 | kmem_cache_destroy(fuse_inode_cachep); |
554 | } | 709 | } |
555 | 710 | ||
711 | static int fuse_sysfs_init(void) | ||
712 | { | ||
713 | int err; | ||
714 | |||
715 | kset_set_kset_s(&fuse_subsys, fs_subsys); | ||
716 | err = subsystem_register(&fuse_subsys); | ||
717 | if (err) | ||
718 | goto out_err; | ||
719 | |||
720 | kset_set_kset_s(&connections_subsys, fuse_subsys); | ||
721 | err = subsystem_register(&connections_subsys); | ||
722 | if (err) | ||
723 | goto out_fuse_unregister; | ||
724 | |||
725 | return 0; | ||
726 | |||
727 | out_fuse_unregister: | ||
728 | subsystem_unregister(&fuse_subsys); | ||
729 | out_err: | ||
730 | return err; | ||
731 | } | ||
732 | |||
733 | static void fuse_sysfs_cleanup(void) | ||
734 | { | ||
735 | subsystem_unregister(&connections_subsys); | ||
736 | subsystem_unregister(&fuse_subsys); | ||
737 | } | ||
738 | |||
556 | static int __init fuse_init(void) | 739 | static int __init fuse_init(void) |
557 | { | 740 | { |
558 | int res; | 741 | int res; |
@@ -569,8 +752,14 @@ static int __init fuse_init(void) | |||
569 | if (res) | 752 | if (res) |
570 | goto err_fs_cleanup; | 753 | goto err_fs_cleanup; |
571 | 754 | ||
755 | res = fuse_sysfs_init(); | ||
756 | if (res) | ||
757 | goto err_dev_cleanup; | ||
758 | |||
572 | return 0; | 759 | return 0; |
573 | 760 | ||
761 | err_dev_cleanup: | ||
762 | fuse_dev_cleanup(); | ||
574 | err_fs_cleanup: | 763 | err_fs_cleanup: |
575 | fuse_fs_cleanup(); | 764 | fuse_fs_cleanup(); |
576 | err: | 765 | err: |
@@ -581,6 +770,7 @@ static void __exit fuse_exit(void) | |||
581 | { | 770 | { |
582 | printk(KERN_DEBUG "fuse exit\n"); | 771 | printk(KERN_DEBUG "fuse exit\n"); |
583 | 772 | ||
773 | fuse_sysfs_cleanup(); | ||
584 | fuse_fs_cleanup(); | 774 | fuse_fs_cleanup(); |
585 | fuse_dev_cleanup(); | 775 | fuse_dev_cleanup(); |
586 | } | 776 | } |
diff --git a/fs/namespace.c b/fs/namespace.c index 8bc15b362d23..ce97becff461 100644 --- a/fs/namespace.c +++ b/fs/namespace.c | |||
@@ -48,6 +48,10 @@ static int hash_mask __read_mostly, hash_bits __read_mostly; | |||
48 | static kmem_cache_t *mnt_cache; | 48 | static kmem_cache_t *mnt_cache; |
49 | static struct rw_semaphore namespace_sem; | 49 | static struct rw_semaphore namespace_sem; |
50 | 50 | ||
51 | /* /sys/fs */ | ||
52 | decl_subsys(fs, NULL, NULL); | ||
53 | EXPORT_SYMBOL_GPL(fs_subsys); | ||
54 | |||
51 | static inline unsigned long hash(struct vfsmount *mnt, struct dentry *dentry) | 55 | static inline unsigned long hash(struct vfsmount *mnt, struct dentry *dentry) |
52 | { | 56 | { |
53 | unsigned long tmp = ((unsigned long)mnt / L1_CACHE_BYTES); | 57 | unsigned long tmp = ((unsigned long)mnt / L1_CACHE_BYTES); |
@@ -1725,6 +1729,7 @@ void __init mnt_init(unsigned long mempages) | |||
1725 | i--; | 1729 | i--; |
1726 | } while (i); | 1730 | } while (i); |
1727 | sysfs_init(); | 1731 | sysfs_init(); |
1732 | subsystem_register(&fs_subsys); | ||
1728 | init_rootfs(); | 1733 | init_rootfs(); |
1729 | init_mount_tree(); | 1734 | init_mount_tree(); |
1730 | } | 1735 | } |
diff --git a/fs/partitions/Kconfig b/fs/partitions/Kconfig index 7490cc9208b3..c9a478099281 100644 --- a/fs/partitions/Kconfig +++ b/fs/partitions/Kconfig | |||
@@ -222,6 +222,13 @@ config SUN_PARTITION | |||
222 | given by the tar program ("man tar" or preferably "info tar"). If | 222 | given by the tar program ("man tar" or preferably "info tar"). If |
223 | you don't know what all this is about, say N. | 223 | you don't know what all this is about, say N. |
224 | 224 | ||
225 | config KARMA_PARTITION | ||
226 | bool "Karma Partition support" | ||
227 | depends on PARTITION_ADVANCED | ||
228 | help | ||
229 | Say Y here if you would like to mount the Rio Karma MP3 player, as it | ||
230 | uses a proprietary partition table. | ||
231 | |||
225 | config EFI_PARTITION | 232 | config EFI_PARTITION |
226 | bool "EFI GUID Partition support" | 233 | bool "EFI GUID Partition support" |
227 | depends on PARTITION_ADVANCED | 234 | depends on PARTITION_ADVANCED |
diff --git a/fs/partitions/Makefile b/fs/partitions/Makefile index 66d5cc26fafb..42c7d3878ed0 100644 --- a/fs/partitions/Makefile +++ b/fs/partitions/Makefile | |||
@@ -17,3 +17,4 @@ obj-$(CONFIG_SUN_PARTITION) += sun.o | |||
17 | obj-$(CONFIG_ULTRIX_PARTITION) += ultrix.o | 17 | obj-$(CONFIG_ULTRIX_PARTITION) += ultrix.o |
18 | obj-$(CONFIG_IBM_PARTITION) += ibm.o | 18 | obj-$(CONFIG_IBM_PARTITION) += ibm.o |
19 | obj-$(CONFIG_EFI_PARTITION) += efi.o | 19 | obj-$(CONFIG_EFI_PARTITION) += efi.o |
20 | obj-$(CONFIG_KARMA_PARTITION) += karma.o | ||
diff --git a/fs/partitions/check.c b/fs/partitions/check.c index 7881ce05daef..f924f459bdb8 100644 --- a/fs/partitions/check.c +++ b/fs/partitions/check.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include "ibm.h" | 35 | #include "ibm.h" |
36 | #include "ultrix.h" | 36 | #include "ultrix.h" |
37 | #include "efi.h" | 37 | #include "efi.h" |
38 | #include "karma.h" | ||
38 | 39 | ||
39 | #ifdef CONFIG_BLK_DEV_MD | 40 | #ifdef CONFIG_BLK_DEV_MD |
40 | extern void md_autodetect_dev(dev_t dev); | 41 | extern void md_autodetect_dev(dev_t dev); |
@@ -103,6 +104,9 @@ static int (*check_part[])(struct parsed_partitions *, struct block_device *) = | |||
103 | #ifdef CONFIG_IBM_PARTITION | 104 | #ifdef CONFIG_IBM_PARTITION |
104 | ibm_partition, | 105 | ibm_partition, |
105 | #endif | 106 | #endif |
107 | #ifdef CONFIG_KARMA_PARTITION | ||
108 | karma_partition, | ||
109 | #endif | ||
106 | NULL | 110 | NULL |
107 | }; | 111 | }; |
108 | 112 | ||
diff --git a/fs/partitions/karma.c b/fs/partitions/karma.c new file mode 100644 index 000000000000..176d89bcf123 --- /dev/null +++ b/fs/partitions/karma.c | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * fs/partitions/karma.c | ||
3 | * Rio Karma partition info. | ||
4 | * | ||
5 | * Copyright (C) 2006 Bob Copeland (me@bobcopeland.com) | ||
6 | * based on osf.c | ||
7 | */ | ||
8 | |||
9 | #include "check.h" | ||
10 | #include "karma.h" | ||
11 | |||
12 | int karma_partition(struct parsed_partitions *state, struct block_device *bdev) | ||
13 | { | ||
14 | int i; | ||
15 | int slot = 1; | ||
16 | Sector sect; | ||
17 | unsigned char *data; | ||
18 | struct disklabel { | ||
19 | u8 d_reserved[270]; | ||
20 | struct d_partition { | ||
21 | __le32 p_res; | ||
22 | u8 p_fstype; | ||
23 | u8 p_res2[3]; | ||
24 | __le32 p_offset; | ||
25 | __le32 p_size; | ||
26 | } d_partitions[2]; | ||
27 | u8 d_blank[208]; | ||
28 | __le16 d_magic; | ||
29 | } __attribute__((packed)) *label; | ||
30 | struct d_partition *p; | ||
31 | |||
32 | data = read_dev_sector(bdev, 0, §); | ||
33 | if (!data) | ||
34 | return -1; | ||
35 | |||
36 | label = (struct disklabel *)data; | ||
37 | if (le16_to_cpu(label->d_magic) != KARMA_LABEL_MAGIC) { | ||
38 | put_dev_sector(sect); | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | p = label->d_partitions; | ||
43 | for (i = 0 ; i < 2; i++, p++) { | ||
44 | if (slot == state->limit) | ||
45 | break; | ||
46 | |||
47 | if (p->p_fstype == 0x4d && le32_to_cpu(p->p_size)) { | ||
48 | put_partition(state, slot, le32_to_cpu(p->p_offset), | ||
49 | le32_to_cpu(p->p_size)); | ||
50 | } | ||
51 | slot++; | ||
52 | } | ||
53 | printk("\n"); | ||
54 | put_dev_sector(sect); | ||
55 | return 1; | ||
56 | } | ||
57 | |||
diff --git a/fs/partitions/karma.h b/fs/partitions/karma.h new file mode 100644 index 000000000000..ecf7d3f2a3d8 --- /dev/null +++ b/fs/partitions/karma.h | |||
@@ -0,0 +1,8 @@ | |||
1 | /* | ||
2 | * fs/partitions/karma.h | ||
3 | */ | ||
4 | |||
5 | #define KARMA_LABEL_MAGIC 0xAB56 | ||
6 | |||
7 | int karma_partition(struct parsed_partitions *state, struct block_device *bdev); | ||
8 | |||
diff --git a/include/asm-arm26/cache.h b/include/asm-arm26/cache.h index f52ca1b808cd..8c3abcf728fe 100644 --- a/include/asm-arm26/cache.h +++ b/include/asm-arm26/cache.h | |||
@@ -4,7 +4,8 @@ | |||
4 | #ifndef __ASMARM_CACHE_H | 4 | #ifndef __ASMARM_CACHE_H |
5 | #define __ASMARM_CACHE_H | 5 | #define __ASMARM_CACHE_H |
6 | 6 | ||
7 | #define L1_CACHE_BYTES 32 | 7 | #define L1_CACHE_SHIFT 5 |
8 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
8 | #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) | 9 | #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) |
9 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | 10 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
10 | 11 | ||
diff --git a/include/asm-arm26/thread_info.h b/include/asm-arm26/thread_info.h index a65e58a0a767..9b367ebe515d 100644 --- a/include/asm-arm26/thread_info.h +++ b/include/asm-arm26/thread_info.h | |||
@@ -80,8 +80,7 @@ static inline struct thread_info *current_thread_info(void) | |||
80 | return (struct thread_info *)(sp & ~0x1fff); | 80 | return (struct thread_info *)(sp & ~0x1fff); |
81 | } | 81 | } |
82 | 82 | ||
83 | /* FIXME - PAGE_SIZE < 32K */ | 83 | #define THREAD_SIZE PAGE_SIZE |
84 | #define THREAD_SIZE (8*32768) // FIXME - this needs attention (see kernel/fork.c which gets a nice div by zero if this is lower than 8*32768 | ||
85 | #define task_pt_regs(task) ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE - 8) - 1) | 84 | #define task_pt_regs(task) ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE - 8) - 1) |
86 | 85 | ||
87 | extern struct thread_info *alloc_thread_info(struct task_struct *task); | 86 | extern struct thread_info *alloc_thread_info(struct task_struct *task); |
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index e828377ad295..7708ec669a33 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h | |||
@@ -927,7 +927,7 @@ static inline s64 | |||
927 | ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) | 927 | ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) |
928 | { | 928 | { |
929 | struct ia64_pal_retval iprv; | 929 | struct ia64_pal_retval iprv; |
930 | PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); | 930 | PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); |
931 | if (vector) | 931 | if (vector) |
932 | *vector = iprv.v0; | 932 | *vector = iprv.v0; |
933 | *progress = iprv.v1; | 933 | *progress = iprv.v1; |
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index 8c648bf72bbd..09b99029ac1a 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h | |||
@@ -25,8 +25,8 @@ | |||
25 | * Limits for PMC and PMD are set to less than maximum architected values | 25 | * Limits for PMC and PMD are set to less than maximum architected values |
26 | * but should be sufficient for a while | 26 | * but should be sufficient for a while |
27 | */ | 27 | */ |
28 | #define IA64_NUM_PMC_REGS 32 | 28 | #define IA64_NUM_PMC_REGS 64 |
29 | #define IA64_NUM_PMD_REGS 32 | 29 | #define IA64_NUM_PMD_REGS 64 |
30 | 30 | ||
31 | #define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000) | 31 | #define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000) |
32 | #define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000) | 32 | #define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000) |
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h index e35074f526d9..a3431372c6e7 100644 --- a/include/asm-ia64/sn/intr.h +++ b/include/asm-ia64/sn/intr.h | |||
@@ -40,7 +40,7 @@ struct sn_irq_info { | |||
40 | int irq_cpuid; /* kernel logical cpuid */ | 40 | int irq_cpuid; /* kernel logical cpuid */ |
41 | int irq_irq; /* the IRQ number */ | 41 | int irq_irq; /* the IRQ number */ |
42 | int irq_int_bit; /* Bridge interrupt pin */ | 42 | int irq_int_bit; /* Bridge interrupt pin */ |
43 | uint64_t irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ | 43 | u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ |
44 | int irq_bridge_type;/* pciio asic type (pciio.h) */ | 44 | int irq_bridge_type;/* pciio asic type (pciio.h) */ |
45 | void *irq_bridge; /* bridge generating irq */ | 45 | void *irq_bridge; /* bridge generating irq */ |
46 | void *irq_pciioinfo; /* associated pciio_info_t */ | 46 | void *irq_pciioinfo; /* associated pciio_info_t */ |
diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h index 2b42d9ece26b..9334078b089a 100644 --- a/include/asm-ia64/sn/pcibr_provider.h +++ b/include/asm-ia64/sn/pcibr_provider.h | |||
@@ -44,9 +44,9 @@ | |||
44 | #define PCI32_MAPPED_BASE 0x40000000 | 44 | #define PCI32_MAPPED_BASE 0x40000000 |
45 | #define PCI32_DIRECT_BASE 0x80000000 | 45 | #define PCI32_DIRECT_BASE 0x80000000 |
46 | 46 | ||
47 | #define IS_PCI32_MAPPED(x) ((uint64_t)(x) < PCI32_DIRECT_BASE && \ | 47 | #define IS_PCI32_MAPPED(x) ((u64)(x) < PCI32_DIRECT_BASE && \ |
48 | (uint64_t)(x) >= PCI32_MAPPED_BASE) | 48 | (u64)(x) >= PCI32_MAPPED_BASE) |
49 | #define IS_PCI32_DIRECT(x) ((uint64_t)(x) >= PCI32_MAPPED_BASE) | 49 | #define IS_PCI32_DIRECT(x) ((u64)(x) >= PCI32_MAPPED_BASE) |
50 | 50 | ||
51 | 51 | ||
52 | /* | 52 | /* |
@@ -63,7 +63,7 @@ | |||
63 | (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1)) | 63 | (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1)) |
64 | 64 | ||
65 | #define MINIMAL_ATE_FLAG(addr, size) \ | 65 | #define MINIMAL_ATE_FLAG(addr, size) \ |
66 | (MINIMAL_ATES_REQUIRED((uint64_t)addr, size) ? 1 : 0) | 66 | (MINIMAL_ATES_REQUIRED((u64)addr, size) ? 1 : 0) |
67 | 67 | ||
68 | /* bit 29 of the pci address is the SWAP bit */ | 68 | /* bit 29 of the pci address is the SWAP bit */ |
69 | #define ATE_SWAPSHIFT 29 | 69 | #define ATE_SWAPSHIFT 29 |
@@ -90,27 +90,27 @@ | |||
90 | * PMU resources. | 90 | * PMU resources. |
91 | */ | 91 | */ |
92 | struct ate_resource{ | 92 | struct ate_resource{ |
93 | uint64_t *ate; | 93 | u64 *ate; |
94 | uint64_t num_ate; | 94 | u64 num_ate; |
95 | uint64_t lowest_free_index; | 95 | u64 lowest_free_index; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | struct pcibus_info { | 98 | struct pcibus_info { |
99 | struct pcibus_bussoft pbi_buscommon; /* common header */ | 99 | struct pcibus_bussoft pbi_buscommon; /* common header */ |
100 | uint32_t pbi_moduleid; | 100 | u32 pbi_moduleid; |
101 | short pbi_bridge_type; | 101 | short pbi_bridge_type; |
102 | short pbi_bridge_mode; | 102 | short pbi_bridge_mode; |
103 | 103 | ||
104 | struct ate_resource pbi_int_ate_resource; | 104 | struct ate_resource pbi_int_ate_resource; |
105 | uint64_t pbi_int_ate_size; | 105 | u64 pbi_int_ate_size; |
106 | 106 | ||
107 | uint64_t pbi_dir_xbase; | 107 | u64 pbi_dir_xbase; |
108 | char pbi_hub_xid; | 108 | char pbi_hub_xid; |
109 | 109 | ||
110 | uint64_t pbi_devreg[8]; | 110 | u64 pbi_devreg[8]; |
111 | 111 | ||
112 | uint32_t pbi_valid_devices; | 112 | u32 pbi_valid_devices; |
113 | uint32_t pbi_enabled_devices; | 113 | u32 pbi_enabled_devices; |
114 | 114 | ||
115 | spinlock_t pbi_lock; | 115 | spinlock_t pbi_lock; |
116 | }; | 116 | }; |
@@ -136,22 +136,22 @@ extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int); | |||
136 | /* | 136 | /* |
137 | * prototypes for the bridge asic register access routines in pcibr_reg.c | 137 | * prototypes for the bridge asic register access routines in pcibr_reg.c |
138 | */ | 138 | */ |
139 | extern void pcireg_control_bit_clr(struct pcibus_info *, uint64_t); | 139 | extern void pcireg_control_bit_clr(struct pcibus_info *, u64); |
140 | extern void pcireg_control_bit_set(struct pcibus_info *, uint64_t); | 140 | extern void pcireg_control_bit_set(struct pcibus_info *, u64); |
141 | extern uint64_t pcireg_tflush_get(struct pcibus_info *); | 141 | extern u64 pcireg_tflush_get(struct pcibus_info *); |
142 | extern uint64_t pcireg_intr_status_get(struct pcibus_info *); | 142 | extern u64 pcireg_intr_status_get(struct pcibus_info *); |
143 | extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, uint64_t); | 143 | extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, u64); |
144 | extern void pcireg_intr_enable_bit_set(struct pcibus_info *, uint64_t); | 144 | extern void pcireg_intr_enable_bit_set(struct pcibus_info *, u64); |
145 | extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, uint64_t); | 145 | extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, u64); |
146 | extern void pcireg_force_intr_set(struct pcibus_info *, int); | 146 | extern void pcireg_force_intr_set(struct pcibus_info *, int); |
147 | extern uint64_t pcireg_wrb_flush_get(struct pcibus_info *, int); | 147 | extern u64 pcireg_wrb_flush_get(struct pcibus_info *, int); |
148 | extern void pcireg_int_ate_set(struct pcibus_info *, int, uint64_t); | 148 | extern void pcireg_int_ate_set(struct pcibus_info *, int, u64); |
149 | extern uint64_t * pcireg_int_ate_addr(struct pcibus_info *, int); | 149 | extern u64 * pcireg_int_ate_addr(struct pcibus_info *, int); |
150 | extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info); | 150 | extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info); |
151 | extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info); | 151 | extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info); |
152 | extern int pcibr_ate_alloc(struct pcibus_info *, int); | 152 | extern int pcibr_ate_alloc(struct pcibus_info *, int); |
153 | extern void pcibr_ate_free(struct pcibus_info *, int); | 153 | extern void pcibr_ate_free(struct pcibus_info *, int); |
154 | extern void ate_write(struct pcibus_info *, int, int, uint64_t); | 154 | extern void ate_write(struct pcibus_info *, int, int, u64); |
155 | extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device, | 155 | extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device, |
156 | void *resp); | 156 | void *resp); |
157 | extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device, | 157 | extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device, |
diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h index ad0e8e8ae53f..ce3f6c328241 100644 --- a/include/asm-ia64/sn/pcibus_provider_defs.h +++ b/include/asm-ia64/sn/pcibus_provider_defs.h | |||
@@ -29,13 +29,13 @@ | |||
29 | */ | 29 | */ |
30 | 30 | ||
31 | struct pcibus_bussoft { | 31 | struct pcibus_bussoft { |
32 | uint32_t bs_asic_type; /* chipset type */ | 32 | u32 bs_asic_type; /* chipset type */ |
33 | uint32_t bs_xid; /* xwidget id */ | 33 | u32 bs_xid; /* xwidget id */ |
34 | uint32_t bs_persist_busnum; /* Persistent Bus Number */ | 34 | u32 bs_persist_busnum; /* Persistent Bus Number */ |
35 | uint32_t bs_persist_segment; /* Segment Number */ | 35 | u32 bs_persist_segment; /* Segment Number */ |
36 | uint64_t bs_legacy_io; /* legacy io pio addr */ | 36 | u64 bs_legacy_io; /* legacy io pio addr */ |
37 | uint64_t bs_legacy_mem; /* legacy mem pio addr */ | 37 | u64 bs_legacy_mem; /* legacy mem pio addr */ |
38 | uint64_t bs_base; /* widget base */ | 38 | u64 bs_base; /* widget base */ |
39 | struct xwidget_info *bs_xwidget_info; | 39 | struct xwidget_info *bs_xwidget_info; |
40 | }; | 40 | }; |
41 | 41 | ||
diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h index f65d222ca5e8..38cdffbc4c7b 100644 --- a/include/asm-ia64/sn/pcidev.h +++ b/include/asm-ia64/sn/pcidev.h | |||
@@ -55,8 +55,8 @@ struct sn_pci_controller { | |||
55 | #define PCIIO_VENDOR_ID_NONE (-1) | 55 | #define PCIIO_VENDOR_ID_NONE (-1) |
56 | 56 | ||
57 | struct pcidev_info { | 57 | struct pcidev_info { |
58 | uint64_t pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */ | 58 | u64 pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */ |
59 | uint64_t pdi_slot_host_handle; /* Bus and devfn Host pci_dev */ | 59 | u64 pdi_slot_host_handle; /* Bus and devfn Host pci_dev */ |
60 | 60 | ||
61 | struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */ | 61 | struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */ |
62 | struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */ | 62 | struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */ |
diff --git a/include/asm-ia64/sn/pic.h b/include/asm-ia64/sn/pic.h index 0de82e6b0893..5f9da5fd6e56 100644 --- a/include/asm-ia64/sn/pic.h +++ b/include/asm-ia64/sn/pic.h | |||
@@ -74,120 +74,120 @@ struct pic { | |||
74 | /* 0x000000-0x00FFFF -- Local Registers */ | 74 | /* 0x000000-0x00FFFF -- Local Registers */ |
75 | 75 | ||
76 | /* 0x000000-0x000057 -- Standard Widget Configuration */ | 76 | /* 0x000000-0x000057 -- Standard Widget Configuration */ |
77 | uint64_t p_wid_id; /* 0x000000 */ | 77 | u64 p_wid_id; /* 0x000000 */ |
78 | uint64_t p_wid_stat; /* 0x000008 */ | 78 | u64 p_wid_stat; /* 0x000008 */ |
79 | uint64_t p_wid_err_upper; /* 0x000010 */ | 79 | u64 p_wid_err_upper; /* 0x000010 */ |
80 | uint64_t p_wid_err_lower; /* 0x000018 */ | 80 | u64 p_wid_err_lower; /* 0x000018 */ |
81 | #define p_wid_err p_wid_err_lower | 81 | #define p_wid_err p_wid_err_lower |
82 | uint64_t p_wid_control; /* 0x000020 */ | 82 | u64 p_wid_control; /* 0x000020 */ |
83 | uint64_t p_wid_req_timeout; /* 0x000028 */ | 83 | u64 p_wid_req_timeout; /* 0x000028 */ |
84 | uint64_t p_wid_int_upper; /* 0x000030 */ | 84 | u64 p_wid_int_upper; /* 0x000030 */ |
85 | uint64_t p_wid_int_lower; /* 0x000038 */ | 85 | u64 p_wid_int_lower; /* 0x000038 */ |
86 | #define p_wid_int p_wid_int_lower | 86 | #define p_wid_int p_wid_int_lower |
87 | uint64_t p_wid_err_cmdword; /* 0x000040 */ | 87 | u64 p_wid_err_cmdword; /* 0x000040 */ |
88 | uint64_t p_wid_llp; /* 0x000048 */ | 88 | u64 p_wid_llp; /* 0x000048 */ |
89 | uint64_t p_wid_tflush; /* 0x000050 */ | 89 | u64 p_wid_tflush; /* 0x000050 */ |
90 | 90 | ||
91 | /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */ | 91 | /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */ |
92 | uint64_t p_wid_aux_err; /* 0x000058 */ | 92 | u64 p_wid_aux_err; /* 0x000058 */ |
93 | uint64_t p_wid_resp_upper; /* 0x000060 */ | 93 | u64 p_wid_resp_upper; /* 0x000060 */ |
94 | uint64_t p_wid_resp_lower; /* 0x000068 */ | 94 | u64 p_wid_resp_lower; /* 0x000068 */ |
95 | #define p_wid_resp p_wid_resp_lower | 95 | #define p_wid_resp p_wid_resp_lower |
96 | uint64_t p_wid_tst_pin_ctrl; /* 0x000070 */ | 96 | u64 p_wid_tst_pin_ctrl; /* 0x000070 */ |
97 | uint64_t p_wid_addr_lkerr; /* 0x000078 */ | 97 | u64 p_wid_addr_lkerr; /* 0x000078 */ |
98 | 98 | ||
99 | /* 0x000080-0x00008F -- PMU & MAP */ | 99 | /* 0x000080-0x00008F -- PMU & MAP */ |
100 | uint64_t p_dir_map; /* 0x000080 */ | 100 | u64 p_dir_map; /* 0x000080 */ |
101 | uint64_t _pad_000088; /* 0x000088 */ | 101 | u64 _pad_000088; /* 0x000088 */ |
102 | 102 | ||
103 | /* 0x000090-0x00009F -- SSRAM */ | 103 | /* 0x000090-0x00009F -- SSRAM */ |
104 | uint64_t p_map_fault; /* 0x000090 */ | 104 | u64 p_map_fault; /* 0x000090 */ |
105 | uint64_t _pad_000098; /* 0x000098 */ | 105 | u64 _pad_000098; /* 0x000098 */ |
106 | 106 | ||
107 | /* 0x0000A0-0x0000AF -- Arbitration */ | 107 | /* 0x0000A0-0x0000AF -- Arbitration */ |
108 | uint64_t p_arb; /* 0x0000A0 */ | 108 | u64 p_arb; /* 0x0000A0 */ |
109 | uint64_t _pad_0000A8; /* 0x0000A8 */ | 109 | u64 _pad_0000A8; /* 0x0000A8 */ |
110 | 110 | ||
111 | /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ | 111 | /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ |
112 | uint64_t p_ate_parity_err; /* 0x0000B0 */ | 112 | u64 p_ate_parity_err; /* 0x0000B0 */ |
113 | uint64_t _pad_0000B8; /* 0x0000B8 */ | 113 | u64 _pad_0000B8; /* 0x0000B8 */ |
114 | 114 | ||
115 | /* 0x0000C0-0x0000FF -- PCI/GIO */ | 115 | /* 0x0000C0-0x0000FF -- PCI/GIO */ |
116 | uint64_t p_bus_timeout; /* 0x0000C0 */ | 116 | u64 p_bus_timeout; /* 0x0000C0 */ |
117 | uint64_t p_pci_cfg; /* 0x0000C8 */ | 117 | u64 p_pci_cfg; /* 0x0000C8 */ |
118 | uint64_t p_pci_err_upper; /* 0x0000D0 */ | 118 | u64 p_pci_err_upper; /* 0x0000D0 */ |
119 | uint64_t p_pci_err_lower; /* 0x0000D8 */ | 119 | u64 p_pci_err_lower; /* 0x0000D8 */ |
120 | #define p_pci_err p_pci_err_lower | 120 | #define p_pci_err p_pci_err_lower |
121 | uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */ | 121 | u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ |
122 | 122 | ||
123 | /* 0x000100-0x0001FF -- Interrupt */ | 123 | /* 0x000100-0x0001FF -- Interrupt */ |
124 | uint64_t p_int_status; /* 0x000100 */ | 124 | u64 p_int_status; /* 0x000100 */ |
125 | uint64_t p_int_enable; /* 0x000108 */ | 125 | u64 p_int_enable; /* 0x000108 */ |
126 | uint64_t p_int_rst_stat; /* 0x000110 */ | 126 | u64 p_int_rst_stat; /* 0x000110 */ |
127 | uint64_t p_int_mode; /* 0x000118 */ | 127 | u64 p_int_mode; /* 0x000118 */ |
128 | uint64_t p_int_device; /* 0x000120 */ | 128 | u64 p_int_device; /* 0x000120 */ |
129 | uint64_t p_int_host_err; /* 0x000128 */ | 129 | u64 p_int_host_err; /* 0x000128 */ |
130 | uint64_t p_int_addr[8]; /* 0x0001{30,,,68} */ | 130 | u64 p_int_addr[8]; /* 0x0001{30,,,68} */ |
131 | uint64_t p_err_int_view; /* 0x000170 */ | 131 | u64 p_err_int_view; /* 0x000170 */ |
132 | uint64_t p_mult_int; /* 0x000178 */ | 132 | u64 p_mult_int; /* 0x000178 */ |
133 | uint64_t p_force_always[8]; /* 0x0001{80,,,B8} */ | 133 | u64 p_force_always[8]; /* 0x0001{80,,,B8} */ |
134 | uint64_t p_force_pin[8]; /* 0x0001{C0,,,F8} */ | 134 | u64 p_force_pin[8]; /* 0x0001{C0,,,F8} */ |
135 | 135 | ||
136 | /* 0x000200-0x000298 -- Device */ | 136 | /* 0x000200-0x000298 -- Device */ |
137 | uint64_t p_device[4]; /* 0x0002{00,,,18} */ | 137 | u64 p_device[4]; /* 0x0002{00,,,18} */ |
138 | uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */ | 138 | u64 _pad_000220[4]; /* 0x0002{20,,,38} */ |
139 | uint64_t p_wr_req_buf[4]; /* 0x0002{40,,,58} */ | 139 | u64 p_wr_req_buf[4]; /* 0x0002{40,,,58} */ |
140 | uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */ | 140 | u64 _pad_000260[4]; /* 0x0002{60,,,78} */ |
141 | uint64_t p_rrb_map[2]; /* 0x0002{80,,,88} */ | 141 | u64 p_rrb_map[2]; /* 0x0002{80,,,88} */ |
142 | #define p_even_resp p_rrb_map[0] /* 0x000280 */ | 142 | #define p_even_resp p_rrb_map[0] /* 0x000280 */ |
143 | #define p_odd_resp p_rrb_map[1] /* 0x000288 */ | 143 | #define p_odd_resp p_rrb_map[1] /* 0x000288 */ |
144 | uint64_t p_resp_status; /* 0x000290 */ | 144 | u64 p_resp_status; /* 0x000290 */ |
145 | uint64_t p_resp_clear; /* 0x000298 */ | 145 | u64 p_resp_clear; /* 0x000298 */ |
146 | 146 | ||
147 | uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */ | 147 | u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ |
148 | 148 | ||
149 | /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ | 149 | /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ |
150 | struct { | 150 | struct { |
151 | uint64_t upper; /* 0x0003{00,,,F0} */ | 151 | u64 upper; /* 0x0003{00,,,F0} */ |
152 | uint64_t lower; /* 0x0003{08,,,F8} */ | 152 | u64 lower; /* 0x0003{08,,,F8} */ |
153 | } p_buf_addr_match[16]; | 153 | } p_buf_addr_match[16]; |
154 | 154 | ||
155 | /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ | 155 | /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ |
156 | struct { | 156 | struct { |
157 | uint64_t flush_w_touch; /* 0x000{400,,,5C0} */ | 157 | u64 flush_w_touch; /* 0x000{400,,,5C0} */ |
158 | uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */ | 158 | u64 flush_wo_touch; /* 0x000{408,,,5C8} */ |
159 | uint64_t inflight; /* 0x000{410,,,5D0} */ | 159 | u64 inflight; /* 0x000{410,,,5D0} */ |
160 | uint64_t prefetch; /* 0x000{418,,,5D8} */ | 160 | u64 prefetch; /* 0x000{418,,,5D8} */ |
161 | uint64_t total_pci_retry; /* 0x000{420,,,5E0} */ | 161 | u64 total_pci_retry; /* 0x000{420,,,5E0} */ |
162 | uint64_t max_pci_retry; /* 0x000{428,,,5E8} */ | 162 | u64 max_pci_retry; /* 0x000{428,,,5E8} */ |
163 | uint64_t max_latency; /* 0x000{430,,,5F0} */ | 163 | u64 max_latency; /* 0x000{430,,,5F0} */ |
164 | uint64_t clear_all; /* 0x000{438,,,5F8} */ | 164 | u64 clear_all; /* 0x000{438,,,5F8} */ |
165 | } p_buf_count[8]; | 165 | } p_buf_count[8]; |
166 | 166 | ||
167 | 167 | ||
168 | /* 0x000600-0x0009FF -- PCI/X registers */ | 168 | /* 0x000600-0x0009FF -- PCI/X registers */ |
169 | uint64_t p_pcix_bus_err_addr; /* 0x000600 */ | 169 | u64 p_pcix_bus_err_addr; /* 0x000600 */ |
170 | uint64_t p_pcix_bus_err_attr; /* 0x000608 */ | 170 | u64 p_pcix_bus_err_attr; /* 0x000608 */ |
171 | uint64_t p_pcix_bus_err_data; /* 0x000610 */ | 171 | u64 p_pcix_bus_err_data; /* 0x000610 */ |
172 | uint64_t p_pcix_pio_split_addr; /* 0x000618 */ | 172 | u64 p_pcix_pio_split_addr; /* 0x000618 */ |
173 | uint64_t p_pcix_pio_split_attr; /* 0x000620 */ | 173 | u64 p_pcix_pio_split_attr; /* 0x000620 */ |
174 | uint64_t p_pcix_dma_req_err_attr; /* 0x000628 */ | 174 | u64 p_pcix_dma_req_err_attr; /* 0x000628 */ |
175 | uint64_t p_pcix_dma_req_err_addr; /* 0x000630 */ | 175 | u64 p_pcix_dma_req_err_addr; /* 0x000630 */ |
176 | uint64_t p_pcix_timeout; /* 0x000638 */ | 176 | u64 p_pcix_timeout; /* 0x000638 */ |
177 | 177 | ||
178 | uint64_t _pad_000640[120]; /* 0x000{640,,,9F8} */ | 178 | u64 _pad_000640[120]; /* 0x000{640,,,9F8} */ |
179 | 179 | ||
180 | /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ | 180 | /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ |
181 | struct { | 181 | struct { |
182 | uint64_t p_buf_addr; /* 0x000{A00,,,AF0} */ | 182 | u64 p_buf_addr; /* 0x000{A00,,,AF0} */ |
183 | uint64_t p_buf_attr; /* 0X000{A08,,,AF8} */ | 183 | u64 p_buf_attr; /* 0X000{A08,,,AF8} */ |
184 | } p_pcix_read_buf_64[16]; | 184 | } p_pcix_read_buf_64[16]; |
185 | 185 | ||
186 | struct { | 186 | struct { |
187 | uint64_t p_buf_addr; /* 0x000{B00,,,BE0} */ | 187 | u64 p_buf_addr; /* 0x000{B00,,,BE0} */ |
188 | uint64_t p_buf_attr; /* 0x000{B08,,,BE8} */ | 188 | u64 p_buf_attr; /* 0x000{B08,,,BE8} */ |
189 | uint64_t p_buf_valid; /* 0x000{B10,,,BF0} */ | 189 | u64 p_buf_valid; /* 0x000{B10,,,BF0} */ |
190 | uint64_t __pad1; /* 0x000{B18,,,BF8} */ | 190 | u64 __pad1; /* 0x000{B18,,,BF8} */ |
191 | } p_pcix_write_buf_64[8]; | 191 | } p_pcix_write_buf_64[8]; |
192 | 192 | ||
193 | /* End of Local Registers -- Start of Address Map space */ | 193 | /* End of Local Registers -- Start of Address Map space */ |
@@ -195,45 +195,45 @@ struct pic { | |||
195 | char _pad_000c00[0x010000 - 0x000c00]; | 195 | char _pad_000c00[0x010000 - 0x000c00]; |
196 | 196 | ||
197 | /* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */ | 197 | /* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */ |
198 | uint64_t p_int_ate_ram[1024]; /* 0x010000-0x011fff */ | 198 | u64 p_int_ate_ram[1024]; /* 0x010000-0x011fff */ |
199 | 199 | ||
200 | /* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */ | 200 | /* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */ |
201 | uint64_t p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */ | 201 | u64 p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */ |
202 | 202 | ||
203 | char _pad_014000[0x18000 - 0x014000]; | 203 | char _pad_014000[0x18000 - 0x014000]; |
204 | 204 | ||
205 | /* 0x18000-0x197F8 -- PIC Write Request Ram */ | 205 | /* 0x18000-0x197F8 -- PIC Write Request Ram */ |
206 | uint64_t p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ | 206 | u64 p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ |
207 | uint64_t p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ | 207 | u64 p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ |
208 | uint64_t p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ | 208 | u64 p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ |
209 | 209 | ||
210 | char _pad_019800[0x20000 - 0x019800]; | 210 | char _pad_019800[0x20000 - 0x019800]; |
211 | 211 | ||
212 | /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */ | 212 | /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */ |
213 | union { | 213 | union { |
214 | uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ | 214 | u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ |
215 | uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ | 215 | u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ |
216 | uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ | 216 | u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ |
217 | uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ | 217 | u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ |
218 | union { | 218 | union { |
219 | uint8_t c[0x100 / 1]; | 219 | u8 c[0x100 / 1]; |
220 | uint16_t s[0x100 / 2]; | 220 | u16 s[0x100 / 2]; |
221 | uint32_t l[0x100 / 4]; | 221 | u32 l[0x100 / 4]; |
222 | uint64_t d[0x100 / 8]; | 222 | u64 d[0x100 / 8]; |
223 | } f[8]; | 223 | } f[8]; |
224 | } p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */ | 224 | } p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */ |
225 | 225 | ||
226 | /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ | 226 | /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ |
227 | union { | 227 | union { |
228 | uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */ | 228 | u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ |
229 | uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */ | 229 | u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ |
230 | uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */ | 230 | u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ |
231 | uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */ | 231 | u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ |
232 | union { | 232 | union { |
233 | uint8_t c[0x100 / 1]; | 233 | u8 c[0x100 / 1]; |
234 | uint16_t s[0x100 / 2]; | 234 | u16 s[0x100 / 2]; |
235 | uint32_t l[0x100 / 4]; | 235 | u32 l[0x100 / 4]; |
236 | uint64_t d[0x100 / 8]; | 236 | u64 d[0x100 / 8]; |
237 | } f[8]; | 237 | } f[8]; |
238 | } p_type1_cfg; /* 0x028000-0x029000 */ | 238 | } p_type1_cfg; /* 0x028000-0x029000 */ |
239 | 239 | ||
@@ -241,20 +241,20 @@ struct pic { | |||
241 | 241 | ||
242 | /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ | 242 | /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ |
243 | union { | 243 | union { |
244 | uint8_t c[8 / 1]; | 244 | u8 c[8 / 1]; |
245 | uint16_t s[8 / 2]; | 245 | u16 s[8 / 2]; |
246 | uint32_t l[8 / 4]; | 246 | u32 l[8 / 4]; |
247 | uint64_t d[8 / 8]; | 247 | u64 d[8 / 8]; |
248 | } p_pci_iack; /* 0x030000-0x030007 */ | 248 | } p_pci_iack; /* 0x030000-0x030007 */ |
249 | 249 | ||
250 | char _pad_030007[0x040000-0x030008]; | 250 | char _pad_030007[0x040000-0x030008]; |
251 | 251 | ||
252 | /* 0x040000-0x030007 -- PCIX Special Cycle */ | 252 | /* 0x040000-0x030007 -- PCIX Special Cycle */ |
253 | union { | 253 | union { |
254 | uint8_t c[8 / 1]; | 254 | u8 c[8 / 1]; |
255 | uint16_t s[8 / 2]; | 255 | u16 s[8 / 2]; |
256 | uint32_t l[8 / 4]; | 256 | u32 l[8 / 4]; |
257 | uint64_t d[8 / 8]; | 257 | u64 d[8 / 8]; |
258 | } p_pcix_cycle; /* 0x040000-0x040007 */ | 258 | } p_pcix_cycle; /* 0x040000-0x040007 */ |
259 | }; | 259 | }; |
260 | 260 | ||
diff --git a/include/asm-ia64/sn/shubio.h b/include/asm-ia64/sn/shubio.h index 831b72111fdc..22a6f18a5313 100644 --- a/include/asm-ia64/sn/shubio.h +++ b/include/asm-ia64/sn/shubio.h | |||
@@ -227,13 +227,13 @@ | |||
227 | ************************************************************************/ | 227 | ************************************************************************/ |
228 | 228 | ||
229 | typedef union ii_wid_u { | 229 | typedef union ii_wid_u { |
230 | uint64_t ii_wid_regval; | 230 | u64 ii_wid_regval; |
231 | struct { | 231 | struct { |
232 | uint64_t w_rsvd_1:1; | 232 | u64 w_rsvd_1:1; |
233 | uint64_t w_mfg_num:11; | 233 | u64 w_mfg_num:11; |
234 | uint64_t w_part_num:16; | 234 | u64 w_part_num:16; |
235 | uint64_t w_rev_num:4; | 235 | u64 w_rev_num:4; |
236 | uint64_t w_rsvd:32; | 236 | u64 w_rsvd:32; |
237 | } ii_wid_fld_s; | 237 | } ii_wid_fld_s; |
238 | } ii_wid_u_t; | 238 | } ii_wid_u_t; |
239 | 239 | ||
@@ -246,18 +246,18 @@ typedef union ii_wid_u { | |||
246 | ************************************************************************/ | 246 | ************************************************************************/ |
247 | 247 | ||
248 | typedef union ii_wstat_u { | 248 | typedef union ii_wstat_u { |
249 | uint64_t ii_wstat_regval; | 249 | u64 ii_wstat_regval; |
250 | struct { | 250 | struct { |
251 | uint64_t w_pending:4; | 251 | u64 w_pending:4; |
252 | uint64_t w_xt_crd_to:1; | 252 | u64 w_xt_crd_to:1; |
253 | uint64_t w_xt_tail_to:1; | 253 | u64 w_xt_tail_to:1; |
254 | uint64_t w_rsvd_3:3; | 254 | u64 w_rsvd_3:3; |
255 | uint64_t w_tx_mx_rty:1; | 255 | u64 w_tx_mx_rty:1; |
256 | uint64_t w_rsvd_2:6; | 256 | u64 w_rsvd_2:6; |
257 | uint64_t w_llp_tx_cnt:8; | 257 | u64 w_llp_tx_cnt:8; |
258 | uint64_t w_rsvd_1:8; | 258 | u64 w_rsvd_1:8; |
259 | uint64_t w_crazy:1; | 259 | u64 w_crazy:1; |
260 | uint64_t w_rsvd:31; | 260 | u64 w_rsvd:31; |
261 | } ii_wstat_fld_s; | 261 | } ii_wstat_fld_s; |
262 | } ii_wstat_u_t; | 262 | } ii_wstat_u_t; |
263 | 263 | ||
@@ -269,16 +269,16 @@ typedef union ii_wstat_u { | |||
269 | ************************************************************************/ | 269 | ************************************************************************/ |
270 | 270 | ||
271 | typedef union ii_wcr_u { | 271 | typedef union ii_wcr_u { |
272 | uint64_t ii_wcr_regval; | 272 | u64 ii_wcr_regval; |
273 | struct { | 273 | struct { |
274 | uint64_t w_wid:4; | 274 | u64 w_wid:4; |
275 | uint64_t w_tag:1; | 275 | u64 w_tag:1; |
276 | uint64_t w_rsvd_1:8; | 276 | u64 w_rsvd_1:8; |
277 | uint64_t w_dst_crd:3; | 277 | u64 w_dst_crd:3; |
278 | uint64_t w_f_bad_pkt:1; | 278 | u64 w_f_bad_pkt:1; |
279 | uint64_t w_dir_con:1; | 279 | u64 w_dir_con:1; |
280 | uint64_t w_e_thresh:5; | 280 | u64 w_e_thresh:5; |
281 | uint64_t w_rsvd:41; | 281 | u64 w_rsvd:41; |
282 | } ii_wcr_fld_s; | 282 | } ii_wcr_fld_s; |
283 | } ii_wcr_u_t; | 283 | } ii_wcr_u_t; |
284 | 284 | ||
@@ -310,9 +310,9 @@ typedef union ii_wcr_u { | |||
310 | ************************************************************************/ | 310 | ************************************************************************/ |
311 | 311 | ||
312 | typedef union ii_ilapr_u { | 312 | typedef union ii_ilapr_u { |
313 | uint64_t ii_ilapr_regval; | 313 | u64 ii_ilapr_regval; |
314 | struct { | 314 | struct { |
315 | uint64_t i_region:64; | 315 | u64 i_region:64; |
316 | } ii_ilapr_fld_s; | 316 | } ii_ilapr_fld_s; |
317 | } ii_ilapr_u_t; | 317 | } ii_ilapr_u_t; |
318 | 318 | ||
@@ -330,9 +330,9 @@ typedef union ii_ilapr_u { | |||
330 | ************************************************************************/ | 330 | ************************************************************************/ |
331 | 331 | ||
332 | typedef union ii_ilapo_u { | 332 | typedef union ii_ilapo_u { |
333 | uint64_t ii_ilapo_regval; | 333 | u64 ii_ilapo_regval; |
334 | struct { | 334 | struct { |
335 | uint64_t i_io_ovrride:64; | 335 | u64 i_io_ovrride:64; |
336 | } ii_ilapo_fld_s; | 336 | } ii_ilapo_fld_s; |
337 | } ii_ilapo_u_t; | 337 | } ii_ilapo_u_t; |
338 | 338 | ||
@@ -344,12 +344,12 @@ typedef union ii_ilapo_u { | |||
344 | ************************************************************************/ | 344 | ************************************************************************/ |
345 | 345 | ||
346 | typedef union ii_iowa_u { | 346 | typedef union ii_iowa_u { |
347 | uint64_t ii_iowa_regval; | 347 | u64 ii_iowa_regval; |
348 | struct { | 348 | struct { |
349 | uint64_t i_w0_oac:1; | 349 | u64 i_w0_oac:1; |
350 | uint64_t i_rsvd_1:7; | 350 | u64 i_rsvd_1:7; |
351 | uint64_t i_wx_oac:8; | 351 | u64 i_wx_oac:8; |
352 | uint64_t i_rsvd:48; | 352 | u64 i_rsvd:48; |
353 | } ii_iowa_fld_s; | 353 | } ii_iowa_fld_s; |
354 | } ii_iowa_u_t; | 354 | } ii_iowa_u_t; |
355 | 355 | ||
@@ -363,12 +363,12 @@ typedef union ii_iowa_u { | |||
363 | ************************************************************************/ | 363 | ************************************************************************/ |
364 | 364 | ||
365 | typedef union ii_iiwa_u { | 365 | typedef union ii_iiwa_u { |
366 | uint64_t ii_iiwa_regval; | 366 | u64 ii_iiwa_regval; |
367 | struct { | 367 | struct { |
368 | uint64_t i_w0_iac:1; | 368 | u64 i_w0_iac:1; |
369 | uint64_t i_rsvd_1:7; | 369 | u64 i_rsvd_1:7; |
370 | uint64_t i_wx_iac:8; | 370 | u64 i_wx_iac:8; |
371 | uint64_t i_rsvd:48; | 371 | u64 i_rsvd:48; |
372 | } ii_iiwa_fld_s; | 372 | } ii_iiwa_fld_s; |
373 | } ii_iiwa_u_t; | 373 | } ii_iiwa_u_t; |
374 | 374 | ||
@@ -392,16 +392,16 @@ typedef union ii_iiwa_u { | |||
392 | ************************************************************************/ | 392 | ************************************************************************/ |
393 | 393 | ||
394 | typedef union ii_iidem_u { | 394 | typedef union ii_iidem_u { |
395 | uint64_t ii_iidem_regval; | 395 | u64 ii_iidem_regval; |
396 | struct { | 396 | struct { |
397 | uint64_t i_w8_dxs:8; | 397 | u64 i_w8_dxs:8; |
398 | uint64_t i_w9_dxs:8; | 398 | u64 i_w9_dxs:8; |
399 | uint64_t i_wa_dxs:8; | 399 | u64 i_wa_dxs:8; |
400 | uint64_t i_wb_dxs:8; | 400 | u64 i_wb_dxs:8; |
401 | uint64_t i_wc_dxs:8; | 401 | u64 i_wc_dxs:8; |
402 | uint64_t i_wd_dxs:8; | 402 | u64 i_wd_dxs:8; |
403 | uint64_t i_we_dxs:8; | 403 | u64 i_we_dxs:8; |
404 | uint64_t i_wf_dxs:8; | 404 | u64 i_wf_dxs:8; |
405 | } ii_iidem_fld_s; | 405 | } ii_iidem_fld_s; |
406 | } ii_iidem_u_t; | 406 | } ii_iidem_u_t; |
407 | 407 | ||
@@ -413,22 +413,22 @@ typedef union ii_iidem_u { | |||
413 | ************************************************************************/ | 413 | ************************************************************************/ |
414 | 414 | ||
415 | typedef union ii_ilcsr_u { | 415 | typedef union ii_ilcsr_u { |
416 | uint64_t ii_ilcsr_regval; | 416 | u64 ii_ilcsr_regval; |
417 | struct { | 417 | struct { |
418 | uint64_t i_nullto:6; | 418 | u64 i_nullto:6; |
419 | uint64_t i_rsvd_4:2; | 419 | u64 i_rsvd_4:2; |
420 | uint64_t i_wrmrst:1; | 420 | u64 i_wrmrst:1; |
421 | uint64_t i_rsvd_3:1; | 421 | u64 i_rsvd_3:1; |
422 | uint64_t i_llp_en:1; | 422 | u64 i_llp_en:1; |
423 | uint64_t i_bm8:1; | 423 | u64 i_bm8:1; |
424 | uint64_t i_llp_stat:2; | 424 | u64 i_llp_stat:2; |
425 | uint64_t i_remote_power:1; | 425 | u64 i_remote_power:1; |
426 | uint64_t i_rsvd_2:1; | 426 | u64 i_rsvd_2:1; |
427 | uint64_t i_maxrtry:10; | 427 | u64 i_maxrtry:10; |
428 | uint64_t i_d_avail_sel:2; | 428 | u64 i_d_avail_sel:2; |
429 | uint64_t i_rsvd_1:4; | 429 | u64 i_rsvd_1:4; |
430 | uint64_t i_maxbrst:10; | 430 | u64 i_maxbrst:10; |
431 | uint64_t i_rsvd:22; | 431 | u64 i_rsvd:22; |
432 | 432 | ||
433 | } ii_ilcsr_fld_s; | 433 | } ii_ilcsr_fld_s; |
434 | } ii_ilcsr_u_t; | 434 | } ii_ilcsr_u_t; |
@@ -441,11 +441,11 @@ typedef union ii_ilcsr_u { | |||
441 | ************************************************************************/ | 441 | ************************************************************************/ |
442 | 442 | ||
443 | typedef union ii_illr_u { | 443 | typedef union ii_illr_u { |
444 | uint64_t ii_illr_regval; | 444 | u64 ii_illr_regval; |
445 | struct { | 445 | struct { |
446 | uint64_t i_sn_cnt:16; | 446 | u64 i_sn_cnt:16; |
447 | uint64_t i_cb_cnt:16; | 447 | u64 i_cb_cnt:16; |
448 | uint64_t i_rsvd:32; | 448 | u64 i_rsvd:32; |
449 | } ii_illr_fld_s; | 449 | } ii_illr_fld_s; |
450 | } ii_illr_u_t; | 450 | } ii_illr_u_t; |
451 | 451 | ||
@@ -464,19 +464,19 @@ typedef union ii_illr_u { | |||
464 | ************************************************************************/ | 464 | ************************************************************************/ |
465 | 465 | ||
466 | typedef union ii_iidsr_u { | 466 | typedef union ii_iidsr_u { |
467 | uint64_t ii_iidsr_regval; | 467 | u64 ii_iidsr_regval; |
468 | struct { | 468 | struct { |
469 | uint64_t i_level:8; | 469 | u64 i_level:8; |
470 | uint64_t i_pi_id:1; | 470 | u64 i_pi_id:1; |
471 | uint64_t i_node:11; | 471 | u64 i_node:11; |
472 | uint64_t i_rsvd_3:4; | 472 | u64 i_rsvd_3:4; |
473 | uint64_t i_enable:1; | 473 | u64 i_enable:1; |
474 | uint64_t i_rsvd_2:3; | 474 | u64 i_rsvd_2:3; |
475 | uint64_t i_int_sent:2; | 475 | u64 i_int_sent:2; |
476 | uint64_t i_rsvd_1:2; | 476 | u64 i_rsvd_1:2; |
477 | uint64_t i_pi0_forward_int:1; | 477 | u64 i_pi0_forward_int:1; |
478 | uint64_t i_pi1_forward_int:1; | 478 | u64 i_pi1_forward_int:1; |
479 | uint64_t i_rsvd:30; | 479 | u64 i_rsvd:30; |
480 | } ii_iidsr_fld_s; | 480 | } ii_iidsr_fld_s; |
481 | } ii_iidsr_u_t; | 481 | } ii_iidsr_u_t; |
482 | 482 | ||
@@ -492,13 +492,13 @@ typedef union ii_iidsr_u { | |||
492 | ************************************************************************/ | 492 | ************************************************************************/ |
493 | 493 | ||
494 | typedef union ii_igfx0_u { | 494 | typedef union ii_igfx0_u { |
495 | uint64_t ii_igfx0_regval; | 495 | u64 ii_igfx0_regval; |
496 | struct { | 496 | struct { |
497 | uint64_t i_w_num:4; | 497 | u64 i_w_num:4; |
498 | uint64_t i_pi_id:1; | 498 | u64 i_pi_id:1; |
499 | uint64_t i_n_num:12; | 499 | u64 i_n_num:12; |
500 | uint64_t i_p_num:1; | 500 | u64 i_p_num:1; |
501 | uint64_t i_rsvd:46; | 501 | u64 i_rsvd:46; |
502 | } ii_igfx0_fld_s; | 502 | } ii_igfx0_fld_s; |
503 | } ii_igfx0_u_t; | 503 | } ii_igfx0_u_t; |
504 | 504 | ||
@@ -514,13 +514,13 @@ typedef union ii_igfx0_u { | |||
514 | ************************************************************************/ | 514 | ************************************************************************/ |
515 | 515 | ||
516 | typedef union ii_igfx1_u { | 516 | typedef union ii_igfx1_u { |
517 | uint64_t ii_igfx1_regval; | 517 | u64 ii_igfx1_regval; |
518 | struct { | 518 | struct { |
519 | uint64_t i_w_num:4; | 519 | u64 i_w_num:4; |
520 | uint64_t i_pi_id:1; | 520 | u64 i_pi_id:1; |
521 | uint64_t i_n_num:12; | 521 | u64 i_n_num:12; |
522 | uint64_t i_p_num:1; | 522 | u64 i_p_num:1; |
523 | uint64_t i_rsvd:46; | 523 | u64 i_rsvd:46; |
524 | } ii_igfx1_fld_s; | 524 | } ii_igfx1_fld_s; |
525 | } ii_igfx1_u_t; | 525 | } ii_igfx1_u_t; |
526 | 526 | ||
@@ -532,9 +532,9 @@ typedef union ii_igfx1_u { | |||
532 | ************************************************************************/ | 532 | ************************************************************************/ |
533 | 533 | ||
534 | typedef union ii_iscr0_u { | 534 | typedef union ii_iscr0_u { |
535 | uint64_t ii_iscr0_regval; | 535 | u64 ii_iscr0_regval; |
536 | struct { | 536 | struct { |
537 | uint64_t i_scratch:64; | 537 | u64 i_scratch:64; |
538 | } ii_iscr0_fld_s; | 538 | } ii_iscr0_fld_s; |
539 | } ii_iscr0_u_t; | 539 | } ii_iscr0_u_t; |
540 | 540 | ||
@@ -546,9 +546,9 @@ typedef union ii_iscr0_u { | |||
546 | ************************************************************************/ | 546 | ************************************************************************/ |
547 | 547 | ||
548 | typedef union ii_iscr1_u { | 548 | typedef union ii_iscr1_u { |
549 | uint64_t ii_iscr1_regval; | 549 | u64 ii_iscr1_regval; |
550 | struct { | 550 | struct { |
551 | uint64_t i_scratch:64; | 551 | u64 i_scratch:64; |
552 | } ii_iscr1_fld_s; | 552 | } ii_iscr1_fld_s; |
553 | } ii_iscr1_u_t; | 553 | } ii_iscr1_u_t; |
554 | 554 | ||
@@ -580,13 +580,13 @@ typedef union ii_iscr1_u { | |||
580 | ************************************************************************/ | 580 | ************************************************************************/ |
581 | 581 | ||
582 | typedef union ii_itte1_u { | 582 | typedef union ii_itte1_u { |
583 | uint64_t ii_itte1_regval; | 583 | u64 ii_itte1_regval; |
584 | struct { | 584 | struct { |
585 | uint64_t i_offset:5; | 585 | u64 i_offset:5; |
586 | uint64_t i_rsvd_1:3; | 586 | u64 i_rsvd_1:3; |
587 | uint64_t i_w_num:4; | 587 | u64 i_w_num:4; |
588 | uint64_t i_iosp:1; | 588 | u64 i_iosp:1; |
589 | uint64_t i_rsvd:51; | 589 | u64 i_rsvd:51; |
590 | } ii_itte1_fld_s; | 590 | } ii_itte1_fld_s; |
591 | } ii_itte1_u_t; | 591 | } ii_itte1_u_t; |
592 | 592 | ||
@@ -618,13 +618,13 @@ typedef union ii_itte1_u { | |||
618 | ************************************************************************/ | 618 | ************************************************************************/ |
619 | 619 | ||
620 | typedef union ii_itte2_u { | 620 | typedef union ii_itte2_u { |
621 | uint64_t ii_itte2_regval; | 621 | u64 ii_itte2_regval; |
622 | struct { | 622 | struct { |
623 | uint64_t i_offset:5; | 623 | u64 i_offset:5; |
624 | uint64_t i_rsvd_1:3; | 624 | u64 i_rsvd_1:3; |
625 | uint64_t i_w_num:4; | 625 | u64 i_w_num:4; |
626 | uint64_t i_iosp:1; | 626 | u64 i_iosp:1; |
627 | uint64_t i_rsvd:51; | 627 | u64 i_rsvd:51; |
628 | } ii_itte2_fld_s; | 628 | } ii_itte2_fld_s; |
629 | } ii_itte2_u_t; | 629 | } ii_itte2_u_t; |
630 | 630 | ||
@@ -656,13 +656,13 @@ typedef union ii_itte2_u { | |||
656 | ************************************************************************/ | 656 | ************************************************************************/ |
657 | 657 | ||
658 | typedef union ii_itte3_u { | 658 | typedef union ii_itte3_u { |
659 | uint64_t ii_itte3_regval; | 659 | u64 ii_itte3_regval; |
660 | struct { | 660 | struct { |
661 | uint64_t i_offset:5; | 661 | u64 i_offset:5; |
662 | uint64_t i_rsvd_1:3; | 662 | u64 i_rsvd_1:3; |
663 | uint64_t i_w_num:4; | 663 | u64 i_w_num:4; |
664 | uint64_t i_iosp:1; | 664 | u64 i_iosp:1; |
665 | uint64_t i_rsvd:51; | 665 | u64 i_rsvd:51; |
666 | } ii_itte3_fld_s; | 666 | } ii_itte3_fld_s; |
667 | } ii_itte3_u_t; | 667 | } ii_itte3_u_t; |
668 | 668 | ||
@@ -694,13 +694,13 @@ typedef union ii_itte3_u { | |||
694 | ************************************************************************/ | 694 | ************************************************************************/ |
695 | 695 | ||
696 | typedef union ii_itte4_u { | 696 | typedef union ii_itte4_u { |
697 | uint64_t ii_itte4_regval; | 697 | u64 ii_itte4_regval; |
698 | struct { | 698 | struct { |
699 | uint64_t i_offset:5; | 699 | u64 i_offset:5; |
700 | uint64_t i_rsvd_1:3; | 700 | u64 i_rsvd_1:3; |
701 | uint64_t i_w_num:4; | 701 | u64 i_w_num:4; |
702 | uint64_t i_iosp:1; | 702 | u64 i_iosp:1; |
703 | uint64_t i_rsvd:51; | 703 | u64 i_rsvd:51; |
704 | } ii_itte4_fld_s; | 704 | } ii_itte4_fld_s; |
705 | } ii_itte4_u_t; | 705 | } ii_itte4_u_t; |
706 | 706 | ||
@@ -732,13 +732,13 @@ typedef union ii_itte4_u { | |||
732 | ************************************************************************/ | 732 | ************************************************************************/ |
733 | 733 | ||
734 | typedef union ii_itte5_u { | 734 | typedef union ii_itte5_u { |
735 | uint64_t ii_itte5_regval; | 735 | u64 ii_itte5_regval; |
736 | struct { | 736 | struct { |
737 | uint64_t i_offset:5; | 737 | u64 i_offset:5; |
738 | uint64_t i_rsvd_1:3; | 738 | u64 i_rsvd_1:3; |
739 | uint64_t i_w_num:4; | 739 | u64 i_w_num:4; |
740 | uint64_t i_iosp:1; | 740 | u64 i_iosp:1; |
741 | uint64_t i_rsvd:51; | 741 | u64 i_rsvd:51; |
742 | } ii_itte5_fld_s; | 742 | } ii_itte5_fld_s; |
743 | } ii_itte5_u_t; | 743 | } ii_itte5_u_t; |
744 | 744 | ||
@@ -770,13 +770,13 @@ typedef union ii_itte5_u { | |||
770 | ************************************************************************/ | 770 | ************************************************************************/ |
771 | 771 | ||
772 | typedef union ii_itte6_u { | 772 | typedef union ii_itte6_u { |
773 | uint64_t ii_itte6_regval; | 773 | u64 ii_itte6_regval; |
774 | struct { | 774 | struct { |
775 | uint64_t i_offset:5; | 775 | u64 i_offset:5; |
776 | uint64_t i_rsvd_1:3; | 776 | u64 i_rsvd_1:3; |
777 | uint64_t i_w_num:4; | 777 | u64 i_w_num:4; |
778 | uint64_t i_iosp:1; | 778 | u64 i_iosp:1; |
779 | uint64_t i_rsvd:51; | 779 | u64 i_rsvd:51; |
780 | } ii_itte6_fld_s; | 780 | } ii_itte6_fld_s; |
781 | } ii_itte6_u_t; | 781 | } ii_itte6_u_t; |
782 | 782 | ||
@@ -808,13 +808,13 @@ typedef union ii_itte6_u { | |||
808 | ************************************************************************/ | 808 | ************************************************************************/ |
809 | 809 | ||
810 | typedef union ii_itte7_u { | 810 | typedef union ii_itte7_u { |
811 | uint64_t ii_itte7_regval; | 811 | u64 ii_itte7_regval; |
812 | struct { | 812 | struct { |
813 | uint64_t i_offset:5; | 813 | u64 i_offset:5; |
814 | uint64_t i_rsvd_1:3; | 814 | u64 i_rsvd_1:3; |
815 | uint64_t i_w_num:4; | 815 | u64 i_w_num:4; |
816 | uint64_t i_iosp:1; | 816 | u64 i_iosp:1; |
817 | uint64_t i_rsvd:51; | 817 | u64 i_rsvd:51; |
818 | } ii_itte7_fld_s; | 818 | } ii_itte7_fld_s; |
819 | } ii_itte7_u_t; | 819 | } ii_itte7_u_t; |
820 | 820 | ||
@@ -843,22 +843,22 @@ typedef union ii_itte7_u { | |||
843 | ************************************************************************/ | 843 | ************************************************************************/ |
844 | 844 | ||
845 | typedef union ii_iprb0_u { | 845 | typedef union ii_iprb0_u { |
846 | uint64_t ii_iprb0_regval; | 846 | u64 ii_iprb0_regval; |
847 | struct { | 847 | struct { |
848 | uint64_t i_c:8; | 848 | u64 i_c:8; |
849 | uint64_t i_na:14; | 849 | u64 i_na:14; |
850 | uint64_t i_rsvd_2:2; | 850 | u64 i_rsvd_2:2; |
851 | uint64_t i_nb:14; | 851 | u64 i_nb:14; |
852 | uint64_t i_rsvd_1:2; | 852 | u64 i_rsvd_1:2; |
853 | uint64_t i_m:2; | 853 | u64 i_m:2; |
854 | uint64_t i_f:1; | 854 | u64 i_f:1; |
855 | uint64_t i_of_cnt:5; | 855 | u64 i_of_cnt:5; |
856 | uint64_t i_error:1; | 856 | u64 i_error:1; |
857 | uint64_t i_rd_to:1; | 857 | u64 i_rd_to:1; |
858 | uint64_t i_spur_wr:1; | 858 | u64 i_spur_wr:1; |
859 | uint64_t i_spur_rd:1; | 859 | u64 i_spur_rd:1; |
860 | uint64_t i_rsvd:11; | 860 | u64 i_rsvd:11; |
861 | uint64_t i_mult_err:1; | 861 | u64 i_mult_err:1; |
862 | } ii_iprb0_fld_s; | 862 | } ii_iprb0_fld_s; |
863 | } ii_iprb0_u_t; | 863 | } ii_iprb0_u_t; |
864 | 864 | ||
@@ -887,22 +887,22 @@ typedef union ii_iprb0_u { | |||
887 | ************************************************************************/ | 887 | ************************************************************************/ |
888 | 888 | ||
889 | typedef union ii_iprb8_u { | 889 | typedef union ii_iprb8_u { |
890 | uint64_t ii_iprb8_regval; | 890 | u64 ii_iprb8_regval; |
891 | struct { | 891 | struct { |
892 | uint64_t i_c:8; | 892 | u64 i_c:8; |
893 | uint64_t i_na:14; | 893 | u64 i_na:14; |
894 | uint64_t i_rsvd_2:2; | 894 | u64 i_rsvd_2:2; |
895 | uint64_t i_nb:14; | 895 | u64 i_nb:14; |
896 | uint64_t i_rsvd_1:2; | 896 | u64 i_rsvd_1:2; |
897 | uint64_t i_m:2; | 897 | u64 i_m:2; |
898 | uint64_t i_f:1; | 898 | u64 i_f:1; |
899 | uint64_t i_of_cnt:5; | 899 | u64 i_of_cnt:5; |
900 | uint64_t i_error:1; | 900 | u64 i_error:1; |
901 | uint64_t i_rd_to:1; | 901 | u64 i_rd_to:1; |
902 | uint64_t i_spur_wr:1; | 902 | u64 i_spur_wr:1; |
903 | uint64_t i_spur_rd:1; | 903 | u64 i_spur_rd:1; |
904 | uint64_t i_rsvd:11; | 904 | u64 i_rsvd:11; |
905 | uint64_t i_mult_err:1; | 905 | u64 i_mult_err:1; |
906 | } ii_iprb8_fld_s; | 906 | } ii_iprb8_fld_s; |
907 | } ii_iprb8_u_t; | 907 | } ii_iprb8_u_t; |
908 | 908 | ||
@@ -931,22 +931,22 @@ typedef union ii_iprb8_u { | |||
931 | ************************************************************************/ | 931 | ************************************************************************/ |
932 | 932 | ||
933 | typedef union ii_iprb9_u { | 933 | typedef union ii_iprb9_u { |
934 | uint64_t ii_iprb9_regval; | 934 | u64 ii_iprb9_regval; |
935 | struct { | 935 | struct { |
936 | uint64_t i_c:8; | 936 | u64 i_c:8; |
937 | uint64_t i_na:14; | 937 | u64 i_na:14; |
938 | uint64_t i_rsvd_2:2; | 938 | u64 i_rsvd_2:2; |
939 | uint64_t i_nb:14; | 939 | u64 i_nb:14; |
940 | uint64_t i_rsvd_1:2; | 940 | u64 i_rsvd_1:2; |
941 | uint64_t i_m:2; | 941 | u64 i_m:2; |
942 | uint64_t i_f:1; | 942 | u64 i_f:1; |
943 | uint64_t i_of_cnt:5; | 943 | u64 i_of_cnt:5; |
944 | uint64_t i_error:1; | 944 | u64 i_error:1; |
945 | uint64_t i_rd_to:1; | 945 | u64 i_rd_to:1; |
946 | uint64_t i_spur_wr:1; | 946 | u64 i_spur_wr:1; |
947 | uint64_t i_spur_rd:1; | 947 | u64 i_spur_rd:1; |
948 | uint64_t i_rsvd:11; | 948 | u64 i_rsvd:11; |
949 | uint64_t i_mult_err:1; | 949 | u64 i_mult_err:1; |
950 | } ii_iprb9_fld_s; | 950 | } ii_iprb9_fld_s; |
951 | } ii_iprb9_u_t; | 951 | } ii_iprb9_u_t; |
952 | 952 | ||
@@ -975,22 +975,22 @@ typedef union ii_iprb9_u { | |||
975 | ************************************************************************/ | 975 | ************************************************************************/ |
976 | 976 | ||
977 | typedef union ii_iprba_u { | 977 | typedef union ii_iprba_u { |
978 | uint64_t ii_iprba_regval; | 978 | u64 ii_iprba_regval; |
979 | struct { | 979 | struct { |
980 | uint64_t i_c:8; | 980 | u64 i_c:8; |
981 | uint64_t i_na:14; | 981 | u64 i_na:14; |
982 | uint64_t i_rsvd_2:2; | 982 | u64 i_rsvd_2:2; |
983 | uint64_t i_nb:14; | 983 | u64 i_nb:14; |
984 | uint64_t i_rsvd_1:2; | 984 | u64 i_rsvd_1:2; |
985 | uint64_t i_m:2; | 985 | u64 i_m:2; |
986 | uint64_t i_f:1; | 986 | u64 i_f:1; |
987 | uint64_t i_of_cnt:5; | 987 | u64 i_of_cnt:5; |
988 | uint64_t i_error:1; | 988 | u64 i_error:1; |
989 | uint64_t i_rd_to:1; | 989 | u64 i_rd_to:1; |
990 | uint64_t i_spur_wr:1; | 990 | u64 i_spur_wr:1; |
991 | uint64_t i_spur_rd:1; | 991 | u64 i_spur_rd:1; |
992 | uint64_t i_rsvd:11; | 992 | u64 i_rsvd:11; |
993 | uint64_t i_mult_err:1; | 993 | u64 i_mult_err:1; |
994 | } ii_iprba_fld_s; | 994 | } ii_iprba_fld_s; |
995 | } ii_iprba_u_t; | 995 | } ii_iprba_u_t; |
996 | 996 | ||
@@ -1019,22 +1019,22 @@ typedef union ii_iprba_u { | |||
1019 | ************************************************************************/ | 1019 | ************************************************************************/ |
1020 | 1020 | ||
1021 | typedef union ii_iprbb_u { | 1021 | typedef union ii_iprbb_u { |
1022 | uint64_t ii_iprbb_regval; | 1022 | u64 ii_iprbb_regval; |
1023 | struct { | 1023 | struct { |
1024 | uint64_t i_c:8; | 1024 | u64 i_c:8; |
1025 | uint64_t i_na:14; | 1025 | u64 i_na:14; |
1026 | uint64_t i_rsvd_2:2; | 1026 | u64 i_rsvd_2:2; |
1027 | uint64_t i_nb:14; | 1027 | u64 i_nb:14; |
1028 | uint64_t i_rsvd_1:2; | 1028 | u64 i_rsvd_1:2; |
1029 | uint64_t i_m:2; | 1029 | u64 i_m:2; |
1030 | uint64_t i_f:1; | 1030 | u64 i_f:1; |
1031 | uint64_t i_of_cnt:5; | 1031 | u64 i_of_cnt:5; |
1032 | uint64_t i_error:1; | 1032 | u64 i_error:1; |
1033 | uint64_t i_rd_to:1; | 1033 | u64 i_rd_to:1; |
1034 | uint64_t i_spur_wr:1; | 1034 | u64 i_spur_wr:1; |
1035 | uint64_t i_spur_rd:1; | 1035 | u64 i_spur_rd:1; |
1036 | uint64_t i_rsvd:11; | 1036 | u64 i_rsvd:11; |
1037 | uint64_t i_mult_err:1; | 1037 | u64 i_mult_err:1; |
1038 | } ii_iprbb_fld_s; | 1038 | } ii_iprbb_fld_s; |
1039 | } ii_iprbb_u_t; | 1039 | } ii_iprbb_u_t; |
1040 | 1040 | ||
@@ -1063,22 +1063,22 @@ typedef union ii_iprbb_u { | |||
1063 | ************************************************************************/ | 1063 | ************************************************************************/ |
1064 | 1064 | ||
1065 | typedef union ii_iprbc_u { | 1065 | typedef union ii_iprbc_u { |
1066 | uint64_t ii_iprbc_regval; | 1066 | u64 ii_iprbc_regval; |
1067 | struct { | 1067 | struct { |
1068 | uint64_t i_c:8; | 1068 | u64 i_c:8; |
1069 | uint64_t i_na:14; | 1069 | u64 i_na:14; |
1070 | uint64_t i_rsvd_2:2; | 1070 | u64 i_rsvd_2:2; |
1071 | uint64_t i_nb:14; | 1071 | u64 i_nb:14; |
1072 | uint64_t i_rsvd_1:2; | 1072 | u64 i_rsvd_1:2; |
1073 | uint64_t i_m:2; | 1073 | u64 i_m:2; |
1074 | uint64_t i_f:1; | 1074 | u64 i_f:1; |
1075 | uint64_t i_of_cnt:5; | 1075 | u64 i_of_cnt:5; |
1076 | uint64_t i_error:1; | 1076 | u64 i_error:1; |
1077 | uint64_t i_rd_to:1; | 1077 | u64 i_rd_to:1; |
1078 | uint64_t i_spur_wr:1; | 1078 | u64 i_spur_wr:1; |
1079 | uint64_t i_spur_rd:1; | 1079 | u64 i_spur_rd:1; |
1080 | uint64_t i_rsvd:11; | 1080 | u64 i_rsvd:11; |
1081 | uint64_t i_mult_err:1; | 1081 | u64 i_mult_err:1; |
1082 | } ii_iprbc_fld_s; | 1082 | } ii_iprbc_fld_s; |
1083 | } ii_iprbc_u_t; | 1083 | } ii_iprbc_u_t; |
1084 | 1084 | ||
@@ -1107,22 +1107,22 @@ typedef union ii_iprbc_u { | |||
1107 | ************************************************************************/ | 1107 | ************************************************************************/ |
1108 | 1108 | ||
1109 | typedef union ii_iprbd_u { | 1109 | typedef union ii_iprbd_u { |
1110 | uint64_t ii_iprbd_regval; | 1110 | u64 ii_iprbd_regval; |
1111 | struct { | 1111 | struct { |
1112 | uint64_t i_c:8; | 1112 | u64 i_c:8; |
1113 | uint64_t i_na:14; | 1113 | u64 i_na:14; |
1114 | uint64_t i_rsvd_2:2; | 1114 | u64 i_rsvd_2:2; |
1115 | uint64_t i_nb:14; | 1115 | u64 i_nb:14; |
1116 | uint64_t i_rsvd_1:2; | 1116 | u64 i_rsvd_1:2; |
1117 | uint64_t i_m:2; | 1117 | u64 i_m:2; |
1118 | uint64_t i_f:1; | 1118 | u64 i_f:1; |
1119 | uint64_t i_of_cnt:5; | 1119 | u64 i_of_cnt:5; |
1120 | uint64_t i_error:1; | 1120 | u64 i_error:1; |
1121 | uint64_t i_rd_to:1; | 1121 | u64 i_rd_to:1; |
1122 | uint64_t i_spur_wr:1; | 1122 | u64 i_spur_wr:1; |
1123 | uint64_t i_spur_rd:1; | 1123 | u64 i_spur_rd:1; |
1124 | uint64_t i_rsvd:11; | 1124 | u64 i_rsvd:11; |
1125 | uint64_t i_mult_err:1; | 1125 | u64 i_mult_err:1; |
1126 | } ii_iprbd_fld_s; | 1126 | } ii_iprbd_fld_s; |
1127 | } ii_iprbd_u_t; | 1127 | } ii_iprbd_u_t; |
1128 | 1128 | ||
@@ -1151,22 +1151,22 @@ typedef union ii_iprbd_u { | |||
1151 | ************************************************************************/ | 1151 | ************************************************************************/ |
1152 | 1152 | ||
1153 | typedef union ii_iprbe_u { | 1153 | typedef union ii_iprbe_u { |
1154 | uint64_t ii_iprbe_regval; | 1154 | u64 ii_iprbe_regval; |
1155 | struct { | 1155 | struct { |
1156 | uint64_t i_c:8; | 1156 | u64 i_c:8; |
1157 | uint64_t i_na:14; | 1157 | u64 i_na:14; |
1158 | uint64_t i_rsvd_2:2; | 1158 | u64 i_rsvd_2:2; |
1159 | uint64_t i_nb:14; | 1159 | u64 i_nb:14; |
1160 | uint64_t i_rsvd_1:2; | 1160 | u64 i_rsvd_1:2; |
1161 | uint64_t i_m:2; | 1161 | u64 i_m:2; |
1162 | uint64_t i_f:1; | 1162 | u64 i_f:1; |
1163 | uint64_t i_of_cnt:5; | 1163 | u64 i_of_cnt:5; |
1164 | uint64_t i_error:1; | 1164 | u64 i_error:1; |
1165 | uint64_t i_rd_to:1; | 1165 | u64 i_rd_to:1; |
1166 | uint64_t i_spur_wr:1; | 1166 | u64 i_spur_wr:1; |
1167 | uint64_t i_spur_rd:1; | 1167 | u64 i_spur_rd:1; |
1168 | uint64_t i_rsvd:11; | 1168 | u64 i_rsvd:11; |
1169 | uint64_t i_mult_err:1; | 1169 | u64 i_mult_err:1; |
1170 | } ii_iprbe_fld_s; | 1170 | } ii_iprbe_fld_s; |
1171 | } ii_iprbe_u_t; | 1171 | } ii_iprbe_u_t; |
1172 | 1172 | ||
@@ -1195,22 +1195,22 @@ typedef union ii_iprbe_u { | |||
1195 | ************************************************************************/ | 1195 | ************************************************************************/ |
1196 | 1196 | ||
1197 | typedef union ii_iprbf_u { | 1197 | typedef union ii_iprbf_u { |
1198 | uint64_t ii_iprbf_regval; | 1198 | u64 ii_iprbf_regval; |
1199 | struct { | 1199 | struct { |
1200 | uint64_t i_c:8; | 1200 | u64 i_c:8; |
1201 | uint64_t i_na:14; | 1201 | u64 i_na:14; |
1202 | uint64_t i_rsvd_2:2; | 1202 | u64 i_rsvd_2:2; |
1203 | uint64_t i_nb:14; | 1203 | u64 i_nb:14; |
1204 | uint64_t i_rsvd_1:2; | 1204 | u64 i_rsvd_1:2; |
1205 | uint64_t i_m:2; | 1205 | u64 i_m:2; |
1206 | uint64_t i_f:1; | 1206 | u64 i_f:1; |
1207 | uint64_t i_of_cnt:5; | 1207 | u64 i_of_cnt:5; |
1208 | uint64_t i_error:1; | 1208 | u64 i_error:1; |
1209 | uint64_t i_rd_to:1; | 1209 | u64 i_rd_to:1; |
1210 | uint64_t i_spur_wr:1; | 1210 | u64 i_spur_wr:1; |
1211 | uint64_t i_spur_rd:1; | 1211 | u64 i_spur_rd:1; |
1212 | uint64_t i_rsvd:11; | 1212 | u64 i_rsvd:11; |
1213 | uint64_t i_mult_err:1; | 1213 | u64 i_mult_err:1; |
1214 | } ii_iprbe_fld_s; | 1214 | } ii_iprbe_fld_s; |
1215 | } ii_iprbf_u_t; | 1215 | } ii_iprbf_u_t; |
1216 | 1216 | ||
@@ -1232,10 +1232,10 @@ typedef union ii_iprbf_u { | |||
1232 | ************************************************************************/ | 1232 | ************************************************************************/ |
1233 | 1233 | ||
1234 | typedef union ii_ixcc_u { | 1234 | typedef union ii_ixcc_u { |
1235 | uint64_t ii_ixcc_regval; | 1235 | u64 ii_ixcc_regval; |
1236 | struct { | 1236 | struct { |
1237 | uint64_t i_time_out:26; | 1237 | u64 i_time_out:26; |
1238 | uint64_t i_rsvd:38; | 1238 | u64 i_rsvd:38; |
1239 | } ii_ixcc_fld_s; | 1239 | } ii_ixcc_fld_s; |
1240 | } ii_ixcc_u_t; | 1240 | } ii_ixcc_u_t; |
1241 | 1241 | ||
@@ -1256,16 +1256,16 @@ typedef union ii_ixcc_u { | |||
1256 | ************************************************************************/ | 1256 | ************************************************************************/ |
1257 | 1257 | ||
1258 | typedef union ii_imem_u { | 1258 | typedef union ii_imem_u { |
1259 | uint64_t ii_imem_regval; | 1259 | u64 ii_imem_regval; |
1260 | struct { | 1260 | struct { |
1261 | uint64_t i_w0_esd:1; | 1261 | u64 i_w0_esd:1; |
1262 | uint64_t i_rsvd_3:3; | 1262 | u64 i_rsvd_3:3; |
1263 | uint64_t i_b0_esd:1; | 1263 | u64 i_b0_esd:1; |
1264 | uint64_t i_rsvd_2:3; | 1264 | u64 i_rsvd_2:3; |
1265 | uint64_t i_b1_esd:1; | 1265 | u64 i_b1_esd:1; |
1266 | uint64_t i_rsvd_1:3; | 1266 | u64 i_rsvd_1:3; |
1267 | uint64_t i_clr_precise:1; | 1267 | u64 i_clr_precise:1; |
1268 | uint64_t i_rsvd:51; | 1268 | u64 i_rsvd:51; |
1269 | } ii_imem_fld_s; | 1269 | } ii_imem_fld_s; |
1270 | } ii_imem_u_t; | 1270 | } ii_imem_u_t; |
1271 | 1271 | ||
@@ -1294,13 +1294,13 @@ typedef union ii_imem_u { | |||
1294 | ************************************************************************/ | 1294 | ************************************************************************/ |
1295 | 1295 | ||
1296 | typedef union ii_ixtt_u { | 1296 | typedef union ii_ixtt_u { |
1297 | uint64_t ii_ixtt_regval; | 1297 | u64 ii_ixtt_regval; |
1298 | struct { | 1298 | struct { |
1299 | uint64_t i_tail_to:26; | 1299 | u64 i_tail_to:26; |
1300 | uint64_t i_rsvd_1:6; | 1300 | u64 i_rsvd_1:6; |
1301 | uint64_t i_rrsp_ps:23; | 1301 | u64 i_rrsp_ps:23; |
1302 | uint64_t i_rrsp_to:5; | 1302 | u64 i_rrsp_to:5; |
1303 | uint64_t i_rsvd:4; | 1303 | u64 i_rsvd:4; |
1304 | } ii_ixtt_fld_s; | 1304 | } ii_ixtt_fld_s; |
1305 | } ii_ixtt_u_t; | 1305 | } ii_ixtt_u_t; |
1306 | 1306 | ||
@@ -1316,37 +1316,37 @@ typedef union ii_ixtt_u { | |||
1316 | ************************************************************************/ | 1316 | ************************************************************************/ |
1317 | 1317 | ||
1318 | typedef union ii_ieclr_u { | 1318 | typedef union ii_ieclr_u { |
1319 | uint64_t ii_ieclr_regval; | 1319 | u64 ii_ieclr_regval; |
1320 | struct { | 1320 | struct { |
1321 | uint64_t i_e_prb_0:1; | 1321 | u64 i_e_prb_0:1; |
1322 | uint64_t i_rsvd:7; | 1322 | u64 i_rsvd:7; |
1323 | uint64_t i_e_prb_8:1; | 1323 | u64 i_e_prb_8:1; |
1324 | uint64_t i_e_prb_9:1; | 1324 | u64 i_e_prb_9:1; |
1325 | uint64_t i_e_prb_a:1; | 1325 | u64 i_e_prb_a:1; |
1326 | uint64_t i_e_prb_b:1; | 1326 | u64 i_e_prb_b:1; |
1327 | uint64_t i_e_prb_c:1; | 1327 | u64 i_e_prb_c:1; |
1328 | uint64_t i_e_prb_d:1; | 1328 | u64 i_e_prb_d:1; |
1329 | uint64_t i_e_prb_e:1; | 1329 | u64 i_e_prb_e:1; |
1330 | uint64_t i_e_prb_f:1; | 1330 | u64 i_e_prb_f:1; |
1331 | uint64_t i_e_crazy:1; | 1331 | u64 i_e_crazy:1; |
1332 | uint64_t i_e_bte_0:1; | 1332 | u64 i_e_bte_0:1; |
1333 | uint64_t i_e_bte_1:1; | 1333 | u64 i_e_bte_1:1; |
1334 | uint64_t i_reserved_1:10; | 1334 | u64 i_reserved_1:10; |
1335 | uint64_t i_spur_rd_hdr:1; | 1335 | u64 i_spur_rd_hdr:1; |
1336 | uint64_t i_cam_intr_to:1; | 1336 | u64 i_cam_intr_to:1; |
1337 | uint64_t i_cam_overflow:1; | 1337 | u64 i_cam_overflow:1; |
1338 | uint64_t i_cam_read_miss:1; | 1338 | u64 i_cam_read_miss:1; |
1339 | uint64_t i_ioq_rep_underflow:1; | 1339 | u64 i_ioq_rep_underflow:1; |
1340 | uint64_t i_ioq_req_underflow:1; | 1340 | u64 i_ioq_req_underflow:1; |
1341 | uint64_t i_ioq_rep_overflow:1; | 1341 | u64 i_ioq_rep_overflow:1; |
1342 | uint64_t i_ioq_req_overflow:1; | 1342 | u64 i_ioq_req_overflow:1; |
1343 | uint64_t i_iiq_rep_overflow:1; | 1343 | u64 i_iiq_rep_overflow:1; |
1344 | uint64_t i_iiq_req_overflow:1; | 1344 | u64 i_iiq_req_overflow:1; |
1345 | uint64_t i_ii_xn_rep_cred_overflow:1; | 1345 | u64 i_ii_xn_rep_cred_overflow:1; |
1346 | uint64_t i_ii_xn_req_cred_overflow:1; | 1346 | u64 i_ii_xn_req_cred_overflow:1; |
1347 | uint64_t i_ii_xn_invalid_cmd:1; | 1347 | u64 i_ii_xn_invalid_cmd:1; |
1348 | uint64_t i_xn_ii_invalid_cmd:1; | 1348 | u64 i_xn_ii_invalid_cmd:1; |
1349 | uint64_t i_reserved_2:21; | 1349 | u64 i_reserved_2:21; |
1350 | } ii_ieclr_fld_s; | 1350 | } ii_ieclr_fld_s; |
1351 | } ii_ieclr_u_t; | 1351 | } ii_ieclr_u_t; |
1352 | 1352 | ||
@@ -1360,12 +1360,12 @@ typedef union ii_ieclr_u { | |||
1360 | ************************************************************************/ | 1360 | ************************************************************************/ |
1361 | 1361 | ||
1362 | typedef union ii_ibcr_u { | 1362 | typedef union ii_ibcr_u { |
1363 | uint64_t ii_ibcr_regval; | 1363 | u64 ii_ibcr_regval; |
1364 | struct { | 1364 | struct { |
1365 | uint64_t i_count:4; | 1365 | u64 i_count:4; |
1366 | uint64_t i_rsvd_1:4; | 1366 | u64 i_rsvd_1:4; |
1367 | uint64_t i_soft_reset:1; | 1367 | u64 i_soft_reset:1; |
1368 | uint64_t i_rsvd:55; | 1368 | u64 i_rsvd:55; |
1369 | } ii_ibcr_fld_s; | 1369 | } ii_ibcr_fld_s; |
1370 | } ii_ibcr_u_t; | 1370 | } ii_ibcr_u_t; |
1371 | 1371 | ||
@@ -1399,22 +1399,22 @@ typedef union ii_ibcr_u { | |||
1399 | ************************************************************************/ | 1399 | ************************************************************************/ |
1400 | 1400 | ||
1401 | typedef union ii_ixsm_u { | 1401 | typedef union ii_ixsm_u { |
1402 | uint64_t ii_ixsm_regval; | 1402 | u64 ii_ixsm_regval; |
1403 | struct { | 1403 | struct { |
1404 | uint64_t i_byte_en:32; | 1404 | u64 i_byte_en:32; |
1405 | uint64_t i_reserved:1; | 1405 | u64 i_reserved:1; |
1406 | uint64_t i_tag:3; | 1406 | u64 i_tag:3; |
1407 | uint64_t i_alt_pactyp:4; | 1407 | u64 i_alt_pactyp:4; |
1408 | uint64_t i_bo:1; | 1408 | u64 i_bo:1; |
1409 | uint64_t i_error:1; | 1409 | u64 i_error:1; |
1410 | uint64_t i_vbpm:1; | 1410 | u64 i_vbpm:1; |
1411 | uint64_t i_gbr:1; | 1411 | u64 i_gbr:1; |
1412 | uint64_t i_ds:2; | 1412 | u64 i_ds:2; |
1413 | uint64_t i_ct:1; | 1413 | u64 i_ct:1; |
1414 | uint64_t i_tnum:5; | 1414 | u64 i_tnum:5; |
1415 | uint64_t i_pactyp:4; | 1415 | u64 i_pactyp:4; |
1416 | uint64_t i_sidn:4; | 1416 | u64 i_sidn:4; |
1417 | uint64_t i_didn:4; | 1417 | u64 i_didn:4; |
1418 | } ii_ixsm_fld_s; | 1418 | } ii_ixsm_fld_s; |
1419 | } ii_ixsm_u_t; | 1419 | } ii_ixsm_u_t; |
1420 | 1420 | ||
@@ -1426,11 +1426,11 @@ typedef union ii_ixsm_u { | |||
1426 | ************************************************************************/ | 1426 | ************************************************************************/ |
1427 | 1427 | ||
1428 | typedef union ii_ixss_u { | 1428 | typedef union ii_ixss_u { |
1429 | uint64_t ii_ixss_regval; | 1429 | u64 ii_ixss_regval; |
1430 | struct { | 1430 | struct { |
1431 | uint64_t i_sideband:8; | 1431 | u64 i_sideband:8; |
1432 | uint64_t i_rsvd:55; | 1432 | u64 i_rsvd:55; |
1433 | uint64_t i_valid:1; | 1433 | u64 i_valid:1; |
1434 | } ii_ixss_fld_s; | 1434 | } ii_ixss_fld_s; |
1435 | } ii_ixss_u_t; | 1435 | } ii_ixss_u_t; |
1436 | 1436 | ||
@@ -1447,17 +1447,17 @@ typedef union ii_ixss_u { | |||
1447 | ************************************************************************/ | 1447 | ************************************************************************/ |
1448 | 1448 | ||
1449 | typedef union ii_ilct_u { | 1449 | typedef union ii_ilct_u { |
1450 | uint64_t ii_ilct_regval; | 1450 | u64 ii_ilct_regval; |
1451 | struct { | 1451 | struct { |
1452 | uint64_t i_test_seed:20; | 1452 | u64 i_test_seed:20; |
1453 | uint64_t i_test_mask:8; | 1453 | u64 i_test_mask:8; |
1454 | uint64_t i_test_data:20; | 1454 | u64 i_test_data:20; |
1455 | uint64_t i_test_valid:1; | 1455 | u64 i_test_valid:1; |
1456 | uint64_t i_test_cberr:1; | 1456 | u64 i_test_cberr:1; |
1457 | uint64_t i_test_flit:3; | 1457 | u64 i_test_flit:3; |
1458 | uint64_t i_test_clear:1; | 1458 | u64 i_test_clear:1; |
1459 | uint64_t i_test_err_capture:1; | 1459 | u64 i_test_err_capture:1; |
1460 | uint64_t i_rsvd:9; | 1460 | u64 i_rsvd:9; |
1461 | } ii_ilct_fld_s; | 1461 | } ii_ilct_fld_s; |
1462 | } ii_ilct_u_t; | 1462 | } ii_ilct_u_t; |
1463 | 1463 | ||
@@ -1482,20 +1482,20 @@ typedef union ii_ilct_u { | |||
1482 | ************************************************************************/ | 1482 | ************************************************************************/ |
1483 | 1483 | ||
1484 | typedef union ii_iieph1_u { | 1484 | typedef union ii_iieph1_u { |
1485 | uint64_t ii_iieph1_regval; | 1485 | u64 ii_iieph1_regval; |
1486 | struct { | 1486 | struct { |
1487 | uint64_t i_command:7; | 1487 | u64 i_command:7; |
1488 | uint64_t i_rsvd_5:1; | 1488 | u64 i_rsvd_5:1; |
1489 | uint64_t i_suppl:14; | 1489 | u64 i_suppl:14; |
1490 | uint64_t i_rsvd_4:1; | 1490 | u64 i_rsvd_4:1; |
1491 | uint64_t i_source:14; | 1491 | u64 i_source:14; |
1492 | uint64_t i_rsvd_3:1; | 1492 | u64 i_rsvd_3:1; |
1493 | uint64_t i_err_type:4; | 1493 | u64 i_err_type:4; |
1494 | uint64_t i_rsvd_2:4; | 1494 | u64 i_rsvd_2:4; |
1495 | uint64_t i_overrun:1; | 1495 | u64 i_overrun:1; |
1496 | uint64_t i_rsvd_1:3; | 1496 | u64 i_rsvd_1:3; |
1497 | uint64_t i_valid:1; | 1497 | u64 i_valid:1; |
1498 | uint64_t i_rsvd:13; | 1498 | u64 i_rsvd:13; |
1499 | } ii_iieph1_fld_s; | 1499 | } ii_iieph1_fld_s; |
1500 | } ii_iieph1_u_t; | 1500 | } ii_iieph1_u_t; |
1501 | 1501 | ||
@@ -1511,13 +1511,13 @@ typedef union ii_iieph1_u { | |||
1511 | ************************************************************************/ | 1511 | ************************************************************************/ |
1512 | 1512 | ||
1513 | typedef union ii_iieph2_u { | 1513 | typedef union ii_iieph2_u { |
1514 | uint64_t ii_iieph2_regval; | 1514 | u64 ii_iieph2_regval; |
1515 | struct { | 1515 | struct { |
1516 | uint64_t i_rsvd_0:3; | 1516 | u64 i_rsvd_0:3; |
1517 | uint64_t i_address:47; | 1517 | u64 i_address:47; |
1518 | uint64_t i_rsvd_1:10; | 1518 | u64 i_rsvd_1:10; |
1519 | uint64_t i_tail:1; | 1519 | u64 i_tail:1; |
1520 | uint64_t i_rsvd:3; | 1520 | u64 i_rsvd:3; |
1521 | } ii_iieph2_fld_s; | 1521 | } ii_iieph2_fld_s; |
1522 | } ii_iieph2_u_t; | 1522 | } ii_iieph2_u_t; |
1523 | 1523 | ||
@@ -1532,9 +1532,9 @@ typedef union ii_iieph2_u { | |||
1532 | ************************************************************************/ | 1532 | ************************************************************************/ |
1533 | 1533 | ||
1534 | typedef union ii_islapr_u { | 1534 | typedef union ii_islapr_u { |
1535 | uint64_t ii_islapr_regval; | 1535 | u64 ii_islapr_regval; |
1536 | struct { | 1536 | struct { |
1537 | uint64_t i_region:64; | 1537 | u64 i_region:64; |
1538 | } ii_islapr_fld_s; | 1538 | } ii_islapr_fld_s; |
1539 | } ii_islapr_u_t; | 1539 | } ii_islapr_u_t; |
1540 | 1540 | ||
@@ -1547,10 +1547,10 @@ typedef union ii_islapr_u { | |||
1547 | ************************************************************************/ | 1547 | ************************************************************************/ |
1548 | 1548 | ||
1549 | typedef union ii_islapo_u { | 1549 | typedef union ii_islapo_u { |
1550 | uint64_t ii_islapo_regval; | 1550 | u64 ii_islapo_regval; |
1551 | struct { | 1551 | struct { |
1552 | uint64_t i_io_sbx_ovrride:56; | 1552 | u64 i_io_sbx_ovrride:56; |
1553 | uint64_t i_rsvd:8; | 1553 | u64 i_rsvd:8; |
1554 | } ii_islapo_fld_s; | 1554 | } ii_islapo_fld_s; |
1555 | } ii_islapo_u_t; | 1555 | } ii_islapo_u_t; |
1556 | 1556 | ||
@@ -1563,14 +1563,14 @@ typedef union ii_islapo_u { | |||
1563 | ************************************************************************/ | 1563 | ************************************************************************/ |
1564 | 1564 | ||
1565 | typedef union ii_iwi_u { | 1565 | typedef union ii_iwi_u { |
1566 | uint64_t ii_iwi_regval; | 1566 | u64 ii_iwi_regval; |
1567 | struct { | 1567 | struct { |
1568 | uint64_t i_prescale:24; | 1568 | u64 i_prescale:24; |
1569 | uint64_t i_rsvd:8; | 1569 | u64 i_rsvd:8; |
1570 | uint64_t i_timeout:8; | 1570 | u64 i_timeout:8; |
1571 | uint64_t i_rsvd1:8; | 1571 | u64 i_rsvd1:8; |
1572 | uint64_t i_intrpt_retry_period:8; | 1572 | u64 i_intrpt_retry_period:8; |
1573 | uint64_t i_rsvd2:8; | 1573 | u64 i_rsvd2:8; |
1574 | } ii_iwi_fld_s; | 1574 | } ii_iwi_fld_s; |
1575 | } ii_iwi_u_t; | 1575 | } ii_iwi_u_t; |
1576 | 1576 | ||
@@ -1582,26 +1582,26 @@ typedef union ii_iwi_u { | |||
1582 | ************************************************************************/ | 1582 | ************************************************************************/ |
1583 | 1583 | ||
1584 | typedef union ii_iwel_u { | 1584 | typedef union ii_iwel_u { |
1585 | uint64_t ii_iwel_regval; | 1585 | u64 ii_iwel_regval; |
1586 | struct { | 1586 | struct { |
1587 | uint64_t i_intr_timed_out:1; | 1587 | u64 i_intr_timed_out:1; |
1588 | uint64_t i_rsvd:7; | 1588 | u64 i_rsvd:7; |
1589 | uint64_t i_cam_overflow:1; | 1589 | u64 i_cam_overflow:1; |
1590 | uint64_t i_cam_read_miss:1; | 1590 | u64 i_cam_read_miss:1; |
1591 | uint64_t i_rsvd1:2; | 1591 | u64 i_rsvd1:2; |
1592 | uint64_t i_ioq_rep_underflow:1; | 1592 | u64 i_ioq_rep_underflow:1; |
1593 | uint64_t i_ioq_req_underflow:1; | 1593 | u64 i_ioq_req_underflow:1; |
1594 | uint64_t i_ioq_rep_overflow:1; | 1594 | u64 i_ioq_rep_overflow:1; |
1595 | uint64_t i_ioq_req_overflow:1; | 1595 | u64 i_ioq_req_overflow:1; |
1596 | uint64_t i_iiq_rep_overflow:1; | 1596 | u64 i_iiq_rep_overflow:1; |
1597 | uint64_t i_iiq_req_overflow:1; | 1597 | u64 i_iiq_req_overflow:1; |
1598 | uint64_t i_rsvd2:6; | 1598 | u64 i_rsvd2:6; |
1599 | uint64_t i_ii_xn_rep_cred_over_under:1; | 1599 | u64 i_ii_xn_rep_cred_over_under:1; |
1600 | uint64_t i_ii_xn_req_cred_over_under:1; | 1600 | u64 i_ii_xn_req_cred_over_under:1; |
1601 | uint64_t i_rsvd3:6; | 1601 | u64 i_rsvd3:6; |
1602 | uint64_t i_ii_xn_invalid_cmd:1; | 1602 | u64 i_ii_xn_invalid_cmd:1; |
1603 | uint64_t i_xn_ii_invalid_cmd:1; | 1603 | u64 i_xn_ii_invalid_cmd:1; |
1604 | uint64_t i_rsvd4:30; | 1604 | u64 i_rsvd4:30; |
1605 | } ii_iwel_fld_s; | 1605 | } ii_iwel_fld_s; |
1606 | } ii_iwel_u_t; | 1606 | } ii_iwel_u_t; |
1607 | 1607 | ||
@@ -1612,22 +1612,22 @@ typedef union ii_iwel_u { | |||
1612 | ************************************************************************/ | 1612 | ************************************************************************/ |
1613 | 1613 | ||
1614 | typedef union ii_iwc_u { | 1614 | typedef union ii_iwc_u { |
1615 | uint64_t ii_iwc_regval; | 1615 | u64 ii_iwc_regval; |
1616 | struct { | 1616 | struct { |
1617 | uint64_t i_dma_byte_swap:1; | 1617 | u64 i_dma_byte_swap:1; |
1618 | uint64_t i_rsvd:3; | 1618 | u64 i_rsvd:3; |
1619 | uint64_t i_cam_read_lines_reset:1; | 1619 | u64 i_cam_read_lines_reset:1; |
1620 | uint64_t i_rsvd1:3; | 1620 | u64 i_rsvd1:3; |
1621 | uint64_t i_ii_xn_cred_over_under_log:1; | 1621 | u64 i_ii_xn_cred_over_under_log:1; |
1622 | uint64_t i_rsvd2:19; | 1622 | u64 i_rsvd2:19; |
1623 | uint64_t i_xn_rep_iq_depth:5; | 1623 | u64 i_xn_rep_iq_depth:5; |
1624 | uint64_t i_rsvd3:3; | 1624 | u64 i_rsvd3:3; |
1625 | uint64_t i_xn_req_iq_depth:5; | 1625 | u64 i_xn_req_iq_depth:5; |
1626 | uint64_t i_rsvd4:3; | 1626 | u64 i_rsvd4:3; |
1627 | uint64_t i_iiq_depth:6; | 1627 | u64 i_iiq_depth:6; |
1628 | uint64_t i_rsvd5:12; | 1628 | u64 i_rsvd5:12; |
1629 | uint64_t i_force_rep_cred:1; | 1629 | u64 i_force_rep_cred:1; |
1630 | uint64_t i_force_req_cred:1; | 1630 | u64 i_force_req_cred:1; |
1631 | } ii_iwc_fld_s; | 1631 | } ii_iwc_fld_s; |
1632 | } ii_iwc_u_t; | 1632 | } ii_iwc_u_t; |
1633 | 1633 | ||
@@ -1638,12 +1638,12 @@ typedef union ii_iwc_u { | |||
1638 | ************************************************************************/ | 1638 | ************************************************************************/ |
1639 | 1639 | ||
1640 | typedef union ii_iws_u { | 1640 | typedef union ii_iws_u { |
1641 | uint64_t ii_iws_regval; | 1641 | u64 ii_iws_regval; |
1642 | struct { | 1642 | struct { |
1643 | uint64_t i_xn_rep_iq_credits:5; | 1643 | u64 i_xn_rep_iq_credits:5; |
1644 | uint64_t i_rsvd:3; | 1644 | u64 i_rsvd:3; |
1645 | uint64_t i_xn_req_iq_credits:5; | 1645 | u64 i_xn_req_iq_credits:5; |
1646 | uint64_t i_rsvd1:51; | 1646 | u64 i_rsvd1:51; |
1647 | } ii_iws_fld_s; | 1647 | } ii_iws_fld_s; |
1648 | } ii_iws_u_t; | 1648 | } ii_iws_u_t; |
1649 | 1649 | ||
@@ -1654,26 +1654,26 @@ typedef union ii_iws_u { | |||
1654 | ************************************************************************/ | 1654 | ************************************************************************/ |
1655 | 1655 | ||
1656 | typedef union ii_iweim_u { | 1656 | typedef union ii_iweim_u { |
1657 | uint64_t ii_iweim_regval; | 1657 | u64 ii_iweim_regval; |
1658 | struct { | 1658 | struct { |
1659 | uint64_t i_intr_timed_out:1; | 1659 | u64 i_intr_timed_out:1; |
1660 | uint64_t i_rsvd:7; | 1660 | u64 i_rsvd:7; |
1661 | uint64_t i_cam_overflow:1; | 1661 | u64 i_cam_overflow:1; |
1662 | uint64_t i_cam_read_miss:1; | 1662 | u64 i_cam_read_miss:1; |
1663 | uint64_t i_rsvd1:2; | 1663 | u64 i_rsvd1:2; |
1664 | uint64_t i_ioq_rep_underflow:1; | 1664 | u64 i_ioq_rep_underflow:1; |
1665 | uint64_t i_ioq_req_underflow:1; | 1665 | u64 i_ioq_req_underflow:1; |
1666 | uint64_t i_ioq_rep_overflow:1; | 1666 | u64 i_ioq_rep_overflow:1; |
1667 | uint64_t i_ioq_req_overflow:1; | 1667 | u64 i_ioq_req_overflow:1; |
1668 | uint64_t i_iiq_rep_overflow:1; | 1668 | u64 i_iiq_rep_overflow:1; |
1669 | uint64_t i_iiq_req_overflow:1; | 1669 | u64 i_iiq_req_overflow:1; |
1670 | uint64_t i_rsvd2:6; | 1670 | u64 i_rsvd2:6; |
1671 | uint64_t i_ii_xn_rep_cred_overflow:1; | 1671 | u64 i_ii_xn_rep_cred_overflow:1; |
1672 | uint64_t i_ii_xn_req_cred_overflow:1; | 1672 | u64 i_ii_xn_req_cred_overflow:1; |
1673 | uint64_t i_rsvd3:6; | 1673 | u64 i_rsvd3:6; |
1674 | uint64_t i_ii_xn_invalid_cmd:1; | 1674 | u64 i_ii_xn_invalid_cmd:1; |
1675 | uint64_t i_xn_ii_invalid_cmd:1; | 1675 | u64 i_xn_ii_invalid_cmd:1; |
1676 | uint64_t i_rsvd4:30; | 1676 | u64 i_rsvd4:30; |
1677 | } ii_iweim_fld_s; | 1677 | } ii_iweim_fld_s; |
1678 | } ii_iweim_u_t; | 1678 | } ii_iweim_u_t; |
1679 | 1679 | ||
@@ -1688,13 +1688,13 @@ typedef union ii_iweim_u { | |||
1688 | ************************************************************************/ | 1688 | ************************************************************************/ |
1689 | 1689 | ||
1690 | typedef union ii_ipca_u { | 1690 | typedef union ii_ipca_u { |
1691 | uint64_t ii_ipca_regval; | 1691 | u64 ii_ipca_regval; |
1692 | struct { | 1692 | struct { |
1693 | uint64_t i_wid:4; | 1693 | u64 i_wid:4; |
1694 | uint64_t i_adjust:1; | 1694 | u64 i_adjust:1; |
1695 | uint64_t i_rsvd_1:3; | 1695 | u64 i_rsvd_1:3; |
1696 | uint64_t i_field:2; | 1696 | u64 i_field:2; |
1697 | uint64_t i_rsvd:54; | 1697 | u64 i_rsvd:54; |
1698 | } ii_ipca_fld_s; | 1698 | } ii_ipca_fld_s; |
1699 | } ii_ipca_u_t; | 1699 | } ii_ipca_u_t; |
1700 | 1700 | ||
@@ -1709,12 +1709,12 @@ typedef union ii_ipca_u { | |||
1709 | ************************************************************************/ | 1709 | ************************************************************************/ |
1710 | 1710 | ||
1711 | typedef union ii_iprte0a_u { | 1711 | typedef union ii_iprte0a_u { |
1712 | uint64_t ii_iprte0a_regval; | 1712 | u64 ii_iprte0a_regval; |
1713 | struct { | 1713 | struct { |
1714 | uint64_t i_rsvd_1:54; | 1714 | u64 i_rsvd_1:54; |
1715 | uint64_t i_widget:4; | 1715 | u64 i_widget:4; |
1716 | uint64_t i_to_cnt:5; | 1716 | u64 i_to_cnt:5; |
1717 | uint64_t i_vld:1; | 1717 | u64 i_vld:1; |
1718 | } ii_iprte0a_fld_s; | 1718 | } ii_iprte0a_fld_s; |
1719 | } ii_iprte0a_u_t; | 1719 | } ii_iprte0a_u_t; |
1720 | 1720 | ||
@@ -1729,12 +1729,12 @@ typedef union ii_iprte0a_u { | |||
1729 | ************************************************************************/ | 1729 | ************************************************************************/ |
1730 | 1730 | ||
1731 | typedef union ii_iprte1a_u { | 1731 | typedef union ii_iprte1a_u { |
1732 | uint64_t ii_iprte1a_regval; | 1732 | u64 ii_iprte1a_regval; |
1733 | struct { | 1733 | struct { |
1734 | uint64_t i_rsvd_1:54; | 1734 | u64 i_rsvd_1:54; |
1735 | uint64_t i_widget:4; | 1735 | u64 i_widget:4; |
1736 | uint64_t i_to_cnt:5; | 1736 | u64 i_to_cnt:5; |
1737 | uint64_t i_vld:1; | 1737 | u64 i_vld:1; |
1738 | } ii_iprte1a_fld_s; | 1738 | } ii_iprte1a_fld_s; |
1739 | } ii_iprte1a_u_t; | 1739 | } ii_iprte1a_u_t; |
1740 | 1740 | ||
@@ -1749,12 +1749,12 @@ typedef union ii_iprte1a_u { | |||
1749 | ************************************************************************/ | 1749 | ************************************************************************/ |
1750 | 1750 | ||
1751 | typedef union ii_iprte2a_u { | 1751 | typedef union ii_iprte2a_u { |
1752 | uint64_t ii_iprte2a_regval; | 1752 | u64 ii_iprte2a_regval; |
1753 | struct { | 1753 | struct { |
1754 | uint64_t i_rsvd_1:54; | 1754 | u64 i_rsvd_1:54; |
1755 | uint64_t i_widget:4; | 1755 | u64 i_widget:4; |
1756 | uint64_t i_to_cnt:5; | 1756 | u64 i_to_cnt:5; |
1757 | uint64_t i_vld:1; | 1757 | u64 i_vld:1; |
1758 | } ii_iprte2a_fld_s; | 1758 | } ii_iprte2a_fld_s; |
1759 | } ii_iprte2a_u_t; | 1759 | } ii_iprte2a_u_t; |
1760 | 1760 | ||
@@ -1769,12 +1769,12 @@ typedef union ii_iprte2a_u { | |||
1769 | ************************************************************************/ | 1769 | ************************************************************************/ |
1770 | 1770 | ||
1771 | typedef union ii_iprte3a_u { | 1771 | typedef union ii_iprte3a_u { |
1772 | uint64_t ii_iprte3a_regval; | 1772 | u64 ii_iprte3a_regval; |
1773 | struct { | 1773 | struct { |
1774 | uint64_t i_rsvd_1:54; | 1774 | u64 i_rsvd_1:54; |
1775 | uint64_t i_widget:4; | 1775 | u64 i_widget:4; |
1776 | uint64_t i_to_cnt:5; | 1776 | u64 i_to_cnt:5; |
1777 | uint64_t i_vld:1; | 1777 | u64 i_vld:1; |
1778 | } ii_iprte3a_fld_s; | 1778 | } ii_iprte3a_fld_s; |
1779 | } ii_iprte3a_u_t; | 1779 | } ii_iprte3a_u_t; |
1780 | 1780 | ||
@@ -1789,12 +1789,12 @@ typedef union ii_iprte3a_u { | |||
1789 | ************************************************************************/ | 1789 | ************************************************************************/ |
1790 | 1790 | ||
1791 | typedef union ii_iprte4a_u { | 1791 | typedef union ii_iprte4a_u { |
1792 | uint64_t ii_iprte4a_regval; | 1792 | u64 ii_iprte4a_regval; |
1793 | struct { | 1793 | struct { |
1794 | uint64_t i_rsvd_1:54; | 1794 | u64 i_rsvd_1:54; |
1795 | uint64_t i_widget:4; | 1795 | u64 i_widget:4; |
1796 | uint64_t i_to_cnt:5; | 1796 | u64 i_to_cnt:5; |
1797 | uint64_t i_vld:1; | 1797 | u64 i_vld:1; |
1798 | } ii_iprte4a_fld_s; | 1798 | } ii_iprte4a_fld_s; |
1799 | } ii_iprte4a_u_t; | 1799 | } ii_iprte4a_u_t; |
1800 | 1800 | ||
@@ -1809,12 +1809,12 @@ typedef union ii_iprte4a_u { | |||
1809 | ************************************************************************/ | 1809 | ************************************************************************/ |
1810 | 1810 | ||
1811 | typedef union ii_iprte5a_u { | 1811 | typedef union ii_iprte5a_u { |
1812 | uint64_t ii_iprte5a_regval; | 1812 | u64 ii_iprte5a_regval; |
1813 | struct { | 1813 | struct { |
1814 | uint64_t i_rsvd_1:54; | 1814 | u64 i_rsvd_1:54; |
1815 | uint64_t i_widget:4; | 1815 | u64 i_widget:4; |
1816 | uint64_t i_to_cnt:5; | 1816 | u64 i_to_cnt:5; |
1817 | uint64_t i_vld:1; | 1817 | u64 i_vld:1; |
1818 | } ii_iprte5a_fld_s; | 1818 | } ii_iprte5a_fld_s; |
1819 | } ii_iprte5a_u_t; | 1819 | } ii_iprte5a_u_t; |
1820 | 1820 | ||
@@ -1829,12 +1829,12 @@ typedef union ii_iprte5a_u { | |||
1829 | ************************************************************************/ | 1829 | ************************************************************************/ |
1830 | 1830 | ||
1831 | typedef union ii_iprte6a_u { | 1831 | typedef union ii_iprte6a_u { |
1832 | uint64_t ii_iprte6a_regval; | 1832 | u64 ii_iprte6a_regval; |
1833 | struct { | 1833 | struct { |
1834 | uint64_t i_rsvd_1:54; | 1834 | u64 i_rsvd_1:54; |
1835 | uint64_t i_widget:4; | 1835 | u64 i_widget:4; |
1836 | uint64_t i_to_cnt:5; | 1836 | u64 i_to_cnt:5; |
1837 | uint64_t i_vld:1; | 1837 | u64 i_vld:1; |
1838 | } ii_iprte6a_fld_s; | 1838 | } ii_iprte6a_fld_s; |
1839 | } ii_iprte6a_u_t; | 1839 | } ii_iprte6a_u_t; |
1840 | 1840 | ||
@@ -1849,12 +1849,12 @@ typedef union ii_iprte6a_u { | |||
1849 | ************************************************************************/ | 1849 | ************************************************************************/ |
1850 | 1850 | ||
1851 | typedef union ii_iprte7a_u { | 1851 | typedef union ii_iprte7a_u { |
1852 | uint64_t ii_iprte7a_regval; | 1852 | u64 ii_iprte7a_regval; |
1853 | struct { | 1853 | struct { |
1854 | uint64_t i_rsvd_1:54; | 1854 | u64 i_rsvd_1:54; |
1855 | uint64_t i_widget:4; | 1855 | u64 i_widget:4; |
1856 | uint64_t i_to_cnt:5; | 1856 | u64 i_to_cnt:5; |
1857 | uint64_t i_vld:1; | 1857 | u64 i_vld:1; |
1858 | } ii_iprtea7_fld_s; | 1858 | } ii_iprtea7_fld_s; |
1859 | } ii_iprte7a_u_t; | 1859 | } ii_iprte7a_u_t; |
1860 | 1860 | ||
@@ -1869,12 +1869,12 @@ typedef union ii_iprte7a_u { | |||
1869 | ************************************************************************/ | 1869 | ************************************************************************/ |
1870 | 1870 | ||
1871 | typedef union ii_iprte0b_u { | 1871 | typedef union ii_iprte0b_u { |
1872 | uint64_t ii_iprte0b_regval; | 1872 | u64 ii_iprte0b_regval; |
1873 | struct { | 1873 | struct { |
1874 | uint64_t i_rsvd_1:3; | 1874 | u64 i_rsvd_1:3; |
1875 | uint64_t i_address:47; | 1875 | u64 i_address:47; |
1876 | uint64_t i_init:3; | 1876 | u64 i_init:3; |
1877 | uint64_t i_source:11; | 1877 | u64 i_source:11; |
1878 | } ii_iprte0b_fld_s; | 1878 | } ii_iprte0b_fld_s; |
1879 | } ii_iprte0b_u_t; | 1879 | } ii_iprte0b_u_t; |
1880 | 1880 | ||
@@ -1889,12 +1889,12 @@ typedef union ii_iprte0b_u { | |||
1889 | ************************************************************************/ | 1889 | ************************************************************************/ |
1890 | 1890 | ||
1891 | typedef union ii_iprte1b_u { | 1891 | typedef union ii_iprte1b_u { |
1892 | uint64_t ii_iprte1b_regval; | 1892 | u64 ii_iprte1b_regval; |
1893 | struct { | 1893 | struct { |
1894 | uint64_t i_rsvd_1:3; | 1894 | u64 i_rsvd_1:3; |
1895 | uint64_t i_address:47; | 1895 | u64 i_address:47; |
1896 | uint64_t i_init:3; | 1896 | u64 i_init:3; |
1897 | uint64_t i_source:11; | 1897 | u64 i_source:11; |
1898 | } ii_iprte1b_fld_s; | 1898 | } ii_iprte1b_fld_s; |
1899 | } ii_iprte1b_u_t; | 1899 | } ii_iprte1b_u_t; |
1900 | 1900 | ||
@@ -1909,12 +1909,12 @@ typedef union ii_iprte1b_u { | |||
1909 | ************************************************************************/ | 1909 | ************************************************************************/ |
1910 | 1910 | ||
1911 | typedef union ii_iprte2b_u { | 1911 | typedef union ii_iprte2b_u { |
1912 | uint64_t ii_iprte2b_regval; | 1912 | u64 ii_iprte2b_regval; |
1913 | struct { | 1913 | struct { |
1914 | uint64_t i_rsvd_1:3; | 1914 | u64 i_rsvd_1:3; |
1915 | uint64_t i_address:47; | 1915 | u64 i_address:47; |
1916 | uint64_t i_init:3; | 1916 | u64 i_init:3; |
1917 | uint64_t i_source:11; | 1917 | u64 i_source:11; |
1918 | } ii_iprte2b_fld_s; | 1918 | } ii_iprte2b_fld_s; |
1919 | } ii_iprte2b_u_t; | 1919 | } ii_iprte2b_u_t; |
1920 | 1920 | ||
@@ -1929,12 +1929,12 @@ typedef union ii_iprte2b_u { | |||
1929 | ************************************************************************/ | 1929 | ************************************************************************/ |
1930 | 1930 | ||
1931 | typedef union ii_iprte3b_u { | 1931 | typedef union ii_iprte3b_u { |
1932 | uint64_t ii_iprte3b_regval; | 1932 | u64 ii_iprte3b_regval; |
1933 | struct { | 1933 | struct { |
1934 | uint64_t i_rsvd_1:3; | 1934 | u64 i_rsvd_1:3; |
1935 | uint64_t i_address:47; | 1935 | u64 i_address:47; |
1936 | uint64_t i_init:3; | 1936 | u64 i_init:3; |
1937 | uint64_t i_source:11; | 1937 | u64 i_source:11; |
1938 | } ii_iprte3b_fld_s; | 1938 | } ii_iprte3b_fld_s; |
1939 | } ii_iprte3b_u_t; | 1939 | } ii_iprte3b_u_t; |
1940 | 1940 | ||
@@ -1949,12 +1949,12 @@ typedef union ii_iprte3b_u { | |||
1949 | ************************************************************************/ | 1949 | ************************************************************************/ |
1950 | 1950 | ||
1951 | typedef union ii_iprte4b_u { | 1951 | typedef union ii_iprte4b_u { |
1952 | uint64_t ii_iprte4b_regval; | 1952 | u64 ii_iprte4b_regval; |
1953 | struct { | 1953 | struct { |
1954 | uint64_t i_rsvd_1:3; | 1954 | u64 i_rsvd_1:3; |
1955 | uint64_t i_address:47; | 1955 | u64 i_address:47; |
1956 | uint64_t i_init:3; | 1956 | u64 i_init:3; |
1957 | uint64_t i_source:11; | 1957 | u64 i_source:11; |
1958 | } ii_iprte4b_fld_s; | 1958 | } ii_iprte4b_fld_s; |
1959 | } ii_iprte4b_u_t; | 1959 | } ii_iprte4b_u_t; |
1960 | 1960 | ||
@@ -1969,12 +1969,12 @@ typedef union ii_iprte4b_u { | |||
1969 | ************************************************************************/ | 1969 | ************************************************************************/ |
1970 | 1970 | ||
1971 | typedef union ii_iprte5b_u { | 1971 | typedef union ii_iprte5b_u { |
1972 | uint64_t ii_iprte5b_regval; | 1972 | u64 ii_iprte5b_regval; |
1973 | struct { | 1973 | struct { |
1974 | uint64_t i_rsvd_1:3; | 1974 | u64 i_rsvd_1:3; |
1975 | uint64_t i_address:47; | 1975 | u64 i_address:47; |
1976 | uint64_t i_init:3; | 1976 | u64 i_init:3; |
1977 | uint64_t i_source:11; | 1977 | u64 i_source:11; |
1978 | } ii_iprte5b_fld_s; | 1978 | } ii_iprte5b_fld_s; |
1979 | } ii_iprte5b_u_t; | 1979 | } ii_iprte5b_u_t; |
1980 | 1980 | ||
@@ -1989,12 +1989,12 @@ typedef union ii_iprte5b_u { | |||
1989 | ************************************************************************/ | 1989 | ************************************************************************/ |
1990 | 1990 | ||
1991 | typedef union ii_iprte6b_u { | 1991 | typedef union ii_iprte6b_u { |
1992 | uint64_t ii_iprte6b_regval; | 1992 | u64 ii_iprte6b_regval; |
1993 | struct { | 1993 | struct { |
1994 | uint64_t i_rsvd_1:3; | 1994 | u64 i_rsvd_1:3; |
1995 | uint64_t i_address:47; | 1995 | u64 i_address:47; |
1996 | uint64_t i_init:3; | 1996 | u64 i_init:3; |
1997 | uint64_t i_source:11; | 1997 | u64 i_source:11; |
1998 | 1998 | ||
1999 | } ii_iprte6b_fld_s; | 1999 | } ii_iprte6b_fld_s; |
2000 | } ii_iprte6b_u_t; | 2000 | } ii_iprte6b_u_t; |
@@ -2010,12 +2010,12 @@ typedef union ii_iprte6b_u { | |||
2010 | ************************************************************************/ | 2010 | ************************************************************************/ |
2011 | 2011 | ||
2012 | typedef union ii_iprte7b_u { | 2012 | typedef union ii_iprte7b_u { |
2013 | uint64_t ii_iprte7b_regval; | 2013 | u64 ii_iprte7b_regval; |
2014 | struct { | 2014 | struct { |
2015 | uint64_t i_rsvd_1:3; | 2015 | u64 i_rsvd_1:3; |
2016 | uint64_t i_address:47; | 2016 | u64 i_address:47; |
2017 | uint64_t i_init:3; | 2017 | u64 i_init:3; |
2018 | uint64_t i_source:11; | 2018 | u64 i_source:11; |
2019 | } ii_iprte7b_fld_s; | 2019 | } ii_iprte7b_fld_s; |
2020 | } ii_iprte7b_u_t; | 2020 | } ii_iprte7b_u_t; |
2021 | 2021 | ||
@@ -2038,13 +2038,13 @@ typedef union ii_iprte7b_u { | |||
2038 | ************************************************************************/ | 2038 | ************************************************************************/ |
2039 | 2039 | ||
2040 | typedef union ii_ipdr_u { | 2040 | typedef union ii_ipdr_u { |
2041 | uint64_t ii_ipdr_regval; | 2041 | u64 ii_ipdr_regval; |
2042 | struct { | 2042 | struct { |
2043 | uint64_t i_te:3; | 2043 | u64 i_te:3; |
2044 | uint64_t i_rsvd_1:1; | 2044 | u64 i_rsvd_1:1; |
2045 | uint64_t i_pnd:1; | 2045 | u64 i_pnd:1; |
2046 | uint64_t i_init_rpcnt:1; | 2046 | u64 i_init_rpcnt:1; |
2047 | uint64_t i_rsvd:58; | 2047 | u64 i_rsvd:58; |
2048 | } ii_ipdr_fld_s; | 2048 | } ii_ipdr_fld_s; |
2049 | } ii_ipdr_u_t; | 2049 | } ii_ipdr_u_t; |
2050 | 2050 | ||
@@ -2066,11 +2066,11 @@ typedef union ii_ipdr_u { | |||
2066 | ************************************************************************/ | 2066 | ************************************************************************/ |
2067 | 2067 | ||
2068 | typedef union ii_icdr_u { | 2068 | typedef union ii_icdr_u { |
2069 | uint64_t ii_icdr_regval; | 2069 | u64 ii_icdr_regval; |
2070 | struct { | 2070 | struct { |
2071 | uint64_t i_crb_num:4; | 2071 | u64 i_crb_num:4; |
2072 | uint64_t i_pnd:1; | 2072 | u64 i_pnd:1; |
2073 | uint64_t i_rsvd:59; | 2073 | u64 i_rsvd:59; |
2074 | } ii_icdr_fld_s; | 2074 | } ii_icdr_fld_s; |
2075 | } ii_icdr_u_t; | 2075 | } ii_icdr_u_t; |
2076 | 2076 | ||
@@ -2092,13 +2092,13 @@ typedef union ii_icdr_u { | |||
2092 | ************************************************************************/ | 2092 | ************************************************************************/ |
2093 | 2093 | ||
2094 | typedef union ii_ifdr_u { | 2094 | typedef union ii_ifdr_u { |
2095 | uint64_t ii_ifdr_regval; | 2095 | u64 ii_ifdr_regval; |
2096 | struct { | 2096 | struct { |
2097 | uint64_t i_ioq_max_rq:7; | 2097 | u64 i_ioq_max_rq:7; |
2098 | uint64_t i_set_ioq_rq:1; | 2098 | u64 i_set_ioq_rq:1; |
2099 | uint64_t i_ioq_max_rp:7; | 2099 | u64 i_ioq_max_rp:7; |
2100 | uint64_t i_set_ioq_rp:1; | 2100 | u64 i_set_ioq_rp:1; |
2101 | uint64_t i_rsvd:48; | 2101 | u64 i_rsvd:48; |
2102 | } ii_ifdr_fld_s; | 2102 | } ii_ifdr_fld_s; |
2103 | } ii_ifdr_u_t; | 2103 | } ii_ifdr_u_t; |
2104 | 2104 | ||
@@ -2114,12 +2114,12 @@ typedef union ii_ifdr_u { | |||
2114 | ************************************************************************/ | 2114 | ************************************************************************/ |
2115 | 2115 | ||
2116 | typedef union ii_iiap_u { | 2116 | typedef union ii_iiap_u { |
2117 | uint64_t ii_iiap_regval; | 2117 | u64 ii_iiap_regval; |
2118 | struct { | 2118 | struct { |
2119 | uint64_t i_rq_mls:6; | 2119 | u64 i_rq_mls:6; |
2120 | uint64_t i_rsvd_1:2; | 2120 | u64 i_rsvd_1:2; |
2121 | uint64_t i_rp_mls:6; | 2121 | u64 i_rp_mls:6; |
2122 | uint64_t i_rsvd:50; | 2122 | u64 i_rsvd:50; |
2123 | } ii_iiap_fld_s; | 2123 | } ii_iiap_fld_s; |
2124 | } ii_iiap_u_t; | 2124 | } ii_iiap_u_t; |
2125 | 2125 | ||
@@ -2133,22 +2133,22 @@ typedef union ii_iiap_u { | |||
2133 | ************************************************************************/ | 2133 | ************************************************************************/ |
2134 | 2134 | ||
2135 | typedef union ii_icmr_u { | 2135 | typedef union ii_icmr_u { |
2136 | uint64_t ii_icmr_regval; | 2136 | u64 ii_icmr_regval; |
2137 | struct { | 2137 | struct { |
2138 | uint64_t i_sp_msg:1; | 2138 | u64 i_sp_msg:1; |
2139 | uint64_t i_rd_hdr:1; | 2139 | u64 i_rd_hdr:1; |
2140 | uint64_t i_rsvd_4:2; | 2140 | u64 i_rsvd_4:2; |
2141 | uint64_t i_c_cnt:4; | 2141 | u64 i_c_cnt:4; |
2142 | uint64_t i_rsvd_3:4; | 2142 | u64 i_rsvd_3:4; |
2143 | uint64_t i_clr_rqpd:1; | 2143 | u64 i_clr_rqpd:1; |
2144 | uint64_t i_clr_rppd:1; | 2144 | u64 i_clr_rppd:1; |
2145 | uint64_t i_rsvd_2:2; | 2145 | u64 i_rsvd_2:2; |
2146 | uint64_t i_fc_cnt:4; | 2146 | u64 i_fc_cnt:4; |
2147 | uint64_t i_crb_vld:15; | 2147 | u64 i_crb_vld:15; |
2148 | uint64_t i_crb_mark:15; | 2148 | u64 i_crb_mark:15; |
2149 | uint64_t i_rsvd_1:2; | 2149 | u64 i_rsvd_1:2; |
2150 | uint64_t i_precise:1; | 2150 | u64 i_precise:1; |
2151 | uint64_t i_rsvd:11; | 2151 | u64 i_rsvd:11; |
2152 | } ii_icmr_fld_s; | 2152 | } ii_icmr_fld_s; |
2153 | } ii_icmr_u_t; | 2153 | } ii_icmr_u_t; |
2154 | 2154 | ||
@@ -2161,13 +2161,13 @@ typedef union ii_icmr_u { | |||
2161 | ************************************************************************/ | 2161 | ************************************************************************/ |
2162 | 2162 | ||
2163 | typedef union ii_iccr_u { | 2163 | typedef union ii_iccr_u { |
2164 | uint64_t ii_iccr_regval; | 2164 | u64 ii_iccr_regval; |
2165 | struct { | 2165 | struct { |
2166 | uint64_t i_crb_num:4; | 2166 | u64 i_crb_num:4; |
2167 | uint64_t i_rsvd_1:4; | 2167 | u64 i_rsvd_1:4; |
2168 | uint64_t i_cmd:8; | 2168 | u64 i_cmd:8; |
2169 | uint64_t i_pending:1; | 2169 | u64 i_pending:1; |
2170 | uint64_t i_rsvd:47; | 2170 | u64 i_rsvd:47; |
2171 | } ii_iccr_fld_s; | 2171 | } ii_iccr_fld_s; |
2172 | } ii_iccr_u_t; | 2172 | } ii_iccr_u_t; |
2173 | 2173 | ||
@@ -2178,10 +2178,10 @@ typedef union ii_iccr_u { | |||
2178 | ************************************************************************/ | 2178 | ************************************************************************/ |
2179 | 2179 | ||
2180 | typedef union ii_icto_u { | 2180 | typedef union ii_icto_u { |
2181 | uint64_t ii_icto_regval; | 2181 | u64 ii_icto_regval; |
2182 | struct { | 2182 | struct { |
2183 | uint64_t i_timeout:8; | 2183 | u64 i_timeout:8; |
2184 | uint64_t i_rsvd:56; | 2184 | u64 i_rsvd:56; |
2185 | } ii_icto_fld_s; | 2185 | } ii_icto_fld_s; |
2186 | } ii_icto_u_t; | 2186 | } ii_icto_u_t; |
2187 | 2187 | ||
@@ -2197,10 +2197,10 @@ typedef union ii_icto_u { | |||
2197 | ************************************************************************/ | 2197 | ************************************************************************/ |
2198 | 2198 | ||
2199 | typedef union ii_ictp_u { | 2199 | typedef union ii_ictp_u { |
2200 | uint64_t ii_ictp_regval; | 2200 | u64 ii_ictp_regval; |
2201 | struct { | 2201 | struct { |
2202 | uint64_t i_prescale:24; | 2202 | u64 i_prescale:24; |
2203 | uint64_t i_rsvd:40; | 2203 | u64 i_rsvd:40; |
2204 | } ii_ictp_fld_s; | 2204 | } ii_ictp_fld_s; |
2205 | } ii_ictp_u_t; | 2205 | } ii_ictp_u_t; |
2206 | 2206 | ||
@@ -2228,14 +2228,14 @@ typedef union ii_ictp_u { | |||
2228 | ************************************************************************/ | 2228 | ************************************************************************/ |
2229 | 2229 | ||
2230 | typedef union ii_icrb0_a_u { | 2230 | typedef union ii_icrb0_a_u { |
2231 | uint64_t ii_icrb0_a_regval; | 2231 | u64 ii_icrb0_a_regval; |
2232 | struct { | 2232 | struct { |
2233 | uint64_t ia_iow:1; | 2233 | u64 ia_iow:1; |
2234 | uint64_t ia_vld:1; | 2234 | u64 ia_vld:1; |
2235 | uint64_t ia_addr:47; | 2235 | u64 ia_addr:47; |
2236 | uint64_t ia_tnum:5; | 2236 | u64 ia_tnum:5; |
2237 | uint64_t ia_sidn:4; | 2237 | u64 ia_sidn:4; |
2238 | uint64_t ia_rsvd:6; | 2238 | u64 ia_rsvd:6; |
2239 | } ii_icrb0_a_fld_s; | 2239 | } ii_icrb0_a_fld_s; |
2240 | } ii_icrb0_a_u_t; | 2240 | } ii_icrb0_a_u_t; |
2241 | 2241 | ||
@@ -2249,30 +2249,30 @@ typedef union ii_icrb0_a_u { | |||
2249 | ************************************************************************/ | 2249 | ************************************************************************/ |
2250 | 2250 | ||
2251 | typedef union ii_icrb0_b_u { | 2251 | typedef union ii_icrb0_b_u { |
2252 | uint64_t ii_icrb0_b_regval; | 2252 | u64 ii_icrb0_b_regval; |
2253 | struct { | 2253 | struct { |
2254 | uint64_t ib_xt_err:1; | 2254 | u64 ib_xt_err:1; |
2255 | uint64_t ib_mark:1; | 2255 | u64 ib_mark:1; |
2256 | uint64_t ib_ln_uce:1; | 2256 | u64 ib_ln_uce:1; |
2257 | uint64_t ib_errcode:3; | 2257 | u64 ib_errcode:3; |
2258 | uint64_t ib_error:1; | 2258 | u64 ib_error:1; |
2259 | uint64_t ib_stall__bte_1:1; | 2259 | u64 ib_stall__bte_1:1; |
2260 | uint64_t ib_stall__bte_0:1; | 2260 | u64 ib_stall__bte_0:1; |
2261 | uint64_t ib_stall__intr:1; | 2261 | u64 ib_stall__intr:1; |
2262 | uint64_t ib_stall_ib:1; | 2262 | u64 ib_stall_ib:1; |
2263 | uint64_t ib_intvn:1; | 2263 | u64 ib_intvn:1; |
2264 | uint64_t ib_wb:1; | 2264 | u64 ib_wb:1; |
2265 | uint64_t ib_hold:1; | 2265 | u64 ib_hold:1; |
2266 | uint64_t ib_ack:1; | 2266 | u64 ib_ack:1; |
2267 | uint64_t ib_resp:1; | 2267 | u64 ib_resp:1; |
2268 | uint64_t ib_ack_cnt:11; | 2268 | u64 ib_ack_cnt:11; |
2269 | uint64_t ib_rsvd:7; | 2269 | u64 ib_rsvd:7; |
2270 | uint64_t ib_exc:5; | 2270 | u64 ib_exc:5; |
2271 | uint64_t ib_init:3; | 2271 | u64 ib_init:3; |
2272 | uint64_t ib_imsg:8; | 2272 | u64 ib_imsg:8; |
2273 | uint64_t ib_imsgtype:2; | 2273 | u64 ib_imsgtype:2; |
2274 | uint64_t ib_use_old:1; | 2274 | u64 ib_use_old:1; |
2275 | uint64_t ib_rsvd_1:11; | 2275 | u64 ib_rsvd_1:11; |
2276 | } ii_icrb0_b_fld_s; | 2276 | } ii_icrb0_b_fld_s; |
2277 | } ii_icrb0_b_u_t; | 2277 | } ii_icrb0_b_u_t; |
2278 | 2278 | ||
@@ -2286,17 +2286,17 @@ typedef union ii_icrb0_b_u { | |||
2286 | ************************************************************************/ | 2286 | ************************************************************************/ |
2287 | 2287 | ||
2288 | typedef union ii_icrb0_c_u { | 2288 | typedef union ii_icrb0_c_u { |
2289 | uint64_t ii_icrb0_c_regval; | 2289 | u64 ii_icrb0_c_regval; |
2290 | struct { | 2290 | struct { |
2291 | uint64_t ic_source:15; | 2291 | u64 ic_source:15; |
2292 | uint64_t ic_size:2; | 2292 | u64 ic_size:2; |
2293 | uint64_t ic_ct:1; | 2293 | u64 ic_ct:1; |
2294 | uint64_t ic_bte_num:1; | 2294 | u64 ic_bte_num:1; |
2295 | uint64_t ic_gbr:1; | 2295 | u64 ic_gbr:1; |
2296 | uint64_t ic_resprqd:1; | 2296 | u64 ic_resprqd:1; |
2297 | uint64_t ic_bo:1; | 2297 | u64 ic_bo:1; |
2298 | uint64_t ic_suppl:15; | 2298 | u64 ic_suppl:15; |
2299 | uint64_t ic_rsvd:27; | 2299 | u64 ic_rsvd:27; |
2300 | } ii_icrb0_c_fld_s; | 2300 | } ii_icrb0_c_fld_s; |
2301 | } ii_icrb0_c_u_t; | 2301 | } ii_icrb0_c_u_t; |
2302 | 2302 | ||
@@ -2310,14 +2310,14 @@ typedef union ii_icrb0_c_u { | |||
2310 | ************************************************************************/ | 2310 | ************************************************************************/ |
2311 | 2311 | ||
2312 | typedef union ii_icrb0_d_u { | 2312 | typedef union ii_icrb0_d_u { |
2313 | uint64_t ii_icrb0_d_regval; | 2313 | u64 ii_icrb0_d_regval; |
2314 | struct { | 2314 | struct { |
2315 | uint64_t id_pa_be:43; | 2315 | u64 id_pa_be:43; |
2316 | uint64_t id_bte_op:1; | 2316 | u64 id_bte_op:1; |
2317 | uint64_t id_pr_psc:4; | 2317 | u64 id_pr_psc:4; |
2318 | uint64_t id_pr_cnt:4; | 2318 | u64 id_pr_cnt:4; |
2319 | uint64_t id_sleep:1; | 2319 | u64 id_sleep:1; |
2320 | uint64_t id_rsvd:11; | 2320 | u64 id_rsvd:11; |
2321 | } ii_icrb0_d_fld_s; | 2321 | } ii_icrb0_d_fld_s; |
2322 | } ii_icrb0_d_u_t; | 2322 | } ii_icrb0_d_u_t; |
2323 | 2323 | ||
@@ -2331,14 +2331,14 @@ typedef union ii_icrb0_d_u { | |||
2331 | ************************************************************************/ | 2331 | ************************************************************************/ |
2332 | 2332 | ||
2333 | typedef union ii_icrb0_e_u { | 2333 | typedef union ii_icrb0_e_u { |
2334 | uint64_t ii_icrb0_e_regval; | 2334 | u64 ii_icrb0_e_regval; |
2335 | struct { | 2335 | struct { |
2336 | uint64_t ie_timeout:8; | 2336 | u64 ie_timeout:8; |
2337 | uint64_t ie_context:15; | 2337 | u64 ie_context:15; |
2338 | uint64_t ie_rsvd:1; | 2338 | u64 ie_rsvd:1; |
2339 | uint64_t ie_tvld:1; | 2339 | u64 ie_tvld:1; |
2340 | uint64_t ie_cvld:1; | 2340 | u64 ie_cvld:1; |
2341 | uint64_t ie_rsvd_0:38; | 2341 | u64 ie_rsvd_0:38; |
2342 | } ii_icrb0_e_fld_s; | 2342 | } ii_icrb0_e_fld_s; |
2343 | } ii_icrb0_e_u_t; | 2343 | } ii_icrb0_e_u_t; |
2344 | 2344 | ||
@@ -2351,12 +2351,12 @@ typedef union ii_icrb0_e_u { | |||
2351 | ************************************************************************/ | 2351 | ************************************************************************/ |
2352 | 2352 | ||
2353 | typedef union ii_icsml_u { | 2353 | typedef union ii_icsml_u { |
2354 | uint64_t ii_icsml_regval; | 2354 | u64 ii_icsml_regval; |
2355 | struct { | 2355 | struct { |
2356 | uint64_t i_tt_addr:47; | 2356 | u64 i_tt_addr:47; |
2357 | uint64_t i_newsuppl_ex:14; | 2357 | u64 i_newsuppl_ex:14; |
2358 | uint64_t i_reserved:2; | 2358 | u64 i_reserved:2; |
2359 | uint64_t i_overflow:1; | 2359 | u64 i_overflow:1; |
2360 | } ii_icsml_fld_s; | 2360 | } ii_icsml_fld_s; |
2361 | } ii_icsml_u_t; | 2361 | } ii_icsml_u_t; |
2362 | 2362 | ||
@@ -2369,10 +2369,10 @@ typedef union ii_icsml_u { | |||
2369 | ************************************************************************/ | 2369 | ************************************************************************/ |
2370 | 2370 | ||
2371 | typedef union ii_icsmm_u { | 2371 | typedef union ii_icsmm_u { |
2372 | uint64_t ii_icsmm_regval; | 2372 | u64 ii_icsmm_regval; |
2373 | struct { | 2373 | struct { |
2374 | uint64_t i_tt_ack_cnt:11; | 2374 | u64 i_tt_ack_cnt:11; |
2375 | uint64_t i_reserved:53; | 2375 | u64 i_reserved:53; |
2376 | } ii_icsmm_fld_s; | 2376 | } ii_icsmm_fld_s; |
2377 | } ii_icsmm_u_t; | 2377 | } ii_icsmm_u_t; |
2378 | 2378 | ||
@@ -2385,48 +2385,48 @@ typedef union ii_icsmm_u { | |||
2385 | ************************************************************************/ | 2385 | ************************************************************************/ |
2386 | 2386 | ||
2387 | typedef union ii_icsmh_u { | 2387 | typedef union ii_icsmh_u { |
2388 | uint64_t ii_icsmh_regval; | 2388 | u64 ii_icsmh_regval; |
2389 | struct { | 2389 | struct { |
2390 | uint64_t i_tt_vld:1; | 2390 | u64 i_tt_vld:1; |
2391 | uint64_t i_xerr:1; | 2391 | u64 i_xerr:1; |
2392 | uint64_t i_ft_cwact_o:1; | 2392 | u64 i_ft_cwact_o:1; |
2393 | uint64_t i_ft_wact_o:1; | 2393 | u64 i_ft_wact_o:1; |
2394 | uint64_t i_ft_active_o:1; | 2394 | u64 i_ft_active_o:1; |
2395 | uint64_t i_sync:1; | 2395 | u64 i_sync:1; |
2396 | uint64_t i_mnusg:1; | 2396 | u64 i_mnusg:1; |
2397 | uint64_t i_mnusz:1; | 2397 | u64 i_mnusz:1; |
2398 | uint64_t i_plusz:1; | 2398 | u64 i_plusz:1; |
2399 | uint64_t i_plusg:1; | 2399 | u64 i_plusg:1; |
2400 | uint64_t i_tt_exc:5; | 2400 | u64 i_tt_exc:5; |
2401 | uint64_t i_tt_wb:1; | 2401 | u64 i_tt_wb:1; |
2402 | uint64_t i_tt_hold:1; | 2402 | u64 i_tt_hold:1; |
2403 | uint64_t i_tt_ack:1; | 2403 | u64 i_tt_ack:1; |
2404 | uint64_t i_tt_resp:1; | 2404 | u64 i_tt_resp:1; |
2405 | uint64_t i_tt_intvn:1; | 2405 | u64 i_tt_intvn:1; |
2406 | uint64_t i_g_stall_bte1:1; | 2406 | u64 i_g_stall_bte1:1; |
2407 | uint64_t i_g_stall_bte0:1; | 2407 | u64 i_g_stall_bte0:1; |
2408 | uint64_t i_g_stall_il:1; | 2408 | u64 i_g_stall_il:1; |
2409 | uint64_t i_g_stall_ib:1; | 2409 | u64 i_g_stall_ib:1; |
2410 | uint64_t i_tt_imsg:8; | 2410 | u64 i_tt_imsg:8; |
2411 | uint64_t i_tt_imsgtype:2; | 2411 | u64 i_tt_imsgtype:2; |
2412 | uint64_t i_tt_use_old:1; | 2412 | u64 i_tt_use_old:1; |
2413 | uint64_t i_tt_respreqd:1; | 2413 | u64 i_tt_respreqd:1; |
2414 | uint64_t i_tt_bte_num:1; | 2414 | u64 i_tt_bte_num:1; |
2415 | uint64_t i_cbn:1; | 2415 | u64 i_cbn:1; |
2416 | uint64_t i_match:1; | 2416 | u64 i_match:1; |
2417 | uint64_t i_rpcnt_lt_34:1; | 2417 | u64 i_rpcnt_lt_34:1; |
2418 | uint64_t i_rpcnt_ge_34:1; | 2418 | u64 i_rpcnt_ge_34:1; |
2419 | uint64_t i_rpcnt_lt_18:1; | 2419 | u64 i_rpcnt_lt_18:1; |
2420 | uint64_t i_rpcnt_ge_18:1; | 2420 | u64 i_rpcnt_ge_18:1; |
2421 | uint64_t i_rpcnt_lt_2:1; | 2421 | u64 i_rpcnt_lt_2:1; |
2422 | uint64_t i_rpcnt_ge_2:1; | 2422 | u64 i_rpcnt_ge_2:1; |
2423 | uint64_t i_rqcnt_lt_18:1; | 2423 | u64 i_rqcnt_lt_18:1; |
2424 | uint64_t i_rqcnt_ge_18:1; | 2424 | u64 i_rqcnt_ge_18:1; |
2425 | uint64_t i_rqcnt_lt_2:1; | 2425 | u64 i_rqcnt_lt_2:1; |
2426 | uint64_t i_rqcnt_ge_2:1; | 2426 | u64 i_rqcnt_ge_2:1; |
2427 | uint64_t i_tt_device:7; | 2427 | u64 i_tt_device:7; |
2428 | uint64_t i_tt_init:3; | 2428 | u64 i_tt_init:3; |
2429 | uint64_t i_reserved:5; | 2429 | u64 i_reserved:5; |
2430 | } ii_icsmh_fld_s; | 2430 | } ii_icsmh_fld_s; |
2431 | } ii_icsmh_u_t; | 2431 | } ii_icsmh_u_t; |
2432 | 2432 | ||
@@ -2439,14 +2439,14 @@ typedef union ii_icsmh_u { | |||
2439 | ************************************************************************/ | 2439 | ************************************************************************/ |
2440 | 2440 | ||
2441 | typedef union ii_idbss_u { | 2441 | typedef union ii_idbss_u { |
2442 | uint64_t ii_idbss_regval; | 2442 | u64 ii_idbss_regval; |
2443 | struct { | 2443 | struct { |
2444 | uint64_t i_iioclk_core_submenu:3; | 2444 | u64 i_iioclk_core_submenu:3; |
2445 | uint64_t i_rsvd:5; | 2445 | u64 i_rsvd:5; |
2446 | uint64_t i_fsbclk_wrapper_submenu:3; | 2446 | u64 i_fsbclk_wrapper_submenu:3; |
2447 | uint64_t i_rsvd_1:5; | 2447 | u64 i_rsvd_1:5; |
2448 | uint64_t i_iioclk_menu:5; | 2448 | u64 i_iioclk_menu:5; |
2449 | uint64_t i_rsvd_2:43; | 2449 | u64 i_rsvd_2:43; |
2450 | } ii_idbss_fld_s; | 2450 | } ii_idbss_fld_s; |
2451 | } ii_idbss_u_t; | 2451 | } ii_idbss_u_t; |
2452 | 2452 | ||
@@ -2466,13 +2466,13 @@ typedef union ii_idbss_u { | |||
2466 | ************************************************************************/ | 2466 | ************************************************************************/ |
2467 | 2467 | ||
2468 | typedef union ii_ibls0_u { | 2468 | typedef union ii_ibls0_u { |
2469 | uint64_t ii_ibls0_regval; | 2469 | u64 ii_ibls0_regval; |
2470 | struct { | 2470 | struct { |
2471 | uint64_t i_length:16; | 2471 | u64 i_length:16; |
2472 | uint64_t i_error:1; | 2472 | u64 i_error:1; |
2473 | uint64_t i_rsvd_1:3; | 2473 | u64 i_rsvd_1:3; |
2474 | uint64_t i_busy:1; | 2474 | u64 i_busy:1; |
2475 | uint64_t i_rsvd:43; | 2475 | u64 i_rsvd:43; |
2476 | } ii_ibls0_fld_s; | 2476 | } ii_ibls0_fld_s; |
2477 | } ii_ibls0_u_t; | 2477 | } ii_ibls0_u_t; |
2478 | 2478 | ||
@@ -2487,11 +2487,11 @@ typedef union ii_ibls0_u { | |||
2487 | ************************************************************************/ | 2487 | ************************************************************************/ |
2488 | 2488 | ||
2489 | typedef union ii_ibsa0_u { | 2489 | typedef union ii_ibsa0_u { |
2490 | uint64_t ii_ibsa0_regval; | 2490 | u64 ii_ibsa0_regval; |
2491 | struct { | 2491 | struct { |
2492 | uint64_t i_rsvd_1:7; | 2492 | u64 i_rsvd_1:7; |
2493 | uint64_t i_addr:42; | 2493 | u64 i_addr:42; |
2494 | uint64_t i_rsvd:15; | 2494 | u64 i_rsvd:15; |
2495 | } ii_ibsa0_fld_s; | 2495 | } ii_ibsa0_fld_s; |
2496 | } ii_ibsa0_u_t; | 2496 | } ii_ibsa0_u_t; |
2497 | 2497 | ||
@@ -2506,11 +2506,11 @@ typedef union ii_ibsa0_u { | |||
2506 | ************************************************************************/ | 2506 | ************************************************************************/ |
2507 | 2507 | ||
2508 | typedef union ii_ibda0_u { | 2508 | typedef union ii_ibda0_u { |
2509 | uint64_t ii_ibda0_regval; | 2509 | u64 ii_ibda0_regval; |
2510 | struct { | 2510 | struct { |
2511 | uint64_t i_rsvd_1:7; | 2511 | u64 i_rsvd_1:7; |
2512 | uint64_t i_addr:42; | 2512 | u64 i_addr:42; |
2513 | uint64_t i_rsvd:15; | 2513 | u64 i_rsvd:15; |
2514 | } ii_ibda0_fld_s; | 2514 | } ii_ibda0_fld_s; |
2515 | } ii_ibda0_u_t; | 2515 | } ii_ibda0_u_t; |
2516 | 2516 | ||
@@ -2527,14 +2527,14 @@ typedef union ii_ibda0_u { | |||
2527 | ************************************************************************/ | 2527 | ************************************************************************/ |
2528 | 2528 | ||
2529 | typedef union ii_ibct0_u { | 2529 | typedef union ii_ibct0_u { |
2530 | uint64_t ii_ibct0_regval; | 2530 | u64 ii_ibct0_regval; |
2531 | struct { | 2531 | struct { |
2532 | uint64_t i_zerofill:1; | 2532 | u64 i_zerofill:1; |
2533 | uint64_t i_rsvd_2:3; | 2533 | u64 i_rsvd_2:3; |
2534 | uint64_t i_notify:1; | 2534 | u64 i_notify:1; |
2535 | uint64_t i_rsvd_1:3; | 2535 | u64 i_rsvd_1:3; |
2536 | uint64_t i_poison:1; | 2536 | u64 i_poison:1; |
2537 | uint64_t i_rsvd:55; | 2537 | u64 i_rsvd:55; |
2538 | } ii_ibct0_fld_s; | 2538 | } ii_ibct0_fld_s; |
2539 | } ii_ibct0_u_t; | 2539 | } ii_ibct0_u_t; |
2540 | 2540 | ||
@@ -2546,11 +2546,11 @@ typedef union ii_ibct0_u { | |||
2546 | ************************************************************************/ | 2546 | ************************************************************************/ |
2547 | 2547 | ||
2548 | typedef union ii_ibna0_u { | 2548 | typedef union ii_ibna0_u { |
2549 | uint64_t ii_ibna0_regval; | 2549 | u64 ii_ibna0_regval; |
2550 | struct { | 2550 | struct { |
2551 | uint64_t i_rsvd_1:7; | 2551 | u64 i_rsvd_1:7; |
2552 | uint64_t i_addr:42; | 2552 | u64 i_addr:42; |
2553 | uint64_t i_rsvd:15; | 2553 | u64 i_rsvd:15; |
2554 | } ii_ibna0_fld_s; | 2554 | } ii_ibna0_fld_s; |
2555 | } ii_ibna0_u_t; | 2555 | } ii_ibna0_u_t; |
2556 | 2556 | ||
@@ -2563,13 +2563,13 @@ typedef union ii_ibna0_u { | |||
2563 | ************************************************************************/ | 2563 | ************************************************************************/ |
2564 | 2564 | ||
2565 | typedef union ii_ibia0_u { | 2565 | typedef union ii_ibia0_u { |
2566 | uint64_t ii_ibia0_regval; | 2566 | u64 ii_ibia0_regval; |
2567 | struct { | 2567 | struct { |
2568 | uint64_t i_rsvd_2:1; | 2568 | u64 i_rsvd_2:1; |
2569 | uint64_t i_node_id:11; | 2569 | u64 i_node_id:11; |
2570 | uint64_t i_rsvd_1:4; | 2570 | u64 i_rsvd_1:4; |
2571 | uint64_t i_level:7; | 2571 | u64 i_level:7; |
2572 | uint64_t i_rsvd:41; | 2572 | u64 i_rsvd:41; |
2573 | } ii_ibia0_fld_s; | 2573 | } ii_ibia0_fld_s; |
2574 | } ii_ibia0_u_t; | 2574 | } ii_ibia0_u_t; |
2575 | 2575 | ||
@@ -2589,13 +2589,13 @@ typedef union ii_ibia0_u { | |||
2589 | ************************************************************************/ | 2589 | ************************************************************************/ |
2590 | 2590 | ||
2591 | typedef union ii_ibls1_u { | 2591 | typedef union ii_ibls1_u { |
2592 | uint64_t ii_ibls1_regval; | 2592 | u64 ii_ibls1_regval; |
2593 | struct { | 2593 | struct { |
2594 | uint64_t i_length:16; | 2594 | u64 i_length:16; |
2595 | uint64_t i_error:1; | 2595 | u64 i_error:1; |
2596 | uint64_t i_rsvd_1:3; | 2596 | u64 i_rsvd_1:3; |
2597 | uint64_t i_busy:1; | 2597 | u64 i_busy:1; |
2598 | uint64_t i_rsvd:43; | 2598 | u64 i_rsvd:43; |
2599 | } ii_ibls1_fld_s; | 2599 | } ii_ibls1_fld_s; |
2600 | } ii_ibls1_u_t; | 2600 | } ii_ibls1_u_t; |
2601 | 2601 | ||
@@ -2610,11 +2610,11 @@ typedef union ii_ibls1_u { | |||
2610 | ************************************************************************/ | 2610 | ************************************************************************/ |
2611 | 2611 | ||
2612 | typedef union ii_ibsa1_u { | 2612 | typedef union ii_ibsa1_u { |
2613 | uint64_t ii_ibsa1_regval; | 2613 | u64 ii_ibsa1_regval; |
2614 | struct { | 2614 | struct { |
2615 | uint64_t i_rsvd_1:7; | 2615 | u64 i_rsvd_1:7; |
2616 | uint64_t i_addr:33; | 2616 | u64 i_addr:33; |
2617 | uint64_t i_rsvd:24; | 2617 | u64 i_rsvd:24; |
2618 | } ii_ibsa1_fld_s; | 2618 | } ii_ibsa1_fld_s; |
2619 | } ii_ibsa1_u_t; | 2619 | } ii_ibsa1_u_t; |
2620 | 2620 | ||
@@ -2629,11 +2629,11 @@ typedef union ii_ibsa1_u { | |||
2629 | ************************************************************************/ | 2629 | ************************************************************************/ |
2630 | 2630 | ||
2631 | typedef union ii_ibda1_u { | 2631 | typedef union ii_ibda1_u { |
2632 | uint64_t ii_ibda1_regval; | 2632 | u64 ii_ibda1_regval; |
2633 | struct { | 2633 | struct { |
2634 | uint64_t i_rsvd_1:7; | 2634 | u64 i_rsvd_1:7; |
2635 | uint64_t i_addr:33; | 2635 | u64 i_addr:33; |
2636 | uint64_t i_rsvd:24; | 2636 | u64 i_rsvd:24; |
2637 | } ii_ibda1_fld_s; | 2637 | } ii_ibda1_fld_s; |
2638 | } ii_ibda1_u_t; | 2638 | } ii_ibda1_u_t; |
2639 | 2639 | ||
@@ -2650,14 +2650,14 @@ typedef union ii_ibda1_u { | |||
2650 | ************************************************************************/ | 2650 | ************************************************************************/ |
2651 | 2651 | ||
2652 | typedef union ii_ibct1_u { | 2652 | typedef union ii_ibct1_u { |
2653 | uint64_t ii_ibct1_regval; | 2653 | u64 ii_ibct1_regval; |
2654 | struct { | 2654 | struct { |
2655 | uint64_t i_zerofill:1; | 2655 | u64 i_zerofill:1; |
2656 | uint64_t i_rsvd_2:3; | 2656 | u64 i_rsvd_2:3; |
2657 | uint64_t i_notify:1; | 2657 | u64 i_notify:1; |
2658 | uint64_t i_rsvd_1:3; | 2658 | u64 i_rsvd_1:3; |
2659 | uint64_t i_poison:1; | 2659 | u64 i_poison:1; |
2660 | uint64_t i_rsvd:55; | 2660 | u64 i_rsvd:55; |
2661 | } ii_ibct1_fld_s; | 2661 | } ii_ibct1_fld_s; |
2662 | } ii_ibct1_u_t; | 2662 | } ii_ibct1_u_t; |
2663 | 2663 | ||
@@ -2669,11 +2669,11 @@ typedef union ii_ibct1_u { | |||
2669 | ************************************************************************/ | 2669 | ************************************************************************/ |
2670 | 2670 | ||
2671 | typedef union ii_ibna1_u { | 2671 | typedef union ii_ibna1_u { |
2672 | uint64_t ii_ibna1_regval; | 2672 | u64 ii_ibna1_regval; |
2673 | struct { | 2673 | struct { |
2674 | uint64_t i_rsvd_1:7; | 2674 | u64 i_rsvd_1:7; |
2675 | uint64_t i_addr:33; | 2675 | u64 i_addr:33; |
2676 | uint64_t i_rsvd:24; | 2676 | u64 i_rsvd:24; |
2677 | } ii_ibna1_fld_s; | 2677 | } ii_ibna1_fld_s; |
2678 | } ii_ibna1_u_t; | 2678 | } ii_ibna1_u_t; |
2679 | 2679 | ||
@@ -2686,13 +2686,13 @@ typedef union ii_ibna1_u { | |||
2686 | ************************************************************************/ | 2686 | ************************************************************************/ |
2687 | 2687 | ||
2688 | typedef union ii_ibia1_u { | 2688 | typedef union ii_ibia1_u { |
2689 | uint64_t ii_ibia1_regval; | 2689 | u64 ii_ibia1_regval; |
2690 | struct { | 2690 | struct { |
2691 | uint64_t i_pi_id:1; | 2691 | u64 i_pi_id:1; |
2692 | uint64_t i_node_id:8; | 2692 | u64 i_node_id:8; |
2693 | uint64_t i_rsvd_1:7; | 2693 | u64 i_rsvd_1:7; |
2694 | uint64_t i_level:7; | 2694 | u64 i_level:7; |
2695 | uint64_t i_rsvd:41; | 2695 | u64 i_rsvd:41; |
2696 | } ii_ibia1_fld_s; | 2696 | } ii_ibia1_fld_s; |
2697 | } ii_ibia1_u_t; | 2697 | } ii_ibia1_u_t; |
2698 | 2698 | ||
@@ -2712,12 +2712,12 @@ typedef union ii_ibia1_u { | |||
2712 | ************************************************************************/ | 2712 | ************************************************************************/ |
2713 | 2713 | ||
2714 | typedef union ii_ipcr_u { | 2714 | typedef union ii_ipcr_u { |
2715 | uint64_t ii_ipcr_regval; | 2715 | u64 ii_ipcr_regval; |
2716 | struct { | 2716 | struct { |
2717 | uint64_t i_ippr0_c:4; | 2717 | u64 i_ippr0_c:4; |
2718 | uint64_t i_ippr1_c:4; | 2718 | u64 i_ippr1_c:4; |
2719 | uint64_t i_icct:8; | 2719 | u64 i_icct:8; |
2720 | uint64_t i_rsvd:48; | 2720 | u64 i_rsvd:48; |
2721 | } ii_ipcr_fld_s; | 2721 | } ii_ipcr_fld_s; |
2722 | } ii_ipcr_u_t; | 2722 | } ii_ipcr_u_t; |
2723 | 2723 | ||
@@ -2728,10 +2728,10 @@ typedef union ii_ipcr_u { | |||
2728 | ************************************************************************/ | 2728 | ************************************************************************/ |
2729 | 2729 | ||
2730 | typedef union ii_ippr_u { | 2730 | typedef union ii_ippr_u { |
2731 | uint64_t ii_ippr_regval; | 2731 | u64 ii_ippr_regval; |
2732 | struct { | 2732 | struct { |
2733 | uint64_t i_ippr0:32; | 2733 | u64 i_ippr0:32; |
2734 | uint64_t i_ippr1:32; | 2734 | u64 i_ippr1:32; |
2735 | } ii_ippr_fld_s; | 2735 | } ii_ippr_fld_s; |
2736 | } ii_ippr_u_t; | 2736 | } ii_ippr_u_t; |
2737 | 2737 | ||
@@ -3267,15 +3267,15 @@ typedef ii_icrb0_e_u_t icrbe_t; | |||
3267 | #define IO_PERF_SETS 32 | 3267 | #define IO_PERF_SETS 32 |
3268 | 3268 | ||
3269 | /* Bit for the widget in inbound access register */ | 3269 | /* Bit for the widget in inbound access register */ |
3270 | #define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) | 3270 | #define IIO_IIWA_WIDGET(_w) ((u64)(1ULL << _w)) |
3271 | /* Bit for the widget in outbound access register */ | 3271 | /* Bit for the widget in outbound access register */ |
3272 | #define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) | 3272 | #define IIO_IOWA_WIDGET(_w) ((u64)(1ULL << _w)) |
3273 | 3273 | ||
3274 | /* NOTE: The following define assumes that we are going to get | 3274 | /* NOTE: The following define assumes that we are going to get |
3275 | * widget numbers from 8 thru F and the device numbers within | 3275 | * widget numbers from 8 thru F and the device numbers within |
3276 | * widget from 0 thru 7. | 3276 | * widget from 0 thru 7. |
3277 | */ | 3277 | */ |
3278 | #define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d)))) | 3278 | #define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((u64)(1ULL << (8 * ((w) - 8) + (d)))) |
3279 | 3279 | ||
3280 | /* IO Interrupt Destination Register */ | 3280 | /* IO Interrupt Destination Register */ |
3281 | #define IIO_IIDSR_SENT_SHIFT 28 | 3281 | #define IIO_IIDSR_SENT_SHIFT 28 |
@@ -3302,9 +3302,9 @@ typedef ii_icrb0_e_u_t icrbe_t; | |||
3302 | */ | 3302 | */ |
3303 | 3303 | ||
3304 | typedef union hubii_wcr_u { | 3304 | typedef union hubii_wcr_u { |
3305 | uint64_t wcr_reg_value; | 3305 | u64 wcr_reg_value; |
3306 | struct { | 3306 | struct { |
3307 | uint64_t wcr_widget_id:4, /* LLP crossbar credit */ | 3307 | u64 wcr_widget_id:4, /* LLP crossbar credit */ |
3308 | wcr_tag_mode:1, /* Tag mode */ | 3308 | wcr_tag_mode:1, /* Tag mode */ |
3309 | wcr_rsvd1:8, /* Reserved */ | 3309 | wcr_rsvd1:8, /* Reserved */ |
3310 | wcr_xbar_crd:3, /* LLP crossbar credit */ | 3310 | wcr_xbar_crd:3, /* LLP crossbar credit */ |
@@ -3324,9 +3324,9 @@ performance registers */ | |||
3324 | performed */ | 3324 | performed */ |
3325 | 3325 | ||
3326 | typedef union io_perf_sel { | 3326 | typedef union io_perf_sel { |
3327 | uint64_t perf_sel_reg; | 3327 | u64 perf_sel_reg; |
3328 | struct { | 3328 | struct { |
3329 | uint64_t perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48; | 3329 | u64 perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48; |
3330 | } perf_sel_bits; | 3330 | } perf_sel_bits; |
3331 | } io_perf_sel_t; | 3331 | } io_perf_sel_t; |
3332 | 3332 | ||
@@ -3334,24 +3334,24 @@ typedef union io_perf_sel { | |||
3334 | hardware problems there is only one counter, not two. */ | 3334 | hardware problems there is only one counter, not two. */ |
3335 | 3335 | ||
3336 | typedef union io_perf_cnt { | 3336 | typedef union io_perf_cnt { |
3337 | uint64_t perf_cnt; | 3337 | u64 perf_cnt; |
3338 | struct { | 3338 | struct { |
3339 | uint64_t perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32; | 3339 | u64 perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32; |
3340 | } perf_cnt_bits; | 3340 | } perf_cnt_bits; |
3341 | 3341 | ||
3342 | } io_perf_cnt_t; | 3342 | } io_perf_cnt_t; |
3343 | 3343 | ||
3344 | typedef union iprte_a { | 3344 | typedef union iprte_a { |
3345 | uint64_t entry; | 3345 | u64 entry; |
3346 | struct { | 3346 | struct { |
3347 | uint64_t i_rsvd_1:3; | 3347 | u64 i_rsvd_1:3; |
3348 | uint64_t i_addr:38; | 3348 | u64 i_addr:38; |
3349 | uint64_t i_init:3; | 3349 | u64 i_init:3; |
3350 | uint64_t i_source:8; | 3350 | u64 i_source:8; |
3351 | uint64_t i_rsvd:2; | 3351 | u64 i_rsvd:2; |
3352 | uint64_t i_widget:4; | 3352 | u64 i_widget:4; |
3353 | uint64_t i_to_cnt:5; | 3353 | u64 i_to_cnt:5; |
3354 | uint64_t i_vld:1; | 3354 | u64 i_vld:1; |
3355 | } iprte_fields; | 3355 | } iprte_fields; |
3356 | } iprte_a_t; | 3356 | } iprte_a_t; |
3357 | 3357 | ||
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index 8b9e10e7cdba..e77f0c9b7d3d 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h | |||
@@ -273,7 +273,7 @@ ia64_sn_console_putc(char ch) | |||
273 | ret_stuff.v0 = 0; | 273 | ret_stuff.v0 = 0; |
274 | ret_stuff.v1 = 0; | 274 | ret_stuff.v1 = 0; |
275 | ret_stuff.v2 = 0; | 275 | ret_stuff.v2 = 0; |
276 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0); | 276 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0); |
277 | 277 | ||
278 | return ret_stuff.status; | 278 | return ret_stuff.status; |
279 | } | 279 | } |
@@ -290,7 +290,7 @@ ia64_sn_console_putb(const char *buf, int len) | |||
290 | ret_stuff.v0 = 0; | 290 | ret_stuff.v0 = 0; |
291 | ret_stuff.v1 = 0; | 291 | ret_stuff.v1 = 0; |
292 | ret_stuff.v2 = 0; | 292 | ret_stuff.v2 = 0; |
293 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0); | 293 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0); |
294 | 294 | ||
295 | if ( ret_stuff.status == 0 ) { | 295 | if ( ret_stuff.status == 0 ) { |
296 | return ret_stuff.v0; | 296 | return ret_stuff.v0; |
@@ -310,7 +310,7 @@ ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec) | |||
310 | ret_stuff.v0 = 0; | 310 | ret_stuff.v0 = 0; |
311 | ret_stuff.v1 = 0; | 311 | ret_stuff.v1 = 0; |
312 | ret_stuff.v2 = 0; | 312 | ret_stuff.v2 = 0; |
313 | SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0); | 313 | SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0); |
314 | 314 | ||
315 | return ret_stuff.status; | 315 | return ret_stuff.status; |
316 | } | 316 | } |
@@ -398,7 +398,7 @@ ia64_sn_console_intr_status(void) | |||
398 | * Enable an interrupt on the SAL console device. | 398 | * Enable an interrupt on the SAL console device. |
399 | */ | 399 | */ |
400 | static inline void | 400 | static inline void |
401 | ia64_sn_console_intr_enable(uint64_t intr) | 401 | ia64_sn_console_intr_enable(u64 intr) |
402 | { | 402 | { |
403 | struct ia64_sal_retval ret_stuff; | 403 | struct ia64_sal_retval ret_stuff; |
404 | 404 | ||
@@ -415,7 +415,7 @@ ia64_sn_console_intr_enable(uint64_t intr) | |||
415 | * Disable an interrupt on the SAL console device. | 415 | * Disable an interrupt on the SAL console device. |
416 | */ | 416 | */ |
417 | static inline void | 417 | static inline void |
418 | ia64_sn_console_intr_disable(uint64_t intr) | 418 | ia64_sn_console_intr_disable(u64 intr) |
419 | { | 419 | { |
420 | struct ia64_sal_retval ret_stuff; | 420 | struct ia64_sal_retval ret_stuff; |
421 | 421 | ||
@@ -441,7 +441,7 @@ ia64_sn_console_xmit_chars(char *buf, int len) | |||
441 | ret_stuff.v1 = 0; | 441 | ret_stuff.v1 = 0; |
442 | ret_stuff.v2 = 0; | 442 | ret_stuff.v2 = 0; |
443 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, | 443 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, |
444 | (uint64_t)buf, (uint64_t)len, | 444 | (u64)buf, (u64)len, |
445 | 0, 0, 0, 0, 0); | 445 | 0, 0, 0, 0, 0); |
446 | 446 | ||
447 | if (ret_stuff.status == 0) { | 447 | if (ret_stuff.status == 0) { |
diff --git a/include/asm-ia64/sn/tioca.h b/include/asm-ia64/sn/tioca.h index bc1aacfb9483..666222d7f0f6 100644 --- a/include/asm-ia64/sn/tioca.h +++ b/include/asm-ia64/sn/tioca.h | |||
@@ -19,47 +19,47 @@ | |||
19 | */ | 19 | */ |
20 | 20 | ||
21 | struct tioca { | 21 | struct tioca { |
22 | uint64_t ca_id; /* 0x000000 */ | 22 | u64 ca_id; /* 0x000000 */ |
23 | uint64_t ca_control1; /* 0x000008 */ | 23 | u64 ca_control1; /* 0x000008 */ |
24 | uint64_t ca_control2; /* 0x000010 */ | 24 | u64 ca_control2; /* 0x000010 */ |
25 | uint64_t ca_status1; /* 0x000018 */ | 25 | u64 ca_status1; /* 0x000018 */ |
26 | uint64_t ca_status2; /* 0x000020 */ | 26 | u64 ca_status2; /* 0x000020 */ |
27 | uint64_t ca_gart_aperature; /* 0x000028 */ | 27 | u64 ca_gart_aperature; /* 0x000028 */ |
28 | uint64_t ca_gfx_detach; /* 0x000030 */ | 28 | u64 ca_gfx_detach; /* 0x000030 */ |
29 | uint64_t ca_inta_dest_addr; /* 0x000038 */ | 29 | u64 ca_inta_dest_addr; /* 0x000038 */ |
30 | uint64_t ca_intb_dest_addr; /* 0x000040 */ | 30 | u64 ca_intb_dest_addr; /* 0x000040 */ |
31 | uint64_t ca_err_int_dest_addr; /* 0x000048 */ | 31 | u64 ca_err_int_dest_addr; /* 0x000048 */ |
32 | uint64_t ca_int_status; /* 0x000050 */ | 32 | u64 ca_int_status; /* 0x000050 */ |
33 | uint64_t ca_int_status_alias; /* 0x000058 */ | 33 | u64 ca_int_status_alias; /* 0x000058 */ |
34 | uint64_t ca_mult_error; /* 0x000060 */ | 34 | u64 ca_mult_error; /* 0x000060 */ |
35 | uint64_t ca_mult_error_alias; /* 0x000068 */ | 35 | u64 ca_mult_error_alias; /* 0x000068 */ |
36 | uint64_t ca_first_error; /* 0x000070 */ | 36 | u64 ca_first_error; /* 0x000070 */ |
37 | uint64_t ca_int_mask; /* 0x000078 */ | 37 | u64 ca_int_mask; /* 0x000078 */ |
38 | uint64_t ca_crm_pkterr_type; /* 0x000080 */ | 38 | u64 ca_crm_pkterr_type; /* 0x000080 */ |
39 | uint64_t ca_crm_pkterr_type_alias; /* 0x000088 */ | 39 | u64 ca_crm_pkterr_type_alias; /* 0x000088 */ |
40 | uint64_t ca_crm_ct_error_detail_1; /* 0x000090 */ | 40 | u64 ca_crm_ct_error_detail_1; /* 0x000090 */ |
41 | uint64_t ca_crm_ct_error_detail_2; /* 0x000098 */ | 41 | u64 ca_crm_ct_error_detail_2; /* 0x000098 */ |
42 | uint64_t ca_crm_tnumto; /* 0x0000A0 */ | 42 | u64 ca_crm_tnumto; /* 0x0000A0 */ |
43 | uint64_t ca_gart_err; /* 0x0000A8 */ | 43 | u64 ca_gart_err; /* 0x0000A8 */ |
44 | uint64_t ca_pcierr_type; /* 0x0000B0 */ | 44 | u64 ca_pcierr_type; /* 0x0000B0 */ |
45 | uint64_t ca_pcierr_addr; /* 0x0000B8 */ | 45 | u64 ca_pcierr_addr; /* 0x0000B8 */ |
46 | 46 | ||
47 | uint64_t ca_pad_0000C0[3]; /* 0x0000{C0..D0} */ | 47 | u64 ca_pad_0000C0[3]; /* 0x0000{C0..D0} */ |
48 | 48 | ||
49 | uint64_t ca_pci_rd_buf_flush; /* 0x0000D8 */ | 49 | u64 ca_pci_rd_buf_flush; /* 0x0000D8 */ |
50 | uint64_t ca_pci_dma_addr_extn; /* 0x0000E0 */ | 50 | u64 ca_pci_dma_addr_extn; /* 0x0000E0 */ |
51 | uint64_t ca_agp_dma_addr_extn; /* 0x0000E8 */ | 51 | u64 ca_agp_dma_addr_extn; /* 0x0000E8 */ |
52 | uint64_t ca_force_inta; /* 0x0000F0 */ | 52 | u64 ca_force_inta; /* 0x0000F0 */ |
53 | uint64_t ca_force_intb; /* 0x0000F8 */ | 53 | u64 ca_force_intb; /* 0x0000F8 */ |
54 | uint64_t ca_debug_vector_sel; /* 0x000100 */ | 54 | u64 ca_debug_vector_sel; /* 0x000100 */ |
55 | uint64_t ca_debug_mux_core_sel; /* 0x000108 */ | 55 | u64 ca_debug_mux_core_sel; /* 0x000108 */ |
56 | uint64_t ca_debug_mux_pci_sel; /* 0x000110 */ | 56 | u64 ca_debug_mux_pci_sel; /* 0x000110 */ |
57 | uint64_t ca_debug_domain_sel; /* 0x000118 */ | 57 | u64 ca_debug_domain_sel; /* 0x000118 */ |
58 | 58 | ||
59 | uint64_t ca_pad_000120[28]; /* 0x0001{20..F8} */ | 59 | u64 ca_pad_000120[28]; /* 0x0001{20..F8} */ |
60 | 60 | ||
61 | uint64_t ca_gart_ptr_table; /* 0x200 */ | 61 | u64 ca_gart_ptr_table; /* 0x200 */ |
62 | uint64_t ca_gart_tlb_addr[8]; /* 0x2{08..40} */ | 62 | u64 ca_gart_tlb_addr[8]; /* 0x2{08..40} */ |
63 | }; | 63 | }; |
64 | 64 | ||
65 | /* | 65 | /* |
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h index b532ef6148ed..ab7fe2463468 100644 --- a/include/asm-ia64/sn/tioca_provider.h +++ b/include/asm-ia64/sn/tioca_provider.h | |||
@@ -56,31 +56,31 @@ struct tioca_kernel { | |||
56 | /* | 56 | /* |
57 | * General GART stuff | 57 | * General GART stuff |
58 | */ | 58 | */ |
59 | uint64_t ca_ap_size; /* size of aperature in bytes */ | 59 | u64 ca_ap_size; /* size of aperature in bytes */ |
60 | uint32_t ca_gart_entries; /* # uint64_t entries in gart */ | 60 | u32 ca_gart_entries; /* # u64 entries in gart */ |
61 | uint32_t ca_ap_pagesize; /* aperature page size in bytes */ | 61 | u32 ca_ap_pagesize; /* aperature page size in bytes */ |
62 | uint64_t ca_ap_bus_base; /* bus address of CA aperature */ | 62 | u64 ca_ap_bus_base; /* bus address of CA aperature */ |
63 | uint64_t ca_gart_size; /* gart size in bytes */ | 63 | u64 ca_gart_size; /* gart size in bytes */ |
64 | uint64_t *ca_gart; /* gart table vaddr */ | 64 | u64 *ca_gart; /* gart table vaddr */ |
65 | uint64_t ca_gart_coretalk_addr; /* gart coretalk addr */ | 65 | u64 ca_gart_coretalk_addr; /* gart coretalk addr */ |
66 | uint8_t ca_gart_iscoherent; /* used in tioca_tlbflush */ | 66 | u8 ca_gart_iscoherent; /* used in tioca_tlbflush */ |
67 | 67 | ||
68 | /* PCI GART convenience values */ | 68 | /* PCI GART convenience values */ |
69 | uint64_t ca_pciap_base; /* pci aperature bus base address */ | 69 | u64 ca_pciap_base; /* pci aperature bus base address */ |
70 | uint64_t ca_pciap_size; /* pci aperature size (bytes) */ | 70 | u64 ca_pciap_size; /* pci aperature size (bytes) */ |
71 | uint64_t ca_pcigart_base; /* gfx GART bus base address */ | 71 | u64 ca_pcigart_base; /* gfx GART bus base address */ |
72 | uint64_t *ca_pcigart; /* gfx GART vm address */ | 72 | u64 *ca_pcigart; /* gfx GART vm address */ |
73 | uint32_t ca_pcigart_entries; | 73 | u32 ca_pcigart_entries; |
74 | uint32_t ca_pcigart_start; /* PCI start index in ca_gart */ | 74 | u32 ca_pcigart_start; /* PCI start index in ca_gart */ |
75 | void *ca_pcigart_pagemap; | 75 | void *ca_pcigart_pagemap; |
76 | 76 | ||
77 | /* AGP GART convenience values */ | 77 | /* AGP GART convenience values */ |
78 | uint64_t ca_gfxap_base; /* gfx aperature bus base address */ | 78 | u64 ca_gfxap_base; /* gfx aperature bus base address */ |
79 | uint64_t ca_gfxap_size; /* gfx aperature size (bytes) */ | 79 | u64 ca_gfxap_size; /* gfx aperature size (bytes) */ |
80 | uint64_t ca_gfxgart_base; /* gfx GART bus base address */ | 80 | u64 ca_gfxgart_base; /* gfx GART bus base address */ |
81 | uint64_t *ca_gfxgart; /* gfx GART vm address */ | 81 | u64 *ca_gfxgart; /* gfx GART vm address */ |
82 | uint32_t ca_gfxgart_entries; | 82 | u32 ca_gfxgart_entries; |
83 | uint32_t ca_gfxgart_start; /* agpgart start index in ca_gart */ | 83 | u32 ca_gfxgart_start; /* agpgart start index in ca_gart */ |
84 | }; | 84 | }; |
85 | 85 | ||
86 | /* | 86 | /* |
@@ -93,11 +93,11 @@ struct tioca_kernel { | |||
93 | struct tioca_common { | 93 | struct tioca_common { |
94 | struct pcibus_bussoft ca_common; /* common pciio header */ | 94 | struct pcibus_bussoft ca_common; /* common pciio header */ |
95 | 95 | ||
96 | uint32_t ca_rev; | 96 | u32 ca_rev; |
97 | uint32_t ca_closest_nasid; | 97 | u32 ca_closest_nasid; |
98 | 98 | ||
99 | uint64_t ca_prom_private; | 99 | u64 ca_prom_private; |
100 | uint64_t ca_kernel_private; | 100 | u64 ca_kernel_private; |
101 | }; | 101 | }; |
102 | 102 | ||
103 | /** | 103 | /** |
@@ -139,9 +139,9 @@ tioca_paddr_to_gart(unsigned long paddr) | |||
139 | */ | 139 | */ |
140 | 140 | ||
141 | static inline unsigned long | 141 | static inline unsigned long |
142 | tioca_physpage_to_gart(uint64_t page_addr) | 142 | tioca_physpage_to_gart(u64 page_addr) |
143 | { | 143 | { |
144 | uint64_t coretalk_addr; | 144 | u64 coretalk_addr; |
145 | 145 | ||
146 | coretalk_addr = PHYS_TO_TIODMA(page_addr); | 146 | coretalk_addr = PHYS_TO_TIODMA(page_addr); |
147 | if (!coretalk_addr) { | 147 | if (!coretalk_addr) { |
@@ -161,7 +161,7 @@ tioca_physpage_to_gart(uint64_t page_addr) | |||
161 | static inline void | 161 | static inline void |
162 | tioca_tlbflush(struct tioca_kernel *tioca_kernel) | 162 | tioca_tlbflush(struct tioca_kernel *tioca_kernel) |
163 | { | 163 | { |
164 | volatile uint64_t tmp; | 164 | volatile u64 tmp; |
165 | volatile struct tioca *ca_base; | 165 | volatile struct tioca *ca_base; |
166 | struct tioca_common *tioca_common; | 166 | struct tioca_common *tioca_common; |
167 | 167 | ||
@@ -200,7 +200,7 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel) | |||
200 | tmp = __sn_readq_relaxed(&ca_base->ca_control2); | 200 | tmp = __sn_readq_relaxed(&ca_base->ca_control2); |
201 | } | 201 | } |
202 | 202 | ||
203 | extern uint32_t tioca_gart_found; | 203 | extern u32 tioca_gart_found; |
204 | extern struct list_head tioca_list; | 204 | extern struct list_head tioca_list; |
205 | extern int tioca_init_provider(void); | 205 | extern int tioca_init_provider(void); |
206 | extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern); | 206 | extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern); |
diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h index ecaddf960086..d4c990712eac 100644 --- a/include/asm-ia64/sn/tioce.h +++ b/include/asm-ia64/sn/tioce.h | |||
@@ -35,72 +35,72 @@ typedef volatile struct tioce { | |||
35 | /* | 35 | /* |
36 | * ADMIN : Administration Registers | 36 | * ADMIN : Administration Registers |
37 | */ | 37 | */ |
38 | uint64_t ce_adm_id; /* 0x000000 */ | 38 | u64 ce_adm_id; /* 0x000000 */ |
39 | uint64_t ce_pad_000008; /* 0x000008 */ | 39 | u64 ce_pad_000008; /* 0x000008 */ |
40 | uint64_t ce_adm_dyn_credit_status; /* 0x000010 */ | 40 | u64 ce_adm_dyn_credit_status; /* 0x000010 */ |
41 | uint64_t ce_adm_last_credit_status; /* 0x000018 */ | 41 | u64 ce_adm_last_credit_status; /* 0x000018 */ |
42 | uint64_t ce_adm_credit_limit; /* 0x000020 */ | 42 | u64 ce_adm_credit_limit; /* 0x000020 */ |
43 | uint64_t ce_adm_force_credit; /* 0x000028 */ | 43 | u64 ce_adm_force_credit; /* 0x000028 */ |
44 | uint64_t ce_adm_control; /* 0x000030 */ | 44 | u64 ce_adm_control; /* 0x000030 */ |
45 | uint64_t ce_adm_mmr_chn_timeout; /* 0x000038 */ | 45 | u64 ce_adm_mmr_chn_timeout; /* 0x000038 */ |
46 | uint64_t ce_adm_ssp_ure_timeout; /* 0x000040 */ | 46 | u64 ce_adm_ssp_ure_timeout; /* 0x000040 */ |
47 | uint64_t ce_adm_ssp_dre_timeout; /* 0x000048 */ | 47 | u64 ce_adm_ssp_dre_timeout; /* 0x000048 */ |
48 | uint64_t ce_adm_ssp_debug_sel; /* 0x000050 */ | 48 | u64 ce_adm_ssp_debug_sel; /* 0x000050 */ |
49 | uint64_t ce_adm_int_status; /* 0x000058 */ | 49 | u64 ce_adm_int_status; /* 0x000058 */ |
50 | uint64_t ce_adm_int_status_alias; /* 0x000060 */ | 50 | u64 ce_adm_int_status_alias; /* 0x000060 */ |
51 | uint64_t ce_adm_int_mask; /* 0x000068 */ | 51 | u64 ce_adm_int_mask; /* 0x000068 */ |
52 | uint64_t ce_adm_int_pending; /* 0x000070 */ | 52 | u64 ce_adm_int_pending; /* 0x000070 */ |
53 | uint64_t ce_adm_force_int; /* 0x000078 */ | 53 | u64 ce_adm_force_int; /* 0x000078 */ |
54 | uint64_t ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ | 54 | u64 ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ |
55 | uint64_t ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ | 55 | u64 ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ |
56 | uint64_t ce_adm_error_summary; /* 0x000100 */ | 56 | u64 ce_adm_error_summary; /* 0x000100 */ |
57 | uint64_t ce_adm_error_summary_alias; /* 0x000108 */ | 57 | u64 ce_adm_error_summary_alias; /* 0x000108 */ |
58 | uint64_t ce_adm_error_mask; /* 0x000110 */ | 58 | u64 ce_adm_error_mask; /* 0x000110 */ |
59 | uint64_t ce_adm_first_error; /* 0x000118 */ | 59 | u64 ce_adm_first_error; /* 0x000118 */ |
60 | uint64_t ce_adm_error_overflow; /* 0x000120 */ | 60 | u64 ce_adm_error_overflow; /* 0x000120 */ |
61 | uint64_t ce_adm_error_overflow_alias; /* 0x000128 */ | 61 | u64 ce_adm_error_overflow_alias; /* 0x000128 */ |
62 | uint64_t ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ | 62 | u64 ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ |
63 | uint64_t ce_adm_tnum_error; /* 0x000140 */ | 63 | u64 ce_adm_tnum_error; /* 0x000140 */ |
64 | uint64_t ce_adm_mmr_err_detail; /* 0x000148 */ | 64 | u64 ce_adm_mmr_err_detail; /* 0x000148 */ |
65 | uint64_t ce_adm_msg_sram_perr_detail; /* 0x000150 */ | 65 | u64 ce_adm_msg_sram_perr_detail; /* 0x000150 */ |
66 | uint64_t ce_adm_bap_sram_perr_detail; /* 0x000158 */ | 66 | u64 ce_adm_bap_sram_perr_detail; /* 0x000158 */ |
67 | uint64_t ce_adm_ce_sram_perr_detail; /* 0x000160 */ | 67 | u64 ce_adm_ce_sram_perr_detail; /* 0x000160 */ |
68 | uint64_t ce_adm_ce_credit_oflow_detail; /* 0x000168 */ | 68 | u64 ce_adm_ce_credit_oflow_detail; /* 0x000168 */ |
69 | uint64_t ce_adm_tx_link_idle_max_timer; /* 0x000170 */ | 69 | u64 ce_adm_tx_link_idle_max_timer; /* 0x000170 */ |
70 | uint64_t ce_adm_pcie_debug_sel; /* 0x000178 */ | 70 | u64 ce_adm_pcie_debug_sel; /* 0x000178 */ |
71 | uint64_t ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ | 71 | u64 ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ |
72 | 72 | ||
73 | uint64_t ce_adm_pcie_debug_sel_top; /* 0x000200 */ | 73 | u64 ce_adm_pcie_debug_sel_top; /* 0x000200 */ |
74 | uint64_t ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ | 74 | u64 ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ |
75 | uint64_t ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ | 75 | u64 ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ |
76 | uint64_t ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ | 76 | u64 ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ |
77 | uint64_t ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ | 77 | u64 ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ |
78 | uint64_t ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ | 78 | u64 ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ |
79 | uint64_t ce_adm_pcie_trig_compare_top; /* 0x000230 */ | 79 | u64 ce_adm_pcie_trig_compare_top; /* 0x000230 */ |
80 | uint64_t ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ | 80 | u64 ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ |
81 | uint64_t ce_adm_ssp_debug_sel_top; /* 0x000240 */ | 81 | u64 ce_adm_ssp_debug_sel_top; /* 0x000240 */ |
82 | uint64_t ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ | 82 | u64 ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ |
83 | uint64_t ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ | 83 | u64 ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ |
84 | uint64_t ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ | 84 | u64 ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ |
85 | uint64_t ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ | 85 | u64 ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ |
86 | uint64_t ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ | 86 | u64 ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ |
87 | uint64_t ce_adm_ssp_trig_compare_top; /* 0x000270 */ | 87 | u64 ce_adm_ssp_trig_compare_top; /* 0x000270 */ |
88 | uint64_t ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ | 88 | u64 ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ |
89 | uint64_t ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ | 89 | u64 ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ |
90 | 90 | ||
91 | uint64_t ce_adm_bap_ctrl; /* 0x000400 */ | 91 | u64 ce_adm_bap_ctrl; /* 0x000400 */ |
92 | uint64_t ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ | 92 | u64 ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ |
93 | 93 | ||
94 | uint64_t ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ | 94 | u64 ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ |
95 | uint64_t ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ | 95 | u64 ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ |
96 | 96 | ||
97 | uint64_t ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ | 97 | u64 ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ |
98 | uint64_t ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ | 98 | u64 ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ |
99 | 99 | ||
100 | uint64_t ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ | 100 | u64 ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ |
101 | uint64_t ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ | 101 | u64 ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ |
102 | 102 | ||
103 | uint64_t ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ | 103 | u64 ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ |
104 | 104 | ||
105 | /* | 105 | /* |
106 | * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2) | 106 | * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2) |
@@ -109,141 +109,141 @@ typedef volatile struct tioce { | |||
109 | */ | 109 | */ |
110 | #define ce_lsi(link_num) ce_lsi[link_num-1] | 110 | #define ce_lsi(link_num) ce_lsi[link_num-1] |
111 | struct ce_lsi_reg { | 111 | struct ce_lsi_reg { |
112 | uint64_t ce_lsi_lpu_id; /* 0x00z000 */ | 112 | u64 ce_lsi_lpu_id; /* 0x00z000 */ |
113 | uint64_t ce_lsi_rst; /* 0x00z008 */ | 113 | u64 ce_lsi_rst; /* 0x00z008 */ |
114 | uint64_t ce_lsi_dbg_stat; /* 0x00z010 */ | 114 | u64 ce_lsi_dbg_stat; /* 0x00z010 */ |
115 | uint64_t ce_lsi_dbg_cfg; /* 0x00z018 */ | 115 | u64 ce_lsi_dbg_cfg; /* 0x00z018 */ |
116 | uint64_t ce_lsi_ltssm_ctrl; /* 0x00z020 */ | 116 | u64 ce_lsi_ltssm_ctrl; /* 0x00z020 */ |
117 | uint64_t ce_lsi_lk_stat; /* 0x00z028 */ | 117 | u64 ce_lsi_lk_stat; /* 0x00z028 */ |
118 | uint64_t ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ | 118 | u64 ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ |
119 | uint64_t ce_lsi_int_and_stat; /* 0x00z040 */ | 119 | u64 ce_lsi_int_and_stat; /* 0x00z040 */ |
120 | uint64_t ce_lsi_int_mask; /* 0x00z048 */ | 120 | u64 ce_lsi_int_mask; /* 0x00z048 */ |
121 | uint64_t ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ | 121 | u64 ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ |
122 | uint64_t ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ | 122 | u64 ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ |
123 | uint64_t ce_pad_00z108; /* 0x00z108 */ | 123 | u64 ce_pad_00z108; /* 0x00z108 */ |
124 | uint64_t ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ | 124 | u64 ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ |
125 | uint64_t ce_pad_00z118; /* 0x00z118 */ | 125 | u64 ce_pad_00z118; /* 0x00z118 */ |
126 | uint64_t ce_lsi_lk_perf_cnt1; /* 0x00z120 */ | 126 | u64 ce_lsi_lk_perf_cnt1; /* 0x00z120 */ |
127 | uint64_t ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ | 127 | u64 ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ |
128 | uint64_t ce_lsi_lk_perf_cnt2; /* 0x00z130 */ | 128 | u64 ce_lsi_lk_perf_cnt2; /* 0x00z130 */ |
129 | uint64_t ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ | 129 | u64 ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ |
130 | uint64_t ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ | 130 | u64 ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ |
131 | uint64_t ce_lsi_lk_lyr_cfg; /* 0x00z200 */ | 131 | u64 ce_lsi_lk_lyr_cfg; /* 0x00z200 */ |
132 | uint64_t ce_lsi_lk_lyr_status; /* 0x00z208 */ | 132 | u64 ce_lsi_lk_lyr_status; /* 0x00z208 */ |
133 | uint64_t ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ | 133 | u64 ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ |
134 | uint64_t ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ | 134 | u64 ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ |
135 | uint64_t ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ | 135 | u64 ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ |
136 | uint64_t ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ | 136 | u64 ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ |
137 | uint64_t ce_lsi_fc_upd_ctl; /* 0x00z240 */ | 137 | u64 ce_lsi_fc_upd_ctl; /* 0x00z240 */ |
138 | uint64_t ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ | 138 | u64 ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ |
139 | uint64_t ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ | 139 | u64 ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ |
140 | uint64_t ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ | 140 | u64 ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ |
141 | uint64_t ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ | 141 | u64 ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ |
142 | uint64_t ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ | 142 | u64 ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ |
143 | uint64_t ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ | 143 | u64 ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ |
144 | uint64_t ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ | 144 | u64 ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ |
145 | uint64_t ce_lsi_rply_tmr_thr; /* 0x00z410 */ | 145 | u64 ce_lsi_rply_tmr_thr; /* 0x00z410 */ |
146 | uint64_t ce_lsi_rply_tmr; /* 0x00z418 */ | 146 | u64 ce_lsi_rply_tmr; /* 0x00z418 */ |
147 | uint64_t ce_lsi_rply_num_stat; /* 0x00z420 */ | 147 | u64 ce_lsi_rply_num_stat; /* 0x00z420 */ |
148 | uint64_t ce_lsi_rty_buf_max_addr; /* 0x00z428 */ | 148 | u64 ce_lsi_rty_buf_max_addr; /* 0x00z428 */ |
149 | uint64_t ce_lsi_rty_fifo_ptr; /* 0x00z430 */ | 149 | u64 ce_lsi_rty_fifo_ptr; /* 0x00z430 */ |
150 | uint64_t ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ | 150 | u64 ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ |
151 | uint64_t ce_lsi_rty_fifo_cred; /* 0x00z440 */ | 151 | u64 ce_lsi_rty_fifo_cred; /* 0x00z440 */ |
152 | uint64_t ce_lsi_seq_cnt; /* 0x00z448 */ | 152 | u64 ce_lsi_seq_cnt; /* 0x00z448 */ |
153 | uint64_t ce_lsi_ack_sent_seq_num; /* 0x00z450 */ | 153 | u64 ce_lsi_ack_sent_seq_num; /* 0x00z450 */ |
154 | uint64_t ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ | 154 | u64 ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ |
155 | uint64_t ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ | 155 | u64 ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ |
156 | uint64_t ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ | 156 | u64 ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ |
157 | uint64_t ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ | 157 | u64 ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ |
158 | uint64_t ce_pad_00z478; /* 0x00z478 */ | 158 | u64 ce_pad_00z478; /* 0x00z478 */ |
159 | uint64_t ce_lsi_mem_addr_ctl; /* 0x00z480 */ | 159 | u64 ce_lsi_mem_addr_ctl; /* 0x00z480 */ |
160 | uint64_t ce_lsi_mem_d_ld0; /* 0x00z488 */ | 160 | u64 ce_lsi_mem_d_ld0; /* 0x00z488 */ |
161 | uint64_t ce_lsi_mem_d_ld1; /* 0x00z490 */ | 161 | u64 ce_lsi_mem_d_ld1; /* 0x00z490 */ |
162 | uint64_t ce_lsi_mem_d_ld2; /* 0x00z498 */ | 162 | u64 ce_lsi_mem_d_ld2; /* 0x00z498 */ |
163 | uint64_t ce_lsi_mem_d_ld3; /* 0x00z4A0 */ | 163 | u64 ce_lsi_mem_d_ld3; /* 0x00z4A0 */ |
164 | uint64_t ce_lsi_mem_d_ld4; /* 0x00z4A8 */ | 164 | u64 ce_lsi_mem_d_ld4; /* 0x00z4A8 */ |
165 | uint64_t ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ | 165 | u64 ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ |
166 | uint64_t ce_lsi_rty_d_cnt; /* 0x00z4C0 */ | 166 | u64 ce_lsi_rty_d_cnt; /* 0x00z4C0 */ |
167 | uint64_t ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ | 167 | u64 ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ |
168 | uint64_t ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ | 168 | u64 ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ |
169 | uint64_t ce_pad_00z4D8; /* 0x00z4D8 */ | 169 | u64 ce_pad_00z4D8; /* 0x00z4D8 */ |
170 | uint64_t ce_lsi_ack_lat_thr; /* 0x00z4E0 */ | 170 | u64 ce_lsi_ack_lat_thr; /* 0x00z4E0 */ |
171 | uint64_t ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ | 171 | u64 ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ |
172 | uint64_t ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ | 172 | u64 ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ |
173 | uint64_t ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ | 173 | u64 ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ |
174 | uint64_t ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ | 174 | u64 ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ |
175 | uint64_t ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ | 175 | u64 ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ |
176 | uint64_t ce_lsi_phy_lyr_cfg; /* 0x00z600 */ | 176 | u64 ce_lsi_phy_lyr_cfg; /* 0x00z600 */ |
177 | uint64_t ce_pad_00z608; /* 0x00z608 */ | 177 | u64 ce_pad_00z608; /* 0x00z608 */ |
178 | uint64_t ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ | 178 | u64 ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ |
179 | uint64_t ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ | 179 | u64 ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ |
180 | uint64_t ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ | 180 | u64 ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ |
181 | uint64_t ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ | 181 | u64 ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ |
182 | uint64_t ce_lsi_rcv_phy_cfg; /* 0x00z680 */ | 182 | u64 ce_lsi_rcv_phy_cfg; /* 0x00z680 */ |
183 | uint64_t ce_lsi_rcv_phy_stat1; /* 0x00z688 */ | 183 | u64 ce_lsi_rcv_phy_stat1; /* 0x00z688 */ |
184 | uint64_t ce_lsi_rcv_phy_stat2; /* 0x00z690 */ | 184 | u64 ce_lsi_rcv_phy_stat2; /* 0x00z690 */ |
185 | uint64_t ce_lsi_rcv_phy_stat3; /* 0x00z698 */ | 185 | u64 ce_lsi_rcv_phy_stat3; /* 0x00z698 */ |
186 | uint64_t ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ | 186 | u64 ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ |
187 | uint64_t ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ | 187 | u64 ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ |
188 | uint64_t ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ | 188 | u64 ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ |
189 | uint64_t ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ | 189 | u64 ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ |
190 | uint64_t ce_lsi_tx_phy_cfg; /* 0x00z700 */ | 190 | u64 ce_lsi_tx_phy_cfg; /* 0x00z700 */ |
191 | uint64_t ce_lsi_tx_phy_stat; /* 0x00z708 */ | 191 | u64 ce_lsi_tx_phy_stat; /* 0x00z708 */ |
192 | uint64_t ce_lsi_tx_phy_int_stat; /* 0x00z710 */ | 192 | u64 ce_lsi_tx_phy_int_stat; /* 0x00z710 */ |
193 | uint64_t ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ | 193 | u64 ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ |
194 | uint64_t ce_lsi_tx_phy_int_mask; /* 0x00z720 */ | 194 | u64 ce_lsi_tx_phy_int_mask; /* 0x00z720 */ |
195 | uint64_t ce_lsi_tx_phy_stat2; /* 0x00z728 */ | 195 | u64 ce_lsi_tx_phy_stat2; /* 0x00z728 */ |
196 | uint64_t ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ | 196 | u64 ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ |
197 | uint64_t ce_lsi_ltssm_cfg1; /* 0x00z780 */ | 197 | u64 ce_lsi_ltssm_cfg1; /* 0x00z780 */ |
198 | uint64_t ce_lsi_ltssm_cfg2; /* 0x00z788 */ | 198 | u64 ce_lsi_ltssm_cfg2; /* 0x00z788 */ |
199 | uint64_t ce_lsi_ltssm_cfg3; /* 0x00z790 */ | 199 | u64 ce_lsi_ltssm_cfg3; /* 0x00z790 */ |
200 | uint64_t ce_lsi_ltssm_cfg4; /* 0x00z798 */ | 200 | u64 ce_lsi_ltssm_cfg4; /* 0x00z798 */ |
201 | uint64_t ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ | 201 | u64 ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ |
202 | uint64_t ce_lsi_ltssm_stat1; /* 0x00z7A8 */ | 202 | u64 ce_lsi_ltssm_stat1; /* 0x00z7A8 */ |
203 | uint64_t ce_lsi_ltssm_stat2; /* 0x00z7B0 */ | 203 | u64 ce_lsi_ltssm_stat2; /* 0x00z7B0 */ |
204 | uint64_t ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ | 204 | u64 ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ |
205 | uint64_t ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ | 205 | u64 ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ |
206 | uint64_t ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ | 206 | u64 ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ |
207 | uint64_t ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ | 207 | u64 ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ |
208 | uint64_t ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ | 208 | u64 ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ |
209 | uint64_t ce_lsi_gb_cfg1; /* 0x00z800 */ | 209 | u64 ce_lsi_gb_cfg1; /* 0x00z800 */ |
210 | uint64_t ce_lsi_gb_cfg2; /* 0x00z808 */ | 210 | u64 ce_lsi_gb_cfg2; /* 0x00z808 */ |
211 | uint64_t ce_lsi_gb_cfg3; /* 0x00z810 */ | 211 | u64 ce_lsi_gb_cfg3; /* 0x00z810 */ |
212 | uint64_t ce_lsi_gb_cfg4; /* 0x00z818 */ | 212 | u64 ce_lsi_gb_cfg4; /* 0x00z818 */ |
213 | uint64_t ce_lsi_gb_stat; /* 0x00z820 */ | 213 | u64 ce_lsi_gb_stat; /* 0x00z820 */ |
214 | uint64_t ce_lsi_gb_int_stat; /* 0x00z828 */ | 214 | u64 ce_lsi_gb_int_stat; /* 0x00z828 */ |
215 | uint64_t ce_lsi_gb_int_stat_test; /* 0x00z830 */ | 215 | u64 ce_lsi_gb_int_stat_test; /* 0x00z830 */ |
216 | uint64_t ce_lsi_gb_int_mask; /* 0x00z838 */ | 216 | u64 ce_lsi_gb_int_mask; /* 0x00z838 */ |
217 | uint64_t ce_lsi_gb_pwr_dn1; /* 0x00z840 */ | 217 | u64 ce_lsi_gb_pwr_dn1; /* 0x00z840 */ |
218 | uint64_t ce_lsi_gb_pwr_dn2; /* 0x00z848 */ | 218 | u64 ce_lsi_gb_pwr_dn2; /* 0x00z848 */ |
219 | uint64_t ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ | 219 | u64 ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ |
220 | } ce_lsi[2]; | 220 | } ce_lsi[2]; |
221 | 221 | ||
222 | uint64_t ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ | 222 | u64 ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ |
223 | 223 | ||
224 | /* | 224 | /* |
225 | * CRM: Coretalk Receive Module Registers | 225 | * CRM: Coretalk Receive Module Registers |
226 | */ | 226 | */ |
227 | uint64_t ce_crm_debug_mux; /* 0x004050 */ | 227 | u64 ce_crm_debug_mux; /* 0x004050 */ |
228 | uint64_t ce_pad_004058; /* 0x004058 */ | 228 | u64 ce_pad_004058; /* 0x004058 */ |
229 | uint64_t ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ | 229 | u64 ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ |
230 | uint64_t ce_crm_ssp_err_addr; /* 0x004068 */ | 230 | u64 ce_crm_ssp_err_addr; /* 0x004068 */ |
231 | uint64_t ce_crm_ssp_err_syn; /* 0x004070 */ | 231 | u64 ce_crm_ssp_err_syn; /* 0x004070 */ |
232 | 232 | ||
233 | uint64_t ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ | 233 | u64 ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ |
234 | 234 | ||
235 | /* | 235 | /* |
236 | * CXM: Coretalk Xmit Module Registers | 236 | * CXM: Coretalk Xmit Module Registers |
237 | */ | 237 | */ |
238 | uint64_t ce_cxm_dyn_credit_status; /* 0x005010 */ | 238 | u64 ce_cxm_dyn_credit_status; /* 0x005010 */ |
239 | uint64_t ce_cxm_last_credit_status; /* 0x005018 */ | 239 | u64 ce_cxm_last_credit_status; /* 0x005018 */ |
240 | uint64_t ce_cxm_credit_limit; /* 0x005020 */ | 240 | u64 ce_cxm_credit_limit; /* 0x005020 */ |
241 | uint64_t ce_cxm_force_credit; /* 0x005028 */ | 241 | u64 ce_cxm_force_credit; /* 0x005028 */ |
242 | uint64_t ce_cxm_disable_bypass; /* 0x005030 */ | 242 | u64 ce_cxm_disable_bypass; /* 0x005030 */ |
243 | uint64_t ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ | 243 | u64 ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ |
244 | uint64_t ce_cxm_debug_mux; /* 0x005050 */ | 244 | u64 ce_cxm_debug_mux; /* 0x005050 */ |
245 | 245 | ||
246 | uint64_t ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ | 246 | u64 ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ |
247 | 247 | ||
248 | /* | 248 | /* |
249 | * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2) | 249 | * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2) |
@@ -258,209 +258,209 @@ typedef volatile struct tioce { | |||
258 | #define ce_utl(link_num) ce_dtl_utl[link_num-1] | 258 | #define ce_utl(link_num) ce_dtl_utl[link_num-1] |
259 | struct ce_dtl_utl_reg { | 259 | struct ce_dtl_utl_reg { |
260 | /* DTL */ | 260 | /* DTL */ |
261 | uint64_t ce_dtl_dtdr_credit_limit; /* 0x00y000 */ | 261 | u64 ce_dtl_dtdr_credit_limit; /* 0x00y000 */ |
262 | uint64_t ce_dtl_dtdr_credit_force; /* 0x00y008 */ | 262 | u64 ce_dtl_dtdr_credit_force; /* 0x00y008 */ |
263 | uint64_t ce_dtl_dyn_credit_status; /* 0x00y010 */ | 263 | u64 ce_dtl_dyn_credit_status; /* 0x00y010 */ |
264 | uint64_t ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ | 264 | u64 ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ |
265 | uint64_t ce_dtl_dtl_ctrl; /* 0x00y020 */ | 265 | u64 ce_dtl_dtl_ctrl; /* 0x00y020 */ |
266 | uint64_t ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ | 266 | u64 ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ |
267 | uint64_t ce_dtl_debug_sel; /* 0x00y050 */ | 267 | u64 ce_dtl_debug_sel; /* 0x00y050 */ |
268 | uint64_t ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ | 268 | u64 ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ |
269 | 269 | ||
270 | /* UTL */ | 270 | /* UTL */ |
271 | uint64_t ce_utl_utl_ctrl; /* 0x00z000 */ | 271 | u64 ce_utl_utl_ctrl; /* 0x00z000 */ |
272 | uint64_t ce_utl_debug_sel; /* 0x00z008 */ | 272 | u64 ce_utl_debug_sel; /* 0x00z008 */ |
273 | uint64_t ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ | 273 | u64 ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ |
274 | } ce_dtl_utl[2]; | 274 | } ce_dtl_utl[2]; |
275 | 275 | ||
276 | uint64_t ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ | 276 | u64 ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ |
277 | 277 | ||
278 | /* | 278 | /* |
279 | * URE: Upstream Request Engine | 279 | * URE: Upstream Request Engine |
280 | */ | 280 | */ |
281 | uint64_t ce_ure_dyn_credit_status; /* 0x00B010 */ | 281 | u64 ce_ure_dyn_credit_status; /* 0x00B010 */ |
282 | uint64_t ce_ure_last_credit_status; /* 0x00B018 */ | 282 | u64 ce_ure_last_credit_status; /* 0x00B018 */ |
283 | uint64_t ce_ure_credit_limit; /* 0x00B020 */ | 283 | u64 ce_ure_credit_limit; /* 0x00B020 */ |
284 | uint64_t ce_pad_00B028; /* 0x00B028 */ | 284 | u64 ce_pad_00B028; /* 0x00B028 */ |
285 | uint64_t ce_ure_control; /* 0x00B030 */ | 285 | u64 ce_ure_control; /* 0x00B030 */ |
286 | uint64_t ce_ure_status; /* 0x00B038 */ | 286 | u64 ce_ure_status; /* 0x00B038 */ |
287 | uint64_t ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ | 287 | u64 ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ |
288 | uint64_t ce_ure_debug_sel; /* 0x00B050 */ | 288 | u64 ce_ure_debug_sel; /* 0x00B050 */ |
289 | uint64_t ce_ure_pcie_debug_sel; /* 0x00B058 */ | 289 | u64 ce_ure_pcie_debug_sel; /* 0x00B058 */ |
290 | uint64_t ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ | 290 | u64 ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ |
291 | uint64_t ce_ure_ssp_err_addr; /* 0x00B068 */ | 291 | u64 ce_ure_ssp_err_addr; /* 0x00B068 */ |
292 | uint64_t ce_ure_page_map; /* 0x00B070 */ | 292 | u64 ce_ure_page_map; /* 0x00B070 */ |
293 | uint64_t ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ | 293 | u64 ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ |
294 | uint64_t ce_ure_pipe_sel1; /* 0x00B088 */ | 294 | u64 ce_ure_pipe_sel1; /* 0x00B088 */ |
295 | uint64_t ce_ure_pipe_mask1; /* 0x00B090 */ | 295 | u64 ce_ure_pipe_mask1; /* 0x00B090 */ |
296 | uint64_t ce_ure_pipe_sel2; /* 0x00B098 */ | 296 | u64 ce_ure_pipe_sel2; /* 0x00B098 */ |
297 | uint64_t ce_ure_pipe_mask2; /* 0x00B0A0 */ | 297 | u64 ce_ure_pipe_mask2; /* 0x00B0A0 */ |
298 | uint64_t ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ | 298 | u64 ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ |
299 | uint64_t ce_ure_pcie1_credits_used; /* 0x00B0B0 */ | 299 | u64 ce_ure_pcie1_credits_used; /* 0x00B0B0 */ |
300 | uint64_t ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ | 300 | u64 ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ |
301 | uint64_t ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ | 301 | u64 ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ |
302 | uint64_t ce_ure_pcie2_credits_used; /* 0x00B0C8 */ | 302 | u64 ce_ure_pcie2_credits_used; /* 0x00B0C8 */ |
303 | uint64_t ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ | 303 | u64 ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ |
304 | uint64_t ce_ure_pcie_force_credit; /* 0x00B0D8 */ | 304 | u64 ce_ure_pcie_force_credit; /* 0x00B0D8 */ |
305 | uint64_t ce_ure_rd_tnum_val; /* 0x00B0E0 */ | 305 | u64 ce_ure_rd_tnum_val; /* 0x00B0E0 */ |
306 | uint64_t ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ | 306 | u64 ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ |
307 | uint64_t ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ | 307 | u64 ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ |
308 | uint64_t ce_ure_rd_tnum_error; /* 0x00B0F8 */ | 308 | u64 ce_ure_rd_tnum_error; /* 0x00B0F8 */ |
309 | uint64_t ce_ure_rd_tnum_first_cl; /* 0x00B100 */ | 309 | u64 ce_ure_rd_tnum_first_cl; /* 0x00B100 */ |
310 | uint64_t ce_ure_rd_tnum_link_buf; /* 0x00B108 */ | 310 | u64 ce_ure_rd_tnum_link_buf; /* 0x00B108 */ |
311 | uint64_t ce_ure_wr_tnum_val; /* 0x00B110 */ | 311 | u64 ce_ure_wr_tnum_val; /* 0x00B110 */ |
312 | uint64_t ce_ure_sram_err_addr0; /* 0x00B118 */ | 312 | u64 ce_ure_sram_err_addr0; /* 0x00B118 */ |
313 | uint64_t ce_ure_sram_err_addr1; /* 0x00B120 */ | 313 | u64 ce_ure_sram_err_addr1; /* 0x00B120 */ |
314 | uint64_t ce_ure_sram_err_addr2; /* 0x00B128 */ | 314 | u64 ce_ure_sram_err_addr2; /* 0x00B128 */ |
315 | uint64_t ce_ure_sram_rd_addr0; /* 0x00B130 */ | 315 | u64 ce_ure_sram_rd_addr0; /* 0x00B130 */ |
316 | uint64_t ce_ure_sram_rd_addr1; /* 0x00B138 */ | 316 | u64 ce_ure_sram_rd_addr1; /* 0x00B138 */ |
317 | uint64_t ce_ure_sram_rd_addr2; /* 0x00B140 */ | 317 | u64 ce_ure_sram_rd_addr2; /* 0x00B140 */ |
318 | uint64_t ce_ure_sram_wr_addr0; /* 0x00B148 */ | 318 | u64 ce_ure_sram_wr_addr0; /* 0x00B148 */ |
319 | uint64_t ce_ure_sram_wr_addr1; /* 0x00B150 */ | 319 | u64 ce_ure_sram_wr_addr1; /* 0x00B150 */ |
320 | uint64_t ce_ure_sram_wr_addr2; /* 0x00B158 */ | 320 | u64 ce_ure_sram_wr_addr2; /* 0x00B158 */ |
321 | uint64_t ce_ure_buf_flush10; /* 0x00B160 */ | 321 | u64 ce_ure_buf_flush10; /* 0x00B160 */ |
322 | uint64_t ce_ure_buf_flush11; /* 0x00B168 */ | 322 | u64 ce_ure_buf_flush11; /* 0x00B168 */ |
323 | uint64_t ce_ure_buf_flush12; /* 0x00B170 */ | 323 | u64 ce_ure_buf_flush12; /* 0x00B170 */ |
324 | uint64_t ce_ure_buf_flush13; /* 0x00B178 */ | 324 | u64 ce_ure_buf_flush13; /* 0x00B178 */ |
325 | uint64_t ce_ure_buf_flush20; /* 0x00B180 */ | 325 | u64 ce_ure_buf_flush20; /* 0x00B180 */ |
326 | uint64_t ce_ure_buf_flush21; /* 0x00B188 */ | 326 | u64 ce_ure_buf_flush21; /* 0x00B188 */ |
327 | uint64_t ce_ure_buf_flush22; /* 0x00B190 */ | 327 | u64 ce_ure_buf_flush22; /* 0x00B190 */ |
328 | uint64_t ce_ure_buf_flush23; /* 0x00B198 */ | 328 | u64 ce_ure_buf_flush23; /* 0x00B198 */ |
329 | uint64_t ce_ure_pcie_control1; /* 0x00B1A0 */ | 329 | u64 ce_ure_pcie_control1; /* 0x00B1A0 */ |
330 | uint64_t ce_ure_pcie_control2; /* 0x00B1A8 */ | 330 | u64 ce_ure_pcie_control2; /* 0x00B1A8 */ |
331 | 331 | ||
332 | uint64_t ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ | 332 | u64 ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ |
333 | 333 | ||
334 | /* Upstream Data Buffer, Port1 */ | 334 | /* Upstream Data Buffer, Port1 */ |
335 | struct ce_ure_maint_ups_dat1_data { | 335 | struct ce_ure_maint_ups_dat1_data { |
336 | uint64_t data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ | 336 | u64 data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ |
337 | uint64_t data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ | 337 | u64 data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ |
338 | uint64_t parity[512]; /* 0x00E000 -- 0x00EFF8 */ | 338 | u64 parity[512]; /* 0x00E000 -- 0x00EFF8 */ |
339 | } ce_ure_maint_ups_dat1; | 339 | } ce_ure_maint_ups_dat1; |
340 | 340 | ||
341 | /* Upstream Header Buffer, Port1 */ | 341 | /* Upstream Header Buffer, Port1 */ |
342 | struct ce_ure_maint_ups_hdr1_data { | 342 | struct ce_ure_maint_ups_hdr1_data { |
343 | uint64_t data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ | 343 | u64 data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ |
344 | uint64_t data127_64[512]; /* 0x010000 -- 0x010FF8 */ | 344 | u64 data127_64[512]; /* 0x010000 -- 0x010FF8 */ |
345 | uint64_t parity[512]; /* 0x011000 -- 0x011FF8 */ | 345 | u64 parity[512]; /* 0x011000 -- 0x011FF8 */ |
346 | } ce_ure_maint_ups_hdr1; | 346 | } ce_ure_maint_ups_hdr1; |
347 | 347 | ||
348 | /* Upstream Data Buffer, Port2 */ | 348 | /* Upstream Data Buffer, Port2 */ |
349 | struct ce_ure_maint_ups_dat2_data { | 349 | struct ce_ure_maint_ups_dat2_data { |
350 | uint64_t data63_0[512]; /* 0x012000 -- 0x012FF8 */ | 350 | u64 data63_0[512]; /* 0x012000 -- 0x012FF8 */ |
351 | uint64_t data127_64[512]; /* 0x013000 -- 0x013FF8 */ | 351 | u64 data127_64[512]; /* 0x013000 -- 0x013FF8 */ |
352 | uint64_t parity[512]; /* 0x014000 -- 0x014FF8 */ | 352 | u64 parity[512]; /* 0x014000 -- 0x014FF8 */ |
353 | } ce_ure_maint_ups_dat2; | 353 | } ce_ure_maint_ups_dat2; |
354 | 354 | ||
355 | /* Upstream Header Buffer, Port2 */ | 355 | /* Upstream Header Buffer, Port2 */ |
356 | struct ce_ure_maint_ups_hdr2_data { | 356 | struct ce_ure_maint_ups_hdr2_data { |
357 | uint64_t data63_0[512]; /* 0x015000 -- 0x015FF8 */ | 357 | u64 data63_0[512]; /* 0x015000 -- 0x015FF8 */ |
358 | uint64_t data127_64[512]; /* 0x016000 -- 0x016FF8 */ | 358 | u64 data127_64[512]; /* 0x016000 -- 0x016FF8 */ |
359 | uint64_t parity[512]; /* 0x017000 -- 0x017FF8 */ | 359 | u64 parity[512]; /* 0x017000 -- 0x017FF8 */ |
360 | } ce_ure_maint_ups_hdr2; | 360 | } ce_ure_maint_ups_hdr2; |
361 | 361 | ||
362 | /* Downstream Data Buffer */ | 362 | /* Downstream Data Buffer */ |
363 | struct ce_ure_maint_dns_dat_data { | 363 | struct ce_ure_maint_dns_dat_data { |
364 | uint64_t data63_0[512]; /* 0x018000 -- 0x018FF8 */ | 364 | u64 data63_0[512]; /* 0x018000 -- 0x018FF8 */ |
365 | uint64_t data127_64[512]; /* 0x019000 -- 0x019FF8 */ | 365 | u64 data127_64[512]; /* 0x019000 -- 0x019FF8 */ |
366 | uint64_t parity[512]; /* 0x01A000 -- 0x01AFF8 */ | 366 | u64 parity[512]; /* 0x01A000 -- 0x01AFF8 */ |
367 | } ce_ure_maint_dns_dat; | 367 | } ce_ure_maint_dns_dat; |
368 | 368 | ||
369 | /* Downstream Header Buffer */ | 369 | /* Downstream Header Buffer */ |
370 | struct ce_ure_maint_dns_hdr_data { | 370 | struct ce_ure_maint_dns_hdr_data { |
371 | uint64_t data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ | 371 | u64 data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ |
372 | uint64_t data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ | 372 | u64 data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ |
373 | uint64_t parity[64]; /* 0x01B400 -- 0x01B5F8 */ | 373 | u64 parity[64]; /* 0x01B400 -- 0x01B5F8 */ |
374 | } ce_ure_maint_dns_hdr; | 374 | } ce_ure_maint_dns_hdr; |
375 | 375 | ||
376 | /* RCI Buffer Data */ | 376 | /* RCI Buffer Data */ |
377 | struct ce_ure_maint_rci_data { | 377 | struct ce_ure_maint_rci_data { |
378 | uint64_t data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ | 378 | u64 data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ |
379 | uint64_t data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ | 379 | u64 data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ |
380 | } ce_ure_maint_rci; | 380 | } ce_ure_maint_rci; |
381 | 381 | ||
382 | /* Response Queue */ | 382 | /* Response Queue */ |
383 | uint64_t ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ | 383 | u64 ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ |
384 | 384 | ||
385 | uint64_t ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ | 385 | u64 ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ |
386 | 386 | ||
387 | /* Admin Build-a-Packet Buffer */ | 387 | /* Admin Build-a-Packet Buffer */ |
388 | struct ce_adm_maint_bap_buf_data { | 388 | struct ce_adm_maint_bap_buf_data { |
389 | uint64_t data63_0[258]; /* 0x024000 -- 0x024808 */ | 389 | u64 data63_0[258]; /* 0x024000 -- 0x024808 */ |
390 | uint64_t data127_64[258]; /* 0x024810 -- 0x025018 */ | 390 | u64 data127_64[258]; /* 0x024810 -- 0x025018 */ |
391 | uint64_t parity[258]; /* 0x025020 -- 0x025828 */ | 391 | u64 parity[258]; /* 0x025020 -- 0x025828 */ |
392 | } ce_adm_maint_bap_buf; | 392 | } ce_adm_maint_bap_buf; |
393 | 393 | ||
394 | uint64_t ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ | 394 | u64 ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ |
395 | 395 | ||
396 | /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */ | 396 | /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */ |
397 | uint64_t ce_ure_ate40[TIOCE_NUM_M40_ATES]; | 397 | u64 ce_ure_ate40[TIOCE_NUM_M40_ATES]; |
398 | 398 | ||
399 | /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */ | 399 | /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */ |
400 | uint64_t ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; | 400 | u64 ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; |
401 | 401 | ||
402 | uint64_t ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ | 402 | u64 ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ |
403 | 403 | ||
404 | /* | 404 | /* |
405 | * DRE: Down Stream Request Engine | 405 | * DRE: Down Stream Request Engine |
406 | */ | 406 | */ |
407 | uint64_t ce_dre_dyn_credit_status1; /* 0x040010 */ | 407 | u64 ce_dre_dyn_credit_status1; /* 0x040010 */ |
408 | uint64_t ce_dre_dyn_credit_status2; /* 0x040018 */ | 408 | u64 ce_dre_dyn_credit_status2; /* 0x040018 */ |
409 | uint64_t ce_dre_last_credit_status1; /* 0x040020 */ | 409 | u64 ce_dre_last_credit_status1; /* 0x040020 */ |
410 | uint64_t ce_dre_last_credit_status2; /* 0x040028 */ | 410 | u64 ce_dre_last_credit_status2; /* 0x040028 */ |
411 | uint64_t ce_dre_credit_limit1; /* 0x040030 */ | 411 | u64 ce_dre_credit_limit1; /* 0x040030 */ |
412 | uint64_t ce_dre_credit_limit2; /* 0x040038 */ | 412 | u64 ce_dre_credit_limit2; /* 0x040038 */ |
413 | uint64_t ce_dre_force_credit1; /* 0x040040 */ | 413 | u64 ce_dre_force_credit1; /* 0x040040 */ |
414 | uint64_t ce_dre_force_credit2; /* 0x040048 */ | 414 | u64 ce_dre_force_credit2; /* 0x040048 */ |
415 | uint64_t ce_dre_debug_mux1; /* 0x040050 */ | 415 | u64 ce_dre_debug_mux1; /* 0x040050 */ |
416 | uint64_t ce_dre_debug_mux2; /* 0x040058 */ | 416 | u64 ce_dre_debug_mux2; /* 0x040058 */ |
417 | uint64_t ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ | 417 | u64 ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ |
418 | uint64_t ce_dre_ssp_err_addr; /* 0x040068 */ | 418 | u64 ce_dre_ssp_err_addr; /* 0x040068 */ |
419 | uint64_t ce_dre_comp_err_cmd_wrd; /* 0x040070 */ | 419 | u64 ce_dre_comp_err_cmd_wrd; /* 0x040070 */ |
420 | uint64_t ce_dre_comp_err_addr; /* 0x040078 */ | 420 | u64 ce_dre_comp_err_addr; /* 0x040078 */ |
421 | uint64_t ce_dre_req_status; /* 0x040080 */ | 421 | u64 ce_dre_req_status; /* 0x040080 */ |
422 | uint64_t ce_dre_config1; /* 0x040088 */ | 422 | u64 ce_dre_config1; /* 0x040088 */ |
423 | uint64_t ce_dre_config2; /* 0x040090 */ | 423 | u64 ce_dre_config2; /* 0x040090 */ |
424 | uint64_t ce_dre_config_req_status; /* 0x040098 */ | 424 | u64 ce_dre_config_req_status; /* 0x040098 */ |
425 | uint64_t ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ | 425 | u64 ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ |
426 | uint64_t ce_dre_dyn_fifo; /* 0x040100 */ | 426 | u64 ce_dre_dyn_fifo; /* 0x040100 */ |
427 | uint64_t ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ | 427 | u64 ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ |
428 | uint64_t ce_dre_last_fifo; /* 0x040120 */ | 428 | u64 ce_dre_last_fifo; /* 0x040120 */ |
429 | 429 | ||
430 | uint64_t ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ | 430 | u64 ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ |
431 | 431 | ||
432 | /* DRE Downstream Head Queue */ | 432 | /* DRE Downstream Head Queue */ |
433 | struct ce_dre_maint_ds_head_queue { | 433 | struct ce_dre_maint_ds_head_queue { |
434 | uint64_t data63_0[32]; /* 0x040200 -- 0x0402F8 */ | 434 | u64 data63_0[32]; /* 0x040200 -- 0x0402F8 */ |
435 | uint64_t data127_64[32]; /* 0x040300 -- 0x0403F8 */ | 435 | u64 data127_64[32]; /* 0x040300 -- 0x0403F8 */ |
436 | uint64_t parity[32]; /* 0x040400 -- 0x0404F8 */ | 436 | u64 parity[32]; /* 0x040400 -- 0x0404F8 */ |
437 | } ce_dre_maint_ds_head_q; | 437 | } ce_dre_maint_ds_head_q; |
438 | 438 | ||
439 | uint64_t ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ | 439 | u64 ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ |
440 | 440 | ||
441 | /* DRE Downstream Data Queue */ | 441 | /* DRE Downstream Data Queue */ |
442 | struct ce_dre_maint_ds_data_queue { | 442 | struct ce_dre_maint_ds_data_queue { |
443 | uint64_t data63_0[256]; /* 0x041000 -- 0x0417F8 */ | 443 | u64 data63_0[256]; /* 0x041000 -- 0x0417F8 */ |
444 | uint64_t ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ | 444 | u64 ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ |
445 | uint64_t data127_64[256]; /* 0x042000 -- 0x0427F8 */ | 445 | u64 data127_64[256]; /* 0x042000 -- 0x0427F8 */ |
446 | uint64_t ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ | 446 | u64 ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ |
447 | uint64_t parity[256]; /* 0x043000 -- 0x0437F8 */ | 447 | u64 parity[256]; /* 0x043000 -- 0x0437F8 */ |
448 | uint64_t ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ | 448 | u64 ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ |
449 | } ce_dre_maint_ds_data_q; | 449 | } ce_dre_maint_ds_data_q; |
450 | 450 | ||
451 | /* DRE URE Upstream Response Queue */ | 451 | /* DRE URE Upstream Response Queue */ |
452 | struct ce_dre_maint_ure_us_rsp_queue { | 452 | struct ce_dre_maint_ure_us_rsp_queue { |
453 | uint64_t data63_0[8]; /* 0x044000 -- 0x044038 */ | 453 | u64 data63_0[8]; /* 0x044000 -- 0x044038 */ |
454 | uint64_t ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ | 454 | u64 ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ |
455 | uint64_t data127_64[8]; /* 0x044100 -- 0x044138 */ | 455 | u64 data127_64[8]; /* 0x044100 -- 0x044138 */ |
456 | uint64_t ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ | 456 | u64 ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ |
457 | uint64_t parity[8]; /* 0x044200 -- 0x044238 */ | 457 | u64 parity[8]; /* 0x044200 -- 0x044238 */ |
458 | uint64_t ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ | 458 | u64 ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ |
459 | } ce_dre_maint_ure_us_rsp_q; | 459 | } ce_dre_maint_ure_us_rsp_q; |
460 | 460 | ||
461 | uint64_t ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ | 461 | u64 ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ |
462 | 462 | ||
463 | uint64_t ce_end_of_struct; /* 0x044400 */ | 463 | u64 ce_end_of_struct; /* 0x044400 */ |
464 | } tioce_t; | 464 | } tioce_t; |
465 | 465 | ||
466 | 466 | ||
@@ -625,11 +625,11 @@ typedef volatile struct tioce { | |||
625 | #define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT) | 625 | #define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT) |
626 | #define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT) | 626 | #define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT) |
627 | #define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT) | 627 | #define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT) |
628 | #define CE_URE_PIPE_BUS(b) (((uint64_t)(b) << BUS_SRC_ID_SHFT) & \ | 628 | #define CE_URE_PIPE_BUS(b) (((u64)(b) << BUS_SRC_ID_SHFT) & \ |
629 | CE_URE_BUS_MASK) | 629 | CE_URE_BUS_MASK) |
630 | #define CE_URE_PIPE_DEV(d) (((uint64_t)(d) << DEV_SRC_ID_SHFT) & \ | 630 | #define CE_URE_PIPE_DEV(d) (((u64)(d) << DEV_SRC_ID_SHFT) & \ |
631 | CE_URE_DEV_MASK) | 631 | CE_URE_DEV_MASK) |
632 | #define CE_URE_PIPE_FNC(f) (((uint64_t)(f) << FNC_SRC_ID_SHFT) & \ | 632 | #define CE_URE_PIPE_FNC(f) (((u64)(f) << FNC_SRC_ID_SHFT) & \ |
633 | CE_URE_FNC_MASK) | 633 | CE_URE_FNC_MASK) |
634 | 634 | ||
635 | #define CE_URE_SEL1_SHFT 0 | 635 | #define CE_URE_SEL1_SHFT 0 |
@@ -660,9 +660,9 @@ typedef volatile struct tioce { | |||
660 | #define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT) | 660 | #define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT) |
661 | #define CE_URE_PN2_SHFT 24 | 661 | #define CE_URE_PN2_SHFT 24 |
662 | #define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT) | 662 | #define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT) |
663 | #define CE_URE_PN1_SET(n) (((uint64_t)(n) << CE_URE_PN1_SHFT) & \ | 663 | #define CE_URE_PN1_SET(n) (((u64)(n) << CE_URE_PN1_SHFT) & \ |
664 | CE_URE_PN1_MASK) | 664 | CE_URE_PN1_MASK) |
665 | #define CE_URE_PN2_SET(n) (((uint64_t)(n) << CE_URE_PN2_SHFT) & \ | 665 | #define CE_URE_PN2_SET(n) (((u64)(n) << CE_URE_PN2_SHFT) & \ |
666 | CE_URE_PN2_MASK) | 666 | CE_URE_PN2_MASK) |
667 | 667 | ||
668 | /* ce_ure_pcie_control2 register bit masks & shifts */ | 668 | /* ce_ure_pcie_control2 register bit masks & shifts */ |
@@ -681,9 +681,9 @@ typedef volatile struct tioce { | |||
681 | #define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT) | 681 | #define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT) |
682 | #define CE_URE_PSN2_SHFT 32 | 682 | #define CE_URE_PSN2_SHFT 32 |
683 | #define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT) | 683 | #define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT) |
684 | #define CE_URE_PSN1_SET(n) (((uint64_t)(n) << CE_URE_PSN1_SHFT) & \ | 684 | #define CE_URE_PSN1_SET(n) (((u64)(n) << CE_URE_PSN1_SHFT) & \ |
685 | CE_URE_PSN1_MASK) | 685 | CE_URE_PSN1_MASK) |
686 | #define CE_URE_PSN2_SET(n) (((uint64_t)(n) << CE_URE_PSN2_SHFT) & \ | 686 | #define CE_URE_PSN2_SET(n) (((u64)(n) << CE_URE_PSN2_SHFT) & \ |
687 | CE_URE_PSN2_MASK) | 687 | CE_URE_PSN2_MASK) |
688 | 688 | ||
689 | /* | 689 | /* |
diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h index cb414908671d..6d62b13f7ae7 100644 --- a/include/asm-ia64/sn/tioce_provider.h +++ b/include/asm-ia64/sn/tioce_provider.h | |||
@@ -21,9 +21,9 @@ | |||
21 | struct tioce_common { | 21 | struct tioce_common { |
22 | struct pcibus_bussoft ce_pcibus; /* common pciio header */ | 22 | struct pcibus_bussoft ce_pcibus; /* common pciio header */ |
23 | 23 | ||
24 | uint32_t ce_rev; | 24 | u32 ce_rev; |
25 | uint64_t ce_kernel_private; | 25 | u64 ce_kernel_private; |
26 | uint64_t ce_prom_private; | 26 | u64 ce_prom_private; |
27 | }; | 27 | }; |
28 | 28 | ||
29 | struct tioce_kernel { | 29 | struct tioce_kernel { |
@@ -31,31 +31,31 @@ struct tioce_kernel { | |||
31 | spinlock_t ce_lock; | 31 | spinlock_t ce_lock; |
32 | struct list_head ce_dmamap_list; | 32 | struct list_head ce_dmamap_list; |
33 | 33 | ||
34 | uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES]; | 34 | u64 ce_ate40_shadow[TIOCE_NUM_M40_ATES]; |
35 | uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; | 35 | u64 ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; |
36 | uint32_t ce_ate3240_pagesize; | 36 | u32 ce_ate3240_pagesize; |
37 | 37 | ||
38 | uint8_t ce_port1_secondary; | 38 | u8 ce_port1_secondary; |
39 | 39 | ||
40 | /* per-port resources */ | 40 | /* per-port resources */ |
41 | struct { | 41 | struct { |
42 | int dirmap_refcnt; | 42 | int dirmap_refcnt; |
43 | uint64_t dirmap_shadow; | 43 | u64 dirmap_shadow; |
44 | } ce_port[TIOCE_NUM_PORTS]; | 44 | } ce_port[TIOCE_NUM_PORTS]; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | struct tioce_dmamap { | 47 | struct tioce_dmamap { |
48 | struct list_head ce_dmamap_list; /* headed by tioce_kernel */ | 48 | struct list_head ce_dmamap_list; /* headed by tioce_kernel */ |
49 | uint32_t refcnt; | 49 | u32 refcnt; |
50 | 50 | ||
51 | uint64_t nbytes; /* # bytes mapped */ | 51 | u64 nbytes; /* # bytes mapped */ |
52 | 52 | ||
53 | uint64_t ct_start; /* coretalk start address */ | 53 | u64 ct_start; /* coretalk start address */ |
54 | uint64_t pci_start; /* bus start address */ | 54 | u64 pci_start; /* bus start address */ |
55 | 55 | ||
56 | uint64_t *ate_hw; /* hw ptr of first ate in map */ | 56 | u64 *ate_hw; /* hw ptr of first ate in map */ |
57 | uint64_t *ate_shadow; /* shadow ptr of firat ate */ | 57 | u64 *ate_shadow; /* shadow ptr of firat ate */ |
58 | uint16_t ate_count; /* # ate's in the map */ | 58 | u16 ate_count; /* # ate's in the map */ |
59 | }; | 59 | }; |
60 | 60 | ||
61 | extern int tioce_init_provider(void); | 61 | extern int tioce_init_provider(void); |
diff --git a/include/asm-ia64/sn/tiocp.h b/include/asm-ia64/sn/tiocp.h index 5f2489c9d2dd..f47c08ab483c 100644 --- a/include/asm-ia64/sn/tiocp.h +++ b/include/asm-ia64/sn/tiocp.h | |||
@@ -21,189 +21,189 @@ struct tiocp{ | |||
21 | /* 0x000000-0x00FFFF -- Local Registers */ | 21 | /* 0x000000-0x00FFFF -- Local Registers */ |
22 | 22 | ||
23 | /* 0x000000-0x000057 -- (Legacy Widget Space) Configuration */ | 23 | /* 0x000000-0x000057 -- (Legacy Widget Space) Configuration */ |
24 | uint64_t cp_id; /* 0x000000 */ | 24 | u64 cp_id; /* 0x000000 */ |
25 | uint64_t cp_stat; /* 0x000008 */ | 25 | u64 cp_stat; /* 0x000008 */ |
26 | uint64_t cp_err_upper; /* 0x000010 */ | 26 | u64 cp_err_upper; /* 0x000010 */ |
27 | uint64_t cp_err_lower; /* 0x000018 */ | 27 | u64 cp_err_lower; /* 0x000018 */ |
28 | #define cp_err cp_err_lower | 28 | #define cp_err cp_err_lower |
29 | uint64_t cp_control; /* 0x000020 */ | 29 | u64 cp_control; /* 0x000020 */ |
30 | uint64_t cp_req_timeout; /* 0x000028 */ | 30 | u64 cp_req_timeout; /* 0x000028 */ |
31 | uint64_t cp_intr_upper; /* 0x000030 */ | 31 | u64 cp_intr_upper; /* 0x000030 */ |
32 | uint64_t cp_intr_lower; /* 0x000038 */ | 32 | u64 cp_intr_lower; /* 0x000038 */ |
33 | #define cp_intr cp_intr_lower | 33 | #define cp_intr cp_intr_lower |
34 | uint64_t cp_err_cmdword; /* 0x000040 */ | 34 | u64 cp_err_cmdword; /* 0x000040 */ |
35 | uint64_t _pad_000048; /* 0x000048 */ | 35 | u64 _pad_000048; /* 0x000048 */ |
36 | uint64_t cp_tflush; /* 0x000050 */ | 36 | u64 cp_tflush; /* 0x000050 */ |
37 | 37 | ||
38 | /* 0x000058-0x00007F -- Bridge-specific Configuration */ | 38 | /* 0x000058-0x00007F -- Bridge-specific Configuration */ |
39 | uint64_t cp_aux_err; /* 0x000058 */ | 39 | u64 cp_aux_err; /* 0x000058 */ |
40 | uint64_t cp_resp_upper; /* 0x000060 */ | 40 | u64 cp_resp_upper; /* 0x000060 */ |
41 | uint64_t cp_resp_lower; /* 0x000068 */ | 41 | u64 cp_resp_lower; /* 0x000068 */ |
42 | #define cp_resp cp_resp_lower | 42 | #define cp_resp cp_resp_lower |
43 | uint64_t cp_tst_pin_ctrl; /* 0x000070 */ | 43 | u64 cp_tst_pin_ctrl; /* 0x000070 */ |
44 | uint64_t cp_addr_lkerr; /* 0x000078 */ | 44 | u64 cp_addr_lkerr; /* 0x000078 */ |
45 | 45 | ||
46 | /* 0x000080-0x00008F -- PMU & MAP */ | 46 | /* 0x000080-0x00008F -- PMU & MAP */ |
47 | uint64_t cp_dir_map; /* 0x000080 */ | 47 | u64 cp_dir_map; /* 0x000080 */ |
48 | uint64_t _pad_000088; /* 0x000088 */ | 48 | u64 _pad_000088; /* 0x000088 */ |
49 | 49 | ||
50 | /* 0x000090-0x00009F -- SSRAM */ | 50 | /* 0x000090-0x00009F -- SSRAM */ |
51 | uint64_t cp_map_fault; /* 0x000090 */ | 51 | u64 cp_map_fault; /* 0x000090 */ |
52 | uint64_t _pad_000098; /* 0x000098 */ | 52 | u64 _pad_000098; /* 0x000098 */ |
53 | 53 | ||
54 | /* 0x0000A0-0x0000AF -- Arbitration */ | 54 | /* 0x0000A0-0x0000AF -- Arbitration */ |
55 | uint64_t cp_arb; /* 0x0000A0 */ | 55 | u64 cp_arb; /* 0x0000A0 */ |
56 | uint64_t _pad_0000A8; /* 0x0000A8 */ | 56 | u64 _pad_0000A8; /* 0x0000A8 */ |
57 | 57 | ||
58 | /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ | 58 | /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ |
59 | uint64_t cp_ate_parity_err; /* 0x0000B0 */ | 59 | u64 cp_ate_parity_err; /* 0x0000B0 */ |
60 | uint64_t _pad_0000B8; /* 0x0000B8 */ | 60 | u64 _pad_0000B8; /* 0x0000B8 */ |
61 | 61 | ||
62 | /* 0x0000C0-0x0000FF -- PCI/GIO */ | 62 | /* 0x0000C0-0x0000FF -- PCI/GIO */ |
63 | uint64_t cp_bus_timeout; /* 0x0000C0 */ | 63 | u64 cp_bus_timeout; /* 0x0000C0 */ |
64 | uint64_t cp_pci_cfg; /* 0x0000C8 */ | 64 | u64 cp_pci_cfg; /* 0x0000C8 */ |
65 | uint64_t cp_pci_err_upper; /* 0x0000D0 */ | 65 | u64 cp_pci_err_upper; /* 0x0000D0 */ |
66 | uint64_t cp_pci_err_lower; /* 0x0000D8 */ | 66 | u64 cp_pci_err_lower; /* 0x0000D8 */ |
67 | #define cp_pci_err cp_pci_err_lower | 67 | #define cp_pci_err cp_pci_err_lower |
68 | uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */ | 68 | u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ |
69 | 69 | ||
70 | /* 0x000100-0x0001FF -- Interrupt */ | 70 | /* 0x000100-0x0001FF -- Interrupt */ |
71 | uint64_t cp_int_status; /* 0x000100 */ | 71 | u64 cp_int_status; /* 0x000100 */ |
72 | uint64_t cp_int_enable; /* 0x000108 */ | 72 | u64 cp_int_enable; /* 0x000108 */ |
73 | uint64_t cp_int_rst_stat; /* 0x000110 */ | 73 | u64 cp_int_rst_stat; /* 0x000110 */ |
74 | uint64_t cp_int_mode; /* 0x000118 */ | 74 | u64 cp_int_mode; /* 0x000118 */ |
75 | uint64_t cp_int_device; /* 0x000120 */ | 75 | u64 cp_int_device; /* 0x000120 */ |
76 | uint64_t cp_int_host_err; /* 0x000128 */ | 76 | u64 cp_int_host_err; /* 0x000128 */ |
77 | uint64_t cp_int_addr[8]; /* 0x0001{30,,,68} */ | 77 | u64 cp_int_addr[8]; /* 0x0001{30,,,68} */ |
78 | uint64_t cp_err_int_view; /* 0x000170 */ | 78 | u64 cp_err_int_view; /* 0x000170 */ |
79 | uint64_t cp_mult_int; /* 0x000178 */ | 79 | u64 cp_mult_int; /* 0x000178 */ |
80 | uint64_t cp_force_always[8]; /* 0x0001{80,,,B8} */ | 80 | u64 cp_force_always[8]; /* 0x0001{80,,,B8} */ |
81 | uint64_t cp_force_pin[8]; /* 0x0001{C0,,,F8} */ | 81 | u64 cp_force_pin[8]; /* 0x0001{C0,,,F8} */ |
82 | 82 | ||
83 | /* 0x000200-0x000298 -- Device */ | 83 | /* 0x000200-0x000298 -- Device */ |
84 | uint64_t cp_device[4]; /* 0x0002{00,,,18} */ | 84 | u64 cp_device[4]; /* 0x0002{00,,,18} */ |
85 | uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */ | 85 | u64 _pad_000220[4]; /* 0x0002{20,,,38} */ |
86 | uint64_t cp_wr_req_buf[4]; /* 0x0002{40,,,58} */ | 86 | u64 cp_wr_req_buf[4]; /* 0x0002{40,,,58} */ |
87 | uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */ | 87 | u64 _pad_000260[4]; /* 0x0002{60,,,78} */ |
88 | uint64_t cp_rrb_map[2]; /* 0x0002{80,,,88} */ | 88 | u64 cp_rrb_map[2]; /* 0x0002{80,,,88} */ |
89 | #define cp_even_resp cp_rrb_map[0] /* 0x000280 */ | 89 | #define cp_even_resp cp_rrb_map[0] /* 0x000280 */ |
90 | #define cp_odd_resp cp_rrb_map[1] /* 0x000288 */ | 90 | #define cp_odd_resp cp_rrb_map[1] /* 0x000288 */ |
91 | uint64_t cp_resp_status; /* 0x000290 */ | 91 | u64 cp_resp_status; /* 0x000290 */ |
92 | uint64_t cp_resp_clear; /* 0x000298 */ | 92 | u64 cp_resp_clear; /* 0x000298 */ |
93 | 93 | ||
94 | uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */ | 94 | u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ |
95 | 95 | ||
96 | /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ | 96 | /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ |
97 | struct { | 97 | struct { |
98 | uint64_t upper; /* 0x0003{00,,,F0} */ | 98 | u64 upper; /* 0x0003{00,,,F0} */ |
99 | uint64_t lower; /* 0x0003{08,,,F8} */ | 99 | u64 lower; /* 0x0003{08,,,F8} */ |
100 | } cp_buf_addr_match[16]; | 100 | } cp_buf_addr_match[16]; |
101 | 101 | ||
102 | /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ | 102 | /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ |
103 | struct { | 103 | struct { |
104 | uint64_t flush_w_touch; /* 0x000{400,,,5C0} */ | 104 | u64 flush_w_touch; /* 0x000{400,,,5C0} */ |
105 | uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */ | 105 | u64 flush_wo_touch; /* 0x000{408,,,5C8} */ |
106 | uint64_t inflight; /* 0x000{410,,,5D0} */ | 106 | u64 inflight; /* 0x000{410,,,5D0} */ |
107 | uint64_t prefetch; /* 0x000{418,,,5D8} */ | 107 | u64 prefetch; /* 0x000{418,,,5D8} */ |
108 | uint64_t total_pci_retry; /* 0x000{420,,,5E0} */ | 108 | u64 total_pci_retry; /* 0x000{420,,,5E0} */ |
109 | uint64_t max_pci_retry; /* 0x000{428,,,5E8} */ | 109 | u64 max_pci_retry; /* 0x000{428,,,5E8} */ |
110 | uint64_t max_latency; /* 0x000{430,,,5F0} */ | 110 | u64 max_latency; /* 0x000{430,,,5F0} */ |
111 | uint64_t clear_all; /* 0x000{438,,,5F8} */ | 111 | u64 clear_all; /* 0x000{438,,,5F8} */ |
112 | } cp_buf_count[8]; | 112 | } cp_buf_count[8]; |
113 | 113 | ||
114 | 114 | ||
115 | /* 0x000600-0x0009FF -- PCI/X registers */ | 115 | /* 0x000600-0x0009FF -- PCI/X registers */ |
116 | uint64_t cp_pcix_bus_err_addr; /* 0x000600 */ | 116 | u64 cp_pcix_bus_err_addr; /* 0x000600 */ |
117 | uint64_t cp_pcix_bus_err_attr; /* 0x000608 */ | 117 | u64 cp_pcix_bus_err_attr; /* 0x000608 */ |
118 | uint64_t cp_pcix_bus_err_data; /* 0x000610 */ | 118 | u64 cp_pcix_bus_err_data; /* 0x000610 */ |
119 | uint64_t cp_pcix_pio_split_addr; /* 0x000618 */ | 119 | u64 cp_pcix_pio_split_addr; /* 0x000618 */ |
120 | uint64_t cp_pcix_pio_split_attr; /* 0x000620 */ | 120 | u64 cp_pcix_pio_split_attr; /* 0x000620 */ |
121 | uint64_t cp_pcix_dma_req_err_attr; /* 0x000628 */ | 121 | u64 cp_pcix_dma_req_err_attr; /* 0x000628 */ |
122 | uint64_t cp_pcix_dma_req_err_addr; /* 0x000630 */ | 122 | u64 cp_pcix_dma_req_err_addr; /* 0x000630 */ |
123 | uint64_t cp_pcix_timeout; /* 0x000638 */ | 123 | u64 cp_pcix_timeout; /* 0x000638 */ |
124 | 124 | ||
125 | uint64_t _pad_000640[24]; /* 0x000{640,,,6F8} */ | 125 | u64 _pad_000640[24]; /* 0x000{640,,,6F8} */ |
126 | 126 | ||
127 | /* 0x000700-0x000737 -- Debug Registers */ | 127 | /* 0x000700-0x000737 -- Debug Registers */ |
128 | uint64_t cp_ct_debug_ctl; /* 0x000700 */ | 128 | u64 cp_ct_debug_ctl; /* 0x000700 */ |
129 | uint64_t cp_br_debug_ctl; /* 0x000708 */ | 129 | u64 cp_br_debug_ctl; /* 0x000708 */ |
130 | uint64_t cp_mux3_debug_ctl; /* 0x000710 */ | 130 | u64 cp_mux3_debug_ctl; /* 0x000710 */ |
131 | uint64_t cp_mux4_debug_ctl; /* 0x000718 */ | 131 | u64 cp_mux4_debug_ctl; /* 0x000718 */ |
132 | uint64_t cp_mux5_debug_ctl; /* 0x000720 */ | 132 | u64 cp_mux5_debug_ctl; /* 0x000720 */ |
133 | uint64_t cp_mux6_debug_ctl; /* 0x000728 */ | 133 | u64 cp_mux6_debug_ctl; /* 0x000728 */ |
134 | uint64_t cp_mux7_debug_ctl; /* 0x000730 */ | 134 | u64 cp_mux7_debug_ctl; /* 0x000730 */ |
135 | 135 | ||
136 | uint64_t _pad_000738[89]; /* 0x000{738,,,9F8} */ | 136 | u64 _pad_000738[89]; /* 0x000{738,,,9F8} */ |
137 | 137 | ||
138 | /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ | 138 | /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ |
139 | struct { | 139 | struct { |
140 | uint64_t cp_buf_addr; /* 0x000{A00,,,AF0} */ | 140 | u64 cp_buf_addr; /* 0x000{A00,,,AF0} */ |
141 | uint64_t cp_buf_attr; /* 0X000{A08,,,AF8} */ | 141 | u64 cp_buf_attr; /* 0X000{A08,,,AF8} */ |
142 | } cp_pcix_read_buf_64[16]; | 142 | } cp_pcix_read_buf_64[16]; |
143 | 143 | ||
144 | struct { | 144 | struct { |
145 | uint64_t cp_buf_addr; /* 0x000{B00,,,BE0} */ | 145 | u64 cp_buf_addr; /* 0x000{B00,,,BE0} */ |
146 | uint64_t cp_buf_attr; /* 0x000{B08,,,BE8} */ | 146 | u64 cp_buf_attr; /* 0x000{B08,,,BE8} */ |
147 | uint64_t cp_buf_valid; /* 0x000{B10,,,BF0} */ | 147 | u64 cp_buf_valid; /* 0x000{B10,,,BF0} */ |
148 | uint64_t __pad1; /* 0x000{B18,,,BF8} */ | 148 | u64 __pad1; /* 0x000{B18,,,BF8} */ |
149 | } cp_pcix_write_buf_64[8]; | 149 | } cp_pcix_write_buf_64[8]; |
150 | 150 | ||
151 | /* End of Local Registers -- Start of Address Map space */ | 151 | /* End of Local Registers -- Start of Address Map space */ |
152 | 152 | ||
153 | char _pad_000c00[0x010000 - 0x000c00]; | 153 | char _pad_000c00[0x010000 - 0x000c00]; |
154 | 154 | ||
155 | /* 0x010000-0x011FF8 -- Internal ATE RAM (Auto Parity Generation) */ | 155 | /* 0x010000-0x011FF8 -- Internal ATE RAM (Auto Parity Generation) */ |
156 | uint64_t cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */ | 156 | u64 cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */ |
157 | 157 | ||
158 | char _pad_012000[0x14000 - 0x012000]; | 158 | char _pad_012000[0x14000 - 0x012000]; |
159 | 159 | ||
160 | /* 0x014000-0x015FF8 -- Internal ATE RAM (Manual Parity Generation) */ | 160 | /* 0x014000-0x015FF8 -- Internal ATE RAM (Manual Parity Generation) */ |
161 | uint64_t cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */ | 161 | u64 cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */ |
162 | 162 | ||
163 | char _pad_016000[0x18000 - 0x016000]; | 163 | char _pad_016000[0x18000 - 0x016000]; |
164 | 164 | ||
165 | /* 0x18000-0x197F8 -- TIOCP Write Request Ram */ | 165 | /* 0x18000-0x197F8 -- TIOCP Write Request Ram */ |
166 | uint64_t cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ | 166 | u64 cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ |
167 | uint64_t cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ | 167 | u64 cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ |
168 | uint64_t cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ | 168 | u64 cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ |
169 | 169 | ||
170 | char _pad_019800[0x1C000 - 0x019800]; | 170 | char _pad_019800[0x1C000 - 0x019800]; |
171 | 171 | ||
172 | /* 0x1C000-0x1EFF8 -- TIOCP Read Response Ram */ | 172 | /* 0x1C000-0x1EFF8 -- TIOCP Read Response Ram */ |
173 | uint64_t cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */ | 173 | u64 cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */ |
174 | uint64_t cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */ | 174 | u64 cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */ |
175 | uint64_t cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */ | 175 | u64 cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */ |
176 | 176 | ||
177 | char _pad_01F000[0x20000 - 0x01F000]; | 177 | char _pad_01F000[0x20000 - 0x01F000]; |
178 | 178 | ||
179 | /* 0x020000-0x021FFF -- Host Device (CP) Configuration Space (not used) */ | 179 | /* 0x020000-0x021FFF -- Host Device (CP) Configuration Space (not used) */ |
180 | char _pad_020000[0x021000 - 0x20000]; | 180 | char _pad_020000[0x021000 - 0x20000]; |
181 | 181 | ||
182 | /* 0x021000-0x027FFF -- PCI Device Configuration Spaces */ | 182 | /* 0x021000-0x027FFF -- PCI Device Configuration Spaces */ |
183 | union { | 183 | union { |
184 | uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ | 184 | u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ |
185 | uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ | 185 | u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ |
186 | uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ | 186 | u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ |
187 | uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ | 187 | u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ |
188 | union { | 188 | union { |
189 | uint8_t c[0x100 / 1]; | 189 | u8 c[0x100 / 1]; |
190 | uint16_t s[0x100 / 2]; | 190 | u16 s[0x100 / 2]; |
191 | uint32_t l[0x100 / 4]; | 191 | u32 l[0x100 / 4]; |
192 | uint64_t d[0x100 / 8]; | 192 | u64 d[0x100 / 8]; |
193 | } f[8]; | 193 | } f[8]; |
194 | } cp_type0_cfg_dev[7]; /* 0x02{1000,,,7FFF} */ | 194 | } cp_type0_cfg_dev[7]; /* 0x02{1000,,,7FFF} */ |
195 | 195 | ||
196 | /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ | 196 | /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ |
197 | union { | 197 | union { |
198 | uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */ | 198 | u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ |
199 | uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */ | 199 | u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ |
200 | uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */ | 200 | u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ |
201 | uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */ | 201 | u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ |
202 | union { | 202 | union { |
203 | uint8_t c[0x100 / 1]; | 203 | u8 c[0x100 / 1]; |
204 | uint16_t s[0x100 / 2]; | 204 | u16 s[0x100 / 2]; |
205 | uint32_t l[0x100 / 4]; | 205 | u32 l[0x100 / 4]; |
206 | uint64_t d[0x100 / 8]; | 206 | u64 d[0x100 / 8]; |
207 | } f[8]; | 207 | } f[8]; |
208 | } cp_type1_cfg; /* 0x028000-0x029000 */ | 208 | } cp_type1_cfg; /* 0x028000-0x029000 */ |
209 | 209 | ||
@@ -211,30 +211,30 @@ struct tiocp{ | |||
211 | 211 | ||
212 | /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ | 212 | /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ |
213 | union { | 213 | union { |
214 | uint8_t c[8 / 1]; | 214 | u8 c[8 / 1]; |
215 | uint16_t s[8 / 2]; | 215 | u16 s[8 / 2]; |
216 | uint32_t l[8 / 4]; | 216 | u32 l[8 / 4]; |
217 | uint64_t d[8 / 8]; | 217 | u64 d[8 / 8]; |
218 | } cp_pci_iack; /* 0x030000-0x030007 */ | 218 | } cp_pci_iack; /* 0x030000-0x030007 */ |
219 | 219 | ||
220 | char _pad_030007[0x040000-0x030008]; | 220 | char _pad_030007[0x040000-0x030008]; |
221 | 221 | ||
222 | /* 0x040000-0x040007 -- PCIX Special Cycle */ | 222 | /* 0x040000-0x040007 -- PCIX Special Cycle */ |
223 | union { | 223 | union { |
224 | uint8_t c[8 / 1]; | 224 | u8 c[8 / 1]; |
225 | uint16_t s[8 / 2]; | 225 | u16 s[8 / 2]; |
226 | uint32_t l[8 / 4]; | 226 | u32 l[8 / 4]; |
227 | uint64_t d[8 / 8]; | 227 | u64 d[8 / 8]; |
228 | } cp_pcix_cycle; /* 0x040000-0x040007 */ | 228 | } cp_pcix_cycle; /* 0x040000-0x040007 */ |
229 | 229 | ||
230 | char _pad_040007[0x200000-0x040008]; | 230 | char _pad_040007[0x200000-0x040008]; |
231 | 231 | ||
232 | /* 0x200000-0x7FFFFF -- PCI/GIO Device Spaces */ | 232 | /* 0x200000-0x7FFFFF -- PCI/GIO Device Spaces */ |
233 | union { | 233 | union { |
234 | uint8_t c[0x100000 / 1]; | 234 | u8 c[0x100000 / 1]; |
235 | uint16_t s[0x100000 / 2]; | 235 | u16 s[0x100000 / 2]; |
236 | uint32_t l[0x100000 / 4]; | 236 | u32 l[0x100000 / 4]; |
237 | uint64_t d[0x100000 / 8]; | 237 | u64 d[0x100000 / 8]; |
238 | } cp_devio_raw[6]; /* 0x200000-0x7FFFFF */ | 238 | } cp_devio_raw[6]; /* 0x200000-0x7FFFFF */ |
239 | 239 | ||
240 | #define cp_devio(n) cp_devio_raw[((n)<2)?(n*2):(n+2)] | 240 | #define cp_devio(n) cp_devio_raw[((n)<2)?(n*2):(n+2)] |
@@ -243,10 +243,10 @@ struct tiocp{ | |||
243 | 243 | ||
244 | /* 0xA00000-0xBFFFFF -- PCI/GIO Device Spaces w/flush */ | 244 | /* 0xA00000-0xBFFFFF -- PCI/GIO Device Spaces w/flush */ |
245 | union { | 245 | union { |
246 | uint8_t c[0x100000 / 1]; | 246 | u8 c[0x100000 / 1]; |
247 | uint16_t s[0x100000 / 2]; | 247 | u16 s[0x100000 / 2]; |
248 | uint32_t l[0x100000 / 4]; | 248 | u32 l[0x100000 / 4]; |
249 | uint64_t d[0x100000 / 8]; | 249 | u64 d[0x100000 / 8]; |
250 | } cp_devio_raw_flush[6]; /* 0xA00000-0xBFFFFF */ | 250 | } cp_devio_raw_flush[6]; /* 0xA00000-0xBFFFFF */ |
251 | 251 | ||
252 | #define cp_devio_flush(n) cp_devio_raw_flush[((n)<2)?(n*2):(n+2)] | 252 | #define cp_devio_flush(n) cp_devio_raw_flush[((n)<2)?(n*2):(n+2)] |
diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h index 5699e75e5024..d29728492f36 100644 --- a/include/asm-ia64/sn/tiocx.h +++ b/include/asm-ia64/sn/tiocx.h | |||
@@ -40,10 +40,10 @@ struct cx_drv { | |||
40 | }; | 40 | }; |
41 | 41 | ||
42 | /* create DMA address by stripping AS bits */ | 42 | /* create DMA address by stripping AS bits */ |
43 | #define TIOCX_DMA_ADDR(a) (uint64_t)((uint64_t)(a) & 0xffffcfffffffffUL) | 43 | #define TIOCX_DMA_ADDR(a) (u64)((u64)(a) & 0xffffcfffffffffUL) |
44 | 44 | ||
45 | #define TIOCX_TO_TIOCX_DMA_ADDR(a) (uint64_t)(((uint64_t)(a) & 0xfffffffff) | \ | 45 | #define TIOCX_TO_TIOCX_DMA_ADDR(a) (u64)(((u64)(a) & 0xfffffffff) | \ |
46 | ((((uint64_t)(a)) & 0xffffc000000000UL) <<2)) | 46 | ((((u64)(a)) & 0xffffc000000000UL) <<2)) |
47 | 47 | ||
48 | #define TIO_CE_ASIC_PARTNUM 0xce00 | 48 | #define TIO_CE_ASIC_PARTNUM 0xce00 |
49 | #define TIOCX_CORELET 3 | 49 | #define TIOCX_CORELET 3 |
@@ -63,10 +63,10 @@ extern int cx_device_unregister(struct cx_dev *); | |||
63 | extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int); | 63 | extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int); |
64 | extern int cx_driver_unregister(struct cx_drv *); | 64 | extern int cx_driver_unregister(struct cx_drv *); |
65 | extern int cx_driver_register(struct cx_drv *); | 65 | extern int cx_driver_register(struct cx_drv *); |
66 | extern uint64_t tiocx_dma_addr(uint64_t addr); | 66 | extern u64 tiocx_dma_addr(u64 addr); |
67 | extern uint64_t tiocx_swin_base(int nasid); | 67 | extern u64 tiocx_swin_base(int nasid); |
68 | extern void tiocx_mmr_store(int nasid, uint64_t offset, uint64_t value); | 68 | extern void tiocx_mmr_store(int nasid, u64 offset, u64 value); |
69 | extern uint64_t tiocx_mmr_load(int nasid, uint64_t offset); | 69 | extern u64 tiocx_mmr_load(int nasid, u64 offset); |
70 | 70 | ||
71 | #endif // __KERNEL__ | 71 | #endif // __KERNEL__ |
72 | #endif // _ASM_IA64_SN_TIO_TIOCX__ | 72 | #endif // _ASM_IA64_SN_TIO_TIOCX__ |
diff --git a/include/asm-sh/bus-sh.h b/include/asm-sh/bus-sh.h index 83c5d2fd057f..e42d63b65cb5 100644 --- a/include/asm-sh/bus-sh.h +++ b/include/asm-sh/bus-sh.h | |||
@@ -21,6 +21,7 @@ struct sh_dev { | |||
21 | void *mapbase; | 21 | void *mapbase; |
22 | unsigned int irq[6]; | 22 | unsigned int irq[6]; |
23 | u64 *dma_mask; | 23 | u64 *dma_mask; |
24 | u64 coherent_dma_mask; | ||
24 | }; | 25 | }; |
25 | 26 | ||
26 | #define to_sh_dev(d) container_of((d), struct sh_dev, dev) | 27 | #define to_sh_dev(d) container_of((d), struct sh_dev, dev) |
diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h new file mode 100644 index 000000000000..fdfb75b30f0d --- /dev/null +++ b/include/asm-sh/clock.h | |||
@@ -0,0 +1,61 @@ | |||
1 | #ifndef __ASM_SH_CLOCK_H | ||
2 | #define __ASM_SH_CLOCK_H | ||
3 | |||
4 | #include <linux/kref.h> | ||
5 | #include <linux/list.h> | ||
6 | #include <linux/seq_file.h> | ||
7 | |||
8 | struct clk; | ||
9 | |||
10 | struct clk_ops { | ||
11 | void (*init)(struct clk *clk); | ||
12 | void (*enable)(struct clk *clk); | ||
13 | void (*disable)(struct clk *clk); | ||
14 | void (*recalc)(struct clk *clk); | ||
15 | int (*set_rate)(struct clk *clk, unsigned long rate); | ||
16 | }; | ||
17 | |||
18 | struct clk { | ||
19 | struct list_head node; | ||
20 | const char *name; | ||
21 | |||
22 | struct module *owner; | ||
23 | |||
24 | struct clk *parent; | ||
25 | struct clk_ops *ops; | ||
26 | |||
27 | struct kref kref; | ||
28 | |||
29 | unsigned long rate; | ||
30 | unsigned long flags; | ||
31 | }; | ||
32 | |||
33 | #define CLK_ALWAYS_ENABLED (1 << 0) | ||
34 | #define CLK_RATE_PROPAGATES (1 << 1) | ||
35 | |||
36 | /* Should be defined by processor-specific code */ | ||
37 | void arch_init_clk_ops(struct clk_ops **, int type); | ||
38 | |||
39 | /* arch/sh/kernel/cpu/clock.c */ | ||
40 | int clk_init(void); | ||
41 | |||
42 | int __clk_enable(struct clk *); | ||
43 | int clk_enable(struct clk *); | ||
44 | |||
45 | void __clk_disable(struct clk *); | ||
46 | void clk_disable(struct clk *); | ||
47 | |||
48 | int clk_set_rate(struct clk *, unsigned long rate); | ||
49 | unsigned long clk_get_rate(struct clk *); | ||
50 | void clk_recalc_rate(struct clk *); | ||
51 | |||
52 | struct clk *clk_get(const char *id); | ||
53 | void clk_put(struct clk *); | ||
54 | |||
55 | int clk_register(struct clk *); | ||
56 | void clk_unregister(struct clk *); | ||
57 | |||
58 | int show_clocks(struct seq_file *m); | ||
59 | |||
60 | #endif /* __ASM_SH_CLOCK_H */ | ||
61 | |||
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h index b972e715f9ee..954801b46022 100644 --- a/include/asm-sh/cpu-sh3/dma.h +++ b/include/asm-sh/cpu-sh3/dma.h | |||
@@ -3,5 +3,34 @@ | |||
3 | 3 | ||
4 | #define SH_DMAC_BASE 0xa4000020 | 4 | #define SH_DMAC_BASE 0xa4000020 |
5 | 5 | ||
6 | #endif /* __ASM_CPU_SH3_DMA_H */ | 6 | /* Definitions for the SuperH DMAC */ |
7 | #define TM_BURST 0x00000020 | ||
8 | #define TS_8 0x00000000 | ||
9 | #define TS_16 0x00000008 | ||
10 | #define TS_32 0x00000010 | ||
11 | #define TS_128 0x00000018 | ||
12 | |||
13 | #define CHCR_TS_MASK 0x18 | ||
14 | #define CHCR_TS_SHIFT 3 | ||
15 | |||
16 | #define DMAOR_INIT DMAOR_DME | ||
7 | 17 | ||
18 | /* | ||
19 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
20 | * with their respective values as they appear in the CHCR registers. | ||
21 | */ | ||
22 | enum { | ||
23 | XMIT_SZ_8BIT, | ||
24 | XMIT_SZ_16BIT, | ||
25 | XMIT_SZ_32BIT, | ||
26 | XMIT_SZ_128BIT, | ||
27 | }; | ||
28 | |||
29 | static unsigned int ts_shift[] __attribute__ ((used)) = { | ||
30 | [XMIT_SZ_8BIT] = 0, | ||
31 | [XMIT_SZ_16BIT] = 1, | ||
32 | [XMIT_SZ_32BIT] = 2, | ||
33 | [XMIT_SZ_128BIT] = 4, | ||
34 | }; | ||
35 | |||
36 | #endif /* __ASM_CPU_SH3_DMA_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index e2b91adf821a..0dfe61f14802 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h | |||
@@ -1,17 +1,49 @@ | |||
1 | #ifndef __ASM_CPU_SH4_DMA_H | 1 | #ifndef __ASM_CPU_SH4_DMA_H |
2 | #define __ASM_CPU_SH4_DMA_H | 2 | #define __ASM_CPU_SH4_DMA_H |
3 | 3 | ||
4 | #ifdef CONFIG_CPU_SH4A | ||
5 | #define SH_DMAC_BASE 0xfc808020 | ||
6 | #else | ||
4 | #define SH_DMAC_BASE 0xffa00000 | 7 | #define SH_DMAC_BASE 0xffa00000 |
8 | #endif | ||
5 | 9 | ||
6 | #define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \ | 10 | /* Definitions for the SuperH DMAC */ |
7 | SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30}) | 11 | #define TM_BURST 0x0000080 |
8 | #define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \ | 12 | #define TS_8 0x00000010 |
9 | SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34}) | 13 | #define TS_16 0x00000020 |
10 | #define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \ | 14 | #define TS_32 0x00000030 |
11 | SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38}) | 15 | #define TS_64 0x00000000 |
12 | #define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \ | ||
13 | SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c}) | ||
14 | #define DMAOR (SH_DMAC_BASE + 0x40) | ||
15 | 16 | ||
16 | #endif /* __ASM_CPU_SH4_DMA_H */ | 17 | #define CHCR_TS_MASK 0x30 |
18 | #define CHCR_TS_SHIFT 4 | ||
19 | |||
20 | #define DMAOR_COD 0x00000008 | ||
21 | |||
22 | #define DMAOR_INIT ( 0x8000 | DMAOR_DME ) | ||
17 | 23 | ||
24 | /* | ||
25 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
26 | * with their respective values as they appear in the CHCR registers. | ||
27 | * | ||
28 | * Defaults to a 64-bit transfer size. | ||
29 | */ | ||
30 | enum { | ||
31 | XMIT_SZ_64BIT, | ||
32 | XMIT_SZ_8BIT, | ||
33 | XMIT_SZ_16BIT, | ||
34 | XMIT_SZ_32BIT, | ||
35 | XMIT_SZ_256BIT, | ||
36 | }; | ||
37 | |||
38 | /* | ||
39 | * The DMA count is defined as the number of bytes to transfer. | ||
40 | */ | ||
41 | static unsigned int ts_shift[] __attribute__ ((used)) = { | ||
42 | [XMIT_SZ_64BIT] = 3, | ||
43 | [XMIT_SZ_8BIT] = 0, | ||
44 | [XMIT_SZ_16BIT] = 1, | ||
45 | [XMIT_SZ_32BIT] = 2, | ||
46 | [XMIT_SZ_256BIT] = 5, | ||
47 | }; | ||
48 | |||
49 | #endif /* __ASM_CPU_SH4_DMA_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 201d94fd214f..ef2b9b1ae41f 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h | |||
@@ -12,6 +12,8 @@ | |||
12 | 12 | ||
13 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) | 13 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) |
14 | #define FRQCR 0xa4150000 | 14 | #define FRQCR 0xa4150000 |
15 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
16 | #define FRQCR 0xffc80000 | ||
15 | #else | 17 | #else |
16 | #define FRQCR 0xffc00000 | 18 | #define FRQCR 0xffc00000 |
17 | #endif | 19 | #endif |
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index d3fa5c2b889d..48f1f42c5d14 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/config.h> | 4 | #include <linux/config.h> |
5 | #include <linux/mm.h> | 5 | #include <linux/mm.h> |
6 | #include <asm/scatterlist.h> | 6 | #include <asm/scatterlist.h> |
7 | #include <asm/cacheflush.h> | ||
7 | #include <asm/io.h> | 8 | #include <asm/io.h> |
8 | 9 | ||
9 | extern struct bus_type pci_bus_type; | 10 | extern struct bus_type pci_bus_type; |
@@ -141,24 +142,24 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, | |||
141 | } | 142 | } |
142 | } | 143 | } |
143 | 144 | ||
144 | static inline void dma_sync_single_for_cpu(struct device *dev, | 145 | static void dma_sync_single_for_cpu(struct device *dev, |
145 | dma_addr_t dma_handle, size_t size, | 146 | dma_addr_t dma_handle, size_t size, |
146 | enum dma_data_direction dir) | 147 | enum dma_data_direction dir) |
147 | __attribute__ ((alias("dma_sync_single"))); | 148 | __attribute__ ((alias("dma_sync_single"))); |
148 | 149 | ||
149 | static inline void dma_sync_single_for_device(struct device *dev, | 150 | static void dma_sync_single_for_device(struct device *dev, |
150 | dma_addr_t dma_handle, size_t size, | 151 | dma_addr_t dma_handle, size_t size, |
151 | enum dma_data_direction dir) | 152 | enum dma_data_direction dir) |
152 | __attribute__ ((alias("dma_sync_single"))); | 153 | __attribute__ ((alias("dma_sync_single"))); |
153 | 154 | ||
154 | static inline void dma_sync_sg_for_cpu(struct device *dev, | 155 | static void dma_sync_sg_for_cpu(struct device *dev, |
155 | struct scatterlist *sg, int nelems, | 156 | struct scatterlist *sg, int nelems, |
156 | enum dma_data_direction dir) | 157 | enum dma_data_direction dir) |
157 | __attribute__ ((alias("dma_sync_sg"))); | 158 | __attribute__ ((alias("dma_sync_sg"))); |
158 | 159 | ||
159 | static inline void dma_sync_sg_for_device(struct device *dev, | 160 | static void dma_sync_sg_for_device(struct device *dev, |
160 | struct scatterlist *sg, int nelems, | 161 | struct scatterlist *sg, int nelems, |
161 | enum dma_data_direction dir) | 162 | enum dma_data_direction dir) |
162 | __attribute__ ((alias("dma_sync_sg"))); | 163 | __attribute__ ((alias("dma_sync_sg"))); |
163 | 164 | ||
164 | static inline int dma_get_cache_alignment(void) | 165 | static inline int dma_get_cache_alignment(void) |
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index 8e9436093ca8..a118a0d43053 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/spinlock.h> | 15 | #include <linux/spinlock.h> |
16 | #include <linux/wait.h> | 16 | #include <linux/wait.h> |
17 | #include <linux/sysdev.h> | 17 | #include <linux/sysdev.h> |
18 | #include <linux/device.h> | ||
18 | #include <asm/cpu/dma.h> | 19 | #include <asm/cpu/dma.h> |
19 | #include <asm/semaphore.h> | 20 | #include <asm/semaphore.h> |
20 | 21 | ||
@@ -54,8 +55,8 @@ enum { | |||
54 | * DMA channel capabilities / flags | 55 | * DMA channel capabilities / flags |
55 | */ | 56 | */ |
56 | enum { | 57 | enum { |
57 | DMA_CONFIGURED = 0x00, | ||
58 | DMA_TEI_CAPABLE = 0x01, | 58 | DMA_TEI_CAPABLE = 0x01, |
59 | DMA_CONFIGURED = 0x02, | ||
59 | }; | 60 | }; |
60 | 61 | ||
61 | extern spinlock_t dma_spin_lock; | 62 | extern spinlock_t dma_spin_lock; |
@@ -74,7 +75,8 @@ struct dma_ops { | |||
74 | struct dma_channel { | 75 | struct dma_channel { |
75 | char dev_id[16]; | 76 | char dev_id[16]; |
76 | 77 | ||
77 | unsigned int chan; | 78 | unsigned int chan; /* Physical channel number */ |
79 | unsigned int vchan; /* Virtual channel number */ | ||
78 | unsigned int mode; | 80 | unsigned int mode; |
79 | unsigned int count; | 81 | unsigned int count; |
80 | 82 | ||
@@ -91,6 +93,8 @@ struct dma_channel { | |||
91 | }; | 93 | }; |
92 | 94 | ||
93 | struct dma_info { | 95 | struct dma_info { |
96 | struct platform_device *pdev; | ||
97 | |||
94 | const char *name; | 98 | const char *name; |
95 | unsigned int nr_channels; | 99 | unsigned int nr_channels; |
96 | unsigned long flags; | 100 | unsigned long flags; |
@@ -130,7 +134,11 @@ extern void unregister_dmac(struct dma_info *info); | |||
130 | 134 | ||
131 | #ifdef CONFIG_SYSFS | 135 | #ifdef CONFIG_SYSFS |
132 | /* arch/sh/drivers/dma/dma-sysfs.c */ | 136 | /* arch/sh/drivers/dma/dma-sysfs.c */ |
133 | extern int dma_create_sysfs_files(struct dma_channel *); | 137 | extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); |
138 | extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); | ||
139 | #else | ||
140 | #define dma_create_sysfs_file(channel, info) do { } while (0) | ||
141 | #define dma_remove_sysfs_file(channel, info) do { } while (0) | ||
134 | #endif | 142 | #endif |
135 | 143 | ||
136 | #ifdef CONFIG_PCI | 144 | #ifdef CONFIG_PCI |
diff --git a/include/asm-sh/freq.h b/include/asm-sh/freq.h index 2c0fde46a0ed..39c0e091cf58 100644 --- a/include/asm-sh/freq.h +++ b/include/asm-sh/freq.h | |||
@@ -14,16 +14,5 @@ | |||
14 | 14 | ||
15 | #include <asm/cpu/freq.h> | 15 | #include <asm/cpu/freq.h> |
16 | 16 | ||
17 | /* arch/sh/kernel/time.c */ | ||
18 | extern void get_current_frequency_divisors(unsigned int *ifc, unsigned int *pfc, unsigned int *bfc); | ||
19 | |||
20 | extern unsigned int get_ifc_divisor(unsigned int value); | ||
21 | extern unsigned int get_ifc_divisor(unsigned int value); | ||
22 | extern unsigned int get_ifc_divisor(unsigned int value); | ||
23 | |||
24 | extern unsigned int get_ifc_value(unsigned int divisor); | ||
25 | extern unsigned int get_pfc_value(unsigned int divisor); | ||
26 | extern unsigned int get_bfc_value(unsigned int divisor); | ||
27 | |||
28 | #endif /* __KERNEL__ */ | 17 | #endif /* __KERNEL__ */ |
29 | #endif /* __ASM_SH_FREQ_H */ | 18 | #endif /* __ASM_SH_FREQ_H */ |
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 6bc343fee7a0..b0b2937b6f83 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h | |||
@@ -11,7 +11,7 @@ | |||
11 | * For read{b,w,l} and write{b,w,l} there are also __raw versions, which | 11 | * For read{b,w,l} and write{b,w,l} there are also __raw versions, which |
12 | * do not have a memory barrier after them. | 12 | * do not have a memory barrier after them. |
13 | * | 13 | * |
14 | * In addition, we have | 14 | * In addition, we have |
15 | * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. | 15 | * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. |
16 | * which are processor specific. | 16 | * which are processor specific. |
17 | */ | 17 | */ |
@@ -23,19 +23,27 @@ | |||
23 | * inb by default expands to _inb, but the machine specific code may | 23 | * inb by default expands to _inb, but the machine specific code may |
24 | * define it to __inb if it chooses. | 24 | * define it to __inb if it chooses. |
25 | */ | 25 | */ |
26 | 26 | #include <linux/config.h> | |
27 | #include <asm/cache.h> | 27 | #include <asm/cache.h> |
28 | #include <asm/system.h> | 28 | #include <asm/system.h> |
29 | #include <asm/addrspace.h> | 29 | #include <asm/addrspace.h> |
30 | #include <asm/machvec.h> | 30 | #include <asm/machvec.h> |
31 | #include <linux/config.h> | 31 | #include <asm/pgtable.h> |
32 | #include <asm-generic/iomap.h> | ||
33 | |||
34 | #ifdef __KERNEL__ | ||
32 | 35 | ||
33 | /* | 36 | /* |
34 | * Depending on which platform we are running on, we need different | 37 | * Depending on which platform we are running on, we need different |
35 | * I/O functions. | 38 | * I/O functions. |
36 | */ | 39 | */ |
40 | #define __IO_PREFIX generic | ||
41 | #include <asm/io_generic.h> | ||
42 | |||
43 | #define maybebadio(port) \ | ||
44 | printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ | ||
45 | __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) | ||
37 | 46 | ||
38 | #ifdef __KERNEL__ | ||
39 | /* | 47 | /* |
40 | * Since boards are able to define their own set of I/O routines through | 48 | * Since boards are able to define their own set of I/O routines through |
41 | * their respective machine vector, we always wrap through the mv. | 49 | * their respective machine vector, we always wrap through the mv. |
@@ -44,113 +52,120 @@ | |||
44 | * a given routine, it will be wrapped to generic code at run-time. | 52 | * a given routine, it will be wrapped to generic code at run-time. |
45 | */ | 53 | */ |
46 | 54 | ||
47 | # define __inb(p) sh_mv.mv_inb((p)) | 55 | #define __inb(p) sh_mv.mv_inb((p)) |
48 | # define __inw(p) sh_mv.mv_inw((p)) | 56 | #define __inw(p) sh_mv.mv_inw((p)) |
49 | # define __inl(p) sh_mv.mv_inl((p)) | 57 | #define __inl(p) sh_mv.mv_inl((p)) |
50 | # define __outb(x,p) sh_mv.mv_outb((x),(p)) | 58 | #define __outb(x,p) sh_mv.mv_outb((x),(p)) |
51 | # define __outw(x,p) sh_mv.mv_outw((x),(p)) | 59 | #define __outw(x,p) sh_mv.mv_outw((x),(p)) |
52 | # define __outl(x,p) sh_mv.mv_outl((x),(p)) | 60 | #define __outl(x,p) sh_mv.mv_outl((x),(p)) |
53 | 61 | ||
54 | # define __inb_p(p) sh_mv.mv_inb_p((p)) | 62 | #define __inb_p(p) sh_mv.mv_inb_p((p)) |
55 | # define __inw_p(p) sh_mv.mv_inw_p((p)) | 63 | #define __inw_p(p) sh_mv.mv_inw_p((p)) |
56 | # define __inl_p(p) sh_mv.mv_inl_p((p)) | 64 | #define __inl_p(p) sh_mv.mv_inl_p((p)) |
57 | # define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) | 65 | #define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) |
58 | # define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) | 66 | #define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) |
59 | # define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) | 67 | #define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) |
60 | 68 | ||
61 | # define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) | 69 | #define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) |
62 | # define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) | 70 | #define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) |
63 | # define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) | 71 | #define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) |
64 | # define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) | 72 | #define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) |
65 | # define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) | 73 | #define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) |
66 | # define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) | 74 | #define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) |
67 | 75 | ||
68 | # define __readb(a) sh_mv.mv_readb((a)) | 76 | #define __readb(a) sh_mv.mv_readb((a)) |
69 | # define __readw(a) sh_mv.mv_readw((a)) | 77 | #define __readw(a) sh_mv.mv_readw((a)) |
70 | # define __readl(a) sh_mv.mv_readl((a)) | 78 | #define __readl(a) sh_mv.mv_readl((a)) |
71 | # define __writeb(v,a) sh_mv.mv_writeb((v),(a)) | 79 | #define __writeb(v,a) sh_mv.mv_writeb((v),(a)) |
72 | # define __writew(v,a) sh_mv.mv_writew((v),(a)) | 80 | #define __writew(v,a) sh_mv.mv_writew((v),(a)) |
73 | # define __writel(v,a) sh_mv.mv_writel((v),(a)) | 81 | #define __writel(v,a) sh_mv.mv_writel((v),(a)) |
74 | 82 | ||
75 | # define __ioremap(a,s) sh_mv.mv_ioremap((a), (s)) | 83 | #define inb __inb |
76 | # define __iounmap(a) sh_mv.mv_iounmap((a)) | 84 | #define inw __inw |
77 | 85 | #define inl __inl | |
78 | # define __isa_port2addr(a) sh_mv.mv_isa_port2addr(a) | 86 | #define outb __outb |
79 | 87 | #define outw __outw | |
80 | # define inb __inb | 88 | #define outl __outl |
81 | # define inw __inw | 89 | |
82 | # define inl __inl | 90 | #define inb_p __inb_p |
83 | # define outb __outb | 91 | #define inw_p __inw_p |
84 | # define outw __outw | 92 | #define inl_p __inl_p |
85 | # define outl __outl | 93 | #define outb_p __outb_p |
86 | 94 | #define outw_p __outw_p | |
87 | # define inb_p __inb_p | 95 | #define outl_p __outl_p |
88 | # define inw_p __inw_p | 96 | |
89 | # define inl_p __inl_p | 97 | #define insb __insb |
90 | # define outb_p __outb_p | 98 | #define insw __insw |
91 | # define outw_p __outw_p | 99 | #define insl __insl |
92 | # define outl_p __outl_p | 100 | #define outsb __outsb |
93 | 101 | #define outsw __outsw | |
94 | # define insb __insb | 102 | #define outsl __outsl |
95 | # define insw __insw | 103 | |
96 | # define insl __insl | 104 | #define __raw_readb(a) __readb((void __iomem *)(a)) |
97 | # define outsb __outsb | 105 | #define __raw_readw(a) __readw((void __iomem *)(a)) |
98 | # define outsw __outsw | 106 | #define __raw_readl(a) __readl((void __iomem *)(a)) |
99 | # define outsl __outsl | 107 | #define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a)) |
100 | 108 | #define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) | |
101 | # define __raw_readb __readb | 109 | #define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) |
102 | # define __raw_readw __readw | ||
103 | # define __raw_readl __readl | ||
104 | # define __raw_writeb __writeb | ||
105 | # define __raw_writew __writew | ||
106 | # define __raw_writel __writel | ||
107 | 110 | ||
108 | /* | 111 | /* |
109 | * The platform header files may define some of these macros to use | 112 | * The platform header files may define some of these macros to use |
110 | * the inlined versions where appropriate. These macros may also be | 113 | * the inlined versions where appropriate. These macros may also be |
111 | * redefined by userlevel programs. | 114 | * redefined by userlevel programs. |
112 | */ | 115 | */ |
113 | #ifdef __raw_readb | 116 | #ifdef __readb |
114 | # define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; }) | 117 | # define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; }) |
115 | #endif | 118 | #endif |
116 | #ifdef __raw_readw | 119 | #ifdef __raw_readw |
117 | # define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; }) | 120 | # define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; }) |
118 | #endif | 121 | #endif |
119 | #ifdef __raw_readl | 122 | #ifdef __raw_readl |
120 | # define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; }) | 123 | # define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; }) |
121 | #endif | 124 | #endif |
122 | 125 | ||
123 | #ifdef __raw_writeb | 126 | #ifdef __raw_writeb |
124 | # define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); }) | 127 | # define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) |
125 | #endif | 128 | #endif |
126 | #ifdef __raw_writew | 129 | #ifdef __raw_writew |
127 | # define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); }) | 130 | # define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) |
128 | #endif | 131 | #endif |
129 | #ifdef __raw_writel | 132 | #ifdef __raw_writel |
130 | # define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); }) | 133 | # define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) |
131 | #endif | 134 | #endif |
132 | 135 | ||
133 | #define readb_relaxed(a) readb(a) | 136 | #define readb_relaxed(a) readb(a) |
134 | #define readw_relaxed(a) readw(a) | 137 | #define readw_relaxed(a) readw(a) |
135 | #define readl_relaxed(a) readl(a) | 138 | #define readl_relaxed(a) readl(a) |
136 | 139 | ||
137 | #define mmiowb() | 140 | /* Simple MMIO */ |
141 | #define ioread8(a) readb(a) | ||
142 | #define ioread16(a) readw(a) | ||
143 | #define ioread16be(a) be16_to_cpu(__raw_readw((a))) | ||
144 | #define ioread32(a) readl(a) | ||
145 | #define ioread32be(a) be32_to_cpu(__raw_readl((a))) | ||
138 | 146 | ||
139 | /* | 147 | #define iowrite8(v,a) writeb((v),(a)) |
140 | * If the platform has PC-like I/O, this function converts the offset into | 148 | #define iowrite16(v,a) writew((v),(a)) |
141 | * an address. | 149 | #define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) |
142 | */ | 150 | #define iowrite32(v,a) writel((v),(a)) |
143 | static __inline__ unsigned long isa_port2addr(unsigned long offset) | 151 | #define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) |
144 | { | 152 | |
145 | return __isa_port2addr(offset); | 153 | #define ioread8_rep(a,d,c) insb((a),(d),(c)) |
146 | } | 154 | #define ioread16_rep(a,d,c) insw((a),(d),(c)) |
155 | #define ioread32_rep(a,d,c) insl((a),(d),(c)) | ||
156 | |||
157 | #define iowrite8_rep(a,s,c) outsb((a),(s),(c)) | ||
158 | #define iowrite16_rep(a,s,c) outsw((a),(s),(c)) | ||
159 | #define iowrite32_rep(a,s,c) outsl((a),(s),(c)) | ||
160 | |||
161 | #define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ | ||
147 | 162 | ||
148 | /* | 163 | /* |
149 | * This function provides a method for the generic case where a board-specific | 164 | * This function provides a method for the generic case where a board-specific |
150 | * isa_port2addr simply needs to return the port + some arbitrary port base. | 165 | * ioport_map simply needs to return the port + some arbitrary port base. |
151 | * | 166 | * |
152 | * We use this at board setup time to implicitly set the port base, and | 167 | * We use this at board setup time to implicitly set the port base, and |
153 | * as a result, we can use the generic isa_port2addr. | 168 | * as a result, we can use the generic ioport_map. |
154 | */ | 169 | */ |
155 | static inline void __set_io_port_base(unsigned long pbase) | 170 | static inline void __set_io_port_base(unsigned long pbase) |
156 | { | 171 | { |
@@ -159,51 +174,52 @@ static inline void __set_io_port_base(unsigned long pbase) | |||
159 | generic_io_base = pbase; | 174 | generic_io_base = pbase; |
160 | } | 175 | } |
161 | 176 | ||
162 | #define isa_readb(a) readb(isa_port2addr(a)) | 177 | #define isa_readb(a) readb(ioport_map(a, 1)) |
163 | #define isa_readw(a) readw(isa_port2addr(a)) | 178 | #define isa_readw(a) readw(ioport_map(a, 2)) |
164 | #define isa_readl(a) readl(isa_port2addr(a)) | 179 | #define isa_readl(a) readl(ioport_map(a, 4)) |
165 | #define isa_writeb(b,a) writeb(b,isa_port2addr(a)) | 180 | #define isa_writeb(b,a) writeb(b,ioport_map(a, 1)) |
166 | #define isa_writew(w,a) writew(w,isa_port2addr(a)) | 181 | #define isa_writew(w,a) writew(w,ioport_map(a, 2)) |
167 | #define isa_writel(l,a) writel(l,isa_port2addr(a)) | 182 | #define isa_writel(l,a) writel(l,ioport_map(a, 4)) |
183 | |||
168 | #define isa_memset_io(a,b,c) \ | 184 | #define isa_memset_io(a,b,c) \ |
169 | memset((void *)(isa_port2addr((unsigned long)a)),(b),(c)) | 185 | memset((void *)(ioport_map((unsigned long)(a), 1)),(b),(c)) |
170 | #define isa_memcpy_fromio(a,b,c) \ | 186 | #define isa_memcpy_fromio(a,b,c) \ |
171 | memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c)) | 187 | memcpy((a),(void *)(ioport_map((unsigned long)(b), 1)),(c)) |
172 | #define isa_memcpy_toio(a,b,c) \ | 188 | #define isa_memcpy_toio(a,b,c) \ |
173 | memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c)) | 189 | memcpy((void *)(ioport_map((unsigned long)(a), 1)),(b),(c)) |
174 | 190 | ||
175 | /* We really want to try and get these to memcpy etc */ | 191 | /* We really want to try and get these to memcpy etc */ |
176 | extern void memcpy_fromio(void *, unsigned long, unsigned long); | 192 | extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); |
177 | extern void memcpy_toio(unsigned long, const void *, unsigned long); | 193 | extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); |
178 | extern void memset_io(unsigned long, int, unsigned long); | 194 | extern void memset_io(volatile void __iomem *, int, unsigned long); |
179 | 195 | ||
180 | /* SuperH on-chip I/O functions */ | 196 | /* SuperH on-chip I/O functions */ |
181 | static __inline__ unsigned char ctrl_inb(unsigned long addr) | 197 | static inline unsigned char ctrl_inb(unsigned long addr) |
182 | { | 198 | { |
183 | return *(volatile unsigned char*)addr; | 199 | return *(volatile unsigned char*)addr; |
184 | } | 200 | } |
185 | 201 | ||
186 | static __inline__ unsigned short ctrl_inw(unsigned long addr) | 202 | static inline unsigned short ctrl_inw(unsigned long addr) |
187 | { | 203 | { |
188 | return *(volatile unsigned short*)addr; | 204 | return *(volatile unsigned short*)addr; |
189 | } | 205 | } |
190 | 206 | ||
191 | static __inline__ unsigned int ctrl_inl(unsigned long addr) | 207 | static inline unsigned int ctrl_inl(unsigned long addr) |
192 | { | 208 | { |
193 | return *(volatile unsigned long*)addr; | 209 | return *(volatile unsigned long*)addr; |
194 | } | 210 | } |
195 | 211 | ||
196 | static __inline__ void ctrl_outb(unsigned char b, unsigned long addr) | 212 | static inline void ctrl_outb(unsigned char b, unsigned long addr) |
197 | { | 213 | { |
198 | *(volatile unsigned char*)addr = b; | 214 | *(volatile unsigned char*)addr = b; |
199 | } | 215 | } |
200 | 216 | ||
201 | static __inline__ void ctrl_outw(unsigned short b, unsigned long addr) | 217 | static inline void ctrl_outw(unsigned short b, unsigned long addr) |
202 | { | 218 | { |
203 | *(volatile unsigned short*)addr = b; | 219 | *(volatile unsigned short*)addr = b; |
204 | } | 220 | } |
205 | 221 | ||
206 | static __inline__ void ctrl_outl(unsigned int b, unsigned long addr) | 222 | static inline void ctrl_outl(unsigned int b, unsigned long addr) |
207 | { | 223 | { |
208 | *(volatile unsigned long*)addr = b; | 224 | *(volatile unsigned long*)addr = b; |
209 | } | 225 | } |
@@ -214,12 +230,12 @@ static __inline__ void ctrl_outl(unsigned int b, unsigned long addr) | |||
214 | * Change virtual addresses to physical addresses and vv. | 230 | * Change virtual addresses to physical addresses and vv. |
215 | * These are trivial on the 1:1 Linux/SuperH mapping | 231 | * These are trivial on the 1:1 Linux/SuperH mapping |
216 | */ | 232 | */ |
217 | static __inline__ unsigned long virt_to_phys(volatile void * address) | 233 | static inline unsigned long virt_to_phys(volatile void *address) |
218 | { | 234 | { |
219 | return PHYSADDR(address); | 235 | return PHYSADDR(address); |
220 | } | 236 | } |
221 | 237 | ||
222 | static __inline__ void * phys_to_virt(unsigned long address) | 238 | static inline void *phys_to_virt(unsigned long address) |
223 | { | 239 | { |
224 | return (void *)P1SEGADDR(address); | 240 | return (void *)P1SEGADDR(address); |
225 | } | 241 | } |
@@ -234,27 +250,60 @@ static __inline__ void * phys_to_virt(unsigned long address) | |||
234 | * differently. On the x86 architecture, we just read/write the | 250 | * differently. On the x86 architecture, we just read/write the |
235 | * memory location directly. | 251 | * memory location directly. |
236 | * | 252 | * |
237 | * On SH, we have the whole physical address space mapped at all times | 253 | * On SH, we traditionally have the whole physical address space mapped |
238 | * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do | 254 | * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not |
239 | * anything. (This isn't true for all machines but we still handle | 255 | * need to do anything but place the address in the proper segment. This |
240 | * these cases with wired TLB entries anyway ...) | 256 | * is true for P1 and P2 addresses, as well as some P3 ones. However, |
257 | * most of the P3 addresses and newer cores using extended addressing | ||
258 | * need to map through page tables, so the ioremap() implementation | ||
259 | * becomes a bit more complicated. See arch/sh/mm/ioremap.c for | ||
260 | * additional notes on this. | ||
241 | * | 261 | * |
242 | * We cheat a bit and always return uncachable areas until we've fixed | 262 | * We cheat a bit and always return uncachable areas until we've fixed |
243 | * the drivers to handle caching properly. | 263 | * the drivers to handle caching properly. |
244 | */ | 264 | */ |
245 | static __inline__ void * ioremap(unsigned long offset, unsigned long size) | 265 | #ifdef CONFIG_MMU |
266 | void __iomem *__ioremap(unsigned long offset, unsigned long size, | ||
267 | unsigned long flags); | ||
268 | void __iounmap(void __iomem *addr); | ||
269 | #else | ||
270 | #define __ioremap(offset, size, flags) ((void __iomem *)(offset)) | ||
271 | #define __iounmap(addr) do { } while (0) | ||
272 | #endif /* CONFIG_MMU */ | ||
273 | |||
274 | static inline void __iomem * | ||
275 | __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) | ||
246 | { | 276 | { |
247 | return __ioremap(offset, size); | 277 | unsigned long last_addr = offset + size - 1; |
278 | |||
279 | /* | ||
280 | * For P1 and P2 space this is trivial, as everything is already | ||
281 | * mapped. Uncached access for P1 addresses are done through P2. | ||
282 | * In the P3 case or for addresses outside of the 29-bit space, | ||
283 | * mapping must be done by the PMB or by using page tables. | ||
284 | */ | ||
285 | if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { | ||
286 | if (unlikely(flags & _PAGE_CACHABLE)) | ||
287 | return (void __iomem *)P1SEGADDR(offset); | ||
288 | |||
289 | return (void __iomem *)P2SEGADDR(offset); | ||
290 | } | ||
291 | |||
292 | return __ioremap(offset, size, flags); | ||
248 | } | 293 | } |
249 | 294 | ||
250 | static __inline__ void iounmap(void *addr) | 295 | #define ioremap(offset, size) \ |
251 | { | 296 | __ioremap_mode((offset), (size), 0) |
252 | return __iounmap(addr); | 297 | #define ioremap_nocache(offset, size) \ |
253 | } | 298 | __ioremap_mode((offset), (size), 0) |
254 | 299 | #define ioremap_cache(offset, size) \ | |
255 | #define ioremap_nocache(off,size) ioremap(off,size) | 300 | __ioremap_mode((offset), (size), _PAGE_CACHABLE) |
256 | 301 | #define p3_ioremap(offset, size, flags) \ | |
257 | static __inline__ int check_signature(unsigned long io_addr, | 302 | __ioremap((offset), (size), (flags)) |
303 | #define iounmap(addr) \ | ||
304 | __iounmap((addr)) | ||
305 | |||
306 | static inline int check_signature(char __iomem *io_addr, | ||
258 | const unsigned char *signature, int length) | 307 | const unsigned char *signature, int length) |
259 | { | 308 | { |
260 | int retval = 0; | 309 | int retval = 0; |
diff --git a/include/asm-sh/io_generic.h b/include/asm-sh/io_generic.h index be14587342f7..92fc6070d7b3 100644 --- a/include/asm-sh/io_generic.h +++ b/include/asm-sh/io_generic.h | |||
@@ -1,51 +1,49 @@ | |||
1 | /* | 1 | /* |
2 | * include/asm-sh/io_generic.h | 2 | * Trivial I/O routine definitions, intentionally meant to be included |
3 | * | 3 | * multiple times. Ugly I/O routine concatenation helpers taken from |
4 | * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) | 4 | * alpha. Must be included _before_ io.h to avoid preprocessor-induced |
5 | * | 5 | * routine mismatch. |
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * Generic IO functions | ||
10 | */ | 6 | */ |
11 | 7 | #define IO_CONCAT(a,b) _IO_CONCAT(a,b) | |
12 | #ifndef _ASM_SH_IO_GENERIC_H | 8 | #define _IO_CONCAT(a,b) a ## _ ## b |
13 | #define _ASM_SH_IO_GENERIC_H | 9 | |
14 | 10 | #ifndef __IO_PREFIX | |
15 | extern unsigned long generic_io_base; | 11 | #error "Don't include this header without a valid system prefix" |
16 | 12 | #endif | |
17 | extern unsigned char generic_inb(unsigned long port); | 13 | |
18 | extern unsigned short generic_inw(unsigned long port); | 14 | u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); |
19 | extern unsigned int generic_inl(unsigned long port); | 15 | u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); |
20 | 16 | u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); | |
21 | extern void generic_outb(unsigned char value, unsigned long port); | 17 | |
22 | extern void generic_outw(unsigned short value, unsigned long port); | 18 | void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); |
23 | extern void generic_outl(unsigned int value, unsigned long port); | 19 | void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); |
24 | 20 | void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); | |
25 | extern unsigned char generic_inb_p(unsigned long port); | 21 | |
26 | extern unsigned short generic_inw_p(unsigned long port); | 22 | u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); |
27 | extern unsigned int generic_inl_p(unsigned long port); | 23 | u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); |
28 | extern void generic_outb_p(unsigned char value, unsigned long port); | 24 | u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); |
29 | extern void generic_outw_p(unsigned short value, unsigned long port); | 25 | void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); |
30 | extern void generic_outl_p(unsigned int value, unsigned long port); | 26 | void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); |
31 | 27 | void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); | |
32 | extern void generic_insb(unsigned long port, void *addr, unsigned long count); | 28 | |
33 | extern void generic_insw(unsigned long port, void *addr, unsigned long count); | 29 | void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); |
34 | extern void generic_insl(unsigned long port, void *addr, unsigned long count); | 30 | void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); |
35 | extern void generic_outsb(unsigned long port, const void *addr, unsigned long count); | 31 | void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); |
36 | extern void generic_outsw(unsigned long port, const void *addr, unsigned long count); | 32 | void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); |
37 | extern void generic_outsl(unsigned long port, const void *addr, unsigned long count); | 33 | void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); |
38 | 34 | void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); | |
39 | extern unsigned char generic_readb(unsigned long addr); | 35 | |
40 | extern unsigned short generic_readw(unsigned long addr); | 36 | u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *); |
41 | extern unsigned int generic_readl(unsigned long addr); | 37 | u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *); |
42 | extern void generic_writeb(unsigned char b, unsigned long addr); | 38 | u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *); |
43 | extern void generic_writew(unsigned short b, unsigned long addr); | 39 | void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *); |
44 | extern void generic_writel(unsigned int b, unsigned long addr); | 40 | void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *); |
45 | 41 | void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *); | |
46 | extern void *generic_ioremap(unsigned long offset, unsigned long size); | 42 | |
47 | extern void generic_iounmap(void *addr); | 43 | void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); |
48 | 44 | void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); | |
49 | extern unsigned long generic_isa_port2addr(unsigned long offset); | 45 | |
50 | 46 | void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); | |
51 | #endif /* _ASM_SH_IO_GENERIC_H */ | 47 | void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); |
48 | |||
49 | #undef __IO_PREFIX | ||
diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h new file mode 100644 index 000000000000..8c8ca1281084 --- /dev/null +++ b/include/asm-sh/irq-sh7780.h | |||
@@ -0,0 +1,349 @@ | |||
1 | #ifndef __ASM_SH_IRQ_SH7780_H | ||
2 | #define __ASM_SH_IRQ_SH7780_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/irq-sh7780.h | ||
6 | * | ||
7 | * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp> | ||
8 | */ | ||
9 | |||
10 | #ifdef CONFIG_IDE | ||
11 | # ifndef IRQ_CFCARD | ||
12 | # define IRQ_CFCARD 14 | ||
13 | # endif | ||
14 | # ifndef IRQ_PCMCIA | ||
15 | # define IRQ_PCMCIA 15 | ||
16 | # endif | ||
17 | #endif | ||
18 | |||
19 | #define INTC_BASE 0xffd00000 | ||
20 | #define INTC_ICR0 (INTC_BASE+0x0) | ||
21 | #define INTC_ICR1 (INTC_BASE+0x1c) | ||
22 | #define INTC_INTPRI (INTC_BASE+0x10) | ||
23 | #define INTC_INTREQ (INTC_BASE+0x24) | ||
24 | #define INTC_INTMSK0 (INTC_BASE+0x44) | ||
25 | #define INTC_INTMSK1 (INTC_BASE+0x48) | ||
26 | #define INTC_INTMSK2 (INTC_BASE+0x40080) | ||
27 | #define INTC_INTMSKCLR0 (INTC_BASE+0x64) | ||
28 | #define INTC_INTMSKCLR1 (INTC_BASE+0x68) | ||
29 | #define INTC_INTMSKCLR2 (INTC_BASE+0x40084) | ||
30 | #define INTC_NMIFCR (INTC_BASE+0xc0) | ||
31 | #define INTC_USERIMASK (INTC_BASE+0x30000) | ||
32 | |||
33 | #define INTC_INT2PRI0 (INTC_BASE+0x40000) | ||
34 | #define INTC_INT2PRI1 (INTC_BASE+0x40004) | ||
35 | #define INTC_INT2PRI2 (INTC_BASE+0x40008) | ||
36 | #define INTC_INT2PRI3 (INTC_BASE+0x4000c) | ||
37 | #define INTC_INT2PRI4 (INTC_BASE+0x40010) | ||
38 | #define INTC_INT2PRI5 (INTC_BASE+0x40014) | ||
39 | #define INTC_INT2PRI6 (INTC_BASE+0x40018) | ||
40 | #define INTC_INT2PRI7 (INTC_BASE+0x4001c) | ||
41 | #define INTC_INT2A0 (INTC_BASE+0x40030) | ||
42 | #define INTC_INT2A1 (INTC_BASE+0x40034) | ||
43 | #define INTC_INT2MSKR (INTC_BASE+0x40038) | ||
44 | #define INTC_INT2MSKCR (INTC_BASE+0x4003c) | ||
45 | #define INTC_INT2B0 (INTC_BASE+0x40040) | ||
46 | #define INTC_INT2B1 (INTC_BASE+0x40044) | ||
47 | #define INTC_INT2B2 (INTC_BASE+0x40048) | ||
48 | #define INTC_INT2B3 (INTC_BASE+0x4004c) | ||
49 | #define INTC_INT2B4 (INTC_BASE+0x40050) | ||
50 | #define INTC_INT2B5 (INTC_BASE+0x40054) | ||
51 | #define INTC_INT2B6 (INTC_BASE+0x40058) | ||
52 | #define INTC_INT2B7 (INTC_BASE+0x4005c) | ||
53 | #define INTC_INT2GPIC (INTC_BASE+0x40090) | ||
54 | /* | ||
55 | NOTE: | ||
56 | *_IRQ = (INTEVT2 - 0x200)/0x20 | ||
57 | */ | ||
58 | /* IRQ 0-7 line external int*/ | ||
59 | #define IRQ0_IRQ 2 | ||
60 | #define IRQ0_IPR_ADDR INTC_INTPRI | ||
61 | #define IRQ0_IPR_POS 7 | ||
62 | #define IRQ0_PRIORITY 2 | ||
63 | |||
64 | #define IRQ1_IRQ 4 | ||
65 | #define IRQ1_IPR_ADDR INTC_INTPRI | ||
66 | #define IRQ1_IPR_POS 6 | ||
67 | #define IRQ1_PRIORITY 2 | ||
68 | |||
69 | #define IRQ2_IRQ 6 | ||
70 | #define IRQ2_IPR_ADDR INTC_INTPRI | ||
71 | #define IRQ2_IPR_POS 5 | ||
72 | #define IRQ2_PRIORITY 2 | ||
73 | |||
74 | #define IRQ3_IRQ 8 | ||
75 | #define IRQ3_IPR_ADDR INTC_INTPRI | ||
76 | #define IRQ3_IPR_POS 4 | ||
77 | #define IRQ3_PRIORITY 2 | ||
78 | |||
79 | #define IRQ4_IRQ 10 | ||
80 | #define IRQ4_IPR_ADDR INTC_INTPRI | ||
81 | #define IRQ4_IPR_POS 3 | ||
82 | #define IRQ4_PRIORITY 2 | ||
83 | |||
84 | #define IRQ5_IRQ 12 | ||
85 | #define IRQ5_IPR_ADDR INTC_INTPRI | ||
86 | #define IRQ5_IPR_POS 2 | ||
87 | #define IRQ5_PRIORITY 2 | ||
88 | |||
89 | #define IRQ6_IRQ 14 | ||
90 | #define IRQ6_IPR_ADDR INTC_INTPRI | ||
91 | #define IRQ6_IPR_POS 1 | ||
92 | #define IRQ6_PRIORITY 2 | ||
93 | |||
94 | #define IRQ7_IRQ 0 | ||
95 | #define IRQ7_IPR_ADDR INTC_INTPRI | ||
96 | #define IRQ7_IPR_POS 0 | ||
97 | #define IRQ7_PRIORITY 2 | ||
98 | |||
99 | /* TMU */ | ||
100 | /* ch0 */ | ||
101 | #define TMU_IRQ 28 | ||
102 | #define TMU_IPR_ADDR INTC_INT2PRI0 | ||
103 | #define TMU_IPR_POS 3 | ||
104 | #define TMU_PRIORITY 2 | ||
105 | |||
106 | #define TIMER_IRQ 28 | ||
107 | #define TIMER_IPR_ADDR INTC_INT2PRI0 | ||
108 | #define TIMER_IPR_POS 3 | ||
109 | #define TIMER_PRIORITY 2 | ||
110 | |||
111 | /* ch 1*/ | ||
112 | #define TMU_CH1_IRQ 29 | ||
113 | #define TMU_CH1_IPR_ADDR INTC_INT2PRI0 | ||
114 | #define TMU_CH1_IPR_POS 2 | ||
115 | #define TMU_CH1_PRIORITY 2 | ||
116 | |||
117 | #define TIMER1_IRQ 29 | ||
118 | #define TIMER1_IPR_ADDR INTC_INT2PRI0 | ||
119 | #define TIMER1_IPR_POS 2 | ||
120 | #define TIMER1_PRIORITY 2 | ||
121 | |||
122 | /* ch 2*/ | ||
123 | #define TMU_CH2_IRQ 30 | ||
124 | #define TMU_CH2_IPR_ADDR INTC_INT2PRI0 | ||
125 | #define TMU_CH2_IPR_POS 1 | ||
126 | #define TMU_CH2_PRIORITY 2 | ||
127 | /* ch 2 Input capture */ | ||
128 | #define TMU_CH2IC_IRQ 31 | ||
129 | #define TMU_CH2IC_IPR_ADDR INTC_INT2PRI0 | ||
130 | #define TMU_CH2IC_IPR_POS 0 | ||
131 | #define TMU_CH2IC_PRIORITY 2 | ||
132 | /* ch 3 */ | ||
133 | #define TMU_CH3_IRQ 96 | ||
134 | #define TMU_CH3_IPR_ADDR INTC_INT2PRI1 | ||
135 | #define TMU_CH3_IPR_POS 3 | ||
136 | #define TMU_CH3_PRIORITY 2 | ||
137 | /* ch 4 */ | ||
138 | #define TMU_CH4_IRQ 97 | ||
139 | #define TMU_CH4_IPR_ADDR INTC_INT2PRI1 | ||
140 | #define TMU_CH4_IPR_POS 2 | ||
141 | #define TMU_CH4_PRIORITY 2 | ||
142 | /* ch 5*/ | ||
143 | #define TMU_CH5_IRQ 98 | ||
144 | #define TMU_CH5_IPR_ADDR INTC_INT2PRI1 | ||
145 | #define TMU_CH5_IPR_POS 1 | ||
146 | #define TMU_CH5_PRIORITY 2 | ||
147 | |||
148 | #define RTC_IRQ 22 | ||
149 | #define RTC_IPR_ADDR INTC_INT2PRI1 | ||
150 | #define RTC_IPR_POS 0 | ||
151 | #define RTC_PRIORITY TIMER_PRIORITY | ||
152 | |||
153 | /* SCIF0 */ | ||
154 | #define SCIF0_ERI_IRQ 40 | ||
155 | #define SCIF0_RXI_IRQ 41 | ||
156 | #define SCIF0_BRI_IRQ 42 | ||
157 | #define SCIF0_TXI_IRQ 43 | ||
158 | #define SCIF0_IPR_ADDR INTC_INT2PRI2 | ||
159 | #define SCIF0_IPR_POS 3 | ||
160 | #define SCIF0_PRIORITY 3 | ||
161 | |||
162 | /* SCIF1 */ | ||
163 | #define SCIF1_ERI_IRQ 76 | ||
164 | #define SCIF1_RXI_IRQ 77 | ||
165 | #define SCIF1_BRI_IRQ 78 | ||
166 | #define SCIF1_TXI_IRQ 79 | ||
167 | #define SCIF1_IPR_ADDR INTC_INT2PRI2 | ||
168 | #define SCIF1_IPR_POS 2 | ||
169 | #define SCIF1_PRIORITY 3 | ||
170 | |||
171 | #define WDT_IRQ 27 | ||
172 | #define WDT_IPR_ADDR INTC_INT2PRI2 | ||
173 | #define WDT_IPR_POS 1 | ||
174 | #define WDT_PRIORITY 2 | ||
175 | |||
176 | /* DMAC(0) */ | ||
177 | #define DMINT0_IRQ 34 | ||
178 | #define DMINT1_IRQ 35 | ||
179 | #define DMINT2_IRQ 36 | ||
180 | #define DMINT3_IRQ 37 | ||
181 | #define DMINT4_IRQ 44 | ||
182 | #define DMINT5_IRQ 45 | ||
183 | #define DMINT6_IRQ 46 | ||
184 | #define DMINT7_IRQ 47 | ||
185 | #define DMAE_IRQ 38 | ||
186 | #define DMA0_IPR_ADDR INTC_INT2PRI3 | ||
187 | #define DMA0_IPR_POS 2 | ||
188 | #define DMA0_PRIORITY 7 | ||
189 | |||
190 | /* DMAC(1) */ | ||
191 | #define DMINT8_IRQ 92 | ||
192 | #define DMINT9_IRQ 93 | ||
193 | #define DMINT10_IRQ 94 | ||
194 | #define DMINT11_IRQ 95 | ||
195 | #define DMA1_IPR_ADDR INTC_INT2PRI3 | ||
196 | #define DMA1_IPR_POS 1 | ||
197 | #define DMA1_PRIORITY 7 | ||
198 | |||
199 | #define DMTE0_IRQ DMINT0_IRQ | ||
200 | #define DMTE4_IRQ DMINT4_IRQ | ||
201 | #define DMA_IPR_ADDR DMA0_IPR_ADDR | ||
202 | #define DMA_IPR_POS DMA0_IPR_POS | ||
203 | #define DMA_PRIORITY DMA0_PRIORITY | ||
204 | |||
205 | /* CMT */ | ||
206 | #define CMT_IRQ 56 | ||
207 | #define CMT_IPR_ADDR INTC_INT2PRI4 | ||
208 | #define CMT_IPR_POS 3 | ||
209 | #define CMT_PRIORITY 0 | ||
210 | |||
211 | /* HAC */ | ||
212 | #define HAC_IRQ 60 | ||
213 | #define HAC_IPR_ADDR INTC_INT2PRI4 | ||
214 | #define HAC_IPR_POS 2 | ||
215 | #define CMT_PRIORITY 0 | ||
216 | |||
217 | /* PCIC(0) */ | ||
218 | #define PCIC0_IRQ 64 | ||
219 | #define PCIC0_IPR_ADDR INTC_INT2PRI4 | ||
220 | #define PCIC0_IPR_POS 1 | ||
221 | #define PCIC0_PRIORITY 2 | ||
222 | |||
223 | /* PCIC(1) */ | ||
224 | #define PCIC1_IRQ 65 | ||
225 | #define PCIC1_IPR_ADDR INTC_INT2PRI4 | ||
226 | #define PCIC1_IPR_POS 0 | ||
227 | #define PCIC1_PRIORITY 2 | ||
228 | |||
229 | /* PCIC(2) */ | ||
230 | #define PCIC2_IRQ 66 | ||
231 | #define PCIC2_IPR_ADDR INTC_INT2PRI5 | ||
232 | #define PCIC2_IPR_POS 3 | ||
233 | #define PCIC2_PRIORITY 2 | ||
234 | |||
235 | /* PCIC(3) */ | ||
236 | #define PCIC3_IRQ 67 | ||
237 | #define PCIC3_IPR_ADDR INTC_INT2PRI5 | ||
238 | #define PCIC3_IPR_POS 2 | ||
239 | #define PCIC3_PRIORITY 2 | ||
240 | |||
241 | /* PCIC(4) */ | ||
242 | #define PCIC4_IRQ 68 | ||
243 | #define PCIC4_IPR_ADDR INTC_INT2PRI5 | ||
244 | #define PCIC4_IPR_POS 1 | ||
245 | #define PCIC4_PRIORITY 2 | ||
246 | |||
247 | /* PCIC(5) */ | ||
248 | #define PCICERR_IRQ 69 | ||
249 | #define PCICPWD3_IRQ 70 | ||
250 | #define PCICPWD2_IRQ 71 | ||
251 | #define PCICPWD1_IRQ 72 | ||
252 | #define PCICPWD0_IRQ 73 | ||
253 | #define PCIC5_IPR_ADDR INTC_INT2PRI5 | ||
254 | #define PCIC5_IPR_POS 0 | ||
255 | #define PCIC5_PRIORITY 2 | ||
256 | |||
257 | /* SIOF */ | ||
258 | #define SIOF_IRQ 80 | ||
259 | #define SIOF_IPR_ADDR INTC_INT2PRI6 | ||
260 | #define SIOF_IPR_POS 3 | ||
261 | #define SIOF_PRIORITY 3 | ||
262 | |||
263 | /* HSPI */ | ||
264 | #define HSPI_IRQ 84 | ||
265 | #define HSPI_IPR_ADDR INTC_INT2PRI6 | ||
266 | #define HSPI_IPR_POS 2 | ||
267 | #define HSPI_PRIORITY 3 | ||
268 | |||
269 | /* MMCIF */ | ||
270 | #define MMCIF_FSTAT_IRQ 88 | ||
271 | #define MMCIF_TRAN_IRQ 89 | ||
272 | #define MMCIF_ERR_IRQ 90 | ||
273 | #define MMCIF_FRDY_IRQ 91 | ||
274 | #define MMCIF_IPR_ADDR INTC_INT2PRI6 | ||
275 | #define MMCIF_IPR_POS 1 | ||
276 | #define HSPI_PRIORITY 3 | ||
277 | |||
278 | /* SSI */ | ||
279 | #define SSI_IRQ 100 | ||
280 | #define SSI_IPR_ADDR INTC_INT2PRI6 | ||
281 | #define SSI_IPR_POS 0 | ||
282 | #define SSI_PRIORITY 3 | ||
283 | |||
284 | /* FLCTL */ | ||
285 | #define FLCTL_FLSTE_IRQ 104 | ||
286 | #define FLCTL_FLTEND_IRQ 105 | ||
287 | #define FLCTL_FLTRQ0_IRQ 106 | ||
288 | #define FLCTL_FLTRQ1_IRQ 107 | ||
289 | #define FLCTL_IPR_ADDR INTC_INT2PRI7 | ||
290 | #define FLCTL_IPR_POS 3 | ||
291 | #define FLCTL_PRIORITY 3 | ||
292 | |||
293 | /* GPIO */ | ||
294 | #define GPIO0_IRQ 108 | ||
295 | #define GPIO1_IRQ 109 | ||
296 | #define GPIO2_IRQ 110 | ||
297 | #define GPIO3_IRQ 111 | ||
298 | #define GPIO_IPR_ADDR INTC_INT2PRI7 | ||
299 | #define GPIO_IPR_POS 2 | ||
300 | #define GPIO_PRIORITY 3 | ||
301 | |||
302 | /* ONCHIP_NR_IRQS */ | ||
303 | #define NR_IRQS 150 /* 111 + 16 */ | ||
304 | |||
305 | /* In a generic kernel, NR_IRQS is an upper bound, and we should use | ||
306 | * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value. | ||
307 | */ | ||
308 | #define ACTUAL_NR_IRQS NR_IRQS | ||
309 | |||
310 | extern void disable_irq(unsigned int); | ||
311 | extern void disable_irq_nosync(unsigned int); | ||
312 | extern void enable_irq(unsigned int); | ||
313 | |||
314 | /* | ||
315 | * Simple Mask Register Support | ||
316 | */ | ||
317 | extern void make_maskreg_irq(unsigned int irq); | ||
318 | extern unsigned short *irq_mask_register; | ||
319 | |||
320 | /* | ||
321 | * Function for "on chip support modules". | ||
322 | */ | ||
323 | extern void make_imask_irq(unsigned int irq); | ||
324 | |||
325 | #define INTC_TMU0_MSK 0 | ||
326 | #define INTC_TMU3_MSK 1 | ||
327 | #define INTC_RTC_MSK 2 | ||
328 | #define INTC_SCIF0_MSK 3 | ||
329 | #define INTC_SCIF1_MSK 4 | ||
330 | #define INTC_WDT_MSK 5 | ||
331 | #define INTC_HUID_MSK 7 | ||
332 | #define INTC_DMAC0_MSK 8 | ||
333 | #define INTC_DMAC1_MSK 9 | ||
334 | #define INTC_CMT_MSK 12 | ||
335 | #define INTC_HAC_MSK 13 | ||
336 | #define INTC_PCIC0_MSK 14 | ||
337 | #define INTC_PCIC1_MSK 15 | ||
338 | #define INTC_PCIC2_MSK 16 | ||
339 | #define INTC_PCIC3_MSK 17 | ||
340 | #define INTC_PCIC4_MSK 18 | ||
341 | #define INTC_PCIC5_MSK 19 | ||
342 | #define INTC_SIOF_MSK 20 | ||
343 | #define INTC_HSPI_MSK 21 | ||
344 | #define INTC_MMCIF_MSK 22 | ||
345 | #define INTC_SSI_MSK 23 | ||
346 | #define INTC_FLCTL_MSK 24 | ||
347 | #define INTC_GPIO_MSK 25 | ||
348 | |||
349 | #endif /* __ASM_SH_IRQ_SH7780_H */ | ||
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 614a8c13b721..060ec3c27207 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h | |||
@@ -15,13 +15,20 @@ | |||
15 | #include <asm/machvec.h> | 15 | #include <asm/machvec.h> |
16 | #include <asm/ptrace.h> /* for pt_regs */ | 16 | #include <asm/ptrace.h> /* for pt_regs */ |
17 | 17 | ||
18 | #if defined(CONFIG_SH_HP600) || \ | 18 | #if defined(CONFIG_SH_HP6XX) || \ |
19 | defined(CONFIG_SH_RTS7751R2D) || \ | 19 | defined(CONFIG_SH_RTS7751R2D) || \ |
20 | defined(CONFIG_SH_HS7751RVOIP) || \ | 20 | defined(CONFIG_SH_HS7751RVOIP) || \ |
21 | defined(CONFIG_SH_SH03) | 21 | defined(CONFIG_SH_HS7751RVOIP) || \ |
22 | defined(CONFIG_SH_SH03) || \ | ||
23 | defined(CONFIG_SH_R7780RP) || \ | ||
24 | defined(CONFIG_SH_LANDISK) | ||
22 | #include <asm/mach/ide.h> | 25 | #include <asm/mach/ide.h> |
23 | #endif | 26 | #endif |
24 | 27 | ||
28 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 | ||
29 | |||
30 | #define INTC_DMAC0_MSK 0 | ||
31 | |||
25 | #if defined(CONFIG_CPU_SH3) | 32 | #if defined(CONFIG_CPU_SH3) |
26 | #define INTC_IPRA 0xfffffee2UL | 33 | #define INTC_IPRA 0xfffffee2UL |
27 | #define INTC_IPRB 0xfffffee4UL | 34 | #define INTC_IPRB 0xfffffee4UL |
@@ -235,8 +242,9 @@ | |||
235 | #define SCIF1_IPR_ADDR INTC_IPRB | 242 | #define SCIF1_IPR_ADDR INTC_IPRB |
236 | #define SCIF1_IPR_POS 1 | 243 | #define SCIF1_IPR_POS 1 |
237 | #define SCIF1_PRIORITY 3 | 244 | #define SCIF1_PRIORITY 3 |
238 | #endif | 245 | #endif /* ST40STB1 */ |
239 | #endif | 246 | |
247 | #endif /* 775x / SH4-202 / ST40STB1 */ | ||
240 | 248 | ||
241 | /* NR_IRQS is made from three components: | 249 | /* NR_IRQS is made from three components: |
242 | * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules | 250 | * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules |
@@ -245,37 +253,35 @@ | |||
245 | */ | 253 | */ |
246 | 254 | ||
247 | /* 1. ONCHIP_NR_IRQS */ | 255 | /* 1. ONCHIP_NR_IRQS */ |
248 | #ifdef CONFIG_SH_GENERIC | 256 | #if defined(CONFIG_CPU_SUBTYPE_SH7604) |
257 | # define ONCHIP_NR_IRQS 24 // Actually 21 | ||
258 | #elif defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
259 | # define ONCHIP_NR_IRQS 64 | ||
260 | # define PINT_NR_IRQS 16 | ||
261 | #elif defined(CONFIG_CPU_SUBTYPE_SH7708) | ||
262 | # define ONCHIP_NR_IRQS 32 | ||
263 | #elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | ||
264 | defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
265 | # define ONCHIP_NR_IRQS 64 // Actually 61 | ||
266 | # define PINT_NR_IRQS 16 | ||
267 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) | ||
268 | # define ONCHIP_NR_IRQS 48 // Actually 44 | ||
269 | #elif defined(CONFIG_CPU_SUBTYPE_SH7751) | ||
270 | # define ONCHIP_NR_IRQS 72 | ||
271 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
272 | # define ONCHIP_NR_IRQS 112 /* XXX */ | ||
273 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | ||
274 | # define ONCHIP_NR_IRQS 72 | ||
275 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
276 | # define ONCHIP_NR_IRQS 144 | ||
277 | #elif defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
278 | # define ONCHIP_NR_IRQS 109 | ||
279 | #elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ | ||
249 | # define ONCHIP_NR_IRQS 144 | 280 | # define ONCHIP_NR_IRQS 144 |
250 | #else | ||
251 | # if defined(CONFIG_CPU_SUBTYPE_SH7604) | ||
252 | # define ONCHIP_NR_IRQS 24 // Actually 21 | ||
253 | # elif defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
254 | # define ONCHIP_NR_IRQS 64 | ||
255 | # define PINT_NR_IRQS 16 | ||
256 | # elif defined(CONFIG_CPU_SUBTYPE_SH7708) | ||
257 | # define ONCHIP_NR_IRQS 32 | ||
258 | # elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | ||
259 | defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
260 | # define ONCHIP_NR_IRQS 64 // Actually 61 | ||
261 | # define PINT_NR_IRQS 16 | ||
262 | # elif defined(CONFIG_CPU_SUBTYPE_SH7750) | ||
263 | # define ONCHIP_NR_IRQS 48 // Actually 44 | ||
264 | # elif defined(CONFIG_CPU_SUBTYPE_SH7751) | ||
265 | # define ONCHIP_NR_IRQS 72 | ||
266 | # elif defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
267 | # define ONCHIP_NR_IRQS 110 | ||
268 | # elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | ||
269 | # define ONCHIP_NR_IRQS 72 | ||
270 | # elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
271 | # define ONCHIP_NR_IRQS 144 | ||
272 | # elif defined(CONFIG_CPU_SUBTYPE_SH7300) | ||
273 | # define ONCHIP_NR_IRQS 109 | ||
274 | # endif | ||
275 | #endif | 281 | #endif |
276 | 282 | ||
277 | /* 2. PINT_NR_IRQS */ | 283 | /* 2. PINT_NR_IRQS */ |
278 | #ifdef CONFIG_SH_GENERIC | 284 | #ifdef CONFIG_SH_UNKNOWN |
279 | # define PINT_NR_IRQS 16 | 285 | # define PINT_NR_IRQS 16 |
280 | #else | 286 | #else |
281 | # ifndef PINT_NR_IRQS | 287 | # ifndef PINT_NR_IRQS |
@@ -288,22 +294,22 @@ | |||
288 | #endif | 294 | #endif |
289 | 295 | ||
290 | /* 3. OFFCHIP_NR_IRQS */ | 296 | /* 3. OFFCHIP_NR_IRQS */ |
291 | #ifdef CONFIG_SH_GENERIC | 297 | #if defined(CONFIG_HD64461) |
298 | # define OFFCHIP_NR_IRQS 18 | ||
299 | #elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */ | ||
300 | # define OFFCHIP_NR_IRQS 48 | ||
301 | #elif defined(CONFIG_HD64465) | ||
292 | # define OFFCHIP_NR_IRQS 16 | 302 | # define OFFCHIP_NR_IRQS 16 |
303 | #elif defined (CONFIG_SH_EC3104) | ||
304 | # define OFFCHIP_NR_IRQS 16 | ||
305 | #elif defined (CONFIG_SH_DREAMCAST) | ||
306 | # define OFFCHIP_NR_IRQS 96 | ||
307 | #elif defined (CONFIG_SH_TITAN) | ||
308 | # define OFFCHIP_NR_IRQS 4 | ||
309 | #elif defined(CONFIG_SH_UNKNOWN) | ||
310 | # define OFFCHIP_NR_IRQS 16 /* Must also be last */ | ||
293 | #else | 311 | #else |
294 | # if defined(CONFIG_HD64461) | 312 | # define OFFCHIP_NR_IRQS 0 |
295 | # define OFFCHIP_NR_IRQS 18 | ||
296 | # elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */ | ||
297 | # define OFFCHIP_NR_IRQS 48 | ||
298 | # elif defined(CONFIG_HD64465) | ||
299 | # define OFFCHIP_NR_IRQS 16 | ||
300 | # elif defined (CONFIG_SH_EC3104) | ||
301 | # define OFFCHIP_NR_IRQS 16 | ||
302 | # elif defined (CONFIG_SH_DREAMCAST) | ||
303 | # define OFFCHIP_NR_IRQS 96 | ||
304 | # else | ||
305 | # define OFFCHIP_NR_IRQS 0 | ||
306 | # endif | ||
307 | #endif | 313 | #endif |
308 | 314 | ||
309 | #if OFFCHIP_NR_IRQS > 0 | 315 | #if OFFCHIP_NR_IRQS > 0 |
@@ -313,16 +319,6 @@ | |||
313 | /* NR_IRQS. 1+2+3 */ | 319 | /* NR_IRQS. 1+2+3 */ |
314 | #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) | 320 | #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) |
315 | 321 | ||
316 | /* In a generic kernel, NR_IRQS is an upper bound, and we should use | ||
317 | * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value. | ||
318 | */ | ||
319 | #ifdef CONFIG_SH_GENERIC | ||
320 | # define ACTUAL_NR_IRQS (sh_mv.mv_nr_irqs) | ||
321 | #else | ||
322 | # define ACTUAL_NR_IRQS NR_IRQS | ||
323 | #endif | ||
324 | |||
325 | |||
326 | extern void disable_irq(unsigned int); | 322 | extern void disable_irq(unsigned int); |
327 | extern void disable_irq_nosync(unsigned int); | 323 | extern void disable_irq_nosync(unsigned int); |
328 | extern void enable_irq(unsigned int); | 324 | extern void enable_irq(unsigned int); |
@@ -542,9 +538,6 @@ extern int ipr_irq_demux(int irq); | |||
542 | 538 | ||
543 | extern int ipr_irq_demux(int irq); | 539 | extern int ipr_irq_demux(int irq); |
544 | #define __irq_demux(irq) ipr_irq_demux(irq) | 540 | #define __irq_demux(irq) ipr_irq_demux(irq) |
545 | |||
546 | #else | ||
547 | #define __irq_demux(irq) irq | ||
548 | #endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */ | 541 | #endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */ |
549 | 542 | ||
550 | #if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \ | 543 | #if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \ |
@@ -557,18 +550,35 @@ extern int ipr_irq_demux(int irq); | |||
557 | #define INTC_ICR_IRLM (1<<7) | 550 | #define INTC_ICR_IRLM (1<<7) |
558 | #endif | 551 | #endif |
559 | 552 | ||
560 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 | 553 | #else |
554 | #include <asm/irq-sh7780.h> | ||
555 | #endif | ||
561 | 556 | ||
557 | /* SH with INTC2-style interrupts */ | ||
558 | #ifdef CONFIG_CPU_HAS_INTC2_IRQ | ||
559 | #if defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
560 | #define INTC2_BASE 0xfe080000 | ||
562 | #define INTC2_FIRST_IRQ 64 | 561 | #define INTC2_FIRST_IRQ 64 |
563 | #define NR_INTC2_IRQS 25 | 562 | #define INTC2_INTREQ_OFFSET 0x20 |
564 | 563 | #define INTC2_INTMSK_OFFSET 0x40 | |
564 | #define INTC2_INTMSKCLR_OFFSET 0x60 | ||
565 | #define NR_INTC2_IRQS 25 | ||
566 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
565 | #define INTC2_BASE 0xfe080000 | 567 | #define INTC2_BASE 0xfe080000 |
566 | #define INTC2_INTC2MODE (INTC2_BASE+0x80) | 568 | #define INTC2_FIRST_IRQ 48 /* INTEVT 0x800 */ |
567 | |||
568 | #define INTC2_INTPRI_OFFSET 0x00 | ||
569 | #define INTC2_INTREQ_OFFSET 0x20 | 569 | #define INTC2_INTREQ_OFFSET 0x20 |
570 | #define INTC2_INTMSK_OFFSET 0x40 | 570 | #define INTC2_INTMSK_OFFSET 0x40 |
571 | #define INTC2_INTMSKCLR_OFFSET 0x60 | 571 | #define INTC2_INTMSKCLR_OFFSET 0x60 |
572 | #define NR_INTC2_IRQS 64 | ||
573 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
574 | #define INTC2_BASE 0xffd40000 | ||
575 | #define INTC2_FIRST_IRQ 22 | ||
576 | #define INTC2_INTMSK_OFFSET (0x38) | ||
577 | #define INTC2_INTMSKCLR_OFFSET (0x3c) | ||
578 | #define NR_INTC2_IRQS 60 | ||
579 | #endif | ||
580 | |||
581 | #define INTC2_INTPRI_OFFSET 0x00 | ||
572 | 582 | ||
573 | void make_intc2_irq(unsigned int irq, | 583 | void make_intc2_irq(unsigned int irq, |
574 | unsigned int ipr_offset, unsigned int ipr_shift, | 584 | unsigned int ipr_offset, unsigned int ipr_shift, |
@@ -577,13 +587,16 @@ void make_intc2_irq(unsigned int irq, | |||
577 | void init_IRQ_intc2(void); | 587 | void init_IRQ_intc2(void); |
578 | void intc2_add_clear_irq(int irq, int (*fn)(int)); | 588 | void intc2_add_clear_irq(int irq, int (*fn)(int)); |
579 | 589 | ||
580 | #endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */ | 590 | #endif |
581 | 591 | ||
582 | static inline int generic_irq_demux(int irq) | 592 | static inline int generic_irq_demux(int irq) |
583 | { | 593 | { |
584 | return irq; | 594 | return irq; |
585 | } | 595 | } |
586 | 596 | ||
597 | #ifndef __irq_demux | ||
598 | #define __irq_demux(irq) (irq) | ||
599 | #endif | ||
587 | #define irq_canonicalize(irq) (irq) | 600 | #define irq_canonicalize(irq) (irq) |
588 | #define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) | 601 | #define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) |
589 | 602 | ||
diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h new file mode 100644 index 000000000000..9dfe59f6fcb5 --- /dev/null +++ b/include/asm-sh/kexec.h | |||
@@ -0,0 +1,33 @@ | |||
1 | #ifndef _SH_KEXEC_H | ||
2 | #define _SH_KEXEC_H | ||
3 | |||
4 | /* | ||
5 | * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. | ||
6 | * I.e. Maximum page that is mapped directly into kernel memory, | ||
7 | * and kmap is not required. | ||
8 | * | ||
9 | * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct | ||
10 | * calculation for the amount of memory directly mappable into the | ||
11 | * kernel memory space. | ||
12 | */ | ||
13 | |||
14 | /* Maximum physical address we can use pages from */ | ||
15 | #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) | ||
16 | /* Maximum address we can reach in physical address mode */ | ||
17 | #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) | ||
18 | /* Maximum address we can use for the control code buffer */ | ||
19 | #define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE | ||
20 | |||
21 | #define KEXEC_CONTROL_CODE_SIZE 4096 | ||
22 | |||
23 | /* The native architecture */ | ||
24 | #define KEXEC_ARCH KEXEC_ARCH_SH | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | |||
28 | extern void machine_shutdown(void); | ||
29 | extern void *crash_notes; | ||
30 | |||
31 | #endif /* __ASSEMBLY__ */ | ||
32 | |||
33 | #endif /* _SH_KEXEC_H */ | ||
diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 3f18aa180516..550c50a7359e 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h | |||
@@ -18,44 +18,37 @@ | |||
18 | #include <asm/machvec_init.h> | 18 | #include <asm/machvec_init.h> |
19 | 19 | ||
20 | struct device; | 20 | struct device; |
21 | struct timeval; | ||
22 | 21 | ||
23 | struct sh_machine_vector | 22 | struct sh_machine_vector { |
24 | { | ||
25 | int mv_nr_irqs; | 23 | int mv_nr_irqs; |
26 | 24 | ||
27 | unsigned char (*mv_inb)(unsigned long); | 25 | u8 (*mv_inb)(unsigned long); |
28 | unsigned short (*mv_inw)(unsigned long); | 26 | u16 (*mv_inw)(unsigned long); |
29 | unsigned int (*mv_inl)(unsigned long); | 27 | u32 (*mv_inl)(unsigned long); |
30 | void (*mv_outb)(unsigned char, unsigned long); | 28 | void (*mv_outb)(u8, unsigned long); |
31 | void (*mv_outw)(unsigned short, unsigned long); | 29 | void (*mv_outw)(u16, unsigned long); |
32 | void (*mv_outl)(unsigned int, unsigned long); | 30 | void (*mv_outl)(u32, unsigned long); |
33 | 31 | ||
34 | unsigned char (*mv_inb_p)(unsigned long); | 32 | u8 (*mv_inb_p)(unsigned long); |
35 | unsigned short (*mv_inw_p)(unsigned long); | 33 | u16 (*mv_inw_p)(unsigned long); |
36 | unsigned int (*mv_inl_p)(unsigned long); | 34 | u32 (*mv_inl_p)(unsigned long); |
37 | void (*mv_outb_p)(unsigned char, unsigned long); | 35 | void (*mv_outb_p)(u8, unsigned long); |
38 | void (*mv_outw_p)(unsigned short, unsigned long); | 36 | void (*mv_outw_p)(u16, unsigned long); |
39 | void (*mv_outl_p)(unsigned int, unsigned long); | 37 | void (*mv_outl_p)(u32, unsigned long); |
40 | 38 | ||
41 | void (*mv_insb)(unsigned long port, void *addr, unsigned long count); | 39 | void (*mv_insb)(unsigned long, void *dst, unsigned long count); |
42 | void (*mv_insw)(unsigned long port, void *addr, unsigned long count); | 40 | void (*mv_insw)(unsigned long, void *dst, unsigned long count); |
43 | void (*mv_insl)(unsigned long port, void *addr, unsigned long count); | 41 | void (*mv_insl)(unsigned long, void *dst, unsigned long count); |
44 | void (*mv_outsb)(unsigned long port, const void *addr, unsigned long count); | 42 | void (*mv_outsb)(unsigned long, const void *src, unsigned long count); |
45 | void (*mv_outsw)(unsigned long port, const void *addr, unsigned long count); | 43 | void (*mv_outsw)(unsigned long, const void *src, unsigned long count); |
46 | void (*mv_outsl)(unsigned long port, const void *addr, unsigned long count); | 44 | void (*mv_outsl)(unsigned long, const void *src, unsigned long count); |
47 | 45 | ||
48 | unsigned char (*mv_readb)(unsigned long); | 46 | u8 (*mv_readb)(void __iomem *); |
49 | unsigned short (*mv_readw)(unsigned long); | 47 | u16 (*mv_readw)(void __iomem *); |
50 | unsigned int (*mv_readl)(unsigned long); | 48 | u32 (*mv_readl)(void __iomem *); |
51 | void (*mv_writeb)(unsigned char, unsigned long); | 49 | void (*mv_writeb)(u8, void __iomem *); |
52 | void (*mv_writew)(unsigned short, unsigned long); | 50 | void (*mv_writew)(u16, void __iomem *); |
53 | void (*mv_writel)(unsigned int, unsigned long); | 51 | void (*mv_writel)(u32, void __iomem *); |
54 | |||
55 | void* (*mv_ioremap)(unsigned long offset, unsigned long size); | ||
56 | void (*mv_iounmap)(void *addr); | ||
57 | |||
58 | unsigned long (*mv_isa_port2addr)(unsigned long offset); | ||
59 | 52 | ||
60 | int (*mv_irq_demux)(int irq); | 53 | int (*mv_irq_demux)(int irq); |
61 | 54 | ||
@@ -66,6 +59,9 @@ struct sh_machine_vector | |||
66 | 59 | ||
67 | void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t); | 60 | void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t); |
68 | int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t); | 61 | int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t); |
62 | |||
63 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); | ||
64 | void (*mv_ioport_unmap)(void __iomem *); | ||
69 | }; | 65 | }; |
70 | 66 | ||
71 | extern struct sh_machine_vector sh_mv; | 67 | extern struct sh_machine_vector sh_mv; |
diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h new file mode 100644 index 000000000000..dd6579c0b04c --- /dev/null +++ b/include/asm-sh/timer.h | |||
@@ -0,0 +1,42 @@ | |||
1 | #ifndef __ASM_SH_TIMER_H | ||
2 | #define __ASM_SH_TIMER_H | ||
3 | |||
4 | #include <linux/sysdev.h> | ||
5 | #include <asm/cpu/timer.h> | ||
6 | |||
7 | struct sys_timer_ops { | ||
8 | int (*init)(void); | ||
9 | unsigned long (*get_offset)(void); | ||
10 | unsigned long (*get_frequency)(void); | ||
11 | }; | ||
12 | |||
13 | struct sys_timer { | ||
14 | const char *name; | ||
15 | |||
16 | struct sys_device dev; | ||
17 | struct sys_timer_ops *ops; | ||
18 | }; | ||
19 | |||
20 | #define TICK_SIZE (tick_nsec / 1000) | ||
21 | |||
22 | extern struct sys_timer tmu_timer; | ||
23 | extern struct sys_timer *sys_timer; | ||
24 | |||
25 | static inline unsigned long get_timer_offset(void) | ||
26 | { | ||
27 | return sys_timer->ops->get_offset(); | ||
28 | } | ||
29 | |||
30 | static inline unsigned long get_timer_frequency(void) | ||
31 | { | ||
32 | return sys_timer->ops->get_frequency(); | ||
33 | } | ||
34 | |||
35 | /* arch/sh/kernel/timers/timer.c */ | ||
36 | struct sys_timer *get_sys_timer(void); | ||
37 | |||
38 | /* arch/sh/kernel/time.c */ | ||
39 | void handle_timer_tick(struct pt_regs *); | ||
40 | |||
41 | #endif /* __ASM_SH_TIMER_H */ | ||
42 | |||
diff --git a/include/asm-x86_64/ia32.h b/include/asm-x86_64/ia32.h index c7bc9c0525ba..e6b7f2234e43 100644 --- a/include/asm-x86_64/ia32.h +++ b/include/asm-x86_64/ia32.h | |||
@@ -169,6 +169,8 @@ int ia32_child_tls(struct task_struct *p, struct pt_regs *childregs); | |||
169 | struct linux_binprm; | 169 | struct linux_binprm; |
170 | extern int ia32_setup_arg_pages(struct linux_binprm *bprm, | 170 | extern int ia32_setup_arg_pages(struct linux_binprm *bprm, |
171 | unsigned long stack_top, int exec_stack); | 171 | unsigned long stack_top, int exec_stack); |
172 | struct mm_struct; | ||
173 | extern void ia32_pick_mmap_layout(struct mm_struct *mm); | ||
172 | 174 | ||
173 | #endif | 175 | #endif |
174 | 176 | ||
diff --git a/include/asm-x86_64/irq.h b/include/asm-x86_64/irq.h index fb724ba37ae6..9db5a1b4f7b1 100644 --- a/include/asm-x86_64/irq.h +++ b/include/asm-x86_64/irq.h | |||
@@ -36,7 +36,7 @@ | |||
36 | #define NR_IRQ_VECTORS NR_IRQS | 36 | #define NR_IRQ_VECTORS NR_IRQS |
37 | #else | 37 | #else |
38 | #define NR_IRQS 224 | 38 | #define NR_IRQS 224 |
39 | #define NR_IRQ_VECTORS 1024 | 39 | #define NR_IRQ_VECTORS (32 * NR_CPUS) |
40 | #endif | 40 | #endif |
41 | 41 | ||
42 | static __inline__ int irq_canonicalize(int irq) | 42 | static __inline__ int irq_canonicalize(int irq) |
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h index dcbb4fcd9a18..615e3e494929 100644 --- a/include/asm-x86_64/page.h +++ b/include/asm-x86_64/page.h | |||
@@ -26,6 +26,13 @@ | |||
26 | #define IRQSTACK_ORDER 2 | 26 | #define IRQSTACK_ORDER 2 |
27 | #define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER) | 27 | #define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER) |
28 | 28 | ||
29 | #define STACKFAULT_STACK 1 | ||
30 | #define DOUBLEFAULT_STACK 2 | ||
31 | #define NMI_STACK 3 | ||
32 | #define DEBUG_STACK 4 | ||
33 | #define MCE_STACK 5 | ||
34 | #define N_EXCEPTION_STACKS 5 /* hw limit: 7 */ | ||
35 | |||
29 | #define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1)) | 36 | #define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1)) |
30 | #define LARGE_PAGE_SIZE (1UL << PMD_SHIFT) | 37 | #define LARGE_PAGE_SIZE (1UL << PMD_SHIFT) |
31 | 38 | ||
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index 87a282b1043a..8c8d88c036ed 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h | |||
@@ -273,13 +273,6 @@ struct thread_struct { | |||
273 | #define INIT_MMAP \ | 273 | #define INIT_MMAP \ |
274 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } | 274 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } |
275 | 275 | ||
276 | #define STACKFAULT_STACK 1 | ||
277 | #define DOUBLEFAULT_STACK 2 | ||
278 | #define NMI_STACK 3 | ||
279 | #define DEBUG_STACK 4 | ||
280 | #define MCE_STACK 5 | ||
281 | #define N_EXCEPTION_STACKS 5 /* hw limit: 7 */ | ||
282 | |||
283 | #define start_thread(regs,new_rip,new_rsp) do { \ | 276 | #define start_thread(regs,new_rip,new_rsp) do { \ |
284 | asm volatile("movl %0,%%fs; movl %0,%%es; movl %0,%%ds": :"r" (0)); \ | 277 | asm volatile("movl %0,%%fs; movl %0,%%es; movl %0,%%ds": :"r" (0)); \ |
285 | load_gs_index(0); \ | 278 | load_gs_index(0); \ |
@@ -484,4 +477,6 @@ extern unsigned long boot_option_idle_override; | |||
484 | /* Boot loader type from the setup header */ | 477 | /* Boot loader type from the setup header */ |
485 | extern int bootloader_type; | 478 | extern int bootloader_type; |
486 | 479 | ||
480 | #define HAVE_ARCH_PICK_MMAP_LAYOUT 1 | ||
481 | |||
487 | #endif /* __ASM_X86_64_PROCESSOR_H */ | 482 | #endif /* __ASM_X86_64_PROCESSOR_H */ |
diff --git a/include/asm-x86_64/system.h b/include/asm-x86_64/system.h index 0eacbefb7dd0..a73f0c789d8b 100644 --- a/include/asm-x86_64/system.h +++ b/include/asm-x86_64/system.h | |||
@@ -354,11 +354,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | |||
354 | #define local_irq_disable() __asm__ __volatile__("cli": : :"memory") | 354 | #define local_irq_disable() __asm__ __volatile__("cli": : :"memory") |
355 | #define local_irq_enable() __asm__ __volatile__("sti": : :"memory") | 355 | #define local_irq_enable() __asm__ __volatile__("sti": : :"memory") |
356 | 356 | ||
357 | /* used in the idle loop; sti takes one instruction cycle to complete */ | ||
358 | #define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") | ||
359 | /* used when interrupts are already enabled or to shutdown the processor */ | ||
360 | #define halt() __asm__ __volatile__("hlt": : :"memory") | ||
361 | |||
362 | #define irqs_disabled() \ | 357 | #define irqs_disabled() \ |
363 | ({ \ | 358 | ({ \ |
364 | unsigned long flags; \ | 359 | unsigned long flags; \ |
@@ -370,6 +365,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | |||
370 | #define local_irq_save(x) do { warn_if_not_ulong(x); __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0) | 365 | #define local_irq_save(x) do { warn_if_not_ulong(x); __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0) |
371 | #endif | 366 | #endif |
372 | 367 | ||
368 | /* used in the idle loop; sti takes one instruction cycle to complete */ | ||
369 | #define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") | ||
370 | /* used when interrupts are already enabled or to shutdown the processor */ | ||
371 | #define halt() __asm__ __volatile__("hlt": : :"memory") | ||
372 | |||
373 | void cpu_idle_wait(void); | 373 | void cpu_idle_wait(void); |
374 | 374 | ||
375 | extern unsigned long arch_align_stack(unsigned long sp); | 375 | extern unsigned long arch_align_stack(unsigned long sp); |
diff --git a/include/linux/fs.h b/include/linux/fs.h index 552cedfa6064..b77f2608eef9 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h | |||
@@ -1290,6 +1290,9 @@ extern void mnt_set_mountpoint(struct vfsmount *, struct dentry *, | |||
1290 | 1290 | ||
1291 | extern int vfs_statfs(struct super_block *, struct kstatfs *); | 1291 | extern int vfs_statfs(struct super_block *, struct kstatfs *); |
1292 | 1292 | ||
1293 | /* /sys/fs */ | ||
1294 | extern struct subsystem fs_subsys; | ||
1295 | |||
1293 | #define FLOCK_VERIFY_READ 1 | 1296 | #define FLOCK_VERIFY_READ 1 |
1294 | #define FLOCK_VERIFY_WRITE 2 | 1297 | #define FLOCK_VERIFY_WRITE 2 |
1295 | 1298 | ||
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 6ff2d365895f..474c8f4f5d4f 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h | |||
@@ -104,6 +104,10 @@ | |||
104 | #define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ | 104 | #define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ |
105 | #define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */ | 105 | #define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */ |
106 | #define I2C_DRIVERID_TVP5150 76 /* TVP5150 video decoder */ | 106 | #define I2C_DRIVERID_TVP5150 76 /* TVP5150 video decoder */ |
107 | #define I2C_DRIVERID_WM8739 77 /* wm8739 audio processor */ | ||
108 | #define I2C_DRIVERID_UPD64083 78 /* upd64083 video processor */ | ||
109 | #define I2C_DRIVERID_UPD64031A 79 /* upd64031a video processor */ | ||
110 | #define I2C_DRIVERID_SAA717X 80 /* saa717x video encoder */ | ||
107 | 111 | ||
108 | #define I2C_DRIVERID_I2CDEV 900 | 112 | #define I2C_DRIVERID_I2CDEV 900 |
109 | #define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */ | 113 | #define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */ |
diff --git a/include/linux/init.h b/include/linux/init.h index 59008c3826cf..ff8d8b8632f4 100644 --- a/include/linux/init.h +++ b/include/linux/init.h | |||
@@ -241,6 +241,18 @@ void __init parse_early_param(void); | |||
241 | #define __cpuexitdata __exitdata | 241 | #define __cpuexitdata __exitdata |
242 | #endif | 242 | #endif |
243 | 243 | ||
244 | #ifdef CONFIG_MEMORY_HOTPLUG | ||
245 | #define __meminit | ||
246 | #define __meminitdata | ||
247 | #define __memexit | ||
248 | #define __memexitdata | ||
249 | #else | ||
250 | #define __meminit __init | ||
251 | #define __meminitdata __initdata | ||
252 | #define __memexit __exit | ||
253 | #define __memexitdata __exitdata | ||
254 | #endif | ||
255 | |||
244 | /* Functions marked as __devexit may be discarded at kernel link time, depending | 256 | /* Functions marked as __devexit may be discarded at kernel link time, depending |
245 | on config options. Newer versions of binutils detect references from | 257 | on config options. Newer versions of binutils detect references from |
246 | retained sections to discarded sections and flag an error. Pointers to | 258 | retained sections to discarded sections and flag an error. Pointers to |
diff --git a/include/linux/kexec.h b/include/linux/kexec.h index 94abc07cb164..a311f58c8a7c 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h | |||
@@ -119,6 +119,7 @@ extern struct kimage *kexec_image; | |||
119 | #define KEXEC_ARCH_PPC64 (21 << 16) | 119 | #define KEXEC_ARCH_PPC64 (21 << 16) |
120 | #define KEXEC_ARCH_IA_64 (50 << 16) | 120 | #define KEXEC_ARCH_IA_64 (50 << 16) |
121 | #define KEXEC_ARCH_S390 (22 << 16) | 121 | #define KEXEC_ARCH_S390 (22 << 16) |
122 | #define KEXEC_ARCH_SH (42 << 16) | ||
122 | 123 | ||
123 | #define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */ | 124 | #define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */ |
124 | 125 | ||
diff --git a/include/media/tuner-types.h b/include/media/tuner-types.h new file mode 100644 index 000000000000..15821ab14a9e --- /dev/null +++ b/include/media/tuner-types.h | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * descriptions for simple tuners. | ||
3 | */ | ||
4 | |||
5 | #ifndef __TUNER_TYPES_H__ | ||
6 | #define __TUNER_TYPES_H__ | ||
7 | |||
8 | enum param_type { | ||
9 | TUNER_PARAM_TYPE_RADIO, \ | ||
10 | TUNER_PARAM_TYPE_PAL, \ | ||
11 | TUNER_PARAM_TYPE_SECAM, \ | ||
12 | TUNER_PARAM_TYPE_NTSC | ||
13 | }; | ||
14 | |||
15 | struct tuner_range { | ||
16 | unsigned short limit; | ||
17 | unsigned char cb; | ||
18 | }; | ||
19 | |||
20 | struct tuner_params { | ||
21 | enum param_type type; | ||
22 | /* Many Philips based tuners have a comment like this in their | ||
23 | * datasheet: | ||
24 | * | ||
25 | * For channel selection involving band switching, and to ensure | ||
26 | * smooth tuning to the desired channel without causing | ||
27 | * unnecessary charge pump action, it is recommended to consider | ||
28 | * the difference between wanted channel frequency and the | ||
29 | * current channel frequency. Unnecessary charge pump action | ||
30 | * will result in very low tuning voltage which may drive the | ||
31 | * oscillator to extreme conditions. | ||
32 | * | ||
33 | * Set cb_first_if_lower_freq to 1, if this check is | ||
34 | * required for this tuner. | ||
35 | * | ||
36 | * I tested this for PAL by first setting the TV frequency to | ||
37 | * 203 MHz and then switching to 96.6 MHz FM radio. The result was | ||
38 | * static unless the control byte was sent first. | ||
39 | */ | ||
40 | unsigned int cb_first_if_lower_freq:1; | ||
41 | unsigned char config; /* to be moved into struct tuner_range for dvb-pll merge */ | ||
42 | |||
43 | unsigned int count; | ||
44 | struct tuner_range *ranges; | ||
45 | }; | ||
46 | |||
47 | struct tunertype { | ||
48 | char *name; | ||
49 | struct tuner_params *params; | ||
50 | }; | ||
51 | |||
52 | extern struct tunertype tuners[]; | ||
53 | extern unsigned const int tuner_count; | ||
54 | |||
55 | #endif | ||
diff --git a/include/media/tuner.h b/include/media/tuner.h index 27cbf08c931d..a5beeac495c7 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #define _TUNER_H | 23 | #define _TUNER_H |
24 | 24 | ||
25 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
26 | #include <media/tuner-types.h> | ||
26 | 27 | ||
27 | #define ADDR_UNSET (255) | 28 | #define ADDR_UNSET (255) |
28 | 29 | ||
@@ -114,6 +115,7 @@ | |||
114 | 115 | ||
115 | #define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */ | 116 | #define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */ |
116 | #define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */ | 117 | #define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */ |
118 | #define TUNER_SAMSUNG_TCPN_2121P30A 70 /* Hauppauge PVR-500MCE NTSC */ | ||
117 | 119 | ||
118 | /* tv card specific */ | 120 | /* tv card specific */ |
119 | #define TDA9887_PRESENT (1<<0) | 121 | #define TDA9887_PRESENT (1<<0) |
@@ -177,7 +179,9 @@ struct tuner { | |||
177 | unsigned int mode; | 179 | unsigned int mode; |
178 | unsigned int mode_mask; /* Combination of allowable modes */ | 180 | unsigned int mode_mask; /* Combination of allowable modes */ |
179 | 181 | ||
180 | unsigned int freq; /* keep track of the current settings */ | 182 | unsigned int tv_freq; /* keep track of the current settings */ |
183 | unsigned int radio_freq; | ||
184 | u16 last_div; | ||
181 | unsigned int audmode; | 185 | unsigned int audmode; |
182 | v4l2_std_id std; | 186 | v4l2_std_id std; |
183 | 187 | ||
@@ -195,8 +199,8 @@ struct tuner { | |||
195 | unsigned int sgIF; | 199 | unsigned int sgIF; |
196 | 200 | ||
197 | /* function ptrs */ | 201 | /* function ptrs */ |
198 | void (*tv_freq)(struct i2c_client *c, unsigned int freq); | 202 | void (*set_tv_freq)(struct i2c_client *c, unsigned int freq); |
199 | void (*radio_freq)(struct i2c_client *c, unsigned int freq); | 203 | void (*set_radio_freq)(struct i2c_client *c, unsigned int freq); |
200 | int (*has_signal)(struct i2c_client *c); | 204 | int (*has_signal)(struct i2c_client *c); |
201 | int (*is_stereo)(struct i2c_client *c); | 205 | int (*is_stereo)(struct i2c_client *c); |
202 | void (*standby)(struct i2c_client *c); | 206 | void (*standby)(struct i2c_client *c); |
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index c74052abb189..d4030a7e16e0 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h | |||
@@ -120,6 +120,13 @@ enum v4l2_chip_ident { | |||
120 | /* select from TV,radio,extern,MUTE */ | 120 | /* select from TV,radio,extern,MUTE */ |
121 | #define AUDC_SET_INPUT _IOW('d',89,int) | 121 | #define AUDC_SET_INPUT _IOW('d',89,int) |
122 | 122 | ||
123 | /* msp3400 ioctl: will be removed in the near future */ | ||
124 | struct msp_matrix { | ||
125 | int input; | ||
126 | int output; | ||
127 | }; | ||
128 | #define MSP_SET_MATRIX _IOW('m',17,struct msp_matrix) | ||
129 | |||
123 | /* tuner ioctls */ | 130 | /* tuner ioctls */ |
124 | /* Sets tuner type and its I2C addr */ | 131 | /* Sets tuner type and its I2C addr */ |
125 | #define TUNER_SET_TYPE_ADDR _IOW('d',90,int) | 132 | #define TUNER_SET_TYPE_ADDR _IOW('d',90,int) |
diff --git a/init/Kconfig b/init/Kconfig index 7efa729d2cf4..b9923b1434a2 100644 --- a/init/Kconfig +++ b/init/Kconfig | |||
@@ -427,6 +427,9 @@ config SLOB | |||
427 | default !SLAB | 427 | default !SLAB |
428 | bool | 428 | bool |
429 | 429 | ||
430 | config OBSOLETE_INTERMODULE | ||
431 | tristate | ||
432 | |||
430 | menu "Loadable module support" | 433 | menu "Loadable module support" |
431 | 434 | ||
432 | config MODULES | 435 | config MODULES |
diff --git a/kernel/Makefile b/kernel/Makefile index 355126606d1b..4ae0fbde815d 100644 --- a/kernel/Makefile +++ b/kernel/Makefile | |||
@@ -6,7 +6,7 @@ obj-y = sched.o fork.o exec_domain.o panic.o printk.o profile.o \ | |||
6 | exit.o itimer.o time.o softirq.o resource.o \ | 6 | exit.o itimer.o time.o softirq.o resource.o \ |
7 | sysctl.o capability.o ptrace.o timer.o user.o \ | 7 | sysctl.o capability.o ptrace.o timer.o user.o \ |
8 | signal.o sys.o kmod.o workqueue.o pid.o \ | 8 | signal.o sys.o kmod.o workqueue.o pid.o \ |
9 | rcupdate.o intermodule.o extable.o params.o posix-timers.o \ | 9 | rcupdate.o extable.o params.o posix-timers.o \ |
10 | kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \ | 10 | kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \ |
11 | hrtimer.o | 11 | hrtimer.o |
12 | 12 | ||
@@ -17,6 +17,7 @@ obj-$(CONFIG_SMP) += cpu.o spinlock.o | |||
17 | obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o | 17 | obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o |
18 | obj-$(CONFIG_UID16) += uid16.o | 18 | obj-$(CONFIG_UID16) += uid16.o |
19 | obj-$(CONFIG_MODULES) += module.o | 19 | obj-$(CONFIG_MODULES) += module.o |
20 | obj-$(CONFIG_OBSOLETE_INTERMODULE) += intermodule.o | ||
20 | obj-$(CONFIG_KALLSYMS) += kallsyms.o | 21 | obj-$(CONFIG_KALLSYMS) += kallsyms.o |
21 | obj-$(CONFIG_PM) += power/ | 22 | obj-$(CONFIG_PM) += power/ |
22 | obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o | 23 | obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o |
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c index 04ccab099e84..f1c4155b49ac 100644 --- a/kernel/hrtimer.c +++ b/kernel/hrtimer.c | |||
@@ -272,7 +272,7 @@ void unlock_hrtimer_base(const struct hrtimer *timer, unsigned long *flags) | |||
272 | * @interval: the interval to forward | 272 | * @interval: the interval to forward |
273 | * | 273 | * |
274 | * Forward the timer expiry so it will expire in the future. | 274 | * Forward the timer expiry so it will expire in the future. |
275 | * The number of overruns is added to the overrun field. | 275 | * Returns the number of overruns. |
276 | */ | 276 | */ |
277 | unsigned long | 277 | unsigned long |
278 | hrtimer_forward(struct hrtimer *timer, ktime_t interval) | 278 | hrtimer_forward(struct hrtimer *timer, ktime_t interval) |
@@ -641,7 +641,8 @@ schedule_hrtimer_interruptible(struct hrtimer *timer, | |||
641 | static long __sched | 641 | static long __sched |
642 | nanosleep_restart(struct restart_block *restart, clockid_t clockid) | 642 | nanosleep_restart(struct restart_block *restart, clockid_t clockid) |
643 | { | 643 | { |
644 | struct timespec __user *rmtp, tu; | 644 | struct timespec __user *rmtp; |
645 | struct timespec tu; | ||
645 | void *rfn_save = restart->fn; | 646 | void *rfn_save = restart->fn; |
646 | struct hrtimer timer; | 647 | struct hrtimer timer; |
647 | ktime_t rem; | 648 | ktime_t rem; |
diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 8c960b469593..c2e29743a8d1 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c | |||
@@ -1735,7 +1735,7 @@ static void __init calculate_zone_totalpages(struct pglist_data *pgdat, | |||
1735 | * up by free_all_bootmem() once the early boot process is | 1735 | * up by free_all_bootmem() once the early boot process is |
1736 | * done. Non-atomic initialization, single-pass. | 1736 | * done. Non-atomic initialization, single-pass. |
1737 | */ | 1737 | */ |
1738 | void __devinit memmap_init_zone(unsigned long size, int nid, unsigned long zone, | 1738 | void __meminit memmap_init_zone(unsigned long size, int nid, unsigned long zone, |
1739 | unsigned long start_pfn) | 1739 | unsigned long start_pfn) |
1740 | { | 1740 | { |
1741 | struct page *page; | 1741 | struct page *page; |
@@ -1788,7 +1788,7 @@ void zonetable_add(struct zone *zone, int nid, int zid, unsigned long pfn, | |||
1788 | memmap_init_zone((size), (nid), (zone), (start_pfn)) | 1788 | memmap_init_zone((size), (nid), (zone), (start_pfn)) |
1789 | #endif | 1789 | #endif |
1790 | 1790 | ||
1791 | static int __devinit zone_batchsize(struct zone *zone) | 1791 | static int __meminit zone_batchsize(struct zone *zone) |
1792 | { | 1792 | { |
1793 | int batch; | 1793 | int batch; |
1794 | 1794 | ||
@@ -1882,7 +1882,7 @@ static struct per_cpu_pageset | |||
1882 | * Dynamically allocate memory for the | 1882 | * Dynamically allocate memory for the |
1883 | * per cpu pageset array in struct zone. | 1883 | * per cpu pageset array in struct zone. |
1884 | */ | 1884 | */ |
1885 | static int __devinit process_zones(int cpu) | 1885 | static int __meminit process_zones(int cpu) |
1886 | { | 1886 | { |
1887 | struct zone *zone, *dzone; | 1887 | struct zone *zone, *dzone; |
1888 | 1888 | ||
@@ -1923,7 +1923,7 @@ static inline void free_zone_pagesets(int cpu) | |||
1923 | } | 1923 | } |
1924 | } | 1924 | } |
1925 | 1925 | ||
1926 | static int __devinit pageset_cpuup_callback(struct notifier_block *nfb, | 1926 | static int __meminit pageset_cpuup_callback(struct notifier_block *nfb, |
1927 | unsigned long action, | 1927 | unsigned long action, |
1928 | void *hcpu) | 1928 | void *hcpu) |
1929 | { | 1929 | { |
@@ -1963,7 +1963,7 @@ void __init setup_per_cpu_pageset(void) | |||
1963 | 1963 | ||
1964 | #endif | 1964 | #endif |
1965 | 1965 | ||
1966 | static __devinit | 1966 | static __meminit |
1967 | void zone_wait_table_init(struct zone *zone, unsigned long zone_size_pages) | 1967 | void zone_wait_table_init(struct zone *zone, unsigned long zone_size_pages) |
1968 | { | 1968 | { |
1969 | int i; | 1969 | int i; |
@@ -1983,7 +1983,7 @@ void zone_wait_table_init(struct zone *zone, unsigned long zone_size_pages) | |||
1983 | init_waitqueue_head(zone->wait_table + i); | 1983 | init_waitqueue_head(zone->wait_table + i); |
1984 | } | 1984 | } |
1985 | 1985 | ||
1986 | static __devinit void zone_pcp_init(struct zone *zone) | 1986 | static __meminit void zone_pcp_init(struct zone *zone) |
1987 | { | 1987 | { |
1988 | int cpu; | 1988 | int cpu; |
1989 | unsigned long batch = zone_batchsize(zone); | 1989 | unsigned long batch = zone_batchsize(zone); |
@@ -2001,7 +2001,7 @@ static __devinit void zone_pcp_init(struct zone *zone) | |||
2001 | zone->name, zone->present_pages, batch); | 2001 | zone->name, zone->present_pages, batch); |
2002 | } | 2002 | } |
2003 | 2003 | ||
2004 | static __devinit void init_currently_empty_zone(struct zone *zone, | 2004 | static __meminit void init_currently_empty_zone(struct zone *zone, |
2005 | unsigned long zone_start_pfn, unsigned long size) | 2005 | unsigned long zone_start_pfn, unsigned long size) |
2006 | { | 2006 | { |
2007 | struct pglist_data *pgdat = zone->zone_pgdat; | 2007 | struct pglist_data *pgdat = zone->zone_pgdat; |
diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c index ccd45130c482..b0cbbe2e41bb 100644 --- a/scripts/kconfig/confdata.c +++ b/scripts/kconfig/confdata.c | |||
@@ -375,7 +375,7 @@ int conf_write(const char *name) | |||
375 | if (!out_h) | 375 | if (!out_h) |
376 | return 1; | 376 | return 1; |
377 | } | 377 | } |
378 | sym = sym_lookup("KERNELRELEASE", 0); | 378 | sym = sym_lookup("KERNELVERSION", 0); |
379 | sym_calc_value(sym); | 379 | sym_calc_value(sym); |
380 | time(&now); | 380 | time(&now); |
381 | env = getenv("KCONFIG_NOTIMESTAMP"); | 381 | env = getenv("KCONFIG_NOTIMESTAMP"); |
diff --git a/scripts/kconfig/gconf.c b/scripts/kconfig/gconf.c index 9f5aabd58fa9..665bd5300a19 100644 --- a/scripts/kconfig/gconf.c +++ b/scripts/kconfig/gconf.c | |||
@@ -276,7 +276,7 @@ void init_main_window(const gchar * glade_file) | |||
276 | NULL); | 276 | NULL); |
277 | 277 | ||
278 | sprintf(title, _("Linux Kernel v%s Configuration"), | 278 | sprintf(title, _("Linux Kernel v%s Configuration"), |
279 | getenv("KERNELRELEASE")); | 279 | getenv("KERNELVERSION")); |
280 | gtk_window_set_title(GTK_WINDOW(main_wnd), title); | 280 | gtk_window_set_title(GTK_WINDOW(main_wnd), title); |
281 | 281 | ||
282 | gtk_widget_show(main_wnd); | 282 | gtk_widget_show(main_wnd); |
diff --git a/scripts/kconfig/lxdialog/Makefile b/scripts/kconfig/lxdialog/Makefile index 8f41d9a57aaa..fae3e29fc924 100644 --- a/scripts/kconfig/lxdialog/Makefile +++ b/scripts/kconfig/lxdialog/Makefile | |||
@@ -1,9 +1,9 @@ | |||
1 | # Makefile to build lxdialog package | 1 | # Makefile to build lxdialog package |
2 | # | 2 | # |
3 | 3 | ||
4 | check-lxdialog := $(srctree)/$(src)/check-lxdialog.sh | 4 | check-lxdialog := $(srctree)/$(src)/check-lxdialog.sh |
5 | HOST_EXTRACFLAGS := $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags) | 5 | HOST_EXTRACFLAGS:= $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags) |
6 | HOST_LOADLIBES := $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags) | 6 | HOST_LOADLIBES := $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC)) |
7 | 7 | ||
8 | HOST_EXTRACFLAGS += -DLOCALE | 8 | HOST_EXTRACFLAGS += -DLOCALE |
9 | 9 | ||
diff --git a/scripts/kconfig/lxdialog/check-lxdialog.sh b/scripts/kconfig/lxdialog/check-lxdialog.sh index a3c141b49670..448e353923f3 100644 --- a/scripts/kconfig/lxdialog/check-lxdialog.sh +++ b/scripts/kconfig/lxdialog/check-lxdialog.sh | |||
@@ -4,11 +4,22 @@ | |||
4 | # What library to link | 4 | # What library to link |
5 | ldflags() | 5 | ldflags() |
6 | { | 6 | { |
7 | if [ `uname` == SunOS ]; then | 7 | echo "main() {}" | $cc -lncursesw -xc - -o /dev/null 2> /dev/null |
8 | echo '-lcurses' | 8 | if [ $? -eq 0 ]; then |
9 | else | 9 | echo '-lncursesw' |
10 | exit | ||
11 | fi | ||
12 | echo "main() {}" | $cc -lncurses -xc - -o /dev/null 2> /dev/null | ||
13 | if [ $? -eq 0 ]; then | ||
10 | echo '-lncurses' | 14 | echo '-lncurses' |
15 | exit | ||
11 | fi | 16 | fi |
17 | echo "main() {}" | $cc -lcurses -xc - -o /dev/null 2> /dev/null | ||
18 | if [ $? -eq 0 ]; then | ||
19 | echo '-lcurses' | ||
20 | exit | ||
21 | fi | ||
22 | exit 1 | ||
12 | } | 23 | } |
13 | 24 | ||
14 | # Where is ncurses.h? | 25 | # Where is ncurses.h? |
@@ -28,7 +39,7 @@ ccflags() | |||
28 | compiler="" | 39 | compiler="" |
29 | # Check if we can link to ncurses | 40 | # Check if we can link to ncurses |
30 | check() { | 41 | check() { |
31 | echo "main() {}" | $compiler -xc - | 42 | echo "main() {}" | $cc -xc - -o /dev/null 2> /dev/null |
32 | if [ $? != 0 ]; then | 43 | if [ $? != 0 ]; then |
33 | echo " *** Unable to find the ncurses libraries." 1>&2 | 44 | echo " *** Unable to find the ncurses libraries." 1>&2 |
34 | echo " *** make menuconfig require the ncurses libraries" 1>&2 | 45 | echo " *** make menuconfig require the ncurses libraries" 1>&2 |
@@ -51,13 +62,15 @@ fi | |||
51 | case "$1" in | 62 | case "$1" in |
52 | "-check") | 63 | "-check") |
53 | shift | 64 | shift |
54 | compiler="$@" | 65 | cc="$@" |
55 | check | 66 | check |
56 | ;; | 67 | ;; |
57 | "-ccflags") | 68 | "-ccflags") |
58 | ccflags | 69 | ccflags |
59 | ;; | 70 | ;; |
60 | "-ldflags") | 71 | "-ldflags") |
72 | shift | ||
73 | cc="$@" | ||
61 | ldflags | 74 | ldflags |
62 | ;; | 75 | ;; |
63 | "*") | 76 | "*") |
diff --git a/scripts/kconfig/mconf.c b/scripts/kconfig/mconf.c index d63d7fb677e4..7f973195e79a 100644 --- a/scripts/kconfig/mconf.c +++ b/scripts/kconfig/mconf.c | |||
@@ -1051,7 +1051,7 @@ int main(int ac, char **av) | |||
1051 | conf_parse(av[1]); | 1051 | conf_parse(av[1]); |
1052 | conf_read(NULL); | 1052 | conf_read(NULL); |
1053 | 1053 | ||
1054 | sym = sym_lookup("KERNELRELEASE", 0); | 1054 | sym = sym_lookup("KERNELVERSION", 0); |
1055 | sym_calc_value(sym); | 1055 | sym_calc_value(sym); |
1056 | sprintf(menu_backtitle, _("Linux Kernel v%s Configuration"), | 1056 | sprintf(menu_backtitle, _("Linux Kernel v%s Configuration"), |
1057 | sym_get_string_value(sym)); | 1057 | sym_get_string_value(sym)); |
diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c index 69c2549c0baa..3d7877afccd5 100644 --- a/scripts/kconfig/symbol.c +++ b/scripts/kconfig/symbol.c | |||
@@ -61,10 +61,10 @@ void sym_init(void) | |||
61 | if (p) | 61 | if (p) |
62 | sym_add_default(sym, p); | 62 | sym_add_default(sym, p); |
63 | 63 | ||
64 | sym = sym_lookup("KERNELRELEASE", 0); | 64 | sym = sym_lookup("KERNELVERSION", 0); |
65 | sym->type = S_STRING; | 65 | sym->type = S_STRING; |
66 | sym->flags |= SYMBOL_AUTO; | 66 | sym->flags |= SYMBOL_AUTO; |
67 | p = getenv("KERNELRELEASE"); | 67 | p = getenv("KERNELVERSION"); |
68 | if (p) | 68 | if (p) |
69 | sym_add_default(sym, p); | 69 | sym_add_default(sym, p); |
70 | 70 | ||