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-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index fbca92cc530a..95b814aac556 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -44,6 +44,11 @@
44#define DSI1PCKCR 0xe6150098 44#define DSI1PCKCR 0xe6150098
45#define PLLC01CR 0xe6150028 45#define PLLC01CR 0xe6150028
46#define PLLC2CR 0xe615002c 46#define PLLC2CR 0xe615002c
47#define RMSTPCR0 0xe6150110
48#define RMSTPCR1 0xe6150114
49#define RMSTPCR2 0xe6150118
50#define RMSTPCR3 0xe615011c
51#define RMSTPCR4 0xe6150120
47#define SMSTPCR0 0xe6150130 52#define SMSTPCR0 0xe6150130
48#define SMSTPCR1 0xe6150134 53#define SMSTPCR1 0xe6150134
49#define SMSTPCR2 0xe6150138 54#define SMSTPCR2 0xe6150138
@@ -654,6 +659,13 @@ void __init sh7372_clock_init(void)
654{ 659{
655 int k, ret = 0; 660 int k, ret = 0;
656 661
662 /* make sure MSTP bits on the RT/SH4AL-DSP side are off */
663 __raw_writel(0xe4ef8087, RMSTPCR0);
664 __raw_writel(0xffffffff, RMSTPCR1);
665 __raw_writel(0x37c7f7ff, RMSTPCR2);
666 __raw_writel(0xffffffff, RMSTPCR3);
667 __raw_writel(0xffe0fffd, RMSTPCR4);
668
657 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 669 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
658 ret = clk_register(main_clks[k]); 670 ret = clk_register(main_clks[k]);
659 671