aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--include/asm-mips/mipsregs.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 08aa231b4dea..50dea25b9dd8 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -693,13 +693,13 @@ do { \
693 if (sel == 0) \ 693 if (sel == 0) \
694 __asm__ __volatile__( \ 694 __asm__ __volatile__( \
695 "mtc0\t%z0, " #register "\n\t" \ 695 "mtc0\t%z0, " #register "\n\t" \
696 : : "Jr" ((unsigned int)value)); \ 696 : : "Jr" ((unsigned int)(value))); \
697 else \ 697 else \
698 __asm__ __volatile__( \ 698 __asm__ __volatile__( \
699 ".set\tmips32\n\t" \ 699 ".set\tmips32\n\t" \
700 "mtc0\t%z0, " #register ", " #sel "\n\t" \ 700 "mtc0\t%z0, " #register ", " #sel "\n\t" \
701 ".set\tmips0" \ 701 ".set\tmips0" \
702 : : "Jr" ((unsigned int)value)); \ 702 : : "Jr" ((unsigned int)(value))); \
703} while (0) 703} while (0)
704 704
705#define __write_64bit_c0_register(register, sel, value) \ 705#define __write_64bit_c0_register(register, sel, value) \
@@ -748,7 +748,7 @@ do { \
748do { \ 748do { \
749 __asm__ __volatile__( \ 749 __asm__ __volatile__( \
750 "ctc0\t%z0, " #register "\n\t" \ 750 "ctc0\t%z0, " #register "\n\t" \
751 : : "Jr" ((unsigned int)value)); \ 751 : : "Jr" ((unsigned int)(value))); \
752} while (0) 752} while (0)
753 753
754/* 754/*