diff options
147 files changed, 4995 insertions, 1692 deletions
diff --git a/Documentation/serial/driver b/Documentation/serial/driver index ac7eabbf662a..87856d3cfb67 100644 --- a/Documentation/serial/driver +++ b/Documentation/serial/driver | |||
@@ -111,24 +111,17 @@ hardware. | |||
111 | Interrupts: locally disabled. | 111 | Interrupts: locally disabled. |
112 | This call must not sleep | 112 | This call must not sleep |
113 | 113 | ||
114 | stop_tx(port,tty_stop) | 114 | stop_tx(port) |
115 | Stop transmitting characters. This might be due to the CTS | 115 | Stop transmitting characters. This might be due to the CTS |
116 | line becoming inactive or the tty layer indicating we want | 116 | line becoming inactive or the tty layer indicating we want |
117 | to stop transmission. | 117 | to stop transmission due to an XOFF character. |
118 | |||
119 | tty_stop: 1 if this call is due to the TTY layer issuing a | ||
120 | TTY stop to the driver (equiv to rs_stop). | ||
121 | 118 | ||
122 | Locking: port->lock taken. | 119 | Locking: port->lock taken. |
123 | Interrupts: locally disabled. | 120 | Interrupts: locally disabled. |
124 | This call must not sleep | 121 | This call must not sleep |
125 | 122 | ||
126 | start_tx(port,tty_start) | 123 | start_tx(port) |
127 | start transmitting characters. (incidentally, nonempty will | 124 | start transmitting characters. |
128 | always be nonzero, and shouldn't be used - it will be dropped). | ||
129 | |||
130 | tty_start: 1 if this call was due to the TTY layer issuing | ||
131 | a TTY start to the driver (equiv to rs_start) | ||
132 | 125 | ||
133 | Locking: port->lock taken. | 126 | Locking: port->lock taken. |
134 | Interrupts: locally disabled. | 127 | Interrupts: locally disabled. |
diff --git a/MAINTAINERS b/MAINTAINERS index 671e32905d28..5899ec1504f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2650,11 +2650,6 @@ S: Maintained | |||
2650 | UCLINUX (AND M68KNOMMU) | 2650 | UCLINUX (AND M68KNOMMU) |
2651 | P: Greg Ungerer | 2651 | P: Greg Ungerer |
2652 | M: gerg@uclinux.org | 2652 | M: gerg@uclinux.org |
2653 | M: gerg@snapgear.com | ||
2654 | P: David McCullough | ||
2655 | M: davidm@snapgear.com | ||
2656 | P: D. Jeff Dionne (created first uClinux port) | ||
2657 | M: jeff@uclinux.org | ||
2658 | W: http://www.uclinux.org/ | 2653 | W: http://www.uclinux.org/ |
2659 | L: uclinux-dev@uclinux.org (subscribers-only) | 2654 | L: uclinux-dev@uclinux.org (subscribers-only) |
2660 | S: Maintained | 2655 | S: Maintained |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4bf0e8737e1f..68dfdba71d74 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -365,8 +365,8 @@ config NO_IDLE_HZ | |||
365 | 365 | ||
366 | Please note that dynamic tick may affect the accuracy of | 366 | Please note that dynamic tick may affect the accuracy of |
367 | timekeeping on some platforms depending on the implementation. | 367 | timekeeping on some platforms depending on the implementation. |
368 | Currently at least OMAP platform is known to have accurate | 368 | Currently at least OMAP, PXA2xx and SA11x0 platforms are known |
369 | timekeeping with dynamic tick. | 369 | to have accurate timekeeping with dynamic tick. |
370 | 370 | ||
371 | config ARCH_DISCONTIGMEM_ENABLE | 371 | config ARCH_DISCONTIGMEM_ENABLE |
372 | bool | 372 | bool |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 51dbf5489b6b..d74990717559 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <linux/list.h> | 25 | #include <linux/list.h> |
26 | #include <linux/smp.h> | 26 | #include <linux/smp.h> |
27 | #include <linux/cpumask.h> | ||
27 | 28 | ||
28 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
29 | #include <asm/io.h> | 30 | #include <asm/io.h> |
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index 2b6b4c786e65..db07ce42b3b2 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S | |||
@@ -284,7 +284,7 @@ __syscall_start: | |||
284 | .long sys_fstatfs64 | 284 | .long sys_fstatfs64 |
285 | .long sys_tgkill | 285 | .long sys_tgkill |
286 | .long sys_utimes | 286 | .long sys_utimes |
287 | /* 270 */ .long sys_fadvise64_64 | 287 | /* 270 */ .long sys_arm_fadvise64_64_wrapper |
288 | .long sys_pciconfig_iobase | 288 | .long sys_pciconfig_iobase |
289 | .long sys_pciconfig_read | 289 | .long sys_pciconfig_read |
290 | .long sys_pciconfig_write | 290 | .long sys_pciconfig_write |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 3f8d0e3aefab..6281d488ac97 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -265,6 +265,10 @@ sys_futex_wrapper: | |||
265 | str r5, [sp, #4] @ push sixth arg | 265 | str r5, [sp, #4] @ push sixth arg |
266 | b sys_futex | 266 | b sys_futex |
267 | 267 | ||
268 | sys_arm_fadvise64_64_wrapper: | ||
269 | str r5, [sp, #4] @ push r5 to stack | ||
270 | b sys_arm_fadvise64_64 | ||
271 | |||
268 | /* | 272 | /* |
269 | * Note: off_4k (r5) is always units of 4K. If we can't do the requested | 273 | * Note: off_4k (r5) is always units of 4K. If we can't do the requested |
270 | * offset, we return EINVAL. | 274 | * offset, we return EINVAL. |
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index f897ce2ccf0d..42629ff84f5a 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c | |||
@@ -311,3 +311,13 @@ long execve(const char *filename, char **argv, char **envp) | |||
311 | return ret; | 311 | return ret; |
312 | } | 312 | } |
313 | EXPORT_SYMBOL(execve); | 313 | EXPORT_SYMBOL(execve); |
314 | |||
315 | /* | ||
316 | * Since loff_t is a 64 bit type we avoid a lot of ABI hastle | ||
317 | * with a different argument ordering. | ||
318 | */ | ||
319 | asmlinkage long sys_arm_fadvise64_64(int fd, int advice, | ||
320 | loff_t offset, loff_t len) | ||
321 | { | ||
322 | return sys_fadvise64_64(fd, offset, len, advice); | ||
323 | } | ||
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 1b7fcd50c3e2..8880482dcbff 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -433,10 +433,12 @@ void timer_dyn_reprogram(void) | |||
433 | { | 433 | { |
434 | struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; | 434 | struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; |
435 | 435 | ||
436 | write_seqlock(&xtime_lock); | 436 | if (dyn_tick) { |
437 | if (dyn_tick->state & DYN_TICK_ENABLED) | 437 | write_seqlock(&xtime_lock); |
438 | dyn_tick->reprogram(next_timer_interrupt() - jiffies); | 438 | if (dyn_tick->state & DYN_TICK_ENABLED) |
439 | write_sequnlock(&xtime_lock); | 439 | dyn_tick->reprogram(next_timer_interrupt() - jiffies); |
440 | write_sequnlock(&xtime_lock); | ||
441 | } | ||
440 | } | 442 | } |
441 | 443 | ||
442 | static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) | 444 | static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 04490a9f8f6e..0422e906cc9a 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -38,90 +38,6 @@ | |||
38 | #include <asm/mach/irq.h> | 38 | #include <asm/mach/irq.h> |
39 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
40 | 40 | ||
41 | enum ixp4xx_irq_type { | ||
42 | IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE | ||
43 | }; | ||
44 | static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type); | ||
45 | |||
46 | /************************************************************************* | ||
47 | * GPIO acces functions | ||
48 | *************************************************************************/ | ||
49 | |||
50 | /* | ||
51 | * Configure GPIO line for input, interrupt, or output operation | ||
52 | * | ||
53 | * TODO: Enable/disable the irq_desc based on interrupt or output mode. | ||
54 | * TODO: Should these be named ixp4xx_gpio_? | ||
55 | */ | ||
56 | void gpio_line_config(u8 line, u32 style) | ||
57 | { | ||
58 | static const int gpio2irq[] = { | ||
59 | 6, 7, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29 | ||
60 | }; | ||
61 | u32 enable; | ||
62 | volatile u32 *int_reg; | ||
63 | u32 int_style; | ||
64 | enum ixp4xx_irq_type irq_type; | ||
65 | |||
66 | enable = *IXP4XX_GPIO_GPOER; | ||
67 | |||
68 | if (style & IXP4XX_GPIO_OUT) { | ||
69 | enable &= ~((1) << line); | ||
70 | } else if (style & IXP4XX_GPIO_IN) { | ||
71 | enable |= ((1) << line); | ||
72 | |||
73 | switch (style & IXP4XX_GPIO_INTSTYLE_MASK) | ||
74 | { | ||
75 | case (IXP4XX_GPIO_ACTIVE_HIGH): | ||
76 | int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH; | ||
77 | irq_type = IXP4XX_IRQ_LEVEL; | ||
78 | break; | ||
79 | case (IXP4XX_GPIO_ACTIVE_LOW): | ||
80 | int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW; | ||
81 | irq_type = IXP4XX_IRQ_LEVEL; | ||
82 | break; | ||
83 | case (IXP4XX_GPIO_RISING_EDGE): | ||
84 | int_style = IXP4XX_GPIO_STYLE_RISING_EDGE; | ||
85 | irq_type = IXP4XX_IRQ_EDGE; | ||
86 | break; | ||
87 | case (IXP4XX_GPIO_FALLING_EDGE): | ||
88 | int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE; | ||
89 | irq_type = IXP4XX_IRQ_EDGE; | ||
90 | break; | ||
91 | case (IXP4XX_GPIO_TRANSITIONAL): | ||
92 | int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL; | ||
93 | irq_type = IXP4XX_IRQ_EDGE; | ||
94 | break; | ||
95 | default: | ||
96 | int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH; | ||
97 | irq_type = IXP4XX_IRQ_LEVEL; | ||
98 | break; | ||
99 | } | ||
100 | |||
101 | if (style & IXP4XX_GPIO_INTSTYLE_MASK) | ||
102 | ixp4xx_config_irq(gpio2irq[line], irq_type); | ||
103 | |||
104 | if (line >= 8) { /* pins 8-15 */ | ||
105 | line -= 8; | ||
106 | int_reg = IXP4XX_GPIO_GPIT2R; | ||
107 | } | ||
108 | else { /* pins 0-7 */ | ||
109 | int_reg = IXP4XX_GPIO_GPIT1R; | ||
110 | } | ||
111 | |||
112 | /* Clear the style for the appropriate pin */ | ||
113 | *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR << | ||
114 | (line * IXP4XX_GPIO_STYLE_SIZE)); | ||
115 | |||
116 | /* Set the new style */ | ||
117 | *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); | ||
118 | } | ||
119 | |||
120 | *IXP4XX_GPIO_GPOER = enable; | ||
121 | } | ||
122 | |||
123 | EXPORT_SYMBOL(gpio_line_config); | ||
124 | |||
125 | /************************************************************************* | 41 | /************************************************************************* |
126 | * IXP4xx chipset I/O mapping | 42 | * IXP4xx chipset I/O mapping |
127 | *************************************************************************/ | 43 | *************************************************************************/ |
@@ -165,6 +81,69 @@ void __init ixp4xx_map_io(void) | |||
165 | * (be it PCI or something else) configures that GPIO line | 81 | * (be it PCI or something else) configures that GPIO line |
166 | * as an IRQ. | 82 | * as an IRQ. |
167 | **************************************************************************/ | 83 | **************************************************************************/ |
84 | enum ixp4xx_irq_type { | ||
85 | IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE | ||
86 | }; | ||
87 | |||
88 | static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type); | ||
89 | |||
90 | /* | ||
91 | * IRQ -> GPIO mapping table | ||
92 | */ | ||
93 | static int irq2gpio[32] = { | ||
94 | -1, -1, -1, -1, -1, -1, 0, 1, | ||
95 | -1, -1, -1, -1, -1, -1, -1, -1, | ||
96 | -1, -1, -1, 2, 3, 4, 5, 6, | ||
97 | 7, 8, 9, 10, 11, 12, -1, -1, | ||
98 | }; | ||
99 | |||
100 | static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) | ||
101 | { | ||
102 | int line = irq2gpio[irq]; | ||
103 | u32 int_style; | ||
104 | enum ixp4xx_irq_type irq_type; | ||
105 | volatile u32 *int_reg; | ||
106 | |||
107 | /* | ||
108 | * Only for GPIO IRQs | ||
109 | */ | ||
110 | if (line < 0) | ||
111 | return -EINVAL; | ||
112 | |||
113 | if (type & IRQT_BOTHEDGE) { | ||
114 | int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL; | ||
115 | irq_type = IXP4XX_IRQ_EDGE; | ||
116 | } else if (type & IRQT_RISING) { | ||
117 | int_style = IXP4XX_GPIO_STYLE_RISING_EDGE; | ||
118 | irq_type = IXP4XX_IRQ_EDGE; | ||
119 | } else if (type & IRQT_FALLING) { | ||
120 | int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE; | ||
121 | irq_type = IXP4XX_IRQ_EDGE; | ||
122 | } else if (type & IRQT_HIGH) { | ||
123 | int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH; | ||
124 | irq_type = IXP4XX_IRQ_LEVEL; | ||
125 | } else if (type & IRQT_LOW) { | ||
126 | int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW; | ||
127 | irq_type = IXP4XX_IRQ_LEVEL; | ||
128 | } | ||
129 | |||
130 | ixp4xx_config_irq(irq, irq_type); | ||
131 | |||
132 | if (line >= 8) { /* pins 8-15 */ | ||
133 | line -= 8; | ||
134 | int_reg = IXP4XX_GPIO_GPIT2R; | ||
135 | } else { /* pins 0-7 */ | ||
136 | int_reg = IXP4XX_GPIO_GPIT1R; | ||
137 | } | ||
138 | |||
139 | /* Clear the style for the appropriate pin */ | ||
140 | *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR << | ||
141 | (line * IXP4XX_GPIO_STYLE_SIZE)); | ||
142 | |||
143 | /* Set the new style */ | ||
144 | *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); | ||
145 | } | ||
146 | |||
168 | static void ixp4xx_irq_mask(unsigned int irq) | 147 | static void ixp4xx_irq_mask(unsigned int irq) |
169 | { | 148 | { |
170 | if (cpu_is_ixp46x() && irq >= 32) | 149 | if (cpu_is_ixp46x() && irq >= 32) |
@@ -183,12 +162,6 @@ static void ixp4xx_irq_unmask(unsigned int irq) | |||
183 | 162 | ||
184 | static void ixp4xx_irq_ack(unsigned int irq) | 163 | static void ixp4xx_irq_ack(unsigned int irq) |
185 | { | 164 | { |
186 | static int irq2gpio[32] = { | ||
187 | -1, -1, -1, -1, -1, -1, 0, 1, | ||
188 | -1, -1, -1, -1, -1, -1, -1, -1, | ||
189 | -1, -1, -1, 2, 3, 4, 5, 6, | ||
190 | 7, 8, 9, 10, 11, 12, -1, -1, | ||
191 | }; | ||
192 | int line = (irq < 32) ? irq2gpio[irq] : -1; | 165 | int line = (irq < 32) ? irq2gpio[irq] : -1; |
193 | 166 | ||
194 | if (line >= 0) | 167 | if (line >= 0) |
@@ -209,12 +182,14 @@ static struct irqchip ixp4xx_irq_level_chip = { | |||
209 | .ack = ixp4xx_irq_mask, | 182 | .ack = ixp4xx_irq_mask, |
210 | .mask = ixp4xx_irq_mask, | 183 | .mask = ixp4xx_irq_mask, |
211 | .unmask = ixp4xx_irq_level_unmask, | 184 | .unmask = ixp4xx_irq_level_unmask, |
185 | .type = ixp4xx_set_irq_type | ||
212 | }; | 186 | }; |
213 | 187 | ||
214 | static struct irqchip ixp4xx_irq_edge_chip = { | 188 | static struct irqchip ixp4xx_irq_edge_chip = { |
215 | .ack = ixp4xx_irq_ack, | 189 | .ack = ixp4xx_irq_ack, |
216 | .mask = ixp4xx_irq_mask, | 190 | .mask = ixp4xx_irq_mask, |
217 | .unmask = ixp4xx_irq_unmask, | 191 | .unmask = ixp4xx_irq_unmask, |
192 | .type = ixp4xx_set_irq_type | ||
218 | }; | 193 | }; |
219 | 194 | ||
220 | static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type) | 195 | static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type) |
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c index afafb42ae129..60de8a94cff5 100644 --- a/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/arch/arm/mach-ixp4xx/coyote-pci.c | |||
@@ -30,11 +30,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); | |||
30 | 30 | ||
31 | void __init coyote_pci_preinit(void) | 31 | void __init coyote_pci_preinit(void) |
32 | { | 32 | { |
33 | gpio_line_config(COYOTE_PCI_SLOT0_PIN, | 33 | set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW); |
34 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | 34 | set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW); |
35 | |||
36 | gpio_line_config(COYOTE_PCI_SLOT1_PIN, | ||
37 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | ||
38 | 35 | ||
39 | gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN); | 36 | gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN); |
40 | gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN); | 37 | gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN); |
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 411ea9996190..8b2f25322452 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c | |||
@@ -24,11 +24,6 @@ | |||
24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
25 | #include <asm/mach/flash.h> | 25 | #include <asm/mach/flash.h> |
26 | 26 | ||
27 | void __init coyote_map_io(void) | ||
28 | { | ||
29 | ixp4xx_map_io(); | ||
30 | } | ||
31 | |||
32 | static struct flash_platform_data coyote_flash_data = { | 27 | static struct flash_platform_data coyote_flash_data = { |
33 | .map_name = "cfi_probe", | 28 | .map_name = "cfi_probe", |
34 | .width = 2, | 29 | .width = 2, |
@@ -107,7 +102,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") | |||
107 | .phys_ram = PHYS_OFFSET, | 102 | .phys_ram = PHYS_OFFSET, |
108 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 103 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
109 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 104 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
110 | .map_io = coyote_map_io, | 105 | .map_io = ixp4xx_map_io, |
111 | .init_irq = ixp4xx_init_irq, | 106 | .init_irq = ixp4xx_init_irq, |
112 | .timer = &ixp4xx_timer, | 107 | .timer = &ixp4xx_timer, |
113 | .boot_params = 0x0100, | 108 | .boot_params = 0x0100, |
@@ -125,7 +120,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425") | |||
125 | .phys_ram = PHYS_OFFSET, | 120 | .phys_ram = PHYS_OFFSET, |
126 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 121 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
127 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 122 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
128 | .map_io = coyote_map_io, | 123 | .map_io = ixp4xx_map_io, |
129 | .init_irq = ixp4xx_init_irq, | 124 | .init_irq = ixp4xx_init_irq, |
130 | .timer = &ixp4xx_timer, | 125 | .timer = &ixp4xx_timer, |
131 | .boot_params = 0x0100, | 126 | .boot_params = 0x0100, |
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c index b18035824e3e..a66484b63d36 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c | |||
@@ -35,26 +35,20 @@ extern void ixp4xx_pci_preinit(void); | |||
35 | extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); | 35 | extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); |
36 | extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); | 36 | extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); |
37 | 37 | ||
38 | /* | ||
39 | * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h | ||
40 | * Slot 0 isn't actually populated with a card connector but | ||
41 | * we initialize it anyway in case a future version has the | ||
42 | * slot populated or someone with good soldering skills has | ||
43 | * some free time. | ||
44 | */ | ||
45 | |||
46 | |||
47 | static void gtwx5715_init_gpio(u8 pin, u32 style) | ||
48 | { | ||
49 | gpio_line_config(pin, style | IXP4XX_GPIO_ACTIVE_LOW); | ||
50 | |||
51 | if (style & IXP4XX_GPIO_IN) gpio_line_isr_clear(pin); | ||
52 | } | ||
53 | 38 | ||
39 | /* | ||
40 | * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h | ||
41 | * Slot 0 isn't actually populated with a card connector but | ||
42 | * we initialize it anyway in case a future version has the | ||
43 | * slot populated or someone with good soldering skills has | ||
44 | * some free time. | ||
45 | */ | ||
54 | void __init gtwx5715_pci_preinit(void) | 46 | void __init gtwx5715_pci_preinit(void) |
55 | { | 47 | { |
56 | gtwx5715_init_gpio(GTWX5715_PCI_SLOT0_INTA_GPIO, IXP4XX_GPIO_IN); | 48 | set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW); |
57 | gtwx5715_init_gpio(GTWX5715_PCI_SLOT1_INTA_GPIO, IXP4XX_GPIO_IN); | 49 | set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW); |
50 | set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW); | ||
51 | set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW); | ||
58 | 52 | ||
59 | ixp4xx_pci_preinit(); | 53 | ixp4xx_pci_preinit(); |
60 | } | 54 | } |
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 333459d6aa46..3fd92c5cbaa8 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
@@ -101,12 +101,6 @@ static struct platform_device gtwx5715_uart_device = { | |||
101 | .resource = gtwx5715_uart_resources, | 101 | .resource = gtwx5715_uart_resources, |
102 | }; | 102 | }; |
103 | 103 | ||
104 | |||
105 | void __init gtwx5715_map_io(void) | ||
106 | { | ||
107 | ixp4xx_map_io(); | ||
108 | } | ||
109 | |||
110 | static struct flash_platform_data gtwx5715_flash_data = { | 104 | static struct flash_platform_data gtwx5715_flash_data = { |
111 | .map_name = "cfi_probe", | 105 | .map_name = "cfi_probe", |
112 | .width = 2, | 106 | .width = 2, |
@@ -144,7 +138,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") | |||
144 | .phys_ram = PHYS_OFFSET, | 138 | .phys_ram = PHYS_OFFSET, |
145 | .phys_io = IXP4XX_UART2_BASE_PHYS, | 139 | .phys_io = IXP4XX_UART2_BASE_PHYS, |
146 | .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc, | 140 | .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc, |
147 | .map_io = gtwx5715_map_io, | 141 | .map_io = ixp4xx_map_io, |
148 | .init_irq = ixp4xx_init_irq, | 142 | .init_irq = ixp4xx_init_irq, |
149 | .timer = &ixp4xx_timer, | 143 | .timer = &ixp4xx_timer, |
150 | .boot_params = 0x0100, | 144 | .boot_params = 0x0100, |
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index c2ab9ebb5980..f9a1d3e7d692 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c | |||
@@ -27,14 +27,10 @@ | |||
27 | 27 | ||
28 | void __init ixdp425_pci_preinit(void) | 28 | void __init ixdp425_pci_preinit(void) |
29 | { | 29 | { |
30 | gpio_line_config(IXDP425_PCI_INTA_PIN, | 30 | set_irq_type(IRQ_IXDP425_PCI_INTA, IRQT_LOW); |
31 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | 31 | set_irq_type(IRQ_IXDP425_PCI_INTB, IRQT_LOW); |
32 | gpio_line_config(IXDP425_PCI_INTB_PIN, | 32 | set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW); |
33 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | 33 | set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW); |
34 | gpio_line_config(IXDP425_PCI_INTC_PIN, | ||
35 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | ||
36 | gpio_line_config(IXDP425_PCI_INTD_PIN, | ||
37 | IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | ||
38 | 34 | ||
39 | gpio_line_isr_clear(IXDP425_PCI_INTA_PIN); | 35 | gpio_line_isr_clear(IXDP425_PCI_INTA_PIN); |
40 | gpio_line_isr_clear(IXDP425_PCI_INTB_PIN); | 36 | gpio_line_isr_clear(IXDP425_PCI_INTB_PIN); |
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index fa0646c8693b..6c14ff3c23a0 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -24,11 +24,6 @@ | |||
24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
25 | #include <asm/mach/flash.h> | 25 | #include <asm/mach/flash.h> |
26 | 26 | ||
27 | void __init ixdp425_map_io(void) | ||
28 | { | ||
29 | ixp4xx_map_io(); | ||
30 | } | ||
31 | |||
32 | static struct flash_platform_data ixdp425_flash_data = { | 27 | static struct flash_platform_data ixdp425_flash_data = { |
33 | .map_name = "cfi_probe", | 28 | .map_name = "cfi_probe", |
34 | .width = 2, | 29 | .width = 2, |
@@ -133,7 +128,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") | |||
133 | .phys_ram = PHYS_OFFSET, | 128 | .phys_ram = PHYS_OFFSET, |
134 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 129 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
135 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 130 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
136 | .map_io = ixdp425_map_io, | 131 | .map_io = ixp4xx_map_io, |
137 | .init_irq = ixp4xx_init_irq, | 132 | .init_irq = ixp4xx_init_irq, |
138 | .timer = &ixp4xx_timer, | 133 | .timer = &ixp4xx_timer, |
139 | .boot_params = 0x0100, | 134 | .boot_params = 0x0100, |
@@ -145,7 +140,7 @@ MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") | |||
145 | .phys_ram = PHYS_OFFSET, | 140 | .phys_ram = PHYS_OFFSET, |
146 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 141 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
147 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 142 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
148 | .map_io = ixdp425_map_io, | 143 | .map_io = ixp4xx_map_io, |
149 | .init_irq = ixp4xx_init_irq, | 144 | .init_irq = ixp4xx_init_irq, |
150 | .timer = &ixp4xx_timer, | 145 | .timer = &ixp4xx_timer, |
151 | .boot_params = 0x0100, | 146 | .boot_params = 0x0100, |
@@ -157,7 +152,7 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") | |||
157 | .phys_ram = PHYS_OFFSET, | 152 | .phys_ram = PHYS_OFFSET, |
158 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 153 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
159 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 154 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
160 | .map_io = ixdp425_map_io, | 155 | .map_io = ixp4xx_map_io, |
161 | .init_irq = ixp4xx_init_irq, | 156 | .init_irq = ixp4xx_init_irq, |
162 | .timer = &ixp4xx_timer, | 157 | .timer = &ixp4xx_timer, |
163 | .boot_params = 0x0100, | 158 | .boot_params = 0x0100, |
@@ -176,7 +171,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform") | |||
176 | .phys_ram = PHYS_OFFSET, | 171 | .phys_ram = PHYS_OFFSET, |
177 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | 172 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
178 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | 173 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
179 | .map_io = ixdp425_map_io, | 174 | .map_io = ixp4xx_map_io, |
180 | .init_irq = ixp4xx_init_irq, | 175 | .init_irq = ixp4xx_init_irq, |
181 | .timer = &ixp4xx_timer, | 176 | .timer = &ixp4xx_timer, |
182 | .boot_params = 0x0100, | 177 | .boot_params = 0x0100, |
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c index ce4563f00676..fe5e7660de1d 100644 --- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c | |||
@@ -29,8 +29,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); | |||
29 | 29 | ||
30 | void __init ixdpg425_pci_preinit(void) | 30 | void __init ixdpg425_pci_preinit(void) |
31 | { | 31 | { |
32 | gpio_line_config(6, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | 32 | set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); |
33 | gpio_line_config(7, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); | 33 | set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); |
34 | 34 | ||
35 | gpio_line_isr_clear(6); | 35 | gpio_line_isr_clear(6); |
36 | gpio_line_isr_clear(7); | 36 | gpio_line_isr_clear(7); |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 6e5202154f91..7dad3f1465e0 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -70,6 +70,11 @@ static unsigned long pxa_gettimeoffset (void) | |||
70 | return usec; | 70 | return usec; |
71 | } | 71 | } |
72 | 72 | ||
73 | #ifdef CONFIG_NO_IDLE_HZ | ||
74 | static unsigned long initial_match; | ||
75 | static int match_posponed; | ||
76 | #endif | ||
77 | |||
73 | static irqreturn_t | 78 | static irqreturn_t |
74 | pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 79 | pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
75 | { | 80 | { |
@@ -77,11 +82,19 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
77 | 82 | ||
78 | write_seqlock(&xtime_lock); | 83 | write_seqlock(&xtime_lock); |
79 | 84 | ||
85 | #ifdef CONFIG_NO_IDLE_HZ | ||
86 | if (match_posponed) { | ||
87 | match_posponed = 0; | ||
88 | OSMR0 = initial_match; | ||
89 | } | ||
90 | #endif | ||
91 | |||
80 | /* Loop until we get ahead of the free running timer. | 92 | /* Loop until we get ahead of the free running timer. |
81 | * This ensures an exact clock tick count and time accuracy. | 93 | * This ensures an exact clock tick count and time accuracy. |
82 | * IRQs are disabled inside the loop to ensure coherence between | 94 | * Since IRQs are disabled at this point, coherence between |
83 | * lost_ticks (updated in do_timer()) and the match reg value, so we | 95 | * lost_ticks(updated in do_timer()) and the match reg value is |
84 | * can use do_gettimeofday() from interrupt handlers. | 96 | * ensured, hence we can use do_gettimeofday() from interrupt |
97 | * handlers. | ||
85 | * | 98 | * |
86 | * HACK ALERT: it seems that the PXA timer regs aren't updated right | 99 | * HACK ALERT: it seems that the PXA timer regs aren't updated right |
87 | * away in all cases when a write occurs. We therefore compare with | 100 | * away in all cases when a write occurs. We therefore compare with |
@@ -126,6 +139,42 @@ static void __init pxa_timer_init(void) | |||
126 | OSCR = 0; /* initialize free-running timer, force first match */ | 139 | OSCR = 0; /* initialize free-running timer, force first match */ |
127 | } | 140 | } |
128 | 141 | ||
142 | #ifdef CONFIG_NO_IDLE_HZ | ||
143 | static int pxa_dyn_tick_enable_disable(void) | ||
144 | { | ||
145 | /* nothing to do */ | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static void pxa_dyn_tick_reprogram(unsigned long ticks) | ||
150 | { | ||
151 | if (ticks > 1) { | ||
152 | initial_match = OSMR0; | ||
153 | OSMR0 = initial_match + ticks * LATCH; | ||
154 | match_posponed = 1; | ||
155 | } | ||
156 | } | ||
157 | |||
158 | static irqreturn_t | ||
159 | pxa_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs) | ||
160 | { | ||
161 | if (match_posponed) { | ||
162 | match_posponed = 0; | ||
163 | OSMR0 = initial_match; | ||
164 | if ( (signed long)(initial_match - OSCR) <= 8 ) | ||
165 | return pxa_timer_interrupt(irq, dev_id, regs); | ||
166 | } | ||
167 | return IRQ_NONE; | ||
168 | } | ||
169 | |||
170 | static struct dyn_tick_timer pxa_dyn_tick = { | ||
171 | .enable = pxa_dyn_tick_enable_disable, | ||
172 | .disable = pxa_dyn_tick_enable_disable, | ||
173 | .reprogram = pxa_dyn_tick_reprogram, | ||
174 | .handler = pxa_dyn_tick_handler, | ||
175 | }; | ||
176 | #endif | ||
177 | |||
129 | #ifdef CONFIG_PM | 178 | #ifdef CONFIG_PM |
130 | static unsigned long osmr[4], oier; | 179 | static unsigned long osmr[4], oier; |
131 | 180 | ||
@@ -161,4 +210,7 @@ struct sys_timer pxa_timer = { | |||
161 | .suspend = pxa_timer_suspend, | 210 | .suspend = pxa_timer_suspend, |
162 | .resume = pxa_timer_resume, | 211 | .resume = pxa_timer_resume, |
163 | .offset = pxa_gettimeoffset, | 212 | .offset = pxa_gettimeoffset, |
213 | #ifdef CONFIG_NO_IDLE_HZ | ||
214 | .dyn_tick = &pxa_dyn_tick, | ||
215 | #endif | ||
164 | }; | 216 | }; |
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 9a66050e887d..f59608268751 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c | |||
@@ -388,6 +388,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
388 | unsigned long hclk, | 388 | unsigned long hclk, |
389 | unsigned long pclk) | 389 | unsigned long pclk) |
390 | { | 390 | { |
391 | unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); | ||
391 | struct clk *clkp = init_clocks; | 392 | struct clk *clkp = init_clocks; |
392 | int ptr; | 393 | int ptr; |
393 | int ret; | 394 | int ret; |
@@ -446,5 +447,13 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
446 | } | 447 | } |
447 | } | 448 | } |
448 | 449 | ||
450 | /* show the clock-slow value */ | ||
451 | |||
452 | printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", | ||
453 | print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), | ||
454 | (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", | ||
455 | (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", | ||
456 | (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); | ||
457 | |||
449 | return 0; | 458 | return 0; |
450 | } | 459 | } |
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c index b018a1f680ce..c67e0979aec3 100644 --- a/arch/arm/mach-s3c2410/s3c2440-clock.c +++ b/arch/arm/mach-s3c2410/s3c2440-clock.c | |||
@@ -68,6 +68,7 @@ static struct clk s3c2440_clk_ac97 = { | |||
68 | static int s3c2440_clk_add(struct sys_device *sysdev) | 68 | static int s3c2440_clk_add(struct sys_device *sysdev) |
69 | { | 69 | { |
70 | unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); | 70 | unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); |
71 | unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | ||
71 | struct clk *clk_h; | 72 | struct clk *clk_h; |
72 | struct clk *clk_p; | 73 | struct clk *clk_p; |
73 | struct clk *clk_xtal; | 74 | struct clk *clk_xtal; |
@@ -80,8 +81,9 @@ static int s3c2440_clk_add(struct sys_device *sysdev) | |||
80 | 81 | ||
81 | s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate); | 82 | s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate); |
82 | 83 | ||
83 | printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n", | 84 | printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n", |
84 | print_mhz(s3c2440_clk_upll.rate)); | 85 | print_mhz(s3c2440_clk_upll.rate), |
86 | (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
85 | 87 | ||
86 | clk_p = clk_get(NULL, "pclk"); | 88 | clk_p = clk_get(NULL, "pclk"); |
87 | clk_h = clk_get(NULL, "hclk"); | 89 | clk_h = clk_get(NULL, "hclk"); |
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 0eeb3616ffea..47e0420623fc 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -70,15 +70,11 @@ static unsigned long sa1100_gettimeoffset (void) | |||
70 | return usec; | 70 | return usec; |
71 | } | 71 | } |
72 | 72 | ||
73 | /* | 73 | #ifdef CONFIG_NO_IDLE_HZ |
74 | * We will be entered with IRQs enabled. | 74 | static unsigned long initial_match; |
75 | * | 75 | static int match_posponed; |
76 | * Loop until we get ahead of the free running timer. | 76 | #endif |
77 | * This ensures an exact clock tick count and time accuracy. | 77 | |
78 | * IRQs are disabled inside the loop to ensure coherence between | ||
79 | * lost_ticks (updated in do_timer()) and the match reg value, so we | ||
80 | * can use do_gettimeofday() from interrupt handlers. | ||
81 | */ | ||
82 | static irqreturn_t | 78 | static irqreturn_t |
83 | sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 79 | sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
84 | { | 80 | { |
@@ -86,6 +82,21 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
86 | 82 | ||
87 | write_seqlock(&xtime_lock); | 83 | write_seqlock(&xtime_lock); |
88 | 84 | ||
85 | #ifdef CONFIG_NO_IDLE_HZ | ||
86 | if (match_posponed) { | ||
87 | match_posponed = 0; | ||
88 | OSMR0 = initial_match; | ||
89 | } | ||
90 | #endif | ||
91 | |||
92 | /* | ||
93 | * Loop until we get ahead of the free running timer. | ||
94 | * This ensures an exact clock tick count and time accuracy. | ||
95 | * Since IRQs are disabled at this point, coherence between | ||
96 | * lost_ticks(updated in do_timer()) and the match reg value is | ||
97 | * ensured, hence we can use do_gettimeofday() from interrupt | ||
98 | * handlers. | ||
99 | */ | ||
89 | do { | 100 | do { |
90 | timer_tick(regs); | 101 | timer_tick(regs); |
91 | OSSR = OSSR_M0; /* Clear match on timer 0 */ | 102 | OSSR = OSSR_M0; /* Clear match on timer 0 */ |
@@ -120,6 +131,42 @@ static void __init sa1100_timer_init(void) | |||
120 | OSCR = 0; /* initialize free-running timer, force first match */ | 131 | OSCR = 0; /* initialize free-running timer, force first match */ |
121 | } | 132 | } |
122 | 133 | ||
134 | #ifdef CONFIG_NO_IDLE_HZ | ||
135 | static int sa1100_dyn_tick_enable_disable(void) | ||
136 | { | ||
137 | /* nothing to do */ | ||
138 | return 0; | ||
139 | } | ||
140 | |||
141 | static void sa1100_dyn_tick_reprogram(unsigned long ticks) | ||
142 | { | ||
143 | if (ticks > 1) { | ||
144 | initial_match = OSMR0; | ||
145 | OSMR0 = initial_match + ticks * LATCH; | ||
146 | match_posponed = 1; | ||
147 | } | ||
148 | } | ||
149 | |||
150 | static irqreturn_t | ||
151 | sa1100_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs) | ||
152 | { | ||
153 | if (match_posponed) { | ||
154 | match_posponed = 0; | ||
155 | OSMR0 = initial_match; | ||
156 | if ((signed long)(initial_match - OSCR) <= 0) | ||
157 | return sa1100_timer_interrupt(irq, dev_id, regs); | ||
158 | } | ||
159 | return IRQ_NONE; | ||
160 | } | ||
161 | |||
162 | static struct dyn_tick_timer sa1100_dyn_tick = { | ||
163 | .enable = sa1100_dyn_tick_enable_disable, | ||
164 | .disable = sa1100_dyn_tick_enable_disable, | ||
165 | .reprogram = sa1100_dyn_tick_reprogram, | ||
166 | .handler = sa1100_dyn_tick_handler, | ||
167 | }; | ||
168 | #endif | ||
169 | |||
123 | #ifdef CONFIG_PM | 170 | #ifdef CONFIG_PM |
124 | unsigned long osmr[4], oier; | 171 | unsigned long osmr[4], oier; |
125 | 172 | ||
@@ -156,4 +203,7 @@ struct sys_timer sa1100_timer = { | |||
156 | .suspend = sa1100_timer_suspend, | 203 | .suspend = sa1100_timer_suspend, |
157 | .resume = sa1100_timer_resume, | 204 | .resume = sa1100_timer_resume, |
158 | .offset = sa1100_gettimeoffset, | 205 | .offset = sa1100_gettimeoffset, |
206 | #ifdef CONFIG_NO_IDLE_HZ | ||
207 | .dyn_tick = &sa1100_dyn_tick, | ||
208 | #endif | ||
159 | }; | 209 | }; |
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 81f4a8a2d34b..4b39d867ac14 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c | |||
@@ -45,7 +45,7 @@ | |||
45 | 45 | ||
46 | #define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0) | 46 | #define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0) |
47 | 47 | ||
48 | #define LDSTH_I_BIT(i) (i & (1 << 22)) /* half-word immed */ | 48 | #define LDSTHD_I_BIT(i) (i & (1 << 22)) /* double/half-word immed */ |
49 | #define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */ | 49 | #define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */ |
50 | 50 | ||
51 | #define RN_BITS(i) ((i >> 16) & 15) /* Rn */ | 51 | #define RN_BITS(i) ((i >> 16) & 15) /* Rn */ |
@@ -68,6 +68,7 @@ static unsigned long ai_sys; | |||
68 | static unsigned long ai_skipped; | 68 | static unsigned long ai_skipped; |
69 | static unsigned long ai_half; | 69 | static unsigned long ai_half; |
70 | static unsigned long ai_word; | 70 | static unsigned long ai_word; |
71 | static unsigned long ai_dword; | ||
71 | static unsigned long ai_multi; | 72 | static unsigned long ai_multi; |
72 | static int ai_usermode; | 73 | static int ai_usermode; |
73 | 74 | ||
@@ -93,6 +94,8 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof, | |||
93 | p += sprintf(p, "Skipped:\t%lu\n", ai_skipped); | 94 | p += sprintf(p, "Skipped:\t%lu\n", ai_skipped); |
94 | p += sprintf(p, "Half:\t\t%lu\n", ai_half); | 95 | p += sprintf(p, "Half:\t\t%lu\n", ai_half); |
95 | p += sprintf(p, "Word:\t\t%lu\n", ai_word); | 96 | p += sprintf(p, "Word:\t\t%lu\n", ai_word); |
97 | if (cpu_architecture() >= CPU_ARCH_ARMv5TE) | ||
98 | p += sprintf(p, "DWord:\t\t%lu\n", ai_dword); | ||
96 | p += sprintf(p, "Multi:\t\t%lu\n", ai_multi); | 99 | p += sprintf(p, "Multi:\t\t%lu\n", ai_multi); |
97 | p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode, | 100 | p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode, |
98 | usermode_action[ai_usermode]); | 101 | usermode_action[ai_usermode]); |
@@ -283,12 +286,6 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r | |||
283 | { | 286 | { |
284 | unsigned int rd = RD_BITS(instr); | 287 | unsigned int rd = RD_BITS(instr); |
285 | 288 | ||
286 | if ((instr & 0x01f00ff0) == 0x01000090) | ||
287 | goto swp; | ||
288 | |||
289 | if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0) | ||
290 | goto bad; | ||
291 | |||
292 | ai_half += 1; | 289 | ai_half += 1; |
293 | 290 | ||
294 | if (user_mode(regs)) | 291 | if (user_mode(regs)) |
@@ -323,10 +320,47 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r | |||
323 | 320 | ||
324 | return TYPE_LDST; | 321 | return TYPE_LDST; |
325 | 322 | ||
326 | swp: | 323 | fault: |
327 | printk(KERN_ERR "Alignment trap: not handling swp instruction\n"); | 324 | return TYPE_FAULT; |
328 | bad: | 325 | } |
329 | return TYPE_ERROR; | 326 | |
327 | static int | ||
328 | do_alignment_ldrdstrd(unsigned long addr, unsigned long instr, | ||
329 | struct pt_regs *regs) | ||
330 | { | ||
331 | unsigned int rd = RD_BITS(instr); | ||
332 | |||
333 | ai_dword += 1; | ||
334 | |||
335 | if (user_mode(regs)) | ||
336 | goto user; | ||
337 | |||
338 | if ((instr & 0xf0) == 0xd0) { | ||
339 | unsigned long val; | ||
340 | get32_unaligned_check(val, addr); | ||
341 | regs->uregs[rd] = val; | ||
342 | get32_unaligned_check(val, addr+4); | ||
343 | regs->uregs[rd+1] = val; | ||
344 | } else { | ||
345 | put32_unaligned_check(regs->uregs[rd], addr); | ||
346 | put32_unaligned_check(regs->uregs[rd+1], addr+4); | ||
347 | } | ||
348 | |||
349 | return TYPE_LDST; | ||
350 | |||
351 | user: | ||
352 | if ((instr & 0xf0) == 0xd0) { | ||
353 | unsigned long val; | ||
354 | get32t_unaligned_check(val, addr); | ||
355 | regs->uregs[rd] = val; | ||
356 | get32t_unaligned_check(val, addr+4); | ||
357 | regs->uregs[rd+1] = val; | ||
358 | } else { | ||
359 | put32t_unaligned_check(regs->uregs[rd], addr); | ||
360 | put32t_unaligned_check(regs->uregs[rd+1], addr+4); | ||
361 | } | ||
362 | |||
363 | return TYPE_LDST; | ||
330 | 364 | ||
331 | fault: | 365 | fault: |
332 | return TYPE_FAULT; | 366 | return TYPE_FAULT; |
@@ -617,12 +651,20 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
617 | regs->ARM_pc += thumb_mode(regs) ? 2 : 4; | 651 | regs->ARM_pc += thumb_mode(regs) ? 2 : 4; |
618 | 652 | ||
619 | switch (CODING_BITS(instr)) { | 653 | switch (CODING_BITS(instr)) { |
620 | case 0x00000000: /* ldrh or strh */ | 654 | case 0x00000000: /* 3.13.4 load/store instruction extensions */ |
621 | if (LDSTH_I_BIT(instr)) | 655 | if (LDSTHD_I_BIT(instr)) |
622 | offset.un = (instr & 0xf00) >> 4 | (instr & 15); | 656 | offset.un = (instr & 0xf00) >> 4 | (instr & 15); |
623 | else | 657 | else |
624 | offset.un = regs->uregs[RM_BITS(instr)]; | 658 | offset.un = regs->uregs[RM_BITS(instr)]; |
625 | handler = do_alignment_ldrhstrh; | 659 | |
660 | if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */ | ||
661 | (instr & 0x001000f0) == 0x001000f0) /* LDRSH */ | ||
662 | handler = do_alignment_ldrhstrh; | ||
663 | else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */ | ||
664 | (instr & 0x001000f0) == 0x000000f0) /* STRD */ | ||
665 | handler = do_alignment_ldrdstrd; | ||
666 | else | ||
667 | goto bad; | ||
626 | break; | 668 | break; |
627 | 669 | ||
628 | case 0x04000000: /* ldr or str immediate */ | 670 | case 0x04000000: /* ldr or str immediate */ |
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index 3c655c54e231..d125a3dc061c 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c | |||
@@ -275,11 +275,9 @@ alloc_init_supersection(unsigned long virt, unsigned long phys, int prot) | |||
275 | int i; | 275 | int i; |
276 | 276 | ||
277 | for (i = 0; i < 16; i += 1) { | 277 | for (i = 0; i < 16; i += 1) { |
278 | alloc_init_section(virt, phys & SUPERSECTION_MASK, | 278 | alloc_init_section(virt, phys, prot | PMD_SECT_SUPER); |
279 | prot | PMD_SECT_SUPER); | ||
280 | 279 | ||
281 | virt += (PGDIR_SIZE / 2); | 280 | virt += (PGDIR_SIZE / 2); |
282 | phys += (PGDIR_SIZE / 2); | ||
283 | } | 281 | } |
284 | } | 282 | } |
285 | 283 | ||
@@ -297,14 +295,10 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg | |||
297 | pte_t *ptep; | 295 | pte_t *ptep; |
298 | 296 | ||
299 | if (pmd_none(*pmdp)) { | 297 | if (pmd_none(*pmdp)) { |
300 | unsigned long pmdval; | ||
301 | ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE * | 298 | ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE * |
302 | sizeof(pte_t)); | 299 | sizeof(pte_t)); |
303 | 300 | ||
304 | pmdval = __pa(ptep) | prot_l1; | 301 | __pmd_populate(pmdp, __pa(ptep) | prot_l1); |
305 | pmdp[0] = __pmd(pmdval); | ||
306 | pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); | ||
307 | flush_pmd_entry(pmdp); | ||
308 | } | 302 | } |
309 | ptep = pte_offset_kernel(pmdp, virt); | 303 | ptep = pte_offset_kernel(pmdp, virt); |
310 | 304 | ||
@@ -459,7 +453,7 @@ static void __init build_mem_type_table(void) | |||
459 | 453 | ||
460 | for (i = 0; i < 16; i++) { | 454 | for (i = 0; i < 16; i++) { |
461 | unsigned long v = pgprot_val(protection_map[i]); | 455 | unsigned long v = pgprot_val(protection_map[i]); |
462 | v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot; | 456 | v = (v & ~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot; |
463 | protection_map[i] = __pgprot(v); | 457 | protection_map[i] = __pgprot(v); |
464 | } | 458 | } |
465 | 459 | ||
@@ -583,23 +577,23 @@ static void __init create_mapping(struct map_desc *md) | |||
583 | */ | 577 | */ |
584 | void setup_mm_for_reboot(char mode) | 578 | void setup_mm_for_reboot(char mode) |
585 | { | 579 | { |
586 | unsigned long pmdval; | 580 | unsigned long base_pmdval; |
587 | pgd_t *pgd; | 581 | pgd_t *pgd; |
588 | pmd_t *pmd; | ||
589 | int i; | 582 | int i; |
590 | int cpu_arch = cpu_architecture(); | ||
591 | 583 | ||
592 | if (current->mm && current->mm->pgd) | 584 | if (current->mm && current->mm->pgd) |
593 | pgd = current->mm->pgd; | 585 | pgd = current->mm->pgd; |
594 | else | 586 | else |
595 | pgd = init_mm.pgd; | 587 | pgd = init_mm.pgd; |
596 | 588 | ||
597 | for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) { | 589 | base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT; |
598 | pmdval = (i << PGDIR_SHIFT) | | 590 | if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ) |
599 | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | | 591 | base_pmdval |= PMD_BIT4; |
600 | PMD_TYPE_SECT; | 592 | |
601 | if (cpu_arch <= CPU_ARCH_ARMv5TEJ) | 593 | for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { |
602 | pmdval |= PMD_BIT4; | 594 | unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval; |
595 | pmd_t *pmd; | ||
596 | |||
603 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); | 597 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); |
604 | pmd[0] = __pmd(pmdval); | 598 | pmd[0] = __pmd(pmdval); |
605 | pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); | 599 | pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); |
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 80988136f26d..3deced637f07 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -383,6 +383,12 @@ source "drivers/acpi/Kconfig" | |||
383 | 383 | ||
384 | endif | 384 | endif |
385 | 385 | ||
386 | if PM | ||
387 | |||
388 | source "arch/ia64/kernel/cpufreq/Kconfig" | ||
389 | |||
390 | endif | ||
391 | |||
386 | endmenu | 392 | endmenu |
387 | 393 | ||
388 | if !IA64_HP_SIM | 394 | if !IA64_HP_SIM |
diff --git a/arch/ia64/hp/sim/boot/fw-emu.c b/arch/ia64/hp/sim/boot/fw-emu.c index 5c46928e3dc6..30fdfb1d0a53 100644 --- a/arch/ia64/hp/sim/boot/fw-emu.c +++ b/arch/ia64/hp/sim/boot/fw-emu.c | |||
@@ -237,17 +237,6 @@ sal_emulator (long index, unsigned long in1, unsigned long in2, | |||
237 | return ((struct sal_ret_values) {status, r9, r10, r11}); | 237 | return ((struct sal_ret_values) {status, r9, r10, r11}); |
238 | } | 238 | } |
239 | 239 | ||
240 | |||
241 | /* | ||
242 | * This is here to work around a bug in egcs-1.1.1b that causes the | ||
243 | * compiler to crash (seems like a bug in the new alias analysis code. | ||
244 | */ | ||
245 | void * | ||
246 | id (long addr) | ||
247 | { | ||
248 | return (void *) addr; | ||
249 | } | ||
250 | |||
251 | struct ia64_boot_param * | 240 | struct ia64_boot_param * |
252 | sys_fw_init (const char *args, int arglen) | 241 | sys_fw_init (const char *args, int arglen) |
253 | { | 242 | { |
diff --git a/arch/ia64/ia32/ia32_signal.c b/arch/ia64/ia32/ia32_signal.c index ebb89be2aa2d..aa891c9bc9b6 100644 --- a/arch/ia64/ia32/ia32_signal.c +++ b/arch/ia64/ia32/ia32_signal.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <asm/uaccess.h> | 29 | #include <asm/uaccess.h> |
30 | #include <asm/rse.h> | 30 | #include <asm/rse.h> |
31 | #include <asm/sigcontext.h> | 31 | #include <asm/sigcontext.h> |
32 | #include <asm/segment.h> | ||
33 | 32 | ||
34 | #include "ia32priv.h" | 33 | #include "ia32priv.h" |
35 | 34 | ||
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile index e1fb68ddec26..b242594be55b 100644 --- a/arch/ia64/kernel/Makefile +++ b/arch/ia64/kernel/Makefile | |||
@@ -20,6 +20,7 @@ obj-$(CONFIG_SMP) += smp.o smpboot.o domain.o | |||
20 | obj-$(CONFIG_NUMA) += numa.o | 20 | obj-$(CONFIG_NUMA) += numa.o |
21 | obj-$(CONFIG_PERFMON) += perfmon_default_smpl.o | 21 | obj-$(CONFIG_PERFMON) += perfmon_default_smpl.o |
22 | obj-$(CONFIG_IA64_CYCLONE) += cyclone.o | 22 | obj-$(CONFIG_IA64_CYCLONE) += cyclone.o |
23 | obj-$(CONFIG_CPU_FREQ) += cpufreq/ | ||
23 | obj-$(CONFIG_IA64_MCA_RECOVERY) += mca_recovery.o | 24 | obj-$(CONFIG_IA64_MCA_RECOVERY) += mca_recovery.o |
24 | obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o | 25 | obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o |
25 | obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o | 26 | obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o |
diff --git a/arch/ia64/kernel/cpufreq/Kconfig b/arch/ia64/kernel/cpufreq/Kconfig new file mode 100644 index 000000000000..2d9d5279b981 --- /dev/null +++ b/arch/ia64/kernel/cpufreq/Kconfig | |||
@@ -0,0 +1,29 @@ | |||
1 | |||
2 | # | ||
3 | # CPU Frequency scaling | ||
4 | # | ||
5 | |||
6 | menu "CPU Frequency scaling" | ||
7 | |||
8 | source "drivers/cpufreq/Kconfig" | ||
9 | |||
10 | if CPU_FREQ | ||
11 | |||
12 | comment "CPUFreq processor drivers" | ||
13 | |||
14 | config IA64_ACPI_CPUFREQ | ||
15 | tristate "ACPI Processor P-States driver" | ||
16 | select CPU_FREQ_TABLE | ||
17 | depends on ACPI_PROCESSOR | ||
18 | help | ||
19 | This driver adds a CPUFreq driver which utilizes the ACPI | ||
20 | Processor Performance States. | ||
21 | |||
22 | For details, take a look at <file:Documentation/cpu-freq/>. | ||
23 | |||
24 | If in doubt, say N. | ||
25 | |||
26 | endif # CPU_FREQ | ||
27 | |||
28 | endmenu | ||
29 | |||
diff --git a/arch/ia64/kernel/cpufreq/Makefile b/arch/ia64/kernel/cpufreq/Makefile new file mode 100644 index 000000000000..f748d34c02f0 --- /dev/null +++ b/arch/ia64/kernel/cpufreq/Makefile | |||
@@ -0,0 +1 @@ | |||
obj-$(CONFIG_IA64_ACPI_CPUFREQ) += acpi-cpufreq.o | |||
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c new file mode 100644 index 000000000000..da4d5cf80a48 --- /dev/null +++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c | |||
@@ -0,0 +1,499 @@ | |||
1 | /* | ||
2 | * arch/ia64/kernel/cpufreq/acpi-cpufreq.c | ||
3 | * This file provides the ACPI based P-state support. This | ||
4 | * module works with generic cpufreq infrastructure. Most of | ||
5 | * the code is based on i386 version | ||
6 | * (arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c) | ||
7 | * | ||
8 | * Copyright (C) 2005 Intel Corp | ||
9 | * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | ||
10 | */ | ||
11 | |||
12 | #include <linux/config.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/cpufreq.h> | ||
17 | #include <linux/proc_fs.h> | ||
18 | #include <linux/seq_file.h> | ||
19 | #include <asm/io.h> | ||
20 | #include <asm/uaccess.h> | ||
21 | #include <asm/pal.h> | ||
22 | |||
23 | #include <linux/acpi.h> | ||
24 | #include <acpi/processor.h> | ||
25 | |||
26 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) | ||
27 | |||
28 | MODULE_AUTHOR("Venkatesh Pallipadi"); | ||
29 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | ||
30 | MODULE_LICENSE("GPL"); | ||
31 | |||
32 | |||
33 | struct cpufreq_acpi_io { | ||
34 | struct acpi_processor_performance acpi_data; | ||
35 | struct cpufreq_frequency_table *freq_table; | ||
36 | unsigned int resume; | ||
37 | }; | ||
38 | |||
39 | static struct cpufreq_acpi_io *acpi_io_data[NR_CPUS]; | ||
40 | |||
41 | static struct cpufreq_driver acpi_cpufreq_driver; | ||
42 | |||
43 | |||
44 | static int | ||
45 | processor_set_pstate ( | ||
46 | u32 value) | ||
47 | { | ||
48 | s64 retval; | ||
49 | |||
50 | dprintk("processor_set_pstate\n"); | ||
51 | |||
52 | retval = ia64_pal_set_pstate((u64)value); | ||
53 | |||
54 | if (retval) { | ||
55 | dprintk("Failed to set freq to 0x%x, with error 0x%x\n", | ||
56 | value, retval); | ||
57 | return -ENODEV; | ||
58 | } | ||
59 | return (int)retval; | ||
60 | } | ||
61 | |||
62 | |||
63 | static int | ||
64 | processor_get_pstate ( | ||
65 | u32 *value) | ||
66 | { | ||
67 | u64 pstate_index = 0; | ||
68 | s64 retval; | ||
69 | |||
70 | dprintk("processor_get_pstate\n"); | ||
71 | |||
72 | retval = ia64_pal_get_pstate(&pstate_index); | ||
73 | *value = (u32) pstate_index; | ||
74 | |||
75 | if (retval) | ||
76 | dprintk("Failed to get current freq with " | ||
77 | "error 0x%x, idx 0x%x\n", retval, *value); | ||
78 | |||
79 | return (int)retval; | ||
80 | } | ||
81 | |||
82 | |||
83 | /* To be used only after data->acpi_data is initialized */ | ||
84 | static unsigned | ||
85 | extract_clock ( | ||
86 | struct cpufreq_acpi_io *data, | ||
87 | unsigned value, | ||
88 | unsigned int cpu) | ||
89 | { | ||
90 | unsigned long i; | ||
91 | |||
92 | dprintk("extract_clock\n"); | ||
93 | |||
94 | for (i = 0; i < data->acpi_data.state_count; i++) { | ||
95 | if (value >= data->acpi_data.states[i].control) | ||
96 | return data->acpi_data.states[i].core_frequency; | ||
97 | } | ||
98 | return data->acpi_data.states[i-1].core_frequency; | ||
99 | } | ||
100 | |||
101 | |||
102 | static unsigned int | ||
103 | processor_get_freq ( | ||
104 | struct cpufreq_acpi_io *data, | ||
105 | unsigned int cpu) | ||
106 | { | ||
107 | int ret = 0; | ||
108 | u32 value = 0; | ||
109 | cpumask_t saved_mask; | ||
110 | unsigned long clock_freq; | ||
111 | |||
112 | dprintk("processor_get_freq\n"); | ||
113 | |||
114 | saved_mask = current->cpus_allowed; | ||
115 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | ||
116 | if (smp_processor_id() != cpu) { | ||
117 | ret = -EAGAIN; | ||
118 | goto migrate_end; | ||
119 | } | ||
120 | |||
121 | /* | ||
122 | * processor_get_pstate gets the average frequency since the | ||
123 | * last get. So, do two PAL_get_freq()... | ||
124 | */ | ||
125 | ret = processor_get_pstate(&value); | ||
126 | ret = processor_get_pstate(&value); | ||
127 | |||
128 | if (ret) { | ||
129 | set_cpus_allowed(current, saved_mask); | ||
130 | printk(KERN_WARNING "get performance failed with error %d\n", | ||
131 | ret); | ||
132 | ret = -EAGAIN; | ||
133 | goto migrate_end; | ||
134 | } | ||
135 | clock_freq = extract_clock(data, value, cpu); | ||
136 | ret = (clock_freq*1000); | ||
137 | |||
138 | migrate_end: | ||
139 | set_cpus_allowed(current, saved_mask); | ||
140 | return ret; | ||
141 | } | ||
142 | |||
143 | |||
144 | static int | ||
145 | processor_set_freq ( | ||
146 | struct cpufreq_acpi_io *data, | ||
147 | unsigned int cpu, | ||
148 | int state) | ||
149 | { | ||
150 | int ret = 0; | ||
151 | u32 value = 0; | ||
152 | struct cpufreq_freqs cpufreq_freqs; | ||
153 | cpumask_t saved_mask; | ||
154 | int retval; | ||
155 | |||
156 | dprintk("processor_set_freq\n"); | ||
157 | |||
158 | saved_mask = current->cpus_allowed; | ||
159 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | ||
160 | if (smp_processor_id() != cpu) { | ||
161 | retval = -EAGAIN; | ||
162 | goto migrate_end; | ||
163 | } | ||
164 | |||
165 | if (state == data->acpi_data.state) { | ||
166 | if (unlikely(data->resume)) { | ||
167 | dprintk("Called after resume, resetting to P%d\n", state); | ||
168 | data->resume = 0; | ||
169 | } else { | ||
170 | dprintk("Already at target state (P%d)\n", state); | ||
171 | retval = 0; | ||
172 | goto migrate_end; | ||
173 | } | ||
174 | } | ||
175 | |||
176 | dprintk("Transitioning from P%d to P%d\n", | ||
177 | data->acpi_data.state, state); | ||
178 | |||
179 | /* cpufreq frequency struct */ | ||
180 | cpufreq_freqs.cpu = cpu; | ||
181 | cpufreq_freqs.old = data->freq_table[data->acpi_data.state].frequency; | ||
182 | cpufreq_freqs.new = data->freq_table[state].frequency; | ||
183 | |||
184 | /* notify cpufreq */ | ||
185 | cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE); | ||
186 | |||
187 | /* | ||
188 | * First we write the target state's 'control' value to the | ||
189 | * control_register. | ||
190 | */ | ||
191 | |||
192 | value = (u32) data->acpi_data.states[state].control; | ||
193 | |||
194 | dprintk("Transitioning to state: 0x%08x\n", value); | ||
195 | |||
196 | ret = processor_set_pstate(value); | ||
197 | if (ret) { | ||
198 | unsigned int tmp = cpufreq_freqs.new; | ||
199 | cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE); | ||
200 | cpufreq_freqs.new = cpufreq_freqs.old; | ||
201 | cpufreq_freqs.old = tmp; | ||
202 | cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE); | ||
203 | cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE); | ||
204 | printk(KERN_WARNING "Transition failed with error %d\n", ret); | ||
205 | retval = -ENODEV; | ||
206 | goto migrate_end; | ||
207 | } | ||
208 | |||
209 | cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE); | ||
210 | |||
211 | data->acpi_data.state = state; | ||
212 | |||
213 | retval = 0; | ||
214 | |||
215 | migrate_end: | ||
216 | set_cpus_allowed(current, saved_mask); | ||
217 | return (retval); | ||
218 | } | ||
219 | |||
220 | |||
221 | static unsigned int | ||
222 | acpi_cpufreq_get ( | ||
223 | unsigned int cpu) | ||
224 | { | ||
225 | struct cpufreq_acpi_io *data = acpi_io_data[cpu]; | ||
226 | |||
227 | dprintk("acpi_cpufreq_get\n"); | ||
228 | |||
229 | return processor_get_freq(data, cpu); | ||
230 | } | ||
231 | |||
232 | |||
233 | static int | ||
234 | acpi_cpufreq_target ( | ||
235 | struct cpufreq_policy *policy, | ||
236 | unsigned int target_freq, | ||
237 | unsigned int relation) | ||
238 | { | ||
239 | struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu]; | ||
240 | unsigned int next_state = 0; | ||
241 | unsigned int result = 0; | ||
242 | |||
243 | dprintk("acpi_cpufreq_setpolicy\n"); | ||
244 | |||
245 | result = cpufreq_frequency_table_target(policy, | ||
246 | data->freq_table, target_freq, relation, &next_state); | ||
247 | if (result) | ||
248 | return (result); | ||
249 | |||
250 | result = processor_set_freq(data, policy->cpu, next_state); | ||
251 | |||
252 | return (result); | ||
253 | } | ||
254 | |||
255 | |||
256 | static int | ||
257 | acpi_cpufreq_verify ( | ||
258 | struct cpufreq_policy *policy) | ||
259 | { | ||
260 | unsigned int result = 0; | ||
261 | struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu]; | ||
262 | |||
263 | dprintk("acpi_cpufreq_verify\n"); | ||
264 | |||
265 | result = cpufreq_frequency_table_verify(policy, | ||
266 | data->freq_table); | ||
267 | |||
268 | return (result); | ||
269 | } | ||
270 | |||
271 | |||
272 | /* | ||
273 | * processor_init_pdc - let BIOS know about the SMP capabilities | ||
274 | * of this driver | ||
275 | * @perf: processor-specific acpi_io_data struct | ||
276 | * @cpu: CPU being initialized | ||
277 | * | ||
278 | * To avoid issues with legacy OSes, some BIOSes require to be informed of | ||
279 | * the SMP capabilities of OS P-state driver. Here we set the bits in _PDC | ||
280 | * accordingly. Actual call to _PDC is done in driver/acpi/processor.c | ||
281 | */ | ||
282 | static void | ||
283 | processor_init_pdc ( | ||
284 | struct acpi_processor_performance *perf, | ||
285 | unsigned int cpu, | ||
286 | struct acpi_object_list *obj_list | ||
287 | ) | ||
288 | { | ||
289 | union acpi_object *obj; | ||
290 | u32 *buf; | ||
291 | |||
292 | dprintk("processor_init_pdc\n"); | ||
293 | |||
294 | perf->pdc = NULL; | ||
295 | /* Initialize pdc. It will be used later. */ | ||
296 | if (!obj_list) | ||
297 | return; | ||
298 | |||
299 | if (!(obj_list->count && obj_list->pointer)) | ||
300 | return; | ||
301 | |||
302 | obj = obj_list->pointer; | ||
303 | if ((obj->buffer.length == 12) && obj->buffer.pointer) { | ||
304 | buf = (u32 *)obj->buffer.pointer; | ||
305 | buf[0] = ACPI_PDC_REVISION_ID; | ||
306 | buf[1] = 1; | ||
307 | buf[2] = ACPI_PDC_EST_CAPABILITY_SMP; | ||
308 | perf->pdc = obj_list; | ||
309 | } | ||
310 | return; | ||
311 | } | ||
312 | |||
313 | |||
314 | static int | ||
315 | acpi_cpufreq_cpu_init ( | ||
316 | struct cpufreq_policy *policy) | ||
317 | { | ||
318 | unsigned int i; | ||
319 | unsigned int cpu = policy->cpu; | ||
320 | struct cpufreq_acpi_io *data; | ||
321 | unsigned int result = 0; | ||
322 | |||
323 | union acpi_object arg0 = {ACPI_TYPE_BUFFER}; | ||
324 | u32 arg0_buf[3]; | ||
325 | struct acpi_object_list arg_list = {1, &arg0}; | ||
326 | |||
327 | dprintk("acpi_cpufreq_cpu_init\n"); | ||
328 | /* setup arg_list for _PDC settings */ | ||
329 | arg0.buffer.length = 12; | ||
330 | arg0.buffer.pointer = (u8 *) arg0_buf; | ||
331 | |||
332 | data = kmalloc(sizeof(struct cpufreq_acpi_io), GFP_KERNEL); | ||
333 | if (!data) | ||
334 | return (-ENOMEM); | ||
335 | |||
336 | memset(data, 0, sizeof(struct cpufreq_acpi_io)); | ||
337 | |||
338 | acpi_io_data[cpu] = data; | ||
339 | |||
340 | processor_init_pdc(&data->acpi_data, cpu, &arg_list); | ||
341 | result = acpi_processor_register_performance(&data->acpi_data, cpu); | ||
342 | data->acpi_data.pdc = NULL; | ||
343 | |||
344 | if (result) | ||
345 | goto err_free; | ||
346 | |||
347 | /* capability check */ | ||
348 | if (data->acpi_data.state_count <= 1) { | ||
349 | dprintk("No P-States\n"); | ||
350 | result = -ENODEV; | ||
351 | goto err_unreg; | ||
352 | } | ||
353 | |||
354 | if ((data->acpi_data.control_register.space_id != | ||
355 | ACPI_ADR_SPACE_FIXED_HARDWARE) || | ||
356 | (data->acpi_data.status_register.space_id != | ||
357 | ACPI_ADR_SPACE_FIXED_HARDWARE)) { | ||
358 | dprintk("Unsupported address space [%d, %d]\n", | ||
359 | (u32) (data->acpi_data.control_register.space_id), | ||
360 | (u32) (data->acpi_data.status_register.space_id)); | ||
361 | result = -ENODEV; | ||
362 | goto err_unreg; | ||
363 | } | ||
364 | |||
365 | /* alloc freq_table */ | ||
366 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * | ||
367 | (data->acpi_data.state_count + 1), | ||
368 | GFP_KERNEL); | ||
369 | if (!data->freq_table) { | ||
370 | result = -ENOMEM; | ||
371 | goto err_unreg; | ||
372 | } | ||
373 | |||
374 | /* detect transition latency */ | ||
375 | policy->cpuinfo.transition_latency = 0; | ||
376 | for (i=0; i<data->acpi_data.state_count; i++) { | ||
377 | if ((data->acpi_data.states[i].transition_latency * 1000) > | ||
378 | policy->cpuinfo.transition_latency) { | ||
379 | policy->cpuinfo.transition_latency = | ||
380 | data->acpi_data.states[i].transition_latency * 1000; | ||
381 | } | ||
382 | } | ||
383 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
384 | |||
385 | policy->cur = processor_get_freq(data, policy->cpu); | ||
386 | |||
387 | /* table init */ | ||
388 | for (i = 0; i <= data->acpi_data.state_count; i++) | ||
389 | { | ||
390 | data->freq_table[i].index = i; | ||
391 | if (i < data->acpi_data.state_count) { | ||
392 | data->freq_table[i].frequency = | ||
393 | data->acpi_data.states[i].core_frequency * 1000; | ||
394 | } else { | ||
395 | data->freq_table[i].frequency = CPUFREQ_TABLE_END; | ||
396 | } | ||
397 | } | ||
398 | |||
399 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | ||
400 | if (result) { | ||
401 | goto err_freqfree; | ||
402 | } | ||
403 | |||
404 | /* notify BIOS that we exist */ | ||
405 | acpi_processor_notify_smm(THIS_MODULE); | ||
406 | |||
407 | printk(KERN_INFO "acpi-cpufreq: CPU%u - ACPI performance management " | ||
408 | "activated.\n", cpu); | ||
409 | |||
410 | for (i = 0; i < data->acpi_data.state_count; i++) | ||
411 | dprintk(" %cP%d: %d MHz, %d mW, %d uS, %d uS, 0x%x 0x%x\n", | ||
412 | (i == data->acpi_data.state?'*':' '), i, | ||
413 | (u32) data->acpi_data.states[i].core_frequency, | ||
414 | (u32) data->acpi_data.states[i].power, | ||
415 | (u32) data->acpi_data.states[i].transition_latency, | ||
416 | (u32) data->acpi_data.states[i].bus_master_latency, | ||
417 | (u32) data->acpi_data.states[i].status, | ||
418 | (u32) data->acpi_data.states[i].control); | ||
419 | |||
420 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | ||
421 | |||
422 | /* the first call to ->target() should result in us actually | ||
423 | * writing something to the appropriate registers. */ | ||
424 | data->resume = 1; | ||
425 | |||
426 | return (result); | ||
427 | |||
428 | err_freqfree: | ||
429 | kfree(data->freq_table); | ||
430 | err_unreg: | ||
431 | acpi_processor_unregister_performance(&data->acpi_data, cpu); | ||
432 | err_free: | ||
433 | kfree(data); | ||
434 | acpi_io_data[cpu] = NULL; | ||
435 | |||
436 | return (result); | ||
437 | } | ||
438 | |||
439 | |||
440 | static int | ||
441 | acpi_cpufreq_cpu_exit ( | ||
442 | struct cpufreq_policy *policy) | ||
443 | { | ||
444 | struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu]; | ||
445 | |||
446 | dprintk("acpi_cpufreq_cpu_exit\n"); | ||
447 | |||
448 | if (data) { | ||
449 | cpufreq_frequency_table_put_attr(policy->cpu); | ||
450 | acpi_io_data[policy->cpu] = NULL; | ||
451 | acpi_processor_unregister_performance(&data->acpi_data, | ||
452 | policy->cpu); | ||
453 | kfree(data); | ||
454 | } | ||
455 | |||
456 | return (0); | ||
457 | } | ||
458 | |||
459 | |||
460 | static struct freq_attr* acpi_cpufreq_attr[] = { | ||
461 | &cpufreq_freq_attr_scaling_available_freqs, | ||
462 | NULL, | ||
463 | }; | ||
464 | |||
465 | |||
466 | static struct cpufreq_driver acpi_cpufreq_driver = { | ||
467 | .verify = acpi_cpufreq_verify, | ||
468 | .target = acpi_cpufreq_target, | ||
469 | .get = acpi_cpufreq_get, | ||
470 | .init = acpi_cpufreq_cpu_init, | ||
471 | .exit = acpi_cpufreq_cpu_exit, | ||
472 | .name = "acpi-cpufreq", | ||
473 | .owner = THIS_MODULE, | ||
474 | .attr = acpi_cpufreq_attr, | ||
475 | }; | ||
476 | |||
477 | |||
478 | static int __init | ||
479 | acpi_cpufreq_init (void) | ||
480 | { | ||
481 | dprintk("acpi_cpufreq_init\n"); | ||
482 | |||
483 | return cpufreq_register_driver(&acpi_cpufreq_driver); | ||
484 | } | ||
485 | |||
486 | |||
487 | static void __exit | ||
488 | acpi_cpufreq_exit (void) | ||
489 | { | ||
490 | dprintk("acpi_cpufreq_exit\n"); | ||
491 | |||
492 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | ||
493 | return; | ||
494 | } | ||
495 | |||
496 | |||
497 | late_initcall(acpi_cpufreq_init); | ||
498 | module_exit(acpi_cpufreq_exit); | ||
499 | |||
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c index 770fab37928e..f2dbcd1db0d4 100644 --- a/arch/ia64/kernel/sys_ia64.c +++ b/arch/ia64/kernel/sys_ia64.c | |||
@@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len | |||
35 | return -ENOMEM; | 35 | return -ENOMEM; |
36 | 36 | ||
37 | #ifdef CONFIG_HUGETLB_PAGE | 37 | #ifdef CONFIG_HUGETLB_PAGE |
38 | if (REGION_NUMBER(addr) == REGION_HPAGE) | 38 | if (REGION_NUMBER(addr) == RGN_HPAGE) |
39 | addr = 0; | 39 | addr = 0; |
40 | #endif | 40 | #endif |
41 | if (!addr) | 41 | if (!addr) |
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c index 490dfc9ab47f..4e9d06c48a8b 100644 --- a/arch/ia64/kernel/uncached.c +++ b/arch/ia64/kernel/uncached.c | |||
@@ -184,7 +184,7 @@ uncached_free_page(unsigned long maddr) | |||
184 | { | 184 | { |
185 | int node; | 185 | int node; |
186 | 186 | ||
187 | node = nasid_to_cnodeid(NASID_GET(maddr)); | 187 | node = paddr_to_nid(maddr - __IA64_UNCACHED_OFFSET); |
188 | 188 | ||
189 | dprintk(KERN_DEBUG "uncached_free_page(%lx) on node %i\n", maddr, node); | 189 | dprintk(KERN_DEBUG "uncached_free_page(%lx) on node %i\n", maddr, node); |
190 | 190 | ||
@@ -217,7 +217,7 @@ uncached_build_memmap(unsigned long start, unsigned long end, void *arg) | |||
217 | 217 | ||
218 | memset((char *)vstart, 0, length); | 218 | memset((char *)vstart, 0, length); |
219 | 219 | ||
220 | node = nasid_to_cnodeid(NASID_GET(start)); | 220 | node = paddr_to_nid(start); |
221 | 221 | ||
222 | for (; vstart < vend ; vstart += PAGE_SIZE) { | 222 | for (; vstart < vend ; vstart += PAGE_SIZE) { |
223 | dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart); | 223 | dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart); |
diff --git a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile index 1902c3c2ef92..799407e7726f 100644 --- a/arch/ia64/lib/Makefile +++ b/arch/ia64/lib/Makefile | |||
@@ -6,7 +6,7 @@ obj-y := io.o | |||
6 | 6 | ||
7 | lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ | 7 | lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ |
8 | __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o \ | 8 | __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o \ |
9 | bitop.o checksum.o clear_page.o csum_partial_copy.o copy_page.o \ | 9 | bitop.o checksum.o clear_page.o csum_partial_copy.o \ |
10 | clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ | 10 | clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ |
11 | flush.o ip_fast_csum.o do_csum.o \ | 11 | flush.o ip_fast_csum.o do_csum.o \ |
12 | memset.o strlen.o swiotlb.o | 12 | memset.o strlen.o swiotlb.o |
diff --git a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c index ab7b3ad99a7f..dbc0b3e449c5 100644 --- a/arch/ia64/lib/swiotlb.c +++ b/arch/ia64/lib/swiotlb.c | |||
@@ -93,8 +93,7 @@ static int __init | |||
93 | setup_io_tlb_npages(char *str) | 93 | setup_io_tlb_npages(char *str) |
94 | { | 94 | { |
95 | if (isdigit(*str)) { | 95 | if (isdigit(*str)) { |
96 | io_tlb_nslabs = simple_strtoul(str, &str, 0) << | 96 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
97 | (PAGE_SHIFT - IO_TLB_SHIFT); | ||
98 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | 97 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
99 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | 98 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
100 | } | 99 | } |
@@ -117,7 +116,7 @@ swiotlb_init_with_default_size (size_t default_size) | |||
117 | unsigned long i; | 116 | unsigned long i; |
118 | 117 | ||
119 | if (!io_tlb_nslabs) { | 118 | if (!io_tlb_nslabs) { |
120 | io_tlb_nslabs = (default_size >> PAGE_SHIFT); | 119 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
121 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | 120 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
122 | } | 121 | } |
123 | 122 | ||
diff --git a/arch/ia64/mm/hugetlbpage.c b/arch/ia64/mm/hugetlbpage.c index e0a776a3044c..2d13889d0a99 100644 --- a/arch/ia64/mm/hugetlbpage.c +++ b/arch/ia64/mm/hugetlbpage.c | |||
@@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len) | |||
76 | return -EINVAL; | 76 | return -EINVAL; |
77 | if (addr & ~HPAGE_MASK) | 77 | if (addr & ~HPAGE_MASK) |
78 | return -EINVAL; | 78 | return -EINVAL; |
79 | if (REGION_NUMBER(addr) != REGION_HPAGE) | 79 | if (REGION_NUMBER(addr) != RGN_HPAGE) |
80 | return -EINVAL; | 80 | return -EINVAL; |
81 | 81 | ||
82 | return 0; | 82 | return 0; |
@@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ | |||
87 | struct page *page; | 87 | struct page *page; |
88 | pte_t *ptep; | 88 | pte_t *ptep; |
89 | 89 | ||
90 | if (REGION_NUMBER(addr) != REGION_HPAGE) | 90 | if (REGION_NUMBER(addr) != RGN_HPAGE) |
91 | return ERR_PTR(-EINVAL); | 91 | return ERR_PTR(-EINVAL); |
92 | 92 | ||
93 | ptep = huge_pte_offset(mm, addr); | 93 | ptep = huge_pte_offset(mm, addr); |
@@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u | |||
142 | return -ENOMEM; | 142 | return -ENOMEM; |
143 | if (len & ~HPAGE_MASK) | 143 | if (len & ~HPAGE_MASK) |
144 | return -EINVAL; | 144 | return -EINVAL; |
145 | /* This code assumes that REGION_HPAGE != 0. */ | 145 | /* This code assumes that RGN_HPAGE != 0. */ |
146 | if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1))) | 146 | if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1))) |
147 | addr = HPAGE_REGION_BASE; | 147 | addr = HPAGE_REGION_BASE; |
148 | else | 148 | else |
149 | addr = ALIGN(addr, HPAGE_SIZE); | 149 | addr = ALIGN(addr, HPAGE_SIZE); |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index f9472c50ab42..9977c122e9fa 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -24,7 +24,6 @@ | |||
24 | 24 | ||
25 | #include <asm/machvec.h> | 25 | #include <asm/machvec.h> |
26 | #include <asm/page.h> | 26 | #include <asm/page.h> |
27 | #include <asm/segment.h> | ||
28 | #include <asm/system.h> | 27 | #include <asm/system.h> |
29 | #include <asm/io.h> | 28 | #include <asm/io.h> |
30 | #include <asm/sal.h> | 29 | #include <asm/sal.h> |
diff --git a/arch/ia64/sn/include/tio.h b/arch/ia64/sn/include/tio.h index 0139124dd54a..6b2e7b75eb19 100644 --- a/arch/ia64/sn/include/tio.h +++ b/arch/ia64/sn/include/tio.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef _ASM_IA64_SN_TIO_H | 9 | #ifndef _ASM_IA64_SN_TIO_H |
@@ -26,6 +26,10 @@ | |||
26 | #define TIO_ITTE_VALID_MASK 0x1 | 26 | #define TIO_ITTE_VALID_MASK 0x1 |
27 | #define TIO_ITTE_VALID_SHIFT 16 | 27 | #define TIO_ITTE_VALID_SHIFT 16 |
28 | 28 | ||
29 | #define TIO_ITTE_WIDGET(itte) \ | ||
30 | (((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK) | ||
31 | #define TIO_ITTE_VALID(itte) \ | ||
32 | (((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK) | ||
29 | 33 | ||
30 | #define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \ | 34 | #define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \ |
31 | REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \ | 35 | REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \ |
diff --git a/arch/ia64/sn/include/xtalk/hubdev.h b/arch/ia64/sn/include/xtalk/hubdev.h index 580a1c0403a7..71c2b271b4c6 100644 --- a/arch/ia64/sn/include/xtalk/hubdev.h +++ b/arch/ia64/sn/include/xtalk/hubdev.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | #ifndef _ASM_IA64_SN_XTALK_HUBDEV_H | 8 | #ifndef _ASM_IA64_SN_XTALK_HUBDEV_H |
9 | #define _ASM_IA64_SN_XTALK_HUBDEV_H | 9 | #define _ASM_IA64_SN_XTALK_HUBDEV_H |
@@ -16,6 +16,9 @@ | |||
16 | #define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1) | 16 | #define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1) |
17 | #define IIO_ITTE_WIDGET_SHIFT 8 | 17 | #define IIO_ITTE_WIDGET_SHIFT 8 |
18 | 18 | ||
19 | #define IIO_ITTE_WIDGET(itte) \ | ||
20 | (((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK) | ||
21 | |||
19 | /* | 22 | /* |
20 | * Use the top big window as a surrogate for the first small window | 23 | * Use the top big window as a surrogate for the first small window |
21 | */ | 24 | */ |
@@ -34,7 +37,8 @@ struct sn_flush_device_list { | |||
34 | unsigned long sfdl_force_int_addr; | 37 | unsigned long sfdl_force_int_addr; |
35 | unsigned long sfdl_flush_value; | 38 | unsigned long sfdl_flush_value; |
36 | volatile unsigned long *sfdl_flush_addr; | 39 | volatile unsigned long *sfdl_flush_addr; |
37 | uint64_t sfdl_persistent_busnum; | 40 | uint32_t sfdl_persistent_busnum; |
41 | uint32_t sfdl_persistent_segment; | ||
38 | struct pcibus_info *sfdl_pcibus_info; | 42 | struct pcibus_info *sfdl_pcibus_info; |
39 | spinlock_t sfdl_flush_lock; | 43 | spinlock_t sfdl_flush_lock; |
40 | }; | 44 | }; |
@@ -58,7 +62,8 @@ struct hubdev_info { | |||
58 | 62 | ||
59 | void *hdi_nodepda; | 63 | void *hdi_nodepda; |
60 | void *hdi_node_vertex; | 64 | void *hdi_node_vertex; |
61 | void *hdi_xtalk_vertex; | 65 | uint32_t max_segment_number; |
66 | uint32_t max_pcibus_number; | ||
62 | }; | 67 | }; |
63 | 68 | ||
64 | extern void hubdev_init_node(nodepda_t *, cnodeid_t); | 69 | extern void hubdev_init_node(nodepda_t *, cnodeid_t); |
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c index 647deae9bfcd..45854c637e9c 100644 --- a/arch/ia64/sn/kernel/bte.c +++ b/arch/ia64/sn/kernel/bte.c | |||
@@ -29,16 +29,30 @@ | |||
29 | 29 | ||
30 | /* two interfaces on two btes */ | 30 | /* two interfaces on two btes */ |
31 | #define MAX_INTERFACES_TO_TRY 4 | 31 | #define MAX_INTERFACES_TO_TRY 4 |
32 | #define MAX_NODES_TO_TRY 2 | ||
32 | 33 | ||
33 | static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface) | 34 | static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface) |
34 | { | 35 | { |
35 | nodepda_t *tmp_nodepda; | 36 | nodepda_t *tmp_nodepda; |
36 | 37 | ||
38 | if (nasid_to_cnodeid(nasid) == -1) | ||
39 | return (struct bteinfo_s *)NULL;; | ||
40 | |||
37 | tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid)); | 41 | tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid)); |
38 | return &tmp_nodepda->bte_if[interface]; | 42 | return &tmp_nodepda->bte_if[interface]; |
39 | 43 | ||
40 | } | 44 | } |
41 | 45 | ||
46 | static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode) | ||
47 | { | ||
48 | if (is_shub2()) { | ||
49 | BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24))); | ||
50 | } else { | ||
51 | BTE_LNSTAT_STORE(bte, len); | ||
52 | BTE_CTRL_STORE(bte, mode); | ||
53 | } | ||
54 | } | ||
55 | |||
42 | /************************************************************************ | 56 | /************************************************************************ |
43 | * Block Transfer Engine copy related functions. | 57 | * Block Transfer Engine copy related functions. |
44 | * | 58 | * |
@@ -67,13 +81,15 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) | |||
67 | { | 81 | { |
68 | u64 transfer_size; | 82 | u64 transfer_size; |
69 | u64 transfer_stat; | 83 | u64 transfer_stat; |
84 | u64 notif_phys_addr; | ||
70 | struct bteinfo_s *bte; | 85 | struct bteinfo_s *bte; |
71 | bte_result_t bte_status; | 86 | bte_result_t bte_status; |
72 | unsigned long irq_flags; | 87 | unsigned long irq_flags; |
73 | unsigned long itc_end = 0; | 88 | unsigned long itc_end = 0; |
74 | struct bteinfo_s *btes_to_try[MAX_INTERFACES_TO_TRY]; | 89 | int nasid_to_try[MAX_NODES_TO_TRY]; |
75 | int bte_if_index; | 90 | int my_nasid = get_nasid(); |
76 | int bte_pri, bte_sec; | 91 | int bte_if_index, nasid_index; |
92 | int bte_first, btes_per_node = BTES_PER_NODE; | ||
77 | 93 | ||
78 | BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n", | 94 | BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n", |
79 | src, dest, len, mode, notification)); | 95 | src, dest, len, mode, notification)); |
@@ -86,36 +102,26 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) | |||
86 | (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); | 102 | (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); |
87 | BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); | 103 | BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); |
88 | 104 | ||
89 | /* CPU 0 (per node) tries bte0 first, CPU 1 try bte1 first */ | 105 | /* |
90 | if (cpuid_to_subnode(smp_processor_id()) == 0) { | 106 | * Start with interface corresponding to cpu number |
91 | bte_pri = 0; | 107 | */ |
92 | bte_sec = 1; | 108 | bte_first = raw_smp_processor_id() % btes_per_node; |
93 | } else { | ||
94 | bte_pri = 1; | ||
95 | bte_sec = 0; | ||
96 | } | ||
97 | 109 | ||
98 | if (mode & BTE_USE_DEST) { | 110 | if (mode & BTE_USE_DEST) { |
99 | /* try remote then local */ | 111 | /* try remote then local */ |
100 | btes_to_try[0] = bte_if_on_node(NASID_GET(dest), bte_pri); | 112 | nasid_to_try[0] = NASID_GET(dest); |
101 | btes_to_try[1] = bte_if_on_node(NASID_GET(dest), bte_sec); | ||
102 | if (mode & BTE_USE_ANY) { | 113 | if (mode & BTE_USE_ANY) { |
103 | btes_to_try[2] = bte_if_on_node(get_nasid(), bte_pri); | 114 | nasid_to_try[1] = my_nasid; |
104 | btes_to_try[3] = bte_if_on_node(get_nasid(), bte_sec); | ||
105 | } else { | 115 | } else { |
106 | btes_to_try[2] = NULL; | 116 | nasid_to_try[1] = (int)NULL; |
107 | btes_to_try[3] = NULL; | ||
108 | } | 117 | } |
109 | } else { | 118 | } else { |
110 | /* try local then remote */ | 119 | /* try local then remote */ |
111 | btes_to_try[0] = bte_if_on_node(get_nasid(), bte_pri); | 120 | nasid_to_try[0] = my_nasid; |
112 | btes_to_try[1] = bte_if_on_node(get_nasid(), bte_sec); | ||
113 | if (mode & BTE_USE_ANY) { | 121 | if (mode & BTE_USE_ANY) { |
114 | btes_to_try[2] = bte_if_on_node(NASID_GET(dest), bte_pri); | 122 | nasid_to_try[1] = NASID_GET(dest); |
115 | btes_to_try[3] = bte_if_on_node(NASID_GET(dest), bte_sec); | ||
116 | } else { | 123 | } else { |
117 | btes_to_try[2] = NULL; | 124 | nasid_to_try[1] = (int)NULL; |
118 | btes_to_try[3] = NULL; | ||
119 | } | 125 | } |
120 | } | 126 | } |
121 | 127 | ||
@@ -123,11 +129,12 @@ retry_bteop: | |||
123 | do { | 129 | do { |
124 | local_irq_save(irq_flags); | 130 | local_irq_save(irq_flags); |
125 | 131 | ||
126 | bte_if_index = 0; | 132 | bte_if_index = bte_first; |
133 | nasid_index = 0; | ||
127 | 134 | ||
128 | /* Attempt to lock one of the BTE interfaces. */ | 135 | /* Attempt to lock one of the BTE interfaces. */ |
129 | while (bte_if_index < MAX_INTERFACES_TO_TRY) { | 136 | while (nasid_index < MAX_NODES_TO_TRY) { |
130 | bte = btes_to_try[bte_if_index++]; | 137 | bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index); |
131 | 138 | ||
132 | if (bte == NULL) { | 139 | if (bte == NULL) { |
133 | continue; | 140 | continue; |
@@ -143,6 +150,15 @@ retry_bteop: | |||
143 | break; | 150 | break; |
144 | } | 151 | } |
145 | } | 152 | } |
153 | |||
154 | bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */ | ||
155 | if (bte_if_index == bte_first) { | ||
156 | /* | ||
157 | * We've tried all interfaces on this node | ||
158 | */ | ||
159 | nasid_index++; | ||
160 | } | ||
161 | |||
146 | bte = NULL; | 162 | bte = NULL; |
147 | } | 163 | } |
148 | 164 | ||
@@ -169,7 +185,13 @@ retry_bteop: | |||
169 | 185 | ||
170 | /* Initialize the notification to a known value. */ | 186 | /* Initialize the notification to a known value. */ |
171 | *bte->most_rcnt_na = BTE_WORD_BUSY; | 187 | *bte->most_rcnt_na = BTE_WORD_BUSY; |
188 | notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)); | ||
172 | 189 | ||
190 | if (is_shub2()) { | ||
191 | src = SH2_TIO_PHYS_TO_DMA(src); | ||
192 | dest = SH2_TIO_PHYS_TO_DMA(dest); | ||
193 | notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr); | ||
194 | } | ||
173 | /* Set the source and destination registers */ | 195 | /* Set the source and destination registers */ |
174 | BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src)))); | 196 | BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src)))); |
175 | BTE_SRC_STORE(bte, TO_PHYS(src)); | 197 | BTE_SRC_STORE(bte, TO_PHYS(src)); |
@@ -177,14 +199,12 @@ retry_bteop: | |||
177 | BTE_DEST_STORE(bte, TO_PHYS(dest)); | 199 | BTE_DEST_STORE(bte, TO_PHYS(dest)); |
178 | 200 | ||
179 | /* Set the notification register */ | 201 | /* Set the notification register */ |
180 | BTE_PRINTKV(("IBNA = 0x%lx)\n", | 202 | BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr)); |
181 | TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)))); | 203 | BTE_NOTIF_STORE(bte, notif_phys_addr); |
182 | BTE_NOTIF_STORE(bte, | ||
183 | TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na))); | ||
184 | 204 | ||
185 | /* Initiate the transfer */ | 205 | /* Initiate the transfer */ |
186 | BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode))); | 206 | BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode))); |
187 | BTE_START_TRANSFER(bte, transfer_size, BTE_VALID_MODE(mode)); | 207 | bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode)); |
188 | 208 | ||
189 | itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec); | 209 | itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec); |
190 | 210 | ||
@@ -195,6 +215,7 @@ retry_bteop: | |||
195 | } | 215 | } |
196 | 216 | ||
197 | while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) { | 217 | while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) { |
218 | cpu_relax(); | ||
198 | if (ia64_get_itc() > itc_end) { | 219 | if (ia64_get_itc() > itc_end) { |
199 | BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n", | 220 | BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n", |
200 | NASID_GET(bte->bte_base_addr), bte->bte_num, | 221 | NASID_GET(bte->bte_base_addr), bte->bte_num, |
diff --git a/arch/ia64/sn/kernel/huberror.c b/arch/ia64/sn/kernel/huberror.c index 5c39b43ba3c0..5c5eb01c50f0 100644 --- a/arch/ia64/sn/kernel/huberror.c +++ b/arch/ia64/sn/kernel/huberror.c | |||
@@ -76,7 +76,7 @@ void hubiio_crb_free(struct hubdev_info *hubdev_info, int crbnum) | |||
76 | */ | 76 | */ |
77 | REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum)); | 77 | REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum)); |
78 | while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND) | 78 | while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND) |
79 | udelay(1); | 79 | cpu_relax(); |
80 | 80 | ||
81 | } | 81 | } |
82 | 82 | ||
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c index 414cdf2e3c96..4564ed0b5ff3 100644 --- a/arch/ia64/sn/kernel/io_init.c +++ b/arch/ia64/sn/kernel/io_init.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/sn/simulator.h> | 18 | #include <asm/sn/simulator.h> |
19 | #include <asm/sn/sn_sal.h> | 19 | #include <asm/sn/sn_sal.h> |
20 | #include <asm/sn/tioca_provider.h> | 20 | #include <asm/sn/tioca_provider.h> |
21 | #include <asm/sn/tioce_provider.h> | ||
21 | #include "xtalk/hubdev.h" | 22 | #include "xtalk/hubdev.h" |
22 | #include "xtalk/xwidgetdev.h" | 23 | #include "xtalk/xwidgetdev.h" |
23 | 24 | ||
@@ -44,6 +45,9 @@ int sn_ioif_inited = 0; /* SN I/O infrastructure initialized? */ | |||
44 | 45 | ||
45 | struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */ | 46 | struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */ |
46 | 47 | ||
48 | static int max_segment_number = 0; /* Default highest segment number */ | ||
49 | static int max_pcibus_number = 255; /* Default highest pci bus number */ | ||
50 | |||
47 | /* | 51 | /* |
48 | * Hooks and struct for unsupported pci providers | 52 | * Hooks and struct for unsupported pci providers |
49 | */ | 53 | */ |
@@ -157,13 +161,28 @@ static void sn_fixup_ionodes(void) | |||
157 | uint64_t nasid; | 161 | uint64_t nasid; |
158 | int i, widget; | 162 | int i, widget; |
159 | 163 | ||
164 | /* | ||
165 | * Get SGI Specific HUB chipset information. | ||
166 | * Inform Prom that this kernel can support domain bus numbering. | ||
167 | */ | ||
160 | for (i = 0; i < numionodes; i++) { | 168 | for (i = 0; i < numionodes; i++) { |
161 | hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); | 169 | hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); |
162 | nasid = cnodeid_to_nasid(i); | 170 | nasid = cnodeid_to_nasid(i); |
171 | hubdev->max_segment_number = 0xffffffff; | ||
172 | hubdev->max_pcibus_number = 0xff; | ||
163 | status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev)); | 173 | status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev)); |
164 | if (status) | 174 | if (status) |
165 | continue; | 175 | continue; |
166 | 176 | ||
177 | /* Save the largest Domain and pcibus numbers found. */ | ||
178 | if (hubdev->max_segment_number) { | ||
179 | /* | ||
180 | * Dealing with a Prom that supports segments. | ||
181 | */ | ||
182 | max_segment_number = hubdev->max_segment_number; | ||
183 | max_pcibus_number = hubdev->max_pcibus_number; | ||
184 | } | ||
185 | |||
167 | /* Attach the error interrupt handlers */ | 186 | /* Attach the error interrupt handlers */ |
168 | if (nasid & 1) | 187 | if (nasid & 1) |
169 | ice_error_init(hubdev); | 188 | ice_error_init(hubdev); |
@@ -230,7 +249,7 @@ void sn_pci_unfixup_slot(struct pci_dev *dev) | |||
230 | void sn_pci_fixup_slot(struct pci_dev *dev) | 249 | void sn_pci_fixup_slot(struct pci_dev *dev) |
231 | { | 250 | { |
232 | int idx; | 251 | int idx; |
233 | int segment = 0; | 252 | int segment = pci_domain_nr(dev->bus); |
234 | int status = 0; | 253 | int status = 0; |
235 | struct pcibus_bussoft *bs; | 254 | struct pcibus_bussoft *bs; |
236 | struct pci_bus *host_pci_bus; | 255 | struct pci_bus *host_pci_bus; |
@@ -283,9 +302,9 @@ void sn_pci_fixup_slot(struct pci_dev *dev) | |||
283 | * PCI host_pci_dev struct and set up host bus linkages | 302 | * PCI host_pci_dev struct and set up host bus linkages |
284 | */ | 303 | */ |
285 | 304 | ||
286 | bus_no = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32; | 305 | bus_no = (SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32) & 0xff; |
287 | devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff; | 306 | devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff; |
288 | host_pci_bus = pci_find_bus(pci_domain_nr(dev->bus), bus_no); | 307 | host_pci_bus = pci_find_bus(segment, bus_no); |
289 | host_pci_dev = pci_get_slot(host_pci_bus, devfn); | 308 | host_pci_dev = pci_get_slot(host_pci_bus, devfn); |
290 | 309 | ||
291 | SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev; | 310 | SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev; |
@@ -333,6 +352,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) | |||
333 | prom_bussoft_ptr = __va(prom_bussoft_ptr); | 352 | prom_bussoft_ptr = __va(prom_bussoft_ptr); |
334 | 353 | ||
335 | controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL); | 354 | controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL); |
355 | controller->segment = segment; | ||
336 | if (!controller) | 356 | if (!controller) |
337 | BUG(); | 357 | BUG(); |
338 | 358 | ||
@@ -390,7 +410,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) | |||
390 | if (controller->node >= num_online_nodes()) { | 410 | if (controller->node >= num_online_nodes()) { |
391 | struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); | 411 | struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); |
392 | 412 | ||
393 | printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%lu" | 413 | printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u" |
394 | "L_IO=%lx L_MEM=%lx BASE=%lx\n", | 414 | "L_IO=%lx L_MEM=%lx BASE=%lx\n", |
395 | b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, | 415 | b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, |
396 | b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); | 416 | b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); |
@@ -445,6 +465,7 @@ sn_sysdata_free_start: | |||
445 | static int __init sn_pci_init(void) | 465 | static int __init sn_pci_init(void) |
446 | { | 466 | { |
447 | int i = 0; | 467 | int i = 0; |
468 | int j = 0; | ||
448 | struct pci_dev *pci_dev = NULL; | 469 | struct pci_dev *pci_dev = NULL; |
449 | extern void sn_init_cpei_timer(void); | 470 | extern void sn_init_cpei_timer(void); |
450 | #ifdef CONFIG_PROC_FS | 471 | #ifdef CONFIG_PROC_FS |
@@ -464,6 +485,7 @@ static int __init sn_pci_init(void) | |||
464 | 485 | ||
465 | pcibr_init_provider(); | 486 | pcibr_init_provider(); |
466 | tioca_init_provider(); | 487 | tioca_init_provider(); |
488 | tioce_init_provider(); | ||
467 | 489 | ||
468 | /* | 490 | /* |
469 | * This is needed to avoid bounce limit checks in the blk layer | 491 | * This is needed to avoid bounce limit checks in the blk layer |
@@ -479,8 +501,9 @@ static int __init sn_pci_init(void) | |||
479 | #endif | 501 | #endif |
480 | 502 | ||
481 | /* busses are not known yet ... */ | 503 | /* busses are not known yet ... */ |
482 | for (i = 0; i < PCI_BUSES_TO_SCAN; i++) | 504 | for (i = 0; i <= max_segment_number; i++) |
483 | sn_pci_controller_fixup(0, i, NULL); | 505 | for (j = 0; j <= max_pcibus_number; j++) |
506 | sn_pci_controller_fixup(i, j, NULL); | ||
484 | 507 | ||
485 | /* | 508 | /* |
486 | * Generic Linux PCI Layer has created the pci_bus and pci_dev | 509 | * Generic Linux PCI Layer has created the pci_bus and pci_dev |
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 84d276a14ecb..9fc74631ba8a 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved. | 8 | * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/irq.h> | 11 | #include <linux/irq.h> |
@@ -76,16 +76,14 @@ static void sn_enable_irq(unsigned int irq) | |||
76 | 76 | ||
77 | static void sn_ack_irq(unsigned int irq) | 77 | static void sn_ack_irq(unsigned int irq) |
78 | { | 78 | { |
79 | uint64_t event_occurred, mask = 0; | 79 | u64 event_occurred, mask = 0; |
80 | int nasid; | ||
81 | 80 | ||
82 | irq = irq & 0xff; | 81 | irq = irq & 0xff; |
83 | nasid = get_nasid(); | ||
84 | event_occurred = | 82 | event_occurred = |
85 | HUB_L((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED)); | 83 | HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); |
86 | mask = event_occurred & SH_ALL_INT_MASK; | 84 | mask = event_occurred & SH_ALL_INT_MASK; |
87 | HUB_S((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED_ALIAS), | 85 | HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), |
88 | mask); | 86 | mask); |
89 | __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); | 87 | __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); |
90 | 88 | ||
91 | move_irq(irq); | 89 | move_irq(irq); |
@@ -93,15 +91,12 @@ static void sn_ack_irq(unsigned int irq) | |||
93 | 91 | ||
94 | static void sn_end_irq(unsigned int irq) | 92 | static void sn_end_irq(unsigned int irq) |
95 | { | 93 | { |
96 | int nasid; | ||
97 | int ivec; | 94 | int ivec; |
98 | uint64_t event_occurred; | 95 | u64 event_occurred; |
99 | 96 | ||
100 | ivec = irq & 0xff; | 97 | ivec = irq & 0xff; |
101 | if (ivec == SGI_UART_VECTOR) { | 98 | if (ivec == SGI_UART_VECTOR) { |
102 | nasid = get_nasid(); | 99 | event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED)); |
103 | event_occurred = HUB_L((uint64_t *) GLOBAL_MMR_ADDR | ||
104 | (nasid, SH_EVENT_OCCURRED)); | ||
105 | /* If the UART bit is set here, we may have received an | 100 | /* If the UART bit is set here, we may have received an |
106 | * interrupt from the UART that the driver missed. To | 101 | * interrupt from the UART that the driver missed. To |
107 | * make sure, we IPI ourselves to force us to look again. | 102 | * make sure, we IPI ourselves to force us to look again. |
@@ -132,6 +127,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) | |||
132 | int local_widget, status; | 127 | int local_widget, status; |
133 | nasid_t local_nasid; | 128 | nasid_t local_nasid; |
134 | struct sn_irq_info *new_irq_info; | 129 | struct sn_irq_info *new_irq_info; |
130 | struct sn_pcibus_provider *pci_provider; | ||
135 | 131 | ||
136 | new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC); | 132 | new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC); |
137 | if (new_irq_info == NULL) | 133 | if (new_irq_info == NULL) |
@@ -171,8 +167,9 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) | |||
171 | new_irq_info->irq_cpuid = cpuid; | 167 | new_irq_info->irq_cpuid = cpuid; |
172 | register_intr_pda(new_irq_info); | 168 | register_intr_pda(new_irq_info); |
173 | 169 | ||
174 | if (IS_PCI_BRIDGE_ASIC(new_irq_info->irq_bridge_type)) | 170 | pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type]; |
175 | pcibr_change_devices_irq(new_irq_info); | 171 | if (pci_provider && pci_provider->target_interrupt) |
172 | (pci_provider->target_interrupt)(new_irq_info); | ||
176 | 173 | ||
177 | spin_lock(&sn_irq_info_lock); | 174 | spin_lock(&sn_irq_info_lock); |
178 | list_replace_rcu(&sn_irq_info->list, &new_irq_info->list); | 175 | list_replace_rcu(&sn_irq_info->list, &new_irq_info->list); |
@@ -317,6 +314,16 @@ void sn_irq_unfixup(struct pci_dev *pci_dev) | |||
317 | pci_dev_put(pci_dev); | 314 | pci_dev_put(pci_dev); |
318 | } | 315 | } |
319 | 316 | ||
317 | static inline void | ||
318 | sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info) | ||
319 | { | ||
320 | struct sn_pcibus_provider *pci_provider; | ||
321 | |||
322 | pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; | ||
323 | if (pci_provider && pci_provider->force_interrupt) | ||
324 | (*pci_provider->force_interrupt)(sn_irq_info); | ||
325 | } | ||
326 | |||
320 | static void force_interrupt(int irq) | 327 | static void force_interrupt(int irq) |
321 | { | 328 | { |
322 | struct sn_irq_info *sn_irq_info; | 329 | struct sn_irq_info *sn_irq_info; |
@@ -325,11 +332,9 @@ static void force_interrupt(int irq) | |||
325 | return; | 332 | return; |
326 | 333 | ||
327 | rcu_read_lock(); | 334 | rcu_read_lock(); |
328 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) { | 335 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) |
329 | if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) && | 336 | sn_call_force_intr_provider(sn_irq_info); |
330 | (sn_irq_info->irq_bridge != NULL)) | 337 | |
331 | pcibr_force_interrupt(sn_irq_info); | ||
332 | } | ||
333 | rcu_read_unlock(); | 338 | rcu_read_unlock(); |
334 | } | 339 | } |
335 | 340 | ||
@@ -351,6 +356,14 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) | |||
351 | struct pcidev_info *pcidev_info; | 356 | struct pcidev_info *pcidev_info; |
352 | struct pcibus_info *pcibus_info; | 357 | struct pcibus_info *pcibus_info; |
353 | 358 | ||
359 | /* | ||
360 | * Bridge types attached to TIO (anything but PIC) do not need this WAR | ||
361 | * since they do not target Shub II interrupt registers. If that | ||
362 | * ever changes, this check needs to accomodate. | ||
363 | */ | ||
364 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) | ||
365 | return; | ||
366 | |||
354 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | 367 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
355 | if (!pcidev_info) | 368 | if (!pcidev_info) |
356 | return; | 369 | return; |
@@ -377,16 +390,12 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) | |||
377 | break; | 390 | break; |
378 | } | 391 | } |
379 | if (!test_bit(irr_bit, &irr_reg)) { | 392 | if (!test_bit(irr_bit, &irr_reg)) { |
380 | if (!test_bit(irq, pda->sn_soft_irr)) { | 393 | if (!test_bit(irq, pda->sn_in_service_ivecs)) { |
381 | if (!test_bit(irq, pda->sn_in_service_ivecs)) { | 394 | regval &= 0xff; |
382 | regval &= 0xff; | 395 | if (sn_irq_info->irq_int_bit & regval & |
383 | if (sn_irq_info->irq_int_bit & regval & | 396 | sn_irq_info->irq_last_intr) { |
384 | sn_irq_info->irq_last_intr) { | 397 | regval &= ~(sn_irq_info->irq_int_bit & regval); |
385 | regval &= | 398 | sn_call_force_intr_provider(sn_irq_info); |
386 | ~(sn_irq_info-> | ||
387 | irq_int_bit & regval); | ||
388 | pcibr_force_interrupt(sn_irq_info); | ||
389 | } | ||
390 | } | 399 | } |
391 | } | 400 | } |
392 | } | 401 | } |
@@ -404,13 +413,7 @@ void sn_lb_int_war_check(void) | |||
404 | rcu_read_lock(); | 413 | rcu_read_lock(); |
405 | for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) { | 414 | for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) { |
406 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) { | 415 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) { |
407 | /* | 416 | sn_check_intr(i, sn_irq_info); |
408 | * Only call for PCI bridges that are fully | ||
409 | * initialized. | ||
410 | */ | ||
411 | if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) && | ||
412 | (sn_irq_info->irq_bridge != NULL)) | ||
413 | sn_check_intr(i, sn_irq_info); | ||
414 | } | 417 | } |
415 | } | 418 | } |
416 | rcu_read_unlock(); | 419 | rcu_read_unlock(); |
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index 7c7fe441d623..a594aca959e6 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c | |||
@@ -80,8 +80,6 @@ EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid); | |||
80 | DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); | 80 | DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); |
81 | EXPORT_PER_CPU_SYMBOL(__sn_nodepda); | 81 | EXPORT_PER_CPU_SYMBOL(__sn_nodepda); |
82 | 82 | ||
83 | partid_t sn_partid = -1; | ||
84 | EXPORT_SYMBOL(sn_partid); | ||
85 | char sn_system_serial_number_string[128]; | 83 | char sn_system_serial_number_string[128]; |
86 | EXPORT_SYMBOL(sn_system_serial_number_string); | 84 | EXPORT_SYMBOL(sn_system_serial_number_string); |
87 | u64 sn_partition_serial_number; | 85 | u64 sn_partition_serial_number; |
@@ -403,6 +401,7 @@ static void __init sn_init_pdas(char **cmdline_p) | |||
403 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | 401 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); |
404 | memset(nodepdaindr[cnode]->phys_cpuid, -1, | 402 | memset(nodepdaindr[cnode]->phys_cpuid, -1, |
405 | sizeof(nodepdaindr[cnode]->phys_cpuid)); | 403 | sizeof(nodepdaindr[cnode]->phys_cpuid)); |
404 | spin_lock_init(&nodepdaindr[cnode]->ptc_lock); | ||
406 | } | 405 | } |
407 | 406 | ||
408 | /* | 407 | /* |
@@ -532,8 +531,8 @@ void __init sn_cpu_init(void) | |||
532 | */ | 531 | */ |
533 | { | 532 | { |
534 | u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; | 533 | u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; |
535 | u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1, | 534 | u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2, |
536 | SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3}; | 535 | SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3}; |
537 | u64 *pio; | 536 | u64 *pio; |
538 | pio = is_shub1() ? pio1 : pio2; | 537 | pio = is_shub1() ? pio1 : pio2; |
539 | pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); | 538 | pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); |
diff --git a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S index 96cb71d15682..3fa95065a446 100644 --- a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S +++ b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <asm/types.h> | 9 | #include <asm/types.h> |
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | #define DEADLOCKBIT SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT | 12 | #define DEADLOCKBIT SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT |
13 | #define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK | 13 | #define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK |
14 | #define ALIAS_OFFSET (SH1_PIO_WRITE_STATUS_0_ALIAS-SH1_PIO_WRITE_STATUS_0) | 14 | #define ALIAS_OFFSET 8 |
15 | 15 | ||
16 | 16 | ||
17 | .global sn2_ptc_deadlock_recovery_core | 17 | .global sn2_ptc_deadlock_recovery_core |
@@ -36,13 +36,15 @@ sn2_ptc_deadlock_recovery_core: | |||
36 | extr.u piowcphy=piowc,0,61;; // Convert piowc to uncached physical address | 36 | extr.u piowcphy=piowc,0,61;; // Convert piowc to uncached physical address |
37 | dep piowcphy=-1,piowcphy,63,1 | 37 | dep piowcphy=-1,piowcphy,63,1 |
38 | movl mask=WRITECOUNTMASK | 38 | movl mask=WRITECOUNTMASK |
39 | mov r8=r0 | ||
39 | 40 | ||
40 | 1: | 41 | 1: |
41 | add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register | 42 | add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register |
42 | mov scr1=7;; // Clear DEADLOCK, WRITE_ERROR, MULTI_WRITE_ERROR | 43 | ;; |
43 | st8.rel [scr2]=scr1;; | 44 | ld8.acq scr1=[scr2];; |
44 | 45 | ||
45 | 5: ld8.acq scr1=[piowc];; // Wait for PIOs to complete. | 46 | 5: ld8.acq scr1=[piowc];; // Wait for PIOs to complete. |
47 | hint @pause | ||
46 | and scr2=scr1,mask;; // mask of writecount bits | 48 | and scr2=scr1,mask;; // mask of writecount bits |
47 | cmp.ne p6,p0=zeroval,scr2 | 49 | cmp.ne p6,p0=zeroval,scr2 |
48 | (p6) br.cond.sptk 5b | 50 | (p6) br.cond.sptk 5b |
@@ -57,6 +59,7 @@ sn2_ptc_deadlock_recovery_core: | |||
57 | st8.rel [ptc0]=data0 // Write PTC0 & wait for completion. | 59 | st8.rel [ptc0]=data0 // Write PTC0 & wait for completion. |
58 | 60 | ||
59 | 5: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. | 61 | 5: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. |
62 | hint @pause | ||
60 | and scr2=scr1,mask;; // mask of writecount bits | 63 | and scr2=scr1,mask;; // mask of writecount bits |
61 | cmp.ne p6,p0=zeroval,scr2 | 64 | cmp.ne p6,p0=zeroval,scr2 |
62 | (p6) br.cond.sptk 5b;; | 65 | (p6) br.cond.sptk 5b;; |
@@ -67,6 +70,7 @@ sn2_ptc_deadlock_recovery_core: | |||
67 | (p7) st8.rel [ptc1]=data1;; // Now write PTC1. | 70 | (p7) st8.rel [ptc1]=data1;; // Now write PTC1. |
68 | 71 | ||
69 | 5: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. | 72 | 5: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. |
73 | hint @pause | ||
70 | and scr2=scr1,mask;; // mask of writecount bits | 74 | and scr2=scr1,mask;; // mask of writecount bits |
71 | cmp.ne p6,p0=zeroval,scr2 | 75 | cmp.ne p6,p0=zeroval,scr2 |
72 | (p6) br.cond.sptk 5b | 76 | (p6) br.cond.sptk 5b |
@@ -77,6 +81,7 @@ sn2_ptc_deadlock_recovery_core: | |||
77 | srlz.i;; | 81 | srlz.i;; |
78 | ////////////// END PHYSICAL MODE //////////////////// | 82 | ////////////// END PHYSICAL MODE //////////////////// |
79 | 83 | ||
84 | (p8) add r8=1,r8 | ||
80 | (p8) br.cond.spnt 1b;; // Repeat if DEADLOCK occurred. | 85 | (p8) br.cond.spnt 1b;; // Repeat if DEADLOCK occurred. |
81 | 86 | ||
82 | br.ret.sptk rp | 87 | br.ret.sptk rp |
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c index 7af05a7ac743..0a4ee50c302f 100644 --- a/arch/ia64/sn/kernel/sn2/sn2_smp.c +++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
@@ -20,6 +20,8 @@ | |||
20 | #include <linux/module.h> | 20 | #include <linux/module.h> |
21 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
22 | #include <linux/nodemask.h> | 22 | #include <linux/nodemask.h> |
23 | #include <linux/proc_fs.h> | ||
24 | #include <linux/seq_file.h> | ||
23 | 25 | ||
24 | #include <asm/processor.h> | 26 | #include <asm/processor.h> |
25 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
@@ -39,12 +41,120 @@ | |||
39 | #include <asm/sn/nodepda.h> | 41 | #include <asm/sn/nodepda.h> |
40 | #include <asm/sn/rw_mmr.h> | 42 | #include <asm/sn/rw_mmr.h> |
41 | 43 | ||
42 | void sn2_ptc_deadlock_recovery(volatile unsigned long *, unsigned long data0, | 44 | DEFINE_PER_CPU(struct ptc_stats, ptcstats); |
43 | volatile unsigned long *, unsigned long data1); | 45 | DECLARE_PER_CPU(struct ptc_stats, ptcstats); |
44 | 46 | ||
45 | static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock); | 47 | static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock); |
46 | 48 | ||
47 | static unsigned long sn2_ptc_deadlock_count; | 49 | void sn2_ptc_deadlock_recovery(short *, short, int, volatile unsigned long *, unsigned long data0, |
50 | volatile unsigned long *, unsigned long data1); | ||
51 | |||
52 | #ifdef DEBUG_PTC | ||
53 | /* | ||
54 | * ptctest: | ||
55 | * | ||
56 | * xyz - 3 digit hex number: | ||
57 | * x - Force PTC purges to use shub: | ||
58 | * 0 - no force | ||
59 | * 1 - force | ||
60 | * y - interupt enable | ||
61 | * 0 - disable interrupts | ||
62 | * 1 - leave interuupts enabled | ||
63 | * z - type of lock: | ||
64 | * 0 - global lock | ||
65 | * 1 - node local lock | ||
66 | * 2 - no lock | ||
67 | * | ||
68 | * Note: on shub1, only ptctest == 0 is supported. Don't try other values! | ||
69 | */ | ||
70 | |||
71 | static unsigned int sn2_ptctest = 0; | ||
72 | |||
73 | static int __init ptc_test(char *str) | ||
74 | { | ||
75 | get_option(&str, &sn2_ptctest); | ||
76 | return 1; | ||
77 | } | ||
78 | __setup("ptctest=", ptc_test); | ||
79 | |||
80 | static inline int ptc_lock(unsigned long *flagp) | ||
81 | { | ||
82 | unsigned long opt = sn2_ptctest & 255; | ||
83 | |||
84 | switch (opt) { | ||
85 | case 0x00: | ||
86 | spin_lock_irqsave(&sn2_global_ptc_lock, *flagp); | ||
87 | break; | ||
88 | case 0x01: | ||
89 | spin_lock_irqsave(&sn_nodepda->ptc_lock, *flagp); | ||
90 | break; | ||
91 | case 0x02: | ||
92 | local_irq_save(*flagp); | ||
93 | break; | ||
94 | case 0x10: | ||
95 | spin_lock(&sn2_global_ptc_lock); | ||
96 | break; | ||
97 | case 0x11: | ||
98 | spin_lock(&sn_nodepda->ptc_lock); | ||
99 | break; | ||
100 | case 0x12: | ||
101 | break; | ||
102 | default: | ||
103 | BUG(); | ||
104 | } | ||
105 | return opt; | ||
106 | } | ||
107 | |||
108 | static inline void ptc_unlock(unsigned long flags, int opt) | ||
109 | { | ||
110 | switch (opt) { | ||
111 | case 0x00: | ||
112 | spin_unlock_irqrestore(&sn2_global_ptc_lock, flags); | ||
113 | break; | ||
114 | case 0x01: | ||
115 | spin_unlock_irqrestore(&sn_nodepda->ptc_lock, flags); | ||
116 | break; | ||
117 | case 0x02: | ||
118 | local_irq_restore(flags); | ||
119 | break; | ||
120 | case 0x10: | ||
121 | spin_unlock(&sn2_global_ptc_lock); | ||
122 | break; | ||
123 | case 0x11: | ||
124 | spin_unlock(&sn_nodepda->ptc_lock); | ||
125 | break; | ||
126 | case 0x12: | ||
127 | break; | ||
128 | default: | ||
129 | BUG(); | ||
130 | } | ||
131 | } | ||
132 | #else | ||
133 | |||
134 | #define sn2_ptctest 0 | ||
135 | |||
136 | static inline int ptc_lock(unsigned long *flagp) | ||
137 | { | ||
138 | spin_lock_irqsave(&sn2_global_ptc_lock, *flagp); | ||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | static inline void ptc_unlock(unsigned long flags, int opt) | ||
143 | { | ||
144 | spin_unlock_irqrestore(&sn2_global_ptc_lock, flags); | ||
145 | } | ||
146 | #endif | ||
147 | |||
148 | struct ptc_stats { | ||
149 | unsigned long ptc_l; | ||
150 | unsigned long change_rid; | ||
151 | unsigned long shub_ptc_flushes; | ||
152 | unsigned long nodes_flushed; | ||
153 | unsigned long deadlocks; | ||
154 | unsigned long lock_itc_clocks; | ||
155 | unsigned long shub_itc_clocks; | ||
156 | unsigned long shub_itc_clocks_max; | ||
157 | }; | ||
48 | 158 | ||
49 | static inline unsigned long wait_piowc(void) | 159 | static inline unsigned long wait_piowc(void) |
50 | { | 160 | { |
@@ -89,9 +199,9 @@ void | |||
89 | sn2_global_tlb_purge(unsigned long start, unsigned long end, | 199 | sn2_global_tlb_purge(unsigned long start, unsigned long end, |
90 | unsigned long nbits) | 200 | unsigned long nbits) |
91 | { | 201 | { |
92 | int i, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; | 202 | int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; |
93 | volatile unsigned long *ptc0, *ptc1; | 203 | volatile unsigned long *ptc0, *ptc1; |
94 | unsigned long flags = 0, data0 = 0, data1 = 0; | 204 | unsigned long itc, itc2, flags, data0 = 0, data1 = 0; |
95 | struct mm_struct *mm = current->active_mm; | 205 | struct mm_struct *mm = current->active_mm; |
96 | short nasids[MAX_NUMNODES], nix; | 206 | short nasids[MAX_NUMNODES], nix; |
97 | nodemask_t nodes_flushed; | 207 | nodemask_t nodes_flushed; |
@@ -114,16 +224,19 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end, | |||
114 | start += (1UL << nbits); | 224 | start += (1UL << nbits); |
115 | } while (start < end); | 225 | } while (start < end); |
116 | ia64_srlz_i(); | 226 | ia64_srlz_i(); |
227 | __get_cpu_var(ptcstats).ptc_l++; | ||
117 | preempt_enable(); | 228 | preempt_enable(); |
118 | return; | 229 | return; |
119 | } | 230 | } |
120 | 231 | ||
121 | if (atomic_read(&mm->mm_users) == 1) { | 232 | if (atomic_read(&mm->mm_users) == 1) { |
122 | flush_tlb_mm(mm); | 233 | flush_tlb_mm(mm); |
234 | __get_cpu_var(ptcstats).change_rid++; | ||
123 | preempt_enable(); | 235 | preempt_enable(); |
124 | return; | 236 | return; |
125 | } | 237 | } |
126 | 238 | ||
239 | itc = ia64_get_itc(); | ||
127 | nix = 0; | 240 | nix = 0; |
128 | for_each_node_mask(cnode, nodes_flushed) | 241 | for_each_node_mask(cnode, nodes_flushed) |
129 | nasids[nix++] = cnodeid_to_nasid(cnode); | 242 | nasids[nix++] = cnodeid_to_nasid(cnode); |
@@ -148,7 +261,12 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end, | |||
148 | 261 | ||
149 | mynasid = get_nasid(); | 262 | mynasid = get_nasid(); |
150 | 263 | ||
151 | spin_lock_irqsave(&sn2_global_ptc_lock, flags); | 264 | itc = ia64_get_itc(); |
265 | opt = ptc_lock(&flags); | ||
266 | itc2 = ia64_get_itc(); | ||
267 | __get_cpu_var(ptcstats).lock_itc_clocks += itc2 - itc; | ||
268 | __get_cpu_var(ptcstats).shub_ptc_flushes++; | ||
269 | __get_cpu_var(ptcstats).nodes_flushed += nix; | ||
152 | 270 | ||
153 | do { | 271 | do { |
154 | if (shub1) | 272 | if (shub1) |
@@ -157,7 +275,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end, | |||
157 | data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK); | 275 | data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK); |
158 | for (i = 0; i < nix; i++) { | 276 | for (i = 0; i < nix; i++) { |
159 | nasid = nasids[i]; | 277 | nasid = nasids[i]; |
160 | if (unlikely(nasid == mynasid)) { | 278 | if ((!(sn2_ptctest & 3)) && unlikely(nasid == mynasid)) { |
161 | ia64_ptcga(start, nbits << 2); | 279 | ia64_ptcga(start, nbits << 2); |
162 | ia64_srlz_i(); | 280 | ia64_srlz_i(); |
163 | } else { | 281 | } else { |
@@ -169,18 +287,22 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end, | |||
169 | flushed = 1; | 287 | flushed = 1; |
170 | } | 288 | } |
171 | } | 289 | } |
172 | |||
173 | if (flushed | 290 | if (flushed |
174 | && (wait_piowc() & | 291 | && (wait_piowc() & |
175 | SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK)) { | 292 | (SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK))) { |
176 | sn2_ptc_deadlock_recovery(ptc0, data0, ptc1, data1); | 293 | sn2_ptc_deadlock_recovery(nasids, nix, mynasid, ptc0, data0, ptc1, data1); |
177 | } | 294 | } |
178 | 295 | ||
179 | start += (1UL << nbits); | 296 | start += (1UL << nbits); |
180 | 297 | ||
181 | } while (start < end); | 298 | } while (start < end); |
182 | 299 | ||
183 | spin_unlock_irqrestore(&sn2_global_ptc_lock, flags); | 300 | itc2 = ia64_get_itc() - itc2; |
301 | __get_cpu_var(ptcstats).shub_itc_clocks += itc2; | ||
302 | if (itc2 > __get_cpu_var(ptcstats).shub_itc_clocks_max) | ||
303 | __get_cpu_var(ptcstats).shub_itc_clocks_max = itc2; | ||
304 | |||
305 | ptc_unlock(flags, opt); | ||
184 | 306 | ||
185 | preempt_enable(); | 307 | preempt_enable(); |
186 | } | 308 | } |
@@ -192,31 +314,29 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end, | |||
192 | * TLB flush transaction. The recovery sequence is somewhat tricky & is | 314 | * TLB flush transaction. The recovery sequence is somewhat tricky & is |
193 | * coded in assembly language. | 315 | * coded in assembly language. |
194 | */ | 316 | */ |
195 | void sn2_ptc_deadlock_recovery(volatile unsigned long *ptc0, unsigned long data0, | 317 | void sn2_ptc_deadlock_recovery(short *nasids, short nix, int mynasid, volatile unsigned long *ptc0, unsigned long data0, |
196 | volatile unsigned long *ptc1, unsigned long data1) | 318 | volatile unsigned long *ptc1, unsigned long data1) |
197 | { | 319 | { |
198 | extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long, | 320 | extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long, |
199 | volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long); | 321 | volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long); |
200 | int cnode, mycnode, nasid; | 322 | short nasid, i; |
201 | volatile unsigned long *piows; | 323 | unsigned long *piows, zeroval; |
202 | volatile unsigned long zeroval; | ||
203 | 324 | ||
204 | sn2_ptc_deadlock_count++; | 325 | __get_cpu_var(ptcstats).deadlocks++; |
205 | 326 | ||
206 | piows = pda->pio_write_status_addr; | 327 | piows = (unsigned long *) pda->pio_write_status_addr; |
207 | zeroval = pda->pio_write_status_val; | 328 | zeroval = pda->pio_write_status_val; |
208 | 329 | ||
209 | mycnode = numa_node_id(); | 330 | for (i=0; i < nix; i++) { |
210 | 331 | nasid = nasids[i]; | |
211 | for_each_online_node(cnode) { | 332 | if (!(sn2_ptctest & 3) && nasid == mynasid) |
212 | if (is_headless_node(cnode) || cnode == mycnode) | ||
213 | continue; | 333 | continue; |
214 | nasid = cnodeid_to_nasid(cnode); | ||
215 | ptc0 = CHANGE_NASID(nasid, ptc0); | 334 | ptc0 = CHANGE_NASID(nasid, ptc0); |
216 | if (ptc1) | 335 | if (ptc1) |
217 | ptc1 = CHANGE_NASID(nasid, ptc1); | 336 | ptc1 = CHANGE_NASID(nasid, ptc1); |
218 | sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval); | 337 | sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval); |
219 | } | 338 | } |
339 | |||
220 | } | 340 | } |
221 | 341 | ||
222 | /** | 342 | /** |
@@ -293,3 +413,93 @@ void sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect) | |||
293 | 413 | ||
294 | sn_send_IPI_phys(nasid, physid, vector, delivery_mode); | 414 | sn_send_IPI_phys(nasid, physid, vector, delivery_mode); |
295 | } | 415 | } |
416 | |||
417 | #ifdef CONFIG_PROC_FS | ||
418 | |||
419 | #define PTC_BASENAME "sgi_sn/ptc_statistics" | ||
420 | |||
421 | static void *sn2_ptc_seq_start(struct seq_file *file, loff_t * offset) | ||
422 | { | ||
423 | if (*offset < NR_CPUS) | ||
424 | return offset; | ||
425 | return NULL; | ||
426 | } | ||
427 | |||
428 | static void *sn2_ptc_seq_next(struct seq_file *file, void *data, loff_t * offset) | ||
429 | { | ||
430 | (*offset)++; | ||
431 | if (*offset < NR_CPUS) | ||
432 | return offset; | ||
433 | return NULL; | ||
434 | } | ||
435 | |||
436 | static void sn2_ptc_seq_stop(struct seq_file *file, void *data) | ||
437 | { | ||
438 | } | ||
439 | |||
440 | static int sn2_ptc_seq_show(struct seq_file *file, void *data) | ||
441 | { | ||
442 | struct ptc_stats *stat; | ||
443 | int cpu; | ||
444 | |||
445 | cpu = *(loff_t *) data; | ||
446 | |||
447 | if (!cpu) { | ||
448 | seq_printf(file, "# ptc_l change_rid shub_ptc_flushes shub_nodes_flushed deadlocks lock_nsec shub_nsec shub_nsec_max\n"); | ||
449 | seq_printf(file, "# ptctest %d\n", sn2_ptctest); | ||
450 | } | ||
451 | |||
452 | if (cpu < NR_CPUS && cpu_online(cpu)) { | ||
453 | stat = &per_cpu(ptcstats, cpu); | ||
454 | seq_printf(file, "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld\n", cpu, stat->ptc_l, | ||
455 | stat->change_rid, stat->shub_ptc_flushes, stat->nodes_flushed, | ||
456 | stat->deadlocks, | ||
457 | 1000 * stat->lock_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec, | ||
458 | 1000 * stat->shub_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec, | ||
459 | 1000 * stat->shub_itc_clocks_max / per_cpu(cpu_info, cpu).cyc_per_usec); | ||
460 | } | ||
461 | |||
462 | return 0; | ||
463 | } | ||
464 | |||
465 | static struct seq_operations sn2_ptc_seq_ops = { | ||
466 | .start = sn2_ptc_seq_start, | ||
467 | .next = sn2_ptc_seq_next, | ||
468 | .stop = sn2_ptc_seq_stop, | ||
469 | .show = sn2_ptc_seq_show | ||
470 | }; | ||
471 | |||
472 | int sn2_ptc_proc_open(struct inode *inode, struct file *file) | ||
473 | { | ||
474 | return seq_open(file, &sn2_ptc_seq_ops); | ||
475 | } | ||
476 | |||
477 | static struct file_operations proc_sn2_ptc_operations = { | ||
478 | .open = sn2_ptc_proc_open, | ||
479 | .read = seq_read, | ||
480 | .llseek = seq_lseek, | ||
481 | .release = seq_release, | ||
482 | }; | ||
483 | |||
484 | static struct proc_dir_entry *proc_sn2_ptc; | ||
485 | |||
486 | static int __init sn2_ptc_init(void) | ||
487 | { | ||
488 | if (!(proc_sn2_ptc = create_proc_entry(PTC_BASENAME, 0444, NULL))) { | ||
489 | printk(KERN_ERR "unable to create %s proc entry", PTC_BASENAME); | ||
490 | return -EINVAL; | ||
491 | } | ||
492 | proc_sn2_ptc->proc_fops = &proc_sn2_ptc_operations; | ||
493 | spin_lock_init(&sn2_global_ptc_lock); | ||
494 | return 0; | ||
495 | } | ||
496 | |||
497 | static void __exit sn2_ptc_exit(void) | ||
498 | { | ||
499 | remove_proc_entry(PTC_BASENAME, NULL); | ||
500 | } | ||
501 | |||
502 | module_init(sn2_ptc_init); | ||
503 | module_exit(sn2_ptc_exit); | ||
504 | #endif /* CONFIG_PROC_FS */ | ||
505 | |||
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c index 833e700fdac9..0513aacac8c1 100644 --- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c +++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <asm/topology.h> | 36 | #include <asm/topology.h> |
37 | #include <asm/smp.h> | 37 | #include <asm/smp.h> |
38 | #include <asm/semaphore.h> | 38 | #include <asm/semaphore.h> |
39 | #include <asm/segment.h> | ||
40 | #include <asm/uaccess.h> | 39 | #include <asm/uaccess.h> |
41 | #include <asm/sal.h> | 40 | #include <asm/sal.h> |
42 | #include <asm/sn/io.h> | 41 | #include <asm/sn/io.h> |
@@ -59,7 +58,7 @@ static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret) | |||
59 | struct sn_hwperf_object_info *objbuf = NULL; | 58 | struct sn_hwperf_object_info *objbuf = NULL; |
60 | 59 | ||
61 | if ((e = sn_hwperf_init()) < 0) { | 60 | if ((e = sn_hwperf_init()) < 0) { |
62 | printk("sn_hwperf_init failed: err %d\n", e); | 61 | printk(KERN_ERR "sn_hwperf_init failed: err %d\n", e); |
63 | goto out; | 62 | goto out; |
64 | } | 63 | } |
65 | 64 | ||
@@ -111,7 +110,7 @@ static int sn_hwperf_geoid_to_cnode(char *location) | |||
111 | if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab)) | 110 | if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab)) |
112 | return -1; | 111 | return -1; |
113 | 112 | ||
114 | for (cnode = 0; cnode < numionodes; cnode++) { | 113 | for_each_node(cnode) { |
115 | geoid = cnodeid_get_geoid(cnode); | 114 | geoid = cnodeid_get_geoid(cnode); |
116 | module_id = geo_module(geoid); | 115 | module_id = geo_module(geoid); |
117 | this_rack = MODULE_GET_RACK(module_id); | 116 | this_rack = MODULE_GET_RACK(module_id); |
@@ -124,11 +123,13 @@ static int sn_hwperf_geoid_to_cnode(char *location) | |||
124 | } | 123 | } |
125 | } | 124 | } |
126 | 125 | ||
127 | return cnode < numionodes ? cnode : -1; | 126 | return node_possible(cnode) ? cnode : -1; |
128 | } | 127 | } |
129 | 128 | ||
130 | static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj) | 129 | static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj) |
131 | { | 130 | { |
131 | if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)) | ||
132 | BUG(); | ||
132 | if (!obj->sn_hwp_this_part) | 133 | if (!obj->sn_hwp_this_part) |
133 | return -1; | 134 | return -1; |
134 | return sn_hwperf_geoid_to_cnode(obj->location); | 135 | return sn_hwperf_geoid_to_cnode(obj->location); |
@@ -174,31 +175,199 @@ static const char *sn_hwperf_get_slabname(struct sn_hwperf_object_info *obj, | |||
174 | return slabname; | 175 | return slabname; |
175 | } | 176 | } |
176 | 177 | ||
177 | static void print_pci_topology(struct seq_file *s, | 178 | static void print_pci_topology(struct seq_file *s) |
178 | struct sn_hwperf_object_info *obj, int *ordinal, | 179 | { |
179 | u64 rack, u64 bay, u64 slot, u64 slab) | 180 | char *p; |
181 | size_t sz; | ||
182 | int e; | ||
183 | |||
184 | for (sz = PAGE_SIZE; sz < 16 * PAGE_SIZE; sz += PAGE_SIZE) { | ||
185 | if (!(p = (char *)kmalloc(sz, GFP_KERNEL))) | ||
186 | break; | ||
187 | e = ia64_sn_ioif_get_pci_topology(__pa(p), sz); | ||
188 | if (e == SALRET_OK) | ||
189 | seq_puts(s, p); | ||
190 | kfree(p); | ||
191 | if (e == SALRET_OK || e == SALRET_NOT_IMPLEMENTED) | ||
192 | break; | ||
193 | } | ||
194 | } | ||
195 | |||
196 | static inline int sn_hwperf_has_cpus(cnodeid_t node) | ||
197 | { | ||
198 | return node_online(node) && nr_cpus_node(node); | ||
199 | } | ||
200 | |||
201 | static inline int sn_hwperf_has_mem(cnodeid_t node) | ||
202 | { | ||
203 | return node_online(node) && NODE_DATA(node)->node_present_pages; | ||
204 | } | ||
205 | |||
206 | static struct sn_hwperf_object_info * | ||
207 | sn_hwperf_findobj_id(struct sn_hwperf_object_info *objbuf, | ||
208 | int nobj, int id) | ||
180 | { | 209 | { |
181 | char *p1; | 210 | int i; |
182 | char *p2; | 211 | struct sn_hwperf_object_info *p = objbuf; |
183 | char *pg; | 212 | |
184 | 213 | for (i=0; i < nobj; i++, p++) { | |
185 | if (!(pg = (char *)get_zeroed_page(GFP_KERNEL))) | 214 | if (p->id == id) |
186 | return; /* ignore */ | 215 | return p; |
187 | if (ia64_sn_ioif_get_pci_topology(rack, bay, slot, slab, | 216 | } |
188 | __pa(pg), PAGE_SIZE) == SN_HWPERF_OP_OK) { | 217 | |
189 | for (p1=pg; *p1 && p1 < pg + PAGE_SIZE;) { | 218 | return NULL; |
190 | if (!(p2 = strchr(p1, '\n'))) | 219 | |
220 | } | ||
221 | |||
222 | static int sn_hwperf_get_nearest_node_objdata(struct sn_hwperf_object_info *objbuf, | ||
223 | int nobj, cnodeid_t node, cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node) | ||
224 | { | ||
225 | int e; | ||
226 | struct sn_hwperf_object_info *nodeobj = NULL; | ||
227 | struct sn_hwperf_object_info *op; | ||
228 | struct sn_hwperf_object_info *dest; | ||
229 | struct sn_hwperf_object_info *router; | ||
230 | struct sn_hwperf_port_info ptdata[16]; | ||
231 | int sz, i, j; | ||
232 | cnodeid_t c; | ||
233 | int found_mem = 0; | ||
234 | int found_cpu = 0; | ||
235 | |||
236 | if (!node_possible(node)) | ||
237 | return -EINVAL; | ||
238 | |||
239 | if (sn_hwperf_has_cpus(node)) { | ||
240 | if (near_cpu_node) | ||
241 | *near_cpu_node = node; | ||
242 | found_cpu++; | ||
243 | } | ||
244 | |||
245 | if (sn_hwperf_has_mem(node)) { | ||
246 | if (near_mem_node) | ||
247 | *near_mem_node = node; | ||
248 | found_mem++; | ||
249 | } | ||
250 | |||
251 | if (found_cpu && found_mem) | ||
252 | return 0; /* trivially successful */ | ||
253 | |||
254 | /* find the argument node object */ | ||
255 | for (i=0, op=objbuf; i < nobj; i++, op++) { | ||
256 | if (!SN_HWPERF_IS_NODE(op) && !SN_HWPERF_IS_IONODE(op)) | ||
257 | continue; | ||
258 | if (node == sn_hwperf_obj_to_cnode(op)) { | ||
259 | nodeobj = op; | ||
260 | break; | ||
261 | } | ||
262 | } | ||
263 | if (!nodeobj) { | ||
264 | e = -ENOENT; | ||
265 | goto err; | ||
266 | } | ||
267 | |||
268 | /* get it's interconnect topology */ | ||
269 | sz = op->ports * sizeof(struct sn_hwperf_port_info); | ||
270 | if (sz > sizeof(ptdata)) | ||
271 | BUG(); | ||
272 | e = ia64_sn_hwperf_op(sn_hwperf_master_nasid, | ||
273 | SN_HWPERF_ENUM_PORTS, nodeobj->id, sz, | ||
274 | (u64)&ptdata, 0, 0, NULL); | ||
275 | if (e != SN_HWPERF_OP_OK) { | ||
276 | e = -EINVAL; | ||
277 | goto err; | ||
278 | } | ||
279 | |||
280 | /* find nearest node with cpus and nearest memory */ | ||
281 | for (router=NULL, j=0; j < op->ports; j++) { | ||
282 | dest = sn_hwperf_findobj_id(objbuf, nobj, ptdata[j].conn_id); | ||
283 | if (!dest || SN_HWPERF_FOREIGN(dest) || | ||
284 | !SN_HWPERF_IS_NODE(dest) || SN_HWPERF_IS_IONODE(dest)) { | ||
285 | continue; | ||
286 | } | ||
287 | c = sn_hwperf_obj_to_cnode(dest); | ||
288 | if (!found_cpu && sn_hwperf_has_cpus(c)) { | ||
289 | if (near_cpu_node) | ||
290 | *near_cpu_node = c; | ||
291 | found_cpu++; | ||
292 | } | ||
293 | if (!found_mem && sn_hwperf_has_mem(c)) { | ||
294 | if (near_mem_node) | ||
295 | *near_mem_node = c; | ||
296 | found_mem++; | ||
297 | } | ||
298 | if (SN_HWPERF_IS_ROUTER(dest)) | ||
299 | router = dest; | ||
300 | } | ||
301 | |||
302 | if (router && (!found_cpu || !found_mem)) { | ||
303 | /* search for a node connected to the same router */ | ||
304 | sz = router->ports * sizeof(struct sn_hwperf_port_info); | ||
305 | if (sz > sizeof(ptdata)) | ||
306 | BUG(); | ||
307 | e = ia64_sn_hwperf_op(sn_hwperf_master_nasid, | ||
308 | SN_HWPERF_ENUM_PORTS, router->id, sz, | ||
309 | (u64)&ptdata, 0, 0, NULL); | ||
310 | if (e != SN_HWPERF_OP_OK) { | ||
311 | e = -EINVAL; | ||
312 | goto err; | ||
313 | } | ||
314 | for (j=0; j < router->ports; j++) { | ||
315 | dest = sn_hwperf_findobj_id(objbuf, nobj, | ||
316 | ptdata[j].conn_id); | ||
317 | if (!dest || dest->id == node || | ||
318 | SN_HWPERF_FOREIGN(dest) || | ||
319 | !SN_HWPERF_IS_NODE(dest) || | ||
320 | SN_HWPERF_IS_IONODE(dest)) { | ||
321 | continue; | ||
322 | } | ||
323 | c = sn_hwperf_obj_to_cnode(dest); | ||
324 | if (!found_cpu && sn_hwperf_has_cpus(c)) { | ||
325 | if (near_cpu_node) | ||
326 | *near_cpu_node = c; | ||
327 | found_cpu++; | ||
328 | } | ||
329 | if (!found_mem && sn_hwperf_has_mem(c)) { | ||
330 | if (near_mem_node) | ||
331 | *near_mem_node = c; | ||
332 | found_mem++; | ||
333 | } | ||
334 | if (found_cpu && found_mem) | ||
335 | break; | ||
336 | } | ||
337 | } | ||
338 | |||
339 | if (!found_cpu || !found_mem) { | ||
340 | /* resort to _any_ node with CPUs and memory */ | ||
341 | for (i=0, op=objbuf; i < nobj; i++, op++) { | ||
342 | if (SN_HWPERF_FOREIGN(op) || | ||
343 | SN_HWPERF_IS_IONODE(op) || | ||
344 | !SN_HWPERF_IS_NODE(op)) { | ||
345 | continue; | ||
346 | } | ||
347 | c = sn_hwperf_obj_to_cnode(op); | ||
348 | if (!found_cpu && sn_hwperf_has_cpus(c)) { | ||
349 | if (near_cpu_node) | ||
350 | *near_cpu_node = c; | ||
351 | found_cpu++; | ||
352 | } | ||
353 | if (!found_mem && sn_hwperf_has_mem(c)) { | ||
354 | if (near_mem_node) | ||
355 | *near_mem_node = c; | ||
356 | found_mem++; | ||
357 | } | ||
358 | if (found_cpu && found_mem) | ||
191 | break; | 359 | break; |
192 | *p2 = '\0'; | ||
193 | seq_printf(s, "pcibus %d %s-%s\n", | ||
194 | *ordinal, obj->location, p1); | ||
195 | (*ordinal)++; | ||
196 | p1 = p2 + 1; | ||
197 | } | 360 | } |
198 | } | 361 | } |
199 | free_page((unsigned long)pg); | 362 | |
363 | if (!found_cpu || !found_mem) | ||
364 | e = -ENODATA; | ||
365 | |||
366 | err: | ||
367 | return e; | ||
200 | } | 368 | } |
201 | 369 | ||
370 | |||
202 | static int sn_topology_show(struct seq_file *s, void *d) | 371 | static int sn_topology_show(struct seq_file *s, void *d) |
203 | { | 372 | { |
204 | int sz; | 373 | int sz; |
@@ -215,7 +384,6 @@ static int sn_topology_show(struct seq_file *s, void *d) | |||
215 | struct sn_hwperf_object_info *p; | 384 | struct sn_hwperf_object_info *p; |
216 | struct sn_hwperf_object_info *obj = d; /* this object */ | 385 | struct sn_hwperf_object_info *obj = d; /* this object */ |
217 | struct sn_hwperf_object_info *objs = s->private; /* all objects */ | 386 | struct sn_hwperf_object_info *objs = s->private; /* all objects */ |
218 | int rack, bay, slot, slab; | ||
219 | u8 shubtype; | 387 | u8 shubtype; |
220 | u8 system_size; | 388 | u8 system_size; |
221 | u8 sharing_size; | 389 | u8 sharing_size; |
@@ -225,7 +393,6 @@ static int sn_topology_show(struct seq_file *s, void *d) | |||
225 | u8 region_size; | 393 | u8 region_size; |
226 | u16 nasid_mask; | 394 | u16 nasid_mask; |
227 | int nasid_msb; | 395 | int nasid_msb; |
228 | int pci_bus_ordinal = 0; | ||
229 | 396 | ||
230 | if (obj == objs) { | 397 | if (obj == objs) { |
231 | seq_printf(s, "# sn_topology version 2\n"); | 398 | seq_printf(s, "# sn_topology version 2\n"); |
@@ -253,6 +420,8 @@ static int sn_topology_show(struct seq_file *s, void *d) | |||
253 | shubtype ? "shub2" : "shub1", | 420 | shubtype ? "shub2" : "shub1", |
254 | (u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift, | 421 | (u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift, |
255 | system_size, sharing_size, coher, region_size); | 422 | system_size, sharing_size, coher, region_size); |
423 | |||
424 | print_pci_topology(s); | ||
256 | } | 425 | } |
257 | 426 | ||
258 | if (SN_HWPERF_FOREIGN(obj)) { | 427 | if (SN_HWPERF_FOREIGN(obj)) { |
@@ -272,11 +441,24 @@ static int sn_topology_show(struct seq_file *s, void *d) | |||
272 | if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)) | 441 | if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)) |
273 | seq_putc(s, '\n'); | 442 | seq_putc(s, '\n'); |
274 | else { | 443 | else { |
444 | cnodeid_t near_mem = -1; | ||
445 | cnodeid_t near_cpu = -1; | ||
446 | |||
275 | seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal)); | 447 | seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal)); |
276 | for (i=0; i < numionodes; i++) { | 448 | |
277 | seq_printf(s, i ? ":%d" : ", dist %d", | 449 | if (sn_hwperf_get_nearest_node_objdata(objs, sn_hwperf_obj_cnt, |
278 | node_distance(ordinal, i)); | 450 | ordinal, &near_mem, &near_cpu) == 0) { |
451 | seq_printf(s, ", near_mem_nodeid %d, near_cpu_nodeid %d", | ||
452 | near_mem, near_cpu); | ||
453 | } | ||
454 | |||
455 | if (!SN_HWPERF_IS_IONODE(obj)) { | ||
456 | for_each_online_node(i) { | ||
457 | seq_printf(s, i ? ":%d" : ", dist %d", | ||
458 | node_distance(ordinal, i)); | ||
459 | } | ||
279 | } | 460 | } |
461 | |||
280 | seq_putc(s, '\n'); | 462 | seq_putc(s, '\n'); |
281 | 463 | ||
282 | /* | 464 | /* |
@@ -300,17 +482,6 @@ static int sn_topology_show(struct seq_file *s, void *d) | |||
300 | seq_putc(s, '\n'); | 482 | seq_putc(s, '\n'); |
301 | } | 483 | } |
302 | } | 484 | } |
303 | |||
304 | /* | ||
305 | * PCI busses attached to this node, if any | ||
306 | */ | ||
307 | if (sn_hwperf_location_to_bpos(obj->location, | ||
308 | &rack, &bay, &slot, &slab)) { | ||
309 | /* export pci bus info */ | ||
310 | print_pci_topology(s, obj, &pci_bus_ordinal, | ||
311 | rack, bay, slot, slab); | ||
312 | |||
313 | } | ||
314 | } | 485 | } |
315 | 486 | ||
316 | if (obj->ports) { | 487 | if (obj->ports) { |
@@ -572,6 +743,8 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg) | |||
572 | if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) { | 743 | if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) { |
573 | memset(p, 0, a.sz); | 744 | memset(p, 0, a.sz); |
574 | for (i = 0; i < nobj; i++) { | 745 | for (i = 0; i < nobj; i++) { |
746 | if (!SN_HWPERF_IS_NODE(objs + i)) | ||
747 | continue; | ||
575 | node = sn_hwperf_obj_to_cnode(objs + i); | 748 | node = sn_hwperf_obj_to_cnode(objs + i); |
576 | for_each_online_cpu(j) { | 749 | for_each_online_cpu(j) { |
577 | if (node != cpu_to_node(j)) | 750 | if (node != cpu_to_node(j)) |
@@ -598,7 +771,7 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg) | |||
598 | 771 | ||
599 | case SN_HWPERF_GET_NODE_NASID: | 772 | case SN_HWPERF_GET_NODE_NASID: |
600 | if (a.sz != sizeof(u64) || | 773 | if (a.sz != sizeof(u64) || |
601 | (node = a.arg) < 0 || node >= numionodes) { | 774 | (node = a.arg) < 0 || !node_possible(node)) { |
602 | r = -EINVAL; | 775 | r = -EINVAL; |
603 | goto error; | 776 | goto error; |
604 | } | 777 | } |
@@ -627,6 +800,14 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg) | |||
627 | vfree(objs); | 800 | vfree(objs); |
628 | goto error; | 801 | goto error; |
629 | } | 802 | } |
803 | |||
804 | if (!SN_HWPERF_IS_NODE(objs + i) && | ||
805 | !SN_HWPERF_IS_IONODE(objs + i)) { | ||
806 | r = -ENOENT; | ||
807 | vfree(objs); | ||
808 | goto error; | ||
809 | } | ||
810 | |||
630 | *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i); | 811 | *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i); |
631 | vfree(objs); | 812 | vfree(objs); |
632 | } | 813 | } |
@@ -692,6 +873,7 @@ static int sn_hwperf_init(void) | |||
692 | 873 | ||
693 | /* single threaded, once-only initialization */ | 874 | /* single threaded, once-only initialization */ |
694 | down(&sn_hwperf_init_mutex); | 875 | down(&sn_hwperf_init_mutex); |
876 | |||
695 | if (sn_hwperf_salheap) { | 877 | if (sn_hwperf_salheap) { |
696 | up(&sn_hwperf_init_mutex); | 878 | up(&sn_hwperf_init_mutex); |
697 | return e; | 879 | return e; |
@@ -742,19 +924,6 @@ out: | |||
742 | sn_hwperf_salheap = NULL; | 924 | sn_hwperf_salheap = NULL; |
743 | sn_hwperf_obj_cnt = 0; | 925 | sn_hwperf_obj_cnt = 0; |
744 | } | 926 | } |
745 | |||
746 | if (!e) { | ||
747 | /* | ||
748 | * Register a dynamic misc device for ioctl. Platforms | ||
749 | * supporting hotplug will create /dev/sn_hwperf, else | ||
750 | * user can to look up the minor number in /proc/misc. | ||
751 | */ | ||
752 | if ((e = misc_register(&sn_hwperf_dev)) != 0) { | ||
753 | printk(KERN_ERR "sn_hwperf_init: misc register " | ||
754 | "for \"sn_hwperf\" failed, err %d\n", e); | ||
755 | } | ||
756 | } | ||
757 | |||
758 | up(&sn_hwperf_init_mutex); | 927 | up(&sn_hwperf_init_mutex); |
759 | return e; | 928 | return e; |
760 | } | 929 | } |
@@ -782,3 +951,41 @@ int sn_topology_release(struct inode *inode, struct file *file) | |||
782 | vfree(seq->private); | 951 | vfree(seq->private); |
783 | return seq_release(inode, file); | 952 | return seq_release(inode, file); |
784 | } | 953 | } |
954 | |||
955 | int sn_hwperf_get_nearest_node(cnodeid_t node, | ||
956 | cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node) | ||
957 | { | ||
958 | int e; | ||
959 | int nobj; | ||
960 | struct sn_hwperf_object_info *objbuf; | ||
961 | |||
962 | if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) { | ||
963 | e = sn_hwperf_get_nearest_node_objdata(objbuf, nobj, | ||
964 | node, near_mem_node, near_cpu_node); | ||
965 | vfree(objbuf); | ||
966 | } | ||
967 | |||
968 | return e; | ||
969 | } | ||
970 | |||
971 | static int __devinit sn_hwperf_misc_register_init(void) | ||
972 | { | ||
973 | int e; | ||
974 | |||
975 | sn_hwperf_init(); | ||
976 | |||
977 | /* | ||
978 | * Register a dynamic misc device for hwperf ioctls. Platforms | ||
979 | * supporting hotplug will create /dev/sn_hwperf, else user | ||
980 | * can to look up the minor number in /proc/misc. | ||
981 | */ | ||
982 | if ((e = misc_register(&sn_hwperf_dev)) != 0) { | ||
983 | printk(KERN_ERR "sn_hwperf_misc_register_init: failed to " | ||
984 | "register misc device for \"%s\"\n", sn_hwperf_dev.name); | ||
985 | } | ||
986 | |||
987 | return e; | ||
988 | } | ||
989 | |||
990 | device_initcall(sn_hwperf_misc_register_init); /* after misc_init() */ | ||
991 | EXPORT_SYMBOL(sn_hwperf_get_nearest_node); | ||
diff --git a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c index 6a80fca807b9..51bf82720d99 100644 --- a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c +++ b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | #include <linux/config.h> | 8 | #include <linux/config.h> |
9 | #include <asm/uaccess.h> | 9 | #include <asm/uaccess.h> |
@@ -15,7 +15,7 @@ | |||
15 | 15 | ||
16 | static int partition_id_show(struct seq_file *s, void *p) | 16 | static int partition_id_show(struct seq_file *s, void *p) |
17 | { | 17 | { |
18 | seq_printf(s, "%d\n", sn_local_partid()); | 18 | seq_printf(s, "%d\n", sn_partition_id); |
19 | return 0; | 19 | return 0; |
20 | } | 20 | } |
21 | 21 | ||
diff --git a/arch/ia64/sn/kernel/sn2/timer_interrupt.c b/arch/ia64/sn/kernel/sn2/timer_interrupt.c index cde7375390b0..adf5db2e2afe 100644 --- a/arch/ia64/sn/kernel/sn2/timer_interrupt.c +++ b/arch/ia64/sn/kernel/sn2/timer_interrupt.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * | 2 | * |
3 | * | 3 | * |
4 | * Copyright (c) 2003 Silicon Graphics, Inc. All Rights Reserved. | 4 | * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of version 2 of the GNU General Public License | 7 | * under the terms of version 2 of the GNU General Public License |
@@ -50,14 +50,16 @@ void sn_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
50 | LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT); | 50 | LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT); |
51 | } | 51 | } |
52 | 52 | ||
53 | if (enable_shub_wars_1_1()) { | 53 | if (is_shub1()) { |
54 | /* Bugfix code for SHUB 1.1 */ | 54 | if (enable_shub_wars_1_1()) { |
55 | if (pda->pio_shub_war_cam_addr) | 55 | /* Bugfix code for SHUB 1.1 */ |
56 | *pda->pio_shub_war_cam_addr = 0x8000000000000010UL; | 56 | if (pda->pio_shub_war_cam_addr) |
57 | *pda->pio_shub_war_cam_addr = 0x8000000000000010UL; | ||
58 | } | ||
59 | if (pda->sn_lb_int_war_ticks == 0) | ||
60 | sn_lb_int_war_check(); | ||
61 | pda->sn_lb_int_war_ticks++; | ||
62 | if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL) | ||
63 | pda->sn_lb_int_war_ticks = 0; | ||
57 | } | 64 | } |
58 | if (pda->sn_lb_int_war_ticks == 0) | ||
59 | sn_lb_int_war_check(); | ||
60 | pda->sn_lb_int_war_ticks++; | ||
61 | if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL) | ||
62 | pda->sn_lb_int_war_ticks = 0; | ||
63 | } | 65 | } |
diff --git a/arch/ia64/sn/pci/Makefile b/arch/ia64/sn/pci/Makefile index 2f915bce25f9..321576b1b425 100644 --- a/arch/ia64/sn/pci/Makefile +++ b/arch/ia64/sn/pci/Makefile | |||
@@ -7,4 +7,4 @@ | |||
7 | # | 7 | # |
8 | # Makefile for the sn pci general routines. | 8 | # Makefile for the sn pci general routines. |
9 | 9 | ||
10 | obj-y := pci_dma.o tioca_provider.o pcibr/ | 10 | obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/ |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index b058dc2a0b9d..34093476e965 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/types.h> | 9 | #include <linux/types.h> |
@@ -215,8 +215,8 @@ void sn_dma_flush(uint64_t addr) | |||
215 | int is_tio; | 215 | int is_tio; |
216 | int wid_num; | 216 | int wid_num; |
217 | int i, j; | 217 | int i, j; |
218 | int bwin; | ||
219 | uint64_t flags; | 218 | uint64_t flags; |
219 | uint64_t itte; | ||
220 | struct hubdev_info *hubinfo; | 220 | struct hubdev_info *hubinfo; |
221 | volatile struct sn_flush_device_list *p; | 221 | volatile struct sn_flush_device_list *p; |
222 | struct sn_flush_nasid_entry *flush_nasid_list; | 222 | struct sn_flush_nasid_entry *flush_nasid_list; |
@@ -233,31 +233,36 @@ void sn_dma_flush(uint64_t addr) | |||
233 | if (!hubinfo) { | 233 | if (!hubinfo) { |
234 | BUG(); | 234 | BUG(); |
235 | } | 235 | } |
236 | is_tio = (nasid & 1); | ||
237 | if (is_tio) { | ||
238 | wid_num = TIO_SWIN_WIDGETNUM(addr); | ||
239 | bwin = TIO_BWIN_WINDOWNUM(addr); | ||
240 | } else { | ||
241 | wid_num = SWIN_WIDGETNUM(addr); | ||
242 | bwin = BWIN_WINDOWNUM(addr); | ||
243 | } | ||
244 | 236 | ||
245 | flush_nasid_list = &hubinfo->hdi_flush_nasid_list; | 237 | flush_nasid_list = &hubinfo->hdi_flush_nasid_list; |
246 | if (flush_nasid_list->widget_p == NULL) | 238 | if (flush_nasid_list->widget_p == NULL) |
247 | return; | 239 | return; |
248 | if (bwin > 0) { | ||
249 | uint64_t itte = flush_nasid_list->iio_itte[bwin]; | ||
250 | 240 | ||
251 | if (is_tio) { | 241 | is_tio = (nasid & 1); |
252 | wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) & | 242 | if (is_tio) { |
253 | TIO_ITTE_WIDGET_MASK; | 243 | int itte_index; |
254 | } else { | 244 | |
255 | wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) & | 245 | if (TIO_HWIN(addr)) |
256 | IIO_ITTE_WIDGET_MASK; | 246 | itte_index = 0; |
257 | } | 247 | else if (TIO_BWIN_WINDOWNUM(addr)) |
248 | itte_index = TIO_BWIN_WINDOWNUM(addr); | ||
249 | else | ||
250 | itte_index = -1; | ||
251 | |||
252 | if (itte_index >= 0) { | ||
253 | itte = flush_nasid_list->iio_itte[itte_index]; | ||
254 | if (! TIO_ITTE_VALID(itte)) | ||
255 | return; | ||
256 | wid_num = TIO_ITTE_WIDGET(itte); | ||
257 | } else | ||
258 | wid_num = TIO_SWIN_WIDGETNUM(addr); | ||
259 | } else { | ||
260 | if (BWIN_WINDOWNUM(addr)) { | ||
261 | itte = flush_nasid_list->iio_itte[BWIN_WINDOWNUM(addr)]; | ||
262 | wid_num = IIO_ITTE_WIDGET(itte); | ||
263 | } else | ||
264 | wid_num = SWIN_WIDGETNUM(addr); | ||
258 | } | 265 | } |
259 | if (flush_nasid_list->widget_p == NULL) | ||
260 | return; | ||
261 | if (flush_nasid_list->widget_p[wid_num] == NULL) | 266 | if (flush_nasid_list->widget_p[wid_num] == NULL) |
262 | return; | 267 | return; |
263 | p = &flush_nasid_list->widget_p[wid_num][0]; | 268 | p = &flush_nasid_list->widget_p[wid_num][0]; |
@@ -283,10 +288,16 @@ void sn_dma_flush(uint64_t addr) | |||
283 | /* | 288 | /* |
284 | * For TIOCP use the Device(x) Write Request Buffer Flush Bridge | 289 | * For TIOCP use the Device(x) Write Request Buffer Flush Bridge |
285 | * register since it ensures the data has entered the coherence | 290 | * register since it ensures the data has entered the coherence |
286 | * domain, unlike PIC | 291 | * domain, unlike PIC. |
287 | */ | 292 | */ |
288 | if (is_tio) { | 293 | if (is_tio) { |
289 | uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID); | 294 | /* |
295 | * Note: devices behind TIOCE should never be matched in the | ||
296 | * above code, and so the following code is PIC/CP centric. | ||
297 | * If CE ever needs the sn_dma_flush mechanism, we will have | ||
298 | * to account for that here and in tioce_bus_fixup(). | ||
299 | */ | ||
300 | uint32_t tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID)); | ||
290 | uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id); | 301 | uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id); |
291 | 302 | ||
292 | /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */ | 303 | /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */ |
@@ -306,7 +317,8 @@ void sn_dma_flush(uint64_t addr) | |||
306 | *(volatile uint32_t *)(p->sfdl_force_int_addr) = 1; | 317 | *(volatile uint32_t *)(p->sfdl_force_int_addr) = 1; |
307 | 318 | ||
308 | /* wait for the interrupt to come back. */ | 319 | /* wait for the interrupt to come back. */ |
309 | while (*(p->sfdl_flush_addr) != 0x10f) ; | 320 | while (*(p->sfdl_flush_addr) != 0x10f) |
321 | cpu_relax(); | ||
310 | 322 | ||
311 | /* okay, everything is synched up. */ | 323 | /* okay, everything is synched up. */ |
312 | spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags); | 324 | spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags); |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c index b95e928636a1..7b03b8084ffc 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <asm/sn/pcibus_provider_defs.h> | 15 | #include <asm/sn/pcibus_provider_defs.h> |
16 | #include <asm/sn/pcidev.h> | 16 | #include <asm/sn/pcidev.h> |
17 | #include <asm/sn/sn_sal.h> | 17 | #include <asm/sn/sn_sal.h> |
18 | #include <asm/sn/sn2/sn_hwperf.h> | ||
18 | #include "xtalk/xwidgetdev.h" | 19 | #include "xtalk/xwidgetdev.h" |
19 | #include "xtalk/hubdev.h" | 20 | #include "xtalk/hubdev.h" |
20 | 21 | ||
@@ -60,7 +61,7 @@ static int sal_pcibr_error_interrupt(struct pcibus_info *soft) | |||
60 | ret_stuff.status = 0; | 61 | ret_stuff.status = 0; |
61 | ret_stuff.v0 = 0; | 62 | ret_stuff.v0 = 0; |
62 | 63 | ||
63 | segment = 0; | 64 | segment = soft->pbi_buscommon.bs_persist_segment; |
64 | busnum = soft->pbi_buscommon.bs_persist_busnum; | 65 | busnum = soft->pbi_buscommon.bs_persist_busnum; |
65 | SAL_CALL_NOLOCK(ret_stuff, | 66 | SAL_CALL_NOLOCK(ret_stuff, |
66 | (u64) SN_SAL_IOIF_ERROR_INTERRUPT, | 67 | (u64) SN_SAL_IOIF_ERROR_INTERRUPT, |
@@ -88,6 +89,7 @@ void * | |||
88 | pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) | 89 | pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) |
89 | { | 90 | { |
90 | int nasid, cnode, j; | 91 | int nasid, cnode, j; |
92 | cnodeid_t near_cnode; | ||
91 | struct hubdev_info *hubdev_info; | 93 | struct hubdev_info *hubdev_info; |
92 | struct pcibus_info *soft; | 94 | struct pcibus_info *soft; |
93 | struct sn_flush_device_list *sn_flush_device_list; | 95 | struct sn_flush_device_list *sn_flush_device_list; |
@@ -115,7 +117,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
115 | /* | 117 | /* |
116 | * register the bridge's error interrupt handler | 118 | * register the bridge's error interrupt handler |
117 | */ | 119 | */ |
118 | if (request_irq(SGI_PCIBR_ERROR, (void *)pcibr_error_intr_handler, | 120 | if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler, |
119 | SA_SHIRQ, "PCIBR error", (void *)(soft))) { | 121 | SA_SHIRQ, "PCIBR error", (void *)(soft))) { |
120 | printk(KERN_WARNING | 122 | printk(KERN_WARNING |
121 | "pcibr cannot allocate interrupt for error handler\n"); | 123 | "pcibr cannot allocate interrupt for error handler\n"); |
@@ -142,9 +144,12 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
142 | j++, sn_flush_device_list++) { | 144 | j++, sn_flush_device_list++) { |
143 | if (sn_flush_device_list->sfdl_slot == -1) | 145 | if (sn_flush_device_list->sfdl_slot == -1) |
144 | continue; | 146 | continue; |
145 | if (sn_flush_device_list-> | 147 | if ((sn_flush_device_list-> |
146 | sfdl_persistent_busnum == | 148 | sfdl_persistent_segment == |
147 | soft->pbi_buscommon.bs_persist_busnum) | 149 | soft->pbi_buscommon.bs_persist_segment) && |
150 | (sn_flush_device_list-> | ||
151 | sfdl_persistent_busnum == | ||
152 | soft->pbi_buscommon.bs_persist_busnum)) | ||
148 | sn_flush_device_list->sfdl_pcibus_info = | 153 | sn_flush_device_list->sfdl_pcibus_info = |
149 | soft; | 154 | soft; |
150 | } | 155 | } |
@@ -158,12 +163,18 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
158 | memset(soft->pbi_int_ate_resource.ate, 0, | 163 | memset(soft->pbi_int_ate_resource.ate, 0, |
159 | (soft->pbi_int_ate_size * sizeof(uint64_t))); | 164 | (soft->pbi_int_ate_size * sizeof(uint64_t))); |
160 | 165 | ||
161 | if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) | 166 | if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) { |
162 | /* | 167 | /* TIO PCI Bridge: find nearest node with CPUs */ |
163 | * TIO PCI Bridge with no closest node information. | 168 | int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode); |
164 | * FIXME: Find another way to determine the closest node | 169 | |
165 | */ | 170 | if (e < 0) { |
166 | controller->node = -1; | 171 | near_cnode = (cnodeid_t)-1; /* use any node */ |
172 | printk(KERN_WARNING "pcibr_bus_fixup: failed to find " | ||
173 | "near node with CPUs to TIO node %d, err=%d\n", | ||
174 | cnode, e); | ||
175 | } | ||
176 | controller->node = near_cnode; | ||
177 | } | ||
167 | else | 178 | else |
168 | controller->node = cnode; | 179 | controller->node = cnode; |
169 | return soft; | 180 | return soft; |
@@ -175,6 +186,9 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info) | |||
175 | struct pcibus_info *pcibus_info; | 186 | struct pcibus_info *pcibus_info; |
176 | int bit = sn_irq_info->irq_int_bit; | 187 | int bit = sn_irq_info->irq_int_bit; |
177 | 188 | ||
189 | if (! sn_irq_info->irq_bridge) | ||
190 | return; | ||
191 | |||
178 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | 192 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
179 | if (pcidev_info) { | 193 | if (pcidev_info) { |
180 | pcibus_info = | 194 | pcibus_info = |
@@ -184,7 +198,7 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info) | |||
184 | } | 198 | } |
185 | } | 199 | } |
186 | 200 | ||
187 | void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info) | 201 | void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) |
188 | { | 202 | { |
189 | struct pcidev_info *pcidev_info; | 203 | struct pcidev_info *pcidev_info; |
190 | struct pcibus_info *pcibus_info; | 204 | struct pcibus_info *pcibus_info; |
@@ -219,6 +233,8 @@ struct sn_pcibus_provider pcibr_provider = { | |||
219 | .dma_map_consistent = pcibr_dma_map_consistent, | 233 | .dma_map_consistent = pcibr_dma_map_consistent, |
220 | .dma_unmap = pcibr_dma_unmap, | 234 | .dma_unmap = pcibr_dma_unmap, |
221 | .bus_fixup = pcibr_bus_fixup, | 235 | .bus_fixup = pcibr_bus_fixup, |
236 | .force_interrupt = pcibr_force_interrupt, | ||
237 | .target_interrupt = pcibr_target_interrupt | ||
222 | }; | 238 | }; |
223 | 239 | ||
224 | int | 240 | int |
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c index 5d76a7581465..ea09c12f0258 100644 --- a/arch/ia64/sn/pci/tioca_provider.c +++ b/arch/ia64/sn/pci/tioca_provider.c | |||
@@ -559,7 +559,7 @@ tioca_error_intr_handler(int irq, void *arg, struct pt_regs *pt) | |||
559 | ret_stuff.status = 0; | 559 | ret_stuff.status = 0; |
560 | ret_stuff.v0 = 0; | 560 | ret_stuff.v0 = 0; |
561 | 561 | ||
562 | segment = 0; | 562 | segment = soft->ca_common.bs_persist_segment; |
563 | busnum = soft->ca_common.bs_persist_busnum; | 563 | busnum = soft->ca_common.bs_persist_busnum; |
564 | 564 | ||
565 | SAL_CALL_NOLOCK(ret_stuff, | 565 | SAL_CALL_NOLOCK(ret_stuff, |
@@ -622,7 +622,8 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
622 | nasid_to_cnodeid(tioca_common->ca_closest_nasid); | 622 | nasid_to_cnodeid(tioca_common->ca_closest_nasid); |
623 | tioca_common->ca_kernel_private = (uint64_t) tioca_kern; | 623 | tioca_common->ca_kernel_private = (uint64_t) tioca_kern; |
624 | 624 | ||
625 | bus = pci_find_bus(0, tioca_common->ca_common.bs_persist_busnum); | 625 | bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment, |
626 | tioca_common->ca_common.bs_persist_busnum); | ||
626 | BUG_ON(!bus); | 627 | BUG_ON(!bus); |
627 | tioca_kern->ca_devices = &bus->devices; | 628 | tioca_kern->ca_devices = &bus->devices; |
628 | 629 | ||
@@ -656,6 +657,8 @@ static struct sn_pcibus_provider tioca_pci_interfaces = { | |||
656 | .dma_map_consistent = tioca_dma_map, | 657 | .dma_map_consistent = tioca_dma_map, |
657 | .dma_unmap = tioca_dma_unmap, | 658 | .dma_unmap = tioca_dma_unmap, |
658 | .bus_fixup = tioca_bus_fixup, | 659 | .bus_fixup = tioca_bus_fixup, |
660 | .force_interrupt = NULL, | ||
661 | .target_interrupt = NULL | ||
659 | }; | 662 | }; |
660 | 663 | ||
661 | /** | 664 | /** |
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c new file mode 100644 index 000000000000..8e75db2b825d --- /dev/null +++ b/arch/ia64/sn/pci/tioce_provider.c | |||
@@ -0,0 +1,771 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003-2005 Silicon Graphics, Inc. All Rights Reserved. | ||
7 | */ | ||
8 | |||
9 | #include <linux/types.h> | ||
10 | #include <linux/interrupt.h> | ||
11 | #include <linux/pci.h> | ||
12 | #include <asm/sn/sn_sal.h> | ||
13 | #include <asm/sn/addrs.h> | ||
14 | #include <asm/sn/pcidev.h> | ||
15 | #include <asm/sn/pcibus_provider_defs.h> | ||
16 | #include <asm/sn/tioce_provider.h> | ||
17 | |||
18 | /** | ||
19 | * Bus address ranges for the 5 flavors of TIOCE DMA | ||
20 | */ | ||
21 | |||
22 | #define TIOCE_D64_MIN 0x8000000000000000UL | ||
23 | #define TIOCE_D64_MAX 0xffffffffffffffffUL | ||
24 | #define TIOCE_D64_ADDR(a) ((a) >= TIOCE_D64_MIN) | ||
25 | |||
26 | #define TIOCE_D32_MIN 0x0000000080000000UL | ||
27 | #define TIOCE_D32_MAX 0x00000000ffffffffUL | ||
28 | #define TIOCE_D32_ADDR(a) ((a) >= TIOCE_D32_MIN && (a) <= TIOCE_D32_MAX) | ||
29 | |||
30 | #define TIOCE_M32_MIN 0x0000000000000000UL | ||
31 | #define TIOCE_M32_MAX 0x000000007fffffffUL | ||
32 | #define TIOCE_M32_ADDR(a) ((a) >= TIOCE_M32_MIN && (a) <= TIOCE_M32_MAX) | ||
33 | |||
34 | #define TIOCE_M40_MIN 0x0000004000000000UL | ||
35 | #define TIOCE_M40_MAX 0x0000007fffffffffUL | ||
36 | #define TIOCE_M40_ADDR(a) ((a) >= TIOCE_M40_MIN && (a) <= TIOCE_M40_MAX) | ||
37 | |||
38 | #define TIOCE_M40S_MIN 0x0000008000000000UL | ||
39 | #define TIOCE_M40S_MAX 0x000000ffffffffffUL | ||
40 | #define TIOCE_M40S_ADDR(a) ((a) >= TIOCE_M40S_MIN && (a) <= TIOCE_M40S_MAX) | ||
41 | |||
42 | /* | ||
43 | * ATE manipulation macros. | ||
44 | */ | ||
45 | |||
46 | #define ATE_PAGESHIFT(ps) (__ffs(ps)) | ||
47 | #define ATE_PAGEMASK(ps) ((ps)-1) | ||
48 | |||
49 | #define ATE_PAGE(x, ps) ((x) >> ATE_PAGESHIFT(ps)) | ||
50 | #define ATE_NPAGES(start, len, pagesize) \ | ||
51 | (ATE_PAGE((start)+(len)-1, pagesize) - ATE_PAGE(start, pagesize) + 1) | ||
52 | |||
53 | #define ATE_VALID(ate) ((ate) & (1UL << 63)) | ||
54 | #define ATE_MAKE(addr, ps) (((addr) & ~ATE_PAGEMASK(ps)) | (1UL << 63)) | ||
55 | |||
56 | /* | ||
57 | * Flavors of ate-based mapping supported by tioce_alloc_map() | ||
58 | */ | ||
59 | |||
60 | #define TIOCE_ATE_M32 1 | ||
61 | #define TIOCE_ATE_M40 2 | ||
62 | #define TIOCE_ATE_M40S 3 | ||
63 | |||
64 | #define KB(x) ((x) << 10) | ||
65 | #define MB(x) ((x) << 20) | ||
66 | #define GB(x) ((x) << 30) | ||
67 | |||
68 | /** | ||
69 | * tioce_dma_d64 - create a DMA mapping using 64-bit direct mode | ||
70 | * @ct_addr: system coretalk address | ||
71 | * | ||
72 | * Map @ct_addr into 64-bit CE bus space. No device context is necessary | ||
73 | * and no CE mapping are consumed. | ||
74 | * | ||
75 | * Bits 53:0 come from the coretalk address. The remaining bits are set as | ||
76 | * follows: | ||
77 | * | ||
78 | * 63 - must be 1 to indicate d64 mode to CE hardware | ||
79 | * 62 - barrier bit ... controlled with tioce_dma_barrier() | ||
80 | * 61 - 0 since this is not an MSI transaction | ||
81 | * 60:54 - reserved, MBZ | ||
82 | */ | ||
83 | static uint64_t | ||
84 | tioce_dma_d64(unsigned long ct_addr) | ||
85 | { | ||
86 | uint64_t bus_addr; | ||
87 | |||
88 | bus_addr = ct_addr | (1UL << 63); | ||
89 | |||
90 | return bus_addr; | ||
91 | } | ||
92 | |||
93 | /** | ||
94 | * pcidev_to_tioce - return misc ce related pointers given a pci_dev | ||
95 | * @pci_dev: pci device context | ||
96 | * @base: ptr to store struct tioce_mmr * for the CE holding this device | ||
97 | * @kernel: ptr to store struct tioce_kernel * for the CE holding this device | ||
98 | * @port: ptr to store the CE port number that this device is on | ||
99 | * | ||
100 | * Return pointers to various CE-related structures for the CE upstream of | ||
101 | * @pci_dev. | ||
102 | */ | ||
103 | static inline void | ||
104 | pcidev_to_tioce(struct pci_dev *pdev, struct tioce **base, | ||
105 | struct tioce_kernel **kernel, int *port) | ||
106 | { | ||
107 | struct pcidev_info *pcidev_info; | ||
108 | struct tioce_common *ce_common; | ||
109 | struct tioce_kernel *ce_kernel; | ||
110 | |||
111 | pcidev_info = SN_PCIDEV_INFO(pdev); | ||
112 | ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info; | ||
113 | ce_kernel = (struct tioce_kernel *)ce_common->ce_kernel_private; | ||
114 | |||
115 | if (base) | ||
116 | *base = (struct tioce *)ce_common->ce_pcibus.bs_base; | ||
117 | if (kernel) | ||
118 | *kernel = ce_kernel; | ||
119 | |||
120 | /* | ||
121 | * we use port as a zero-based value internally, even though the | ||
122 | * documentation is 1-based. | ||
123 | */ | ||
124 | if (port) | ||
125 | *port = | ||
126 | (pdev->bus->number < ce_kernel->ce_port1_secondary) ? 0 : 1; | ||
127 | } | ||
128 | |||
129 | /** | ||
130 | * tioce_alloc_map - Given a coretalk address, map it to pcie bus address | ||
131 | * space using one of the various ATE-based address modes. | ||
132 | * @ce_kern: tioce context | ||
133 | * @type: map mode to use | ||
134 | * @port: 0-based port that the requesting device is downstream of | ||
135 | * @ct_addr: the coretalk address to map | ||
136 | * @len: number of bytes to map | ||
137 | * | ||
138 | * Given the addressing type, set up various paramaters that define the | ||
139 | * ATE pool to use. Search for a contiguous block of entries to cover the | ||
140 | * length, and if enough resources exist, fill in the ATE's and construct a | ||
141 | * tioce_dmamap struct to track the mapping. | ||
142 | */ | ||
143 | static uint64_t | ||
144 | tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port, | ||
145 | uint64_t ct_addr, int len) | ||
146 | { | ||
147 | int i; | ||
148 | int j; | ||
149 | int first; | ||
150 | int last; | ||
151 | int entries; | ||
152 | int nates; | ||
153 | int pagesize; | ||
154 | uint64_t *ate_shadow; | ||
155 | uint64_t *ate_reg; | ||
156 | uint64_t addr; | ||
157 | struct tioce *ce_mmr; | ||
158 | uint64_t bus_base; | ||
159 | struct tioce_dmamap *map; | ||
160 | |||
161 | ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base; | ||
162 | |||
163 | switch (type) { | ||
164 | case TIOCE_ATE_M32: | ||
165 | /* | ||
166 | * The first 64 entries of the ate3240 pool are dedicated to | ||
167 | * super-page (TIOCE_ATE_M40S) mode. | ||
168 | */ | ||
169 | first = 64; | ||
170 | entries = TIOCE_NUM_M3240_ATES - 64; | ||
171 | ate_shadow = ce_kern->ce_ate3240_shadow; | ||
172 | ate_reg = ce_mmr->ce_ure_ate3240; | ||
173 | pagesize = ce_kern->ce_ate3240_pagesize; | ||
174 | bus_base = TIOCE_M32_MIN; | ||
175 | break; | ||
176 | case TIOCE_ATE_M40: | ||
177 | first = 0; | ||
178 | entries = TIOCE_NUM_M40_ATES; | ||
179 | ate_shadow = ce_kern->ce_ate40_shadow; | ||
180 | ate_reg = ce_mmr->ce_ure_ate40; | ||
181 | pagesize = MB(64); | ||
182 | bus_base = TIOCE_M40_MIN; | ||
183 | break; | ||
184 | case TIOCE_ATE_M40S: | ||
185 | /* | ||
186 | * ate3240 entries 0-31 are dedicated to port1 super-page | ||
187 | * mappings. ate3240 entries 32-63 are dedicated to port2. | ||
188 | */ | ||
189 | first = port * 32; | ||
190 | entries = 32; | ||
191 | ate_shadow = ce_kern->ce_ate3240_shadow; | ||
192 | ate_reg = ce_mmr->ce_ure_ate3240; | ||
193 | pagesize = GB(16); | ||
194 | bus_base = TIOCE_M40S_MIN; | ||
195 | break; | ||
196 | default: | ||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | nates = ATE_NPAGES(ct_addr, len, pagesize); | ||
201 | if (nates > entries) | ||
202 | return 0; | ||
203 | |||
204 | last = first + entries - nates; | ||
205 | for (i = first; i <= last; i++) { | ||
206 | if (ATE_VALID(ate_shadow[i])) | ||
207 | continue; | ||
208 | |||
209 | for (j = i; j < i + nates; j++) | ||
210 | if (ATE_VALID(ate_shadow[j])) | ||
211 | break; | ||
212 | |||
213 | if (j >= i + nates) | ||
214 | break; | ||
215 | } | ||
216 | |||
217 | if (i > last) | ||
218 | return 0; | ||
219 | |||
220 | map = kcalloc(1, sizeof(struct tioce_dmamap), GFP_ATOMIC); | ||
221 | if (!map) | ||
222 | return 0; | ||
223 | |||
224 | addr = ct_addr; | ||
225 | for (j = 0; j < nates; j++) { | ||
226 | uint64_t ate; | ||
227 | |||
228 | ate = ATE_MAKE(addr, pagesize); | ||
229 | ate_shadow[i + j] = ate; | ||
230 | ate_reg[i + j] = ate; | ||
231 | addr += pagesize; | ||
232 | } | ||
233 | |||
234 | map->refcnt = 1; | ||
235 | map->nbytes = nates * pagesize; | ||
236 | map->ct_start = ct_addr & ~ATE_PAGEMASK(pagesize); | ||
237 | map->pci_start = bus_base + (i * pagesize); | ||
238 | map->ate_hw = &ate_reg[i]; | ||
239 | map->ate_shadow = &ate_shadow[i]; | ||
240 | map->ate_count = nates; | ||
241 | |||
242 | list_add(&map->ce_dmamap_list, &ce_kern->ce_dmamap_list); | ||
243 | |||
244 | return (map->pci_start + (ct_addr - map->ct_start)); | ||
245 | } | ||
246 | |||
247 | /** | ||
248 | * tioce_dma_d32 - create a DMA mapping using 32-bit direct mode | ||
249 | * @pdev: linux pci_dev representing the function | ||
250 | * @paddr: system physical address | ||
251 | * | ||
252 | * Map @paddr into 32-bit bus space of the CE associated with @pcidev_info. | ||
253 | */ | ||
254 | static uint64_t | ||
255 | tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr) | ||
256 | { | ||
257 | int dma_ok; | ||
258 | int port; | ||
259 | struct tioce *ce_mmr; | ||
260 | struct tioce_kernel *ce_kern; | ||
261 | uint64_t ct_upper; | ||
262 | uint64_t ct_lower; | ||
263 | dma_addr_t bus_addr; | ||
264 | |||
265 | ct_upper = ct_addr & ~0x3fffffffUL; | ||
266 | ct_lower = ct_addr & 0x3fffffffUL; | ||
267 | |||
268 | pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port); | ||
269 | |||
270 | if (ce_kern->ce_port[port].dirmap_refcnt == 0) { | ||
271 | volatile uint64_t tmp; | ||
272 | |||
273 | ce_kern->ce_port[port].dirmap_shadow = ct_upper; | ||
274 | ce_mmr->ce_ure_dir_map[port] = ct_upper; | ||
275 | tmp = ce_mmr->ce_ure_dir_map[port]; | ||
276 | dma_ok = 1; | ||
277 | } else | ||
278 | dma_ok = (ce_kern->ce_port[port].dirmap_shadow == ct_upper); | ||
279 | |||
280 | if (dma_ok) { | ||
281 | ce_kern->ce_port[port].dirmap_refcnt++; | ||
282 | bus_addr = TIOCE_D32_MIN + ct_lower; | ||
283 | } else | ||
284 | bus_addr = 0; | ||
285 | |||
286 | return bus_addr; | ||
287 | } | ||
288 | |||
289 | /** | ||
290 | * tioce_dma_barrier - swizzle a TIOCE bus address to include or exclude | ||
291 | * the barrier bit. | ||
292 | * @bus_addr: bus address to swizzle | ||
293 | * | ||
294 | * Given a TIOCE bus address, set the appropriate bit to indicate barrier | ||
295 | * attributes. | ||
296 | */ | ||
297 | static uint64_t | ||
298 | tioce_dma_barrier(uint64_t bus_addr, int on) | ||
299 | { | ||
300 | uint64_t barrier_bit; | ||
301 | |||
302 | /* barrier not supported in M40/M40S mode */ | ||
303 | if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr)) | ||
304 | return bus_addr; | ||
305 | |||
306 | if (TIOCE_D64_ADDR(bus_addr)) | ||
307 | barrier_bit = (1UL << 62); | ||
308 | else /* must be m32 or d32 */ | ||
309 | barrier_bit = (1UL << 30); | ||
310 | |||
311 | return (on) ? (bus_addr | barrier_bit) : (bus_addr & ~barrier_bit); | ||
312 | } | ||
313 | |||
314 | /** | ||
315 | * tioce_dma_unmap - release CE mapping resources | ||
316 | * @pdev: linux pci_dev representing the function | ||
317 | * @bus_addr: bus address returned by an earlier tioce_dma_map | ||
318 | * @dir: mapping direction (unused) | ||
319 | * | ||
320 | * Locate mapping resources associated with @bus_addr and release them. | ||
321 | * For mappings created using the direct modes there are no resources | ||
322 | * to release. | ||
323 | */ | ||
324 | void | ||
325 | tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir) | ||
326 | { | ||
327 | int i; | ||
328 | int port; | ||
329 | struct tioce_kernel *ce_kern; | ||
330 | struct tioce *ce_mmr; | ||
331 | unsigned long flags; | ||
332 | |||
333 | bus_addr = tioce_dma_barrier(bus_addr, 0); | ||
334 | pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port); | ||
335 | |||
336 | /* nothing to do for D64 */ | ||
337 | |||
338 | if (TIOCE_D64_ADDR(bus_addr)) | ||
339 | return; | ||
340 | |||
341 | spin_lock_irqsave(&ce_kern->ce_lock, flags); | ||
342 | |||
343 | if (TIOCE_D32_ADDR(bus_addr)) { | ||
344 | if (--ce_kern->ce_port[port].dirmap_refcnt == 0) { | ||
345 | ce_kern->ce_port[port].dirmap_shadow = 0; | ||
346 | ce_mmr->ce_ure_dir_map[port] = 0; | ||
347 | } | ||
348 | } else { | ||
349 | struct tioce_dmamap *map; | ||
350 | |||
351 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, | ||
352 | ce_dmamap_list) { | ||
353 | uint64_t last; | ||
354 | |||
355 | last = map->pci_start + map->nbytes - 1; | ||
356 | if (bus_addr >= map->pci_start && bus_addr <= last) | ||
357 | break; | ||
358 | } | ||
359 | |||
360 | if (&map->ce_dmamap_list == &ce_kern->ce_dmamap_list) { | ||
361 | printk(KERN_WARNING | ||
362 | "%s: %s - no map found for bus_addr 0x%lx\n", | ||
363 | __FUNCTION__, pci_name(pdev), bus_addr); | ||
364 | } else if (--map->refcnt == 0) { | ||
365 | for (i = 0; i < map->ate_count; i++) { | ||
366 | map->ate_shadow[i] = 0; | ||
367 | map->ate_hw[i] = 0; | ||
368 | } | ||
369 | |||
370 | list_del(&map->ce_dmamap_list); | ||
371 | kfree(map); | ||
372 | } | ||
373 | } | ||
374 | |||
375 | spin_unlock_irqrestore(&ce_kern->ce_lock, flags); | ||
376 | } | ||
377 | |||
378 | /** | ||
379 | * tioce_do_dma_map - map pages for PCI DMA | ||
380 | * @pdev: linux pci_dev representing the function | ||
381 | * @paddr: host physical address to map | ||
382 | * @byte_count: bytes to map | ||
383 | * | ||
384 | * This is the main wrapper for mapping host physical pages to CE PCI space. | ||
385 | * The mapping mode used is based on the device's dma_mask. | ||
386 | */ | ||
387 | static uint64_t | ||
388 | tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count, | ||
389 | int barrier) | ||
390 | { | ||
391 | unsigned long flags; | ||
392 | uint64_t ct_addr; | ||
393 | uint64_t mapaddr = 0; | ||
394 | struct tioce_kernel *ce_kern; | ||
395 | struct tioce_dmamap *map; | ||
396 | int port; | ||
397 | uint64_t dma_mask; | ||
398 | |||
399 | dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask; | ||
400 | |||
401 | /* cards must be able to address at least 31 bits */ | ||
402 | if (dma_mask < 0x7fffffffUL) | ||
403 | return 0; | ||
404 | |||
405 | ct_addr = PHYS_TO_TIODMA(paddr); | ||
406 | |||
407 | /* | ||
408 | * If the device can generate 64 bit addresses, create a D64 map. | ||
409 | * Since this should never fail, bypass the rest of the checks. | ||
410 | */ | ||
411 | if (dma_mask == ~0UL) { | ||
412 | mapaddr = tioce_dma_d64(ct_addr); | ||
413 | goto dma_map_done; | ||
414 | } | ||
415 | |||
416 | pcidev_to_tioce(pdev, NULL, &ce_kern, &port); | ||
417 | |||
418 | spin_lock_irqsave(&ce_kern->ce_lock, flags); | ||
419 | |||
420 | /* | ||
421 | * D64 didn't work ... See if we have an existing map that covers | ||
422 | * this address range. Must account for devices dma_mask here since | ||
423 | * an existing map might have been done in a mode using more pci | ||
424 | * address bits than this device can support. | ||
425 | */ | ||
426 | list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) { | ||
427 | uint64_t last; | ||
428 | |||
429 | last = map->ct_start + map->nbytes - 1; | ||
430 | if (ct_addr >= map->ct_start && | ||
431 | ct_addr + byte_count - 1 <= last && | ||
432 | map->pci_start <= dma_mask) { | ||
433 | map->refcnt++; | ||
434 | mapaddr = map->pci_start + (ct_addr - map->ct_start); | ||
435 | break; | ||
436 | } | ||
437 | } | ||
438 | |||
439 | /* | ||
440 | * If we don't have a map yet, and the card can generate 40 | ||
441 | * bit addresses, try the M40/M40S modes. Note these modes do not | ||
442 | * support a barrier bit, so if we need a consistent map these | ||
443 | * won't work. | ||
444 | */ | ||
445 | if (!mapaddr && !barrier && dma_mask >= 0xffffffffffUL) { | ||
446 | /* | ||
447 | * We have two options for 40-bit mappings: 16GB "super" ATE's | ||
448 | * and 64MB "regular" ATE's. We'll try both if needed for a | ||
449 | * given mapping but which one we try first depends on the | ||
450 | * size. For requests >64MB, prefer to use a super page with | ||
451 | * regular as the fallback. Otherwise, try in the reverse order. | ||
452 | */ | ||
453 | |||
454 | if (byte_count > MB(64)) { | ||
455 | mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40S, | ||
456 | port, ct_addr, byte_count); | ||
457 | if (!mapaddr) | ||
458 | mapaddr = | ||
459 | tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1, | ||
460 | ct_addr, byte_count); | ||
461 | } else { | ||
462 | mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1, | ||
463 | ct_addr, byte_count); | ||
464 | if (!mapaddr) | ||
465 | mapaddr = | ||
466 | tioce_alloc_map(ce_kern, TIOCE_ATE_M40S, | ||
467 | port, ct_addr, byte_count); | ||
468 | } | ||
469 | } | ||
470 | |||
471 | /* | ||
472 | * 32-bit direct is the next mode to try | ||
473 | */ | ||
474 | if (!mapaddr && dma_mask >= 0xffffffffUL) | ||
475 | mapaddr = tioce_dma_d32(pdev, ct_addr); | ||
476 | |||
477 | /* | ||
478 | * Last resort, try 32-bit ATE-based map. | ||
479 | */ | ||
480 | if (!mapaddr) | ||
481 | mapaddr = | ||
482 | tioce_alloc_map(ce_kern, TIOCE_ATE_M32, -1, ct_addr, | ||
483 | byte_count); | ||
484 | |||
485 | spin_unlock_irqrestore(&ce_kern->ce_lock, flags); | ||
486 | |||
487 | dma_map_done: | ||
488 | if (mapaddr & barrier) | ||
489 | mapaddr = tioce_dma_barrier(mapaddr, 1); | ||
490 | |||
491 | return mapaddr; | ||
492 | } | ||
493 | |||
494 | /** | ||
495 | * tioce_dma - standard pci dma map interface | ||
496 | * @pdev: pci device requesting the map | ||
497 | * @paddr: system physical address to map into pci space | ||
498 | * @byte_count: # bytes to map | ||
499 | * | ||
500 | * Simply call tioce_do_dma_map() to create a map with the barrier bit clear | ||
501 | * in the address. | ||
502 | */ | ||
503 | static uint64_t | ||
504 | tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | ||
505 | { | ||
506 | return tioce_do_dma_map(pdev, paddr, byte_count, 0); | ||
507 | } | ||
508 | |||
509 | /** | ||
510 | * tioce_dma_consistent - consistent pci dma map interface | ||
511 | * @pdev: pci device requesting the map | ||
512 | * @paddr: system physical address to map into pci space | ||
513 | * @byte_count: # bytes to map | ||
514 | * | ||
515 | * Simply call tioce_do_dma_map() to create a map with the barrier bit set | ||
516 | * in the address. | ||
517 | */ static uint64_t | ||
518 | tioce_dma_consistent(struct pci_dev *pdev, uint64_t paddr, size_t byte_count) | ||
519 | { | ||
520 | return tioce_do_dma_map(pdev, paddr, byte_count, 1); | ||
521 | } | ||
522 | |||
523 | /** | ||
524 | * tioce_error_intr_handler - SGI TIO CE error interrupt handler | ||
525 | * @irq: unused | ||
526 | * @arg: pointer to tioce_common struct for the given CE | ||
527 | * @pt: unused | ||
528 | * | ||
529 | * Handle a CE error interrupt. Simply a wrapper around a SAL call which | ||
530 | * defers processing to the SGI prom. | ||
531 | */ static irqreturn_t | ||
532 | tioce_error_intr_handler(int irq, void *arg, struct pt_regs *pt) | ||
533 | { | ||
534 | struct tioce_common *soft = arg; | ||
535 | struct ia64_sal_retval ret_stuff; | ||
536 | ret_stuff.status = 0; | ||
537 | ret_stuff.v0 = 0; | ||
538 | |||
539 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_ERROR_INTERRUPT, | ||
540 | soft->ce_pcibus.bs_persist_segment, | ||
541 | soft->ce_pcibus.bs_persist_busnum, 0, 0, 0, 0, 0); | ||
542 | |||
543 | return IRQ_HANDLED; | ||
544 | } | ||
545 | |||
546 | /** | ||
547 | * tioce_kern_init - init kernel structures related to a given TIOCE | ||
548 | * @tioce_common: ptr to a cached tioce_common struct that originated in prom | ||
549 | */ static struct tioce_kernel * | ||
550 | tioce_kern_init(struct tioce_common *tioce_common) | ||
551 | { | ||
552 | int i; | ||
553 | uint32_t tmp; | ||
554 | struct tioce *tioce_mmr; | ||
555 | struct tioce_kernel *tioce_kern; | ||
556 | |||
557 | tioce_kern = kcalloc(1, sizeof(struct tioce_kernel), GFP_KERNEL); | ||
558 | if (!tioce_kern) { | ||
559 | return NULL; | ||
560 | } | ||
561 | |||
562 | tioce_kern->ce_common = tioce_common; | ||
563 | spin_lock_init(&tioce_kern->ce_lock); | ||
564 | INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list); | ||
565 | tioce_common->ce_kernel_private = (uint64_t) tioce_kern; | ||
566 | |||
567 | /* | ||
568 | * Determine the secondary bus number of the port2 logical PPB. | ||
569 | * This is used to decide whether a given pci device resides on | ||
570 | * port1 or port2. Note: We don't have enough plumbing set up | ||
571 | * here to use pci_read_config_xxx() so use the raw_pci_ops vector. | ||
572 | */ | ||
573 | |||
574 | raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment, | ||
575 | tioce_common->ce_pcibus.bs_persist_busnum, | ||
576 | PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp); | ||
577 | tioce_kern->ce_port1_secondary = (uint8_t) tmp; | ||
578 | |||
579 | /* | ||
580 | * Set PMU pagesize to the largest size available, and zero out | ||
581 | * the ate's. | ||
582 | */ | ||
583 | |||
584 | tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base; | ||
585 | tioce_mmr->ce_ure_page_map &= ~CE_URE_PAGESIZE_MASK; | ||
586 | tioce_mmr->ce_ure_page_map |= CE_URE_256K_PAGESIZE; | ||
587 | tioce_kern->ce_ate3240_pagesize = KB(256); | ||
588 | |||
589 | for (i = 0; i < TIOCE_NUM_M40_ATES; i++) { | ||
590 | tioce_kern->ce_ate40_shadow[i] = 0; | ||
591 | tioce_mmr->ce_ure_ate40[i] = 0; | ||
592 | } | ||
593 | |||
594 | for (i = 0; i < TIOCE_NUM_M3240_ATES; i++) { | ||
595 | tioce_kern->ce_ate3240_shadow[i] = 0; | ||
596 | tioce_mmr->ce_ure_ate3240[i] = 0; | ||
597 | } | ||
598 | |||
599 | return tioce_kern; | ||
600 | } | ||
601 | |||
602 | /** | ||
603 | * tioce_force_interrupt - implement altix force_interrupt() backend for CE | ||
604 | * @sn_irq_info: sn asic irq that we need an interrupt generated for | ||
605 | * | ||
606 | * Given an sn_irq_info struct, set the proper bit in ce_adm_force_int to | ||
607 | * force a secondary interrupt to be generated. This is to work around an | ||
608 | * asic issue where there is a small window of opportunity for a legacy device | ||
609 | * interrupt to be lost. | ||
610 | */ | ||
611 | static void | ||
612 | tioce_force_interrupt(struct sn_irq_info *sn_irq_info) | ||
613 | { | ||
614 | struct pcidev_info *pcidev_info; | ||
615 | struct tioce_common *ce_common; | ||
616 | struct tioce *ce_mmr; | ||
617 | uint64_t force_int_val; | ||
618 | |||
619 | if (!sn_irq_info->irq_bridge) | ||
620 | return; | ||
621 | |||
622 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_TIOCE) | ||
623 | return; | ||
624 | |||
625 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | ||
626 | if (!pcidev_info) | ||
627 | return; | ||
628 | |||
629 | ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info; | ||
630 | ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base; | ||
631 | |||
632 | /* | ||
633 | * irq_int_bit is originally set up by prom, and holds the interrupt | ||
634 | * bit shift (not mask) as defined by the bit definitions in the | ||
635 | * ce_adm_int mmr. These shifts are not the same for the | ||
636 | * ce_adm_force_int register, so do an explicit mapping here to make | ||
637 | * things clearer. | ||
638 | */ | ||
639 | |||
640 | switch (sn_irq_info->irq_int_bit) { | ||
641 | case CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT: | ||
642 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT; | ||
643 | break; | ||
644 | case CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT: | ||
645 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT; | ||
646 | break; | ||
647 | case CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT: | ||
648 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT; | ||
649 | break; | ||
650 | case CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT: | ||
651 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT; | ||
652 | break; | ||
653 | case CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT: | ||
654 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT; | ||
655 | break; | ||
656 | case CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT: | ||
657 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT; | ||
658 | break; | ||
659 | case CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT: | ||
660 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT; | ||
661 | break; | ||
662 | case CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT: | ||
663 | force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT; | ||
664 | break; | ||
665 | default: | ||
666 | return; | ||
667 | } | ||
668 | ce_mmr->ce_adm_force_int = force_int_val; | ||
669 | } | ||
670 | |||
671 | /** | ||
672 | * tioce_target_interrupt - implement set_irq_affinity for tioce resident | ||
673 | * functions. Note: only applies to line interrupts, not MSI's. | ||
674 | * | ||
675 | * @sn_irq_info: SN IRQ context | ||
676 | * | ||
677 | * Given an sn_irq_info, set the associated CE device's interrupt destination | ||
678 | * register. Since the interrupt destination registers are on a per-ce-slot | ||
679 | * basis, this will retarget line interrupts for all functions downstream of | ||
680 | * the slot. | ||
681 | */ | ||
682 | static void | ||
683 | tioce_target_interrupt(struct sn_irq_info *sn_irq_info) | ||
684 | { | ||
685 | struct pcidev_info *pcidev_info; | ||
686 | struct tioce_common *ce_common; | ||
687 | struct tioce *ce_mmr; | ||
688 | int bit; | ||
689 | |||
690 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; | ||
691 | if (!pcidev_info) | ||
692 | return; | ||
693 | |||
694 | ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info; | ||
695 | ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base; | ||
696 | |||
697 | bit = sn_irq_info->irq_int_bit; | ||
698 | |||
699 | ce_mmr->ce_adm_int_mask |= (1UL << bit); | ||
700 | ce_mmr->ce_adm_int_dest[bit] = | ||
701 | ((uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT) | | ||
702 | sn_irq_info->irq_xtalkaddr; | ||
703 | ce_mmr->ce_adm_int_mask &= ~(1UL << bit); | ||
704 | |||
705 | tioce_force_interrupt(sn_irq_info); | ||
706 | } | ||
707 | |||
708 | /** | ||
709 | * tioce_bus_fixup - perform final PCI fixup for a TIO CE bus | ||
710 | * @prom_bussoft: Common prom/kernel struct representing the bus | ||
711 | * | ||
712 | * Replicates the tioce_common pointed to by @prom_bussoft in kernel | ||
713 | * space. Allocates and initializes a kernel-only area for a given CE, | ||
714 | * and sets up an irq for handling CE error interrupts. | ||
715 | * | ||
716 | * On successful setup, returns the kernel version of tioce_common back to | ||
717 | * the caller. | ||
718 | */ | ||
719 | static void * | ||
720 | tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) | ||
721 | { | ||
722 | struct tioce_common *tioce_common; | ||
723 | |||
724 | /* | ||
725 | * Allocate kernel bus soft and copy from prom. | ||
726 | */ | ||
727 | |||
728 | tioce_common = kcalloc(1, sizeof(struct tioce_common), GFP_KERNEL); | ||
729 | if (!tioce_common) | ||
730 | return NULL; | ||
731 | |||
732 | memcpy(tioce_common, prom_bussoft, sizeof(struct tioce_common)); | ||
733 | tioce_common->ce_pcibus.bs_base |= __IA64_UNCACHED_OFFSET; | ||
734 | |||
735 | if (tioce_kern_init(tioce_common) == NULL) { | ||
736 | kfree(tioce_common); | ||
737 | return NULL; | ||
738 | } | ||
739 | |||
740 | if (request_irq(SGI_PCIASIC_ERROR, | ||
741 | tioce_error_intr_handler, | ||
742 | SA_SHIRQ, "TIOCE error", (void *)tioce_common)) | ||
743 | printk(KERN_WARNING | ||
744 | "%s: Unable to get irq %d. " | ||
745 | "Error interrupts won't be routed for " | ||
746 | "TIOCE bus %04x:%02x\n", | ||
747 | __FUNCTION__, SGI_PCIASIC_ERROR, | ||
748 | tioce_common->ce_pcibus.bs_persist_segment, | ||
749 | tioce_common->ce_pcibus.bs_persist_busnum); | ||
750 | |||
751 | return tioce_common; | ||
752 | } | ||
753 | |||
754 | static struct sn_pcibus_provider tioce_pci_interfaces = { | ||
755 | .dma_map = tioce_dma, | ||
756 | .dma_map_consistent = tioce_dma_consistent, | ||
757 | .dma_unmap = tioce_dma_unmap, | ||
758 | .bus_fixup = tioce_bus_fixup, | ||
759 | .force_interrupt = tioce_force_interrupt, | ||
760 | .target_interrupt = tioce_target_interrupt | ||
761 | }; | ||
762 | |||
763 | /** | ||
764 | * tioce_init_provider - init SN PCI provider ops for TIO CE | ||
765 | */ | ||
766 | int | ||
767 | tioce_init_provider(void) | ||
768 | { | ||
769 | sn_pci_provider[PCIIO_ASIC_TYPE_TIOCE] = &tioce_pci_interfaces; | ||
770 | return 0; | ||
771 | } | ||
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 117f183f0b43..8520df9cee6d 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig | |||
@@ -71,21 +71,31 @@ config M5206e | |||
71 | help | 71 | help |
72 | Motorola ColdFire 5206e processor support. | 72 | Motorola ColdFire 5206e processor support. |
73 | 73 | ||
74 | config M523x | ||
75 | bool "MCF523x" | ||
76 | help | ||
77 | Freescale Coldfire 5230/1/2/4/5 processor support | ||
78 | |||
74 | config M5249 | 79 | config M5249 |
75 | bool "MCF5249" | 80 | bool "MCF5249" |
76 | help | 81 | help |
77 | Motorola ColdFire 5249 processor support. | 82 | Motorola ColdFire 5249 processor support. |
78 | 83 | ||
79 | config M527x | 84 | config M5271 |
80 | bool "MCF527x" | 85 | bool "MCF5271" |
81 | help | 86 | help |
82 | Freescale (Motorola) ColdFire 5270/5271/5274/5275 processor support. | 87 | Freescale (Motorola) ColdFire 5270/5271 processor support. |
83 | 88 | ||
84 | config M5272 | 89 | config M5272 |
85 | bool "MCF5272" | 90 | bool "MCF5272" |
86 | help | 91 | help |
87 | Motorola ColdFire 5272 processor support. | 92 | Motorola ColdFire 5272 processor support. |
88 | 93 | ||
94 | config M5275 | ||
95 | bool "MCF5275" | ||
96 | help | ||
97 | Freescale (Motorola) ColdFire 5274/5275 processor support. | ||
98 | |||
89 | config M528x | 99 | config M528x |
90 | bool "MCF528x" | 100 | bool "MCF528x" |
91 | help | 101 | help |
@@ -103,9 +113,14 @@ config M5407 | |||
103 | 113 | ||
104 | endchoice | 114 | endchoice |
105 | 115 | ||
116 | config M527x | ||
117 | bool | ||
118 | depends on (M5271 || M5275) | ||
119 | default y | ||
120 | |||
106 | config COLDFIRE | 121 | config COLDFIRE |
107 | bool | 122 | bool |
108 | depends on (M5206 || M5206e || M5249 || M527x || M5272 || M528x || M5307 || M5407) | 123 | depends on (M5206 || M5206e || M523x || M5249 || M527x || M5272 || M528x || M5307 || M5407) |
109 | default y | 124 | default y |
110 | 125 | ||
111 | choice | 126 | choice |
@@ -183,6 +198,11 @@ config CLOCK_60MHz | |||
183 | help | 198 | help |
184 | Select a 60MHz CPU clock frequency. | 199 | Select a 60MHz CPU clock frequency. |
185 | 200 | ||
201 | config CLOCK_62_5MHz | ||
202 | bool "62.5MHz" | ||
203 | help | ||
204 | Select a 62.5MHz CPU clock frequency. | ||
205 | |||
186 | config CLOCK_64MHz | 206 | config CLOCK_64MHz |
187 | bool "64MHz" | 207 | bool "64MHz" |
188 | help | 208 | help |
@@ -302,6 +322,12 @@ config ELITE | |||
302 | help | 322 | help |
303 | Support for the Motorola M5206eLITE board. | 323 | Support for the Motorola M5206eLITE board. |
304 | 324 | ||
325 | config M5235EVB | ||
326 | bool "Freescale M5235EVB support" | ||
327 | depends on M523x | ||
328 | help | ||
329 | Support for the Freescale M5235EVB board. | ||
330 | |||
305 | config M5249C3 | 331 | config M5249C3 |
306 | bool "Motorola M5249C3 board support" | 332 | bool "Motorola M5249C3 board support" |
307 | depends on M5249 | 333 | depends on M5249 |
@@ -310,13 +336,13 @@ config M5249C3 | |||
310 | 336 | ||
311 | config M5271EVB | 337 | config M5271EVB |
312 | bool "Freescale (Motorola) M5271EVB board support" | 338 | bool "Freescale (Motorola) M5271EVB board support" |
313 | depends on M527x | 339 | depends on M5271 |
314 | help | 340 | help |
315 | Support for the Freescale (Motorola) M5271EVB board. | 341 | Support for the Freescale (Motorola) M5271EVB board. |
316 | 342 | ||
317 | config M5275EVB | 343 | config M5275EVB |
318 | bool "Freescale (Motorola) M5275EVB board support" | 344 | bool "Freescale (Motorola) M5275EVB board support" |
319 | depends on M527x | 345 | depends on M5275 |
320 | help | 346 | help |
321 | Support for the Freescale (Motorola) M5275EVB board. | 347 | Support for the Freescale (Motorola) M5275EVB board. |
322 | 348 | ||
@@ -343,6 +369,12 @@ config COBRA5282 | |||
343 | depends on M528x | 369 | depends on M528x |
344 | help | 370 | help |
345 | Support for the senTec COBRA5282 board. | 371 | Support for the senTec COBRA5282 board. |
372 | |||
373 | config SOM5282EM | ||
374 | bool "EMAC.Inc SOM5282EM board support" | ||
375 | depends on M528x | ||
376 | help | ||
377 | Support for the EMAC.Inc SOM5282EM module. | ||
346 | 378 | ||
347 | config ARN5307 | 379 | config ARN5307 |
348 | bool "Arnewsh 5307 board support" | 380 | bool "Arnewsh 5307 board support" |
@@ -410,6 +442,12 @@ config CPU16B | |||
410 | help | 442 | help |
411 | Support for the SNEHA CPU16B board. | 443 | Support for the SNEHA CPU16B board. |
412 | 444 | ||
445 | config MOD5272 | ||
446 | bool "Netburner MOD-5272 board support" | ||
447 | depends on M5272 | ||
448 | help | ||
449 | Support for the Netburner MOD-5272 board. | ||
450 | |||
413 | config ROMFS_FROM_ROM | 451 | config ROMFS_FROM_ROM |
414 | bool " ROMFS image not RAM resident" | 452 | bool " ROMFS image not RAM resident" |
415 | depends on (NETtel || SNAPGEAR) | 453 | depends on (NETtel || SNAPGEAR) |
@@ -430,7 +468,7 @@ config ARNEWSH | |||
430 | config MOTOROLA | 468 | config MOTOROLA |
431 | bool | 469 | bool |
432 | default y | 470 | default y |
433 | depends on (M5206eC3 || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) | 471 | depends on (M5206eC3 || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) |
434 | 472 | ||
435 | config HW_FEITH | 473 | config HW_FEITH |
436 | bool | 474 | bool |
@@ -441,6 +479,11 @@ config senTec | |||
441 | bool | 479 | bool |
442 | default y | 480 | default y |
443 | depends on (COBRA5272 || COBRA5282) | 481 | depends on (COBRA5272 || COBRA5282) |
482 | |||
483 | config EMAC_INC | ||
484 | bool | ||
485 | default y | ||
486 | depends on (SOM5282EM) | ||
444 | 487 | ||
445 | config SNEHA | 488 | config SNEHA |
446 | bool | 489 | bool |
@@ -455,6 +498,15 @@ config LARGE_ALLOCS | |||
455 | a lot of RAM, and you need to able to allocate very large | 498 | a lot of RAM, and you need to able to allocate very large |
456 | contiguous chunks. If unsure, say N. | 499 | contiguous chunks. If unsure, say N. |
457 | 500 | ||
501 | config 4KSTACKS | ||
502 | bool "Use 4Kb for kernel stacks instead of 8Kb" | ||
503 | default y | ||
504 | help | ||
505 | If you say Y here the kernel will use a 4Kb stacksize for the | ||
506 | kernel stack attached to each process/thread. This facilitates | ||
507 | running more threads on a system and also reduces the pressure | ||
508 | on the VM subsystem for higher order allocations. | ||
509 | |||
458 | choice | 510 | choice |
459 | prompt "RAM size" | 511 | prompt "RAM size" |
460 | default AUTO | 512 | default AUTO |
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index a254aa9d4998..97022ed0da38 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile | |||
@@ -14,6 +14,7 @@ platform-$(CONFIG_M68VZ328) := 68VZ328 | |||
14 | platform-$(CONFIG_M68360) := 68360 | 14 | platform-$(CONFIG_M68360) := 68360 |
15 | platform-$(CONFIG_M5206) := 5206 | 15 | platform-$(CONFIG_M5206) := 5206 |
16 | platform-$(CONFIG_M5206e) := 5206e | 16 | platform-$(CONFIG_M5206e) := 5206e |
17 | platform-$(CONFIG_M523x) := 523x | ||
17 | platform-$(CONFIG_M5249) := 5249 | 18 | platform-$(CONFIG_M5249) := 5249 |
18 | platform-$(CONFIG_M527x) := 527x | 19 | platform-$(CONFIG_M527x) := 527x |
19 | platform-$(CONFIG_M5272) := 5272 | 20 | platform-$(CONFIG_M5272) := 5272 |
@@ -29,6 +30,7 @@ board-$(CONFIG_UCQUICC) := uCquicc | |||
29 | board-$(CONFIG_DRAGEN2) := de2 | 30 | board-$(CONFIG_DRAGEN2) := de2 |
30 | board-$(CONFIG_ARNEWSH) := ARNEWSH | 31 | board-$(CONFIG_ARNEWSH) := ARNEWSH |
31 | board-$(CONFIG_MOTOROLA) := MOTOROLA | 32 | board-$(CONFIG_MOTOROLA) := MOTOROLA |
33 | board-$(CONFIG_M5235EVB) := M5235EVB | ||
32 | board-$(CONFIG_M5271EVB) := M5271EVB | 34 | board-$(CONFIG_M5271EVB) := M5271EVB |
33 | board-$(CONFIG_M5275EVB) := M5275EVB | 35 | board-$(CONFIG_M5275EVB) := M5275EVB |
34 | board-$(CONFIG_M5282EVB) := M5282EVB | 36 | board-$(CONFIG_M5282EVB) := M5282EVB |
@@ -39,6 +41,7 @@ board-$(CONFIG_SECUREEDGEMP3) := MP3 | |||
39 | board-$(CONFIG_CLEOPATRA) := CLEOPATRA | 41 | board-$(CONFIG_CLEOPATRA) := CLEOPATRA |
40 | board-$(CONFIG_senTec) := senTec | 42 | board-$(CONFIG_senTec) := senTec |
41 | board-$(CONFIG_SNEHA) := SNEHA | 43 | board-$(CONFIG_SNEHA) := SNEHA |
44 | board-$(CONFIG_MOD5272) := MOD5272 | ||
42 | BOARD := $(board-y) | 45 | BOARD := $(board-y) |
43 | 46 | ||
44 | model-$(CONFIG_RAMKERNEL) := ram | 47 | model-$(CONFIG_RAMKERNEL) := ram |
@@ -53,6 +56,7 @@ MODEL := $(model-y) | |||
53 | # | 56 | # |
54 | cpuclass-$(CONFIG_M5206) := 5307 | 57 | cpuclass-$(CONFIG_M5206) := 5307 |
55 | cpuclass-$(CONFIG_M5206e) := 5307 | 58 | cpuclass-$(CONFIG_M5206e) := 5307 |
59 | cpuclass-$(CONFIG_M523x) := 5307 | ||
56 | cpuclass-$(CONFIG_M5249) := 5307 | 60 | cpuclass-$(CONFIG_M5249) := 5307 |
57 | cpuclass-$(CONFIG_M527x) := 5307 | 61 | cpuclass-$(CONFIG_M527x) := 5307 |
58 | cpuclass-$(CONFIG_M5272) := 5307 | 62 | cpuclass-$(CONFIG_M5272) := 5307 |
@@ -76,6 +80,7 @@ export PLATFORM BOARD MODEL CPUCLASS | |||
76 | # | 80 | # |
77 | cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 | 81 | cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 |
78 | cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 | 82 | cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 |
83 | cflags-$(CONFIG_M523x) := -m5307 -Wa,-S -Wa,-m5307 | ||
79 | cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 | 84 | cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 |
80 | cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 | 85 | cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 |
81 | cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 | 86 | cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 |
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig index e4bd31be966a..87f2d6587c56 100644 --- a/arch/m68knommu/defconfig +++ b/arch/m68knommu/defconfig | |||
@@ -1,24 +1,48 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.13-uc0 | ||
4 | # Wed Aug 31 15:03:26 2005 | ||
3 | # | 5 | # |
6 | CONFIG_M68KNOMMU=y | ||
4 | # CONFIG_MMU is not set | 7 | # CONFIG_MMU is not set |
5 | # CONFIG_FPU is not set | 8 | # CONFIG_FPU is not set |
6 | CONFIG_UID16=y | 9 | CONFIG_UID16=y |
7 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
8 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | 11 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set |
12 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
9 | 13 | ||
10 | # | 14 | # |
11 | # Code maturity level options | 15 | # Code maturity level options |
12 | # | 16 | # |
13 | CONFIG_EXPERIMENTAL=y | 17 | CONFIG_EXPERIMENTAL=y |
18 | CONFIG_CLEAN_COMPILE=y | ||
19 | CONFIG_BROKEN_ON_SMP=y | ||
20 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
14 | 21 | ||
15 | # | 22 | # |
16 | # General setup | 23 | # General setup |
17 | # | 24 | # |
18 | # CONFIG_SYSVIPC is not set | 25 | CONFIG_LOCALVERSION="" |
26 | # CONFIG_POSIX_MQUEUE is not set | ||
19 | # CONFIG_BSD_PROCESS_ACCT is not set | 27 | # CONFIG_BSD_PROCESS_ACCT is not set |
20 | # CONFIG_SYSCTL is not set | 28 | # CONFIG_SYSCTL is not set |
21 | CONFIG_LOG_BUF_SHIFT=14 | 29 | # CONFIG_AUDIT is not set |
30 | # CONFIG_HOTPLUG is not set | ||
31 | # CONFIG_KOBJECT_UEVENT is not set | ||
32 | # CONFIG_IKCONFIG is not set | ||
33 | CONFIG_EMBEDDED=y | ||
34 | # CONFIG_KALLSYMS is not set | ||
35 | CONFIG_PRINTK=y | ||
36 | CONFIG_BUG=y | ||
37 | CONFIG_BASE_FULL=y | ||
38 | # CONFIG_FUTEX is not set | ||
39 | # CONFIG_EPOLL is not set | ||
40 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
41 | CONFIG_CC_ALIGN_FUNCTIONS=0 | ||
42 | CONFIG_CC_ALIGN_LABELS=0 | ||
43 | CONFIG_CC_ALIGN_LOOPS=0 | ||
44 | CONFIG_CC_ALIGN_JUMPS=0 | ||
45 | CONFIG_BASE_SMALL=0 | ||
22 | 46 | ||
23 | # | 47 | # |
24 | # Loadable module support | 48 | # Loadable module support |
@@ -34,9 +58,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
34 | # CONFIG_M68360 is not set | 58 | # CONFIG_M68360 is not set |
35 | # CONFIG_M5206 is not set | 59 | # CONFIG_M5206 is not set |
36 | # CONFIG_M5206e is not set | 60 | # CONFIG_M5206e is not set |
61 | # CONFIG_M523x is not set | ||
37 | # CONFIG_M5249 is not set | 62 | # CONFIG_M5249 is not set |
38 | # CONFIG_M527x is not set | 63 | # CONFIG_M5271 is not set |
39 | CONFIG_M5272=y | 64 | CONFIG_M5272=y |
65 | # CONFIG_M5275 is not set | ||
40 | # CONFIG_M528x is not set | 66 | # CONFIG_M528x is not set |
41 | # CONFIG_M5307 is not set | 67 | # CONFIG_M5307 is not set |
42 | # CONFIG_M5407 is not set | 68 | # CONFIG_M5407 is not set |
@@ -54,6 +80,8 @@ CONFIG_COLDFIRE=y | |||
54 | # CONFIG_CLOCK_50MHz is not set | 80 | # CONFIG_CLOCK_50MHz is not set |
55 | # CONFIG_CLOCK_54MHz is not set | 81 | # CONFIG_CLOCK_54MHz is not set |
56 | # CONFIG_CLOCK_60MHz is not set | 82 | # CONFIG_CLOCK_60MHz is not set |
83 | # CONFIG_CLOCK_62_5MHz is not set | ||
84 | # CONFIG_CLOCK_64MHz is not set | ||
57 | CONFIG_CLOCK_66MHz=y | 85 | CONFIG_CLOCK_66MHz=y |
58 | # CONFIG_CLOCK_70MHz is not set | 86 | # CONFIG_CLOCK_70MHz is not set |
59 | # CONFIG_CLOCK_100MHz is not set | 87 | # CONFIG_CLOCK_100MHz is not set |
@@ -65,13 +93,19 @@ CONFIG_CLOCK_66MHz=y | |||
65 | # Platform | 93 | # Platform |
66 | # | 94 | # |
67 | CONFIG_M5272C3=y | 95 | CONFIG_M5272C3=y |
96 | # CONFIG_COBRA5272 is not set | ||
97 | # CONFIG_CANCam is not set | ||
98 | # CONFIG_SCALES is not set | ||
68 | # CONFIG_NETtel is not set | 99 | # CONFIG_NETtel is not set |
100 | # CONFIG_CPU16B is not set | ||
101 | # CONFIG_MOD5272 is not set | ||
69 | CONFIG_MOTOROLA=y | 102 | CONFIG_MOTOROLA=y |
70 | # CONFIG_LARGE_ALLOCS is not set | 103 | # CONFIG_LARGE_ALLOCS is not set |
71 | # CONFIG_RAMAUTO is not set | 104 | CONFIG_4KSTACKS=y |
105 | CONFIG_RAMAUTO=y | ||
72 | # CONFIG_RAM4MB is not set | 106 | # CONFIG_RAM4MB is not set |
73 | # CONFIG_RAM8MB is not set | 107 | # CONFIG_RAM8MB is not set |
74 | CONFIG_RAM16MB=y | 108 | # CONFIG_RAM16MB is not set |
75 | # CONFIG_RAM32MB is not set | 109 | # CONFIG_RAM32MB is not set |
76 | CONFIG_RAMAUTOBIT=y | 110 | CONFIG_RAMAUTOBIT=y |
77 | # CONFIG_RAM8BIT is not set | 111 | # CONFIG_RAM8BIT is not set |
@@ -79,20 +113,34 @@ CONFIG_RAMAUTOBIT=y | |||
79 | # CONFIG_RAM32BIT is not set | 113 | # CONFIG_RAM32BIT is not set |
80 | CONFIG_RAMKERNEL=y | 114 | CONFIG_RAMKERNEL=y |
81 | # CONFIG_ROMKERNEL is not set | 115 | # CONFIG_ROMKERNEL is not set |
82 | # CONFIG_HIMEMKERNEL is not set | 116 | CONFIG_SELECT_MEMORY_MODEL=y |
117 | CONFIG_FLATMEM_MANUAL=y | ||
118 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
119 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
120 | CONFIG_FLATMEM=y | ||
121 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
83 | 122 | ||
84 | # | 123 | # |
85 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | 124 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) |
86 | # | 125 | # |
87 | # CONFIG_PCI is not set | 126 | # CONFIG_PCI is not set |
88 | # CONFIG_HOTPLUG is not set | 127 | |
128 | # | ||
129 | # PCCARD (PCMCIA/CardBus) support | ||
130 | # | ||
131 | # CONFIG_PCCARD is not set | ||
132 | |||
133 | # | ||
134 | # PCI Hotplug Support | ||
135 | # | ||
89 | 136 | ||
90 | # | 137 | # |
91 | # Executable file formats | 138 | # Executable file formats |
92 | # | 139 | # |
93 | CONFIG_KCORE_AOUT=y | ||
94 | CONFIG_BINFMT_FLAT=y | 140 | CONFIG_BINFMT_FLAT=y |
95 | # CONFIG_BINFMT_ZFLAT is not set | 141 | # CONFIG_BINFMT_ZFLAT is not set |
142 | # CONFIG_BINFMT_SHARED_FLAT is not set | ||
143 | # CONFIG_BINFMT_MISC is not set | ||
96 | 144 | ||
97 | # | 145 | # |
98 | # Power management options | 146 | # Power management options |
@@ -100,12 +148,82 @@ CONFIG_BINFMT_FLAT=y | |||
100 | # CONFIG_PM is not set | 148 | # CONFIG_PM is not set |
101 | 149 | ||
102 | # | 150 | # |
151 | # Networking | ||
152 | # | ||
153 | CONFIG_NET=y | ||
154 | |||
155 | # | ||
156 | # Networking options | ||
157 | # | ||
158 | CONFIG_PACKET=y | ||
159 | # CONFIG_PACKET_MMAP is not set | ||
160 | CONFIG_UNIX=y | ||
161 | # CONFIG_NET_KEY is not set | ||
162 | CONFIG_INET=y | ||
163 | # CONFIG_IP_MULTICAST is not set | ||
164 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
165 | CONFIG_IP_FIB_HASH=y | ||
166 | # CONFIG_IP_PNP is not set | ||
167 | # CONFIG_NET_IPIP is not set | ||
168 | # CONFIG_NET_IPGRE is not set | ||
169 | # CONFIG_ARPD is not set | ||
170 | # CONFIG_SYN_COOKIES is not set | ||
171 | # CONFIG_INET_AH is not set | ||
172 | # CONFIG_INET_ESP is not set | ||
173 | # CONFIG_INET_IPCOMP is not set | ||
174 | # CONFIG_INET_TUNNEL is not set | ||
175 | # CONFIG_IP_TCPDIAG is not set | ||
176 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
177 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
178 | CONFIG_TCP_CONG_BIC=y | ||
179 | # CONFIG_IPV6 is not set | ||
180 | # CONFIG_NETFILTER is not set | ||
181 | |||
182 | # | ||
183 | # SCTP Configuration (EXPERIMENTAL) | ||
184 | # | ||
185 | # CONFIG_IP_SCTP is not set | ||
186 | # CONFIG_ATM is not set | ||
187 | # CONFIG_BRIDGE is not set | ||
188 | # CONFIG_VLAN_8021Q is not set | ||
189 | # CONFIG_DECNET is not set | ||
190 | # CONFIG_LLC2 is not set | ||
191 | # CONFIG_IPX is not set | ||
192 | # CONFIG_ATALK is not set | ||
193 | # CONFIG_X25 is not set | ||
194 | # CONFIG_LAPB is not set | ||
195 | # CONFIG_NET_DIVERT is not set | ||
196 | # CONFIG_ECONET is not set | ||
197 | # CONFIG_WAN_ROUTER is not set | ||
198 | # CONFIG_NET_SCHED is not set | ||
199 | # CONFIG_NET_CLS_ROUTE is not set | ||
200 | |||
201 | # | ||
202 | # Network testing | ||
203 | # | ||
204 | # CONFIG_NET_PKTGEN is not set | ||
205 | # CONFIG_HAMRADIO is not set | ||
206 | # CONFIG_IRDA is not set | ||
207 | # CONFIG_BT is not set | ||
208 | |||
209 | # | ||
210 | # Device Drivers | ||
211 | # | ||
212 | |||
213 | # | ||
214 | # Generic Driver Options | ||
215 | # | ||
216 | CONFIG_STANDALONE=y | ||
217 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
218 | # CONFIG_FW_LOADER is not set | ||
219 | |||
220 | # | ||
103 | # Memory Technology Devices (MTD) | 221 | # Memory Technology Devices (MTD) |
104 | # | 222 | # |
105 | CONFIG_MTD=y | 223 | CONFIG_MTD=y |
106 | # CONFIG_MTD_DEBUG is not set | 224 | # CONFIG_MTD_DEBUG is not set |
107 | CONFIG_MTD_PARTITIONS=y | ||
108 | # CONFIG_MTD_CONCAT is not set | 225 | # CONFIG_MTD_CONCAT is not set |
226 | CONFIG_MTD_PARTITIONS=y | ||
109 | # CONFIG_MTD_REDBOOT_PARTS is not set | 227 | # CONFIG_MTD_REDBOOT_PARTS is not set |
110 | # CONFIG_MTD_CMDLINE_PARTS is not set | 228 | # CONFIG_MTD_CMDLINE_PARTS is not set |
111 | 229 | ||
@@ -116,35 +234,50 @@ CONFIG_MTD_CHAR=y | |||
116 | CONFIG_MTD_BLOCK=y | 234 | CONFIG_MTD_BLOCK=y |
117 | # CONFIG_FTL is not set | 235 | # CONFIG_FTL is not set |
118 | # CONFIG_NFTL is not set | 236 | # CONFIG_NFTL is not set |
237 | # CONFIG_INFTL is not set | ||
119 | 238 | ||
120 | # | 239 | # |
121 | # RAM/ROM/Flash chip drivers | 240 | # RAM/ROM/Flash chip drivers |
122 | # | 241 | # |
123 | # CONFIG_MTD_CFI is not set | 242 | # CONFIG_MTD_CFI is not set |
124 | # CONFIG_MTD_JEDECPROBE is not set | 243 | # CONFIG_MTD_JEDECPROBE is not set |
244 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
245 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
246 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
247 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
248 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
249 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
250 | CONFIG_MTD_CFI_I1=y | ||
251 | CONFIG_MTD_CFI_I2=y | ||
252 | # CONFIG_MTD_CFI_I4 is not set | ||
253 | # CONFIG_MTD_CFI_I8 is not set | ||
125 | CONFIG_MTD_RAM=y | 254 | CONFIG_MTD_RAM=y |
126 | # CONFIG_MTD_ROM is not set | 255 | # CONFIG_MTD_ROM is not set |
127 | # CONFIG_MTD_ABSENT is not set | 256 | # CONFIG_MTD_ABSENT is not set |
128 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
129 | 257 | ||
130 | # | 258 | # |
131 | # Mapping drivers for chip access | 259 | # Mapping drivers for chip access |
132 | # | 260 | # |
261 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
133 | CONFIG_MTD_UCLINUX=y | 262 | CONFIG_MTD_UCLINUX=y |
263 | # CONFIG_MTD_SNAPGEARuC is not set | ||
264 | # CONFIG_MTD_PLATRAM is not set | ||
134 | 265 | ||
135 | # | 266 | # |
136 | # Self-contained MTD device drivers | 267 | # Self-contained MTD device drivers |
137 | # | 268 | # |
138 | # CONFIG_MTD_SLRAM is not set | 269 | # CONFIG_MTD_SLRAM is not set |
270 | # CONFIG_MTD_PHRAM is not set | ||
139 | # CONFIG_MTD_MTDRAM is not set | 271 | # CONFIG_MTD_MTDRAM is not set |
140 | # CONFIG_MTD_BLKMTD is not set | 272 | # CONFIG_MTD_BLKMTD is not set |
273 | # CONFIG_MTD_BLOCK2MTD is not set | ||
141 | 274 | ||
142 | # | 275 | # |
143 | # Disk-On-Chip Device Drivers | 276 | # Disk-On-Chip Device Drivers |
144 | # | 277 | # |
145 | # CONFIG_MTD_DOC1000 is not set | ||
146 | # CONFIG_MTD_DOC2000 is not set | 278 | # CONFIG_MTD_DOC2000 is not set |
147 | # CONFIG_MTD_DOC2001 is not set | 279 | # CONFIG_MTD_DOC2001 is not set |
280 | # CONFIG_MTD_DOC2001PLUS is not set | ||
148 | 281 | ||
149 | # | 282 | # |
150 | # NAND Flash Device Drivers | 283 | # NAND Flash Device Drivers |
@@ -159,21 +292,32 @@ CONFIG_MTD_UCLINUX=y | |||
159 | # | 292 | # |
160 | # Plug and Play support | 293 | # Plug and Play support |
161 | # | 294 | # |
162 | # CONFIG_PNP is not set | ||
163 | 295 | ||
164 | # | 296 | # |
165 | # Block devices | 297 | # Block devices |
166 | # | 298 | # |
167 | # CONFIG_BLK_DEV_FD is not set | 299 | # CONFIG_BLK_DEV_FD is not set |
300 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
168 | # CONFIG_BLK_DEV_LOOP is not set | 301 | # CONFIG_BLK_DEV_LOOP is not set |
169 | # CONFIG_BLK_DEV_NBD is not set | 302 | # CONFIG_BLK_DEV_NBD is not set |
170 | CONFIG_BLK_DEV_RAM=y | 303 | CONFIG_BLK_DEV_RAM=y |
304 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
171 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 305 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
172 | # CONFIG_BLK_DEV_INITRD is not set | 306 | # CONFIG_BLK_DEV_INITRD is not set |
173 | # CONFIG_BLK_DEV_BLKMEM is not set | 307 | CONFIG_INITRAMFS_SOURCE="" |
308 | # CONFIG_CDROM_PKTCDVD is not set | ||
174 | 309 | ||
175 | # | 310 | # |
176 | # ATA/IDE/MFM/RLL support | 311 | # IO Schedulers |
312 | # | ||
313 | CONFIG_IOSCHED_NOOP=y | ||
314 | # CONFIG_IOSCHED_AS is not set | ||
315 | # CONFIG_IOSCHED_DEADLINE is not set | ||
316 | # CONFIG_IOSCHED_CFQ is not set | ||
317 | # CONFIG_ATA_OVER_ETH is not set | ||
318 | |||
319 | # | ||
320 | # ATA/ATAPI/MFM/RLL support | ||
177 | # | 321 | # |
178 | # CONFIG_IDE is not set | 322 | # CONFIG_IDE is not set |
179 | 323 | ||
@@ -190,249 +334,230 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
190 | # | 334 | # |
191 | # Fusion MPT device support | 335 | # Fusion MPT device support |
192 | # | 336 | # |
337 | # CONFIG_FUSION is not set | ||
193 | 338 | ||
194 | # | 339 | # |
195 | # I2O device support | 340 | # IEEE 1394 (FireWire) support |
196 | # | ||
197 | |||
198 | # | ||
199 | # Networking support | ||
200 | # | ||
201 | CONFIG_NET=y | ||
202 | |||
203 | # | ||
204 | # Networking options | ||
205 | # | ||
206 | CONFIG_PACKET=y | ||
207 | # CONFIG_PACKET_MMAP is not set | ||
208 | # CONFIG_NETLINK_DEV is not set | ||
209 | # CONFIG_NETFILTER is not set | ||
210 | # CONFIG_FILTER is not set | ||
211 | CONFIG_UNIX=y | ||
212 | # CONFIG_NET_KEY is not set | ||
213 | CONFIG_INET=y | ||
214 | # CONFIG_IP_MULTICAST is not set | ||
215 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
216 | # CONFIG_IP_PNP is not set | ||
217 | # CONFIG_NET_IPIP is not set | ||
218 | # CONFIG_NET_IPGRE is not set | ||
219 | # CONFIG_ARPD is not set | ||
220 | # CONFIG_INET_ECN is not set | ||
221 | # CONFIG_SYN_COOKIES is not set | ||
222 | # CONFIG_INET_AH is not set | ||
223 | # CONFIG_INET_ESP is not set | ||
224 | # CONFIG_XFRM_USER is not set | ||
225 | # CONFIG_IPV6 is not set | ||
226 | |||
227 | # | ||
228 | # SCTP Configuration (EXPERIMENTAL) | ||
229 | # | 341 | # |
230 | CONFIG_IPV6_SCTP__=y | ||
231 | # CONFIG_IP_SCTP is not set | ||
232 | # CONFIG_ATM is not set | ||
233 | # CONFIG_VLAN_8021Q is not set | ||
234 | # CONFIG_LLC is not set | ||
235 | # CONFIG_DECNET is not set | ||
236 | # CONFIG_BRIDGE is not set | ||
237 | # CONFIG_X25 is not set | ||
238 | # CONFIG_LAPB is not set | ||
239 | # CONFIG_NET_DIVERT is not set | ||
240 | # CONFIG_ECONET is not set | ||
241 | # CONFIG_WAN_ROUTER is not set | ||
242 | # CONFIG_NET_HW_FLOWCONTROL is not set | ||
243 | 342 | ||
244 | # | 343 | # |
245 | # QoS and/or fair queueing | 344 | # I2O device support |
246 | # | 345 | # |
247 | # CONFIG_NET_SCHED is not set | ||
248 | 346 | ||
249 | # | 347 | # |
250 | # Network testing | 348 | # Network device support |
251 | # | 349 | # |
252 | # CONFIG_NET_PKTGEN is not set | ||
253 | CONFIG_NETDEVICES=y | 350 | CONFIG_NETDEVICES=y |
254 | # CONFIG_DUMMY is not set | 351 | # CONFIG_DUMMY is not set |
255 | # CONFIG_BONDING is not set | 352 | # CONFIG_BONDING is not set |
256 | # CONFIG_EQUALIZER is not set | 353 | # CONFIG_EQUALIZER is not set |
257 | # CONFIG_TUN is not set | 354 | # CONFIG_TUN is not set |
258 | # CONFIG_ETHERTAP is not set | ||
259 | 355 | ||
260 | # | 356 | # |
261 | # Ethernet (10 or 100Mbit) | 357 | # Ethernet (10 or 100Mbit) |
262 | # | 358 | # |
263 | CONFIG_NET_ETHERNET=y | 359 | CONFIG_NET_ETHERNET=y |
264 | # CONFIG_MII is not set | 360 | # CONFIG_MII is not set |
361 | # CONFIG_NET_VENDOR_SMC is not set | ||
362 | # CONFIG_NE2000 is not set | ||
363 | # CONFIG_NET_PCI is not set | ||
265 | CONFIG_FEC=y | 364 | CONFIG_FEC=y |
365 | # CONFIG_FEC2 is not set | ||
266 | 366 | ||
267 | # | 367 | # |
268 | # Ethernet (1000 Mbit) | 368 | # Ethernet (1000 Mbit) |
269 | # | 369 | # |
370 | |||
371 | # | ||
372 | # Ethernet (10000 Mbit) | ||
373 | # | ||
374 | |||
375 | # | ||
376 | # Token Ring devices | ||
377 | # | ||
378 | |||
379 | # | ||
380 | # Wireless LAN (non-hamradio) | ||
381 | # | ||
382 | # CONFIG_NET_RADIO is not set | ||
383 | |||
384 | # | ||
385 | # Wan interfaces | ||
386 | # | ||
387 | # CONFIG_WAN is not set | ||
270 | CONFIG_PPP=y | 388 | CONFIG_PPP=y |
271 | # CONFIG_PPP_MULTILINK is not set | 389 | # CONFIG_PPP_MULTILINK is not set |
390 | # CONFIG_PPP_FILTER is not set | ||
272 | # CONFIG_PPP_ASYNC is not set | 391 | # CONFIG_PPP_ASYNC is not set |
273 | # CONFIG_PPP_SYNC_TTY is not set | 392 | # CONFIG_PPP_SYNC_TTY is not set |
274 | # CONFIG_PPP_DEFLATE is not set | 393 | # CONFIG_PPP_DEFLATE is not set |
275 | # CONFIG_PPP_BSDCOMP is not set | 394 | # CONFIG_PPP_BSDCOMP is not set |
276 | # CONFIG_PPPOE is not set | 395 | # CONFIG_PPPOE is not set |
277 | # CONFIG_SLIP is not set | 396 | # CONFIG_SLIP is not set |
397 | # CONFIG_SHAPER is not set | ||
398 | # CONFIG_NETCONSOLE is not set | ||
399 | # CONFIG_NETPOLL is not set | ||
400 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
278 | 401 | ||
279 | # | 402 | # |
280 | # Wireless LAN (non-hamradio) | 403 | # ISDN subsystem |
281 | # | 404 | # |
282 | # CONFIG_NET_RADIO is not set | 405 | # CONFIG_ISDN is not set |
283 | 406 | ||
284 | # | 407 | # |
285 | # Token Ring devices (depends on LLC=y) | 408 | # Telephony Support |
286 | # | 409 | # |
287 | # CONFIG_SHAPER is not set | 410 | # CONFIG_PHONE is not set |
288 | 411 | ||
289 | # | 412 | # |
290 | # Wan interfaces | 413 | # Input device support |
291 | # | 414 | # |
292 | # CONFIG_WAN is not set | 415 | # CONFIG_INPUT is not set |
293 | 416 | ||
294 | # | 417 | # |
295 | # Amateur Radio support | 418 | # Hardware I/O ports |
296 | # | 419 | # |
297 | # CONFIG_HAMRADIO is not set | 420 | # CONFIG_SERIO is not set |
421 | # CONFIG_GAMEPORT is not set | ||
298 | 422 | ||
299 | # | 423 | # |
300 | # IrDA (infrared) support | 424 | # Character devices |
301 | # | 425 | # |
302 | # CONFIG_IRDA is not set | 426 | # CONFIG_VT is not set |
427 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
428 | # CONFIG_LEDMAN is not set | ||
429 | # CONFIG_RESETSWITCH is not set | ||
303 | 430 | ||
304 | # | 431 | # |
305 | # ISDN subsystem | 432 | # Serial drivers |
306 | # | 433 | # |
307 | # CONFIG_ISDN_BOOL is not set | 434 | # CONFIG_SERIAL_8250 is not set |
308 | 435 | ||
309 | # | 436 | # |
310 | # Telephony Support | 437 | # Non-8250 serial port support |
311 | # | 438 | # |
312 | # CONFIG_PHONE is not set | 439 | CONFIG_SERIAL_COLDFIRE=y |
440 | # CONFIG_UNIX98_PTYS is not set | ||
441 | CONFIG_LEGACY_PTYS=y | ||
442 | CONFIG_LEGACY_PTY_COUNT=256 | ||
313 | 443 | ||
314 | # | 444 | # |
315 | # Input device support | 445 | # IPMI |
316 | # | 446 | # |
317 | CONFIG_INPUT=y | 447 | # CONFIG_IPMI_HANDLER is not set |
318 | 448 | ||
319 | # | 449 | # |
320 | # Userland interfaces | 450 | # Watchdog Cards |
321 | # | 451 | # |
322 | CONFIG_INPUT_MOUSEDEV=y | 452 | # CONFIG_WATCHDOG is not set |
323 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | 453 | # CONFIG_MCFWATCHDOG is not set |
324 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 454 | # CONFIG_RTC is not set |
325 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 455 | # CONFIG_GEN_RTC is not set |
326 | # CONFIG_INPUT_JOYDEV is not set | 456 | # CONFIG_DTLK is not set |
327 | # CONFIG_INPUT_TSDEV is not set | 457 | # CONFIG_R3964 is not set |
328 | # CONFIG_INPUT_EVDEV is not set | ||
329 | # CONFIG_INPUT_EVBUG is not set | ||
330 | 458 | ||
331 | # | 459 | # |
332 | # Input I/O drivers | 460 | # Ftape, the floppy tape device driver |
333 | # | 461 | # |
334 | # CONFIG_GAMEPORT is not set | 462 | # CONFIG_RAW_DRIVER is not set |
335 | CONFIG_SOUND_GAMEPORT=y | ||
336 | CONFIG_SERIO=y | ||
337 | CONFIG_SERIO_I8042=y | ||
338 | CONFIG_SERIO_SERPORT=y | ||
339 | # CONFIG_SERIO_CT82C710 is not set | ||
340 | 463 | ||
341 | # | 464 | # |
342 | # Input Device Drivers | 465 | # TPM devices |
343 | # | 466 | # |
344 | CONFIG_INPUT_KEYBOARD=y | 467 | # CONFIG_MCF_QSPI is not set |
345 | CONFIG_KEYBOARD_ATKBD=y | 468 | # CONFIG_M41T11M6 is not set |
346 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
347 | # CONFIG_KEYBOARD_XTKBD is not set | ||
348 | # CONFIG_KEYBOARD_NEWTON is not set | ||
349 | CONFIG_INPUT_MOUSE=y | ||
350 | CONFIG_MOUSE_PS2=y | ||
351 | # CONFIG_MOUSE_SERIAL is not set | ||
352 | # CONFIG_INPUT_JOYSTICK is not set | ||
353 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
354 | # CONFIG_INPUT_MISC is not set | ||
355 | 469 | ||
356 | # | 470 | # |
357 | # Character devices | 471 | # I2C support |
358 | # | 472 | # |
359 | # CONFIG_VT is not set | 473 | # CONFIG_I2C is not set |
360 | # CONFIG_SERIAL_NONSTANDARD is not set | 474 | # CONFIG_I2C_SENSOR is not set |
361 | # CONFIG_RESETSWITCH is not set | ||
362 | 475 | ||
363 | # | 476 | # |
364 | # Serial drivers | 477 | # Dallas's 1-wire bus |
365 | # | 478 | # |
366 | # CONFIG_SERIAL_8250 is not set | 479 | # CONFIG_W1 is not set |
367 | 480 | ||
368 | # | 481 | # |
369 | # Non-8250 serial port support | 482 | # Hardware Monitoring support |
370 | # | 483 | # |
371 | CONFIG_SERIAL_COLDFIRE=y | 484 | # CONFIG_HWMON is not set |
372 | # CONFIG_UNIX98_PTYS is not set | ||
373 | 485 | ||
374 | # | 486 | # |
375 | # I2C support | 487 | # Misc devices |
376 | # | 488 | # |
377 | # CONFIG_I2C is not set | ||
378 | 489 | ||
379 | # | 490 | # |
380 | # I2C Hardware Sensors Mainboard support | 491 | # Multimedia devices |
381 | # | 492 | # |
493 | # CONFIG_VIDEO_DEV is not set | ||
382 | 494 | ||
383 | # | 495 | # |
384 | # I2C Hardware Sensors Chip support | 496 | # Digital Video Broadcasting Devices |
385 | # | 497 | # |
498 | # CONFIG_DVB is not set | ||
386 | 499 | ||
387 | # | 500 | # |
388 | # Mice | 501 | # Graphics support |
389 | # | 502 | # |
390 | # CONFIG_BUSMOUSE is not set | 503 | # CONFIG_FB is not set |
391 | # CONFIG_QIC02_TAPE is not set | ||
392 | 504 | ||
393 | # | 505 | # |
394 | # IPMI | 506 | # SPI support |
395 | # | 507 | # |
396 | # CONFIG_IPMI_HANDLER is not set | 508 | # CONFIG_SPI is not set |
397 | 509 | ||
398 | # | 510 | # |
399 | # Watchdog Cards | 511 | # Sound |
400 | # | 512 | # |
401 | # CONFIG_WATCHDOG is not set | 513 | # CONFIG_SOUND is not set |
402 | # CONFIG_NVRAM is not set | ||
403 | # CONFIG_RTC is not set | ||
404 | # CONFIG_GEN_RTC is not set | ||
405 | # CONFIG_DTLK is not set | ||
406 | # CONFIG_R3964 is not set | ||
407 | # CONFIG_APPLICOM is not set | ||
408 | 514 | ||
409 | # | 515 | # |
410 | # Ftape, the floppy tape device driver | 516 | # USB support |
411 | # | 517 | # |
412 | # CONFIG_FTAPE is not set | 518 | # CONFIG_USB_ARCH_HAS_HCD is not set |
413 | # CONFIG_AGP is not set | 519 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
414 | # CONFIG_DRM is not set | ||
415 | # CONFIG_RAW_DRIVER is not set | ||
416 | # CONFIG_HANGCHECK_TIMER is not set | ||
417 | 520 | ||
418 | # | 521 | # |
419 | # Multimedia devices | 522 | # USB Gadget Support |
523 | # | ||
524 | # CONFIG_USB_GADGET is not set | ||
525 | |||
526 | # | ||
527 | # MMC/SD Card support | ||
528 | # | ||
529 | # CONFIG_MMC is not set | ||
530 | |||
531 | # | ||
532 | # InfiniBand support | ||
533 | # | ||
534 | |||
535 | # | ||
536 | # SN Devices | ||
420 | # | 537 | # |
421 | # CONFIG_VIDEO_DEV is not set | ||
422 | 538 | ||
423 | # | 539 | # |
424 | # File systems | 540 | # File systems |
425 | # | 541 | # |
426 | CONFIG_EXT2_FS=y | 542 | CONFIG_EXT2_FS=y |
427 | # CONFIG_EXT2_FS_XATTR is not set | 543 | # CONFIG_EXT2_FS_XATTR is not set |
544 | # CONFIG_EXT2_FS_XIP is not set | ||
428 | # CONFIG_EXT3_FS is not set | 545 | # CONFIG_EXT3_FS is not set |
429 | # CONFIG_JBD is not set | 546 | # CONFIG_JBD is not set |
430 | # CONFIG_REISERFS_FS is not set | 547 | # CONFIG_REISERFS_FS is not set |
431 | # CONFIG_JFS_FS is not set | 548 | # CONFIG_JFS_FS is not set |
549 | # CONFIG_FS_POSIX_ACL is not set | ||
550 | |||
551 | # | ||
552 | # XFS support | ||
553 | # | ||
432 | # CONFIG_XFS_FS is not set | 554 | # CONFIG_XFS_FS is not set |
433 | # CONFIG_MINIX_FS is not set | 555 | # CONFIG_MINIX_FS is not set |
434 | CONFIG_ROMFS_FS=y | 556 | CONFIG_ROMFS_FS=y |
557 | CONFIG_MAGIC_ROM_PTR=y | ||
558 | # CONFIG_INOTIFY is not set | ||
435 | # CONFIG_QUOTA is not set | 559 | # CONFIG_QUOTA is not set |
560 | # CONFIG_DNOTIFY is not set | ||
436 | # CONFIG_AUTOFS_FS is not set | 561 | # CONFIG_AUTOFS_FS is not set |
437 | # CONFIG_AUTOFS4_FS is not set | 562 | # CONFIG_AUTOFS4_FS is not set |
438 | 563 | ||
@@ -445,15 +570,17 @@ CONFIG_ROMFS_FS=y | |||
445 | # | 570 | # |
446 | # DOS/FAT/NT Filesystems | 571 | # DOS/FAT/NT Filesystems |
447 | # | 572 | # |
448 | # CONFIG_FAT_FS is not set | 573 | # CONFIG_MSDOS_FS is not set |
574 | # CONFIG_VFAT_FS is not set | ||
449 | # CONFIG_NTFS_FS is not set | 575 | # CONFIG_NTFS_FS is not set |
450 | 576 | ||
451 | # | 577 | # |
452 | # Pseudo filesystems | 578 | # Pseudo filesystems |
453 | # | 579 | # |
454 | CONFIG_PROC_FS=y | 580 | CONFIG_PROC_FS=y |
455 | # CONFIG_DEVFS_FS is not set | 581 | CONFIG_SYSFS=y |
456 | # CONFIG_TMPFS is not set | 582 | # CONFIG_TMPFS is not set |
583 | # CONFIG_HUGETLB_PAGE is not set | ||
457 | CONFIG_RAMFS=y | 584 | CONFIG_RAMFS=y |
458 | 585 | ||
459 | # | 586 | # |
@@ -462,6 +589,7 @@ CONFIG_RAMFS=y | |||
462 | # CONFIG_ADFS_FS is not set | 589 | # CONFIG_ADFS_FS is not set |
463 | # CONFIG_AFFS_FS is not set | 590 | # CONFIG_AFFS_FS is not set |
464 | # CONFIG_HFS_FS is not set | 591 | # CONFIG_HFS_FS is not set |
592 | # CONFIG_HFSPLUS_FS is not set | ||
465 | # CONFIG_BEFS_FS is not set | 593 | # CONFIG_BEFS_FS is not set |
466 | # CONFIG_BFS_FS is not set | 594 | # CONFIG_BFS_FS is not set |
467 | # CONFIG_EFS_FS is not set | 595 | # CONFIG_EFS_FS is not set |
@@ -479,12 +607,10 @@ CONFIG_RAMFS=y | |||
479 | # | 607 | # |
480 | # CONFIG_NFS_FS is not set | 608 | # CONFIG_NFS_FS is not set |
481 | # CONFIG_NFSD is not set | 609 | # CONFIG_NFSD is not set |
482 | # CONFIG_EXPORTFS is not set | ||
483 | # CONFIG_SMB_FS is not set | 610 | # CONFIG_SMB_FS is not set |
484 | # CONFIG_CIFS is not set | 611 | # CONFIG_CIFS is not set |
485 | # CONFIG_NCP_FS is not set | 612 | # CONFIG_NCP_FS is not set |
486 | # CONFIG_CODA_FS is not set | 613 | # CONFIG_CODA_FS is not set |
487 | # CONFIG_INTERMEZZO_FS is not set | ||
488 | # CONFIG_AFS_FS is not set | 614 | # CONFIG_AFS_FS is not set |
489 | 615 | ||
490 | # | 616 | # |
@@ -494,30 +620,19 @@ CONFIG_RAMFS=y | |||
494 | CONFIG_MSDOS_PARTITION=y | 620 | CONFIG_MSDOS_PARTITION=y |
495 | 621 | ||
496 | # | 622 | # |
497 | # Graphics support | 623 | # Native Language Support |
498 | # | ||
499 | # CONFIG_FB is not set | ||
500 | |||
501 | # | ||
502 | # Sound | ||
503 | # | ||
504 | # CONFIG_SOUND is not set | ||
505 | |||
506 | # | ||
507 | # USB support | ||
508 | # | ||
509 | |||
510 | # | ||
511 | # Bluetooth support | ||
512 | # | 624 | # |
513 | # CONFIG_BT is not set | 625 | # CONFIG_NLS is not set |
514 | 626 | ||
515 | # | 627 | # |
516 | # Kernel hacking | 628 | # Kernel hacking |
517 | # | 629 | # |
630 | # CONFIG_PRINTK_TIME is not set | ||
631 | # CONFIG_DEBUG_KERNEL is not set | ||
632 | CONFIG_LOG_BUF_SHIFT=14 | ||
518 | # CONFIG_FULLDEBUG is not set | 633 | # CONFIG_FULLDEBUG is not set |
519 | # CONFIG_MAGIC_SYSRQ is not set | ||
520 | # CONFIG_HIGHPROFILE is not set | 634 | # CONFIG_HIGHPROFILE is not set |
635 | # CONFIG_BOOTPARAM is not set | ||
521 | # CONFIG_DUMPTOFLASH is not set | 636 | # CONFIG_DUMPTOFLASH is not set |
522 | # CONFIG_NO_KERNEL_MSG is not set | 637 | # CONFIG_NO_KERNEL_MSG is not set |
523 | # CONFIG_BDM_DISABLE is not set | 638 | # CONFIG_BDM_DISABLE is not set |
@@ -525,6 +640,7 @@ CONFIG_MSDOS_PARTITION=y | |||
525 | # | 640 | # |
526 | # Security options | 641 | # Security options |
527 | # | 642 | # |
643 | # CONFIG_KEYS is not set | ||
528 | # CONFIG_SECURITY is not set | 644 | # CONFIG_SECURITY is not set |
529 | 645 | ||
530 | # | 646 | # |
@@ -533,6 +649,12 @@ CONFIG_MSDOS_PARTITION=y | |||
533 | # CONFIG_CRYPTO is not set | 649 | # CONFIG_CRYPTO is not set |
534 | 650 | ||
535 | # | 651 | # |
652 | # Hardware crypto devices | ||
653 | # | ||
654 | |||
655 | # | ||
536 | # Library routines | 656 | # Library routines |
537 | # | 657 | # |
658 | # CONFIG_CRC_CCITT is not set | ||
538 | # CONFIG_CRC32 is not set | 659 | # CONFIG_CRC32 is not set |
660 | # CONFIG_LIBCRC32C is not set | ||
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index 557238596dcb..a220345e9746 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} | 6 | * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} |
7 | * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> | 7 | * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> |
8 | * Copyright (C) 1995 Hamish Macdonald | 8 | * Copyright (C) 1995 Hamish Macdonald |
9 | * Copyright (C) 2000 Lineo Inc. (www.lineo.com) | 9 | * Copyright (C) 2000 Lineo Inc. (www.lineo.com) |
10 | * Copyright (C) 2001 Lineo, Inc. <www.lineo.com> | 10 | * Copyright (C) 2001 Lineo, Inc. <www.lineo.com> |
11 | * | 11 | * |
12 | * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca> | 12 | * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca> |
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/fs.h> | 24 | #include <linux/fs.h> |
25 | #include <linux/fb.h> | 25 | #include <linux/fb.h> |
26 | #include <linux/module.h> | ||
26 | #include <linux/console.h> | 27 | #include <linux/console.h> |
27 | #include <linux/genhd.h> | 28 | #include <linux/genhd.h> |
28 | #include <linux/errno.h> | 29 | #include <linux/errno.h> |
@@ -45,6 +46,9 @@ unsigned long rom_length; | |||
45 | unsigned long memory_start; | 46 | unsigned long memory_start; |
46 | unsigned long memory_end; | 47 | unsigned long memory_end; |
47 | 48 | ||
49 | EXPORT_SYMBOL(memory_start); | ||
50 | EXPORT_SYMBOL(memory_end); | ||
51 | |||
48 | char command_line[COMMAND_LINE_SIZE]; | 52 | char command_line[COMMAND_LINE_SIZE]; |
49 | 53 | ||
50 | /* setup some dummy routines */ | 54 | /* setup some dummy routines */ |
@@ -103,15 +107,21 @@ void (*mach_power_off)( void ) = NULL; | |||
103 | #if defined(CONFIG_M5206e) | 107 | #if defined(CONFIG_M5206e) |
104 | #define CPU "COLDFIRE(m5206e)" | 108 | #define CPU "COLDFIRE(m5206e)" |
105 | #endif | 109 | #endif |
110 | #if defined(CONFIG_M523x) | ||
111 | #define CPU "COLDFIRE(m523x)" | ||
112 | #endif | ||
106 | #if defined(CONFIG_M5249) | 113 | #if defined(CONFIG_M5249) |
107 | #define CPU "COLDFIRE(m5249)" | 114 | #define CPU "COLDFIRE(m5249)" |
108 | #endif | 115 | #endif |
109 | #if defined(CONFIG_M527x) | 116 | #if defined(CONFIG_M5271) |
110 | #define CPU "COLDFIRE(m5270/5271/5274/5275)" | 117 | #define CPU "COLDFIRE(m5270/5271)" |
111 | #endif | 118 | #endif |
112 | #if defined(CONFIG_M5272) | 119 | #if defined(CONFIG_M5272) |
113 | #define CPU "COLDFIRE(m5272)" | 120 | #define CPU "COLDFIRE(m5272)" |
114 | #endif | 121 | #endif |
122 | #if defined(CONFIG_M5275) | ||
123 | #define CPU "COLDFIRE(m5274/5275)" | ||
124 | #endif | ||
115 | #if defined(CONFIG_M528x) | 125 | #if defined(CONFIG_M528x) |
116 | #define CPU "COLDFIRE(m5280/5282)" | 126 | #define CPU "COLDFIRE(m5280/5282)" |
117 | #endif | 127 | #endif |
@@ -152,7 +162,7 @@ void setup_arch(char **cmdline_p) | |||
152 | init_mm.start_code = (unsigned long) &_stext; | 162 | init_mm.start_code = (unsigned long) &_stext; |
153 | init_mm.end_code = (unsigned long) &_etext; | 163 | init_mm.end_code = (unsigned long) &_etext; |
154 | init_mm.end_data = (unsigned long) &_edata; | 164 | init_mm.end_data = (unsigned long) &_edata; |
155 | init_mm.brk = (unsigned long) 0; | 165 | init_mm.brk = (unsigned long) 0; |
156 | 166 | ||
157 | config_BSP(&command_line[0], sizeof(command_line)); | 167 | config_BSP(&command_line[0], sizeof(command_line)); |
158 | 168 | ||
@@ -171,7 +181,7 @@ void setup_arch(char **cmdline_p) | |||
171 | #endif | 181 | #endif |
172 | #ifdef CONFIG_ELITE | 182 | #ifdef CONFIG_ELITE |
173 | printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); | 183 | printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); |
174 | #endif | 184 | #endif |
175 | #ifdef CONFIG_TELOS | 185 | #ifdef CONFIG_TELOS |
176 | printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n"); | 186 | printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n"); |
177 | #endif | 187 | #endif |
@@ -200,6 +210,9 @@ void setup_arch(char **cmdline_p) | |||
200 | #ifdef CONFIG_DRAGEN2 | 210 | #ifdef CONFIG_DRAGEN2 |
201 | printk(KERN_INFO "DragonEngine II board support by Georges Menie\n"); | 211 | printk(KERN_INFO "DragonEngine II board support by Georges Menie\n"); |
202 | #endif | 212 | #endif |
213 | #ifdef CONFIG_M5235EVB | ||
214 | printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)"); | ||
215 | #endif | ||
203 | 216 | ||
204 | #ifdef DEBUG | 217 | #ifdef DEBUG |
205 | printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " | 218 | printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " |
@@ -223,7 +236,7 @@ void setup_arch(char **cmdline_p) | |||
223 | saved_command_line[COMMAND_LINE_SIZE-1] = 0; | 236 | saved_command_line[COMMAND_LINE_SIZE-1] = 0; |
224 | 237 | ||
225 | #ifdef DEBUG | 238 | #ifdef DEBUG |
226 | if (strlen(*cmdline_p)) | 239 | if (strlen(*cmdline_p)) |
227 | printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p); | 240 | printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p); |
228 | #endif | 241 | #endif |
229 | 242 | ||
diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68knommu/kernel/traps.c index ad7dc6347f19..5bc068462864 100644 --- a/arch/m68knommu/kernel/traps.c +++ b/arch/m68knommu/kernel/traps.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/signal.h> | 21 | #include <linux/signal.h> |
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
24 | #include <linux/module.h> | ||
24 | #include <linux/types.h> | 25 | #include <linux/types.h> |
25 | #include <linux/a.out.h> | 26 | #include <linux/a.out.h> |
26 | #include <linux/user.h> | 27 | #include <linux/user.h> |
@@ -38,7 +39,7 @@ | |||
38 | #include <asm/machdep.h> | 39 | #include <asm/machdep.h> |
39 | #include <asm/siginfo.h> | 40 | #include <asm/siginfo.h> |
40 | 41 | ||
41 | static char *vec_names[] = { | 42 | static char const * const vec_names[] = { |
42 | "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR", | 43 | "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR", |
43 | "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc", | 44 | "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc", |
44 | "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111", | 45 | "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111", |
@@ -106,17 +107,20 @@ asmlinkage void buserr_c(struct frame *fp) | |||
106 | 107 | ||
107 | int kstack_depth_to_print = 48; | 108 | int kstack_depth_to_print = 48; |
108 | 109 | ||
109 | void show_stack(struct task_struct *task, unsigned long *esp) | 110 | void show_stack(struct task_struct *task, unsigned long *stack) |
110 | { | 111 | { |
111 | unsigned long *stack, *endstack, addr; | 112 | unsigned long *endstack, addr; |
112 | extern char _start, _etext; | 113 | extern char _start, _etext; |
113 | int i; | 114 | int i; |
114 | 115 | ||
115 | if (esp == NULL) | 116 | if (!stack) { |
116 | esp = (unsigned long *) &esp; | 117 | if (task) |
118 | stack = (unsigned long *)task->thread.ksp; | ||
119 | else | ||
120 | stack = (unsigned long *)&stack; | ||
121 | } | ||
117 | 122 | ||
118 | stack = esp; | 123 | addr = (unsigned long) stack; |
119 | addr = (unsigned long) esp; | ||
120 | endstack = (unsigned long *) PAGE_ALIGN(addr); | 124 | endstack = (unsigned long *) PAGE_ALIGN(addr); |
121 | 125 | ||
122 | printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack); | 126 | printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack); |
@@ -306,6 +310,8 @@ void dump_stack(void) | |||
306 | show_stack(current, &stack); | 310 | show_stack(current, &stack); |
307 | } | 311 | } |
308 | 312 | ||
313 | EXPORT_SYMBOL(dump_stack); | ||
314 | |||
309 | #ifdef CONFIG_M68KFPU_EMU | 315 | #ifdef CONFIG_M68KFPU_EMU |
310 | asmlinkage void fpemu_signal(int signal, int code, void *addr) | 316 | asmlinkage void fpemu_signal(int signal, int code, void *addr) |
311 | { | 317 | { |
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S index 31cb12892da5..47f06787190d 100644 --- a/arch/m68knommu/kernel/vmlinux.lds.S +++ b/arch/m68knommu/kernel/vmlinux.lds.S | |||
@@ -107,7 +107,7 @@ | |||
107 | */ | 107 | */ |
108 | #if defined(CONFIG_ELITE) | 108 | #if defined(CONFIG_ELITE) |
109 | #define RAM_START 0x30020000 | 109 | #define RAM_START 0x30020000 |
110 | #define RAM_END 0xe0000 | 110 | #define RAM_LENGTH 0xe0000 |
111 | #endif | 111 | #endif |
112 | 112 | ||
113 | /* | 113 | /* |
@@ -118,7 +118,8 @@ | |||
118 | #if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \ | 118 | #if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \ |
119 | defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \ | 119 | defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \ |
120 | defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \ | 120 | defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \ |
121 | defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) | 121 | defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \ |
122 | defined(CONFIG_M5235EVB) | ||
122 | #define RAM_START 0x20000 | 123 | #define RAM_START 0x20000 |
123 | #define RAM_LENGTH 0x3e0000 | 124 | #define RAM_LENGTH 0x3e0000 |
124 | #endif | 125 | #endif |
@@ -145,6 +146,16 @@ | |||
145 | #define RAM_LENGTH 0x3f0000 | 146 | #define RAM_LENGTH 0x3f0000 |
146 | #endif | 147 | #endif |
147 | 148 | ||
149 | |||
150 | /* | ||
151 | * The EMAC SoM-5282EM module. | ||
152 | */ | ||
153 | #if defined(CONFIG_SOM5282EM) | ||
154 | #define RAM_START 0x10000 | ||
155 | #define RAM_LENGTH 0xff0000 | ||
156 | #endif | ||
157 | |||
158 | |||
148 | /* | 159 | /* |
149 | * These flash boot boards use all of ram for operation. Again the | 160 | * These flash boot boards use all of ram for operation. Again the |
150 | * actual memory size is not important here, assume at least 4MiB. | 161 | * actual memory size is not important here, assume at least 4MiB. |
@@ -158,7 +169,7 @@ | |||
158 | #endif | 169 | #endif |
159 | 170 | ||
160 | /* | 171 | /* |
161 | * Sneha Boards mimimun memmory | 172 | * Sneha Boards mimimun memory |
162 | * The end of RAM will vary depending on how much ram is fitted, | 173 | * The end of RAM will vary depending on how much ram is fitted, |
163 | * but this isn't important here, we assume at least 4MiB. | 174 | * but this isn't important here, we assume at least 4MiB. |
164 | */ | 175 | */ |
@@ -167,6 +178,12 @@ | |||
167 | #define RAM_LENGTH 0x3e0000 | 178 | #define RAM_LENGTH 0x3e0000 |
168 | #endif | 179 | #endif |
169 | 180 | ||
181 | #if defined(CONFIG_MOD5272) | ||
182 | #define RAM_START 0x02000000 | ||
183 | #define RAM_LENGTH 0x00800000 | ||
184 | #define RAMVEC_START 0x20000000 | ||
185 | #define RAMVEC_LENGTH 0x00000400 | ||
186 | #endif | ||
170 | 187 | ||
171 | #if defined(CONFIG_RAMKERNEL) | 188 | #if defined(CONFIG_RAMKERNEL) |
172 | #define TEXT ram | 189 | #define TEXT ram |
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c new file mode 100644 index 000000000000..22767ce506e0 --- /dev/null +++ b/arch/m68knommu/platform/523x/config.c | |||
@@ -0,0 +1,82 @@ | |||
1 | /***************************************************************************/ | ||
2 | |||
3 | /* | ||
4 | * linux/arch/m68knommu/platform/523x/config.c | ||
5 | * | ||
6 | * Sub-architcture dependant initialization code for the Freescale | ||
7 | * 523x CPUs. | ||
8 | * | ||
9 | * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com) | ||
10 | * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) | ||
11 | */ | ||
12 | |||
13 | /***************************************************************************/ | ||
14 | |||
15 | #include <linux/config.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/param.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <asm/dma.h> | ||
22 | #include <asm/traps.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/coldfire.h> | ||
25 | #include <asm/mcfsim.h> | ||
26 | #include <asm/mcfdma.h> | ||
27 | |||
28 | /***************************************************************************/ | ||
29 | |||
30 | void coldfire_pit_tick(void); | ||
31 | void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *)); | ||
32 | unsigned long coldfire_pit_offset(void); | ||
33 | void coldfire_trap_init(void); | ||
34 | void coldfire_reset(void); | ||
35 | |||
36 | /***************************************************************************/ | ||
37 | |||
38 | /* | ||
39 | * DMA channel base address table. | ||
40 | */ | ||
41 | unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { | ||
42 | MCF_MBAR + MCFDMA_BASE0, | ||
43 | }; | ||
44 | |||
45 | unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; | ||
46 | |||
47 | /***************************************************************************/ | ||
48 | |||
49 | void mcf_disableall(void) | ||
50 | { | ||
51 | *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff; | ||
52 | *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff; | ||
53 | } | ||
54 | |||
55 | /***************************************************************************/ | ||
56 | |||
57 | void mcf_autovector(unsigned int vec) | ||
58 | { | ||
59 | /* Everything is auto-vectored on the 5272 */ | ||
60 | } | ||
61 | |||
62 | /***************************************************************************/ | ||
63 | |||
64 | void config_BSP(char *commandp, int size) | ||
65 | { | ||
66 | mcf_disableall(); | ||
67 | |||
68 | #ifdef CONFIG_BOOTPARAM | ||
69 | strncpy(commandp, CONFIG_BOOTPARAM_STRING, size); | ||
70 | commandp[size-1] = 0; | ||
71 | #else | ||
72 | memset(commandp, 0, size); | ||
73 | #endif | ||
74 | |||
75 | mach_sched_init = coldfire_pit_init; | ||
76 | mach_tick = coldfire_pit_tick; | ||
77 | mach_gettimeoffset = coldfire_pit_offset; | ||
78 | mach_trap_init = coldfire_trap_init; | ||
79 | mach_reset = coldfire_reset; | ||
80 | } | ||
81 | |||
82 | /***************************************************************************/ | ||
diff --git a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/5307/head.S index c7d7a395c4cc..7f4ba837901f 100644 --- a/arch/m68knommu/platform/5307/head.S +++ b/arch/m68knommu/platform/5307/head.S | |||
@@ -39,14 +39,18 @@ | |||
39 | * Memory size exceptions for special cases. Some boards may be set | 39 | * Memory size exceptions for special cases. Some boards may be set |
40 | * for auto memory sizing, but we can't do it that way for some reason. | 40 | * for auto memory sizing, but we can't do it that way for some reason. |
41 | * For example the 5206eLITE board has static RAM, and auto-detecting | 41 | * For example the 5206eLITE board has static RAM, and auto-detecting |
42 | * the SDRAM will do you no good at all. | 42 | * the SDRAM will do you no good at all. Same goes for the MOD5272. |
43 | */ | 43 | */ |
44 | #ifdef CONFIG_RAMAUTO | 44 | #ifdef CONFIG_RAMAUTO |
45 | #if defined(CONFIG_M5206eLITE) | 45 | #if defined(CONFIG_M5206eLITE) |
46 | #define MEM_SIZE 0x00100000 /* 1MiB default memory */ | 46 | #define MEM_SIZE 0x00100000 /* 1MiB default memory */ |
47 | #endif | ||
48 | #if defined(CONFIG_MOD5272) | ||
49 | #define MEM_SIZE 0x00800000 /* 8MiB default memory */ | ||
47 | #endif | 50 | #endif |
48 | #endif /* CONFIG_RAMAUTO */ | 51 | #endif /* CONFIG_RAMAUTO */ |
49 | 52 | ||
53 | |||
50 | /* | 54 | /* |
51 | * If we don't have a fixed memory size now, then lets build in code | 55 | * If we don't have a fixed memory size now, then lets build in code |
52 | * to auto detect the DRAM size. Obviously this is the prefered | 56 | * to auto detect the DRAM size. Obviously this is the prefered |
@@ -100,11 +104,15 @@ | |||
100 | 104 | ||
101 | /* | 105 | /* |
102 | * Most ColdFire boards have their DRAM starting at address 0. | 106 | * Most ColdFire boards have their DRAM starting at address 0. |
103 | * Notable exception is the 5206eLITE board. | 107 | * Notable exception is the 5206eLITE board, another is the MOD5272. |
104 | */ | 108 | */ |
105 | #if defined(CONFIG_M5206eLITE) | 109 | #if defined(CONFIG_M5206eLITE) |
106 | #define MEM_BASE 0x30000000 | 110 | #define MEM_BASE 0x30000000 |
107 | #endif | 111 | #endif |
112 | #if defined(CONFIG_MOD5272) | ||
113 | #define MEM_BASE 0x02000000 | ||
114 | #define VBR_BASE 0x20000000 /* vectors in SRAM */ | ||
115 | #endif | ||
108 | 116 | ||
109 | #ifndef MEM_BASE | 117 | #ifndef MEM_BASE |
110 | #define MEM_BASE 0x00000000 /* memory base at address 0 */ | 118 | #define MEM_BASE 0x00000000 /* memory base at address 0 */ |
@@ -188,6 +196,7 @@ _start: | |||
188 | movel %a7,_rambase | 196 | movel %a7,_rambase |
189 | 197 | ||
190 | GET_MEM_SIZE /* macro code determines size */ | 198 | GET_MEM_SIZE /* macro code determines size */ |
199 | addl %a7,%d0 | ||
191 | movel %d0,_ramend /* set end ram addr */ | 200 | movel %d0,_ramend /* set end ram addr */ |
192 | 201 | ||
193 | /* | 202 | /* |
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S index 0f5d1fe8eb5f..7d8990d784a2 100644 --- a/arch/m68knommu/platform/68328/entry.S +++ b/arch/m68knommu/platform/68328/entry.S | |||
@@ -79,7 +79,7 @@ ENTRY(system_call) | |||
79 | movel %sp@(PT_ORIG_D0),%d0 | 79 | movel %sp@(PT_ORIG_D0),%d0 |
80 | 80 | ||
81 | movel %sp,%d1 /* get thread_info pointer */ | 81 | movel %sp,%d1 /* get thread_info pointer */ |
82 | andl #0xffffe000,%d1 | 82 | andl #-THREAD_SIZE,%d1 |
83 | movel %d1,%a2 | 83 | movel %d1,%a2 |
84 | btst #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS) | 84 | btst #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS) |
85 | jne do_trace | 85 | jne do_trace |
@@ -105,7 +105,7 @@ Luser_return: | |||
105 | andw #ALLOWINT,%sr | 105 | andw #ALLOWINT,%sr |
106 | 106 | ||
107 | movel %sp,%d1 /* get thread_info pointer */ | 107 | movel %sp,%d1 /* get thread_info pointer */ |
108 | andl #0xffffe000,%d1 | 108 | andl #-THREAD_SIZE,%d1 |
109 | movel %d1,%a2 | 109 | movel %d1,%a2 |
110 | move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ | 110 | move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ |
111 | andl #_TIF_WORK_MASK,%d1 | 111 | andl #_TIF_WORK_MASK,%d1 |
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S index f7bc80a60e0f..8ff48adf24ab 100644 --- a/arch/m68knommu/platform/68360/entry.S +++ b/arch/m68knommu/platform/68360/entry.S | |||
@@ -96,7 +96,7 @@ Luser_return: | |||
96 | andw #ALLOWINT,%sr | 96 | andw #ALLOWINT,%sr |
97 | 97 | ||
98 | movel %sp,%d1 /* get thread_info pointer */ | 98 | movel %sp,%d1 /* get thread_info pointer */ |
99 | andl #0xffffe000,%d1 | 99 | andl #-THREAD_SIZE,%d1 |
100 | movel %d1,%a2 | 100 | movel %d1,%a2 |
101 | move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ | 101 | move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ |
102 | andl #_TIF_WORK_MASK,%d1 | 102 | andl #_TIF_WORK_MASK,%d1 |
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S index 468721d9ebd2..3fb1fb619d2c 100644 --- a/arch/ppc/kernel/cpu_setup_6xx.S +++ b/arch/ppc/kernel/cpu_setup_6xx.S | |||
@@ -249,8 +249,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM) | |||
249 | sync | 249 | sync |
250 | isync | 250 | isync |
251 | 251 | ||
252 | /* Enable L2 HW prefetch | 252 | /* Enable L2 HW prefetch, if L2 is enabled |
253 | */ | 253 | */ |
254 | mfspr r3,SPRN_L2CR | ||
255 | andis. r3,r3,L2CR_L2E@h | ||
256 | beqlr | ||
254 | mfspr r3,SPRN_MSSCR0 | 257 | mfspr r3,SPRN_MSSCR0 |
255 | ori r3,r3,3 | 258 | ori r3,r3,3 |
256 | sync | 259 | sync |
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S index c39441048266..861115249b35 100644 --- a/arch/ppc/kernel/l2cr.S +++ b/arch/ppc/kernel/l2cr.S | |||
@@ -156,6 +156,26 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |||
156 | The bit moved on the 7450..... | 156 | The bit moved on the 7450..... |
157 | ****/ | 157 | ****/ |
158 | 158 | ||
159 | BEGIN_FTR_SECTION | ||
160 | /* Disable L2 prefetch on some 745x and try to ensure | ||
161 | * L2 prefetch engines are idle. As explained by errata | ||
162 | * text, we can't be sure they are, we just hope very hard | ||
163 | * that well be enough (sic !). At least I noticed Apple | ||
164 | * doesn't even bother doing the dcbf's here... | ||
165 | */ | ||
166 | mfspr r4,SPRN_MSSCR0 | ||
167 | rlwinm r4,r4,0,0,29 | ||
168 | sync | ||
169 | mtspr SPRN_MSSCR0,r4 | ||
170 | sync | ||
171 | isync | ||
172 | lis r4,KERNELBASE@h | ||
173 | dcbf 0,r4 | ||
174 | dcbf 0,r4 | ||
175 | dcbf 0,r4 | ||
176 | dcbf 0,r4 | ||
177 | END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450) | ||
178 | |||
159 | /* TODO: use HW flush assist when available */ | 179 | /* TODO: use HW flush assist when available */ |
160 | 180 | ||
161 | lis r4,0x0002 | 181 | lis r4,0x0002 |
@@ -230,7 +250,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450) | |||
230 | oris r3,r3,0x8000 | 250 | oris r3,r3,0x8000 |
231 | mtspr SPRN_L2CR,r3 | 251 | mtspr SPRN_L2CR,r3 |
232 | sync | 252 | sync |
233 | 253 | ||
254 | /* Enable L2 HW prefetch on 744x/745x */ | ||
255 | BEGIN_FTR_SECTION | ||
256 | mfspr r3,SPRN_MSSCR0 | ||
257 | ori r3,r3,3 | ||
258 | sync | ||
259 | mtspr SPRN_MSSCR0,r3 | ||
260 | sync | ||
261 | isync | ||
262 | END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450) | ||
234 | 4: | 263 | 4: |
235 | 264 | ||
236 | /* Restore HID0[DPM] to whatever it was before */ | 265 | /* Restore HID0[DPM] to whatever it was before */ |
diff --git a/arch/ppc64/mm/slb_low.S b/arch/ppc64/mm/slb_low.S index bab255889c58..698d6b9ed6d1 100644 --- a/arch/ppc64/mm/slb_low.S +++ b/arch/ppc64/mm/slb_low.S | |||
@@ -97,25 +97,21 @@ BEGIN_FTR_SECTION | |||
97 | lhz r9,PACAHIGHHTLBAREAS(r13) | 97 | lhz r9,PACAHIGHHTLBAREAS(r13) |
98 | srdi r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT) | 98 | srdi r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT) |
99 | srd r9,r9,r11 | 99 | srd r9,r9,r11 |
100 | andi. r9,r9,1 | 100 | lhz r11,PACALOWHTLBAREAS(r13) |
101 | bne 5f | 101 | srd r11,r11,r3 |
102 | or r9,r9,r11 | ||
103 | END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) | ||
104 | #endif /* CONFIG_HUGETLB_PAGE */ | ||
102 | 105 | ||
103 | li r11,SLB_VSID_USER | 106 | li r11,SLB_VSID_USER |
104 | 107 | ||
105 | cmpldi r3,16 | 108 | #ifdef CONFIG_HUGETLB_PAGE |
106 | bge 6f | 109 | BEGIN_FTR_SECTION |
107 | 110 | rldimi r11,r9,8,55 /* shift masked bit into SLB_VSID_L */ | |
108 | lhz r9,PACALOWHTLBAREAS(r13) | ||
109 | srd r9,r9,r3 | ||
110 | andi. r9,r9,1 | ||
111 | |||
112 | beq 6f | ||
113 | |||
114 | 5: li r11,SLB_VSID_USER|SLB_VSID_L | ||
115 | END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) | 111 | END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) |
116 | #endif /* CONFIG_HUGETLB_PAGE */ | 112 | #endif /* CONFIG_HUGETLB_PAGE */ |
117 | 113 | ||
118 | 6: ld r9,PACACONTEXTID(r13) | 114 | ld r9,PACACONTEXTID(r13) |
119 | rldimi r3,r9,USER_ESID_BITS,0 | 115 | rldimi r3,r9,USER_ESID_BITS,0 |
120 | 116 | ||
121 | 9: /* r3 = protovsid, r11 = flags, r10 = esid_data, cr7 = <>KERNELBASE */ | 117 | 9: /* r3 = protovsid, r11 = flags, r10 = esid_data, cr7 = <>KERNELBASE */ |
diff --git a/arch/v850/configs/rte-ma1-cb_defconfig b/arch/v850/configs/rte-ma1-cb_defconfig index 1b5ca3c3a658..1a5beda36e29 100644 --- a/arch/v850/configs/rte-ma1-cb_defconfig +++ b/arch/v850/configs/rte-ma1-cb_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-uc0 | 3 | # Linux kernel version: 2.6.13-uc0 |
4 | # Thu Jul 21 11:08:27 2005 | 4 | # Fri Sep 2 13:54:27 2005 |
5 | # | 5 | # |
6 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
7 | # CONFIG_UID16 is not set | 7 | # CONFIG_UID16 is not set |
@@ -44,6 +44,8 @@ CONFIG_ZERO_BSS=y | |||
44 | # CONFIG_V850E_HIGHRES_TIMER is not set | 44 | # CONFIG_V850E_HIGHRES_TIMER is not set |
45 | # CONFIG_RESET_GUARD is not set | 45 | # CONFIG_RESET_GUARD is not set |
46 | CONFIG_LARGE_ALLOCS=y | 46 | CONFIG_LARGE_ALLOCS=y |
47 | CONFIG_FLATMEM=y | ||
48 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
47 | 49 | ||
48 | # | 50 | # |
49 | # Code maturity level options | 51 | # Code maturity level options |
@@ -111,6 +113,52 @@ CONFIG_BINFMT_FLAT=y | |||
111 | # CONFIG_BINFMT_MISC is not set | 113 | # CONFIG_BINFMT_MISC is not set |
112 | 114 | ||
113 | # | 115 | # |
116 | # Networking | ||
117 | # | ||
118 | CONFIG_NET=y | ||
119 | |||
120 | # | ||
121 | # Networking options | ||
122 | # | ||
123 | # CONFIG_PACKET is not set | ||
124 | # CONFIG_UNIX is not set | ||
125 | # CONFIG_NET_KEY is not set | ||
126 | CONFIG_INET=y | ||
127 | # CONFIG_IP_MULTICAST is not set | ||
128 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
129 | CONFIG_IP_FIB_HASH=y | ||
130 | # CONFIG_IP_PNP is not set | ||
131 | # CONFIG_NET_IPIP is not set | ||
132 | # CONFIG_NET_IPGRE is not set | ||
133 | # CONFIG_SYN_COOKIES is not set | ||
134 | # CONFIG_INET_AH is not set | ||
135 | # CONFIG_INET_ESP is not set | ||
136 | # CONFIG_INET_IPCOMP is not set | ||
137 | # CONFIG_INET_TUNNEL is not set | ||
138 | # CONFIG_IP_TCPDIAG is not set | ||
139 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
140 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
141 | CONFIG_TCP_CONG_BIC=y | ||
142 | # CONFIG_IPV6 is not set | ||
143 | # CONFIG_NETFILTER is not set | ||
144 | # CONFIG_BRIDGE is not set | ||
145 | # CONFIG_VLAN_8021Q is not set | ||
146 | # CONFIG_DECNET is not set | ||
147 | # CONFIG_LLC2 is not set | ||
148 | # CONFIG_IPX is not set | ||
149 | # CONFIG_ATALK is not set | ||
150 | # CONFIG_NET_SCHED is not set | ||
151 | # CONFIG_NET_CLS_ROUTE is not set | ||
152 | |||
153 | # | ||
154 | # Network testing | ||
155 | # | ||
156 | # CONFIG_NET_PKTGEN is not set | ||
157 | # CONFIG_HAMRADIO is not set | ||
158 | # CONFIG_IRDA is not set | ||
159 | # CONFIG_BT is not set | ||
160 | |||
161 | # | ||
114 | # Generic Driver Options | 162 | # Generic Driver Options |
115 | # | 163 | # |
116 | CONFIG_STANDALONE=y | 164 | CONFIG_STANDALONE=y |
@@ -158,6 +206,7 @@ CONFIG_MTD_CFI_I2=y | |||
158 | # Mapping drivers for chip access | 206 | # Mapping drivers for chip access |
159 | # | 207 | # |
160 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 208 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
209 | # CONFIG_MTD_PLATRAM is not set | ||
161 | 210 | ||
162 | # | 211 | # |
163 | # Self-contained MTD device drivers | 212 | # Self-contained MTD device drivers |
@@ -232,6 +281,7 @@ CONFIG_IOSCHED_NOOP=y | |||
232 | # | 281 | # |
233 | # Fusion MPT device support | 282 | # Fusion MPT device support |
234 | # | 283 | # |
284 | # CONFIG_FUSION is not set | ||
235 | 285 | ||
236 | # | 286 | # |
237 | # IEEE 1394 (FireWire) support | 287 | # IEEE 1394 (FireWire) support |
@@ -244,53 +294,8 @@ CONFIG_IOSCHED_NOOP=y | |||
244 | # CONFIG_I2O is not set | 294 | # CONFIG_I2O is not set |
245 | 295 | ||
246 | # | 296 | # |
247 | # Networking support | 297 | # Network device support |
248 | # | ||
249 | CONFIG_NET=y | ||
250 | |||
251 | # | ||
252 | # Networking options | ||
253 | # | ||
254 | # CONFIG_PACKET is not set | ||
255 | # CONFIG_UNIX is not set | ||
256 | # CONFIG_NET_KEY is not set | ||
257 | CONFIG_INET=y | ||
258 | # CONFIG_IP_MULTICAST is not set | ||
259 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
260 | # CONFIG_IP_PNP is not set | ||
261 | # CONFIG_NET_IPIP is not set | ||
262 | # CONFIG_NET_IPGRE is not set | ||
263 | # CONFIG_SYN_COOKIES is not set | ||
264 | # CONFIG_INET_AH is not set | ||
265 | # CONFIG_INET_ESP is not set | ||
266 | # CONFIG_INET_IPCOMP is not set | ||
267 | # CONFIG_INET_TUNNEL is not set | ||
268 | # CONFIG_IP_TCPDIAG is not set | ||
269 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
270 | # CONFIG_IPV6 is not set | ||
271 | # CONFIG_NETFILTER is not set | ||
272 | # CONFIG_BRIDGE is not set | ||
273 | # CONFIG_VLAN_8021Q is not set | ||
274 | # CONFIG_DECNET is not set | ||
275 | # CONFIG_LLC2 is not set | ||
276 | # CONFIG_IPX is not set | ||
277 | # CONFIG_ATALK is not set | ||
278 | |||
279 | # | ||
280 | # QoS and/or fair queueing | ||
281 | # | ||
282 | # CONFIG_NET_SCHED is not set | ||
283 | # CONFIG_NET_CLS_ROUTE is not set | ||
284 | |||
285 | # | ||
286 | # Network testing | ||
287 | # | 298 | # |
288 | # CONFIG_NET_PKTGEN is not set | ||
289 | # CONFIG_NETPOLL is not set | ||
290 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
291 | # CONFIG_HAMRADIO is not set | ||
292 | # CONFIG_IRDA is not set | ||
293 | # CONFIG_BT is not set | ||
294 | CONFIG_NETDEVICES=y | 299 | CONFIG_NETDEVICES=y |
295 | # CONFIG_DUMMY is not set | 300 | # CONFIG_DUMMY is not set |
296 | # CONFIG_BONDING is not set | 301 | # CONFIG_BONDING is not set |
@@ -372,6 +377,8 @@ CONFIG_EEPRO100=y | |||
372 | # CONFIG_FDDI is not set | 377 | # CONFIG_FDDI is not set |
373 | # CONFIG_PPP is not set | 378 | # CONFIG_PPP is not set |
374 | # CONFIG_SLIP is not set | 379 | # CONFIG_SLIP is not set |
380 | # CONFIG_NETPOLL is not set | ||
381 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
375 | 382 | ||
376 | # | 383 | # |
377 | # ISDN subsystem | 384 | # ISDN subsystem |
@@ -472,6 +479,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
472 | # CONFIG_JBD is not set | 479 | # CONFIG_JBD is not set |
473 | # CONFIG_REISERFS_FS is not set | 480 | # CONFIG_REISERFS_FS is not set |
474 | # CONFIG_JFS_FS is not set | 481 | # CONFIG_JFS_FS is not set |
482 | # CONFIG_FS_POSIX_ACL is not set | ||
475 | 483 | ||
476 | # | 484 | # |
477 | # XFS support | 485 | # XFS support |
@@ -479,6 +487,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
479 | # CONFIG_XFS_FS is not set | 487 | # CONFIG_XFS_FS is not set |
480 | # CONFIG_MINIX_FS is not set | 488 | # CONFIG_MINIX_FS is not set |
481 | CONFIG_ROMFS_FS=y | 489 | CONFIG_ROMFS_FS=y |
490 | # CONFIG_MAGIC_ROM_PTR is not set | ||
491 | CONFIG_INOTIFY=y | ||
482 | # CONFIG_QUOTA is not set | 492 | # CONFIG_QUOTA is not set |
483 | CONFIG_DNOTIFY=y | 493 | CONFIG_DNOTIFY=y |
484 | # CONFIG_AUTOFS_FS is not set | 494 | # CONFIG_AUTOFS_FS is not set |
@@ -524,9 +534,11 @@ CONFIG_RAMFS=y | |||
524 | # | 534 | # |
525 | CONFIG_NFS_FS=y | 535 | CONFIG_NFS_FS=y |
526 | CONFIG_NFS_V3=y | 536 | CONFIG_NFS_V3=y |
537 | # CONFIG_NFS_V3_ACL is not set | ||
527 | # CONFIG_NFSD is not set | 538 | # CONFIG_NFSD is not set |
528 | CONFIG_LOCKD=y | 539 | CONFIG_LOCKD=y |
529 | CONFIG_LOCKD_V4=y | 540 | CONFIG_LOCKD_V4=y |
541 | CONFIG_NFS_COMMON=y | ||
530 | CONFIG_SUNRPC=y | 542 | CONFIG_SUNRPC=y |
531 | # CONFIG_SMB_FS is not set | 543 | # CONFIG_SMB_FS is not set |
532 | # CONFIG_CIFS is not set | 544 | # CONFIG_CIFS is not set |
diff --git a/arch/v850/configs/rte-me2-cb_defconfig b/arch/v850/configs/rte-me2-cb_defconfig index 44becc065404..15e666478061 100644 --- a/arch/v850/configs/rte-me2-cb_defconfig +++ b/arch/v850/configs/rte-me2-cb_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-uc0 | 3 | # Linux kernel version: 2.6.13-uc0 |
4 | # Thu Jul 21 11:30:08 2005 | 4 | # Fri Sep 2 13:47:50 2005 |
5 | # | 5 | # |
6 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
7 | # CONFIG_UID16 is not set | 7 | # CONFIG_UID16 is not set |
@@ -41,6 +41,8 @@ CONFIG_ZERO_BSS=y | |||
41 | # CONFIG_V850E_HIGHRES_TIMER is not set | 41 | # CONFIG_V850E_HIGHRES_TIMER is not set |
42 | # CONFIG_RESET_GUARD is not set | 42 | # CONFIG_RESET_GUARD is not set |
43 | CONFIG_LARGE_ALLOCS=y | 43 | CONFIG_LARGE_ALLOCS=y |
44 | CONFIG_FLATMEM=y | ||
45 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
44 | 46 | ||
45 | # | 47 | # |
46 | # Code maturity level options | 48 | # Code maturity level options |
@@ -56,7 +58,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
56 | CONFIG_LOCALVERSION="" | 58 | CONFIG_LOCALVERSION="" |
57 | # CONFIG_BSD_PROCESS_ACCT is not set | 59 | # CONFIG_BSD_PROCESS_ACCT is not set |
58 | # CONFIG_SYSCTL is not set | 60 | # CONFIG_SYSCTL is not set |
59 | # CONFIG_AUDIT is not set | ||
60 | # CONFIG_HOTPLUG is not set | 61 | # CONFIG_HOTPLUG is not set |
61 | # CONFIG_IKCONFIG is not set | 62 | # CONFIG_IKCONFIG is not set |
62 | CONFIG_EMBEDDED=y | 63 | CONFIG_EMBEDDED=y |
@@ -104,6 +105,11 @@ CONFIG_BINFMT_FLAT=y | |||
104 | # CONFIG_BINFMT_MISC is not set | 105 | # CONFIG_BINFMT_MISC is not set |
105 | 106 | ||
106 | # | 107 | # |
108 | # Networking | ||
109 | # | ||
110 | # CONFIG_NET is not set | ||
111 | |||
112 | # | ||
107 | # Generic Driver Options | 113 | # Generic Driver Options |
108 | # | 114 | # |
109 | CONFIG_STANDALONE=y | 115 | CONFIG_STANDALONE=y |
@@ -151,6 +157,7 @@ CONFIG_MTD_CFI_I2=y | |||
151 | # Mapping drivers for chip access | 157 | # Mapping drivers for chip access |
152 | # | 158 | # |
153 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 159 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
160 | # CONFIG_MTD_PLATRAM is not set | ||
154 | 161 | ||
155 | # | 162 | # |
156 | # Self-contained MTD device drivers | 163 | # Self-contained MTD device drivers |
@@ -218,6 +225,7 @@ CONFIG_IOSCHED_NOOP=y | |||
218 | # | 225 | # |
219 | # Fusion MPT device support | 226 | # Fusion MPT device support |
220 | # | 227 | # |
228 | # CONFIG_FUSION is not set | ||
221 | 229 | ||
222 | # | 230 | # |
223 | # IEEE 1394 (FireWire) support | 231 | # IEEE 1394 (FireWire) support |
@@ -228,9 +236,8 @@ CONFIG_IOSCHED_NOOP=y | |||
228 | # | 236 | # |
229 | 237 | ||
230 | # | 238 | # |
231 | # Networking support | 239 | # Network device support |
232 | # | 240 | # |
233 | # CONFIG_NET is not set | ||
234 | # CONFIG_NETPOLL is not set | 241 | # CONFIG_NETPOLL is not set |
235 | # CONFIG_NET_POLL_CONTROLLER is not set | 242 | # CONFIG_NET_POLL_CONTROLLER is not set |
236 | 243 | ||
@@ -311,7 +318,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
311 | # | 318 | # |
312 | # Ftape, the floppy tape device driver | 319 | # Ftape, the floppy tape device driver |
313 | # | 320 | # |
314 | # CONFIG_DRM is not set | ||
315 | # CONFIG_RAW_DRIVER is not set | 321 | # CONFIG_RAW_DRIVER is not set |
316 | 322 | ||
317 | # | 323 | # |
@@ -335,6 +341,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
335 | # CONFIG_JBD is not set | 341 | # CONFIG_JBD is not set |
336 | # CONFIG_REISERFS_FS is not set | 342 | # CONFIG_REISERFS_FS is not set |
337 | # CONFIG_JFS_FS is not set | 343 | # CONFIG_JFS_FS is not set |
344 | # CONFIG_FS_POSIX_ACL is not set | ||
338 | 345 | ||
339 | # | 346 | # |
340 | # XFS support | 347 | # XFS support |
@@ -342,6 +349,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
342 | # CONFIG_XFS_FS is not set | 349 | # CONFIG_XFS_FS is not set |
343 | # CONFIG_MINIX_FS is not set | 350 | # CONFIG_MINIX_FS is not set |
344 | CONFIG_ROMFS_FS=y | 351 | CONFIG_ROMFS_FS=y |
352 | # CONFIG_MAGIC_ROM_PTR is not set | ||
353 | CONFIG_INOTIFY=y | ||
345 | # CONFIG_QUOTA is not set | 354 | # CONFIG_QUOTA is not set |
346 | CONFIG_DNOTIFY=y | 355 | CONFIG_DNOTIFY=y |
347 | # CONFIG_AUTOFS_FS is not set | 356 | # CONFIG_AUTOFS_FS is not set |
diff --git a/arch/v850/configs/sim_defconfig b/arch/v850/configs/sim_defconfig index d73f5f9d8383..f31ba7398ad0 100644 --- a/arch/v850/configs/sim_defconfig +++ b/arch/v850/configs/sim_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.12-uc0 | 3 | # Linux kernel version: 2.6.13-uc0 |
4 | # Thu Jul 21 11:29:27 2005 | 4 | # Fri Sep 2 13:36:43 2005 |
5 | # | 5 | # |
6 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
7 | # CONFIG_UID16 is not set | 7 | # CONFIG_UID16 is not set |
@@ -36,6 +36,8 @@ CONFIG_NO_CACHE=y | |||
36 | CONFIG_ZERO_BSS=y | 36 | CONFIG_ZERO_BSS=y |
37 | # CONFIG_RESET_GUARD is not set | 37 | # CONFIG_RESET_GUARD is not set |
38 | CONFIG_LARGE_ALLOCS=y | 38 | CONFIG_LARGE_ALLOCS=y |
39 | CONFIG_FLATMEM=y | ||
40 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
39 | 41 | ||
40 | # | 42 | # |
41 | # Code maturity level options | 43 | # Code maturity level options |
@@ -51,7 +53,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
51 | CONFIG_LOCALVERSION="" | 53 | CONFIG_LOCALVERSION="" |
52 | # CONFIG_BSD_PROCESS_ACCT is not set | 54 | # CONFIG_BSD_PROCESS_ACCT is not set |
53 | # CONFIG_SYSCTL is not set | 55 | # CONFIG_SYSCTL is not set |
54 | # CONFIG_AUDIT is not set | ||
55 | # CONFIG_HOTPLUG is not set | 56 | # CONFIG_HOTPLUG is not set |
56 | # CONFIG_IKCONFIG is not set | 57 | # CONFIG_IKCONFIG is not set |
57 | CONFIG_EMBEDDED=y | 58 | CONFIG_EMBEDDED=y |
@@ -99,6 +100,11 @@ CONFIG_BINFMT_FLAT=y | |||
99 | # CONFIG_BINFMT_MISC is not set | 100 | # CONFIG_BINFMT_MISC is not set |
100 | 101 | ||
101 | # | 102 | # |
103 | # Networking | ||
104 | # | ||
105 | # CONFIG_NET is not set | ||
106 | |||
107 | # | ||
102 | # Generic Driver Options | 108 | # Generic Driver Options |
103 | # | 109 | # |
104 | CONFIG_STANDALONE=y | 110 | CONFIG_STANDALONE=y |
@@ -146,6 +152,7 @@ CONFIG_MTD_CFI_I2=y | |||
146 | # Mapping drivers for chip access | 152 | # Mapping drivers for chip access |
147 | # | 153 | # |
148 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 154 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
155 | # CONFIG_MTD_PLATRAM is not set | ||
149 | 156 | ||
150 | # | 157 | # |
151 | # Self-contained MTD device drivers | 158 | # Self-contained MTD device drivers |
@@ -213,6 +220,7 @@ CONFIG_IOSCHED_NOOP=y | |||
213 | # | 220 | # |
214 | # Fusion MPT device support | 221 | # Fusion MPT device support |
215 | # | 222 | # |
223 | # CONFIG_FUSION is not set | ||
216 | 224 | ||
217 | # | 225 | # |
218 | # IEEE 1394 (FireWire) support | 226 | # IEEE 1394 (FireWire) support |
@@ -223,9 +231,8 @@ CONFIG_IOSCHED_NOOP=y | |||
223 | # | 231 | # |
224 | 232 | ||
225 | # | 233 | # |
226 | # Networking support | 234 | # Network device support |
227 | # | 235 | # |
228 | # CONFIG_NET is not set | ||
229 | # CONFIG_NETPOLL is not set | 236 | # CONFIG_NETPOLL is not set |
230 | # CONFIG_NET_POLL_CONTROLLER is not set | 237 | # CONFIG_NET_POLL_CONTROLLER is not set |
231 | 238 | ||
@@ -300,7 +307,6 @@ CONFIG_SERIO=y | |||
300 | # | 307 | # |
301 | # Ftape, the floppy tape device driver | 308 | # Ftape, the floppy tape device driver |
302 | # | 309 | # |
303 | # CONFIG_DRM is not set | ||
304 | # CONFIG_RAW_DRIVER is not set | 310 | # CONFIG_RAW_DRIVER is not set |
305 | 311 | ||
306 | # | 312 | # |
@@ -324,6 +330,7 @@ CONFIG_SERIO=y | |||
324 | # CONFIG_JBD is not set | 330 | # CONFIG_JBD is not set |
325 | # CONFIG_REISERFS_FS is not set | 331 | # CONFIG_REISERFS_FS is not set |
326 | # CONFIG_JFS_FS is not set | 332 | # CONFIG_JFS_FS is not set |
333 | # CONFIG_FS_POSIX_ACL is not set | ||
327 | 334 | ||
328 | # | 335 | # |
329 | # XFS support | 336 | # XFS support |
@@ -331,6 +338,8 @@ CONFIG_SERIO=y | |||
331 | # CONFIG_XFS_FS is not set | 338 | # CONFIG_XFS_FS is not set |
332 | # CONFIG_MINIX_FS is not set | 339 | # CONFIG_MINIX_FS is not set |
333 | CONFIG_ROMFS_FS=y | 340 | CONFIG_ROMFS_FS=y |
341 | # CONFIG_MAGIC_ROM_PTR is not set | ||
342 | CONFIG_INOTIFY=y | ||
334 | # CONFIG_QUOTA is not set | 343 | # CONFIG_QUOTA is not set |
335 | CONFIG_DNOTIFY=y | 344 | CONFIG_DNOTIFY=y |
336 | # CONFIG_AUTOFS_FS is not set | 345 | # CONFIG_AUTOFS_FS is not set |
diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c index c41d72b01b88..abd48409dcca 100644 --- a/arch/v850/kernel/setup.c +++ b/arch/v850/kernel/setup.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/v850/kernel/setup.c -- Arch-dependent initialization functions | 2 | * arch/v850/kernel/setup.c -- Arch-dependent initialization functions |
3 | * | 3 | * |
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | 4 | * Copyright (C) 2001,02,03,05 NEC Electronics Corporation |
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | 5 | * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> |
6 | * | 6 | * |
7 | * This file is subject to the terms and conditions of the GNU General | 7 | * This file is subject to the terms and conditions of the GNU General |
8 | * Public License. See the file COPYING in the main directory of this | 8 | * Public License. See the file COPYING in the main directory of this |
@@ -98,10 +98,20 @@ void __init trap_init (void) | |||
98 | } | 98 | } |
99 | 99 | ||
100 | #ifdef CONFIG_MTD | 100 | #ifdef CONFIG_MTD |
101 | |||
102 | /* From drivers/mtd/devices/slram.c */ | ||
103 | #define SLRAM_BLK_SZ 0x4000 | ||
104 | |||
101 | /* Set the root filesystem to be the given memory region. | 105 | /* Set the root filesystem to be the given memory region. |
102 | Some parameter may be appended to CMD_LINE. */ | 106 | Some parameter may be appended to CMD_LINE. */ |
103 | void set_mem_root (void *addr, size_t len, char *cmd_line) | 107 | void set_mem_root (void *addr, size_t len, char *cmd_line) |
104 | { | 108 | { |
109 | /* Some sort of idiocy in MTD means we must supply a length that's | ||
110 | a multiple of SLRAM_BLK_SZ. We just round up the real length, | ||
111 | as the file system shouldn't attempt to access anything beyond | ||
112 | the end of the image anyway. */ | ||
113 | len = (((len - 1) + SLRAM_BLK_SZ) / SLRAM_BLK_SZ) * SLRAM_BLK_SZ; | ||
114 | |||
105 | /* The only way to pass info to the MTD slram driver is via | 115 | /* The only way to pass info to the MTD slram driver is via |
106 | the command line. */ | 116 | the command line. */ |
107 | if (*cmd_line) { | 117 | if (*cmd_line) { |
@@ -284,3 +294,33 @@ init_mem_alloc (unsigned long ram_start, unsigned long ram_len) | |||
284 | free_area_init_node (0, NODE_DATA(0), zones_size, | 294 | free_area_init_node (0, NODE_DATA(0), zones_size, |
285 | ADDR_TO_PAGE (PAGE_OFFSET), 0); | 295 | ADDR_TO_PAGE (PAGE_OFFSET), 0); |
286 | } | 296 | } |
297 | |||
298 | |||
299 | |||
300 | /* Taken from m68knommu */ | ||
301 | void show_mem(void) | ||
302 | { | ||
303 | unsigned long i; | ||
304 | int free = 0, total = 0, reserved = 0, shared = 0; | ||
305 | int cached = 0; | ||
306 | |||
307 | printk(KERN_INFO "\nMem-info:\n"); | ||
308 | show_free_areas(); | ||
309 | i = max_mapnr; | ||
310 | while (i-- > 0) { | ||
311 | total++; | ||
312 | if (PageReserved(mem_map+i)) | ||
313 | reserved++; | ||
314 | else if (PageSwapCache(mem_map+i)) | ||
315 | cached++; | ||
316 | else if (!page_count(mem_map+i)) | ||
317 | free++; | ||
318 | else | ||
319 | shared += page_count(mem_map+i) - 1; | ||
320 | } | ||
321 | printk(KERN_INFO "%d pages of RAM\n",total); | ||
322 | printk(KERN_INFO "%d free pages\n",free); | ||
323 | printk(KERN_INFO "%d reserved pages\n",reserved); | ||
324 | printk(KERN_INFO "%d pages shared\n",shared); | ||
325 | printk(KERN_INFO "%d pages swap cached\n",cached); | ||
326 | } | ||
diff --git a/drivers/char/mwave/mwavedd.c b/drivers/char/mwave/mwavedd.c index d568991ac6b3..8666171e187b 100644 --- a/drivers/char/mwave/mwavedd.c +++ b/drivers/char/mwave/mwavedd.c | |||
@@ -57,6 +57,7 @@ | |||
57 | #include <linux/sched.h> | 57 | #include <linux/sched.h> |
58 | #include <linux/spinlock.h> | 58 | #include <linux/spinlock.h> |
59 | #include <linux/delay.h> | 59 | #include <linux/delay.h> |
60 | #include <linux/serial_8250.h> | ||
60 | #include "smapi.h" | 61 | #include "smapi.h" |
61 | #include "mwavedd.h" | 62 | #include "mwavedd.h" |
62 | #include "3780i.h" | 63 | #include "3780i.h" |
@@ -410,8 +411,8 @@ static ssize_t mwave_write(struct file *file, const char __user *buf, | |||
410 | 411 | ||
411 | static int register_serial_portandirq(unsigned int port, int irq) | 412 | static int register_serial_portandirq(unsigned int port, int irq) |
412 | { | 413 | { |
413 | struct serial_struct serial; | 414 | struct uart_port uart; |
414 | 415 | ||
415 | switch ( port ) { | 416 | switch ( port ) { |
416 | case 0x3f8: | 417 | case 0x3f8: |
417 | case 0x2f8: | 418 | case 0x2f8: |
@@ -442,12 +443,14 @@ static int register_serial_portandirq(unsigned int port, int irq) | |||
442 | } /* switch */ | 443 | } /* switch */ |
443 | /* irq is okay */ | 444 | /* irq is okay */ |
444 | 445 | ||
445 | memset(&serial, 0, sizeof(serial)); | 446 | memset(&uart, 0, sizeof(struct uart_port)); |
446 | serial.port = port; | 447 | |
447 | serial.irq = irq; | 448 | uart.uartclk = 1843200; |
448 | serial.flags = ASYNC_SHARE_IRQ; | 449 | uart.iobase = port; |
449 | 450 | uart.irq = irq; | |
450 | return register_serial(&serial); | 451 | uart.iotype = UPIO_PORT; |
452 | uart.flags = UPF_SHARE_IRQ; | ||
453 | return serial8250_register_port(&uart); | ||
451 | } | 454 | } |
452 | 455 | ||
453 | 456 | ||
@@ -523,7 +526,7 @@ static void mwave_exit(void) | |||
523 | #endif | 526 | #endif |
524 | 527 | ||
525 | if ( pDrvData->sLine >= 0 ) { | 528 | if ( pDrvData->sLine >= 0 ) { |
526 | unregister_serial(pDrvData->sLine); | 529 | serial8250_unregister_port(pDrvData->sLine); |
527 | } | 530 | } |
528 | if (pDrvData->bMwaveDevRegistered) { | 531 | if (pDrvData->bMwaveDevRegistered) { |
529 | misc_deregister(&mwave_misc_dev); | 532 | misc_deregister(&mwave_misc_dev); |
diff --git a/drivers/char/snsc_event.c b/drivers/char/snsc_event.c index d692af57213a..baaa365285fa 100644 --- a/drivers/char/snsc_event.c +++ b/drivers/char/snsc_event.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/sched.h> | 19 | #include <linux/sched.h> |
20 | #include <linux/byteorder/generic.h> | 20 | #include <linux/byteorder/generic.h> |
21 | #include <asm/sn/sn_sal.h> | 21 | #include <asm/sn/sn_sal.h> |
22 | #include <asm/unaligned.h> | ||
22 | #include "snsc.h" | 23 | #include "snsc.h" |
23 | 24 | ||
24 | static struct subch_data_s *event_sd; | 25 | static struct subch_data_s *event_sd; |
@@ -62,13 +63,16 @@ static int | |||
62 | scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc) | 63 | scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc) |
63 | { | 64 | { |
64 | char *desc_end; | 65 | char *desc_end; |
66 | __be32 from_buf; | ||
65 | 67 | ||
66 | /* record event source address */ | 68 | /* record event source address */ |
67 | *src = be32_to_cpup((__be32 *)event); | 69 | from_buf = get_unaligned((__be32 *)event); |
70 | *src = be32_to_cpup(&from_buf); | ||
68 | event += 4; /* move on to event code */ | 71 | event += 4; /* move on to event code */ |
69 | 72 | ||
70 | /* record the system controller's event code */ | 73 | /* record the system controller's event code */ |
71 | *code = be32_to_cpup((__be32 *)event); | 74 | from_buf = get_unaligned((__be32 *)event); |
75 | *code = be32_to_cpup(&from_buf); | ||
72 | event += 4; /* move on to event arguments */ | 76 | event += 4; /* move on to event arguments */ |
73 | 77 | ||
74 | /* how many arguments are in the packet? */ | 78 | /* how many arguments are in the packet? */ |
@@ -82,7 +86,8 @@ scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc) | |||
82 | /* not an integer argument, so give up */ | 86 | /* not an integer argument, so give up */ |
83 | return -1; | 87 | return -1; |
84 | } | 88 | } |
85 | *esp_code = be32_to_cpup((__be32 *)event); | 89 | from_buf = get_unaligned((__be32 *)event); |
90 | *esp_code = be32_to_cpup(&from_buf); | ||
86 | event += 4; | 91 | event += 4; |
87 | 92 | ||
88 | /* parse out the event description */ | 93 | /* parse out the event description */ |
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig index bf3c011d2cfb..d8bf65877897 100644 --- a/drivers/media/dvb/ttpci/Kconfig +++ b/drivers/media/dvb/ttpci/Kconfig | |||
@@ -102,6 +102,9 @@ config DVB_BUDGET_AV | |||
102 | select VIDEO_DEV | 102 | select VIDEO_DEV |
103 | select VIDEO_SAA7146_VV | 103 | select VIDEO_SAA7146_VV |
104 | select DVB_STV0299 | 104 | select DVB_STV0299 |
105 | select DVB_TDA1004X | ||
106 | select DVB_TDA10021 | ||
107 | select FW_LOADER | ||
105 | help | 108 | help |
106 | Support for simple SAA7146 based DVB cards | 109 | Support for simple SAA7146 based DVB cards |
107 | (so called Budget- or Nova-PCI cards) without onboard | 110 | (so called Budget- or Nova-PCI cards) without onboard |
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 7fc692a8f5b0..dea6589d1533 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
@@ -6,7 +6,7 @@ menu "Misc devices" | |||
6 | 6 | ||
7 | config IBM_ASM | 7 | config IBM_ASM |
8 | tristate "Device driver for IBM RSA service processor" | 8 | tristate "Device driver for IBM RSA service processor" |
9 | depends on X86 && PCI && EXPERIMENTAL | 9 | depends on X86 && PCI && EXPERIMENTAL && BROKEN |
10 | ---help--- | 10 | ---help--- |
11 | This option enables device driver support for in-band access to the | 11 | This option enables device driver support for in-band access to the |
12 | IBM RSA (Condor) service processor in eServer xSeries systems. | 12 | IBM RSA (Condor) service processor in eServer xSeries systems. |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index e0239a10d325..7d8bcb38797a 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -447,7 +447,7 @@ config NET_SB1250_MAC | |||
447 | 447 | ||
448 | config SGI_IOC3_ETH | 448 | config SGI_IOC3_ETH |
449 | bool "SGI IOC3 Ethernet" | 449 | bool "SGI IOC3 Ethernet" |
450 | depends on NET_ETHERNET && PCI && SGI_IP27 | 450 | depends on NET_ETHERNET && PCI && SGI_IP27 && BROKEN |
451 | select CRC32 | 451 | select CRC32 |
452 | select MII | 452 | select MII |
453 | help | 453 | help |
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c index 183ba97785b0..dc5d089bf184 100644 --- a/drivers/net/iseries_veth.c +++ b/drivers/net/iseries_veth.c | |||
@@ -79,12 +79,55 @@ | |||
79 | #include <asm/iommu.h> | 79 | #include <asm/iommu.h> |
80 | #include <asm/vio.h> | 80 | #include <asm/vio.h> |
81 | 81 | ||
82 | #include "iseries_veth.h" | 82 | #undef DEBUG |
83 | 83 | ||
84 | MODULE_AUTHOR("Kyle Lucke <klucke@us.ibm.com>"); | 84 | MODULE_AUTHOR("Kyle Lucke <klucke@us.ibm.com>"); |
85 | MODULE_DESCRIPTION("iSeries Virtual ethernet driver"); | 85 | MODULE_DESCRIPTION("iSeries Virtual ethernet driver"); |
86 | MODULE_LICENSE("GPL"); | 86 | MODULE_LICENSE("GPL"); |
87 | 87 | ||
88 | #define VETH_EVENT_CAP (0) | ||
89 | #define VETH_EVENT_FRAMES (1) | ||
90 | #define VETH_EVENT_MONITOR (2) | ||
91 | #define VETH_EVENT_FRAMES_ACK (3) | ||
92 | |||
93 | #define VETH_MAX_ACKS_PER_MSG (20) | ||
94 | #define VETH_MAX_FRAMES_PER_MSG (6) | ||
95 | |||
96 | struct veth_frames_data { | ||
97 | u32 addr[VETH_MAX_FRAMES_PER_MSG]; | ||
98 | u16 len[VETH_MAX_FRAMES_PER_MSG]; | ||
99 | u32 eofmask; | ||
100 | }; | ||
101 | #define VETH_EOF_SHIFT (32-VETH_MAX_FRAMES_PER_MSG) | ||
102 | |||
103 | struct veth_frames_ack_data { | ||
104 | u16 token[VETH_MAX_ACKS_PER_MSG]; | ||
105 | }; | ||
106 | |||
107 | struct veth_cap_data { | ||
108 | u8 caps_version; | ||
109 | u8 rsvd1; | ||
110 | u16 num_buffers; | ||
111 | u16 ack_threshold; | ||
112 | u16 rsvd2; | ||
113 | u32 ack_timeout; | ||
114 | u32 rsvd3; | ||
115 | u64 rsvd4[3]; | ||
116 | }; | ||
117 | |||
118 | struct veth_lpevent { | ||
119 | struct HvLpEvent base_event; | ||
120 | union { | ||
121 | struct veth_cap_data caps_data; | ||
122 | struct veth_frames_data frames_data; | ||
123 | struct veth_frames_ack_data frames_ack_data; | ||
124 | } u; | ||
125 | |||
126 | }; | ||
127 | |||
128 | #define DRV_NAME "iseries_veth" | ||
129 | #define DRV_VERSION "2.0" | ||
130 | |||
88 | #define VETH_NUMBUFFERS (120) | 131 | #define VETH_NUMBUFFERS (120) |
89 | #define VETH_ACKTIMEOUT (1000000) /* microseconds */ | 132 | #define VETH_ACKTIMEOUT (1000000) /* microseconds */ |
90 | #define VETH_MAX_MCAST (12) | 133 | #define VETH_MAX_MCAST (12) |
@@ -113,9 +156,9 @@ MODULE_LICENSE("GPL"); | |||
113 | 156 | ||
114 | struct veth_msg { | 157 | struct veth_msg { |
115 | struct veth_msg *next; | 158 | struct veth_msg *next; |
116 | struct VethFramesData data; | 159 | struct veth_frames_data data; |
117 | int token; | 160 | int token; |
118 | unsigned long in_use; | 161 | int in_use; |
119 | struct sk_buff *skb; | 162 | struct sk_buff *skb; |
120 | struct device *dev; | 163 | struct device *dev; |
121 | }; | 164 | }; |
@@ -125,23 +168,28 @@ struct veth_lpar_connection { | |||
125 | struct work_struct statemachine_wq; | 168 | struct work_struct statemachine_wq; |
126 | struct veth_msg *msgs; | 169 | struct veth_msg *msgs; |
127 | int num_events; | 170 | int num_events; |
128 | struct VethCapData local_caps; | 171 | struct veth_cap_data local_caps; |
129 | 172 | ||
173 | struct kobject kobject; | ||
130 | struct timer_list ack_timer; | 174 | struct timer_list ack_timer; |
131 | 175 | ||
176 | struct timer_list reset_timer; | ||
177 | unsigned int reset_timeout; | ||
178 | unsigned long last_contact; | ||
179 | int outstanding_tx; | ||
180 | |||
132 | spinlock_t lock; | 181 | spinlock_t lock; |
133 | unsigned long state; | 182 | unsigned long state; |
134 | HvLpInstanceId src_inst; | 183 | HvLpInstanceId src_inst; |
135 | HvLpInstanceId dst_inst; | 184 | HvLpInstanceId dst_inst; |
136 | struct VethLpEvent cap_event, cap_ack_event; | 185 | struct veth_lpevent cap_event, cap_ack_event; |
137 | u16 pending_acks[VETH_MAX_ACKS_PER_MSG]; | 186 | u16 pending_acks[VETH_MAX_ACKS_PER_MSG]; |
138 | u32 num_pending_acks; | 187 | u32 num_pending_acks; |
139 | 188 | ||
140 | int num_ack_events; | 189 | int num_ack_events; |
141 | struct VethCapData remote_caps; | 190 | struct veth_cap_data remote_caps; |
142 | u32 ack_timeout; | 191 | u32 ack_timeout; |
143 | 192 | ||
144 | spinlock_t msg_stack_lock; | ||
145 | struct veth_msg *msg_stack_head; | 193 | struct veth_msg *msg_stack_head; |
146 | }; | 194 | }; |
147 | 195 | ||
@@ -151,15 +199,17 @@ struct veth_port { | |||
151 | u64 mac_addr; | 199 | u64 mac_addr; |
152 | HvLpIndexMap lpar_map; | 200 | HvLpIndexMap lpar_map; |
153 | 201 | ||
154 | spinlock_t pending_gate; | 202 | /* queue_lock protects the stopped_map and dev's queue. */ |
155 | struct sk_buff *pending_skb; | 203 | spinlock_t queue_lock; |
156 | HvLpIndexMap pending_lpmask; | 204 | HvLpIndexMap stopped_map; |
157 | 205 | ||
206 | /* mcast_gate protects promiscuous, num_mcast & mcast_addr. */ | ||
158 | rwlock_t mcast_gate; | 207 | rwlock_t mcast_gate; |
159 | int promiscuous; | 208 | int promiscuous; |
160 | int all_mcast; | ||
161 | int num_mcast; | 209 | int num_mcast; |
162 | u64 mcast_addr[VETH_MAX_MCAST]; | 210 | u64 mcast_addr[VETH_MAX_MCAST]; |
211 | |||
212 | struct kobject kobject; | ||
163 | }; | 213 | }; |
164 | 214 | ||
165 | static HvLpIndex this_lp; | 215 | static HvLpIndex this_lp; |
@@ -168,44 +218,56 @@ static struct net_device *veth_dev[HVMAXARCHITECTEDVIRTUALLANS]; /* = 0 */ | |||
168 | 218 | ||
169 | static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev); | 219 | static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev); |
170 | static void veth_recycle_msg(struct veth_lpar_connection *, struct veth_msg *); | 220 | static void veth_recycle_msg(struct veth_lpar_connection *, struct veth_msg *); |
171 | static void veth_flush_pending(struct veth_lpar_connection *cnx); | 221 | static void veth_wake_queues(struct veth_lpar_connection *cnx); |
172 | static void veth_receive(struct veth_lpar_connection *, struct VethLpEvent *); | 222 | static void veth_stop_queues(struct veth_lpar_connection *cnx); |
173 | static void veth_timed_ack(unsigned long connectionPtr); | 223 | static void veth_receive(struct veth_lpar_connection *, struct veth_lpevent *); |
224 | static void veth_release_connection(struct kobject *kobject); | ||
225 | static void veth_timed_ack(unsigned long ptr); | ||
226 | static void veth_timed_reset(unsigned long ptr); | ||
174 | 227 | ||
175 | /* | 228 | /* |
176 | * Utility functions | 229 | * Utility functions |
177 | */ | 230 | */ |
178 | 231 | ||
179 | #define veth_printk(prio, fmt, args...) \ | 232 | #define veth_info(fmt, args...) \ |
180 | printk(prio "%s: " fmt, __FILE__, ## args) | 233 | printk(KERN_INFO DRV_NAME ": " fmt, ## args) |
181 | 234 | ||
182 | #define veth_error(fmt, args...) \ | 235 | #define veth_error(fmt, args...) \ |
183 | printk(KERN_ERR "(%s:%3.3d) ERROR: " fmt, __FILE__, __LINE__ , ## args) | 236 | printk(KERN_ERR DRV_NAME ": Error: " fmt, ## args) |
237 | |||
238 | #ifdef DEBUG | ||
239 | #define veth_debug(fmt, args...) \ | ||
240 | printk(KERN_DEBUG DRV_NAME ": " fmt, ## args) | ||
241 | #else | ||
242 | #define veth_debug(fmt, args...) do {} while (0) | ||
243 | #endif | ||
184 | 244 | ||
245 | /* You must hold the connection's lock when you call this function. */ | ||
185 | static inline void veth_stack_push(struct veth_lpar_connection *cnx, | 246 | static inline void veth_stack_push(struct veth_lpar_connection *cnx, |
186 | struct veth_msg *msg) | 247 | struct veth_msg *msg) |
187 | { | 248 | { |
188 | unsigned long flags; | ||
189 | |||
190 | spin_lock_irqsave(&cnx->msg_stack_lock, flags); | ||
191 | msg->next = cnx->msg_stack_head; | 249 | msg->next = cnx->msg_stack_head; |
192 | cnx->msg_stack_head = msg; | 250 | cnx->msg_stack_head = msg; |
193 | spin_unlock_irqrestore(&cnx->msg_stack_lock, flags); | ||
194 | } | 251 | } |
195 | 252 | ||
253 | /* You must hold the connection's lock when you call this function. */ | ||
196 | static inline struct veth_msg *veth_stack_pop(struct veth_lpar_connection *cnx) | 254 | static inline struct veth_msg *veth_stack_pop(struct veth_lpar_connection *cnx) |
197 | { | 255 | { |
198 | unsigned long flags; | ||
199 | struct veth_msg *msg; | 256 | struct veth_msg *msg; |
200 | 257 | ||
201 | spin_lock_irqsave(&cnx->msg_stack_lock, flags); | ||
202 | msg = cnx->msg_stack_head; | 258 | msg = cnx->msg_stack_head; |
203 | if (msg) | 259 | if (msg) |
204 | cnx->msg_stack_head = cnx->msg_stack_head->next; | 260 | cnx->msg_stack_head = cnx->msg_stack_head->next; |
205 | spin_unlock_irqrestore(&cnx->msg_stack_lock, flags); | 261 | |
206 | return msg; | 262 | return msg; |
207 | } | 263 | } |
208 | 264 | ||
265 | /* You must hold the connection's lock when you call this function. */ | ||
266 | static inline int veth_stack_is_empty(struct veth_lpar_connection *cnx) | ||
267 | { | ||
268 | return cnx->msg_stack_head == NULL; | ||
269 | } | ||
270 | |||
209 | static inline HvLpEvent_Rc | 271 | static inline HvLpEvent_Rc |
210 | veth_signalevent(struct veth_lpar_connection *cnx, u16 subtype, | 272 | veth_signalevent(struct veth_lpar_connection *cnx, u16 subtype, |
211 | HvLpEvent_AckInd ackind, HvLpEvent_AckType acktype, | 273 | HvLpEvent_AckInd ackind, HvLpEvent_AckType acktype, |
@@ -249,7 +311,7 @@ static int veth_allocate_events(HvLpIndex rlp, int number) | |||
249 | struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 }; | 311 | struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 }; |
250 | 312 | ||
251 | mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan, | 313 | mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan, |
252 | sizeof(struct VethLpEvent), number, | 314 | sizeof(struct veth_lpevent), number, |
253 | &veth_complete_allocation, &vc); | 315 | &veth_complete_allocation, &vc); |
254 | wait_for_completion(&vc.c); | 316 | wait_for_completion(&vc.c); |
255 | 317 | ||
@@ -257,6 +319,137 @@ static int veth_allocate_events(HvLpIndex rlp, int number) | |||
257 | } | 319 | } |
258 | 320 | ||
259 | /* | 321 | /* |
322 | * sysfs support | ||
323 | */ | ||
324 | |||
325 | struct veth_cnx_attribute { | ||
326 | struct attribute attr; | ||
327 | ssize_t (*show)(struct veth_lpar_connection *, char *buf); | ||
328 | ssize_t (*store)(struct veth_lpar_connection *, const char *buf); | ||
329 | }; | ||
330 | |||
331 | static ssize_t veth_cnx_attribute_show(struct kobject *kobj, | ||
332 | struct attribute *attr, char *buf) | ||
333 | { | ||
334 | struct veth_cnx_attribute *cnx_attr; | ||
335 | struct veth_lpar_connection *cnx; | ||
336 | |||
337 | cnx_attr = container_of(attr, struct veth_cnx_attribute, attr); | ||
338 | cnx = container_of(kobj, struct veth_lpar_connection, kobject); | ||
339 | |||
340 | if (!cnx_attr->show) | ||
341 | return -EIO; | ||
342 | |||
343 | return cnx_attr->show(cnx, buf); | ||
344 | } | ||
345 | |||
346 | #define CUSTOM_CNX_ATTR(_name, _format, _expression) \ | ||
347 | static ssize_t _name##_show(struct veth_lpar_connection *cnx, char *buf)\ | ||
348 | { \ | ||
349 | return sprintf(buf, _format, _expression); \ | ||
350 | } \ | ||
351 | struct veth_cnx_attribute veth_cnx_attr_##_name = __ATTR_RO(_name) | ||
352 | |||
353 | #define SIMPLE_CNX_ATTR(_name) \ | ||
354 | CUSTOM_CNX_ATTR(_name, "%lu\n", (unsigned long)cnx->_name) | ||
355 | |||
356 | SIMPLE_CNX_ATTR(outstanding_tx); | ||
357 | SIMPLE_CNX_ATTR(remote_lp); | ||
358 | SIMPLE_CNX_ATTR(num_events); | ||
359 | SIMPLE_CNX_ATTR(src_inst); | ||
360 | SIMPLE_CNX_ATTR(dst_inst); | ||
361 | SIMPLE_CNX_ATTR(num_pending_acks); | ||
362 | SIMPLE_CNX_ATTR(num_ack_events); | ||
363 | CUSTOM_CNX_ATTR(ack_timeout, "%d\n", jiffies_to_msecs(cnx->ack_timeout)); | ||
364 | CUSTOM_CNX_ATTR(reset_timeout, "%d\n", jiffies_to_msecs(cnx->reset_timeout)); | ||
365 | CUSTOM_CNX_ATTR(state, "0x%.4lX\n", cnx->state); | ||
366 | CUSTOM_CNX_ATTR(last_contact, "%d\n", cnx->last_contact ? | ||
367 | jiffies_to_msecs(jiffies - cnx->last_contact) : 0); | ||
368 | |||
369 | #define GET_CNX_ATTR(_name) (&veth_cnx_attr_##_name.attr) | ||
370 | |||
371 | static struct attribute *veth_cnx_default_attrs[] = { | ||
372 | GET_CNX_ATTR(outstanding_tx), | ||
373 | GET_CNX_ATTR(remote_lp), | ||
374 | GET_CNX_ATTR(num_events), | ||
375 | GET_CNX_ATTR(reset_timeout), | ||
376 | GET_CNX_ATTR(last_contact), | ||
377 | GET_CNX_ATTR(state), | ||
378 | GET_CNX_ATTR(src_inst), | ||
379 | GET_CNX_ATTR(dst_inst), | ||
380 | GET_CNX_ATTR(num_pending_acks), | ||
381 | GET_CNX_ATTR(num_ack_events), | ||
382 | GET_CNX_ATTR(ack_timeout), | ||
383 | NULL | ||
384 | }; | ||
385 | |||
386 | static struct sysfs_ops veth_cnx_sysfs_ops = { | ||
387 | .show = veth_cnx_attribute_show | ||
388 | }; | ||
389 | |||
390 | static struct kobj_type veth_lpar_connection_ktype = { | ||
391 | .release = veth_release_connection, | ||
392 | .sysfs_ops = &veth_cnx_sysfs_ops, | ||
393 | .default_attrs = veth_cnx_default_attrs | ||
394 | }; | ||
395 | |||
396 | struct veth_port_attribute { | ||
397 | struct attribute attr; | ||
398 | ssize_t (*show)(struct veth_port *, char *buf); | ||
399 | ssize_t (*store)(struct veth_port *, const char *buf); | ||
400 | }; | ||
401 | |||
402 | static ssize_t veth_port_attribute_show(struct kobject *kobj, | ||
403 | struct attribute *attr, char *buf) | ||
404 | { | ||
405 | struct veth_port_attribute *port_attr; | ||
406 | struct veth_port *port; | ||
407 | |||
408 | port_attr = container_of(attr, struct veth_port_attribute, attr); | ||
409 | port = container_of(kobj, struct veth_port, kobject); | ||
410 | |||
411 | if (!port_attr->show) | ||
412 | return -EIO; | ||
413 | |||
414 | return port_attr->show(port, buf); | ||
415 | } | ||
416 | |||
417 | #define CUSTOM_PORT_ATTR(_name, _format, _expression) \ | ||
418 | static ssize_t _name##_show(struct veth_port *port, char *buf) \ | ||
419 | { \ | ||
420 | return sprintf(buf, _format, _expression); \ | ||
421 | } \ | ||
422 | struct veth_port_attribute veth_port_attr_##_name = __ATTR_RO(_name) | ||
423 | |||
424 | #define SIMPLE_PORT_ATTR(_name) \ | ||
425 | CUSTOM_PORT_ATTR(_name, "%lu\n", (unsigned long)port->_name) | ||
426 | |||
427 | SIMPLE_PORT_ATTR(promiscuous); | ||
428 | SIMPLE_PORT_ATTR(num_mcast); | ||
429 | CUSTOM_PORT_ATTR(lpar_map, "0x%X\n", port->lpar_map); | ||
430 | CUSTOM_PORT_ATTR(stopped_map, "0x%X\n", port->stopped_map); | ||
431 | CUSTOM_PORT_ATTR(mac_addr, "0x%lX\n", port->mac_addr); | ||
432 | |||
433 | #define GET_PORT_ATTR(_name) (&veth_port_attr_##_name.attr) | ||
434 | static struct attribute *veth_port_default_attrs[] = { | ||
435 | GET_PORT_ATTR(mac_addr), | ||
436 | GET_PORT_ATTR(lpar_map), | ||
437 | GET_PORT_ATTR(stopped_map), | ||
438 | GET_PORT_ATTR(promiscuous), | ||
439 | GET_PORT_ATTR(num_mcast), | ||
440 | NULL | ||
441 | }; | ||
442 | |||
443 | static struct sysfs_ops veth_port_sysfs_ops = { | ||
444 | .show = veth_port_attribute_show | ||
445 | }; | ||
446 | |||
447 | static struct kobj_type veth_port_ktype = { | ||
448 | .sysfs_ops = &veth_port_sysfs_ops, | ||
449 | .default_attrs = veth_port_default_attrs | ||
450 | }; | ||
451 | |||
452 | /* | ||
260 | * LPAR connection code | 453 | * LPAR connection code |
261 | */ | 454 | */ |
262 | 455 | ||
@@ -266,7 +459,7 @@ static inline void veth_kick_statemachine(struct veth_lpar_connection *cnx) | |||
266 | } | 459 | } |
267 | 460 | ||
268 | static void veth_take_cap(struct veth_lpar_connection *cnx, | 461 | static void veth_take_cap(struct veth_lpar_connection *cnx, |
269 | struct VethLpEvent *event) | 462 | struct veth_lpevent *event) |
270 | { | 463 | { |
271 | unsigned long flags; | 464 | unsigned long flags; |
272 | 465 | ||
@@ -278,7 +471,7 @@ static void veth_take_cap(struct veth_lpar_connection *cnx, | |||
278 | HvLpEvent_Type_VirtualLan); | 471 | HvLpEvent_Type_VirtualLan); |
279 | 472 | ||
280 | if (cnx->state & VETH_STATE_GOTCAPS) { | 473 | if (cnx->state & VETH_STATE_GOTCAPS) { |
281 | veth_error("Received a second capabilities from lpar %d\n", | 474 | veth_error("Received a second capabilities from LPAR %d.\n", |
282 | cnx->remote_lp); | 475 | cnx->remote_lp); |
283 | event->base_event.xRc = HvLpEvent_Rc_BufferNotAvailable; | 476 | event->base_event.xRc = HvLpEvent_Rc_BufferNotAvailable; |
284 | HvCallEvent_ackLpEvent((struct HvLpEvent *) event); | 477 | HvCallEvent_ackLpEvent((struct HvLpEvent *) event); |
@@ -291,13 +484,13 @@ static void veth_take_cap(struct veth_lpar_connection *cnx, | |||
291 | } | 484 | } |
292 | 485 | ||
293 | static void veth_take_cap_ack(struct veth_lpar_connection *cnx, | 486 | static void veth_take_cap_ack(struct veth_lpar_connection *cnx, |
294 | struct VethLpEvent *event) | 487 | struct veth_lpevent *event) |
295 | { | 488 | { |
296 | unsigned long flags; | 489 | unsigned long flags; |
297 | 490 | ||
298 | spin_lock_irqsave(&cnx->lock, flags); | 491 | spin_lock_irqsave(&cnx->lock, flags); |
299 | if (cnx->state & VETH_STATE_GOTCAPACK) { | 492 | if (cnx->state & VETH_STATE_GOTCAPACK) { |
300 | veth_error("Received a second capabilities ack from lpar %d\n", | 493 | veth_error("Received a second capabilities ack from LPAR %d.\n", |
301 | cnx->remote_lp); | 494 | cnx->remote_lp); |
302 | } else { | 495 | } else { |
303 | memcpy(&cnx->cap_ack_event, event, | 496 | memcpy(&cnx->cap_ack_event, event, |
@@ -309,19 +502,24 @@ static void veth_take_cap_ack(struct veth_lpar_connection *cnx, | |||
309 | } | 502 | } |
310 | 503 | ||
311 | static void veth_take_monitor_ack(struct veth_lpar_connection *cnx, | 504 | static void veth_take_monitor_ack(struct veth_lpar_connection *cnx, |
312 | struct VethLpEvent *event) | 505 | struct veth_lpevent *event) |
313 | { | 506 | { |
314 | unsigned long flags; | 507 | unsigned long flags; |
315 | 508 | ||
316 | spin_lock_irqsave(&cnx->lock, flags); | 509 | spin_lock_irqsave(&cnx->lock, flags); |
317 | veth_printk(KERN_DEBUG, "Monitor ack returned for lpar %d\n", | 510 | veth_debug("cnx %d: lost connection.\n", cnx->remote_lp); |
318 | cnx->remote_lp); | 511 | |
319 | cnx->state |= VETH_STATE_RESET; | 512 | /* Avoid kicking the statemachine once we're shutdown. |
320 | veth_kick_statemachine(cnx); | 513 | * It's unnecessary and it could break veth_stop_connection(). */ |
514 | |||
515 | if (! (cnx->state & VETH_STATE_SHUTDOWN)) { | ||
516 | cnx->state |= VETH_STATE_RESET; | ||
517 | veth_kick_statemachine(cnx); | ||
518 | } | ||
321 | spin_unlock_irqrestore(&cnx->lock, flags); | 519 | spin_unlock_irqrestore(&cnx->lock, flags); |
322 | } | 520 | } |
323 | 521 | ||
324 | static void veth_handle_ack(struct VethLpEvent *event) | 522 | static void veth_handle_ack(struct veth_lpevent *event) |
325 | { | 523 | { |
326 | HvLpIndex rlp = event->base_event.xTargetLp; | 524 | HvLpIndex rlp = event->base_event.xTargetLp; |
327 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; | 525 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; |
@@ -329,58 +527,67 @@ static void veth_handle_ack(struct VethLpEvent *event) | |||
329 | BUG_ON(! cnx); | 527 | BUG_ON(! cnx); |
330 | 528 | ||
331 | switch (event->base_event.xSubtype) { | 529 | switch (event->base_event.xSubtype) { |
332 | case VethEventTypeCap: | 530 | case VETH_EVENT_CAP: |
333 | veth_take_cap_ack(cnx, event); | 531 | veth_take_cap_ack(cnx, event); |
334 | break; | 532 | break; |
335 | case VethEventTypeMonitor: | 533 | case VETH_EVENT_MONITOR: |
336 | veth_take_monitor_ack(cnx, event); | 534 | veth_take_monitor_ack(cnx, event); |
337 | break; | 535 | break; |
338 | default: | 536 | default: |
339 | veth_error("Unknown ack type %d from lpar %d\n", | 537 | veth_error("Unknown ack type %d from LPAR %d.\n", |
340 | event->base_event.xSubtype, rlp); | 538 | event->base_event.xSubtype, rlp); |
341 | }; | 539 | }; |
342 | } | 540 | } |
343 | 541 | ||
344 | static void veth_handle_int(struct VethLpEvent *event) | 542 | static void veth_handle_int(struct veth_lpevent *event) |
345 | { | 543 | { |
346 | HvLpIndex rlp = event->base_event.xSourceLp; | 544 | HvLpIndex rlp = event->base_event.xSourceLp; |
347 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; | 545 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; |
348 | unsigned long flags; | 546 | unsigned long flags; |
349 | int i; | 547 | int i, acked = 0; |
350 | 548 | ||
351 | BUG_ON(! cnx); | 549 | BUG_ON(! cnx); |
352 | 550 | ||
353 | switch (event->base_event.xSubtype) { | 551 | switch (event->base_event.xSubtype) { |
354 | case VethEventTypeCap: | 552 | case VETH_EVENT_CAP: |
355 | veth_take_cap(cnx, event); | 553 | veth_take_cap(cnx, event); |
356 | break; | 554 | break; |
357 | case VethEventTypeMonitor: | 555 | case VETH_EVENT_MONITOR: |
358 | /* do nothing... this'll hang out here til we're dead, | 556 | /* do nothing... this'll hang out here til we're dead, |
359 | * and the hypervisor will return it for us. */ | 557 | * and the hypervisor will return it for us. */ |
360 | break; | 558 | break; |
361 | case VethEventTypeFramesAck: | 559 | case VETH_EVENT_FRAMES_ACK: |
362 | spin_lock_irqsave(&cnx->lock, flags); | 560 | spin_lock_irqsave(&cnx->lock, flags); |
561 | |||
363 | for (i = 0; i < VETH_MAX_ACKS_PER_MSG; ++i) { | 562 | for (i = 0; i < VETH_MAX_ACKS_PER_MSG; ++i) { |
364 | u16 msgnum = event->u.frames_ack_data.token[i]; | 563 | u16 msgnum = event->u.frames_ack_data.token[i]; |
365 | 564 | ||
366 | if (msgnum < VETH_NUMBUFFERS) | 565 | if (msgnum < VETH_NUMBUFFERS) { |
367 | veth_recycle_msg(cnx, cnx->msgs + msgnum); | 566 | veth_recycle_msg(cnx, cnx->msgs + msgnum); |
567 | cnx->outstanding_tx--; | ||
568 | acked++; | ||
569 | } | ||
570 | } | ||
571 | |||
572 | if (acked > 0) { | ||
573 | cnx->last_contact = jiffies; | ||
574 | veth_wake_queues(cnx); | ||
368 | } | 575 | } |
576 | |||
369 | spin_unlock_irqrestore(&cnx->lock, flags); | 577 | spin_unlock_irqrestore(&cnx->lock, flags); |
370 | veth_flush_pending(cnx); | ||
371 | break; | 578 | break; |
372 | case VethEventTypeFrames: | 579 | case VETH_EVENT_FRAMES: |
373 | veth_receive(cnx, event); | 580 | veth_receive(cnx, event); |
374 | break; | 581 | break; |
375 | default: | 582 | default: |
376 | veth_error("Unknown interrupt type %d from lpar %d\n", | 583 | veth_error("Unknown interrupt type %d from LPAR %d.\n", |
377 | event->base_event.xSubtype, rlp); | 584 | event->base_event.xSubtype, rlp); |
378 | }; | 585 | }; |
379 | } | 586 | } |
380 | 587 | ||
381 | static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs) | 588 | static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs) |
382 | { | 589 | { |
383 | struct VethLpEvent *veth_event = (struct VethLpEvent *)event; | 590 | struct veth_lpevent *veth_event = (struct veth_lpevent *)event; |
384 | 591 | ||
385 | if (event->xFlags.xFunction == HvLpEvent_Function_Ack) | 592 | if (event->xFlags.xFunction == HvLpEvent_Function_Ack) |
386 | veth_handle_ack(veth_event); | 593 | veth_handle_ack(veth_event); |
@@ -390,7 +597,7 @@ static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs) | |||
390 | 597 | ||
391 | static int veth_process_caps(struct veth_lpar_connection *cnx) | 598 | static int veth_process_caps(struct veth_lpar_connection *cnx) |
392 | { | 599 | { |
393 | struct VethCapData *remote_caps = &cnx->remote_caps; | 600 | struct veth_cap_data *remote_caps = &cnx->remote_caps; |
394 | int num_acks_needed; | 601 | int num_acks_needed; |
395 | 602 | ||
396 | /* Convert timer to jiffies */ | 603 | /* Convert timer to jiffies */ |
@@ -400,8 +607,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx) | |||
400 | || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG) | 607 | || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG) |
401 | || (remote_caps->ack_threshold == 0) | 608 | || (remote_caps->ack_threshold == 0) |
402 | || (cnx->ack_timeout == 0) ) { | 609 | || (cnx->ack_timeout == 0) ) { |
403 | veth_error("Received incompatible capabilities from lpar %d\n", | 610 | veth_error("Received incompatible capabilities from LPAR %d.\n", |
404 | cnx->remote_lp); | 611 | cnx->remote_lp); |
405 | return HvLpEvent_Rc_InvalidSubtypeData; | 612 | return HvLpEvent_Rc_InvalidSubtypeData; |
406 | } | 613 | } |
407 | 614 | ||
@@ -418,8 +625,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx) | |||
418 | cnx->num_ack_events += num; | 625 | cnx->num_ack_events += num; |
419 | 626 | ||
420 | if (cnx->num_ack_events < num_acks_needed) { | 627 | if (cnx->num_ack_events < num_acks_needed) { |
421 | veth_error("Couldn't allocate enough ack events for lpar %d\n", | 628 | veth_error("Couldn't allocate enough ack events " |
422 | cnx->remote_lp); | 629 | "for LPAR %d.\n", cnx->remote_lp); |
423 | 630 | ||
424 | return HvLpEvent_Rc_BufferNotAvailable; | 631 | return HvLpEvent_Rc_BufferNotAvailable; |
425 | } | 632 | } |
@@ -440,15 +647,15 @@ static void veth_statemachine(void *p) | |||
440 | 647 | ||
441 | restart: | 648 | restart: |
442 | if (cnx->state & VETH_STATE_RESET) { | 649 | if (cnx->state & VETH_STATE_RESET) { |
443 | int i; | ||
444 | |||
445 | del_timer(&cnx->ack_timer); | ||
446 | |||
447 | if (cnx->state & VETH_STATE_OPEN) | 650 | if (cnx->state & VETH_STATE_OPEN) |
448 | HvCallEvent_closeLpEventPath(cnx->remote_lp, | 651 | HvCallEvent_closeLpEventPath(cnx->remote_lp, |
449 | HvLpEvent_Type_VirtualLan); | 652 | HvLpEvent_Type_VirtualLan); |
450 | 653 | ||
451 | /* reset ack data */ | 654 | /* |
655 | * Reset ack data. This prevents the ack_timer actually | ||
656 | * doing anything, even if it runs one more time when | ||
657 | * we drop the lock below. | ||
658 | */ | ||
452 | memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); | 659 | memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); |
453 | cnx->num_pending_acks = 0; | 660 | cnx->num_pending_acks = 0; |
454 | 661 | ||
@@ -458,14 +665,32 @@ static void veth_statemachine(void *p) | |||
458 | | VETH_STATE_SENTCAPACK | VETH_STATE_READY); | 665 | | VETH_STATE_SENTCAPACK | VETH_STATE_READY); |
459 | 666 | ||
460 | /* Clean up any leftover messages */ | 667 | /* Clean up any leftover messages */ |
461 | if (cnx->msgs) | 668 | if (cnx->msgs) { |
669 | int i; | ||
462 | for (i = 0; i < VETH_NUMBUFFERS; ++i) | 670 | for (i = 0; i < VETH_NUMBUFFERS; ++i) |
463 | veth_recycle_msg(cnx, cnx->msgs + i); | 671 | veth_recycle_msg(cnx, cnx->msgs + i); |
672 | } | ||
673 | |||
674 | cnx->outstanding_tx = 0; | ||
675 | veth_wake_queues(cnx); | ||
676 | |||
677 | /* Drop the lock so we can do stuff that might sleep or | ||
678 | * take other locks. */ | ||
464 | spin_unlock_irq(&cnx->lock); | 679 | spin_unlock_irq(&cnx->lock); |
465 | veth_flush_pending(cnx); | 680 | |
681 | del_timer_sync(&cnx->ack_timer); | ||
682 | del_timer_sync(&cnx->reset_timer); | ||
683 | |||
466 | spin_lock_irq(&cnx->lock); | 684 | spin_lock_irq(&cnx->lock); |
685 | |||
467 | if (cnx->state & VETH_STATE_RESET) | 686 | if (cnx->state & VETH_STATE_RESET) |
468 | goto restart; | 687 | goto restart; |
688 | |||
689 | /* Hack, wait for the other end to reset itself. */ | ||
690 | if (! (cnx->state & VETH_STATE_SHUTDOWN)) { | ||
691 | schedule_delayed_work(&cnx->statemachine_wq, 5 * HZ); | ||
692 | goto out; | ||
693 | } | ||
469 | } | 694 | } |
470 | 695 | ||
471 | if (cnx->state & VETH_STATE_SHUTDOWN) | 696 | if (cnx->state & VETH_STATE_SHUTDOWN) |
@@ -488,7 +713,7 @@ static void veth_statemachine(void *p) | |||
488 | 713 | ||
489 | if ( (cnx->state & VETH_STATE_OPEN) | 714 | if ( (cnx->state & VETH_STATE_OPEN) |
490 | && !(cnx->state & VETH_STATE_SENTMON) ) { | 715 | && !(cnx->state & VETH_STATE_SENTMON) ) { |
491 | rc = veth_signalevent(cnx, VethEventTypeMonitor, | 716 | rc = veth_signalevent(cnx, VETH_EVENT_MONITOR, |
492 | HvLpEvent_AckInd_DoAck, | 717 | HvLpEvent_AckInd_DoAck, |
493 | HvLpEvent_AckType_DeferredAck, | 718 | HvLpEvent_AckType_DeferredAck, |
494 | 0, 0, 0, 0, 0, 0); | 719 | 0, 0, 0, 0, 0, 0); |
@@ -498,9 +723,8 @@ static void veth_statemachine(void *p) | |||
498 | } else { | 723 | } else { |
499 | if ( (rc != HvLpEvent_Rc_PartitionDead) | 724 | if ( (rc != HvLpEvent_Rc_PartitionDead) |
500 | && (rc != HvLpEvent_Rc_PathClosed) ) | 725 | && (rc != HvLpEvent_Rc_PathClosed) ) |
501 | veth_error("Error sending monitor to " | 726 | veth_error("Error sending monitor to LPAR %d, " |
502 | "lpar %d, rc=%x\n", | 727 | "rc = %d\n", rlp, rc); |
503 | rlp, (int) rc); | ||
504 | 728 | ||
505 | /* Oh well, hope we get a cap from the other | 729 | /* Oh well, hope we get a cap from the other |
506 | * end and do better when that kicks us */ | 730 | * end and do better when that kicks us */ |
@@ -512,7 +736,7 @@ static void veth_statemachine(void *p) | |||
512 | && !(cnx->state & VETH_STATE_SENTCAPS)) { | 736 | && !(cnx->state & VETH_STATE_SENTCAPS)) { |
513 | u64 *rawcap = (u64 *)&cnx->local_caps; | 737 | u64 *rawcap = (u64 *)&cnx->local_caps; |
514 | 738 | ||
515 | rc = veth_signalevent(cnx, VethEventTypeCap, | 739 | rc = veth_signalevent(cnx, VETH_EVENT_CAP, |
516 | HvLpEvent_AckInd_DoAck, | 740 | HvLpEvent_AckInd_DoAck, |
517 | HvLpEvent_AckType_ImmediateAck, | 741 | HvLpEvent_AckType_ImmediateAck, |
518 | 0, rawcap[0], rawcap[1], rawcap[2], | 742 | 0, rawcap[0], rawcap[1], rawcap[2], |
@@ -523,9 +747,9 @@ static void veth_statemachine(void *p) | |||
523 | } else { | 747 | } else { |
524 | if ( (rc != HvLpEvent_Rc_PartitionDead) | 748 | if ( (rc != HvLpEvent_Rc_PartitionDead) |
525 | && (rc != HvLpEvent_Rc_PathClosed) ) | 749 | && (rc != HvLpEvent_Rc_PathClosed) ) |
526 | veth_error("Error sending caps to " | 750 | veth_error("Error sending caps to LPAR %d, " |
527 | "lpar %d, rc=%x\n", | 751 | "rc = %d\n", rlp, rc); |
528 | rlp, (int) rc); | 752 | |
529 | /* Oh well, hope we get a cap from the other | 753 | /* Oh well, hope we get a cap from the other |
530 | * end and do better when that kicks us */ | 754 | * end and do better when that kicks us */ |
531 | goto out; | 755 | goto out; |
@@ -534,7 +758,7 @@ static void veth_statemachine(void *p) | |||
534 | 758 | ||
535 | if ((cnx->state & VETH_STATE_GOTCAPS) | 759 | if ((cnx->state & VETH_STATE_GOTCAPS) |
536 | && !(cnx->state & VETH_STATE_SENTCAPACK)) { | 760 | && !(cnx->state & VETH_STATE_SENTCAPACK)) { |
537 | struct VethCapData *remote_caps = &cnx->remote_caps; | 761 | struct veth_cap_data *remote_caps = &cnx->remote_caps; |
538 | 762 | ||
539 | memcpy(remote_caps, &cnx->cap_event.u.caps_data, | 763 | memcpy(remote_caps, &cnx->cap_event.u.caps_data, |
540 | sizeof(*remote_caps)); | 764 | sizeof(*remote_caps)); |
@@ -565,10 +789,8 @@ static void veth_statemachine(void *p) | |||
565 | add_timer(&cnx->ack_timer); | 789 | add_timer(&cnx->ack_timer); |
566 | cnx->state |= VETH_STATE_READY; | 790 | cnx->state |= VETH_STATE_READY; |
567 | } else { | 791 | } else { |
568 | veth_printk(KERN_ERR, "Caps rejected (rc=%d) by " | 792 | veth_error("Caps rejected by LPAR %d, rc = %d\n", |
569 | "lpar %d\n", | 793 | rlp, cnx->cap_ack_event.base_event.xRc); |
570 | cnx->cap_ack_event.base_event.xRc, | ||
571 | rlp); | ||
572 | goto cant_cope; | 794 | goto cant_cope; |
573 | } | 795 | } |
574 | } | 796 | } |
@@ -581,8 +803,8 @@ static void veth_statemachine(void *p) | |||
581 | /* FIXME: we get here if something happens we really can't | 803 | /* FIXME: we get here if something happens we really can't |
582 | * cope with. The link will never work once we get here, and | 804 | * cope with. The link will never work once we get here, and |
583 | * all we can do is not lock the rest of the system up */ | 805 | * all we can do is not lock the rest of the system up */ |
584 | veth_error("Badness on connection to lpar %d (state=%04lx) " | 806 | veth_error("Unrecoverable error on connection to LPAR %d, shutting down" |
585 | " - shutting down\n", rlp, cnx->state); | 807 | " (state = 0x%04lx)\n", rlp, cnx->state); |
586 | cnx->state |= VETH_STATE_SHUTDOWN; | 808 | cnx->state |= VETH_STATE_SHUTDOWN; |
587 | spin_unlock_irq(&cnx->lock); | 809 | spin_unlock_irq(&cnx->lock); |
588 | } | 810 | } |
@@ -591,7 +813,7 @@ static int veth_init_connection(u8 rlp) | |||
591 | { | 813 | { |
592 | struct veth_lpar_connection *cnx; | 814 | struct veth_lpar_connection *cnx; |
593 | struct veth_msg *msgs; | 815 | struct veth_msg *msgs; |
594 | int i; | 816 | int i, rc; |
595 | 817 | ||
596 | if ( (rlp == this_lp) | 818 | if ( (rlp == this_lp) |
597 | || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) ) | 819 | || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) ) |
@@ -605,22 +827,36 @@ static int veth_init_connection(u8 rlp) | |||
605 | cnx->remote_lp = rlp; | 827 | cnx->remote_lp = rlp; |
606 | spin_lock_init(&cnx->lock); | 828 | spin_lock_init(&cnx->lock); |
607 | INIT_WORK(&cnx->statemachine_wq, veth_statemachine, cnx); | 829 | INIT_WORK(&cnx->statemachine_wq, veth_statemachine, cnx); |
830 | |||
608 | init_timer(&cnx->ack_timer); | 831 | init_timer(&cnx->ack_timer); |
609 | cnx->ack_timer.function = veth_timed_ack; | 832 | cnx->ack_timer.function = veth_timed_ack; |
610 | cnx->ack_timer.data = (unsigned long) cnx; | 833 | cnx->ack_timer.data = (unsigned long) cnx; |
834 | |||
835 | init_timer(&cnx->reset_timer); | ||
836 | cnx->reset_timer.function = veth_timed_reset; | ||
837 | cnx->reset_timer.data = (unsigned long) cnx; | ||
838 | cnx->reset_timeout = 5 * HZ * (VETH_ACKTIMEOUT / 1000000); | ||
839 | |||
611 | memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); | 840 | memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); |
612 | 841 | ||
613 | veth_cnx[rlp] = cnx; | 842 | veth_cnx[rlp] = cnx; |
614 | 843 | ||
844 | /* This gets us 1 reference, which is held on behalf of the driver | ||
845 | * infrastructure. It's released at module unload. */ | ||
846 | kobject_init(&cnx->kobject); | ||
847 | cnx->kobject.ktype = &veth_lpar_connection_ktype; | ||
848 | rc = kobject_set_name(&cnx->kobject, "cnx%.2d", rlp); | ||
849 | if (rc != 0) | ||
850 | return rc; | ||
851 | |||
615 | msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL); | 852 | msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL); |
616 | if (! msgs) { | 853 | if (! msgs) { |
617 | veth_error("Can't allocate buffers for lpar %d\n", rlp); | 854 | veth_error("Can't allocate buffers for LPAR %d.\n", rlp); |
618 | return -ENOMEM; | 855 | return -ENOMEM; |
619 | } | 856 | } |
620 | 857 | ||
621 | cnx->msgs = msgs; | 858 | cnx->msgs = msgs; |
622 | memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg)); | 859 | memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg)); |
623 | spin_lock_init(&cnx->msg_stack_lock); | ||
624 | 860 | ||
625 | for (i = 0; i < VETH_NUMBUFFERS; i++) { | 861 | for (i = 0; i < VETH_NUMBUFFERS; i++) { |
626 | msgs[i].token = i; | 862 | msgs[i].token = i; |
@@ -630,8 +866,7 @@ static int veth_init_connection(u8 rlp) | |||
630 | cnx->num_events = veth_allocate_events(rlp, 2 + VETH_NUMBUFFERS); | 866 | cnx->num_events = veth_allocate_events(rlp, 2 + VETH_NUMBUFFERS); |
631 | 867 | ||
632 | if (cnx->num_events < (2 + VETH_NUMBUFFERS)) { | 868 | if (cnx->num_events < (2 + VETH_NUMBUFFERS)) { |
633 | veth_error("Can't allocate events for lpar %d, only got %d\n", | 869 | veth_error("Can't allocate enough events for LPAR %d.\n", rlp); |
634 | rlp, cnx->num_events); | ||
635 | return -ENOMEM; | 870 | return -ENOMEM; |
636 | } | 871 | } |
637 | 872 | ||
@@ -642,11 +877,9 @@ static int veth_init_connection(u8 rlp) | |||
642 | return 0; | 877 | return 0; |
643 | } | 878 | } |
644 | 879 | ||
645 | static void veth_stop_connection(u8 rlp) | 880 | static void veth_stop_connection(struct veth_lpar_connection *cnx) |
646 | { | 881 | { |
647 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; | 882 | if (!cnx) |
648 | |||
649 | if (! cnx) | ||
650 | return; | 883 | return; |
651 | 884 | ||
652 | spin_lock_irq(&cnx->lock); | 885 | spin_lock_irq(&cnx->lock); |
@@ -654,12 +887,23 @@ static void veth_stop_connection(u8 rlp) | |||
654 | veth_kick_statemachine(cnx); | 887 | veth_kick_statemachine(cnx); |
655 | spin_unlock_irq(&cnx->lock); | 888 | spin_unlock_irq(&cnx->lock); |
656 | 889 | ||
890 | /* There's a slim chance the reset code has just queued the | ||
891 | * statemachine to run in five seconds. If so we need to cancel | ||
892 | * that and requeue the work to run now. */ | ||
893 | if (cancel_delayed_work(&cnx->statemachine_wq)) { | ||
894 | spin_lock_irq(&cnx->lock); | ||
895 | veth_kick_statemachine(cnx); | ||
896 | spin_unlock_irq(&cnx->lock); | ||
897 | } | ||
898 | |||
899 | /* Wait for the state machine to run. */ | ||
657 | flush_scheduled_work(); | 900 | flush_scheduled_work(); |
901 | } | ||
658 | 902 | ||
659 | /* FIXME: not sure if this is necessary - will already have | 903 | static void veth_destroy_connection(struct veth_lpar_connection *cnx) |
660 | * been deleted by the state machine, just want to make sure | 904 | { |
661 | * its not running any more */ | 905 | if (!cnx) |
662 | del_timer_sync(&cnx->ack_timer); | 906 | return; |
663 | 907 | ||
664 | if (cnx->num_events > 0) | 908 | if (cnx->num_events > 0) |
665 | mf_deallocate_lp_events(cnx->remote_lp, | 909 | mf_deallocate_lp_events(cnx->remote_lp, |
@@ -671,18 +915,18 @@ static void veth_stop_connection(u8 rlp) | |||
671 | HvLpEvent_Type_VirtualLan, | 915 | HvLpEvent_Type_VirtualLan, |
672 | cnx->num_ack_events, | 916 | cnx->num_ack_events, |
673 | NULL, NULL); | 917 | NULL, NULL); |
674 | } | ||
675 | |||
676 | static void veth_destroy_connection(u8 rlp) | ||
677 | { | ||
678 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; | ||
679 | |||
680 | if (! cnx) | ||
681 | return; | ||
682 | 918 | ||
683 | kfree(cnx->msgs); | 919 | kfree(cnx->msgs); |
920 | veth_cnx[cnx->remote_lp] = NULL; | ||
684 | kfree(cnx); | 921 | kfree(cnx); |
685 | veth_cnx[rlp] = NULL; | 922 | } |
923 | |||
924 | static void veth_release_connection(struct kobject *kobj) | ||
925 | { | ||
926 | struct veth_lpar_connection *cnx; | ||
927 | cnx = container_of(kobj, struct veth_lpar_connection, kobject); | ||
928 | veth_stop_connection(cnx); | ||
929 | veth_destroy_connection(cnx); | ||
686 | } | 930 | } |
687 | 931 | ||
688 | /* | 932 | /* |
@@ -726,17 +970,15 @@ static void veth_set_multicast_list(struct net_device *dev) | |||
726 | 970 | ||
727 | write_lock_irqsave(&port->mcast_gate, flags); | 971 | write_lock_irqsave(&port->mcast_gate, flags); |
728 | 972 | ||
729 | if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ | 973 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || |
730 | printk(KERN_INFO "%s: Promiscuous mode enabled.\n", | 974 | (dev->mc_count > VETH_MAX_MCAST)) { |
731 | dev->name); | ||
732 | port->promiscuous = 1; | 975 | port->promiscuous = 1; |
733 | } else if ( (dev->flags & IFF_ALLMULTI) | ||
734 | || (dev->mc_count > VETH_MAX_MCAST) ) { | ||
735 | port->all_mcast = 1; | ||
736 | } else { | 976 | } else { |
737 | struct dev_mc_list *dmi = dev->mc_list; | 977 | struct dev_mc_list *dmi = dev->mc_list; |
738 | int i; | 978 | int i; |
739 | 979 | ||
980 | port->promiscuous = 0; | ||
981 | |||
740 | /* Update table */ | 982 | /* Update table */ |
741 | port->num_mcast = 0; | 983 | port->num_mcast = 0; |
742 | 984 | ||
@@ -758,9 +1000,10 @@ static void veth_set_multicast_list(struct net_device *dev) | |||
758 | 1000 | ||
759 | static void veth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | 1001 | static void veth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
760 | { | 1002 | { |
761 | strncpy(info->driver, "veth", sizeof(info->driver) - 1); | 1003 | strncpy(info->driver, DRV_NAME, sizeof(info->driver) - 1); |
762 | info->driver[sizeof(info->driver) - 1] = '\0'; | 1004 | info->driver[sizeof(info->driver) - 1] = '\0'; |
763 | strncpy(info->version, "1.0", sizeof(info->version) - 1); | 1005 | strncpy(info->version, DRV_VERSION, sizeof(info->version) - 1); |
1006 | info->version[sizeof(info->version) - 1] = '\0'; | ||
764 | } | 1007 | } |
765 | 1008 | ||
766 | static int veth_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | 1009 | static int veth_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
@@ -791,49 +1034,6 @@ static struct ethtool_ops ops = { | |||
791 | .get_link = veth_get_link, | 1034 | .get_link = veth_get_link, |
792 | }; | 1035 | }; |
793 | 1036 | ||
794 | static void veth_tx_timeout(struct net_device *dev) | ||
795 | { | ||
796 | struct veth_port *port = (struct veth_port *)dev->priv; | ||
797 | struct net_device_stats *stats = &port->stats; | ||
798 | unsigned long flags; | ||
799 | int i; | ||
800 | |||
801 | stats->tx_errors++; | ||
802 | |||
803 | spin_lock_irqsave(&port->pending_gate, flags); | ||
804 | |||
805 | if (!port->pending_lpmask) { | ||
806 | spin_unlock_irqrestore(&port->pending_gate, flags); | ||
807 | return; | ||
808 | } | ||
809 | |||
810 | printk(KERN_WARNING "%s: Tx timeout! Resetting lp connections: %08x\n", | ||
811 | dev->name, port->pending_lpmask); | ||
812 | |||
813 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { | ||
814 | struct veth_lpar_connection *cnx = veth_cnx[i]; | ||
815 | |||
816 | if (! (port->pending_lpmask & (1<<i))) | ||
817 | continue; | ||
818 | |||
819 | /* If we're pending on it, we must be connected to it, | ||
820 | * so we should certainly have a structure for it. */ | ||
821 | BUG_ON(! cnx); | ||
822 | |||
823 | /* Theoretically we could be kicking a connection | ||
824 | * which doesn't deserve it, but in practice if we've | ||
825 | * had a Tx timeout, the pending_lpmask will have | ||
826 | * exactly one bit set - the connection causing the | ||
827 | * problem. */ | ||
828 | spin_lock(&cnx->lock); | ||
829 | cnx->state |= VETH_STATE_RESET; | ||
830 | veth_kick_statemachine(cnx); | ||
831 | spin_unlock(&cnx->lock); | ||
832 | } | ||
833 | |||
834 | spin_unlock_irqrestore(&port->pending_gate, flags); | ||
835 | } | ||
836 | |||
837 | static struct net_device * __init veth_probe_one(int vlan, struct device *vdev) | 1037 | static struct net_device * __init veth_probe_one(int vlan, struct device *vdev) |
838 | { | 1038 | { |
839 | struct net_device *dev; | 1039 | struct net_device *dev; |
@@ -848,8 +1048,9 @@ static struct net_device * __init veth_probe_one(int vlan, struct device *vdev) | |||
848 | 1048 | ||
849 | port = (struct veth_port *) dev->priv; | 1049 | port = (struct veth_port *) dev->priv; |
850 | 1050 | ||
851 | spin_lock_init(&port->pending_gate); | 1051 | spin_lock_init(&port->queue_lock); |
852 | rwlock_init(&port->mcast_gate); | 1052 | rwlock_init(&port->mcast_gate); |
1053 | port->stopped_map = 0; | ||
853 | 1054 | ||
854 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { | 1055 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { |
855 | HvLpVirtualLanIndexMap map; | 1056 | HvLpVirtualLanIndexMap map; |
@@ -882,22 +1083,24 @@ static struct net_device * __init veth_probe_one(int vlan, struct device *vdev) | |||
882 | dev->set_multicast_list = veth_set_multicast_list; | 1083 | dev->set_multicast_list = veth_set_multicast_list; |
883 | SET_ETHTOOL_OPS(dev, &ops); | 1084 | SET_ETHTOOL_OPS(dev, &ops); |
884 | 1085 | ||
885 | dev->watchdog_timeo = 2 * (VETH_ACKTIMEOUT * HZ / 1000000); | ||
886 | dev->tx_timeout = veth_tx_timeout; | ||
887 | |||
888 | SET_NETDEV_DEV(dev, vdev); | 1086 | SET_NETDEV_DEV(dev, vdev); |
889 | 1087 | ||
890 | rc = register_netdev(dev); | 1088 | rc = register_netdev(dev); |
891 | if (rc != 0) { | 1089 | if (rc != 0) { |
892 | veth_printk(KERN_ERR, | 1090 | veth_error("Failed registering net device for vlan%d.\n", vlan); |
893 | "Failed to register ethernet device for vlan %d\n", | ||
894 | vlan); | ||
895 | free_netdev(dev); | 1091 | free_netdev(dev); |
896 | return NULL; | 1092 | return NULL; |
897 | } | 1093 | } |
898 | 1094 | ||
899 | veth_printk(KERN_DEBUG, "%s attached to iSeries vlan %d (lpar_map=0x%04x)\n", | 1095 | kobject_init(&port->kobject); |
900 | dev->name, vlan, port->lpar_map); | 1096 | port->kobject.parent = &dev->class_dev.kobj; |
1097 | port->kobject.ktype = &veth_port_ktype; | ||
1098 | kobject_set_name(&port->kobject, "veth_port"); | ||
1099 | if (0 != kobject_add(&port->kobject)) | ||
1100 | veth_error("Failed adding port for %s to sysfs.\n", dev->name); | ||
1101 | |||
1102 | veth_info("%s attached to iSeries vlan %d (LPAR map = 0x%.4X)\n", | ||
1103 | dev->name, vlan, port->lpar_map); | ||
901 | 1104 | ||
902 | return dev; | 1105 | return dev; |
903 | } | 1106 | } |
@@ -912,98 +1115,95 @@ static int veth_transmit_to_one(struct sk_buff *skb, HvLpIndex rlp, | |||
912 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; | 1115 | struct veth_lpar_connection *cnx = veth_cnx[rlp]; |
913 | struct veth_port *port = (struct veth_port *) dev->priv; | 1116 | struct veth_port *port = (struct veth_port *) dev->priv; |
914 | HvLpEvent_Rc rc; | 1117 | HvLpEvent_Rc rc; |
915 | u32 dma_address, dma_length; | ||
916 | struct veth_msg *msg = NULL; | 1118 | struct veth_msg *msg = NULL; |
917 | int err = 0; | ||
918 | unsigned long flags; | 1119 | unsigned long flags; |
919 | 1120 | ||
920 | if (! cnx) { | 1121 | if (! cnx) |
921 | port->stats.tx_errors++; | ||
922 | dev_kfree_skb(skb); | ||
923 | return 0; | 1122 | return 0; |
924 | } | ||
925 | 1123 | ||
926 | spin_lock_irqsave(&cnx->lock, flags); | 1124 | spin_lock_irqsave(&cnx->lock, flags); |
927 | 1125 | ||
928 | if (! (cnx->state & VETH_STATE_READY)) | 1126 | if (! (cnx->state & VETH_STATE_READY)) |
929 | goto drop; | 1127 | goto no_error; |
930 | 1128 | ||
931 | if ((skb->len - 14) > VETH_MAX_MTU) | 1129 | if ((skb->len - ETH_HLEN) > VETH_MAX_MTU) |
932 | goto drop; | 1130 | goto drop; |
933 | 1131 | ||
934 | msg = veth_stack_pop(cnx); | 1132 | msg = veth_stack_pop(cnx); |
935 | 1133 | if (! msg) | |
936 | if (! msg) { | ||
937 | err = 1; | ||
938 | goto drop; | 1134 | goto drop; |
939 | } | ||
940 | 1135 | ||
941 | dma_length = skb->len; | 1136 | msg->in_use = 1; |
942 | dma_address = dma_map_single(port->dev, skb->data, | 1137 | msg->skb = skb_get(skb); |
943 | dma_length, DMA_TO_DEVICE); | 1138 | |
1139 | msg->data.addr[0] = dma_map_single(port->dev, skb->data, | ||
1140 | skb->len, DMA_TO_DEVICE); | ||
944 | 1141 | ||
945 | if (dma_mapping_error(dma_address)) | 1142 | if (dma_mapping_error(msg->data.addr[0])) |
946 | goto recycle_and_drop; | 1143 | goto recycle_and_drop; |
947 | 1144 | ||
948 | /* Is it really necessary to check the length and address | ||
949 | * fields of the first entry here? */ | ||
950 | msg->skb = skb; | ||
951 | msg->dev = port->dev; | 1145 | msg->dev = port->dev; |
952 | msg->data.addr[0] = dma_address; | 1146 | msg->data.len[0] = skb->len; |
953 | msg->data.len[0] = dma_length; | ||
954 | msg->data.eofmask = 1 << VETH_EOF_SHIFT; | 1147 | msg->data.eofmask = 1 << VETH_EOF_SHIFT; |
955 | set_bit(0, &(msg->in_use)); | 1148 | |
956 | rc = veth_signaldata(cnx, VethEventTypeFrames, msg->token, &msg->data); | 1149 | rc = veth_signaldata(cnx, VETH_EVENT_FRAMES, msg->token, &msg->data); |
957 | 1150 | ||
958 | if (rc != HvLpEvent_Rc_Good) | 1151 | if (rc != HvLpEvent_Rc_Good) |
959 | goto recycle_and_drop; | 1152 | goto recycle_and_drop; |
960 | 1153 | ||
1154 | /* If the timer's not already running, start it now. */ | ||
1155 | if (0 == cnx->outstanding_tx) | ||
1156 | mod_timer(&cnx->reset_timer, jiffies + cnx->reset_timeout); | ||
1157 | |||
1158 | cnx->last_contact = jiffies; | ||
1159 | cnx->outstanding_tx++; | ||
1160 | |||
1161 | if (veth_stack_is_empty(cnx)) | ||
1162 | veth_stop_queues(cnx); | ||
1163 | |||
1164 | no_error: | ||
961 | spin_unlock_irqrestore(&cnx->lock, flags); | 1165 | spin_unlock_irqrestore(&cnx->lock, flags); |
962 | return 0; | 1166 | return 0; |
963 | 1167 | ||
964 | recycle_and_drop: | 1168 | recycle_and_drop: |
965 | msg->skb = NULL; | ||
966 | /* need to set in use to make veth_recycle_msg in case this | ||
967 | * was a mapping failure */ | ||
968 | set_bit(0, &msg->in_use); | ||
969 | veth_recycle_msg(cnx, msg); | 1169 | veth_recycle_msg(cnx, msg); |
970 | drop: | 1170 | drop: |
971 | port->stats.tx_errors++; | ||
972 | dev_kfree_skb(skb); | ||
973 | spin_unlock_irqrestore(&cnx->lock, flags); | 1171 | spin_unlock_irqrestore(&cnx->lock, flags); |
974 | return err; | 1172 | return 1; |
975 | } | 1173 | } |
976 | 1174 | ||
977 | static HvLpIndexMap veth_transmit_to_many(struct sk_buff *skb, | 1175 | static void veth_transmit_to_many(struct sk_buff *skb, |
978 | HvLpIndexMap lpmask, | 1176 | HvLpIndexMap lpmask, |
979 | struct net_device *dev) | 1177 | struct net_device *dev) |
980 | { | 1178 | { |
981 | struct veth_port *port = (struct veth_port *) dev->priv; | 1179 | struct veth_port *port = (struct veth_port *) dev->priv; |
982 | int i; | 1180 | int i, success, error; |
983 | int rc; | 1181 | |
1182 | success = error = 0; | ||
984 | 1183 | ||
985 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { | 1184 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { |
986 | if ((lpmask & (1 << i)) == 0) | 1185 | if ((lpmask & (1 << i)) == 0) |
987 | continue; | 1186 | continue; |
988 | 1187 | ||
989 | rc = veth_transmit_to_one(skb_get(skb), i, dev); | 1188 | if (veth_transmit_to_one(skb, i, dev)) |
990 | if (! rc) | 1189 | error = 1; |
991 | lpmask &= ~(1<<i); | 1190 | else |
1191 | success = 1; | ||
992 | } | 1192 | } |
993 | 1193 | ||
994 | if (! lpmask) { | 1194 | if (error) |
1195 | port->stats.tx_errors++; | ||
1196 | |||
1197 | if (success) { | ||
995 | port->stats.tx_packets++; | 1198 | port->stats.tx_packets++; |
996 | port->stats.tx_bytes += skb->len; | 1199 | port->stats.tx_bytes += skb->len; |
997 | } | 1200 | } |
998 | |||
999 | return lpmask; | ||
1000 | } | 1201 | } |
1001 | 1202 | ||
1002 | static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev) | 1203 | static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev) |
1003 | { | 1204 | { |
1004 | unsigned char *frame = skb->data; | 1205 | unsigned char *frame = skb->data; |
1005 | struct veth_port *port = (struct veth_port *) dev->priv; | 1206 | struct veth_port *port = (struct veth_port *) dev->priv; |
1006 | unsigned long flags; | ||
1007 | HvLpIndexMap lpmask; | 1207 | HvLpIndexMap lpmask; |
1008 | 1208 | ||
1009 | if (! (frame[0] & 0x01)) { | 1209 | if (! (frame[0] & 0x01)) { |
@@ -1020,44 +1220,27 @@ static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1020 | lpmask = port->lpar_map; | 1220 | lpmask = port->lpar_map; |
1021 | } | 1221 | } |
1022 | 1222 | ||
1023 | spin_lock_irqsave(&port->pending_gate, flags); | 1223 | veth_transmit_to_many(skb, lpmask, dev); |
1024 | |||
1025 | lpmask = veth_transmit_to_many(skb, lpmask, dev); | ||
1026 | |||
1027 | dev->trans_start = jiffies; | ||
1028 | 1224 | ||
1029 | if (! lpmask) { | 1225 | dev_kfree_skb(skb); |
1030 | dev_kfree_skb(skb); | ||
1031 | } else { | ||
1032 | if (port->pending_skb) { | ||
1033 | veth_error("%s: Tx while skb was pending!\n", | ||
1034 | dev->name); | ||
1035 | dev_kfree_skb(skb); | ||
1036 | spin_unlock_irqrestore(&port->pending_gate, flags); | ||
1037 | return 1; | ||
1038 | } | ||
1039 | |||
1040 | port->pending_skb = skb; | ||
1041 | port->pending_lpmask = lpmask; | ||
1042 | netif_stop_queue(dev); | ||
1043 | } | ||
1044 | |||
1045 | spin_unlock_irqrestore(&port->pending_gate, flags); | ||
1046 | 1226 | ||
1047 | return 0; | 1227 | return 0; |
1048 | } | 1228 | } |
1049 | 1229 | ||
1230 | /* You must hold the connection's lock when you call this function. */ | ||
1050 | static void veth_recycle_msg(struct veth_lpar_connection *cnx, | 1231 | static void veth_recycle_msg(struct veth_lpar_connection *cnx, |
1051 | struct veth_msg *msg) | 1232 | struct veth_msg *msg) |
1052 | { | 1233 | { |
1053 | u32 dma_address, dma_length; | 1234 | u32 dma_address, dma_length; |
1054 | 1235 | ||
1055 | if (test_and_clear_bit(0, &msg->in_use)) { | 1236 | if (msg->in_use) { |
1237 | msg->in_use = 0; | ||
1056 | dma_address = msg->data.addr[0]; | 1238 | dma_address = msg->data.addr[0]; |
1057 | dma_length = msg->data.len[0]; | 1239 | dma_length = msg->data.len[0]; |
1058 | 1240 | ||
1059 | dma_unmap_single(msg->dev, dma_address, dma_length, | 1241 | if (!dma_mapping_error(dma_address)) |
1060 | DMA_TO_DEVICE); | 1242 | dma_unmap_single(msg->dev, dma_address, dma_length, |
1243 | DMA_TO_DEVICE); | ||
1061 | 1244 | ||
1062 | if (msg->skb) { | 1245 | if (msg->skb) { |
1063 | dev_kfree_skb_any(msg->skb); | 1246 | dev_kfree_skb_any(msg->skb); |
@@ -1066,15 +1249,16 @@ static void veth_recycle_msg(struct veth_lpar_connection *cnx, | |||
1066 | 1249 | ||
1067 | memset(&msg->data, 0, sizeof(msg->data)); | 1250 | memset(&msg->data, 0, sizeof(msg->data)); |
1068 | veth_stack_push(cnx, msg); | 1251 | veth_stack_push(cnx, msg); |
1069 | } else | 1252 | } else if (cnx->state & VETH_STATE_OPEN) { |
1070 | if (cnx->state & VETH_STATE_OPEN) | 1253 | veth_error("Non-pending frame (# %d) acked by LPAR %d.\n", |
1071 | veth_error("Bogus frames ack from lpar %d (#%d)\n", | 1254 | cnx->remote_lp, msg->token); |
1072 | cnx->remote_lp, msg->token); | 1255 | } |
1073 | } | 1256 | } |
1074 | 1257 | ||
1075 | static void veth_flush_pending(struct veth_lpar_connection *cnx) | 1258 | static void veth_wake_queues(struct veth_lpar_connection *cnx) |
1076 | { | 1259 | { |
1077 | int i; | 1260 | int i; |
1261 | |||
1078 | for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) { | 1262 | for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) { |
1079 | struct net_device *dev = veth_dev[i]; | 1263 | struct net_device *dev = veth_dev[i]; |
1080 | struct veth_port *port; | 1264 | struct veth_port *port; |
@@ -1088,20 +1272,77 @@ static void veth_flush_pending(struct veth_lpar_connection *cnx) | |||
1088 | if (! (port->lpar_map & (1<<cnx->remote_lp))) | 1272 | if (! (port->lpar_map & (1<<cnx->remote_lp))) |
1089 | continue; | 1273 | continue; |
1090 | 1274 | ||
1091 | spin_lock_irqsave(&port->pending_gate, flags); | 1275 | spin_lock_irqsave(&port->queue_lock, flags); |
1092 | if (port->pending_skb) { | 1276 | |
1093 | port->pending_lpmask = | 1277 | port->stopped_map &= ~(1 << cnx->remote_lp); |
1094 | veth_transmit_to_many(port->pending_skb, | 1278 | |
1095 | port->pending_lpmask, | 1279 | if (0 == port->stopped_map && netif_queue_stopped(dev)) { |
1096 | dev); | 1280 | veth_debug("cnx %d: woke queue for %s.\n", |
1097 | if (! port->pending_lpmask) { | 1281 | cnx->remote_lp, dev->name); |
1098 | dev_kfree_skb_any(port->pending_skb); | 1282 | netif_wake_queue(dev); |
1099 | port->pending_skb = NULL; | 1283 | } |
1100 | netif_wake_queue(dev); | 1284 | spin_unlock_irqrestore(&port->queue_lock, flags); |
1101 | } | 1285 | } |
1286 | } | ||
1287 | |||
1288 | static void veth_stop_queues(struct veth_lpar_connection *cnx) | ||
1289 | { | ||
1290 | int i; | ||
1291 | |||
1292 | for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) { | ||
1293 | struct net_device *dev = veth_dev[i]; | ||
1294 | struct veth_port *port; | ||
1295 | |||
1296 | if (! dev) | ||
1297 | continue; | ||
1298 | |||
1299 | port = (struct veth_port *)dev->priv; | ||
1300 | |||
1301 | /* If this cnx is not on the vlan for this port, continue */ | ||
1302 | if (! (port->lpar_map & (1 << cnx->remote_lp))) | ||
1303 | continue; | ||
1304 | |||
1305 | spin_lock(&port->queue_lock); | ||
1306 | |||
1307 | netif_stop_queue(dev); | ||
1308 | port->stopped_map |= (1 << cnx->remote_lp); | ||
1309 | |||
1310 | veth_debug("cnx %d: stopped queue for %s, map = 0x%x.\n", | ||
1311 | cnx->remote_lp, dev->name, port->stopped_map); | ||
1312 | |||
1313 | spin_unlock(&port->queue_lock); | ||
1314 | } | ||
1315 | } | ||
1316 | |||
1317 | static void veth_timed_reset(unsigned long ptr) | ||
1318 | { | ||
1319 | struct veth_lpar_connection *cnx = (struct veth_lpar_connection *)ptr; | ||
1320 | unsigned long trigger_time, flags; | ||
1321 | |||
1322 | /* FIXME is it possible this fires after veth_stop_connection()? | ||
1323 | * That would reschedule the statemachine for 5 seconds and probably | ||
1324 | * execute it after the module's been unloaded. Hmm. */ | ||
1325 | |||
1326 | spin_lock_irqsave(&cnx->lock, flags); | ||
1327 | |||
1328 | if (cnx->outstanding_tx > 0) { | ||
1329 | trigger_time = cnx->last_contact + cnx->reset_timeout; | ||
1330 | |||
1331 | if (trigger_time < jiffies) { | ||
1332 | cnx->state |= VETH_STATE_RESET; | ||
1333 | veth_kick_statemachine(cnx); | ||
1334 | veth_error("%d packets not acked by LPAR %d within %d " | ||
1335 | "seconds, resetting.\n", | ||
1336 | cnx->outstanding_tx, cnx->remote_lp, | ||
1337 | cnx->reset_timeout / HZ); | ||
1338 | } else { | ||
1339 | /* Reschedule the timer */ | ||
1340 | trigger_time = jiffies + cnx->reset_timeout; | ||
1341 | mod_timer(&cnx->reset_timer, trigger_time); | ||
1102 | } | 1342 | } |
1103 | spin_unlock_irqrestore(&port->pending_gate, flags); | ||
1104 | } | 1343 | } |
1344 | |||
1345 | spin_unlock_irqrestore(&cnx->lock, flags); | ||
1105 | } | 1346 | } |
1106 | 1347 | ||
1107 | /* | 1348 | /* |
@@ -1117,12 +1358,9 @@ static inline int veth_frame_wanted(struct veth_port *port, u64 mac_addr) | |||
1117 | if ( (mac_addr == port->mac_addr) || (mac_addr == 0xffffffffffff0000) ) | 1358 | if ( (mac_addr == port->mac_addr) || (mac_addr == 0xffffffffffff0000) ) |
1118 | return 1; | 1359 | return 1; |
1119 | 1360 | ||
1120 | if (! (((char *) &mac_addr)[0] & 0x01)) | ||
1121 | return 0; | ||
1122 | |||
1123 | read_lock_irqsave(&port->mcast_gate, flags); | 1361 | read_lock_irqsave(&port->mcast_gate, flags); |
1124 | 1362 | ||
1125 | if (port->promiscuous || port->all_mcast) { | 1363 | if (port->promiscuous) { |
1126 | wanted = 1; | 1364 | wanted = 1; |
1127 | goto out; | 1365 | goto out; |
1128 | } | 1366 | } |
@@ -1175,21 +1413,21 @@ static void veth_flush_acks(struct veth_lpar_connection *cnx) | |||
1175 | { | 1413 | { |
1176 | HvLpEvent_Rc rc; | 1414 | HvLpEvent_Rc rc; |
1177 | 1415 | ||
1178 | rc = veth_signaldata(cnx, VethEventTypeFramesAck, | 1416 | rc = veth_signaldata(cnx, VETH_EVENT_FRAMES_ACK, |
1179 | 0, &cnx->pending_acks); | 1417 | 0, &cnx->pending_acks); |
1180 | 1418 | ||
1181 | if (rc != HvLpEvent_Rc_Good) | 1419 | if (rc != HvLpEvent_Rc_Good) |
1182 | veth_error("Error 0x%x acking frames from lpar %d!\n", | 1420 | veth_error("Failed acking frames from LPAR %d, rc = %d\n", |
1183 | (unsigned)rc, cnx->remote_lp); | 1421 | cnx->remote_lp, (int)rc); |
1184 | 1422 | ||
1185 | cnx->num_pending_acks = 0; | 1423 | cnx->num_pending_acks = 0; |
1186 | memset(&cnx->pending_acks, 0xff, sizeof(cnx->pending_acks)); | 1424 | memset(&cnx->pending_acks, 0xff, sizeof(cnx->pending_acks)); |
1187 | } | 1425 | } |
1188 | 1426 | ||
1189 | static void veth_receive(struct veth_lpar_connection *cnx, | 1427 | static void veth_receive(struct veth_lpar_connection *cnx, |
1190 | struct VethLpEvent *event) | 1428 | struct veth_lpevent *event) |
1191 | { | 1429 | { |
1192 | struct VethFramesData *senddata = &event->u.frames_data; | 1430 | struct veth_frames_data *senddata = &event->u.frames_data; |
1193 | int startchunk = 0; | 1431 | int startchunk = 0; |
1194 | int nchunks; | 1432 | int nchunks; |
1195 | unsigned long flags; | 1433 | unsigned long flags; |
@@ -1216,9 +1454,10 @@ static void veth_receive(struct veth_lpar_connection *cnx, | |||
1216 | /* make sure that we have at least 1 EOF entry in the | 1454 | /* make sure that we have at least 1 EOF entry in the |
1217 | * remaining entries */ | 1455 | * remaining entries */ |
1218 | if (! (senddata->eofmask >> (startchunk + VETH_EOF_SHIFT))) { | 1456 | if (! (senddata->eofmask >> (startchunk + VETH_EOF_SHIFT))) { |
1219 | veth_error("missing EOF frag in event " | 1457 | veth_error("Missing EOF fragment in event " |
1220 | "eofmask=0x%x startchunk=%d\n", | 1458 | "eofmask = 0x%x startchunk = %d\n", |
1221 | (unsigned) senddata->eofmask, startchunk); | 1459 | (unsigned)senddata->eofmask, |
1460 | startchunk); | ||
1222 | break; | 1461 | break; |
1223 | } | 1462 | } |
1224 | 1463 | ||
@@ -1237,8 +1476,9 @@ static void veth_receive(struct veth_lpar_connection *cnx, | |||
1237 | /* nchunks == # of chunks in this frame */ | 1476 | /* nchunks == # of chunks in this frame */ |
1238 | 1477 | ||
1239 | if ((length - ETH_HLEN) > VETH_MAX_MTU) { | 1478 | if ((length - ETH_HLEN) > VETH_MAX_MTU) { |
1240 | veth_error("Received oversize frame from lpar %d " | 1479 | veth_error("Received oversize frame from LPAR %d " |
1241 | "(length=%d)\n", cnx->remote_lp, length); | 1480 | "(length = %d)\n", |
1481 | cnx->remote_lp, length); | ||
1242 | continue; | 1482 | continue; |
1243 | } | 1483 | } |
1244 | 1484 | ||
@@ -1331,15 +1571,33 @@ static void veth_timed_ack(unsigned long ptr) | |||
1331 | 1571 | ||
1332 | static int veth_remove(struct vio_dev *vdev) | 1572 | static int veth_remove(struct vio_dev *vdev) |
1333 | { | 1573 | { |
1334 | int i = vdev->unit_address; | 1574 | struct veth_lpar_connection *cnx; |
1335 | struct net_device *dev; | 1575 | struct net_device *dev; |
1576 | struct veth_port *port; | ||
1577 | int i; | ||
1336 | 1578 | ||
1337 | dev = veth_dev[i]; | 1579 | dev = veth_dev[vdev->unit_address]; |
1338 | if (dev != NULL) { | 1580 | |
1339 | veth_dev[i] = NULL; | 1581 | if (! dev) |
1340 | unregister_netdev(dev); | 1582 | return 0; |
1341 | free_netdev(dev); | 1583 | |
1584 | port = netdev_priv(dev); | ||
1585 | |||
1586 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { | ||
1587 | cnx = veth_cnx[i]; | ||
1588 | |||
1589 | if (cnx && (port->lpar_map & (1 << i))) { | ||
1590 | /* Drop our reference to connections on our VLAN */ | ||
1591 | kobject_put(&cnx->kobject); | ||
1592 | } | ||
1342 | } | 1593 | } |
1594 | |||
1595 | veth_dev[vdev->unit_address] = NULL; | ||
1596 | kobject_del(&port->kobject); | ||
1597 | kobject_put(&port->kobject); | ||
1598 | unregister_netdev(dev); | ||
1599 | free_netdev(dev); | ||
1600 | |||
1343 | return 0; | 1601 | return 0; |
1344 | } | 1602 | } |
1345 | 1603 | ||
@@ -1347,6 +1605,7 @@ static int veth_probe(struct vio_dev *vdev, const struct vio_device_id *id) | |||
1347 | { | 1605 | { |
1348 | int i = vdev->unit_address; | 1606 | int i = vdev->unit_address; |
1349 | struct net_device *dev; | 1607 | struct net_device *dev; |
1608 | struct veth_port *port; | ||
1350 | 1609 | ||
1351 | dev = veth_probe_one(i, &vdev->dev); | 1610 | dev = veth_probe_one(i, &vdev->dev); |
1352 | if (dev == NULL) { | 1611 | if (dev == NULL) { |
@@ -1355,11 +1614,23 @@ static int veth_probe(struct vio_dev *vdev, const struct vio_device_id *id) | |||
1355 | } | 1614 | } |
1356 | veth_dev[i] = dev; | 1615 | veth_dev[i] = dev; |
1357 | 1616 | ||
1358 | /* Start the state machine on each connection, to commence | 1617 | port = (struct veth_port*)netdev_priv(dev); |
1359 | * link negotiation */ | 1618 | |
1360 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) | 1619 | /* Start the state machine on each connection on this vlan. If we're |
1361 | if (veth_cnx[i]) | 1620 | * the first dev to do so this will commence link negotiation */ |
1362 | veth_kick_statemachine(veth_cnx[i]); | 1621 | for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { |
1622 | struct veth_lpar_connection *cnx; | ||
1623 | |||
1624 | if (! (port->lpar_map & (1 << i))) | ||
1625 | continue; | ||
1626 | |||
1627 | cnx = veth_cnx[i]; | ||
1628 | if (!cnx) | ||
1629 | continue; | ||
1630 | |||
1631 | kobject_get(&cnx->kobject); | ||
1632 | veth_kick_statemachine(cnx); | ||
1633 | } | ||
1363 | 1634 | ||
1364 | return 0; | 1635 | return 0; |
1365 | } | 1636 | } |
@@ -1375,7 +1646,7 @@ static struct vio_device_id veth_device_table[] __devinitdata = { | |||
1375 | MODULE_DEVICE_TABLE(vio, veth_device_table); | 1646 | MODULE_DEVICE_TABLE(vio, veth_device_table); |
1376 | 1647 | ||
1377 | static struct vio_driver veth_driver = { | 1648 | static struct vio_driver veth_driver = { |
1378 | .name = "iseries_veth", | 1649 | .name = DRV_NAME, |
1379 | .id_table = veth_device_table, | 1650 | .id_table = veth_device_table, |
1380 | .probe = veth_probe, | 1651 | .probe = veth_probe, |
1381 | .remove = veth_remove | 1652 | .remove = veth_remove |
@@ -1388,29 +1659,29 @@ static struct vio_driver veth_driver = { | |||
1388 | void __exit veth_module_cleanup(void) | 1659 | void __exit veth_module_cleanup(void) |
1389 | { | 1660 | { |
1390 | int i; | 1661 | int i; |
1662 | struct veth_lpar_connection *cnx; | ||
1391 | 1663 | ||
1392 | /* Stop the queues first to stop any new packets being sent. */ | 1664 | /* Disconnect our "irq" to stop events coming from the Hypervisor. */ |
1393 | for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) | ||
1394 | if (veth_dev[i]) | ||
1395 | netif_stop_queue(veth_dev[i]); | ||
1396 | |||
1397 | /* Stop the connections before we unregister the driver. This | ||
1398 | * ensures there's no skbs lying around holding the device open. */ | ||
1399 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) | ||
1400 | veth_stop_connection(i); | ||
1401 | |||
1402 | HvLpEvent_unregisterHandler(HvLpEvent_Type_VirtualLan); | 1665 | HvLpEvent_unregisterHandler(HvLpEvent_Type_VirtualLan); |
1403 | 1666 | ||
1404 | /* Hypervisor callbacks may have scheduled more work while we | 1667 | /* Make sure any work queued from Hypervisor callbacks is finished. */ |
1405 | * were stoping connections. Now that we've disconnected from | ||
1406 | * the hypervisor make sure everything's finished. */ | ||
1407 | flush_scheduled_work(); | 1668 | flush_scheduled_work(); |
1408 | 1669 | ||
1409 | vio_unregister_driver(&veth_driver); | 1670 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { |
1671 | cnx = veth_cnx[i]; | ||
1672 | |||
1673 | if (!cnx) | ||
1674 | continue; | ||
1410 | 1675 | ||
1411 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) | 1676 | /* Remove the connection from sysfs */ |
1412 | veth_destroy_connection(i); | 1677 | kobject_del(&cnx->kobject); |
1678 | /* Drop the driver's reference to the connection */ | ||
1679 | kobject_put(&cnx->kobject); | ||
1680 | } | ||
1413 | 1681 | ||
1682 | /* Unregister the driver, which will close all the netdevs and stop | ||
1683 | * the connections when they're no longer referenced. */ | ||
1684 | vio_unregister_driver(&veth_driver); | ||
1414 | } | 1685 | } |
1415 | module_exit(veth_module_cleanup); | 1686 | module_exit(veth_module_cleanup); |
1416 | 1687 | ||
@@ -1423,15 +1694,37 @@ int __init veth_module_init(void) | |||
1423 | 1694 | ||
1424 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { | 1695 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { |
1425 | rc = veth_init_connection(i); | 1696 | rc = veth_init_connection(i); |
1426 | if (rc != 0) { | 1697 | if (rc != 0) |
1427 | veth_module_cleanup(); | 1698 | goto error; |
1428 | return rc; | ||
1429 | } | ||
1430 | } | 1699 | } |
1431 | 1700 | ||
1432 | HvLpEvent_registerHandler(HvLpEvent_Type_VirtualLan, | 1701 | HvLpEvent_registerHandler(HvLpEvent_Type_VirtualLan, |
1433 | &veth_handle_event); | 1702 | &veth_handle_event); |
1434 | 1703 | ||
1435 | return vio_register_driver(&veth_driver); | 1704 | rc = vio_register_driver(&veth_driver); |
1705 | if (rc != 0) | ||
1706 | goto error; | ||
1707 | |||
1708 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { | ||
1709 | struct kobject *kobj; | ||
1710 | |||
1711 | if (!veth_cnx[i]) | ||
1712 | continue; | ||
1713 | |||
1714 | kobj = &veth_cnx[i]->kobject; | ||
1715 | kobj->parent = &veth_driver.driver.kobj; | ||
1716 | /* If the add failes, complain but otherwise continue */ | ||
1717 | if (0 != kobject_add(kobj)) | ||
1718 | veth_error("cnx %d: Failed adding to sysfs.\n", i); | ||
1719 | } | ||
1720 | |||
1721 | return 0; | ||
1722 | |||
1723 | error: | ||
1724 | for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { | ||
1725 | veth_destroy_connection(veth_cnx[i]); | ||
1726 | } | ||
1727 | |||
1728 | return rc; | ||
1436 | } | 1729 | } |
1437 | module_init(veth_module_init); | 1730 | module_init(veth_module_init); |
diff --git a/drivers/net/iseries_veth.h b/drivers/net/iseries_veth.h deleted file mode 100644 index d9370f79b83e..000000000000 --- a/drivers/net/iseries_veth.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* File veth.h created by Kyle A. Lucke on Mon Aug 7 2000. */ | ||
2 | |||
3 | #ifndef _ISERIES_VETH_H | ||
4 | #define _ISERIES_VETH_H | ||
5 | |||
6 | #define VethEventTypeCap (0) | ||
7 | #define VethEventTypeFrames (1) | ||
8 | #define VethEventTypeMonitor (2) | ||
9 | #define VethEventTypeFramesAck (3) | ||
10 | |||
11 | #define VETH_MAX_ACKS_PER_MSG (20) | ||
12 | #define VETH_MAX_FRAMES_PER_MSG (6) | ||
13 | |||
14 | struct VethFramesData { | ||
15 | u32 addr[VETH_MAX_FRAMES_PER_MSG]; | ||
16 | u16 len[VETH_MAX_FRAMES_PER_MSG]; | ||
17 | u32 eofmask; | ||
18 | }; | ||
19 | #define VETH_EOF_SHIFT (32-VETH_MAX_FRAMES_PER_MSG) | ||
20 | |||
21 | struct VethFramesAckData { | ||
22 | u16 token[VETH_MAX_ACKS_PER_MSG]; | ||
23 | }; | ||
24 | |||
25 | struct VethCapData { | ||
26 | u8 caps_version; | ||
27 | u8 rsvd1; | ||
28 | u16 num_buffers; | ||
29 | u16 ack_threshold; | ||
30 | u16 rsvd2; | ||
31 | u32 ack_timeout; | ||
32 | u32 rsvd3; | ||
33 | u64 rsvd4[3]; | ||
34 | }; | ||
35 | |||
36 | struct VethLpEvent { | ||
37 | struct HvLpEvent base_event; | ||
38 | union { | ||
39 | struct VethCapData caps_data; | ||
40 | struct VethFramesData frames_data; | ||
41 | struct VethFramesAckData frames_ack_data; | ||
42 | } u; | ||
43 | |||
44 | }; | ||
45 | |||
46 | #endif /* _ISERIES_VETH_H */ | ||
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index fc353e348f9a..a22d00198e4d 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -1934,7 +1934,7 @@ static int __init de_init_one (struct pci_dev *pdev, | |||
1934 | struct de_private *de; | 1934 | struct de_private *de; |
1935 | int rc; | 1935 | int rc; |
1936 | void __iomem *regs; | 1936 | void __iomem *regs; |
1937 | long pciaddr; | 1937 | unsigned long pciaddr; |
1938 | static int board_idx = -1; | 1938 | static int board_idx = -1; |
1939 | 1939 | ||
1940 | board_idx++; | 1940 | board_idx++; |
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index 05da5bea564c..6266a9a7e6e3 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c | |||
@@ -238,6 +238,7 @@ static struct pci_device_id tulip_pci_tbl[] = { | |||
238 | { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, | 238 | { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, |
239 | { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ | 239 | { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ |
240 | { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */ | 240 | { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */ |
241 | { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, | ||
241 | { } /* terminate list */ | 242 | { } /* terminate list */ |
242 | }; | 243 | }; |
243 | MODULE_DEVICE_TABLE(pci, tulip_pci_tbl); | 244 | MODULE_DEVICE_TABLE(pci, tulip_pci_tbl); |
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index 713c78f3a65d..49bd21702314 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c | |||
@@ -21,13 +21,21 @@ | |||
21 | * between the ROM and other resources, so enabling it may disable access | 21 | * between the ROM and other resources, so enabling it may disable access |
22 | * to MMIO registers or other card memory. | 22 | * to MMIO registers or other card memory. |
23 | */ | 23 | */ |
24 | static void pci_enable_rom(struct pci_dev *pdev) | 24 | static int pci_enable_rom(struct pci_dev *pdev) |
25 | { | 25 | { |
26 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; | ||
27 | struct pci_bus_region region; | ||
26 | u32 rom_addr; | 28 | u32 rom_addr; |
27 | 29 | ||
30 | if (!res->flags) | ||
31 | return -1; | ||
32 | |||
33 | pcibios_resource_to_bus(pdev, ®ion, res); | ||
28 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); | 34 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
29 | rom_addr |= PCI_ROM_ADDRESS_ENABLE; | 35 | rom_addr &= ~PCI_ROM_ADDRESS_MASK; |
36 | rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; | ||
30 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); | 37 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); |
38 | return 0; | ||
31 | } | 39 | } |
32 | 40 | ||
33 | /** | 41 | /** |
@@ -71,19 +79,21 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) | |||
71 | } else { | 79 | } else { |
72 | if (res->flags & IORESOURCE_ROM_COPY) { | 80 | if (res->flags & IORESOURCE_ROM_COPY) { |
73 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | 81 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); |
74 | return (void __iomem *)pci_resource_start(pdev, PCI_ROM_RESOURCE); | 82 | return (void __iomem *)pci_resource_start(pdev, |
83 | PCI_ROM_RESOURCE); | ||
75 | } else { | 84 | } else { |
76 | /* assign the ROM an address if it doesn't have one */ | 85 | /* assign the ROM an address if it doesn't have one */ |
77 | if (res->parent == NULL) | 86 | if (res->parent == NULL && |
78 | pci_assign_resource(pdev, PCI_ROM_RESOURCE); | 87 | pci_assign_resource(pdev,PCI_ROM_RESOURCE)) |
79 | 88 | return NULL; | |
80 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); | 89 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); |
81 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | 90 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); |
82 | if (*size == 0) | 91 | if (*size == 0) |
83 | return NULL; | 92 | return NULL; |
84 | 93 | ||
85 | /* Enable ROM space decodes */ | 94 | /* Enable ROM space decodes */ |
86 | pci_enable_rom(pdev); | 95 | if (pci_enable_rom(pdev)) |
96 | return NULL; | ||
87 | } | 97 | } |
88 | } | 98 | } |
89 | 99 | ||
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c index 0b10169961eb..aec39fb261ca 100644 --- a/drivers/serial/21285.c +++ b/drivers/serial/21285.c | |||
@@ -58,8 +58,7 @@ static const char serial21285_name[] = "Footbridge UART"; | |||
58 | * int((BAUD_BASE - (baud >> 1)) / baud) | 58 | * int((BAUD_BASE - (baud >> 1)) / baud) |
59 | */ | 59 | */ |
60 | 60 | ||
61 | static void | 61 | static void serial21285_stop_tx(struct uart_port *port) |
62 | serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
63 | { | 62 | { |
64 | if (tx_enabled(port)) { | 63 | if (tx_enabled(port)) { |
65 | disable_irq(IRQ_CONTX); | 64 | disable_irq(IRQ_CONTX); |
@@ -67,8 +66,7 @@ serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
67 | } | 66 | } |
68 | } | 67 | } |
69 | 68 | ||
70 | static void | 69 | static void serial21285_start_tx(struct uart_port *port) |
71 | serial21285_start_tx(struct uart_port *port, unsigned int tty_start) | ||
72 | { | 70 | { |
73 | if (!tx_enabled(port)) { | 71 | if (!tx_enabled(port)) { |
74 | enable_irq(IRQ_CONTX); | 72 | enable_irq(IRQ_CONTX); |
@@ -148,7 +146,7 @@ static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *r | |||
148 | goto out; | 146 | goto out; |
149 | } | 147 | } |
150 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 148 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
151 | serial21285_stop_tx(port, 0); | 149 | serial21285_stop_tx(port); |
152 | goto out; | 150 | goto out; |
153 | } | 151 | } |
154 | 152 | ||
@@ -164,7 +162,7 @@ static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *r | |||
164 | uart_write_wakeup(port); | 162 | uart_write_wakeup(port); |
165 | 163 | ||
166 | if (uart_circ_empty(xmit)) | 164 | if (uart_circ_empty(xmit)) |
167 | serial21285_stop_tx(port, 0); | 165 | serial21285_stop_tx(port); |
168 | 166 | ||
169 | out: | 167 | out: |
170 | return IRQ_HANDLED; | 168 | return IRQ_HANDLED; |
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index 7e8fc7c1d4cc..30a0a3d10145 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c | |||
@@ -1001,7 +1001,7 @@ static inline void __stop_tx(struct uart_8250_port *p) | |||
1001 | } | 1001 | } |
1002 | } | 1002 | } |
1003 | 1003 | ||
1004 | static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) | 1004 | static void serial8250_stop_tx(struct uart_port *port) |
1005 | { | 1005 | { |
1006 | struct uart_8250_port *up = (struct uart_8250_port *)port; | 1006 | struct uart_8250_port *up = (struct uart_8250_port *)port; |
1007 | 1007 | ||
@@ -1018,7 +1018,7 @@ static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
1018 | 1018 | ||
1019 | static void transmit_chars(struct uart_8250_port *up); | 1019 | static void transmit_chars(struct uart_8250_port *up); |
1020 | 1020 | ||
1021 | static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start) | 1021 | static void serial8250_start_tx(struct uart_port *port) |
1022 | { | 1022 | { |
1023 | struct uart_8250_port *up = (struct uart_8250_port *)port; | 1023 | struct uart_8250_port *up = (struct uart_8250_port *)port; |
1024 | 1024 | ||
@@ -1158,7 +1158,11 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up) | |||
1158 | up->port.x_char = 0; | 1158 | up->port.x_char = 0; |
1159 | return; | 1159 | return; |
1160 | } | 1160 | } |
1161 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 1161 | if (uart_tx_stopped(&up->port)) { |
1162 | serial8250_stop_tx(&up->port); | ||
1163 | return; | ||
1164 | } | ||
1165 | if (uart_circ_empty(xmit)) { | ||
1162 | __stop_tx(up); | 1166 | __stop_tx(up); |
1163 | return; | 1167 | return; |
1164 | } | 1168 | } |
@@ -2586,82 +2590,3 @@ module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444); | |||
2586 | MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA"); | 2590 | MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA"); |
2587 | #endif | 2591 | #endif |
2588 | MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR); | 2592 | MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR); |
2589 | |||
2590 | /** | ||
2591 | * register_serial - configure a 16x50 serial port at runtime | ||
2592 | * @req: request structure | ||
2593 | * | ||
2594 | * Configure the serial port specified by the request. If the | ||
2595 | * port exists and is in use an error is returned. If the port | ||
2596 | * is not currently in the table it is added. | ||
2597 | * | ||
2598 | * The port is then probed and if necessary the IRQ is autodetected | ||
2599 | * If this fails an error is returned. | ||
2600 | * | ||
2601 | * On success the port is ready to use and the line number is returned. | ||
2602 | * | ||
2603 | * Note: this function is deprecated - use serial8250_register_port | ||
2604 | * instead. | ||
2605 | */ | ||
2606 | int register_serial(struct serial_struct *req) | ||
2607 | { | ||
2608 | struct uart_port port; | ||
2609 | |||
2610 | port.iobase = req->port; | ||
2611 | port.membase = req->iomem_base; | ||
2612 | port.irq = req->irq; | ||
2613 | port.uartclk = req->baud_base * 16; | ||
2614 | port.fifosize = req->xmit_fifo_size; | ||
2615 | port.regshift = req->iomem_reg_shift; | ||
2616 | port.iotype = req->io_type; | ||
2617 | port.flags = req->flags | UPF_BOOT_AUTOCONF; | ||
2618 | port.mapbase = req->iomap_base; | ||
2619 | port.dev = NULL; | ||
2620 | |||
2621 | if (share_irqs) | ||
2622 | port.flags |= UPF_SHARE_IRQ; | ||
2623 | |||
2624 | if (HIGH_BITS_OFFSET) | ||
2625 | port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET; | ||
2626 | |||
2627 | /* | ||
2628 | * If a clock rate wasn't specified by the low level driver, then | ||
2629 | * default to the standard clock rate. This should be 115200 (*16) | ||
2630 | * and should not depend on the architecture's BASE_BAUD definition. | ||
2631 | * However, since this API will be deprecated, it's probably a | ||
2632 | * better idea to convert the drivers to use the new API | ||
2633 | * (serial8250_register_port and serial8250_unregister_port). | ||
2634 | */ | ||
2635 | if (port.uartclk == 0) { | ||
2636 | printk(KERN_WARNING | ||
2637 | "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n", | ||
2638 | port.iobase, port.mapbase, port.membase, port.irq); | ||
2639 | printk(KERN_WARNING "Serial: see %s:%d for more information\n", | ||
2640 | __FILE__, __LINE__); | ||
2641 | dump_stack(); | ||
2642 | |||
2643 | /* | ||
2644 | * Fix it up for now, but this is only a temporary measure. | ||
2645 | */ | ||
2646 | port.uartclk = BASE_BAUD * 16; | ||
2647 | } | ||
2648 | |||
2649 | return serial8250_register_port(&port); | ||
2650 | } | ||
2651 | EXPORT_SYMBOL(register_serial); | ||
2652 | |||
2653 | /** | ||
2654 | * unregister_serial - remove a 16x50 serial port at runtime | ||
2655 | * @line: serial line number | ||
2656 | * | ||
2657 | * Remove one serial port. This may not be called from interrupt | ||
2658 | * context. We hand the port back to our local PM control. | ||
2659 | * | ||
2660 | * Note: this function is deprecated - use serial8250_unregister_port | ||
2661 | * instead. | ||
2662 | */ | ||
2663 | void unregister_serial(int line) | ||
2664 | { | ||
2665 | serial8250_unregister_port(line); | ||
2666 | } | ||
2667 | EXPORT_SYMBOL(unregister_serial); | ||
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h index 9225c82faeb8..b1b459efda52 100644 --- a/drivers/serial/8250.h +++ b/drivers/serial/8250.h | |||
@@ -16,11 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <linux/config.h> | 18 | #include <linux/config.h> |
19 | 19 | #include <linux/serial_8250.h> | |
20 | int serial8250_register_port(struct uart_port *); | ||
21 | void serial8250_unregister_port(int line); | ||
22 | void serial8250_suspend_port(int line); | ||
23 | void serial8250_resume_port(int line); | ||
24 | 20 | ||
25 | struct old_serial_port { | 21 | struct old_serial_port { |
26 | unsigned int uart; | 22 | unsigned int uart; |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index d5797618a3b9..74b80f7c062d 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -830,7 +830,7 @@ config SERIAL_M32R_PLDSIO | |||
830 | 830 | ||
831 | config SERIAL_TXX9 | 831 | config SERIAL_TXX9 |
832 | bool "TMPTX39XX/49XX SIO support" | 832 | bool "TMPTX39XX/49XX SIO support" |
833 | depends HAS_TXX9_SERIAL | 833 | depends HAS_TXX9_SERIAL && BROKEN |
834 | select SERIAL_CORE | 834 | select SERIAL_CORE |
835 | default y | 835 | default y |
836 | 836 | ||
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 2884b310e54d..978e12437e61 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
@@ -105,7 +105,7 @@ struct uart_amba_port { | |||
105 | unsigned int old_status; | 105 | unsigned int old_status; |
106 | }; | 106 | }; |
107 | 107 | ||
108 | static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop) | 108 | static void pl010_stop_tx(struct uart_port *port) |
109 | { | 109 | { |
110 | unsigned int cr; | 110 | unsigned int cr; |
111 | 111 | ||
@@ -114,7 +114,7 @@ static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
114 | UART_PUT_CR(port, cr); | 114 | UART_PUT_CR(port, cr); |
115 | } | 115 | } |
116 | 116 | ||
117 | static void pl010_start_tx(struct uart_port *port, unsigned int tty_start) | 117 | static void pl010_start_tx(struct uart_port *port) |
118 | { | 118 | { |
119 | unsigned int cr; | 119 | unsigned int cr; |
120 | 120 | ||
@@ -219,7 +219,7 @@ static void pl010_tx_chars(struct uart_port *port) | |||
219 | return; | 219 | return; |
220 | } | 220 | } |
221 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 221 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
222 | pl010_stop_tx(port, 0); | 222 | pl010_stop_tx(port); |
223 | return; | 223 | return; |
224 | } | 224 | } |
225 | 225 | ||
@@ -236,7 +236,7 @@ static void pl010_tx_chars(struct uart_port *port) | |||
236 | uart_write_wakeup(port); | 236 | uart_write_wakeup(port); |
237 | 237 | ||
238 | if (uart_circ_empty(xmit)) | 238 | if (uart_circ_empty(xmit)) |
239 | pl010_stop_tx(port, 0); | 239 | pl010_stop_tx(port); |
240 | } | 240 | } |
241 | 241 | ||
242 | static void pl010_modem_status(struct uart_port *port) | 242 | static void pl010_modem_status(struct uart_port *port) |
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 7db88ee18f75..56071309744c 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
@@ -74,7 +74,7 @@ struct uart_amba_port { | |||
74 | unsigned int old_status; | 74 | unsigned int old_status; |
75 | }; | 75 | }; |
76 | 76 | ||
77 | static void pl011_stop_tx(struct uart_port *port, unsigned int tty_stop) | 77 | static void pl011_stop_tx(struct uart_port *port) |
78 | { | 78 | { |
79 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | 79 | struct uart_amba_port *uap = (struct uart_amba_port *)port; |
80 | 80 | ||
@@ -82,7 +82,7 @@ static void pl011_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
82 | writew(uap->im, uap->port.membase + UART011_IMSC); | 82 | writew(uap->im, uap->port.membase + UART011_IMSC); |
83 | } | 83 | } |
84 | 84 | ||
85 | static void pl011_start_tx(struct uart_port *port, unsigned int tty_start) | 85 | static void pl011_start_tx(struct uart_port *port) |
86 | { | 86 | { |
87 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | 87 | struct uart_amba_port *uap = (struct uart_amba_port *)port; |
88 | 88 | ||
@@ -184,7 +184,7 @@ static void pl011_tx_chars(struct uart_amba_port *uap) | |||
184 | return; | 184 | return; |
185 | } | 185 | } |
186 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { | 186 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { |
187 | pl011_stop_tx(&uap->port, 0); | 187 | pl011_stop_tx(&uap->port); |
188 | return; | 188 | return; |
189 | } | 189 | } |
190 | 190 | ||
@@ -201,7 +201,7 @@ static void pl011_tx_chars(struct uart_amba_port *uap) | |||
201 | uart_write_wakeup(&uap->port); | 201 | uart_write_wakeup(&uap->port); |
202 | 202 | ||
203 | if (uart_circ_empty(xmit)) | 203 | if (uart_circ_empty(xmit)) |
204 | pl011_stop_tx(&uap->port, 0); | 204 | pl011_stop_tx(&uap->port); |
205 | } | 205 | } |
206 | 206 | ||
207 | static void pl011_modem_status(struct uart_amba_port *uap) | 207 | static void pl011_modem_status(struct uart_amba_port *uap) |
diff --git a/drivers/serial/au1x00_uart.c b/drivers/serial/au1x00_uart.c index 6104aeef1243..a274ebf256a1 100644 --- a/drivers/serial/au1x00_uart.c +++ b/drivers/serial/au1x00_uart.c | |||
@@ -200,7 +200,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) | |||
200 | DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name); | 200 | DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name); |
201 | } | 201 | } |
202 | 202 | ||
203 | static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) | 203 | static void serial8250_stop_tx(struct uart_port *port) |
204 | { | 204 | { |
205 | struct uart_8250_port *up = (struct uart_8250_port *)port; | 205 | struct uart_8250_port *up = (struct uart_8250_port *)port; |
206 | 206 | ||
@@ -210,7 +210,7 @@ static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
210 | } | 210 | } |
211 | } | 211 | } |
212 | 212 | ||
213 | static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start) | 213 | static void serial8250_start_tx(struct uart_port *port) |
214 | { | 214 | { |
215 | struct uart_8250_port *up = (struct uart_8250_port *)port; | 215 | struct uart_8250_port *up = (struct uart_8250_port *)port; |
216 | 216 | ||
@@ -337,7 +337,7 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up) | |||
337 | return; | 337 | return; |
338 | } | 338 | } |
339 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 339 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
340 | serial8250_stop_tx(&up->port, 0); | 340 | serial8250_stop_tx(&up->port); |
341 | return; | 341 | return; |
342 | } | 342 | } |
343 | 343 | ||
@@ -356,7 +356,7 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up) | |||
356 | DEBUG_INTR("THRE..."); | 356 | DEBUG_INTR("THRE..."); |
357 | 357 | ||
358 | if (uart_circ_empty(xmit)) | 358 | if (uart_circ_empty(xmit)) |
359 | serial8250_stop_tx(&up->port, 0); | 359 | serial8250_stop_tx(&up->port); |
360 | } | 360 | } |
361 | 361 | ||
362 | static _INLINE_ void check_modem_status(struct uart_8250_port *up) | 362 | static _INLINE_ void check_modem_status(struct uart_8250_port *up) |
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c index e92522b33c48..d822896b488c 100644 --- a/drivers/serial/clps711x.c +++ b/drivers/serial/clps711x.c | |||
@@ -69,8 +69,7 @@ | |||
69 | 69 | ||
70 | #define tx_enabled(port) ((port)->unused[0]) | 70 | #define tx_enabled(port) ((port)->unused[0]) |
71 | 71 | ||
72 | static void | 72 | static void clps711xuart_stop_tx(struct uart_port *port) |
73 | clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
74 | { | 73 | { |
75 | if (tx_enabled(port)) { | 74 | if (tx_enabled(port)) { |
76 | disable_irq(TX_IRQ(port)); | 75 | disable_irq(TX_IRQ(port)); |
@@ -78,8 +77,7 @@ clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
78 | } | 77 | } |
79 | } | 78 | } |
80 | 79 | ||
81 | static void | 80 | static void clps711xuart_start_tx(struct uart_port *port) |
82 | clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start) | ||
83 | { | 81 | { |
84 | if (!tx_enabled(port)) { | 82 | if (!tx_enabled(port)) { |
85 | enable_irq(TX_IRQ(port)); | 83 | enable_irq(TX_IRQ(port)); |
@@ -165,7 +163,7 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *re | |||
165 | return IRQ_HANDLED; | 163 | return IRQ_HANDLED; |
166 | } | 164 | } |
167 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 165 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
168 | clps711xuart_stop_tx(port, 0); | 166 | clps711xuart_stop_tx(port); |
169 | return IRQ_HANDLED; | 167 | return IRQ_HANDLED; |
170 | } | 168 | } |
171 | 169 | ||
@@ -182,7 +180,7 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *re | |||
182 | uart_write_wakeup(port); | 180 | uart_write_wakeup(port); |
183 | 181 | ||
184 | if (uart_circ_empty(xmit)) | 182 | if (uart_circ_empty(xmit)) |
185 | clps711xuart_stop_tx(port, 0); | 183 | clps711xuart_stop_tx(port); |
186 | 184 | ||
187 | return IRQ_HANDLED; | 185 | return IRQ_HANDLED; |
188 | } | 186 | } |
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index d639ac92a117..282b32351d8e 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
@@ -124,7 +124,7 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port) | |||
124 | /* | 124 | /* |
125 | * Stop transmitter | 125 | * Stop transmitter |
126 | */ | 126 | */ |
127 | static void cpm_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) | 127 | static void cpm_uart_stop_tx(struct uart_port *port) |
128 | { | 128 | { |
129 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 129 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
130 | volatile smc_t *smcp = pinfo->smcp; | 130 | volatile smc_t *smcp = pinfo->smcp; |
@@ -141,7 +141,7 @@ static void cpm_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
141 | /* | 141 | /* |
142 | * Start transmitter | 142 | * Start transmitter |
143 | */ | 143 | */ |
144 | static void cpm_uart_start_tx(struct uart_port *port, unsigned int tty_start) | 144 | static void cpm_uart_start_tx(struct uart_port *port) |
145 | { | 145 | { |
146 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 146 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
147 | volatile smc_t *smcp = pinfo->smcp; | 147 | volatile smc_t *smcp = pinfo->smcp; |
@@ -623,7 +623,7 @@ static int cpm_uart_tx_pump(struct uart_port *port) | |||
623 | } | 623 | } |
624 | 624 | ||
625 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 625 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
626 | cpm_uart_stop_tx(port, 0); | 626 | cpm_uart_stop_tx(port); |
627 | return 0; | 627 | return 0; |
628 | } | 628 | } |
629 | 629 | ||
@@ -656,7 +656,7 @@ static int cpm_uart_tx_pump(struct uart_port *port) | |||
656 | uart_write_wakeup(port); | 656 | uart_write_wakeup(port); |
657 | 657 | ||
658 | if (uart_circ_empty(xmit)) { | 658 | if (uart_circ_empty(xmit)) { |
659 | cpm_uart_stop_tx(port, 0); | 659 | cpm_uart_stop_tx(port); |
660 | return 0; | 660 | return 0; |
661 | } | 661 | } |
662 | 662 | ||
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c index 97824eeeafae..e63b9dffc8d7 100644 --- a/drivers/serial/dz.c +++ b/drivers/serial/dz.c | |||
@@ -112,7 +112,7 @@ static inline void dz_out(struct dz_port *dport, unsigned offset, | |||
112 | * ------------------------------------------------------------ | 112 | * ------------------------------------------------------------ |
113 | */ | 113 | */ |
114 | 114 | ||
115 | static void dz_stop_tx(struct uart_port *uport, unsigned int tty_stop) | 115 | static void dz_stop_tx(struct uart_port *uport) |
116 | { | 116 | { |
117 | struct dz_port *dport = (struct dz_port *)uport; | 117 | struct dz_port *dport = (struct dz_port *)uport; |
118 | unsigned short tmp, mask = 1 << dport->port.line; | 118 | unsigned short tmp, mask = 1 << dport->port.line; |
@@ -125,7 +125,7 @@ static void dz_stop_tx(struct uart_port *uport, unsigned int tty_stop) | |||
125 | spin_unlock_irqrestore(&dport->port.lock, flags); | 125 | spin_unlock_irqrestore(&dport->port.lock, flags); |
126 | } | 126 | } |
127 | 127 | ||
128 | static void dz_start_tx(struct uart_port *uport, unsigned int tty_start) | 128 | static void dz_start_tx(struct uart_port *uport) |
129 | { | 129 | { |
130 | struct dz_port *dport = (struct dz_port *)uport; | 130 | struct dz_port *dport = (struct dz_port *)uport; |
131 | unsigned short tmp, mask = 1 << dport->port.line; | 131 | unsigned short tmp, mask = 1 << dport->port.line; |
@@ -290,7 +290,7 @@ static inline void dz_transmit_chars(struct dz_port *dport) | |||
290 | } | 290 | } |
291 | /* if nothing to do or stopped or hardware stopped */ | 291 | /* if nothing to do or stopped or hardware stopped */ |
292 | if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { | 292 | if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { |
293 | dz_stop_tx(&dport->port, 0); | 293 | dz_stop_tx(&dport->port); |
294 | return; | 294 | return; |
295 | } | 295 | } |
296 | 296 | ||
@@ -308,7 +308,7 @@ static inline void dz_transmit_chars(struct dz_port *dport) | |||
308 | 308 | ||
309 | /* Are we done */ | 309 | /* Are we done */ |
310 | if (uart_circ_empty(xmit)) | 310 | if (uart_circ_empty(xmit)) |
311 | dz_stop_tx(&dport->port, 0); | 311 | dz_stop_tx(&dport->port); |
312 | } | 312 | } |
313 | 313 | ||
314 | /* | 314 | /* |
@@ -440,7 +440,7 @@ static int dz_startup(struct uart_port *uport) | |||
440 | */ | 440 | */ |
441 | static void dz_shutdown(struct uart_port *uport) | 441 | static void dz_shutdown(struct uart_port *uport) |
442 | { | 442 | { |
443 | dz_stop_tx(uport, 0); | 443 | dz_stop_tx(uport); |
444 | } | 444 | } |
445 | 445 | ||
446 | /* | 446 | /* |
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c index c112b32764e8..79f8df4d66b7 100644 --- a/drivers/serial/icom.c +++ b/drivers/serial/icom.c | |||
@@ -989,18 +989,16 @@ static unsigned int icom_get_mctrl(struct uart_port *port) | |||
989 | return result; | 989 | return result; |
990 | } | 990 | } |
991 | 991 | ||
992 | static void icom_stop_tx(struct uart_port *port, unsigned int tty_stop) | 992 | static void icom_stop_tx(struct uart_port *port) |
993 | { | 993 | { |
994 | unsigned char cmdReg; | 994 | unsigned char cmdReg; |
995 | 995 | ||
996 | if (tty_stop) { | 996 | trace(ICOM_PORT, "STOP", 0); |
997 | trace(ICOM_PORT, "STOP", 0); | 997 | cmdReg = readb(&ICOM_PORT->dram->CmdReg); |
998 | cmdReg = readb(&ICOM_PORT->dram->CmdReg); | 998 | writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg); |
999 | writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg); | ||
1000 | } | ||
1001 | } | 999 | } |
1002 | 1000 | ||
1003 | static void icom_start_tx(struct uart_port *port, unsigned int tty_start) | 1001 | static void icom_start_tx(struct uart_port *port) |
1004 | { | 1002 | { |
1005 | unsigned char cmdReg; | 1003 | unsigned char cmdReg; |
1006 | 1004 | ||
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 01a8726a3f97..4c985e6b3784 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
@@ -124,7 +124,7 @@ static void imx_timeout(unsigned long data) | |||
124 | /* | 124 | /* |
125 | * interrupts disabled on entry | 125 | * interrupts disabled on entry |
126 | */ | 126 | */ |
127 | static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop) | 127 | static void imx_stop_tx(struct uart_port *port) |
128 | { | 128 | { |
129 | struct imx_port *sport = (struct imx_port *)port; | 129 | struct imx_port *sport = (struct imx_port *)port; |
130 | UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN; | 130 | UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN; |
@@ -165,13 +165,13 @@ static inline void imx_transmit_buffer(struct imx_port *sport) | |||
165 | } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)); | 165 | } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)); |
166 | 166 | ||
167 | if (uart_circ_empty(xmit)) | 167 | if (uart_circ_empty(xmit)) |
168 | imx_stop_tx(&sport->port, 0); | 168 | imx_stop_tx(&sport->port); |
169 | } | 169 | } |
170 | 170 | ||
171 | /* | 171 | /* |
172 | * interrupts disabled on entry | 172 | * interrupts disabled on entry |
173 | */ | 173 | */ |
174 | static void imx_start_tx(struct uart_port *port, unsigned int tty_start) | 174 | static void imx_start_tx(struct uart_port *port) |
175 | { | 175 | { |
176 | struct imx_port *sport = (struct imx_port *)port; | 176 | struct imx_port *sport = (struct imx_port *)port; |
177 | 177 | ||
@@ -196,7 +196,7 @@ static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs) | |||
196 | } | 196 | } |
197 | 197 | ||
198 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { | 198 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { |
199 | imx_stop_tx(&sport->port, 0); | 199 | imx_stop_tx(&sport->port); |
200 | goto out; | 200 | goto out; |
201 | } | 201 | } |
202 | 202 | ||
@@ -291,13 +291,31 @@ static unsigned int imx_tx_empty(struct uart_port *port) | |||
291 | return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0; | 291 | return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0; |
292 | } | 292 | } |
293 | 293 | ||
294 | /* | ||
295 | * We have a modem side uart, so the meanings of RTS and CTS are inverted. | ||
296 | */ | ||
294 | static unsigned int imx_get_mctrl(struct uart_port *port) | 297 | static unsigned int imx_get_mctrl(struct uart_port *port) |
295 | { | 298 | { |
296 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | 299 | struct imx_port *sport = (struct imx_port *)port; |
300 | unsigned int tmp = TIOCM_DSR | TIOCM_CAR; | ||
301 | |||
302 | if (USR1((u32)sport->port.membase) & USR1_RTSS) | ||
303 | tmp |= TIOCM_CTS; | ||
304 | |||
305 | if (UCR2((u32)sport->port.membase) & UCR2_CTS) | ||
306 | tmp |= TIOCM_RTS; | ||
307 | |||
308 | return tmp; | ||
297 | } | 309 | } |
298 | 310 | ||
299 | static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) | 311 | static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) |
300 | { | 312 | { |
313 | struct imx_port *sport = (struct imx_port *)port; | ||
314 | |||
315 | if (mctrl & TIOCM_RTS) | ||
316 | UCR2((u32)sport->port.membase) |= UCR2_CTS; | ||
317 | else | ||
318 | UCR2((u32)sport->port.membase) &= ~UCR2_CTS; | ||
301 | } | 319 | } |
302 | 320 | ||
303 | /* | 321 | /* |
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c index 793c3a7cbe47..0c5c96a582b3 100644 --- a/drivers/serial/ioc4_serial.c +++ b/drivers/serial/ioc4_serial.c | |||
@@ -2373,10 +2373,9 @@ static unsigned int ic4_tx_empty(struct uart_port *the_port) | |||
2373 | /** | 2373 | /** |
2374 | * ic4_stop_tx - stop the transmitter | 2374 | * ic4_stop_tx - stop the transmitter |
2375 | * @port: Port to operate on | 2375 | * @port: Port to operate on |
2376 | * @tty_stop: Set to 1 if called via uart_stop | ||
2377 | * | 2376 | * |
2378 | */ | 2377 | */ |
2379 | static void ic4_stop_tx(struct uart_port *the_port, unsigned int tty_stop) | 2378 | static void ic4_stop_tx(struct uart_port *the_port) |
2380 | { | 2379 | { |
2381 | } | 2380 | } |
2382 | 2381 | ||
@@ -2471,10 +2470,9 @@ static unsigned int ic4_get_mctrl(struct uart_port *the_port) | |||
2471 | /** | 2470 | /** |
2472 | * ic4_start_tx - Start transmitter, flush any output | 2471 | * ic4_start_tx - Start transmitter, flush any output |
2473 | * @port: Port to operate on | 2472 | * @port: Port to operate on |
2474 | * @tty_stop: Set to 1 if called via uart_start | ||
2475 | * | 2473 | * |
2476 | */ | 2474 | */ |
2477 | static void ic4_start_tx(struct uart_port *the_port, unsigned int tty_stop) | 2475 | static void ic4_start_tx(struct uart_port *the_port) |
2478 | { | 2476 | { |
2479 | struct ioc4_port *port = get_ioc4_port(the_port); | 2477 | struct ioc4_port *port = get_ioc4_port(the_port); |
2480 | unsigned long flags; | 2478 | unsigned long flags; |
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c index ea5bf4d4daa3..ef132349f310 100644 --- a/drivers/serial/ip22zilog.c +++ b/drivers/serial/ip22zilog.c | |||
@@ -592,7 +592,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
592 | } | 592 | } |
593 | 593 | ||
594 | /* The port lock is held and interrupts are disabled. */ | 594 | /* The port lock is held and interrupts are disabled. */ |
595 | static void ip22zilog_stop_tx(struct uart_port *port, unsigned int tty_stop) | 595 | static void ip22zilog_stop_tx(struct uart_port *port) |
596 | { | 596 | { |
597 | struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; | 597 | struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; |
598 | 598 | ||
@@ -600,7 +600,7 @@ static void ip22zilog_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
600 | } | 600 | } |
601 | 601 | ||
602 | /* The port lock is held and interrupts are disabled. */ | 602 | /* The port lock is held and interrupts are disabled. */ |
603 | static void ip22zilog_start_tx(struct uart_port *port, unsigned int tty_start) | 603 | static void ip22zilog_start_tx(struct uart_port *port) |
604 | { | 604 | { |
605 | struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; | 605 | struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; |
606 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); | 606 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); |
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c index 98de2258fd06..6fa0d62d6f68 100644 --- a/drivers/serial/jsm/jsm_tty.c +++ b/drivers/serial/jsm/jsm_tty.c | |||
@@ -113,7 +113,7 @@ static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
113 | udelay(10); | 113 | udelay(10); |
114 | } | 114 | } |
115 | 115 | ||
116 | static void jsm_tty_start_tx(struct uart_port *port, unsigned int tty_start) | 116 | static void jsm_tty_start_tx(struct uart_port *port) |
117 | { | 117 | { |
118 | struct jsm_channel *channel = (struct jsm_channel *)port; | 118 | struct jsm_channel *channel = (struct jsm_channel *)port; |
119 | 119 | ||
@@ -125,7 +125,7 @@ static void jsm_tty_start_tx(struct uart_port *port, unsigned int tty_start) | |||
125 | jsm_printk(IOCTL, INFO, &channel->ch_bd->pci_dev, "finish\n"); | 125 | jsm_printk(IOCTL, INFO, &channel->ch_bd->pci_dev, "finish\n"); |
126 | } | 126 | } |
127 | 127 | ||
128 | static void jsm_tty_stop_tx(struct uart_port *port, unsigned int tty_stop) | 128 | static void jsm_tty_stop_tx(struct uart_port *port) |
129 | { | 129 | { |
130 | struct jsm_channel *channel = (struct jsm_channel *)port; | 130 | struct jsm_channel *channel = (struct jsm_channel *)port; |
131 | 131 | ||
diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c index 9b50560b9d16..b0ecc7537ce5 100644 --- a/drivers/serial/m32r_sio.c +++ b/drivers/serial/m32r_sio.c | |||
@@ -275,7 +275,7 @@ serial_out(struct uart_sio_port *up, int offset, int value) | |||
275 | __sio_out(value, offset); | 275 | __sio_out(value, offset); |
276 | } | 276 | } |
277 | 277 | ||
278 | static void m32r_sio_stop_tx(struct uart_port *port, unsigned int tty_stop) | 278 | static void m32r_sio_stop_tx(struct uart_port *port) |
279 | { | 279 | { |
280 | struct uart_sio_port *up = (struct uart_sio_port *)port; | 280 | struct uart_sio_port *up = (struct uart_sio_port *)port; |
281 | 281 | ||
@@ -285,7 +285,7 @@ static void m32r_sio_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
285 | } | 285 | } |
286 | } | 286 | } |
287 | 287 | ||
288 | static void m32r_sio_start_tx(struct uart_port *port, unsigned int tty_start) | 288 | static void m32r_sio_start_tx(struct uart_port *port) |
289 | { | 289 | { |
290 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | 290 | #ifdef CONFIG_SERIAL_M32R_PLDSIO |
291 | struct uart_sio_port *up = (struct uart_sio_port *)port; | 291 | struct uart_sio_port *up = (struct uart_sio_port *)port; |
@@ -425,7 +425,7 @@ static _INLINE_ void transmit_chars(struct uart_sio_port *up) | |||
425 | return; | 425 | return; |
426 | } | 426 | } |
427 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 427 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
428 | m32r_sio_stop_tx(&up->port, 0); | 428 | m32r_sio_stop_tx(&up->port); |
429 | return; | 429 | return; |
430 | } | 430 | } |
431 | 431 | ||
@@ -446,7 +446,7 @@ static _INLINE_ void transmit_chars(struct uart_sio_port *up) | |||
446 | DEBUG_INTR("THRE..."); | 446 | DEBUG_INTR("THRE..."); |
447 | 447 | ||
448 | if (uart_circ_empty(xmit)) | 448 | if (uart_circ_empty(xmit)) |
449 | m32r_sio_stop_tx(&up->port, 0); | 449 | m32r_sio_stop_tx(&up->port); |
450 | } | 450 | } |
451 | 451 | ||
452 | /* | 452 | /* |
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 2a5cf174ca30..a3cd0ee8486d 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -119,7 +119,7 @@ mpc52xx_uart_get_mctrl(struct uart_port *port) | |||
119 | } | 119 | } |
120 | 120 | ||
121 | static void | 121 | static void |
122 | mpc52xx_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) | 122 | mpc52xx_uart_stop_tx(struct uart_port *port) |
123 | { | 123 | { |
124 | /* port->lock taken by caller */ | 124 | /* port->lock taken by caller */ |
125 | port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; | 125 | port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; |
@@ -127,7 +127,7 @@ mpc52xx_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
127 | } | 127 | } |
128 | 128 | ||
129 | static void | 129 | static void |
130 | mpc52xx_uart_start_tx(struct uart_port *port, unsigned int tty_start) | 130 | mpc52xx_uart_start_tx(struct uart_port *port) |
131 | { | 131 | { |
132 | /* port->lock taken by caller */ | 132 | /* port->lock taken by caller */ |
133 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; | 133 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; |
@@ -485,7 +485,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port) | |||
485 | 485 | ||
486 | /* Nothing to do ? */ | 486 | /* Nothing to do ? */ |
487 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 487 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
488 | mpc52xx_uart_stop_tx(port,0); | 488 | mpc52xx_uart_stop_tx(port); |
489 | return 0; | 489 | return 0; |
490 | } | 490 | } |
491 | 491 | ||
@@ -504,7 +504,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port) | |||
504 | 504 | ||
505 | /* Maybe we're done after all */ | 505 | /* Maybe we're done after all */ |
506 | if (uart_circ_empty(xmit)) { | 506 | if (uart_circ_empty(xmit)) { |
507 | mpc52xx_uart_stop_tx(port,0); | 507 | mpc52xx_uart_stop_tx(port); |
508 | return 0; | 508 | return 0; |
509 | } | 509 | } |
510 | 510 | ||
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c index e43276c6a954..efe79b1fd431 100644 --- a/drivers/serial/mpsc.c +++ b/drivers/serial/mpsc.c | |||
@@ -1072,18 +1072,18 @@ mpsc_get_mctrl(struct uart_port *port) | |||
1072 | } | 1072 | } |
1073 | 1073 | ||
1074 | static void | 1074 | static void |
1075 | mpsc_stop_tx(struct uart_port *port, uint tty_start) | 1075 | mpsc_stop_tx(struct uart_port *port) |
1076 | { | 1076 | { |
1077 | struct mpsc_port_info *pi = (struct mpsc_port_info *)port; | 1077 | struct mpsc_port_info *pi = (struct mpsc_port_info *)port; |
1078 | 1078 | ||
1079 | pr_debug("mpsc_stop_tx[%d]: tty_start: %d\n", port->line, tty_start); | 1079 | pr_debug("mpsc_stop_tx[%d]\n", port->line); |
1080 | 1080 | ||
1081 | mpsc_freeze(pi); | 1081 | mpsc_freeze(pi); |
1082 | return; | 1082 | return; |
1083 | } | 1083 | } |
1084 | 1084 | ||
1085 | static void | 1085 | static void |
1086 | mpsc_start_tx(struct uart_port *port, uint tty_start) | 1086 | mpsc_start_tx(struct uart_port *port) |
1087 | { | 1087 | { |
1088 | struct mpsc_port_info *pi = (struct mpsc_port_info *)port; | 1088 | struct mpsc_port_info *pi = (struct mpsc_port_info *)port; |
1089 | 1089 | ||
@@ -1091,7 +1091,7 @@ mpsc_start_tx(struct uart_port *port, uint tty_start) | |||
1091 | mpsc_copy_tx_data(pi); | 1091 | mpsc_copy_tx_data(pi); |
1092 | mpsc_sdma_start_tx(pi); | 1092 | mpsc_sdma_start_tx(pi); |
1093 | 1093 | ||
1094 | pr_debug("mpsc_start_tx[%d]: tty_start: %d\n", port->line, tty_start); | 1094 | pr_debug("mpsc_start_tx[%d]\n", port->line); |
1095 | return; | 1095 | return; |
1096 | } | 1096 | } |
1097 | 1097 | ||
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c index dadd7e19714e..189064607709 100644 --- a/drivers/serial/mux.c +++ b/drivers/serial/mux.c | |||
@@ -111,22 +111,20 @@ static unsigned int mux_get_mctrl(struct uart_port *port) | |||
111 | /** | 111 | /** |
112 | * mux_stop_tx - Stop transmitting characters. | 112 | * mux_stop_tx - Stop transmitting characters. |
113 | * @port: Ptr to the uart_port. | 113 | * @port: Ptr to the uart_port. |
114 | * @tty_stop: tty layer issue this command? | ||
115 | * | 114 | * |
116 | * The Serial MUX does not support this function. | 115 | * The Serial MUX does not support this function. |
117 | */ | 116 | */ |
118 | static void mux_stop_tx(struct uart_port *port, unsigned int tty_stop) | 117 | static void mux_stop_tx(struct uart_port *port) |
119 | { | 118 | { |
120 | } | 119 | } |
121 | 120 | ||
122 | /** | 121 | /** |
123 | * mux_start_tx - Start transmitting characters. | 122 | * mux_start_tx - Start transmitting characters. |
124 | * @port: Ptr to the uart_port. | 123 | * @port: Ptr to the uart_port. |
125 | * @tty_start: tty layer issue this command? | ||
126 | * | 124 | * |
127 | * The Serial Mux does not support this function. | 125 | * The Serial Mux does not support this function. |
128 | */ | 126 | */ |
129 | static void mux_start_tx(struct uart_port *port, unsigned int tty_start) | 127 | static void mux_start_tx(struct uart_port *port) |
130 | { | 128 | { |
131 | } | 129 | } |
132 | 130 | ||
@@ -181,7 +179,7 @@ static void mux_write(struct uart_port *port) | |||
181 | } | 179 | } |
182 | 180 | ||
183 | if(uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 181 | if(uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
184 | mux_stop_tx(port, 0); | 182 | mux_stop_tx(port); |
185 | return; | 183 | return; |
186 | } | 184 | } |
187 | 185 | ||
@@ -202,7 +200,7 @@ static void mux_write(struct uart_port *port) | |||
202 | uart_write_wakeup(port); | 200 | uart_write_wakeup(port); |
203 | 201 | ||
204 | if (uart_circ_empty(xmit)) | 202 | if (uart_circ_empty(xmit)) |
205 | mux_stop_tx(port, 0); | 203 | mux_stop_tx(port); |
206 | } | 204 | } |
207 | 205 | ||
208 | /** | 206 | /** |
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c index 7db2f37532cf..5bfde99e245e 100644 --- a/drivers/serial/pmac_zilog.c +++ b/drivers/serial/pmac_zilog.c | |||
@@ -630,11 +630,10 @@ static unsigned int pmz_get_mctrl(struct uart_port *port) | |||
630 | 630 | ||
631 | /* | 631 | /* |
632 | * Stop TX side. Dealt like sunzilog at next Tx interrupt, | 632 | * Stop TX side. Dealt like sunzilog at next Tx interrupt, |
633 | * though for DMA, we will have to do a bit more. What is | 633 | * though for DMA, we will have to do a bit more. |
634 | * the meaning of the tty_stop bit ? XXX | ||
635 | * The port lock is held and interrupts are disabled. | 634 | * The port lock is held and interrupts are disabled. |
636 | */ | 635 | */ |
637 | static void pmz_stop_tx(struct uart_port *port, unsigned int tty_stop) | 636 | static void pmz_stop_tx(struct uart_port *port) |
638 | { | 637 | { |
639 | to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED; | 638 | to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED; |
640 | } | 639 | } |
@@ -643,7 +642,7 @@ static void pmz_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
643 | * Kick the Tx side. | 642 | * Kick the Tx side. |
644 | * The port lock is held and interrupts are disabled. | 643 | * The port lock is held and interrupts are disabled. |
645 | */ | 644 | */ |
646 | static void pmz_start_tx(struct uart_port *port, unsigned int tty_start) | 645 | static void pmz_start_tx(struct uart_port *port) |
647 | { | 646 | { |
648 | struct uart_pmac_port *uap = to_pmz(port); | 647 | struct uart_pmac_port *uap = to_pmz(port); |
649 | unsigned char status; | 648 | unsigned char status; |
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index 461c81c93207..eaa0af835290 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c | |||
@@ -80,7 +80,7 @@ static void serial_pxa_enable_ms(struct uart_port *port) | |||
80 | serial_out(up, UART_IER, up->ier); | 80 | serial_out(up, UART_IER, up->ier); |
81 | } | 81 | } |
82 | 82 | ||
83 | static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop) | 83 | static void serial_pxa_stop_tx(struct uart_port *port) |
84 | { | 84 | { |
85 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | 85 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; |
86 | 86 | ||
@@ -185,7 +185,7 @@ static void transmit_chars(struct uart_pxa_port *up) | |||
185 | return; | 185 | return; |
186 | } | 186 | } |
187 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 187 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
188 | serial_pxa_stop_tx(&up->port, 0); | 188 | serial_pxa_stop_tx(&up->port); |
189 | return; | 189 | return; |
190 | } | 190 | } |
191 | 191 | ||
@@ -203,10 +203,10 @@ static void transmit_chars(struct uart_pxa_port *up) | |||
203 | 203 | ||
204 | 204 | ||
205 | if (uart_circ_empty(xmit)) | 205 | if (uart_circ_empty(xmit)) |
206 | serial_pxa_stop_tx(&up->port, 0); | 206 | serial_pxa_stop_tx(&up->port); |
207 | } | 207 | } |
208 | 208 | ||
209 | static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start) | 209 | static void serial_pxa_start_tx(struct uart_port *port) |
210 | { | 210 | { |
211 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | 211 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; |
212 | 212 | ||
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index 7365d4b50b95..c361c6fb0809 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c | |||
@@ -246,8 +246,7 @@ static void s3c24xx_serial_rx_disable(struct uart_port *port) | |||
246 | spin_unlock_irqrestore(&port->lock, flags); | 246 | spin_unlock_irqrestore(&port->lock, flags); |
247 | } | 247 | } |
248 | 248 | ||
249 | static void | 249 | static void s3c24xx_serial_stop_tx(struct uart_port *port) |
250 | s3c24xx_serial_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
251 | { | 250 | { |
252 | if (tx_enabled(port)) { | 251 | if (tx_enabled(port)) { |
253 | disable_irq(TX_IRQ(port)); | 252 | disable_irq(TX_IRQ(port)); |
@@ -257,8 +256,7 @@ s3c24xx_serial_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
257 | } | 256 | } |
258 | } | 257 | } |
259 | 258 | ||
260 | static void | 259 | static void s3c24xx_serial_start_tx(struct uart_port *port) |
261 | s3c24xx_serial_start_tx(struct uart_port *port, unsigned int tty_start) | ||
262 | { | 260 | { |
263 | if (!tx_enabled(port)) { | 261 | if (!tx_enabled(port)) { |
264 | if (port->flags & UPF_CONS_FLOW) | 262 | if (port->flags & UPF_CONS_FLOW) |
@@ -424,7 +422,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id, struct pt_regs *re | |||
424 | */ | 422 | */ |
425 | 423 | ||
426 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 424 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
427 | s3c24xx_serial_stop_tx(port, 0); | 425 | s3c24xx_serial_stop_tx(port); |
428 | goto out; | 426 | goto out; |
429 | } | 427 | } |
430 | 428 | ||
@@ -443,7 +441,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id, struct pt_regs *re | |||
443 | uart_write_wakeup(port); | 441 | uart_write_wakeup(port); |
444 | 442 | ||
445 | if (uart_circ_empty(xmit)) | 443 | if (uart_circ_empty(xmit)) |
446 | s3c24xx_serial_stop_tx(port, 0); | 444 | s3c24xx_serial_stop_tx(port); |
447 | 445 | ||
448 | out: | 446 | out: |
449 | return IRQ_HANDLED; | 447 | return IRQ_HANDLED; |
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c index 98641c3f5ab9..1225b14f6e9d 100644 --- a/drivers/serial/sa1100.c +++ b/drivers/serial/sa1100.c | |||
@@ -145,7 +145,7 @@ static void sa1100_timeout(unsigned long data) | |||
145 | /* | 145 | /* |
146 | * interrupts disabled on entry | 146 | * interrupts disabled on entry |
147 | */ | 147 | */ |
148 | static void sa1100_stop_tx(struct uart_port *port, unsigned int tty_stop) | 148 | static void sa1100_stop_tx(struct uart_port *port) |
149 | { | 149 | { |
150 | struct sa1100_port *sport = (struct sa1100_port *)port; | 150 | struct sa1100_port *sport = (struct sa1100_port *)port; |
151 | u32 utcr3; | 151 | u32 utcr3; |
@@ -158,7 +158,7 @@ static void sa1100_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
158 | /* | 158 | /* |
159 | * interrupts may not be disabled on entry | 159 | * interrupts may not be disabled on entry |
160 | */ | 160 | */ |
161 | static void sa1100_start_tx(struct uart_port *port, unsigned int tty_start) | 161 | static void sa1100_start_tx(struct uart_port *port) |
162 | { | 162 | { |
163 | struct sa1100_port *sport = (struct sa1100_port *)port; | 163 | struct sa1100_port *sport = (struct sa1100_port *)port; |
164 | unsigned long flags; | 164 | unsigned long flags; |
@@ -264,7 +264,7 @@ static void sa1100_tx_chars(struct sa1100_port *sport) | |||
264 | sa1100_mctrl_check(sport); | 264 | sa1100_mctrl_check(sport); |
265 | 265 | ||
266 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { | 266 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { |
267 | sa1100_stop_tx(&sport->port, 0); | 267 | sa1100_stop_tx(&sport->port); |
268 | return; | 268 | return; |
269 | } | 269 | } |
270 | 270 | ||
@@ -284,7 +284,7 @@ static void sa1100_tx_chars(struct sa1100_port *sport) | |||
284 | uart_write_wakeup(&sport->port); | 284 | uart_write_wakeup(&sport->port); |
285 | 285 | ||
286 | if (uart_circ_empty(xmit)) | 286 | if (uart_circ_empty(xmit)) |
287 | sa1100_stop_tx(&sport->port, 0); | 287 | sa1100_stop_tx(&sport->port); |
288 | } | 288 | } |
289 | 289 | ||
290 | static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs) | 290 | static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs) |
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c index 54699c3a00ab..dea156a62d0a 100644 --- a/drivers/serial/serial_core.c +++ b/drivers/serial/serial_core.c | |||
@@ -80,7 +80,7 @@ static void uart_stop(struct tty_struct *tty) | |||
80 | unsigned long flags; | 80 | unsigned long flags; |
81 | 81 | ||
82 | spin_lock_irqsave(&port->lock, flags); | 82 | spin_lock_irqsave(&port->lock, flags); |
83 | port->ops->stop_tx(port, 1); | 83 | port->ops->stop_tx(port); |
84 | spin_unlock_irqrestore(&port->lock, flags); | 84 | spin_unlock_irqrestore(&port->lock, flags); |
85 | } | 85 | } |
86 | 86 | ||
@@ -91,7 +91,7 @@ static void __uart_start(struct tty_struct *tty) | |||
91 | 91 | ||
92 | if (!uart_circ_empty(&state->info->xmit) && state->info->xmit.buf && | 92 | if (!uart_circ_empty(&state->info->xmit) && state->info->xmit.buf && |
93 | !tty->stopped && !tty->hw_stopped) | 93 | !tty->stopped && !tty->hw_stopped) |
94 | port->ops->start_tx(port, 1); | 94 | port->ops->start_tx(port); |
95 | } | 95 | } |
96 | 96 | ||
97 | static void uart_start(struct tty_struct *tty) | 97 | static void uart_start(struct tty_struct *tty) |
@@ -542,7 +542,7 @@ static void uart_send_xchar(struct tty_struct *tty, char ch) | |||
542 | port->x_char = ch; | 542 | port->x_char = ch; |
543 | if (ch) { | 543 | if (ch) { |
544 | spin_lock_irqsave(&port->lock, flags); | 544 | spin_lock_irqsave(&port->lock, flags); |
545 | port->ops->start_tx(port, 0); | 545 | port->ops->start_tx(port); |
546 | spin_unlock_irqrestore(&port->lock, flags); | 546 | spin_unlock_irqrestore(&port->lock, flags); |
547 | } | 547 | } |
548 | } | 548 | } |
@@ -1146,7 +1146,7 @@ static void uart_set_termios(struct tty_struct *tty, struct termios *old_termios | |||
1146 | spin_lock_irqsave(&state->port->lock, flags); | 1146 | spin_lock_irqsave(&state->port->lock, flags); |
1147 | if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) { | 1147 | if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) { |
1148 | tty->hw_stopped = 1; | 1148 | tty->hw_stopped = 1; |
1149 | state->port->ops->stop_tx(state->port, 0); | 1149 | state->port->ops->stop_tx(state->port); |
1150 | } | 1150 | } |
1151 | spin_unlock_irqrestore(&state->port->lock, flags); | 1151 | spin_unlock_irqrestore(&state->port->lock, flags); |
1152 | } | 1152 | } |
@@ -1869,7 +1869,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port) | |||
1869 | struct uart_ops *ops = port->ops; | 1869 | struct uart_ops *ops = port->ops; |
1870 | 1870 | ||
1871 | spin_lock_irq(&port->lock); | 1871 | spin_lock_irq(&port->lock); |
1872 | ops->stop_tx(port, 0); | 1872 | ops->stop_tx(port); |
1873 | ops->set_mctrl(port, 0); | 1873 | ops->set_mctrl(port, 0); |
1874 | ops->stop_rx(port); | 1874 | ops->stop_rx(port); |
1875 | spin_unlock_irq(&port->lock); | 1875 | spin_unlock_irq(&port->lock); |
@@ -1935,7 +1935,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port) | |||
1935 | uart_change_speed(state, NULL); | 1935 | uart_change_speed(state, NULL); |
1936 | spin_lock_irq(&port->lock); | 1936 | spin_lock_irq(&port->lock); |
1937 | ops->set_mctrl(port, port->mctrl); | 1937 | ops->set_mctrl(port, port->mctrl); |
1938 | ops->start_tx(port, 0); | 1938 | ops->start_tx(port); |
1939 | spin_unlock_irq(&port->lock); | 1939 | spin_unlock_irq(&port->lock); |
1940 | } | 1940 | } |
1941 | 1941 | ||
@@ -2289,143 +2289,11 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2) | |||
2289 | } | 2289 | } |
2290 | EXPORT_SYMBOL(uart_match_port); | 2290 | EXPORT_SYMBOL(uart_match_port); |
2291 | 2291 | ||
2292 | /* | ||
2293 | * Try to find an unused uart_state slot for a port. | ||
2294 | */ | ||
2295 | static struct uart_state * | ||
2296 | uart_find_match_or_unused(struct uart_driver *drv, struct uart_port *port) | ||
2297 | { | ||
2298 | int i; | ||
2299 | |||
2300 | /* | ||
2301 | * First, find a port entry which matches. Note: if we do | ||
2302 | * find a matching entry, and it has a non-zero use count, | ||
2303 | * then we can't register the port. | ||
2304 | */ | ||
2305 | for (i = 0; i < drv->nr; i++) | ||
2306 | if (uart_match_port(drv->state[i].port, port)) | ||
2307 | return &drv->state[i]; | ||
2308 | |||
2309 | /* | ||
2310 | * We didn't find a matching entry, so look for the first | ||
2311 | * free entry. We look for one which hasn't been previously | ||
2312 | * used (indicated by zero iobase). | ||
2313 | */ | ||
2314 | for (i = 0; i < drv->nr; i++) | ||
2315 | if (drv->state[i].port->type == PORT_UNKNOWN && | ||
2316 | drv->state[i].port->iobase == 0 && | ||
2317 | drv->state[i].count == 0) | ||
2318 | return &drv->state[i]; | ||
2319 | |||
2320 | /* | ||
2321 | * That also failed. Last resort is to find any currently | ||
2322 | * entry which doesn't have a real port associated with it. | ||
2323 | */ | ||
2324 | for (i = 0; i < drv->nr; i++) | ||
2325 | if (drv->state[i].port->type == PORT_UNKNOWN && | ||
2326 | drv->state[i].count == 0) | ||
2327 | return &drv->state[i]; | ||
2328 | |||
2329 | return NULL; | ||
2330 | } | ||
2331 | |||
2332 | /** | ||
2333 | * uart_register_port: register uart settings with a port | ||
2334 | * @drv: pointer to the uart low level driver structure for this port | ||
2335 | * @port: uart port structure describing the port | ||
2336 | * | ||
2337 | * Register UART settings with the specified low level driver. Detect | ||
2338 | * the type of the port if UPF_BOOT_AUTOCONF is set, and detect the | ||
2339 | * IRQ if UPF_AUTO_IRQ is set. | ||
2340 | * | ||
2341 | * We try to pick the same port for the same IO base address, so that | ||
2342 | * when a modem is plugged in, unplugged and plugged back in, it gets | ||
2343 | * allocated the same port. | ||
2344 | * | ||
2345 | * Returns negative error, or positive line number. | ||
2346 | */ | ||
2347 | int uart_register_port(struct uart_driver *drv, struct uart_port *port) | ||
2348 | { | ||
2349 | struct uart_state *state; | ||
2350 | int ret; | ||
2351 | |||
2352 | down(&port_sem); | ||
2353 | |||
2354 | state = uart_find_match_or_unused(drv, port); | ||
2355 | |||
2356 | if (state) { | ||
2357 | /* | ||
2358 | * Ok, we've found a line that we can use. | ||
2359 | * | ||
2360 | * If we find a port that matches this one, and it appears | ||
2361 | * to be in-use (even if it doesn't have a type) we shouldn't | ||
2362 | * alter it underneath itself - the port may be open and | ||
2363 | * trying to do useful work. | ||
2364 | */ | ||
2365 | if (uart_users(state) != 0) { | ||
2366 | ret = -EBUSY; | ||
2367 | goto out; | ||
2368 | } | ||
2369 | |||
2370 | /* | ||
2371 | * If the port is already initialised, don't touch it. | ||
2372 | */ | ||
2373 | if (state->port->type == PORT_UNKNOWN) { | ||
2374 | state->port->iobase = port->iobase; | ||
2375 | state->port->membase = port->membase; | ||
2376 | state->port->irq = port->irq; | ||
2377 | state->port->uartclk = port->uartclk; | ||
2378 | state->port->fifosize = port->fifosize; | ||
2379 | state->port->regshift = port->regshift; | ||
2380 | state->port->iotype = port->iotype; | ||
2381 | state->port->flags = port->flags; | ||
2382 | state->port->line = state - drv->state; | ||
2383 | state->port->mapbase = port->mapbase; | ||
2384 | |||
2385 | uart_configure_port(drv, state, state->port); | ||
2386 | } | ||
2387 | |||
2388 | ret = state->port->line; | ||
2389 | } else | ||
2390 | ret = -ENOSPC; | ||
2391 | out: | ||
2392 | up(&port_sem); | ||
2393 | return ret; | ||
2394 | } | ||
2395 | |||
2396 | /** | ||
2397 | * uart_unregister_port - de-allocate a port | ||
2398 | * @drv: pointer to the uart low level driver structure for this port | ||
2399 | * @line: line index previously returned from uart_register_port() | ||
2400 | * | ||
2401 | * Hang up the specified line associated with the low level driver, | ||
2402 | * and mark the port as unused. | ||
2403 | */ | ||
2404 | void uart_unregister_port(struct uart_driver *drv, int line) | ||
2405 | { | ||
2406 | struct uart_state *state; | ||
2407 | |||
2408 | if (line < 0 || line >= drv->nr) { | ||
2409 | printk(KERN_ERR "Attempt to unregister "); | ||
2410 | printk("%s%d", drv->dev_name, line); | ||
2411 | printk("\n"); | ||
2412 | return; | ||
2413 | } | ||
2414 | |||
2415 | state = drv->state + line; | ||
2416 | |||
2417 | down(&port_sem); | ||
2418 | uart_unconfigure_port(drv, state); | ||
2419 | up(&port_sem); | ||
2420 | } | ||
2421 | |||
2422 | EXPORT_SYMBOL(uart_write_wakeup); | 2292 | EXPORT_SYMBOL(uart_write_wakeup); |
2423 | EXPORT_SYMBOL(uart_register_driver); | 2293 | EXPORT_SYMBOL(uart_register_driver); |
2424 | EXPORT_SYMBOL(uart_unregister_driver); | 2294 | EXPORT_SYMBOL(uart_unregister_driver); |
2425 | EXPORT_SYMBOL(uart_suspend_port); | 2295 | EXPORT_SYMBOL(uart_suspend_port); |
2426 | EXPORT_SYMBOL(uart_resume_port); | 2296 | EXPORT_SYMBOL(uart_resume_port); |
2427 | EXPORT_SYMBOL(uart_register_port); | ||
2428 | EXPORT_SYMBOL(uart_unregister_port); | ||
2429 | EXPORT_SYMBOL(uart_add_one_port); | 2297 | EXPORT_SYMBOL(uart_add_one_port); |
2430 | EXPORT_SYMBOL(uart_remove_one_port); | 2298 | EXPORT_SYMBOL(uart_remove_one_port); |
2431 | 2299 | ||
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c index 56f269b6bfb1..32f808d157a1 100644 --- a/drivers/serial/serial_lh7a40x.c +++ b/drivers/serial/serial_lh7a40x.c | |||
@@ -112,13 +112,12 @@ struct uart_port_lh7a40x { | |||
112 | unsigned int statusPrev; /* Most recently read modem status */ | 112 | unsigned int statusPrev; /* Most recently read modem status */ |
113 | }; | 113 | }; |
114 | 114 | ||
115 | static void lh7a40xuart_stop_tx (struct uart_port* port, unsigned int tty_stop) | 115 | static void lh7a40xuart_stop_tx (struct uart_port* port) |
116 | { | 116 | { |
117 | BIT_CLR (port, UART_R_INTEN, TxInt); | 117 | BIT_CLR (port, UART_R_INTEN, TxInt); |
118 | } | 118 | } |
119 | 119 | ||
120 | static void lh7a40xuart_start_tx (struct uart_port* port, | 120 | static void lh7a40xuart_start_tx (struct uart_port* port) |
121 | unsigned int tty_start) | ||
122 | { | 121 | { |
123 | BIT_SET (port, UART_R_INTEN, TxInt); | 122 | BIT_SET (port, UART_R_INTEN, TxInt); |
124 | 123 | ||
diff --git a/drivers/serial/serial_txx9.c b/drivers/serial/serial_txx9.c index d085030df70b..49afadbe461b 100644 --- a/drivers/serial/serial_txx9.c +++ b/drivers/serial/serial_txx9.c | |||
@@ -253,7 +253,7 @@ sio_quot_set(struct uart_txx9_port *up, int quot) | |||
253 | sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); | 253 | sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); |
254 | } | 254 | } |
255 | 255 | ||
256 | static void serial_txx9_stop_tx(struct uart_port *port, unsigned int tty_stop) | 256 | static void serial_txx9_stop_tx(struct uart_port *port) |
257 | { | 257 | { |
258 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | 258 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; |
259 | unsigned long flags; | 259 | unsigned long flags; |
@@ -263,7 +263,7 @@ static void serial_txx9_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
263 | spin_unlock_irqrestore(&up->port.lock, flags); | 263 | spin_unlock_irqrestore(&up->port.lock, flags); |
264 | } | 264 | } |
265 | 265 | ||
266 | static void serial_txx9_start_tx(struct uart_port *port, unsigned int tty_start) | 266 | static void serial_txx9_start_tx(struct uart_port *port) |
267 | { | 267 | { |
268 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | 268 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; |
269 | unsigned long flags; | 269 | unsigned long flags; |
@@ -372,7 +372,7 @@ static inline void transmit_chars(struct uart_txx9_port *up) | |||
372 | return; | 372 | return; |
373 | } | 373 | } |
374 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 374 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
375 | serial_txx9_stop_tx(&up->port, 0); | 375 | serial_txx9_stop_tx(&up->port); |
376 | return; | 376 | return; |
377 | } | 377 | } |
378 | 378 | ||
@@ -389,7 +389,7 @@ static inline void transmit_chars(struct uart_txx9_port *up) | |||
389 | uart_write_wakeup(&up->port); | 389 | uart_write_wakeup(&up->port); |
390 | 390 | ||
391 | if (uart_circ_empty(xmit)) | 391 | if (uart_circ_empty(xmit)) |
392 | serial_txx9_stop_tx(&up->port, 0); | 392 | serial_txx9_stop_tx(&up->port); |
393 | } | 393 | } |
394 | 394 | ||
395 | static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 395 | static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index ad5b776d779b..512266307866 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -79,8 +79,8 @@ static struct sci_port *serial_console_port = 0; | |||
79 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | 79 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ |
80 | 80 | ||
81 | /* Function prototypes */ | 81 | /* Function prototypes */ |
82 | static void sci_stop_tx(struct uart_port *port, unsigned int tty_stop); | 82 | static void sci_stop_tx(struct uart_port *port); |
83 | static void sci_start_tx(struct uart_port *port, unsigned int tty_start); | 83 | static void sci_start_tx(struct uart_port *port); |
84 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start); | 84 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start); |
85 | static void sci_stop_rx(struct uart_port *port); | 85 | static void sci_stop_rx(struct uart_port *port); |
86 | static int sci_request_irq(struct sci_port *port); | 86 | static int sci_request_irq(struct sci_port *port); |
@@ -455,7 +455,7 @@ static void sci_transmit_chars(struct uart_port *port) | |||
455 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 455 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
456 | uart_write_wakeup(port); | 456 | uart_write_wakeup(port); |
457 | if (uart_circ_empty(xmit)) { | 457 | if (uart_circ_empty(xmit)) { |
458 | sci_stop_tx(port, 0); | 458 | sci_stop_tx(port); |
459 | } else { | 459 | } else { |
460 | local_irq_save(flags); | 460 | local_irq_save(flags); |
461 | ctrl = sci_in(port, SCSCR); | 461 | ctrl = sci_in(port, SCSCR); |
@@ -900,7 +900,7 @@ static unsigned int sci_get_mctrl(struct uart_port *port) | |||
900 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | 900 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; |
901 | } | 901 | } |
902 | 902 | ||
903 | static void sci_start_tx(struct uart_port *port, unsigned int tty_start) | 903 | static void sci_start_tx(struct uart_port *port) |
904 | { | 904 | { |
905 | struct sci_port *s = &sci_ports[port->line]; | 905 | struct sci_port *s = &sci_ports[port->line]; |
906 | 906 | ||
@@ -909,7 +909,7 @@ static void sci_start_tx(struct uart_port *port, unsigned int tty_start) | |||
909 | enable_irq(s->irqs[SCIx_TXI_IRQ]); | 909 | enable_irq(s->irqs[SCIx_TXI_IRQ]); |
910 | } | 910 | } |
911 | 911 | ||
912 | static void sci_stop_tx(struct uart_port *port, unsigned int tty_stop) | 912 | static void sci_stop_tx(struct uart_port *port) |
913 | { | 913 | { |
914 | unsigned long flags; | 914 | unsigned long flags; |
915 | unsigned short ctrl; | 915 | unsigned short ctrl; |
@@ -978,7 +978,7 @@ static void sci_shutdown(struct uart_port *port) | |||
978 | struct sci_port *s = &sci_ports[port->line]; | 978 | struct sci_port *s = &sci_ports[port->line]; |
979 | 979 | ||
980 | sci_stop_rx(port); | 980 | sci_stop_rx(port); |
981 | sci_stop_tx(port, 1); | 981 | sci_stop_tx(port); |
982 | sci_free_irq(s); | 982 | sci_free_irq(s); |
983 | 983 | ||
984 | #if defined(__H8300S__) | 984 | #if defined(__H8300S__) |
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c index 12d1f14e78ce..313f9df24a2d 100644 --- a/drivers/serial/sn_console.c +++ b/drivers/serial/sn_console.c | |||
@@ -259,10 +259,9 @@ static unsigned int snp_tx_empty(struct uart_port *port) | |||
259 | /** | 259 | /** |
260 | * snp_stop_tx - stop the transmitter - no-op for us | 260 | * snp_stop_tx - stop the transmitter - no-op for us |
261 | * @port: Port to operat eon - we ignore - no-op function | 261 | * @port: Port to operat eon - we ignore - no-op function |
262 | * @tty_stop: Set to 1 if called via uart_stop | ||
263 | * | 262 | * |
264 | */ | 263 | */ |
265 | static void snp_stop_tx(struct uart_port *port, unsigned int tty_stop) | 264 | static void snp_stop_tx(struct uart_port *port) |
266 | { | 265 | { |
267 | } | 266 | } |
268 | 267 | ||
@@ -325,10 +324,9 @@ static void snp_stop_rx(struct uart_port *port) | |||
325 | /** | 324 | /** |
326 | * snp_start_tx - Start transmitter | 325 | * snp_start_tx - Start transmitter |
327 | * @port: Port to operate on | 326 | * @port: Port to operate on |
328 | * @tty_stop: Set to 1 if called via uart_start | ||
329 | * | 327 | * |
330 | */ | 328 | */ |
331 | static void snp_start_tx(struct uart_port *port, unsigned int tty_stop) | 329 | static void snp_start_tx(struct uart_port *port) |
332 | { | 330 | { |
333 | if (sal_console_port.sc_ops->sal_wakeup_transmit) | 331 | if (sal_console_port.sc_ops->sal_wakeup_transmit) |
334 | sal_console_port.sc_ops->sal_wakeup_transmit(&sal_console_port, | 332 | sal_console_port.sc_ops->sal_wakeup_transmit(&sal_console_port, |
@@ -615,7 +613,7 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw) | |||
615 | uart_write_wakeup(&port->sc_port); | 613 | uart_write_wakeup(&port->sc_port); |
616 | 614 | ||
617 | if (uart_circ_empty(xmit)) | 615 | if (uart_circ_empty(xmit)) |
618 | snp_stop_tx(&port->sc_port, 0); /* no-op for us */ | 616 | snp_stop_tx(&port->sc_port); /* no-op for us */ |
619 | } | 617 | } |
620 | 618 | ||
621 | /** | 619 | /** |
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c index 8d198880756a..e971156daa60 100644 --- a/drivers/serial/sunsab.c +++ b/drivers/serial/sunsab.c | |||
@@ -245,7 +245,7 @@ receive_chars(struct uart_sunsab_port *up, | |||
245 | return tty; | 245 | return tty; |
246 | } | 246 | } |
247 | 247 | ||
248 | static void sunsab_stop_tx(struct uart_port *, unsigned int); | 248 | static void sunsab_stop_tx(struct uart_port *); |
249 | static void sunsab_tx_idle(struct uart_sunsab_port *); | 249 | static void sunsab_tx_idle(struct uart_sunsab_port *); |
250 | 250 | ||
251 | static void transmit_chars(struct uart_sunsab_port *up, | 251 | static void transmit_chars(struct uart_sunsab_port *up, |
@@ -301,7 +301,7 @@ static void transmit_chars(struct uart_sunsab_port *up, | |||
301 | uart_write_wakeup(&up->port); | 301 | uart_write_wakeup(&up->port); |
302 | 302 | ||
303 | if (uart_circ_empty(xmit)) | 303 | if (uart_circ_empty(xmit)) |
304 | sunsab_stop_tx(&up->port, 0); | 304 | sunsab_stop_tx(&up->port); |
305 | } | 305 | } |
306 | 306 | ||
307 | static void check_status(struct uart_sunsab_port *up, | 307 | static void check_status(struct uart_sunsab_port *up, |
@@ -448,7 +448,7 @@ static unsigned int sunsab_get_mctrl(struct uart_port *port) | |||
448 | } | 448 | } |
449 | 449 | ||
450 | /* port->lock held by caller. */ | 450 | /* port->lock held by caller. */ |
451 | static void sunsab_stop_tx(struct uart_port *port, unsigned int tty_stop) | 451 | static void sunsab_stop_tx(struct uart_port *port) |
452 | { | 452 | { |
453 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; | 453 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
454 | 454 | ||
@@ -476,7 +476,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *up) | |||
476 | } | 476 | } |
477 | 477 | ||
478 | /* port->lock held by caller. */ | 478 | /* port->lock held by caller. */ |
479 | static void sunsab_start_tx(struct uart_port *port, unsigned int tty_start) | 479 | static void sunsab_start_tx(struct uart_port *port) |
480 | { | 480 | { |
481 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; | 481 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
482 | struct circ_buf *xmit = &up->port.info->xmit; | 482 | struct circ_buf *xmit = &up->port.info->xmit; |
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index d57a3553aea3..0cc879eb1c02 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c | |||
@@ -255,21 +255,27 @@ static void disable_rsa(struct uart_sunsu_port *up) | |||
255 | } | 255 | } |
256 | #endif /* CONFIG_SERIAL_8250_RSA */ | 256 | #endif /* CONFIG_SERIAL_8250_RSA */ |
257 | 257 | ||
258 | static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop) | 258 | static inline void __stop_tx(struct uart_sunsu_port *p) |
259 | { | ||
260 | if (p->ier & UART_IER_THRI) { | ||
261 | p->ier &= ~UART_IER_THRI; | ||
262 | serial_out(p, UART_IER, p->ier); | ||
263 | } | ||
264 | } | ||
265 | |||
266 | static void sunsu_stop_tx(struct uart_port *port) | ||
259 | { | 267 | { |
260 | struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; | 268 | struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; |
261 | 269 | ||
262 | if (up->ier & UART_IER_THRI) { | 270 | __stop_tx(up); |
263 | up->ier &= ~UART_IER_THRI; | 271 | |
264 | serial_out(up, UART_IER, up->ier); | 272 | if (up->port.type == PORT_16C950 && tty_stop /*FIXME*/) { |
265 | } | ||
266 | if (up->port.type == PORT_16C950 && tty_stop) { | ||
267 | up->acr |= UART_ACR_TXDIS; | 273 | up->acr |= UART_ACR_TXDIS; |
268 | serial_icr_write(up, UART_ACR, up->acr); | 274 | serial_icr_write(up, UART_ACR, up->acr); |
269 | } | 275 | } |
270 | } | 276 | } |
271 | 277 | ||
272 | static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start) | 278 | static void sunsu_start_tx(struct uart_port *port) |
273 | { | 279 | { |
274 | struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; | 280 | struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; |
275 | 281 | ||
@@ -280,7 +286,7 @@ static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start) | |||
280 | /* | 286 | /* |
281 | * We only do this from uart_start | 287 | * We only do this from uart_start |
282 | */ | 288 | */ |
283 | if (tty_start && up->port.type == PORT_16C950) { | 289 | if (tty_start && up->port.type == PORT_16C950 /*FIXME*/) { |
284 | up->acr &= ~UART_ACR_TXDIS; | 290 | up->acr &= ~UART_ACR_TXDIS; |
285 | serial_icr_write(up, UART_ACR, up->acr); | 291 | serial_icr_write(up, UART_ACR, up->acr); |
286 | } | 292 | } |
@@ -413,8 +419,12 @@ static _INLINE_ void transmit_chars(struct uart_sunsu_port *up) | |||
413 | up->port.x_char = 0; | 419 | up->port.x_char = 0; |
414 | return; | 420 | return; |
415 | } | 421 | } |
416 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | 422 | if (uart_tx_stopped(&up->port)) { |
417 | sunsu_stop_tx(&up->port, 0); | 423 | sunsu_stop_tx(&up->port); |
424 | return; | ||
425 | } | ||
426 | if (uart_circ_empty(xmit)) { | ||
427 | __stop_tx(up); | ||
418 | return; | 428 | return; |
419 | } | 429 | } |
420 | 430 | ||
@@ -431,7 +441,7 @@ static _INLINE_ void transmit_chars(struct uart_sunsu_port *up) | |||
431 | uart_write_wakeup(&up->port); | 441 | uart_write_wakeup(&up->port); |
432 | 442 | ||
433 | if (uart_circ_empty(xmit)) | 443 | if (uart_circ_empty(xmit)) |
434 | sunsu_stop_tx(&up->port, 0); | 444 | __stop_tx(up); |
435 | } | 445 | } |
436 | 446 | ||
437 | static _INLINE_ void check_modem_status(struct uart_sunsu_port *up) | 447 | static _INLINE_ void check_modem_status(struct uart_sunsu_port *up) |
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c index bff42a7b89d0..d75445738c88 100644 --- a/drivers/serial/sunzilog.c +++ b/drivers/serial/sunzilog.c | |||
@@ -684,7 +684,7 @@ static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
684 | } | 684 | } |
685 | 685 | ||
686 | /* The port lock is held and interrupts are disabled. */ | 686 | /* The port lock is held and interrupts are disabled. */ |
687 | static void sunzilog_stop_tx(struct uart_port *port, unsigned int tty_stop) | 687 | static void sunzilog_stop_tx(struct uart_port *port) |
688 | { | 688 | { |
689 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | 689 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
690 | 690 | ||
@@ -692,7 +692,7 @@ static void sunzilog_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
692 | } | 692 | } |
693 | 693 | ||
694 | /* The port lock is held and interrupts are disabled. */ | 694 | /* The port lock is held and interrupts are disabled. */ |
695 | static void sunzilog_start_tx(struct uart_port *port, unsigned int tty_start) | 695 | static void sunzilog_start_tx(struct uart_port *port) |
696 | { | 696 | { |
697 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | 697 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; |
698 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | 698 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); |
diff --git a/drivers/serial/uart00.c b/drivers/serial/uart00.c index 186f1300cead..47b504ff38b2 100644 --- a/drivers/serial/uart00.c +++ b/drivers/serial/uart00.c | |||
@@ -87,7 +87,7 @@ | |||
87 | #define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15) | 87 | #define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15) |
88 | //#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0) | 88 | //#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0) |
89 | 89 | ||
90 | static void uart00_stop_tx(struct uart_port *port, unsigned int tty_stop) | 90 | static void uart00_stop_tx(struct uart_port *port) |
91 | { | 91 | { |
92 | UART_PUT_IEC(port, UART_IEC_TIE_MSK); | 92 | UART_PUT_IEC(port, UART_IEC_TIE_MSK); |
93 | } | 93 | } |
@@ -199,7 +199,7 @@ static void uart00_tx_chars(struct uart_port *port) | |||
199 | return; | 199 | return; |
200 | } | 200 | } |
201 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 201 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
202 | uart00_stop_tx(port, 0); | 202 | uart00_stop_tx(port); |
203 | return; | 203 | return; |
204 | } | 204 | } |
205 | 205 | ||
@@ -218,10 +218,10 @@ static void uart00_tx_chars(struct uart_port *port) | |||
218 | uart_write_wakeup(port); | 218 | uart_write_wakeup(port); |
219 | 219 | ||
220 | if (uart_circ_empty(xmit)) | 220 | if (uart_circ_empty(xmit)) |
221 | uart00_stop_tx(port, 0); | 221 | uart00_stop_tx(port); |
222 | } | 222 | } |
223 | 223 | ||
224 | static void uart00_start_tx(struct uart_port *port, unsigned int tty_start) | 224 | static void uart00_start_tx(struct uart_port *port) |
225 | { | 225 | { |
226 | UART_PUT_IES(port, UART_IES_TIE_MSK); | 226 | UART_PUT_IES(port, UART_IES_TIE_MSK); |
227 | uart00_tx_chars(port); | 227 | uart00_tx_chars(port); |
diff --git a/drivers/serial/v850e_uart.c b/drivers/serial/v850e_uart.c index bb482780a41d..9378895a8d56 100644 --- a/drivers/serial/v850e_uart.c +++ b/drivers/serial/v850e_uart.c | |||
@@ -240,7 +240,7 @@ console_initcall(v850e_uart_console_init); | |||
240 | 240 | ||
241 | /* TX/RX interrupt handlers. */ | 241 | /* TX/RX interrupt handlers. */ |
242 | 242 | ||
243 | static void v850e_uart_stop_tx (struct uart_port *port, unsigned tty_stop); | 243 | static void v850e_uart_stop_tx (struct uart_port *port); |
244 | 244 | ||
245 | void v850e_uart_tx (struct uart_port *port) | 245 | void v850e_uart_tx (struct uart_port *port) |
246 | { | 246 | { |
@@ -339,14 +339,14 @@ static unsigned v850e_uart_get_mctrl (struct uart_port *port) | |||
339 | return mctrl; | 339 | return mctrl; |
340 | } | 340 | } |
341 | 341 | ||
342 | static void v850e_uart_start_tx (struct uart_port *port, unsigned tty_start) | 342 | static void v850e_uart_start_tx (struct uart_port *port) |
343 | { | 343 | { |
344 | v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); | 344 | v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); |
345 | v850e_uart_tx (port); | 345 | v850e_uart_tx (port); |
346 | v850e_intc_enable_irq (V850E_UART_TX_IRQ (port->line)); | 346 | v850e_intc_enable_irq (V850E_UART_TX_IRQ (port->line)); |
347 | } | 347 | } |
348 | 348 | ||
349 | static void v850e_uart_stop_tx (struct uart_port *port, unsigned tty_stop) | 349 | static void v850e_uart_stop_tx (struct uart_port *port) |
350 | { | 350 | { |
351 | v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); | 351 | v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); |
352 | } | 352 | } |
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index 1f985327b0d4..0c5d65a08f6e 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c | |||
@@ -284,7 +284,7 @@ static unsigned int siu_get_mctrl(struct uart_port *port) | |||
284 | return mctrl; | 284 | return mctrl; |
285 | } | 285 | } |
286 | 286 | ||
287 | static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop) | 287 | static void siu_stop_tx(struct uart_port *port) |
288 | { | 288 | { |
289 | unsigned long flags; | 289 | unsigned long flags; |
290 | uint8_t ier; | 290 | uint8_t ier; |
@@ -298,7 +298,7 @@ static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop) | |||
298 | spin_unlock_irqrestore(&port->lock, flags); | 298 | spin_unlock_irqrestore(&port->lock, flags); |
299 | } | 299 | } |
300 | 300 | ||
301 | static void siu_start_tx(struct uart_port *port, unsigned int tty_start) | 301 | static void siu_start_tx(struct uart_port *port) |
302 | { | 302 | { |
303 | unsigned long flags; | 303 | unsigned long flags; |
304 | uint8_t ier; | 304 | uint8_t ier; |
@@ -458,7 +458,7 @@ static inline void transmit_chars(struct uart_port *port) | |||
458 | } | 458 | } |
459 | 459 | ||
460 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 460 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
461 | siu_stop_tx(port, 0); | 461 | siu_stop_tx(port); |
462 | return; | 462 | return; |
463 | } | 463 | } |
464 | 464 | ||
@@ -474,7 +474,7 @@ static inline void transmit_chars(struct uart_port *port) | |||
474 | uart_write_wakeup(port); | 474 | uart_write_wakeup(port); |
475 | 475 | ||
476 | if (uart_circ_empty(xmit)) | 476 | if (uart_circ_empty(xmit)) |
477 | siu_stop_tx(port, 0); | 477 | siu_stop_tx(port); |
478 | } | 478 | } |
479 | 479 | ||
480 | static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 480 | static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c index c8998dc66882..7974efa107bc 100644 --- a/fs/binfmt_flat.c +++ b/fs/binfmt_flat.c | |||
@@ -520,7 +520,7 @@ static int load_flat_file(struct linux_binprm * bprm, | |||
520 | DBG_FLT("BINFMT_FLAT: ROM mapping of file (we hope)\n"); | 520 | DBG_FLT("BINFMT_FLAT: ROM mapping of file (we hope)\n"); |
521 | 521 | ||
522 | down_write(¤t->mm->mmap_sem); | 522 | down_write(¤t->mm->mmap_sem); |
523 | textpos = do_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, MAP_SHARED, 0); | 523 | textpos = do_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, MAP_PRIVATE, 0); |
524 | up_write(¤t->mm->mmap_sem); | 524 | up_write(¤t->mm->mmap_sem); |
525 | if (!textpos || textpos >= (unsigned long) -4096) { | 525 | if (!textpos || textpos >= (unsigned long) -4096) { |
526 | if (!textpos) | 526 | if (!textpos) |
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index 7495026e2c18..e350dcb544e8 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h | |||
@@ -383,39 +383,45 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count) | |||
383 | *vaddr++ = inl(io_addr); | 383 | *vaddr++ = inl(io_addr); |
384 | } | 384 | } |
385 | 385 | ||
386 | #define __is_io_address(p) (((unsigned long)p >= 0x0) && \ | 386 | #define PIO_OFFSET 0x10000UL |
387 | ((unsigned long)p <= 0x0000ffff)) | 387 | #define PIO_MASK 0x0ffffUL |
388 | |||
389 | #define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ | ||
390 | ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) | ||
388 | static inline unsigned int | 391 | static inline unsigned int |
389 | __ixp4xx_ioread8(void __iomem *port) | 392 | __ixp4xx_ioread8(void __iomem *addr) |
390 | { | 393 | { |
394 | unsigned long port = (unsigned long __force)addr; | ||
391 | if (__is_io_address(port)) | 395 | if (__is_io_address(port)) |
392 | return (unsigned int)__ixp4xx_inb((unsigned int)port); | 396 | return (unsigned int)__ixp4xx_inb(port & PIO_MASK); |
393 | else | 397 | else |
394 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 398 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
395 | return (unsigned int)__raw_readb((u32)port); | 399 | return (unsigned int)__raw_readb(port); |
396 | #else | 400 | #else |
397 | return (unsigned int)__ixp4xx_readb((u32)port); | 401 | return (unsigned int)__ixp4xx_readb(port); |
398 | #endif | 402 | #endif |
399 | } | 403 | } |
400 | 404 | ||
401 | static inline void | 405 | static inline void |
402 | __ixp4xx_ioread8_rep(u32 port, u8 *vaddr, u32 count) | 406 | __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) |
403 | { | 407 | { |
408 | unsigned long port = (unsigned long __force)addr; | ||
404 | if (__is_io_address(port)) | 409 | if (__is_io_address(port)) |
405 | __ixp4xx_insb(port, vaddr, count); | 410 | __ixp4xx_insb(port & PIO_MASK, vaddr, count); |
406 | else | 411 | else |
407 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 412 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
408 | __raw_readsb((void __iomem *)port, vaddr, count); | 413 | __raw_readsb(addr, vaddr, count); |
409 | #else | 414 | #else |
410 | __ixp4xx_readsb(port, vaddr, count); | 415 | __ixp4xx_readsb(port, vaddr, count); |
411 | #endif | 416 | #endif |
412 | } | 417 | } |
413 | 418 | ||
414 | static inline unsigned int | 419 | static inline unsigned int |
415 | __ixp4xx_ioread16(void __iomem *port) | 420 | __ixp4xx_ioread16(void __iomem *addr) |
416 | { | 421 | { |
422 | unsigned long port = (unsigned long __force)addr; | ||
417 | if (__is_io_address(port)) | 423 | if (__is_io_address(port)) |
418 | return (unsigned int)__ixp4xx_inw((unsigned int)port); | 424 | return (unsigned int)__ixp4xx_inw(port & PIO_MASK); |
419 | else | 425 | else |
420 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 426 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
421 | return le16_to_cpu(__raw_readw((u32)port)); | 427 | return le16_to_cpu(__raw_readw((u32)port)); |
@@ -425,23 +431,25 @@ __ixp4xx_ioread16(void __iomem *port) | |||
425 | } | 431 | } |
426 | 432 | ||
427 | static inline void | 433 | static inline void |
428 | __ixp4xx_ioread16_rep(u32 port, u16 *vaddr, u32 count) | 434 | __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) |
429 | { | 435 | { |
436 | unsigned long port = (unsigned long __force)addr; | ||
430 | if (__is_io_address(port)) | 437 | if (__is_io_address(port)) |
431 | __ixp4xx_insw(port, vaddr, count); | 438 | __ixp4xx_insw(port & PIO_MASK, vaddr, count); |
432 | else | 439 | else |
433 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 440 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
434 | __raw_readsw((void __iomem *)port, vaddr, count); | 441 | __raw_readsw(addr, vaddr, count); |
435 | #else | 442 | #else |
436 | __ixp4xx_readsw(port, vaddr, count); | 443 | __ixp4xx_readsw(port, vaddr, count); |
437 | #endif | 444 | #endif |
438 | } | 445 | } |
439 | 446 | ||
440 | static inline unsigned int | 447 | static inline unsigned int |
441 | __ixp4xx_ioread32(void __iomem *port) | 448 | __ixp4xx_ioread32(void __iomem *addr) |
442 | { | 449 | { |
450 | unsigned long port = (unsigned long __force)addr; | ||
443 | if (__is_io_address(port)) | 451 | if (__is_io_address(port)) |
444 | return (unsigned int)__ixp4xx_inl((unsigned int)port); | 452 | return (unsigned int)__ixp4xx_inl(port & PIO_MASK); |
445 | else { | 453 | else { |
446 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 454 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
447 | return le32_to_cpu(__raw_readl((u32)port)); | 455 | return le32_to_cpu(__raw_readl((u32)port)); |
@@ -452,90 +460,100 @@ __ixp4xx_ioread32(void __iomem *port) | |||
452 | } | 460 | } |
453 | 461 | ||
454 | static inline void | 462 | static inline void |
455 | __ixp4xx_ioread32_rep(u32 port, u32 *vaddr, u32 count) | 463 | __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) |
456 | { | 464 | { |
465 | unsigned long port = (unsigned long __force)addr; | ||
457 | if (__is_io_address(port)) | 466 | if (__is_io_address(port)) |
458 | __ixp4xx_insl(port, vaddr, count); | 467 | __ixp4xx_insl(port & PIO_MASK, vaddr, count); |
459 | else | 468 | else |
460 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 469 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
461 | __raw_readsl((void __iomem *)port, vaddr, count); | 470 | __raw_readsl(addr, vaddr, count); |
462 | #else | 471 | #else |
463 | __ixp4xx_readsl(port, vaddr, count); | 472 | __ixp4xx_readsl(port, vaddr, count); |
464 | #endif | 473 | #endif |
465 | } | 474 | } |
466 | 475 | ||
467 | static inline void | 476 | static inline void |
468 | __ixp4xx_iowrite8(u8 value, void __iomem *port) | 477 | __ixp4xx_iowrite8(u8 value, void __iomem *addr) |
469 | { | 478 | { |
479 | unsigned long port = (unsigned long __force)addr; | ||
470 | if (__is_io_address(port)) | 480 | if (__is_io_address(port)) |
471 | __ixp4xx_outb(value, (unsigned int)port); | 481 | __ixp4xx_outb(value, port & PIO_MASK); |
472 | else | 482 | else |
473 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 483 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
474 | __raw_writeb(value, (u32)port); | 484 | __raw_writeb(value, port); |
475 | #else | 485 | #else |
476 | __ixp4xx_writeb(value, (u32)port); | 486 | __ixp4xx_writeb(value, port); |
477 | #endif | 487 | #endif |
478 | } | 488 | } |
479 | 489 | ||
480 | static inline void | 490 | static inline void |
481 | __ixp4xx_iowrite8_rep(u32 port, u8 *vaddr, u32 count) | 491 | __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count) |
482 | { | 492 | { |
493 | unsigned long port = (unsigned long __force)addr; | ||
483 | if (__is_io_address(port)) | 494 | if (__is_io_address(port)) |
484 | __ixp4xx_outsb(port, vaddr, count); | 495 | __ixp4xx_outsb(port & PIO_MASK, vaddr, count); |
496 | else | ||
485 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 497 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
486 | __raw_writesb((void __iomem *)port, vaddr, count); | 498 | __raw_writesb(addr, vaddr, count); |
487 | #else | 499 | #else |
488 | __ixp4xx_writesb(port, vaddr, count); | 500 | __ixp4xx_writesb(port, vaddr, count); |
489 | #endif | 501 | #endif |
490 | } | 502 | } |
491 | 503 | ||
492 | static inline void | 504 | static inline void |
493 | __ixp4xx_iowrite16(u16 value, void __iomem *port) | 505 | __ixp4xx_iowrite16(u16 value, void __iomem *addr) |
494 | { | 506 | { |
507 | unsigned long port = (unsigned long __force)addr; | ||
495 | if (__is_io_address(port)) | 508 | if (__is_io_address(port)) |
496 | __ixp4xx_outw(value, (unsigned int)port); | 509 | __ixp4xx_outw(value, port & PIO_MASK); |
497 | else | 510 | else |
498 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 511 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
499 | __raw_writew(cpu_to_le16(value), (u32)port); | 512 | __raw_writew(cpu_to_le16(value), addr); |
500 | #else | 513 | #else |
501 | __ixp4xx_writew(value, (u32)port); | 514 | __ixp4xx_writew(value, port); |
502 | #endif | 515 | #endif |
503 | } | 516 | } |
504 | 517 | ||
505 | static inline void | 518 | static inline void |
506 | __ixp4xx_iowrite16_rep(u32 port, u16 *vaddr, u32 count) | 519 | __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count) |
507 | { | 520 | { |
521 | unsigned long port = (unsigned long __force)addr; | ||
508 | if (__is_io_address(port)) | 522 | if (__is_io_address(port)) |
509 | __ixp4xx_outsw(port, vaddr, count); | 523 | __ixp4xx_outsw(port & PIO_MASK, vaddr, count); |
524 | else | ||
510 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 525 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
511 | __raw_readsw((void __iomem *)port, vaddr, count); | 526 | __raw_writesw(addr, vaddr, count); |
512 | #else | 527 | #else |
513 | __ixp4xx_writesw(port, vaddr, count); | 528 | __ixp4xx_writesw(port, vaddr, count); |
514 | #endif | 529 | #endif |
515 | } | 530 | } |
516 | 531 | ||
517 | static inline void | 532 | static inline void |
518 | __ixp4xx_iowrite32(u32 value, void __iomem *port) | 533 | __ixp4xx_iowrite32(u32 value, void __iomem *addr) |
519 | { | 534 | { |
535 | unsigned long port = (unsigned long __force)addr; | ||
520 | if (__is_io_address(port)) | 536 | if (__is_io_address(port)) |
521 | __ixp4xx_outl(value, (unsigned int)port); | 537 | __ixp4xx_outl(value, port & PIO_MASK); |
522 | else | 538 | else |
523 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 539 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
524 | __raw_writel(cpu_to_le32(value), (u32)port); | 540 | __raw_writel(cpu_to_le32(value), port); |
525 | #else | 541 | #else |
526 | __ixp4xx_writel(value, (u32)port); | 542 | __ixp4xx_writel(value, port); |
527 | #endif | 543 | #endif |
528 | } | 544 | } |
529 | 545 | ||
530 | static inline void | 546 | static inline void |
531 | __ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count) | 547 | __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count) |
532 | { | 548 | { |
549 | unsigned long port = (unsigned long __force)addr; | ||
533 | if (__is_io_address(port)) | 550 | if (__is_io_address(port)) |
534 | __ixp4xx_outsl(port, vaddr, count); | 551 | __ixp4xx_outsl(port & PIO_MASK, vaddr, count); |
552 | else | ||
535 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 553 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
536 | __raw_readsl((void __iomem *)port, vaddr, count); | 554 | __raw_writesl(addr, vaddr, count); |
537 | #else | 555 | #else |
538 | __ixp4xx_outsl(port, vaddr, count); | 556 | __ixp4xx_writesl(port, vaddr, count); |
539 | #endif | 557 | #endif |
540 | } | 558 | } |
541 | 559 | ||
@@ -555,7 +573,7 @@ __ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count) | |||
555 | #define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c) | 573 | #define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c) |
556 | #define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c) | 574 | #define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c) |
557 | 575 | ||
558 | #define ioport_map(port, nr) ((void __iomem*)port) | 576 | #define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET)) |
559 | #define ioport_unmap(addr) | 577 | #define ioport_unmap(addr) |
560 | 578 | ||
561 | #endif // __ASM_ARM_ARCH_IO_H | 579 | #endif // __ASM_ARM_ARCH_IO_H |
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index 3a626c03ea26..d13ee7f78c70 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h | |||
@@ -83,17 +83,6 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); | |||
83 | #define IXP4XX_GPIO_OUT 0x1 | 83 | #define IXP4XX_GPIO_OUT 0x1 |
84 | #define IXP4XX_GPIO_IN 0x2 | 84 | #define IXP4XX_GPIO_IN 0x2 |
85 | 85 | ||
86 | #define IXP4XX_GPIO_INTSTYLE_MASK 0x7C /* Bits [6:2] define interrupt style */ | ||
87 | |||
88 | /* | ||
89 | * GPIO interrupt types. | ||
90 | */ | ||
91 | #define IXP4XX_GPIO_ACTIVE_HIGH 0x4 /* Default */ | ||
92 | #define IXP4XX_GPIO_ACTIVE_LOW 0x8 | ||
93 | #define IXP4XX_GPIO_RISING_EDGE 0x10 | ||
94 | #define IXP4XX_GPIO_FALLING_EDGE 0x20 | ||
95 | #define IXP4XX_GPIO_TRANSITIONAL 0x40 | ||
96 | |||
97 | /* GPIO signal types */ | 86 | /* GPIO signal types */ |
98 | #define IXP4XX_GPIO_LOW 0 | 87 | #define IXP4XX_GPIO_LOW 0 |
99 | #define IXP4XX_GPIO_HIGH 1 | 88 | #define IXP4XX_GPIO_HIGH 1 |
@@ -102,7 +91,13 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); | |||
102 | #define IXP4XX_GPIO_CLK_0 14 | 91 | #define IXP4XX_GPIO_CLK_0 14 |
103 | #define IXP4XX_GPIO_CLK_1 15 | 92 | #define IXP4XX_GPIO_CLK_1 15 |
104 | 93 | ||
105 | extern void gpio_line_config(u8 line, u32 style); | 94 | static inline void gpio_line_config(u8 line, u32 direction) |
95 | { | ||
96 | if (direction == IXP4XX_GPIO_OUT) | ||
97 | *IXP4XX_GPIO_GPOER |= (1 << line); | ||
98 | else | ||
99 | *IXP4XX_GPIO_GPOER &= ~(1 << line); | ||
100 | } | ||
106 | 101 | ||
107 | static inline void gpio_line_get(u8 line, int *value) | 102 | static inline void gpio_line_get(u8 line, int *value) |
108 | { | 103 | { |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 51f0fe0ac165..939d9e5020a0 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -818,6 +818,23 @@ | |||
818 | #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge | 818 | #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge |
819 | Interrupt Enable */ | 819 | Interrupt Enable */ |
820 | 820 | ||
821 | #define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */ | ||
822 | |||
823 | #define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */ | ||
824 | #define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */ | ||
825 | #define UP2OCR_DPPDE (1 << 2) /* Host Port 2 Transceiver D+ Pull Down Enable */ | ||
826 | #define UP2OCR_DMPDE (1 << 3) /* Host Port 2 Transceiver D- Pull Down Enable */ | ||
827 | #define UP2OCR_DPPUE (1 << 4) /* Host Port 2 Transceiver D+ Pull Up Enable */ | ||
828 | #define UP2OCR_DMPUE (1 << 5) /* Host Port 2 Transceiver D- Pull Up Enable */ | ||
829 | #define UP2OCR_DPPUBE (1 << 6) /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */ | ||
830 | #define UP2OCR_DMPUBE (1 << 7) /* Host Port 2 Transceiver D- Pull Up Bypass Enable */ | ||
831 | #define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */ | ||
832 | #define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */ | ||
833 | #define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ | ||
834 | #define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ | ||
835 | #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ | ||
836 | #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ | ||
837 | |||
821 | #define UDCCSN(x) __REG2(0x40600100, (x) << 2) | 838 | #define UDCCSN(x) __REG2(0x40600100, (x) << 2) |
822 | #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ | 839 | #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ |
823 | #define UDCCSR0_SA (1 << 7) /* Setup Active */ | 840 | #define UDCCSR0_SA (1 << 7) /* Setup Active */ |
@@ -1423,6 +1440,7 @@ | |||
1423 | #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) | 1440 | #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) |
1424 | #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) | 1441 | #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) |
1425 | #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) | 1442 | #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) |
1443 | #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) | ||
1426 | #define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) | 1444 | #define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) |
1427 | #define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) | 1445 | #define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) |
1428 | #define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) | 1446 | #define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) |
@@ -1510,6 +1528,8 @@ | |||
1510 | #define PSSR_BFS (1 << 1) /* Battery Fault Status */ | 1528 | #define PSSR_BFS (1 << 1) /* Battery Fault Status */ |
1511 | #define PSSR_SSS (1 << 0) /* Software Sleep Status */ | 1529 | #define PSSR_SSS (1 << 0) /* Software Sleep Status */ |
1512 | 1530 | ||
1531 | #define PSLR_SL_ROD (1 << 20) /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */ | ||
1532 | |||
1513 | #define PCFR_RO (1 << 15) /* RDH Override */ | 1533 | #define PCFR_RO (1 << 15) /* RDH Override */ |
1514 | #define PCFR_PO (1 << 14) /* PH Override */ | 1534 | #define PCFR_PO (1 << 14) /* PH Override */ |
1515 | #define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ | 1535 | #define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ |
@@ -1517,6 +1537,7 @@ | |||
1517 | #define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ | 1537 | #define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ |
1518 | #define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ | 1538 | #define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ |
1519 | #define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ | 1539 | #define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ |
1540 | #define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */ | ||
1520 | #define PCFR_DS (1 << 3) /* Deep Sleep Mode */ | 1541 | #define PCFR_DS (1 << 3) /* Deep Sleep Mode */ |
1521 | #define PCFR_FS (1 << 2) /* Float Static Chip Selects */ | 1542 | #define PCFR_FS (1 << 2) /* Float Static Chip Selects */ |
1522 | #define PCFR_FP (1 << 1) /* Float PCMCIA controls */ | 1543 | #define PCFR_FP (1 << 1) /* Float PCMCIA controls */ |
@@ -1810,6 +1831,11 @@ | |||
1810 | #define LCCR0_PDD_S 12 | 1831 | #define LCCR0_PDD_S 12 |
1811 | #define LCCR0_BM (1 << 20) /* Branch mask */ | 1832 | #define LCCR0_BM (1 << 20) /* Branch mask */ |
1812 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ | 1833 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ |
1834 | #define LCCR0_LCDT (1 << 22) /* LCD panel type */ | ||
1835 | #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ | ||
1836 | #define LCCR0_CMDIM (1 << 24) /* Command interrupt mask */ | ||
1837 | #define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */ | ||
1838 | #define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */ | ||
1813 | 1839 | ||
1814 | #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ | 1840 | #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ |
1815 | #define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ | 1841 | #define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ |
@@ -2062,7 +2088,10 @@ | |||
2062 | #define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ | 2088 | #define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ |
2063 | #define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ | 2089 | #define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ |
2064 | #define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ | 2090 | #define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ |
2091 | |||
2065 | #define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ | 2092 | #define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ |
2093 | #define UHCRHDA_NOCP (1 << 12) /* No over current protection */ | ||
2094 | |||
2066 | #define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ | 2095 | #define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ |
2067 | #define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ | 2096 | #define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ |
2068 | #define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ | 2097 | #define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ |
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index e5e938b79acc..16f4c3cc1388 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/include/asm/arch-s3c2410/regs-clock.h | 1 | /* linux/include/asm/arch-s3c2410/regs-clock.h |
2 | * | 2 | * |
3 | * Copyright (c) 2003,2004 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2003,2004,2005 Simtec Electronics <linux@simtec.co.uk> |
4 | * http://www.simtec.co.uk/products/SWLINUX/ | 4 | * http://armlinux.simtec.co.uk/ |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -17,6 +17,7 @@ | |||
17 | * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion | 17 | * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion |
18 | * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) | 18 | * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) |
19 | * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA | 19 | * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA |
20 | * 27-Aug-2005 Ben Dooks Add clock-slow info | ||
20 | */ | 21 | */ |
21 | 22 | ||
22 | #ifndef __ASM_ARM_REGS_CLOCK | 23 | #ifndef __ASM_ARM_REGS_CLOCK |
@@ -74,6 +75,12 @@ | |||
74 | #define S3C2410_CLKDIVN_PDIVN (1<<0) | 75 | #define S3C2410_CLKDIVN_PDIVN (1<<0) |
75 | #define S3C2410_CLKDIVN_HDIVN (1<<1) | 76 | #define S3C2410_CLKDIVN_HDIVN (1<<1) |
76 | 77 | ||
78 | #define S3C2410_CLKSLOW_UCLK_OFF (1<<7) | ||
79 | #define S3C2410_CLKSLOW_MPLL_OFF (1<<5) | ||
80 | #define S3C2410_CLKSLOW_SLOW (1<<4) | ||
81 | #define S3C2410_CLKSLOW_SLOWVAL(x) (x) | ||
82 | #define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) | ||
83 | |||
77 | #ifndef __ASSEMBLY__ | 84 | #ifndef __ASSEMBLY__ |
78 | 85 | ||
79 | static inline unsigned int | 86 | static inline unsigned int |
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index abb36e54c966..278de61224d1 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h | |||
@@ -295,7 +295,7 @@ | |||
295 | #define __NR_fstatfs64 (__NR_SYSCALL_BASE+267) | 295 | #define __NR_fstatfs64 (__NR_SYSCALL_BASE+267) |
296 | #define __NR_tgkill (__NR_SYSCALL_BASE+268) | 296 | #define __NR_tgkill (__NR_SYSCALL_BASE+268) |
297 | #define __NR_utimes (__NR_SYSCALL_BASE+269) | 297 | #define __NR_utimes (__NR_SYSCALL_BASE+269) |
298 | #define __NR_fadvise64_64 (__NR_SYSCALL_BASE+270) | 298 | #define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270) |
299 | #define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271) | 299 | #define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271) |
300 | #define __NR_pciconfig_read (__NR_SYSCALL_BASE+272) | 300 | #define __NR_pciconfig_read (__NR_SYSCALL_BASE+272) |
301 | #define __NR_pciconfig_write (__NR_SYSCALL_BASE+273) | 301 | #define __NR_pciconfig_write (__NR_SYSCALL_BASE+273) |
@@ -515,7 +515,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 | |||
515 | #define __ARCH_WANT_SYS_TIME | 515 | #define __ARCH_WANT_SYS_TIME |
516 | #define __ARCH_WANT_SYS_UTIME | 516 | #define __ARCH_WANT_SYS_UTIME |
517 | #define __ARCH_WANT_SYS_SOCKETCALL | 517 | #define __ARCH_WANT_SYS_SOCKETCALL |
518 | #define __ARCH_WANT_SYS_FADVISE64 | ||
519 | #define __ARCH_WANT_SYS_GETPGRP | 518 | #define __ARCH_WANT_SYS_GETPGRP |
520 | #define __ARCH_WANT_SYS_LLSEEK | 519 | #define __ARCH_WANT_SYS_LLSEEK |
521 | #define __ARCH_WANT_SYS_NICE | 520 | #define __ARCH_WANT_SYS_NICE |
diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h index 4c06d455139c..3a544ffc5008 100644 --- a/include/asm-ia64/acpi.h +++ b/include/asm-ia64/acpi.h | |||
@@ -116,6 +116,11 @@ extern int __initdata nid_to_pxm_map[MAX_NUMNODES]; | |||
116 | 116 | ||
117 | extern u16 ia64_acpiid_to_sapicid[]; | 117 | extern u16 ia64_acpiid_to_sapicid[]; |
118 | 118 | ||
119 | /* | ||
120 | * Refer Intel ACPI _PDC support document for bit definitions | ||
121 | */ | ||
122 | #define ACPI_PDC_EST_CAPABILITY_SMP 0x8 | ||
123 | |||
119 | #endif /*__KERNEL__*/ | 124 | #endif /*__KERNEL__*/ |
120 | 125 | ||
121 | #endif /*_ASM_ACPI_H*/ | 126 | #endif /*_ASM_ACPI_H*/ |
diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h index c9f8d835d0cc..cee16ea1780a 100644 --- a/include/asm-ia64/fcntl.h +++ b/include/asm-ia64/fcntl.h | |||
@@ -81,6 +81,7 @@ struct flock { | |||
81 | 81 | ||
82 | #define F_LINUX_SPECIFIC_BASE 1024 | 82 | #define F_LINUX_SPECIFIC_BASE 1024 |
83 | 83 | ||
84 | #define force_o_largefile() ( ! (current->personality & PER_LINUX32) ) | 84 | #define force_o_largefile() \ |
85 | (personality(current->personality) != PER_LINUX32) | ||
85 | 86 | ||
86 | #endif /* _ASM_IA64_FCNTL_H */ | 87 | #endif /* _ASM_IA64_FCNTL_H */ |
diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h index 54e7637a326c..cf772a67f858 100644 --- a/include/asm-ia64/io.h +++ b/include/asm-ia64/io.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #define __SLOW_DOWN_IO do { } while (0) | 23 | #define __SLOW_DOWN_IO do { } while (0) |
24 | #define SLOW_DOWN_IO do { } while (0) | 24 | #define SLOW_DOWN_IO do { } while (0) |
25 | 25 | ||
26 | #define __IA64_UNCACHED_OFFSET 0xc000000000000000UL /* region 6 */ | 26 | #define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) |
27 | 27 | ||
28 | /* | 28 | /* |
29 | * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but | 29 | * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but |
@@ -41,7 +41,7 @@ | |||
41 | #define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) | 41 | #define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) |
42 | #define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) | 42 | #define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) |
43 | 43 | ||
44 | #define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | (p & 0xfff)) | 44 | #define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff)) |
45 | 45 | ||
46 | struct io_space { | 46 | struct io_space { |
47 | unsigned long mmio_base; /* base in MMIO space */ | 47 | unsigned long mmio_base; /* base in MMIO space */ |
diff --git a/include/asm-ia64/mmu.h b/include/asm-ia64/mmu.h index ae1525352a25..611432ba579c 100644 --- a/include/asm-ia64/mmu.h +++ b/include/asm-ia64/mmu.h | |||
@@ -2,10 +2,12 @@ | |||
2 | #define __MMU_H | 2 | #define __MMU_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * Type for a context number. We declare it volatile to ensure proper ordering when it's | 5 | * Type for a context number. We declare it volatile to ensure proper |
6 | * accessed outside of spinlock'd critical sections (e.g., as done in activate_mm() and | 6 | * ordering when it's accessed outside of spinlock'd critical sections |
7 | * init_new_context()). | 7 | * (e.g., as done in activate_mm() and init_new_context()). |
8 | */ | 8 | */ |
9 | typedef volatile unsigned long mm_context_t; | 9 | typedef volatile unsigned long mm_context_t; |
10 | 10 | ||
11 | typedef unsigned long nv_mm_context_t; | ||
12 | |||
11 | #endif | 13 | #endif |
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h index e3e5fededb04..8d6e72f7b08e 100644 --- a/include/asm-ia64/mmu_context.h +++ b/include/asm-ia64/mmu_context.h | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) | 20 | #define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) |
21 | 21 | ||
22 | # include <asm/page.h> | ||
22 | # ifndef __ASSEMBLY__ | 23 | # ifndef __ASSEMBLY__ |
23 | 24 | ||
24 | #include <linux/compiler.h> | 25 | #include <linux/compiler.h> |
@@ -55,34 +56,46 @@ static inline void | |||
55 | delayed_tlb_flush (void) | 56 | delayed_tlb_flush (void) |
56 | { | 57 | { |
57 | extern void local_flush_tlb_all (void); | 58 | extern void local_flush_tlb_all (void); |
59 | unsigned long flags; | ||
58 | 60 | ||
59 | if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { | 61 | if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { |
60 | local_flush_tlb_all(); | 62 | spin_lock_irqsave(&ia64_ctx.lock, flags); |
61 | __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; | 63 | { |
64 | if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { | ||
65 | local_flush_tlb_all(); | ||
66 | __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; | ||
67 | } | ||
68 | } | ||
69 | spin_unlock_irqrestore(&ia64_ctx.lock, flags); | ||
62 | } | 70 | } |
63 | } | 71 | } |
64 | 72 | ||
65 | static inline mm_context_t | 73 | static inline nv_mm_context_t |
66 | get_mmu_context (struct mm_struct *mm) | 74 | get_mmu_context (struct mm_struct *mm) |
67 | { | 75 | { |
68 | unsigned long flags; | 76 | unsigned long flags; |
69 | mm_context_t context = mm->context; | 77 | nv_mm_context_t context = mm->context; |
70 | 78 | ||
71 | if (context) | 79 | if (unlikely(!context)) { |
72 | return context; | 80 | spin_lock_irqsave(&ia64_ctx.lock, flags); |
73 | 81 | { | |
74 | spin_lock_irqsave(&ia64_ctx.lock, flags); | 82 | /* re-check, now that we've got the lock: */ |
75 | { | 83 | context = mm->context; |
76 | /* re-check, now that we've got the lock: */ | 84 | if (context == 0) { |
77 | context = mm->context; | 85 | cpus_clear(mm->cpu_vm_mask); |
78 | if (context == 0) { | 86 | if (ia64_ctx.next >= ia64_ctx.limit) |
79 | cpus_clear(mm->cpu_vm_mask); | 87 | wrap_mmu_context(mm); |
80 | if (ia64_ctx.next >= ia64_ctx.limit) | 88 | mm->context = context = ia64_ctx.next++; |
81 | wrap_mmu_context(mm); | 89 | } |
82 | mm->context = context = ia64_ctx.next++; | ||
83 | } | 90 | } |
91 | spin_unlock_irqrestore(&ia64_ctx.lock, flags); | ||
84 | } | 92 | } |
85 | spin_unlock_irqrestore(&ia64_ctx.lock, flags); | 93 | /* |
94 | * Ensure we're not starting to use "context" before any old | ||
95 | * uses of it are gone from our TLB. | ||
96 | */ | ||
97 | delayed_tlb_flush(); | ||
98 | |||
86 | return context; | 99 | return context; |
87 | } | 100 | } |
88 | 101 | ||
@@ -104,13 +117,13 @@ destroy_context (struct mm_struct *mm) | |||
104 | } | 117 | } |
105 | 118 | ||
106 | static inline void | 119 | static inline void |
107 | reload_context (mm_context_t context) | 120 | reload_context (nv_mm_context_t context) |
108 | { | 121 | { |
109 | unsigned long rid; | 122 | unsigned long rid; |
110 | unsigned long rid_incr = 0; | 123 | unsigned long rid_incr = 0; |
111 | unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; | 124 | unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; |
112 | 125 | ||
113 | old_rr4 = ia64_get_rr(0x8000000000000000UL); | 126 | old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE)); |
114 | rid = context << 3; /* make space for encoding the region number */ | 127 | rid = context << 3; /* make space for encoding the region number */ |
115 | rid_incr = 1 << 8; | 128 | rid_incr = 1 << 8; |
116 | 129 | ||
@@ -122,6 +135,10 @@ reload_context (mm_context_t context) | |||
122 | rr4 = rr0 + 4*rid_incr; | 135 | rr4 = rr0 + 4*rid_incr; |
123 | #ifdef CONFIG_HUGETLB_PAGE | 136 | #ifdef CONFIG_HUGETLB_PAGE |
124 | rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); | 137 | rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); |
138 | |||
139 | # if RGN_HPAGE != 4 | ||
140 | # error "reload_context assumes RGN_HPAGE is 4" | ||
141 | # endif | ||
125 | #endif | 142 | #endif |
126 | 143 | ||
127 | ia64_set_rr(0x0000000000000000UL, rr0); | 144 | ia64_set_rr(0x0000000000000000UL, rr0); |
@@ -138,7 +155,7 @@ reload_context (mm_context_t context) | |||
138 | static inline void | 155 | static inline void |
139 | activate_context (struct mm_struct *mm) | 156 | activate_context (struct mm_struct *mm) |
140 | { | 157 | { |
141 | mm_context_t context; | 158 | nv_mm_context_t context; |
142 | 159 | ||
143 | do { | 160 | do { |
144 | context = get_mmu_context(mm); | 161 | context = get_mmu_context(mm); |
@@ -157,8 +174,6 @@ activate_context (struct mm_struct *mm) | |||
157 | static inline void | 174 | static inline void |
158 | activate_mm (struct mm_struct *prev, struct mm_struct *next) | 175 | activate_mm (struct mm_struct *prev, struct mm_struct *next) |
159 | { | 176 | { |
160 | delayed_tlb_flush(); | ||
161 | |||
162 | /* | 177 | /* |
163 | * We may get interrupts here, but that's OK because interrupt handlers cannot | 178 | * We may get interrupts here, but that's OK because interrupt handlers cannot |
164 | * touch user-space. | 179 | * touch user-space. |
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h index 08894f73abf0..9edffad8c28b 100644 --- a/include/asm-ia64/page.h +++ b/include/asm-ia64/page.h | |||
@@ -13,6 +13,19 @@ | |||
13 | #include <asm/types.h> | 13 | #include <asm/types.h> |
14 | 14 | ||
15 | /* | 15 | /* |
16 | * The top three bits of an IA64 address are its Region Number. | ||
17 | * Different regions are assigned to different purposes. | ||
18 | */ | ||
19 | #define RGN_SHIFT (61) | ||
20 | #define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT) | ||
21 | #define RGN_BITS (RGN_BASE(-1)) | ||
22 | |||
23 | #define RGN_KERNEL 7 /* Identity mapped region */ | ||
24 | #define RGN_UNCACHED 6 /* Identity mapped I/O region */ | ||
25 | #define RGN_GATE 5 /* Gate page, Kernel text, etc */ | ||
26 | #define RGN_HPAGE 4 /* For Huge TLB pages */ | ||
27 | |||
28 | /* | ||
16 | * PAGE_SHIFT determines the actual kernel page size. | 29 | * PAGE_SHIFT determines the actual kernel page size. |
17 | */ | 30 | */ |
18 | #if defined(CONFIG_IA64_PAGE_SIZE_4KB) | 31 | #if defined(CONFIG_IA64_PAGE_SIZE_4KB) |
@@ -36,10 +49,9 @@ | |||
36 | 49 | ||
37 | #define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ | 50 | #define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ |
38 | 51 | ||
52 | |||
39 | #ifdef CONFIG_HUGETLB_PAGE | 53 | #ifdef CONFIG_HUGETLB_PAGE |
40 | # define REGION_HPAGE (4UL) /* note: this is hardcoded in reload_context()!*/ | 54 | # define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE) |
41 | # define REGION_SHIFT 61 | ||
42 | # define HPAGE_REGION_BASE (REGION_HPAGE << REGION_SHIFT) | ||
43 | # define HPAGE_SHIFT hpage_shift | 55 | # define HPAGE_SHIFT hpage_shift |
44 | # define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */ | 56 | # define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */ |
45 | # define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) | 57 | # define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) |
@@ -130,16 +142,13 @@ typedef union ia64_va { | |||
130 | #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) | 142 | #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) |
131 | #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) | 143 | #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) |
132 | 144 | ||
133 | #define REGION_SIZE REGION_NUMBER(1) | ||
134 | #define REGION_KERNEL 7 | ||
135 | |||
136 | #ifdef CONFIG_HUGETLB_PAGE | 145 | #ifdef CONFIG_HUGETLB_PAGE |
137 | # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ | 146 | # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ |
138 | | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) | 147 | | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) |
139 | # define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | 148 | # define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) |
140 | # define is_hugepage_only_range(mm, addr, len) \ | 149 | # define is_hugepage_only_range(mm, addr, len) \ |
141 | (REGION_NUMBER(addr) == REGION_HPAGE && \ | 150 | (REGION_NUMBER(addr) == RGN_HPAGE && \ |
142 | REGION_NUMBER((addr)+(len)-1) == REGION_HPAGE) | 151 | REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE) |
143 | extern unsigned int hpage_shift; | 152 | extern unsigned int hpage_shift; |
144 | #endif | 153 | #endif |
145 | 154 | ||
@@ -197,7 +206,7 @@ get_order (unsigned long size) | |||
197 | # define __pgprot(x) (x) | 206 | # define __pgprot(x) (x) |
198 | #endif /* !STRICT_MM_TYPECHECKS */ | 207 | #endif /* !STRICT_MM_TYPECHECKS */ |
199 | 208 | ||
200 | #define PAGE_OFFSET __IA64_UL_CONST(0xe000000000000000) | 209 | #define PAGE_OFFSET RGN_BASE(RGN_KERNEL) |
201 | 210 | ||
202 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ | 211 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ |
203 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ | 212 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ |
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 2303a10ee595..e828377ad295 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h | |||
@@ -75,6 +75,8 @@ | |||
75 | #define PAL_CACHE_READ 259 /* read tag & data of cacheline for diagnostic testing */ | 75 | #define PAL_CACHE_READ 259 /* read tag & data of cacheline for diagnostic testing */ |
76 | #define PAL_CACHE_WRITE 260 /* write tag & data of cacheline for diagnostic testing */ | 76 | #define PAL_CACHE_WRITE 260 /* write tag & data of cacheline for diagnostic testing */ |
77 | #define PAL_VM_TR_READ 261 /* read contents of translation register */ | 77 | #define PAL_VM_TR_READ 261 /* read contents of translation register */ |
78 | #define PAL_GET_PSTATE 262 /* get the current P-state */ | ||
79 | #define PAL_SET_PSTATE 263 /* set the P-state */ | ||
78 | 80 | ||
79 | #ifndef __ASSEMBLY__ | 81 | #ifndef __ASSEMBLY__ |
80 | 82 | ||
@@ -1111,6 +1113,25 @@ ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf) | |||
1111 | return iprv.status; | 1113 | return iprv.status; |
1112 | } | 1114 | } |
1113 | 1115 | ||
1116 | /* Get the current P-state information */ | ||
1117 | static inline s64 | ||
1118 | ia64_pal_get_pstate (u64 *pstate_index) | ||
1119 | { | ||
1120 | struct ia64_pal_retval iprv; | ||
1121 | PAL_CALL_STK(iprv, PAL_GET_PSTATE, 0, 0, 0); | ||
1122 | *pstate_index = iprv.v0; | ||
1123 | return iprv.status; | ||
1124 | } | ||
1125 | |||
1126 | /* Set the P-state */ | ||
1127 | static inline s64 | ||
1128 | ia64_pal_set_pstate (u64 pstate_index) | ||
1129 | { | ||
1130 | struct ia64_pal_retval iprv; | ||
1131 | PAL_CALL_STK(iprv, PAL_SET_PSTATE, pstate_index, 0, 0); | ||
1132 | return iprv.status; | ||
1133 | } | ||
1134 | |||
1114 | /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are | 1135 | /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are |
1115 | * suspended, but cache and TLB coherency is maintained. | 1136 | * suspended, but cache and TLB coherency is maintained. |
1116 | */ | 1137 | */ |
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h index 48586e08f432..2e34c06e6777 100644 --- a/include/asm-ia64/pgtable.h +++ b/include/asm-ia64/pgtable.h | |||
@@ -204,21 +204,18 @@ ia64_phys_addr_valid (unsigned long addr) | |||
204 | #define set_pte(ptep, pteval) (*(ptep) = (pteval)) | 204 | #define set_pte(ptep, pteval) (*(ptep) = (pteval)) |
205 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | 205 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) |
206 | 206 | ||
207 | #define RGN_SIZE (1UL << 61) | 207 | #define VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL) |
208 | #define RGN_KERNEL 7 | ||
209 | |||
210 | #define VMALLOC_START 0xa000000200000000UL | ||
211 | #ifdef CONFIG_VIRTUAL_MEM_MAP | 208 | #ifdef CONFIG_VIRTUAL_MEM_MAP |
212 | # define VMALLOC_END_INIT (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9))) | 209 | # define VMALLOC_END_INIT (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9))) |
213 | # define VMALLOC_END vmalloc_end | 210 | # define VMALLOC_END vmalloc_end |
214 | extern unsigned long vmalloc_end; | 211 | extern unsigned long vmalloc_end; |
215 | #else | 212 | #else |
216 | # define VMALLOC_END (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9))) | 213 | # define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9))) |
217 | #endif | 214 | #endif |
218 | 215 | ||
219 | /* fs/proc/kcore.c */ | 216 | /* fs/proc/kcore.c */ |
220 | #define kc_vaddr_to_offset(v) ((v) - 0xa000000000000000UL) | 217 | #define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) |
221 | #define kc_offset_to_vaddr(o) ((o) + 0xa000000000000000UL) | 218 | #define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE)) |
222 | 219 | ||
223 | /* | 220 | /* |
224 | * Conversion functions: convert page frame number (pfn) and a protection value to a page | 221 | * Conversion functions: convert page frame number (pfn) and a protection value to a page |
diff --git a/include/asm-ia64/rwsem.h b/include/asm-ia64/rwsem.h index 6ece5061dc19..e18b5ab0cb75 100644 --- a/include/asm-ia64/rwsem.h +++ b/include/asm-ia64/rwsem.h | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com> | 4 | * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com> |
5 | * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com> | 5 | * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com> |
6 | * Copyright (C) 2005 Christoph Lameter <clameter@sgi.com> | ||
6 | * | 7 | * |
7 | * Based on asm-i386/rwsem.h and other architecture implementation. | 8 | * Based on asm-i386/rwsem.h and other architecture implementation. |
8 | * | 9 | * |
@@ -11,9 +12,9 @@ | |||
11 | * | 12 | * |
12 | * The lock count is initialized to 0 (no active and no waiting lockers). | 13 | * The lock count is initialized to 0 (no active and no waiting lockers). |
13 | * | 14 | * |
14 | * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case | 15 | * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for |
15 | * of an uncontended lock. Readers increment by 1 and see a positive value | 16 | * the case of an uncontended lock. Readers increment by 1 and see a positive |
16 | * when uncontended, negative if there are writers (and maybe) readers | 17 | * value when uncontended, negative if there are writers (and maybe) readers |
17 | * waiting (in which case it goes to sleep). | 18 | * waiting (in which case it goes to sleep). |
18 | */ | 19 | */ |
19 | 20 | ||
@@ -29,7 +30,7 @@ | |||
29 | * the semaphore definition | 30 | * the semaphore definition |
30 | */ | 31 | */ |
31 | struct rw_semaphore { | 32 | struct rw_semaphore { |
32 | signed int count; | 33 | signed long count; |
33 | spinlock_t wait_lock; | 34 | spinlock_t wait_lock; |
34 | struct list_head wait_list; | 35 | struct list_head wait_list; |
35 | #if RWSEM_DEBUG | 36 | #if RWSEM_DEBUG |
@@ -37,10 +38,10 @@ struct rw_semaphore { | |||
37 | #endif | 38 | #endif |
38 | }; | 39 | }; |
39 | 40 | ||
40 | #define RWSEM_UNLOCKED_VALUE 0x00000000 | 41 | #define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000) |
41 | #define RWSEM_ACTIVE_BIAS 0x00000001 | 42 | #define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001) |
42 | #define RWSEM_ACTIVE_MASK 0x0000ffff | 43 | #define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff) |
43 | #define RWSEM_WAITING_BIAS (-0x00010000) | 44 | #define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000) |
44 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS | 45 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS |
45 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) | 46 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) |
46 | 47 | ||
@@ -83,7 +84,7 @@ init_rwsem (struct rw_semaphore *sem) | |||
83 | static inline void | 84 | static inline void |
84 | __down_read (struct rw_semaphore *sem) | 85 | __down_read (struct rw_semaphore *sem) |
85 | { | 86 | { |
86 | int result = ia64_fetchadd4_acq((unsigned int *)&sem->count, 1); | 87 | long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1); |
87 | 88 | ||
88 | if (result < 0) | 89 | if (result < 0) |
89 | rwsem_down_read_failed(sem); | 90 | rwsem_down_read_failed(sem); |
@@ -95,7 +96,7 @@ __down_read (struct rw_semaphore *sem) | |||
95 | static inline void | 96 | static inline void |
96 | __down_write (struct rw_semaphore *sem) | 97 | __down_write (struct rw_semaphore *sem) |
97 | { | 98 | { |
98 | int old, new; | 99 | long old, new; |
99 | 100 | ||
100 | do { | 101 | do { |
101 | old = sem->count; | 102 | old = sem->count; |
@@ -112,7 +113,7 @@ __down_write (struct rw_semaphore *sem) | |||
112 | static inline void | 113 | static inline void |
113 | __up_read (struct rw_semaphore *sem) | 114 | __up_read (struct rw_semaphore *sem) |
114 | { | 115 | { |
115 | int result = ia64_fetchadd4_rel((unsigned int *)&sem->count, -1); | 116 | long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1); |
116 | 117 | ||
117 | if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0) | 118 | if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0) |
118 | rwsem_wake(sem); | 119 | rwsem_wake(sem); |
@@ -124,7 +125,7 @@ __up_read (struct rw_semaphore *sem) | |||
124 | static inline void | 125 | static inline void |
125 | __up_write (struct rw_semaphore *sem) | 126 | __up_write (struct rw_semaphore *sem) |
126 | { | 127 | { |
127 | int old, new; | 128 | long old, new; |
128 | 129 | ||
129 | do { | 130 | do { |
130 | old = sem->count; | 131 | old = sem->count; |
@@ -141,7 +142,7 @@ __up_write (struct rw_semaphore *sem) | |||
141 | static inline int | 142 | static inline int |
142 | __down_read_trylock (struct rw_semaphore *sem) | 143 | __down_read_trylock (struct rw_semaphore *sem) |
143 | { | 144 | { |
144 | int tmp; | 145 | long tmp; |
145 | while ((tmp = sem->count) >= 0) { | 146 | while ((tmp = sem->count) >= 0) { |
146 | if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) { | 147 | if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) { |
147 | return 1; | 148 | return 1; |
@@ -156,7 +157,7 @@ __down_read_trylock (struct rw_semaphore *sem) | |||
156 | static inline int | 157 | static inline int |
157 | __down_write_trylock (struct rw_semaphore *sem) | 158 | __down_write_trylock (struct rw_semaphore *sem) |
158 | { | 159 | { |
159 | int tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE, | 160 | long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE, |
160 | RWSEM_ACTIVE_WRITE_BIAS); | 161 | RWSEM_ACTIVE_WRITE_BIAS); |
161 | return tmp == RWSEM_UNLOCKED_VALUE; | 162 | return tmp == RWSEM_UNLOCKED_VALUE; |
162 | } | 163 | } |
@@ -167,7 +168,7 @@ __down_write_trylock (struct rw_semaphore *sem) | |||
167 | static inline void | 168 | static inline void |
168 | __downgrade_write (struct rw_semaphore *sem) | 169 | __downgrade_write (struct rw_semaphore *sem) |
169 | { | 170 | { |
170 | int old, new; | 171 | long old, new; |
171 | 172 | ||
172 | do { | 173 | do { |
173 | old = sem->count; | 174 | old = sem->count; |
@@ -182,7 +183,7 @@ __downgrade_write (struct rw_semaphore *sem) | |||
182 | * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1 | 183 | * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1 |
183 | * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd. | 184 | * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd. |
184 | */ | 185 | */ |
185 | #define rwsem_atomic_add(delta, sem) atomic_add(delta, (atomic_t *)(&(sem)->count)) | 186 | #define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count)) |
186 | #define rwsem_atomic_update(delta, sem) atomic_add_return(delta, (atomic_t *)(&(sem)->count)) | 187 | #define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count)) |
187 | 188 | ||
188 | #endif /* _ASM_IA64_RWSEM_H */ | 189 | #endif /* _ASM_IA64_RWSEM_H */ |
diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h index 103d745dc5f2..2c32e4b77b54 100644 --- a/include/asm-ia64/sn/addrs.h +++ b/include/asm-ia64/sn/addrs.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (c) 1992-1999,2001-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (c) 1992-1999,2001-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef _ASM_IA64_SN_ADDRS_H | 9 | #ifndef _ASM_IA64_SN_ADDRS_H |
@@ -65,7 +65,6 @@ | |||
65 | 65 | ||
66 | #define NASID_MASK ((u64)NASID_BITMASK << NASID_SHIFT) | 66 | #define NASID_MASK ((u64)NASID_BITMASK << NASID_SHIFT) |
67 | #define AS_MASK ((u64)AS_BITMASK << AS_SHIFT) | 67 | #define AS_MASK ((u64)AS_BITMASK << AS_SHIFT) |
68 | #define REGION_BITS 0xe000000000000000UL | ||
69 | 68 | ||
70 | 69 | ||
71 | /* | 70 | /* |
@@ -79,38 +78,30 @@ | |||
79 | #define AS_CAC_SPACE (AS_CAC_VAL << AS_SHIFT) | 78 | #define AS_CAC_SPACE (AS_CAC_VAL << AS_SHIFT) |
80 | 79 | ||
81 | 80 | ||
82 | /* | ||
83 | * Base addresses for various address ranges. | ||
84 | */ | ||
85 | #define CACHED 0xe000000000000000UL | ||
86 | #define UNCACHED 0xc000000000000000UL | ||
87 | #define UNCACHED_PHYS 0x8000000000000000UL | ||
88 | |||
89 | |||
90 | /* | 81 | /* |
91 | * Virtual Mode Local & Global MMR space. | 82 | * Virtual Mode Local & Global MMR space. |
92 | */ | 83 | */ |
93 | #define SH1_LOCAL_MMR_OFFSET 0x8000000000UL | 84 | #define SH1_LOCAL_MMR_OFFSET 0x8000000000UL |
94 | #define SH2_LOCAL_MMR_OFFSET 0x0200000000UL | 85 | #define SH2_LOCAL_MMR_OFFSET 0x0200000000UL |
95 | #define LOCAL_MMR_OFFSET (is_shub2() ? SH2_LOCAL_MMR_OFFSET : SH1_LOCAL_MMR_OFFSET) | 86 | #define LOCAL_MMR_OFFSET (is_shub2() ? SH2_LOCAL_MMR_OFFSET : SH1_LOCAL_MMR_OFFSET) |
96 | #define LOCAL_MMR_SPACE (UNCACHED | LOCAL_MMR_OFFSET) | 87 | #define LOCAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | LOCAL_MMR_OFFSET) |
97 | #define LOCAL_PHYS_MMR_SPACE (UNCACHED_PHYS | LOCAL_MMR_OFFSET) | 88 | #define LOCAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | LOCAL_MMR_OFFSET) |
98 | 89 | ||
99 | #define SH1_GLOBAL_MMR_OFFSET 0x0800000000UL | 90 | #define SH1_GLOBAL_MMR_OFFSET 0x0800000000UL |
100 | #define SH2_GLOBAL_MMR_OFFSET 0x0300000000UL | 91 | #define SH2_GLOBAL_MMR_OFFSET 0x0300000000UL |
101 | #define GLOBAL_MMR_OFFSET (is_shub2() ? SH2_GLOBAL_MMR_OFFSET : SH1_GLOBAL_MMR_OFFSET) | 92 | #define GLOBAL_MMR_OFFSET (is_shub2() ? SH2_GLOBAL_MMR_OFFSET : SH1_GLOBAL_MMR_OFFSET) |
102 | #define GLOBAL_MMR_SPACE (UNCACHED | GLOBAL_MMR_OFFSET) | 93 | #define GLOBAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | GLOBAL_MMR_OFFSET) |
103 | 94 | ||
104 | /* | 95 | /* |
105 | * Physical mode addresses | 96 | * Physical mode addresses |
106 | */ | 97 | */ |
107 | #define GLOBAL_PHYS_MMR_SPACE (UNCACHED_PHYS | GLOBAL_MMR_OFFSET) | 98 | #define GLOBAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | GLOBAL_MMR_OFFSET) |
108 | 99 | ||
109 | 100 | ||
110 | /* | 101 | /* |
111 | * Clear region & AS bits. | 102 | * Clear region & AS bits. |
112 | */ | 103 | */ |
113 | #define TO_PHYS_MASK (~(REGION_BITS | AS_MASK)) | 104 | #define TO_PHYS_MASK (~(RGN_BITS | AS_MASK)) |
114 | 105 | ||
115 | 106 | ||
116 | /* | 107 | /* |
@@ -126,6 +117,7 @@ | |||
126 | #define GLOBAL_MMR_PHYS_ADDR(n,a) (GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a)) | 117 | #define GLOBAL_MMR_PHYS_ADDR(n,a) (GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a)) |
127 | #define GLOBAL_CAC_ADDR(n,a) (CAC_BASE | REMOTE_ADDR(n,a)) | 118 | #define GLOBAL_CAC_ADDR(n,a) (CAC_BASE | REMOTE_ADDR(n,a)) |
128 | #define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) | 119 | #define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) |
120 | #define IS_TIO_NASID(n) ((n) & 1) | ||
129 | 121 | ||
130 | 122 | ||
131 | /* non-II mmr's start at top of big window space (4G) */ | 123 | /* non-II mmr's start at top of big window space (4G) */ |
@@ -134,10 +126,10 @@ | |||
134 | /* | 126 | /* |
135 | * general address defines | 127 | * general address defines |
136 | */ | 128 | */ |
137 | #define CAC_BASE (CACHED | AS_CAC_SPACE) | 129 | #define CAC_BASE (PAGE_OFFSET | AS_CAC_SPACE) |
138 | #define AMO_BASE (UNCACHED | AS_AMO_SPACE) | 130 | #define AMO_BASE (__IA64_UNCACHED_OFFSET | AS_AMO_SPACE) |
139 | #define AMO_PHYS_BASE (UNCACHED_PHYS | AS_AMO_SPACE) | 131 | #define AMO_PHYS_BASE (RGN_BASE(RGN_HPAGE) | AS_AMO_SPACE) |
140 | #define GET_BASE (CACHED | AS_GET_SPACE) | 132 | #define GET_BASE (PAGE_OFFSET | AS_GET_SPACE) |
141 | 133 | ||
142 | /* | 134 | /* |
143 | * Convert Memory addresses between various addressing modes. | 135 | * Convert Memory addresses between various addressing modes. |
@@ -155,17 +147,35 @@ | |||
155 | * the chiplet id is zero. If we implement TIO-TIO dma, we might need | 147 | * the chiplet id is zero. If we implement TIO-TIO dma, we might need |
156 | * to insert a chiplet id into this macro. However, it is our belief | 148 | * to insert a chiplet id into this macro. However, it is our belief |
157 | * right now that this chiplet id will be ICE, which is also zero. | 149 | * right now that this chiplet id will be ICE, which is also zero. |
158 | * Nasid starts on bit 40. | ||
159 | */ | 150 | */ |
160 | #define PHYS_TO_TIODMA(x) ( (((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x)) | 151 | #define SH1_TIO_PHYS_TO_DMA(x) \ |
161 | #define PHYS_TO_DMA(x) ( (((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x)) | 152 | ((((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x)) |
153 | |||
154 | #define SH2_NETWORK_BANK_OFFSET(x) \ | ||
155 | ((u64)(x) & ((1UL << (sn_hub_info->nasid_shift - 4)) -1)) | ||
156 | |||
157 | #define SH2_NETWORK_BANK_SELECT(x) \ | ||
158 | ((((u64)(x) & (0x3UL << (sn_hub_info->nasid_shift - 4))) \ | ||
159 | >> (sn_hub_info->nasid_shift - 4)) << 36) | ||
160 | |||
161 | #define SH2_NETWORK_ADDRESS(x) \ | ||
162 | (SH2_NETWORK_BANK_OFFSET(x) | SH2_NETWORK_BANK_SELECT(x)) | ||
163 | |||
164 | #define SH2_TIO_PHYS_TO_DMA(x) \ | ||
165 | (((u64)(NASID_GET(x)) << 40) | SH2_NETWORK_ADDRESS(x)) | ||
166 | |||
167 | #define PHYS_TO_TIODMA(x) \ | ||
168 | (is_shub1() ? SH1_TIO_PHYS_TO_DMA(x) : SH2_TIO_PHYS_TO_DMA(x)) | ||
169 | |||
170 | #define PHYS_TO_DMA(x) \ | ||
171 | ((((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x)) | ||
162 | 172 | ||
163 | 173 | ||
164 | /* | 174 | /* |
165 | * Macros to test for address type. | 175 | * Macros to test for address type. |
166 | */ | 176 | */ |
167 | #define IS_AMO_ADDRESS(x) (((u64)(x) & (REGION_BITS | AS_MASK)) == AMO_BASE) | 177 | #define IS_AMO_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_BASE) |
168 | #define IS_AMO_PHYS_ADDRESS(x) (((u64)(x) & (REGION_BITS | AS_MASK)) == AMO_PHYS_BASE) | 178 | #define IS_AMO_PHYS_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_PHYS_BASE) |
169 | 179 | ||
170 | 180 | ||
171 | /* | 181 | /* |
@@ -180,18 +190,20 @@ | |||
180 | #define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \ | 190 | #define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \ |
181 | ((u64) (w) << TIO_SWIN_SIZE_BITS)) | 191 | ((u64) (w) << TIO_SWIN_SIZE_BITS)) |
182 | #define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n)) | 192 | #define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n)) |
183 | #define TIO_IO_BASE(n) (UNCACHED | NASID_SPACE(n)) | 193 | #define TIO_IO_BASE(n) (__IA64_UNCACHED_OFFSET | NASID_SPACE(n)) |
184 | #define BWIN_SIZE (1UL << BWIN_SIZE_BITS) | 194 | #define BWIN_SIZE (1UL << BWIN_SIZE_BITS) |
185 | #define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE) | 195 | #define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE) |
186 | #define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((u64) (w) << BWIN_SIZE_BITS)) | 196 | #define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((u64) (w) << BWIN_SIZE_BITS)) |
187 | #define RAW_NODE_SWIN_BASE(n, w) (NODE_IO_BASE(n) + ((u64) (w) << SWIN_SIZE_BITS)) | 197 | #define RAW_NODE_SWIN_BASE(n, w) (NODE_IO_BASE(n) + ((u64) (w) << SWIN_SIZE_BITS)) |
188 | #define BWIN_WIDGET_MASK 0x7 | 198 | #define BWIN_WIDGET_MASK 0x7 |
189 | #define BWIN_WINDOWNUM(x) (((x) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) | 199 | #define BWIN_WINDOWNUM(x) (((x) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) |
200 | #define SH1_IS_BIG_WINDOW_ADDR(x) ((x) & BWIN_TOP) | ||
190 | 201 | ||
191 | #define TIO_BWIN_WINDOW_SELECT_MASK 0x7 | 202 | #define TIO_BWIN_WINDOW_SELECT_MASK 0x7 |
192 | #define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK) | 203 | #define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK) |
193 | 204 | ||
194 | 205 | #define TIO_HWIN_SHIFT_BITS 33 | |
206 | #define TIO_HWIN(x) (NODE_OFFSET(x) >> TIO_HWIN_SHIFT_BITS) | ||
195 | 207 | ||
196 | /* | 208 | /* |
197 | * The following definitions pertain to the IO special address | 209 | * The following definitions pertain to the IO special address |
@@ -216,10 +228,6 @@ | |||
216 | #define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK) | 228 | #define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK) |
217 | 229 | ||
218 | 230 | ||
219 | #define TIO_IOSPACE_ADDR(n,x) \ | ||
220 | /* Move in the Chiplet ID for TIO Local Block MMR */ \ | ||
221 | (REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2)) | ||
222 | |||
223 | /* | 231 | /* |
224 | * The following macros produce the correct base virtual address for | 232 | * The following macros produce the correct base virtual address for |
225 | * the hub registers. The REMOTE_HUB_* macro produce | 233 | * the hub registers. The REMOTE_HUB_* macro produce |
@@ -234,18 +242,40 @@ | |||
234 | * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S(). | 242 | * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S(). |
235 | * They're always safe. | 243 | * They're always safe. |
236 | */ | 244 | */ |
245 | /* Shub1 TIO & MMR addressing macros */ | ||
246 | #define SH1_TIO_IOSPACE_ADDR(n,x) \ | ||
247 | GLOBAL_MMR_ADDR(n,x) | ||
248 | |||
249 | #define SH1_REMOTE_BWIN_MMR(n,x) \ | ||
250 | GLOBAL_MMR_ADDR(n,x) | ||
251 | |||
252 | #define SH1_REMOTE_SWIN_MMR(n,x) \ | ||
253 | (NODE_SWIN_BASE(n,1) + 0x800000UL + (x)) | ||
254 | |||
255 | #define SH1_REMOTE_MMR(n,x) \ | ||
256 | (SH1_IS_BIG_WINDOW_ADDR(x) ? SH1_REMOTE_BWIN_MMR(n,x) : \ | ||
257 | SH1_REMOTE_SWIN_MMR(n,x)) | ||
258 | |||
259 | /* Shub1 TIO & MMR addressing macros */ | ||
260 | #define SH2_TIO_IOSPACE_ADDR(n,x) \ | ||
261 | ((__IA64_UNCACHED_OFFSET | REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2))) | ||
262 | |||
263 | #define SH2_REMOTE_MMR(n,x) \ | ||
264 | GLOBAL_MMR_ADDR(n,x) | ||
265 | |||
266 | |||
267 | /* TIO & MMR addressing macros that work on both shub1 & shub2 */ | ||
268 | #define TIO_IOSPACE_ADDR(n,x) \ | ||
269 | ((u64 *)(is_shub1() ? SH1_TIO_IOSPACE_ADDR(n,x) : \ | ||
270 | SH2_TIO_IOSPACE_ADDR(n,x))) | ||
271 | |||
272 | #define SH_REMOTE_MMR(n,x) \ | ||
273 | (is_shub1() ? SH1_REMOTE_MMR(n,x) : SH2_REMOTE_MMR(n,x)) | ||
274 | |||
237 | #define REMOTE_HUB_ADDR(n,x) \ | 275 | #define REMOTE_HUB_ADDR(n,x) \ |
238 | ((n & 1) ? \ | 276 | (IS_TIO_NASID(n) ? ((volatile u64*)TIO_IOSPACE_ADDR(n,x)) : \ |
239 | /* TIO: */ \ | 277 | ((volatile u64*)SH_REMOTE_MMR(n,x))) |
240 | (is_shub2() ? \ | 278 | |
241 | /* TIO on Shub2 */ \ | ||
242 | (volatile u64 *)(TIO_IOSPACE_ADDR(n,x)) \ | ||
243 | : /* TIO on shub1 */ \ | ||
244 | (volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \ | ||
245 | \ | ||
246 | : /* SHUB1 and SHUB2 MMRs: */ \ | ||
247 | (((x) & BWIN_TOP) ? ((volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \ | ||
248 | : ((volatile u64 *)(NODE_SWIN_BASE(n,1) + 0x800000 + (x))))) | ||
249 | 279 | ||
250 | #define HUB_L(x) (*((volatile typeof(*x) *)x)) | 280 | #define HUB_L(x) (*((volatile typeof(*x) *)x)) |
251 | #define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d)) | 281 | #define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d)) |
diff --git a/include/asm-ia64/sn/geo.h b/include/asm-ia64/sn/geo.h index 84b254603b8d..f083c9434066 100644 --- a/include/asm-ia64/sn/geo.h +++ b/include/asm-ia64/sn/geo.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef _ASM_IA64_SN_GEO_H | 9 | #ifndef _ASM_IA64_SN_GEO_H |
@@ -108,7 +108,6 @@ typedef union geoid_u { | |||
108 | #define INVALID_SLAB (slabid_t)-1 | 108 | #define INVALID_SLAB (slabid_t)-1 |
109 | #define INVALID_SLOT (slotid_t)-1 | 109 | #define INVALID_SLOT (slotid_t)-1 |
110 | #define INVALID_MODULE ((moduleid_t)-1) | 110 | #define INVALID_MODULE ((moduleid_t)-1) |
111 | #define INVALID_PARTID ((partid_t)-1) | ||
112 | 111 | ||
113 | static inline slabid_t geo_slab(geoid_t g) | 112 | static inline slabid_t geo_slab(geoid_t g) |
114 | { | 113 | { |
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h index e190dd4213d5..e35074f526d9 100644 --- a/include/asm-ia64/sn/intr.h +++ b/include/asm-ia64/sn/intr.h | |||
@@ -12,13 +12,12 @@ | |||
12 | #include <linux/rcupdate.h> | 12 | #include <linux/rcupdate.h> |
13 | 13 | ||
14 | #define SGI_UART_VECTOR (0xe9) | 14 | #define SGI_UART_VECTOR (0xe9) |
15 | #define SGI_PCIBR_ERROR (0x33) | ||
16 | 15 | ||
17 | /* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */ | 16 | /* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */ |
18 | #define SGI_XPC_ACTIVATE (0x30) | 17 | #define SGI_XPC_ACTIVATE (0x30) |
19 | #define SGI_II_ERROR (0x31) | 18 | #define SGI_II_ERROR (0x31) |
20 | #define SGI_XBOW_ERROR (0x32) | 19 | #define SGI_XBOW_ERROR (0x32) |
21 | #define SGI_PCIBR_ERROR (0x33) | 20 | #define SGI_PCIASIC_ERROR (0x33) |
22 | #define SGI_ACPI_SCI_INT (0x34) | 21 | #define SGI_ACPI_SCI_INT (0x34) |
23 | #define SGI_TIOCA_ERROR (0x35) | 22 | #define SGI_TIOCA_ERROR (0x35) |
24 | #define SGI_TIO_ERROR (0x36) | 23 | #define SGI_TIO_ERROR (0x36) |
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h index 7138b1eafd6b..47bb8100fd00 100644 --- a/include/asm-ia64/sn/nodepda.h +++ b/include/asm-ia64/sn/nodepda.h | |||
@@ -37,7 +37,6 @@ struct phys_cpuid { | |||
37 | 37 | ||
38 | struct nodepda_s { | 38 | struct nodepda_s { |
39 | void *pdinfo; /* Platform-dependent per-node info */ | 39 | void *pdinfo; /* Platform-dependent per-node info */ |
40 | spinlock_t bist_lock; | ||
41 | 40 | ||
42 | /* | 41 | /* |
43 | * The BTEs on this node are shared by the local cpus | 42 | * The BTEs on this node are shared by the local cpus |
@@ -55,6 +54,8 @@ struct nodepda_s { | |||
55 | * Array of physical cpu identifiers. Indexed by cpuid. | 54 | * Array of physical cpu identifiers. Indexed by cpuid. |
56 | */ | 55 | */ |
57 | struct phys_cpuid phys_cpuid[NR_CPUS]; | 56 | struct phys_cpuid phys_cpuid[NR_CPUS]; |
57 | spinlock_t ptc_lock ____cacheline_aligned_in_smp; | ||
58 | spinlock_t bist_lock; | ||
58 | }; | 59 | }; |
59 | 60 | ||
60 | typedef struct nodepda_s nodepda_t; | 61 | typedef struct nodepda_s nodepda_t; |
diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h index 976f5eff0539..ad0e8e8ae53f 100644 --- a/include/asm-ia64/sn/pcibus_provider_defs.h +++ b/include/asm-ia64/sn/pcibus_provider_defs.h | |||
@@ -18,8 +18,9 @@ | |||
18 | #define PCIIO_ASIC_TYPE_PIC 2 | 18 | #define PCIIO_ASIC_TYPE_PIC 2 |
19 | #define PCIIO_ASIC_TYPE_TIOCP 3 | 19 | #define PCIIO_ASIC_TYPE_TIOCP 3 |
20 | #define PCIIO_ASIC_TYPE_TIOCA 4 | 20 | #define PCIIO_ASIC_TYPE_TIOCA 4 |
21 | #define PCIIO_ASIC_TYPE_TIOCE 5 | ||
21 | 22 | ||
22 | #define PCIIO_ASIC_MAX_TYPES 5 | 23 | #define PCIIO_ASIC_MAX_TYPES 6 |
23 | 24 | ||
24 | /* | 25 | /* |
25 | * Common pciio bus provider data. There should be one of these as the | 26 | * Common pciio bus provider data. There should be one of these as the |
@@ -30,7 +31,8 @@ | |||
30 | struct pcibus_bussoft { | 31 | struct pcibus_bussoft { |
31 | uint32_t bs_asic_type; /* chipset type */ | 32 | uint32_t bs_asic_type; /* chipset type */ |
32 | uint32_t bs_xid; /* xwidget id */ | 33 | uint32_t bs_xid; /* xwidget id */ |
33 | uint64_t bs_persist_busnum; /* Persistent Bus Number */ | 34 | uint32_t bs_persist_busnum; /* Persistent Bus Number */ |
35 | uint32_t bs_persist_segment; /* Segment Number */ | ||
34 | uint64_t bs_legacy_io; /* legacy io pio addr */ | 36 | uint64_t bs_legacy_io; /* legacy io pio addr */ |
35 | uint64_t bs_legacy_mem; /* legacy mem pio addr */ | 37 | uint64_t bs_legacy_mem; /* legacy mem pio addr */ |
36 | uint64_t bs_base; /* widget base */ | 38 | uint64_t bs_base; /* widget base */ |
@@ -47,6 +49,8 @@ struct sn_pcibus_provider { | |||
47 | dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t); | 49 | dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t); |
48 | void (*dma_unmap)(struct pci_dev *, dma_addr_t, int); | 50 | void (*dma_unmap)(struct pci_dev *, dma_addr_t, int); |
49 | void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *); | 51 | void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *); |
52 | void (*force_interrupt)(struct sn_irq_info *); | ||
53 | void (*target_interrupt)(struct sn_irq_info *); | ||
50 | }; | 54 | }; |
51 | 55 | ||
52 | extern struct sn_pcibus_provider *sn_pci_provider[]; | 56 | extern struct sn_pcibus_provider *sn_pci_provider[]; |
diff --git a/include/asm-ia64/sn/pda.h b/include/asm-ia64/sn/pda.h index ea5590c76ca4..1c5108d44d8b 100644 --- a/include/asm-ia64/sn/pda.h +++ b/include/asm-ia64/sn/pda.h | |||
@@ -39,7 +39,6 @@ typedef struct pda_s { | |||
39 | unsigned long pio_write_status_val; | 39 | unsigned long pio_write_status_val; |
40 | volatile unsigned long *pio_shub_war_cam_addr; | 40 | volatile unsigned long *pio_shub_war_cam_addr; |
41 | 41 | ||
42 | unsigned long sn_soft_irr[4]; | ||
43 | unsigned long sn_in_service_ivecs[4]; | 42 | unsigned long sn_in_service_ivecs[4]; |
44 | int sn_lb_int_war_ticks; | 43 | int sn_lb_int_war_ticks; |
45 | int sn_last_irq; | 44 | int sn_last_irq; |
diff --git a/include/asm-ia64/sn/sn2/sn_hwperf.h b/include/asm-ia64/sn/sn2/sn_hwperf.h index df75f4c4aec3..291ef3d69da2 100644 --- a/include/asm-ia64/sn/sn2/sn_hwperf.h +++ b/include/asm-ia64/sn/sn2/sn_hwperf.h | |||
@@ -43,6 +43,7 @@ struct sn_hwperf_object_info { | |||
43 | 43 | ||
44 | /* macros for object classification */ | 44 | /* macros for object classification */ |
45 | #define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub")) | 45 | #define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub")) |
46 | #define SN_HWPERF_IS_NODE_SHUB2(x) ((x) && strstr((x)->name, "SHub 2.")) | ||
46 | #define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO")) | 47 | #define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO")) |
47 | #define SN_HWPERF_IS_ROUTER(x) ((x) && strstr((x)->name, "Router")) | 48 | #define SN_HWPERF_IS_ROUTER(x) ((x) && strstr((x)->name, "Router")) |
48 | #define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router")) | 49 | #define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router")) |
@@ -214,6 +215,15 @@ struct sn_hwperf_ioctl_args { | |||
214 | */ | 215 | */ |
215 | #define SN_HWPERF_GET_NODE_NASID (102|SN_HWPERF_OP_MEM_COPYOUT) | 216 | #define SN_HWPERF_GET_NODE_NASID (102|SN_HWPERF_OP_MEM_COPYOUT) |
216 | 217 | ||
218 | /* | ||
219 | * Given a node id, determine the id of the nearest node with CPUs | ||
220 | * and the id of the nearest node that has memory. The argument | ||
221 | * node would normally be a "headless" node, e.g. an "IO node". | ||
222 | * Return 0 on success. | ||
223 | */ | ||
224 | extern int sn_hwperf_get_nearest_node(cnodeid_t node, | ||
225 | cnodeid_t *near_mem, cnodeid_t *near_cpu); | ||
226 | |||
217 | /* return codes */ | 227 | /* return codes */ |
218 | #define SN_HWPERF_OP_OK 0 | 228 | #define SN_HWPERF_OP_OK 0 |
219 | #define SN_HWPERF_OP_NOMEM 1 | 229 | #define SN_HWPERF_OP_NOMEM 1 |
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index 27976d223186..e67825ad1930 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h | |||
@@ -55,7 +55,6 @@ | |||
55 | #define SN_SAL_BUS_CONFIG 0x02000037 | 55 | #define SN_SAL_BUS_CONFIG 0x02000037 |
56 | #define SN_SAL_SYS_SERIAL_GET 0x02000038 | 56 | #define SN_SAL_SYS_SERIAL_GET 0x02000038 |
57 | #define SN_SAL_PARTITION_SERIAL_GET 0x02000039 | 57 | #define SN_SAL_PARTITION_SERIAL_GET 0x02000039 |
58 | #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a | ||
59 | #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b | 58 | #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b |
60 | #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c | 59 | #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c |
61 | #define SN_SAL_COHERENCE 0x0200003d | 60 | #define SN_SAL_COHERENCE 0x0200003d |
@@ -78,7 +77,8 @@ | |||
78 | 77 | ||
79 | #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 | 78 | #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 |
80 | #define SN_SAL_BTE_RECOVER 0x02000061 | 79 | #define SN_SAL_BTE_RECOVER 0x02000061 |
81 | #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000062 | 80 | #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 |
81 | #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064 | ||
82 | 82 | ||
83 | /* | 83 | /* |
84 | * Service-specific constants | 84 | * Service-specific constants |
@@ -586,35 +586,6 @@ sn_partition_serial_number_val(void) { | |||
586 | } | 586 | } |
587 | 587 | ||
588 | /* | 588 | /* |
589 | * Returns the partition id of the nasid passed in as an argument, | ||
590 | * or INVALID_PARTID if the partition id cannot be retrieved. | ||
591 | */ | ||
592 | static inline partid_t | ||
593 | ia64_sn_sysctl_partition_get(nasid_t nasid) | ||
594 | { | ||
595 | struct ia64_sal_retval ret_stuff; | ||
596 | ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, | ||
597 | 0, 0, 0, 0, 0, 0); | ||
598 | if (ret_stuff.status != 0) | ||
599 | return INVALID_PARTID; | ||
600 | return ((partid_t)ret_stuff.v0); | ||
601 | } | ||
602 | |||
603 | /* | ||
604 | * Returns the partition id of the current processor. | ||
605 | */ | ||
606 | |||
607 | extern partid_t sn_partid; | ||
608 | |||
609 | static inline partid_t | ||
610 | sn_local_partid(void) { | ||
611 | if (unlikely(sn_partid < 0)) { | ||
612 | sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id())); | ||
613 | } | ||
614 | return sn_partid; | ||
615 | } | ||
616 | |||
617 | /* | ||
618 | * Returns the physical address of the partition's reserved page through | 589 | * Returns the physical address of the partition's reserved page through |
619 | * an iterative number of calls. | 590 | * an iterative number of calls. |
620 | * | 591 | * |
@@ -749,7 +720,8 @@ ia64_sn_power_down(void) | |||
749 | { | 720 | { |
750 | struct ia64_sal_retval ret_stuff; | 721 | struct ia64_sal_retval ret_stuff; |
751 | SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); | 722 | SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); |
752 | while(1); | 723 | while(1) |
724 | cpu_relax(); | ||
753 | /* never returns */ | 725 | /* never returns */ |
754 | } | 726 | } |
755 | 727 | ||
@@ -1018,24 +990,6 @@ ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift, | |||
1018 | ret_stuff.v2 = 0; | 990 | ret_stuff.v2 = 0; |
1019 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); | 991 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); |
1020 | 992 | ||
1021 | /***** BEGIN HACK - temp til old proms no longer supported ********/ | ||
1022 | if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { | ||
1023 | int nasid = get_sapicid() & 0xfff;; | ||
1024 | #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL | ||
1025 | #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48 | ||
1026 | if (shubtype) *shubtype = 0; | ||
1027 | if (nasid_bitmask) *nasid_bitmask = 0x7ff; | ||
1028 | if (nasid_shift) *nasid_shift = 38; | ||
1029 | if (systemsize) *systemsize = 11; | ||
1030 | if (sharing_domain_size) *sharing_domain_size = 9; | ||
1031 | if (partid) *partid = ia64_sn_sysctl_partition_get(nasid); | ||
1032 | if (coher) *coher = nasid >> 9; | ||
1033 | if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >> | ||
1034 | SH_SHUB_ID_NODES_PER_BIT_SHFT; | ||
1035 | return 0; | ||
1036 | } | ||
1037 | /***** END HACK *******/ | ||
1038 | |||
1039 | if (ret_stuff.status < 0) | 993 | if (ret_stuff.status < 0) |
1040 | return ret_stuff.status; | 994 | return ret_stuff.status; |
1041 | 995 | ||
@@ -1068,12 +1022,10 @@ ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2, | |||
1068 | } | 1022 | } |
1069 | 1023 | ||
1070 | static inline int | 1024 | static inline int |
1071 | ia64_sn_ioif_get_pci_topology(u64 rack, u64 bay, u64 slot, u64 slab, | 1025 | ia64_sn_ioif_get_pci_topology(u64 buf, u64 len) |
1072 | u64 buf, u64 len) | ||
1073 | { | 1026 | { |
1074 | struct ia64_sal_retval rv; | 1027 | struct ia64_sal_retval rv; |
1075 | SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, | 1028 | SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0); |
1076 | rack, bay, slot, slab, buf, len, 0); | ||
1077 | return (int) rv.status; | 1029 | return (int) rv.status; |
1078 | } | 1030 | } |
1079 | 1031 | ||
diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h new file mode 100644 index 000000000000..22879853e46c --- /dev/null +++ b/include/asm-ia64/sn/tioce.h | |||
@@ -0,0 +1,740 @@ | |||
1 | /************************************************************************** | ||
2 | * * | ||
3 | * Unpublished copyright (c) 2005, Silicon Graphics, Inc. * | ||
4 | * THIS IS UNPUBLISHED CONFIDENTIAL AND PROPRIETARY SOURCE CODE OF SGI. * | ||
5 | * * | ||
6 | * The copyright notice above does not evidence any actual or intended * | ||
7 | * publication or disclosure of this source code, which includes * | ||
8 | * information that is confidential and/or proprietary, and is a trade * | ||
9 | * secret, of Silicon Graphics, Inc. ANY REPRODUCTION, MODIFICATION, * | ||
10 | * DISTRIBUTION, PUBLIC PERFORMANCE, OR PUBLIC DISPLAY OF OR THROUGH * | ||
11 | * USE OF THIS SOURCE CODE WITHOUT THE EXPRESS WRITTEN CONSENT OF * | ||
12 | * SILICON GRAPHICS, INC. IS STRICTLY PROHIBITED, AND IN VIOLATION OF * | ||
13 | * APPLICABLE LAWS AND INTERNATIONAL TREATIES. THE RECEIPT OR * | ||
14 | * POSSESSION OF THIS SOURCE CODE AND/OR RELATED INFORMATION DOES NOT * | ||
15 | * CONVEY OR IMPLY ANY RIGHTS TO REPRODUCE, DISCLOSE OR DISTRIBUTE ITS * | ||
16 | * CONTENTS, OR TO MANUFACTURE, USE, OR SELL ANYTHING THAT IT MAY * | ||
17 | * DESCRIBE, IN WHOLE OR IN PART. * | ||
18 | * * | ||
19 | **************************************************************************/ | ||
20 | |||
21 | #ifndef __ASM_IA64_SN_TIOCE_H__ | ||
22 | #define __ASM_IA64_SN_TIOCE_H__ | ||
23 | |||
24 | /* CE ASIC part & mfgr information */ | ||
25 | #define TIOCE_PART_NUM 0xCE00 | ||
26 | #define TIOCE_MFGR_NUM 0x36 | ||
27 | #define TIOCE_REV_A 0x1 | ||
28 | |||
29 | /* CE Virtual PPB Vendor/Device IDs */ | ||
30 | #define CE_VIRT_PPB_VENDOR_ID 0x10a9 | ||
31 | #define CE_VIRT_PPB_DEVICE_ID 0x4002 | ||
32 | |||
33 | /* CE Host Bridge Vendor/Device IDs */ | ||
34 | #define CE_HOST_BRIDGE_VENDOR_ID 0x10a9 | ||
35 | #define CE_HOST_BRIDGE_DEVICE_ID 0x4003 | ||
36 | |||
37 | |||
38 | #define TIOCE_NUM_M40_ATES 4096 | ||
39 | #define TIOCE_NUM_M3240_ATES 2048 | ||
40 | #define TIOCE_NUM_PORTS 2 | ||
41 | |||
42 | /* | ||
43 | * Register layout for TIOCE. MMR offsets are shown at the far right of the | ||
44 | * structure definition. | ||
45 | */ | ||
46 | typedef volatile struct tioce { | ||
47 | /* | ||
48 | * ADMIN : Administration Registers | ||
49 | */ | ||
50 | uint64_t ce_adm_id; /* 0x000000 */ | ||
51 | uint64_t ce_pad_000008; /* 0x000008 */ | ||
52 | uint64_t ce_adm_dyn_credit_status; /* 0x000010 */ | ||
53 | uint64_t ce_adm_last_credit_status; /* 0x000018 */ | ||
54 | uint64_t ce_adm_credit_limit; /* 0x000020 */ | ||
55 | uint64_t ce_adm_force_credit; /* 0x000028 */ | ||
56 | uint64_t ce_adm_control; /* 0x000030 */ | ||
57 | uint64_t ce_adm_mmr_chn_timeout; /* 0x000038 */ | ||
58 | uint64_t ce_adm_ssp_ure_timeout; /* 0x000040 */ | ||
59 | uint64_t ce_adm_ssp_dre_timeout; /* 0x000048 */ | ||
60 | uint64_t ce_adm_ssp_debug_sel; /* 0x000050 */ | ||
61 | uint64_t ce_adm_int_status; /* 0x000058 */ | ||
62 | uint64_t ce_adm_int_status_alias; /* 0x000060 */ | ||
63 | uint64_t ce_adm_int_mask; /* 0x000068 */ | ||
64 | uint64_t ce_adm_int_pending; /* 0x000070 */ | ||
65 | uint64_t ce_adm_force_int; /* 0x000078 */ | ||
66 | uint64_t ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ | ||
67 | uint64_t ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ | ||
68 | uint64_t ce_adm_error_summary; /* 0x000100 */ | ||
69 | uint64_t ce_adm_error_summary_alias; /* 0x000108 */ | ||
70 | uint64_t ce_adm_error_mask; /* 0x000110 */ | ||
71 | uint64_t ce_adm_first_error; /* 0x000118 */ | ||
72 | uint64_t ce_adm_error_overflow; /* 0x000120 */ | ||
73 | uint64_t ce_adm_error_overflow_alias; /* 0x000128 */ | ||
74 | uint64_t ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ | ||
75 | uint64_t ce_adm_tnum_error; /* 0x000140 */ | ||
76 | uint64_t ce_adm_mmr_err_detail; /* 0x000148 */ | ||
77 | uint64_t ce_adm_msg_sram_perr_detail; /* 0x000150 */ | ||
78 | uint64_t ce_adm_bap_sram_perr_detail; /* 0x000158 */ | ||
79 | uint64_t ce_adm_ce_sram_perr_detail; /* 0x000160 */ | ||
80 | uint64_t ce_adm_ce_credit_oflow_detail; /* 0x000168 */ | ||
81 | uint64_t ce_adm_tx_link_idle_max_timer; /* 0x000170 */ | ||
82 | uint64_t ce_adm_pcie_debug_sel; /* 0x000178 */ | ||
83 | uint64_t ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ | ||
84 | |||
85 | uint64_t ce_adm_pcie_debug_sel_top; /* 0x000200 */ | ||
86 | uint64_t ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ | ||
87 | uint64_t ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ | ||
88 | uint64_t ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ | ||
89 | uint64_t ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ | ||
90 | uint64_t ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ | ||
91 | uint64_t ce_adm_pcie_trig_compare_top; /* 0x000230 */ | ||
92 | uint64_t ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ | ||
93 | uint64_t ce_adm_ssp_debug_sel_top; /* 0x000240 */ | ||
94 | uint64_t ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ | ||
95 | uint64_t ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ | ||
96 | uint64_t ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ | ||
97 | uint64_t ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ | ||
98 | uint64_t ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ | ||
99 | uint64_t ce_adm_ssp_trig_compare_top; /* 0x000270 */ | ||
100 | uint64_t ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ | ||
101 | uint64_t ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ | ||
102 | |||
103 | uint64_t ce_adm_bap_ctrl; /* 0x000400 */ | ||
104 | uint64_t ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ | ||
105 | |||
106 | uint64_t ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ | ||
107 | uint64_t ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ | ||
108 | |||
109 | uint64_t ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ | ||
110 | uint64_t ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ | ||
111 | |||
112 | uint64_t ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ | ||
113 | uint64_t ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ | ||
114 | |||
115 | uint64_t ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ | ||
116 | |||
117 | /* | ||
118 | * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2) | ||
119 | * Link#1 MMRs at start at 0x002000, Link#2 MMRs at 0x003000 | ||
120 | * NOTE: the comment offsets at far right: let 'z' = {2 or 3} | ||
121 | */ | ||
122 | #define ce_lsi(link_num) ce_lsi[link_num-1] | ||
123 | struct ce_lsi_reg { | ||
124 | uint64_t ce_lsi_lpu_id; /* 0x00z000 */ | ||
125 | uint64_t ce_lsi_rst; /* 0x00z008 */ | ||
126 | uint64_t ce_lsi_dbg_stat; /* 0x00z010 */ | ||
127 | uint64_t ce_lsi_dbg_cfg; /* 0x00z018 */ | ||
128 | uint64_t ce_lsi_ltssm_ctrl; /* 0x00z020 */ | ||
129 | uint64_t ce_lsi_lk_stat; /* 0x00z028 */ | ||
130 | uint64_t ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ | ||
131 | uint64_t ce_lsi_int_and_stat; /* 0x00z040 */ | ||
132 | uint64_t ce_lsi_int_mask; /* 0x00z048 */ | ||
133 | uint64_t ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ | ||
134 | uint64_t ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ | ||
135 | uint64_t ce_pad_00z108; /* 0x00z108 */ | ||
136 | uint64_t ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ | ||
137 | uint64_t ce_pad_00z118; /* 0x00z118 */ | ||
138 | uint64_t ce_lsi_lk_perf_cnt1; /* 0x00z120 */ | ||
139 | uint64_t ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ | ||
140 | uint64_t ce_lsi_lk_perf_cnt2; /* 0x00z130 */ | ||
141 | uint64_t ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ | ||
142 | uint64_t ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ | ||
143 | uint64_t ce_lsi_lk_lyr_cfg; /* 0x00z200 */ | ||
144 | uint64_t ce_lsi_lk_lyr_status; /* 0x00z208 */ | ||
145 | uint64_t ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ | ||
146 | uint64_t ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ | ||
147 | uint64_t ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ | ||
148 | uint64_t ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ | ||
149 | uint64_t ce_lsi_fc_upd_ctl; /* 0x00z240 */ | ||
150 | uint64_t ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ | ||
151 | uint64_t ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ | ||
152 | uint64_t ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ | ||
153 | uint64_t ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ | ||
154 | uint64_t ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ | ||
155 | uint64_t ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ | ||
156 | uint64_t ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ | ||
157 | uint64_t ce_lsi_rply_tmr_thr; /* 0x00z410 */ | ||
158 | uint64_t ce_lsi_rply_tmr; /* 0x00z418 */ | ||
159 | uint64_t ce_lsi_rply_num_stat; /* 0x00z420 */ | ||
160 | uint64_t ce_lsi_rty_buf_max_addr; /* 0x00z428 */ | ||
161 | uint64_t ce_lsi_rty_fifo_ptr; /* 0x00z430 */ | ||
162 | uint64_t ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ | ||
163 | uint64_t ce_lsi_rty_fifo_cred; /* 0x00z440 */ | ||
164 | uint64_t ce_lsi_seq_cnt; /* 0x00z448 */ | ||
165 | uint64_t ce_lsi_ack_sent_seq_num; /* 0x00z450 */ | ||
166 | uint64_t ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ | ||
167 | uint64_t ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ | ||
168 | uint64_t ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ | ||
169 | uint64_t ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ | ||
170 | uint64_t ce_pad_00z478; /* 0x00z478 */ | ||
171 | uint64_t ce_lsi_mem_addr_ctl; /* 0x00z480 */ | ||
172 | uint64_t ce_lsi_mem_d_ld0; /* 0x00z488 */ | ||
173 | uint64_t ce_lsi_mem_d_ld1; /* 0x00z490 */ | ||
174 | uint64_t ce_lsi_mem_d_ld2; /* 0x00z498 */ | ||
175 | uint64_t ce_lsi_mem_d_ld3; /* 0x00z4A0 */ | ||
176 | uint64_t ce_lsi_mem_d_ld4; /* 0x00z4A8 */ | ||
177 | uint64_t ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ | ||
178 | uint64_t ce_lsi_rty_d_cnt; /* 0x00z4C0 */ | ||
179 | uint64_t ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ | ||
180 | uint64_t ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ | ||
181 | uint64_t ce_pad_00z4D8; /* 0x00z4D8 */ | ||
182 | uint64_t ce_lsi_ack_lat_thr; /* 0x00z4E0 */ | ||
183 | uint64_t ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ | ||
184 | uint64_t ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ | ||
185 | uint64_t ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ | ||
186 | uint64_t ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ | ||
187 | uint64_t ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ | ||
188 | uint64_t ce_lsi_phy_lyr_cfg; /* 0x00z600 */ | ||
189 | uint64_t ce_pad_00z608; /* 0x00z608 */ | ||
190 | uint64_t ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ | ||
191 | uint64_t ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ | ||
192 | uint64_t ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ | ||
193 | uint64_t ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ | ||
194 | uint64_t ce_lsi_rcv_phy_cfg; /* 0x00z680 */ | ||
195 | uint64_t ce_lsi_rcv_phy_stat1; /* 0x00z688 */ | ||
196 | uint64_t ce_lsi_rcv_phy_stat2; /* 0x00z690 */ | ||
197 | uint64_t ce_lsi_rcv_phy_stat3; /* 0x00z698 */ | ||
198 | uint64_t ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ | ||
199 | uint64_t ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ | ||
200 | uint64_t ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ | ||
201 | uint64_t ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ | ||
202 | uint64_t ce_lsi_tx_phy_cfg; /* 0x00z700 */ | ||
203 | uint64_t ce_lsi_tx_phy_stat; /* 0x00z708 */ | ||
204 | uint64_t ce_lsi_tx_phy_int_stat; /* 0x00z710 */ | ||
205 | uint64_t ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ | ||
206 | uint64_t ce_lsi_tx_phy_int_mask; /* 0x00z720 */ | ||
207 | uint64_t ce_lsi_tx_phy_stat2; /* 0x00z728 */ | ||
208 | uint64_t ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ | ||
209 | uint64_t ce_lsi_ltssm_cfg1; /* 0x00z780 */ | ||
210 | uint64_t ce_lsi_ltssm_cfg2; /* 0x00z788 */ | ||
211 | uint64_t ce_lsi_ltssm_cfg3; /* 0x00z790 */ | ||
212 | uint64_t ce_lsi_ltssm_cfg4; /* 0x00z798 */ | ||
213 | uint64_t ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ | ||
214 | uint64_t ce_lsi_ltssm_stat1; /* 0x00z7A8 */ | ||
215 | uint64_t ce_lsi_ltssm_stat2; /* 0x00z7B0 */ | ||
216 | uint64_t ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ | ||
217 | uint64_t ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ | ||
218 | uint64_t ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ | ||
219 | uint64_t ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ | ||
220 | uint64_t ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ | ||
221 | uint64_t ce_lsi_gb_cfg1; /* 0x00z800 */ | ||
222 | uint64_t ce_lsi_gb_cfg2; /* 0x00z808 */ | ||
223 | uint64_t ce_lsi_gb_cfg3; /* 0x00z810 */ | ||
224 | uint64_t ce_lsi_gb_cfg4; /* 0x00z818 */ | ||
225 | uint64_t ce_lsi_gb_stat; /* 0x00z820 */ | ||
226 | uint64_t ce_lsi_gb_int_stat; /* 0x00z828 */ | ||
227 | uint64_t ce_lsi_gb_int_stat_test; /* 0x00z830 */ | ||
228 | uint64_t ce_lsi_gb_int_mask; /* 0x00z838 */ | ||
229 | uint64_t ce_lsi_gb_pwr_dn1; /* 0x00z840 */ | ||
230 | uint64_t ce_lsi_gb_pwr_dn2; /* 0x00z848 */ | ||
231 | uint64_t ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ | ||
232 | } ce_lsi[2]; | ||
233 | |||
234 | uint64_t ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ | ||
235 | |||
236 | /* | ||
237 | * CRM: Coretalk Receive Module Registers | ||
238 | */ | ||
239 | uint64_t ce_crm_debug_mux; /* 0x004050 */ | ||
240 | uint64_t ce_pad_004058; /* 0x004058 */ | ||
241 | uint64_t ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ | ||
242 | uint64_t ce_crm_ssp_err_addr; /* 0x004068 */ | ||
243 | uint64_t ce_crm_ssp_err_syn; /* 0x004070 */ | ||
244 | |||
245 | uint64_t ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ | ||
246 | |||
247 | /* | ||
248 | * CXM: Coretalk Xmit Module Registers | ||
249 | */ | ||
250 | uint64_t ce_cxm_dyn_credit_status; /* 0x005010 */ | ||
251 | uint64_t ce_cxm_last_credit_status; /* 0x005018 */ | ||
252 | uint64_t ce_cxm_credit_limit; /* 0x005020 */ | ||
253 | uint64_t ce_cxm_force_credit; /* 0x005028 */ | ||
254 | uint64_t ce_cxm_disable_bypass; /* 0x005030 */ | ||
255 | uint64_t ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ | ||
256 | uint64_t ce_cxm_debug_mux; /* 0x005050 */ | ||
257 | |||
258 | uint64_t ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ | ||
259 | |||
260 | /* | ||
261 | * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2) | ||
262 | * DTL: Link#1 MMRs at start at 0x006000, Link#2 MMRs at 0x008000 | ||
263 | * DTL: the comment offsets at far right: let 'y' = {6 or 8} | ||
264 | * | ||
265 | * UTL: Downstream Transaction Layer Regs (Link#1 and Link#2) | ||
266 | * UTL: Link#1 MMRs at start at 0x007000, Link#2 MMRs at 0x009000 | ||
267 | * UTL: the comment offsets at far right: let 'z' = {7 or 9} | ||
268 | */ | ||
269 | #define ce_dtl(link_num) ce_dtl_utl[link_num-1] | ||
270 | #define ce_utl(link_num) ce_dtl_utl[link_num-1] | ||
271 | struct ce_dtl_utl_reg { | ||
272 | /* DTL */ | ||
273 | uint64_t ce_dtl_dtdr_credit_limit; /* 0x00y000 */ | ||
274 | uint64_t ce_dtl_dtdr_credit_force; /* 0x00y008 */ | ||
275 | uint64_t ce_dtl_dyn_credit_status; /* 0x00y010 */ | ||
276 | uint64_t ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ | ||
277 | uint64_t ce_dtl_dtl_ctrl; /* 0x00y020 */ | ||
278 | uint64_t ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ | ||
279 | uint64_t ce_dtl_debug_sel; /* 0x00y050 */ | ||
280 | uint64_t ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ | ||
281 | |||
282 | /* UTL */ | ||
283 | uint64_t ce_utl_utl_ctrl; /* 0x00z000 */ | ||
284 | uint64_t ce_utl_debug_sel; /* 0x00z008 */ | ||
285 | uint64_t ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ | ||
286 | } ce_dtl_utl[2]; | ||
287 | |||
288 | uint64_t ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ | ||
289 | |||
290 | /* | ||
291 | * URE: Upstream Request Engine | ||
292 | */ | ||
293 | uint64_t ce_ure_dyn_credit_status; /* 0x00B010 */ | ||
294 | uint64_t ce_ure_last_credit_status; /* 0x00B018 */ | ||
295 | uint64_t ce_ure_credit_limit; /* 0x00B020 */ | ||
296 | uint64_t ce_pad_00B028; /* 0x00B028 */ | ||
297 | uint64_t ce_ure_control; /* 0x00B030 */ | ||
298 | uint64_t ce_ure_status; /* 0x00B038 */ | ||
299 | uint64_t ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ | ||
300 | uint64_t ce_ure_debug_sel; /* 0x00B050 */ | ||
301 | uint64_t ce_ure_pcie_debug_sel; /* 0x00B058 */ | ||
302 | uint64_t ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ | ||
303 | uint64_t ce_ure_ssp_err_addr; /* 0x00B068 */ | ||
304 | uint64_t ce_ure_page_map; /* 0x00B070 */ | ||
305 | uint64_t ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ | ||
306 | uint64_t ce_ure_pipe_sel1; /* 0x00B088 */ | ||
307 | uint64_t ce_ure_pipe_mask1; /* 0x00B090 */ | ||
308 | uint64_t ce_ure_pipe_sel2; /* 0x00B098 */ | ||
309 | uint64_t ce_ure_pipe_mask2; /* 0x00B0A0 */ | ||
310 | uint64_t ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ | ||
311 | uint64_t ce_ure_pcie1_credits_used; /* 0x00B0B0 */ | ||
312 | uint64_t ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ | ||
313 | uint64_t ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ | ||
314 | uint64_t ce_ure_pcie2_credits_used; /* 0x00B0C8 */ | ||
315 | uint64_t ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ | ||
316 | uint64_t ce_ure_pcie_force_credit; /* 0x00B0D8 */ | ||
317 | uint64_t ce_ure_rd_tnum_val; /* 0x00B0E0 */ | ||
318 | uint64_t ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ | ||
319 | uint64_t ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ | ||
320 | uint64_t ce_ure_rd_tnum_error; /* 0x00B0F8 */ | ||
321 | uint64_t ce_ure_rd_tnum_first_cl; /* 0x00B100 */ | ||
322 | uint64_t ce_ure_rd_tnum_link_buf; /* 0x00B108 */ | ||
323 | uint64_t ce_ure_wr_tnum_val; /* 0x00B110 */ | ||
324 | uint64_t ce_ure_sram_err_addr0; /* 0x00B118 */ | ||
325 | uint64_t ce_ure_sram_err_addr1; /* 0x00B120 */ | ||
326 | uint64_t ce_ure_sram_err_addr2; /* 0x00B128 */ | ||
327 | uint64_t ce_ure_sram_rd_addr0; /* 0x00B130 */ | ||
328 | uint64_t ce_ure_sram_rd_addr1; /* 0x00B138 */ | ||
329 | uint64_t ce_ure_sram_rd_addr2; /* 0x00B140 */ | ||
330 | uint64_t ce_ure_sram_wr_addr0; /* 0x00B148 */ | ||
331 | uint64_t ce_ure_sram_wr_addr1; /* 0x00B150 */ | ||
332 | uint64_t ce_ure_sram_wr_addr2; /* 0x00B158 */ | ||
333 | uint64_t ce_ure_buf_flush10; /* 0x00B160 */ | ||
334 | uint64_t ce_ure_buf_flush11; /* 0x00B168 */ | ||
335 | uint64_t ce_ure_buf_flush12; /* 0x00B170 */ | ||
336 | uint64_t ce_ure_buf_flush13; /* 0x00B178 */ | ||
337 | uint64_t ce_ure_buf_flush20; /* 0x00B180 */ | ||
338 | uint64_t ce_ure_buf_flush21; /* 0x00B188 */ | ||
339 | uint64_t ce_ure_buf_flush22; /* 0x00B190 */ | ||
340 | uint64_t ce_ure_buf_flush23; /* 0x00B198 */ | ||
341 | uint64_t ce_ure_pcie_control1; /* 0x00B1A0 */ | ||
342 | uint64_t ce_ure_pcie_control2; /* 0x00B1A8 */ | ||
343 | |||
344 | uint64_t ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ | ||
345 | |||
346 | /* Upstream Data Buffer, Port1 */ | ||
347 | struct ce_ure_maint_ups_dat1_data { | ||
348 | uint64_t data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ | ||
349 | uint64_t data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ | ||
350 | uint64_t parity[512]; /* 0x00E000 -- 0x00EFF8 */ | ||
351 | } ce_ure_maint_ups_dat1; | ||
352 | |||
353 | /* Upstream Header Buffer, Port1 */ | ||
354 | struct ce_ure_maint_ups_hdr1_data { | ||
355 | uint64_t data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ | ||
356 | uint64_t data127_64[512]; /* 0x010000 -- 0x010FF8 */ | ||
357 | uint64_t parity[512]; /* 0x011000 -- 0x011FF8 */ | ||
358 | } ce_ure_maint_ups_hdr1; | ||
359 | |||
360 | /* Upstream Data Buffer, Port2 */ | ||
361 | struct ce_ure_maint_ups_dat2_data { | ||
362 | uint64_t data63_0[512]; /* 0x012000 -- 0x012FF8 */ | ||
363 | uint64_t data127_64[512]; /* 0x013000 -- 0x013FF8 */ | ||
364 | uint64_t parity[512]; /* 0x014000 -- 0x014FF8 */ | ||
365 | } ce_ure_maint_ups_dat2; | ||
366 | |||
367 | /* Upstream Header Buffer, Port2 */ | ||
368 | struct ce_ure_maint_ups_hdr2_data { | ||
369 | uint64_t data63_0[512]; /* 0x015000 -- 0x015FF8 */ | ||
370 | uint64_t data127_64[512]; /* 0x016000 -- 0x016FF8 */ | ||
371 | uint64_t parity[512]; /* 0x017000 -- 0x017FF8 */ | ||
372 | } ce_ure_maint_ups_hdr2; | ||
373 | |||
374 | /* Downstream Data Buffer */ | ||
375 | struct ce_ure_maint_dns_dat_data { | ||
376 | uint64_t data63_0[512]; /* 0x018000 -- 0x018FF8 */ | ||
377 | uint64_t data127_64[512]; /* 0x019000 -- 0x019FF8 */ | ||
378 | uint64_t parity[512]; /* 0x01A000 -- 0x01AFF8 */ | ||
379 | } ce_ure_maint_dns_dat; | ||
380 | |||
381 | /* Downstream Header Buffer */ | ||
382 | struct ce_ure_maint_dns_hdr_data { | ||
383 | uint64_t data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ | ||
384 | uint64_t data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ | ||
385 | uint64_t parity[64]; /* 0x01B400 -- 0x01B5F8 */ | ||
386 | } ce_ure_maint_dns_hdr; | ||
387 | |||
388 | /* RCI Buffer Data */ | ||
389 | struct ce_ure_maint_rci_data { | ||
390 | uint64_t data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ | ||
391 | uint64_t data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ | ||
392 | } ce_ure_maint_rci; | ||
393 | |||
394 | /* Response Queue */ | ||
395 | uint64_t ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ | ||
396 | |||
397 | uint64_t ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ | ||
398 | |||
399 | /* Admin Build-a-Packet Buffer */ | ||
400 | struct ce_adm_maint_bap_buf_data { | ||
401 | uint64_t data63_0[258]; /* 0x024000 -- 0x024808 */ | ||
402 | uint64_t data127_64[258]; /* 0x024810 -- 0x025018 */ | ||
403 | uint64_t parity[258]; /* 0x025020 -- 0x025828 */ | ||
404 | } ce_adm_maint_bap_buf; | ||
405 | |||
406 | uint64_t ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ | ||
407 | |||
408 | /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */ | ||
409 | uint64_t ce_ure_ate40[TIOCE_NUM_M40_ATES]; | ||
410 | |||
411 | /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */ | ||
412 | uint64_t ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; | ||
413 | |||
414 | uint64_t ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ | ||
415 | |||
416 | /* | ||
417 | * DRE: Down Stream Request Engine | ||
418 | */ | ||
419 | uint64_t ce_dre_dyn_credit_status1; /* 0x040010 */ | ||
420 | uint64_t ce_dre_dyn_credit_status2; /* 0x040018 */ | ||
421 | uint64_t ce_dre_last_credit_status1; /* 0x040020 */ | ||
422 | uint64_t ce_dre_last_credit_status2; /* 0x040028 */ | ||
423 | uint64_t ce_dre_credit_limit1; /* 0x040030 */ | ||
424 | uint64_t ce_dre_credit_limit2; /* 0x040038 */ | ||
425 | uint64_t ce_dre_force_credit1; /* 0x040040 */ | ||
426 | uint64_t ce_dre_force_credit2; /* 0x040048 */ | ||
427 | uint64_t ce_dre_debug_mux1; /* 0x040050 */ | ||
428 | uint64_t ce_dre_debug_mux2; /* 0x040058 */ | ||
429 | uint64_t ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ | ||
430 | uint64_t ce_dre_ssp_err_addr; /* 0x040068 */ | ||
431 | uint64_t ce_dre_comp_err_cmd_wrd; /* 0x040070 */ | ||
432 | uint64_t ce_dre_comp_err_addr; /* 0x040078 */ | ||
433 | uint64_t ce_dre_req_status; /* 0x040080 */ | ||
434 | uint64_t ce_dre_config1; /* 0x040088 */ | ||
435 | uint64_t ce_dre_config2; /* 0x040090 */ | ||
436 | uint64_t ce_dre_config_req_status; /* 0x040098 */ | ||
437 | uint64_t ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ | ||
438 | uint64_t ce_dre_dyn_fifo; /* 0x040100 */ | ||
439 | uint64_t ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ | ||
440 | uint64_t ce_dre_last_fifo; /* 0x040120 */ | ||
441 | |||
442 | uint64_t ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ | ||
443 | |||
444 | /* DRE Downstream Head Queue */ | ||
445 | struct ce_dre_maint_ds_head_queue { | ||
446 | uint64_t data63_0[32]; /* 0x040200 -- 0x0402F8 */ | ||
447 | uint64_t data127_64[32]; /* 0x040300 -- 0x0403F8 */ | ||
448 | uint64_t parity[32]; /* 0x040400 -- 0x0404F8 */ | ||
449 | } ce_dre_maint_ds_head_q; | ||
450 | |||
451 | uint64_t ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ | ||
452 | |||
453 | /* DRE Downstream Data Queue */ | ||
454 | struct ce_dre_maint_ds_data_queue { | ||
455 | uint64_t data63_0[256]; /* 0x041000 -- 0x0417F8 */ | ||
456 | uint64_t ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ | ||
457 | uint64_t data127_64[256]; /* 0x042000 -- 0x0427F8 */ | ||
458 | uint64_t ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ | ||
459 | uint64_t parity[256]; /* 0x043000 -- 0x0437F8 */ | ||
460 | uint64_t ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ | ||
461 | } ce_dre_maint_ds_data_q; | ||
462 | |||
463 | /* DRE URE Upstream Response Queue */ | ||
464 | struct ce_dre_maint_ure_us_rsp_queue { | ||
465 | uint64_t data63_0[8]; /* 0x044000 -- 0x044038 */ | ||
466 | uint64_t ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ | ||
467 | uint64_t data127_64[8]; /* 0x044100 -- 0x044138 */ | ||
468 | uint64_t ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ | ||
469 | uint64_t parity[8]; /* 0x044200 -- 0x044238 */ | ||
470 | uint64_t ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ | ||
471 | } ce_dre_maint_ure_us_rsp_q; | ||
472 | |||
473 | uint64_t ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ | ||
474 | |||
475 | uint64_t ce_end_of_struct; /* 0x044400 */ | ||
476 | } tioce_t; | ||
477 | |||
478 | |||
479 | /* ce_adm_int_mask/ce_adm_int_status register bit defines */ | ||
480 | #define CE_ADM_INT_CE_ERROR_SHFT 0 | ||
481 | #define CE_ADM_INT_LSI1_IP_ERROR_SHFT 1 | ||
482 | #define CE_ADM_INT_LSI2_IP_ERROR_SHFT 2 | ||
483 | #define CE_ADM_INT_PCIE_ERROR_SHFT 3 | ||
484 | #define CE_ADM_INT_PORT1_HOTPLUG_EVENT_SHFT 4 | ||
485 | #define CE_ADM_INT_PORT2_HOTPLUG_EVENT_SHFT 5 | ||
486 | #define CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT 6 | ||
487 | #define CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT 7 | ||
488 | #define CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT 8 | ||
489 | #define CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT 9 | ||
490 | #define CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT 10 | ||
491 | #define CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT 11 | ||
492 | #define CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT 12 | ||
493 | #define CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT 13 | ||
494 | #define CE_ADM_INT_PCIE_MSG_SHFT 14 /*see int_dest_14*/ | ||
495 | #define CE_ADM_INT_PCIE_MSG_SLOT_0_SHFT 14 | ||
496 | #define CE_ADM_INT_PCIE_MSG_SLOT_1_SHFT 15 | ||
497 | #define CE_ADM_INT_PCIE_MSG_SLOT_2_SHFT 16 | ||
498 | #define CE_ADM_INT_PCIE_MSG_SLOT_3_SHFT 17 | ||
499 | #define CE_ADM_INT_PORT1_PM_PME_MSG_SHFT 22 | ||
500 | #define CE_ADM_INT_PORT2_PM_PME_MSG_SHFT 23 | ||
501 | |||
502 | /* ce_adm_force_int register bit defines */ | ||
503 | #define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT 0 | ||
504 | #define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT 1 | ||
505 | #define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT 2 | ||
506 | #define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT 3 | ||
507 | #define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT 4 | ||
508 | #define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT 5 | ||
509 | #define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT 6 | ||
510 | #define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT 7 | ||
511 | #define CE_ADM_FORCE_INT_ALWAYS_SHFT 8 | ||
512 | |||
513 | /* ce_adm_int_dest register bit masks & shifts */ | ||
514 | #define INTR_VECTOR_SHFT 56 | ||
515 | |||
516 | /* ce_adm_error_mask and ce_adm_error_summary register bit masks */ | ||
517 | #define CE_ADM_ERR_CRM_SSP_REQ_INVALID (0x1ULL << 0) | ||
518 | #define CE_ADM_ERR_SSP_REQ_HEADER (0x1ULL << 1) | ||
519 | #define CE_ADM_ERR_SSP_RSP_HEADER (0x1ULL << 2) | ||
520 | #define CE_ADM_ERR_SSP_PROTOCOL_ERROR (0x1ULL << 3) | ||
521 | #define CE_ADM_ERR_SSP_SBE (0x1ULL << 4) | ||
522 | #define CE_ADM_ERR_SSP_MBE (0x1ULL << 5) | ||
523 | #define CE_ADM_ERR_CXM_CREDIT_OFLOW (0x1ULL << 6) | ||
524 | #define CE_ADM_ERR_DRE_SSP_REQ_INVAL (0x1ULL << 7) | ||
525 | #define CE_ADM_ERR_SSP_REQ_LONG (0x1ULL << 8) | ||
526 | #define CE_ADM_ERR_SSP_REQ_OFLOW (0x1ULL << 9) | ||
527 | #define CE_ADM_ERR_SSP_REQ_SHORT (0x1ULL << 10) | ||
528 | #define CE_ADM_ERR_SSP_REQ_SIDEBAND (0x1ULL << 11) | ||
529 | #define CE_ADM_ERR_SSP_REQ_ADDR_ERR (0x1ULL << 12) | ||
530 | #define CE_ADM_ERR_SSP_REQ_BAD_BE (0x1ULL << 13) | ||
531 | #define CE_ADM_ERR_PCIE_COMPL_TIMEOUT (0x1ULL << 14) | ||
532 | #define CE_ADM_ERR_PCIE_UNEXP_COMPL (0x1ULL << 15) | ||
533 | #define CE_ADM_ERR_PCIE_ERR_COMPL (0x1ULL << 16) | ||
534 | #define CE_ADM_ERR_DRE_CREDIT_OFLOW (0x1ULL << 17) | ||
535 | #define CE_ADM_ERR_DRE_SRAM_PE (0x1ULL << 18) | ||
536 | #define CE_ADM_ERR_SSP_RSP_INVALID (0x1ULL << 19) | ||
537 | #define CE_ADM_ERR_SSP_RSP_LONG (0x1ULL << 20) | ||
538 | #define CE_ADM_ERR_SSP_RSP_SHORT (0x1ULL << 21) | ||
539 | #define CE_ADM_ERR_SSP_RSP_SIDEBAND (0x1ULL << 22) | ||
540 | #define CE_ADM_ERR_URE_SSP_RSP_UNEXP (0x1ULL << 23) | ||
541 | #define CE_ADM_ERR_URE_SSP_WR_REQ_TIMEOUT (0x1ULL << 24) | ||
542 | #define CE_ADM_ERR_URE_SSP_RD_REQ_TIMEOUT (0x1ULL << 25) | ||
543 | #define CE_ADM_ERR_URE_ATE3240_PAGE_FAULT (0x1ULL << 26) | ||
544 | #define CE_ADM_ERR_URE_ATE40_PAGE_FAULT (0x1ULL << 27) | ||
545 | #define CE_ADM_ERR_URE_CREDIT_OFLOW (0x1ULL << 28) | ||
546 | #define CE_ADM_ERR_URE_SRAM_PE (0x1ULL << 29) | ||
547 | #define CE_ADM_ERR_ADM_SSP_RSP_UNEXP (0x1ULL << 30) | ||
548 | #define CE_ADM_ERR_ADM_SSP_REQ_TIMEOUT (0x1ULL << 31) | ||
549 | #define CE_ADM_ERR_MMR_ACCESS_ERROR (0x1ULL << 32) | ||
550 | #define CE_ADM_ERR_MMR_ADDR_ERROR (0x1ULL << 33) | ||
551 | #define CE_ADM_ERR_ADM_CREDIT_OFLOW (0x1ULL << 34) | ||
552 | #define CE_ADM_ERR_ADM_SRAM_PE (0x1ULL << 35) | ||
553 | #define CE_ADM_ERR_DTL1_MIN_PDATA_CREDIT_ERR (0x1ULL << 36) | ||
554 | #define CE_ADM_ERR_DTL1_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 37) | ||
555 | #define CE_ADM_ERR_DTL1_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 38) | ||
556 | #define CE_ADM_ERR_DTL1_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 39) | ||
557 | #define CE_ADM_ERR_DTL1_COMP_HD_CRED_MAX_ERR (0x1ULL << 40) | ||
558 | #define CE_ADM_ERR_DTL1_COMP_D_CRED_MAX_ERR (0x1ULL << 41) | ||
559 | #define CE_ADM_ERR_DTL1_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 42) | ||
560 | #define CE_ADM_ERR_DTL1_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 43) | ||
561 | #define CE_ADM_ERR_DTL1_POSTED_HD_CRED_MAX_ERR (0x1ULL << 44) | ||
562 | #define CE_ADM_ERR_DTL1_POSTED_D_CRED_MAX_ERR (0x1ULL << 45) | ||
563 | #define CE_ADM_ERR_DTL2_MIN_PDATA_CREDIT_ERR (0x1ULL << 46) | ||
564 | #define CE_ADM_ERR_DTL2_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 47) | ||
565 | #define CE_ADM_ERR_DTL2_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 48) | ||
566 | #define CE_ADM_ERR_DTL2_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 49) | ||
567 | #define CE_ADM_ERR_DTL2_COMP_HD_CRED_MAX_ERR (0x1ULL << 50) | ||
568 | #define CE_ADM_ERR_DTL2_COMP_D_CRED_MAX_ERR (0x1ULL << 51) | ||
569 | #define CE_ADM_ERR_DTL2_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 52) | ||
570 | #define CE_ADM_ERR_DTL2_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 53) | ||
571 | #define CE_ADM_ERR_DTL2_POSTED_HD_CRED_MAX_ERR (0x1ULL << 54) | ||
572 | #define CE_ADM_ERR_DTL2_POSTED_D_CRED_MAX_ERR (0x1ULL << 55) | ||
573 | #define CE_ADM_ERR_PORT1_PCIE_COR_ERR (0x1ULL << 56) | ||
574 | #define CE_ADM_ERR_PORT1_PCIE_NFAT_ERR (0x1ULL << 57) | ||
575 | #define CE_ADM_ERR_PORT1_PCIE_FAT_ERR (0x1ULL << 58) | ||
576 | #define CE_ADM_ERR_PORT2_PCIE_COR_ERR (0x1ULL << 59) | ||
577 | #define CE_ADM_ERR_PORT2_PCIE_NFAT_ERR (0x1ULL << 60) | ||
578 | #define CE_ADM_ERR_PORT2_PCIE_FAT_ERR (0x1ULL << 61) | ||
579 | |||
580 | /* ce_adm_ure_ups_buf_barrier_flush register bit masks and shifts */ | ||
581 | #define FLUSH_SEL_PORT1_PIPE0_SHFT 0 | ||
582 | #define FLUSH_SEL_PORT1_PIPE1_SHFT 4 | ||
583 | #define FLUSH_SEL_PORT1_PIPE2_SHFT 8 | ||
584 | #define FLUSH_SEL_PORT1_PIPE3_SHFT 12 | ||
585 | #define FLUSH_SEL_PORT2_PIPE0_SHFT 16 | ||
586 | #define FLUSH_SEL_PORT2_PIPE1_SHFT 20 | ||
587 | #define FLUSH_SEL_PORT2_PIPE2_SHFT 24 | ||
588 | #define FLUSH_SEL_PORT2_PIPE3_SHFT 28 | ||
589 | |||
590 | /* ce_dre_config1 register bit masks and shifts */ | ||
591 | #define CE_DRE_RO_ENABLE (0x1ULL << 0) | ||
592 | #define CE_DRE_DYN_RO_ENABLE (0x1ULL << 1) | ||
593 | #define CE_DRE_SUP_CONFIG_COMP_ERROR (0x1ULL << 2) | ||
594 | #define CE_DRE_SUP_IO_COMP_ERROR (0x1ULL << 3) | ||
595 | #define CE_DRE_ADDR_MODE_SHFT 4 | ||
596 | |||
597 | /* ce_dre_config_req_status register bit masks */ | ||
598 | #define CE_DRE_LAST_CONFIG_COMPLETION (0x7ULL << 0) | ||
599 | #define CE_DRE_DOWNSTREAM_CONFIG_ERROR (0x1ULL << 3) | ||
600 | #define CE_DRE_CONFIG_COMPLETION_VALID (0x1ULL << 4) | ||
601 | #define CE_DRE_CONFIG_REQUEST_ACTIVE (0x1ULL << 5) | ||
602 | |||
603 | /* ce_ure_control register bit masks & shifts */ | ||
604 | #define CE_URE_RD_MRG_ENABLE (0x1ULL << 0) | ||
605 | #define CE_URE_WRT_MRG_ENABLE1 (0x1ULL << 4) | ||
606 | #define CE_URE_WRT_MRG_ENABLE2 (0x1ULL << 5) | ||
607 | #define CE_URE_RSPQ_BYPASS_DISABLE (0x1ULL << 24) | ||
608 | #define CE_URE_UPS_DAT1_PAR_DISABLE (0x1ULL << 32) | ||
609 | #define CE_URE_UPS_HDR1_PAR_DISABLE (0x1ULL << 33) | ||
610 | #define CE_URE_UPS_DAT2_PAR_DISABLE (0x1ULL << 34) | ||
611 | #define CE_URE_UPS_HDR2_PAR_DISABLE (0x1ULL << 35) | ||
612 | #define CE_URE_ATE_PAR_DISABLE (0x1ULL << 36) | ||
613 | #define CE_URE_RCI_PAR_DISABLE (0x1ULL << 37) | ||
614 | #define CE_URE_RSPQ_PAR_DISABLE (0x1ULL << 38) | ||
615 | #define CE_URE_DNS_DAT_PAR_DISABLE (0x1ULL << 39) | ||
616 | #define CE_URE_DNS_HDR_PAR_DISABLE (0x1ULL << 40) | ||
617 | #define CE_URE_MALFORM_DISABLE (0x1ULL << 44) | ||
618 | #define CE_URE_UNSUP_DISABLE (0x1ULL << 45) | ||
619 | |||
620 | /* ce_ure_page_map register bit masks & shifts */ | ||
621 | #define CE_URE_ATE3240_ENABLE (0x1ULL << 0) | ||
622 | #define CE_URE_ATE40_ENABLE (0x1ULL << 1) | ||
623 | #define CE_URE_PAGESIZE_SHFT 4 | ||
624 | #define CE_URE_PAGESIZE_MASK (0x7ULL << CE_URE_PAGESIZE_SHFT) | ||
625 | #define CE_URE_4K_PAGESIZE (0x0ULL << CE_URE_PAGESIZE_SHFT) | ||
626 | #define CE_URE_16K_PAGESIZE (0x1ULL << CE_URE_PAGESIZE_SHFT) | ||
627 | #define CE_URE_64K_PAGESIZE (0x2ULL << CE_URE_PAGESIZE_SHFT) | ||
628 | #define CE_URE_128K_PAGESIZE (0x3ULL << CE_URE_PAGESIZE_SHFT) | ||
629 | #define CE_URE_256K_PAGESIZE (0x4ULL << CE_URE_PAGESIZE_SHFT) | ||
630 | |||
631 | /* ce_ure_pipe_sel register bit masks & shifts */ | ||
632 | #define PKT_TRAFIC_SHRT 16 | ||
633 | #define BUS_SRC_ID_SHFT 8 | ||
634 | #define DEV_SRC_ID_SHFT 3 | ||
635 | #define FNC_SRC_ID_SHFT 0 | ||
636 | #define CE_URE_TC_MASK (0x07ULL << PKT_TRAFIC_SHRT) | ||
637 | #define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT) | ||
638 | #define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT) | ||
639 | #define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT) | ||
640 | #define CE_URE_PIPE_BUS(b) (((uint64_t)(b) << BUS_SRC_ID_SHFT) & \ | ||
641 | CE_URE_BUS_MASK) | ||
642 | #define CE_URE_PIPE_DEV(d) (((uint64_t)(d) << DEV_SRC_ID_SHFT) & \ | ||
643 | CE_URE_DEV_MASK) | ||
644 | #define CE_URE_PIPE_FNC(f) (((uint64_t)(f) << FNC_SRC_ID_SHFT) & \ | ||
645 | CE_URE_FNC_MASK) | ||
646 | |||
647 | #define CE_URE_SEL1_SHFT 0 | ||
648 | #define CE_URE_SEL2_SHFT 20 | ||
649 | #define CE_URE_SEL3_SHFT 40 | ||
650 | #define CE_URE_SEL1_MASK (0x7FFFFULL << CE_URE_SEL1_SHFT) | ||
651 | #define CE_URE_SEL2_MASK (0x7FFFFULL << CE_URE_SEL2_SHFT) | ||
652 | #define CE_URE_SEL3_MASK (0x7FFFFULL << CE_URE_SEL3_SHFT) | ||
653 | |||
654 | |||
655 | /* ce_ure_pipe_mask register bit masks & shifts */ | ||
656 | #define CE_URE_MASK1_SHFT 0 | ||
657 | #define CE_URE_MASK2_SHFT 20 | ||
658 | #define CE_URE_MASK3_SHFT 40 | ||
659 | #define CE_URE_MASK1_MASK (0x7FFFFULL << CE_URE_MASK1_SHFT) | ||
660 | #define CE_URE_MASK2_MASK (0x7FFFFULL << CE_URE_MASK2_SHFT) | ||
661 | #define CE_URE_MASK3_MASK (0x7FFFFULL << CE_URE_MASK3_SHFT) | ||
662 | |||
663 | |||
664 | /* ce_ure_pcie_control1 register bit masks & shifts */ | ||
665 | #define CE_URE_SI (0x1ULL << 0) | ||
666 | #define CE_URE_ELAL_SHFT 4 | ||
667 | #define CE_URE_ELAL_MASK (0x7ULL << CE_URE_ELAL_SHFT) | ||
668 | #define CE_URE_ELAL1_SHFT 8 | ||
669 | #define CE_URE_ELAL1_MASK (0x7ULL << CE_URE_ELAL1_SHFT) | ||
670 | #define CE_URE_SCC (0x1ULL << 12) | ||
671 | #define CE_URE_PN1_SHFT 16 | ||
672 | #define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT) | ||
673 | #define CE_URE_PN2_SHFT 24 | ||
674 | #define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT) | ||
675 | #define CE_URE_PN1_SET(n) (((uint64_t)(n) << CE_URE_PN1_SHFT) & \ | ||
676 | CE_URE_PN1_MASK) | ||
677 | #define CE_URE_PN2_SET(n) (((uint64_t)(n) << CE_URE_PN2_SHFT) & \ | ||
678 | CE_URE_PN2_MASK) | ||
679 | |||
680 | /* ce_ure_pcie_control2 register bit masks & shifts */ | ||
681 | #define CE_URE_ABP (0x1ULL << 0) | ||
682 | #define CE_URE_PCP (0x1ULL << 1) | ||
683 | #define CE_URE_MSP (0x1ULL << 2) | ||
684 | #define CE_URE_AIP (0x1ULL << 3) | ||
685 | #define CE_URE_PIP (0x1ULL << 4) | ||
686 | #define CE_URE_HPS (0x1ULL << 5) | ||
687 | #define CE_URE_HPC (0x1ULL << 6) | ||
688 | #define CE_URE_SPLV_SHFT 7 | ||
689 | #define CE_URE_SPLV_MASK (0xFFULL << CE_URE_SPLV_SHFT) | ||
690 | #define CE_URE_SPLS_SHFT 15 | ||
691 | #define CE_URE_SPLS_MASK (0x3ULL << CE_URE_SPLS_SHFT) | ||
692 | #define CE_URE_PSN1_SHFT 19 | ||
693 | #define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT) | ||
694 | #define CE_URE_PSN2_SHFT 32 | ||
695 | #define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT) | ||
696 | #define CE_URE_PSN1_SET(n) (((uint64_t)(n) << CE_URE_PSN1_SHFT) & \ | ||
697 | CE_URE_PSN1_MASK) | ||
698 | #define CE_URE_PSN2_SET(n) (((uint64_t)(n) << CE_URE_PSN2_SHFT) & \ | ||
699 | CE_URE_PSN2_MASK) | ||
700 | |||
701 | /* | ||
702 | * PIO address space ranges for CE | ||
703 | */ | ||
704 | |||
705 | /* Local CE Registers Space */ | ||
706 | #define CE_PIO_MMR 0x00000000 | ||
707 | #define CE_PIO_MMR_LEN 0x04000000 | ||
708 | |||
709 | /* PCI Compatible Config Space */ | ||
710 | #define CE_PIO_CONFIG_SPACE 0x04000000 | ||
711 | #define CE_PIO_CONFIG_SPACE_LEN 0x04000000 | ||
712 | |||
713 | /* PCI I/O Space Alias */ | ||
714 | #define CE_PIO_IO_SPACE_ALIAS 0x08000000 | ||
715 | #define CE_PIO_IO_SPACE_ALIAS_LEN 0x08000000 | ||
716 | |||
717 | /* PCI Enhanced Config Space */ | ||
718 | #define CE_PIO_E_CONFIG_SPACE 0x10000000 | ||
719 | #define CE_PIO_E_CONFIG_SPACE_LEN 0x10000000 | ||
720 | |||
721 | /* PCI I/O Space */ | ||
722 | #define CE_PIO_IO_SPACE 0x100000000 | ||
723 | #define CE_PIO_IO_SPACE_LEN 0x100000000 | ||
724 | |||
725 | /* PCI MEM Space */ | ||
726 | #define CE_PIO_MEM_SPACE 0x200000000 | ||
727 | #define CE_PIO_MEM_SPACE_LEN TIO_HWIN_SIZE | ||
728 | |||
729 | |||
730 | /* | ||
731 | * CE PCI Enhanced Config Space shifts & masks | ||
732 | */ | ||
733 | #define CE_E_CONFIG_BUS_SHFT 20 | ||
734 | #define CE_E_CONFIG_BUS_MASK (0xFF << CE_E_CONFIG_BUS_SHFT) | ||
735 | #define CE_E_CONFIG_DEVICE_SHFT 15 | ||
736 | #define CE_E_CONFIG_DEVICE_MASK (0x1F << CE_E_CONFIG_DEVICE_SHFT) | ||
737 | #define CE_E_CONFIG_FUNC_SHFT 12 | ||
738 | #define CE_E_CONFIG_FUNC_MASK (0x7 << CE_E_CONFIG_FUNC_SHFT) | ||
739 | |||
740 | #endif /* __ASM_IA64_SN_TIOCE_H__ */ | ||
diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h new file mode 100644 index 000000000000..7f63dec0a79a --- /dev/null +++ b/include/asm-ia64/sn/tioce_provider.h | |||
@@ -0,0 +1,66 @@ | |||
1 | /************************************************************************** | ||
2 | * Copyright (C) 2005, Silicon Graphics, Inc. * | ||
3 | * * | ||
4 | * These coded instructions, statements, and computer programs contain * | ||
5 | * unpublished proprietary information of Silicon Graphics, Inc., and * | ||
6 | * are protected by Federal copyright law. They may not be disclosed * | ||
7 | * to third parties or copied or duplicated in any form, in whole or * | ||
8 | * in part, without the prior written consent of Silicon Graphics, Inc. * | ||
9 | * * | ||
10 | **************************************************************************/ | ||
11 | |||
12 | #ifndef _ASM_IA64_SN_CE_PROVIDER_H | ||
13 | #define _ASM_IA64_SN_CE_PROVIDER_H | ||
14 | |||
15 | #include <asm/sn/pcibus_provider_defs.h> | ||
16 | #include <asm/sn/tioce.h> | ||
17 | |||
18 | /* | ||
19 | * Common TIOCE structure shared between the prom and kernel | ||
20 | * | ||
21 | * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES TO THE | ||
22 | * PROM VERSION. | ||
23 | */ | ||
24 | struct tioce_common { | ||
25 | struct pcibus_bussoft ce_pcibus; /* common pciio header */ | ||
26 | |||
27 | uint32_t ce_rev; | ||
28 | uint64_t ce_kernel_private; | ||
29 | uint64_t ce_prom_private; | ||
30 | }; | ||
31 | |||
32 | struct tioce_kernel { | ||
33 | struct tioce_common *ce_common; | ||
34 | spinlock_t ce_lock; | ||
35 | struct list_head ce_dmamap_list; | ||
36 | |||
37 | uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES]; | ||
38 | uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; | ||
39 | uint32_t ce_ate3240_pagesize; | ||
40 | |||
41 | uint8_t ce_port1_secondary; | ||
42 | |||
43 | /* per-port resources */ | ||
44 | struct { | ||
45 | int dirmap_refcnt; | ||
46 | uint64_t dirmap_shadow; | ||
47 | } ce_port[TIOCE_NUM_PORTS]; | ||
48 | }; | ||
49 | |||
50 | struct tioce_dmamap { | ||
51 | struct list_head ce_dmamap_list; /* headed by tioce_kernel */ | ||
52 | uint32_t refcnt; | ||
53 | |||
54 | uint64_t nbytes; /* # bytes mapped */ | ||
55 | |||
56 | uint64_t ct_start; /* coretalk start address */ | ||
57 | uint64_t pci_start; /* bus start address */ | ||
58 | |||
59 | uint64_t *ate_hw; /* hw ptr of first ate in map */ | ||
60 | uint64_t *ate_shadow; /* shadow ptr of firat ate */ | ||
61 | uint16_t ate_count; /* # ate's in the map */ | ||
62 | }; | ||
63 | |||
64 | extern int tioce_init_provider(void); | ||
65 | |||
66 | #endif /* __ASM_IA64_SN_CE_PROVIDER_H */ | ||
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h index 909936f25512..d2430aa0d49d 100644 --- a/include/asm-ia64/spinlock.h +++ b/include/asm-ia64/spinlock.h | |||
@@ -93,7 +93,15 @@ _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags) | |||
93 | # endif /* CONFIG_MCKINLEY */ | 93 | # endif /* CONFIG_MCKINLEY */ |
94 | #endif | 94 | #endif |
95 | } | 95 | } |
96 | |||
96 | #define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0) | 97 | #define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0) |
98 | |||
99 | /* Unlock by doing an ordered store and releasing the cacheline with nta */ | ||
100 | static inline void _raw_spin_unlock(spinlock_t *x) { | ||
101 | barrier(); | ||
102 | asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x)); | ||
103 | } | ||
104 | |||
97 | #else /* !ASM_SUPPORTED */ | 105 | #else /* !ASM_SUPPORTED */ |
98 | #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) | 106 | #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) |
99 | # define _raw_spin_lock(x) \ | 107 | # define _raw_spin_lock(x) \ |
@@ -109,16 +117,16 @@ do { \ | |||
109 | } while (ia64_spinlock_val); \ | 117 | } while (ia64_spinlock_val); \ |
110 | } \ | 118 | } \ |
111 | } while (0) | 119 | } while (0) |
120 | #define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0) | ||
112 | #endif /* !ASM_SUPPORTED */ | 121 | #endif /* !ASM_SUPPORTED */ |
113 | 122 | ||
114 | #define spin_is_locked(x) ((x)->lock != 0) | 123 | #define spin_is_locked(x) ((x)->lock != 0) |
115 | #define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0) | ||
116 | #define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) | 124 | #define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) |
117 | #define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) | 125 | #define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) |
118 | 126 | ||
119 | typedef struct { | 127 | typedef struct { |
120 | volatile unsigned int read_counter : 31; | 128 | volatile unsigned int read_counter : 24; |
121 | volatile unsigned int write_lock : 1; | 129 | volatile unsigned int write_lock : 8; |
122 | #ifdef CONFIG_PREEMPT | 130 | #ifdef CONFIG_PREEMPT |
123 | unsigned int break_lock; | 131 | unsigned int break_lock; |
124 | #endif | 132 | #endif |
@@ -174,6 +182,13 @@ do { \ | |||
174 | (result == 0); \ | 182 | (result == 0); \ |
175 | }) | 183 | }) |
176 | 184 | ||
185 | static inline void _raw_write_unlock(rwlock_t *x) | ||
186 | { | ||
187 | u8 *y = (u8 *)x; | ||
188 | barrier(); | ||
189 | asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" ); | ||
190 | } | ||
191 | |||
177 | #else /* !ASM_SUPPORTED */ | 192 | #else /* !ASM_SUPPORTED */ |
178 | 193 | ||
179 | #define _raw_write_lock(l) \ | 194 | #define _raw_write_lock(l) \ |
@@ -195,14 +210,14 @@ do { \ | |||
195 | (ia64_val == 0); \ | 210 | (ia64_val == 0); \ |
196 | }) | 211 | }) |
197 | 212 | ||
213 | static inline void _raw_write_unlock(rwlock_t *x) | ||
214 | { | ||
215 | barrier(); | ||
216 | x->write_lock = 0; | ||
217 | } | ||
218 | |||
198 | #endif /* !ASM_SUPPORTED */ | 219 | #endif /* !ASM_SUPPORTED */ |
199 | 220 | ||
200 | #define _raw_read_trylock(lock) generic_raw_read_trylock(lock) | 221 | #define _raw_read_trylock(lock) generic_raw_read_trylock(lock) |
201 | 222 | ||
202 | #define _raw_write_unlock(x) \ | ||
203 | ({ \ | ||
204 | smp_mb__before_clear_bit(); /* need barrier before releasing lock... */ \ | ||
205 | clear_bit(31, (x)); \ | ||
206 | }) | ||
207 | |||
208 | #endif /* _ASM_IA64_SPINLOCK_H */ | 223 | #endif /* _ASM_IA64_SPINLOCK_H */ |
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h index cd2cf76b2db1..33256db4a7cf 100644 --- a/include/asm-ia64/system.h +++ b/include/asm-ia64/system.h | |||
@@ -19,12 +19,13 @@ | |||
19 | #include <asm/pal.h> | 19 | #include <asm/pal.h> |
20 | #include <asm/percpu.h> | 20 | #include <asm/percpu.h> |
21 | 21 | ||
22 | #define GATE_ADDR __IA64_UL_CONST(0xa000000000000000) | 22 | #define GATE_ADDR RGN_BASE(RGN_GATE) |
23 | |||
23 | /* | 24 | /* |
24 | * 0xa000000000000000+2*PERCPU_PAGE_SIZE | 25 | * 0xa000000000000000+2*PERCPU_PAGE_SIZE |
25 | * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page) | 26 | * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page) |
26 | */ | 27 | */ |
27 | #define KERNEL_START __IA64_UL_CONST(0xa000000100000000) | 28 | #define KERNEL_START (GATE_ADDR+0x100000000) |
28 | #define PERCPU_ADDR (-PERCPU_PAGE_SIZE) | 29 | #define PERCPU_ADDR (-PERCPU_PAGE_SIZE) |
29 | 30 | ||
30 | #ifndef __ASSEMBLY__ | 31 | #ifndef __ASSEMBLY__ |
diff --git a/include/asm-m68knommu/page.h b/include/asm-m68knommu/page.h index 05e03df0ec29..ff6a9265ed1c 100644 --- a/include/asm-m68knommu/page.h +++ b/include/asm-m68knommu/page.h | |||
@@ -73,8 +73,8 @@ extern unsigned long memory_end; | |||
73 | 73 | ||
74 | #ifndef __ASSEMBLY__ | 74 | #ifndef __ASSEMBLY__ |
75 | 75 | ||
76 | #define __pa(vaddr) virt_to_phys((void *)vaddr) | 76 | #define __pa(vaddr) virt_to_phys((void *)(vaddr)) |
77 | #define __va(paddr) phys_to_virt((unsigned long)paddr) | 77 | #define __va(paddr) phys_to_virt((unsigned long)(paddr)) |
78 | 78 | ||
79 | #define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) | 79 | #define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) |
80 | #define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) | 80 | #define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) |
@@ -84,6 +84,7 @@ extern unsigned long memory_end; | |||
84 | 84 | ||
85 | #define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) | 85 | #define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) |
86 | #define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) | 86 | #define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) |
87 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | ||
87 | 88 | ||
88 | #define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ | 89 | #define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ |
89 | ((void *)(kaddr) < (void *)memory_end)) | 90 | ((void *)(kaddr) < (void *)memory_end)) |
diff --git a/include/linux/cpu.h b/include/linux/cpu.h index e8904c0da686..86980c68234a 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h | |||
@@ -8,7 +8,7 @@ | |||
8 | * Basic handling of the devices is done in drivers/base/cpu.c | 8 | * Basic handling of the devices is done in drivers/base/cpu.c |
9 | * and system devices are handled in drivers/base/sys.c. | 9 | * and system devices are handled in drivers/base/sys.c. |
10 | * | 10 | * |
11 | * CPUs are exported via driverfs in the class/cpu/devices/ | 11 | * CPUs are exported via sysfs in the class/cpu/devices/ |
12 | * directory. | 12 | * directory. |
13 | * | 13 | * |
14 | * Per-cpu interfaces can be implemented using a struct device_interface. | 14 | * Per-cpu interfaces can be implemented using a struct device_interface. |
diff --git a/include/linux/serial.h b/include/linux/serial.h index 9f2d85284d0b..12cd9cf65e8f 100644 --- a/include/linux/serial.h +++ b/include/linux/serial.h | |||
@@ -176,10 +176,6 @@ struct serial_icounter_struct { | |||
176 | #ifdef __KERNEL__ | 176 | #ifdef __KERNEL__ |
177 | #include <linux/compiler.h> | 177 | #include <linux/compiler.h> |
178 | 178 | ||
179 | /* Export to allow PCMCIA to use this - Dave Hinds */ | ||
180 | extern int __deprecated register_serial(struct serial_struct *req); | ||
181 | extern void __deprecated unregister_serial(int line); | ||
182 | |||
183 | /* Allow architectures to override entries in serial8250_ports[] at run time: */ | 179 | /* Allow architectures to override entries in serial8250_ports[] at run time: */ |
184 | struct uart_port; /* forward declaration */ | 180 | struct uart_port; /* forward declaration */ |
185 | extern int early_serial_setup(struct uart_port *port); | 181 | extern int early_serial_setup(struct uart_port *port); |
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index 3e3c1fa35b06..d8a023d804d4 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h | |||
@@ -14,6 +14,9 @@ | |||
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
16 | 16 | ||
17 | /* | ||
18 | * This is the platform device platform_data structure | ||
19 | */ | ||
17 | struct plat_serial8250_port { | 20 | struct plat_serial8250_port { |
18 | unsigned long iobase; /* io base address */ | 21 | unsigned long iobase; /* io base address */ |
19 | void __iomem *membase; /* ioremap cookie or NULL */ | 22 | void __iomem *membase; /* ioremap cookie or NULL */ |
@@ -26,4 +29,17 @@ struct plat_serial8250_port { | |||
26 | unsigned int flags; /* UPF_* flags */ | 29 | unsigned int flags; /* UPF_* flags */ |
27 | }; | 30 | }; |
28 | 31 | ||
32 | /* | ||
33 | * This should be used by drivers which want to register | ||
34 | * their own 8250 ports without registering their own | ||
35 | * platform device. Using these will make your driver | ||
36 | * dependent on the 8250 driver. | ||
37 | */ | ||
38 | struct uart_port; | ||
39 | |||
40 | int serial8250_register_port(struct uart_port *); | ||
41 | void serial8250_unregister_port(int line); | ||
42 | void serial8250_suspend_port(int line); | ||
43 | void serial8250_resume_port(int line); | ||
44 | |||
29 | #endif | 45 | #endif |
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index f6fca8f2f3ca..cf0f64ea2bc0 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h | |||
@@ -142,8 +142,8 @@ struct uart_ops { | |||
142 | unsigned int (*tx_empty)(struct uart_port *); | 142 | unsigned int (*tx_empty)(struct uart_port *); |
143 | void (*set_mctrl)(struct uart_port *, unsigned int mctrl); | 143 | void (*set_mctrl)(struct uart_port *, unsigned int mctrl); |
144 | unsigned int (*get_mctrl)(struct uart_port *); | 144 | unsigned int (*get_mctrl)(struct uart_port *); |
145 | void (*stop_tx)(struct uart_port *, unsigned int tty_stop); | 145 | void (*stop_tx)(struct uart_port *); |
146 | void (*start_tx)(struct uart_port *, unsigned int tty_start); | 146 | void (*start_tx)(struct uart_port *); |
147 | void (*send_xchar)(struct uart_port *, char ch); | 147 | void (*send_xchar)(struct uart_port *, char ch); |
148 | void (*stop_rx)(struct uart_port *); | 148 | void (*stop_rx)(struct uart_port *); |
149 | void (*enable_ms)(struct uart_port *); | 149 | void (*enable_ms)(struct uart_port *); |
@@ -360,8 +360,6 @@ struct tty_driver *uart_console_device(struct console *co, int *index); | |||
360 | */ | 360 | */ |
361 | int uart_register_driver(struct uart_driver *uart); | 361 | int uart_register_driver(struct uart_driver *uart); |
362 | void uart_unregister_driver(struct uart_driver *uart); | 362 | void uart_unregister_driver(struct uart_driver *uart); |
363 | void __deprecated uart_unregister_port(struct uart_driver *reg, int line); | ||
364 | int __deprecated uart_register_port(struct uart_driver *reg, struct uart_port *port); | ||
365 | int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); | 363 | int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); |
366 | int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); | 364 | int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); |
367 | int uart_match_port(struct uart_port *port1, struct uart_port *port2); | 365 | int uart_match_port(struct uart_port *port1, struct uart_port *port2); |
@@ -468,13 +466,13 @@ uart_handle_cts_change(struct uart_port *port, unsigned int status) | |||
468 | if (tty->hw_stopped) { | 466 | if (tty->hw_stopped) { |
469 | if (status) { | 467 | if (status) { |
470 | tty->hw_stopped = 0; | 468 | tty->hw_stopped = 0; |
471 | port->ops->start_tx(port, 0); | 469 | port->ops->start_tx(port); |
472 | uart_write_wakeup(port); | 470 | uart_write_wakeup(port); |
473 | } | 471 | } |
474 | } else { | 472 | } else { |
475 | if (!status) { | 473 | if (!status) { |
476 | tty->hw_stopped = 1; | 474 | tty->hw_stopped = 1; |
477 | port->ops->stop_tx(port, 0); | 475 | port->ops->stop_tx(port); |
478 | } | 476 | } |
479 | } | 477 | } |
480 | } | 478 | } |
diff --git a/init/do_mounts.c b/init/do_mounts.c index 4e11a9aaf14a..b27c11064409 100644 --- a/init/do_mounts.c +++ b/init/do_mounts.c | |||
@@ -127,10 +127,10 @@ fail: | |||
127 | * used when disk name of partitioned disk ends on a digit. | 127 | * used when disk name of partitioned disk ends on a digit. |
128 | * | 128 | * |
129 | * If name doesn't have fall into the categories above, we return 0. | 129 | * If name doesn't have fall into the categories above, we return 0. |
130 | * Driverfs is used to check if something is a disk name - it has | 130 | * Sysfs is used to check if something is a disk name - it has |
131 | * all known disks under bus/block/devices. If the disk name | 131 | * all known disks under bus/block/devices. If the disk name |
132 | * contains slashes, name of driverfs node has them replaced with | 132 | * contains slashes, name of sysfs node has them replaced with |
133 | * bangs. try_name() does the actual checks, assuming that driverfs | 133 | * bangs. try_name() does the actual checks, assuming that sysfs |
134 | * is mounted on rootfs /sys. | 134 | * is mounted on rootfs /sys. |
135 | */ | 135 | */ |
136 | 136 | ||
diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c index fe1a73ce6cff..ded6c63f11ec 100644 --- a/net/sunrpc/rpc_pipe.c +++ b/net/sunrpc/rpc_pipe.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Userland/kernel interface for rpcauth_gss. | 4 | * Userland/kernel interface for rpcauth_gss. |
5 | * Code shamelessly plagiarized from fs/nfsd/nfsctl.c | 5 | * Code shamelessly plagiarized from fs/nfsd/nfsctl.c |
6 | * and fs/driverfs/inode.c | 6 | * and fs/sysfs/inode.c |
7 | * | 7 | * |
8 | * Copyright (c) 2002, Trond Myklebust <trond.myklebust@fys.uio.no> | 8 | * Copyright (c) 2002, Trond Myklebust <trond.myklebust@fys.uio.no> |
9 | * | 9 | * |