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-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c24
1 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 10bc76ec4025..5795a7c1db97 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -39,38 +39,44 @@
39 39
40#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 40#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
41 41
42#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 42#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
43 S5PV210_UFCON_TXTRIG4 | \
44 S5PV210_UFCON_RXTRIG4)
45 43
46static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { 44static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
47 [0] = { 45 [0] = {
48 .hwport = 0, 46 .hwport = 0,
49 .flags = 0, 47 .flags = 0,
50 .ucon = S5PV210_UCON_DEFAULT, 48 .ucon = S5PV210_UCON_DEFAULT,
51 .ulcon = S5PV210_ULCON_DEFAULT, 49 .ulcon = S5PV210_ULCON_DEFAULT,
52 .ufcon = S5PV210_UFCON_DEFAULT, 50 /*
51 * Actually UART0 can support 256 bytes fifo, but aquila board
52 * supports 128 bytes fifo because of initial chip bug
53 */
54 .ufcon = S5PV210_UFCON_DEFAULT |
55 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
53 }, 56 },
54 [1] = { 57 [1] = {
55 .hwport = 1, 58 .hwport = 1,
56 .flags = 0, 59 .flags = 0,
57 .ucon = S5PV210_UCON_DEFAULT, 60 .ucon = S5PV210_UCON_DEFAULT,
58 .ulcon = S5PV210_ULCON_DEFAULT, 61 .ulcon = S5PV210_ULCON_DEFAULT,
59 .ufcon = S5PV210_UFCON_DEFAULT, 62 .ufcon = S5PV210_UFCON_DEFAULT |
63 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
60 }, 64 },
61 [2] = { 65 [2] = {
62 .hwport = 2, 66 .hwport = 2,
63 .flags = 0, 67 .flags = 0,
64 .ucon = S5PV210_UCON_DEFAULT, 68 .ucon = S5PV210_UCON_DEFAULT,
65 .ulcon = S5PV210_ULCON_DEFAULT, 69 .ulcon = S5PV210_ULCON_DEFAULT,
66 .ufcon = S5PV210_UFCON_DEFAULT, 70 .ufcon = S5PV210_UFCON_DEFAULT |
71 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
67 }, 72 },
68 [3] = { 73 [3] = {
69 .hwport = 3, 74 .hwport = 3,
70 .flags = 0, 75 .flags = 0,
71 .ucon = S5PV210_UCON_DEFAULT, 76 .ucon = S5PV210_UCON_DEFAULT,
72 .ulcon = S5PV210_ULCON_DEFAULT, 77 .ulcon = S5PV210_ULCON_DEFAULT,
73 .ufcon = S5PV210_UFCON_DEFAULT, 78 .ufcon = S5PV210_UFCON_DEFAULT |
79 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
74 }, 80 },
75}; 81};
76 82
@@ -124,7 +130,7 @@ static void __init aquila_map_io(void)
124{ 130{
125 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 131 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
126 s3c24xx_init_clocks(24000000); 132 s3c24xx_init_clocks(24000000);
127 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 133 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
128} 134}
129 135
130static void __init aquila_machine_init(void) 136static void __init aquila_machine_init(void)