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-rw-r--r--Documentation/arm/memory.txt11
-rw-r--r--Documentation/devicetree/bindings/arm/gic.txt4
-rw-r--r--Documentation/devicetree/bindings/arm/vic.txt29
-rw-r--r--Documentation/virtual/kvm/api.txt16
-rw-r--r--MAINTAINERS33
-rw-r--r--Makefile2
-rw-r--r--arch/arm/Kconfig64
-rw-r--r--arch/arm/Kconfig.debug45
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/Makefile3
-rw-r--r--arch/arm/boot/compressed/head.S1
-rw-r--r--arch/arm/common/Kconfig6
-rw-r--r--arch/arm/common/gic.c165
-rw-r--r--arch/arm/common/pl330.c124
-rw-r--r--arch/arm/common/timer-sp.c7
-rw-r--r--arch/arm/common/vic.c148
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig12
-rw-r--r--arch/arm/configs/pcontrol_g20_defconfig175
-rw-r--r--arch/arm/include/asm/assembler.h11
-rw-r--r--arch/arm/include/asm/bug.h1
-rw-r--r--arch/arm/include/asm/cti.h179
-rw-r--r--arch/arm/include/asm/edac.h48
-rw-r--r--arch/arm/include/asm/entry-macro-vic2.S57
-rw-r--r--arch/arm/include/asm/gpio.h4
-rw-r--r--arch/arm/include/asm/hardirq.h17
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-gic.S60
-rw-r--r--arch/arm/include/asm/hardware/gic.h26
-rw-r--r--arch/arm/include/asm/hardware/iop3xx.h1
-rw-r--r--arch/arm/include/asm/hardware/vic.h10
-rw-r--r--arch/arm/include/asm/idmap.h14
-rw-r--r--arch/arm/include/asm/mach/arch.h9
-rw-r--r--arch/arm/include/asm/opcodes.h20
-rw-r--r--arch/arm/include/asm/page.h4
-rw-r--r--arch/arm/include/asm/perf_event.h3
-rw-r--r--arch/arm/include/asm/pgalloc.h26
-rw-r--r--arch/arm/include/asm/pgtable-2level.h41
-rw-r--r--arch/arm/include/asm/pgtable-3level-hwdef.h77
-rw-r--r--arch/arm/include/asm/pgtable-3level-types.h70
-rw-r--r--arch/arm/include/asm/pgtable-3level.h155
-rw-r--r--arch/arm/include/asm/pgtable-hwdef.h4
-rw-r--r--arch/arm/include/asm/pgtable.h55
-rw-r--r--arch/arm/include/asm/pmu.h15
-rw-r--r--arch/arm/include/asm/proc-fns.h21
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/include/asm/sched_clock.h108
-rw-r--r--arch/arm/include/asm/setup.h6
-rw-r--r--arch/arm/include/asm/swab.h5
-rw-r--r--arch/arm/include/asm/system.h10
-rw-r--r--arch/arm/include/asm/tlb.h12
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/entry-armv.S7
-rw-r--r--arch/arm/kernel/head.S65
-rw-r--r--arch/arm/kernel/hw_breakpoint.c8
-rw-r--r--arch/arm/kernel/kprobes-test.c66
-rw-r--r--arch/arm/kernel/machine_kexec.c15
-rw-r--r--arch/arm/kernel/opcodes.c72
-rw-r--r--arch/arm/kernel/perf_event.c19
-rw-r--r--arch/arm/kernel/perf_event_v6.c32
-rw-r--r--arch/arm/kernel/perf_event_v7.c401
-rw-r--r--arch/arm/kernel/perf_event_xscale.c16
-rw-r--r--arch/arm/kernel/process.c77
-rw-r--r--arch/arm/kernel/sched_clock.c118
-rw-r--r--arch/arm/kernel/setup.c15
-rw-r--r--arch/arm/kernel/sleep.S4
-rw-r--r--arch/arm/kernel/smp.c36
-rw-r--r--arch/arm/kernel/smp_twd.c95
-rw-r--r--arch/arm/kernel/suspend.c18
-rw-r--r--arch/arm/kernel/swp_emulate.c16
-rw-r--r--arch/arm/kernel/tcm.c22
-rw-r--r--arch/arm/kernel/vmlinux.lds.S7
-rw-r--r--arch/arm/lib/Makefile3
-rw-r--r--arch/arm/lib/call_with_stack.S44
-rw-r--r--arch/arm/mach-at91/Kconfig24
-rw-r--r--arch/arm/mach-at91/at91cap9.c40
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c43
-rw-r--r--arch/arm/mach-at91/at91rm9200.c28
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c42
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c8
-rw-r--r--arch/arm/mach-at91/at91sam9260.c34
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c49
-rw-r--r--arch/arm/mach-at91/at91sam9261.c34
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c33
-rw-r--r--arch/arm/mach-at91/at91sam9263.c43
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c53
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c38
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S9
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c44
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c63
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c38
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c43
-rw-r--r--arch/arm/mach-at91/board-1arm.c2
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c8
-rw-r--r--arch/arm/mach-at91/board-cam60.c6
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c19
-rw-r--r--arch/arm/mach-at91/board-carmeva.c7
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c12
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c5
-rw-r--r--arch/arm/mach-at91/board-csb337.c5
-rw-r--r--arch/arm/mach-at91/board-csb637.c2
-rw-r--r--arch/arm/mach-at91/board-dt.c3
-rw-r--r--arch/arm/mach-at91/board-eb9200.c9
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c5
-rw-r--r--arch/arm/mach-at91/board-eco920.c5
-rw-r--r--arch/arm/mach-at91/board-flexibity.c5
-rw-r--r--arch/arm/mach-at91/board-foxg20.c7
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c5
-rw-r--r--arch/arm/mach-at91/board-kafa.c2
-rw-r--r--arch/arm/mach-at91/board-kb9202.c6
-rw-r--r--arch/arm/mach-at91/board-neocore926.c7
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c6
-rw-r--r--arch/arm/mach-at91/board-picotux200.c3
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c16
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c11
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c3
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c2
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c10
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c14
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c13
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c10
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c11
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c6
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c9
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c8
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c14
-rw-r--r--arch/arm/mach-at91/board-usb-a926x.c12
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c7
-rw-r--r--arch/arm/mach-at91/generic.h10
-rw-r--r--arch/arm/mach-at91/gpio.c85
-rw-r--r--arch/arm/mach-at91/include/mach/at91_aic.h48
-rw-r--r--arch/arm/mach-at91/include/mach/at91_dbgu.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pit.h8
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rtc.h24
-rw-r--r--arch/arm/mach-at91/include/mach/at91_shdwc.h16
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h27
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h14
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h23
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h20
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h33
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_smc.h17
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h30
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h29
-rw-r--r--arch/arm/mach-at91/include/mach/at91x40.h1
-rw-r--r--arch/arm/mach-at91/include/mach/board.h28
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S10
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S11
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h336
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h12
-rw-r--r--arch/arm/mach-at91/include/mach/io.h8
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-at91/include/mach/system.h9
-rw-r--r--arch/arm/mach-at91/include/mach/timex.h65
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h28
-rw-r--r--arch/arm/mach-at91/irq.c38
-rw-r--r--arch/arm/mach-at91/pm.c11
-rw-r--r--arch/arm/mach-at91/sam9_smc.c62
-rw-r--r--arch/arm/mach-at91/sam9_smc.h3
-rw-r--r--arch/arm/mach-at91/setup.c44
-rw-r--r--arch/arm/mach-at91/soc.h1
-rw-r--r--arch/arm/mach-bcmring/arch.c25
-rw-r--r--arch/arm/mach-bcmring/dma.c2
-rw-r--r--arch/arm/mach-bcmring/include/mach/system.h26
-rw-r--r--arch/arm/mach-bcmring/include/mach/vmalloc.h25
-rw-r--r--arch/arm/mach-clps711x/Makefile2
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c1
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c1
-rw-r--r--arch/arm/mach-clps711x/ceiva.c1
-rw-r--r--arch/arm/mach-clps711x/clep7312.c1
-rw-r--r--arch/arm/mach-clps711x/common.c (renamed from arch/arm/mach-clps711x/irq.c)100
-rw-r--r--arch/arm/mach-clps711x/common.h1
-rw-r--r--arch/arm/mach-clps711x/edb7211-arch.c1
-rw-r--r--arch/arm/mach-clps711x/fortunet.c1
-rw-r--r--arch/arm/mach-clps711x/include/mach/system.h5
-rw-r--r--arch/arm/mach-clps711x/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-clps711x/mm.c48
-rw-r--r--arch/arm/mach-clps711x/p720t.c1
-rw-r--r--arch/arm/mach-clps711x/time.c84
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c3
-rw-r--r--arch/arm/mach-cns3xxx/core.h1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h3
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/vmalloc.h11
-rw-r--r--arch/arm/mach-cns3xxx/pm.c4
-rw-r--r--arch/arm/mach-davinci/Makefile2
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c1
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c1
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c1
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c1
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c1
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c1
-rw-r--r--arch/arm/mach-davinci/common.c3
-rw-r--r--arch/arm/mach-davinci/da830.c1
-rw-r--r--arch/arm/mach-davinci/da850.c1
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c5
-rw-r--r--arch/arm/mach-davinci/devices.c5
-rw-r--r--arch/arm/mach-davinci/dm355.c1
-rw-r--r--arch/arm/mach-davinci/dm365.c1
-rw-r--r--arch/arm/mach-davinci/dm644x.c1
-rw-r--r--arch/arm/mach-davinci/dm646x.c1
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h53
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h8
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/vmalloc.h14
-rw-r--r--arch/arm/mach-davinci/io.c48
-rw-r--r--arch/arm/mach-davinci/tnetv107x.c7
-rw-r--r--arch/arm/mach-dove/cm-a510.c1
-rw-r--r--arch/arm/mach-dove/common.c16
-rw-r--r--arch/arm/mach-dove/common.h1
-rw-r--r--arch/arm/mach-dove/dove-db-setup.c1
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h2
-rw-r--r--arch/arm/mach-dove/include/mach/system.h19
-rw-r--r--arch/arm/mach-dove/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ebsa110/core.c8
-rw-r--r--arch/arm/mach-ebsa110/include/mach/system.h2
-rw-r--r--arch/arm/mach-ebsa110/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c3
-rw-r--r--arch/arm/mach-ep93xx/core.c12
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c17
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c3
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S42
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/system.h17
-rw-r--r--arch/arm/mach-ep93xx/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ep93xx/micro9.c9
-rw-r--r--arch/arm/mach-ep93xx/simone.c3
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c3
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c3
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c1
-rw-r--r--arch/arm/mach-exynos/Kconfig2
-rw-r--r--arch/arm/mach-exynos/Makefile9
-rw-r--r--arch/arm/mach-exynos/clock-exynos4210.c3
-rw-r--r--arch/arm/mach-exynos/clock-exynos4212.c3
-rw-r--r--arch/arm/mach-exynos/clock.c3
-rw-r--r--arch/arm/mach-exynos/common.c698
-rw-r--r--arch/arm/mach-exynos/common.h41
-rw-r--r--arch/arm/mach-exynos/cpu.c313
-rw-r--r--arch/arm/mach-exynos/include/mach/entry-macro.S74
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h12
-rw-r--r--arch/arm/mach-exynos/include/mach/system.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-exynos/init.c27
-rw-r--r--arch/arm/mach-exynos/irq-combiner.c124
-rw-r--r--arch/arm/mach-exynos/irq-eint.c237
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c8
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c17
-rw-r--r--arch/arm/mach-exynos/mach-origen.c8
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c10
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c14
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c18
-rw-r--r--arch/arm/mach-exynos/platsmp.c28
-rw-r--r--arch/arm/mach-exynos/pm.c24
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c3
-rw-r--r--arch/arm/mach-footbridge/common.c27
-rw-r--r--arch/arm/mach-footbridge/common.h1
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c1
-rw-r--r--arch/arm/mach-footbridge/include/mach/system.h56
-rw-r--r--arch/arm/mach-footbridge/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-footbridge/netwinder-hw.c27
-rw-r--r--arch/arm/mach-footbridge/personal.c1
-rw-r--r--arch/arm/mach-gemini/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-h720x/common.c5
-rw-r--r--arch/arm/mach-h720x/common.h1
-rw-r--r--arch/arm/mach-h720x/h7201-eval.c1
-rw-r--r--arch/arm/mach-h720x/h7202-eval.c1
-rw-r--r--arch/arm/mach-h720x/include/mach/system.h6
-rw-r--r--arch/arm/mach-h720x/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-highbank/core.h1
-rw-r--r--arch/arm/mach-highbank/highbank.c2
-rw-r--r--arch/arm/mach-highbank/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-highbank/include/mach/system.h2
-rw-r--r--arch/arm/mach-highbank/include/mach/vmalloc.h1
-rw-r--r--arch/arm/mach-highbank/system.c2
-rw-r--r--arch/arm/mach-imx/Kconfig10
-rw-r--r--arch/arm/mach-imx/Makefile4
-rw-r--r--arch/arm/mach-imx/clock-imx35.c20
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c2
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c1
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c1
-rw-r--r--arch/arm/mach-imx/mach-bug.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c9
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27ipcam.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c1
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c34
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c1
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c2
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c1
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-rw-r--r--include/net/sctp/structs.h4
-rw-r--r--include/net/sock.h4
-rw-r--r--include/scsi/libfcoe.h3
-rw-r--r--include/trace/events/writeback.h15
-rw-r--r--include/xen/interface/io/xs_wire.h3
-rw-r--r--kernel/cgroup.c5
-rw-r--r--kernel/cpuset.c29
-rw-r--r--kernel/events/core.c8
-rw-r--r--kernel/futex.c28
-rw-r--r--kernel/irq/irqdomain.c12
-rw-r--r--kernel/sched_fair.c14
-rw-r--r--kernel/sysctl_binary.c2
-rw-r--r--kernel/time/clockevents.c1
-rw-r--r--kernel/time/clocksource.c12
-rw-r--r--mm/filemap.c7
-rw-r--r--mm/hugetlb.c2
-rw-r--r--mm/memcontrol.c3
-rw-r--r--mm/mempolicy.c11
-rw-r--r--mm/oom_kill.c2
-rw-r--r--mm/percpu.c6
-rw-r--r--mm/vmalloc.c31
-rw-r--r--net/bluetooth/hci_conn.c2
-rw-r--r--net/bluetooth/l2cap_core.c12
-rw-r--r--net/bluetooth/rfcomm/core.c1
-rw-r--r--net/bridge/br_netfilter.c8
-rw-r--r--net/core/flow.c12
-rw-r--r--net/core/net-sysfs.c7
-rw-r--r--net/core/sock.c6
-rw-r--r--net/ipv4/ipconfig.c4
-rw-r--r--net/ipv4/route.c112
-rw-r--r--net/ipv6/ip6_output.c2
-rw-r--r--net/llc/af_llc.c14
-rw-r--r--net/netfilter/ipvs/ip_vs_conn.c2
-rw-r--r--net/netfilter/ipvs/ip_vs_ctl.c10
-rw-r--r--net/netfilter/ipvs/ip_vs_sync.c2
-rw-r--r--net/netfilter/nf_conntrack_netlink.c22
-rw-r--r--net/netfilter/xt_connbytes.c6
-rw-r--r--net/nfc/nci/core.c2
-rw-r--r--net/packet/af_packet.c12
-rw-r--r--net/sched/sch_mqprio.c2
-rw-r--r--net/sched/sch_netem.c7
-rw-r--r--net/sctp/associola.c2
-rw-r--r--net/sctp/output.c8
-rw-r--r--net/sctp/outqueue.c6
-rw-r--r--net/sctp/protocol.c3
-rw-r--r--net/sctp/socket.c2
-rw-r--r--net/sctp/sysctl.c13
-rw-r--r--net/sunrpc/sched.c30
-rw-r--r--net/sunrpc/xprt.c10
-rw-r--r--net/xfrm/xfrm_policy.c18
-rw-r--r--scripts/kconfig/Makefile5
-rw-r--r--security/integrity/evm/evm_crypto.c19
-rw-r--r--security/selinux/netport.c4
-rw-r--r--sound/atmel/ac97c.c4
-rw-r--r--sound/soc/codecs/wm8776.c1
-rw-r--r--virt/kvm/assigned-dev.c93
1271 files changed, 12353 insertions, 12763 deletions
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt
index 771d48d3b335..208a2d465b92 100644
--- a/Documentation/arm/memory.txt
+++ b/Documentation/arm/memory.txt
@@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned
51ff000000 ffbfffff Reserved for future expansion of DMA 51ff000000 ffbfffff Reserved for future expansion of DMA
52 mapping region. 52 mapping region.
53 53
54VMALLOC_END feffffff Free for platform use, recommended.
55 VMALLOC_END must be aligned to a 2MB
56 boundary.
57
58VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. 54VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
59 Memory returned by vmalloc/ioremap will 55 Memory returned by vmalloc/ioremap will
60 be dynamically placed in this region. 56 be dynamically placed in this region.
61 VMALLOC_START may be based upon the value 57 Machine specific static mappings are also
62 of the high_memory variable. 58 located here through iotable_init().
59 VMALLOC_START is based upon the value
60 of the high_memory variable, and VMALLOC_END
61 is equal to 0xff000000.
63 62
64PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. 63PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region.
65 This maps the platforms RAM, and typically 64 This maps the platforms RAM, and typically
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
index 52916b4aa1fe..9b4b82a721b6 100644
--- a/Documentation/devicetree/bindings/arm/gic.txt
+++ b/Documentation/devicetree/bindings/arm/gic.txt
@@ -42,6 +42,10 @@ Optional
42- interrupts : Interrupt source of the parent interrupt controller. Only 42- interrupts : Interrupt source of the parent interrupt controller. Only
43 present on secondary GICs. 43 present on secondary GICs.
44 44
45- cpu-offset : per-cpu offset within the distributor and cpu interface
46 regions, used when the GIC doesn't have banked registers. The offset is
47 cpu-offset * cpu-nr.
48
45Example: 49Example:
46 50
47 intc: interrupt-controller@fff11000 { 51 intc: interrupt-controller@fff11000 {
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
new file mode 100644
index 000000000000..266716b23437
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -0,0 +1,29 @@
1* ARM Vectored Interrupt Controller
2
3One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
4system for interrupt routing. For multiple controllers they can either be
5nested or have the outputs wire-OR'd together.
6
7Required properties:
8
9- compatible : should be one of
10 "arm,pl190-vic"
11 "arm,pl192-vic"
12- interrupt-controller : Identifies the node as an interrupt controller
13- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
14 the VIC has no configuration options for interrupt sources. The cell is a u32
15 and defines the interrupt number.
16- reg : The register bank for the VIC.
17
18Optional properties:
19
20- interrupts : Interrupt source for parent controllers if the VIC is nested.
21
22Example:
23
24 vic0: interrupt-controller@60000 {
25 compatible = "arm,pl192-vic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
28 reg = <0x60000 0x1000>;
29 };
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 7945b0bd35e2..e2a4b5287361 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
1100 eax, ebx, ecx, edx: the values returned by the cpuid instruction for 1100 eax, ebx, ecx, edx: the values returned by the cpuid instruction for
1101 this function/index combination 1101 this function/index combination
1102 1102
1103The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
1104as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
1105support. Instead it is reported via
1106
1107 ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
1108
1109if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
1110feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
1111
11034.47 KVM_PPC_GET_PVINFO 11124.47 KVM_PPC_GET_PVINFO
1104 1113
1105Capability: KVM_CAP_PPC_GET_PVINFO 1114Capability: KVM_CAP_PPC_GET_PVINFO
@@ -1151,6 +1160,13 @@ following flags are specified:
1151/* Depends on KVM_CAP_IOMMU */ 1160/* Depends on KVM_CAP_IOMMU */
1152#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) 1161#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
1153 1162
1163The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure
1164isolation of the device. Usages not specifying this flag are deprecated.
1165
1166Only PCI header type 0 devices with PCI BAR resources are supported by
1167device assignment. The user requesting this ioctl must have read/write
1168access to the PCI sysfs resource files associated with the device.
1169
11544.49 KVM_DEASSIGN_PCI_DEVICE 11704.49 KVM_DEASSIGN_PCI_DEVICE
1155 1171
1156Capability: KVM_CAP_DEVICE_DEASSIGNMENT 1172Capability: KVM_CAP_DEVICE_DEASSIGNMENT
diff --git a/MAINTAINERS b/MAINTAINERS
index b9db108f01c8..b26219050ff1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1124,13 +1124,6 @@ S: Supported
1124F: arch/arm/mach-shmobile/ 1124F: arch/arm/mach-shmobile/
1125F: drivers/sh/ 1125F: drivers/sh/
1126 1126
1127ARM/TELECHIPS ARM ARCHITECTURE
1128M: "Hans J. Koch" <hjk@hansjkoch.de>
1129L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1130S: Maintained
1131F: arch/arm/plat-tcc/
1132F: arch/arm/mach-tcc8k/
1133
1134ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT 1127ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
1135M: Lennert Buytenhek <kernel@wantstofly.org> 1128M: Lennert Buytenhek <kernel@wantstofly.org>
1136L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1129L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -2700,7 +2693,7 @@ FIREWIRE SUBSYSTEM
2700M: Stefan Richter <stefanr@s5r6.in-berlin.de> 2693M: Stefan Richter <stefanr@s5r6.in-berlin.de>
2701L: linux1394-devel@lists.sourceforge.net 2694L: linux1394-devel@lists.sourceforge.net
2702W: http://ieee1394.wiki.kernel.org/ 2695W: http://ieee1394.wiki.kernel.org/
2703T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git 2696T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git
2704S: Maintained 2697S: Maintained
2705F: drivers/firewire/ 2698F: drivers/firewire/
2706F: include/linux/firewire*.h 2699F: include/linux/firewire*.h
@@ -3101,6 +3094,7 @@ F: include/linux/hid*
3101 3094
3102HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS 3095HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS
3103M: Thomas Gleixner <tglx@linutronix.de> 3096M: Thomas Gleixner <tglx@linutronix.de>
3097T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
3104S: Maintained 3098S: Maintained
3105F: Documentation/timers/ 3099F: Documentation/timers/
3106F: kernel/hrtimer.c 3100F: kernel/hrtimer.c
@@ -3610,7 +3604,7 @@ F: net/irda/
3610IRQ SUBSYSTEM 3604IRQ SUBSYSTEM
3611M: Thomas Gleixner <tglx@linutronix.de> 3605M: Thomas Gleixner <tglx@linutronix.de>
3612S: Maintained 3606S: Maintained
3613T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git irq/core 3607T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
3614F: kernel/irq/ 3608F: kernel/irq/
3615 3609
3616ISAPNP 3610ISAPNP
@@ -4098,7 +4092,7 @@ F: drivers/hwmon/lm90.c
4098LOCKDEP AND LOCKSTAT 4092LOCKDEP AND LOCKSTAT
4099M: Peter Zijlstra <peterz@infradead.org> 4093M: Peter Zijlstra <peterz@infradead.org>
4100M: Ingo Molnar <mingo@redhat.com> 4094M: Ingo Molnar <mingo@redhat.com>
4101T: git git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-lockdep.git 4095T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/locking
4102S: Maintained 4096S: Maintained
4103F: Documentation/lockdep*.txt 4097F: Documentation/lockdep*.txt
4104F: Documentation/lockstat.txt 4098F: Documentation/lockstat.txt
@@ -4280,7 +4274,9 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
4280S: Maintained 4274S: Maintained
4281F: Documentation/dvb/ 4275F: Documentation/dvb/
4282F: Documentation/video4linux/ 4276F: Documentation/video4linux/
4277F: Documentation/DocBook/media/
4283F: drivers/media/ 4278F: drivers/media/
4279F: drivers/staging/media/
4284F: include/media/ 4280F: include/media/
4285F: include/linux/dvb/ 4281F: include/linux/dvb/
4286F: include/linux/videodev*.h 4282F: include/linux/videodev*.h
@@ -5086,6 +5082,7 @@ M: Peter Zijlstra <a.p.zijlstra@chello.nl>
5086M: Paul Mackerras <paulus@samba.org> 5082M: Paul Mackerras <paulus@samba.org>
5087M: Ingo Molnar <mingo@elte.hu> 5083M: Ingo Molnar <mingo@elte.hu>
5088M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> 5084M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
5085T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core
5089S: Supported 5086S: Supported
5090F: kernel/events/* 5087F: kernel/events/*
5091F: include/linux/perf_event.h 5088F: include/linux/perf_event.h
@@ -5117,6 +5114,15 @@ L: linux-mtd@lists.infradead.org
5117S: Maintained 5114S: Maintained
5118F: drivers/mtd/devices/phram.c 5115F: drivers/mtd/devices/phram.c
5119 5116
5117PICOXCELL SUPPORT
5118M: Jamie Iles <jamie@jamieiles.com>
5119L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5120T: git git://github.com/jamieiles/linux-2.6-ji.git
5121S: Supported
5122F: arch/arm/mach-picoxcell
5123F: drivers/*/picoxcell*
5124F: drivers/*/*/picoxcell*
5125
5120PIN CONTROL SUBSYSTEM 5126PIN CONTROL SUBSYSTEM
5121M: Linus Walleij <linus.walleij@linaro.org> 5127M: Linus Walleij <linus.walleij@linaro.org>
5122S: Maintained 5128S: Maintained
@@ -5165,6 +5171,7 @@ F: drivers/scsi/pm8001/
5165 5171
5166POSIX CLOCKS and TIMERS 5172POSIX CLOCKS and TIMERS
5167M: Thomas Gleixner <tglx@linutronix.de> 5173M: Thomas Gleixner <tglx@linutronix.de>
5174T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
5168S: Supported 5175S: Supported
5169F: fs/timerfd.c 5176F: fs/timerfd.c
5170F: include/linux/timer* 5177F: include/linux/timer*
@@ -5680,6 +5687,7 @@ F: drivers/dma/dw_dmac.c
5680TIMEKEEPING, NTP 5687TIMEKEEPING, NTP
5681M: John Stultz <johnstul@us.ibm.com> 5688M: John Stultz <johnstul@us.ibm.com>
5682M: Thomas Gleixner <tglx@linutronix.de> 5689M: Thomas Gleixner <tglx@linutronix.de>
5690T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
5683S: Supported 5691S: Supported
5684F: include/linux/clocksource.h 5692F: include/linux/clocksource.h
5685F: include/linux/time.h 5693F: include/linux/time.h
@@ -5704,6 +5712,7 @@ F: drivers/watchdog/sc1200wdt.c
5704SCHEDULER 5712SCHEDULER
5705M: Ingo Molnar <mingo@elte.hu> 5713M: Ingo Molnar <mingo@elte.hu>
5706M: Peter Zijlstra <peterz@infradead.org> 5714M: Peter Zijlstra <peterz@infradead.org>
5715T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git sched/core
5707S: Maintained 5716S: Maintained
5708F: kernel/sched* 5717F: kernel/sched*
5709F: include/linux/sched.h 5718F: include/linux/sched.h
@@ -6631,7 +6640,7 @@ TRACING
6631M: Steven Rostedt <rostedt@goodmis.org> 6640M: Steven Rostedt <rostedt@goodmis.org>
6632M: Frederic Weisbecker <fweisbec@gmail.com> 6641M: Frederic Weisbecker <fweisbec@gmail.com>
6633M: Ingo Molnar <mingo@redhat.com> 6642M: Ingo Molnar <mingo@redhat.com>
6634T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git perf/core 6643T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core
6635S: Maintained 6644S: Maintained
6636F: Documentation/trace/ftrace.txt 6645F: Documentation/trace/ftrace.txt
6637F: arch/*/*/*/ftrace.h 6646F: arch/*/*/*/ftrace.h
@@ -7381,7 +7390,7 @@ M: Thomas Gleixner <tglx@linutronix.de>
7381M: Ingo Molnar <mingo@redhat.com> 7390M: Ingo Molnar <mingo@redhat.com>
7382M: "H. Peter Anvin" <hpa@zytor.com> 7391M: "H. Peter Anvin" <hpa@zytor.com>
7383M: x86@kernel.org 7392M: x86@kernel.org
7384T: git git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git 7393T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
7385S: Maintained 7394S: Maintained
7386F: Documentation/x86/ 7395F: Documentation/x86/
7387F: arch/x86/ 7396F: arch/x86/
diff --git a/Makefile b/Makefile
index a43733df3978..ea51081812f3 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 3 1VERSION = 3
2PATCHLEVEL = 2 2PATCHLEVEL = 2
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = -rc6 4EXTRAVERSION = -rc7
5NAME = Saber-toothed Squirrel 5NAME = Saber-toothed Squirrel
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 34d13ff3901c..c8d670642fc3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -258,6 +258,7 @@ config ARCH_INTEGRATOR
258 select ARCH_HAS_CPUFREQ 258 select ARCH_HAS_CPUFREQ
259 select CLKDEV_LOOKUP 259 select CLKDEV_LOOKUP
260 select HAVE_MACH_CLKDEV 260 select HAVE_MACH_CLKDEV
261 select HAVE_TCM
261 select ICST 262 select ICST
262 select GENERIC_CLOCKEVENTS 263 select GENERIC_CLOCKEVENTS
263 select PLAT_VERSATILE 264 select PLAT_VERSATILE
@@ -341,10 +342,12 @@ config ARCH_HIGHBANK
341 select ARM_AMBA 342 select ARM_AMBA
342 select ARM_GIC 343 select ARM_GIC
343 select ARM_TIMER_SP804 344 select ARM_TIMER_SP804
345 select CACHE_L2X0
344 select CLKDEV_LOOKUP 346 select CLKDEV_LOOKUP
345 select CPU_V7 347 select CPU_V7
346 select GENERIC_CLOCKEVENTS 348 select GENERIC_CLOCKEVENTS
347 select HAVE_ARM_SCU 349 select HAVE_ARM_SCU
350 select HAVE_SMP
348 select USE_OF 351 select USE_OF
349 help 352 help
350 Support for the Calxeda Highbank SoC based boards. 353 Support for the Calxeda Highbank SoC based boards.
@@ -362,6 +365,7 @@ config ARCH_CNS3XXX
362 select CPU_V6K 365 select CPU_V6K
363 select GENERIC_CLOCKEVENTS 366 select GENERIC_CLOCKEVENTS
364 select ARM_GIC 367 select ARM_GIC
368 select MIGHT_HAVE_CACHE_L2X0
365 select MIGHT_HAVE_PCI 369 select MIGHT_HAVE_PCI
366 select PCI_DOMAINS if PCI 370 select PCI_DOMAINS if PCI
367 help 371 help
@@ -382,6 +386,7 @@ config ARCH_PRIMA2
382 select GENERIC_CLOCKEVENTS 386 select GENERIC_CLOCKEVENTS
383 select CLKDEV_LOOKUP 387 select CLKDEV_LOOKUP
384 select GENERIC_IRQ_CHIP 388 select GENERIC_IRQ_CHIP
389 select MIGHT_HAVE_CACHE_L2X0
385 select USE_OF 390 select USE_OF
386 select ZONE_DMA 391 select ZONE_DMA
387 help 392 help
@@ -635,6 +640,8 @@ config ARCH_TEGRA
635 select GENERIC_GPIO 640 select GENERIC_GPIO
636 select HAVE_CLK 641 select HAVE_CLK
637 select HAVE_SCHED_CLOCK 642 select HAVE_SCHED_CLOCK
643 select HAVE_SMP
644 select MIGHT_HAVE_CACHE_L2X0
638 select ARCH_HAS_CPUFREQ 645 select ARCH_HAS_CPUFREQ
639 help 646 help
640 This enables support for NVIDIA Tegra based systems (Tegra APX, 647 This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -652,6 +659,7 @@ config ARCH_PICOXCELL
652 select HAVE_SCHED_CLOCK 659 select HAVE_SCHED_CLOCK
653 select HAVE_TCM 660 select HAVE_TCM
654 select NO_IOPORT 661 select NO_IOPORT
662 select SPARSE_IRQ
655 select USE_OF 663 select USE_OF
656 help 664 help
657 This enables support for systems based on the Picochip picoXcell 665 This enables support for systems based on the Picochip picoXcell
@@ -705,7 +713,9 @@ config ARCH_SHMOBILE
705 select HAVE_CLK 713 select HAVE_CLK
706 select CLKDEV_LOOKUP 714 select CLKDEV_LOOKUP
707 select HAVE_MACH_CLKDEV 715 select HAVE_MACH_CLKDEV
716 select HAVE_SMP
708 select GENERIC_CLOCKEVENTS 717 select GENERIC_CLOCKEVENTS
718 select MIGHT_HAVE_CACHE_L2X0
709 select NO_IOPORT 719 select NO_IOPORT
710 select SPARSE_IRQ 720 select SPARSE_IRQ
711 select MULTI_IRQ_HANDLER 721 select MULTI_IRQ_HANDLER
@@ -870,16 +880,6 @@ config ARCH_SHARK
870 Support for the StrongARM based Digital DNARD machine, also known 880 Support for the StrongARM based Digital DNARD machine, also known
871 as "Shark" (<http://www.shark-linux.de/shark.html>). 881 as "Shark" (<http://www.shark-linux.de/shark.html>).
872 882
873config ARCH_TCC_926
874 bool "Telechips TCC ARM926-based systems"
875 select CLKSRC_MMIO
876 select CPU_ARM926T
877 select HAVE_CLK
878 select CLKDEV_LOOKUP
879 select GENERIC_CLOCKEVENTS
880 help
881 Support for Telechips TCC ARM926-based systems.
882
883config ARCH_U300 883config ARCH_U300
884 bool "ST-Ericsson U300 Series" 884 bool "ST-Ericsson U300 Series"
885 depends on MMU 885 depends on MMU
@@ -895,7 +895,6 @@ config ARCH_U300
895 select HAVE_MACH_CLKDEV 895 select HAVE_MACH_CLKDEV
896 select GENERIC_GPIO 896 select GENERIC_GPIO
897 select ARCH_REQUIRE_GPIOLIB 897 select ARCH_REQUIRE_GPIOLIB
898 select NEED_MACH_MEMORY_H
899 help 898 help
900 Support for ST-Ericsson U300 series mobile platforms. 899 Support for ST-Ericsson U300 series mobile platforms.
901 900
@@ -907,6 +906,8 @@ config ARCH_U8500
907 select CLKDEV_LOOKUP 906 select CLKDEV_LOOKUP
908 select ARCH_REQUIRE_GPIOLIB 907 select ARCH_REQUIRE_GPIOLIB
909 select ARCH_HAS_CPUFREQ 908 select ARCH_HAS_CPUFREQ
909 select HAVE_SMP
910 select MIGHT_HAVE_CACHE_L2X0
910 help 911 help
911 Support for ST-Ericsson's Ux500 architecture 912 Support for ST-Ericsson's Ux500 architecture
912 913
@@ -917,6 +918,7 @@ config ARCH_NOMADIK
917 select CPU_ARM926T 918 select CPU_ARM926T
918 select CLKDEV_LOOKUP 919 select CLKDEV_LOOKUP
919 select GENERIC_CLOCKEVENTS 920 select GENERIC_CLOCKEVENTS
921 select MIGHT_HAVE_CACHE_L2X0
920 select ARCH_REQUIRE_GPIOLIB 922 select ARCH_REQUIRE_GPIOLIB
921 help 923 help
922 Support for the Nomadik platform by ST-Ericsson 924 Support for the Nomadik platform by ST-Ericsson
@@ -976,6 +978,7 @@ config ARCH_ZYNQ
976 select ARM_GIC 978 select ARM_GIC
977 select ARM_AMBA 979 select ARM_AMBA
978 select ICST 980 select ICST
981 select MIGHT_HAVE_CACHE_L2X0
979 select USE_OF 982 select USE_OF
980 help 983 help
981 Support for Xilinx Zynq ARM Cortex A9 Platform 984 Support for Xilinx Zynq ARM Cortex A9 Platform
@@ -1062,8 +1065,6 @@ source "arch/arm/plat-s5p/Kconfig"
1062 1065
1063source "arch/arm/plat-spear/Kconfig" 1066source "arch/arm/plat-spear/Kconfig"
1064 1067
1065source "arch/arm/plat-tcc/Kconfig"
1066
1067if ARCH_S3C2410 1068if ARCH_S3C2410
1068source "arch/arm/mach-s3c2410/Kconfig" 1069source "arch/arm/mach-s3c2410/Kconfig"
1069source "arch/arm/mach-s3c2412/Kconfig" 1070source "arch/arm/mach-s3c2412/Kconfig"
@@ -1128,6 +1129,11 @@ config ARM_TIMER_SP804
1128 1129
1129source arch/arm/mm/Kconfig 1130source arch/arm/mm/Kconfig
1130 1131
1132config ARM_NR_BANKS
1133 int
1134 default 16 if ARCH_EP93XX
1135 default 8
1136
1131config IWMMXT 1137config IWMMXT
1132 bool "Enable iWMMXt support" 1138 bool "Enable iWMMXt support"
1133 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1139 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1248,7 +1254,7 @@ config PL310_ERRATA_588369
1248 1254
1249config ARM_ERRATA_720789 1255config ARM_ERRATA_720789
1250 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1256 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1251 depends on CPU_V7 && SMP 1257 depends on CPU_V7
1252 help 1258 help
1253 This option enables the workaround for the 720789 Cortex-A9 (prior to 1259 This option enables the workaround for the 720789 Cortex-A9 (prior to
1254 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1260 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1284,7 +1290,7 @@ config ARM_ERRATA_743622
1284 1290
1285config ARM_ERRATA_751472 1291config ARM_ERRATA_751472
1286 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1292 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1287 depends on CPU_V7 && SMP 1293 depends on CPU_V7
1288 help 1294 help
1289 This option enables the workaround for the 751472 Cortex-A9 (prior 1295 This option enables the workaround for the 751472 Cortex-A9 (prior
1290 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1296 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
@@ -1437,14 +1443,20 @@ menu "Kernel Features"
1437 1443
1438source "kernel/time/Kconfig" 1444source "kernel/time/Kconfig"
1439 1445
1446config HAVE_SMP
1447 bool
1448 help
1449 This option should be selected by machines which have an SMP-
1450 capable CPU.
1451
1452 The only effect of this option is to make the SMP-related
1453 options available to the user for configuration.
1454
1440config SMP 1455config SMP
1441 bool "Symmetric Multi-Processing" 1456 bool "Symmetric Multi-Processing"
1442 depends on CPU_V6K || CPU_V7 1457 depends on CPU_V6K || CPU_V7
1443 depends on GENERIC_CLOCKEVENTS 1458 depends on GENERIC_CLOCKEVENTS
1444 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1459 depends on HAVE_SMP
1445 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1446 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1447 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
1448 depends on MMU 1460 depends on MMU
1449 select USE_GENERIC_SMP_HELPERS 1461 select USE_GENERIC_SMP_HELPERS
1450 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1462 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1562,6 +1574,16 @@ config LOCAL_TIMERS
1562 accounting to be spread across the timer interval, preventing a 1574 accounting to be spread across the timer interval, preventing a
1563 "thundering herd" at every timer tick. 1575 "thundering herd" at every timer tick.
1564 1576
1577config ARCH_NR_GPIO
1578 int
1579 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1580 default 350 if ARCH_U8500
1581 default 0
1582 help
1583 Maximum number of GPIOs in the system.
1584
1585 If unsure, leave the default value.
1586
1565source kernel/Kconfig.preempt 1587source kernel/Kconfig.preempt
1566 1588
1567config HZ 1589config HZ
@@ -1974,7 +1996,7 @@ endchoice
1974 1996
1975config XIP_KERNEL 1997config XIP_KERNEL
1976 bool "Kernel Execute-In-Place from ROM" 1998 bool "Kernel Execute-In-Place from ROM"
1977 depends on !ZBOOT_ROM 1999 depends on !ZBOOT_ROM && !ARM_LPAE
1978 help 2000 help
1979 Execute-In-Place allows the kernel to run from non-volatile storage 2001 Execute-In-Place allows the kernel to run from non-volatile storage
1980 directly addressable by the CPU, such as NOR flash. This saves RAM 2002 directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -2004,7 +2026,7 @@ config XIP_PHYS_ADDR
2004 2026
2005config KEXEC 2027config KEXEC
2006 bool "Kexec system call (EXPERIMENTAL)" 2028 bool "Kexec system call (EXPERIMENTAL)"
2007 depends on EXPERIMENTAL 2029 depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2008 help 2030 help
2009 kexec is a system call that implements the ability to shutdown your 2031 kexec is a system call that implements the ability to shutdown your
2010 current kernel, and to start another kernel. It is like a reboot 2032 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index c5213e78606b..e0d236d7ff73 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -100,6 +100,14 @@ choice
100 Note that the system will appear to hang during boot if there 100 Note that the system will appear to hang during boot if there
101 is nothing connected to read from the DCC. 101 is nothing connected to read from the DCC.
102 102
103 config AT91_DEBUG_LL_DBGU0
104 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
105 depends on HAVE_AT91_DBGU0
106
107 config AT91_DEBUG_LL_DBGU1
108 bool "Kernel low-level debugging on 9263, 9g45 and cap9"
109 depends on HAVE_AT91_DBGU1
110
103 config DEBUG_FOOTBRIDGE_COM1 111 config DEBUG_FOOTBRIDGE_COM1
104 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" 112 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
105 depends on FOOTBRIDGE 113 depends on FOOTBRIDGE
@@ -247,6 +255,43 @@ choice
247 their output to the standard serial port on the RealView 255 their output to the standard serial port on the RealView
248 PB1176 platform. 256 PB1176 platform.
249 257
258 config DEBUG_MSM_UART1
259 bool "Kernel low-level debugging messages via MSM UART1"
260 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
261 help
262 Say Y here if you want the debug print routines to direct
263 their output to the first serial port on MSM devices.
264
265 config DEBUG_MSM_UART2
266 bool "Kernel low-level debugging messages via MSM UART2"
267 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
268 help
269 Say Y here if you want the debug print routines to direct
270 their output to the second serial port on MSM devices.
271
272 config DEBUG_MSM_UART3
273 bool "Kernel low-level debugging messages via MSM UART3"
274 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
275 help
276 Say Y here if you want the debug print routines to direct
277 their output to the third serial port on MSM devices.
278
279 config DEBUG_MSM8660_UART
280 bool "Kernel low-level debugging messages via MSM 8660 UART"
281 depends on ARCH_MSM8X60
282 select MSM_HAS_DEBUG_UART_HS
283 help
284 Say Y here if you want the debug print routines to direct
285 their output to the serial port on MSM 8660 devices.
286
287 config DEBUG_MSM8960_UART
288 bool "Kernel low-level debugging messages via MSM 8960 UART"
289 depends on ARCH_MSM8960
290 select MSM_HAS_DEBUG_UART_HS
291 help
292 Say Y here if you want the debug print routines to direct
293 their output to the serial port on MSM 8960 devices.
294
250endchoice 295endchoice
251 296
252config EARLY_PRINTK 297config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e10..40319d91bb7f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos
184machine-$(CONFIG_ARCH_SA1100) := sa1100 184machine-$(CONFIG_ARCH_SA1100) := sa1100
185machine-$(CONFIG_ARCH_SHARK) := shark 185machine-$(CONFIG_ARCH_SHARK) := shark
186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile 186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
187machine-$(CONFIG_ARCH_TCC8K) := tcc8k
188machine-$(CONFIG_ARCH_TEGRA) := tegra 187machine-$(CONFIG_ARCH_TEGRA) := tegra
189machine-$(CONFIG_ARCH_U300) := u300 188machine-$(CONFIG_ARCH_U300) := u300
190machine-$(CONFIG_ARCH_U8500) := ux500 189machine-$(CONFIG_ARCH_U8500) := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq
204plat-$(CONFIG_ARCH_MXC) := mxc 203plat-$(CONFIG_ARCH_MXC) := mxc
205plat-$(CONFIG_ARCH_OMAP) := omap 204plat-$(CONFIG_ARCH_OMAP) := omap
206plat-$(CONFIG_ARCH_S3C64XX) := samsung 205plat-$(CONFIG_ARCH_S3C64XX) := samsung
207plat-$(CONFIG_ARCH_TCC_926) := tcc
208plat-$(CONFIG_ARCH_ZYNQ) := versatile 206plat-$(CONFIG_ARCH_ZYNQ) := versatile
209plat-$(CONFIG_PLAT_IOP) := iop 207plat-$(CONFIG_PLAT_IOP) := iop
210plat-$(CONFIG_PLAT_NOMADIK) := nomadik 208plat-$(CONFIG_PLAT_NOMADIK) := nomadik
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 21f56ff32797..cf0a64ce4b83 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj)
126asflags-y := -Wa,-march=all 126asflags-y := -Wa,-march=all
127 127
128# Supply kernel BSS size to the decompressor via a linker symbol. 128# Supply kernel BSS size to the decompressor via a linker symbol.
129KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') 129KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
130 awk 'END{print $$3}')
130LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) 131LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
131# Supply ZRELADDR to the decompressor via a linker symbol. 132# Supply ZRELADDR to the decompressor via a linker symbol.
132ifneq ($(CONFIG_AUTO_ZRELADDR),y) 133ifneq ($(CONFIG_AUTO_ZRELADDR),y)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index c2effc917254..c5d60250d43d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -659,6 +659,7 @@ __armv7_mmu_cache_on:
659 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer 659 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
660 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control 660 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
661#endif 661#endif
662 mcr p15, 0, r0, c7, c5, 4 @ ISB
662 mcr p15, 0, r0, c1, c0, 0 @ load control register 663 mcr p15, 0, r0, c1, c0, 0 @ load control register
663 mrc p15, 0, r0, c1, c0, 0 @ and read it back 664 mrc p15, 0, r0, c1, c0, 0 @ and read it back
664 mov r0, #0 665 mov r0, #0
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be31..81a933eb0903 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,8 +1,14 @@
1config ARM_GIC 1config ARM_GIC
2 select IRQ_DOMAIN 2 select IRQ_DOMAIN
3 select MULTI_IRQ_HANDLER
4 bool
5
6config GIC_NON_BANKED
3 bool 7 bool
4 8
5config ARM_VIC 9config ARM_VIC
10 select IRQ_DOMAIN
11 select MULTI_IRQ_HANDLER
6 bool 12 bool
7 13
8config ARM_VIC_NR 14config ARM_VIC_NR
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 410a546060a2..b2dc2dd7f1df 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -40,13 +40,36 @@
40#include <linux/slab.h> 40#include <linux/slab.h>
41 41
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/exception.h>
43#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
44#include <asm/hardware/gic.h> 45#include <asm/hardware/gic.h>
45 46
46static DEFINE_RAW_SPINLOCK(irq_controller_lock); 47union gic_base {
48 void __iomem *common_base;
49 void __percpu __iomem **percpu_base;
50};
47 51
48/* Address of GIC 0 CPU interface */ 52struct gic_chip_data {
49void __iomem *gic_cpu_base_addr __read_mostly; 53 unsigned int irq_offset;
54 union gic_base dist_base;
55 union gic_base cpu_base;
56#ifdef CONFIG_CPU_PM
57 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
58 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
59 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
60 u32 __percpu *saved_ppi_enable;
61 u32 __percpu *saved_ppi_conf;
62#endif
63#ifdef CONFIG_IRQ_DOMAIN
64 struct irq_domain domain;
65#endif
66 unsigned int gic_irqs;
67#ifdef CONFIG_GIC_NON_BANKED
68 void __iomem *(*get_base)(union gic_base *);
69#endif
70};
71
72static DEFINE_RAW_SPINLOCK(irq_controller_lock);
50 73
51/* 74/*
52 * Supported arch specific GIC irq extension. 75 * Supported arch specific GIC irq extension.
@@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = {
67 90
68static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; 91static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
69 92
93#ifdef CONFIG_GIC_NON_BANKED
94static void __iomem *gic_get_percpu_base(union gic_base *base)
95{
96 return *__this_cpu_ptr(base->percpu_base);
97}
98
99static void __iomem *gic_get_common_base(union gic_base *base)
100{
101 return base->common_base;
102}
103
104static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
105{
106 return data->get_base(&data->dist_base);
107}
108
109static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
110{
111 return data->get_base(&data->cpu_base);
112}
113
114static inline void gic_set_base_accessor(struct gic_chip_data *data,
115 void __iomem *(*f)(union gic_base *))
116{
117 data->get_base = f;
118}
119#else
120#define gic_data_dist_base(d) ((d)->dist_base.common_base)
121#define gic_data_cpu_base(d) ((d)->cpu_base.common_base)
122#define gic_set_base_accessor(d,f)
123#endif
124
70static inline void __iomem *gic_dist_base(struct irq_data *d) 125static inline void __iomem *gic_dist_base(struct irq_data *d)
71{ 126{
72 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 127 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
73 return gic_data->dist_base; 128 return gic_data_dist_base(gic_data);
74} 129}
75 130
76static inline void __iomem *gic_cpu_base(struct irq_data *d) 131static inline void __iomem *gic_cpu_base(struct irq_data *d)
77{ 132{
78 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 133 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
79 return gic_data->cpu_base; 134 return gic_data_cpu_base(gic_data);
80} 135}
81 136
82static inline unsigned int gic_irq(struct irq_data *d) 137static inline unsigned int gic_irq(struct irq_data *d)
@@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
215#define gic_set_wake NULL 270#define gic_set_wake NULL
216#endif 271#endif
217 272
273asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
274{
275 u32 irqstat, irqnr;
276 struct gic_chip_data *gic = &gic_data[0];
277 void __iomem *cpu_base = gic_data_cpu_base(gic);
278
279 do {
280 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
281 irqnr = irqstat & ~0x1c00;
282
283 if (likely(irqnr > 15 && irqnr < 1021)) {
284 irqnr = irq_domain_to_irq(&gic->domain, irqnr);
285 handle_IRQ(irqnr, regs);
286 continue;
287 }
288 if (irqnr < 16) {
289 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
290#ifdef CONFIG_SMP
291 handle_IPI(irqnr, regs);
292#endif
293 continue;
294 }
295 break;
296 } while (1);
297}
298
218static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 299static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
219{ 300{
220 struct gic_chip_data *chip_data = irq_get_handler_data(irq); 301 struct gic_chip_data *chip_data = irq_get_handler_data(irq);
@@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
225 chained_irq_enter(chip, desc); 306 chained_irq_enter(chip, desc);
226 307
227 raw_spin_lock(&irq_controller_lock); 308 raw_spin_lock(&irq_controller_lock);
228 status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); 309 status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
229 raw_spin_unlock(&irq_controller_lock); 310 raw_spin_unlock(&irq_controller_lock);
230 311
231 gic_irq = (status & 0x3ff); 312 gic_irq = (status & 0x3ff);
@@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
270 u32 cpumask; 351 u32 cpumask;
271 unsigned int gic_irqs = gic->gic_irqs; 352 unsigned int gic_irqs = gic->gic_irqs;
272 struct irq_domain *domain = &gic->domain; 353 struct irq_domain *domain = &gic->domain;
273 void __iomem *base = gic->dist_base; 354 void __iomem *base = gic_data_dist_base(gic);
274 u32 cpu = 0; 355 u32 cpu = 0;
275 356
276#ifdef CONFIG_SMP 357#ifdef CONFIG_SMP
@@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
330 411
331static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) 412static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
332{ 413{
333 void __iomem *dist_base = gic->dist_base; 414 void __iomem *dist_base = gic_data_dist_base(gic);
334 void __iomem *base = gic->cpu_base; 415 void __iomem *base = gic_data_cpu_base(gic);
335 int i; 416 int i;
336 417
337 /* 418 /*
@@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr)
368 BUG(); 449 BUG();
369 450
370 gic_irqs = gic_data[gic_nr].gic_irqs; 451 gic_irqs = gic_data[gic_nr].gic_irqs;
371 dist_base = gic_data[gic_nr].dist_base; 452 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
372 453
373 if (!dist_base) 454 if (!dist_base)
374 return; 455 return;
@@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr)
403 BUG(); 484 BUG();
404 485
405 gic_irqs = gic_data[gic_nr].gic_irqs; 486 gic_irqs = gic_data[gic_nr].gic_irqs;
406 dist_base = gic_data[gic_nr].dist_base; 487 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
407 488
408 if (!dist_base) 489 if (!dist_base)
409 return; 490 return;
@@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr)
439 if (gic_nr >= MAX_GIC_NR) 520 if (gic_nr >= MAX_GIC_NR)
440 BUG(); 521 BUG();
441 522
442 dist_base = gic_data[gic_nr].dist_base; 523 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
443 cpu_base = gic_data[gic_nr].cpu_base; 524 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
444 525
445 if (!dist_base || !cpu_base) 526 if (!dist_base || !cpu_base)
446 return; 527 return;
@@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
465 if (gic_nr >= MAX_GIC_NR) 546 if (gic_nr >= MAX_GIC_NR)
466 BUG(); 547 BUG();
467 548
468 dist_base = gic_data[gic_nr].dist_base; 549 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
469 cpu_base = gic_data[gic_nr].cpu_base; 550 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
470 551
471 if (!dist_base || !cpu_base) 552 if (!dist_base || !cpu_base)
472 return; 553 return;
@@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
491 int i; 572 int i;
492 573
493 for (i = 0; i < MAX_GIC_NR; i++) { 574 for (i = 0; i < MAX_GIC_NR; i++) {
575#ifdef CONFIG_GIC_NON_BANKED
576 /* Skip over unused GICs */
577 if (!gic_data[i].get_base)
578 continue;
579#endif
494 switch (cmd) { 580 switch (cmd) {
495 case CPU_PM_ENTER: 581 case CPU_PM_ENTER:
496 gic_cpu_save(i); 582 gic_cpu_save(i);
@@ -564,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = {
564#endif 650#endif
565}; 651};
566 652
567void __init gic_init(unsigned int gic_nr, int irq_start, 653void __init gic_init_bases(unsigned int gic_nr, int irq_start,
568 void __iomem *dist_base, void __iomem *cpu_base) 654 void __iomem *dist_base, void __iomem *cpu_base,
655 u32 percpu_offset)
569{ 656{
570 struct gic_chip_data *gic; 657 struct gic_chip_data *gic;
571 struct irq_domain *domain; 658 struct irq_domain *domain;
@@ -575,8 +662,36 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
575 662
576 gic = &gic_data[gic_nr]; 663 gic = &gic_data[gic_nr];
577 domain = &gic->domain; 664 domain = &gic->domain;
578 gic->dist_base = dist_base; 665#ifdef CONFIG_GIC_NON_BANKED
579 gic->cpu_base = cpu_base; 666 if (percpu_offset) { /* Frankein-GIC without banked registers... */
667 unsigned int cpu;
668
669 gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
670 gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
671 if (WARN_ON(!gic->dist_base.percpu_base ||
672 !gic->cpu_base.percpu_base)) {
673 free_percpu(gic->dist_base.percpu_base);
674 free_percpu(gic->cpu_base.percpu_base);
675 return;
676 }
677
678 for_each_possible_cpu(cpu) {
679 unsigned long offset = percpu_offset * cpu_logical_map(cpu);
680 *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
681 *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
682 }
683
684 gic_set_base_accessor(gic, gic_get_percpu_base);
685 } else
686#endif
687 { /* Normal, sane GIC... */
688 WARN(percpu_offset,
689 "GIC_NON_BANKED not enabled, ignoring %08x offset!",
690 percpu_offset);
691 gic->dist_base.common_base = dist_base;
692 gic->cpu_base.common_base = cpu_base;
693 gic_set_base_accessor(gic, gic_get_common_base);
694 }
580 695
581 /* 696 /*
582 * For primary GICs, skip over SGIs. 697 * For primary GICs, skip over SGIs.
@@ -584,8 +699,6 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
584 */ 699 */
585 domain->hwirq_base = 32; 700 domain->hwirq_base = 32;
586 if (gic_nr == 0) { 701 if (gic_nr == 0) {
587 gic_cpu_base_addr = cpu_base;
588
589 if ((irq_start & 31) > 0) { 702 if ((irq_start & 31) > 0) {
590 domain->hwirq_base = 16; 703 domain->hwirq_base = 16;
591 if (irq_start != -1) 704 if (irq_start != -1)
@@ -597,7 +710,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
597 * Find out how many interrupts are supported. 710 * Find out how many interrupts are supported.
598 * The GIC only supports up to 1020 interrupt sources. 711 * The GIC only supports up to 1020 interrupt sources.
599 */ 712 */
600 gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; 713 gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
601 gic_irqs = (gic_irqs + 1) * 32; 714 gic_irqs = (gic_irqs + 1) * 32;
602 if (gic_irqs > 1020) 715 if (gic_irqs > 1020)
603 gic_irqs = 1020; 716 gic_irqs = 1020;
@@ -645,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
645 dsb(); 758 dsb();
646 759
647 /* this always happens on GIC0 */ 760 /* this always happens on GIC0 */
648 writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); 761 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
649} 762}
650#endif 763#endif
651 764
@@ -656,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
656{ 769{
657 void __iomem *cpu_base; 770 void __iomem *cpu_base;
658 void __iomem *dist_base; 771 void __iomem *dist_base;
772 u32 percpu_offset;
659 int irq; 773 int irq;
660 struct irq_domain *domain = &gic_data[gic_cnt].domain; 774 struct irq_domain *domain = &gic_data[gic_cnt].domain;
661 775
@@ -668,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
668 cpu_base = of_iomap(node, 1); 782 cpu_base = of_iomap(node, 1);
669 WARN(!cpu_base, "unable to map gic cpu registers\n"); 783 WARN(!cpu_base, "unable to map gic cpu registers\n");
670 784
785 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
786 percpu_offset = 0;
787
671 domain->of_node = of_node_get(node); 788 domain->of_node = of_node_get(node);
672 789
673 gic_init(gic_cnt, -1, dist_base, cpu_base); 790 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
674 791
675 if (parent) { 792 if (parent) {
676 irq = irq_of_parse_and_map(node, 0); 793 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index f407a6b35d3d..d8e44a43047c 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -221,17 +221,6 @@
221 */ 221 */
222#define MCODE_BUFF_PER_REQ 256 222#define MCODE_BUFF_PER_REQ 256
223 223
224/*
225 * Mark a _pl330_req as free.
226 * We do it by writing DMAEND as the first instruction
227 * because no valid request is going to have DMAEND as
228 * its first instruction to execute.
229 */
230#define MARK_FREE(req) do { \
231 _emit_END(0, (req)->mc_cpu); \
232 (req)->mc_len = 0; \
233 } while (0)
234
235/* If the _pl330_req is available to the client */ 224/* If the _pl330_req is available to the client */
236#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) 225#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
237 226
@@ -301,8 +290,10 @@ struct pl330_thread {
301 struct pl330_dmac *dmac; 290 struct pl330_dmac *dmac;
302 /* Only two at a time */ 291 /* Only two at a time */
303 struct _pl330_req req[2]; 292 struct _pl330_req req[2];
304 /* Index of the last submitted request */ 293 /* Index of the last enqueued request */
305 unsigned lstenq; 294 unsigned lstenq;
295 /* Index of the last submitted request or -1 if the DMA is stopped */
296 int req_running;
306}; 297};
307 298
308enum pl330_dmac_state { 299enum pl330_dmac_state {
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
778 writel(0, regs + DBGCMD); 769 writel(0, regs + DBGCMD);
779} 770}
780 771
772/*
773 * Mark a _pl330_req as free.
774 * We do it by writing DMAEND as the first instruction
775 * because no valid request is going to have DMAEND as
776 * its first instruction to execute.
777 */
778static void mark_free(struct pl330_thread *thrd, int idx)
779{
780 struct _pl330_req *req = &thrd->req[idx];
781
782 _emit_END(0, req->mc_cpu);
783 req->mc_len = 0;
784
785 thrd->req_running = -1;
786}
787
781static inline u32 _state(struct pl330_thread *thrd) 788static inline u32 _state(struct pl330_thread *thrd)
782{ 789{
783 void __iomem *regs = thrd->dmac->pinfo->base; 790 void __iomem *regs = thrd->dmac->pinfo->base;
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
836 } 843 }
837} 844}
838 845
839/* If the request 'req' of thread 'thrd' is currently active */
840static inline bool _req_active(struct pl330_thread *thrd,
841 struct _pl330_req *req)
842{
843 void __iomem *regs = thrd->dmac->pinfo->base;
844 u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
845
846 if (IS_FREE(req))
847 return false;
848
849 return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
850}
851
852/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
853static inline unsigned _thrd_active(struct pl330_thread *thrd)
854{
855 if (_req_active(thrd, &thrd->req[0]))
856 return 1; /* First req active */
857
858 if (_req_active(thrd, &thrd->req[1]))
859 return 2; /* Second req active */
860
861 return 0;
862}
863
864static void _stop(struct pl330_thread *thrd) 846static void _stop(struct pl330_thread *thrd)
865{ 847{
866 void __iomem *regs = thrd->dmac->pinfo->base; 848 void __iomem *regs = thrd->dmac->pinfo->base;
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
892 struct _arg_GO go; 874 struct _arg_GO go;
893 unsigned ns; 875 unsigned ns;
894 u8 insn[6] = {0, 0, 0, 0, 0, 0}; 876 u8 insn[6] = {0, 0, 0, 0, 0, 0};
877 int idx;
895 878
896 /* Return if already ACTIVE */ 879 /* Return if already ACTIVE */
897 if (_state(thrd) != PL330_STATE_STOPPED) 880 if (_state(thrd) != PL330_STATE_STOPPED)
898 return true; 881 return true;
899 882
900 if (!IS_FREE(&thrd->req[1 - thrd->lstenq])) 883 idx = 1 - thrd->lstenq;
901 req = &thrd->req[1 - thrd->lstenq]; 884 if (!IS_FREE(&thrd->req[idx]))
902 else if (!IS_FREE(&thrd->req[thrd->lstenq])) 885 req = &thrd->req[idx];
903 req = &thrd->req[thrd->lstenq]; 886 else {
904 else 887 idx = thrd->lstenq;
905 req = NULL; 888 if (!IS_FREE(&thrd->req[idx]))
889 req = &thrd->req[idx];
890 else
891 req = NULL;
892 }
906 893
907 /* Return if no request */ 894 /* Return if no request */
908 if (!req || !req->r) 895 if (!req || !req->r)
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
933 /* Only manager can execute GO */ 920 /* Only manager can execute GO */
934 _execute_DBGINSN(thrd, insn, true); 921 _execute_DBGINSN(thrd, insn, true);
935 922
923 thrd->req_running = idx;
924
936 return true; 925 return true;
937} 926}
938 927
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
1382 1371
1383 thrd->req[0].r = NULL; 1372 thrd->req[0].r = NULL;
1384 thrd->req[1].r = NULL; 1373 thrd->req[1].r = NULL;
1385 MARK_FREE(&thrd->req[0]); 1374 mark_free(thrd, 0);
1386 MARK_FREE(&thrd->req[1]); 1375 mark_free(thrd, 1);
1387 1376
1388 /* Clear the reset flag */ 1377 /* Clear the reset flag */
1389 pl330->dmac_tbd.reset_chan &= ~(1 << i); 1378 pl330->dmac_tbd.reset_chan &= ~(1 << i);
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
1461 1450
1462 thrd = &pl330->channels[id]; 1451 thrd = &pl330->channels[id];
1463 1452
1464 active = _thrd_active(thrd); 1453 active = thrd->req_running;
1465 if (!active) /* Aborted */ 1454 if (active == -1) /* Aborted */
1466 continue; 1455 continue;
1467 1456
1468 active -= 1;
1469
1470 rqdone = &thrd->req[active]; 1457 rqdone = &thrd->req[active];
1471 MARK_FREE(rqdone); 1458 mark_free(thrd, active);
1472 1459
1473 /* Get going again ASAP */ 1460 /* Get going again ASAP */
1474 _start(thrd); 1461 _start(thrd);
@@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi)
1480 1467
1481 /* Now that we are in no hurry, do the callbacks */ 1468 /* Now that we are in no hurry, do the callbacks */
1482 while (!list_empty(&pl330->req_done)) { 1469 while (!list_empty(&pl330->req_done)) {
1470 struct pl330_req *r;
1471
1483 rqdone = container_of(pl330->req_done.next, 1472 rqdone = container_of(pl330->req_done.next,
1484 struct _pl330_req, rqd); 1473 struct _pl330_req, rqd);
1485 1474
1486 list_del_init(&rqdone->rqd); 1475 list_del_init(&rqdone->rqd);
1487 1476
1477 /* Detach the req */
1478 r = rqdone->r;
1479 rqdone->r = NULL;
1480
1488 spin_unlock_irqrestore(&pl330->lock, flags); 1481 spin_unlock_irqrestore(&pl330->lock, flags);
1489 _callback(rqdone->r, PL330_ERR_NONE); 1482 _callback(r, PL330_ERR_NONE);
1490 spin_lock_irqsave(&pl330->lock, flags); 1483 spin_lock_irqsave(&pl330->lock, flags);
1491 } 1484 }
1492 1485
@@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1509 struct pl330_thread *thrd = ch_id; 1502 struct pl330_thread *thrd = ch_id;
1510 struct pl330_dmac *pl330; 1503 struct pl330_dmac *pl330;
1511 unsigned long flags; 1504 unsigned long flags;
1512 int ret = 0, active; 1505 int ret = 0, active = thrd->req_running;
1513 1506
1514 if (!thrd || thrd->free || thrd->dmac->state == DYING) 1507 if (!thrd || thrd->free || thrd->dmac->state == DYING)
1515 return -EINVAL; 1508 return -EINVAL;
@@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1525 1518
1526 thrd->req[0].r = NULL; 1519 thrd->req[0].r = NULL;
1527 thrd->req[1].r = NULL; 1520 thrd->req[1].r = NULL;
1528 MARK_FREE(&thrd->req[0]); 1521 mark_free(thrd, 0);
1529 MARK_FREE(&thrd->req[1]); 1522 mark_free(thrd, 1);
1530 break; 1523 break;
1531 1524
1532 case PL330_OP_ABORT: 1525 case PL330_OP_ABORT:
1533 active = _thrd_active(thrd);
1534
1535 /* Make sure the channel is stopped */ 1526 /* Make sure the channel is stopped */
1536 _stop(thrd); 1527 _stop(thrd);
1537 1528
1538 /* ABORT is only for the active req */ 1529 /* ABORT is only for the active req */
1539 if (!active) 1530 if (active == -1)
1540 break; 1531 break;
1541 1532
1542 active--;
1543
1544 thrd->req[active].r = NULL; 1533 thrd->req[active].r = NULL;
1545 MARK_FREE(&thrd->req[active]); 1534 mark_free(thrd, active);
1546 1535
1547 /* Start the next */ 1536 /* Start the next */
1548 case PL330_OP_START: 1537 case PL330_OP_START:
1549 if (!_thrd_active(thrd) && !_start(thrd)) 1538 if ((active == -1) && !_start(thrd))
1550 ret = -EIO; 1539 ret = -EIO;
1551 break; 1540 break;
1552 1541
@@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
1587 else 1576 else
1588 pstatus->faulting = false; 1577 pstatus->faulting = false;
1589 1578
1590 active = _thrd_active(thrd); 1579 active = thrd->req_running;
1591 1580
1592 if (!active) { 1581 if (active == -1) {
1593 /* Indicate that the thread is not running */ 1582 /* Indicate that the thread is not running */
1594 pstatus->top_req = NULL; 1583 pstatus->top_req = NULL;
1595 pstatus->wait_req = NULL; 1584 pstatus->wait_req = NULL;
1596 } else { 1585 } else {
1597 active--;
1598 pstatus->top_req = thrd->req[active].r; 1586 pstatus->top_req = thrd->req[active].r;
1599 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) 1587 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
1600 ? thrd->req[1 - active].r : NULL; 1588 ? thrd->req[1 - active].r : NULL;
@@ -1659,9 +1647,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
1659 thrd->free = false; 1647 thrd->free = false;
1660 thrd->lstenq = 1; 1648 thrd->lstenq = 1;
1661 thrd->req[0].r = NULL; 1649 thrd->req[0].r = NULL;
1662 MARK_FREE(&thrd->req[0]); 1650 mark_free(thrd, 0);
1663 thrd->req[1].r = NULL; 1651 thrd->req[1].r = NULL;
1664 MARK_FREE(&thrd->req[1]); 1652 mark_free(thrd, 1);
1665 break; 1653 break;
1666 } 1654 }
1667 } 1655 }
@@ -1767,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
1767 thrd->req[0].mc_bus = pl330->mcode_bus 1755 thrd->req[0].mc_bus = pl330->mcode_bus
1768 + (thrd->id * pi->mcbufsz); 1756 + (thrd->id * pi->mcbufsz);
1769 thrd->req[0].r = NULL; 1757 thrd->req[0].r = NULL;
1770 MARK_FREE(&thrd->req[0]); 1758 mark_free(thrd, 0);
1771 1759
1772 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu 1760 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
1773 + pi->mcbufsz / 2; 1761 + pi->mcbufsz / 2;
1774 thrd->req[1].mc_bus = thrd->req[0].mc_bus 1762 thrd->req[1].mc_bus = thrd->req[0].mc_bus
1775 + pi->mcbufsz / 2; 1763 + pi->mcbufsz / 2;
1776 thrd->req[1].r = NULL; 1764 thrd->req[1].r = NULL;
1777 MARK_FREE(&thrd->req[1]); 1765 mark_free(thrd, 1);
1778} 1766}
1779 1767
1780static int dmac_alloc_threads(struct pl330_dmac *pl330) 1768static int dmac_alloc_threads(struct pl330_dmac *pl330)
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 2393b5bc96fa..8794a34eae61 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next,
143} 143}
144 144
145static struct clock_event_device sp804_clockevent = { 145static struct clock_event_device sp804_clockevent = {
146 .shift = 32,
147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 146 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
148 .set_mode = sp804_set_mode, 147 .set_mode = sp804_set_mode,
149 .set_next_event = sp804_set_next_event, 148 .set_next_event = sp804_set_next_event,
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
169 168
170 clkevt_base = base; 169 clkevt_base = base;
171 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); 170 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
172
173 evt->name = name; 171 evt->name = name;
174 evt->irq = irq; 172 evt->irq = irq;
175 evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);
176 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
177 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
178 173
179 setup_irq(irq, &sp804_timer_irq); 174 setup_irq(irq, &sp804_timer_irq);
180 clockevents_register_device(evt); 175 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
181} 176}
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 01f18a421b17..dcb004a804c7 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -19,17 +19,22 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#include <linux/export.h>
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/list.h> 24#include <linux/list.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irqdomain.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_irq.h>
25#include <linux/syscore_ops.h> 30#include <linux/syscore_ops.h>
26#include <linux/device.h> 31#include <linux/device.h>
27#include <linux/amba/bus.h> 32#include <linux/amba/bus.h>
28 33
34#include <asm/exception.h>
29#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
30#include <asm/hardware/vic.h> 36#include <asm/hardware/vic.h>
31 37
32#ifdef CONFIG_PM
33/** 38/**
34 * struct vic_device - VIC PM device 39 * struct vic_device - VIC PM device
35 * @irq: The IRQ number for the base of the VIC. 40 * @irq: The IRQ number for the base of the VIC.
@@ -40,6 +45,7 @@
40 * @int_enable: Save for VIC_INT_ENABLE. 45 * @int_enable: Save for VIC_INT_ENABLE.
41 * @soft_int: Save for VIC_INT_SOFT. 46 * @soft_int: Save for VIC_INT_SOFT.
42 * @protect: Save for VIC_PROTECT. 47 * @protect: Save for VIC_PROTECT.
48 * @domain: The IRQ domain for the VIC.
43 */ 49 */
44struct vic_device { 50struct vic_device {
45 void __iomem *base; 51 void __iomem *base;
@@ -50,13 +56,13 @@ struct vic_device {
50 u32 int_enable; 56 u32 int_enable;
51 u32 soft_int; 57 u32 soft_int;
52 u32 protect; 58 u32 protect;
59 struct irq_domain domain;
53}; 60};
54 61
55/* we cannot allocate memory when VICs are initially registered */ 62/* we cannot allocate memory when VICs are initially registered */
56static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; 63static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
57 64
58static int vic_id; 65static int vic_id;
59#endif /* CONFIG_PM */
60 66
61/** 67/**
62 * vic_init2 - common initialisation code 68 * vic_init2 - common initialisation code
@@ -156,39 +162,50 @@ static int __init vic_pm_init(void)
156 return 0; 162 return 0;
157} 163}
158late_initcall(vic_pm_init); 164late_initcall(vic_pm_init);
165#endif /* CONFIG_PM */
159 166
160/** 167/**
161 * vic_pm_register - Register a VIC for later power management control 168 * vic_register() - Register a VIC.
162 * @base: The base address of the VIC. 169 * @base: The base address of the VIC.
163 * @irq: The base IRQ for the VIC. 170 * @irq: The base IRQ for the VIC.
164 * @resume_sources: bitmask of interrupts allowed for resume sources. 171 * @resume_sources: bitmask of interrupts allowed for resume sources.
172 * @node: The device tree node associated with the VIC.
165 * 173 *
166 * Register the VIC with the system device tree so that it can be notified 174 * Register the VIC with the system device tree so that it can be notified
167 * of suspend and resume requests and ensure that the correct actions are 175 * of suspend and resume requests and ensure that the correct actions are
168 * taken to re-instate the settings on resume. 176 * taken to re-instate the settings on resume.
177 *
178 * This also configures the IRQ domain for the VIC.
169 */ 179 */
170static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) 180static void __init vic_register(void __iomem *base, unsigned int irq,
181 u32 resume_sources, struct device_node *node)
171{ 182{
172 struct vic_device *v; 183 struct vic_device *v;
173 184
174 if (vic_id >= ARRAY_SIZE(vic_devices)) 185 if (vic_id >= ARRAY_SIZE(vic_devices)) {
175 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); 186 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
176 else { 187 return;
177 v = &vic_devices[vic_id];
178 v->base = base;
179 v->resume_sources = resume_sources;
180 v->irq = irq;
181 vic_id++;
182 } 188 }
189
190 v = &vic_devices[vic_id];
191 v->base = base;
192 v->resume_sources = resume_sources;
193 v->irq = irq;
194 vic_id++;
195
196 v->domain.irq_base = irq;
197 v->domain.nr_irq = 32;
198#ifdef CONFIG_OF_IRQ
199 v->domain.of_node = of_node_get(node);
200#endif /* CONFIG_OF */
201 v->domain.ops = &irq_domain_simple_ops;
202 irq_domain_add(&v->domain);
183} 203}
184#else
185static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
186#endif /* CONFIG_PM */
187 204
188static void vic_ack_irq(struct irq_data *d) 205static void vic_ack_irq(struct irq_data *d)
189{ 206{
190 void __iomem *base = irq_data_get_irq_chip_data(d); 207 void __iomem *base = irq_data_get_irq_chip_data(d);
191 unsigned int irq = d->irq & 31; 208 unsigned int irq = d->hwirq;
192 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 209 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
193 /* moreover, clear the soft-triggered, in case it was the reason */ 210 /* moreover, clear the soft-triggered, in case it was the reason */
194 writel(1 << irq, base + VIC_INT_SOFT_CLEAR); 211 writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d)
197static void vic_mask_irq(struct irq_data *d) 214static void vic_mask_irq(struct irq_data *d)
198{ 215{
199 void __iomem *base = irq_data_get_irq_chip_data(d); 216 void __iomem *base = irq_data_get_irq_chip_data(d);
200 unsigned int irq = d->irq & 31; 217 unsigned int irq = d->hwirq;
201 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 218 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
202} 219}
203 220
204static void vic_unmask_irq(struct irq_data *d) 221static void vic_unmask_irq(struct irq_data *d)
205{ 222{
206 void __iomem *base = irq_data_get_irq_chip_data(d); 223 void __iomem *base = irq_data_get_irq_chip_data(d);
207 unsigned int irq = d->irq & 31; 224 unsigned int irq = d->hwirq;
208 writel(1 << irq, base + VIC_INT_ENABLE); 225 writel(1 << irq, base + VIC_INT_ENABLE);
209} 226}
210 227
@@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
226static int vic_set_wake(struct irq_data *d, unsigned int on) 243static int vic_set_wake(struct irq_data *d, unsigned int on)
227{ 244{
228 struct vic_device *v = vic_from_irq(d->irq); 245 struct vic_device *v = vic_from_irq(d->irq);
229 unsigned int off = d->irq & 31; 246 unsigned int off = d->hwirq;
230 u32 bit = 1 << off; 247 u32 bit = 1 << off;
231 248
232 if (!v) 249 if (!v)
@@ -301,7 +318,7 @@ static void __init vic_set_irq_sources(void __iomem *base,
301 * and 020 within the page. We call this "second block". 318 * and 020 within the page. We call this "second block".
302 */ 319 */
303static void __init vic_init_st(void __iomem *base, unsigned int irq_start, 320static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
304 u32 vic_sources) 321 u32 vic_sources, struct device_node *node)
305{ 322{
306 unsigned int i; 323 unsigned int i;
307 int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; 324 int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
@@ -328,17 +345,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
328 } 345 }
329 346
330 vic_set_irq_sources(base, irq_start, vic_sources); 347 vic_set_irq_sources(base, irq_start, vic_sources);
348 vic_register(base, irq_start, 0, node);
331} 349}
332 350
333/** 351static void __init __vic_init(void __iomem *base, unsigned int irq_start,
334 * vic_init - initialise a vectored interrupt controller 352 u32 vic_sources, u32 resume_sources,
335 * @base: iomem base address 353 struct device_node *node)
336 * @irq_start: starting interrupt number, must be muliple of 32
337 * @vic_sources: bitmask of interrupt sources to allow
338 * @resume_sources: bitmask of interrupt sources to allow for resume
339 */
340void __init vic_init(void __iomem *base, unsigned int irq_start,
341 u32 vic_sources, u32 resume_sources)
342{ 354{
343 unsigned int i; 355 unsigned int i;
344 u32 cellid = 0; 356 u32 cellid = 0;
@@ -356,7 +368,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
356 368
357 switch(vendor) { 369 switch(vendor) {
358 case AMBA_VENDOR_ST: 370 case AMBA_VENDOR_ST:
359 vic_init_st(base, irq_start, vic_sources); 371 vic_init_st(base, irq_start, vic_sources, node);
360 return; 372 return;
361 default: 373 default:
362 printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); 374 printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
@@ -375,5 +387,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
375 387
376 vic_set_irq_sources(base, irq_start, vic_sources); 388 vic_set_irq_sources(base, irq_start, vic_sources);
377 389
378 vic_pm_register(base, irq_start, resume_sources); 390 vic_register(base, irq_start, resume_sources, node);
391}
392
393/**
394 * vic_init() - initialise a vectored interrupt controller
395 * @base: iomem base address
396 * @irq_start: starting interrupt number, must be muliple of 32
397 * @vic_sources: bitmask of interrupt sources to allow
398 * @resume_sources: bitmask of interrupt sources to allow for resume
399 */
400void __init vic_init(void __iomem *base, unsigned int irq_start,
401 u32 vic_sources, u32 resume_sources)
402{
403 __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
404}
405
406#ifdef CONFIG_OF
407int __init vic_of_init(struct device_node *node, struct device_node *parent)
408{
409 void __iomem *regs;
410 int irq_base;
411
412 if (WARN(parent, "non-root VICs are not supported"))
413 return -EINVAL;
414
415 regs = of_iomap(node, 0);
416 if (WARN_ON(!regs))
417 return -EIO;
418
419 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
420 if (WARN_ON(irq_base < 0))
421 goto out_unmap;
422
423 __vic_init(regs, irq_base, ~0, ~0, node);
424
425 return 0;
426
427 out_unmap:
428 iounmap(regs);
429
430 return -EIO;
431}
432#endif /* CONFIG OF */
433
434/*
435 * Handle each interrupt in a single VIC. Returns non-zero if we've
436 * handled at least one interrupt. This does a single read of the
437 * status register and handles all interrupts in order from LSB first.
438 */
439static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
440{
441 u32 stat, irq;
442 int handled = 0;
443
444 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
445 while (stat) {
446 irq = ffs(stat) - 1;
447 handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
448 stat &= ~(1 << irq);
449 handled = 1;
450 }
451
452 return handled;
453}
454
455/*
456 * Keep iterating over all registered VIC's until there are no pending
457 * interrupts.
458 */
459asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
460{
461 int i, handled;
462
463 do {
464 for (i = 0, handled = 0; i < vic_id; ++i)
465 handled |= handle_one_vic(&vic_devices[i], regs);
466 } while (handled);
379} 467}
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 11a4192197c8..cf497ce41dfe 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
18CONFIG_ARCH_IMX_V4_V5=y 18CONFIG_ARCH_IMX_V4_V5=y
19CONFIG_ARCH_MX1ADS=y 19CONFIG_ARCH_MX1ADS=y
20CONFIG_MACH_SCB9328=y 20CONFIG_MACH_SCB9328=y
21CONFIG_MACH_APF9328=y
21CONFIG_MACH_MX21ADS=y 22CONFIG_MACH_MX21ADS=y
22CONFIG_MACH_MX25_3DS=y 23CONFIG_MACH_MX25_3DS=y
23CONFIG_MACH_EUKREA_CPUIMX25=y 24CONFIG_MACH_EUKREA_CPUIMX25SD=y
24CONFIG_MACH_MX27ADS=y 25CONFIG_MACH_MX27ADS=y
25CONFIG_MACH_PCM038=y 26CONFIG_MACH_PCM038=y
26CONFIG_MACH_CPUIMX27=y 27CONFIG_MACH_CPUIMX27=y
@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
72CONFIG_MTD_CFI_INTELEXT=y 73CONFIG_MTD_CFI_INTELEXT=y
73CONFIG_MTD_PHYSMAP=y 74CONFIG_MTD_PHYSMAP=y
74CONFIG_MTD_NAND=y 75CONFIG_MTD_NAND=y
76CONFIG_MTD_NAND_MXC=y
75CONFIG_MTD_UBI=y 77CONFIG_MTD_UBI=y
76CONFIG_MISC_DEVICES=y 78CONFIG_MISC_DEVICES=y
77CONFIG_EEPROM_AT24=y 79CONFIG_EEPROM_AT24=y
78CONFIG_EEPROM_AT25=y 80CONFIG_EEPROM_AT25=y
79CONFIG_NETDEVICES=y 81CONFIG_NETDEVICES=y
80CONFIG_NET_ETHERNET=y
81CONFIG_SMC91X=y
82CONFIG_DM9000=y 82CONFIG_DM9000=y
83CONFIG_SMC91X=y
83CONFIG_SMC911X=y 84CONFIG_SMC911X=y
84# CONFIG_NETDEV_1000 is not set 85CONFIG_SMSC_PHY=y
85# CONFIG_NETDEV_10000 is not set
86# CONFIG_INPUT_MOUSEDEV is not set 86# CONFIG_INPUT_MOUSEDEV is not set
87CONFIG_INPUT_EVDEV=y 87CONFIG_INPUT_EVDEV=y
88# CONFIG_INPUT_KEYBOARD is not set 88# CONFIG_INPUT_KEYBOARD is not set
@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
100CONFIG_I2C_IMX=y 100CONFIG_I2C_IMX=y
101CONFIG_SPI=y 101CONFIG_SPI=y
102CONFIG_SPI_IMX=y 102CONFIG_SPI_IMX=y
103CONFIG_SPI_SPIDEV=y
103CONFIG_W1=y 104CONFIG_W1=y
104CONFIG_W1_MASTER_MXC=y 105CONFIG_W1_MASTER_MXC=y
105CONFIG_W1_SLAVE_THERM=y 106CONFIG_W1_SLAVE_THERM=y
@@ -139,6 +140,7 @@ CONFIG_MMC=y
139CONFIG_MMC_MXC=y 140CONFIG_MMC_MXC=y
140CONFIG_NEW_LEDS=y 141CONFIG_NEW_LEDS=y
141CONFIG_LEDS_CLASS=y 142CONFIG_LEDS_CLASS=y
143CONFIG_LEDS_GPIO=y
142CONFIG_LEDS_MC13783=y 144CONFIG_LEDS_MC13783=y
143CONFIG_LEDS_TRIGGERS=y 145CONFIG_LEDS_TRIGGERS=y
144CONFIG_LEDS_TRIGGER_TIMER=y 146CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig
deleted file mode 100644
index c75c9fcede58..000000000000
--- a/arch/arm/configs/pcontrol_g20_defconfig
+++ /dev/null
@@ -1,175 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-"
3# CONFIG_LOCALVERSION_AUTO is not set
4# CONFIG_SWAP is not set
5CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y
7CONFIG_TREE_PREEMPT_RCU=y
8CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y
10CONFIG_LOG_BUF_SHIFT=14
11CONFIG_NAMESPACES=y
12CONFIG_BLK_DEV_INITRD=y
13CONFIG_EXPERT=y
14# CONFIG_SYSCTL_SYSCALL is not set
15# CONFIG_KALLSYMS is not set
16# CONFIG_VM_EVENT_COUNTERS is not set
17# CONFIG_COMPAT_BRK is not set
18CONFIG_SLAB=y
19CONFIG_MODULES=y
20CONFIG_MODULE_UNLOAD=y
21# CONFIG_LBDAF is not set
22# CONFIG_BLK_DEV_BSG is not set
23CONFIG_DEFAULT_DEADLINE=y
24CONFIG_ARCH_AT91=y
25CONFIG_ARCH_AT91SAM9G20=y
26CONFIG_MACH_PCONTROL_G20=y
27CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
28CONFIG_NO_HZ=y
29CONFIG_HIGH_RES_TIMERS=y
30CONFIG_PREEMPT=y
31CONFIG_AEABI=y
32# CONFIG_OABI_COMPAT is not set
33CONFIG_ZBOOT_ROM_TEXT=0x0
34CONFIG_ZBOOT_ROM_BSS=0x0
35CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw"
36CONFIG_VFP=y
37CONFIG_BINFMT_MISC=y
38CONFIG_NET=y
39CONFIG_PACKET=y
40CONFIG_UNIX=y
41CONFIG_INET=y
42# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
43# CONFIG_INET_XFRM_MODE_TUNNEL is not set
44# CONFIG_INET_XFRM_MODE_BEET is not set
45# CONFIG_INET_LRO is not set
46# CONFIG_IPV6 is not set
47CONFIG_VLAN_8021Q=y
48# CONFIG_WIRELESS is not set
49CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
50# CONFIG_FW_LOADER is not set
51CONFIG_MTD=y
52CONFIG_MTD_PARTITIONS=y
53CONFIG_MTD_CMDLINE_PARTS=y
54CONFIG_MTD_CHAR=y
55CONFIG_MTD_BLOCK=y
56CONFIG_MTD_COMPLEX_MAPPINGS=y
57CONFIG_MTD_PHRAM=m
58CONFIG_MTD_NAND=y
59CONFIG_MTD_NAND_ATMEL=y
60CONFIG_BLK_DEV_LOOP=y
61CONFIG_BLK_DEV_RAM=y
62CONFIG_BLK_DEV_RAM_SIZE=8192
63CONFIG_ATMEL_TCLIB=y
64CONFIG_EEPROM_AT24=m
65CONFIG_SCSI=m
66# CONFIG_SCSI_PROC_FS is not set
67CONFIG_BLK_DEV_SD=m
68CONFIG_SCSI_MULTI_LUN=y
69# CONFIG_SCSI_LOWLEVEL is not set
70CONFIG_NETDEVICES=y
71CONFIG_MACVLAN=m
72CONFIG_TUN=m
73CONFIG_SMSC_PHY=m
74CONFIG_BROADCOM_PHY=m
75CONFIG_NET_ETHERNET=y
76CONFIG_MII=y
77CONFIG_MACB=y
78CONFIG_SMSC911X=m
79# CONFIG_NETDEV_1000 is not set
80# CONFIG_NETDEV_10000 is not set
81# CONFIG_WLAN is not set
82CONFIG_PPP=m
83CONFIG_PPP_ASYNC=m
84CONFIG_PPP_DEFLATE=m
85CONFIG_PPP_MPPE=m
86CONFIG_INPUT_POLLDEV=y
87CONFIG_INPUT_SPARSEKMAP=y
88# CONFIG_INPUT_MOUSEDEV is not set
89CONFIG_INPUT_EVDEV=m
90CONFIG_INPUT_EVBUG=m
91# CONFIG_KEYBOARD_ATKBD is not set
92CONFIG_KEYBOARD_GPIO=m
93CONFIG_KEYBOARD_MATRIX=m
94# CONFIG_INPUT_MOUSE is not set
95CONFIG_INPUT_TOUCHSCREEN=y
96CONFIG_INPUT_MISC=y
97CONFIG_INPUT_UINPUT=m
98CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
99# CONFIG_SERIO is not set
100# CONFIG_DEVKMEM is not set
101CONFIG_SERIAL_ATMEL=y
102CONFIG_SERIAL_ATMEL_CONSOLE=y
103CONFIG_SERIAL_MAX3100=m
104# CONFIG_LEGACY_PTYS is not set
105# CONFIG_HW_RANDOM is not set
106CONFIG_R3964=m
107CONFIG_I2C=m
108CONFIG_I2C_CHARDEV=m
109# CONFIG_I2C_HELPER_AUTO is not set
110CONFIG_I2C_GPIO=m
111CONFIG_SPI=y
112CONFIG_SPI_ATMEL=m
113CONFIG_SPI_SPIDEV=m
114CONFIG_GPIO_SYSFS=y
115CONFIG_W1=m
116CONFIG_W1_MASTER_GPIO=m
117CONFIG_W1_SLAVE_DS2431=m
118# CONFIG_HWMON is not set
119CONFIG_WATCHDOG=y
120CONFIG_AT91SAM9X_WATCHDOG=y
121# CONFIG_MFD_SUPPORT is not set
122# CONFIG_HID_SUPPORT is not set
123CONFIG_USB=y
124# CONFIG_USB_DEVICE_CLASS is not set
125CONFIG_USB_OHCI_HCD=y
126CONFIG_USB_STORAGE=m
127CONFIG_USB_LIBUSUAL=y
128CONFIG_USB_SERIAL=m
129CONFIG_USB_SERIAL_GENERIC=y
130CONFIG_USB_SERIAL_FTDI_SIO=m
131CONFIG_USB_SERIAL_PL2303=m
132CONFIG_USB_GADGET=y
133CONFIG_USB_ZERO=m
134CONFIG_USB_ETH=m
135CONFIG_USB_FILE_STORAGE=m
136CONFIG_USB_G_SERIAL=m
137CONFIG_USB_G_HID=m
138CONFIG_MMC=y
139CONFIG_MMC_UNSAFE_RESUME=y
140CONFIG_MMC_ATMELMCI=y
141CONFIG_NEW_LEDS=y
142CONFIG_LEDS_CLASS=y
143CONFIG_LEDS_GPIO=y
144CONFIG_LEDS_TRIGGERS=y
145CONFIG_LEDS_TRIGGER_TIMER=y
146CONFIG_LEDS_TRIGGER_HEARTBEAT=y
147CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
148CONFIG_RTC_CLASS=y
149CONFIG_RTC_DRV_AT91SAM9=y
150CONFIG_AUXDISPLAY=y
151CONFIG_UIO=y
152CONFIG_UIO_PDRV=y
153CONFIG_STAGING=y
154# CONFIG_STAGING_EXCLUDE_BUILD is not set
155CONFIG_IIO=y
156CONFIG_EXT2_FS=y
157CONFIG_EXT3_FS=y
158# CONFIG_EXT3_FS_XATTR is not set
159CONFIG_VFAT_FS=y
160CONFIG_TMPFS=y
161CONFIG_JFFS2_FS=y
162CONFIG_NFS_FS=y
163CONFIG_NFS_V3=y
164CONFIG_NFS_V4=y
165CONFIG_PARTITION_ADVANCED=y
166CONFIG_NLS_CODEPAGE_437=y
167CONFIG_NLS_CODEPAGE_850=y
168CONFIG_NLS_ISO8859_1=y
169CONFIG_NLS_ISO8859_15=y
170CONFIG_NLS_UTF8=y
171# CONFIG_RCU_CPU_STALL_DETECTOR is not set
172CONFIG_CRYPTO=y
173CONFIG_CRYPTO_ANSI_CPRNG=y
174# CONFIG_CRYPTO_HW is not set
175CONFIG_CRC_CCITT=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 29035e86a59d..b6e65dedfd71 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -187,6 +187,17 @@
187#endif 187#endif
188 188
189/* 189/*
190 * Instruction barrier
191 */
192 .macro instr_sync
193#if __LINUX_ARM_ARCH__ >= 7
194 isb
195#elif __LINUX_ARM_ARCH__ == 6
196 mcr p15, 0, r0, c7, c5, 4
197#endif
198 .endm
199
200/*
190 * SMP data memory barrier 201 * SMP data memory barrier
191 */ 202 */
192 .macro smp_dmb mode 203 .macro smp_dmb mode
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 9abe7a07d5ac..fac79dceb736 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -32,7 +32,6 @@
32 32
33#define __BUG(__file, __line, __value) \ 33#define __BUG(__file, __line, __value) \
34do { \ 34do { \
35 BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \
36 asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ 35 asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \
37 ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ 36 ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
38 "2:\t.asciz " #__file "\n" \ 37 "2:\t.asciz " #__file "\n" \
diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h
new file mode 100644
index 000000000000..a0ada3ea4358
--- /dev/null
+++ b/arch/arm/include/asm/cti.h
@@ -0,0 +1,179 @@
1#ifndef __ASMARM_CTI_H
2#define __ASMARM_CTI_H
3
4#include <asm/io.h>
5
6/* The registers' definition is from section 3.2 of
7 * Embedded Cross Trigger Revision: r0p0
8 */
9#define CTICONTROL 0x000
10#define CTISTATUS 0x004
11#define CTILOCK 0x008
12#define CTIPROTECTION 0x00C
13#define CTIINTACK 0x010
14#define CTIAPPSET 0x014
15#define CTIAPPCLEAR 0x018
16#define CTIAPPPULSE 0x01c
17#define CTIINEN 0x020
18#define CTIOUTEN 0x0A0
19#define CTITRIGINSTATUS 0x130
20#define CTITRIGOUTSTATUS 0x134
21#define CTICHINSTATUS 0x138
22#define CTICHOUTSTATUS 0x13c
23#define CTIPERIPHID0 0xFE0
24#define CTIPERIPHID1 0xFE4
25#define CTIPERIPHID2 0xFE8
26#define CTIPERIPHID3 0xFEC
27#define CTIPCELLID0 0xFF0
28#define CTIPCELLID1 0xFF4
29#define CTIPCELLID2 0xFF8
30#define CTIPCELLID3 0xFFC
31
32/* The below are from section 3.6.4 of
33 * CoreSight v1.0 Architecture Specification
34 */
35#define LOCKACCESS 0xFB0
36#define LOCKSTATUS 0xFB4
37
38/* write this value to LOCKACCESS will unlock the module, and
39 * other value will lock the module
40 */
41#define LOCKCODE 0xC5ACCE55
42
43/**
44 * struct cti - cross trigger interface struct
45 * @base: mapped virtual address for the cti base
46 * @irq: irq number for the cti
47 * @trig_out_for_irq: triger out number which will cause
48 * the @irq happen
49 *
50 * cti struct used to operate cti registers.
51 */
52struct cti {
53 void __iomem *base;
54 int irq;
55 int trig_out_for_irq;
56};
57
58/**
59 * cti_init - initialize the cti instance
60 * @cti: cti instance
61 * @base: mapped virtual address for the cti base
62 * @irq: irq number for the cti
63 * @trig_out: triger out number which will cause
64 * the @irq happen
65 *
66 * called by machine code to pass the board dependent
67 * @base, @irq and @trig_out to cti.
68 */
69static inline void cti_init(struct cti *cti,
70 void __iomem *base, int irq, int trig_out)
71{
72 cti->base = base;
73 cti->irq = irq;
74 cti->trig_out_for_irq = trig_out;
75}
76
77/**
78 * cti_map_trigger - use the @chan to map @trig_in to @trig_out
79 * @cti: cti instance
80 * @trig_in: trigger in number
81 * @trig_out: trigger out number
82 * @channel: channel number
83 *
84 * This function maps one trigger in of @trig_in to one trigger
85 * out of @trig_out using the channel @chan.
86 */
87static inline void cti_map_trigger(struct cti *cti,
88 int trig_in, int trig_out, int chan)
89{
90 void __iomem *base = cti->base;
91 unsigned long val;
92
93 val = __raw_readl(base + CTIINEN + trig_in * 4);
94 val |= BIT(chan);
95 __raw_writel(val, base + CTIINEN + trig_in * 4);
96
97 val = __raw_readl(base + CTIOUTEN + trig_out * 4);
98 val |= BIT(chan);
99 __raw_writel(val, base + CTIOUTEN + trig_out * 4);
100}
101
102/**
103 * cti_enable - enable the cti module
104 * @cti: cti instance
105 *
106 * enable the cti module
107 */
108static inline void cti_enable(struct cti *cti)
109{
110 __raw_writel(0x1, cti->base + CTICONTROL);
111}
112
113/**
114 * cti_disable - disable the cti module
115 * @cti: cti instance
116 *
117 * enable the cti module
118 */
119static inline void cti_disable(struct cti *cti)
120{
121 __raw_writel(0, cti->base + CTICONTROL);
122}
123
124/**
125 * cti_irq_ack - clear the cti irq
126 * @cti: cti instance
127 *
128 * clear the cti irq
129 */
130static inline void cti_irq_ack(struct cti *cti)
131{
132 void __iomem *base = cti->base;
133 unsigned long val;
134
135 val = __raw_readl(base + CTIINTACK);
136 val |= BIT(cti->trig_out_for_irq);
137 __raw_writel(val, base + CTIINTACK);
138}
139
140/**
141 * cti_unlock - unlock cti module
142 * @cti: cti instance
143 *
144 * unlock the cti module, or else any writes to the cti
145 * module is not allowed.
146 */
147static inline void cti_unlock(struct cti *cti)
148{
149 void __iomem *base = cti->base;
150 unsigned long val;
151
152 val = __raw_readl(base + LOCKSTATUS);
153
154 if (val & 1) {
155 val = LOCKCODE;
156 __raw_writel(val, base + LOCKACCESS);
157 }
158}
159
160/**
161 * cti_lock - lock cti module
162 * @cti: cti instance
163 *
164 * lock the cti module, so any writes to the cti
165 * module will be not allowed.
166 */
167static inline void cti_lock(struct cti *cti)
168{
169 void __iomem *base = cti->base;
170 unsigned long val;
171
172 val = __raw_readl(base + LOCKSTATUS);
173
174 if (!(val & 1)) {
175 val = ~LOCKCODE;
176 __raw_writel(val, base + LOCKACCESS);
177 }
178}
179#endif
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h
new file mode 100644
index 000000000000..0df7a2c1fc3d
--- /dev/null
+++ b/arch/arm/include/asm/edac.h
@@ -0,0 +1,48 @@
1/*
2 * Copyright 2011 Calxeda, Inc.
3 * Based on PPC version Copyright 2007 MontaVista Software, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17#ifndef ASM_EDAC_H
18#define ASM_EDAC_H
19/*
20 * ECC atomic, DMA, SMP and interrupt safe scrub function.
21 * Implements the per arch atomic_scrub() that EDAC use for software
22 * ECC scrubbing. It reads memory and then writes back the original
23 * value, allowing the hardware to detect and correct memory errors.
24 */
25static inline void atomic_scrub(void *va, u32 size)
26{
27#if __LINUX_ARM_ARCH__ >= 6
28 unsigned int *virt_addr = va;
29 unsigned int temp, temp2;
30 unsigned int i;
31
32 for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
33 /* Very carefully read and write to memory atomically
34 * so we are interrupt, DMA and SMP safe.
35 */
36 __asm__ __volatile__("\n"
37 "1: ldrex %0, [%2]\n"
38 " strex %1, %0, [%2]\n"
39 " teq %1, #0\n"
40 " bne 1b\n"
41 : "=&r"(temp), "=&r"(temp2)
42 : "r"(virt_addr)
43 : "cc");
44 }
45#endif
46}
47
48#endif
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
deleted file mode 100644
index 3ceb85e43850..000000000000
--- a/arch/arm/include/asm/entry-macro-vic2.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/* arch/arm/include/asm/entry-macro-vic2.S
2 *
3 * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * http://armlinux.simtec.co.uk/
8 * Ben Dooks <ben@simtec.co.uk>
9 *
10 * Low-level IRQ helper macros for a device with two VICs
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15*/
16
17/* This should be included from <mach/entry-macro.S> with the necessary
18 * defines for virtual addresses and IRQ bases for the two vics.
19 *
20 * The code needs the following defined:
21 * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
22 * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
23 * VA_VIC0 Virtual address of VIC0
24 * VA_VIC1 Virtual address of VIC1
25 *
26 * Note, code assumes VIC0's virtual address is an ARM immediate constant
27 * away from VIC1.
28*/
29
30#include <asm/hardware/vic.h>
31
32 .macro disable_fiq
33 .endm
34
35 .macro get_irqnr_preamble, base, tmp
36 ldr \base, =VA_VIC0
37 .endm
38
39 .macro arch_ret_to_user, tmp1, tmp2
40 .endm
41
42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
43
44 @ check the vic0
45 mov \irqnr, #IRQ_VIC0_BASE + 31
46 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
47 teq \irqstat, #0
48
49 @ otherwise try vic1
50 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
51 addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
52 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
53 teqeq \irqstat, #0
54
55 clzne \irqstat, \irqstat
56 subne \irqnr, \irqnr, \irqstat
57 .endm
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 11ad0bfbb0ad..7151753b0989 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,6 +1,10 @@
1#ifndef _ARCH_ARM_GPIO_H 1#ifndef _ARCH_ARM_GPIO_H
2#define _ARCH_ARM_GPIO_H 2#define _ARCH_ARM_GPIO_H
3 3
4#if CONFIG_ARCH_NR_GPIO > 0
5#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO
6#endif
7
4/* not all ARM platforms necessarily support this API ... */ 8/* not all ARM platforms necessarily support this API ... */
5#include <mach/gpio.h> 9#include <mach/gpio.h>
6 10
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index ddf07a92a6c8..436e60b2cf7a 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu);
27 27
28#define arch_irq_stat_cpu smp_irq_stat_cpu 28#define arch_irq_stat_cpu smp_irq_stat_cpu
29 29
30#if NR_IRQS > 512
31#define HARDIRQ_BITS 10
32#elif NR_IRQS > 256
33#define HARDIRQ_BITS 9
34#else
35#define HARDIRQ_BITS 8
36#endif
37
38/*
39 * The hardirq mask has to be large enough to have space
40 * for potentially all IRQ sources in the system nesting
41 * on a single CPU:
42 */
43#if (1 << HARDIRQ_BITS) < NR_IRQS
44# error HARDIRQ_BITS is too low!
45#endif
46
47#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 30#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
48 31
49#endif /* __ASM_HARDIRQ_H */ 32#endif /* __ASM_HARDIRQ_H */
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904d..000000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/entry-macro-gic.S
3 *
4 * Low-level IRQ helper macros for GIC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13#ifndef HAVE_GET_IRQNR_PREAMBLE
14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =gic_cpu_base_addr
16 ldr \base, [\base]
17 .endm
18#endif
19
20/*
21 * The interrupt numbering scheme is defined in the
22 * interrupt controller spec. To wit:
23 *
24 * Interrupts 0-15 are IPI
25 * 16-31 are local. We allow 30 to be used for the watchdog.
26 * 32-1020 are global
27 * 1021-1022 are reserved
28 * 1023 is "spurious" (no interrupt)
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \irqstat, [\base, #GIC_CPU_INTACK]
38 /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41 bic \irqnr, \irqstat, #0x1c00
42 cmp \irqnr, #15
43 cmpcc \irqnr, \irqnr
44 cmpne \irqnr, \tmp
45 cmpcs \irqnr, \irqnr
46 .endm
47
48/* We assume that irqstat (the raw value of the IRQ acknowledge
49 * register) is preserved from the macro above.
50 * If there is an IPI, we immediately signal end of interrupt on the
51 * controller, since this requires the original irqstat value which
52 * we won't easily be able to recreate later.
53 */
54
55 .macro test_for_ipi, irqnr, irqstat, base, tmp
56 bic \irqnr, \irqstat, #0x1c00
57 cmp \irqnr, #16
58 strcc \irqstat, [\base, #GIC_CPU_EOI]
59 cmpcs \irqnr, \irqnr
60 .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f5..4bdfe0018696 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
36#include <linux/irqdomain.h> 36#include <linux/irqdomain.h>
37struct device_node; 37struct device_node;
38 38
39extern void __iomem *gic_cpu_base_addr;
40extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
41 40
42void gic_init(unsigned int, int, void __iomem *, void __iomem *); 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
45void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
46void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
47 48
48struct gic_chip_data { 49static inline void gic_init(unsigned int nr, int start,
49 void __iomem *dist_base; 50 void __iomem *dist , void __iomem *cpu)
50 void __iomem *cpu_base; 51{
51#ifdef CONFIG_CPU_PM 52 gic_init_bases(nr, start, dist, cpu, 0);
52 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; 53}
53 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; 54
54 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
55 u32 __percpu *saved_ppi_enable;
56 u32 __percpu *saved_ppi_conf;
57#endif
58#ifdef CONFIG_IRQ_DOMAIN
59 struct irq_domain domain;
60#endif
61 unsigned int gic_irqs;
62};
63#endif 55#endif
64 56
65#endif 57#endif
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 5daea2961d48..077c32326c63 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void);
234void iop3xx_map_io(void); 234void iop3xx_map_io(void);
235void iop_init_cp6_handler(void); 235void iop_init_cp6_handler(void);
236void iop_init_time(unsigned long tickrate); 236void iop_init_time(unsigned long tickrate);
237void iop3xx_restart(char, const char *);
237 238
238static inline u32 read_tmr0(void) 239static inline u32 read_tmr0(void)
239{ 240{
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a8097..f42ebd619590 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
41#define VIC_PL192_VECT_ADDR 0xF00 41#define VIC_PL192_VECT_ADDR 0xF00
42 42
43#ifndef __ASSEMBLY__ 43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46
47struct device_node;
48struct pt_regs;
49
44void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
45#endif 51int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs);
46 53
54#endif /* __ASSEMBLY__ */
47#endif 55#endif
diff --git a/arch/arm/include/asm/idmap.h b/arch/arm/include/asm/idmap.h
new file mode 100644
index 000000000000..bf863edb517d
--- /dev/null
+++ b/arch/arm/include/asm/idmap.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_IDMAP_H
2#define __ASM_IDMAP_H
3
4#include <linux/compiler.h>
5#include <asm/pgtable.h>
6
7/* Tag a function as requiring to be executed via an identity mapping. */
8#define __idmap __section(.idmap.text) noinline notrace
9
10extern pgd_t *idmap_pgd;
11
12void setup_mm_for_reboot(void);
13
14#endif /* __ASM_IDMAP_H */
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 2b0efc3104ac..bcb0c883e21e 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -31,10 +31,10 @@ struct machine_desc {
31 unsigned int video_start; /* start of video RAM */ 31 unsigned int video_start; /* start of video RAM */
32 unsigned int video_end; /* end of video RAM */ 32 unsigned int video_end; /* end of video RAM */
33 33
34 unsigned int reserve_lp0 :1; /* never has lp0 */ 34 unsigned char reserve_lp0 :1; /* never has lp0 */
35 unsigned int reserve_lp1 :1; /* never has lp1 */ 35 unsigned char reserve_lp1 :1; /* never has lp1 */
36 unsigned int reserve_lp2 :1; /* never has lp2 */ 36 unsigned char reserve_lp2 :1; /* never has lp2 */
37 unsigned int soft_reboot :1; /* soft reboot */ 37 char restart_mode; /* default restart mode */
38 void (*fixup)(struct tag *, char **, 38 void (*fixup)(struct tag *, char **,
39 struct meminfo *); 39 struct meminfo *);
40 void (*reserve)(void);/* reserve mem blocks */ 40 void (*reserve)(void);/* reserve mem blocks */
@@ -46,6 +46,7 @@ struct machine_desc {
46#ifdef CONFIG_MULTI_IRQ_HANDLER 46#ifdef CONFIG_MULTI_IRQ_HANDLER
47 void (*handle_irq)(struct pt_regs *); 47 void (*handle_irq)(struct pt_regs *);
48#endif 48#endif
49 void (*restart)(char, const char *);
49}; 50};
50 51
51/* 52/*
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
new file mode 100644
index 000000000000..c0efdd60966f
--- /dev/null
+++ b/arch/arm/include/asm/opcodes.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/include/asm/opcodes.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARM_OPCODES_H
10#define __ASM_ARM_OPCODES_H
11
12#ifndef __ASSEMBLY__
13extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
14#endif
15
16#define ARM_OPCODE_CONDTEST_FAIL 0
17#define ARM_OPCODE_CONDTEST_PASS 1
18#define ARM_OPCODE_CONDTEST_UNCOND 2
19
20#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ca94653f1ecb..97b440c25c58 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,7 +151,11 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
151#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 151#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
152extern void copy_page(void *to, const void *from); 152extern void copy_page(void *to, const void *from);
153 153
154#ifdef CONFIG_ARM_LPAE
155#include <asm/pgtable-3level-types.h>
156#else
154#include <asm/pgtable-2level-types.h> 157#include <asm/pgtable-2level-types.h>
158#endif
155 159
156#endif /* CONFIG_MMU */ 160#endif /* CONFIG_MMU */
157 161
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 0f8e3827a89b..99cfe3607989 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -32,7 +32,4 @@ enum arm_perf_pmu_ids {
32extern enum arm_perf_pmu_ids 32extern enum arm_perf_pmu_ids
33armpmu_get_pmu_id(void); 33armpmu_get_pmu_id(void);
34 34
35extern int
36armpmu_get_max_events(void);
37
38#endif /* __ARM_PERF_EVENT_H__ */ 35#endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 3e08fd3fbb6b..943504f53f57 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -25,12 +25,34 @@
25#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) 25#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
26#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) 26#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
27 27
28#ifdef CONFIG_ARM_LPAE
29
30static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
31{
32 return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
33}
34
35static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
36{
37 BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
38 free_page((unsigned long)pmd);
39}
40
41static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
42{
43 set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
44}
45
46#else /* !CONFIG_ARM_LPAE */
47
28/* 48/*
29 * Since we have only two-level page tables, these are trivial 49 * Since we have only two-level page tables, these are trivial
30 */ 50 */
31#define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); }) 51#define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); })
32#define pmd_free(mm, pmd) do { } while (0) 52#define pmd_free(mm, pmd) do { } while (0)
33#define pgd_populate(mm,pmd,pte) BUG() 53#define pud_populate(mm,pmd,pte) BUG()
54
55#endif /* CONFIG_ARM_LPAE */
34 56
35extern pgd_t *pgd_alloc(struct mm_struct *mm); 57extern pgd_t *pgd_alloc(struct mm_struct *mm);
36extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); 58extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
@@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
109{ 131{
110 pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; 132 pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot;
111 pmdp[0] = __pmd(pmdval); 133 pmdp[0] = __pmd(pmdval);
134#ifndef CONFIG_ARM_LPAE
112 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); 135 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
136#endif
113 flush_pmd_entry(pmdp); 137 flush_pmd_entry(pmdp);
114} 138}
115 139
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 470457e1cfc5..2317a71c8f8e 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -140,4 +140,45 @@
140#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ 140#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */
141#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) 141#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2)
142 142
143#ifndef __ASSEMBLY__
144
145/*
146 * The "pud_xxx()" functions here are trivial when the pmd is folded into
147 * the pud: the pud entry is never bad, always exists, and can't be set or
148 * cleared.
149 */
150#define pud_none(pud) (0)
151#define pud_bad(pud) (0)
152#define pud_present(pud) (1)
153#define pud_clear(pudp) do { } while (0)
154#define set_pud(pud,pudp) do { } while (0)
155
156static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
157{
158 return (pmd_t *)pud;
159}
160
161#define pmd_bad(pmd) (pmd_val(pmd) & 2)
162
163#define copy_pmd(pmdpd,pmdps) \
164 do { \
165 pmdpd[0] = pmdps[0]; \
166 pmdpd[1] = pmdps[1]; \
167 flush_pmd_entry(pmdpd); \
168 } while (0)
169
170#define pmd_clear(pmdp) \
171 do { \
172 pmdp[0] = __pmd(0); \
173 pmdp[1] = __pmd(0); \
174 clean_pmd_entry(pmdp); \
175 } while (0)
176
177/* we don't need complex calculations here as the pmd is folded into the pgd */
178#define pmd_addr_end(addr,end) (end)
179
180#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
181
182#endif /* __ASSEMBLY__ */
183
143#endif /* _ASM_PGTABLE_2LEVEL_H */ 184#endif /* _ASM_PGTABLE_2LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h
new file mode 100644
index 000000000000..d7952824c5c4
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-hwdef.h
@@ -0,0 +1,77 @@
1/*
2 * arch/arm/include/asm/pgtable-3level-hwdef.h
3 *
4 * Copyright (C) 2011 ARM Ltd.
5 * Author: Catalin Marinas <catalin.marinas@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef _ASM_PGTABLE_3LEVEL_HWDEF_H
21#define _ASM_PGTABLE_3LEVEL_HWDEF_H
22
23/*
24 * Hardware page table definitions.
25 *
26 * + Level 1/2 descriptor
27 * - common
28 */
29#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0)
30#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0)
31#define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0)
32#define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0)
33#define PMD_BIT4 (_AT(pmdval_t, 0))
34#define PMD_DOMAIN(x) (_AT(pmdval_t, 0))
35
36/*
37 * - section
38 */
39#define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2)
40#define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3)
41#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
42#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
43#define PMD_SECT_nG (_AT(pmdval_t, 1) << 11)
44#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54)
45#define PMD_SECT_AP_WRITE (_AT(pmdval_t, 0))
46#define PMD_SECT_AP_READ (_AT(pmdval_t, 0))
47#define PMD_SECT_TEX(x) (_AT(pmdval_t, 0))
48
49/*
50 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
51 */
52#define PMD_SECT_UNCACHED (_AT(pmdval_t, 0) << 2) /* strongly ordered */
53#define PMD_SECT_BUFFERED (_AT(pmdval_t, 1) << 2) /* normal non-cacheable */
54#define PMD_SECT_WT (_AT(pmdval_t, 2) << 2) /* normal inner write-through */
55#define PMD_SECT_WB (_AT(pmdval_t, 3) << 2) /* normal inner write-back */
56#define PMD_SECT_WBWA (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */
57
58/*
59 * + Level 3 descriptor (PTE)
60 */
61#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0)
62#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0)
63#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0)
64#define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */
65#define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */
66#define PTE_EXT_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
67#define PTE_EXT_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
68#define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* nG */
69#define PTE_EXT_XN (_AT(pteval_t, 1) << 54) /* XN */
70
71/*
72 * 40-bit physical address supported.
73 */
74#define PHYS_MASK_SHIFT (40)
75#define PHYS_MASK ((1ULL << PHYS_MASK_SHIFT) - 1)
76
77#endif
diff --git a/arch/arm/include/asm/pgtable-3level-types.h b/arch/arm/include/asm/pgtable-3level-types.h
new file mode 100644
index 000000000000..921aa30259c4
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-types.h
@@ -0,0 +1,70 @@
1/*
2 * arch/arm/include/asm/pgtable-3level-types.h
3 *
4 * Copyright (C) 2011 ARM Ltd.
5 * Author: Catalin Marinas <catalin.marinas@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef _ASM_PGTABLE_3LEVEL_TYPES_H
21#define _ASM_PGTABLE_3LEVEL_TYPES_H
22
23#include <asm/types.h>
24
25typedef u64 pteval_t;
26typedef u64 pmdval_t;
27typedef u64 pgdval_t;
28
29#undef STRICT_MM_TYPECHECKS
30
31#ifdef STRICT_MM_TYPECHECKS
32
33/*
34 * These are used to make use of C type-checking..
35 */
36typedef struct { pteval_t pte; } pte_t;
37typedef struct { pmdval_t pmd; } pmd_t;
38typedef struct { pgdval_t pgd; } pgd_t;
39typedef struct { pteval_t pgprot; } pgprot_t;
40
41#define pte_val(x) ((x).pte)
42#define pmd_val(x) ((x).pmd)
43#define pgd_val(x) ((x).pgd)
44#define pgprot_val(x) ((x).pgprot)
45
46#define __pte(x) ((pte_t) { (x) } )
47#define __pmd(x) ((pmd_t) { (x) } )
48#define __pgd(x) ((pgd_t) { (x) } )
49#define __pgprot(x) ((pgprot_t) { (x) } )
50
51#else /* !STRICT_MM_TYPECHECKS */
52
53typedef pteval_t pte_t;
54typedef pmdval_t pmd_t;
55typedef pgdval_t pgd_t;
56typedef pteval_t pgprot_t;
57
58#define pte_val(x) (x)
59#define pmd_val(x) (x)
60#define pgd_val(x) (x)
61#define pgprot_val(x) (x)
62
63#define __pte(x) (x)
64#define __pmd(x) (x)
65#define __pgd(x) (x)
66#define __pgprot(x) (x)
67
68#endif /* STRICT_MM_TYPECHECKS */
69
70#endif /* _ASM_PGTABLE_3LEVEL_TYPES_H */
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
new file mode 100644
index 000000000000..759af70f9a0a
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -0,0 +1,155 @@
1/*
2 * arch/arm/include/asm/pgtable-3level.h
3 *
4 * Copyright (C) 2011 ARM Ltd.
5 * Author: Catalin Marinas <catalin.marinas@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef _ASM_PGTABLE_3LEVEL_H
21#define _ASM_PGTABLE_3LEVEL_H
22
23/*
24 * With LPAE, there are 3 levels of page tables. Each level has 512 entries of
25 * 8 bytes each, occupying a 4K page. The first level table covers a range of
26 * 512GB, each entry representing 1GB. Since we are limited to 4GB input
27 * address range, only 4 entries in the PGD are used.
28 *
29 * There are enough spare bits in a page table entry for the kernel specific
30 * state.
31 */
32#define PTRS_PER_PTE 512
33#define PTRS_PER_PMD 512
34#define PTRS_PER_PGD 4
35
36#define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
37#define PTE_HWTABLE_OFF (0)
38#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64))
39
40/*
41 * PGDIR_SHIFT determines the size a top-level page table entry can map.
42 */
43#define PGDIR_SHIFT 30
44
45/*
46 * PMD_SHIFT determines the size a middle-level page table entry can map.
47 */
48#define PMD_SHIFT 21
49
50#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE-1))
52#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53#define PGDIR_MASK (~(PGDIR_SIZE-1))
54
55/*
56 * section address mask and size definitions.
57 */
58#define SECTION_SHIFT 21
59#define SECTION_SIZE (1UL << SECTION_SHIFT)
60#define SECTION_MASK (~(SECTION_SIZE-1))
61
62#define USER_PTRS_PER_PGD (PAGE_OFFSET / PGDIR_SIZE)
63
64/*
65 * "Linux" PTE definitions for LPAE.
66 *
67 * These bits overlap with the hardware bits but the naming is preserved for
68 * consistency with the classic page table format.
69 */
70#define L_PTE_PRESENT (_AT(pteval_t, 3) << 0) /* Valid */
71#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */
72#define L_PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */
73#define L_PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */
74#define L_PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */
75#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */
76#define L_PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
77#define L_PTE_YOUNG (_AT(pteval_t, 1) << 10) /* AF */
78#define L_PTE_XN (_AT(pteval_t, 1) << 54) /* XN */
79#define L_PTE_DIRTY (_AT(pteval_t, 1) << 55) /* unused */
80#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 56) /* unused */
81
82/*
83 * To be used in assembly code with the upper page attributes.
84 */
85#define L_PTE_XN_HIGH (1 << (54 - 32))
86#define L_PTE_DIRTY_HIGH (1 << (55 - 32))
87
88/*
89 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
90 */
91#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0) << 2) /* strongly ordered */
92#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
93#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 2) << 2) /* normal inner write-through */
94#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 3) << 2) /* normal inner write-back */
95#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */
96#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 4) << 2) /* device */
97#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 4) << 2) /* device */
98#define L_PTE_MT_DEV_WC (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
99#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */
100#define L_PTE_MT_MASK (_AT(pteval_t, 7) << 2)
101
102/*
103 * Software PGD flags.
104 */
105#define L_PGD_SWAPPER (_AT(pgdval_t, 1) << 55) /* swapper_pg_dir entry */
106
107#ifndef __ASSEMBLY__
108
109#define pud_none(pud) (!pud_val(pud))
110#define pud_bad(pud) (!(pud_val(pud) & 2))
111#define pud_present(pud) (pud_val(pud))
112
113#define pud_clear(pudp) \
114 do { \
115 *pudp = __pud(0); \
116 clean_pmd_entry(pudp); \
117 } while (0)
118
119#define set_pud(pudp, pud) \
120 do { \
121 *pudp = pud; \
122 flush_pmd_entry(pudp); \
123 } while (0)
124
125static inline pmd_t *pud_page_vaddr(pud_t pud)
126{
127 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
128}
129
130/* Find an entry in the second-level page table.. */
131#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
132static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
133{
134 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
135}
136
137#define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
138
139#define copy_pmd(pmdpd,pmdps) \
140 do { \
141 *pmdpd = *pmdps; \
142 flush_pmd_entry(pmdpd); \
143 } while (0)
144
145#define pmd_clear(pmdp) \
146 do { \
147 *pmdp = __pmd(0); \
148 clean_pmd_entry(pmdp); \
149 } while (0)
150
151#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext)))
152
153#endif /* __ASSEMBLY__ */
154
155#endif /* _ASM_PGTABLE_3LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h
index 183111164ce9..8426229ba292 100644
--- a/arch/arm/include/asm/pgtable-hwdef.h
+++ b/arch/arm/include/asm/pgtable-hwdef.h
@@ -10,6 +10,10 @@
10#ifndef _ASMARM_PGTABLE_HWDEF_H 10#ifndef _ASMARM_PGTABLE_HWDEF_H
11#define _ASMARM_PGTABLE_HWDEF_H 11#define _ASMARM_PGTABLE_HWDEF_H
12 12
13#ifdef CONFIG_ARM_LPAE
14#include <asm/pgtable-3level-hwdef.h>
15#else
13#include <asm/pgtable-2level-hwdef.h> 16#include <asm/pgtable-2level-hwdef.h>
17#endif
14 18
15#endif 19#endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 9451dce3a553..f66626d71e7d 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -11,20 +11,24 @@
11#define _ASMARM_PGTABLE_H 11#define _ASMARM_PGTABLE_H
12 12
13#include <linux/const.h> 13#include <linux/const.h>
14#include <asm-generic/4level-fixup.h>
15#include <asm/proc-fns.h> 14#include <asm/proc-fns.h>
16 15
17#ifndef CONFIG_MMU 16#ifndef CONFIG_MMU
18 17
18#include <asm-generic/4level-fixup.h>
19#include "pgtable-nommu.h" 19#include "pgtable-nommu.h"
20 20
21#else 21#else
22 22
23#include <asm-generic/pgtable-nopud.h>
23#include <asm/memory.h> 24#include <asm/memory.h>
24#include <mach/vmalloc.h>
25#include <asm/pgtable-hwdef.h> 25#include <asm/pgtable-hwdef.h>
26 26
27#ifdef CONFIG_ARM_LPAE
28#include <asm/pgtable-3level.h>
29#else
27#include <asm/pgtable-2level.h> 30#include <asm/pgtable-2level.h>
31#endif
28 32
29/* 33/*
30 * Just any arbitrary offset to the start of the vmalloc VM area: the 34 * Just any arbitrary offset to the start of the vmalloc VM area: the
@@ -33,15 +37,10 @@
33 * any out-of-bounds memory accesses will hopefully be caught. 37 * any out-of-bounds memory accesses will hopefully be caught.
34 * The vmalloc() routines leaves a hole of 4kB between each vmalloced 38 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
35 * area for the same reason. ;) 39 * area for the same reason. ;)
36 *
37 * Note that platforms may override VMALLOC_START, but they must provide
38 * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,
39 * which may not overlap IO space.
40 */ 40 */
41#ifndef VMALLOC_START
42#define VMALLOC_OFFSET (8*1024*1024) 41#define VMALLOC_OFFSET (8*1024*1024)
43#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) 42#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
44#endif 43#define VMALLOC_END 0xff000000UL
45 44
46#define LIBRARY_TEXT_START 0x0c000000 45#define LIBRARY_TEXT_START 0x0c000000
47 46
@@ -163,39 +162,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
163/* to find an entry in a kernel page-table-directory */ 162/* to find an entry in a kernel page-table-directory */
164#define pgd_offset_k(addr) pgd_offset(&init_mm, addr) 163#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
165 164
166/*
167 * The "pgd_xxx()" functions here are trivial for a folded two-level
168 * setup: the pgd is never bad, and a pmd always exists (as it's folded
169 * into the pgd entry)
170 */
171#define pgd_none(pgd) (0)
172#define pgd_bad(pgd) (0)
173#define pgd_present(pgd) (1)
174#define pgd_clear(pgdp) do { } while (0)
175#define set_pgd(pgd,pgdp) do { } while (0)
176#define set_pud(pud,pudp) do { } while (0)
177
178
179/* Find an entry in the second-level page table.. */
180#define pmd_offset(dir, addr) ((pmd_t *)(dir))
181
182#define pmd_none(pmd) (!pmd_val(pmd)) 165#define pmd_none(pmd) (!pmd_val(pmd))
183#define pmd_present(pmd) (pmd_val(pmd)) 166#define pmd_present(pmd) (pmd_val(pmd))
184#define pmd_bad(pmd) (pmd_val(pmd) & 2)
185
186#define copy_pmd(pmdpd,pmdps) \
187 do { \
188 pmdpd[0] = pmdps[0]; \
189 pmdpd[1] = pmdps[1]; \
190 flush_pmd_entry(pmdpd); \
191 } while (0)
192
193#define pmd_clear(pmdp) \
194 do { \
195 pmdp[0] = __pmd(0); \
196 pmdp[1] = __pmd(0); \
197 clean_pmd_entry(pmdp); \
198 } while (0)
199 167
200static inline pte_t *pmd_page_vaddr(pmd_t pmd) 168static inline pte_t *pmd_page_vaddr(pmd_t pmd)
201{ 169{
@@ -204,10 +172,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
204 172
205#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) 173#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
206 174
207/* we don't need complex calculations here as the pmd is folded into the pgd */
208#define pmd_addr_end(addr,end) (end)
209
210
211#ifndef CONFIG_HIGHPTE 175#ifndef CONFIG_HIGHPTE
212#define __pte_map(pmd) pmd_page_vaddr(*(pmd)) 176#define __pte_map(pmd) pmd_page_vaddr(*(pmd))
213#define __pte_unmap(pte) do { } while (0) 177#define __pte_unmap(pte) do { } while (0)
@@ -229,7 +193,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
229#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 193#define pte_page(pte) pfn_to_page(pte_pfn(pte))
230#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) 194#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
231 195
232#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
233#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) 196#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
234 197
235#if __LINUX_ARM_ARCH__ < 6 198#if __LINUX_ARM_ARCH__ < 6
@@ -336,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
336 * We provide our own arch_get_unmapped_area to cope with VIPT caches. 299 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
337 */ 300 */
338#define HAVE_ARCH_UNMAPPED_AREA 301#define HAVE_ARCH_UNMAPPED_AREA
302#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
339 303
340/* 304/*
341 * remap a physical page `pfn' of size `size' with page protection `prot' 305 * remap a physical page `pfn' of size `size' with page protection `prot'
@@ -346,9 +310,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
346 310
347#define pgtable_cache_init() do { } while (0) 311#define pgtable_cache_init() do { } while (0)
348 312
349void identity_mapping_add(pgd_t *, unsigned long, unsigned long);
350void identity_mapping_del(pgd_t *, unsigned long, unsigned long);
351
352#endif /* !__ASSEMBLY__ */ 313#endif /* !__ASSEMBLY__ */
353 314
354#endif /* CONFIG_MMU */ 315#endif /* CONFIG_MMU */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 0bda22c094a6..b5a5be2536c1 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -27,13 +27,22 @@ enum arm_pmu_type {
27/* 27/*
28 * struct arm_pmu_platdata - ARM PMU platform data 28 * struct arm_pmu_platdata - ARM PMU platform data
29 * 29 *
30 * @handle_irq: an optional handler which will be called from the interrupt and 30 * @handle_irq: an optional handler which will be called from the
31 * passed the address of the low level handler, and can be used to implement 31 * interrupt and passed the address of the low level handler,
32 * any platform specific handling before or after calling it. 32 * and can be used to implement any platform specific handling
33 * before or after calling it.
34 * @enable_irq: an optional handler which will be called after
35 * request_irq and be used to handle some platform specific
36 * irq enablement
37 * @disable_irq: an optional handler which will be called before
38 * free_irq and be used to handle some platform specific
39 * irq disablement
33 */ 40 */
34struct arm_pmu_platdata { 41struct arm_pmu_platdata {
35 irqreturn_t (*handle_irq)(int irq, void *dev, 42 irqreturn_t (*handle_irq)(int irq, void *dev,
36 irq_handler_t pmu_handler); 43 irq_handler_t pmu_handler);
44 void (*enable_irq)(int irq);
45 void (*disable_irq)(int irq);
37}; 46};
38 47
39#ifdef CONFIG_CPU_HAS_PMU 48#ifdef CONFIG_CPU_HAS_PMU
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 9e92cb205e65..f3628fb3d2b3 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -65,7 +65,11 @@ extern struct processor {
65 * Set a possibly extended PTE. Non-extended PTEs should 65 * Set a possibly extended PTE. Non-extended PTEs should
66 * ignore 'ext'. 66 * ignore 'ext'.
67 */ 67 */
68#ifdef CONFIG_ARM_LPAE
69 void (*set_pte_ext)(pte_t *ptep, pte_t pte);
70#else
68 void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); 71 void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
72#endif
69 73
70 /* Suspend/resume */ 74 /* Suspend/resume */
71 unsigned int suspend_size; 75 unsigned int suspend_size;
@@ -79,7 +83,11 @@ extern void cpu_proc_fin(void);
79extern int cpu_do_idle(void); 83extern int cpu_do_idle(void);
80extern void cpu_dcache_clean_area(void *, int); 84extern void cpu_dcache_clean_area(void *, int);
81extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); 85extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
86#ifdef CONFIG_ARM_LPAE
87extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
88#else
82extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); 89extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
90#endif
83extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); 91extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
84 92
85/* These three are private to arch/arm/kernel/suspend.c */ 93/* These three are private to arch/arm/kernel/suspend.c */
@@ -107,6 +115,18 @@ extern void cpu_resume(void);
107 115
108#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) 116#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
109 117
118#ifdef CONFIG_ARM_LPAE
119#define cpu_get_pgd() \
120 ({ \
121 unsigned long pg, pg2; \
122 __asm__("mrrc p15, 0, %0, %1, c2" \
123 : "=r" (pg), "=r" (pg2) \
124 : \
125 : "cc"); \
126 pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1); \
127 (pgd_t *)phys_to_virt(pg); \
128 })
129#else
110#define cpu_get_pgd() \ 130#define cpu_get_pgd() \
111 ({ \ 131 ({ \
112 unsigned long pg; \ 132 unsigned long pg; \
@@ -115,6 +135,7 @@ extern void cpu_resume(void);
115 pg &= ~0x3fff; \ 135 pg &= ~0x3fff; \
116 (pgd_t *)phys_to_virt(pg); \ 136 (pgd_t *)phys_to_virt(pg); \
117 }) 137 })
138#endif
118 139
119#endif 140#endif
120 141
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index b2d9df5667af..ce280b8d613c 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr)
123 123
124#endif 124#endif
125 125
126#define HAVE_ARCH_PICK_MMAP_LAYOUT
127
126#endif 128#endif
127 129
128#endif /* __ASM_ARM_PROCESSOR_H */ 130#endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf3e860..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -8,113 +8,7 @@
8#ifndef ASM_SCHED_CLOCK 8#ifndef ASM_SCHED_CLOCK
9#define ASM_SCHED_CLOCK 9#define ASM_SCHED_CLOCK
10 10
11#include <linux/kernel.h>
12#include <linux/types.h>
13
14struct clock_data {
15 u64 epoch_ns;
16 u32 epoch_cyc;
17 u32 epoch_cyc_copy;
18 u32 mult;
19 u32 shift;
20};
21
22#define DEFINE_CLOCK_DATA(name) struct clock_data name
23
24static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
25{
26 return (cyc * mult) >> shift;
27}
28
29/*
30 * Atomically update the sched_clock epoch. Your update callback will
31 * be called from a timer before the counter wraps - read the current
32 * counter value, and call this function to safely move the epochs
33 * forward. Only use this from the update callback.
34 */
35static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
36{
37 unsigned long flags;
38 u64 ns = cd->epoch_ns +
39 cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
40
41 /*
42 * Write epoch_cyc and epoch_ns in a way that the update is
43 * detectable in cyc_to_fixed_sched_clock().
44 */
45 raw_local_irq_save(flags);
46 cd->epoch_cyc = cyc;
47 smp_wmb();
48 cd->epoch_ns = ns;
49 smp_wmb();
50 cd->epoch_cyc_copy = cyc;
51 raw_local_irq_restore(flags);
52}
53
54/*
55 * If your clock rate is known at compile time, using this will allow
56 * you to optimize the mult/shift loads away. This is paired with
57 * init_fixed_sched_clock() to ensure that your mult/shift are correct.
58 */
59static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd,
60 u32 cyc, u32 mask, u32 mult, u32 shift)
61{
62 u64 epoch_ns;
63 u32 epoch_cyc;
64
65 /*
66 * Load the epoch_cyc and epoch_ns atomically. We do this by
67 * ensuring that we always write epoch_cyc, epoch_ns and
68 * epoch_cyc_copy in strict order, and read them in strict order.
69 * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
70 * the middle of an update, and we should repeat the load.
71 */
72 do {
73 epoch_cyc = cd->epoch_cyc;
74 smp_rmb();
75 epoch_ns = cd->epoch_ns;
76 smp_rmb();
77 } while (epoch_cyc != cd->epoch_cyc_copy);
78
79 return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift);
80}
81
82/*
83 * Otherwise, you need to use this, which will obtain the mult/shift
84 * from the clock_data structure. Use init_sched_clock() with this.
85 */
86static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
87 u32 cyc, u32 mask)
88{
89 return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift);
90}
91
92/*
93 * Initialize the clock data - calculate the appropriate multiplier
94 * and shift. Also setup a timer to ensure that the epoch is refreshed
95 * at the appropriate time interval, which will call your update
96 * handler.
97 */
98void init_sched_clock(struct clock_data *, void (*)(void),
99 unsigned int, unsigned long);
100
101/*
102 * Use this initialization function rather than init_sched_clock() if
103 * you're using cyc_to_fixed_sched_clock, which will warn if your
104 * constants are incorrect.
105 */
106static inline void init_fixed_sched_clock(struct clock_data *cd,
107 void (*update)(void), unsigned int bits, unsigned long rate,
108 u32 mult, u32 shift)
109{
110 init_sched_clock(cd, update, bits, rate);
111 if (cd->mult != mult || cd->shift != shift) {
112 pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
113 "sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
114 mult, shift, cd->mult, cd->shift);
115 }
116}
117
118extern void sched_clock_postinit(void); 11extern void sched_clock_postinit(void);
12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
119 13
120#endif 14#endif
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 915696dd9c7c..23ebc0c82a39 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
192/* 192/*
193 * Memory map description 193 * Memory map description
194 */ 194 */
195#ifdef CONFIG_ARCH_EP93XX 195#define NR_BANKS CONFIG_ARM_NR_BANKS
196# define NR_BANKS 16
197#else
198# define NR_BANKS 8
199#endif
200 196
201struct membank { 197struct membank {
202 phys_addr_t start; 198 phys_addr_t start;
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index 9997ad20eff1..32ee164a2f6b 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -24,12 +24,13 @@
24 24
25#if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 25#if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6
26 26
27static inline __attribute_const__ __u16 __arch_swab16(__u16 x) 27static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
28{ 28{
29 __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); 29 __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
30 return x; 30 return x;
31} 31}
32#define __arch_swab16 __arch_swab16 32#define __arch_swahb32 __arch_swahb32
33#define __arch_swab16(x) ((__u16)__arch_swahb32(x))
33 34
34static inline __attribute_const__ __u32 __arch_swab32(__u32 x) 35static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
35{ 36{
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 984014b92647..e4c96cc6ec0c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -80,6 +80,14 @@ struct siginfo;
80void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, 80void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
81 unsigned long err, unsigned long trap); 81 unsigned long err, unsigned long trap);
82 82
83#ifdef CONFIG_ARM_LPAE
84#define FAULT_CODE_ALIGNMENT 33
85#define FAULT_CODE_DEBUG 34
86#else
87#define FAULT_CODE_ALIGNMENT 1
88#define FAULT_CODE_DEBUG 2
89#endif
90
83void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, 91void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
84 struct pt_regs *), 92 struct pt_regs *),
85 int sig, int code, const char *name); 93 int sig, int code, const char *name);
@@ -100,7 +108,7 @@ extern void __show_regs(struct pt_regs *);
100extern int __pure cpu_architecture(void); 108extern int __pure cpu_architecture(void);
101extern void cpu_init(void); 109extern void cpu_init(void);
102 110
103void arm_machine_restart(char mode, const char *cmd); 111void soft_restart(unsigned long);
104extern void (*arm_pm_restart)(char str, const char *cmd); 112extern void (*arm_pm_restart)(char str, const char *cmd);
105 113
106#define UDBG_UNDEFINED (1 << 0) 114#define UDBG_UNDEFINED (1 << 0)
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 265f908c4a6e..5d3ed7e38561 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -202,8 +202,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
202 tlb_remove_page(tlb, pte); 202 tlb_remove_page(tlb, pte);
203} 203}
204 204
205static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
206 unsigned long addr)
207{
208#ifdef CONFIG_ARM_LPAE
209 tlb_add_flush(tlb, addr);
210 tlb_remove_page(tlb, virt_to_page(pmdp));
211#endif
212}
213
205#define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) 214#define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr)
206#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) 215#define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr)
216#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp)
207 217
208#define tlb_migrate_finish(mm) do { } while (0) 218#define tlb_migrate_finish(mm) do { } while (0)
209 219
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 16eed6aebfa4..43b740d0e374 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg
13 13
14# Object file lists. 14# Object file lists.
15 15
16obj-y := elf.o entry-armv.o entry-common.o irq.o \ 16obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
17 process.o ptrace.o return_address.o setup.o signal.o \ 17 process.o ptrace.o return_address.o setup.o signal.o \
18 sys_arm.o stacktrace.o time.o traps.o 18 sys_arm.o stacktrace.o time.o traps.o
19 19
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index b145f16c91bc..3a456c6c7005 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -36,12 +36,11 @@
36#ifdef CONFIG_MULTI_IRQ_HANDLER 36#ifdef CONFIG_MULTI_IRQ_HANDLER
37 ldr r1, =handle_arch_irq 37 ldr r1, =handle_arch_irq
38 mov r0, sp 38 mov r0, sp
39 ldr r1, [r1]
40 adr lr, BSYM(9997f) 39 adr lr, BSYM(9997f)
41 teq r1, #0 40 ldr pc, [r1]
42 movne pc, r1 41#else
43#endif
44 arch_irq_handler_default 42 arch_irq_handler_default
43#endif
459997: 449997:
46 .endm 45 .endm
47 46
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 08c82fd844a8..14e277d2ff91 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -39,8 +39,14 @@
39#error KERNEL_RAM_VADDR must start at 0xXXXX8000 39#error KERNEL_RAM_VADDR must start at 0xXXXX8000
40#endif 40#endif
41 41
42#ifdef CONFIG_ARM_LPAE
43 /* LPAE requires an additional page for the PGD */
44#define PG_DIR_SIZE 0x5000
45#define PMD_ORDER 3
46#else
42#define PG_DIR_SIZE 0x4000 47#define PG_DIR_SIZE 0x4000
43#define PMD_ORDER 2 48#define PMD_ORDER 2
49#endif
44 50
45 .globl swapper_pg_dir 51 .globl swapper_pg_dir
46 .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE 52 .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
@@ -164,17 +170,36 @@ __create_page_tables:
164 teq r0, r6 170 teq r0, r6
165 bne 1b 171 bne 1b
166 172
173#ifdef CONFIG_ARM_LPAE
174 /*
175 * Build the PGD table (first level) to point to the PMD table. A PGD
176 * entry is 64-bit wide.
177 */
178 mov r0, r4
179 add r3, r4, #0x1000 @ first PMD table address
180 orr r3, r3, #3 @ PGD block type
181 mov r6, #4 @ PTRS_PER_PGD
182 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
1831: str r3, [r0], #4 @ set bottom PGD entry bits
184 str r7, [r0], #4 @ set top PGD entry bits
185 add r3, r3, #0x1000 @ next PMD table
186 subs r6, r6, #1
187 bne 1b
188
189 add r4, r4, #0x1000 @ point to the PMD tables
190#endif
191
167 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags 192 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
168 193
169 /* 194 /*
170 * Create identity mapping to cater for __enable_mmu. 195 * Create identity mapping to cater for __enable_mmu.
171 * This identity mapping will be removed by paging_init(). 196 * This identity mapping will be removed by paging_init().
172 */ 197 */
173 adr r0, __enable_mmu_loc 198 adr r0, __turn_mmu_on_loc
174 ldmia r0, {r3, r5, r6} 199 ldmia r0, {r3, r5, r6}
175 sub r0, r0, r3 @ virt->phys offset 200 sub r0, r0, r3 @ virt->phys offset
176 add r5, r5, r0 @ phys __enable_mmu 201 add r5, r5, r0 @ phys __turn_mmu_on
177 add r6, r6, r0 @ phys __enable_mmu_end 202 add r6, r6, r0 @ phys __turn_mmu_on_end
178 mov r5, r5, lsr #SECTION_SHIFT 203 mov r5, r5, lsr #SECTION_SHIFT
179 mov r6, r6, lsr #SECTION_SHIFT 204 mov r6, r6, lsr #SECTION_SHIFT
180 205
@@ -219,8 +244,8 @@ __create_page_tables:
219#endif 244#endif
220 245
221 /* 246 /*
222 * Then map boot params address in r2 or 247 * Then map boot params address in r2 or the first 1MB (2MB with LPAE)
223 * the first 1MB of ram if boot params address is not specified. 248 * of ram if boot params address is not specified.
224 */ 249 */
225 mov r0, r2, lsr #SECTION_SHIFT 250 mov r0, r2, lsr #SECTION_SHIFT
226 movs r0, r0, lsl #SECTION_SHIFT 251 movs r0, r0, lsl #SECTION_SHIFT
@@ -251,7 +276,15 @@ __create_page_tables:
251 mov r3, r7, lsr #SECTION_SHIFT 276 mov r3, r7, lsr #SECTION_SHIFT
252 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags 277 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
253 orr r3, r7, r3, lsl #SECTION_SHIFT 278 orr r3, r7, r3, lsl #SECTION_SHIFT
279#ifdef CONFIG_ARM_LPAE
280 mov r7, #1 << (54 - 32) @ XN
281#else
282 orr r3, r3, #PMD_SECT_XN
283#endif
2541: str r3, [r0], #4 2841: str r3, [r0], #4
285#ifdef CONFIG_ARM_LPAE
286 str r7, [r0], #4
287#endif
255 add r3, r3, #1 << SECTION_SHIFT 288 add r3, r3, #1 << SECTION_SHIFT
256 cmp r0, r6 289 cmp r0, r6
257 blo 1b 290 blo 1b
@@ -283,14 +316,17 @@ __create_page_tables:
283 str r3, [r0] 316 str r3, [r0]
284#endif 317#endif
285#endif 318#endif
319#ifdef CONFIG_ARM_LPAE
320 sub r4, r4, #0x1000 @ point to the PGD table
321#endif
286 mov pc, lr 322 mov pc, lr
287ENDPROC(__create_page_tables) 323ENDPROC(__create_page_tables)
288 .ltorg 324 .ltorg
289 .align 325 .align
290__enable_mmu_loc: 326__turn_mmu_on_loc:
291 .long . 327 .long .
292 .long __enable_mmu 328 .long __turn_mmu_on
293 .long __enable_mmu_end 329 .long __turn_mmu_on_end
294 330
295#if defined(CONFIG_SMP) 331#if defined(CONFIG_SMP)
296 __CPUINIT 332 __CPUINIT
@@ -374,12 +410,17 @@ __enable_mmu:
374#ifdef CONFIG_CPU_ICACHE_DISABLE 410#ifdef CONFIG_CPU_ICACHE_DISABLE
375 bic r0, r0, #CR_I 411 bic r0, r0, #CR_I
376#endif 412#endif
413#ifdef CONFIG_ARM_LPAE
414 mov r5, #0
415 mcrr p15, 0, r4, r5, c2 @ load TTBR0
416#else
377 mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ 417 mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
378 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ 418 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
379 domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ 419 domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
380 domain_val(DOMAIN_IO, DOMAIN_CLIENT)) 420 domain_val(DOMAIN_IO, DOMAIN_CLIENT))
381 mcr p15, 0, r5, c3, c0, 0 @ load domain access register 421 mcr p15, 0, r5, c3, c0, 0 @ load domain access register
382 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer 422 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
423#endif
383 b __turn_mmu_on 424 b __turn_mmu_on
384ENDPROC(__enable_mmu) 425ENDPROC(__enable_mmu)
385 426
@@ -398,15 +439,19 @@ ENDPROC(__enable_mmu)
398 * other registers depend on the function called upon completion 439 * other registers depend on the function called upon completion
399 */ 440 */
400 .align 5 441 .align 5
401__turn_mmu_on: 442 .pushsection .idmap.text, "ax"
443ENTRY(__turn_mmu_on)
402 mov r0, r0 444 mov r0, r0
445 instr_sync
403 mcr p15, 0, r0, c1, c0, 0 @ write control reg 446 mcr p15, 0, r0, c1, c0, 0 @ write control reg
404 mrc p15, 0, r3, c0, c0, 0 @ read id reg 447 mrc p15, 0, r3, c0, c0, 0 @ read id reg
448 instr_sync
405 mov r3, r3 449 mov r3, r3
406 mov r3, r13 450 mov r3, r13
407 mov pc, r3 451 mov pc, r3
408__enable_mmu_end: 452__turn_mmu_on_end:
409ENDPROC(__turn_mmu_on) 453ENDPROC(__turn_mmu_on)
454 .popsection
410 455
411 456
412#ifdef CONFIG_SMP_ON_UP 457#ifdef CONFIG_SMP_ON_UP
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 814a52a9dc39..d6a95ef9131d 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void)
1016 } 1016 }
1017 1017
1018 /* Register debug fault handler. */ 1018 /* Register debug fault handler. */
1019 hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 1019 hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1020 "watchpoint debug exception"); 1020 TRAP_HWBKPT, "watchpoint debug exception");
1021 hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 1021 hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1022 "breakpoint debug exception"); 1022 TRAP_HWBKPT, "breakpoint debug exception");
1023 1023
1024 /* Register hotplug notifier. */ 1024 /* Register hotplug notifier. */
1025 register_cpu_notifier(&dbg_reset_nb); 1025 register_cpu_notifier(&dbg_reset_nb);
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index e17cdd6d90d8..1862d8f2fd44 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -202,6 +202,8 @@
202#include <linux/slab.h> 202#include <linux/slab.h>
203#include <linux/kprobes.h> 203#include <linux/kprobes.h>
204 204
205#include <asm/opcodes.h>
206
205#include "kprobes.h" 207#include "kprobes.h"
206#include "kprobes-test.h" 208#include "kprobes-test.h"
207 209
@@ -1050,65 +1052,9 @@ static int test_instance;
1050 1052
1051static unsigned long test_check_cc(int cc, unsigned long cpsr) 1053static unsigned long test_check_cc(int cc, unsigned long cpsr)
1052{ 1054{
1053 unsigned long temp; 1055 int ret = arm_check_condition(cc << 28, cpsr);
1054
1055 switch (cc) {
1056 case 0x0: /* eq */
1057 return cpsr & PSR_Z_BIT;
1058
1059 case 0x1: /* ne */
1060 return (~cpsr) & PSR_Z_BIT;
1061
1062 case 0x2: /* cs */
1063 return cpsr & PSR_C_BIT;
1064
1065 case 0x3: /* cc */
1066 return (~cpsr) & PSR_C_BIT;
1067
1068 case 0x4: /* mi */
1069 return cpsr & PSR_N_BIT;
1070
1071 case 0x5: /* pl */
1072 return (~cpsr) & PSR_N_BIT;
1073
1074 case 0x6: /* vs */
1075 return cpsr & PSR_V_BIT;
1076
1077 case 0x7: /* vc */
1078 return (~cpsr) & PSR_V_BIT;
1079 1056
1080 case 0x8: /* hi */ 1057 return (ret != ARM_OPCODE_CONDTEST_FAIL);
1081 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
1082 return cpsr & PSR_C_BIT;
1083
1084 case 0x9: /* ls */
1085 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
1086 return (~cpsr) & PSR_C_BIT;
1087
1088 case 0xa: /* ge */
1089 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1090 return (~cpsr) & PSR_N_BIT;
1091
1092 case 0xb: /* lt */
1093 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1094 return cpsr & PSR_N_BIT;
1095
1096 case 0xc: /* gt */
1097 temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1098 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
1099 return (~temp) & PSR_N_BIT;
1100
1101 case 0xd: /* le */
1102 temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1103 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
1104 return temp & PSR_N_BIT;
1105
1106 case 0xe: /* al */
1107 case 0xf: /* unconditional */
1108 return true;
1109 }
1110 BUG();
1111 return false;
1112} 1058}
1113 1059
1114static int is_last_scenario; 1060static int is_last_scenario;
@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario)
1128 1074
1129 if (!test_case_is_thumb) { 1075 if (!test_case_is_thumb) {
1130 /* Testing ARM code */ 1076 /* Testing ARM code */
1131 probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0; 1077 int cc = current_instruction >> 28;
1078
1079 probe_should_run = test_check_cc(cc, cpsr) != 0;
1132 if (scenario == 15) 1080 if (scenario == 15)
1133 is_last_scenario = true; 1081 is_last_scenario = true;
1134 1082
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e59bbd496c39..764bd456d84f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -12,12 +12,11 @@
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/cacheflush.h> 13#include <asm/cacheflush.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/system.h>
15 16
16extern const unsigned char relocate_new_kernel[]; 17extern const unsigned char relocate_new_kernel[];
17extern const unsigned int relocate_new_kernel_size; 18extern const unsigned int relocate_new_kernel_size;
18 19
19extern void setup_mm_for_reboot(char mode);
20
21extern unsigned long kexec_start_address; 20extern unsigned long kexec_start_address;
22extern unsigned long kexec_indirection_page; 21extern unsigned long kexec_indirection_page;
23extern unsigned long kexec_mach_type; 22extern unsigned long kexec_mach_type;
@@ -111,14 +110,6 @@ void machine_kexec(struct kimage *image)
111 110
112 if (kexec_reinit) 111 if (kexec_reinit)
113 kexec_reinit(); 112 kexec_reinit();
114 local_irq_disable(); 113
115 local_fiq_disable(); 114 soft_restart(reboot_code_buffer_phys);
116 setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/
117 flush_cache_all();
118 outer_flush_all();
119 outer_disable();
120 cpu_proc_fin();
121 outer_inv_all();
122 flush_cache_all();
123 cpu_reset(reboot_code_buffer_phys);
124} 115}
diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c
new file mode 100644
index 000000000000..f8179c6a817f
--- /dev/null
+++ b/arch/arm/kernel/opcodes.c
@@ -0,0 +1,72 @@
1/*
2 * linux/arch/arm/kernel/opcodes.c
3 *
4 * A32 condition code lookup feature moved from nwfpe/fpopcode.c
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <asm/opcodes.h>
13
14#define ARM_OPCODE_CONDITION_UNCOND 0xf
15
16/*
17 * condition code lookup table
18 * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
19 *
20 * bit position in short is condition code: NZCV
21 */
22static const unsigned short cc_map[16] = {
23 0xF0F0, /* EQ == Z set */
24 0x0F0F, /* NE */
25 0xCCCC, /* CS == C set */
26 0x3333, /* CC */
27 0xFF00, /* MI == N set */
28 0x00FF, /* PL */
29 0xAAAA, /* VS == V set */
30 0x5555, /* VC */
31 0x0C0C, /* HI == C set && Z clear */
32 0xF3F3, /* LS == C clear || Z set */
33 0xAA55, /* GE == (N==V) */
34 0x55AA, /* LT == (N!=V) */
35 0x0A05, /* GT == (!Z && (N==V)) */
36 0xF5FA, /* LE == (Z || (N!=V)) */
37 0xFFFF, /* AL always */
38 0 /* NV */
39};
40
41/*
42 * Returns:
43 * ARM_OPCODE_CONDTEST_FAIL - if condition fails
44 * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL)
45 * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional
46 * opcode space from v5 onwards
47 *
48 * Code that tests whether a conditional instruction would pass its condition
49 * check should check that return value == ARM_OPCODE_CONDTEST_PASS.
50 *
51 * Code that tests if a condition means that the instruction would be executed
52 * (regardless of conditional or unconditional) should instead check that the
53 * return value != ARM_OPCODE_CONDTEST_FAIL.
54 */
55asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)
56{
57 u32 cc_bits = opcode >> 28;
58 u32 psr_cond = psr >> 28;
59 unsigned int ret;
60
61 if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
62 if ((cc_map[cc_bits] >> (psr_cond)) & 1)
63 ret = ARM_OPCODE_CONDTEST_PASS;
64 else
65 ret = ARM_OPCODE_CONDTEST_FAIL;
66 } else {
67 ret = ARM_OPCODE_CONDTEST_UNCOND;
68 }
69
70 return ret;
71}
72EXPORT_SYMBOL_GPL(arm_check_condition);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 88b0941ce51e..5bb91bf3d47f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -59,8 +59,7 @@ armpmu_get_pmu_id(void)
59} 59}
60EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); 60EXPORT_SYMBOL_GPL(armpmu_get_pmu_id);
61 61
62int 62int perf_num_counters(void)
63armpmu_get_max_events(void)
64{ 63{
65 int max_events = 0; 64 int max_events = 0;
66 65
@@ -69,12 +68,6 @@ armpmu_get_max_events(void)
69 68
70 return max_events; 69 return max_events;
71} 70}
72EXPORT_SYMBOL_GPL(armpmu_get_max_events);
73
74int perf_num_counters(void)
75{
76 return armpmu_get_max_events();
77}
78EXPORT_SYMBOL_GPL(perf_num_counters); 71EXPORT_SYMBOL_GPL(perf_num_counters);
79 72
80#define HW_OP_UNSUPPORTED 0xFFFF 73#define HW_OP_UNSUPPORTED 0xFFFF
@@ -380,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
380{ 373{
381 int i, irq, irqs; 374 int i, irq, irqs;
382 struct platform_device *pmu_device = armpmu->plat_device; 375 struct platform_device *pmu_device = armpmu->plat_device;
376 struct arm_pmu_platdata *plat =
377 dev_get_platdata(&pmu_device->dev);
383 378
384 irqs = min(pmu_device->num_resources, num_possible_cpus()); 379 irqs = min(pmu_device->num_resources, num_possible_cpus());
385 380
@@ -387,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
387 if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) 382 if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
388 continue; 383 continue;
389 irq = platform_get_irq(pmu_device, i); 384 irq = platform_get_irq(pmu_device, i);
390 if (irq >= 0) 385 if (irq >= 0) {
386 if (plat && plat->disable_irq)
387 plat->disable_irq(irq);
391 free_irq(irq, armpmu); 388 free_irq(irq, armpmu);
389 }
392 } 390 }
393 391
394 release_pmu(armpmu->type); 392 release_pmu(armpmu->type);
@@ -448,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
448 irq); 446 irq);
449 armpmu_release_hardware(armpmu); 447 armpmu_release_hardware(armpmu);
450 return err; 448 return err;
451 } 449 } else if (plat && plat->enable_irq)
450 plat->enable_irq(irq);
452 451
453 cpumask_set_cpu(i, &armpmu->active_irqs); 452 cpumask_set_cpu(i, &armpmu->active_irqs);
454 } 453 }
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index e63d8115c01b..533be9930ec2 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -65,13 +65,15 @@ enum armv6_counters {
65 * accesses/misses in hardware. 65 * accesses/misses in hardware.
66 */ 66 */
67static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { 67static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = {
68 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, 68 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES,
69 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, 69 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC,
70 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 70 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
71 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 71 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
72 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, 72 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC,
73 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, 73 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT,
74 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 74 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
75 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL,
76 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6_PERFCTR_LSU_FULL_STALL,
75}; 77};
76 78
77static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 79static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -218,13 +220,15 @@ enum armv6mpcore_perf_types {
218 * accesses/misses in hardware. 220 * accesses/misses in hardware.
219 */ 221 */
220static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { 222static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = {
221 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, 223 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
222 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, 224 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
223 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 225 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
224 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 226 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
225 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, 227 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC,
226 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, 228 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
227 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 229 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
230 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL,
231 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL,
228}; 232};
229 233
230static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 234static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 1ef6d0034b85..460bbbb6b885 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu;
28 * they are not available. 28 * they are not available.
29 */ 29 */
30enum armv7_perf_types { 30enum armv7_perf_types {
31 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, 31 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00,
32 ARMV7_PERFCTR_IFETCH_MISS = 0x01, 32 ARMV7_PERFCTR_L1_ICACHE_REFILL = 0x01,
33 ARMV7_PERFCTR_ITLB_MISS = 0x02, 33 ARMV7_PERFCTR_ITLB_REFILL = 0x02,
34 ARMV7_PERFCTR_DCACHE_REFILL = 0x03, /* L1 */ 34 ARMV7_PERFCTR_L1_DCACHE_REFILL = 0x03,
35 ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, /* L1 */ 35 ARMV7_PERFCTR_L1_DCACHE_ACCESS = 0x04,
36 ARMV7_PERFCTR_DTLB_REFILL = 0x05, 36 ARMV7_PERFCTR_DTLB_REFILL = 0x05,
37 ARMV7_PERFCTR_DREAD = 0x06, 37 ARMV7_PERFCTR_MEM_READ = 0x06,
38 ARMV7_PERFCTR_DWRITE = 0x07, 38 ARMV7_PERFCTR_MEM_WRITE = 0x07,
39 ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, 39 ARMV7_PERFCTR_INSTR_EXECUTED = 0x08,
40 ARMV7_PERFCTR_EXC_TAKEN = 0x09, 40 ARMV7_PERFCTR_EXC_TAKEN = 0x09,
41 ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, 41 ARMV7_PERFCTR_EXC_EXECUTED = 0x0A,
42 ARMV7_PERFCTR_CID_WRITE = 0x0B, 42 ARMV7_PERFCTR_CID_WRITE = 0x0B,
43 /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. 43
44 /*
45 * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
44 * It counts: 46 * It counts:
45 * - all branch instructions, 47 * - all (taken) branch instructions,
46 * - instructions that explicitly write the PC, 48 * - instructions that explicitly write the PC,
47 * - exception generating instructions. 49 * - exception generating instructions.
48 */ 50 */
49 ARMV7_PERFCTR_PC_WRITE = 0x0C, 51 ARMV7_PERFCTR_PC_WRITE = 0x0C,
50 ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, 52 ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D,
51 ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, 53 ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E,
52 ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, 54 ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS = 0x0F,
55 ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10,
56 ARMV7_PERFCTR_CLOCK_CYCLES = 0x11,
57 ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12,
53 58
54 /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */ 59 /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */
55 ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, 60 ARMV7_PERFCTR_MEM_ACCESS = 0x13,
56 ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, 61 ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14,
57 ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, 62 ARMV7_PERFCTR_L1_DCACHE_WB = 0x15,
58 ARMV7_PERFCTR_MEM_ACCESS = 0x13, 63 ARMV7_PERFCTR_L2_CACHE_ACCESS = 0x16,
59 ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, 64 ARMV7_PERFCTR_L2_CACHE_REFILL = 0x17,
60 ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, 65 ARMV7_PERFCTR_L2_CACHE_WB = 0x18,
61 ARMV7_PERFCTR_L2_DCACHE_ACCESS = 0x16, 66 ARMV7_PERFCTR_BUS_ACCESS = 0x19,
62 ARMV7_PERFCTR_L2_DCACHE_REFILL = 0x17, 67 ARMV7_PERFCTR_MEM_ERROR = 0x1A,
63 ARMV7_PERFCTR_L2_DCACHE_WB = 0x18, 68 ARMV7_PERFCTR_INSTR_SPEC = 0x1B,
64 ARMV7_PERFCTR_BUS_ACCESS = 0x19, 69 ARMV7_PERFCTR_TTBR_WRITE = 0x1C,
65 ARMV7_PERFCTR_MEMORY_ERROR = 0x1A, 70 ARMV7_PERFCTR_BUS_CYCLES = 0x1D,
66 ARMV7_PERFCTR_INSTR_SPEC = 0x1B, 71
67 ARMV7_PERFCTR_TTBR_WRITE = 0x1C, 72 ARMV7_PERFCTR_CPU_CYCLES = 0xFF
68 ARMV7_PERFCTR_BUS_CYCLES = 0x1D,
69
70 ARMV7_PERFCTR_CPU_CYCLES = 0xFF
71}; 73};
72 74
73/* ARMv7 Cortex-A8 specific event types */ 75/* ARMv7 Cortex-A8 specific event types */
74enum armv7_a8_perf_types { 76enum armv7_a8_perf_types {
75 ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, 77 ARMV7_A8_PERFCTR_L2_CACHE_ACCESS = 0x43,
76 ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, 78 ARMV7_A8_PERFCTR_L2_CACHE_REFILL = 0x44,
77 ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, 79 ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS = 0x50,
78 ARMV7_PERFCTR_L2_ACCESS = 0x43, 80 ARMV7_A8_PERFCTR_STALL_ISIDE = 0x56,
79 ARMV7_PERFCTR_L2_CACH_MISS = 0x44,
80 ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45,
81 ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46,
82 ARMV7_PERFCTR_MEMORY_REPLAY = 0x47,
83 ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48,
84 ARMV7_PERFCTR_L1_DATA_MISS = 0x49,
85 ARMV7_PERFCTR_L1_INST_MISS = 0x4A,
86 ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B,
87 ARMV7_PERFCTR_L1_NEON_DATA = 0x4C,
88 ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D,
89 ARMV7_PERFCTR_L2_NEON = 0x4E,
90 ARMV7_PERFCTR_L2_NEON_HIT = 0x4F,
91 ARMV7_PERFCTR_L1_INST = 0x50,
92 ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51,
93 ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52,
94 ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53,
95 ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54,
96 ARMV7_PERFCTR_OP_EXECUTED = 0x55,
97 ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56,
98 ARMV7_PERFCTR_CYCLES_INST = 0x57,
99 ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58,
100 ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59,
101 ARMV7_PERFCTR_NEON_CYCLES = 0x5A,
102
103 ARMV7_PERFCTR_PMU0_EVENTS = 0x70,
104 ARMV7_PERFCTR_PMU1_EVENTS = 0x71,
105 ARMV7_PERFCTR_PMU_EVENTS = 0x72,
106}; 81};
107 82
108/* ARMv7 Cortex-A9 specific event types */ 83/* ARMv7 Cortex-A9 specific event types */
109enum armv7_a9_perf_types { 84enum armv7_a9_perf_types {
110 ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, 85 ARMV7_A9_PERFCTR_INSTR_CORE_RENAME = 0x68,
111 ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, 86 ARMV7_A9_PERFCTR_STALL_ICACHE = 0x60,
112 ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, 87 ARMV7_A9_PERFCTR_STALL_DISPATCH = 0x66,
113
114 ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50,
115 ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51,
116
117 ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60,
118 ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61,
119 ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62,
120 ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63,
121 ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64,
122 ARMV7_PERFCTR_DATA_EVICTION = 0x65,
123 ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66,
124 ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67,
125 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68,
126
127 ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E,
128
129 ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70,
130 ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71,
131 ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72,
132 ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73,
133 ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74,
134
135 ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80,
136 ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81,
137 ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82,
138 ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83,
139 ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84,
140 ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85,
141 ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86,
142
143 ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A,
144 ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B,
145
146 ARMV7_PERFCTR_ISB_INST = 0x90,
147 ARMV7_PERFCTR_DSB_INST = 0x91,
148 ARMV7_PERFCTR_DMB_INST = 0x92,
149 ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93,
150
151 ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0,
152 ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1,
153 ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2,
154 ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3,
155 ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4,
156 ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5
157}; 88};
158 89
159/* ARMv7 Cortex-A5 specific event types */ 90/* ARMv7 Cortex-A5 specific event types */
160enum armv7_a5_perf_types { 91enum armv7_a5_perf_types {
161 ARMV7_PERFCTR_IRQ_TAKEN = 0x86, 92 ARMV7_A5_PERFCTR_PREFETCH_LINEFILL = 0xc2,
162 ARMV7_PERFCTR_FIQ_TAKEN = 0x87, 93 ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3,
163
164 ARMV7_PERFCTR_EXT_MEM_RQST = 0xc0,
165 ARMV7_PERFCTR_NC_EXT_MEM_RQST = 0xc1,
166 ARMV7_PERFCTR_PREFETCH_LINEFILL = 0xc2,
167 ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3,
168 ARMV7_PERFCTR_ENTER_READ_ALLOC = 0xc4,
169 ARMV7_PERFCTR_READ_ALLOC = 0xc5,
170
171 ARMV7_PERFCTR_STALL_SB_FULL = 0xc9,
172}; 94};
173 95
174/* ARMv7 Cortex-A15 specific event types */ 96/* ARMv7 Cortex-A15 specific event types */
175enum armv7_a15_perf_types { 97enum armv7_a15_perf_types {
176 ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS = 0x40, 98 ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ = 0x40,
177 ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS = 0x41, 99 ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE = 0x41,
178 ARMV7_PERFCTR_L1_DCACHE_READ_REFILL = 0x42, 100 ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ = 0x42,
179 ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL = 0x43, 101 ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE = 0x43,
180 102
181 ARMV7_PERFCTR_L1_DTLB_READ_REFILL = 0x4C, 103 ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ = 0x4C,
182 ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL = 0x4D, 104 ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE = 0x4D,
183 105
184 ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS = 0x50, 106 ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ = 0x50,
185 ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS = 0x51, 107 ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE = 0x51,
186 ARMV7_PERFCTR_L2_DCACHE_READ_REFILL = 0x52, 108 ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ = 0x52,
187 ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL = 0x53, 109 ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE = 0x53,
188 110
189 ARMV7_PERFCTR_SPEC_PC_WRITE = 0x76, 111 ARMV7_A15_PERFCTR_PC_WRITE_SPEC = 0x76,
190}; 112};
191 113
192/* 114/*
@@ -197,13 +119,15 @@ enum armv7_a15_perf_types {
197 * accesses/misses in hardware. 119 * accesses/misses in hardware.
198 */ 120 */
199static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { 121static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = {
200 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 122 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
201 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 123 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
202 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 124 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
203 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 125 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
204 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 126 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
205 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 127 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
206 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, 128 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
129 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE,
130 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
207}; 131};
208 132
209static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 133static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
217 * combined. 141 * combined.
218 */ 142 */
219 [C(OP_READ)] = { 143 [C(OP_READ)] = {
220 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 144 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
221 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 145 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
222 }, 146 },
223 [C(OP_WRITE)] = { 147 [C(OP_WRITE)] = {
224 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 148 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
225 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 149 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
226 }, 150 },
227 [C(OP_PREFETCH)] = { 151 [C(OP_PREFETCH)] = {
228 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 152 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
231 }, 155 },
232 [C(L1I)] = { 156 [C(L1I)] = {
233 [C(OP_READ)] = { 157 [C(OP_READ)] = {
234 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, 158 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
235 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, 159 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
236 }, 160 },
237 [C(OP_WRITE)] = { 161 [C(OP_WRITE)] = {
238 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, 162 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
239 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, 163 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
240 }, 164 },
241 [C(OP_PREFETCH)] = { 165 [C(OP_PREFETCH)] = {
242 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 166 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
245 }, 169 },
246 [C(LL)] = { 170 [C(LL)] = {
247 [C(OP_READ)] = { 171 [C(OP_READ)] = {
248 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, 172 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
249 [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, 173 [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
250 }, 174 },
251 [C(OP_WRITE)] = { 175 [C(OP_WRITE)] = {
252 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, 176 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
253 [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, 177 [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
254 }, 178 },
255 [C(OP_PREFETCH)] = { 179 [C(OP_PREFETCH)] = {
256 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 180 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
274 [C(ITLB)] = { 198 [C(ITLB)] = {
275 [C(OP_READ)] = { 199 [C(OP_READ)] = {
276 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 200 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
277 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 201 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
278 }, 202 },
279 [C(OP_WRITE)] = { 203 [C(OP_WRITE)] = {
280 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 204 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
281 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 205 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
282 }, 206 },
283 [C(OP_PREFETCH)] = { 207 [C(OP_PREFETCH)] = {
284 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 208 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
287 }, 211 },
288 [C(BPU)] = { 212 [C(BPU)] = {
289 [C(OP_READ)] = { 213 [C(OP_READ)] = {
290 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 214 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
291 [C(RESULT_MISS)] 215 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
292 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
293 }, 216 },
294 [C(OP_WRITE)] = { 217 [C(OP_WRITE)] = {
295 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 218 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
296 [C(RESULT_MISS)] 219 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
297 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
298 }, 220 },
299 [C(OP_PREFETCH)] = { 221 [C(OP_PREFETCH)] = {
300 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 222 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
321 * Cortex-A9 HW events mapping 243 * Cortex-A9 HW events mapping
322 */ 244 */
323static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { 245static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
324 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 246 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
325 [PERF_COUNT_HW_INSTRUCTIONS] = 247 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME,
326 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, 248 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
327 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS, 249 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
328 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL, 250 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
329 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 251 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
330 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 252 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
331 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, 253 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE,
254 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV7_A9_PERFCTR_STALL_DISPATCH,
332}; 255};
333 256
334static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 257static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
342 * combined. 265 * combined.
343 */ 266 */
344 [C(OP_READ)] = { 267 [C(OP_READ)] = {
345 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 268 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
346 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 269 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
347 }, 270 },
348 [C(OP_WRITE)] = { 271 [C(OP_WRITE)] = {
349 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 272 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
350 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 273 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
351 }, 274 },
352 [C(OP_PREFETCH)] = { 275 [C(OP_PREFETCH)] = {
353 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 276 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
357 [C(L1I)] = { 280 [C(L1I)] = {
358 [C(OP_READ)] = { 281 [C(OP_READ)] = {
359 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 282 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
360 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 283 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
361 }, 284 },
362 [C(OP_WRITE)] = { 285 [C(OP_WRITE)] = {
363 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 286 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
364 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 287 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
365 }, 288 },
366 [C(OP_PREFETCH)] = { 289 [C(OP_PREFETCH)] = {
367 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 290 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
399 [C(ITLB)] = { 322 [C(ITLB)] = {
400 [C(OP_READ)] = { 323 [C(OP_READ)] = {
401 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 324 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
402 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 325 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
403 }, 326 },
404 [C(OP_WRITE)] = { 327 [C(OP_WRITE)] = {
405 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 328 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
406 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 329 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
407 }, 330 },
408 [C(OP_PREFETCH)] = { 331 [C(OP_PREFETCH)] = {
409 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 332 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
412 }, 335 },
413 [C(BPU)] = { 336 [C(BPU)] = {
414 [C(OP_READ)] = { 337 [C(OP_READ)] = {
415 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 338 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
416 [C(RESULT_MISS)] 339 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
417 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
418 }, 340 },
419 [C(OP_WRITE)] = { 341 [C(OP_WRITE)] = {
420 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 342 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
421 [C(RESULT_MISS)] 343 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
422 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
423 }, 344 },
424 [C(OP_PREFETCH)] = { 345 [C(OP_PREFETCH)] = {
425 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 346 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
446 * Cortex-A5 HW events mapping 367 * Cortex-A5 HW events mapping
447 */ 368 */
448static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = { 369static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = {
449 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 370 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
450 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 371 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
451 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 372 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
452 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 373 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
453 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 374 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
454 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 375 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
455 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 376 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
377 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
378 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
456}; 379};
457 380
458static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 381static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
460 [PERF_COUNT_HW_CACHE_RESULT_MAX] = { 383 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
461 [C(L1D)] = { 384 [C(L1D)] = {
462 [C(OP_READ)] = { 385 [C(OP_READ)] = {
463 [C(RESULT_ACCESS)] 386 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
464 = ARMV7_PERFCTR_DCACHE_ACCESS, 387 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
465 [C(RESULT_MISS)]
466 = ARMV7_PERFCTR_DCACHE_REFILL,
467 }, 388 },
468 [C(OP_WRITE)] = { 389 [C(OP_WRITE)] = {
469 [C(RESULT_ACCESS)] 390 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
470 = ARMV7_PERFCTR_DCACHE_ACCESS, 391 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
471 [C(RESULT_MISS)]
472 = ARMV7_PERFCTR_DCACHE_REFILL,
473 }, 392 },
474 [C(OP_PREFETCH)] = { 393 [C(OP_PREFETCH)] = {
475 [C(RESULT_ACCESS)] 394 [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
476 = ARMV7_PERFCTR_PREFETCH_LINEFILL, 395 [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
477 [C(RESULT_MISS)]
478 = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
479 }, 396 },
480 }, 397 },
481 [C(L1I)] = { 398 [C(L1I)] = {
482 [C(OP_READ)] = { 399 [C(OP_READ)] = {
483 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 400 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
484 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 401 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
485 }, 402 },
486 [C(OP_WRITE)] = { 403 [C(OP_WRITE)] = {
487 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 404 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
488 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 405 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
489 }, 406 },
490 /* 407 /*
491 * The prefetch counters don't differentiate between the I 408 * The prefetch counters don't differentiate between the I
492 * side and the D side. 409 * side and the D side.
493 */ 410 */
494 [C(OP_PREFETCH)] = { 411 [C(OP_PREFETCH)] = {
495 [C(RESULT_ACCESS)] 412 [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
496 = ARMV7_PERFCTR_PREFETCH_LINEFILL, 413 [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
497 [C(RESULT_MISS)]
498 = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
499 }, 414 },
500 }, 415 },
501 [C(LL)] = { 416 [C(LL)] = {
@@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
529 [C(ITLB)] = { 444 [C(ITLB)] = {
530 [C(OP_READ)] = { 445 [C(OP_READ)] = {
531 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 446 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
532 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 447 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
533 }, 448 },
534 [C(OP_WRITE)] = { 449 [C(OP_WRITE)] = {
535 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 450 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
536 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 451 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
537 }, 452 },
538 [C(OP_PREFETCH)] = { 453 [C(OP_PREFETCH)] = {
539 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 454 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
543 [C(BPU)] = { 458 [C(BPU)] = {
544 [C(OP_READ)] = { 459 [C(OP_READ)] = {
545 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 460 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
546 [C(RESULT_MISS)] 461 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
547 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
548 }, 462 },
549 [C(OP_WRITE)] = { 463 [C(OP_WRITE)] = {
550 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 464 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
551 [C(RESULT_MISS)] 465 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
552 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
553 }, 466 },
554 [C(OP_PREFETCH)] = { 467 [C(OP_PREFETCH)] = {
555 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 468 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
562 * Cortex-A15 HW events mapping 475 * Cortex-A15 HW events mapping
563 */ 476 */
564static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = { 477static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = {
565 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 478 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
566 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 479 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
567 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 480 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
568 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 481 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
569 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE, 482 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_A15_PERFCTR_PC_WRITE_SPEC,
570 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 483 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
571 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, 484 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES,
485 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
486 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
572}; 487};
573 488
574static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 489static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
576 [PERF_COUNT_HW_CACHE_RESULT_MAX] = { 491 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
577 [C(L1D)] = { 492 [C(L1D)] = {
578 [C(OP_READ)] = { 493 [C(OP_READ)] = {
579 [C(RESULT_ACCESS)] 494 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ,
580 = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS, 495 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ,
581 [C(RESULT_MISS)]
582 = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL,
583 }, 496 },
584 [C(OP_WRITE)] = { 497 [C(OP_WRITE)] = {
585 [C(RESULT_ACCESS)] 498 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE,
586 = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS, 499 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE,
587 [C(RESULT_MISS)]
588 = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL,
589 }, 500 },
590 [C(OP_PREFETCH)] = { 501 [C(OP_PREFETCH)] = {
591 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 502 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
601 */ 512 */
602 [C(OP_READ)] = { 513 [C(OP_READ)] = {
603 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 514 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
604 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 515 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
605 }, 516 },
606 [C(OP_WRITE)] = { 517 [C(OP_WRITE)] = {
607 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 518 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
608 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 519 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
609 }, 520 },
610 [C(OP_PREFETCH)] = { 521 [C(OP_PREFETCH)] = {
611 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 522 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
614 }, 525 },
615 [C(LL)] = { 526 [C(LL)] = {
616 [C(OP_READ)] = { 527 [C(OP_READ)] = {
617 [C(RESULT_ACCESS)] 528 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ,
618 = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS, 529 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ,
619 [C(RESULT_MISS)]
620 = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL,
621 }, 530 },
622 [C(OP_WRITE)] = { 531 [C(OP_WRITE)] = {
623 [C(RESULT_ACCESS)] 532 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE,
624 = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS, 533 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE,
625 [C(RESULT_MISS)]
626 = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL,
627 }, 534 },
628 [C(OP_PREFETCH)] = { 535 [C(OP_PREFETCH)] = {
629 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 536 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
633 [C(DTLB)] = { 540 [C(DTLB)] = {
634 [C(OP_READ)] = { 541 [C(OP_READ)] = {
635 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 542 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
636 [C(RESULT_MISS)] 543 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ,
637 = ARMV7_PERFCTR_L1_DTLB_READ_REFILL,
638 }, 544 },
639 [C(OP_WRITE)] = { 545 [C(OP_WRITE)] = {
640 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 546 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
641 [C(RESULT_MISS)] 547 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE,
642 = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL,
643 }, 548 },
644 [C(OP_PREFETCH)] = { 549 [C(OP_PREFETCH)] = {
645 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 550 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
649 [C(ITLB)] = { 554 [C(ITLB)] = {
650 [C(OP_READ)] = { 555 [C(OP_READ)] = {
651 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 556 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
652 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 557 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
653 }, 558 },
654 [C(OP_WRITE)] = { 559 [C(OP_WRITE)] = {
655 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 560 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
656 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 561 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
657 }, 562 },
658 [C(OP_PREFETCH)] = { 563 [C(OP_PREFETCH)] = {
659 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 564 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
663 [C(BPU)] = { 568 [C(BPU)] = {
664 [C(OP_READ)] = { 569 [C(OP_READ)] = {
665 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 570 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
666 [C(RESULT_MISS)] 571 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
667 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
668 }, 572 },
669 [C(OP_WRITE)] = { 573 [C(OP_WRITE)] = {
670 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 574 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
671 [C(RESULT_MISS)] 575 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
672 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
673 }, 576 },
674 [C(OP_PREFETCH)] = { 577 [C(OP_PREFETCH)] = {
675 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 578 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index e0cca10a8411..3b99d8269829 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -48,13 +48,15 @@ enum xscale_counters {
48}; 48};
49 49
50static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = { 50static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = {
51 [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, 51 [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT,
52 [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, 52 [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION,
53 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 53 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
54 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 54 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
55 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, 55 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH,
56 [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, 56 [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS,
57 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 57 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
58 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER,
59 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
58}; 60};
59 61
60static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 62static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 3d0c6fb74ae4..b29776aa6586 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -57,7 +57,7 @@ static const char *isa_modes[] = {
57 "ARM" , "Thumb" , "Jazelle", "ThumbEE" 57 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
58}; 58};
59 59
60extern void setup_mm_for_reboot(char mode); 60extern void setup_mm_for_reboot(void);
61 61
62static volatile int hlt_counter; 62static volatile int hlt_counter;
63 63
@@ -92,18 +92,24 @@ static int __init hlt_setup(char *__unused)
92__setup("nohlt", nohlt_setup); 92__setup("nohlt", nohlt_setup);
93__setup("hlt", hlt_setup); 93__setup("hlt", hlt_setup);
94 94
95void arm_machine_restart(char mode, const char *cmd) 95extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
96typedef void (*phys_reset_t)(unsigned long);
97
98/*
99 * A temporary stack to use for CPU reset. This is static so that we
100 * don't clobber it with the identity mapping. When running with this
101 * stack, any references to the current task *will not work* so you
102 * should really do as little as possible before jumping to your reset
103 * code.
104 */
105static u64 soft_restart_stack[16];
106
107static void __soft_restart(void *addr)
96{ 108{
97 /* Disable interrupts first */ 109 phys_reset_t phys_reset;
98 local_irq_disable();
99 local_fiq_disable();
100 110
101 /* 111 /* Take out a flat memory mapping. */
102 * Tell the mm system that we are going to reboot - 112 setup_mm_for_reboot();
103 * we may need it to insert some 1:1 mappings so that
104 * soft boot works.
105 */
106 setup_mm_for_reboot(mode);
107 113
108 /* Clean and invalidate caches */ 114 /* Clean and invalidate caches */
109 flush_cache_all(); 115 flush_cache_all();
@@ -114,18 +120,35 @@ void arm_machine_restart(char mode, const char *cmd)
114 /* Push out any further dirty data, and ensure cache is empty */ 120 /* Push out any further dirty data, and ensure cache is empty */
115 flush_cache_all(); 121 flush_cache_all();
116 122
117 /* 123 /* Switch to the identity mapping. */
118 * Now call the architecture specific reboot code. 124 phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
119 */ 125 phys_reset((unsigned long)addr);
120 arch_reset(mode, cmd);
121 126
122 /* 127 /* Should never get here. */
123 * Whoops - the architecture was unable to reboot. 128 BUG();
124 * Tell the user! 129}
125 */ 130
126 mdelay(1000); 131void soft_restart(unsigned long addr)
127 printk("Reboot failed -- System halted\n"); 132{
128 while (1); 133 u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
134
135 /* Disable interrupts first */
136 local_irq_disable();
137 local_fiq_disable();
138
139 /* Disable the L2 if we're the last man standing. */
140 if (num_online_cpus() == 1)
141 outer_disable();
142
143 /* Change to the new stack and continue with the reset. */
144 call_with_stack(__soft_restart, (void *)addr, (void *)stack);
145
146 /* Should never get here. */
147 BUG();
148}
149
150static void null_restart(char mode, const char *cmd)
151{
129} 152}
130 153
131/* 154/*
@@ -134,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd)
134void (*pm_power_off)(void); 157void (*pm_power_off)(void);
135EXPORT_SYMBOL(pm_power_off); 158EXPORT_SYMBOL(pm_power_off);
136 159
137void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; 160void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
138EXPORT_SYMBOL_GPL(arm_pm_restart); 161EXPORT_SYMBOL_GPL(arm_pm_restart);
139 162
140static void do_nothing(void *unused) 163static void do_nothing(void *unused)
@@ -253,7 +276,15 @@ void machine_power_off(void)
253void machine_restart(char *cmd) 276void machine_restart(char *cmd)
254{ 277{
255 machine_shutdown(); 278 machine_shutdown();
279
256 arm_pm_restart(reboot_mode, cmd); 280 arm_pm_restart(reboot_mode, cmd);
281
282 /* Give a grace period for failure to restart of 1s */
283 mdelay(1000);
284
285 /* Whoops - the platform was unable to reboot. Tell the user! */
286 printk("Reboot failed -- System halted\n");
287 while (1);
257} 288}
258 289
259void __show_regs(struct pt_regs *regs) 290void __show_regs(struct pt_regs *regs)
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370fe9da..5416c7c12528 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -14,61 +14,153 @@
14 14
15#include <asm/sched_clock.h> 15#include <asm/sched_clock.h>
16 16
17struct clock_data {
18 u64 epoch_ns;
19 u32 epoch_cyc;
20 u32 epoch_cyc_copy;
21 u32 mult;
22 u32 shift;
23};
24
17static void sched_clock_poll(unsigned long wrap_ticks); 25static void sched_clock_poll(unsigned long wrap_ticks);
18static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); 26static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
19static void (*sched_clock_update_fn)(void); 27
28static struct clock_data cd = {
29 .mult = NSEC_PER_SEC / HZ,
30};
31
32static u32 __read_mostly sched_clock_mask = 0xffffffff;
33
34static u32 notrace jiffy_sched_clock_read(void)
35{
36 return (u32)(jiffies - INITIAL_JIFFIES);
37}
38
39static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
40
41static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
42{
43 return (cyc * mult) >> shift;
44}
45
46static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
47{
48 u64 epoch_ns;
49 u32 epoch_cyc;
50
51 /*
52 * Load the epoch_cyc and epoch_ns atomically. We do this by
53 * ensuring that we always write epoch_cyc, epoch_ns and
54 * epoch_cyc_copy in strict order, and read them in strict order.
55 * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
56 * the middle of an update, and we should repeat the load.
57 */
58 do {
59 epoch_cyc = cd.epoch_cyc;
60 smp_rmb();
61 epoch_ns = cd.epoch_ns;
62 smp_rmb();
63 } while (epoch_cyc != cd.epoch_cyc_copy);
64
65 return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift);
66}
67
68/*
69 * Atomically update the sched_clock epoch.
70 */
71static void notrace update_sched_clock(void)
72{
73 unsigned long flags;
74 u32 cyc;
75 u64 ns;
76
77 cyc = read_sched_clock();
78 ns = cd.epoch_ns +
79 cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
80 cd.mult, cd.shift);
81 /*
82 * Write epoch_cyc and epoch_ns in a way that the update is
83 * detectable in cyc_to_fixed_sched_clock().
84 */
85 raw_local_irq_save(flags);
86 cd.epoch_cyc = cyc;
87 smp_wmb();
88 cd.epoch_ns = ns;
89 smp_wmb();
90 cd.epoch_cyc_copy = cyc;
91 raw_local_irq_restore(flags);
92}
20 93
21static void sched_clock_poll(unsigned long wrap_ticks) 94static void sched_clock_poll(unsigned long wrap_ticks)
22{ 95{
23 mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); 96 mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
24 sched_clock_update_fn(); 97 update_sched_clock();
25} 98}
26 99
27void __init init_sched_clock(struct clock_data *cd, void (*update)(void), 100void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
28 unsigned int clock_bits, unsigned long rate)
29{ 101{
30 unsigned long r, w; 102 unsigned long r, w;
31 u64 res, wrap; 103 u64 res, wrap;
32 char r_unit; 104 char r_unit;
33 105
34 sched_clock_update_fn = update; 106 BUG_ON(bits > 32);
107 WARN_ON(!irqs_disabled());
108 WARN_ON(read_sched_clock != jiffy_sched_clock_read);
109 read_sched_clock = read;
110 sched_clock_mask = (1 << bits) - 1;
35 111
36 /* calculate the mult/shift to convert counter ticks to ns. */ 112 /* calculate the mult/shift to convert counter ticks to ns. */
37 clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0); 113 clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0);
38 114
39 r = rate; 115 r = rate;
40 if (r >= 4000000) { 116 if (r >= 4000000) {
41 r /= 1000000; 117 r /= 1000000;
42 r_unit = 'M'; 118 r_unit = 'M';
43 } else { 119 } else if (r >= 1000) {
44 r /= 1000; 120 r /= 1000;
45 r_unit = 'k'; 121 r_unit = 'k';
46 } 122 } else
123 r_unit = ' ';
47 124
48 /* calculate how many ns until we wrap */ 125 /* calculate how many ns until we wrap */
49 wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift); 126 wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift);
50 do_div(wrap, NSEC_PER_MSEC); 127 do_div(wrap, NSEC_PER_MSEC);
51 w = wrap; 128 w = wrap;
52 129
53 /* calculate the ns resolution of this counter */ 130 /* calculate the ns resolution of this counter */
54 res = cyc_to_ns(1ULL, cd->mult, cd->shift); 131 res = cyc_to_ns(1ULL, cd.mult, cd.shift);
55 pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", 132 pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n",
56 clock_bits, r, r_unit, res, w); 133 bits, r, r_unit, res, w);
57 134
58 /* 135 /*
59 * Start the timer to keep sched_clock() properly updated and 136 * Start the timer to keep sched_clock() properly updated and
60 * sets the initial epoch. 137 * sets the initial epoch.
61 */ 138 */
62 sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); 139 sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
63 update(); 140 update_sched_clock();
64 141
65 /* 142 /*
66 * Ensure that sched_clock() starts off at 0ns 143 * Ensure that sched_clock() starts off at 0ns
67 */ 144 */
68 cd->epoch_ns = 0; 145 cd.epoch_ns = 0;
146
147 pr_debug("Registered %pF as sched_clock source\n", read);
148}
149
150unsigned long long notrace sched_clock(void)
151{
152 u32 cyc = read_sched_clock();
153 return cyc_to_sched_clock(cyc, sched_clock_mask);
69} 154}
70 155
71void __init sched_clock_postinit(void) 156void __init sched_clock_postinit(void)
72{ 157{
158 /*
159 * If no sched_clock function has been provided at that point,
160 * make it the final one one.
161 */
162 if (read_sched_clock == jiffy_sched_clock_read)
163 setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
164
73 sched_clock_poll(sched_clock_timer.data); 165 sched_clock_poll(sched_clock_timer.data);
74} 166}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 8fc2c8fcbdc6..095d6611c84e 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -31,6 +31,7 @@
31#include <linux/memblock.h> 31#include <linux/memblock.h>
32#include <linux/bug.h> 32#include <linux/bug.h>
33#include <linux/compiler.h> 33#include <linux/compiler.h>
34#include <linux/sort.h>
34 35
35#include <asm/unified.h> 36#include <asm/unified.h>
36#include <asm/cpu.h> 37#include <asm/cpu.h>
@@ -890,6 +891,12 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
890 return mdesc; 891 return mdesc;
891} 892}
892 893
894static int __init meminfo_cmp(const void *_a, const void *_b)
895{
896 const struct membank *a = _a, *b = _b;
897 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
898 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
899}
893 900
894void __init setup_arch(char **cmdline_p) 901void __init setup_arch(char **cmdline_p)
895{ 902{
@@ -908,8 +915,8 @@ void __init setup_arch(char **cmdline_p)
908 arm_dma_zone_size = mdesc->dma_zone_size; 915 arm_dma_zone_size = mdesc->dma_zone_size;
909 } 916 }
910#endif 917#endif
911 if (mdesc->soft_reboot) 918 if (mdesc->restart_mode)
912 reboot_setup("s"); 919 reboot_setup(&mdesc->restart_mode);
913 920
914 init_mm.start_code = (unsigned long) _text; 921 init_mm.start_code = (unsigned long) _text;
915 init_mm.end_code = (unsigned long) _etext; 922 init_mm.end_code = (unsigned long) _etext;
@@ -922,12 +929,16 @@ void __init setup_arch(char **cmdline_p)
922 929
923 parse_early_param(); 930 parse_early_param();
924 931
932 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
925 sanity_check_meminfo(); 933 sanity_check_meminfo();
926 arm_memblock_init(&meminfo, mdesc); 934 arm_memblock_init(&meminfo, mdesc);
927 935
928 paging_init(mdesc); 936 paging_init(mdesc);
929 request_standard_resources(mdesc); 937 request_standard_resources(mdesc);
930 938
939 if (mdesc->restart)
940 arm_pm_restart = mdesc->restart;
941
931 unflatten_device_tree(); 942 unflatten_device_tree();
932 943
933#ifdef CONFIG_SMP 944#ifdef CONFIG_SMP
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 020e99c845e7..1f268bda4552 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort)
54 * r0 = control register value 54 * r0 = control register value
55 */ 55 */
56 .align 5 56 .align 5
57 .pushsection .idmap.text,"ax"
57ENTRY(cpu_resume_mmu) 58ENTRY(cpu_resume_mmu)
58 ldr r3, =cpu_resume_after_mmu 59 ldr r3, =cpu_resume_after_mmu
60 instr_sync
59 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc 61 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc
60 mrc p15, 0, r0, c0, c0, 0 @ read id reg 62 mrc p15, 0, r0, c0, c0, 0 @ read id reg
63 instr_sync
61 mov r0, r0 64 mov r0, r0
62 mov r0, r0 65 mov r0, r0
63 mov pc, r3 @ jump to virtual address 66 mov pc, r3 @ jump to virtual address
64ENDPROC(cpu_resume_mmu) 67ENDPROC(cpu_resume_mmu)
68 .popsection
65cpu_resume_after_mmu: 69cpu_resume_after_mmu:
66 bl cpu_init @ restore the und/abt/irq banked regs 70 bl cpu_init @ restore the und/abt/irq banked regs
67 mov r0, #0 @ return zero on success 71 mov r0, #0 @ return zero on success
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index ef5640b9e218..57db122a4f62 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -31,6 +31,7 @@
31#include <asm/cpu.h> 31#include <asm/cpu.h>
32#include <asm/cputype.h> 32#include <asm/cputype.h>
33#include <asm/exception.h> 33#include <asm/exception.h>
34#include <asm/idmap.h>
34#include <asm/topology.h> 35#include <asm/topology.h>
35#include <asm/mmu_context.h> 36#include <asm/mmu_context.h>
36#include <asm/pgtable.h> 37#include <asm/pgtable.h>
@@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
61{ 62{
62 struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); 63 struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
63 struct task_struct *idle = ci->idle; 64 struct task_struct *idle = ci->idle;
64 pgd_t *pgd;
65 int ret; 65 int ret;
66 66
67 /* 67 /*
@@ -84,29 +84,11 @@ int __cpuinit __cpu_up(unsigned int cpu)
84 } 84 }
85 85
86 /* 86 /*
87 * Allocate initial page tables to allow the new CPU to
88 * enable the MMU safely. This essentially means a set
89 * of our "standard" page tables, with the addition of
90 * a 1:1 mapping for the physical address of the kernel.
91 */
92 pgd = pgd_alloc(&init_mm);
93 if (!pgd)
94 return -ENOMEM;
95
96 if (PHYS_OFFSET != PAGE_OFFSET) {
97#ifndef CONFIG_HOTPLUG_CPU
98 identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end));
99#endif
100 identity_mapping_add(pgd, __pa(_stext), __pa(_etext));
101 identity_mapping_add(pgd, __pa(_sdata), __pa(_edata));
102 }
103
104 /*
105 * We need to tell the secondary core where to find 87 * We need to tell the secondary core where to find
106 * its stack and the page tables. 88 * its stack and the page tables.
107 */ 89 */
108 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; 90 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
109 secondary_data.pgdir = virt_to_phys(pgd); 91 secondary_data.pgdir = virt_to_phys(idmap_pgd);
110 secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); 92 secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir);
111 __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); 93 __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
112 outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); 94 outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
@@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
142 secondary_data.stack = NULL; 124 secondary_data.stack = NULL;
143 secondary_data.pgdir = 0; 125 secondary_data.pgdir = 0;
144 126
145 if (PHYS_OFFSET != PAGE_OFFSET) {
146#ifndef CONFIG_HOTPLUG_CPU
147 identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end));
148#endif
149 identity_mapping_del(pgd, __pa(_stext), __pa(_etext));
150 identity_mapping_del(pgd, __pa(_sdata), __pa(_edata));
151 }
152
153 pgd_free(&init_mm, pgd);
154
155 return ret; 127 return ret;
156} 128}
157 129
@@ -550,6 +522,10 @@ static void ipi_cpu_stop(unsigned int cpu)
550 local_fiq_disable(); 522 local_fiq_disable();
551 local_irq_disable(); 523 local_irq_disable();
552 524
525#ifdef CONFIG_HOTPLUG_CPU
526 platform_cpu_kill(cpu);
527#endif
528
553 while (1) 529 while (1)
554 cpu_relax(); 530 cpu_relax();
555} 531}
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index a8a6682d6b52..c8e938553d47 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -10,8 +10,11 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/clk.h>
14#include <linux/cpufreq.h>
13#include <linux/delay.h> 15#include <linux/delay.h>
14#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/err.h>
15#include <linux/smp.h> 18#include <linux/smp.h>
16#include <linux/jiffies.h> 19#include <linux/jiffies.h>
17#include <linux/clockchips.h> 20#include <linux/clockchips.h>
@@ -25,6 +28,7 @@
25/* set up by the platform code */ 28/* set up by the platform code */
26void __iomem *twd_base; 29void __iomem *twd_base;
27 30
31static struct clk *twd_clk;
28static unsigned long twd_timer_rate; 32static unsigned long twd_timer_rate;
29 33
30static struct clock_event_device __percpu **twd_evt; 34static struct clock_event_device __percpu **twd_evt;
@@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk)
89 disable_percpu_irq(clk->irq); 93 disable_percpu_irq(clk->irq);
90} 94}
91 95
96#ifdef CONFIG_CPU_FREQ
97
98/*
99 * Updates clockevent frequency when the cpu frequency changes.
100 * Called on the cpu that is changing frequency with interrupts disabled.
101 */
102static void twd_update_frequency(void *data)
103{
104 twd_timer_rate = clk_get_rate(twd_clk);
105
106 clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
107}
108
109static int twd_cpufreq_transition(struct notifier_block *nb,
110 unsigned long state, void *data)
111{
112 struct cpufreq_freqs *freqs = data;
113
114 /*
115 * The twd clock events must be reprogrammed to account for the new
116 * frequency. The timer is local to a cpu, so cross-call to the
117 * changing cpu.
118 */
119 if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
120 smp_call_function_single(freqs->cpu, twd_update_frequency,
121 NULL, 1);
122
123 return NOTIFY_OK;
124}
125
126static struct notifier_block twd_cpufreq_nb = {
127 .notifier_call = twd_cpufreq_transition,
128};
129
130static int twd_cpufreq_init(void)
131{
132 if (!IS_ERR(twd_clk))
133 return cpufreq_register_notifier(&twd_cpufreq_nb,
134 CPUFREQ_TRANSITION_NOTIFIER);
135
136 return 0;
137}
138core_initcall(twd_cpufreq_init);
139
140#endif
141
92static void __cpuinit twd_calibrate_rate(void) 142static void __cpuinit twd_calibrate_rate(void)
93{ 143{
94 unsigned long count; 144 unsigned long count;
@@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id)
140 return IRQ_NONE; 190 return IRQ_NONE;
141} 191}
142 192
193static struct clk *twd_get_clock(void)
194{
195 struct clk *clk;
196 int err;
197
198 clk = clk_get_sys("smp_twd", NULL);
199 if (IS_ERR(clk)) {
200 pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
201 return clk;
202 }
203
204 err = clk_prepare(clk);
205 if (err) {
206 pr_err("smp_twd: clock failed to prepare: %d\n", err);
207 clk_put(clk);
208 return ERR_PTR(err);
209 }
210
211 err = clk_enable(clk);
212 if (err) {
213 pr_err("smp_twd: clock failed to enable: %d\n", err);
214 clk_unprepare(clk);
215 clk_put(clk);
216 return ERR_PTR(err);
217 }
218
219 return clk;
220}
221
143/* 222/*
144 * Setup the local clock events for a CPU. 223 * Setup the local clock events for a CPU.
145 */ 224 */
@@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
165 } 244 }
166 } 245 }
167 246
168 twd_calibrate_rate(); 247 if (!twd_clk)
248 twd_clk = twd_get_clock();
249
250 if (!IS_ERR_OR_NULL(twd_clk))
251 twd_timer_rate = clk_get_rate(twd_clk);
252 else
253 twd_calibrate_rate();
169 254
170 clk->name = "local_timer"; 255 clk->name = "local_timer";
171 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | 256 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
@@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
173 clk->rating = 350; 258 clk->rating = 350;
174 clk->set_mode = twd_set_mode; 259 clk->set_mode = twd_set_mode;
175 clk->set_next_event = twd_set_next_event; 260 clk->set_next_event = twd_set_next_event;
176 clk->shift = 20;
177 clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);
178 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
179 clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
180 261
181 this_cpu_clk = __this_cpu_ptr(twd_evt); 262 this_cpu_clk = __this_cpu_ptr(twd_evt);
182 *this_cpu_clk = clk; 263 *this_cpu_clk = clk;
183 264
184 clockevents_register_device(clk); 265 clockevents_config_and_register(clk, twd_timer_rate,
185 266 0xf, 0xffffffff);
186 enable_percpu_irq(clk->irq, 0); 267 enable_percpu_irq(clk->irq, 0);
187} 268}
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 93a22d282c16..1794cc3b0f18 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -1,13 +1,12 @@
1#include <linux/init.h> 1#include <linux/init.h>
2 2
3#include <asm/idmap.h>
3#include <asm/pgalloc.h> 4#include <asm/pgalloc.h>
4#include <asm/pgtable.h> 5#include <asm/pgtable.h>
5#include <asm/memory.h> 6#include <asm/memory.h>
6#include <asm/suspend.h> 7#include <asm/suspend.h>
7#include <asm/tlbflush.h> 8#include <asm/tlbflush.h>
8 9
9static pgd_t *suspend_pgd;
10
11extern int __cpu_suspend(unsigned long, int (*)(unsigned long)); 10extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
12extern void cpu_resume_mmu(void); 11extern void cpu_resume_mmu(void);
13 12
@@ -21,7 +20,7 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
21 *save_ptr = virt_to_phys(ptr); 20 *save_ptr = virt_to_phys(ptr);
22 21
23 /* This must correspond to the LDM in cpu_resume() assembly */ 22 /* This must correspond to the LDM in cpu_resume() assembly */
24 *ptr++ = virt_to_phys(suspend_pgd); 23 *ptr++ = virt_to_phys(idmap_pgd);
25 *ptr++ = sp; 24 *ptr++ = sp;
26 *ptr++ = virt_to_phys(cpu_do_resume); 25 *ptr++ = virt_to_phys(cpu_do_resume);
27 26
@@ -42,7 +41,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
42 struct mm_struct *mm = current->active_mm; 41 struct mm_struct *mm = current->active_mm;
43 int ret; 42 int ret;
44 43
45 if (!suspend_pgd) 44 if (!idmap_pgd)
46 return -EINVAL; 45 return -EINVAL;
47 46
48 /* 47 /*
@@ -59,14 +58,3 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
59 58
60 return ret; 59 return ret;
61} 60}
62
63static int __init cpu_suspend_init(void)
64{
65 suspend_pgd = pgd_alloc(&init_mm);
66 if (suspend_pgd) {
67 unsigned long addr = virt_to_phys(cpu_resume_mmu);
68 identity_mapping_add(suspend_pgd, addr, addr + SECTION_SIZE);
69 }
70 return suspend_pgd ? 0 : -ENOMEM;
71}
72core_initcall(cpu_suspend_init);
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 5f452f8fde05..df745188f5de 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -25,6 +25,7 @@
25#include <linux/syscalls.h> 25#include <linux/syscalls.h>
26#include <linux/perf_event.h> 26#include <linux/perf_event.h>
27 27
28#include <asm/opcodes.h>
28#include <asm/traps.h> 29#include <asm/traps.h>
29#include <asm/uaccess.h> 30#include <asm/uaccess.h>
30 31
@@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr)
185 186
186 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); 187 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
187 188
189 res = arm_check_condition(instr, regs->ARM_cpsr);
190 switch (res) {
191 case ARM_OPCODE_CONDTEST_PASS:
192 break;
193 case ARM_OPCODE_CONDTEST_FAIL:
194 /* Condition failed - return to next instruction */
195 regs->ARM_pc += 4;
196 return 0;
197 case ARM_OPCODE_CONDTEST_UNCOND:
198 /* If unconditional encoding - not a SWP, undef */
199 return -EFAULT;
200 default:
201 return -EINVAL;
202 }
203
188 if (current->pid != previous_pid) { 204 if (current->pid != previous_pid) {
189 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", 205 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
190 current->comm, (unsigned long)current->pid); 206 current->comm, (unsigned long)current->pid);
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30e302d33e0a..01ec453bb924 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
180 */ 180 */
181void __init tcm_init(void) 181void __init tcm_init(void)
182{ 182{
183 u32 tcm_status = read_cpuid_tcmstatus(); 183 u32 tcm_status;
184 u8 dtcm_banks = (tcm_status >> 16) & 0x03; 184 u8 dtcm_banks;
185 u8 itcm_banks = (tcm_status & 0x03); 185 u8 itcm_banks;
186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; 186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; 187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
188 char *start; 188 char *start;
@@ -191,6 +191,22 @@ void __init tcm_init(void)
191 int ret; 191 int ret;
192 int i; 192 int i;
193 193
194 /*
195 * Prior to ARMv5 there is no TCM, and trying to read the status
196 * register will hang the processor.
197 */
198 if (cpu_architecture() < CPU_ARCH_ARMv5) {
199 if (dtcm_code_sz || itcm_code_sz)
200 pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
201 "ITCM code compiled in, but no TCM present "
202 "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
203 return;
204 }
205
206 tcm_status = read_cpuid_tcmstatus();
207 dtcm_banks = (tcm_status >> 16) & 0x03;
208 itcm_banks = (tcm_status & 0x03);
209
194 /* Values greater than 2 for D/ITCM banks are "reserved" */ 210 /* Values greater than 2 for D/ITCM banks are "reserved" */
195 if (dtcm_banks > 2) 211 if (dtcm_banks > 2)
196 dtcm_banks = 0; 212 dtcm_banks = 0;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 20b3041e0860..f76e75548670 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -13,6 +13,12 @@
13 *(.proc.info.init) \ 13 *(.proc.info.init) \
14 VMLINUX_SYMBOL(__proc_info_end) = .; 14 VMLINUX_SYMBOL(__proc_info_end) = .;
15 15
16#define IDMAP_TEXT \
17 ALIGN_FUNCTION(); \
18 VMLINUX_SYMBOL(__idmap_text_start) = .; \
19 *(.idmap.text) \
20 VMLINUX_SYMBOL(__idmap_text_end) = .;
21
16#ifdef CONFIG_HOTPLUG_CPU 22#ifdef CONFIG_HOTPLUG_CPU
17#define ARM_CPU_DISCARD(x) 23#define ARM_CPU_DISCARD(x)
18#define ARM_CPU_KEEP(x) x 24#define ARM_CPU_KEEP(x) x
@@ -92,6 +98,7 @@ SECTIONS
92 SCHED_TEXT 98 SCHED_TEXT
93 LOCK_TEXT 99 LOCK_TEXT
94 KPROBES_TEXT 100 KPROBES_TEXT
101 IDMAP_TEXT
95#ifdef CONFIG_MMU 102#ifdef CONFIG_MMU
96 *(.fixup) 103 *(.fixup)
97#endif 104#endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index cf73a7f742dd..0ade0acc1ed9 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -13,7 +13,8 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
13 testchangebit.o testclearbit.o testsetbit.o \ 13 testchangebit.o testclearbit.o testsetbit.o \
14 ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 14 ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
15 ucmpdi2.o lib1funcs.o div64.o \ 15 ucmpdi2.o lib1funcs.o div64.o \
16 io-readsb.o io-writesb.o io-readsl.o io-writesl.o 16 io-readsb.o io-writesb.o io-readsl.o io-writesl.o \
17 call_with_stack.o
17 18
18mmu-y := clear_user.o copy_page.o getuser.o putuser.o 19mmu-y := clear_user.o copy_page.o getuser.o putuser.o
19 20
diff --git a/arch/arm/lib/call_with_stack.S b/arch/arm/lib/call_with_stack.S
new file mode 100644
index 000000000000..916c80f13ae7
--- /dev/null
+++ b/arch/arm/lib/call_with_stack.S
@@ -0,0 +1,44 @@
1/*
2 * arch/arm/lib/call_with_stack.S
3 *
4 * Copyright (C) 2011 ARM Ltd.
5 * Written by Will Deacon <will.deacon@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/linkage.h>
22#include <asm/assembler.h>
23
24/*
25 * void call_with_stack(void (*fn)(void *), void *arg, void *sp)
26 *
27 * Change the stack to that pointed at by sp, then invoke fn(arg) with
28 * the new stack.
29 */
30ENTRY(call_with_stack)
31 str sp, [r2, #-4]!
32 str lr, [r2, #-4]!
33
34 mov sp, r2
35 mov r2, r0
36 mov r0, r1
37
38 adr lr, BSYM(1f)
39 mov pc, r2
40
411: ldr lr, [sp]
42 ldr sp, [sp, #4]
43 mov pc, lr
44ENDPROC(call_with_stack)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d111c3e99249..4f991f295284 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,12 @@ if ARCH_AT91
3config HAVE_AT91_DATAFLASH_CARD 3config HAVE_AT91_DATAFLASH_CARD
4 bool 4 bool
5 5
6config HAVE_AT91_DBGU0
7 bool
8
9config HAVE_AT91_DBGU1
10 bool
11
6config HAVE_AT91_USART3 12config HAVE_AT91_USART3
7 bool 13 bool
8 14
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
21 bool "AT91RM9200" 27 bool "AT91RM9200"
22 select CPU_ARM920T 28 select CPU_ARM920T
23 select GENERIC_CLOCKEVENTS 29 select GENERIC_CLOCKEVENTS
30 select HAVE_AT91_DBGU0
24 select HAVE_AT91_USART3 31 select HAVE_AT91_USART3
25 32
26config ARCH_AT91SAM9260 33config ARCH_AT91SAM9260
27 bool "AT91SAM9260 or AT91SAM9XE" 34 bool "AT91SAM9260 or AT91SAM9XE"
28 select CPU_ARM926T 35 select CPU_ARM926T
29 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
37 select HAVE_AT91_DBGU0
30 select HAVE_AT91_USART3 38 select HAVE_AT91_USART3
31 select HAVE_AT91_USART4 39 select HAVE_AT91_USART4
32 select HAVE_AT91_USART5 40 select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
37 select CPU_ARM926T 45 select CPU_ARM926T
38 select GENERIC_CLOCKEVENTS 46 select GENERIC_CLOCKEVENTS
39 select HAVE_FB_ATMEL 47 select HAVE_FB_ATMEL
48 select HAVE_AT91_DBGU0
40 49
41config ARCH_AT91SAM9G10 50config ARCH_AT91SAM9G10
42 bool "AT91SAM9G10" 51 bool "AT91SAM9G10"
43 select CPU_ARM926T 52 select CPU_ARM926T
44 select GENERIC_CLOCKEVENTS 53 select GENERIC_CLOCKEVENTS
54 select HAVE_AT91_DBGU0
45 select HAVE_FB_ATMEL 55 select HAVE_FB_ATMEL
46 56
47config ARCH_AT91SAM9263 57config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
50 select GENERIC_CLOCKEVENTS 60 select GENERIC_CLOCKEVENTS
51 select HAVE_FB_ATMEL 61 select HAVE_FB_ATMEL
52 select HAVE_NET_MACB 62 select HAVE_NET_MACB
63 select HAVE_AT91_DBGU1
53 64
54config ARCH_AT91SAM9RL 65config ARCH_AT91SAM9RL
55 bool "AT91SAM9RL" 66 bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
57 select GENERIC_CLOCKEVENTS 68 select GENERIC_CLOCKEVENTS
58 select HAVE_AT91_USART3 69 select HAVE_AT91_USART3
59 select HAVE_FB_ATMEL 70 select HAVE_FB_ATMEL
71 select HAVE_AT91_DBGU0
60 72
61config ARCH_AT91SAM9G20 73config ARCH_AT91SAM9G20
62 bool "AT91SAM9G20" 74 bool "AT91SAM9G20"
63 select CPU_ARM926T 75 select CPU_ARM926T
64 select GENERIC_CLOCKEVENTS 76 select GENERIC_CLOCKEVENTS
77 select HAVE_AT91_DBGU0
65 select HAVE_AT91_USART3 78 select HAVE_AT91_USART3
66 select HAVE_AT91_USART4 79 select HAVE_AT91_USART4
67 select HAVE_AT91_USART5 80 select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
74 select HAVE_AT91_USART3 87 select HAVE_AT91_USART3
75 select HAVE_FB_ATMEL 88 select HAVE_FB_ATMEL
76 select HAVE_NET_MACB 89 select HAVE_NET_MACB
90 select HAVE_AT91_DBGU1
77 91
78config ARCH_AT91CAP9 92config ARCH_AT91CAP9
79 bool "AT91CAP9" 93 bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
81 select GENERIC_CLOCKEVENTS 95 select GENERIC_CLOCKEVENTS
82 select HAVE_FB_ATMEL 96 select HAVE_FB_ATMEL
83 select HAVE_NET_MACB 97 select HAVE_NET_MACB
98 select HAVE_AT91_DBGU1
84 99
85config ARCH_AT91X40 100config ARCH_AT91X40
86 bool "AT91x40" 101 bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
510choice 525choice
511 prompt "Select a UART for early kernel messages" 526 prompt "Select a UART for early kernel messages"
512 527
513config AT91_EARLY_DBGU 528config AT91_EARLY_DBGU0
514 bool "DBGU" 529 bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
530 depends on HAVE_AT91_DBGU0
531
532config AT91_EARLY_DBGU1
533 bool "DBGU on 9263, 9g45 and cap9"
534 depends on HAVE_AT91_DBGU1
515 535
516config AT91_EARLY_USART0 536config AT91_EARLY_USART0
517 bool "USART0" 537 bool "USART0"
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 17632b82dd76..edb879ac04c8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -13,7 +13,6 @@
13 */ 13 */
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/pm.h>
17 16
18#include <asm/irq.h> 17#include <asm/irq.h>
19#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
@@ -23,11 +22,11 @@
23#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
24#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
25#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
26#include <mach/at91_shdwc.h>
27 25
28#include "soc.h" 26#include "soc.h"
29#include "generic.h" 27#include "generic.h"
30#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h"
31 30
32/* -------------------------------------------------------------------- 31/* --------------------------------------------------------------------
33 * Clocks 32 * Clocks
@@ -223,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
223 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 222 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
224 /* fake hclk clock */ 223 /* fake hclk clock */
225 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 224 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
225 CLKDEV_CON_ID("pioA", &pioABCD_clk),
226 CLKDEV_CON_ID("pioB", &pioABCD_clk),
227 CLKDEV_CON_ID("pioC", &pioABCD_clk),
228 CLKDEV_CON_ID("pioD", &pioABCD_clk),
226}; 229};
227 230
228static struct clk_lookup usart_clocks_lookups[] = { 231static struct clk_lookup usart_clocks_lookups[] = {
@@ -295,37 +298,27 @@ void __init at91cap9_set_console_clock(int id)
295 * GPIO 298 * GPIO
296 * -------------------------------------------------------------------- */ 299 * -------------------------------------------------------------------- */
297 300
298static struct at91_gpio_bank at91cap9_gpio[] = { 301static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
299 { 302 {
300 .id = AT91CAP9_ID_PIOABCD, 303 .id = AT91CAP9_ID_PIOABCD,
301 .offset = AT91_PIOA, 304 .regbase = AT91CAP9_BASE_PIOA,
302 .clock = &pioABCD_clk,
303 }, { 305 }, {
304 .id = AT91CAP9_ID_PIOABCD, 306 .id = AT91CAP9_ID_PIOABCD,
305 .offset = AT91_PIOB, 307 .regbase = AT91CAP9_BASE_PIOB,
306 .clock = &pioABCD_clk,
307 }, { 308 }, {
308 .id = AT91CAP9_ID_PIOABCD, 309 .id = AT91CAP9_ID_PIOABCD,
309 .offset = AT91_PIOC, 310 .regbase = AT91CAP9_BASE_PIOC,
310 .clock = &pioABCD_clk,
311 }, { 311 }, {
312 .id = AT91CAP9_ID_PIOABCD, 312 .id = AT91CAP9_ID_PIOABCD,
313 .offset = AT91_PIOD, 313 .regbase = AT91CAP9_BASE_PIOD,
314 .clock = &pioABCD_clk,
315 } 314 }
316}; 315};
317 316
318static void at91cap9_reset(void) 317static void at91cap9_restart(char mode, const char *cmd)
319{ 318{
320 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 319 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
321} 320}
322 321
323static void at91cap9_poweroff(void)
324{
325 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
326}
327
328
329/* -------------------------------------------------------------------- 322/* --------------------------------------------------------------------
330 * AT91CAP9 processor initialization 323 * AT91CAP9 processor initialization
331 * -------------------------------------------------------------------- */ 324 * -------------------------------------------------------------------- */
@@ -335,10 +328,16 @@ static void __init at91cap9_map_io(void)
335 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); 328 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
336} 329}
337 330
331static void __init at91cap9_ioremap_registers(void)
332{
333 at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
334 at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
335 at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
336}
337
338static void __init at91cap9_initialize(void) 338static void __init at91cap9_initialize(void)
339{ 339{
340 at91_arch_reset = at91cap9_reset; 340 arm_pm_restart = at91cap9_restart;
341 pm_power_off = at91cap9_poweroff;
342 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 341 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
343 342
344 /* Register GPIO subsystem */ 343 /* Register GPIO subsystem */
@@ -396,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
396struct at91_init_soc __initdata at91cap9_soc = { 395struct at91_init_soc __initdata at91cap9_soc = {
397 .map_io = at91cap9_map_io, 396 .map_io = at91cap9_map_io,
398 .default_irq_priority = at91cap9_default_irq_priority, 397 .default_irq_priority = at91cap9_default_irq_priority,
398 .ioremap_registers = at91cap9_ioremap_registers,
399 .register_clocks = at91cap9_register_clocks, 399 .register_clocks = at91cap9_register_clocks,
400 .init = at91cap9_initialize, 400 .init = at91cap9_initialize,
401}; 401};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 695aecab0a67..d298fb7cb210 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
76 76
77 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
78 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
79 if (data->vbus_pin[i]) 79 if (gpio_is_valid(data->vbus_pin[i]))
80 at91_set_gpio_output(data->vbus_pin[i], 0); 80 at91_set_gpio_output(data->vbus_pin[i], 0);
81 } 81 }
82 82
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
181 181
182 if (data && data->vbus_pin > 0) { 182 if (data && gpio_is_valid(data->vbus_pin)) {
183 at91_set_gpio_input(data->vbus_pin, 0); 183 at91_set_gpio_input(data->vbus_pin, 0);
184 at91_set_deglitch(data->vbus_pin, 1); 184 at91_set_deglitch(data->vbus_pin, 1);
185 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 185 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -232,7 +232,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
232 if (!data) 232 if (!data)
233 return; 233 return;
234 234
235 if (data->phy_irq_pin) { 235 if (gpio_is_valid(data->phy_irq_pin)) {
236 at91_set_gpio_input(data->phy_irq_pin, 0); 236 at91_set_gpio_input(data->phy_irq_pin, 0);
237 at91_set_deglitch(data->phy_irq_pin, 1); 237 at91_set_deglitch(data->phy_irq_pin, 1);
238 } 238 }
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
332 return; 332 return;
333 333
334 /* input/irq */ 334 /* input/irq */
335 if (data->det_pin) { 335 if (gpio_is_valid(data->det_pin)) {
336 at91_set_gpio_input(data->det_pin, 1); 336 at91_set_gpio_input(data->det_pin, 1);
337 at91_set_deglitch(data->det_pin, 1); 337 at91_set_deglitch(data->det_pin, 1);
338 } 338 }
339 if (data->wp_pin) 339 if (gpio_is_valid(data->wp_pin))
340 at91_set_gpio_input(data->wp_pin, 1); 340 at91_set_gpio_input(data->wp_pin, 1);
341 if (data->vcc_pin) 341 if (gpio_is_valid(data->vcc_pin))
342 at91_set_gpio_output(data->vcc_pin, 0); 342 at91_set_gpio_output(data->vcc_pin, 0);
343 343
344 if (mmc_id == 0) { /* MCI0 */ 344 if (mmc_id == 0) { /* MCI0 */
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
398 .flags = IORESOURCE_MEM, 398 .flags = IORESOURCE_MEM,
399 }, 399 },
400 [1] = { 400 [1] = {
401 .start = AT91_BASE_SYS + AT91_ECC, 401 .start = AT91CAP9_BASE_ECC,
402 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 402 .end = AT91CAP9_BASE_ECC + SZ_512 - 1,
403 .flags = IORESOURCE_MEM, 403 .flags = IORESOURCE_MEM,
404 } 404 }
405}; 405};
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
426 426
427 /* enable pin */ 427 /* enable pin */
428 if (data->enable_pin) 428 if (gpio_is_valid(data->enable_pin))
429 at91_set_gpio_output(data->enable_pin, 1); 429 at91_set_gpio_output(data->enable_pin, 1);
430 430
431 /* ready/busy pin */ 431 /* ready/busy pin */
432 if (data->rdy_pin) 432 if (gpio_is_valid(data->rdy_pin))
433 at91_set_gpio_input(data->rdy_pin, 1); 433 at91_set_gpio_input(data->rdy_pin, 1);
434 434
435 /* card detect pin */ 435 /* card detect pin */
436 if (data->det_pin) 436 if (gpio_is_valid(data->det_pin))
437 at91_set_gpio_input(data->det_pin, 1); 437 at91_set_gpio_input(data->det_pin, 1);
438 438
439 nand_data = *data; 439 nand_data = *data;
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { }
670 670
671static struct resource rtt_resources[] = { 671static struct resource rtt_resources[] = {
672 { 672 {
673 .start = AT91_BASE_SYS + AT91_RTT, 673 .start = AT91CAP9_BASE_RTT,
674 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 674 .end = AT91CAP9_BASE_RTT + SZ_16 - 1,
675 .flags = IORESOURCE_MEM, 675 .flags = IORESOURCE_MEM,
676 } 676 }
677}; 677};
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void)
694 * -------------------------------------------------------------------- */ 694 * -------------------------------------------------------------------- */
695 695
696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
697static struct resource wdt_resources[] = {
698 {
699 .start = AT91CAP9_BASE_WDT,
700 .end = AT91CAP9_BASE_WDT + SZ_16 - 1,
701 .flags = IORESOURCE_MEM,
702 }
703};
704
697static struct platform_device at91cap9_wdt_device = { 705static struct platform_device at91cap9_wdt_device = {
698 .name = "at91_wdt", 706 .name = "at91_wdt",
699 .id = -1, 707 .id = -1,
700 .num_resources = 0, 708 .resource = wdt_resources,
709 .num_resources = ARRAY_SIZE(wdt_resources),
701}; 710};
702 711
703static void __init at91_add_device_watchdog(void) 712static void __init at91_add_device_watchdog(void)
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
807 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ 816 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
808 817
809 /* reset */ 818 /* reset */
810 if (data->reset_pin) 819 if (gpio_is_valid(data->reset_pin))
811 at91_set_gpio_output(data->reset_pin, 0); 820 at91_set_gpio_output(data->reset_pin, 0);
812 821
813 ac97_data = *data; 822 ac97_data = *data;
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1030#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1031static struct resource dbgu_resources[] = {
1023 [0] = { 1032 [0] = {
1024 .start = AT91_BASE_SYS + AT91_DBGU, 1033 .start = AT91CAP9_BASE_DBGU,
1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1034 .end = AT91CAP9_BASE_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1027 }, 1036 },
1028 [1] = { 1037 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 713d3bdbd284..99c3174e24a2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -23,6 +23,7 @@
23#include "soc.h" 23#include "soc.h"
24#include "generic.h" 24#include "generic.h"
25#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
26 27
27static struct map_desc at91rm9200_io_desc[] __initdata = { 28static struct map_desc at91rm9200_io_desc[] __initdata = {
28 { 29 {
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
195 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 196 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
196 /* fake hclk clock */ 197 /* fake hclk clock */
197 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 198 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
199 CLKDEV_CON_ID("pioA", &pioA_clk),
200 CLKDEV_CON_ID("pioB", &pioB_clk),
201 CLKDEV_CON_ID("pioC", &pioC_clk),
202 CLKDEV_CON_ID("pioD", &pioD_clk),
198}; 203};
199 204
200static struct clk_lookup usart_clocks_lookups[] = { 205static struct clk_lookup usart_clocks_lookups[] = {
@@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id)
268 * GPIO 273 * GPIO
269 * -------------------------------------------------------------------- */ 274 * -------------------------------------------------------------------- */
270 275
271static struct at91_gpio_bank at91rm9200_gpio[] = { 276static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
272 { 277 {
273 .id = AT91RM9200_ID_PIOA, 278 .id = AT91RM9200_ID_PIOA,
274 .offset = AT91_PIOA, 279 .regbase = AT91RM9200_BASE_PIOA,
275 .clock = &pioA_clk,
276 }, { 280 }, {
277 .id = AT91RM9200_ID_PIOB, 281 .id = AT91RM9200_ID_PIOB,
278 .offset = AT91_PIOB, 282 .regbase = AT91RM9200_BASE_PIOB,
279 .clock = &pioB_clk,
280 }, { 283 }, {
281 .id = AT91RM9200_ID_PIOC, 284 .id = AT91RM9200_ID_PIOC,
282 .offset = AT91_PIOC, 285 .regbase = AT91RM9200_BASE_PIOC,
283 .clock = &pioC_clk,
284 }, { 286 }, {
285 .id = AT91RM9200_ID_PIOD, 287 .id = AT91RM9200_ID_PIOD,
286 .offset = AT91_PIOD, 288 .regbase = AT91RM9200_BASE_PIOD,
287 .clock = &pioD_clk,
288 } 289 }
289}; 290};
290 291
291static void at91rm9200_reset(void) 292static void at91rm9200_restart(char mode, const char *cmd)
292{ 293{
293 /* 294 /*
294 * Perform a hardware reset with the use of the Watchdog timer. 295 * Perform a hardware reset with the use of the Watchdog timer.
@@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void)
307 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 308 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
308} 309}
309 310
311static void __init at91rm9200_ioremap_registers(void)
312{
313}
314
310static void __init at91rm9200_initialize(void) 315static void __init at91rm9200_initialize(void)
311{ 316{
312 at91_arch_reset = at91rm9200_reset; 317 arm_pm_restart = at91rm9200_restart;
313 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) 318 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
314 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) 319 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
315 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) 320 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
366struct at91_init_soc __initdata at91rm9200_soc = { 371struct at91_init_soc __initdata at91rm9200_soc = {
367 .map_io = at91rm9200_map_io, 372 .map_io = at91rm9200_map_io,
368 .default_irq_priority = at91rm9200_default_irq_priority, 373 .default_irq_priority = at91rm9200_default_irq_priority,
374 .ioremap_registers = at91rm9200_ioremap_registers,
369 .register_clocks = at91rm9200_register_clocks, 375 .register_clocks = at91rm9200_register_clocks,
370 .init = at91rm9200_initialize, 376 .init = at91rm9200_initialize,
371}; 377};
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 55d22911d0c2..18bacec2b094 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
114 if (!data) 114 if (!data)
115 return; 115 return;
116 116
117 if (data->vbus_pin) { 117 if (gpio_is_valid(data->vbus_pin)) {
118 at91_set_gpio_input(data->vbus_pin, 0); 118 at91_set_gpio_input(data->vbus_pin, 0);
119 at91_set_deglitch(data->vbus_pin, 1); 119 at91_set_deglitch(data->vbus_pin, 1);
120 } 120 }
121 if (data->pullup_pin) 121 if (gpio_is_valid(data->pullup_pin))
122 at91_set_gpio_output(data->pullup_pin, 0); 122 at91_set_gpio_output(data->pullup_pin, 0);
123 123
124 udc_data = *data; 124 udc_data = *data;
@@ -167,7 +167,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
167 if (!data) 167 if (!data)
168 return; 168 return;
169 169
170 if (data->phy_irq_pin) { 170 if (gpio_is_valid(data->phy_irq_pin)) {
171 at91_set_gpio_input(data->phy_irq_pin, 0); 171 at91_set_gpio_input(data->phy_irq_pin, 0);
172 at91_set_deglitch(data->phy_irq_pin, 1); 172 at91_set_deglitch(data->phy_irq_pin, 1);
173 } 173 }
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
260 ); 260 );
261 261
262 /* input/irq */ 262 /* input/irq */
263 if (data->irq_pin) { 263 if (gpio_is_valid(data->irq_pin)) {
264 at91_set_gpio_input(data->irq_pin, 1); 264 at91_set_gpio_input(data->irq_pin, 1);
265 at91_set_deglitch(data->irq_pin, 1); 265 at91_set_deglitch(data->irq_pin, 1);
266 } 266 }
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
268 at91_set_deglitch(data->det_pin, 1); 268 at91_set_deglitch(data->det_pin, 1);
269 269
270 /* outputs, initially off */ 270 /* outputs, initially off */
271 if (data->vcc_pin) 271 if (gpio_is_valid(data->vcc_pin))
272 at91_set_gpio_output(data->vcc_pin, 0); 272 at91_set_gpio_output(data->vcc_pin, 0);
273 at91_set_gpio_output(data->rst_pin, 0); 273 at91_set_gpio_output(data->rst_pin, 0);
274 274
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
328 return; 328 return;
329 329
330 /* input/irq */ 330 /* input/irq */
331 if (data->det_pin) { 331 if (gpio_is_valid(data->det_pin)) {
332 at91_set_gpio_input(data->det_pin, 1); 332 at91_set_gpio_input(data->det_pin, 1);
333 at91_set_deglitch(data->det_pin, 1); 333 at91_set_deglitch(data->det_pin, 1);
334 } 334 }
335 if (data->wp_pin) 335 if (gpio_is_valid(data->wp_pin))
336 at91_set_gpio_input(data->wp_pin, 1); 336 at91_set_gpio_input(data->wp_pin, 1);
337 if (data->vcc_pin) 337 if (gpio_is_valid(data->vcc_pin))
338 at91_set_gpio_output(data->vcc_pin, 0); 338 at91_set_gpio_output(data->vcc_pin, 0);
339 339
340 /* CLK */ 340 /* CLK */
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
419 ); 419 );
420 420
421 /* enable pin */ 421 /* enable pin */
422 if (data->enable_pin) 422 if (gpio_is_valid(data->enable_pin))
423 at91_set_gpio_output(data->enable_pin, 1); 423 at91_set_gpio_output(data->enable_pin, 1);
424 424
425 /* ready/busy pin */ 425 /* ready/busy pin */
426 if (data->rdy_pin) 426 if (gpio_is_valid(data->rdy_pin))
427 at91_set_gpio_input(data->rdy_pin, 1); 427 at91_set_gpio_input(data->rdy_pin, 1);
428 428
429 /* card detect pin */ 429 /* card detect pin */
430 if (data->det_pin) 430 if (gpio_is_valid(data->det_pin))
431 at91_set_gpio_input(data->det_pin, 1); 431 at91_set_gpio_input(data->det_pin, 1);
432 432
433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ 433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { }
665 * -------------------------------------------------------------------- */ 665 * -------------------------------------------------------------------- */
666 666
667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
668static struct resource rtc_resources[] = {
669 [0] = {
670 .start = AT91RM9200_BASE_RTC,
671 .end = AT91RM9200_BASE_RTC + SZ_256 - 1,
672 .flags = IORESOURCE_MEM,
673 },
674 [1] = {
675 .start = AT91_ID_SYS,
676 .end = AT91_ID_SYS,
677 .flags = IORESOURCE_IRQ,
678 },
679};
680
668static struct platform_device at91rm9200_rtc_device = { 681static struct platform_device at91rm9200_rtc_device = {
669 .name = "at91_rtc", 682 .name = "at91_rtc",
670 .id = -1, 683 .id = -1,
671 .num_resources = 0, 684 .resource = rtc_resources,
685 .num_resources = ARRAY_SIZE(rtc_resources),
672}; 686};
673 687
674static void __init at91_add_device_rtc(void) 688static void __init at91_add_device_rtc(void)
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 891#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 892static struct resource dbgu_resources[] = {
879 [0] = { 893 [0] = {
880 .start = AT91_BASE_SYS + AT91_DBGU, 894 .start = AT91RM9200_BASE_DBGU,
881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 895 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 896 .flags = IORESOURCE_MEM,
883 }, 897 },
884 [1] = { 898 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 1dd69c85dfec..a028cdf8f974 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -32,6 +32,8 @@ static unsigned long last_crtr;
32static u32 irqmask; 32static u32 irqmask;
33static struct clock_event_device clkevt; 33static struct clock_event_device clkevt;
34 34
35#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ)
36
35/* 37/*
36 * The ST_CRTR is updated asynchronously to the master clock ... but 38 * The ST_CRTR is updated asynchronously to the master clock ... but
37 * the updates as seen by the CPU don't seem to be strictly monotonic. 39 * the updates as seen by the CPU don't seem to be strictly monotonic.
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
74 if (sr & AT91_ST_PITS) { 76 if (sr & AT91_ST_PITS) {
75 u32 crtr = read_CRTR(); 77 u32 crtr = read_CRTR();
76 78
77 while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { 79 while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) {
78 last_crtr += LATCH; 80 last_crtr += RM9200_TIMER_LATCH;
79 clkevt.event_handler(&clkevt); 81 clkevt.event_handler(&clkevt);
80 } 82 }
81 return IRQ_HANDLED; 83 return IRQ_HANDLED;
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
116 case CLOCK_EVT_MODE_PERIODIC: 118 case CLOCK_EVT_MODE_PERIODIC:
117 /* PIT for periodic irqs; fixed rate of 1/HZ */ 119 /* PIT for periodic irqs; fixed rate of 1/HZ */
118 irqmask = AT91_ST_PITS; 120 irqmask = AT91_ST_PITS;
119 at91_sys_write(AT91_ST_PIMR, LATCH); 121 at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
120 break; 122 break;
121 case CLOCK_EVT_MODE_ONESHOT: 123 case CLOCK_EVT_MODE_ONESHOT:
122 /* ALM for oneshot irqs, set by next_event() 124 /* ALM for oneshot irqs, set by next_event()
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 1c945e3ba57c..5e46e4a96430 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -21,11 +20,11 @@
21#include <mach/at91sam9260.h> 20#include <mach/at91sam9260.h>
22#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
24#include <mach/at91_shdwc.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -211,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
211 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), 210 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
212 /* fake hclk clock */ 211 /* fake hclk clock */
213 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 212 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
213 CLKDEV_CON_ID("pioA", &pioA_clk),
214 CLKDEV_CON_ID("pioB", &pioB_clk),
215 CLKDEV_CON_ID("pioC", &pioC_clk),
214}; 216};
215 217
216static struct clk_lookup usart_clocks_lookups[] = { 218static struct clk_lookup usart_clocks_lookups[] = {
@@ -272,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id)
272 * GPIO 274 * GPIO
273 * -------------------------------------------------------------------- */ 275 * -------------------------------------------------------------------- */
274 276
275static struct at91_gpio_bank at91sam9260_gpio[] = { 277static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
276 { 278 {
277 .id = AT91SAM9260_ID_PIOA, 279 .id = AT91SAM9260_ID_PIOA,
278 .offset = AT91_PIOA, 280 .regbase = AT91SAM9260_BASE_PIOA,
279 .clock = &pioA_clk,
280 }, { 281 }, {
281 .id = AT91SAM9260_ID_PIOB, 282 .id = AT91SAM9260_ID_PIOB,
282 .offset = AT91_PIOB, 283 .regbase = AT91SAM9260_BASE_PIOB,
283 .clock = &pioB_clk,
284 }, { 284 }, {
285 .id = AT91SAM9260_ID_PIOC, 285 .id = AT91SAM9260_ID_PIOC,
286 .offset = AT91_PIOC, 286 .regbase = AT91SAM9260_BASE_PIOC,
287 .clock = &pioC_clk,
288 } 287 }
289}; 288};
290 289
291static void at91sam9260_poweroff(void)
292{
293 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
294}
295
296
297/* -------------------------------------------------------------------- 290/* --------------------------------------------------------------------
298 * AT91SAM9260 processor initialization 291 * AT91SAM9260 processor initialization
299 * -------------------------------------------------------------------- */ 292 * -------------------------------------------------------------------- */
@@ -327,10 +320,16 @@ static void __init at91sam9260_map_io(void)
327 } 320 }
328} 321}
329 322
323static void __init at91sam9260_ioremap_registers(void)
324{
325 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
326 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
327 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
328}
329
330static void __init at91sam9260_initialize(void) 330static void __init at91sam9260_initialize(void)
331{ 331{
332 at91_arch_reset = at91sam9_alt_reset; 332 arm_pm_restart = at91sam9_alt_restart;
333 pm_power_off = at91sam9260_poweroff;
334 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 333 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
335 | (1 << AT91SAM9260_ID_IRQ2); 334 | (1 << AT91SAM9260_ID_IRQ2);
336 335
@@ -383,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
383struct at91_init_soc __initdata at91sam9260_soc = { 382struct at91_init_soc __initdata at91sam9260_soc = {
384 .map_io = at91sam9260_map_io, 383 .map_io = at91sam9260_map_io,
385 .default_irq_priority = at91sam9260_default_irq_priority, 384 .default_irq_priority = at91sam9260_default_irq_priority,
385 .ioremap_registers = at91sam9260_ioremap_registers,
386 .register_clocks = at91sam9260_register_clocks, 386 .register_clocks = at91sam9260_register_clocks,
387 .init = at91sam9260_initialize, 387 .init = at91sam9260_initialize,
388}; 388};
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index b1a4812d9965..642ccb6d26b2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
115 if (!data) 115 if (!data)
116 return; 116 return;
117 117
118 if (data->vbus_pin) { 118 if (gpio_is_valid(data->vbus_pin)) {
119 at91_set_gpio_input(data->vbus_pin, 0); 119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1); 120 at91_set_deglitch(data->vbus_pin, 1);
121 } 121 }
@@ -168,7 +168,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
168 if (!data) 168 if (!data)
169 return; 169 return;
170 170
171 if (data->phy_irq_pin) { 171 if (gpio_is_valid(data->phy_irq_pin)) {
172 at91_set_gpio_input(data->phy_irq_pin, 0); 172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1); 173 at91_set_deglitch(data->phy_irq_pin, 1);
174 } 174 }
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
243 return; 243 return;
244 244
245 /* input/irq */ 245 /* input/irq */
246 if (data->det_pin) { 246 if (gpio_is_valid(data->det_pin)) {
247 at91_set_gpio_input(data->det_pin, 1); 247 at91_set_gpio_input(data->det_pin, 1);
248 at91_set_deglitch(data->det_pin, 1); 248 at91_set_deglitch(data->det_pin, 1);
249 } 249 }
250 if (data->wp_pin) 250 if (gpio_is_valid(data->wp_pin))
251 at91_set_gpio_input(data->wp_pin, 1); 251 at91_set_gpio_input(data->wp_pin, 1);
252 if (data->vcc_pin) 252 if (gpio_is_valid(data->vcc_pin))
253 at91_set_gpio_output(data->vcc_pin, 0); 253 at91_set_gpio_output(data->vcc_pin, 0);
254 254
255 /* CLK */ 255 /* CLK */
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
331 if (data->slot[i].bus_width) { 331 if (data->slot[i].bus_width) {
332 /* input/irq */ 332 /* input/irq */
333 if (data->slot[i].detect_pin) { 333 if (gpio_is_valid(data->slot[i].detect_pin)) {
334 at91_set_gpio_input(data->slot[i].detect_pin, 1); 334 at91_set_gpio_input(data->slot[i].detect_pin, 1);
335 at91_set_deglitch(data->slot[i].detect_pin, 1); 335 at91_set_deglitch(data->slot[i].detect_pin, 1);
336 } 336 }
337 if (data->slot[i].wp_pin) 337 if (gpio_is_valid(data->slot[i].wp_pin))
338 at91_set_gpio_input(data->slot[i].wp_pin, 1); 338 at91_set_gpio_input(data->slot[i].wp_pin, 1);
339 339
340 switch (i) { 340 switch (i) {
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = {
399 .flags = IORESOURCE_MEM, 399 .flags = IORESOURCE_MEM,
400 }, 400 },
401 [1] = { 401 [1] = {
402 .start = AT91_BASE_SYS + AT91_ECC, 402 .start = AT91SAM9260_BASE_ECC,
403 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 403 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
404 .flags = IORESOURCE_MEM, 404 .flags = IORESOURCE_MEM,
405 } 405 }
406}; 406};
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
427 427
428 /* enable pin */ 428 /* enable pin */
429 if (data->enable_pin) 429 if (gpio_is_valid(data->enable_pin))
430 at91_set_gpio_output(data->enable_pin, 1); 430 at91_set_gpio_output(data->enable_pin, 1);
431 431
432 /* ready/busy pin */ 432 /* ready/busy pin */
433 if (data->rdy_pin) 433 if (gpio_is_valid(data->rdy_pin))
434 at91_set_gpio_input(data->rdy_pin, 1); 434 at91_set_gpio_input(data->rdy_pin, 1);
435 435
436 /* card detect pin */ 436 /* card detect pin */
437 if (data->det_pin) 437 if (gpio_is_valid(data->det_pin))
438 at91_set_gpio_input(data->det_pin, 1); 438 at91_set_gpio_input(data->det_pin, 1);
439 439
440 nand_data = *data; 440 nand_data = *data;
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { }
714 714
715static struct resource rtt_resources[] = { 715static struct resource rtt_resources[] = {
716 { 716 {
717 .start = AT91_BASE_SYS + AT91_RTT, 717 .start = AT91SAM9260_BASE_RTT,
718 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 718 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
719 .flags = IORESOURCE_MEM, 719 .flags = IORESOURCE_MEM,
720 } 720 }
721}; 721};
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void)
738 * -------------------------------------------------------------------- */ 738 * -------------------------------------------------------------------- */
739 739
740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
741static struct resource wdt_resources[] = {
742 {
743 .start = AT91SAM9260_BASE_WDT,
744 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
745 .flags = IORESOURCE_MEM,
746 }
747};
748
741static struct platform_device at91sam9260_wdt_device = { 749static struct platform_device at91sam9260_wdt_device = {
742 .name = "at91_wdt", 750 .name = "at91_wdt",
743 .id = -1, 751 .id = -1,
744 .num_resources = 0, 752 .resource = wdt_resources,
753 .num_resources = ARRAY_SIZE(wdt_resources),
745}; 754};
746 755
747static void __init at91_add_device_watchdog(void) 756static void __init at91_add_device_watchdog(void)
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 846#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 847static struct resource dbgu_resources[] = {
839 [0] = { 848 [0] = {
840 .start = AT91_BASE_SYS + AT91_DBGU, 849 .start = AT91SAM9260_BASE_DBGU,
841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 850 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 851 .flags = IORESOURCE_MEM,
843 }, 852 },
844 [1] = { 853 [1] = {
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
1281 1290
1282 at91_sys_write(AT91_MATRIX_EBICSA, csa); 1291 at91_sys_write(AT91_MATRIX_EBICSA, csa);
1283 1292
1284 if (data->rst_pin) { 1293 if (gpio_is_valid(data->rst_pin)) {
1285 at91_set_multi_drive(data->rst_pin, 0); 1294 at91_set_multi_drive(data->rst_pin, 0);
1286 at91_set_gpio_output(data->rst_pin, 1); 1295 at91_set_gpio_output(data->rst_pin, 1);
1287 } 1296 }
1288 1297
1289 if (data->irq_pin) { 1298 if (gpio_is_valid(data->irq_pin)) {
1290 at91_set_gpio_input(data->irq_pin, 0); 1299 at91_set_gpio_input(data->irq_pin, 0);
1291 at91_set_deglitch(data->irq_pin, 1); 1300 at91_set_deglitch(data->irq_pin, 1);
1292 } 1301 }
1293 1302
1294 if (data->det_pin) { 1303 if (gpio_is_valid(data->det_pin)) {
1295 at91_set_gpio_input(data->det_pin, 0); 1304 at91_set_gpio_input(data->det_pin, 0);
1296 at91_set_deglitch(data->det_pin, 1); 1305 at91_set_deglitch(data->det_pin, 1);
1297 } 1306 }
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 658a5185abfd..b85b9ea60170 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9261.h> 19#include <mach/at91sam9261.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
176 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 175 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
177 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 176 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
178 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), 177 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
178 CLKDEV_CON_ID("pioA", &pioA_clk),
179 CLKDEV_CON_ID("pioB", &pioB_clk),
180 CLKDEV_CON_ID("pioC", &pioC_clk),
179}; 181};
180 182
181static struct clk_lookup usart_clocks_lookups[] = { 183static struct clk_lookup usart_clocks_lookups[] = {
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id)
251 * GPIO 253 * GPIO
252 * -------------------------------------------------------------------- */ 254 * -------------------------------------------------------------------- */
253 255
254static struct at91_gpio_bank at91sam9261_gpio[] = { 256static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
255 { 257 {
256 .id = AT91SAM9261_ID_PIOA, 258 .id = AT91SAM9261_ID_PIOA,
257 .offset = AT91_PIOA, 259 .regbase = AT91SAM9261_BASE_PIOA,
258 .clock = &pioA_clk,
259 }, { 260 }, {
260 .id = AT91SAM9261_ID_PIOB, 261 .id = AT91SAM9261_ID_PIOB,
261 .offset = AT91_PIOB, 262 .regbase = AT91SAM9261_BASE_PIOB,
262 .clock = &pioB_clk,
263 }, { 263 }, {
264 .id = AT91SAM9261_ID_PIOC, 264 .id = AT91SAM9261_ID_PIOC,
265 .offset = AT91_PIOC, 265 .regbase = AT91SAM9261_BASE_PIOC,
266 .clock = &pioC_clk,
267 } 266 }
268}; 267};
269 268
270static void at91sam9261_poweroff(void)
271{
272 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
273}
274
275
276/* -------------------------------------------------------------------- 269/* --------------------------------------------------------------------
277 * AT91SAM9261 processor initialization 270 * AT91SAM9261 processor initialization
278 * -------------------------------------------------------------------- */ 271 * -------------------------------------------------------------------- */
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void)
285 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 278 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
286} 279}
287 280
281static void __init at91sam9261_ioremap_registers(void)
282{
283 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
284 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
285 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
286}
287
288static void __init at91sam9261_initialize(void) 288static void __init at91sam9261_initialize(void)
289{ 289{
290 at91_arch_reset = at91sam9_alt_reset; 290 arm_pm_restart = at91sam9_alt_restart;
291 pm_power_off = at91sam9261_poweroff;
292 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
293 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
294 293
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
341struct at91_init_soc __initdata at91sam9261_soc = { 340struct at91_init_soc __initdata at91sam9261_soc = {
342 .map_io = at91sam9261_map_io, 341 .map_io = at91sam9261_map_io,
343 .default_irq_priority = at91sam9261_default_irq_priority, 342 .default_irq_priority = at91sam9261_default_irq_priority,
343 .ioremap_registers = at91sam9261_ioremap_registers,
344 .register_clocks = at91sam9261_register_clocks, 344 .register_clocks = at91sam9261_register_clocks,
345 .init = at91sam9261_initialize, 345 .init = at91sam9261_initialize,
346}; 346};
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index a178b58b0b9c..fc59cbdb0e3c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
118 if (!data) 118 if (!data)
119 return; 119 return;
120 120
121 if (data->vbus_pin) { 121 if (gpio_is_valid(data->vbus_pin)) {
122 at91_set_gpio_input(data->vbus_pin, 0); 122 at91_set_gpio_input(data->vbus_pin, 0);
123 at91_set_deglitch(data->vbus_pin, 1); 123 at91_set_deglitch(data->vbus_pin, 1);
124 } 124 }
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
171 return; 171 return;
172 172
173 /* input/irq */ 173 /* input/irq */
174 if (data->det_pin) { 174 if (gpio_is_valid(data->det_pin)) {
175 at91_set_gpio_input(data->det_pin, 1); 175 at91_set_gpio_input(data->det_pin, 1);
176 at91_set_deglitch(data->det_pin, 1); 176 at91_set_deglitch(data->det_pin, 1);
177 } 177 }
178 if (data->wp_pin) 178 if (gpio_is_valid(data->wp_pin))
179 at91_set_gpio_input(data->wp_pin, 1); 179 at91_set_gpio_input(data->wp_pin, 1);
180 if (data->vcc_pin) 180 if (gpio_is_valid(data->vcc_pin))
181 at91_set_gpio_output(data->vcc_pin, 0); 181 at91_set_gpio_output(data->vcc_pin, 0);
182 182
183 /* CLK */ 183 /* CLK */
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
241 241
242 /* enable pin */ 242 /* enable pin */
243 if (data->enable_pin) 243 if (gpio_is_valid(data->enable_pin))
244 at91_set_gpio_output(data->enable_pin, 1); 244 at91_set_gpio_output(data->enable_pin, 1);
245 245
246 /* ready/busy pin */ 246 /* ready/busy pin */
247 if (data->rdy_pin) 247 if (gpio_is_valid(data->rdy_pin))
248 at91_set_gpio_input(data->rdy_pin, 1); 248 at91_set_gpio_input(data->rdy_pin, 1);
249 249
250 /* card detect pin */ 250 /* card detect pin */
251 if (data->det_pin) 251 if (gpio_is_valid(data->det_pin))
252 at91_set_gpio_input(data->det_pin, 1); 252 at91_set_gpio_input(data->det_pin, 1);
253 253
254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ 254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { }
600 600
601static struct resource rtt_resources[] = { 601static struct resource rtt_resources[] = {
602 { 602 {
603 .start = AT91_BASE_SYS + AT91_RTT, 603 .start = AT91SAM9261_BASE_RTT,
604 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 604 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
605 .flags = IORESOURCE_MEM, 605 .flags = IORESOURCE_MEM,
606 } 606 }
607}; 607};
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void)
624 * -------------------------------------------------------------------- */ 624 * -------------------------------------------------------------------- */
625 625
626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
627static struct resource wdt_resources[] = {
628 {
629 .start = AT91SAM9261_BASE_WDT,
630 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
631 .flags = IORESOURCE_MEM,
632 }
633};
634
627static struct platform_device at91sam9261_wdt_device = { 635static struct platform_device at91sam9261_wdt_device = {
628 .name = "at91_wdt", 636 .name = "at91_wdt",
629 .id = -1, 637 .id = -1,
630 .num_resources = 0, 638 .resource = wdt_resources,
639 .num_resources = ARRAY_SIZE(wdt_resources),
631}; 640};
632 641
633static void __init at91_add_device_watchdog(void) 642static void __init at91_add_device_watchdog(void)
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 825#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 826static struct resource dbgu_resources[] = {
818 [0] = { 827 [0] = {
819 .start = AT91_BASE_SYS + AT91_DBGU, 828 .start = AT91SAM9261_BASE_DBGU,
820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 829 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 830 .flags = IORESOURCE_MEM,
822 }, 831 },
823 [1] = { 832 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 182d112dc59d..79e3669b1117 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -19,11 +18,11 @@
19#include <mach/at91sam9263.h> 18#include <mach/at91sam9263.h>
20#include <mach/at91_pmc.h> 19#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 20#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h>
23 21
24#include "soc.h" 22#include "soc.h"
25#include "generic.h" 23#include "generic.h"
26#include "clock.h" 24#include "clock.h"
25#include "sam9_smc.h"
27 26
28/* -------------------------------------------------------------------- 27/* --------------------------------------------------------------------
29 * Clocks 28 * Clocks
@@ -193,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
193 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), 192 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
194 /* fake hclk clock */ 193 /* fake hclk clock */
195 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 194 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
195 CLKDEV_CON_ID("pioA", &pioA_clk),
196 CLKDEV_CON_ID("pioB", &pioB_clk),
197 CLKDEV_CON_ID("pioC", &pioCDE_clk),
198 CLKDEV_CON_ID("pioD", &pioCDE_clk),
199 CLKDEV_CON_ID("pioE", &pioCDE_clk),
196}; 200};
197 201
198static struct clk_lookup usart_clocks_lookups[] = { 202static struct clk_lookup usart_clocks_lookups[] = {
@@ -265,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id)
265 * GPIO 269 * GPIO
266 * -------------------------------------------------------------------- */ 270 * -------------------------------------------------------------------- */
267 271
268static struct at91_gpio_bank at91sam9263_gpio[] = { 272static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
269 { 273 {
270 .id = AT91SAM9263_ID_PIOA, 274 .id = AT91SAM9263_ID_PIOA,
271 .offset = AT91_PIOA, 275 .regbase = AT91SAM9263_BASE_PIOA,
272 .clock = &pioA_clk,
273 }, { 276 }, {
274 .id = AT91SAM9263_ID_PIOB, 277 .id = AT91SAM9263_ID_PIOB,
275 .offset = AT91_PIOB, 278 .regbase = AT91SAM9263_BASE_PIOB,
276 .clock = &pioB_clk,
277 }, { 279 }, {
278 .id = AT91SAM9263_ID_PIOCDE, 280 .id = AT91SAM9263_ID_PIOCDE,
279 .offset = AT91_PIOC, 281 .regbase = AT91SAM9263_BASE_PIOC,
280 .clock = &pioCDE_clk,
281 }, { 282 }, {
282 .id = AT91SAM9263_ID_PIOCDE, 283 .id = AT91SAM9263_ID_PIOCDE,
283 .offset = AT91_PIOD, 284 .regbase = AT91SAM9263_BASE_PIOD,
284 .clock = &pioCDE_clk,
285 }, { 285 }, {
286 .id = AT91SAM9263_ID_PIOCDE, 286 .id = AT91SAM9263_ID_PIOCDE,
287 .offset = AT91_PIOE, 287 .regbase = AT91SAM9263_BASE_PIOE,
288 .clock = &pioCDE_clk,
289 } 288 }
290}; 289};
291 290
292static void at91sam9263_poweroff(void)
293{
294 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
295}
296
297
298/* -------------------------------------------------------------------- 291/* --------------------------------------------------------------------
299 * AT91SAM9263 processor initialization 292 * AT91SAM9263 processor initialization
300 * -------------------------------------------------------------------- */ 293 * -------------------------------------------------------------------- */
@@ -305,10 +298,17 @@ static void __init at91sam9263_map_io(void)
305 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); 298 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
306} 299}
307 300
301static void __init at91sam9263_ioremap_registers(void)
302{
303 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
304 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
305 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
306 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
307}
308
308static void __init at91sam9263_initialize(void) 309static void __init at91sam9263_initialize(void)
309{ 310{
310 at91_arch_reset = at91sam9_alt_reset; 311 arm_pm_restart = at91sam9_alt_restart;
311 pm_power_off = at91sam9263_poweroff;
312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
313 313
314 /* Register GPIO subsystem */ 314 /* Register GPIO subsystem */
@@ -360,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
360struct at91_init_soc __initdata at91sam9263_soc = { 360struct at91_init_soc __initdata at91sam9263_soc = {
361 .map_io = at91sam9263_map_io, 361 .map_io = at91sam9263_map_io,
362 .default_irq_priority = at91sam9263_default_irq_priority, 362 .default_irq_priority = at91sam9263_default_irq_priority,
363 .ioremap_registers = at91sam9263_ioremap_registers,
363 .register_clocks = at91sam9263_register_clocks, 364 .register_clocks = at91sam9263_register_clocks,
364 .init = at91sam9263_initialize, 365 .init = at91sam9263_initialize,
365}; 366};
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 183b5f17f55e..7b46b2787022 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 70
71 /* Enable VBus control for UHP ports */ 71 /* Enable VBus control for UHP ports */
72 for (i = 0; i < data->ports; i++) { 72 for (i = 0; i < data->ports; i++) {
73 if (data->vbus_pin[i]) 73 if (gpio_is_valid(data->vbus_pin[i]))
74 at91_set_gpio_output(data->vbus_pin[i], 0); 74 at91_set_gpio_output(data->vbus_pin[i], 0);
75 } 75 }
76 76
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
123 if (!data) 123 if (!data)
124 return; 124 return;
125 125
126 if (data->vbus_pin) { 126 if (gpio_is_valid(data->vbus_pin)) {
127 at91_set_gpio_input(data->vbus_pin, 0); 127 at91_set_gpio_input(data->vbus_pin, 0);
128 at91_set_deglitch(data->vbus_pin, 1); 128 at91_set_deglitch(data->vbus_pin, 1);
129 } 129 }
@@ -176,7 +176,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
176 if (!data) 176 if (!data)
177 return; 177 return;
178 178
179 if (data->phy_irq_pin) { 179 if (gpio_is_valid(data->phy_irq_pin)) {
180 at91_set_gpio_input(data->phy_irq_pin, 0); 180 at91_set_gpio_input(data->phy_irq_pin, 0);
181 at91_set_deglitch(data->phy_irq_pin, 1); 181 at91_set_deglitch(data->phy_irq_pin, 1);
182 } 182 }
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
276 return; 276 return;
277 277
278 /* input/irq */ 278 /* input/irq */
279 if (data->det_pin) { 279 if (gpio_is_valid(data->det_pin)) {
280 at91_set_gpio_input(data->det_pin, 1); 280 at91_set_gpio_input(data->det_pin, 1);
281 at91_set_deglitch(data->det_pin, 1); 281 at91_set_deglitch(data->det_pin, 1);
282 } 282 }
283 if (data->wp_pin) 283 if (gpio_is_valid(data->wp_pin))
284 at91_set_gpio_input(data->wp_pin, 1); 284 at91_set_gpio_input(data->wp_pin, 1);
285 if (data->vcc_pin) 285 if (gpio_is_valid(data->vcc_pin))
286 at91_set_gpio_output(data->vcc_pin, 0); 286 at91_set_gpio_output(data->vcc_pin, 0);
287 287
288 if (mmc_id == 0) { /* MCI0 */ 288 if (mmc_id == 0) { /* MCI0 */
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
430 } 430 }
431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); 431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
432 432
433 if (data->det_pin) { 433 if (gpio_is_valid(data->det_pin)) {
434 at91_set_gpio_input(data->det_pin, 1); 434 at91_set_gpio_input(data->det_pin, 1);
435 at91_set_deglitch(data->det_pin, 1); 435 at91_set_deglitch(data->det_pin, 1);
436 } 436 }
437 437
438 if (data->irq_pin) { 438 if (gpio_is_valid(data->irq_pin)) {
439 at91_set_gpio_input(data->irq_pin, 1); 439 at91_set_gpio_input(data->irq_pin, 1);
440 at91_set_deglitch(data->irq_pin, 1); 440 at91_set_deglitch(data->irq_pin, 1);
441 } 441 }
442 442
443 if (data->vcc_pin) 443 if (gpio_is_valid(data->vcc_pin))
444 /* initially off */ 444 /* initially off */
445 at91_set_gpio_output(data->vcc_pin, 0); 445 at91_set_gpio_output(data->vcc_pin, 0);
446 446
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = {
473 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
474 }, 474 },
475 [1] = { 475 [1] = {
476 .start = AT91_BASE_SYS + AT91_ECC0, 476 .start = AT91SAM9263_BASE_ECC0,
477 .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, 477 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
478 .flags = IORESOURCE_MEM, 478 .flags = IORESOURCE_MEM,
479 } 479 }
480}; 480};
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
501 501
502 /* enable pin */ 502 /* enable pin */
503 if (data->enable_pin) 503 if (gpio_is_valid(data->enable_pin))
504 at91_set_gpio_output(data->enable_pin, 1); 504 at91_set_gpio_output(data->enable_pin, 1);
505 505
506 /* ready/busy pin */ 506 /* ready/busy pin */
507 if (data->rdy_pin) 507 if (gpio_is_valid(data->rdy_pin))
508 at91_set_gpio_input(data->rdy_pin, 1); 508 at91_set_gpio_input(data->rdy_pin, 1);
509 509
510 /* card detect pin */ 510 /* card detect pin */
511 if (data->det_pin) 511 if (gpio_is_valid(data->det_pin))
512 at91_set_gpio_input(data->det_pin, 1); 512 at91_set_gpio_input(data->det_pin, 1);
513 513
514 nand_data = *data; 514 nand_data = *data;
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ 749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
750 750
751 /* reset */ 751 /* reset */
752 if (data->reset_pin) 752 if (gpio_is_valid(data->reset_pin))
753 at91_set_gpio_output(data->reset_pin, 0); 753 at91_set_gpio_output(data->reset_pin, 0);
754 754
755 ac97_data = *data; 755 ac97_data = *data;
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { }
956 956
957static struct resource rtt0_resources[] = { 957static struct resource rtt0_resources[] = {
958 { 958 {
959 .start = AT91_BASE_SYS + AT91_RTT0, 959 .start = AT91SAM9263_BASE_RTT0,
960 .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, 960 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
961 .flags = IORESOURCE_MEM, 961 .flags = IORESOURCE_MEM,
962 } 962 }
963}; 963};
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = {
971 971
972static struct resource rtt1_resources[] = { 972static struct resource rtt1_resources[] = {
973 { 973 {
974 .start = AT91_BASE_SYS + AT91_RTT1, 974 .start = AT91SAM9263_BASE_RTT1,
975 .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, 975 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
976 .flags = IORESOURCE_MEM, 976 .flags = IORESOURCE_MEM,
977 } 977 }
978}; 978};
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void)
996 * -------------------------------------------------------------------- */ 996 * -------------------------------------------------------------------- */
997 997
998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
999static struct resource wdt_resources[] = {
1000 {
1001 .start = AT91SAM9263_BASE_WDT,
1002 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1003 .flags = IORESOURCE_MEM,
1004 }
1005};
1006
999static struct platform_device at91sam9263_wdt_device = { 1007static struct platform_device at91sam9263_wdt_device = {
1000 .name = "at91_wdt", 1008 .name = "at91_wdt",
1001 .id = -1, 1009 .id = -1,
1002 .num_resources = 0, 1010 .resource = wdt_resources,
1011 .num_resources = ARRAY_SIZE(wdt_resources),
1003}; 1012};
1004 1013
1005static void __init at91_add_device_watchdog(void) 1014static void __init at91_add_device_watchdog(void)
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1205
1197static struct resource dbgu_resources[] = { 1206static struct resource dbgu_resources[] = {
1198 [0] = { 1207 [0] = {
1199 .start = AT91_BASE_SYS + AT91_DBGU, 1208 .start = AT91SAM9263_BASE_DBGU,
1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1209 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1210 .flags = IORESOURCE_MEM,
1202 }, 1211 },
1203 [1] = { 1212 [1] = {
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4ba85499fa97..d89ead740a99 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -25,7 +25,17 @@
25 25
26static u32 pit_cycle; /* write-once */ 26static u32 pit_cycle; /* write-once */
27static u32 pit_cnt; /* access only w/system irq blocked */ 27static u32 pit_cnt; /* access only w/system irq blocked */
28static void __iomem *pit_base_addr __read_mostly;
28 29
30static inline unsigned int pit_read(unsigned int reg_offset)
31{
32 return __raw_readl(pit_base_addr + reg_offset);
33}
34
35static inline void pit_write(unsigned int reg_offset, unsigned long value)
36{
37 __raw_writel(value, pit_base_addr + reg_offset);
38}
29 39
30/* 40/*
31 * Clocksource: just a monotonic counter of MCK/16 cycles. 41 * Clocksource: just a monotonic counter of MCK/16 cycles.
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs)
39 49
40 raw_local_irq_save(flags); 50 raw_local_irq_save(flags);
41 elapsed = pit_cnt; 51 elapsed = pit_cnt;
42 t = at91_sys_read(AT91_PIT_PIIR); 52 t = pit_read(AT91_PIT_PIIR);
43 raw_local_irq_restore(flags); 53 raw_local_irq_restore(flags);
44 54
45 elapsed += PIT_PICNT(t) * pit_cycle; 55 elapsed += PIT_PICNT(t) * pit_cycle;
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
64 switch (mode) { 74 switch (mode) {
65 case CLOCK_EVT_MODE_PERIODIC: 75 case CLOCK_EVT_MODE_PERIODIC:
66 /* update clocksource counter */ 76 /* update clocksource counter */
67 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 77 pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
68 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN 78 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
69 | AT91_PIT_PITIEN); 79 | AT91_PIT_PITIEN);
70 break; 80 break;
71 case CLOCK_EVT_MODE_ONESHOT: 81 case CLOCK_EVT_MODE_ONESHOT:
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
74 case CLOCK_EVT_MODE_SHUTDOWN: 84 case CLOCK_EVT_MODE_SHUTDOWN:
75 case CLOCK_EVT_MODE_UNUSED: 85 case CLOCK_EVT_MODE_UNUSED:
76 /* disable irq, leaving the clocksource active */ 86 /* disable irq, leaving the clocksource active */
77 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 87 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
78 break; 88 break;
79 case CLOCK_EVT_MODE_RESUME: 89 case CLOCK_EVT_MODE_RESUME:
80 break; 90 break;
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
103 113
104 /* The PIT interrupt may be disabled, and is shared */ 114 /* The PIT interrupt may be disabled, and is shared */
105 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) 115 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
106 && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { 116 && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
107 unsigned nr_ticks; 117 unsigned nr_ticks;
108 118
109 /* Get number of ticks performed before irq, and ack it */ 119 /* Get number of ticks performed before irq, and ack it */
110 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 120 nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
111 do { 121 do {
112 pit_cnt += pit_cycle; 122 pit_cnt += pit_cycle;
113 pit_clkevt.event_handler(&pit_clkevt); 123 pit_clkevt.event_handler(&pit_clkevt);
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = {
129static void at91sam926x_pit_reset(void) 139static void at91sam926x_pit_reset(void)
130{ 140{
131 /* Disable timer and irqs */ 141 /* Disable timer and irqs */
132 at91_sys_write(AT91_PIT_MR, 0); 142 pit_write(AT91_PIT_MR, 0);
133 143
134 /* Clear any pending interrupts, wait for PIT to stop counting */ 144 /* Clear any pending interrupts, wait for PIT to stop counting */
135 while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) 145 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
136 cpu_relax(); 146 cpu_relax();
137 147
138 /* Start PIT but don't enable IRQ */ 148 /* Start PIT but don't enable IRQ */
139 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 149 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
140} 150}
141 151
142/* 152/*
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void)
178static void at91sam926x_pit_suspend(void) 188static void at91sam926x_pit_suspend(void)
179{ 189{
180 /* Disable timer */ 190 /* Disable timer */
181 at91_sys_write(AT91_PIT_MR, 0); 191 pit_write(AT91_PIT_MR, 0);
192}
193
194void __init at91sam926x_ioremap_pit(u32 addr)
195{
196 pit_base_addr = ioremap(addr, 16);
197
198 if (!pit_base_addr)
199 panic("Impossible to ioremap PIT\n");
182} 200}
183 201
184struct sys_timer at91sam926x_timer = { 202struct sys_timer at91sam926x_timer = {
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index e0256deb91fb..d3f931c5942e 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,20 +14,15 @@
14 */ 14 */
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/system.h>
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/at91sam9_sdramc.h> 18#include <mach/at91sam9_sdramc.h>
20#include <mach/at91_rstc.h> 19#include <mach/at91_rstc.h>
21 20
22 .arm 21 .arm
23 22
24 .globl at91sam9_alt_reset 23 .globl at91sam9_alt_restart
25 24
26at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 25at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
27 orr r0, r0, #CR_I
28 mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
29
30 ldr r0, .at91_va_base_sdramc @ preload constants
31 ldr r1, .at91_va_base_rstc_cr 26 ldr r1, .at91_va_base_rstc_cr
32 27
33 mov r2, #1 28 mov r2, #1
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 5a0e522ffa94..7032dd32cdf0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
16 15
17#include <asm/irq.h> 16#include <asm/irq.h>
@@ -20,12 +19,12 @@
20#include <mach/at91sam9g45.h> 19#include <mach/at91sam9g45.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24#include <mach/cpu.h> 22#include <mach/cpu.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -233,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
233 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), 232 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
234 /* fake hclk clock */ 233 /* fake hclk clock */
235 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 234 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
235 CLKDEV_CON_ID("pioA", &pioA_clk),
236 CLKDEV_CON_ID("pioB", &pioB_clk),
237 CLKDEV_CON_ID("pioC", &pioC_clk),
238 CLKDEV_CON_ID("pioD", &pioDE_clk),
239 CLKDEV_CON_ID("pioE", &pioDE_clk),
236}; 240};
237 241
238static struct clk_lookup usart_clocks_lookups[] = { 242static struct clk_lookup usart_clocks_lookups[] = {
@@ -295,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id)
295 * GPIO 299 * GPIO
296 * -------------------------------------------------------------------- */ 300 * -------------------------------------------------------------------- */
297 301
298static struct at91_gpio_bank at91sam9g45_gpio[] = { 302static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
299 { 303 {
300 .id = AT91SAM9G45_ID_PIOA, 304 .id = AT91SAM9G45_ID_PIOA,
301 .offset = AT91_PIOA, 305 .regbase = AT91SAM9G45_BASE_PIOA,
302 .clock = &pioA_clk,
303 }, { 306 }, {
304 .id = AT91SAM9G45_ID_PIOB, 307 .id = AT91SAM9G45_ID_PIOB,
305 .offset = AT91_PIOB, 308 .regbase = AT91SAM9G45_BASE_PIOB,
306 .clock = &pioB_clk,
307 }, { 309 }, {
308 .id = AT91SAM9G45_ID_PIOC, 310 .id = AT91SAM9G45_ID_PIOC,
309 .offset = AT91_PIOC, 311 .regbase = AT91SAM9G45_BASE_PIOC,
310 .clock = &pioC_clk,
311 }, { 312 }, {
312 .id = AT91SAM9G45_ID_PIODE, 313 .id = AT91SAM9G45_ID_PIODE,
313 .offset = AT91_PIOD, 314 .regbase = AT91SAM9G45_BASE_PIOD,
314 .clock = &pioDE_clk,
315 }, { 315 }, {
316 .id = AT91SAM9G45_ID_PIODE, 316 .id = AT91SAM9G45_ID_PIODE,
317 .offset = AT91_PIOE, 317 .regbase = AT91SAM9G45_BASE_PIOE,
318 .clock = &pioDE_clk,
319 } 318 }
320}; 319};
321 320
322static void at91sam9g45_reset(void) 321static void at91sam9g45_restart(char mode, const char *cmd)
323{ 322{
324 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 323 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
325} 324}
326 325
327static void at91sam9g45_poweroff(void)
328{
329 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
330}
331
332
333/* -------------------------------------------------------------------- 326/* --------------------------------------------------------------------
334 * AT91SAM9G45 processor initialization 327 * AT91SAM9G45 processor initialization
335 * -------------------------------------------------------------------- */ 328 * -------------------------------------------------------------------- */
@@ -340,10 +333,16 @@ static void __init at91sam9g45_map_io(void)
340 init_consistent_dma_size(SZ_4M); 333 init_consistent_dma_size(SZ_4M);
341} 334}
342 335
336static void __init at91sam9g45_ioremap_registers(void)
337{
338 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
339 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
340 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
341}
342
343static void __init at91sam9g45_initialize(void) 343static void __init at91sam9g45_initialize(void)
344{ 344{
345 at91_arch_reset = at91sam9g45_reset; 345 arm_pm_restart = at91sam9g45_restart;
346 pm_power_off = at91sam9g45_poweroff;
347 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 346 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
348 347
349 /* Register GPIO subsystem */ 348 /* Register GPIO subsystem */
@@ -395,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
395struct at91_init_soc __initdata at91sam9g45_soc = { 394struct at91_init_soc __initdata at91sam9g45_soc = {
396 .map_io = at91sam9g45_map_io, 395 .map_io = at91sam9g45_map_io,
397 .default_irq_priority = at91sam9g45_default_irq_priority, 396 .default_irq_priority = at91sam9g45_default_irq_priority,
397 .ioremap_registers = at91sam9g45_ioremap_registers,
398 .register_clocks = at91sam9g45_register_clocks, 398 .register_clocks = at91sam9g45_register_clocks,
399 .init = at91sam9g45_initialize, 399 .init = at91sam9g45_initialize,
400}; 400};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index e2cb835c4d7c..b7582dd10dc3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = {
44 44
45static struct resource hdmac_resources[] = { 45static struct resource hdmac_resources[] = {
46 [0] = { 46 [0] = {
47 .start = AT91_BASE_SYS + AT91_DMA, 47 .start = AT91SAM9G45_BASE_DMA,
48 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 48 .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 [1] = { 51 [1] = {
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
120 120
121 /* Enable VBus control for UHP ports */ 121 /* Enable VBus control for UHP ports */
122 for (i = 0; i < data->ports; i++) { 122 for (i = 0; i < data->ports; i++) {
123 if (data->vbus_pin[i]) 123 if (gpio_is_valid(data->vbus_pin[i]))
124 at91_set_gpio_output(data->vbus_pin[i], 0); 124 at91_set_gpio_output(data->vbus_pin[i], 0);
125 } 125 }
126 126
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
181 181
182 /* Enable VBus control for UHP ports */ 182 /* Enable VBus control for UHP ports */
183 for (i = 0; i < data->ports; i++) { 183 for (i = 0; i < data->ports; i++) {
184 if (data->vbus_pin[i]) 184 if (gpio_is_valid(data->vbus_pin[i]))
185 at91_set_gpio_output(data->vbus_pin[i], 0); 185 at91_set_gpio_output(data->vbus_pin[i], 0);
186 } 186 }
187 187
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
265 265
266 if (data && data->vbus_pin > 0) { 266 if (data && gpio_is_valid(data->vbus_pin)) {
267 at91_set_gpio_input(data->vbus_pin, 0); 267 at91_set_gpio_input(data->vbus_pin, 0);
268 at91_set_deglitch(data->vbus_pin, 1); 268 at91_set_deglitch(data->vbus_pin, 1);
269 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 269 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -316,7 +316,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
316 if (!data) 316 if (!data)
317 return; 317 return;
318 318
319 if (data->phy_irq_pin) { 319 if (gpio_is_valid(data->phy_irq_pin)) {
320 at91_set_gpio_input(data->phy_irq_pin, 0); 320 at91_set_gpio_input(data->phy_irq_pin, 0);
321 at91_set_deglitch(data->phy_irq_pin, 1); 321 at91_set_deglitch(data->phy_irq_pin, 1);
322 } 322 }
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
449 449
450 450
451 /* input/irq */ 451 /* input/irq */
452 if (data->slot[0].detect_pin) { 452 if (gpio_is_valid(data->slot[0].detect_pin)) {
453 at91_set_gpio_input(data->slot[0].detect_pin, 1); 453 at91_set_gpio_input(data->slot[0].detect_pin, 1);
454 at91_set_deglitch(data->slot[0].detect_pin, 1); 454 at91_set_deglitch(data->slot[0].detect_pin, 1);
455 } 455 }
456 if (data->slot[0].wp_pin) 456 if (gpio_is_valid(data->slot[0].wp_pin))
457 at91_set_gpio_input(data->slot[0].wp_pin, 1); 457 at91_set_gpio_input(data->slot[0].wp_pin, 1);
458 458
459 if (mmc_id == 0) { /* MCI0 */ 459 if (mmc_id == 0) { /* MCI0 */
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = {
529 .flags = IORESOURCE_MEM, 529 .flags = IORESOURCE_MEM,
530 }, 530 },
531 [1] = { 531 [1] = {
532 .start = AT91_BASE_SYS + AT91_ECC, 532 .start = AT91SAM9G45_BASE_ECC,
533 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 533 .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
534 .flags = IORESOURCE_MEM, 534 .flags = IORESOURCE_MEM,
535 } 535 }
536}; 536};
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
557 557
558 /* enable pin */ 558 /* enable pin */
559 if (data->enable_pin) 559 if (gpio_is_valid(data->enable_pin))
560 at91_set_gpio_output(data->enable_pin, 1); 560 at91_set_gpio_output(data->enable_pin, 1);
561 561
562 /* ready/busy pin */ 562 /* ready/busy pin */
563 if (data->rdy_pin) 563 if (gpio_is_valid(data->rdy_pin))
564 at91_set_gpio_input(data->rdy_pin, 1); 564 at91_set_gpio_input(data->rdy_pin, 1);
565 565
566 /* card detect pin */ 566 /* card detect pin */
567 if (data->det_pin) 567 if (gpio_is_valid(data->det_pin))
568 at91_set_gpio_input(data->det_pin, 1); 568 at91_set_gpio_input(data->det_pin, 1);
569 569
570 nand_data = *data; 570 nand_data = *data;
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ 859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
860 860
861 /* reset */ 861 /* reset */
862 if (data->reset_pin) 862 if (gpio_is_valid(data->reset_pin))
863 at91_set_gpio_output(data->reset_pin, 0); 863 at91_set_gpio_output(data->reset_pin, 0);
864 864
865 ac97_data = *data; 865 ac97_data = *data;
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { }
1009 * -------------------------------------------------------------------- */ 1009 * -------------------------------------------------------------------- */
1010 1010
1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
1012static struct resource rtc_resources[] = {
1013 [0] = {
1014 .start = AT91SAM9G45_BASE_RTC,
1015 .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
1016 .flags = IORESOURCE_MEM,
1017 },
1018 [1] = {
1019 .start = AT91_ID_SYS,
1020 .end = AT91_ID_SYS,
1021 .flags = IORESOURCE_IRQ,
1022 },
1023};
1024
1012static struct platform_device at91sam9g45_rtc_device = { 1025static struct platform_device at91sam9g45_rtc_device = {
1013 .name = "at91_rtc", 1026 .name = "at91_rtc",
1014 .id = -1, 1027 .id = -1,
1015 .num_resources = 0, 1028 .resource = rtc_resources,
1029 .num_resources = ARRAY_SIZE(rtc_resources),
1016}; 1030};
1017 1031
1018static void __init at91_add_device_rtc(void) 1032static void __init at91_add_device_rtc(void)
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
1081 1095
1082static struct resource rtt_resources[] = { 1096static struct resource rtt_resources[] = {
1083 { 1097 {
1084 .start = AT91_BASE_SYS + AT91_RTT, 1098 .start = AT91SAM9G45_BASE_RTT,
1085 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 1099 .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
1086 .flags = IORESOURCE_MEM, 1100 .flags = IORESOURCE_MEM,
1087 } 1101 }
1088}; 1102};
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {}
1133 * -------------------------------------------------------------------- */ 1147 * -------------------------------------------------------------------- */
1134 1148
1135#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 1149#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1150static struct resource wdt_resources[] = {
1151 {
1152 .start = AT91SAM9G45_BASE_WDT,
1153 .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
1154 .flags = IORESOURCE_MEM,
1155 }
1156};
1157
1136static struct platform_device at91sam9g45_wdt_device = { 1158static struct platform_device at91sam9g45_wdt_device = {
1137 .name = "at91_wdt", 1159 .name = "at91_wdt",
1138 .id = -1, 1160 .id = -1,
1139 .num_resources = 0, 1161 .resource = wdt_resources,
1162 .num_resources = ARRAY_SIZE(wdt_resources),
1140}; 1163};
1141 1164
1142static void __init at91_add_device_watchdog(void) 1165static void __init at91_add_device_watchdog(void)
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1355#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1356static struct resource dbgu_resources[] = {
1334 [0] = { 1357 [0] = {
1335 .start = AT91_BASE_SYS + AT91_DBGU, 1358 .start = AT91SAM9G45_BASE_DBGU,
1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1359 .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1360 .flags = IORESOURCE_MEM,
1338 }, 1361 },
1339 [1] = { 1362 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index a238105d2c11..d6bcb1da11df 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/pm.h>
14 13
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9rl.h> 19#include <mach/at91sam9rl.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
184 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 183 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
185 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 184 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
186 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 185 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
186 CLKDEV_CON_ID("pioA", &pioA_clk),
187 CLKDEV_CON_ID("pioB", &pioB_clk),
188 CLKDEV_CON_ID("pioC", &pioC_clk),
189 CLKDEV_CON_ID("pioD", &pioD_clk),
187}; 190};
188 191
189static struct clk_lookup usart_clocks_lookups[] = { 192static struct clk_lookup usart_clocks_lookups[] = {
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id)
243 * GPIO 246 * GPIO
244 * -------------------------------------------------------------------- */ 247 * -------------------------------------------------------------------- */
245 248
246static struct at91_gpio_bank at91sam9rl_gpio[] = { 249static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
247 { 250 {
248 .id = AT91SAM9RL_ID_PIOA, 251 .id = AT91SAM9RL_ID_PIOA,
249 .offset = AT91_PIOA, 252 .regbase = AT91SAM9RL_BASE_PIOA,
250 .clock = &pioA_clk,
251 }, { 253 }, {
252 .id = AT91SAM9RL_ID_PIOB, 254 .id = AT91SAM9RL_ID_PIOB,
253 .offset = AT91_PIOB, 255 .regbase = AT91SAM9RL_BASE_PIOB,
254 .clock = &pioB_clk,
255 }, { 256 }, {
256 .id = AT91SAM9RL_ID_PIOC, 257 .id = AT91SAM9RL_ID_PIOC,
257 .offset = AT91_PIOC, 258 .regbase = AT91SAM9RL_BASE_PIOC,
258 .clock = &pioC_clk,
259 }, { 259 }, {
260 .id = AT91SAM9RL_ID_PIOD, 260 .id = AT91SAM9RL_ID_PIOD,
261 .offset = AT91_PIOD, 261 .regbase = AT91SAM9RL_BASE_PIOD,
262 .clock = &pioD_clk,
263 } 262 }
264}; 263};
265 264
266static void at91sam9rl_poweroff(void)
267{
268 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
269}
270
271
272/* -------------------------------------------------------------------- 265/* --------------------------------------------------------------------
273 * AT91SAM9RL processor initialization 266 * AT91SAM9RL processor initialization
274 * -------------------------------------------------------------------- */ 267 * -------------------------------------------------------------------- */
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void)
290 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); 283 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
291} 284}
292 285
286static void __init at91sam9rl_ioremap_registers(void)
287{
288 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
289 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
290 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
291}
292
293static void __init at91sam9rl_initialize(void) 293static void __init at91sam9rl_initialize(void)
294{ 294{
295 at91_arch_reset = at91sam9_alt_reset; 295 arm_pm_restart = at91sam9_alt_restart;
296 pm_power_off = at91sam9rl_poweroff;
297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 296 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
298 297
299 /* Register GPIO subsystem */ 298 /* Register GPIO subsystem */
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
345struct at91_init_soc __initdata at91sam9rl_soc = { 344struct at91_init_soc __initdata at91sam9rl_soc = {
346 .map_io = at91sam9rl_map_io, 345 .map_io = at91sam9rl_map_io,
347 .default_irq_priority = at91sam9rl_default_irq_priority, 346 .default_irq_priority = at91sam9rl_default_irq_priority,
347 .ioremap_registers = at91sam9rl_ioremap_registers,
348 .register_clocks = at91sam9rl_register_clocks, 348 .register_clocks = at91sam9rl_register_clocks,
349 .init = at91sam9rl_initialize, 349 .init = at91sam9rl_initialize,
350}; 350};
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 628eb566d60c..61908dce9784 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = {
39 39
40static struct resource hdmac_resources[] = { 40static struct resource hdmac_resources[] = {
41 [0] = { 41 [0] = {
42 .start = AT91_BASE_SYS + AT91_DMA, 42 .start = AT91SAM9RL_BASE_DMA,
43 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 43 .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
44 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM,
45 }, 45 },
46 [2] = { 46 [2] = {
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
149 149
150 if (data && data->vbus_pin > 0) { 150 if (data && gpio_is_valid(data->vbus_pin)) {
151 at91_set_gpio_input(data->vbus_pin, 0); 151 at91_set_gpio_input(data->vbus_pin, 0);
152 at91_set_deglitch(data->vbus_pin, 1); 152 at91_set_deglitch(data->vbus_pin, 1);
153 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 153 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
201 return; 201 return;
202 202
203 /* input/irq */ 203 /* input/irq */
204 if (data->det_pin) { 204 if (gpio_is_valid(data->det_pin)) {
205 at91_set_gpio_input(data->det_pin, 1); 205 at91_set_gpio_input(data->det_pin, 1);
206 at91_set_deglitch(data->det_pin, 1); 206 at91_set_deglitch(data->det_pin, 1);
207 } 207 }
208 if (data->wp_pin) 208 if (gpio_is_valid(data->wp_pin))
209 at91_set_gpio_input(data->wp_pin, 1); 209 at91_set_gpio_input(data->wp_pin, 1);
210 if (data->vcc_pin) 210 if (gpio_is_valid(data->vcc_pin))
211 at91_set_gpio_output(data->vcc_pin, 0); 211 at91_set_gpio_output(data->vcc_pin, 0);
212 212
213 /* CLK */ 213 /* CLK */
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = {
248 .flags = IORESOURCE_MEM, 248 .flags = IORESOURCE_MEM,
249 }, 249 },
250 [1] = { 250 [1] = {
251 .start = AT91_BASE_SYS + AT91_ECC, 251 .start = AT91SAM9RL_BASE_ECC,
252 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 252 .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
253 .flags = IORESOURCE_MEM, 253 .flags = IORESOURCE_MEM,
254 } 254 }
255}; 255};
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
276 276
277 /* enable pin */ 277 /* enable pin */
278 if (data->enable_pin) 278 if (gpio_is_valid(data->enable_pin))
279 at91_set_gpio_output(data->enable_pin, 1); 279 at91_set_gpio_output(data->enable_pin, 1);
280 280
281 /* ready/busy pin */ 281 /* ready/busy pin */
282 if (data->rdy_pin) 282 if (gpio_is_valid(data->rdy_pin))
283 at91_set_gpio_input(data->rdy_pin, 1); 283 at91_set_gpio_input(data->rdy_pin, 1);
284 284
285 /* card detect pin */ 285 /* card detect pin */
286 if (data->det_pin) 286 if (gpio_is_valid(data->det_pin))
287 at91_set_gpio_input(data->det_pin, 1); 287 at91_set_gpio_input(data->det_pin, 1);
288 288
289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ 289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ 483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */
484 484
485 /* reset */ 485 /* reset */
486 if (data->reset_pin) 486 if (gpio_is_valid(data->reset_pin))
487 at91_set_gpio_output(data->reset_pin, 0); 487 at91_set_gpio_output(data->reset_pin, 0);
488 488
489 ac97_data = *data; 489 ac97_data = *data;
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {}
685 685
686static struct resource rtt_resources[] = { 686static struct resource rtt_resources[] = {
687 { 687 {
688 .start = AT91_BASE_SYS + AT91_RTT, 688 .start = AT91SAM9RL_BASE_RTT,
689 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 689 .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
690 .flags = IORESOURCE_MEM, 690 .flags = IORESOURCE_MEM,
691 } 691 }
692}; 692};
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void)
709 * -------------------------------------------------------------------- */ 709 * -------------------------------------------------------------------- */
710 710
711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
712static struct resource wdt_resources[] = {
713 {
714 .start = AT91SAM9RL_BASE_WDT,
715 .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
716 .flags = IORESOURCE_MEM,
717 }
718};
719
712static struct platform_device at91sam9rl_wdt_device = { 720static struct platform_device at91sam9rl_wdt_device = {
713 .name = "at91_wdt", 721 .name = "at91_wdt",
714 .id = -1, 722 .id = -1,
715 .num_resources = 0, 723 .resource = wdt_resources,
724 .num_resources = ARRAY_SIZE(wdt_resources),
716}; 725};
717 726
718static void __init at91_add_device_watchdog(void) 727static void __init at91_add_device_watchdog(void)
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 917#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 918static struct resource dbgu_resources[] = {
910 [0] = { 919 [0] = {
911 .start = AT91_BASE_SYS + AT91_DBGU, 920 .start = AT91SAM9RL_BASE_DBGU,
912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 921 .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 922 .flags = IORESOURCE_MEM,
914 }, 923 },
915 [1] = { 924 [1] = {
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index a60d98d7c3e2..2628384aaae1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -70,6 +70,8 @@ static struct macb_platform_data __initdata onearm_eth_data = {
70 70
71static struct at91_usbh_data __initdata onearm_usbh_data = { 71static struct at91_usbh_data __initdata onearm_usbh_data = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75static struct at91_udc_data __initdata onearm_udc_data = { 77static struct at91_udc_data __initdata onearm_udc_data = {
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 17fc77925707..3bb40694b02d 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata afeb9260_usbh_data = { 76static struct at91_usbh_data __initdata afeb9260_usbh_data = {
77 .ports = 1, 77 .ports = 1,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata afeb9260_udc_data = { 85static struct at91_udc_data __initdata afeb9260_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = {
138 .bus_width_16 = 0, 140 .bus_width_16 = 0,
139 .parts = afeb9260_nand_partition, 141 .parts = afeb9260_nand_partition,
140 .num_parts = ARRAY_SIZE(afeb9260_nand_partition), 142 .num_parts = ARRAY_SIZE(afeb9260_nand_partition),
143 .det_pin = -EINVAL,
141}; 144};
142 145
143 146
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
149 .wp_pin = AT91_PIN_PC4, 152 .wp_pin = AT91_PIN_PC4,
150 .slot_b = 1, 153 .slot_b = 1,
151 .wire4 = 1, 154 .wire4 = 1,
155 .vcc_pin = -EINVAL,
152}; 156};
153 157
154 158
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
169static struct at91_cf_data afeb9260_cf_data = { 173static struct at91_cf_data afeb9260_cf_data = {
170 .chipselect = 4, 174 .chipselect = 4,
171 .irq_pin = AT91_PIN_PA6, 175 .irq_pin = AT91_PIN_PA6,
176 .det_pin = -EINVAL,
177 .vcc_pin = -EINVAL,
172 .rst_pin = AT91_PIN_PA7, 178 .rst_pin = AT91_PIN_PA7,
173 .flags = AT91_CF_TRUE_IDE, 179 .flags = AT91_CF_TRUE_IDE,
174}; 180};
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 2037d2c40eb4..8510e9e54988 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void)
62 */ 62 */
63static struct at91_usbh_data __initdata cam60_usbh_data = { 63static struct at91_usbh_data __initdata cam60_usbh_data = {
64 .ports = 1, 64 .ports = 1,
65 .vbus_pin = {-EINVAL, -EINVAL},
66 .overcurrent_pin= {-EINVAL, -EINVAL},
65}; 67};
66 68
67 69
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = {
135static struct atmel_nand_data __initdata cam60_nand_data = { 137static struct atmel_nand_data __initdata cam60_nand_data = {
136 .ale = 21, 138 .ale = 21,
137 .cle = 22, 139 .cle = 22,
138 // .det_pin = ... not there 140 .det_pin = -EINVAL,
139 .rdy_pin = AT91_PIN_PA9, 141 .rdy_pin = AT91_PIN_PA9,
140 .enable_pin = AT91_PIN_PA7, 142 .enable_pin = AT91_PIN_PA7,
141 .parts = cam60_nand_partition, 143 .parts = cam60_nand_partition,
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = {
163static void __init cam60_add_device_nand(void) 165static void __init cam60_add_device_nand(void)
164{ 166{
165 /* configure chip-select 3 (NAND) */ 167 /* configure chip-select 3 (NAND) */
166 sam9_smc_configure(3, &cam60_nand_smc_config); 168 sam9_smc_configure(0, 3, &cam60_nand_smc_config);
167 169
168 at91_add_device_nand(&cam60_nand_data); 170 at91_add_device_nand(&cam60_nand_data);
169} 171}
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index af5520c366fe..ac3de4f7c31d 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void)
70 */ 70 */
71static struct at91_usbh_data __initdata cap9adk_usbh_data = { 71static struct at91_usbh_data __initdata cap9adk_usbh_data = {
72 .ports = 2, 72 .ports = 2,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
@@ -144,9 +146,9 @@ static struct spi_board_info cap9adk_spi_devices[] = {
144 */ 146 */
145static struct at91_mmc_data __initdata cap9adk_mmc_data = { 147static struct at91_mmc_data __initdata cap9adk_mmc_data = {
146 .wire4 = 1, 148 .wire4 = 1,
147// .det_pin = ... not connected 149 .det_pin = -EINVAL,
148// .wp_pin = ... not connected 150 .wp_pin = -EINVAL,
149// .vcc_pin = ... not connected 151 .vcc_pin = -EINVAL,
150}; 152};
151 153
152 154
@@ -154,6 +156,7 @@ static struct at91_mmc_data __initdata cap9adk_mmc_data = {
154 * MACB Ethernet device 156 * MACB Ethernet device
155 */ 157 */
156static struct macb_platform_data __initdata cap9adk_macb_data = { 158static struct macb_platform_data __initdata cap9adk_macb_data = {
159 .phy_irq_pin = -EINVAL,
157 .is_rmii = 1, 160 .is_rmii = 1,
158}; 161};
159 162
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
172static struct atmel_nand_data __initdata cap9adk_nand_data = { 175static struct atmel_nand_data __initdata cap9adk_nand_data = {
173 .ale = 21, 176 .ale = 21,
174 .cle = 22, 177 .cle = 22,
175// .det_pin = ... not connected 178 .det_pin = -EINVAL,
176// .rdy_pin = ... not connected 179 .rdy_pin = -EINVAL,
177 .enable_pin = AT91_PIN_PD15, 180 .enable_pin = AT91_PIN_PD15,
178 .parts = cap9adk_nand_partitions, 181 .parts = cap9adk_nand_partitions,
179 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), 182 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions),
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
212 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; 215 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
213 216
214 /* configure chip-select 3 (NAND) */ 217 /* configure chip-select 3 (NAND) */
215 sam9_smc_configure(3, &cap9adk_nand_smc_config); 218 sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
216 219
217 at91_add_device_nand(&cap9adk_nand_data); 220 at91_add_device_nand(&cap9adk_nand_data);
218} 221}
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void)
282 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 285 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
283 286
284 /* configure chip-select 0 (NOR) */ 287 /* configure chip-select 0 (NOR) */
285 sam9_smc_configure(0, &cap9adk_nor_smc_config); 288 sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
286 289
287 platform_device_register(&cap9adk_nor_flash); 290 platform_device_register(&cap9adk_nor_flash);
288} 291}
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
351 * AC97 354 * AC97
352 */ 355 */
353static struct ac97c_platform_data cap9adk_ac97_data = { 356static struct ac97c_platform_data cap9adk_ac97_data = {
354// .reset_pin = ... not connected 357 .reset_pin = -EINVAL,
355}; 358};
356 359
357 360
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 529b356cdb7d..59d9cf997537 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -64,6 +64,8 @@ static struct macb_platform_data __initdata carmeva_eth_data = {
64 64
65static struct at91_usbh_data __initdata carmeva_usbh_data = { 65static struct at91_usbh_data __initdata carmeva_usbh_data = {
66 .ports = 2, 66 .ports = 2,
67 .vbus_pin = {-EINVAL, -EINVAL},
68 .overcurrent_pin= {-EINVAL, -EINVAL},
67}; 69};
68 70
69static struct at91_udc_data __initdata carmeva_udc_data = { 71static struct at91_udc_data __initdata carmeva_udc_data = {
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
75// static struct at91_cf_data __initdata carmeva_cf_data = { 77// static struct at91_cf_data __initdata carmeva_cf_data = {
76// .det_pin = AT91_PIN_PB0, 78// .det_pin = AT91_PIN_PB0,
77// .rst_pin = AT91_PIN_PC5, 79// .rst_pin = AT91_PIN_PC5,
78 // .irq_pin = ... not connected 80 // .irq_pin = -EINVAL,
79 // .vcc_pin = ... always powered 81 // .vcc_pin = -EINVAL,
80// }; 82// };
81 83
82static struct at91_mmc_data __initdata carmeva_mmc_data = { 84static struct at91_mmc_data __initdata carmeva_mmc_data = {
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = {
84 .wire4 = 1, 86 .wire4 = 1,
85 .det_pin = AT91_PIN_PB10, 87 .det_pin = AT91_PIN_PB10,
86 .wp_pin = AT91_PIN_PC14, 88 .wp_pin = AT91_PIN_PC14,
89 .vcc_pin = -EINVAL,
87}; 90};
88 91
89static struct spi_board_info carmeva_spi_devices[] = { 92static struct spi_board_info carmeva_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 04d2b9b50464..9ab3d1ea326d 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata cpu9krea_usbh_data = { 87static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata cpu9krea_udc_data = { 96static struct at91_udc_data __initdata cpu9krea_udc_data = {
95 .vbus_pin = AT91_PIN_PC8, 97 .vbus_pin = AT91_PIN_PC8,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99/* 101/*
100 * MACB Ethernet device 102 * MACB Ethernet device
101 */ 103 */
102static struct macb_platform_data __initdata cpu9krea_macb_data = { 104static struct macb_platform_data __initdata cpu9krea_macb_data = {
105 .phy_irq_pin = -EINVAL,
103 .is_rmii = 1, 106 .is_rmii = 1,
104}; 107};
105 108
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
112 .rdy_pin = AT91_PIN_PC13, 115 .rdy_pin = AT91_PIN_PC13,
113 .enable_pin = AT91_PIN_PC14, 116 .enable_pin = AT91_PIN_PC14,
114 .bus_width_16 = 0, 117 .bus_width_16 = 0,
118 .det_pin = -EINVAL,
115}; 119};
116 120
117#ifdef CONFIG_MACH_CPU9260 121#ifdef CONFIG_MACH_CPU9260
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
156 160
157static void __init cpu9krea_add_device_nand(void) 161static void __init cpu9krea_add_device_nand(void)
158{ 162{
159 sam9_smc_configure(3, &cpu9krea_nand_smc_config); 163 sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
160 at91_add_device_nand(&cpu9krea_nand_data); 164 at91_add_device_nand(&cpu9krea_nand_data);
161} 165}
162 166
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void)
238 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); 242 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
239 243
240 /* configure chip-select 0 (NOR) */ 244 /* configure chip-select 0 (NOR) */
241 sam9_smc_configure(0, &cpu9krea_nor_smc_config); 245 sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
242 246
243 platform_device_register(&cpu9krea_nor_flash); 247 platform_device_register(&cpu9krea_nor_flash);
244} 248}
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
337 .slot_b = 0, 341 .slot_b = 0,
338 .wire4 = 1, 342 .wire4 = 1,
339 .det_pin = AT91_PIN_PA29, 343 .det_pin = AT91_PIN_PA29,
344 .wp_pin = -EINVAL,
345 .vcc_pin = -EINVAL,
340}; 346};
341 347
342static void __init cpu9krea_board_init(void) 348static void __init cpu9krea_board_init(void)
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 7a4c82e8da51..368e1427ad99 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -83,11 +83,14 @@ static void __init cpuat91_init_early(void)
83} 83}
84 84
85static struct macb_platform_data __initdata cpuat91_eth_data = { 85static struct macb_platform_data __initdata cpuat91_eth_data = {
86 .phy_irq_pin = -EINVAL,
86 .is_rmii = 1, 87 .is_rmii = 1,
87}; 88};
88 89
89static struct at91_usbh_data __initdata cpuat91_usbh_data = { 90static struct at91_usbh_data __initdata cpuat91_usbh_data = {
90 .ports = 1, 91 .ports = 1,
92 .vbus_pin = {-EINVAL, -EINVAL},
93 .overcurrent_pin= {-EINVAL, -EINVAL},
91}; 94};
92 95
93static struct at91_udc_data __initdata cpuat91_udc_data = { 96static struct at91_udc_data __initdata cpuat91_udc_data = {
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = {
98static struct at91_mmc_data __initdata cpuat91_mmc_data = { 101static struct at91_mmc_data __initdata cpuat91_mmc_data = {
99 .det_pin = AT91_PIN_PC2, 102 .det_pin = AT91_PIN_PC2,
100 .wire4 = 1, 103 .wire4 = 1,
104 .wp_pin = -EINVAL,
105 .vcc_pin = -EINVAL,
101}; 106};
102 107
103static struct physmap_flash_data cpuat91_flash_data = { 108static struct physmap_flash_data cpuat91_flash_data = {
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index b004b20b8e42..1a1547b1ce4e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -65,11 +65,13 @@ static struct macb_platform_data __initdata csb337_eth_data = {
65 65
66static struct at91_usbh_data __initdata csb337_usbh_data = { 66static struct at91_usbh_data __initdata csb337_usbh_data = {
67 .ports = 2, 67 .ports = 2,
68 .vbus_pin = {-EINVAL, -EINVAL},
69 .overcurrent_pin= {-EINVAL, -EINVAL},
68}; 70};
69 71
70static struct at91_udc_data __initdata csb337_udc_data = { 72static struct at91_udc_data __initdata csb337_udc_data = {
71 // this has no VBUS sensing pin
72 .pullup_pin = AT91_PIN_PA24, 73 .pullup_pin = AT91_PIN_PA24,
74 .vbus_pin = -EINVAL,
73}; 75};
74 76
75static struct i2c_board_info __initdata csb337_i2c_devices[] = { 77static struct i2c_board_info __initdata csb337_i2c_devices[] = {
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
98 .slot_b = 0, 100 .slot_b = 0,
99 .wire4 = 1, 101 .wire4 = 1,
100 .wp_pin = AT91_PIN_PD6, 102 .wp_pin = AT91_PIN_PD6,
103 .vcc_pin = -EINVAL,
101}; 104};
102 105
103static struct spi_board_info csb337_spi_devices[] = { 106static struct spi_board_info csb337_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index e966de5219c7..f650bf39455d 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -59,6 +59,8 @@ static struct macb_platform_data __initdata csb637_eth_data = {
59 59
60static struct at91_usbh_data __initdata csb637_usbh_data = { 60static struct at91_usbh_data __initdata csb637_usbh_data = {
61 .ports = 2, 61 .ports = 2,
62 .vbus_pin = {-EINVAL, -EINVAL},
63 .overcurrent_pin= {-EINVAL, -EINVAL},
62}; 64};
63 65
64static struct at91_udc_data __initdata csb637_udc_data = { 66static struct at91_udc_data __initdata csb637_udc_data = {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 0b7d32778210..bb6b434ec0c1 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -50,6 +50,7 @@ static void __init ek_init_early(void)
50static struct atmel_nand_data __initdata ek_nand_data = { 50static struct atmel_nand_data __initdata ek_nand_data = {
51 .ale = 21, 51 .ale = 21,
52 .cle = 22, 52 .cle = 22,
53 .det_pin = -EINVAL,
53 .rdy_pin = AT91_PIN_PC8, 54 .rdy_pin = AT91_PIN_PC8,
54 .enable_pin = AT91_PIN_PC14, 55 .enable_pin = AT91_PIN_PC14,
55}; 56};
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void)
82 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 83 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
83 84
84 /* configure chip-select 3 (NAND) */ 85 /* configure chip-select 3 (NAND) */
85 sam9_smc_configure(3, &ek_nand_smc_config); 86 sam9_smc_configure(0, 3, &ek_nand_smc_config);
86 87
87 at91_add_device_nand(&ek_nand_data); 88 at91_add_device_nand(&ek_nand_data);
88} 89}
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 3788fa527121..d302ca3eeb64 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -67,6 +67,8 @@ static struct macb_platform_data __initdata eb9200_eth_data = {
67 67
68static struct at91_usbh_data __initdata eb9200_usbh_data = { 68static struct at91_usbh_data __initdata eb9200_usbh_data = {
69 .ports = 2, 69 .ports = 2,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_udc_data __initdata eb9200_udc_data = { 74static struct at91_udc_data __initdata eb9200_udc_data = {
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = {
75}; 77};
76 78
77static struct at91_cf_data __initdata eb9200_cf_data = { 79static struct at91_cf_data __initdata eb9200_cf_data = {
80 .irq_pin = -EINVAL,
78 .det_pin = AT91_PIN_PB0, 81 .det_pin = AT91_PIN_PB0,
82 .vcc_pin = -EINVAL,
79 .rst_pin = AT91_PIN_PC5, 83 .rst_pin = AT91_PIN_PC5,
80 // .irq_pin = ... not connected
81 // .vcc_pin = ... always powered
82}; 84};
83 85
84static struct at91_mmc_data __initdata eb9200_mmc_data = { 86static struct at91_mmc_data __initdata eb9200_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
89 .det_pin = -EINVAL,
90 .wp_pin = -EINVAL,
91 .vcc_pin = -EINVAL,
87}; 92};
88 93
89static struct i2c_board_info __initdata eb9200_i2c_devices[] = { 94static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index af7622eae1a9..69966ce4d776 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -71,11 +71,16 @@ static struct macb_platform_data __initdata ecb_at91eth_data = {
71 71
72static struct at91_usbh_data __initdata ecb_at91usbh_data = { 72static struct at91_usbh_data __initdata ecb_at91usbh_data = {
73 .ports = 1, 73 .ports = 1,
74 .vbus_pin = {-EINVAL, -EINVAL},
75 .overcurrent_pin= {-EINVAL, -EINVAL},
74}; 76};
75 77
76static struct at91_mmc_data __initdata ecb_at91mmc_data = { 78static struct at91_mmc_data __initdata ecb_at91mmc_data = {
77 .slot_b = 0, 79 .slot_b = 0,
78 .wire4 = 1, 80 .wire4 = 1,
81 .det_pin = -EINVAL,
82 .wp_pin = -EINVAL,
83 .vcc_pin = -EINVAL,
79}; 84};
80 85
81 86
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 8e75867d1d18..07ef35b0ec2c 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -54,6 +54,8 @@ static struct macb_platform_data __initdata eco920_eth_data = {
54 54
55static struct at91_usbh_data __initdata eco920_usbh_data = { 55static struct at91_usbh_data __initdata eco920_usbh_data = {
56 .ports = 1, 56 .ports = 1,
57 .vbus_pin = {-EINVAL, -EINVAL},
58 .overcurrent_pin= {-EINVAL, -EINVAL},
57}; 59};
58 60
59static struct at91_udc_data __initdata eco920_udc_data = { 61static struct at91_udc_data __initdata eco920_udc_data = {
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = {
64static struct at91_mmc_data __initdata eco920_mmc_data = { 66static struct at91_mmc_data __initdata eco920_mmc_data = {
65 .slot_b = 0, 67 .slot_b = 0,
66 .wire4 = 0, 68 .wire4 = 0,
69 .det_pin = -EINVAL,
70 .wp_pin = -EINVAL,
71 .vcc_pin = -EINVAL,
67}; 72};
68 73
69static struct physmap_flash_data eco920_flash_data = { 74static struct physmap_flash_data eco920_flash_data = {
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 4c3f65d9c59b..eec02cd57ced 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void)
52/* USB Host port */ 52/* USB Host port */
53static struct at91_usbh_data __initdata flexibity_usbh_data = { 53static struct at91_usbh_data __initdata flexibity_usbh_data = {
54 .ports = 2, 54 .ports = 2,
55 .vbus_pin = {-EINVAL, -EINVAL},
56 .overcurrent_pin= {-EINVAL, -EINVAL},
55}; 57};
56 58
57/* USB Device port */ 59/* USB Device port */
58static struct at91_udc_data __initdata flexibity_udc_data = { 60static struct at91_udc_data __initdata flexibity_udc_data = {
59 .vbus_pin = AT91_PIN_PC5, 61 .vbus_pin = AT91_PIN_PC5,
60 .pullup_pin = 0, /* pull-up driven by UDC */ 62 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
61}; 63};
62 64
63/* SPI devices */ 65/* SPI devices */
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = {
76 .wire4 = 1, 78 .wire4 = 1,
77 .det_pin = AT91_PIN_PC9, 79 .det_pin = AT91_PIN_PC9,
78 .wp_pin = AT91_PIN_PC4, 80 .wp_pin = AT91_PIN_PC4,
81 .vcc_pin = -EINVAL,
79}; 82};
80 83
81/* LEDs */ 84/* LEDs */
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index de8e09642f4e..caf017f0f4ee 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void)
106 */ 106 */
107static struct at91_usbh_data __initdata foxg20_usbh_data = { 107static struct at91_usbh_data __initdata foxg20_usbh_data = {
108 .ports = 2, 108 .ports = 2,
109 .vbus_pin = {-EINVAL, -EINVAL},
110 .overcurrent_pin= {-EINVAL, -EINVAL},
109}; 111};
110 112
111/* 113/*
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = {
113 */ 115 */
114static struct at91_udc_data __initdata foxg20_udc_data = { 116static struct at91_udc_data __initdata foxg20_udc_data = {
115 .vbus_pin = AT91_PIN_PC6, 117 .vbus_pin = AT91_PIN_PC6,
116 .pullup_pin = 0, /* pull-up driven by UDC */ 118 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
117}; 119};
118 120
119 121
@@ -147,6 +149,9 @@ static struct macb_platform_data __initdata foxg20_macb_data = {
147static struct at91_mmc_data __initdata foxg20_mmc_data = { 149static struct at91_mmc_data __initdata foxg20_mmc_data = {
148 .slot_b = 1, 150 .slot_b = 1,
149 .wire4 = 1, 151 .wire4 = 1,
152 .det_pin = -EINVAL,
153 .wp_pin = -EINVAL,
154 .vcc_pin = -EINVAL,
150}; 155};
151 156
152 157
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 51c82f151119..230e71969fb7 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void)
80 */ 80 */
81static struct at91_usbh_data __initdata usbh_data = { 81static struct at91_usbh_data __initdata usbh_data = {
82 .ports = 2, 82 .ports = 2,
83 .vbus_pin = {-EINVAL, -EINVAL},
84 .overcurrent_pin= {-EINVAL, -EINVAL},
83}; 85};
84 86
85/* 87/*
@@ -87,7 +89,7 @@ static struct at91_usbh_data __initdata usbh_data = {
87 */ 89 */
88static struct at91_udc_data __initdata udc_data = { 90static struct at91_udc_data __initdata udc_data = {
89 .vbus_pin = AT91_PIN_PA22, 91 .vbus_pin = AT91_PIN_PA22,
90 .pullup_pin = 0, /* pull-up driven by UDC */ 92 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
91}; 93};
92 94
93/* 95/*
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
530static struct at91_cf_data __initdata gsia18s_cf1_data = { 532static struct at91_cf_data __initdata gsia18s_cf1_data = {
531 .irq_pin = AT91_PIN_PA27, 533 .irq_pin = AT91_PIN_PA27,
532 .det_pin = AT91_PIN_PB30, 534 .det_pin = AT91_PIN_PB30,
535 .vcc_pin = -EINVAL,
533 .rst_pin = AT91_PIN_PB31, 536 .rst_pin = AT91_PIN_PB31,
534 .chipselect = 5, 537 .chipselect = 5,
535 .flags = AT91_CF_TRUE_IDE, 538 .flags = AT91_CF_TRUE_IDE,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 9628a3defcf4..efde1b2327c8 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -68,6 +68,8 @@ static struct macb_platform_data __initdata kafa_eth_data = {
68 68
69static struct at91_usbh_data __initdata kafa_usbh_data = { 69static struct at91_usbh_data __initdata kafa_usbh_data = {
70 .ports = 1, 70 .ports = 1,
71 .vbus_pin = {-EINVAL, -EINVAL},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
71}; 73};
72 74
73static struct at91_udc_data __initdata kafa_udc_data = { 75static struct at91_udc_data __initdata kafa_udc_data = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index 5ba5244cb632..d75a4a2ad9c2 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -76,6 +76,8 @@ static struct macb_platform_data __initdata kb9202_eth_data = {
76 76
77static struct at91_usbh_data __initdata kb9202_usbh_data = { 77static struct at91_usbh_data __initdata kb9202_usbh_data = {
78 .ports = 1, 78 .ports = 1,
79 .vbus_pin = {-EINVAL, -EINVAL},
80 .overcurrent_pin= {-EINVAL, -EINVAL},
79}; 81};
80 82
81static struct at91_udc_data __initdata kb9202_udc_data = { 83static struct at91_udc_data __initdata kb9202_udc_data = {
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
87 .det_pin = AT91_PIN_PB2, 89 .det_pin = AT91_PIN_PB2,
88 .slot_b = 0, 90 .slot_b = 0,
89 .wire4 = 1, 91 .wire4 = 1,
92 .wp_pin = -EINVAL,
93 .vcc_pin = -EINVAL,
90}; 94};
91 95
92static struct mtd_partition __initdata kb9202_nand_partition[] = { 96static struct mtd_partition __initdata kb9202_nand_partition[] = {
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
100static struct atmel_nand_data __initdata kb9202_nand_data = { 104static struct atmel_nand_data __initdata kb9202_nand_data = {
101 .ale = 22, 105 .ale = 22,
102 .cle = 21, 106 .cle = 21,
103 // .det_pin = ... not there 107 .det_pin = -EINVAL,
104 .rdy_pin = AT91_PIN_PC29, 108 .rdy_pin = AT91_PIN_PC29,
105 .enable_pin = AT91_PIN_PC28, 109 .enable_pin = AT91_PIN_PC28,
106 .parts = kb9202_nand_partition, 110 .parts = kb9202_nand_partition,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 56e7aee11b59..3f8617c0e04e 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void)
72static struct at91_usbh_data __initdata neocore926_usbh_data = { 72static struct at91_usbh_data __initdata neocore926_usbh_data = {
73 .ports = 2, 73 .ports = 2,
74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
75 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 76};
76 77
77/* 78/*
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = {
79 */ 80 */
80static struct at91_udc_data __initdata neocore926_udc_data = { 81static struct at91_udc_data __initdata neocore926_udc_data = {
81 .vbus_pin = AT91_PIN_PA25, 82 .vbus_pin = AT91_PIN_PA25,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 83 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 84};
84 85
85 86
@@ -149,6 +150,7 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = {
149 .wire4 = 1, 150 .wire4 = 1,
150 .det_pin = AT91_PIN_PE18, 151 .det_pin = AT91_PIN_PE18,
151 .wp_pin = AT91_PIN_PE19, 152 .wp_pin = AT91_PIN_PE19,
153 .vcc_pin = -EINVAL,
152}; 154};
153 155
154 156
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = {
190 .enable_pin = AT91_PIN_PD15, 192 .enable_pin = AT91_PIN_PD15,
191 .parts = neocore926_nand_partition, 193 .parts = neocore926_nand_partition,
192 .num_parts = ARRAY_SIZE(neocore926_nand_partition), 194 .num_parts = ARRAY_SIZE(neocore926_nand_partition),
195 .det_pin = -EINVAL,
193}; 196};
194 197
195static struct sam9_smc_config __initdata neocore926_nand_smc_config = { 198static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
213static void __init neocore926_add_device_nand(void) 216static void __init neocore926_add_device_nand(void)
214{ 217{
215 /* configure chip-select 3 (NAND) */ 218 /* configure chip-select 3 (NAND) */
216 sam9_smc_configure(3, &neocore926_nand_smc_config); 219 sam9_smc_configure(0, 3, &neocore926_nand_smc_config);
217 220
218 at91_add_device_nand(&neocore926_nand_data); 221 at91_add_device_nand(&neocore926_nand_data);
219} 222}
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index c545a3e635a4..b4a12fc184c8 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
96static void __init add_device_pcontrol(void) 96static void __init add_device_pcontrol(void)
97{ 97{
98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */ 98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
99 sam9_smc_configure(4, &pcontrol_smc_config[0]); 99 sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ 100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
101 sam9_smc_configure(7, &pcontrol_smc_config[1]); 101 sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
102} 102}
103 103
104 104
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void)
107 */ 107 */
108static struct at91_usbh_data __initdata usbh_data = { 108static struct at91_usbh_data __initdata usbh_data = {
109 .ports = 2, 109 .ports = 2,
110 .vbus_pin = {-EINVAL, -EINVAL},
111 .overcurrent_pin= {-EINVAL, -EINVAL},
110}; 112};
111 113
112 114
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index dc18759a24b4..ab024fa11d5c 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -67,6 +67,8 @@ static struct macb_platform_data __initdata picotux200_eth_data = {
67 67
68static struct at91_usbh_data __initdata picotux200_usbh_data = { 68static struct at91_usbh_data __initdata picotux200_usbh_data = {
69 .ports = 1, 69 .ports = 1,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_mmc_data __initdata picotux200_mmc_data = { 74static struct at91_mmc_data __initdata picotux200_mmc_data = {
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
74 .slot_b = 0, 76 .slot_b = 0,
75 .wire4 = 1, 77 .wire4 = 1,
76 .wp_pin = AT91_PIN_PA17, 78 .wp_pin = AT91_PIN_PA17,
79 .vcc_pin = -EINVAL,
77}; 80};
78 81
79#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 82#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 5444d6ac514a..e029d220cb84 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -77,6 +77,8 @@ static void __init ek_init_early(void)
77 */ 77 */
78static struct at91_usbh_data __initdata ek_usbh_data = { 78static struct at91_usbh_data __initdata ek_usbh_data = {
79 .ports = 2, 79 .ports = 2,
80 .vbus_pin = {-EINVAL, -EINVAL},
81 .overcurrent_pin= {-EINVAL, -EINVAL},
80}; 82};
81 83
82/* 84/*
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
84 */ 86 */
85static struct at91_udc_data __initdata ek_udc_data = { 87static struct at91_udc_data __initdata ek_udc_data = {
86 .vbus_pin = AT91_PIN_PC5, 88 .vbus_pin = AT91_PIN_PC5,
87 .pullup_pin = 0, /* pull-up driven by UDC */ 89 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
88}; 90};
89 91
90/* 92/*
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
133static struct atmel_nand_data __initdata ek_nand_data = { 135static struct atmel_nand_data __initdata ek_nand_data = {
134 .ale = 21, 136 .ale = 21,
135 .cle = 22, 137 .cle = 22,
136// .det_pin = ... not connected 138 .det_pin = -EINVAL,
137 .rdy_pin = AT91_PIN_PC13, 139 .rdy_pin = AT91_PIN_PC13,
138 .enable_pin = AT91_PIN_PC14, 140 .enable_pin = AT91_PIN_PC14,
139 .parts = ek_nand_partition, 141 .parts = ek_nand_partition,
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
161static void __init ek_add_device_nand(void) 163static void __init ek_add_device_nand(void)
162{ 164{
163 /* configure chip-select 3 (NAND) */ 165 /* configure chip-select 3 (NAND) */
164 sam9_smc_configure(3, &ek_nand_smc_config); 166 sam9_smc_configure(0, 3, &ek_nand_smc_config);
165 167
166 at91_add_device_nand(&ek_nand_data); 168 at91_add_device_nand(&ek_nand_data);
167} 169}
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void)
172static struct at91_mmc_data __initdata ek_mmc_data = { 174static struct at91_mmc_data __initdata ek_mmc_data = {
173 .slot_b = 0, 175 .slot_b = 0,
174 .wire4 = 1, 176 .wire4 = 1,
175// .det_pin = ... not connected 177 .det_pin = -EINVAL,
176// .wp_pin = ... not connected 178 .wp_pin = -EINVAL,
177// .vcc_pin = ... not connected 179 .vcc_pin = -EINVAL,
178}; 180};
179 181
180/* 182/*
@@ -251,7 +253,7 @@ static void __init ek_board_init(void)
251 /* LEDs */ 253 /* LEDs */
252 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 254 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
253 /* shutdown controller, wakeup button (5 msec low) */ 255 /* shutdown controller, wakeup button (5 msec low) */
254 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW 256 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
255 | AT91_SHDW_RTTWKEN); 257 | AT91_SHDW_RTTWKEN);
256} 258}
257 259
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 022d0cebda9d..782f37946af5 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -72,6 +72,8 @@ static struct macb_platform_data __initdata dk_eth_data = {
72 72
73static struct at91_usbh_data __initdata dk_usbh_data = { 73static struct at91_usbh_data __initdata dk_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata dk_udc_data = { 79static struct at91_udc_data __initdata dk_udc_data = {
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = {
80}; 82};
81 83
82static struct at91_cf_data __initdata dk_cf_data = { 84static struct at91_cf_data __initdata dk_cf_data = {
85 .irq_pin = -EINVAL,
83 .det_pin = AT91_PIN_PB0, 86 .det_pin = AT91_PIN_PB0,
87 .vcc_pin = -EINVAL,
84 .rst_pin = AT91_PIN_PC5, 88 .rst_pin = AT91_PIN_PC5,
85 // .irq_pin = ... not connected
86 // .vcc_pin = ... always powered
87}; 89};
88 90
89#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD 91#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
90static struct at91_mmc_data __initdata dk_mmc_data = { 92static struct at91_mmc_data __initdata dk_mmc_data = {
91 .slot_b = 0, 93 .slot_b = 0,
92 .wire4 = 1, 94 .wire4 = 1,
95 .det_pin = -EINVAL,
96 .wp_pin = -EINVAL,
97 .vcc_pin = -EINVAL,
93}; 98};
94#endif 99#endif
95 100
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = {
143 .cle = 21, 148 .cle = 21,
144 .det_pin = AT91_PIN_PB1, 149 .det_pin = AT91_PIN_PB1,
145 .rdy_pin = AT91_PIN_PC2, 150 .rdy_pin = AT91_PIN_PC2,
146 // .enable_pin = ... not there 151 .enable_pin = -EINVAL,
147 .parts = dk_nand_partition, 152 .parts = dk_nand_partition,
148 .num_parts = ARRAY_SIZE(dk_nand_partition), 153 .num_parts = ARRAY_SIZE(dk_nand_partition),
149}; 154};
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index ed275861adef..ef7c12a92246 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -72,6 +72,8 @@ static struct macb_platform_data __initdata ek_eth_data = {
72 72
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata ek_udc_data = { 79static struct at91_udc_data __initdata ek_udc_data = {
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
87 .wp_pin = AT91_PIN_PA17, 89 .wp_pin = AT91_PIN_PA17,
90 .vcc_pin = -EINVAL,
88}; 91};
89#endif 92#endif
90 93
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index ed3b21f77674..af0750fafa29 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -70,6 +70,8 @@ static struct macb_platform_data rsi_ews_eth_data __initdata = {
70 */ 70 */
71static struct at91_usbh_data rsi_ews_usbh_data __initdata = { 71static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 3e4b50e6f6ab..84bce587735f 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -72,6 +72,8 @@ static void __init ek_init_early(void)
72 */ 72 */
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77/* 79/*
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
79 */ 81 */
80static struct at91_udc_data __initdata ek_udc_data = { 82static struct at91_udc_data __initdata ek_udc_data = {
81 .vbus_pin = AT91_PIN_PC5, 83 .vbus_pin = AT91_PIN_PC5,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 84 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 85};
84 86
85 87
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
134static struct atmel_nand_data __initdata ek_nand_data = { 136static struct atmel_nand_data __initdata ek_nand_data = {
135 .ale = 21, 137 .ale = 21,
136 .cle = 22, 138 .cle = 22,
137// .det_pin = ... not connected 139 .det_pin = -EINVAL,
138 .rdy_pin = AT91_PIN_PC13, 140 .rdy_pin = AT91_PIN_PC13,
139 .enable_pin = AT91_PIN_PC14, 141 .enable_pin = AT91_PIN_PC14,
140 .parts = ek_nand_partition, 142 .parts = ek_nand_partition,
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
162static void __init ek_add_device_nand(void) 164static void __init ek_add_device_nand(void)
163{ 165{
164 /* configure chip-select 3 (NAND) */ 166 /* configure chip-select 3 (NAND) */
165 sam9_smc_configure(3, &ek_nand_smc_config); 167 sam9_smc_configure(0, 3, &ek_nand_smc_config);
166 168
167 at91_add_device_nand(&ek_nand_data); 169 at91_add_device_nand(&ek_nand_data);
168} 170}
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
176 .wire4 = 1, 178 .wire4 = 1,
177 .det_pin = AT91_PIN_PC8, 179 .det_pin = AT91_PIN_PC8,
178 .wp_pin = AT91_PIN_PC4, 180 .wp_pin = AT91_PIN_PC4,
179// .vcc_pin = ... not connected 181 .vcc_pin = -EINVAL,
180}; 182};
181 183
182static void __init ek_board_init(void) 184static void __init ek_board_init(void)
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 13478e14a543..be8233bcabdc 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -75,6 +75,8 @@ static void __init ek_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata ek_usbh_data = { 76static struct at91_usbh_data __initdata ek_usbh_data = {
77 .ports = 2, 77 .ports = 2,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata ek_udc_data = { 85static struct at91_udc_data __initdata ek_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
176static struct atmel_nand_data __initdata ek_nand_data = { 178static struct atmel_nand_data __initdata ek_nand_data = {
177 .ale = 21, 179 .ale = 21,
178 .cle = 22, 180 .cle = 22,
179// .det_pin = ... not connected 181 .det_pin = -EINVAL,
180 .rdy_pin = AT91_PIN_PC13, 182 .rdy_pin = AT91_PIN_PC13,
181 .enable_pin = AT91_PIN_PC14, 183 .enable_pin = AT91_PIN_PC14,
182 .parts = ek_nand_partition, 184 .parts = ek_nand_partition,
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void)
211 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 213 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
212 214
213 /* configure chip-select 3 (NAND) */ 215 /* configure chip-select 3 (NAND) */
214 sam9_smc_configure(3, &ek_nand_smc_config); 216 sam9_smc_configure(0, 3, &ek_nand_smc_config);
215 217
216 at91_add_device_nand(&ek_nand_data); 218 at91_add_device_nand(&ek_nand_data);
217} 219}
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void)
223static struct at91_mmc_data __initdata ek_mmc_data = { 225static struct at91_mmc_data __initdata ek_mmc_data = {
224 .slot_b = 1, 226 .slot_b = 1,
225 .wire4 = 1, 227 .wire4 = 1,
226// .det_pin = ... not connected 228 .det_pin = -EINVAL,
227// .wp_pin = ... not connected 229 .wp_pin = -EINVAL,
228// .vcc_pin = ... not connected 230 .vcc_pin = -EINVAL,
229}; 231};
230 232
231 233
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b005b738e8ff..40895072a1a7 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
131static void __init ek_add_device_dm9000(void) 131static void __init ek_add_device_dm9000(void)
132{ 132{
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
136 /* Configure Reset signal as output */ 136 /* Configure Reset signal as output */
137 at91_set_gpio_output(AT91_PIN_PC10, 0); 137 at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {}
151 */ 151 */
152static struct at91_usbh_data __initdata ek_usbh_data = { 152static struct at91_usbh_data __initdata ek_usbh_data = {
153 .ports = 2, 153 .ports = 2,
154 .vbus_pin = {-EINVAL, -EINVAL},
155 .overcurrent_pin= {-EINVAL, -EINVAL},
154}; 156};
155 157
156 158
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
159 */ 161 */
160static struct at91_udc_data __initdata ek_udc_data = { 162static struct at91_udc_data __initdata ek_udc_data = {
161 .vbus_pin = AT91_PIN_PB29, 163 .vbus_pin = AT91_PIN_PB29,
162 .pullup_pin = 0, /* pull-up driven by UDC */ 164 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
163}; 165};
164 166
165 167
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
182static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
183 .ale = 22, 185 .ale = 22,
184 .cle = 21, 186 .cle = 21,
185// .det_pin = ... not connected 187 .det_pin = -EINVAL,
186 .rdy_pin = AT91_PIN_PC15, 188 .rdy_pin = AT91_PIN_PC15,
187 .enable_pin = AT91_PIN_PC14, 189 .enable_pin = AT91_PIN_PC14,
188 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void)
217 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
218 220
219 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
220 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
221 223
222 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
223} 225}
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = {
345 */ 347 */
346static struct at91_mmc_data __initdata ek_mmc_data = { 348static struct at91_mmc_data __initdata ek_mmc_data = {
347 .wire4 = 1, 349 .wire4 = 1,
350 .det_pin = -EINVAL,
351 .wp_pin = -EINVAL,
352 .vcc_pin = -EINVAL,
348}; 353};
349 354
350#endif /* CONFIG_SPI_ATMEL_* */ 355#endif /* CONFIG_SPI_ATMEL_* */
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index fcf194e6e4fe..29f66052fe63 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
74static struct at91_usbh_data __initdata ek_usbh_data = { 74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2, 75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77 .overcurrent_pin= {-EINVAL, -EINVAL},
77}; 78};
78 79
79/* 80/*
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
81 */ 82 */
82static struct at91_udc_data __initdata ek_udc_data = { 83static struct at91_udc_data __initdata ek_udc_data = {
83 .vbus_pin = AT91_PIN_PA25, 84 .vbus_pin = AT91_PIN_PA25,
84 .pullup_pin = 0, /* pull-up driven by UDC */ 85 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
85}; 86};
86 87
87 88
@@ -151,7 +152,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
151 .wire4 = 1, 152 .wire4 = 1,
152 .det_pin = AT91_PIN_PE18, 153 .det_pin = AT91_PIN_PE18,
153 .wp_pin = AT91_PIN_PE19, 154 .wp_pin = AT91_PIN_PE19,
154// .vcc_pin = ... not connected 155 .vcc_pin = -EINVAL,
155}; 156};
156 157
157 158
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
183static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
184 .ale = 21, 185 .ale = 21,
185 .cle = 22, 186 .cle = 22,
186// .det_pin = ... not connected 187 .det_pin = -EINVAL,
187 .rdy_pin = AT91_PIN_PA22, 188 .rdy_pin = AT91_PIN_PA22,
188 .enable_pin = AT91_PIN_PD15, 189 .enable_pin = AT91_PIN_PD15,
189 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void)
218 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
219 220
220 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
221 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
222 223
223 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
224} 225}
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {}
353 * reset_pin is not connected: NRST 354 * reset_pin is not connected: NRST
354 */ 355 */
355static struct ac97c_platform_data ek_ac97_data = { 356static struct ac97c_platform_data ek_ac97_data = {
357 .reset_pin = -EINVAL,
356}; 358};
357 359
358 360
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 78d27cc3cc09..843d6286c6f4 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -86,6 +86,8 @@ static void __init ek_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata ek_usbh_data = { 87static struct at91_usbh_data __initdata ek_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata ek_udc_data = { 96static struct at91_udc_data __initdata ek_udc_data = {
95 .vbus_pin = AT91_PIN_PC5, 97 .vbus_pin = AT91_PIN_PC5,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99 101
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
163 .cle = 22, 165 .cle = 22,
164 .rdy_pin = AT91_PIN_PC13, 166 .rdy_pin = AT91_PIN_PC13,
165 .enable_pin = AT91_PIN_PC14, 167 .enable_pin = AT91_PIN_PC14,
168 .det_pin = -EINVAL,
166 .parts = ek_nand_partition, 169 .parts = ek_nand_partition,
167 .num_parts = ARRAY_SIZE(ek_nand_partition), 170 .num_parts = ARRAY_SIZE(ek_nand_partition),
168}; 171};
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void)
195 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 198 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
196 199
197 /* configure chip-select 3 (NAND) */ 200 /* configure chip-select 3 (NAND) */
198 sam9_smc_configure(3, &ek_nand_smc_config); 201 sam9_smc_configure(0, 3, &ek_nand_smc_config);
199 202
200 at91_add_device_nand(&ek_nand_data); 203 at91_add_device_nand(&ek_nand_data);
201} 204}
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = {
210 .slot[1] = { 213 .slot[1] = {
211 .bus_width = 4, 214 .bus_width = 4,
212 .detect_pin = AT91_PIN_PC9, 215 .detect_pin = AT91_PIN_PC9,
216 .wp_pin = -EINVAL,
213 }, 217 },
214 218
215}; 219};
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
218 .slot_b = 1, /* Only one slot so use slot B */ 222 .slot_b = 1, /* Only one slot so use slot B */
219 .wire4 = 1, 223 .wire4 = 1,
220 .det_pin = AT91_PIN_PC9, 224 .det_pin = AT91_PIN_PC9,
225 .wp_pin = -EINVAL,
226 .vcc_pin = -EINVAL,
221}; 227};
222#endif 228#endif
223 229
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void)
227 if (ek_have_2mmc()) { 233 if (ek_have_2mmc()) {
228 ek_mmc_data.slot[0].bus_width = 4; 234 ek_mmc_data.slot[0].bus_width = 4;
229 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; 235 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
236 ek_mmc_data.slot[0].wp_pin = -1;
230 } 237 }
231 at91_add_device_mci(0, &ek_mmc_data); 238 at91_add_device_mci(0, &ek_mmc_data);
232#else 239#else
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 4e1ee9d87096..ea0d1b9c2b7b 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -69,6 +69,7 @@ static void __init ek_init_early(void)
69static struct at91_usbh_data __initdata ek_usbh_hs_data = { 69static struct at91_usbh_data __initdata ek_usbh_hs_data = {
70 .ports = 2, 70 .ports = 2,
71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, 71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
72}; 73};
73 74
74 75
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = {
100 .slot[0] = { 101 .slot[0] = {
101 .bus_width = 4, 102 .bus_width = 4,
102 .detect_pin = AT91_PIN_PD10, 103 .detect_pin = AT91_PIN_PD10,
104 .wp_pin = -EINVAL,
103 }, 105 },
104}; 106};
105 107
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
143 .cle = 22, 145 .cle = 22,
144 .rdy_pin = AT91_PIN_PC8, 146 .rdy_pin = AT91_PIN_PC8,
145 .enable_pin = AT91_PIN_PC14, 147 .enable_pin = AT91_PIN_PC14,
148 .det_pin = -EINVAL,
146 .parts = ek_nand_partition, 149 .parts = ek_nand_partition,
147 .num_parts = ARRAY_SIZE(ek_nand_partition), 150 .num_parts = ARRAY_SIZE(ek_nand_partition),
148}; 151};
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void)
175 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 178 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
176 179
177 /* configure chip-select 3 (NAND) */ 180 /* configure chip-select 3 (NAND) */
178 sam9_smc_configure(3, &ek_nand_smc_config); 181 sam9_smc_configure(0, 3, &ek_nand_smc_config);
179 182
180 at91_add_device_nand(&ek_nand_data); 183 at91_add_device_nand(&ek_nand_data);
181} 184}
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {}
330 * reset_pin is not connected: NRST 333 * reset_pin is not connected: NRST
331 */ 334 */
332static struct ac97c_platform_data ek_ac97_data = { 335static struct ac97c_platform_data ek_ac97_data = {
336 .reset_pin = -EINVAL,
333}; 337};
334 338
335 339
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b2b748239f36..c1366d0032bf 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
67static struct at91_mmc_data __initdata ek_mmc_data = { 67static struct at91_mmc_data __initdata ek_mmc_data = {
68 .wire4 = 1, 68 .wire4 = 1,
69 .det_pin = AT91_PIN_PA15, 69 .det_pin = AT91_PIN_PA15,
70// .wp_pin = ... not connected 70 .wp_pin = -EINVAL,
71// .vcc_pin = ... not connected 71 .vcc_pin = -EINVAL,
72}; 72};
73 73
74 74
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
91static struct atmel_nand_data __initdata ek_nand_data = { 91static struct atmel_nand_data __initdata ek_nand_data = {
92 .ale = 21, 92 .ale = 21,
93 .cle = 22, 93 .cle = 22,
94// .det_pin = ... not connected 94 .det_pin = -EINVAL,
95 .rdy_pin = AT91_PIN_PD17, 95 .rdy_pin = AT91_PIN_PD17,
96 .enable_pin = AT91_PIN_PB6, 96 .enable_pin = AT91_PIN_PB6,
97 .parts = ek_nand_partition, 97 .parts = ek_nand_partition,
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
119static void __init ek_add_device_nand(void) 119static void __init ek_add_device_nand(void)
120{ 120{
121 /* configure chip-select 3 (NAND) */ 121 /* configure chip-select 3 (NAND) */
122 sam9_smc_configure(3, &ek_nand_smc_config); 122 sam9_smc_configure(0, 3, &ek_nand_smc_config);
123 123
124 at91_add_device_nand(&ek_nand_data); 124 at91_add_device_nand(&ek_nand_data);
125} 125}
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
204 * reset_pin is not connected: NRST 204 * reset_pin is not connected: NRST
205 */ 205 */
206static struct ac97c_platform_data ek_ac97_data = { 206static struct ac97c_platform_data ek_ac97_data = {
207 .reset_pin = -EINVAL,
207}; 208};
208 209
209 210
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index fbec934a7ce9..4770db08e5a6 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void)
57 57
58static struct at91_usbh_data __initdata snapper9260_usbh_data = { 58static struct at91_usbh_data __initdata snapper9260_usbh_data = {
59 .ports = 2, 59 .ports = 2,
60 .vbus_pin = {-EINVAL, -EINVAL},
61 .overcurrent_pin= {-EINVAL, -EINVAL},
60}; 62};
61 63
62static struct at91_udc_data __initdata snapper9260_udc_data = { 64static struct at91_udc_data __initdata snapper9260_udc_data = {
63 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), 65 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5),
64 .vbus_active_low = 1, 66 .vbus_active_low = 1,
65 .vbus_polled = 1, 67 .vbus_polled = 1,
68 .pullup_pin = -EINVAL,
66}; 69};
67 70
68static struct macb_platform_data snapper9260_macb_data = { 71static struct macb_platform_data snapper9260_macb_data = {
72 .phy_irq_pin = -EINVAL,
69 .is_rmii = 1, 73 .is_rmii = 1,
70}; 74};
71 75
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = {
104 .parts = snapper9260_nand_partitions, 108 .parts = snapper9260_nand_partitions,
105 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), 109 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions),
106 .bus_width_16 = 0, 110 .bus_width_16 = 0,
111 .enable_pin = -EINVAL,
112 .det_pin = -EINVAL,
107}; 113};
108 114
109static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { 115static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
149static void __init snapper9260_add_device_nand(void) 155static void __init snapper9260_add_device_nand(void)
150{ 156{
151 at91_set_A_periph(AT91_PIN_PC14, 0); 157 at91_set_A_periph(AT91_PIN_PC14, 0);
152 sam9_smc_configure(3, &snapper9260_nand_smc_config); 158 sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
153 at91_add_device_nand(&snapper9260_nand_data); 159 at91_add_device_nand(&snapper9260_nand_data);
154} 160}
155 161
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 7c06c07d872b..72eb3b4d9ab6 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = {
85 .rdy_pin = AT91_PIN_PC13, 85 .rdy_pin = AT91_PIN_PC13,
86 .enable_pin = AT91_PIN_PC14, 86 .enable_pin = AT91_PIN_PC14,
87 .bus_width_16 = 0, 87 .bus_width_16 = 0,
88 .det_pin = -EINVAL,
88}; 89};
89 90
90static struct sam9_smc_config __initdata nand_smc_config = { 91static struct sam9_smc_config __initdata nand_smc_config = {
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = {
108static void __init add_device_nand(void) 109static void __init add_device_nand(void)
109{ 110{
110 /* configure chip-select 3 (NAND) */ 111 /* configure chip-select 3 (NAND) */
111 sam9_smc_configure(3, &nand_smc_config); 112 sam9_smc_configure(0, 3, &nand_smc_config);
112 113
113 at91_add_device_nand(&nand_data); 114 at91_add_device_nand(&nand_data);
114} 115}
@@ -122,12 +123,17 @@ static void __init add_device_nand(void)
122static struct mci_platform_data __initdata mmc_data = { 123static struct mci_platform_data __initdata mmc_data = {
123 .slot[0] = { 124 .slot[0] = {
124 .bus_width = 4, 125 .bus_width = 4,
126 .detect_pin = -1,
127 .wp_pin = -1,
125 }, 128 },
126}; 129};
127#else 130#else
128static struct at91_mmc_data __initdata mmc_data = { 131static struct at91_mmc_data __initdata mmc_data = {
129 .slot_b = 0, 132 .slot_b = 0,
130 .wire4 = 1, 133 .wire4 = 1,
134 .det_pin = -EINVAL,
135 .wp_pin = -EINVAL,
136 .vcc_pin = -EINVAL,
131}; 137};
132#endif 138#endif
133 139
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = {
137 */ 143 */
138static struct at91_usbh_data __initdata usbh_data = { 144static struct at91_usbh_data __initdata usbh_data = {
139 .ports = 2, 145 .ports = 2,
146 .vbus_pin = {-EINVAL, -EINVAL},
147 .overcurrent_pin= {-EINVAL, -EINVAL},
140}; 148};
141 149
142 150
@@ -145,12 +153,12 @@ static struct at91_usbh_data __initdata usbh_data = {
145 */ 153 */
146static struct at91_udc_data __initdata portuxg20_udc_data = { 154static struct at91_udc_data __initdata portuxg20_udc_data = {
147 .vbus_pin = AT91_PIN_PC7, 155 .vbus_pin = AT91_PIN_PC7,
148 .pullup_pin = 0, /* pull-up driven by UDC */ 156 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
149}; 157};
150 158
151static struct at91_udc_data __initdata stamp9g20evb_udc_data = { 159static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
152 .vbus_pin = AT91_PIN_PA22, 160 .vbus_pin = AT91_PIN_PA22,
153 .pullup_pin = 0, /* pull-up driven by UDC */ 161 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
154}; 162};
155 163
156 164
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 3d84233f78eb..26c36fc2d1e5 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -66,6 +66,8 @@ static void __init ek_init_early(void)
66 */ 66 */
67static struct at91_usbh_data __initdata ek_usbh_data = { 67static struct at91_usbh_data __initdata ek_usbh_data = {
68 .ports = 2, 68 .ports = 2,
69 .vbus_pin = {-EINVAL, -EINVAL},
70 .overcurrent_pin= {-EINVAL, -EINVAL},
69}; 71};
70 72
71/* 73/*
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
73 */ 75 */
74static struct at91_udc_data __initdata ek_udc_data = { 76static struct at91_udc_data __initdata ek_udc_data = {
75 .vbus_pin = AT91_PIN_PB11, 77 .vbus_pin = AT91_PIN_PB11,
76 .pullup_pin = 0, /* pull-up driven by UDC */ 78 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
77}; 79};
78 80
79static void __init ek_add_device_udc(void) 81static void __init ek_add_device_udc(void)
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
193static struct atmel_nand_data __initdata ek_nand_data = { 195static struct atmel_nand_data __initdata ek_nand_data = {
194 .ale = 21, 196 .ale = 21,
195 .cle = 22, 197 .cle = 22,
196// .det_pin = ... not connected 198 .det_pin = -EINVAL,
197 .rdy_pin = AT91_PIN_PA22, 199 .rdy_pin = AT91_PIN_PA22,
198 .enable_pin = AT91_PIN_PD15, 200 .enable_pin = AT91_PIN_PD15,
199 .parts = ek_nand_partition, 201 .parts = ek_nand_partition,
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void)
245 247
246 /* configure chip-select 3 (NAND) */ 248 /* configure chip-select 3 (NAND) */
247 if (machine_is_usb_a9g20()) 249 if (machine_is_usb_a9g20())
248 sam9_smc_configure(3, &usb_a9g20_nand_smc_config); 250 sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config);
249 else 251 else
250 sam9_smc_configure(3, &usb_a9260_nand_smc_config); 252 sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config);
251 253
252 at91_add_device_nand(&ek_nand_data); 254 at91_add_device_nand(&ek_nand_data);
253} 255}
@@ -344,7 +346,7 @@ static void __init ek_board_init(void)
344 /* I2C */ 346 /* I2C */
345 at91_add_device_i2c(NULL, 0); 347 at91_add_device_i2c(NULL, 0);
346 /* shutdown controller, wakeup button (5 msec low) */ 348 /* shutdown controller, wakeup button (5 msec low) */
347 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) 349 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
348 | AT91_SHDW_WKMODE0_LOW 350 | AT91_SHDW_WKMODE0_LOW
349 | AT91_SHDW_RTTWKEN); 351 | AT91_SHDW_RTTWKEN);
350 } 352 }
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 2c40a21b2794..bbd553e1cd93 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -120,6 +120,8 @@ static struct macb_platform_data __initdata yl9200_eth_data = {
120 */ 120 */
121static struct at91_usbh_data __initdata yl9200_usbh_data = { 121static struct at91_usbh_data __initdata yl9200_usbh_data = {
122 .ports = 1, /* PQFP version of AT91RM9200 */ 122 .ports = 1, /* PQFP version of AT91RM9200 */
123 .vbus_pin = {-EINVAL, -EINVAL},
124 .overcurrent_pin= {-EINVAL, -EINVAL},
123}; 125};
124 126
125/* 127/*
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = {
137 */ 139 */
138static struct at91_mmc_data __initdata yl9200_mmc_data = { 140static struct at91_mmc_data __initdata yl9200_mmc_data = {
139 .det_pin = AT91_PIN_PB9, 141 .det_pin = AT91_PIN_PB9,
140 // .wp_pin = ... not connected
141 .wire4 = 1, 142 .wire4 = 1,
143 .wp_pin = -EINVAL,
144 .vcc_pin = -EINVAL,
142}; 145};
143 146
144/* 147/*
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
175static struct atmel_nand_data __initdata yl9200_nand_data = { 178static struct atmel_nand_data __initdata yl9200_nand_data = {
176 .ale = 6, 179 .ale = 6,
177 .cle = 7, 180 .cle = 7,
178 // .det_pin = ... not connected 181 .det_pin = -EINVAL,
179 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ 182 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
180 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ 183 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
181 .parts = yl9200_nand_partition, 184 .parts = yl9200_nand_partition,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 938b34f57741..4866b8180d66 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
29 /* Timer */ 29 /* Timer */
30struct sys_timer; 30struct sys_timer;
31extern struct sys_timer at91rm9200_timer; 31extern struct sys_timer at91rm9200_timer;
32extern void at91sam926x_ioremap_pit(u32 addr);
32extern struct sys_timer at91sam926x_timer; 33extern struct sys_timer at91sam926x_timer;
33extern struct sys_timer at91x40_timer; 34extern struct sys_timer at91x40_timer;
34 35
@@ -57,7 +58,10 @@ extern void at91_irq_suspend(void);
57extern void at91_irq_resume(void); 58extern void at91_irq_resume(void);
58 59
59/* reset */ 60/* reset */
60extern void at91sam9_alt_reset(void); 61extern void at91sam9_alt_restart(char, const char *);
62
63/* shutdown */
64extern void at91_ioremap_shdwc(u32 base_addr);
61 65
62 /* GPIO */ 66 /* GPIO */
63#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ 67#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
@@ -65,11 +69,9 @@ extern void at91sam9_alt_reset(void);
65 69
66struct at91_gpio_bank { 70struct at91_gpio_bank {
67 unsigned short id; /* peripheral ID */ 71 unsigned short id; /* peripheral ID */
68 unsigned long offset; /* offset from system peripheral base */ 72 unsigned long regbase; /* offset from system peripheral base */
69 struct clk *clock; /* associated clock */
70}; 73};
71extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 74extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
72extern void __init at91_gpio_irq_setup(void); 75extern void __init at91_gpio_irq_setup(void);
73 76
74extern void (*at91_arch_reset)(void);
75extern int at91_extern_irq; 77extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 224e9e2f8674..74d6783eeabb 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -29,8 +29,9 @@
29struct at91_gpio_chip { 29struct at91_gpio_chip {
30 struct gpio_chip chip; 30 struct gpio_chip chip;
31 struct at91_gpio_chip *next; /* Bank sharing same clock */ 31 struct at91_gpio_chip *next; /* Bank sharing same clock */
32 struct at91_gpio_bank *bank; /* Bank definition */ 32 int id; /* ID of register bank */
33 void __iomem *regbase; /* Base of register bank */ 33 void __iomem *regbase; /* Base of register bank */
34 struct clk *clock; /* associated clock */
34}; 35};
35 36
36#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 37#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
58 } 59 }
59 60
60static struct at91_gpio_chip gpio_chip[] = { 61static struct at91_gpio_chip gpio_chip[] = {
61 AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), 62 AT91_GPIO_CHIP("pioA", 0x00, 32),
62 AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), 63 AT91_GPIO_CHIP("pioB", 0x20, 32),
63 AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), 64 AT91_GPIO_CHIP("pioC", 0x40, 32),
64 AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), 65 AT91_GPIO_CHIP("pioD", 0x60, 32),
65 AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), 66 AT91_GPIO_CHIP("pioE", 0x80, 32),
66}; 67};
67 68
68static int gpio_banks; 69static int gpio_banks;
69 70
70static inline void __iomem *pin_to_controller(unsigned pin) 71static inline void __iomem *pin_to_controller(unsigned pin)
71{ 72{
72 pin -= PIN_BASE;
73 pin /= 32; 73 pin /= 32;
74 if (likely(pin < gpio_banks)) 74 if (likely(pin < gpio_banks))
75 return gpio_chip[pin].regbase; 75 return gpio_chip[pin].regbase;
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin)
79 79
80static inline unsigned pin_to_mask(unsigned pin) 80static inline unsigned pin_to_mask(unsigned pin)
81{ 81{
82 pin -= PIN_BASE;
83 return 1 << (pin % 32); 82 return 1 << (pin % 32);
84} 83}
85 84
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS];
274 273
275static int gpio_irq_set_wake(struct irq_data *d, unsigned state) 274static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
276{ 275{
277 unsigned mask = pin_to_mask(d->irq); 276 unsigned pin = irq_to_gpio(d->irq);
278 unsigned bank = (d->irq - PIN_BASE) / 32; 277 unsigned mask = pin_to_mask(pin);
278 unsigned bank = pin / 32;
279 279
280 if (unlikely(bank >= MAX_GPIO_BANKS)) 280 if (unlikely(bank >= MAX_GPIO_BANKS))
281 return -EINVAL; 281 return -EINVAL;
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
285 else 285 else
286 wakeups[bank] &= ~mask; 286 wakeups[bank] &= ~mask;
287 287
288 irq_set_irq_wake(gpio_chip[bank].bank->id, state); 288 irq_set_irq_wake(gpio_chip[bank].id, state);
289 289
290 return 0; 290 return 0;
291} 291}
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void)
302 __raw_writel(wakeups[i], pio + PIO_IER); 302 __raw_writel(wakeups[i], pio + PIO_IER);
303 303
304 if (!wakeups[i]) 304 if (!wakeups[i])
305 clk_disable(gpio_chip[i].bank->clock); 305 clk_disable(gpio_chip[i].clock);
306 else { 306 else {
307#ifdef CONFIG_PM_DEBUG 307#ifdef CONFIG_PM_DEBUG
308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); 308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -319,7 +319,7 @@ void at91_gpio_resume(void)
319 void __iomem *pio = gpio_chip[i].regbase; 319 void __iomem *pio = gpio_chip[i].regbase;
320 320
321 if (!wakeups[i]) 321 if (!wakeups[i])
322 clk_enable(gpio_chip[i].bank->clock); 322 clk_enable(gpio_chip[i].clock);
323 323
324 __raw_writel(wakeups[i], pio + PIO_IDR); 324 __raw_writel(wakeups[i], pio + PIO_IDR);
325 __raw_writel(backups[i], pio + PIO_IER); 325 __raw_writel(backups[i], pio + PIO_IER);
@@ -344,8 +344,9 @@ void at91_gpio_resume(void)
344 344
345static void gpio_irq_mask(struct irq_data *d) 345static void gpio_irq_mask(struct irq_data *d)
346{ 346{
347 void __iomem *pio = pin_to_controller(d->irq); 347 unsigned pin = irq_to_gpio(d->irq);
348 unsigned mask = pin_to_mask(d->irq); 348 void __iomem *pio = pin_to_controller(pin);
349 unsigned mask = pin_to_mask(pin);
349 350
350 if (pio) 351 if (pio)
351 __raw_writel(mask, pio + PIO_IDR); 352 __raw_writel(mask, pio + PIO_IDR);
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d)
353 354
354static void gpio_irq_unmask(struct irq_data *d) 355static void gpio_irq_unmask(struct irq_data *d)
355{ 356{
356 void __iomem *pio = pin_to_controller(d->irq); 357 unsigned pin = irq_to_gpio(d->irq);
357 unsigned mask = pin_to_mask(d->irq); 358 void __iomem *pio = pin_to_controller(pin);
359 unsigned mask = pin_to_mask(pin);
358 360
359 if (pio) 361 if (pio)
360 __raw_writel(mask, pio + PIO_IER); 362 __raw_writel(mask, pio + PIO_IER);
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = {
382 384
383static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 385static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
384{ 386{
385 unsigned pin; 387 unsigned irq_pin;
386 struct irq_data *idata = irq_desc_get_irq_data(desc); 388 struct irq_data *idata = irq_desc_get_irq_data(desc);
387 struct irq_chip *chip = irq_data_get_irq_chip(idata); 389 struct irq_chip *chip = irq_data_get_irq_chip(idata);
388 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); 390 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
405 continue; 407 continue;
406 } 408 }
407 409
408 pin = at91_gpio->chip.base; 410 irq_pin = gpio_to_irq(at91_gpio->chip.base);
409 411
410 while (isr) { 412 while (isr) {
411 if (isr & 1) 413 if (isr & 1)
412 generic_handle_irq(pin); 414 generic_handle_irq(irq_pin);
413 pin++; 415 irq_pin++;
414 isr >>= 1; 416 isr >>= 1;
415 } 417 }
416 } 418 }
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
438 seq_printf(s, "%i:\t", j); 440 seq_printf(s, "%i:\t", j);
439 441
440 for (bank = 0; bank < gpio_banks; bank++) { 442 for (bank = 0; bank < gpio_banks; bank++) {
441 unsigned pin = PIN_BASE + (32 * bank) + j; 443 unsigned pin = (32 * bank) + j;
442 void __iomem *pio = pin_to_controller(pin); 444 void __iomem *pio = pin_to_controller(pin);
443 unsigned mask = pin_to_mask(pin); 445 unsigned mask = pin_to_mask(pin);
444 446
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class;
491 */ 493 */
492void __init at91_gpio_irq_setup(void) 494void __init at91_gpio_irq_setup(void)
493{ 495{
494 unsigned pioc, pin; 496 unsigned pioc, irq = gpio_to_irq(0);
495 struct at91_gpio_chip *this, *prev; 497 struct at91_gpio_chip *this, *prev;
496 498
497 for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; 499 for (pioc = 0, this = gpio_chip, prev = NULL;
498 pioc++ < gpio_banks; 500 pioc++ < gpio_banks;
499 prev = this, this++) { 501 prev = this, this++) {
500 unsigned id = this->bank->id; 502 unsigned id = this->id;
501 unsigned i; 503 unsigned i;
502 504
503 __raw_writel(~0, this->regbase + PIO_IDR); 505 __raw_writel(~0, this->regbase + PIO_IDR);
504 506
505 for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { 507 for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32;
506 irq_set_lockdep_class(pin, &gpio_lock_class); 508 i++, irq++) {
509 irq_set_lockdep_class(irq, &gpio_lock_class);
507 510
508 /* 511 /*
509 * Can use the "simple" and not "edge" handler since it's 512 * Can use the "simple" and not "edge" handler since it's
510 * shorter, and the AIC handles interrupts sanely. 513 * shorter, and the AIC handles interrupts sanely.
511 */ 514 */
512 irq_set_chip_and_handler(pin, &gpio_irqchip, 515 irq_set_chip_and_handler(irq, &gpio_irqchip,
513 handle_simple_irq); 516 handle_simple_irq);
514 set_irq_flags(pin, IRQF_VALID); 517 set_irq_flags(irq, IRQF_VALID);
515 } 518 }
516 519
517 /* The toplevel handler handles one bank of GPIOs, except 520 /* The toplevel handler handles one bank of GPIOs, except
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void)
524 irq_set_chip_data(id, this); 527 irq_set_chip_data(id, this);
525 irq_set_chained_handler(id, gpio_irq_handler); 528 irq_set_chained_handler(id, gpio_irq_handler);
526 } 529 }
527 pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); 530 pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks);
528} 531}
529 532
530/* gpiolib support */ 533/* gpiolib support */
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
612 for (i = 0; i < nr_banks; i++) { 615 for (i = 0; i < nr_banks; i++) {
613 at91_gpio = &gpio_chip[i]; 616 at91_gpio = &gpio_chip[i];
614 617
615 at91_gpio->bank = &data[i]; 618 at91_gpio->id = data[i].id;
616 at91_gpio->chip.base = PIN_BASE + i * 32; 619 at91_gpio->chip.base = i * 32;
617 at91_gpio->regbase = at91_gpio->bank->offset + 620
618 (void __iomem *)AT91_VA_BASE_SYS; 621 at91_gpio->regbase = ioremap(data[i].regbase, 512);
622 if (!at91_gpio->regbase) {
623 pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i);
624 continue;
625 }
626
627 at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
628 if (!at91_gpio->clock) {
629 pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
630 continue;
631 }
619 632
620 /* enable PIO controller's clock */ 633 /* enable PIO controller's clock */
621 clk_enable(at91_gpio->bank->clock); 634 clk_enable(at91_gpio->clock);
622 635
623 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ 636 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
624 if (last && last->bank->id == at91_gpio->bank->id) 637 if (last && last->id == at91_gpio->id)
625 last->next = at91_gpio; 638 last->next = at91_gpio;
626 last = at91_gpio; 639 last = at91_gpio;
627 640
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 03566799d3be..3045781c473f 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -16,7 +16,19 @@
16#ifndef AT91_AIC_H 16#ifndef AT91_AIC_H
17#define AT91_AIC_H 17#define AT91_AIC_H
18 18
19#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_aic_base;
21
22#define at91_aic_read(field) \
23 __raw_readl(at91_aic_base + field)
24
25#define at91_aic_write(field, value) \
26 __raw_writel(value, at91_aic_base + field);
27#else
28.extern at91_aic_base
29#endif
30
31#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */
20#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ 32#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
21#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ 33#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
22#define AT91_AIC_SRCTYPE_LOW (0 << 5) 34#define AT91_AIC_SRCTYPE_LOW (0 << 5)
@@ -24,30 +36,30 @@
24#define AT91_AIC_SRCTYPE_HIGH (2 << 5) 36#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
25#define AT91_AIC_SRCTYPE_RISING (3 << 5) 37#define AT91_AIC_SRCTYPE_RISING (3 << 5)
26 38
27#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ 39#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
28#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ 40#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */
29#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ 41#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */
30#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ 42#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */
31#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ 43#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
32 44
33#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ 45#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */
34#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ 46#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */
35#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ 47#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */
36#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ 48#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
37#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ 49#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
38 50
39#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ 51#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */
40#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ 52#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */
41#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ 53#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */
42#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ 54#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */
43#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ 55#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */
44#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ 56#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */
45#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ 57#define AT91_AIC_DCR 0x138 /* Debug Control Register */
46#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ 58#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
47#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ 59#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
48 60
49#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ 61#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */
50#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ 62#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */
51#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ 63#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */
52 64
53#endif 65#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
19#define dbgu_readl(dbgu, field) \ 19#define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) 20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
21 21
22#ifdef AT91_DBGU 22#if !defined(CONFIG_ARCH_AT91X40)
23#define AT91_DBGU_CR (0x00) /* Control Register */ 23#define AT91_DBGU_CR (0x00) /* Control Register */
24#define AT91_DBGU_MR (0x04) /* Mode Register */ 24#define AT91_DBGU_MR (0x04) /* Mode Register */
25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ 25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 974d0bd05b5b..d1f80ad7f4d4 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -16,16 +16,16 @@
16#ifndef AT91_PIT_H 16#ifndef AT91_PIT_H
17#define AT91_PIT_H 17#define AT91_PIT_H
18 18
19#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ 19#define AT91_PIT_MR 0x00 /* Mode Register */
20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ 20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ 21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ 22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
23 23
24#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ 24#define AT91_PIT_SR 0x04 /* Status Register */
25#define AT91_PIT_PITS (1 << 0) /* Timer Status */ 25#define AT91_PIT_PITS (1 << 0) /* Timer Status */
26 26
27#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ 27#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
28#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ 28#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ 29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ 30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
31 31
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
index e56f4701a3e5..da1945e5f714 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -16,7 +16,7 @@
16#ifndef AT91_RTC_H 16#ifndef AT91_RTC_H
17#define AT91_RTC_H 17#define AT91_RTC_H
18 18
19#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ 19#define AT91_RTC_CR 0x00 /* Control Register */
20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ 20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */
21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ 21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */
22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ 22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */
@@ -29,44 +29,44 @@
29#define AT91_RTC_CALEVSEL_MONTH (1 << 16) 29#define AT91_RTC_CALEVSEL_MONTH (1 << 16)
30#define AT91_RTC_CALEVSEL_YEAR (2 << 16) 30#define AT91_RTC_CALEVSEL_YEAR (2 << 16)
31 31
32#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ 32#define AT91_RTC_MR 0x04 /* Mode Register */
33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ 33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */
34 34
35#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ 35#define AT91_RTC_TIMR 0x08 /* Time Register */
36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ 36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ 37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ 38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ 39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
40 40
41#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ 41#define AT91_RTC_CALR 0x0c /* Calendar Register */
42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ 42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */
43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ 43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */
44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ 44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */
45#define AT91_RTC_DAY (7 << 21) /* Current Day */ 45#define AT91_RTC_DAY (7 << 21) /* Current Day */
46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ 46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */
47 47
48#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ 48#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */
49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ 49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */
50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ 50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */
51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ 51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */
52 52
53#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ 53#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */
54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ 54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */
55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ 55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */
56 56
57#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ 57#define AT91_RTC_SR 0x18 /* Status Register */
58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ 58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */
59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ 59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */
60#define AT91_RTC_SECEV (1 << 2) /* Second Event */ 60#define AT91_RTC_SECEV (1 << 2) /* Second Event */
61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ 61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */
62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ 62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */
63 63
64#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ 64#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */
65#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ 65#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */
66#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ 66#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
67#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ 67#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
68 68
69#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ 69#define AT91_RTC_VER 0x2c /* Valid Entry Register */
70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ 70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */
71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ 71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */
72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ 72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index c4ce07e8a8fa..1d4fe822c77a 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -16,11 +16,21 @@
16#ifndef AT91_SHDWC_H 16#ifndef AT91_SHDWC_H
17#define AT91_SHDWC_H 17#define AT91_SHDWC_H
18 18
19#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_shdwc_base;
21
22#define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
24
25#define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field);
27#endif
28
29#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
20#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ 30#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
21#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ 31#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
22 32
23#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ 33#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
24#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ 34#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
25#define AT91_SHDW_WKMODE0_NONE 0 35#define AT91_SHDW_WKMODE0_NONE 0
26#define AT91_SHDW_WKMODE0_HIGH 1 36#define AT91_SHDW_WKMODE0_HIGH 1
@@ -30,7 +40,7 @@
30#define AT91_SHDW_CPTWK0_(x) ((x) << 4) 40#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
31#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ 41#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
32 42
33#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ 43#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
34#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ 44#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
35#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ 45#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
36#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ 46#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index c5df1e8f1955..4c0e2f6011d7 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -79,29 +79,28 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
83#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) 82#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS)
84#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS)
88#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
89#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
90#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
91#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
92#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
93#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
94#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
95#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
96#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
97#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
98#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
99#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
100#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
101#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ 87#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
102 (0xfffffd50 - AT91_BASE_SYS) : \ 88 (0xfffffd50 - AT91_BASE_SYS) : \
103 (0xfffffd60 - AT91_BASE_SYS)) 89 (0xfffffd60 - AT91_BASE_SYS))
104 90
91#define AT91CAP9_BASE_ECC 0xffffe200
92#define AT91CAP9_BASE_DMA 0xffffec00
93#define AT91CAP9_BASE_SMC 0xffffe800
94#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1
95#define AT91CAP9_BASE_PIOA 0xfffff200
96#define AT91CAP9_BASE_PIOB 0xfffff400
97#define AT91CAP9_BASE_PIOC 0xfffff600
98#define AT91CAP9_BASE_PIOD 0xfffff800
99#define AT91CAP9_BASE_SHDWC 0xfffffd10
100#define AT91CAP9_BASE_RTT 0xfffffd20
101#define AT91CAP9_BASE_PIT 0xfffffd30
102#define AT91CAP9_BASE_WDT 0xfffffd40
103
105#define AT91_USART0 AT91CAP9_BASE_US0 104#define AT91_USART0 AT91CAP9_BASE_US0
106#define AT91_USART1 AT91CAP9_BASE_US1 105#define AT91_USART1 AT91CAP9_BASE_US1
107#define AT91_USART2 AT91CAP9_BASE_US2 106#define AT91_USART2 AT91CAP9_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index e4037b500302..bacb51141819 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -79,17 +79,17 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
83#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */
84#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */
85#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */
86#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */
87#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */
88#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ 82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
89#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ 83#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */
90#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
91#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 84#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
92 85
86#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
87#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
88#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
89#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */
90#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */
91#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
92
93#define AT91_USART0 AT91RM9200_BASE_US0 93#define AT91_USART0 AT91RM9200_BASE_US0
94#define AT91_USART1 AT91RM9200_BASE_US1 94#define AT91_USART1 AT91RM9200_BASE_US1
95#define AT91_USART2 AT91RM9200_BASE_US2 95#define AT91_USART2 AT91RM9200_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 9a791165913f..f937c476bb67 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,24 +80,23 @@
80/* 80/*
81 * System Peripherals (offset from AT91_BASE_SYS) 81 * System Peripherals (offset from AT91_BASE_SYS)
82 */ 82 */
83#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
84#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
88#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
89#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
90#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
91#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
92#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
93#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
94#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
95#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
96#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
97#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
98#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 87#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
100 88
89#define AT91SAM9260_BASE_ECC 0xffffe800
90#define AT91SAM9260_BASE_SMC 0xffffec00
91#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
92#define AT91SAM9260_BASE_PIOA 0xfffff400
93#define AT91SAM9260_BASE_PIOB 0xfffff600
94#define AT91SAM9260_BASE_PIOC 0xfffff800
95#define AT91SAM9260_BASE_SHDWC 0xfffffd10
96#define AT91SAM9260_BASE_RTT 0xfffffd20
97#define AT91SAM9260_BASE_PIT 0xfffffd30
98#define AT91SAM9260_BASE_WDT 0xfffffd40
99
101#define AT91_USART0 AT91SAM9260_BASE_US0 100#define AT91_USART0 AT91SAM9260_BASE_US0
102#define AT91_USART1 AT91SAM9260_BASE_US1 101#define AT91_USART1 AT91SAM9260_BASE_US1
103#define AT91_USART2 AT91SAM9260_BASE_US2 102#define AT91_USART2 AT91SAM9260_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index ce596204cefa..175604e261be 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -66,21 +66,21 @@
66 * System Peripherals (offset from AT91_BASE_SYS) 66 * System Peripherals (offset from AT91_BASE_SYS)
67 */ 67 */
68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
69#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
70#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
71#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
72#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
73#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
74#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
75#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 70#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 71#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
78#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
79#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
80#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
81#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
82#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 72#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
83 73
74#define AT91SAM9261_BASE_SMC 0xffffec00
75#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
76#define AT91SAM9261_BASE_PIOA 0xfffff400
77#define AT91SAM9261_BASE_PIOB 0xfffff600
78#define AT91SAM9261_BASE_PIOC 0xfffff800
79#define AT91SAM9261_BASE_SHDWC 0xfffffd10
80#define AT91SAM9261_BASE_RTT 0xfffffd20
81#define AT91SAM9261_BASE_PIT 0xfffffd30
82#define AT91SAM9261_BASE_WDT 0xfffffd40
83
84#define AT91_USART0 AT91SAM9261_BASE_US0 84#define AT91_USART0 AT91SAM9261_BASE_US0
85#define AT91_USART1 AT91SAM9261_BASE_US1 85#define AT91_USART1 AT91SAM9261_BASE_US1
86#define AT91_USART2 AT91SAM9261_BASE_US2 86#define AT91_USART2 AT91SAM9261_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index f1b92961a2b1..80c915002d83 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,30 +74,29 @@
74/* 74/*
75 * System Peripherals (offset from AT91_BASE_SYS) 75 * System Peripherals (offset from AT91_BASE_SYS)
76 */ 76 */
77#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS)
78#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) 77#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
79#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS)
80#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS)
81#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) 78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
82#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS)
83#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) 79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
84#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS)
85#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
87#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
88#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
89#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
90#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
91#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 80#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 81#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
94#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
95#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS)
96#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
97#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
98#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 82#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
100 83
84#define AT91SAM9263_BASE_ECC0 0xffffe000
85#define AT91SAM9263_BASE_SMC0 0xffffe400
86#define AT91SAM9263_BASE_ECC1 0xffffe600
87#define AT91SAM9263_BASE_SMC1 0xffffea00
88#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
89#define AT91SAM9263_BASE_PIOA 0xfffff200
90#define AT91SAM9263_BASE_PIOB 0xfffff400
91#define AT91SAM9263_BASE_PIOC 0xfffff600
92#define AT91SAM9263_BASE_PIOD 0xfffff800
93#define AT91SAM9263_BASE_PIOE 0xfffffa00
94#define AT91SAM9263_BASE_SHDWC 0xfffffd10
95#define AT91SAM9263_BASE_RTT0 0xfffffd20
96#define AT91SAM9263_BASE_PIT 0xfffffd30
97#define AT91SAM9263_BASE_WDT 0xfffffd40
98#define AT91SAM9263_BASE_RTT1 0xfffffd50
99
101#define AT91_USART0 AT91SAM9263_BASE_US0 100#define AT91_USART0 AT91SAM9263_BASE_US0
102#define AT91_USART1 AT91SAM9263_BASE_US1 101#define AT91_USART1 AT91SAM9263_BASE_US1
103#define AT91_USART2 AT91SAM9263_BASE_US2 102#define AT91_USART2 AT91SAM9263_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 57de6207e57e..eb18a70fa647 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,7 +16,9 @@
16#ifndef AT91SAM9_SMC_H 16#ifndef AT91SAM9_SMC_H
17#define AT91SAM9_SMC_H 17#define AT91SAM9_SMC_H
18 18
19#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ 19#include <mach/cpu.h>
20
21#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
20#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ 22#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
21#define AT91_SMC_NWESETUP_(x) ((x) << 0) 23#define AT91_SMC_NWESETUP_(x) ((x) << 0)
22#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ 24#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */
@@ -26,7 +28,7 @@
26#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ 28#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */
27#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) 29#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24)
28 30
29#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ 31#define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */
30#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ 32#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */
31#define AT91_SMC_NWEPULSE_(x) ((x) << 0) 33#define AT91_SMC_NWEPULSE_(x) ((x) << 0)
32#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ 34#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */
@@ -36,13 +38,13 @@
36#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ 38#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */
37#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) 39#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
38 40
39#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ 41#define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */
40#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ 42#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */
41#define AT91_SMC_NWECYCLE_(x) ((x) << 0) 43#define AT91_SMC_NWECYCLE_(x) ((x) << 0)
42#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ 44#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */
43#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) 45#define AT91_SMC_NRDCYCLE_(x) ((x) << 16)
44 46
45#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ 47#define AT91_SMC_MODE 0x0c /* Mode Register for CS n */
46#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ 48#define AT91_SMC_READMODE (1 << 0) /* Read Mode */
47#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ 49#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */
48#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ 50#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */
@@ -66,11 +68,4 @@
66#define AT91_SMC_PS_16 (2 << 28) 68#define AT91_SMC_PS_16 (2 << 28)
67#define AT91_SMC_PS_32 (3 << 28) 69#define AT91_SMC_PS_32 (3 << 28)
68 70
69#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */
70#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
71#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
72#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
73#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
74#endif
75
76#endif 71#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 406bb6496805..f0c23c960dec 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,27 +86,27 @@
86/* 86/*
87 * System Peripherals (offset from AT91_BASE_SYS) 87 * System Peripherals (offset from AT91_BASE_SYS)
88 */ 88 */
89#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
90#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) 89#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
91#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
92#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
93#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
94#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
95#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
96#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
97#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
98#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
99#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
100#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
101#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
102#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
103#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
104#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
105#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
106#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
107#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
108#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
109#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) 95
96#define AT91SAM9G45_BASE_ECC 0xffffe200
97#define AT91SAM9G45_BASE_DMA 0xffffec00
98#define AT91SAM9G45_BASE_SMC 0xffffe800
99#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1
100#define AT91SAM9G45_BASE_PIOA 0xfffff200
101#define AT91SAM9G45_BASE_PIOB 0xfffff400
102#define AT91SAM9G45_BASE_PIOC 0xfffff600
103#define AT91SAM9G45_BASE_PIOD 0xfffff800
104#define AT91SAM9G45_BASE_PIOE 0xfffffa00
105#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
106#define AT91SAM9G45_BASE_RTT 0xfffffd20
107#define AT91SAM9G45_BASE_PIT 0xfffffd30
108#define AT91SAM9G45_BASE_WDT 0xfffffd40
109#define AT91SAM9G45_BASE_RTC 0xfffffdb0
110 110
111#define AT91_USART0 AT91SAM9G45_BASE_US0 111#define AT91_USART0 AT91SAM9G45_BASE_US0
112#define AT91_USART1 AT91SAM9G45_BASE_US1 112#define AT91_USART1 AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 1aabacd315d4..2bb359e60b97 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,27 +69,26 @@
69/* 69/*
70 * System Peripherals (offset from AT91_BASE_SYS) 70 * System Peripherals (offset from AT91_BASE_SYS)
71 */ 71 */
72#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
73#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
74#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
75#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
76#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
77#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
78#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
79#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
80#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
81#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
82#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
83#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS)
84#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 74#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
85#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 75#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
86#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
87#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
88#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
89#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
90#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 76#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
91#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 77#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
92#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 78
79#define AT91SAM9RL_BASE_DMA 0xffffe600
80#define AT91SAM9RL_BASE_ECC 0xffffe800
81#define AT91SAM9RL_BASE_SMC 0xffffec00
82#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
83#define AT91SAM9RL_BASE_PIOA 0xfffff400
84#define AT91SAM9RL_BASE_PIOB 0xfffff600
85#define AT91SAM9RL_BASE_PIOC 0xfffff800
86#define AT91SAM9RL_BASE_PIOD 0xfffffa00
87#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
88#define AT91SAM9RL_BASE_RTT 0xfffffd20
89#define AT91SAM9RL_BASE_PIT 0xfffffd30
90#define AT91SAM9RL_BASE_WDT 0xfffffd40
91#define AT91SAM9RL_BASE_RTC 0xfffffe00
93 92
94#define AT91_USART0 AT91SAM9RL_BASE_US0 93#define AT91_USART0 AT91SAM9RL_BASE_US0
95#define AT91_USART1 AT91SAM9RL_BASE_US1 94#define AT91_USART1 AT91SAM9RL_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a152ff87e688..a57829f4fd18 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -40,7 +40,6 @@
40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ 40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */
41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ 41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */
42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ 42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */
43#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
44 43
45/* 44/*
46 * The AT91x40 series doesn't have a debug unit like the other AT91 parts. 45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index e209a2992245..d0b377b21bd7 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -44,10 +44,10 @@
44 44
45 /* USB Device */ 45 /* USB Device */
46struct at91_udc_data { 46struct at91_udc_data {
47 u8 vbus_pin; /* high == host powering us */ 47 int vbus_pin; /* high == host powering us */
48 u8 vbus_active_low; /* vbus polarity */ 48 u8 vbus_active_low; /* vbus polarity */
49 u8 vbus_polled; /* Use polling, not interrupt */ 49 u8 vbus_polled; /* Use polling, not interrupt */
50 u8 pullup_pin; /* active == D+ pulled up */ 50 int pullup_pin; /* active == D+ pulled up */
51 u8 pullup_active_low; /* true == pullup_pin is active low */ 51 u8 pullup_active_low; /* true == pullup_pin is active low */
52}; 52};
53extern void __init at91_add_device_udc(struct at91_udc_data *data); 53extern void __init at91_add_device_udc(struct at91_udc_data *data);
@@ -57,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data);
57 57
58 /* Compact Flash */ 58 /* Compact Flash */
59struct at91_cf_data { 59struct at91_cf_data {
60 u8 irq_pin; /* I/O IRQ */ 60 int irq_pin; /* I/O IRQ */
61 u8 det_pin; /* Card detect */ 61 int det_pin; /* Card detect */
62 u8 vcc_pin; /* power switching */ 62 int vcc_pin; /* power switching */
63 u8 rst_pin; /* card reset */ 63 int rst_pin; /* card reset */
64 u8 chipselect; /* EBI Chip Select number */ 64 u8 chipselect; /* EBI Chip Select number */
65 u8 flags; 65 u8 flags;
66#define AT91_CF_TRUE_IDE 0x01 66#define AT91_CF_TRUE_IDE 0x01
@@ -71,11 +71,11 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data);
71 /* MMC / SD */ 71 /* MMC / SD */
72 /* at91_mci platform config */ 72 /* at91_mci platform config */
73struct at91_mmc_data { 73struct at91_mmc_data {
74 u8 det_pin; /* card detect IRQ */ 74 int det_pin; /* card detect IRQ */
75 unsigned slot_b:1; /* uses Slot B */ 75 unsigned slot_b:1; /* uses Slot B */
76 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ 76 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */
77 u8 wp_pin; /* (SD) writeprotect detect */ 77 int wp_pin; /* (SD) writeprotect detect */
78 u8 vcc_pin; /* power switching (high == on) */ 78 int vcc_pin; /* power switching (high == on) */
79}; 79};
80extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); 80extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
81 81
@@ -87,10 +87,10 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data);
87 /* USB Host */ 87 /* USB Host */
88struct at91_usbh_data { 88struct at91_usbh_data {
89 u8 ports; /* number of ports on root hub */ 89 u8 ports; /* number of ports on root hub */
90 u8 vbus_pin[2]; /* port power-control pin */ 90 int vbus_pin[2]; /* port power-control pin */
91 u8 vbus_pin_inverted; 91 u8 vbus_pin_inverted;
92 u8 overcurrent_supported; 92 u8 overcurrent_supported;
93 u8 overcurrent_pin[2]; 93 int overcurrent_pin[2];
94 u8 overcurrent_status[2]; 94 u8 overcurrent_status[2];
95 u8 overcurrent_changed[2]; 95 u8 overcurrent_changed[2];
96}; 96};
@@ -100,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
100 100
101 /* NAND / SmartMedia */ 101 /* NAND / SmartMedia */
102struct atmel_nand_data { 102struct atmel_nand_data {
103 u8 enable_pin; /* chip enable */ 103 int enable_pin; /* chip enable */
104 u8 det_pin; /* card detect */ 104 int det_pin; /* card detect */
105 u8 rdy_pin; /* ready/busy */ 105 int rdy_pin; /* ready/busy */
106 u8 rdy_pin_active_low; /* rdy_pin value is inverted */ 106 u8 rdy_pin_active_low; /* rdy_pin value is inverted */
107 u8 ale; /* address line number connected to ALE */ 107 u8 ale; /* address line number connected to ALE */
108 u8 cle; /* address line number connected to CLE */ 108 u8 cle; /* address line number connected to CLE */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
16 16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0
19#else
20#define AT91_DBGU AT91_BASE_DBGU1
21#endif
22
17 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 24 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 25 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
20 .endm 26 .endm
21 27
22 .macro senduart,rd,rx 28 .macro senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 7ab68f972227..423eea0ed74c 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -17,16 +17,17 @@
17 .endm 17 .endm
18 18
19 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral 20 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
21 ldr \base, [\base]
21 .endm 22 .endm
22 23
23 .macro arch_ret_to_user, tmp1, tmp2 24 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 25 .endm
25 26
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) 28 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
28 ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number 29 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
29 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt 30 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
30 streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. 31 streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
31 .endm 32 .endm
32 33
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 2b9a1f51210f..e3fd225121c7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -16,177 +16,175 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <asm/irq.h> 17#include <asm/irq.h>
18 18
19#define PIN_BASE NR_AIC_IRQS
20
21#define MAX_GPIO_BANKS 5 19#define MAX_GPIO_BANKS 5
22#define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) 20#define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32)
23 21
24/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ 22/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
25 23
26#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) 24#define AT91_PIN_PA0 (0x00 + 0)
27#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) 25#define AT91_PIN_PA1 (0x00 + 1)
28#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) 26#define AT91_PIN_PA2 (0x00 + 2)
29#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) 27#define AT91_PIN_PA3 (0x00 + 3)
30#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) 28#define AT91_PIN_PA4 (0x00 + 4)
31#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) 29#define AT91_PIN_PA5 (0x00 + 5)
32#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) 30#define AT91_PIN_PA6 (0x00 + 6)
33#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) 31#define AT91_PIN_PA7 (0x00 + 7)
34#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) 32#define AT91_PIN_PA8 (0x00 + 8)
35#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) 33#define AT91_PIN_PA9 (0x00 + 9)
36#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) 34#define AT91_PIN_PA10 (0x00 + 10)
37#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) 35#define AT91_PIN_PA11 (0x00 + 11)
38#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) 36#define AT91_PIN_PA12 (0x00 + 12)
39#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) 37#define AT91_PIN_PA13 (0x00 + 13)
40#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) 38#define AT91_PIN_PA14 (0x00 + 14)
41#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) 39#define AT91_PIN_PA15 (0x00 + 15)
42#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) 40#define AT91_PIN_PA16 (0x00 + 16)
43#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) 41#define AT91_PIN_PA17 (0x00 + 17)
44#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) 42#define AT91_PIN_PA18 (0x00 + 18)
45#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) 43#define AT91_PIN_PA19 (0x00 + 19)
46#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) 44#define AT91_PIN_PA20 (0x00 + 20)
47#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) 45#define AT91_PIN_PA21 (0x00 + 21)
48#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) 46#define AT91_PIN_PA22 (0x00 + 22)
49#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) 47#define AT91_PIN_PA23 (0x00 + 23)
50#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) 48#define AT91_PIN_PA24 (0x00 + 24)
51#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) 49#define AT91_PIN_PA25 (0x00 + 25)
52#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) 50#define AT91_PIN_PA26 (0x00 + 26)
53#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) 51#define AT91_PIN_PA27 (0x00 + 27)
54#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) 52#define AT91_PIN_PA28 (0x00 + 28)
55#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) 53#define AT91_PIN_PA29 (0x00 + 29)
56#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) 54#define AT91_PIN_PA30 (0x00 + 30)
57#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) 55#define AT91_PIN_PA31 (0x00 + 31)
58 56
59#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) 57#define AT91_PIN_PB0 (0x20 + 0)
60#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) 58#define AT91_PIN_PB1 (0x20 + 1)
61#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) 59#define AT91_PIN_PB2 (0x20 + 2)
62#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) 60#define AT91_PIN_PB3 (0x20 + 3)
63#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) 61#define AT91_PIN_PB4 (0x20 + 4)
64#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) 62#define AT91_PIN_PB5 (0x20 + 5)
65#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) 63#define AT91_PIN_PB6 (0x20 + 6)
66#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) 64#define AT91_PIN_PB7 (0x20 + 7)
67#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) 65#define AT91_PIN_PB8 (0x20 + 8)
68#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) 66#define AT91_PIN_PB9 (0x20 + 9)
69#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) 67#define AT91_PIN_PB10 (0x20 + 10)
70#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) 68#define AT91_PIN_PB11 (0x20 + 11)
71#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) 69#define AT91_PIN_PB12 (0x20 + 12)
72#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) 70#define AT91_PIN_PB13 (0x20 + 13)
73#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) 71#define AT91_PIN_PB14 (0x20 + 14)
74#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) 72#define AT91_PIN_PB15 (0x20 + 15)
75#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) 73#define AT91_PIN_PB16 (0x20 + 16)
76#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) 74#define AT91_PIN_PB17 (0x20 + 17)
77#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) 75#define AT91_PIN_PB18 (0x20 + 18)
78#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) 76#define AT91_PIN_PB19 (0x20 + 19)
79#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) 77#define AT91_PIN_PB20 (0x20 + 20)
80#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) 78#define AT91_PIN_PB21 (0x20 + 21)
81#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) 79#define AT91_PIN_PB22 (0x20 + 22)
82#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) 80#define AT91_PIN_PB23 (0x20 + 23)
83#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) 81#define AT91_PIN_PB24 (0x20 + 24)
84#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) 82#define AT91_PIN_PB25 (0x20 + 25)
85#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) 83#define AT91_PIN_PB26 (0x20 + 26)
86#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) 84#define AT91_PIN_PB27 (0x20 + 27)
87#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) 85#define AT91_PIN_PB28 (0x20 + 28)
88#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) 86#define AT91_PIN_PB29 (0x20 + 29)
89#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) 87#define AT91_PIN_PB30 (0x20 + 30)
90#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) 88#define AT91_PIN_PB31 (0x20 + 31)
91 89
92#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) 90#define AT91_PIN_PC0 (0x40 + 0)
93#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) 91#define AT91_PIN_PC1 (0x40 + 1)
94#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) 92#define AT91_PIN_PC2 (0x40 + 2)
95#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) 93#define AT91_PIN_PC3 (0x40 + 3)
96#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) 94#define AT91_PIN_PC4 (0x40 + 4)
97#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) 95#define AT91_PIN_PC5 (0x40 + 5)
98#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) 96#define AT91_PIN_PC6 (0x40 + 6)
99#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) 97#define AT91_PIN_PC7 (0x40 + 7)
100#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) 98#define AT91_PIN_PC8 (0x40 + 8)
101#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) 99#define AT91_PIN_PC9 (0x40 + 9)
102#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) 100#define AT91_PIN_PC10 (0x40 + 10)
103#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) 101#define AT91_PIN_PC11 (0x40 + 11)
104#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) 102#define AT91_PIN_PC12 (0x40 + 12)
105#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) 103#define AT91_PIN_PC13 (0x40 + 13)
106#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) 104#define AT91_PIN_PC14 (0x40 + 14)
107#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) 105#define AT91_PIN_PC15 (0x40 + 15)
108#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) 106#define AT91_PIN_PC16 (0x40 + 16)
109#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) 107#define AT91_PIN_PC17 (0x40 + 17)
110#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) 108#define AT91_PIN_PC18 (0x40 + 18)
111#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) 109#define AT91_PIN_PC19 (0x40 + 19)
112#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) 110#define AT91_PIN_PC20 (0x40 + 20)
113#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) 111#define AT91_PIN_PC21 (0x40 + 21)
114#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) 112#define AT91_PIN_PC22 (0x40 + 22)
115#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) 113#define AT91_PIN_PC23 (0x40 + 23)
116#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) 114#define AT91_PIN_PC24 (0x40 + 24)
117#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) 115#define AT91_PIN_PC25 (0x40 + 25)
118#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) 116#define AT91_PIN_PC26 (0x40 + 26)
119#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) 117#define AT91_PIN_PC27 (0x40 + 27)
120#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) 118#define AT91_PIN_PC28 (0x40 + 28)
121#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) 119#define AT91_PIN_PC29 (0x40 + 29)
122#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) 120#define AT91_PIN_PC30 (0x40 + 30)
123#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) 121#define AT91_PIN_PC31 (0x40 + 31)
124 122
125#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) 123#define AT91_PIN_PD0 (0x60 + 0)
126#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) 124#define AT91_PIN_PD1 (0x60 + 1)
127#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) 125#define AT91_PIN_PD2 (0x60 + 2)
128#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) 126#define AT91_PIN_PD3 (0x60 + 3)
129#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) 127#define AT91_PIN_PD4 (0x60 + 4)
130#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) 128#define AT91_PIN_PD5 (0x60 + 5)
131#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) 129#define AT91_PIN_PD6 (0x60 + 6)
132#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) 130#define AT91_PIN_PD7 (0x60 + 7)
133#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) 131#define AT91_PIN_PD8 (0x60 + 8)
134#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) 132#define AT91_PIN_PD9 (0x60 + 9)
135#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) 133#define AT91_PIN_PD10 (0x60 + 10)
136#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) 134#define AT91_PIN_PD11 (0x60 + 11)
137#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) 135#define AT91_PIN_PD12 (0x60 + 12)
138#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) 136#define AT91_PIN_PD13 (0x60 + 13)
139#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) 137#define AT91_PIN_PD14 (0x60 + 14)
140#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) 138#define AT91_PIN_PD15 (0x60 + 15)
141#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) 139#define AT91_PIN_PD16 (0x60 + 16)
142#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) 140#define AT91_PIN_PD17 (0x60 + 17)
143#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) 141#define AT91_PIN_PD18 (0x60 + 18)
144#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) 142#define AT91_PIN_PD19 (0x60 + 19)
145#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) 143#define AT91_PIN_PD20 (0x60 + 20)
146#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) 144#define AT91_PIN_PD21 (0x60 + 21)
147#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) 145#define AT91_PIN_PD22 (0x60 + 22)
148#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) 146#define AT91_PIN_PD23 (0x60 + 23)
149#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) 147#define AT91_PIN_PD24 (0x60 + 24)
150#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) 148#define AT91_PIN_PD25 (0x60 + 25)
151#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) 149#define AT91_PIN_PD26 (0x60 + 26)
152#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) 150#define AT91_PIN_PD27 (0x60 + 27)
153#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) 151#define AT91_PIN_PD28 (0x60 + 28)
154#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) 152#define AT91_PIN_PD29 (0x60 + 29)
155#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) 153#define AT91_PIN_PD30 (0x60 + 30)
156#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) 154#define AT91_PIN_PD31 (0x60 + 31)
157 155
158#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) 156#define AT91_PIN_PE0 (0x80 + 0)
159#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) 157#define AT91_PIN_PE1 (0x80 + 1)
160#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) 158#define AT91_PIN_PE2 (0x80 + 2)
161#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) 159#define AT91_PIN_PE3 (0x80 + 3)
162#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) 160#define AT91_PIN_PE4 (0x80 + 4)
163#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) 161#define AT91_PIN_PE5 (0x80 + 5)
164#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) 162#define AT91_PIN_PE6 (0x80 + 6)
165#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) 163#define AT91_PIN_PE7 (0x80 + 7)
166#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) 164#define AT91_PIN_PE8 (0x80 + 8)
167#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) 165#define AT91_PIN_PE9 (0x80 + 9)
168#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) 166#define AT91_PIN_PE10 (0x80 + 10)
169#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) 167#define AT91_PIN_PE11 (0x80 + 11)
170#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) 168#define AT91_PIN_PE12 (0x80 + 12)
171#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) 169#define AT91_PIN_PE13 (0x80 + 13)
172#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) 170#define AT91_PIN_PE14 (0x80 + 14)
173#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) 171#define AT91_PIN_PE15 (0x80 + 15)
174#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) 172#define AT91_PIN_PE16 (0x80 + 16)
175#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) 173#define AT91_PIN_PE17 (0x80 + 17)
176#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) 174#define AT91_PIN_PE18 (0x80 + 18)
177#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) 175#define AT91_PIN_PE19 (0x80 + 19)
178#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) 176#define AT91_PIN_PE20 (0x80 + 20)
179#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) 177#define AT91_PIN_PE21 (0x80 + 21)
180#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) 178#define AT91_PIN_PE22 (0x80 + 22)
181#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) 179#define AT91_PIN_PE23 (0x80 + 23)
182#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) 180#define AT91_PIN_PE24 (0x80 + 24)
183#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) 181#define AT91_PIN_PE25 (0x80 + 25)
184#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) 182#define AT91_PIN_PE26 (0x80 + 26)
185#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) 183#define AT91_PIN_PE27 (0x80 + 27)
186#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) 184#define AT91_PIN_PE28 (0x80 + 28)
187#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) 185#define AT91_PIN_PE29 (0x80 + 29)
188#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) 186#define AT91_PIN_PE30 (0x80 + 30)
189#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) 187#define AT91_PIN_PE31 (0x80 + 31)
190 188
191#ifndef __ASSEMBLY__ 189#ifndef __ASSEMBLY__
192/* setup setup routines, called from board init or driver probe() */ 190/* setup setup routines, called from board init or driver probe() */
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void);
215 213
216#include <asm/errno.h> 214#include <asm/errno.h>
217 215
218#define gpio_to_irq(gpio) (gpio) 216#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS)
219#define irq_to_gpio(irq) (irq) 217#define irq_to_gpio(irq) (irq - NR_AIC_IRQS)
220 218
221#endif /* __ASSEMBLY__ */ 219#endif /* __ASSEMBLY__ */
222 220
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..2d0e4e998566 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
16 16
17#include <asm/sizes.h> 17#include <asm/sizes.h>
18 18
19/* DBGU base */
20/* rm9200, 9260/9g20, 9261/9g10, 9rl */
21#define AT91_BASE_DBGU0 0xfffff200
22/* 9263, 9g45, cap9 */
23#define AT91_BASE_DBGU1 0xffffee00
24
19#if defined(CONFIG_ARCH_AT91RM9200) 25#if defined(CONFIG_ARCH_AT91RM9200)
20#include <mach/at91rm9200.h> 26#include <mach/at91rm9200.h>
21#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) 27#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
@@ -52,6 +58,12 @@
52#endif 58#endif
53 59
54/* 60/*
61 * On all at91 have the Advanced Interrupt Controller starts at address
62 * 0xfffff000
63 */
64#define AT91_AIC 0xfffff000
65
66/*
55 * Peripheral identifiers/interrupts. 67 * Peripheral identifiers/interrupts.
56 */ 68 */
57#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 69#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4298e7806c76..4ca09ef7ca29 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -30,14 +30,6 @@
30 30
31#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
32 32
33#ifndef CONFIG_ARCH_AT91X40
34#define __arch_ioremap at91_ioremap
35#define __arch_iounmap at91_iounmap
36#endif
37
38void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
39void at91_iounmap(volatile void __iomem *addr);
40
41static inline unsigned int at91_sys_read(unsigned int reg_offset) 33static inline unsigned int at91_sys_read(unsigned int reg_offset)
42{ 34{
43 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 35 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f3fc6e..ac8b7dfc85ef 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -31,7 +31,7 @@
31 * Acknowledge interrupt with AIC after interrupt has been handled. 31 * Acknowledge interrupt with AIC after interrupt has been handled.
32 * (by kernel/irq.c) 32 * (by kernel/irq.c)
33 */ 33 */
34#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) 34#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
35 35
36 36
37/* 37/*
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 36af14bc13bb..cbd64f3bcecd 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -47,13 +47,4 @@ static inline void arch_idle(void)
47#endif 47#endif
48} 48}
49 49
50void (*at91_arch_reset)(void);
51
52static inline void arch_reset(char mode, const char *cmd)
53{
54 /* call the CPU-specific reset function */
55 if (at91_arch_reset)
56 (at91_arch_reset)();
57}
58
59#endif 50#endif
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 85820ad801cc..5e917a66edd7 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -23,70 +23,15 @@
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25 25
26#if defined(CONFIG_ARCH_AT91RM9200) 26#ifdef CONFIG_ARCH_AT91X40
27 27
28#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) 28#define AT91X40_MASTER_CLOCK 40000000
29 29#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
30#elif defined(CONFIG_ARCH_AT91SAM9260)
31
32#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
33#define AT91SAM9_MASTER_CLOCK 90000000
34#else
35#define AT91SAM9_MASTER_CLOCK 99300000
36#endif
37
38#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
39
40#elif defined(CONFIG_ARCH_AT91SAM9261)
41
42#define AT91SAM9_MASTER_CLOCK 99300000
43#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
44
45#elif defined(CONFIG_ARCH_AT91SAM9G10)
46
47#define AT91SAM9_MASTER_CLOCK 133000000
48#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
49
50#elif defined(CONFIG_ARCH_AT91SAM9263)
51
52#if defined(CONFIG_MACH_USB_A9263)
53#define AT91SAM9_MASTER_CLOCK 90000000
54#else
55#define AT91SAM9_MASTER_CLOCK 99959500
56#endif
57
58#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
59
60#elif defined(CONFIG_ARCH_AT91SAM9RL)
61
62#define AT91SAM9_MASTER_CLOCK 100000000
63#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
64
65#elif defined(CONFIG_ARCH_AT91SAM9G20)
66 30
67#if defined(CONFIG_MACH_USB_A9G20)
68#define AT91SAM9_MASTER_CLOCK 133000000
69#else 31#else
70#define AT91SAM9_MASTER_CLOCK 132096000
71#endif
72
73#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
74
75#elif defined(CONFIG_ARCH_AT91SAM9G45)
76 32
77#define AT91SAM9_MASTER_CLOCK 133333333 33#define CLOCK_TICK_RATE 12345678
78#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
79
80#elif defined(CONFIG_ARCH_AT91CAP9)
81
82#define AT91CAP9_MASTER_CLOCK 100000000
83#define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16)
84
85#elif defined(CONFIG_ARCH_AT91X40)
86
87#define AT91X40_MASTER_CLOCK 40000000
88#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
89 34
90#endif 35#endif
91 36
92#endif 37#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26 26
27#if defined(CONFIG_AT91_EARLY_DBGU) 27#if defined(CONFIG_AT91_EARLY_DBGU0)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) 28#define UART_OFFSET AT91_BASE_DBGU0
29#elif defined(CONFIG_AT91_EARLY_DBGU1)
30#define UART_OFFSET AT91_BASE_DBGU1
29#elif defined(CONFIG_AT91_EARLY_USART0) 31#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0 32#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1) 33#elif defined(CONFIG_AT91_EARLY_USART1)
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
deleted file mode 100644
index 8e4a1bd0ab1d..000000000000
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H
23
24#include <mach/hardware.h>
25
26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
27
28#endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 9665265ec757..be6b639ecd7b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -33,17 +33,18 @@
33#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36void __iomem *at91_aic_base;
36 37
37static void at91_aic_mask_irq(struct irq_data *d) 38static void at91_aic_mask_irq(struct irq_data *d)
38{ 39{
39 /* Disable interrupt on AIC */ 40 /* Disable interrupt on AIC */
40 at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); 41 at91_aic_write(AT91_AIC_IDCR, 1 << d->irq);
41} 42}
42 43
43static void at91_aic_unmask_irq(struct irq_data *d) 44static void at91_aic_unmask_irq(struct irq_data *d)
44{ 45{
45 /* Enable interrupt on AIC */ 46 /* Enable interrupt on AIC */
46 at91_sys_write(AT91_AIC_IECR, 1 << d->irq); 47 at91_aic_write(AT91_AIC_IECR, 1 << d->irq);
47} 48}
48 49
49unsigned int at91_extern_irq; 50unsigned int at91_extern_irq;
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
77 return -EINVAL; 78 return -EINVAL;
78 } 79 }
79 80
80 smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; 81 smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
81 at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); 82 at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype);
82 return 0; 83 return 0;
83} 84}
84 85
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
102 103
103void at91_irq_suspend(void) 104void at91_irq_suspend(void)
104{ 105{
105 backups = at91_sys_read(AT91_AIC_IMR); 106 backups = at91_aic_read(AT91_AIC_IMR);
106 at91_sys_write(AT91_AIC_IDCR, backups); 107 at91_aic_write(AT91_AIC_IDCR, backups);
107 at91_sys_write(AT91_AIC_IECR, wakeups); 108 at91_aic_write(AT91_AIC_IECR, wakeups);
108} 109}
109 110
110void at91_irq_resume(void) 111void at91_irq_resume(void)
111{ 112{
112 at91_sys_write(AT91_AIC_IDCR, wakeups); 113 at91_aic_write(AT91_AIC_IDCR, wakeups);
113 at91_sys_write(AT91_AIC_IECR, backups); 114 at91_aic_write(AT91_AIC_IECR, backups);
114} 115}
115 116
116#else 117#else
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
133{ 134{
134 unsigned int i; 135 unsigned int i;
135 136
137 at91_aic_base = ioremap(AT91_AIC, 512);
138
139 if (!at91_aic_base)
140 panic("Impossible to ioremap AT91_AIC\n");
141
136 /* 142 /*
137 * The IVR is used by macro get_irqnr_and_base to read and verify. 143 * The IVR is used by macro get_irqnr_and_base to read and verify.
138 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. 144 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
139 */ 145 */
140 for (i = 0; i < NR_AIC_IRQS; i++) { 146 for (i = 0; i < NR_AIC_IRQS; i++) {
141 /* Put irq number in Source Vector Register: */ 147 /* Put irq number in Source Vector Register: */
142 at91_sys_write(AT91_AIC_SVR(i), i); 148 at91_aic_write(AT91_AIC_SVR(i), i);
143 /* Active Low interrupt, with the specified priority */ 149 /* Active Low interrupt, with the specified priority */
144 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 150 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
145 151
146 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); 152 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
147 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
148 154
149 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ 155 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
150 if (i < 8) 156 if (i < 8)
151 at91_sys_write(AT91_AIC_EOICR, 0); 157 at91_aic_write(AT91_AIC_EOICR, 0);
152 } 158 }
153 159
154 /* 160 /*
155 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS 161 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
156 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU 162 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
157 */ 163 */
158 at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); 164 at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS);
159 165
160 /* No debugging in AIC: Debug (Protect) Control Register */ 166 /* No debugging in AIC: Debug (Protect) Control Register */
161 at91_sys_write(AT91_AIC_DCR, 0); 167 at91_aic_write(AT91_AIC_DCR, 0);
162 168
163 /* Disable and clear all interrupts initially */ 169 /* Disable and clear all interrupts initially */
164 at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); 170 at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
165 at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); 171 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
166} 172}
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 7046158109d7..62ad95556c36 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,7 @@
34/* 34/*
35 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
36 */ 36 */
37#if defined(AT91_SHDWC) 37#if defined(AT91_RSTC)
38 38
39#include <mach/at91_rstc.h> 39#include <mach/at91_rstc.h>
40#include <mach/at91_shdwc.h> 40#include <mach/at91_shdwc.h>
@@ -58,8 +58,11 @@ static void __init show_reset_status(void)
58 char *reason, *r2 = reset; 58 char *reason, *r2 = reset;
59 u32 reset_type, wake_type; 59 u32 reset_type, wake_type;
60 60
61 if (!at91_shdwc_base)
62 return;
63
61 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; 64 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
62 wake_type = at91_sys_read(AT91_SHDW_SR); 65 wake_type = at91_shdwc_read(AT91_SHDW_SR);
63 66
64 switch (reset_type) { 67 switch (reset_type) {
65 case AT91_RSTC_RSTTYP_GENERAL: 68 case AT91_RSTC_RSTTYP_GENERAL:
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state)
215 | (1 << AT91_ID_FIQ) 218 | (1 << AT91_ID_FIQ)
216 | (1 << AT91_ID_SYS) 219 | (1 << AT91_ID_SYS)
217 | (at91_extern_irq)) 220 | (at91_extern_irq))
218 & at91_sys_read(AT91_AIC_IMR), 221 & at91_aic_read(AT91_AIC_IMR),
219 state); 222 state);
220 223
221 switch (state) { 224 switch (state) {
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state)
283 } 286 }
284 287
285 pr_debug("AT91: PM - wakeup %08x\n", 288 pr_debug("AT91: PM - wakeup %08x\n",
286 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); 289 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
287 290
288error: 291error:
289 target_state = PM_SUSPEND_ON; 292 target_state = PM_SUSPEND_ON;
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index 5eab6aa621d0..8294783b679d 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -10,38 +10,58 @@
10 10
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/of.h>
14#include <linux/of_address.h>
13 15
14#include <mach/at91sam9_smc.h> 16#include <mach/at91sam9_smc.h>
15 17
16#include "sam9_smc.h" 18#include "sam9_smc.h"
17 19
18void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) 20
21#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10))
22
23static void __iomem *smc_base_addr[2];
24
25static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
19{ 26{
27
20 /* Setup register */ 28 /* Setup register */
21 at91_sys_write(AT91_SMC_SETUP(cs), 29 __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
22 AT91_SMC_NWESETUP_(config->nwe_setup) 30 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
23 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) 31 | AT91_SMC_NRDSETUP_(config->nrd_setup)
24 | AT91_SMC_NRDSETUP_(config->nrd_setup) 32 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
25 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) 33 base + AT91_SMC_SETUP);
26 );
27 34
28 /* Pulse register */ 35 /* Pulse register */
29 at91_sys_write(AT91_SMC_PULSE(cs), 36 __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
30 AT91_SMC_NWEPULSE_(config->nwe_pulse) 37 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
31 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) 38 | AT91_SMC_NRDPULSE_(config->nrd_pulse)
32 | AT91_SMC_NRDPULSE_(config->nrd_pulse) 39 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
33 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) 40 base + AT91_SMC_PULSE);
34 );
35 41
36 /* Cycle register */ 42 /* Cycle register */
37 at91_sys_write(AT91_SMC_CYCLE(cs), 43 __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
38 AT91_SMC_NWECYCLE_(config->write_cycle) 44 | AT91_SMC_NRDCYCLE_(config->read_cycle),
39 | AT91_SMC_NRDCYCLE_(config->read_cycle) 45 base + AT91_SMC_CYCLE);
40 );
41 46
42 /* Mode register */ 47 /* Mode register */
43 at91_sys_write(AT91_SMC_MODE(cs), 48 __raw_writel(config->mode
44 config->mode 49 | AT91_SMC_TDF_(config->tdf_cycles),
45 | AT91_SMC_TDF_(config->tdf_cycles) 50 base + AT91_SMC_MODE);
46 ); 51}
52
53void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
54{
55 sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
56}
57
58void __init at91sam9_ioremap_smc(int id, u32 addr)
59{
60 if (id > 1) {
61 pr_warn("%s: id > 2\n", __func__);
62 return;
63 }
64 smc_base_addr[id] = ioremap(addr, 512);
65 if (!smc_base_addr[id])
66 pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
47} 67}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
index bf72cfb3455b..039c5ce17aec 100644
--- a/arch/arm/mach-at91/sam9_smc.h
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -30,4 +30,5 @@ struct sam9_smc_config {
30 u8 tdf_cycles:4; 30 u8 tdf_cycles:4;
31}; 31};
32 32
33extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); 33extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
34extern void __init at91sam9_ioremap_smc(int id, u32 addr);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index aa64294c7db3..8bdcc3cb6012 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -8,6 +8,7 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/pm.h>
11 12
12#include <asm/mach/map.h> 13#include <asm/mach/map.h>
13 14
@@ -15,6 +16,7 @@
15#include <mach/cpu.h> 16#include <mach/cpu.h>
16#include <mach/at91_dbgu.h> 17#include <mach/at91_dbgu.h>
17#include <mach/at91_pmc.h> 18#include <mach/at91_pmc.h>
19#include <mach/at91_shdwc.h>
18 20
19#include "soc.h" 21#include "soc.h"
20#include "generic.h" 22#include "generic.h"
@@ -73,27 +75,6 @@ static struct map_desc at91_io_desc __initdata = {
73 .type = MT_DEVICE, 75 .type = MT_DEVICE,
74}; 76};
75 77
76void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
77{
78 if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
79 return (void __iomem *)AT91_IO_P2V(p);
80
81 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
82}
83EXPORT_SYMBOL(at91_ioremap);
84
85void at91_iounmap(volatile void __iomem *addr)
86{
87 unsigned long virt = (unsigned long)addr;
88
89 if (virt >= VMALLOC_START && virt < VMALLOC_END)
90 __iounmap(addr);
91}
92EXPORT_SYMBOL(at91_iounmap);
93
94#define AT91_DBGU0 0xfffff200
95#define AT91_DBGU1 0xffffee00
96
97static void __init soc_detect(u32 dbgu_base) 78static void __init soc_detect(u32 dbgu_base)
98{ 79{
99 u32 cidr, socid; 80 u32 cidr, socid;
@@ -266,9 +247,9 @@ void __init at91_map_io(void)
266 at91_soc_initdata.type = AT91_SOC_NONE; 247 at91_soc_initdata.type = AT91_SOC_NONE;
267 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; 248 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
268 249
269 soc_detect(AT91_DBGU0); 250 soc_detect(AT91_BASE_DBGU0);
270 if (!at91_soc_is_detected()) 251 if (!at91_soc_is_detected())
271 soc_detect(AT91_DBGU1); 252 soc_detect(AT91_BASE_DBGU1);
272 253
273 if (!at91_soc_is_detected()) 254 if (!at91_soc_is_detected())
274 panic("AT91: Impossible to detect the SOC type"); 255 panic("AT91: Impossible to detect the SOC type");
@@ -285,8 +266,25 @@ void __init at91_map_io(void)
285 at91_boot_soc.map_io(); 266 at91_boot_soc.map_io();
286} 267}
287 268
269void __iomem *at91_shdwc_base = NULL;
270
271static void at91sam9_poweroff(void)
272{
273 at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
274}
275
276void __init at91_ioremap_shdwc(u32 base_addr)
277{
278 at91_shdwc_base = ioremap(base_addr, 16);
279 if (!at91_shdwc_base)
280 panic("Impossible to ioremap at91_shdwc_base\n");
281 pm_power_off = at91sam9_poweroff;
282}
283
288void __init at91_initialize(unsigned long main_clock) 284void __init at91_initialize(unsigned long main_clock)
289{ 285{
286 at91_boot_soc.ioremap_registers();
287
290 /* Init clock subsystem */ 288 /* Init clock subsystem */
291 at91_clock_init(main_clock); 289 at91_clock_init(main_clock);
292 290
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 21ed8816e6f7..4588ae6f7acd 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -7,6 +7,7 @@
7struct at91_init_soc { 7struct at91_init_soc {
8 unsigned int *default_irq_priority; 8 unsigned int *default_irq_priority;
9 void (*map_io)(void); 9 void (*map_io)(void);
10 void (*ioremap_registers)(void);
10 void (*register_clocks)(void); 11 void (*register_clocks)(void);
11 void (*init)(void); 12 void (*init)(void);
12}; 13};
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 31a143592c81..9e5e7552498c 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio)
49#endif 49#endif
50 50
51/* sysctl */ 51/* sysctl */
52int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ 52static int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */
53
54static void bcmring_restart(char mode, const char *cmd)
55{
56 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
57
58 if (mode == 'h') {
59 /* Reboot configured in proc entry */
60 if (bcmring_arch_warm_reboot) {
61 printk("warm reset\n");
62 /* Issue Warm reset (do not reset ethernet switch, keep alive) */
63 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
64 } else {
65 /* Force reset of everything */
66 printk("force reset\n");
67 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
68 }
69 } else {
70 /* Force reset of everything */
71 printk("force reset\n");
72 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
73 }
74}
53 75
54static struct ctl_table_header *bcmring_sysctl_header; 76static struct ctl_table_header *bcmring_sysctl_header;
55 77
@@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING")
173 .init_irq = bcmring_init_irq, 195 .init_irq = bcmring_init_irq,
174 .timer = &bcmring_timer, 196 .timer = &bcmring_timer,
175 .init_machine = bcmring_init_machine 197 .init_machine = bcmring_init_machine
198 .restart = bcmring_restart,
176MACHINE_END 199MACHINE_END
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index f4d4d6d174d0..1a1a27dd5654 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -1615,7 +1615,7 @@ DMA_MemType_t dma_mem_type(void *addr)
1615{ 1615{
1616 unsigned long addrVal = (unsigned long)addr; 1616 unsigned long addrVal = (unsigned long)addr;
1617 1617
1618 if (addrVal >= VMALLOC_END) { 1618 if (addrVal >= CONSISTENT_BASE) {
1619 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */ 1619 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
1620 1620
1621 /* dma_alloc_xxx pages are physically and virtually contiguous */ 1621 /* dma_alloc_xxx pages are physically and virtually contiguous */
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
index 38b37060d426..cb78250db649 100644
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ b/arch/arm/mach-bcmring/include/mach/system.h
@@ -20,35 +20,9 @@
20#ifndef __ASM_ARCH_SYSTEM_H 20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H 21#define __ASM_ARCH_SYSTEM_H
22 22
23#include <mach/csp/chipcHw_inline.h>
24
25extern int bcmring_arch_warm_reboot;
26
27static inline void arch_idle(void) 23static inline void arch_idle(void)
28{ 24{
29 cpu_do_idle(); 25 cpu_do_idle();
30} 26}
31 27
32static inline void arch_reset(char mode, const char *cmd)
33{
34 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
35
36 if (mode == 'h') {
37 /* Reboot configured in proc entry */
38 if (bcmring_arch_warm_reboot) {
39 printk("warm reset\n");
40 /* Issue Warm reset (do not reset ethernet switch, keep alive) */
41 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
42 } else {
43 /* Force reset of everything */
44 printk("force reset\n");
45 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
46 }
47 } else {
48 /* Force reset of everything */
49 printk("force reset\n");
50 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
51 }
52}
53
54#endif 28#endif
diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h
deleted file mode 100644
index 7397bd7817d9..000000000000
--- a/arch/arm/mach-bcmring/include/mach/vmalloc.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 *
3 * Copyright (C) 2000 Russell King.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
21 * Move VMALLOC_END to 0xf0000000 so that the vm space can range from
22 * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles
23 * larger physical memory designs better.
24 */
25#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 4a197315f0cf..f2f0256232e3 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := irq.o mm.o time.o 7obj-y := common.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 0276091b7f86..3fb79a1d0bde 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
68 .map_io = autcpu12_map_io, 68 .map_io = autcpu12_map_io,
69 .init_irq = clps711x_init_irq, 69 .init_irq = clps711x_init_irq,
70 .timer = &clps711x_timer, 70 .timer = &clps711x_timer,
71 .restart = clps711x_restart,
71MACHINE_END 72MACHINE_END
72 73
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index 25b3bfd0e85a..c314f49d6ef6 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712")
59 .map_io = cdb89712_map_io, 59 .map_io = cdb89712_map_io,
60 .init_irq = clps711x_init_irq, 60 .init_irq = clps711x_init_irq,
61 .timer = &clps711x_timer, 61 .timer = &clps711x_timer,
62 .restart = clps711x_restart,
62MACHINE_END 63MACHINE_END
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 1df9ec67aa92..a70147e347ac 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
60 .map_io = ceiva_map_io, 60 .map_io = ceiva_map_io,
61 .init_irq = clps711x_init_irq, 61 .init_irq = clps711x_init_irq,
62 .timer = &clps711x_timer, 62 .timer = &clps711x_timer,
63 .restart = clps711x_restart,
63MACHINE_END 64MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 80496c09ac59..dbc7842639dc 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
41 .map_io = clps711x_map_io, 41 .map_io = clps711x_map_io,
42 .init_irq = clps711x_init_irq, 42 .init_irq = clps711x_init_irq,
43 .timer = &clps711x_timer, 43 .timer = &clps711x_timer,
44 .restart = clps711x_restart,
44MACHINE_END 45MACHINE_END
45 46
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/common.c
index c2eceee645e3..ab1711b9b4d6 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -1,7 +1,9 @@
1/* 1/*
2 * linux/arch/arm/mach-clps711x/irq.c 2 * linux/arch/arm/mach-clps711x/core.c
3 * 3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 4 * Core support for the CLPS711x-based machines.
5 *
6 * Copyright (C) 2001,2011 Deep Blue Solutions Ltd
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -17,16 +19,42 @@
17 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 21 */
22#include <linux/kernel.h>
23#include <linux/mm.h>
20#include <linux/init.h> 24#include <linux/init.h>
21#include <linux/list.h> 25#include <linux/interrupt.h>
22#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/irq.h>
28#include <linux/sched.h>
29#include <linux/timex.h>
23 30
24#include <asm/mach/irq.h> 31#include <asm/sizes.h>
25#include <mach/hardware.h> 32#include <mach/hardware.h>
26#include <asm/irq.h> 33#include <asm/irq.h>
27 34#include <asm/leds.h>
35#include <asm/pgtable.h>
36#include <asm/page.h>
37#include <asm/mach/map.h>
38#include <asm/mach/time.h>
28#include <asm/hardware/clps7111.h> 39#include <asm/hardware/clps7111.h>
29 40
41/*
42 * This maps the generic CLPS711x registers
43 */
44static struct map_desc clps711x_io_desc[] __initdata = {
45 {
46 .virtual = CLPS7111_VIRT_BASE,
47 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
48 .length = SZ_1M,
49 .type = MT_DEVICE
50 }
51};
52
53void __init clps711x_map_io(void)
54{
55 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
56}
57
30static void int1_mask(struct irq_data *d) 58static void int1_mask(struct irq_data *d)
31{ 59{
32 u32 intmr1; 60 u32 intmr1;
@@ -112,15 +140,15 @@ void __init clps711x_init_irq(void)
112 140
113 for (i = 0; i < NR_IRQS; i++) { 141 for (i = 0; i < NR_IRQS; i++) {
114 if (INT1_IRQS & (1 << i)) { 142 if (INT1_IRQS & (1 << i)) {
115 irq_set_chip_and_handler(i, &int1_chip, 143 irq_set_chip_and_handler(i, &int1_chip,
116 handle_level_irq); 144 handle_level_irq);
117 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 145 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
118 } 146 }
119 if (INT2_IRQS & (1 << i)) { 147 if (INT2_IRQS & (1 << i)) {
120 irq_set_chip_and_handler(i, &int2_chip, 148 irq_set_chip_and_handler(i, &int2_chip,
121 handle_level_irq); 149 handle_level_irq);
122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 150 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123 } 151 }
124 } 152 }
125 153
126 /* 154 /*
@@ -141,3 +169,59 @@ void __init clps711x_init_irq(void)
141 clps_writel(0, SYNCIO); 169 clps_writel(0, SYNCIO);
142 clps_writel(0, KBDEOI); 170 clps_writel(0, KBDEOI);
143} 171}
172
173/*
174 * gettimeoffset() returns time since last timer tick, in usecs.
175 *
176 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
177 * 'tick' is usecs per jiffy.
178 */
179static unsigned long clps711x_gettimeoffset(void)
180{
181 unsigned long hwticks;
182 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
183 return (hwticks * (tick_nsec / 1000)) / LATCH;
184}
185
186/*
187 * IRQ handler for the timer
188 */
189static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
190{
191 timer_tick();
192 return IRQ_HANDLED;
193}
194
195static struct irqaction clps711x_timer_irq = {
196 .name = "CLPS711x Timer Tick",
197 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
198 .handler = p720t_timer_interrupt,
199};
200
201static void __init clps711x_timer_init(void)
202{
203 struct timespec tv;
204 unsigned int syscon;
205
206 syscon = clps_readl(SYSCON1);
207 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
208 clps_writel(syscon, SYSCON1);
209
210 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
211
212 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
213
214 tv.tv_nsec = 0;
215 tv.tv_sec = clps_readl(RTCDR);
216 do_settimeofday(&tv);
217}
218
219struct sys_timer clps711x_timer = {
220 .init = clps711x_timer_init,
221 .offset = clps711x_gettimeoffset,
222};
223
224void clps711x_restart(char mode, const char *cmd)
225{
226 soft_restart(0);
227}
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index 2b8b801f1dc3..fc0f0650dcb5 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -9,3 +9,4 @@ struct sys_timer;
9extern void clps711x_map_io(void); 9extern void clps711x_map_io(void);
10extern void clps711x_init_irq(void); 10extern void clps711x_init_irq(void);
11extern struct sys_timer clps711x_timer; 11extern struct sys_timer clps711x_timer;
12extern void clps711x_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 9721f6111dc0..5fad0b4f40ad 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
62 .reserve = edb7211_reserve, 62 .reserve = edb7211_reserve,
63 .init_irq = clps711x_init_irq, 63 .init_irq = clps711x_init_irq,
64 .timer = &clps711x_timer, 64 .timer = &clps711x_timer,
65 .restart = clps711x_restart,
65MACHINE_END 66MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index d99256687298..3a3f0b702cb4 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet")
78 .map_io = clps711x_map_io, 78 .map_io = clps711x_map_io,
79 .init_irq = clps711x_init_irq, 79 .init_irq = clps711x_init_irq,
80 .timer = &clps711x_timer, 80 .timer = &clps711x_timer,
81 .restart = clps711x_restart,
81MACHINE_END 82MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index f916cd7a477d..23d6ef8c84da 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -32,9 +32,4 @@ static inline void arch_idle(void)
32 mov r0, r0"); 32 mov r0, r0");
33} 33}
34 34
35static inline void arch_reset(char mode, const char *cmd)
36{
37 cpu_reset(0);
38}
39
40#endif 35#endif
diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h
deleted file mode 100644
index 467b96137e47..000000000000
--- a/arch/arm/mach-clps711x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-clps711x/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
deleted file mode 100644
index 986592176767..000000000000
--- a/arch/arm/mach-clps711x/mm.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/mm.c
3 *
4 * Generic MM setup for the CLPS711x-based machines.
5 *
6 * Copyright (C) 2001 Deep Blue Solutions Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/init.h>
25
26#include <asm/sizes.h>
27#include <mach/hardware.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/mach/map.h>
31#include <asm/hardware/clps7111.h>
32
33/*
34 * This maps the generic CLPS711x registers
35 */
36static struct map_desc clps711x_io_desc[] __initdata = {
37 {
38 .virtual = CLPS7111_VIRT_BASE,
39 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
40 .length = SZ_1M,
41 .type = MT_DEVICE
42 }
43};
44
45void __init clps711x_map_io(void)
46{
47 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
48}
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 6ecea95f38b2..42ee8f33eafb 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T")
93 .map_io = p720t_map_io, 93 .map_io = p720t_map_io,
94 .init_irq = clps711x_init_irq, 94 .init_irq = clps711x_init_irq,
95 .timer = &clps711x_timer, 95 .timer = &clps711x_timer,
96 .restart = clps711x_restart,
96MACHINE_END 97MACHINE_END
97 98
98static int p720t_hw_init(void) 99static int p720t_hw_init(void)
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
deleted file mode 100644
index d581ef0bcd24..000000000000
--- a/arch/arm/mach-clps711x/time.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/time.c
3 *
4 * Copyright (C) 2001 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#include <linux/timex.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/sched.h>
24#include <linux/io.h>
25
26#include <mach/hardware.h>
27#include <asm/irq.h>
28#include <asm/leds.h>
29#include <asm/hardware/clps7111.h>
30
31#include <asm/mach/time.h>
32
33
34/*
35 * gettimeoffset() returns time since last timer tick, in usecs.
36 *
37 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
38 * 'tick' is usecs per jiffy.
39 */
40static unsigned long clps711x_gettimeoffset(void)
41{
42 unsigned long hwticks;
43 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
44 return (hwticks * (tick_nsec / 1000)) / LATCH;
45}
46
47/*
48 * IRQ handler for the timer
49 */
50static irqreturn_t
51p720t_timer_interrupt(int irq, void *dev_id)
52{
53 timer_tick();
54 return IRQ_HANDLED;
55}
56
57static struct irqaction clps711x_timer_irq = {
58 .name = "CLPS711x Timer Tick",
59 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
60 .handler = p720t_timer_interrupt,
61};
62
63static void __init clps711x_timer_init(void)
64{
65 struct timespec tv;
66 unsigned int syscon;
67
68 syscon = clps_readl(SYSCON1);
69 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
70 clps_writel(syscon, SYSCON1);
71
72 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
73
74 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
75
76 tv.tv_nsec = 0;
77 tv.tv_sec = clps_readl(RTCDR);
78 do_settimeofday(&tv);
79}
80
81struct sys_timer clps711x_timer = {
82 .init = clps711x_timer_init,
83 .offset = clps711x_gettimeoffset,
84};
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 55f7b4b08ab9..2c5fb4c7e509 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27#include <asm/setup.h> 27#include <asm/setup.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/hardware/gic.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/mach/time.h> 32#include <asm/mach/time.h>
@@ -201,5 +202,7 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
201 .map_io = cns3420_map_io, 202 .map_io = cns3420_map_io,
202 .init_irq = cns3xxx_init_irq, 203 .init_irq = cns3xxx_init_irq,
203 .timer = &cns3xxx_timer, 204 .timer = &cns3xxx_timer,
205 .handle_irq = gic_handle_irq,
204 .init_machine = cns3420_init, 206 .init_machine = cns3420_init,
207 .restart = cns3xxx_restart,
205MACHINE_END 208MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index fcd225343c61..4894b8c17151 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {}
22void __init cns3xxx_map_io(void); 22void __init cns3xxx_map_io(void);
23void __init cns3xxx_init_irq(void); 23void __init cns3xxx_init_irq(void);
24void cns3xxx_power_off(void); 24void cns3xxx_power_off(void);
25void cns3xxx_restart(char, const char *);
25 26
26#endif /* __CNS3XXX_CORE_H */ 27#endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc397d39..01c57df5f716 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 4f16c9b79f78..9e56b7dc133a 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -11,7 +11,6 @@
11#ifndef __MACH_SYSTEM_H 11#ifndef __MACH_SYSTEM_H
12#define __MACH_SYSTEM_H 12#define __MACH_SYSTEM_H
13 13
14#include <linux/io.h>
15#include <asm/proc-fns.h> 14#include <asm/proc-fns.h>
16 15
17static inline void arch_idle(void) 16static inline void arch_idle(void)
@@ -23,6 +22,4 @@ static inline void arch_idle(void)
23 cpu_do_idle(); 22 cpu_do_idle();
24} 23}
25 24
26void arch_reset(char mode, const char *cmd);
27
28#endif 25#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
deleted file mode 100644
index 1dd231d2f772..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * Copyright 2000 Russell King.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 0c04678615ce..36458080332a 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,9 +11,9 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/atomic.h> 13#include <linux/atomic.h>
14#include <mach/system.h>
15#include <mach/cns3xxx.h> 14#include <mach/cns3xxx.h>
16#include <mach/pm.h> 15#include <mach/pm.h>
16#include "core.h"
17 17
18void cns3xxx_pwr_clk_en(unsigned int block) 18void cns3xxx_pwr_clk_en(unsigned int block)
19{ 19{
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
89} 89}
90EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); 90EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
91 91
92void arch_reset(char mode, const char *cmd) 92void cns3xxx_restart(char mode, const char *cmd)
93{ 93{
94 /* 94 /*
95 * To reset, we hit the on-board reset register 95 * To reset, we hit the on-board reset register
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 495e31306fc0..2db78bd5c835 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -4,7 +4,7 @@
4# 4#
5 5
6# Common objects 6# Common objects
7obj-y := time.o clock.o serial.o io.o psc.o \ 7obj-y := time.o clock.o serial.o psc.o \
8 dma.o usb.o common.o sram.o aemif.o 8 dma.o usb.o common.o sram.o aemif.o
9 9
10obj-$(CONFIG_DAVINCI_MUX) += mux.o 10obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 11c3db985285..dc1afe5be20c 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
682 .timer = &davinci_timer, 682 .timer = &davinci_timer,
683 .init_machine = da830_evm_init, 683 .init_machine = da830_evm_init,
684 .dma_zone_size = SZ_128M, 684 .dma_zone_size = SZ_128M,
685 .restart = da8xx_restart,
685MACHINE_END 686MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 6659a90dbcad..f8a682f60a42 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
1411 .timer = &davinci_timer, 1411 .timer = &davinci_timer,
1412 .init_machine = da850_evm_init, 1412 .init_machine = da850_evm_init,
1413 .dma_zone_size = SZ_128M, 1413 .dma_zone_size = SZ_128M,
1414 .restart = da8xx_restart,
1414MACHINE_END 1415MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 4e0e707c313d..275341f159fb 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
357 .timer = &davinci_timer, 357 .timer = &davinci_timer,
358 .init_machine = dm355_evm_init, 358 .init_machine = dm355_evm_init,
359 .dma_zone_size = SZ_128M, 359 .dma_zone_size = SZ_128M,
360 .restart = davinci_restart,
360MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index ff2d2413279a..e99db28181ae 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
276 .timer = &davinci_timer, 276 .timer = &davinci_timer,
277 .init_machine = dm355_leopard_init, 277 .init_machine = dm355_leopard_init,
278 .dma_zone_size = SZ_128M, 278 .dma_zone_size = SZ_128M,
279 .restart = davinci_restart,
279MACHINE_END 280MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 46e1f4173b97..346e1de2f5a8 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
618 .timer = &davinci_timer, 618 .timer = &davinci_timer,
619 .init_machine = dm365_evm_init, 619 .init_machine = dm365_evm_init,
620 .dma_zone_size = SZ_128M, 620 .dma_zone_size = SZ_128M,
621 .restart = davinci_restart,
621MACHINE_END 622MACHINE_END
622 623
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 0cf8abf78d33..a64b49cfedca 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
719 .timer = &davinci_timer, 719 .timer = &davinci_timer,
720 .init_machine = davinci_evm_init, 720 .init_machine = davinci_evm_init,
721 .dma_zone_size = SZ_128M, 721 .dma_zone_size = SZ_128M,
722 .restart = davinci_restart,
722MACHINE_END 723MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 635bf7740157..64017558860b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
799 .timer = &davinci_timer, 799 .timer = &davinci_timer,
800 .init_machine = evm_init, 800 .init_machine = evm_init,
801 .dma_zone_size = SZ_128M, 801 .dma_zone_size = SZ_128M,
802 .restart = davinci_restart,
802MACHINE_END 803MACHINE_END
803 804
804MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") 805MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
@@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
808 .timer = &davinci_timer, 809 .timer = &davinci_timer,
809 .init_machine = evm_init, 810 .init_machine = evm_init,
810 .dma_zone_size = SZ_128M, 811 .dma_zone_size = SZ_128M,
812 .restart = davinci_restart,
811MACHINE_END 813MACHINE_END
812 814
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 3cfff555e8f2..672d820e2aa4 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
573 .timer = &davinci_timer, 573 .timer = &davinci_timer,
574 .init_machine = mityomapl138_init, 574 .init_machine = mityomapl138_init,
575 .dma_zone_size = SZ_128M, 575 .dma_zone_size = SZ_128M,
576 .restart = da8xx_restart,
576MACHINE_END 577MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index e5f231aefee4..6c4a16415d47 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
278 .timer = &davinci_timer, 278 .timer = &davinci_timer,
279 .init_machine = davinci_ntosd2_init, 279 .init_machine = davinci_ntosd2_init,
280 .dma_zone_size = SZ_128M, 280 .dma_zone_size = SZ_128M,
281 .restart = davinci_restart,
281MACHINE_END 282MACHINE_END
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index c6701e4a795c..e7c0c7c53493 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
344 .timer = &davinci_timer, 344 .timer = &davinci_timer,
345 .init_machine = omapl138_hawk_init, 345 .init_machine = omapl138_hawk_init,
346 .dma_zone_size = SZ_128M, 346 .dma_zone_size = SZ_128M,
347 .restart = da8xx_restart,
347MACHINE_END 348MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 5dd4da9d2308..0b136a831c59 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
157 .timer = &davinci_timer, 157 .timer = &davinci_timer,
158 .init_machine = davinci_sffsdr_init, 158 .init_machine = davinci_sffsdr_init,
159 .dma_zone_size = SZ_128M, 159 .dma_zone_size = SZ_128M,
160 .restart = davinci_restart,
160MACHINE_END 161MACHINE_END
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index f69e40a29e02..5f14e30b00d8 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")
283 .timer = &davinci_timer, 283 .timer = &davinci_timer,
284 .init_machine = tnetv107x_evm_board_init, 284 .init_machine = tnetv107x_evm_board_init,
285 .dma_zone_size = SZ_128M, 285 .dma_zone_size = SZ_128M,
286 .restart = tnetv107x_restart,
286MACHINE_END 287MACHINE_END
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 865ffe5899ac..cb9b2e47510c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
97 local_flush_tlb_all(); 97 local_flush_tlb_all();
98 flush_cache_all(); 98 flush_cache_all();
99 99
100 if (!davinci_soc_info.reset)
101 davinci_soc_info.reset = davinci_watchdog_reset;
102
103 /* 100 /*
104 * We want to check CPU revision early for cpu_is_xxxx() macros. 101 * We want to check CPU revision early for cpu_is_xxxx() macros.
105 * IO space mapping must be initialized before we can do that. 102 * IO space mapping must be initialized before we can do that.
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a6bf5dcaef13..deee5c2da754 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
1201 .gpio_irq = IRQ_DA8XX_GPIO0, 1201 .gpio_irq = IRQ_DA8XX_GPIO0,
1202 .serial_dev = &da8xx_serial_device, 1202 .serial_dev = &da8xx_serial_device,
1203 .emac_pdata = &da8xx_emac_pdata, 1203 .emac_pdata = &da8xx_emac_pdata,
1204 .reset_device = &da8xx_wdt_device,
1205}; 1204};
1206 1205
1207void __init da830_init(void) 1206void __init da830_init(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f8702278..0ed7fdb64efb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
1121 .emac_pdata = &da8xx_emac_pdata, 1121 .emac_pdata = &da8xx_emac_pdata,
1122 .sram_dma = DA8XX_ARM_RAM_BASE, 1122 .sram_dma = DA8XX_ARM_RAM_BASE,
1123 .sram_len = SZ_8K, 1123 .sram_len = SZ_8K,
1124 .reset_device = &da8xx_wdt_device,
1125}; 1124};
1126 1125
1127void __init da850_init(void) 1126void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 68def7188868..42dbf3dc11ab 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = {
363 .resource = da8xx_watchdog_resources, 363 .resource = da8xx_watchdog_resources,
364}; 364};
365 365
366void da8xx_restart(char mode, const char *cmd)
367{
368 davinci_watchdog_reset(&da8xx_wdt_device);
369}
370
366int __init da8xx_register_watchdog(void) 371int __init da8xx_register_watchdog(void)
367{ 372{
368 return platform_device_register(&da8xx_wdt_device); 373 return platform_device_register(&da8xx_wdt_device);
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 806a2f02b980..50c0156b4262 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = {
291 .resource = wdt_resources, 291 .resource = wdt_resources,
292}; 292};
293 293
294void davinci_restart(char mode, const char *cmd)
295{
296 davinci_watchdog_reset(&davinci_wdt_device);
297}
298
294static void davinci_init_wdt(void) 299static void davinci_init_wdt(void)
295{ 300{
296 platform_device_register(&davinci_wdt_device); 301 platform_device_register(&davinci_wdt_device);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index fe520d4167a2..19667cfc5de0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
853 .serial_dev = &dm355_serial_device, 853 .serial_dev = &dm355_serial_device,
854 .sram_dma = 0x00010000, 854 .sram_dma = 0x00010000,
855 .sram_len = SZ_32K, 855 .sram_len = SZ_32K,
856 .reset_device = &davinci_wdt_device,
857}; 856};
858 857
859void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) 858void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 679e168dce34..f15b435cc655 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
1083 .emac_pdata = &dm365_emac_pdata, 1083 .emac_pdata = &dm365_emac_pdata,
1084 .sram_dma = 0x00010000, 1084 .sram_dma = 0x00010000,
1085 .sram_len = SZ_32K, 1085 .sram_len = SZ_32K,
1086 .reset_device = &davinci_wdt_device,
1087}; 1086};
1088 1087
1089void __init dm365_init_asp(struct snd_platform_data *pdata) 1088void __init dm365_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 3470983aa343..0800f9cf33bb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
767 .emac_pdata = &dm644x_emac_pdata, 767 .emac_pdata = &dm644x_emac_pdata,
768 .sram_dma = 0x00008000, 768 .sram_dma = 0x00008000,
769 .sram_len = SZ_16K, 769 .sram_len = SZ_16K,
770 .reset_device = &davinci_wdt_device,
771}; 770};
772 771
773void __init dm644x_init_asp(struct snd_platform_data *pdata) 772void __init dm644x_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index af27c130595f..00f774394b16 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -854,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
854 .emac_pdata = &dm646x_emac_pdata, 854 .emac_pdata = &dm646x_emac_pdata,
855 .sram_dma = 0x10010000, 855 .sram_dma = 0x10010000,
856 .sram_len = SZ_32K, 856 .sram_len = SZ_32K,
857 .reset_device = &davinci_wdt_device,
858}; 857};
859 858
860void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) 859void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a57cba21e21e..5cd39a4e0c96 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -77,14 +77,13 @@ struct davinci_soc_info {
77 struct emac_platform_data *emac_pdata; 77 struct emac_platform_data *emac_pdata;
78 dma_addr_t sram_dma; 78 dma_addr_t sram_dma;
79 unsigned sram_len; 79 unsigned sram_len;
80 struct platform_device *reset_device;
81 void (*reset)(struct platform_device *);
82}; 80};
83 81
84extern struct davinci_soc_info davinci_soc_info; 82extern struct davinci_soc_info davinci_soc_info;
85 83
86extern void davinci_common_init(struct davinci_soc_info *soc_info); 84extern void davinci_common_init(struct davinci_soc_info *soc_info);
87extern void davinci_init_ide(void); 85extern void davinci_init_ide(void);
86void davinci_restart(char mode, const char *cmd);
88 87
89/* standard place to map on-chip SRAMs; they *may* support DMA */ 88/* standard place to map on-chip SRAMs; they *may* support DMA */
90#define SRAM_VIRT 0xfffe0000 89#define SRAM_VIRT 0xfffe0000
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index eaca7d8b9d68..ee3461d7ec1b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void);
91void __iomem * __init da8xx_get_mem_ctlr(void); 91void __iomem * __init da8xx_get_mem_ctlr(void);
92int da850_register_pm(struct platform_device *pdev); 92int da850_register_pm(struct platform_device *pdev);
93int __init da850_register_sata(unsigned long refclkpn); 93int __init da850_register_sata(unsigned long refclkpn);
94void da8xx_restart(char mode, const char *cmd);
94 95
95extern struct platform_device da8xx_serial_device; 96extern struct platform_device da8xx_serial_device;
96extern struct emac_platform_data da8xx_emac_pdata; 97extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 2a00fe5ac253..a8ee6c9f0bb0 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -16,6 +16,7 @@
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/videodev2.h> 17#include <linux/videodev2.h>
18#include <linux/davinci_emac.h> 18#include <linux/davinci_emac.h>
19#include <media/davinci/vpif_types.h>
19 20
20#define DM646X_EMAC_BASE (0x01C80000) 21#define DM646X_EMAC_BASE (0x01C80000)
21#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) 22#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
@@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv);
34 35
35void dm646x_video_init(void); 36void dm646x_video_init(void);
36 37
37enum vpif_if_type {
38 VPIF_IF_BT656,
39 VPIF_IF_BT1120,
40 VPIF_IF_RAW_BAYER
41};
42
43struct vpif_interface {
44 enum vpif_if_type if_type;
45 unsigned hd_pol:1;
46 unsigned vd_pol:1;
47 unsigned fid_pol:1;
48};
49
50struct vpif_subdev_info {
51 const char *name;
52 struct i2c_board_info board_info;
53 u32 input;
54 u32 output;
55 unsigned can_route:1;
56 struct vpif_interface vpif_if;
57};
58
59struct vpif_display_config {
60 int (*set_clock)(int, int);
61 struct vpif_subdev_info *subdevinfo;
62 int subdev_count;
63 const char **output;
64 int output_count;
65 const char *card_name;
66};
67
68struct vpif_input {
69 struct v4l2_input input;
70 const char *subdev_name;
71};
72
73#define VPIF_CAPTURE_MAX_CHANNELS 2
74
75struct vpif_capture_chan_config {
76 const struct vpif_input *inputs;
77 int input_count;
78};
79
80struct vpif_capture_config {
81 int (*setup_input_channel_mode)(int);
82 int (*setup_input_path)(int, const char *);
83 struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
84 struct vpif_subdev_info *subdev_info;
85 int subdev_count;
86 const char *card_name;
87};
88
89void dm646x_setup_vpif(struct vpif_display_config *, 38void dm646x_setup_vpif(struct vpif_display_config *,
90 struct vpif_capture_config *); 39 struct vpif_capture_config *);
91 40
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index d1b954955c12..b2267d1e1a71 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -21,12 +21,4 @@
21#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
22#define __mem_isa(a) (a) 22#define __mem_isa(a) (a)
23 23
24#ifndef __ASSEMBLER__
25#define __arch_ioremap davinci_ioremap
26#define __arch_iounmap davinci_iounmap
27
28void __iomem *davinci_ioremap(unsigned long phys, size_t size,
29 unsigned int type);
30void davinci_iounmap(volatile void __iomem *addr);
31#endif
32#endif /* __ASM_ARCH_IO_H */ 24#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index e65629c20769..fcb7a015aba5 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -18,10 +18,4 @@ static inline void arch_idle(void)
18 cpu_do_idle(); 18 cpu_do_idle();
19} 19}
20 20
21static inline void arch_reset(char mode, const char *cmd)
22{
23 if (davinci_soc_info.reset)
24 davinci_soc_info.reset(davinci_soc_info.reset_device);
25}
26
27#endif /* __ASM_ARCH_SYSTEM_H */ 21#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 89c1fdc63c0b..83e5926f3c46 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device;
54extern void __init tnetv107x_init(void); 54extern void __init tnetv107x_init(void);
55extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); 55extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *);
56extern void __init tnetv107x_irq_init(void); 56extern void __init tnetv107x_irq_init(void);
57void tnetv107x_restart(char mode, const char *cmd);
57 58
58#endif 59#endif
59 60
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
deleted file mode 100644
index d49646a8e206..000000000000
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * DaVinci vmalloc definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <mach/hardware.h>
12
13/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
14#define VMALLOC_END (IO_VIRT - (2<<20))
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
deleted file mode 100644
index 8ea60a8b2495..000000000000
--- a/arch/arm/mach-davinci/io.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * DaVinci I/O mapping code
3 *
4 * Copyright (C) 2005-2006 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/io.h>
13
14#include <asm/tlb.h>
15#include <asm/mach/map.h>
16
17#include <mach/common.h>
18
19/*
20 * Intercept ioremap() requests for addresses in our fixed mapping regions.
21 */
22void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
23{
24 struct map_desc *desc = davinci_soc_info.io_desc;
25 int desc_num = davinci_soc_info.io_desc_num;
26 int i;
27
28 for (i = 0; i < desc_num; i++, desc++) {
29 unsigned long iophys = __pfn_to_phys(desc->pfn);
30 unsigned long iosize = desc->length;
31
32 if (p >= iophys && (p + size) <= (iophys + iosize))
33 return __io(desc->virtual + p - iophys);
34 }
35
36 return __arm_ioremap_caller(p, size, type,
37 __builtin_return_address(0));
38}
39EXPORT_SYMBOL(davinci_ioremap);
40
41void davinci_iounmap(volatile void __iomem *addr)
42{
43 unsigned long virt = (unsigned long)addr;
44
45 if (virt >= VMALLOC_START && virt < VMALLOC_END)
46 __iounmap(addr);
47}
48EXPORT_SYMBOL(davinci_iounmap);
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 409bb869c7c7..dc1a209b9b66 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev)
730 __raw_writel(1, &regs->kick); 730 __raw_writel(1, &regs->kick);
731} 731}
732 732
733void tnetv107x_restart(char mode, const char *cmd)
734{
735 tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
736}
737
733static struct davinci_soc_info tnetv107x_soc_info = { 738static struct davinci_soc_info tnetv107x_soc_info = {
734 .io_desc = io_desc, 739 .io_desc = io_desc,
735 .io_desc_num = ARRAY_SIZE(io_desc), 740 .io_desc_num = ARRAY_SIZE(io_desc),
@@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = {
752 .gpio_num = TNETV107X_N_GPIO, 757 .gpio_num = TNETV107X_N_GPIO,
753 .timer_info = &timer_info, 758 .timer_info = &timer_info,
754 .serial_dev = &tnetv107x_serial_device, 759 .serial_dev = &tnetv107x_serial_device,
755 .reset = tnetv107x_watchdog_reset,
756 .reset_device = &tnetv107x_wdt_device,
757}; 760};
758 761
759void __init tnetv107x_init(void) 762void __init tnetv107x_init(void)
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c
index c8a406f7e946..792b4e2e24f1 100644
--- a/arch/arm/mach-dove/cm-a510.c
+++ b/arch/arm/mach-dove/cm-a510.c
@@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
93 .init_early = dove_init_early, 93 .init_early = dove_init_early,
94 .init_irq = dove_init_irq, 94 .init_irq = dove_init_irq,
95 .timer = &dove_timer, 95 .timer = &dove_timer,
96 .restart = dove_restart,
96MACHINE_END 97MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae86a26..13bb236cd0cd 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -292,3 +292,19 @@ void __init dove_init(void)
292 dove_xor0_init(); 292 dove_xor0_init();
293 dove_xor1_init(); 293 dove_xor1_init();
294} 294}
295
296void dove_restart(char mode, const char *cmd)
297{
298 /*
299 * Enable soft reset to assert RSTOUTn.
300 */
301 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
302
303 /*
304 * Assert soft reset.
305 */
306 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
307
308 while (1)
309 ;
310}
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e44706..42027305c107 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -39,5 +39,6 @@ void dove_spi1_init(void);
39void dove_i2c_init(void); 39void dove_i2c_init(void);
40void dove_sdio0_init(void); 40void dove_sdio0_init(void);
41void dove_sdio1_init(void); 41void dove_sdio1_init(void);
42void dove_restart(char, const char *);
42 43
43#endif 44#endif
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c
index 11ea34e4fc76..ea77ae430b2d 100644
--- a/arch/arm/mach-dove/dove-db-setup.c
+++ b/arch/arm/mach-dove/dove-db-setup.c
@@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
100 .init_early = dove_init_early, 100 .init_early = dove_init_early,
101 .init_irq = dove_init_irq, 101 .init_irq = dove_init_irq,
102 .timer = &dove_timer, 102 .timer = &dove_timer,
103 .restart = dove_restart,
103MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index b20ec9af7882..ad1165d488c1 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_DOVE_H 11#ifndef __ASM_ARCH_DOVE_H
12#define __ASM_ARCH_DOVE_H 12#define __ASM_ARCH_DOVE_H
13 13
14#include <mach/vmalloc.h>
15
16/* 14/*
17 * Marvell Dove address maps. 15 * Marvell Dove address maps.
18 * 16 *
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
index 356afda56853..3027954f6162 100644
--- a/arch/arm/mach-dove/include/mach/system.h
+++ b/arch/arm/mach-dove/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h
deleted file mode 100644
index a28792cf761e..000000000000
--- a/arch/arm/mach-dove/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-dove/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfd800000UL
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index d0ce8abdd4b6..294aad07f7a0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -278,13 +278,19 @@ static int __init ebsa110_init(void)
278 278
279arch_initcall(ebsa110_init); 279arch_initcall(ebsa110_init);
280 280
281static void ebsa110_restart(char mode, const char *cmd)
282{
283 soft_restart(0x80000000);
284}
285
281MACHINE_START(EBSA110, "EBSA110") 286MACHINE_START(EBSA110, "EBSA110")
282 /* Maintainer: Russell King */ 287 /* Maintainer: Russell King */
283 .atag_offset = 0x400, 288 .atag_offset = 0x400,
284 .reserve_lp0 = 1, 289 .reserve_lp0 = 1,
285 .reserve_lp2 = 1, 290 .reserve_lp2 = 1,
286 .soft_reboot = 1, 291 .restart_mode = 's',
287 .map_io = ebsa110_map_io, 292 .map_io = ebsa110_map_io,
288 .init_irq = ebsa110_init_irq, 293 .init_irq = ebsa110_init_irq,
289 .timer = &ebsa110_timer, 294 .timer = &ebsa110_timer,
295 .restart = ebsa110_restart,
290MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 9a26245bf1fc..2e4af65edb6f 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -34,6 +34,4 @@ static inline void arch_idle(void)
34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); 34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
35} 35}
36 36
37#define arch_reset(mode, cmd) cpu_reset(0x80000000)
38
39#endif 37#endif
diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h
deleted file mode 100644
index ea141b7a3e03..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-ebsa110/include/mach/vmalloc.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define VMALLOC_END 0xdf000000UL
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 0713448206a5..681e939407d4 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,8 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
43 .restart = ep93xx_restart,
41MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 2432a6b7dcac..24203f9a6796 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void)
906 platform_device_register(&ep93xx_ohci_device); 906 platform_device_register(&ep93xx_ohci_device);
907 platform_device_register(&ep93xx_leds); 907 platform_device_register(&ep93xx_leds);
908} 908}
909
910void ep93xx_restart(char mode, const char *cmd)
911{
912 /*
913 * Set then clear the SWRST bit to initiate a software reset
914 */
915 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
916 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
917
918 while (1)
919 ;
920}
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 70ef8c527d27..d115653edca3 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,6 +39,7 @@
39#include <mach/ep93xx_spi.h> 39#include <mach/ep93xx_spi.h>
40#include <mach/gpio-ep93xx.h> 40#include <mach/gpio-ep93xx.h>
41 41
42#include <asm/hardware/vic.h>
42#include <asm/mach-types.h> 43#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 44#include <asm/mach/arch.h>
44 45
@@ -250,8 +251,10 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
250 .atag_offset = 0x100, 251 .atag_offset = 0x100,
251 .map_io = ep93xx_map_io, 252 .map_io = ep93xx_map_io,
252 .init_irq = ep93xx_init_irq, 253 .init_irq = ep93xx_init_irq,
254 .handle_irq = vic_handle_irq,
253 .timer = &ep93xx_timer, 255 .timer = &ep93xx_timer,
254 .init_machine = edb93xx_init_machine, 256 .init_machine = edb93xx_init_machine,
257 .restart = ep93xx_restart,
255MACHINE_END 258MACHINE_END
256#endif 259#endif
257 260
@@ -261,8 +264,10 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
261 .atag_offset = 0x100, 264 .atag_offset = 0x100,
262 .map_io = ep93xx_map_io, 265 .map_io = ep93xx_map_io,
263 .init_irq = ep93xx_init_irq, 266 .init_irq = ep93xx_init_irq,
267 .handle_irq = vic_handle_irq,
264 .timer = &ep93xx_timer, 268 .timer = &ep93xx_timer,
265 .init_machine = edb93xx_init_machine, 269 .init_machine = edb93xx_init_machine,
270 .restart = ep93xx_restart,
266MACHINE_END 271MACHINE_END
267#endif 272#endif
268 273
@@ -272,8 +277,10 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
272 .atag_offset = 0x100, 277 .atag_offset = 0x100,
273 .map_io = ep93xx_map_io, 278 .map_io = ep93xx_map_io,
274 .init_irq = ep93xx_init_irq, 279 .init_irq = ep93xx_init_irq,
280 .handle_irq = vic_handle_irq,
275 .timer = &ep93xx_timer, 281 .timer = &ep93xx_timer,
276 .init_machine = edb93xx_init_machine, 282 .init_machine = edb93xx_init_machine,
283 .restart = ep93xx_restart,
277MACHINE_END 284MACHINE_END
278#endif 285#endif
279 286
@@ -283,8 +290,10 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
283 .atag_offset = 0x100, 290 .atag_offset = 0x100,
284 .map_io = ep93xx_map_io, 291 .map_io = ep93xx_map_io,
285 .init_irq = ep93xx_init_irq, 292 .init_irq = ep93xx_init_irq,
293 .handle_irq = vic_handle_irq,
286 .timer = &ep93xx_timer, 294 .timer = &ep93xx_timer,
287 .init_machine = edb93xx_init_machine, 295 .init_machine = edb93xx_init_machine,
296 .restart = ep93xx_restart,
288MACHINE_END 297MACHINE_END
289#endif 298#endif
290 299
@@ -294,8 +303,10 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
294 .atag_offset = 0x100, 303 .atag_offset = 0x100,
295 .map_io = ep93xx_map_io, 304 .map_io = ep93xx_map_io,
296 .init_irq = ep93xx_init_irq, 305 .init_irq = ep93xx_init_irq,
306 .handle_irq = vic_handle_irq,
297 .timer = &ep93xx_timer, 307 .timer = &ep93xx_timer,
298 .init_machine = edb93xx_init_machine, 308 .init_machine = edb93xx_init_machine,
309 .restart = ep93xx_restart,
299MACHINE_END 310MACHINE_END
300#endif 311#endif
301 312
@@ -305,8 +316,10 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
305 .atag_offset = 0x100, 316 .atag_offset = 0x100,
306 .map_io = ep93xx_map_io, 317 .map_io = ep93xx_map_io,
307 .init_irq = ep93xx_init_irq, 318 .init_irq = ep93xx_init_irq,
319 .handle_irq = vic_handle_irq,
308 .timer = &ep93xx_timer, 320 .timer = &ep93xx_timer,
309 .init_machine = edb93xx_init_machine, 321 .init_machine = edb93xx_init_machine,
322 .restart = ep93xx_restart,
310MACHINE_END 323MACHINE_END
311#endif 324#endif
312 325
@@ -316,8 +329,10 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
316 .atag_offset = 0x100, 329 .atag_offset = 0x100,
317 .map_io = ep93xx_map_io, 330 .map_io = ep93xx_map_io,
318 .init_irq = ep93xx_init_irq, 331 .init_irq = ep93xx_init_irq,
332 .handle_irq = vic_handle_irq,
319 .timer = &ep93xx_timer, 333 .timer = &ep93xx_timer,
320 .init_machine = edb93xx_init_machine, 334 .init_machine = edb93xx_init_machine,
335 .restart = ep93xx_restart,
321MACHINE_END 336MACHINE_END
322#endif 337#endif
323 338
@@ -327,7 +342,9 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
327 .atag_offset = 0x100, 342 .atag_offset = 0x100,
328 .map_io = ep93xx_map_io, 343 .map_io = ep93xx_map_io,
329 .init_irq = ep93xx_init_irq, 344 .init_irq = ep93xx_init_irq,
345 .handle_irq = vic_handle_irq,
330 .timer = &ep93xx_timer, 346 .timer = &ep93xx_timer,
331 .init_machine = edb93xx_init_machine, 347 .init_machine = edb93xx_init_machine,
348 .restart = ep93xx_restart,
332MACHINE_END 349MACHINE_END
333#endif 350#endif
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 45ee205856f8..af46970dc58e 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,8 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
43 .restart = ep93xx_restart,
41MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2c2c0b..9be6edcf9045 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
9 * the Free Software Foundation; either version 2 of the License, or (at 9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version. 10 * your option) any later version.
11 */ 11 */
12#include <mach/ep93xx-regs.h>
13 12
14 .macro disable_fiq 13 .macro disable_fiq
15 .endm 14 .endm
16 15
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 17 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, =(EP93XX_AHB_VIRT_BASE)
25 orr \base, \base, #0x000b0000
26 mov \irqnr, #0
27 ldr \irqstat, [\base] @ lower 32 interrupts
28 cmp \irqstat, #0
29 bne 1001f
30
31 eor \base, \base, #0x00070000
32 ldr \irqstat, [\base] @ upper 32 interrupts
33 cmp \irqstat, #0
34 beq 1002f
35 mov \irqnr, #0x20
36
371001:
38 movs \tmp, \irqstat, lsl #16
39 movne \irqstat, \tmp
40 addeq \irqnr, \irqnr, #16
41
42 movs \tmp, \irqstat, lsl #8
43 movne \irqstat, \tmp
44 addeq \irqnr, \irqnr, #8
45
46 movs \tmp, \irqstat, lsl #4
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #4
49
50 movs \tmp, \irqstat, lsl #2
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #2
53
54 movs \tmp, \irqstat, lsl #1
55 addeq \irqnr, \irqnr, #1
56 orrs \base, \base, #1
57
581002:
59 .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 50660455b1d8..d4c934931f9d 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -66,4 +66,6 @@ void ep93xx_register_ac97(void);
66void ep93xx_init_devices(void); 66void ep93xx_init_devices(void);
67extern struct sys_timer ep93xx_timer; 67extern struct sys_timer ep93xx_timer;
68 68
69void ep93xx_restart(char, const char *);
70
69#endif 71#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
index 6d661fe9d66c..b5bec7cb9b52 100644
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -1,24 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ep93xx/include/mach/system.h 2 * arch/arm/mach-ep93xx/include/mach/system.h
3 */ 3 */
4
5#include <mach/hardware.h>
6
7static inline void arch_idle(void) 4static inline void arch_idle(void)
8{ 5{
9 cpu_do_idle(); 6 cpu_do_idle();
10} 7}
11
12static inline void arch_reset(char mode, const char *cmd)
13{
14 local_irq_disable();
15
16 /*
17 * Set then clear the SWRST bit to initiate a software reset
18 */
19 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
20 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
21
22 while (1)
23 ;
24}
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
deleted file mode 100644
index 1b3f25d03d39..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index e72f7368876e..7b98084f0c97 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20 20
21#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23 24
@@ -80,8 +81,10 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = micro9_init_machine, 86 .init_machine = micro9_init_machine,
87 .restart = ep93xx_restart,
85MACHINE_END 88MACHINE_END
86#endif 89#endif
87 90
@@ -91,8 +94,10 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
91 .atag_offset = 0x100, 94 .atag_offset = 0x100,
92 .map_io = ep93xx_map_io, 95 .map_io = ep93xx_map_io,
93 .init_irq = ep93xx_init_irq, 96 .init_irq = ep93xx_init_irq,
97 .handle_irq = vic_handle_irq,
94 .timer = &ep93xx_timer, 98 .timer = &ep93xx_timer,
95 .init_machine = micro9_init_machine, 99 .init_machine = micro9_init_machine,
100 .restart = ep93xx_restart,
96MACHINE_END 101MACHINE_END
97#endif 102#endif
98 103
@@ -102,8 +107,10 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
102 .atag_offset = 0x100, 107 .atag_offset = 0x100,
103 .map_io = ep93xx_map_io, 108 .map_io = ep93xx_map_io,
104 .init_irq = ep93xx_init_irq, 109 .init_irq = ep93xx_init_irq,
110 .handle_irq = vic_handle_irq,
105 .timer = &ep93xx_timer, 111 .timer = &ep93xx_timer,
106 .init_machine = micro9_init_machine, 112 .init_machine = micro9_init_machine,
113 .restart = ep93xx_restart,
107MACHINE_END 114MACHINE_END
108#endif 115#endif
109 116
@@ -113,7 +120,9 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
113 .atag_offset = 0x100, 120 .atag_offset = 0x100,
114 .map_io = ep93xx_map_io, 121 .map_io = ep93xx_map_io,
115 .init_irq = ep93xx_init_irq, 122 .init_irq = ep93xx_init_irq,
123 .handle_irq = vic_handle_irq,
116 .timer = &ep93xx_timer, 124 .timer = &ep93xx_timer,
117 .init_machine = micro9_init_machine, 125 .init_machine = micro9_init_machine,
126 .restart = ep93xx_restart,
118MACHINE_END 127MACHINE_END
119#endif 128#endif
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 52e090dc9d27..f4e553eca21c 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
25#include <mach/fb.h> 25#include <mach/fb.h>
26#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30 31
@@ -80,6 +81,8 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
87 .restart = ep93xx_restart,
85MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 8121e3aedc0a..fd846331ddff 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
31#include <mach/fb.h> 31#include <mach/fb.h>
32#include <mach/gpio-ep93xx.h> 32#include <mach/gpio-ep93xx.h>
33 33
34#include <asm/hardware/vic.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36 37
@@ -177,6 +178,8 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
177 .atag_offset = 0x100, 178 .atag_offset = 0x100,
178 .map_io = ep93xx_map_io, 179 .map_io = ep93xx_map_io,
179 .init_irq = ep93xx_init_irq, 180 .init_irq = ep93xx_init_irq,
181 .handle_irq = vic_handle_irq,
180 .timer = &ep93xx_timer, 182 .timer = &ep93xx_timer,
181 .init_machine = snappercl15_init_machine, 183 .init_machine = snappercl15_init_machine,
184 .restart = ep93xx_restart,
182MACHINE_END 185MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 8b2f1435bcac..79f8ecf07a19 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/ts72xx.h> 24#include <mach/ts72xx.h>
25 25
26#include <asm/hardware/vic.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
@@ -247,6 +248,8 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
247 .atag_offset = 0x100, 248 .atag_offset = 0x100,
248 .map_io = ts72xx_map_io, 249 .map_io = ts72xx_map_io,
249 .init_irq = ep93xx_init_irq, 250 .init_irq = ep93xx_init_irq,
251 .handle_irq = vic_handle_irq,
250 .timer = &ep93xx_timer, 252 .timer = &ep93xx_timer,
251 .init_machine = ts72xx_init_machine, 253 .init_machine = ts72xx_init_machine,
254 .restart = ep93xx_restart,
252MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d96e4dbec6a8..03dd4012043e 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 .init_irq = ep93xx_init_irq, 361 .init_irq = ep93xx_init_irq,
362 .timer = &ep93xx_timer, 362 .timer = &ep93xx_timer,
363 .init_machine = vision_init_machine, 363 .init_machine = vision_init_machine,
364 .restart = ep93xx_restart,
364MACHINE_END 365MACHINE_END
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 4e36e8f4e157..5d602f68a0e8 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -17,6 +17,8 @@ choice
17 17
18config ARCH_EXYNOS4 18config ARCH_EXYNOS4
19 bool "SAMSUNG EXYNOS4" 19 bool "SAMSUNG EXYNOS4"
20 select HAVE_SMP
21 select MIGHT_HAVE_CACHE_L2X0
20 help 22 help
21 Samsung EXYNOS4 SoCs based systems 23 Samsung EXYNOS4 SoCs based systems
22 24
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index db527ab4759c..5fc202cdfdb6 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -10,15 +10,17 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for EXYNOS4 system 13# Core
14 14
15obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o 15obj-$(CONFIG_ARCH_EXYNOS4) += common.o clock.o
16obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o pmu.o
17obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o 16obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
18obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o 17obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
18
19obj-$(CONFIG_PM) += pm.o 19obj-$(CONFIG_PM) += pm.o
20obj-$(CONFIG_CPU_IDLE) += cpuidle.o 20obj-$(CONFIG_CPU_IDLE) += cpuidle.o
21 21
22obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o
23
22obj-$(CONFIG_SMP) += platsmp.o headsmp.o 24obj-$(CONFIG_SMP) += platsmp.o headsmp.o
23 25
24obj-$(CONFIG_EXYNOS4_MCT) += mct.o 26obj-$(CONFIG_EXYNOS4_MCT) += mct.o
@@ -49,6 +51,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
49obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o 51obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
50obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o 52obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
51 53
54obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o
52obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o 55obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
53obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o 56obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
54obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o 57obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c
index b9d5ef670eb4..a5823a7f249e 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -23,7 +23,6 @@
23#include <plat/pll.h> 23#include <plat/pll.h>
24#include <plat/s5p-clock.h> 24#include <plat/s5p-clock.h>
25#include <plat/clock-clksrc.h> 25#include <plat/clock-clksrc.h>
26#include <plat/exynos4.h>
27#include <plat/pm.h> 26#include <plat/pm.h>
28 27
29#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -31,6 +30,8 @@
31#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
32#include <mach/exynos4-clock.h> 31#include <mach/exynos4-clock.h>
33 32
33#include "common.h"
34
34static struct sleep_save exynos4210_clock_save[] = { 35static struct sleep_save exynos4210_clock_save[] = {
35 SAVE_ITEM(S5P_CLKSRC_IMAGE), 36 SAVE_ITEM(S5P_CLKSRC_IMAGE),
36 SAVE_ITEM(S5P_CLKSRC_LCD1), 37 SAVE_ITEM(S5P_CLKSRC_LCD1),
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 77d5decb34fd..26a668b0d101 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -23,7 +23,6 @@
23#include <plat/pll.h> 23#include <plat/pll.h>
24#include <plat/s5p-clock.h> 24#include <plat/s5p-clock.h>
25#include <plat/clock-clksrc.h> 25#include <plat/clock-clksrc.h>
26#include <plat/exynos4.h>
27#include <plat/pm.h> 26#include <plat/pm.h>
28 27
29#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -31,6 +30,8 @@
31#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
32#include <mach/exynos4-clock.h> 31#include <mach/exynos4-clock.h>
33 32
33#include "common.h"
34
34static struct sleep_save exynos4212_clock_save[] = { 35static struct sleep_save exynos4212_clock_save[] = {
35 SAVE_ITEM(S5P_CLKSRC_IMAGE), 36 SAVE_ITEM(S5P_CLKSRC_IMAGE),
36 SAVE_ITEM(S5P_CLKDIV_IMAGE), 37 SAVE_ITEM(S5P_CLKDIV_IMAGE),
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index da50b1af7568..5a8c42e90005 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -21,7 +21,6 @@
21#include <plat/pll.h> 21#include <plat/pll.h>
22#include <plat/s5p-clock.h> 22#include <plat/s5p-clock.h>
23#include <plat/clock-clksrc.h> 23#include <plat/clock-clksrc.h>
24#include <plat/exynos4.h>
25#include <plat/pm.h> 24#include <plat/pm.h>
26 25
27#include <mach/map.h> 26#include <mach/map.h>
@@ -29,6 +28,8 @@
29#include <mach/sysmmu.h> 28#include <mach/sysmmu.h>
30#include <mach/exynos4-clock.h> 29#include <mach/exynos4-clock.h>
31 30
31#include "common.h"
32
32static struct sleep_save exynos4_clock_save[] = { 33static struct sleep_save exynos4_clock_save[] = {
33 SAVE_ITEM(S5P_CLKDIV_LEFTBUS), 34 SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
34 SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), 35 SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
new file mode 100644
index 000000000000..b4beb7e2b5b8
--- /dev/null
+++ b/arch/arm/mach-exynos/common.c
@@ -0,0 +1,698 @@
1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Codes for EXYNOS
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/sysdev.h>
17#include <linux/gpio.h>
18#include <linux/sched.h>
19#include <linux/serial_core.h>
20#include <linux/of.h>
21#include <linux/of_irq.h>
22
23#include <asm/proc-fns.h>
24#include <asm/exception.h>
25#include <asm/hardware/cache-l2x0.h>
26#include <asm/hardware/gic.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include <mach/regs-irq.h>
31#include <mach/regs-pmu.h>
32#include <mach/regs-gpio.h>
33
34#include <plat/cpu.h>
35#include <plat/clock.h>
36#include <plat/devs.h>
37#include <plat/pm.h>
38#include <plat/sdhci.h>
39#include <plat/gpio-cfg.h>
40#include <plat/adc-core.h>
41#include <plat/fb-core.h>
42#include <plat/fimc-core.h>
43#include <plat/iic-core.h>
44#include <plat/tv-core.h>
45#include <plat/regs-serial.h>
46
47#include "common.h"
48
49static const char name_exynos4210[] = "EXYNOS4210";
50static const char name_exynos4212[] = "EXYNOS4212";
51static const char name_exynos4412[] = "EXYNOS4412";
52
53static struct cpu_table cpu_ids[] __initdata = {
54 {
55 .idcode = EXYNOS4210_CPU_ID,
56 .idmask = EXYNOS4_CPU_MASK,
57 .map_io = exynos4_map_io,
58 .init_clocks = exynos4_init_clocks,
59 .init_uarts = exynos4_init_uarts,
60 .init = exynos_init,
61 .name = name_exynos4210,
62 }, {
63 .idcode = EXYNOS4212_CPU_ID,
64 .idmask = EXYNOS4_CPU_MASK,
65 .map_io = exynos4_map_io,
66 .init_clocks = exynos4_init_clocks,
67 .init_uarts = exynos4_init_uarts,
68 .init = exynos_init,
69 .name = name_exynos4212,
70 }, {
71 .idcode = EXYNOS4412_CPU_ID,
72 .idmask = EXYNOS4_CPU_MASK,
73 .map_io = exynos4_map_io,
74 .init_clocks = exynos4_init_clocks,
75 .init_uarts = exynos4_init_uarts,
76 .init = exynos_init,
77 .name = name_exynos4412,
78 },
79};
80
81/* Initial IO mappings */
82
83static struct map_desc exynos_iodesc[] __initdata = {
84 {
85 .virtual = (unsigned long)S5P_VA_CHIPID,
86 .pfn = __phys_to_pfn(EXYNOS4_PA_CHIPID),
87 .length = SZ_4K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = (unsigned long)S3C_VA_SYS,
91 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON),
92 .length = SZ_64K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C_VA_TIMER,
96 .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
97 .length = SZ_16K,
98 .type = MT_DEVICE,
99 }, {
100 .virtual = (unsigned long)S3C_VA_WATCHDOG,
101 .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 }, {
105 .virtual = (unsigned long)S5P_VA_SROMC,
106 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
107 .length = SZ_4K,
108 .type = MT_DEVICE,
109 }, {
110 .virtual = (unsigned long)S5P_VA_SYSTIMER,
111 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
112 .length = SZ_4K,
113 .type = MT_DEVICE,
114 }, {
115 .virtual = (unsigned long)S5P_VA_PMU,
116 .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
117 .length = SZ_64K,
118 .type = MT_DEVICE,
119 }, {
120 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
121 .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
122 .length = SZ_4K,
123 .type = MT_DEVICE,
124 }, {
125 .virtual = (unsigned long)S5P_VA_GIC_CPU,
126 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
127 .length = SZ_64K,
128 .type = MT_DEVICE,
129 }, {
130 .virtual = (unsigned long)S5P_VA_GIC_DIST,
131 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
132 .length = SZ_64K,
133 .type = MT_DEVICE,
134 }, {
135 .virtual = (unsigned long)S3C_VA_UART,
136 .pfn = __phys_to_pfn(EXYNOS4_PA_UART),
137 .length = SZ_512K,
138 .type = MT_DEVICE,
139 },
140};
141
142static struct map_desc exynos4_iodesc[] __initdata = {
143 {
144 .virtual = (unsigned long)S5P_VA_CMU,
145 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
146 .length = SZ_128K,
147 .type = MT_DEVICE,
148 }, {
149 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
150 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
151 .length = SZ_8K,
152 .type = MT_DEVICE,
153 }, {
154 .virtual = (unsigned long)S5P_VA_L2CC,
155 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
156 .length = SZ_4K,
157 .type = MT_DEVICE,
158 }, {
159 .virtual = (unsigned long)S5P_VA_GPIO1,
160 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
161 .length = SZ_4K,
162 .type = MT_DEVICE,
163 }, {
164 .virtual = (unsigned long)S5P_VA_GPIO2,
165 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
166 .length = SZ_4K,
167 .type = MT_DEVICE,
168 }, {
169 .virtual = (unsigned long)S5P_VA_GPIO3,
170 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
171 .length = SZ_256,
172 .type = MT_DEVICE,
173 }, {
174 .virtual = (unsigned long)S5P_VA_DMC0,
175 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
176 .length = SZ_4K,
177 .type = MT_DEVICE,
178 }, {
179 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
180 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
181 .length = SZ_4K,
182 .type = MT_DEVICE,
183 },
184};
185
186static struct map_desc exynos4_iodesc0[] __initdata = {
187 {
188 .virtual = (unsigned long)S5P_VA_SYSRAM,
189 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
190 .length = SZ_4K,
191 .type = MT_DEVICE,
192 },
193};
194
195static struct map_desc exynos4_iodesc1[] __initdata = {
196 {
197 .virtual = (unsigned long)S5P_VA_SYSRAM,
198 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
199 .length = SZ_4K,
200 .type = MT_DEVICE,
201 },
202};
203
204static void exynos_idle(void)
205{
206 if (!need_resched())
207 cpu_do_idle();
208
209 local_irq_enable();
210}
211
212void exynos4_restart(char mode, const char *cmd)
213{
214 __raw_writel(0x1, S5P_SWRESET);
215}
216
217/*
218 * exynos_map_io
219 *
220 * register the standard cpu IO areas
221 */
222
223void __init exynos_init_io(struct map_desc *mach_desc, int size)
224{
225 /* initialize the io descriptors we need for initialization */
226 iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
227 if (mach_desc)
228 iotable_init(mach_desc, size);
229
230 /* detect cpu id and rev. */
231 s5p_init_cpu(S5P_VA_CHIPID);
232
233 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
234}
235
236void __init exynos4_map_io(void)
237{
238 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
239
240 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
241 iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
242 else
243 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
244
245 /* initialize device information early */
246 exynos4_default_sdhci0();
247 exynos4_default_sdhci1();
248 exynos4_default_sdhci2();
249 exynos4_default_sdhci3();
250
251 s3c_adc_setname("samsung-adc-v3");
252
253 s3c_fimc_setname(0, "exynos4-fimc");
254 s3c_fimc_setname(1, "exynos4-fimc");
255 s3c_fimc_setname(2, "exynos4-fimc");
256 s3c_fimc_setname(3, "exynos4-fimc");
257
258 /* The I2C bus controllers are directly compatible with s3c2440 */
259 s3c_i2c0_setname("s3c2440-i2c");
260 s3c_i2c1_setname("s3c2440-i2c");
261 s3c_i2c2_setname("s3c2440-i2c");
262
263 s5p_fb_setname(0, "exynos4-fb");
264 s5p_hdmi_setname("exynos4-hdmi");
265}
266
267void __init exynos4_init_clocks(int xtal)
268{
269 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
270
271 s3c24xx_register_baseclocks(xtal);
272 s5p_register_clocks(xtal);
273
274 if (soc_is_exynos4210())
275 exynos4210_register_clocks();
276 else if (soc_is_exynos4212() || soc_is_exynos4412())
277 exynos4212_register_clocks();
278
279 exynos4_register_clocks();
280 exynos4_setup_clocks();
281}
282
283#define COMBINER_ENABLE_SET 0x0
284#define COMBINER_ENABLE_CLEAR 0x4
285#define COMBINER_INT_STATUS 0xC
286
287static DEFINE_SPINLOCK(irq_controller_lock);
288
289struct combiner_chip_data {
290 unsigned int irq_offset;
291 unsigned int irq_mask;
292 void __iomem *base;
293};
294
295static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
296
297static inline void __iomem *combiner_base(struct irq_data *data)
298{
299 struct combiner_chip_data *combiner_data =
300 irq_data_get_irq_chip_data(data);
301
302 return combiner_data->base;
303}
304
305static void combiner_mask_irq(struct irq_data *data)
306{
307 u32 mask = 1 << (data->irq % 32);
308
309 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
310}
311
312static void combiner_unmask_irq(struct irq_data *data)
313{
314 u32 mask = 1 << (data->irq % 32);
315
316 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
317}
318
319static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
320{
321 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
322 struct irq_chip *chip = irq_get_chip(irq);
323 unsigned int cascade_irq, combiner_irq;
324 unsigned long status;
325
326 chained_irq_enter(chip, desc);
327
328 spin_lock(&irq_controller_lock);
329 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
330 spin_unlock(&irq_controller_lock);
331 status &= chip_data->irq_mask;
332
333 if (status == 0)
334 goto out;
335
336 combiner_irq = __ffs(status);
337
338 cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
339 if (unlikely(cascade_irq >= NR_IRQS))
340 do_bad_IRQ(cascade_irq, desc);
341 else
342 generic_handle_irq(cascade_irq);
343
344 out:
345 chained_irq_exit(chip, desc);
346}
347
348static struct irq_chip combiner_chip = {
349 .name = "COMBINER",
350 .irq_mask = combiner_mask_irq,
351 .irq_unmask = combiner_unmask_irq,
352};
353
354static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
355{
356 if (combiner_nr >= MAX_COMBINER_NR)
357 BUG();
358 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
359 BUG();
360 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
361}
362
363static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
364 unsigned int irq_start)
365{
366 unsigned int i;
367
368 if (combiner_nr >= MAX_COMBINER_NR)
369 BUG();
370
371 combiner_data[combiner_nr].base = base;
372 combiner_data[combiner_nr].irq_offset = irq_start;
373 combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
374
375 /* Disable all interrupts */
376
377 __raw_writel(combiner_data[combiner_nr].irq_mask,
378 base + COMBINER_ENABLE_CLEAR);
379
380 /* Setup the Linux IRQ subsystem */
381
382 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
383 + MAX_IRQ_IN_COMBINER; i++) {
384 irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
385 irq_set_chip_data(i, &combiner_data[combiner_nr]);
386 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
387 }
388}
389
390#ifdef CONFIG_OF
391static const struct of_device_id exynos4_dt_irq_match[] = {
392 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
393 {},
394};
395#endif
396
397void __init exynos4_init_irq(void)
398{
399 int irq;
400 unsigned int gic_bank_offset;
401
402 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
403
404 if (!of_have_populated_dt())
405 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
406#ifdef CONFIG_OF
407 else
408 of_irq_init(exynos4_dt_irq_match);
409#endif
410
411 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
412
413 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
414 COMBINER_IRQ(irq, 0));
415 combiner_cascade_irq(irq, IRQ_SPI(irq));
416 }
417
418 /*
419 * The parameters of s5p_init_irq() are for VIC init.
420 * Theses parameters should be NULL and 0 because EXYNOS4
421 * uses GIC instead of VIC.
422 */
423 s5p_init_irq(NULL, 0);
424}
425
426struct sysdev_class exynos4_sysclass = {
427 .name = "exynos4-core",
428};
429
430static struct sys_device exynos4_sysdev = {
431 .cls = &exynos4_sysclass,
432};
433
434static int __init exynos4_core_init(void)
435{
436 return sysdev_class_register(&exynos4_sysclass);
437}
438core_initcall(exynos4_core_init);
439
440#ifdef CONFIG_CACHE_L2X0
441static int __init exynos4_l2x0_cache_init(void)
442{
443 /* TAG, Data Latency Control: 2cycle */
444 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
445
446 if (soc_is_exynos4210())
447 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
448 else if (soc_is_exynos4212() || soc_is_exynos4412())
449 __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
450
451 /* L2X0 Prefetch Control */
452 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
453
454 /* L2X0 Power Control */
455 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
456 S5P_VA_L2CC + L2X0_POWER_CTRL);
457
458 l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
459
460 return 0;
461}
462
463early_initcall(exynos4_l2x0_cache_init);
464#endif
465
466int __init exynos_init(void)
467{
468 printk(KERN_INFO "EXYNOS: Initializing architecture\n");
469
470 /* set idle function */
471 pm_idle = exynos_idle;
472
473 return sysdev_register(&exynos4_sysdev);
474}
475
476/* uart registration process */
477
478void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
479{
480 struct s3c2410_uartcfg *tcfg = cfg;
481 u32 ucnt;
482
483 for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
484 tcfg->has_fracval = 1;
485
486 s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
487}
488
489static DEFINE_SPINLOCK(eint_lock);
490
491static unsigned int eint0_15_data[16];
492
493static unsigned int exynos4_get_irq_nr(unsigned int number)
494{
495 u32 ret = 0;
496
497 switch (number) {
498 case 0 ... 3:
499 ret = (number + IRQ_EINT0);
500 break;
501 case 4 ... 7:
502 ret = (number + (IRQ_EINT4 - 4));
503 break;
504 case 8 ... 15:
505 ret = (number + (IRQ_EINT8 - 8));
506 break;
507 default:
508 printk(KERN_ERR "number available : %d\n", number);
509 }
510
511 return ret;
512}
513
514static inline void exynos4_irq_eint_mask(struct irq_data *data)
515{
516 u32 mask;
517
518 spin_lock(&eint_lock);
519 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
520 mask |= eint_irq_to_bit(data->irq);
521 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
522 spin_unlock(&eint_lock);
523}
524
525static void exynos4_irq_eint_unmask(struct irq_data *data)
526{
527 u32 mask;
528
529 spin_lock(&eint_lock);
530 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
531 mask &= ~(eint_irq_to_bit(data->irq));
532 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
533 spin_unlock(&eint_lock);
534}
535
536static inline void exynos4_irq_eint_ack(struct irq_data *data)
537{
538 __raw_writel(eint_irq_to_bit(data->irq),
539 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
540}
541
542static void exynos4_irq_eint_maskack(struct irq_data *data)
543{
544 exynos4_irq_eint_mask(data);
545 exynos4_irq_eint_ack(data);
546}
547
548static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
549{
550 int offs = EINT_OFFSET(data->irq);
551 int shift;
552 u32 ctrl, mask;
553 u32 newvalue = 0;
554
555 switch (type) {
556 case IRQ_TYPE_EDGE_RISING:
557 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
558 break;
559
560 case IRQ_TYPE_EDGE_FALLING:
561 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
562 break;
563
564 case IRQ_TYPE_EDGE_BOTH:
565 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
566 break;
567
568 case IRQ_TYPE_LEVEL_LOW:
569 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
570 break;
571
572 case IRQ_TYPE_LEVEL_HIGH:
573 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
574 break;
575
576 default:
577 printk(KERN_ERR "No such irq type %d", type);
578 return -EINVAL;
579 }
580
581 shift = (offs & 0x7) * 4;
582 mask = 0x7 << shift;
583
584 spin_lock(&eint_lock);
585 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
586 ctrl &= ~mask;
587 ctrl |= newvalue << shift;
588 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
589 spin_unlock(&eint_lock);
590
591 switch (offs) {
592 case 0 ... 7:
593 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
594 break;
595 case 8 ... 15:
596 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
597 break;
598 case 16 ... 23:
599 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
600 break;
601 case 24 ... 31:
602 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
603 break;
604 default:
605 printk(KERN_ERR "No such irq number %d", offs);
606 }
607
608 return 0;
609}
610
611static struct irq_chip exynos4_irq_eint = {
612 .name = "exynos4-eint",
613 .irq_mask = exynos4_irq_eint_mask,
614 .irq_unmask = exynos4_irq_eint_unmask,
615 .irq_mask_ack = exynos4_irq_eint_maskack,
616 .irq_ack = exynos4_irq_eint_ack,
617 .irq_set_type = exynos4_irq_eint_set_type,
618#ifdef CONFIG_PM
619 .irq_set_wake = s3c_irqext_wake,
620#endif
621};
622
623/*
624 * exynos4_irq_demux_eint
625 *
626 * This function demuxes the IRQ from from EINTs 16 to 31.
627 * It is designed to be inlined into the specific handler
628 * s5p_irq_demux_eintX_Y.
629 *
630 * Each EINT pend/mask registers handle eight of them.
631 */
632static inline void exynos4_irq_demux_eint(unsigned int start)
633{
634 unsigned int irq;
635
636 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
637 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
638
639 status &= ~mask;
640 status &= 0xff;
641
642 while (status) {
643 irq = fls(status) - 1;
644 generic_handle_irq(irq + start);
645 status &= ~(1 << irq);
646 }
647}
648
649static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
650{
651 struct irq_chip *chip = irq_get_chip(irq);
652 chained_irq_enter(chip, desc);
653 exynos4_irq_demux_eint(IRQ_EINT(16));
654 exynos4_irq_demux_eint(IRQ_EINT(24));
655 chained_irq_exit(chip, desc);
656}
657
658static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
659{
660 u32 *irq_data = irq_get_handler_data(irq);
661 struct irq_chip *chip = irq_get_chip(irq);
662
663 chained_irq_enter(chip, desc);
664 chip->irq_mask(&desc->irq_data);
665
666 if (chip->irq_ack)
667 chip->irq_ack(&desc->irq_data);
668
669 generic_handle_irq(*irq_data);
670
671 chip->irq_unmask(&desc->irq_data);
672 chained_irq_exit(chip, desc);
673}
674
675int __init exynos4_init_irq_eint(void)
676{
677 int irq;
678
679 for (irq = 0 ; irq <= 31 ; irq++) {
680 irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
681 handle_level_irq);
682 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
683 }
684
685 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
686
687 for (irq = 0 ; irq <= 15 ; irq++) {
688 eint0_15_data[irq] = IRQ_EINT(irq);
689
690 irq_set_handler_data(exynos4_get_irq_nr(irq),
691 &eint0_15_data[irq]);
692 irq_set_chained_handler(exynos4_get_irq_nr(irq),
693 exynos4_irq_eint0_15);
694 }
695
696 return 0;
697}
698arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
new file mode 100644
index 000000000000..1ac49de0f398
--- /dev/null
+++ b/arch/arm/mach-exynos/common.h
@@ -0,0 +1,41 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for EXYNOS machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
14
15void exynos_init_io(struct map_desc *mach_desc, int size);
16void exynos4_init_irq(void);
17
18void exynos4_register_clocks(void);
19void exynos4_setup_clocks(void);
20
21void exynos4210_register_clocks(void);
22void exynos4212_register_clocks(void);
23
24void exynos4_restart(char mode, const char *cmd);
25
26extern struct sys_timer exynos4_timer;
27
28#ifdef CONFIG_ARCH_EXYNOS
29extern int exynos_init(void);
30extern void exynos4_map_io(void);
31extern void exynos4_init_clocks(int xtal);
32extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
33
34#else
35#define exynos4_init_clocks NULL
36#define exynos4_init_uarts NULL
37#define exynos4_map_io NULL
38#define exynos_init NULL
39#endif
40
41#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
deleted file mode 100644
index 0eb7b6a6903d..000000000000
--- a/arch/arm/mach-exynos/cpu.c
+++ /dev/null
@@ -1,313 +0,0 @@
1/* linux/arch/arm/mach-exynos/cpu.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/sched.h>
12#include <linux/sysdev.h>
13#include <linux/of.h>
14#include <linux/of_irq.h>
15
16#include <asm/mach/map.h>
17#include <asm/mach/irq.h>
18
19#include <asm/proc-fns.h>
20#include <asm/hardware/cache-l2x0.h>
21#include <asm/hardware/gic.h>
22
23#include <plat/cpu.h>
24#include <plat/clock.h>
25#include <plat/devs.h>
26#include <plat/exynos4.h>
27#include <plat/adc-core.h>
28#include <plat/sdhci.h>
29#include <plat/fb-core.h>
30#include <plat/fimc-core.h>
31#include <plat/iic-core.h>
32#include <plat/reset.h>
33#include <plat/tv-core.h>
34
35#include <mach/regs-irq.h>
36#include <mach/regs-pmu.h>
37
38unsigned int gic_bank_offset __read_mostly;
39
40extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
41 unsigned int irq_start);
42extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
43
44/* Initial IO mappings */
45static struct map_desc exynos_iodesc[] __initdata = {
46 {
47 .virtual = (unsigned long)S5P_VA_SYSTIMER,
48 .pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
49 .length = SZ_4K,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = (unsigned long)S5P_VA_PMU,
53 .pfn = __phys_to_pfn(EXYNOS_PA_PMU),
54 .length = SZ_64K,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
58 .pfn = __phys_to_pfn(EXYNOS_PA_COMBINER),
59 .length = SZ_4K,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = (unsigned long)S5P_VA_GIC_CPU,
63 .pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
64 .length = SZ_64K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = (unsigned long)S5P_VA_GIC_DIST,
68 .pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
69 .length = SZ_64K,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = (unsigned long)S3C_VA_UART,
73 .pfn = __phys_to_pfn(S3C_PA_UART),
74 .length = SZ_512K,
75 .type = MT_DEVICE,
76 },
77};
78
79static struct map_desc exynos4_iodesc[] __initdata = {
80 {
81 .virtual = (unsigned long)S5P_VA_CMU,
82 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
83 .length = SZ_128K,
84 .type = MT_DEVICE,
85 }, {
86 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
87 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
88 .length = SZ_8K,
89 .type = MT_DEVICE,
90 }, {
91 .virtual = (unsigned long)S5P_VA_L2CC,
92 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
93 .length = SZ_4K,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = (unsigned long)S5P_VA_GPIO1,
97 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
98 .length = SZ_4K,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = (unsigned long)S5P_VA_GPIO2,
102 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
103 .length = SZ_4K,
104 .type = MT_DEVICE,
105 }, {
106 .virtual = (unsigned long)S5P_VA_GPIO3,
107 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
108 .length = SZ_256,
109 .type = MT_DEVICE,
110 }, {
111 .virtual = (unsigned long)S5P_VA_DMC0,
112 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
113 .length = SZ_4K,
114 .type = MT_DEVICE,
115 }, {
116 .virtual = (unsigned long)S5P_VA_SROMC,
117 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
118 .length = SZ_4K,
119 .type = MT_DEVICE,
120 }, {
121 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
122 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
123 .length = SZ_4K,
124 .type = MT_DEVICE,
125 },
126};
127
128static struct map_desc exynos4_iodesc0[] __initdata = {
129 {
130 .virtual = (unsigned long)S5P_VA_SYSRAM,
131 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
132 .length = SZ_4K,
133 .type = MT_DEVICE,
134 },
135};
136
137static struct map_desc exynos4_iodesc1[] __initdata = {
138 {
139 .virtual = (unsigned long)S5P_VA_SYSRAM,
140 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
141 .length = SZ_4K,
142 .type = MT_DEVICE,
143 },
144};
145
146static void exynos_idle(void)
147{
148 if (!need_resched())
149 cpu_do_idle();
150
151 local_irq_enable();
152}
153
154static void exynos4_sw_reset(void)
155{
156 __raw_writel(0x1, S5P_SWRESET);
157}
158
159/*
160 * exynos_map_io
161 *
162 * register the standard cpu IO areas
163 */
164void __init exynos4_map_io(void)
165{
166 iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
167 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
168
169 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
170 iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
171 else
172 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
173
174 /* initialize device information early */
175 exynos4_default_sdhci0();
176 exynos4_default_sdhci1();
177 exynos4_default_sdhci2();
178 exynos4_default_sdhci3();
179
180 s3c_adc_setname("samsung-adc-v3");
181
182 s3c_fimc_setname(0, "exynos4-fimc");
183 s3c_fimc_setname(1, "exynos4-fimc");
184 s3c_fimc_setname(2, "exynos4-fimc");
185 s3c_fimc_setname(3, "exynos4-fimc");
186
187 /* The I2C bus controllers are directly compatible with s3c2440 */
188 s3c_i2c0_setname("s3c2440-i2c");
189 s3c_i2c1_setname("s3c2440-i2c");
190 s3c_i2c2_setname("s3c2440-i2c");
191
192 s5p_fb_setname(0, "exynos4-fb");
193 s5p_hdmi_setname("exynos4-hdmi");
194}
195
196void __init exynos4_init_clocks(int xtal)
197{
198 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
199
200 s3c24xx_register_baseclocks(xtal);
201 s5p_register_clocks(xtal);
202
203 if (soc_is_exynos4210())
204 exynos4210_register_clocks();
205 else if (soc_is_exynos4212() || soc_is_exynos4412())
206 exynos4212_register_clocks();
207
208 exynos4_register_clocks();
209 exynos4_setup_clocks();
210}
211
212static void exynos4_gic_irq_fix_base(struct irq_data *d)
213{
214 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
215
216 gic_data->cpu_base = S5P_VA_GIC_CPU +
217 (gic_bank_offset * smp_processor_id());
218
219 gic_data->dist_base = S5P_VA_GIC_DIST +
220 (gic_bank_offset * smp_processor_id());
221}
222
223#ifdef CONFIG_OF
224static const struct of_device_id exynos4_dt_irq_match[] = {
225 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
226 {},
227};
228#endif
229
230void __init exynos4_init_irq(void)
231{
232 int irq;
233
234 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
235
236 if (!of_have_populated_dt())
237 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
238#ifdef CONFIG_OF
239 else
240 of_irq_init(exynos4_dt_irq_match);
241#endif
242
243 gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
244 gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
245 gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
246
247 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
248
249 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
250 COMBINER_IRQ(irq, 0));
251 combiner_cascade_irq(irq, IRQ_SPI(irq));
252 }
253
254 /* The parameters of s5p_init_irq() are for VIC init.
255 * Theses parameters should be NULL and 0 because EXYNOS4
256 * uses GIC instead of VIC.
257 */
258 s5p_init_irq(NULL, 0);
259}
260
261struct sysdev_class exynos4_sysclass = {
262 .name = "exynos4-core",
263};
264
265static struct sys_device exynos4_sysdev = {
266 .cls = &exynos4_sysclass,
267};
268
269static int __init exynos4_core_init(void)
270{
271 return sysdev_class_register(&exynos4_sysclass);
272}
273core_initcall(exynos4_core_init);
274
275#ifdef CONFIG_CACHE_L2X0
276static int __init exynos4_l2x0_cache_init(void)
277{
278 /* TAG, Data Latency Control: 2cycle */
279 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
280
281 if (soc_is_exynos4210())
282 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
283 else if (soc_is_exynos4212() || soc_is_exynos4412())
284 __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
285
286 /* L2X0 Prefetch Control */
287 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
288
289 /* L2X0 Power Control */
290 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
291 S5P_VA_L2CC + L2X0_POWER_CTRL);
292
293 l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
294
295 return 0;
296}
297
298early_initcall(exynos4_l2x0_cache_init);
299#endif
300
301int __init exynos_init(void)
302{
303 printk(KERN_INFO "EXYNOS: Initializing architecture\n");
304
305 /* set idle function */
306 pm_idle = exynos_idle;
307
308 /* set sw_reset function */
309 if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
310 s5p_reset_hook = exynos4_sw_reset;
311
312 return sysdev_register(&exynos4_sysdev);
313}
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
index d7dfcd7eb921..3ba4f547534b 100644
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos/include/mach/entry-macro.S
@@ -9,82 +9,8 @@
9 * warranty of any kind, whether express or implied. 9 * warranty of any kind, whether express or implied.
10*/ 10*/
11 11
12#include <mach/hardware.h>
13#include <mach/map.h>
14#include <asm/hardware/gic.h>
15
16 .macro disable_fiq 12 .macro disable_fiq
17 .endm 13 .endm
18 14
19 .macro get_irqnr_preamble, base, tmp
20 mov \tmp, #0
21
22 mrc p15, 0, \base, c0, c0, 5
23 and \base, \base, #3
24 cmp \base, #0
25 beq 1f
26
27 ldr \tmp, =gic_bank_offset
28 ldr \tmp, [\tmp]
29 cmp \base, #1
30 beq 1f
31
32 cmp \base, #2
33 addeq \tmp, \tmp, \tmp
34 addne \tmp, \tmp, \tmp, LSL #1
35
361: ldr \base, =gic_cpu_base_addr
37 ldr \base, [\base]
38 add \base, \base, \tmp
39 .endm
40
41 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
42 .endm 16 .endm
43
44 /*
45 * The interrupt numbering scheme is defined in the
46 * interrupt controller spec. To wit:
47 *
48 * Interrupts 0-15 are IPI
49 * 16-28 are reserved
50 * 29-31 are local. We allow 30 to be used for the watchdog.
51 * 32-1020 are global
52 * 1021-1022 are reserved
53 * 1023 is "spurious" (no interrupt)
54 *
55 * For now, we ignore all local interrupts so only return an interrupt if it's
56 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
57 *
58 * A simple read from the controller will tell us the number of the highest
59 * priority enabled interrupt. We then just need to check whether it is in the
60 * valid range for an IRQ (30-1020 inclusive).
61 */
62
63 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
64
65 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
66
67 ldr \tmp, =1021
68
69 bic \irqnr, \irqstat, #0x1c00
70
71 cmp \irqnr, #15
72 cmpcc \irqnr, \irqnr
73 cmpne \irqnr, \tmp
74 cmpcs \irqnr, \irqnr
75
76 .endm
77
78 /* We assume that irqstat (the raw value of the IRQ acknowledge
79 * register) is preserved from the macro above.
80 * If there is an IPI, we immediately signal end of interrupt on the
81 * controller, since this requires the original irqstat value which
82 * we won't easily be able to recreate later.
83 */
84
85 .macro test_for_ipi, irqnr, irqstat, base, tmp
86 bic \irqnr, \irqstat, #0x1c00
87 cmp \irqnr, #16
88 strcc \irqstat, [\base, #GIC_CPU_EOI]
89 cmpcs \irqnr, \irqnr
90 .endm
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 05ff18706776..c754a22a2bb3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -157,7 +157,6 @@
157#define S3C_PA_SPI1 EXYNOS4_PA_SPI1 157#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
158#define S3C_PA_SPI2 EXYNOS4_PA_SPI2 158#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
159 159
160#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
161#define S5P_PA_EHCI EXYNOS4_PA_EHCI 160#define S5P_PA_EHCI EXYNOS4_PA_EHCI
162#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 161#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
163#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 162#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
@@ -174,26 +173,17 @@
174#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA 173#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
175#define S5P_PA_SDO EXYNOS4_PA_SDO 174#define S5P_PA_SDO EXYNOS4_PA_SDO
176#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM 175#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
177#define S5P_PA_SROMC EXYNOS4_PA_SROMC
178#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
179#define S5P_PA_TIMER EXYNOS4_PA_TIMER
180#define S5P_PA_VP EXYNOS4_PA_VP 176#define S5P_PA_VP EXYNOS4_PA_VP
181 177
182#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC 178#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
183#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 179#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
184#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD 180#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
185 181
186#define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER
187#define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU
188#define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST
189#define EXYNOS_PA_PMU EXYNOS4_PA_PMU
190#define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER
191
192/* Compatibility UART */ 182/* Compatibility UART */
193 183
194#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) 184#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
195 185
196#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) 186#define S5P_PA_UART(x) (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
197#define S5P_PA_UART0 S5P_PA_UART(0) 187#define S5P_PA_UART0 S5P_PA_UART(0)
198#define S5P_PA_UART1 S5P_PA_UART(1) 188#define S5P_PA_UART1 S5P_PA_UART(1)
199#define S5P_PA_UART2 S5P_PA_UART(2) 189#define S5P_PA_UART2 S5P_PA_UART(2)
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
index 5e3220c18fc7..0063a6de3dc8 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-exynos/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h
deleted file mode 100644
index 284330e571d2..000000000000
--- a/arch/arm/mach-exynos/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * EXYNOS4 vmalloc definition
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END 0xF6000000UL
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
deleted file mode 100644
index 5b35978029be..000000000000
--- a/arch/arm/mach-exynos/init.c
+++ /dev/null
@@ -1,27 +0,0 @@
1/* linux/arch/arm/mach-exynos4/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12
13#include <plat/cpu.h>
14#include <plat/devs.h>
15#include <plat/regs-serial.h>
16
17/* uart registration process */
18void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
19{
20 struct s3c2410_uartcfg *tcfg = cfg;
21 u32 ucnt;
22
23 for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
24 tcfg->has_fracval = 1;
25
26 s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
27}
diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c
deleted file mode 100644
index 5a2758ab055e..000000000000
--- a/arch/arm/mach-exynos/irq-combiner.c
+++ /dev/null
@@ -1,124 +0,0 @@
1/* linux/arch/arm/mach-exynos4/irq-combiner.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/common/gic.c
7 *
8 * IRQ COMBINER support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/io.h>
16
17#include <asm/mach/irq.h>
18
19#define COMBINER_ENABLE_SET 0x0
20#define COMBINER_ENABLE_CLEAR 0x4
21#define COMBINER_INT_STATUS 0xC
22
23static DEFINE_SPINLOCK(irq_controller_lock);
24
25struct combiner_chip_data {
26 unsigned int irq_offset;
27 unsigned int irq_mask;
28 void __iomem *base;
29};
30
31static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
32
33static inline void __iomem *combiner_base(struct irq_data *data)
34{
35 struct combiner_chip_data *combiner_data =
36 irq_data_get_irq_chip_data(data);
37
38 return combiner_data->base;
39}
40
41static void combiner_mask_irq(struct irq_data *data)
42{
43 u32 mask = 1 << (data->irq % 32);
44
45 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
46}
47
48static void combiner_unmask_irq(struct irq_data *data)
49{
50 u32 mask = 1 << (data->irq % 32);
51
52 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
53}
54
55static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
56{
57 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
58 struct irq_chip *chip = irq_get_chip(irq);
59 unsigned int cascade_irq, combiner_irq;
60 unsigned long status;
61
62 chained_irq_enter(chip, desc);
63
64 spin_lock(&irq_controller_lock);
65 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
66 spin_unlock(&irq_controller_lock);
67 status &= chip_data->irq_mask;
68
69 if (status == 0)
70 goto out;
71
72 combiner_irq = __ffs(status);
73
74 cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
75 if (unlikely(cascade_irq >= NR_IRQS))
76 do_bad_IRQ(cascade_irq, desc);
77 else
78 generic_handle_irq(cascade_irq);
79
80 out:
81 chained_irq_exit(chip, desc);
82}
83
84static struct irq_chip combiner_chip = {
85 .name = "COMBINER",
86 .irq_mask = combiner_mask_irq,
87 .irq_unmask = combiner_unmask_irq,
88};
89
90void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
91{
92 if (combiner_nr >= MAX_COMBINER_NR)
93 BUG();
94 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
95 BUG();
96 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
97}
98
99void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
100 unsigned int irq_start)
101{
102 unsigned int i;
103
104 if (combiner_nr >= MAX_COMBINER_NR)
105 BUG();
106
107 combiner_data[combiner_nr].base = base;
108 combiner_data[combiner_nr].irq_offset = irq_start;
109 combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
110
111 /* Disable all interrupts */
112
113 __raw_writel(combiner_data[combiner_nr].irq_mask,
114 base + COMBINER_ENABLE_CLEAR);
115
116 /* Setup the Linux IRQ subsystem */
117
118 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
119 + MAX_IRQ_IN_COMBINER; i++) {
120 irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
121 irq_set_chip_data(i, &combiner_data[combiner_nr]);
122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123 }
124}
diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c
deleted file mode 100644
index badb8c66fc9b..000000000000
--- a/arch/arm/mach-exynos/irq-eint.c
+++ /dev/null
@@ -1,237 +0,0 @@
1/* linux/arch/arm/mach-exynos4/irq-eint.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS4 - IRQ EINT support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <linux/sysdev.h>
18#include <linux/gpio.h>
19
20#include <plat/pm.h>
21#include <plat/cpu.h>
22#include <plat/gpio-cfg.h>
23
24#include <mach/regs-gpio.h>
25
26#include <asm/mach/irq.h>
27
28static DEFINE_SPINLOCK(eint_lock);
29
30static unsigned int eint0_15_data[16];
31
32static unsigned int exynos4_get_irq_nr(unsigned int number)
33{
34 u32 ret = 0;
35
36 switch (number) {
37 case 0 ... 3:
38 ret = (number + IRQ_EINT0);
39 break;
40 case 4 ... 7:
41 ret = (number + (IRQ_EINT4 - 4));
42 break;
43 case 8 ... 15:
44 ret = (number + (IRQ_EINT8 - 8));
45 break;
46 default:
47 printk(KERN_ERR "number available : %d\n", number);
48 }
49
50 return ret;
51}
52
53static inline void exynos4_irq_eint_mask(struct irq_data *data)
54{
55 u32 mask;
56
57 spin_lock(&eint_lock);
58 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
59 mask |= eint_irq_to_bit(data->irq);
60 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
61 spin_unlock(&eint_lock);
62}
63
64static void exynos4_irq_eint_unmask(struct irq_data *data)
65{
66 u32 mask;
67
68 spin_lock(&eint_lock);
69 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
70 mask &= ~(eint_irq_to_bit(data->irq));
71 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
72 spin_unlock(&eint_lock);
73}
74
75static inline void exynos4_irq_eint_ack(struct irq_data *data)
76{
77 __raw_writel(eint_irq_to_bit(data->irq),
78 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
79}
80
81static void exynos4_irq_eint_maskack(struct irq_data *data)
82{
83 exynos4_irq_eint_mask(data);
84 exynos4_irq_eint_ack(data);
85}
86
87static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
88{
89 int offs = EINT_OFFSET(data->irq);
90 int shift;
91 u32 ctrl, mask;
92 u32 newvalue = 0;
93
94 switch (type) {
95 case IRQ_TYPE_EDGE_RISING:
96 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
97 break;
98
99 case IRQ_TYPE_EDGE_FALLING:
100 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
101 break;
102
103 case IRQ_TYPE_EDGE_BOTH:
104 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
105 break;
106
107 case IRQ_TYPE_LEVEL_LOW:
108 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
109 break;
110
111 case IRQ_TYPE_LEVEL_HIGH:
112 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
113 break;
114
115 default:
116 printk(KERN_ERR "No such irq type %d", type);
117 return -EINVAL;
118 }
119
120 shift = (offs & 0x7) * 4;
121 mask = 0x7 << shift;
122
123 spin_lock(&eint_lock);
124 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
125 ctrl &= ~mask;
126 ctrl |= newvalue << shift;
127 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
128 spin_unlock(&eint_lock);
129
130 switch (offs) {
131 case 0 ... 7:
132 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
133 break;
134 case 8 ... 15:
135 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
136 break;
137 case 16 ... 23:
138 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
139 break;
140 case 24 ... 31:
141 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
142 break;
143 default:
144 printk(KERN_ERR "No such irq number %d", offs);
145 }
146
147 return 0;
148}
149
150static struct irq_chip exynos4_irq_eint = {
151 .name = "exynos4-eint",
152 .irq_mask = exynos4_irq_eint_mask,
153 .irq_unmask = exynos4_irq_eint_unmask,
154 .irq_mask_ack = exynos4_irq_eint_maskack,
155 .irq_ack = exynos4_irq_eint_ack,
156 .irq_set_type = exynos4_irq_eint_set_type,
157#ifdef CONFIG_PM
158 .irq_set_wake = s3c_irqext_wake,
159#endif
160};
161
162/* exynos4_irq_demux_eint
163 *
164 * This function demuxes the IRQ from from EINTs 16 to 31.
165 * It is designed to be inlined into the specific handler
166 * s5p_irq_demux_eintX_Y.
167 *
168 * Each EINT pend/mask registers handle eight of them.
169 */
170static inline void exynos4_irq_demux_eint(unsigned int start)
171{
172 unsigned int irq;
173
174 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
175 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
176
177 status &= ~mask;
178 status &= 0xff;
179
180 while (status) {
181 irq = fls(status) - 1;
182 generic_handle_irq(irq + start);
183 status &= ~(1 << irq);
184 }
185}
186
187static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
188{
189 struct irq_chip *chip = irq_get_chip(irq);
190 chained_irq_enter(chip, desc);
191 exynos4_irq_demux_eint(IRQ_EINT(16));
192 exynos4_irq_demux_eint(IRQ_EINT(24));
193 chained_irq_exit(chip, desc);
194}
195
196static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
197{
198 u32 *irq_data = irq_get_handler_data(irq);
199 struct irq_chip *chip = irq_get_chip(irq);
200
201 chained_irq_enter(chip, desc);
202 chip->irq_mask(&desc->irq_data);
203
204 if (chip->irq_ack)
205 chip->irq_ack(&desc->irq_data);
206
207 generic_handle_irq(*irq_data);
208
209 chip->irq_unmask(&desc->irq_data);
210 chained_irq_exit(chip, desc);
211}
212
213int __init exynos4_init_irq_eint(void)
214{
215 int irq;
216
217 for (irq = 0 ; irq <= 31 ; irq++) {
218 irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
219 handle_level_irq);
220 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
221 }
222
223 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
224
225 for (irq = 0 ; irq <= 15 ; irq++) {
226 eint0_15_data[irq] = IRQ_EINT(irq);
227
228 irq_set_handler_data(exynos4_get_irq_nr(irq),
229 &eint0_15_data[irq]);
230 irq_set_chained_handler(exynos4_get_irq_nr(irq),
231 exynos4_irq_eint0_15);
232 }
233
234 return 0;
235}
236
237arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index f0ca6c157d29..d726fcd3acf9 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,11 +16,11 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20 21
21#include <plat/cpu.h> 22#include <plat/cpu.h>
22#include <plat/devs.h> 23#include <plat/devs.h>
23#include <plat/exynos4.h>
24#include <plat/gpio-cfg.h> 24#include <plat/gpio-cfg.h>
25#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
26#include <plat/regs-srom.h> 26#include <plat/regs-srom.h>
@@ -28,6 +28,8 @@
28 28
29#include <mach/map.h> 29#include <mach/map.h>
30 30
31#include "common.h"
32
31/* Following are default values for UCON, ULCON and UFCON UART registers */ 33/* Following are default values for UCON, ULCON and UFCON UART registers */
32#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 34#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
33 S3C2410_UCON_RXILEVEL | \ 35 S3C2410_UCON_RXILEVEL | \
@@ -187,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void)
187 189
188static void __init armlex4210_map_io(void) 190static void __init armlex4210_map_io(void)
189{ 191{
190 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 192 exynos_init_io(NULL, 0);
191 s3c24xx_init_clocks(24000000); 193 s3c24xx_init_clocks(24000000);
192 s3c24xx_init_uarts(armlex4210_uartcfgs, 194 s3c24xx_init_uarts(armlex4210_uartcfgs,
193 ARRAY_SIZE(armlex4210_uartcfgs)); 195 ARRAY_SIZE(armlex4210_uartcfgs));
@@ -210,6 +212,8 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
210 .atag_offset = 0x100, 212 .atag_offset = 0x100,
211 .init_irq = exynos4_init_irq, 213 .init_irq = exynos4_init_irq,
212 .map_io = armlex4210_map_io, 214 .map_io = armlex4210_map_io,
215 .handle_irq = gic_handle_irq,
213 .init_machine = armlex4210_machine_init, 216 .init_machine = armlex4210_machine_init,
214 .timer = &exynos4_timer, 217 .timer = &exynos4_timer,
218 .restart = exynos4_restart,
215MACHINE_END 219MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe187163..b895ec031105 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -32,12 +32,12 @@
32#include <media/v4l2-mediabus.h> 32#include <media/v4l2-mediabus.h>
33 33
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36 37
37#include <plat/adc.h> 38#include <plat/adc.h>
38#include <plat/regs-fb-v4.h> 39#include <plat/regs-fb-v4.h>
39#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
40#include <plat/exynos4.h>
41#include <plat/cpu.h> 41#include <plat/cpu.h>
42#include <plat/devs.h> 42#include <plat/devs.h>
43#include <plat/fb.h> 43#include <plat/fb.h>
@@ -54,6 +54,8 @@
54 54
55#include <mach/map.h> 55#include <mach/map.h>
56 56
57#include "common.h"
58
57/* Following are default values for UCON, ULCON and UFCON UART registers */ 59/* Following are default values for UCON, ULCON and UFCON UART registers */
58#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
@@ -247,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
247 249
248static int nuri_bl_init(struct device *dev) 250static int nuri_bl_init(struct device *dev)
249{ 251{
250 int ret, gpio = EXYNOS4_GPE2(3); 252 return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
251 253 "LCD_LD0_EN");
252 ret = gpio_request(gpio, "LCD_LDO_EN");
253 if (!ret)
254 gpio_direction_output(gpio, 0);
255
256 return ret;
257} 254}
258 255
259static int nuri_bl_notify(struct device *dev, int brightness) 256static int nuri_bl_notify(struct device *dev, int brightness)
@@ -1283,7 +1280,7 @@ static struct platform_device *nuri_devices[] __initdata = {
1283 1280
1284static void __init nuri_map_io(void) 1281static void __init nuri_map_io(void)
1285{ 1282{
1286 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 1283 exynos_init_io(NULL, 0);
1287 s3c24xx_init_clocks(24000000); 1284 s3c24xx_init_clocks(24000000);
1288 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); 1285 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
1289} 1286}
@@ -1333,7 +1330,9 @@ MACHINE_START(NURI, "NURI")
1333 .atag_offset = 0x100, 1330 .atag_offset = 0x100,
1334 .init_irq = exynos4_init_irq, 1331 .init_irq = exynos4_init_irq,
1335 .map_io = nuri_map_io, 1332 .map_io = nuri_map_io,
1333 .handle_irq = gic_handle_irq,
1336 .init_machine = nuri_machine_init, 1334 .init_machine = nuri_machine_init,
1337 .timer = &exynos4_timer, 1335 .timer = &exynos4_timer,
1338 .reserve = &nuri_reserve, 1336 .reserve = &nuri_reserve,
1337 .restart = exynos4_restart,
1339MACHINE_END 1338MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index b805e595cc35..2b11e046d391 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -22,13 +22,13 @@
22#include <linux/lcd.h> 22#include <linux/lcd.h>
23 23
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/hardware/gic.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26 27
27#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
28 29
29#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
30#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
31#include <plat/exynos4.h>
32#include <plat/cpu.h> 32#include <plat/cpu.h>
33#include <plat/devs.h> 33#include <plat/devs.h>
34#include <plat/sdhci.h> 34#include <plat/sdhci.h>
@@ -44,6 +44,8 @@
44#include <mach/ohci.h> 44#include <mach/ohci.h>
45#include <mach/map.h> 45#include <mach/map.h>
46 46
47#include "common.h"
48
47/* Following are default values for UCON, ULCON and UFCON UART registers */ 49/* Following are default values for UCON, ULCON and UFCON UART registers */
48#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 50#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
49 S3C2410_UCON_RXILEVEL | \ 51 S3C2410_UCON_RXILEVEL | \
@@ -650,7 +652,7 @@ static void s5p_tv_setup(void)
650 652
651static void __init origen_map_io(void) 653static void __init origen_map_io(void)
652{ 654{
653 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 655 exynos_init_io(NULL, 0);
654 s3c24xx_init_clocks(24000000); 656 s3c24xx_init_clocks(24000000);
655 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); 657 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
656} 658}
@@ -707,7 +709,9 @@ MACHINE_START(ORIGEN, "ORIGEN")
707 .atag_offset = 0x100, 709 .atag_offset = 0x100,
708 .init_irq = exynos4_init_irq, 710 .init_irq = exynos4_init_irq,
709 .map_io = origen_map_io, 711 .map_io = origen_map_io,
712 .handle_irq = gic_handle_irq,
710 .init_machine = origen_machine_init, 713 .init_machine = origen_machine_init,
711 .timer = &exynos4_timer, 714 .timer = &exynos4_timer,
712 .reserve = &origen_reserve, 715 .reserve = &origen_reserve,
716 .restart = exynos4_restart,
713MACHINE_END 717MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index fcf2e0e23d53..d00e4f016a68 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,13 +21,13 @@
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <plat/backlight.h> 27#include <plat/backlight.h>
27#include <plat/clock.h> 28#include <plat/clock.h>
28#include <plat/cpu.h> 29#include <plat/cpu.h>
29#include <plat/devs.h> 30#include <plat/devs.h>
30#include <plat/exynos4.h>
31#include <plat/gpio-cfg.h> 31#include <plat/gpio-cfg.h>
32#include <plat/iic.h> 32#include <plat/iic.h>
33#include <plat/keypad.h> 33#include <plat/keypad.h>
@@ -36,6 +36,8 @@
36 36
37#include <mach/map.h> 37#include <mach/map.h>
38 38
39#include "common.h"
40
39/* Following are default values for UCON, ULCON and UFCON UART registers */ 41/* Following are default values for UCON, ULCON and UFCON UART registers */
40#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 42#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
41 S3C2410_UCON_RXILEVEL | \ 43 S3C2410_UCON_RXILEVEL | \
@@ -249,7 +251,7 @@ static void __init smdk4x12_map_io(void)
249{ 251{
250 clk_xusbxti.rate = 24000000; 252 clk_xusbxti.rate = 24000000;
251 253
252 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 254 exynos_init_io(NULL, 0);
253 s3c24xx_init_clocks(clk_xusbxti.rate); 255 s3c24xx_init_clocks(clk_xusbxti.rate);
254 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); 256 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
255} 257}
@@ -287,8 +289,10 @@ MACHINE_START(SMDK4212, "SMDK4212")
287 .atag_offset = 0x100, 289 .atag_offset = 0x100,
288 .init_irq = exynos4_init_irq, 290 .init_irq = exynos4_init_irq,
289 .map_io = smdk4x12_map_io, 291 .map_io = smdk4x12_map_io,
292 .handle_irq = gic_handle_irq,
290 .init_machine = smdk4x12_machine_init, 293 .init_machine = smdk4x12_machine_init,
291 .timer = &exynos4_timer, 294 .timer = &exynos4_timer,
295 .restart = exynos4_restart,
292MACHINE_END 296MACHINE_END
293 297
294MACHINE_START(SMDK4412, "SMDK4412") 298MACHINE_START(SMDK4412, "SMDK4412")
@@ -297,6 +301,8 @@ MACHINE_START(SMDK4412, "SMDK4412")
297 .atag_offset = 0x100, 301 .atag_offset = 0x100,
298 .init_irq = exynos4_init_irq, 302 .init_irq = exynos4_init_irq,
299 .map_io = smdk4x12_map_io, 303 .map_io = smdk4x12_map_io,
304 .handle_irq = gic_handle_irq,
300 .init_machine = smdk4x12_machine_init, 305 .init_machine = smdk4x12_machine_init,
301 .timer = &exynos4_timer, 306 .timer = &exynos4_timer,
307 .restart = exynos4_restart,
302MACHINE_END 308MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 25a5a405c4bf..b2c5557f50e4 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -21,13 +21,13 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <video/platform_lcd.h> 27#include <video/platform_lcd.h>
27#include <plat/regs-serial.h> 28#include <plat/regs-serial.h>
28#include <plat/regs-srom.h> 29#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h> 30#include <plat/regs-fb-v4.h>
30#include <plat/exynos4.h>
31#include <plat/cpu.h> 31#include <plat/cpu.h>
32#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/fb.h> 33#include <plat/fb.h>
@@ -44,6 +44,8 @@
44#include <mach/map.h> 44#include <mach/map.h>
45#include <mach/ohci.h> 45#include <mach/ohci.h>
46 46
47#include "common.h"
48
47/* Following are default values for UCON, ULCON and UFCON UART registers */ 49/* Following are default values for UCON, ULCON and UFCON UART registers */
48#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 50#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
49 S3C2410_UCON_RXILEVEL | \ 51 S3C2410_UCON_RXILEVEL | \
@@ -130,9 +132,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
130 gpio_free(EXYNOS4_GPD0(1)); 132 gpio_free(EXYNOS4_GPD0(1));
131#endif 133#endif
132 /* fire nRESET on power up */ 134 /* fire nRESET on power up */
133 gpio_request(EXYNOS4_GPX0(6), "GPX0"); 135 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
134
135 gpio_direction_output(EXYNOS4_GPX0(6), 1);
136 mdelay(100); 136 mdelay(100);
137 137
138 gpio_set_value(EXYNOS4_GPX0(6), 0); 138 gpio_set_value(EXYNOS4_GPX0(6), 0);
@@ -344,7 +344,7 @@ static void s5p_tv_setup(void)
344 344
345static void __init smdkv310_map_io(void) 345static void __init smdkv310_map_io(void)
346{ 346{
347 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 347 exynos_init_io(NULL, 0);
348 s3c24xx_init_clocks(24000000); 348 s3c24xx_init_clocks(24000000);
349 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); 349 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
350} 350}
@@ -388,9 +388,11 @@ MACHINE_START(SMDKV310, "SMDKV310")
388 .atag_offset = 0x100, 388 .atag_offset = 0x100,
389 .init_irq = exynos4_init_irq, 389 .init_irq = exynos4_init_irq,
390 .map_io = smdkv310_map_io, 390 .map_io = smdkv310_map_io,
391 .handle_irq = gic_handle_irq,
391 .init_machine = smdkv310_machine_init, 392 .init_machine = smdkv310_machine_init,
392 .timer = &exynos4_timer, 393 .timer = &exynos4_timer,
393 .reserve = &smdkv310_reserve, 394 .reserve = &smdkv310_reserve,
395 .restart = exynos4_restart,
394MACHINE_END 396MACHINE_END
395 397
396MACHINE_START(SMDKC210, "SMDKC210") 398MACHINE_START(SMDKC210, "SMDKC210")
@@ -398,6 +400,8 @@ MACHINE_START(SMDKC210, "SMDKC210")
398 .atag_offset = 0x100, 400 .atag_offset = 0x100,
399 .init_irq = exynos4_init_irq, 401 .init_irq = exynos4_init_irq,
400 .map_io = smdkv310_map_io, 402 .map_io = smdkv310_map_io,
403 .handle_irq = gic_handle_irq,
401 .init_machine = smdkv310_machine_init, 404 .init_machine = smdkv310_machine_init,
402 .timer = &exynos4_timer, 405 .timer = &exynos4_timer,
406 .restart = exynos4_restart,
403MACHINE_END 407MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index a2a177ff4b44..37ac93e8d6d9 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -24,10 +24,10 @@
24#include <linux/i2c/atmel_mxt_ts.h> 24#include <linux/i2c/atmel_mxt_ts.h>
25 25
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/hardware/gic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28 29
29#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
30#include <plat/exynos4.h>
31#include <plat/cpu.h> 31#include <plat/cpu.h>
32#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/iic.h> 33#include <plat/iic.h>
@@ -47,6 +47,8 @@
47#include <media/s5p_fimc.h> 47#include <media/s5p_fimc.h>
48#include <media/m5mols.h> 48#include <media/m5mols.h>
49 49
50#include "common.h"
51
50/* Following are default values for UCON, ULCON and UFCON UART registers */ 52/* Following are default values for UCON, ULCON and UFCON UART registers */
51#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 53#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
52 S3C2410_UCON_RXILEVEL | \ 54 S3C2410_UCON_RXILEVEL | \
@@ -608,8 +610,7 @@ static void __init universal_tsp_init(void)
608 610
609 /* TSP_LDO_ON: XMDMADDR_11 */ 611 /* TSP_LDO_ON: XMDMADDR_11 */
610 gpio = EXYNOS4_GPE2(3); 612 gpio = EXYNOS4_GPE2(3);
611 gpio_request(gpio, "TSP_LDO_ON"); 613 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
612 gpio_direction_output(gpio, 1);
613 gpio_export(gpio, 0); 614 gpio_export(gpio, 0);
614 615
615 /* TSP_INT: XMDMADDR_7 */ 616 /* TSP_INT: XMDMADDR_7 */
@@ -669,8 +670,7 @@ static void __init universal_touchkey_init(void)
669 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); 670 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
670 671
671 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ 672 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
672 gpio_request(gpio, "3_TOUCH_EN"); 673 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
673 gpio_direction_output(gpio, 1);
674} 674}
675 675
676static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { 676static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
@@ -992,7 +992,7 @@ static struct platform_device *universal_devices[] __initdata = {
992 992
993static void __init universal_map_io(void) 993static void __init universal_map_io(void)
994{ 994{
995 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 995 exynos_init_io(NULL, 0);
996 s3c24xx_init_clocks(24000000); 996 s3c24xx_init_clocks(24000000);
997 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 997 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
998} 998}
@@ -1000,9 +1000,7 @@ static void __init universal_map_io(void)
1000void s5p_tv_setup(void) 1000void s5p_tv_setup(void)
1001{ 1001{
1002 /* direct HPD to HDMI chip */ 1002 /* direct HPD to HDMI chip */
1003 gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); 1003 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1004
1005 gpio_direction_input(EXYNOS4_GPX3(7));
1006 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); 1004 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1007 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); 1005 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1008 1006
@@ -1058,7 +1056,9 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1058 .atag_offset = 0x100, 1056 .atag_offset = 0x100,
1059 .init_irq = exynos4_init_irq, 1057 .init_irq = exynos4_init_irq,
1060 .map_io = universal_map_io, 1058 .map_io = universal_map_io,
1059 .handle_irq = gic_handle_irq,
1061 .init_machine = universal_machine_init, 1060 .init_machine = universal_machine_init,
1062 .timer = &exynos4_timer, 1061 .timer = &exynos4_timer,
1063 .reserve = &universal_reserve, 1062 .reserve = &universal_reserve,
1063 .restart = exynos4_restart,
1064MACHINE_END 1064MACHINE_END
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 69ffb2fb3875..60bc45e3e709 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,7 +32,6 @@
32 32
33#include <plat/cpu.h> 33#include <plat/cpu.h>
34 34
35extern unsigned int gic_bank_offset;
36extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
37 36
38#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ 37#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
@@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void)
65 64
66static DEFINE_SPINLOCK(boot_lock); 65static DEFINE_SPINLOCK(boot_lock);
67 66
68static void __cpuinit exynos4_gic_secondary_init(void)
69{
70 void __iomem *dist_base = S5P_VA_GIC_DIST +
71 (gic_bank_offset * smp_processor_id());
72 void __iomem *cpu_base = S5P_VA_GIC_CPU +
73 (gic_bank_offset * smp_processor_id());
74 int i;
75
76 /*
77 * Deal with the banked PPI and SGI interrupts - disable all
78 * PPI interrupts, ensure all SGI interrupts are enabled.
79 */
80 __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
81 __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
82
83 /*
84 * Set priority on PPI and SGI interrupts
85 */
86 for (i = 0; i < 32; i += 4)
87 __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
88
89 __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
90 __raw_writel(1, cpu_base + GIC_CPU_CTRL);
91}
92
93void __cpuinit platform_secondary_init(unsigned int cpu) 67void __cpuinit platform_secondary_init(unsigned int cpu)
94{ 68{
95 /* 69 /*
@@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
97 * core (e.g. timer irq), then they will not have been enabled 71 * core (e.g. timer irq), then they will not have been enabled
98 * for us: do so 72 * for us: do so
99 */ 73 */
100 exynos4_gic_secondary_init(); 74 gic_secondary_init(0);
101 75
102 /* 76 /*
103 * let the primary processor know we're out of the 77 * let the primary processor know we're out of the
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 509a435afd4b..4093fea849c3 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -23,6 +23,7 @@
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
26#include <asm/smp_scu.h>
26 27
27#include <plat/cpu.h> 28#include <plat/cpu.h>
28#include <plat/pm.h> 29#include <plat/pm.h>
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev)
213 return 0; 214 return 0;
214} 215}
215 216
216/* This function copy from linux/arch/arm/kernel/smp_scu.c */
217
218void exynos4_scu_enable(void __iomem *scu_base)
219{
220 u32 scu_ctrl;
221
222 scu_ctrl = __raw_readl(scu_base);
223 /* already enabled? */
224 if (scu_ctrl & 1)
225 return;
226
227 scu_ctrl |= 1;
228 __raw_writel(scu_ctrl, scu_base);
229
230 /*
231 * Ensure that the data accessed by CPU0 before the SCU was
232 * initialised is visible to the other CPUs.
233 */
234 flush_cache_all();
235}
236
237static unsigned long pll_base_rate; 217static unsigned long pll_base_rate;
238 218
239static void exynos4_restore_pll(void) 219static void exynos4_restore_pll(void)
@@ -402,7 +382,7 @@ static void exynos4_pm_resume(void)
402 382
403 exynos4_restore_pll(); 383 exynos4_restore_pll();
404 384
405 exynos4_scu_enable(S5P_VA_SCU); 385 scu_enable(S5P_VA_SCU);
406 386
407#ifdef CONFIG_CACHE_L2X0 387#ifdef CONFIG_CACHE_L2X0
408 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); 388 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index d5f178540928..25b453601acc 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -86,9 +86,10 @@ fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
86MACHINE_START(CATS, "Chalice-CATS") 86MACHINE_START(CATS, "Chalice-CATS")
87 /* Maintainer: Philip Blundell */ 87 /* Maintainer: Philip Blundell */
88 .atag_offset = 0x100, 88 .atag_offset = 0x100,
89 .soft_reboot = 1, 89 .restart_mode = 's',
90 .fixup = fixup_cats, 90 .fixup = fixup_cats,
91 .map_io = footbridge_map_io, 91 .map_io = footbridge_map_io,
92 .init_irq = footbridge_init_irq, 92 .init_irq = footbridge_init_irq,
93 .timer = &isa_timer, 93 .timer = &isa_timer,
94 .restart = footbridge_restart,
94MACHINE_END 95MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 38a44f9b9da2..41978ee4f9d0 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void)
199 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); 199 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
200} 200}
201 201
202void footbridge_restart(char mode, const char *cmd)
203{
204 if (mode == 's') {
205 /* Jump into the ROM */
206 soft_restart(0x41000000);
207 } else {
208 /*
209 * Force the watchdog to do a CPU reset.
210 *
211 * After making sure that the watchdog is disabled
212 * (so we can change the timer registers) we first
213 * enable the timer to autoreload itself. Next, the
214 * timer interval is set really short and any
215 * current interrupt request is cleared (so we can
216 * see an edge transition). Finally, TIMER4 is
217 * enabled as the watchdog.
218 */
219 *CSR_SA110_CNTL &= ~(1 << 13);
220 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
221 TIMER_CNTL_AUTORELOAD |
222 TIMER_CNTL_DIV16;
223 *CSR_TIMER4_LOAD = 0x2;
224 *CSR_TIMER4_CLR = 0;
225 *CSR_SA110_CNTL |= (1 << 13);
226 }
227}
228
202#ifdef CONFIG_FOOTBRIDGE_ADDIN 229#ifdef CONFIG_FOOTBRIDGE_ADDIN
203 230
204static inline unsigned long fb_bus_sdram_offset(void) 231static inline unsigned long fb_bus_sdram_offset(void)
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index b05e662d21ad..c9767b892cb2 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void);
8extern void footbridge_init_irq(void); 8extern void footbridge_init_irq(void);
9 9
10extern void isa_init_irq(unsigned int irq); 10extern void isa_init_irq(unsigned int irq);
11extern void footbridge_restart(char, const char *);
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index 012210cf7d16..27716a7e5fc1 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285")
21 .map_io = footbridge_map_io, 21 .map_io = footbridge_map_io,
22 .init_irq = footbridge_init_irq, 22 .init_irq = footbridge_init_irq,
23 .timer = &footbridge_timer, 23 .timer = &footbridge_timer,
24 .restart = footbridge_restart,
24MACHINE_END 25MACHINE_END
25 26
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 0b2931566209..a174a5841bc2 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -7,63 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
11#include <asm/hardware/dec21285.h>
12#include <mach/hardware.h>
13#include <asm/leds.h>
14#include <asm/mach-types.h>
15
16static inline void arch_idle(void) 10static inline void arch_idle(void)
17{ 11{
18 cpu_do_idle(); 12 cpu_do_idle();
19} 13}
20
21static inline void arch_reset(char mode, const char *cmd)
22{
23 if (mode == 's') {
24 /*
25 * Jump into the ROM
26 */
27 cpu_reset(0x41000000);
28 } else {
29 if (machine_is_netwinder()) {
30 /* open up the SuperIO chip
31 */
32 outb(0x87, 0x370);
33 outb(0x87, 0x370);
34
35 /* aux function group 1 (logical device 7)
36 */
37 outb(0x07, 0x370);
38 outb(0x07, 0x371);
39
40 /* set GP16 for WD-TIMER output
41 */
42 outb(0xe6, 0x370);
43 outb(0x00, 0x371);
44
45 /* set a RED LED and toggle WD_TIMER for rebooting
46 */
47 outb(0xc4, 0x338);
48 } else {
49 /*
50 * Force the watchdog to do a CPU reset.
51 *
52 * After making sure that the watchdog is disabled
53 * (so we can change the timer registers) we first
54 * enable the timer to autoreload itself. Next, the
55 * timer interval is set really short and any
56 * current interrupt request is cleared (so we can
57 * see an edge transition). Finally, TIMER4 is
58 * enabled as the watchdog.
59 */
60 *CSR_SA110_CNTL &= ~(1 << 13);
61 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
62 TIMER_CNTL_AUTORELOAD |
63 TIMER_CNTL_DIV16;
64 *CSR_TIMER4_LOAD = 0x2;
65 *CSR_TIMER4_CLR = 0;
66 *CSR_SA110_CNTL |= (1 << 13);
67 }
68 }
69}
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h
deleted file mode 100644
index 40ba78e5782b..000000000000
--- a/arch/arm/mach-footbridge/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-footbridge/include/mach/vmalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 0d3846f3b60d..80a1c5cc9071 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
645#endif 645#endif
646} 646}
647 647
648static void netwinder_restart(char mode, const char *cmd)
649{
650 if (mode == 's') {
651 /* Jump into the ROM */
652 soft_restart(0x41000000);
653 } else {
654 local_irq_disable();
655 local_fiq_disable();
656
657 /* open up the SuperIO chip */
658 outb(0x87, 0x370);
659 outb(0x87, 0x370);
660
661 /* aux function group 1 (logical device 7) */
662 outb(0x07, 0x370);
663 outb(0x07, 0x371);
664
665 /* set GP16 for WD-TIMER output */
666 outb(0xe6, 0x370);
667 outb(0x00, 0x371);
668
669 /* set a RED LED and toggle WD_TIMER for rebooting */
670 outb(0xc4, 0x338);
671 }
672}
673
648MACHINE_START(NETWINDER, "Rebel-NetWinder") 674MACHINE_START(NETWINDER, "Rebel-NetWinder")
649 /* Maintainer: Russell King/Rebel.com */ 675 /* Maintainer: Russell King/Rebel.com */
650 .atag_offset = 0x100, 676 .atag_offset = 0x100,
@@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder")
656 .map_io = footbridge_map_io, 682 .map_io = footbridge_map_io,
657 .init_irq = footbridge_init_irq, 683 .init_irq = footbridge_init_irq,
658 .timer = &isa_timer, 684 .timer = &isa_timer,
685 .restart = netwinder_restart,
659MACHINE_END 686MACHINE_END
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index f41dba39b327..e1e9990fa957 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
19 .map_io = footbridge_map_io, 19 .map_io = footbridge_map_io,
20 .init_irq = footbridge_init_irq, 20 .init_irq = footbridge_init_irq,
21 .timer = &footbridge_timer, 21 .timer = &footbridge_timer,
22 .restart = footbridge_restart,
22MACHINE_END 23MACHINE_END
23 24
diff --git a/arch/arm/mach-gemini/include/mach/vmalloc.h b/arch/arm/mach-gemini/include/mach/vmalloc.h
deleted file mode 100644
index 45371eb86fcb..000000000000
--- a/arch/arm/mach-gemini/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 51d4e44ab973..f8a2f6bb5483 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -242,3 +242,8 @@ void __init h720x_map_io(void)
242{ 242{
243 iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); 243 iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc));
244} 244}
245
246void h720x_restart(char mode, const char *cmd)
247{
248 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
249}
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h
index 7dd5fa604efc..2489537d33dd 100644
--- a/arch/arm/mach-h720x/common.h
+++ b/arch/arm/mach-h720x/common.h
@@ -16,6 +16,7 @@
16extern unsigned long h720x_gettimeoffset(void); 16extern unsigned long h720x_gettimeoffset(void);
17extern void __init h720x_init_irq(void); 17extern void __init h720x_init_irq(void);
18extern void __init h720x_map_io(void); 18extern void __init h720x_map_io(void);
19extern void h720x_restart(char, const char *);
19 20
20#ifdef CONFIG_ARCH_H7202 21#ifdef CONFIG_ARCH_H7202
21extern struct sys_timer h7202_timer; 22extern struct sys_timer h7202_timer;
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c
index 9886f19805f4..5fdb20c855e2 100644
--- a/arch/arm/mach-h720x/h7201-eval.c
+++ b/arch/arm/mach-h720x/h7201-eval.c
@@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201")
34 .init_irq = h720x_init_irq, 34 .init_irq = h720x_init_irq,
35 .timer = &h7201_timer, 35 .timer = &h7201_timer,
36 .dma_zone_size = SZ_256M, 36 .dma_zone_size = SZ_256M,
37 .restart = h720x_restart,
37MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c
index 284a134819e1..169673036c59 100644
--- a/arch/arm/mach-h720x/h7202-eval.c
+++ b/arch/arm/mach-h720x/h7202-eval.c
@@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202")
77 .timer = &h7202_timer, 77 .timer = &h7202_timer,
78 .init_machine = init_eval_h7202, 78 .init_machine = init_eval_h7202,
79 .dma_zone_size = SZ_256M, 79 .dma_zone_size = SZ_256M,
80 .restart = h720x_restart,
80MACHINE_END 81MACHINE_END
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
index a708d24ee46d..16ac46e239aa 100644
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ b/arch/arm/mach-h720x/include/mach/system.h
@@ -24,10 +24,4 @@ static void arch_idle(void)
24 nop(); 24 nop();
25} 25}
26 26
27
28static __inline__ void arch_reset(char mode, const char *cmd)
29{
30 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
31}
32
33#endif 27#endif
diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h
deleted file mode 100644
index 8520b4a4d4e6..000000000000
--- a/arch/arm/mach-h720x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-h720x/include/mach/vmalloc.h
3 */
4
5#ifndef __ARCH_ARM_VMALLOC_H
6#define __ARCH_ARM_VMALLOC_H
7
8#define VMALLOC_END 0xd0000000UL
9
10#endif
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 7e33fc94cd1e..d8e2d0be64ac 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,5 +1,6 @@
1extern void highbank_set_cpu_jump(int cpu, void *jump_addr); 1extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
2extern void highbank_clocks_init(void); 2extern void highbank_clocks_init(void);
3extern void highbank_restart(char, const char *);
3extern void __iomem *scu_base_addr; 4extern void __iomem *scu_base_addr;
4#ifdef CONFIG_DEBUG_HIGHBANK_UART 5#ifdef CONFIG_DEBUG_HIGHBANK_UART
5extern void highbank_lluart_map_io(void); 6extern void highbank_lluart_map_io(void);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 88660d500f5b..804c4a55f803 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -144,6 +144,8 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
144 .map_io = highbank_map_io, 144 .map_io = highbank_map_io,
145 .init_irq = highbank_init_irq, 145 .init_irq = highbank_init_irq,
146 .timer = &highbank_timer, 146 .timer = &highbank_timer,
147 .handle_irq = gic_handle_irq,
147 .init_machine = highbank_init, 148 .init_machine = highbank_init,
148 .dt_compat = highbank_match, 149 .dt_compat = highbank_match,
150 .restart = highbank_restart,
149MACHINE_END 151MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ b/arch/arm/mach-highbank/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
index 7e8192296cae..b1d8b5fbe373 100644
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ b/arch/arm/mach-highbank/include/mach/system.h
@@ -21,6 +21,4 @@ static inline void arch_idle(void)
21 cpu_do_idle(); 21 cpu_do_idle();
22} 22}
23 23
24extern void arch_reset(char mode, const char *cmd);
25
26#endif 24#endif
diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h
deleted file mode 100644
index 1969e954277a..000000000000
--- a/arch/arm/mach-highbank/include/mach/vmalloc.h
+++ /dev/null
@@ -1 +0,0 @@
1#define VMALLOC_END 0xFEE00000UL
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 53f0c4c5ef1c..82c27230d4a9 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -20,7 +20,7 @@
20#include "core.h" 20#include "core.h"
21#include "sysregs.h" 21#include "sysregs.h"
22 22
23void arch_reset(char mode, const char *cmd) 23void highbank_restart(char mode, const char *cmd)
24{ 24{
25 if (mode == 'h') 25 if (mode == 'h')
26 hignbank_set_pwr_hard_reset(); 26 hignbank_set_pwr_hard_reset();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c44aa974e79c..35a218cb5c7e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -132,7 +132,7 @@ config MACH_MX25_3DS
132 select IMX_HAVE_PLATFORM_MXC_NAND 132 select IMX_HAVE_PLATFORM_MXC_NAND
133 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 133 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
134 134
135config MACH_EUKREA_CPUIMX25 135config MACH_EUKREA_CPUIMX25SD
136 bool "Support Eukrea CPUIMX25 Platform" 136 bool "Support Eukrea CPUIMX25 Platform"
137 select SOC_IMX25 137 select SOC_IMX25
138 select IMX_HAVE_PLATFORM_FLEXCAN 138 select IMX_HAVE_PLATFORM_FLEXCAN
@@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
148 148
149choice 149choice
150 prompt "Baseboard" 150 prompt "Baseboard"
151 depends on MACH_EUKREA_CPUIMX25 151 depends on MACH_EUKREA_CPUIMX25SD
152 default MACH_EUKREA_MBIMXSD25_BASEBOARD 152 default MACH_EUKREA_MBIMXSD25_BASEBOARD
153 153
154config MACH_EUKREA_MBIMXSD25_BASEBOARD 154config MACH_EUKREA_MBIMXSD25_BASEBOARD
@@ -542,7 +542,7 @@ config MACH_MX35_3DS
542 Include support for MX35PDK platform. This includes specific 542 Include support for MX35PDK platform. This includes specific
543 configurations for the board and its peripherals. 543 configurations for the board and its peripherals.
544 544
545config MACH_EUKREA_CPUIMX35 545config MACH_EUKREA_CPUIMX35SD
546 bool "Support Eukrea CPUIMX35 Platform" 546 bool "Support Eukrea CPUIMX35 Platform"
547 select SOC_IMX35 547 select SOC_IMX35
548 select IMX_HAVE_PLATFORM_FLEXCAN 548 select IMX_HAVE_PLATFORM_FLEXCAN
@@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
560 560
561choice 561choice
562 prompt "Baseboard" 562 prompt "Baseboard"
563 depends on MACH_EUKREA_CPUIMX35 563 depends on MACH_EUKREA_CPUIMX35SD
564 default MACH_EUKREA_MBIMXSD35_BASEBOARD 564 default MACH_EUKREA_MBIMXSD35_BASEBOARD
565 565
566config MACH_EUKREA_MBIMXSD35_BASEBOARD 566config MACH_EUKREA_MBIMXSD35_BASEBOARD
@@ -596,12 +596,12 @@ comment "i.MX6 family:"
596config SOC_IMX6Q 596config SOC_IMX6Q
597 bool "i.MX6 Quad support" 597 bool "i.MX6 Quad support"
598 select ARM_GIC 598 select ARM_GIC
599 select CACHE_L2X0
600 select CPU_V7 599 select CPU_V7
601 select HAVE_ARM_SCU 600 select HAVE_ARM_SCU
602 select HAVE_IMX_GPC 601 select HAVE_IMX_GPC
603 select HAVE_IMX_MMDC 602 select HAVE_IMX_MMDC
604 select HAVE_IMX_SRC 603 select HAVE_IMX_SRC
604 select HAVE_SMP
605 select USE_OF 605 select USE_OF
606 606
607 help 607 help
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aba73214c2a8..d97f409ce98b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
24 24
25# i.MX25 based machines 25# i.MX25 based machines
26obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o 26obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
27obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o 27obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
28obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o 28obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
29 29
30# i.MX27 based machines 30# i.MX27 based machines
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
57# i.MX35 based machines 57# i.MX35 based machines
58obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o 58obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
59obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o 59obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
60obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o 60obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
61obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o 61obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
62obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o 62obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
63 63
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f119517d..ac8238caecb9 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
507 507
508int __init mx35_clocks_init() 508int __init mx35_clocks_init()
509{ 509{
510 unsigned int cgr2 = 3 << 26, cgr3 = 0; 510 unsigned int cgr2 = 3 << 26;
511 511
512#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 512#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
513 cgr2 |= 3 << 16; 513 cgr2 |= 3 << 16;
@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
521 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 521 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
522 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 522 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
523 CCM_BASE + CCM_CGR1); 523 CCM_BASE + CCM_CGR1);
524 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
525 __raw_writel(0, CCM_BASE + CCM_CGR3);
526
527 clk_enable(&iim_clk);
528 imx_print_silicon_rev("i.MX35", mx35_revision());
529 clk_disable(&iim_clk);
524 530
525 /* 531 /*
526 * Check if we came up in internal boot mode. If yes, we need some 532 * Check if we came up in internal boot mode. If yes, we need some
@@ -529,17 +535,11 @@ int __init mx35_clocks_init()
529 */ 535 */
530 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { 536 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
531 /* Additionally turn on UART1, SCC, and IIM clocks */ 537 /* Additionally turn on UART1, SCC, and IIM clocks */
532 cgr2 |= 3 << 16 | 3 << 4; 538 clk_enable(&iim_clk);
533 cgr3 |= 3 << 2; 539 clk_enable(&uart1_clk);
540 clk_enable(&scc_clk);
534 } 541 }
535 542
536 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
538
539 clk_enable(&iim_clk);
540 imx_print_silicon_rev("i.MX35", mx35_revision());
541 clk_disable(&iim_clk);
542
543#ifdef CONFIG_MXC_USE_EPIT 543#ifdef CONFIG_MXC_USE_EPIT
544 epit_timer_init(&epit1_clk, 544 epit_timer_init(&epit1_clk,
545 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); 545 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 039a7abb165a..9273c2a24b54 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
1931 val |= 0x1 << BP_CLPCR_LPM; 1931 val |= 0x1 << BP_CLPCR_LPM;
1932 val &= ~BM_CLPCR_VSTBY; 1932 val &= ~BM_CLPCR_VSTBY;
1933 val &= ~BM_CLPCR_SBYOS; 1933 val &= ~BM_CLPCR_SBYOS;
1934 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
1935 break; 1934 break;
1936 case STOP_POWER_OFF: 1935 case STOP_POWER_OFF:
1937 val |= 0x2 << BP_CLPCR_LPM; 1936 val |= 0x2 << BP_CLPCR_LPM;
1938 val |= 0x3 << BP_CLPCR_STBY_COUNT; 1937 val |= 0x3 << BP_CLPCR_STBY_COUNT;
1939 val |= BM_CLPCR_VSTBY; 1938 val |= BM_CLPCR_VSTBY;
1940 val |= BM_CLPCR_SBYOS; 1939 val |= BM_CLPCR_SBYOS;
1941 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
1942 break; 1940 break;
1943 default: 1941 default:
1944 return -EINVAL; 1942 return -EINVAL;
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 1e486e67dabb..146a4f073464 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -139,4 +139,5 @@ MACHINE_START(APF9328, "Armadeus APF9328")
139 .handle_irq = imx1_handle_irq, 139 .handle_irq = imx1_handle_irq,
140 .timer = &apf9328_timer, 140 .timer = &apf9328_timer,
141 .init_machine = apf9328_init, 141 .init_machine = apf9328_init,
142 .restart = mxc_restart,
142MACHINE_END 143MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index c9a9cf67755e..e4f426a09899 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
561 .handle_irq = imx31_handle_irq, 561 .handle_irq = imx31_handle_irq,
562 .timer = &armadillo5x0_timer, 562 .timer = &armadillo5x0_timer,
563 .init_machine = armadillo5x0_init, 563 .init_machine = armadillo5x0_init,
564 .restart = mxc_restart,
564MACHINE_END 565MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 313f62ddc1ef..9a9897749dd6 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase")
65 .handle_irq = imx31_handle_irq, 65 .handle_irq = imx31_handle_irq,
66 .timer = &bug_timer, 66 .timer = &bug_timer,
67 .init_machine = bug_board_init, 67 .init_machine = bug_board_init,
68 .restart = mxc_restart,
68MACHINE_END 69MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index edb373052576..d085aea08709 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
318 .handle_irq = imx27_handle_irq, 318 .handle_irq = imx27_handle_irq,
319 .timer = &eukrea_cpuimx27_timer, 319 .timer = &eukrea_cpuimx27_timer,
320 .init_machine = eukrea_cpuimx27_init, 320 .init_machine = eukrea_cpuimx27_init,
321 .restart = mxc_restart,
321MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 66af2e8f7e57..8ecc872b2547 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
53 .bitrate = 100000, 53 .bitrate = 100000,
54}; 54};
55 55
56#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
57static int tsc2007_get_pendown_state(void)
58{
59 return !gpio_get_value(TSC2007_IRQGPIO);
60}
61
56static struct tsc2007_platform_data tsc2007_info = { 62static struct tsc2007_platform_data tsc2007_info = {
57 .model = 2007, 63 .model = 2007,
58 .x_plate_ohms = 180, 64 .x_plate_ohms = 180,
65 .get_pendown_state = tsc2007_get_pendown_state,
59}; 66};
60 67
61#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
62static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { 68static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
63 { 69 {
64 I2C_BOARD_INFO("pcf8563", 0x51), 70 I2C_BOARD_INFO("pcf8563", 0x51),
@@ -201,4 +207,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
201 .handle_irq = imx35_handle_irq, 207 .handle_irq = imx35_handle_irq,
202 .timer = &eukrea_cpuimx35_timer, 208 .timer = &eukrea_cpuimx35_timer,
203 .init_machine = eukrea_cpuimx35_init, 209 .init_machine = eukrea_cpuimx35_init,
210 .restart = mxc_restart,
204MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index ab8fbcc472b5..76a97a598b9e 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
170 .handle_irq = imx25_handle_irq, 170 .handle_irq = imx25_handle_irq,
171 .timer = &eukrea_cpuimx25_timer, 171 .timer = &eukrea_cpuimx25_timer,
172 .init_machine = eukrea_cpuimx25_init, 172 .init_machine = eukrea_cpuimx25_init,
173 .restart = mxc_restart,
173MACHINE_END 174MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 38eb9e45110b..c2766ae02b4f 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
282 .handle_irq = imx27_handle_irq, 282 .handle_irq = imx27_handle_irq,
283 .timer = &visstrim_m10_timer, 283 .timer = &visstrim_m10_timer,
284 .init_machine = visstrim_m10_board_init, 284 .init_machine = visstrim_m10_board_init,
285 .restart = mxc_restart,
285MACHINE_END 286MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7052155d0557..c9d350c5dcc8 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
78 .handle_irq = imx27_handle_irq, 78 .handle_irq = imx27_handle_irq,
79 .timer = &mx27ipcam_timer, 79 .timer = &mx27ipcam_timer,
80 .init_machine = mx27ipcam_init, 80 .init_machine = mx27ipcam_init,
81 .restart = mxc_restart,
81MACHINE_END 82MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 8d6a63521f17..1f45b9189229 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
84 .handle_irq = imx27_handle_irq, 84 .handle_irq = imx27_handle_irq,
85 .timer = &mx27lite_timer, 85 .timer = &mx27lite_timer,
86 .init_machine = mx27lite_init, 86 .init_machine = mx27lite_init,
87 .restart = mxc_restart,
87MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8deb012189b5..05b49bb5d677 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -10,10 +10,13 @@
10 * http://www.gnu.org/copyleft/gpl.html 10 * http://www.gnu.org/copyleft/gpl.html
11 */ 11 */
12 12
13#include <linux/delay.h>
13#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h>
14#include <linux/irq.h> 16#include <linux/irq.h>
15#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
16#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_address.h>
17#include <linux/of_irq.h> 20#include <linux/of_irq.h>
18#include <linux/of_platform.h> 21#include <linux/of_platform.h>
19#include <asm/hardware/cache-l2x0.h> 22#include <asm/hardware/cache-l2x0.h>
@@ -23,6 +26,36 @@
23#include <mach/common.h> 26#include <mach/common.h>
24#include <mach/hardware.h> 27#include <mach/hardware.h>
25 28
29void imx6q_restart(char mode, const char *cmd)
30{
31 struct device_node *np;
32 void __iomem *wdog_base;
33
34 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
35 wdog_base = of_iomap(np, 0);
36 if (!wdog_base)
37 goto soft;
38
39 imx_src_prepare_restart();
40
41 /* enable wdog */
42 writew_relaxed(1 << 2, wdog_base);
43 /* write twice to ensure the request will not get ignored */
44 writew_relaxed(1 << 2, wdog_base);
45
46 /* wait for reset to assert ... */
47 mdelay(500);
48
49 pr_err("Watchdog reset failed to assert reset\n");
50
51 /* delay to allow the serial port to show the message */
52 mdelay(50);
53
54soft:
55 /* we'll take a jump through zero as a poor second */
56 soft_restart(0);
57}
58
26static void __init imx6q_init_machine(void) 59static void __init imx6q_init_machine(void)
27{ 60{
28 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -83,4 +116,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
83 .timer = &imx6q_timer, 116 .timer = &imx6q_timer,
84 .init_machine = imx6q_init_machine, 117 .init_machine = imx6q_init_machine,
85 .dt_compat = imx6q_dt_compat, 118 .dt_compat = imx6q_dt_compat,
119 .restart = imx6q_restart,
86MACHINE_END 120MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5f37f89e40fa..fc78e8071cd1 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
279 .handle_irq = imx31_handle_irq, 279 .handle_irq = imx31_handle_irq,
280 .timer = &kzm_timer, 280 .timer = &kzm_timer,
281 .init_machine = kzm_board_init, 281 .init_machine = kzm_board_init,
282 .restart = mxc_restart,
282MACHINE_END 283MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index fc49785e7340..97046088ff1a 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
147 .handle_irq = imx1_handle_irq, 147 .handle_irq = imx1_handle_irq,
148 .timer = &mx1ads_timer, 148 .timer = &mx1ads_timer,
149 .init_machine = mx1ads_init, 149 .init_machine = mx1ads_init,
150 .restart = mxc_restart,
150MACHINE_END 151MACHINE_END
151 152
152MACHINE_START(MXLADS, "Freescale MXLADS") 153MACHINE_START(MXLADS, "Freescale MXLADS")
@@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
157 .handle_irq = imx1_handle_irq, 158 .handle_irq = imx1_handle_irq,
158 .timer = &mx1ads_timer, 159 .timer = &mx1ads_timer,
159 .init_machine = mx1ads_init, 160 .init_machine = mx1ads_init,
161 .restart = mxc_restart,
160MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 25f84028d055..8d9f95514b1f 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
312 .handle_irq = imx21_handle_irq, 312 .handle_irq = imx21_handle_irq,
313 .timer = &mx21ads_timer, 313 .timer = &mx21ads_timer,
314 .init_machine = mx21ads_board_init, 314 .init_machine = mx21ads_board_init,
315 .restart = mxc_restart,
315MACHINE_END 316MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 88dccf122243..f26734298aa6 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
270 .handle_irq = imx25_handle_irq, 270 .handle_irq = imx25_handle_irq,
271 .timer = &mx25pdk_timer, 271 .timer = &mx25pdk_timer,
272 .init_machine = mx25pdk_init, 272 .init_machine = mx25pdk_init,
273 .restart = mxc_restart,
273MACHINE_END 274MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index ba232d79fa81..18f35816706a 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
425 .handle_irq = imx27_handle_irq, 425 .handle_irq = imx27_handle_irq,
426 .timer = &mx27pdk_timer, 426 .timer = &mx27pdk_timer,
427 .init_machine = mx27pdk_init, 427 .init_machine = mx27pdk_init,
428 .restart = mxc_restart,
428MACHINE_END 429MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 74dd5731eb61..0228d2e07fe0 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
351 .handle_irq = imx27_handle_irq, 351 .handle_irq = imx27_handle_irq,
352 .timer = &mx27ads_timer, 352 .timer = &mx27ads_timer,
353 .init_machine = mx27ads_board_init, 353 .init_machine = mx27ads_board_init,
354 .restart = mxc_restart,
354MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index b8c54b840185..2b565c381347 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
770 .timer = &mx31_3ds_timer, 770 .timer = &mx31_3ds_timer,
771 .init_machine = mx31_3ds_init, 771 .init_machine = mx31_3ds_init,
772 .reserve = mx31_3ds_reserve, 772 .reserve = mx31_3ds_reserve,
773 .restart = mxc_restart,
773MACHINE_END 774MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 9cc1a49053bb..4917aab0e253 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
542 .handle_irq = imx31_handle_irq, 542 .handle_irq = imx31_handle_irq,
543 .timer = &mx31ads_timer, 543 .timer = &mx31ads_timer,
544 .init_machine = mx31ads_init, 544 .init_machine = mx31ads_init,
545 .restart = mxc_restart,
545MACHINE_END 546MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 102ec99357cc..02401bbd6d53 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
303 .handle_irq = imx31_handle_irq, 303 .handle_irq = imx31_handle_irq,
304 .timer = &mx31lilly_timer, 304 .timer = &mx31lilly_timer,
305 .init_machine = mx31lilly_board_init, 305 .init_machine = mx31lilly_board_init,
306 .restart = mxc_restart,
306MACHINE_END 307MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 5366d2de18fd..ef80751712e7 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
287 .handle_irq = imx31_handle_irq, 287 .handle_irq = imx31_handle_irq,
288 .timer = &mx31lite_timer, 288 .timer = &mx31lite_timer,
289 .init_machine = mx31lite_init, 289 .init_machine = mx31lite_init,
290 .restart = mxc_restart,
290MACHINE_END 291MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 93269150309c..b95981dacb2b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
600 .handle_irq = imx31_handle_irq, 600 .handle_irq = imx31_handle_irq,
601 .timer = &mx31moboard_timer, 601 .timer = &mx31moboard_timer,
602 .init_machine = mx31moboard_init, 602 .init_machine = mx31moboard_init,
603 .restart = mxc_restart,
603MACHINE_END 604MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 7a462025a0f7..0af6c9c5b3fd 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
224 .handle_irq = imx35_handle_irq, 224 .handle_irq = imx35_handle_irq,
225 .timer = &mx35pdk_timer, 225 .timer = &mx35pdk_timer,
226 .init_machine = mx35_3ds_init, 226 .init_machine = mx35_3ds_init,
227 .restart = mxc_restart,
227MACHINE_END 228MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 125c19643b0f..8b3d3f07d894 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
274 .handle_irq = imx27_handle_irq, 274 .handle_irq = imx27_handle_irq,
275 .timer = &mxt_td60_timer, 275 .timer = &mxt_td60_timer,
276 .init_machine = mxt_td60_board_init, 276 .init_machine = mxt_td60_board_init,
277 .restart = mxc_restart,
277MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 26072f4b02e3..d3b9c6b5edde 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
442 .handle_irq = imx27_handle_irq, 442 .handle_irq = imx27_handle_irq,
443 .init_machine = pca100_init, 443 .init_machine = pca100_init,
444 .timer = &pca100_timer, 444 .timer = &pca100_timer,
445 .restart = mxc_restart,
445MACHINE_END 446MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index efd6b536ef6a..d7e151669ed3 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
696 .handle_irq = imx31_handle_irq, 696 .handle_irq = imx31_handle_irq,
697 .timer = &pcm037_timer, 697 .timer = &pcm037_timer,
698 .init_machine = pcm037_init, 698 .init_machine = pcm037_init,
699 .restart = mxc_restart,
699MACHINE_END 700MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index a17e9c7dfca0..16f126da9f8f 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
357 .handle_irq = imx27_handle_irq, 357 .handle_irq = imx27_handle_irq,
358 .timer = &pcm038_timer, 358 .timer = &pcm038_timer,
359 .init_machine = pcm038_init, 359 .init_machine = pcm038_init,
360 .restart = mxc_restart,
360MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 7366c2ae3ea5..06dc106519ae 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
425 .handle_irq = imx35_handle_irq, 425 .handle_irq = imx35_handle_irq,
426 .timer = &pcm043_timer, 426 .timer = &pcm043_timer,
427 .init_machine = pcm043_init, 427 .init_machine = pcm043_init,
428 .restart = mxc_restart,
428MACHINE_END 429MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 4ff5faf102a8..260621055b6b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
273 .handle_irq = imx31_handle_irq, 273 .handle_irq = imx31_handle_irq,
274 .timer = &qong_timer, 274 .timer = &qong_timer,
275 .init_machine = qong_init, 275 .init_machine = qong_init,
276 .restart = mxc_restart,
276MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index bb6e5b25d8d0..cb9ceae2f648 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
144 .handle_irq = imx1_handle_irq, 144 .handle_irq = imx1_handle_irq,
145 .timer = &scb9328_timer, 145 .timer = &scb9328_timer,
146 .init_machine = scb9328_init, 146 .init_machine = scb9328_init,
147 .restart = mxc_restart,
147MACHINE_END 148MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 69092458f2d9..033257e553ef 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200")
322 .handle_irq = imx35_handle_irq, 322 .handle_irq = imx35_handle_irq,
323 .timer = &vpr200_timer, 323 .timer = &vpr200_timer,
324 .init_machine = vpr200_board_init, 324 .init_machine = vpr200_board_init,
325 .restart = mxc_restart,
325MACHINE_END 326MACHINE_END
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index a8e33681b732..4bde04f99e38 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -19,6 +19,7 @@
19 19
20#define SRC_SCR 0x000 20#define SRC_SCR 0x000
21#define SRC_GPR1 0x020 21#define SRC_GPR1 0x020
22#define BP_SRC_SCR_WARM_RESET_ENABLE 0
22#define BP_SRC_SCR_CORE1_RST 14 23#define BP_SRC_SCR_CORE1_RST 14
23#define BP_SRC_SCR_CORE1_ENABLE 22 24#define BP_SRC_SCR_CORE1_ENABLE 22
24 25
@@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr)
46 src_base + SRC_GPR1 + cpu * 8); 47 src_base + SRC_GPR1 + cpu * 8);
47} 48}
48 49
50void imx_src_prepare_restart(void)
51{
52 u32 val;
53
54 /* clear enable bits of secondary cores */
55 val = readl_relaxed(src_base + SRC_SCR);
56 val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE);
57 writel_relaxed(val, src_base + SRC_SCR);
58
59 /* clear persistent entry register of primary core */
60 writel_relaxed(0, src_base + SRC_GPR1);
61}
62
49void __init imx_src_init(void) 63void __init imx_src_init(void)
50{ 64{
51 struct device_node *np; 65 struct device_node *np;
66 u32 val;
52 67
53 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); 68 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
54 src_base = of_iomap(np, 0); 69 src_base = of_iomap(np, 0);
55 WARN_ON(!src_base); 70 WARN_ON(!src_base);
71
72 /*
73 * force warm reset sources to generate cold reset
74 * for a more reliable restart
75 */
76 val = readl_relaxed(src_base + SRC_SCR);
77 val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE);
78 writel_relaxed(val, src_base + SRC_SCR);
56} 79}
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index dfd18f3b50e8..350e26636a06 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP
6 bool "Support Integrator/AP and Integrator/PP2 platforms" 6 bool "Support Integrator/AP and Integrator/PP2 platforms"
7 select CLKSRC_MMIO 7 select CLKSRC_MMIO
8 select MIGHT_HAVE_PCI 8 select MIGHT_HAVE_PCI
9 select SERIAL_AMBA_PL010
10 select SERIAL_AMBA_PL010_CONSOLE
9 help 11 help
10 Include support for the ARM(R) Integrator/AP and 12 Include support for the ARM(R) Integrator/AP and
11 Integrator/PP2 platforms. 13 Integrator/PP2 platforms.
@@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP
15 select ARCH_CINTEGRATOR 17 select ARCH_CINTEGRATOR
16 select ARM_TIMER_SP804 18 select ARM_TIMER_SP804
17 select PLAT_VERSATILE_CLCD 19 select PLAT_VERSATILE_CLCD
20 select SERIAL_AMBA_PL011
21 select SERIAL_AMBA_PL011_CONSOLE
18 help 22 help
19 Include support for the ARM(R) Integrator CP platform. 23 Include support for the ARM(R) Integrator CP platform.
20 24
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index a08f9b0299df..899561d8db28 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,2 +1,3 @@
1void integrator_init_early(void); 1void integrator_init_early(void);
2void integrator_reserve(void); 2void integrator_reserve(void);
3void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 4b38e13667ac..019f0ab08f66 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -29,6 +29,7 @@
29#include <mach/cm.h> 29#include <mach/cm.h>
30#include <asm/system.h> 30#include <asm/system.h>
31#include <asm/leds.h> 31#include <asm/leds.h>
32#include <asm/mach-types.h>
32#include <asm/mach/time.h> 33#include <asm/mach/time.h>
33#include <asm/pgtable.h> 34#include <asm/pgtable.h>
34 35
@@ -44,7 +45,6 @@ static struct amba_device rtc_device = {
44 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
45 }, 46 },
46 .irq = { IRQ_RTCINT, NO_IRQ }, 47 .irq = { IRQ_RTCINT, NO_IRQ },
47 .periphid = 0x00041030,
48}; 48};
49 49
50static struct amba_device uart0_device = { 50static struct amba_device uart0_device = {
@@ -58,7 +58,6 @@ static struct amba_device uart0_device = {
58 .flags = IORESOURCE_MEM, 58 .flags = IORESOURCE_MEM,
59 }, 59 },
60 .irq = { IRQ_UARTINT0, NO_IRQ }, 60 .irq = { IRQ_UARTINT0, NO_IRQ },
61 .periphid = 0x0041010,
62}; 61};
63 62
64static struct amba_device uart1_device = { 63static struct amba_device uart1_device = {
@@ -72,7 +71,6 @@ static struct amba_device uart1_device = {
72 .flags = IORESOURCE_MEM, 71 .flags = IORESOURCE_MEM,
73 }, 72 },
74 .irq = { IRQ_UARTINT1, NO_IRQ }, 73 .irq = { IRQ_UARTINT1, NO_IRQ },
75 .periphid = 0x0041010,
76}; 74};
77 75
78static struct amba_device kmi0_device = { 76static struct amba_device kmi0_device = {
@@ -85,7 +83,6 @@ static struct amba_device kmi0_device = {
85 .flags = IORESOURCE_MEM, 83 .flags = IORESOURCE_MEM,
86 }, 84 },
87 .irq = { IRQ_KMIINT0, NO_IRQ }, 85 .irq = { IRQ_KMIINT0, NO_IRQ },
88 .periphid = 0x00041050,
89}; 86};
90 87
91static struct amba_device kmi1_device = { 88static struct amba_device kmi1_device = {
@@ -98,7 +95,6 @@ static struct amba_device kmi1_device = {
98 .flags = IORESOURCE_MEM, 95 .flags = IORESOURCE_MEM,
99 }, 96 },
100 .irq = { IRQ_KMIINT1, NO_IRQ }, 97 .irq = { IRQ_KMIINT1, NO_IRQ },
101 .periphid = 0x00041050,
102}; 98};
103 99
104static struct amba_device *amba_devs[] __initdata = { 100static struct amba_device *amba_devs[] __initdata = {
@@ -157,6 +153,19 @@ static int __init integrator_init(void)
157{ 153{
158 int i; 154 int i;
159 155
156 /*
157 * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
158 * hard-code them. The Integator/CP and forward have proper cell IDs.
159 * Else we leave them undefined to the bus driver can autoprobe them.
160 */
161 if (machine_is_integrator()) {
162 rtc_device.periphid = 0x00041030;
163 uart0_device.periphid = 0x00041010;
164 uart1_device.periphid = 0x00041010;
165 kmi0_device.periphid = 0x00041050;
166 kmi1_device.periphid = 0x00041050;
167 }
168
160 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 169 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
161 struct amba_device *d = amba_devs[i]; 170 struct amba_device *d = amba_devs[i];
162 amba_device_register(d, &iomem_resource); 171 amba_device_register(d, &iomem_resource);
@@ -238,3 +247,11 @@ void __init integrator_reserve(void)
238{ 247{
239 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); 248 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
240} 249}
250
251/*
252 * To reset, we hit the on-board reset register in the system FPGA
253 */
254void integrator_restart(char mode, const char *cmd)
255{
256 cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
257}
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
index e1551b8dab77..901514eba4a6 100644
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ b/arch/arm/mach-integrator/include/mach/system.h
@@ -21,8 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <mach/cm.h>
25
26static inline void arch_idle(void) 24static inline void arch_idle(void)
27{ 25{
28 /* 26 /*
@@ -32,13 +30,4 @@ static inline void arch_idle(void)
32 cpu_do_idle(); 30 cpu_do_idle();
33} 31}
34 32
35static inline void arch_reset(char mode, const char *cmd)
36{
37 /*
38 * To reset, we hit the on-board reset register
39 * in the system FPGA
40 */
41 cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
42}
43
44#endif 33#endif
diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h
deleted file mode 100644
index 2f5a2bafb11f..000000000000
--- a/arch/arm/mach-integrator/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a1769f35a86e..21a1d6cbef40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
472 .init_irq = ap_init_irq, 472 .init_irq = ap_init_irq,
473 .timer = &ap_timer, 473 .timer = &ap_timer,
474 .init_machine = ap_init, 474 .init_machine = ap_init,
475 .restart = integrator_restart,
475MACHINE_END 476MACHINE_END
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5de49c33e4d4..3a730d447c9a 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
499 .init_irq = intcp_init_irq, 499 .init_irq = intcp_init_irq,
500 .timer = &cp_timer, 500 .timer = &cp_timer,
501 .init_machine = intcp_init, 501 .init_machine = intcp_init,
502 .restart = integrator_restart,
502MACHINE_END 503MACHINE_END
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 52b7fab7ef60..07e9ff7adafb 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -10,6 +10,7 @@ void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 10void iop13xx_platform_init(void);
11void iop13xx_add_tpmi_devices(void); 11void iop13xx_add_tpmi_devices(void);
12void iop13xx_init_irq(void); 12void iop13xx_init_irq(void);
13void iop13xx_restart(char, const char *);
13 14
14/* CPUID CP6 R0 Page 0 */ 15/* CPUID CP6 R0 Page 0 */
15static inline int iop13xx_cpu_id(void) 16static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
index d0c66ef450a7..1f31ed3f8ae2 100644
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ b/arch/arm/mach-iop13xx/include/mach/system.h
@@ -7,21 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <mach/iop13xx.h>
11static inline void arch_idle(void) 10static inline void arch_idle(void)
12{ 11{
13 cpu_do_idle(); 12 cpu_do_idle();
14} 13}
15
16static inline void arch_reset(char mode, const char *cmd)
17{
18 /*
19 * Reset the internal bus (warning both cores are reset)
20 */
21 write_wdtcr(IOP_WDTCR_EN_ARM);
22 write_wdtcr(IOP_WDTCR_EN);
23 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
24 write_wdtcr(0x1000);
25
26 for(;;);
27}
diff --git a/arch/arm/mach-iop13xx/include/mach/vmalloc.h b/arch/arm/mach-iop13xx/include/mach/vmalloc.h
deleted file mode 100644
index c53456740345..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _VMALLOC_H_
2#define _VMALLOC_H_
3#define VMALLOC_END 0xfa000000UL
4#endif
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 4cf2cc477eae..abaee8833588 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC")
96 .init_irq = iop13xx_init_irq, 96 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340mc_timer, 97 .timer = &iq81340mc_timer,
98 .init_machine = iq81340mc_init, 98 .init_machine = iq81340mc_init,
99 .restart = iop13xx_restart,
99MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index cd9e27499a1e..690916a09dc6 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC")
98 .init_irq = iop13xx_init_irq, 98 .init_irq = iop13xx_init_irq,
99 .timer = &iq81340sc_timer, 99 .timer = &iq81340sc_timer,
100 .init_machine = iq81340sc_init, 100 .init_machine = iq81340sc_init,
101 .restart = iop13xx_restart,
101MACHINE_END 102MACHINE_END
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index a5b989728b9e..daabb1fa6c2c 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str)
606__setup("iop13xx_init_adma", iop13xx_init_adma_setup); 606__setup("iop13xx_init_adma", iop13xx_init_adma_setup);
607__setup("iop13xx_init_uart", iop13xx_init_uart_setup); 607__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); 608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
609
610void iop13xx_restart(char mode, const char *cmd)
611{
612 /*
613 * Reset the internal bus (warning both cores are reset)
614 */
615 write_wdtcr(IOP_WDTCR_EN_ARM);
616 write_wdtcr(IOP_WDTCR_EN);
617 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
618 write_wdtcr(0x1000);
619}
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 4325055d4e19..24069e03fdc1 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210")
208 .init_irq = iop32x_init_irq, 208 .init_irq = iop32x_init_irq,
209 .timer = &em7210_timer, 209 .timer = &em7210_timer,
210 .init_machine = em7210_init_machine, 210 .init_machine = em7210_init_machine,
211 .restart = iop3xx_restart,
211MACHINE_END 212MACHINE_END
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 0edc88020577..204e1d1cd766 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank")
212 .init_irq = iop32x_init_irq, 212 .init_irq = iop32x_init_irq,
213 .timer = &glantank_timer, 213 .timer = &glantank_timer,
214 .init_machine = glantank_init_machine, 214 .init_machine = glantank_init_machine,
215 .restart = iop3xx_restart,
215MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 059c783ce0b2..2d88264b9863 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -13,15 +13,8 @@
13 13
14#include <asm/hardware/iop3xx.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr);
19
20#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
21#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
22#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
23 19
24#define __arch_ioremap __iop3xx_ioremap
25#define __arch_iounmap __iop3xx_iounmap
26
27#endif 20#endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index a4b808fe0d81..4a88727bca98 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,28 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/mach-types.h>
11#include <asm/hardware/iop3xx.h>
12#include <mach/n2100.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16 cpu_do_idle(); 12 cpu_do_idle();
17} 13}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 local_irq_disable();
22
23 if (machine_is_n2100()) {
24 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
25 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
26 while (1)
27 ;
28 }
29
30 *IOP3XX_PCSR = 0x30;
31
32 /* Jump into ROM at address 0 */
33 cpu_reset(0);
34}
diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h
deleted file mode 100644
index c4862d48e583..000000000000
--- a/arch/arm/mach-iop32x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-iop32x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 9e7aaccfeba0..3eb642af1cdc 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244")
318 .init_irq = iop32x_init_irq, 318 .init_irq = iop32x_init_irq,
319 .timer = &iq31244_timer, 319 .timer = &iq31244_timer,
320 .init_machine = iq31244_init_machine, 320 .init_machine = iq31244_init_machine,
321 .restart = iop3xx_restart,
321MACHINE_END 322MACHINE_END
322 323
323/* There should have been an ep80219 machine identifier from the beginning. 324/* There should have been an ep80219 machine identifier from the beginning.
@@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219")
332 .init_irq = iop32x_init_irq, 333 .init_irq = iop32x_init_irq,
333 .timer = &iq31244_timer, 334 .timer = &iq31244_timer,
334 .init_machine = iq31244_init_machine, 335 .init_machine = iq31244_init_machine,
336 .restart = iop3xx_restart,
335MACHINE_END 337MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 53ea86f649dd..2ec724b58a2c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321")
191 .init_irq = iop32x_init_irq, 191 .init_irq = iop32x_init_irq,
192 .timer = &iq80321_timer, 192 .timer = &iq80321_timer,
193 .init_machine = iq80321_init_machine, 193 .init_machine = iq80321_init_machine,
194 .restart = iop3xx_restart,
194MACHINE_END 195MACHINE_END
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index d7269279968c..6b6d55912444 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -291,6 +291,14 @@ static void n2100_power_off(void)
291 ; 291 ;
292} 292}
293 293
294static void n2100_restart(char mode, const char *cmd)
295{
296 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
297 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
298 while (1)
299 ;
300}
301
294 302
295static struct timer_list power_button_poll_timer; 303static struct timer_list power_button_poll_timer;
296 304
@@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100")
332 .init_irq = iop32x_init_irq, 340 .init_irq = iop32x_init_irq,
333 .timer = &n2100_timer, 341 .timer = &n2100_timer,
334 .init_machine = n2100_init_machine, 342 .init_machine = n2100_init_machine,
343 .restart = n2100_restart,
335MACHINE_END 344MACHINE_END
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 39e893e97c21..a8a66fc8fbdb 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -13,15 +13,8 @@
13 13
14#include <asm/hardware/iop3xx.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr);
19
20#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
21#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
22#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
23 19
24#define __arch_ioremap __iop3xx_ioremap
25#define __arch_iounmap __iop3xx_iounmap
26
27#endif 20#endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index f192a34be073..4f98e765397c 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,17 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/hardware/iop3xx.h>
11
12static inline void arch_idle(void) 10static inline void arch_idle(void)
13{ 11{
14 cpu_do_idle(); 12 cpu_do_idle();
15} 13}
16
17static inline void arch_reset(char mode, const char *cmd)
18{
19 *IOP3XX_PCSR = 0x30;
20
21 /* Jump into ROM at address 0 */
22 cpu_reset(0);
23}
diff --git a/arch/arm/mach-iop33x/include/mach/vmalloc.h b/arch/arm/mach-iop33x/include/mach/vmalloc.h
deleted file mode 100644
index 48331dc23704..000000000000
--- a/arch/arm/mach-iop33x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 9e14ccc56f8e..abce934f3816 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331")
146 .init_irq = iop33x_init_irq, 146 .init_irq = iop33x_init_irq,
147 .timer = &iq80331_timer, 147 .timer = &iq80331_timer,
148 .init_machine = iq80331_init_machine, 148 .init_machine = iq80331_init_machine,
149 .restart = iop3xx_restart,
149MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 09c899a2523f..7513559e25bb 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332")
146 .init_irq = iop33x_init_irq, 146 .init_irq = iop33x_init_irq,
147 .timer = &iq80332_timer, 147 .timer = &iq80332_timer,
148 .init_machine = iq80332_init_machine, 148 .init_machine = iq80332_init_machine,
149 .restart = iop3xx_restart,
149MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 24f0fe35f4ad..81c45370a4e6 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void)
515 } 515 }
516} 516}
517 517
518void ixp2000_restart(char mode, const char *cmd)
519{
520 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
521}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index af9994537e01..ee525416f0d2 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")
259 .init_irq = ixp2000_init_irq, 259 .init_irq = ixp2000_init_irq,
260 .timer = &enp2611_timer, 260 .timer = &enp2611_timer,
261 .init_machine = enp2611_init_machine, 261 .init_machine = enp2611_init_machine,
262 .restart = ixp2000_restart,
262MACHINE_END 263MACHINE_END
263 264
264 265
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h
index 42182c79ed90..bb0f8dcf9ee1 100644
--- a/arch/arm/mach-ixp2000/include/mach/platform.h
+++ b/arch/arm/mach-ixp2000/include/mach/platform.h
@@ -122,6 +122,7 @@ void ixp2000_map_io(void);
122void ixp2000_uart_init(void); 122void ixp2000_uart_init(void);
123void ixp2000_init_irq(void); 123void ixp2000_init_irq(void);
124void ixp2000_init_time(unsigned long); 124void ixp2000_init_time(unsigned long);
125void ixp2000_restart(char, const char *);
125unsigned long ixp2000_gettimeoffset(void); 126unsigned long ixp2000_gettimeoffset(void);
126 127
127struct pci_sys_data; 128struct pci_sys_data;
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
index de370992c848..a7fb08b2b8e7 100644
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ b/arch/arm/mach-ixp2000/include/mach/system.h
@@ -8,42 +8,7 @@
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11
12#include <mach/hardware.h>
13#include <asm/mach-types.h>
14
15static inline void arch_idle(void) 11static inline void arch_idle(void)
16{ 12{
17 cpu_do_idle(); 13 cpu_do_idle();
18} 14}
19
20static inline void arch_reset(char mode, const char *cmd)
21{
22 local_irq_disable();
23
24 /*
25 * Reset flash banking register so that we are pointing at
26 * RedBoot bank.
27 */
28 if (machine_is_ixdp2401()) {
29 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
30 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
31 | IXDP2X01_CPLD_FLASH_INTERN));
32 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
33 }
34
35 /*
36 * On IXDP2801 we need to write this magic sequence to the CPLD
37 * to cause a complete reset of the CPU and all external devices
38 * and move the flash bank register back to 0.
39 */
40 if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
41 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
42
43 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
44 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
45 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
46 }
47
48 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
49}
diff --git a/arch/arm/mach-ixp2000/include/mach/vmalloc.h b/arch/arm/mach-ixp2000/include/mach/vmalloc.h
deleted file mode 100644
index 61c8dae24f95..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-ixp2000/include/mach/vmalloc.h
3 *
4 * Author: Naeem Afzal <naeem.m.afzal@intel.com>
5 *
6 * Copyright 2002 Intel Corp.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Just any arbitrary offset to the start of the vmalloc VM area: the
14 * current 8MB value just means that there will be a 8MB "hole" after the
15 * physical memory until the kernel virtual memory starts. That means that
16 * any out-of-bounds memory accesses will hopefully be caught.
17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
18 * area for the same reason. ;)
19 */
20#define VMALLOC_END 0xfb000000UL
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f7dfd9700141..f53e911ec94a 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")
176 .init_irq = ixdp2400_init_irq, 176 .init_irq = ixdp2400_init_irq,
177 .timer = &ixdp2400_timer, 177 .timer = &ixdp2400_timer,
178 .init_machine = ixdp2x00_init_machine, 178 .init_machine = ixdp2x00_init_machine,
179 .restart = ixp2000_restart,
179MACHINE_END 180MACHINE_END
180 181
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index d33bcac1ec92..a2e7c393e74f 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
291 .init_irq = ixdp2800_init_irq, 291 .init_irq = ixdp2800_init_irq,
292 .timer = &ixdp2800_timer, 292 .timer = &ixdp2800_timer,
293 .init_machine = ixdp2x00_init_machine, 293 .init_machine = ixdp2x00_init_machine,
294 .restart = ixp2000_restart,
294MACHINE_END 295MACHINE_END
295 296
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 61a28676b5be..7632beadabf6 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void)
413 ixdp2x01_uart_init(); 413 ixdp2x01_uart_init();
414} 414}
415 415
416static void ixdp2401_restart(char mode, const char *cmd)
417{
418 /*
419 * Reset flash banking register so that we are pointing at
420 * RedBoot bank.
421 */
422 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
423 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
424 | IXDP2X01_CPLD_FLASH_INTERN));
425 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
426
427 ixp2000_restart(mode, cmd);
428}
429
430static void ixdp280x_restart(char mode, const char *cmd)
431{
432 /*
433 * On IXDP2801 we need to write this magic sequence to the CPLD
434 * to cause a complete reset of the CPU and all external devices
435 * and move the flash bank register back to 0.
436 */
437 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
438
439 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
440 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
441 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
442
443 ixp2000_restart(mode, cmd);
444}
416 445
417#ifdef CONFIG_ARCH_IXDP2401 446#ifdef CONFIG_ARCH_IXDP2401
418MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") 447MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
@@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
422 .init_irq = ixdp2x01_init_irq, 451 .init_irq = ixdp2x01_init_irq,
423 .timer = &ixdp2x01_timer, 452 .timer = &ixdp2x01_timer,
424 .init_machine = ixdp2x01_init_machine, 453 .init_machine = ixdp2x01_init_machine,
454 .restart = ixdp2401_restart,
425MACHINE_END 455MACHINE_END
426#endif 456#endif
427 457
@@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
433 .init_irq = ixdp2x01_init_irq, 463 .init_irq = ixdp2x01_init_irq,
434 .timer = &ixdp2x01_timer, 464 .timer = &ixdp2x01_timer,
435 .init_machine = ixdp2x01_init_machine, 465 .init_machine = ixdp2x01_init_machine,
466 .restart = ixdp280x_restart,
436MACHINE_END 467MACHINE_END
437 468
438/* 469/*
@@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
446 .init_irq = ixdp2x01_init_irq, 477 .init_irq = ixdp2x01_init_irq,
447 .timer = &ixdp2x01_timer, 478 .timer = &ixdp2x01_timer,
448 .init_machine = ixdp2x01_init_machine, 479 .init_machine = ixdp2x01_init_machine,
480 .restart = ixdp280x_restart,
449MACHINE_END 481MACHINE_END
450#endif 482#endif
451 483
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index a1bee33d183e..0923bb905cc0 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void)
444 *IXP23XX_EXP_UNIT_FUSE |= 0xf; 444 *IXP23XX_EXP_UNIT_FUSE |= 0xf;
445 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); 445 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
446} 446}
447
448void ixp23xx_restart(char mode, const char *cmd)
449{
450 /* Use on-chip reset capability */
451 *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
452}
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 30dd31652e9d..8f2487e1fc4e 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso")
90 .timer = &ixp23xx_timer, 90 .timer = &ixp23xx_timer,
91 .atag_offset = 0x100, 91 .atag_offset = 0x100,
92 .init_machine = espresso_init, 92 .init_machine = espresso_init,
93 .restart = ixp23xx_restart,
93MACHINE_END 94MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index a1749d0fd896..4ce4353b9f72 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,33 +20,4 @@
20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) 20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
21#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
22 22
23static inline void __iomem *
24ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
25{
26 if (addr >= IXP23XX_PCI_MEM_START &&
27 addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
28 if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE)
29 return NULL;
30
31 return (void __iomem *)
32 ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
33 }
34
35 return __arm_ioremap(addr, size, mtype);
36}
37
38static inline void
39ixp23xx_iounmap(void __iomem *addr)
40{
41 if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) &&
42 (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE))
43 return;
44
45 __iounmap(addr);
46}
47
48#define __arch_ioremap ixp23xx_ioremap
49#define __arch_iounmap ixp23xx_iounmap
50
51
52#endif 23#endif
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h
index db9d9416e5e4..50de558e722e 100644
--- a/arch/arm/mach-ixp23xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp23xx/include/mach/platform.h
@@ -34,6 +34,7 @@ struct pci_sys_data;
34void ixp23xx_map_io(void); 34void ixp23xx_map_io(void);
35void ixp23xx_init_irq(void); 35void ixp23xx_init_irq(void);
36void ixp23xx_sys_init(void); 36void ixp23xx_sys_init(void);
37void ixp23xx_restart(char, const char *);
37int ixp23xx_pci_setup(int, struct pci_sys_data *); 38int ixp23xx_pci_setup(int, struct pci_sys_data *);
38void ixp23xx_pci_preinit(void); 39void ixp23xx_pci_preinit(void);
39struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); 40struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
index 8920ff2dff1f..277dda7334b9 100644
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ b/arch/arm/mach-ixp23xx/include/mach/system.h
@@ -7,10 +7,6 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10
11#include <mach/hardware.h>
12#include <asm/mach-types.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16#if 0 12#if 0
@@ -18,16 +14,3 @@ static inline void arch_idle(void)
18 cpu_do_idle(); 14 cpu_do_idle();
19#endif 15#endif
20} 16}
21
22static inline void arch_reset(char mode, const char *cmd)
23{
24 /* First try machine specific support */
25 if (machine_is_ixdp2351()) {
26 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
27 (void) *IXDP2351_CPLD_RESET1_REG;
28 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
29 }
30
31 /* Use on-chip reset capability */
32 *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
33}
diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
deleted file mode 100644
index 896c56a1c00e..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-ixp23xx/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2005 MontaVista Software, Inc.
5 *
6 * NPU mappings end at 0xf0000000 and we allocate 64MB for board
7 * specific static I/O.
8 */
9
10#define VMALLOC_END (0xec000000UL)
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b3a57e0f3419..5d5dd3e8d069 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -326,6 +326,17 @@ static void __init ixdp2351_init(void)
326 ixp23xx_sys_init(); 326 ixp23xx_sys_init();
327} 327}
328 328
329static void ixdp2351_restart(char mode, const char *cmd)
330{
331 /* First try machine specific support */
332
333 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
334 (void) *IXDP2351_CPLD_RESET1_REG;
335 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
336
337 ixp23xx_restart(mode, cmd);
338}
339
329MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") 340MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
330 /* Maintainer: MontaVista Software, Inc. */ 341 /* Maintainer: MontaVista Software, Inc. */
331 .map_io = ixdp2351_map_io, 342 .map_io = ixdp2351_map_io,
@@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
333 .timer = &ixp23xx_timer, 344 .timer = &ixp23xx_timer,
334 .atag_offset = 0x100, 345 .atag_offset = 0x100,
335 .init_machine = ixdp2351_init, 346 .init_machine = ixdp2351_init,
347 .restart = ixdp2351_restart,
336MACHINE_END 348MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 8f4dcbba9025..377283fc658c 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform")
177 .timer = &ixp23xx_timer, 177 .timer = &ixp23xx_timer,
178 .atag_offset = 0x100, 178 .atag_offset = 0x100,
179 .init_machine = roadrunner_init, 179 .init_machine = roadrunner_init,
180 .restart = ixp23xx_restart,
180MACHINE_END 181MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 37609a22c450..a7277ad470a5 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
172#if defined(CONFIG_PCI) 172#if defined(CONFIG_PCI)
173 .dma_zone_size = SZ_64M, 173 .dma_zone_size = SZ_64M,
174#endif 174#endif
175 .restart = ixp4xx_restart,
175MACHINE_END 176MACHINE_END
176 177
177 /* 178 /*
@@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
190#if defined(CONFIG_PCI) 191#if defined(CONFIG_PCI)
191 .dma_zone_size = SZ_64M, 192 .dma_zone_size = SZ_64M,
192#endif 193#endif
194 .restart = ixp4xx_restart,
193MACHINE_END 195MACHINE_END
194#endif 196#endif
195 197
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index b86a0055ab96..3841ab4146ba 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -17,7 +17,6 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/serial.h> 19#include <linux/serial.h>
20#include <linux/sched.h>
21#include <linux/tty.h> 20#include <linux/tty.h>
22#include <linux/platform_device.h> 21#include <linux/platform_device.h>
23#include <linux/serial_core.h> 22#include <linux/serial_core.h>
@@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void)
403/* 402/*
404 * sched_clock() 403 * sched_clock()
405 */ 404 */
406static DEFINE_CLOCK_DATA(cd); 405static u32 notrace ixp4xx_read_sched_clock(void)
407
408unsigned long long notrace sched_clock(void)
409{
410 u32 cyc = *IXP4XX_OSTS;
411 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
412}
413
414static void notrace ixp4xx_update_sched_clock(void)
415{ 406{
416 u32 cyc = *IXP4XX_OSTS; 407 return *IXP4XX_OSTS;
417 update_sched_clock(&cd, cyc, (u32)~0);
418} 408}
419 409
420/* 410/*
@@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
430EXPORT_SYMBOL(ixp4xx_timer_freq); 420EXPORT_SYMBOL(ixp4xx_timer_freq);
431static void __init ixp4xx_clocksource_init(void) 421static void __init ixp4xx_clocksource_init(void)
432{ 422{
433 init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq); 423 setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
434 424
435 clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32, 425 clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
436 ixp4xx_clocksource_read); 426 ixp4xx_clocksource_read);
@@ -501,3 +491,23 @@ static void __init ixp4xx_clockevent_init(void)
501 491
502 clockevents_register_device(&clockevent_ixp4xx); 492 clockevents_register_device(&clockevent_ixp4xx);
503} 493}
494
495void ixp4xx_restart(char mode, const char *cmd)
496{
497 if ( 1 && mode == 's') {
498 /* Jump into ROM at address 0 */
499 soft_restart(0);
500 } else {
501 /* Use on-chip reset capability */
502
503 /* set the "key" register to enable access to
504 * "timer" and "enable" registers
505 */
506 *IXP4XX_OSWK = IXP4XX_WDT_KEY;
507
508 /* write 0 to the timer register for an immediate reset */
509 *IXP4XX_OSWT = 0;
510
511 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
512 }
513}
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 81dfec31842b..a74f86ce8bcc 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
117#if defined(CONFIG_PCI) 117#if defined(CONFIG_PCI)
118 .dma_zone_size = SZ_64M, 118 .dma_zone_size = SZ_64M,
119#endif 119#endif
120 .restart = ixp4xx_restart,
120MACHINE_END 121MACHINE_END
121#endif 122#endif
122 123
@@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
132 .timer = &ixp4xx_timer, 133 .timer = &ixp4xx_timer,
133 .atag_offset = 0x100, 134 .atag_offset = 0x100,
134 .init_machine = coyote_init, 135 .init_machine = coyote_init,
136 .restart = ixp4xx_restart,
135MACHINE_END 137MACHINE_END
136#endif 138#endif
137 139
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 8837fbca27ce..67be177b336a 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
286#if defined(CONFIG_PCI) 286#if defined(CONFIG_PCI)
287 .dma_zone_size = SZ_64M, 287 .dma_zone_size = SZ_64M,
288#endif 288#endif
289 .restart = ixp4xx_restart,
289MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 2887c3578c17..6d5818285af8 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3")
277#if defined(CONFIG_PCI) 277#if defined(CONFIG_PCI)
278 .dma_zone_size = SZ_64M, 278 .dma_zone_size = SZ_64M,
279#endif 279#endif
280 .restart = ixp4xx_restart,
280MACHINE_END 281MACHINE_END
281 282
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index d69d1b053bb7..7ecf9b28f1c0 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
104#if defined(CONFIG_PCI) 104#if defined(CONFIG_PCI)
105 .dma_zone_size = SZ_64M, 105 .dma_zone_size = SZ_64M,
106#endif 106#endif
107 .restart = ixp4xx_restart,
107MACHINE_END 108MACHINE_END
108#endif 109#endif
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index bf6678d1a929..c0e3d69a8aec 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink")
504#if defined(CONFIG_PCI) 504#if defined(CONFIG_PCI)
505 .dma_zone_size = SZ_64M, 505 .dma_zone_size = SZ_64M,
506#endif 506#endif
507 .restart = ixp4xx_restart,
507MACHINE_END 508MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index aa029fc19140..a23f89391458 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
172#if defined(CONFIG_PCI) 172#if defined(CONFIG_PCI)
173 .dma_zone_size = SZ_64M, 173 .dma_zone_size = SZ_64M,
174#endif 174#endif
175 .restart = ixp4xx_restart,
175MACHINE_END 176MACHINE_END
176 177
177 178
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index e824c02c825a..df9250bbf13d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void);
125extern void ixp4xx_sys_init(void); 125extern void ixp4xx_sys_init(void);
126extern void ixp4xx_timer_init(void); 126extern void ixp4xx_timer_init(void);
127extern struct sys_timer ixp4xx_timer; 127extern struct sys_timer ixp4xx_timer;
128extern void ixp4xx_restart(char, const char *);
128extern void ixp4xx_pci_preinit(void); 129extern void ixp4xx_pci_preinit(void);
129struct pci_sys_data; 130struct pci_sys_data;
130extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 131extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index 54c0af7fa2d4..140a9bef4466 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -8,9 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 */ 10 */
11
12#include <mach/hardware.h>
13
14static inline void arch_idle(void) 11static inline void arch_idle(void)
15{ 12{
16 /* ixp4xx does not implement the XScale PWRMODE register, 13 /* ixp4xx does not implement the XScale PWRMODE register,
@@ -20,25 +17,3 @@ static inline void arch_idle(void)
20 cpu_do_idle(); 17 cpu_do_idle();
21#endif 18#endif
22} 19}
23
24
25static inline void arch_reset(char mode, const char *cmd)
26{
27 if ( 1 && mode == 's') {
28 /* Jump into ROM at address 0 */
29 cpu_reset(0);
30 } else {
31 /* Use on-chip reset capability */
32
33 /* set the "key" register to enable access to
34 * "timer" and "enable" registers
35 */
36 *IXP4XX_OSWK = IXP4XX_WDT_KEY;
37
38 /* write 0 to the timer register for an immediate reset */
39 *IXP4XX_OSWT = 0;
40
41 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
42 }
43}
44
diff --git a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h b/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
deleted file mode 100644
index 9bcd64d59854..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-ixp4xx/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (0xff000000UL)
5
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index f235f829dfa6..8a38b39999f8 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
261#if defined(CONFIG_PCI) 261#if defined(CONFIG_PCI)
262 .dma_zone_size = SZ_64M, 262 .dma_zone_size = SZ_64M,
263#endif 263#endif
264 .restart = ixp4xx_restart,
264MACHINE_END 265MACHINE_END
265#endif 266#endif
266 267
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index de716fa1aab6..1010eb7b0083 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
321#if defined(CONFIG_PCI) 321#if defined(CONFIG_PCI)
322 .dma_zone_size = SZ_64M, 322 .dma_zone_size = SZ_64M,
323#endif 323#endif
324 .restart = ixp4xx_restart,
324MACHINE_END 325MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index ac81ccb26bfe..aa355c360d57 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
307#if defined(CONFIG_PCI) 307#if defined(CONFIG_PCI)
308 .dma_zone_size = SZ_64M, 308 .dma_zone_size = SZ_64M,
309#endif 309#endif
310 .restart = ixp4xx_restart,
310MACHINE_END 311MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 3b6a81a696fc..0940869fcfdd 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP")
246 .init_irq = ixp4xx_init_irq, 246 .init_irq = ixp4xx_init_irq,
247 .timer = &ixp4xx_timer, 247 .timer = &ixp4xx_timer,
248 .init_machine = omixp_init, 248 .init_machine = omixp_init,
249 .restart = ixp4xx_restart,
249MACHINE_END 250MACHINE_END
250#endif 251#endif
251 252
@@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT")
259#if defined(CONFIG_PCI) 260#if defined(CONFIG_PCI)
260 .dma_zone_size = SZ_64M, 261 .dma_zone_size = SZ_64M,
261#endif 262#endif
263 .restart = ixp4xx_restart,
262MACHINE_END 264MACHINE_END
263#endif 265#endif
264 266
@@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256")
269 .init_irq = ixp4xx_init_irq, 271 .init_irq = ixp4xx_init_irq,
270 .timer = &ixp4xx_timer, 272 .timer = &ixp4xx_timer,
271 .init_machine = omixp_init, 273 .init_machine = omixp_init,
274 .restart = ixp4xx_restart,
272MACHINE_END 275MACHINE_END
273#endif 276#endif
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 27e469ef4523..9dec20683291 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
244#if defined(CONFIG_PCI) 244#if defined(CONFIG_PCI)
245 .dma_zone_size = SZ_64M, 245 .dma_zone_size = SZ_64M,
246#endif 246#endif
247 .restart = ixp4xx_restart,
247MACHINE_END 248MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index b14144b967a7..5ac0f0a0fd8c 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
105#if defined(CONFIG_PCI) 105#if defined(CONFIG_PCI)
106 .dma_zone_size = SZ_64M, 106 .dma_zone_size = SZ_64M,
107#endif 107#endif
108 .restart = ixp4xx_restart,
108MACHINE_END 109MACHINE_END
109#endif 110#endif
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cfbe51d..0bff4a916231 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void)
534 return 0; 534 return 0;
535} 535}
536late_initcall(kirkwood_clock_gate); 536late_initcall(kirkwood_clock_gate);
537
538void kirkwood_restart(char mode, const char *cmd)
539{
540 /*
541 * Enable soft reset to assert RSTOUTn.
542 */
543 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
544
545 /*
546 * Assert soft reset.
547 */
548 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
549
550 while (1)
551 ;
552}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f0968a36..1529280246d6 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -50,6 +50,7 @@ void kirkwood_uart1_init(void);
50void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); 50void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
51void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); 51void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
52void kirkwood_audio_init(void); 52void kirkwood_audio_init(void);
53void kirkwood_restart(char, const char *);
53 54
54extern int kirkwood_tclk; 55extern int kirkwood_tclk;
55extern struct sys_timer kirkwood_timer; 56extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index f457e07a65f0..6e1bac929ab5 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
227 .init_early = kirkwood_init_early, 227 .init_early = kirkwood_init_early,
228 .init_irq = kirkwood_init_irq, 228 .init_irq = kirkwood_init_irq,
229 .timer = &kirkwood_timer, 229 .timer = &kirkwood_timer,
230 .restart = kirkwood_restart,
230MACHINE_END 231MACHINE_END
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index ff4c21c1f923..d93359379598 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
103 .init_early = kirkwood_init_early, 103 .init_early = kirkwood_init_early,
104 .init_irq = kirkwood_init_irq, 104 .init_irq = kirkwood_init_irq,
105 .timer = &kirkwood_timer, 105 .timer = &kirkwood_timer,
106 .restart = kirkwood_restart,
106MACHINE_END 107MACHINE_END
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index e4d199b2b1e8..61d9a552a054 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
108 .init_early = kirkwood_init_early, 108 .init_early = kirkwood_init_early,
109 .init_irq = kirkwood_init_irq, 109 .init_irq = kirkwood_init_irq,
110 .timer = &kirkwood_timer, 110 .timer = &kirkwood_timer,
111 .restart = kirkwood_restart,
111MACHINE_END 112MACHINE_END
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
index 6c40f784b516..bdaed3867d13 100644
--- a/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
127 .init_early = kirkwood_init_early, 127 .init_early = kirkwood_init_early,
128 .init_irq = kirkwood_init_irq, 128 .init_irq = kirkwood_init_irq,
129 .timer = &kirkwood_timer, 129 .timer = &kirkwood_timer,
130 .restart = kirkwood_restart,
130MACHINE_END 131MACHINE_END
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 1aaddc364f2e..49dd0cb5e166 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,31 +19,6 @@ static inline void __iomem *__io(unsigned long addr)
19 + KIRKWOOD_PCIE_IO_VIRT_BASE); 19 + KIRKWOOD_PCIE_IO_VIRT_BASE);
20} 20}
21 21
22static inline void __iomem *
23__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
24{
25 void __iomem *retval;
26 unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
27 if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
28 size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
29 retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
30 } else {
31 retval = __arm_ioremap(paddr, size, mtype);
32 }
33
34 return retval;
35}
36
37static inline void
38__arch_iounmap(void __iomem *addr)
39{
40 if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
41 addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
42 __iounmap(addr);
43}
44
45#define __arch_ioremap __arch_ioremap
46#define __arch_iounmap __arch_iounmap
47#define __io(a) __io(a) 22#define __io(a) __io(a)
48#define __mem_pci(a) (a) 23#define __mem_pci(a) (a)
49 24
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 7568e95d279b..5fddde002b5e 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h
deleted file mode 100644
index bf162ca3d2c1..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-kirkwood/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 9a1e917352f7..85f6169c2484 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
169 .init_early = kirkwood_init_early, 169 .init_early = kirkwood_init_early,
170 .init_irq = kirkwood_init_irq, 170 .init_irq = kirkwood_init_irq,
171 .timer = &kirkwood_timer, 171 .timer = &kirkwood_timer,
172 .restart = kirkwood_restart,
172MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 8849bcc7328e..e6bba01bae38 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
264 .init_early = kirkwood_init_early, 264 .init_early = kirkwood_init_early,
265 .init_irq = kirkwood_init_irq, 265 .init_irq = kirkwood_init_irq,
266 .timer = &kirkwood_timer, 266 .timer = &kirkwood_timer,
267 .restart = kirkwood_restart,
267MACHINE_END 268MACHINE_END
268#endif 269#endif
269 270
@@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
275 .init_early = kirkwood_init_early, 276 .init_early = kirkwood_init_early,
276 .init_irq = kirkwood_init_irq, 277 .init_irq = kirkwood_init_irq,
277 .timer = &kirkwood_timer, 278 .timer = &kirkwood_timer,
279 .restart = kirkwood_restart,
278MACHINE_END 280MACHINE_END
279#endif 281#endif
280 282
@@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
286 .init_early = kirkwood_init_early, 288 .init_early = kirkwood_init_early,
287 .init_irq = kirkwood_init_irq, 289 .init_irq = kirkwood_init_irq,
288 .timer = &kirkwood_timer, 290 .timer = &kirkwood_timer,
291 .restart = kirkwood_restart,
289MACHINE_END 292MACHINE_END
290#endif 293#endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index 1ba12c4dff8f..31ae8de34e93 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
405 .init_early = kirkwood_init_early, 405 .init_early = kirkwood_init_early,
406 .init_irq = kirkwood_init_irq, 406 .init_irq = kirkwood_init_irq,
407 .timer = &kirkwood_timer, 407 .timer = &kirkwood_timer,
408 .restart = kirkwood_restart,
408MACHINE_END 409MACHINE_END
409#endif 410#endif
410 411
@@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
416 .init_early = kirkwood_init_early, 417 .init_early = kirkwood_init_early,
417 .init_irq = kirkwood_init_irq, 418 .init_irq = kirkwood_init_irq,
418 .timer = &kirkwood_timer, 419 .timer = &kirkwood_timer,
420 .restart = kirkwood_restart,
419MACHINE_END 421MACHINE_END
420#endif 422#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 5660ca6c3d88..01f8c8992880 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
220 .init_early = kirkwood_init_early, 220 .init_early = kirkwood_init_early,
221 .init_irq = kirkwood_init_irq, 221 .init_irq = kirkwood_init_irq,
222 .timer = &kirkwood_timer, 222 .timer = &kirkwood_timer,
223 .restart = kirkwood_restart,
223MACHINE_END 224MACHINE_END
224#endif 225#endif
225 226
@@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
232 .init_early = kirkwood_init_early, 233 .init_early = kirkwood_init_early,
233 .init_irq = kirkwood_init_irq, 234 .init_irq = kirkwood_init_irq,
234 .timer = &kirkwood_timer, 235 .timer = &kirkwood_timer,
236 .restart = kirkwood_restart,
235MACHINE_END 237MACHINE_END
236#endif 238#endif
237 239
@@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
244 .init_early = kirkwood_init_early, 246 .init_early = kirkwood_init_early,
245 .init_irq = kirkwood_init_irq, 247 .init_irq = kirkwood_init_irq,
246 .timer = &kirkwood_timer, 248 .timer = &kirkwood_timer,
249 .restart = kirkwood_restart,
247MACHINE_END 250MACHINE_END
248#endif 251#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 6663869773ab..fd2c9c8b6831 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
85 .init_early = kirkwood_init_early, 85 .init_early = kirkwood_init_early,
86 .init_irq = kirkwood_init_irq, 86 .init_irq = kirkwood_init_irq,
87 .timer = &kirkwood_timer, 87 .timer = &kirkwood_timer,
88 .restart = kirkwood_restart,
88MACHINE_END 89MACHINE_END
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 66b3c05e37a6..ef922079348b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
121 .init_early = kirkwood_init_early, 121 .init_early = kirkwood_init_early,
122 .init_irq = kirkwood_init_irq, 122 .init_irq = kirkwood_init_irq,
123 .timer = &kirkwood_timer, 123 .timer = &kirkwood_timer,
124 .restart = kirkwood_restart,
124MACHINE_END 125MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 8b102d62e82c..4ea70e5f7137 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -107,7 +107,7 @@ static void __init sheevaplug_init(void)
107 kirkwood_init(); 107 kirkwood_init();
108 108
109 /* setup gpio pin select */ 109 /* setup gpio pin select */
110 if (machine_is_sheeva_esata()) 110 if (machine_is_esata_sheevaplug())
111 kirkwood_mpp_conf(sheeva_esata_mpp_config); 111 kirkwood_mpp_conf(sheeva_esata_mpp_config);
112 else 112 else
113 kirkwood_mpp_conf(sheevaplug_mpp_config); 113 kirkwood_mpp_conf(sheevaplug_mpp_config);
@@ -123,11 +123,11 @@ static void __init sheevaplug_init(void)
123 kirkwood_ge00_init(&sheevaplug_ge00_data); 123 kirkwood_ge00_init(&sheevaplug_ge00_data);
124 124
125 /* honor lower power consumption for plugs with out eSATA */ 125 /* honor lower power consumption for plugs with out eSATA */
126 if (machine_is_sheeva_esata()) 126 if (machine_is_esata_sheevaplug())
127 kirkwood_sata_init(&sheeva_esata_sata_data); 127 kirkwood_sata_init(&sheeva_esata_sata_data);
128 128
129 /* enable sd wp and sd cd on plugs with esata */ 129 /* enable sd wp and sd cd on plugs with esata */
130 if (machine_is_sheeva_esata()) 130 if (machine_is_esata_sheevaplug())
131 kirkwood_sdio_init(&sheeva_esata_mvsdio_data); 131 kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
132 else 132 else
133 kirkwood_sdio_init(&sheevaplug_mvsdio_data); 133 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
@@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
144 .init_early = kirkwood_init_early, 144 .init_early = kirkwood_init_early,
145 .init_irq = kirkwood_init_irq, 145 .init_irq = kirkwood_init_irq,
146 .timer = &kirkwood_timer, 146 .timer = &kirkwood_timer,
147 .restart = kirkwood_restart,
147MACHINE_END 148MACHINE_END
148#endif 149#endif
149 150
@@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
155 .init_early = kirkwood_init_early, 156 .init_early = kirkwood_init_early,
156 .init_irq = kirkwood_init_irq, 157 .init_irq = kirkwood_init_irq,
157 .timer = &kirkwood_timer, 158 .timer = &kirkwood_timer,
159 .restart = kirkwood_restart,
158MACHINE_END 160MACHINE_END
159#endif 161#endif
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index ea104fb5ec3d..966b2b3bb813 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
207 .init_early = kirkwood_init_early, 207 .init_early = kirkwood_init_early,
208 .init_irq = kirkwood_init_irq, 208 .init_irq = kirkwood_init_irq,
209 .timer = &kirkwood_timer, 209 .timer = &kirkwood_timer,
210 .restart = kirkwood_restart,
210MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 262c034836d4..73e2b6ca9564 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
138 .init_early = kirkwood_init_early, 138 .init_early = kirkwood_init_early,
139 .init_irq = kirkwood_init_irq, 139 .init_irq = kirkwood_init_irq,
140 .timer = &kirkwood_timer, 140 .timer = &kirkwood_timer,
141 .restart = kirkwood_restart,
141MACHINE_END 142MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index b68f5b4a9ec8..5bbca2680442 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x")
182 .init_early = kirkwood_init_early, 182 .init_early = kirkwood_init_early,
183 .init_irq = kirkwood_init_irq, 183 .init_irq = kirkwood_init_irq,
184 .timer = &kirkwood_timer, 184 .timer = &kirkwood_timer,
185 .restart = kirkwood_restart,
185MACHINE_END 186MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index a91f99d265aa..255502ddd879 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board")
228 .init_irq = ks8695_init_irq, 228 .init_irq = ks8695_init_irq,
229 .init_machine = acs5k_init, 229 .init_machine = acs5k_init,
230 .timer = &ks8695_timer, 230 .timer = &ks8695_timer,
231 .restart = ks8695_restart,
231MACHINE_END 232MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index d24bcef2e2dd..e0d36cef2c56 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
126 .init_irq = ks8695_init_irq, 126 .init_irq = ks8695_init_irq,
127 .init_machine = dsm320_init, 127 .init_machine = dsm320_init,
128 .timer = &ks8695_timer, 128 .timer = &ks8695_timer,
129 .restart = ks8695_restart,
129MACHINE_END 130MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 16c95657f8fd..a8270725b76d 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board")
58 .init_irq = ks8695_init_irq, 58 .init_irq = ks8695_init_irq,
59 .init_machine = micrel_init, 59 .init_machine = micrel_init,
60 .timer = &ks8695_timer, 60 .timer = &ks8695_timer,
61 .restart = ks8695_restart,
61MACHINE_END 62MACHINE_END
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index 2fbfab8d5fae..f8bdb11a9c33 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -12,4 +12,5 @@
12 12
13extern __init void ks8695_map_io(void); 13extern __init void ks8695_map_io(void);
14extern __init void ks8695_init_irq(void); 14extern __init void ks8695_init_irq(void);
15extern void ks8695_restart(char, const char *);
15extern struct sys_timer ks8695_timer; 16extern struct sys_timer ks8695_timer;
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index fb1dda9be2d0..59fe992395bf 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -14,9 +14,6 @@
14#ifndef __ASM_ARCH_SYSTEM_H 14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H 15#define __ASM_ARCH_SYSTEM_H
16 16
17#include <linux/io.h>
18#include <mach/regs-timer.h>
19
20static void arch_idle(void) 17static void arch_idle(void)
21{ 18{
22 /* 19 /*
@@ -27,22 +24,4 @@ static void arch_idle(void)
27 24
28} 25}
29 26
30static void arch_reset(char mode, const char *cmd)
31{
32 unsigned int reg;
33
34 if (mode == 's')
35 cpu_reset(0);
36
37 /* disable timer0 */
38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
39 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
40
41 /* enable watchdog mode */
42 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
43
44 /* re-enable timer0 */
45 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
46}
47
48#endif 27#endif
diff --git a/arch/arm/mach-ks8695/include/mach/vmalloc.h b/arch/arm/mach-ks8695/include/mach/vmalloc.h
deleted file mode 100644
index 744ac66be3a2..000000000000
--- a/arch/arm/mach-ks8695/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-ks8695/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2006 Ben Dooks
5 * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk>
6 *
7 * KS8695 vmalloc definition
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_VMALLOC_H
15#define __ASM_ARCH_VMALLOC_H
16
17#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK)
18
19#endif
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 69c072c2c0f9..37dfcd5bd2ad 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = {
109 .offset = ks8695_gettimeoffset, 109 .offset = ks8695_gettimeoffset,
110 .resume = ks8695_timer_setup, 110 .resume = ks8695_timer_setup,
111}; 111};
112
113void ks8695_restart(char mode, const char *cmd)
114{
115 unsigned int reg;
116
117 if (mode == 's')
118 soft_restart(0);
119
120 /* disable timer0 */
121 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
122 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
123
124 /* enable watchdog mode */
125 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
126
127 /* re-enable timer0 */
128 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
129}
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 205b2dbb565b..369b152896cd 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void)
164/* 164/*
165 * System reset via the watchdog timer 165 * System reset via the watchdog timer
166 */ 166 */
167void lpc32xx_watchdog_reset(void) 167static void lpc32xx_watchdog_reset(void)
168{ 168{
169 /* Make sure WDT clocks are enabled */ 169 /* Make sure WDT clocks are enabled */
170 __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, 170 __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
@@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void)
311{ 311{
312 iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); 312 iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
313} 313}
314
315void lpc23xx_restart(char mode, const char *cmd)
316{
317 switch (mode) {
318 case 's':
319 case 'h':
320 lpc32xx_watchdog_reset();
321 break;
322
323 default:
324 /* Do nothing */
325 break;
326 }
327
328 /* Wait for watchdog to reset system */
329 while (1)
330 ;
331}
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 5583f52662bd..4b4e700343c1 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void);
39extern void __init lpc32xx_map_io(void); 39extern void __init lpc32xx_map_io(void);
40extern void __init lpc32xx_serial_init(void); 40extern void __init lpc32xx_serial_init(void);
41extern void __init lpc32xx_gpio_init(void); 41extern void __init lpc32xx_gpio_init(void);
42extern void lpc23xx_restart(char, const char *);
43
42 44
43/* 45/*
44 * Structure used for setting up and querying the PLLS 46 * Structure used for setting up and querying the PLLS
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
index df3b0dea4d7b..bf176c991520 100644
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -24,29 +24,4 @@ static void arch_idle(void)
24 cpu_do_idle(); 24 cpu_do_idle();
25} 25}
26 26
27static inline void arch_reset(char mode, const char *cmd)
28{
29 extern void lpc32xx_watchdog_reset(void);
30
31 switch (mode) {
32 case 's':
33 case 'h':
34 printk(KERN_CRIT "RESET: Rebooting system\n");
35
36 /* Disable interrupts */
37 local_irq_disable();
38
39 lpc32xx_watchdog_reset();
40 break;
41
42 default:
43 /* Do nothing */
44 break;
45 }
46
47 /* Wait for watchdog to reset system */
48 while (1)
49 ;
50}
51
52#endif 27#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
deleted file mode 100644
index 720fa43a60bf..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/include/mach/vmalloc.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __ASM_ARCH_VMALLOC_H
20#define __ASM_ARCH_VMALLOC_H
21
22#define VMALLOC_END 0xF0000000UL
23
24#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 6d2f0d1b9373..ecb94114c81b 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")
388 .init_irq = lpc32xx_init_irq, 388 .init_irq = lpc32xx_init_irq,
389 .timer = &lpc32xx_timer, 389 .timer = &lpc32xx_timer,
390 .init_machine = phy3250_board_init, 390 .init_machine = phy3250_board_init,
391 .restart = lpc23xx_restart,
391MACHINE_END 392MACHINE_END
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index f0d236dfb02b..17cb76060125 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -244,6 +244,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
244 .init_irq = pxa168_init_irq, 244 .init_irq = pxa168_init_irq,
245 .timer = &pxa168_timer, 245 .timer = &pxa168_timer,
246 .init_machine = common_init, 246 .init_machine = common_init,
247 .restart = pxa168_restart,
247MACHINE_END 248MACHINE_END
248 249
249MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") 250MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
@@ -252,4 +253,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
252 .init_irq = pxa168_init_irq, 253 .init_irq = pxa168_init_irq,
253 .timer = &pxa168_timer, 254 .timer = &pxa168_timer,
254 .init_machine = common_init, 255 .init_machine = common_init,
256 .restart = pxa168_restart,
255MACHINE_END 257MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index c5d53e0742e9..b148a9dc5a44 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -46,4 +46,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
46 .init_irq = pxa168_init_irq, 46 .init_irq = pxa168_init_irq,
47 .timer = &pxa168_timer, 47 .timer = &pxa168_timer,
48 .init_machine = avengers_lite_init, 48 .init_machine = avengers_lite_init,
49 .restart = pxa168_restart,
49MACHINE_END 50MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index eb07565a06a3..d839fe6421e6 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -220,4 +220,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
220 .init_irq = mmp2_init_irq, 220 .init_irq = mmp2_init_irq,
221 .timer = &mmp2_timer, 221 .timer = &mmp2_timer,
222 .init_machine = brownstone_init, 222 .init_machine = brownstone_init,
223 .restart = mmp_restart,
223MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 5720674739f0..062b5b93c50e 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -45,3 +45,8 @@ void __init mmp_map_io(void)
45 /* this is early, initialize mmp_chip_id here */ 45 /* this is early, initialize mmp_chip_id here */
46 mmp_chip_id = __raw_readl(MMP_CHIPID); 46 mmp_chip_id = __raw_readl(MMP_CHIPID);
47} 47}
48
49void mmp_restart(char mode, const char *cmd)
50{
51 soft_restart(0);
52}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ec8d65ded25c..1c9d6c1ea97a 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -6,3 +6,4 @@ extern void timer_init(int irq);
6 6
7extern void __init icu_init_irq(void); 7extern void __init icu_init_irq(void);
8extern void __init mmp_map_io(void); 8extern void __init mmp_map_io(void);
9extern void mmp_restart(char, const char *);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c1f0aa88dd8a..2ee8cd7829dd 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -122,4 +122,5 @@ MACHINE_START(FLINT, "Flint Development Platform")
122 .init_irq = mmp2_init_irq, 122 .init_irq = mmp2_init_irq,
123 .timer = &mmp2_timer, 123 .timer = &mmp2_timer,
124 .init_machine = flint_init, 124 .init_machine = flint_init,
125 .restart = mmp_restart,
125MACHINE_END 126MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index e266f66a4670..87765467de63 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -195,4 +195,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
195 .init_irq = pxa168_init_irq, 195 .init_irq = pxa168_init_irq,
196 .timer = &pxa168_timer, 196 .timer = &pxa168_timer,
197 .init_machine = gplugd_init, 197 .init_machine = gplugd_init,
198 .restart = pxa168_restart,
198MACHINE_END 199MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index f9286089da3a..dc03d580a06d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -5,6 +5,7 @@ struct sys_timer;
5 5
6extern struct sys_timer pxa168_timer; 6extern struct sys_timer pxa168_timer;
7extern void __init pxa168_init_irq(void); 7extern void __init pxa168_init_irq(void);
8extern void pxa168_restart(char, const char *);
8extern void pxa168_clear_keypad_wakeup(void); 9extern void pxa168_clear_keypad_wakeup(void);
9 10
10#include <linux/i2c.h> 11#include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index 1a8a25edb1b4..1d001eab81e1 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -9,18 +9,8 @@
9#ifndef __ASM_MACH_SYSTEM_H 9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H 10#define __ASM_MACH_SYSTEM_H
11 11
12#include <mach/cputype.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 if (cpu_is_pxa168())
22 cpu_reset(0xffff0000);
23 else
24 cpu_reset(0);
25}
26#endif /* __ASM_MACH_SYSTEM_H */ 16#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
deleted file mode 100644
index 1d0bac003ad0..000000000000
--- a/arch/arm/mach-mmp/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 8bfac6612623..96cf5c8fe47d 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
175 .init_irq = mmp2_init_irq, 175 .init_irq = mmp2_init_irq,
176 .timer = &mmp2_timer, 176 .timer = &mmp2_timer,
177 .init_machine = jasper_init, 177 .init_machine = jasper_init,
178 .restart = mmp_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 84245035f351..7bc17eaa12eb 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -218,3 +218,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
218 pxa168_device_usb_host.dev.platform_data = pdata; 218 pxa168_device_usb_host.dev.platform_data = pdata;
219 return platform_device_register(&pxa168_device_usb_host); 219 return platform_device_register(&pxa168_device_usb_host);
220} 220}
221
222void pxa168_restart(char mode, const char *cmd)
223{
224 soft_restart(0xffff0000);
225}
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index bb2ddb72bca2..8e3b5af04a57 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -105,4 +105,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
105 .init_irq = pxa910_init_irq, 105 .init_irq = pxa910_init_irq,
106 .timer = &pxa910_timer, 106 .timer = &pxa910_timer,
107 .init_machine = tavorevb_init, 107 .init_machine = tavorevb_init,
108 .restart = mmp_restart,
108MACHINE_END 109MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 703de85b571c..0523e422990e 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -87,4 +87,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
87 .init_irq = pxa168_init_irq, 87 .init_irq = pxa168_init_irq,
88 .timer = &pxa168_timer, 88 .timer = &pxa168_timer,
89 .init_machine = teton_bga_init, 89 .init_machine = teton_bga_init,
90 .restart = pxa168_restart,
90MACHINE_END 91MACHINE_END
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 4e91ee6e27c8..71fc4ee4602c 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -25,7 +25,6 @@
25 25
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/sched.h>
29 28
30#include <asm/sched_clock.h> 29#include <asm/sched_clock.h>
31#include <mach/addr-map.h> 30#include <mach/addr-map.h>
@@ -42,8 +41,6 @@
42#define MAX_DELTA (0xfffffffe) 41#define MAX_DELTA (0xfffffffe)
43#define MIN_DELTA (16) 42#define MIN_DELTA (16)
44 43
45static DEFINE_CLOCK_DATA(cd);
46
47/* 44/*
48 * FIXME: the timer needs some delay to stablize the counter capture 45 * FIXME: the timer needs some delay to stablize the counter capture
49 */ 46 */
@@ -59,16 +56,9 @@ static inline uint32_t timer_read(void)
59 return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); 56 return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
60} 57}
61 58
62unsigned long long notrace sched_clock(void) 59static u32 notrace mmp_read_sched_clock(void)
63{ 60{
64 u32 cyc = timer_read(); 61 return timer_read();
65 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
66}
67
68static void notrace mmp_update_sched_clock(void)
69{
70 u32 cyc = timer_read();
71 update_sched_clock(&cd, cyc, (u32)~0);
72} 62}
73 63
74static irqreturn_t timer_interrupt(int irq, void *dev_id) 64static irqreturn_t timer_interrupt(int irq, void *dev_id)
@@ -201,7 +191,7 @@ void __init timer_init(int irq)
201{ 191{
202 timer_config(); 192 timer_config();
203 193
204 init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE); 194 setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
205 195
206 ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift); 196 ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
207 ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt); 197 ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index a80ed262df1c..5ac5d5832e45 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -161,4 +161,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
161 .init_irq = pxa910_init_irq, 161 .init_irq = pxa910_init_irq,
162 .timer = &pxa910_timer, 162 .timer = &pxa910_timer,
163 .init_machine = ttc_dkb_init, 163 .init_machine = ttc_dkb_init,
164 .restart = mmp_restart,
164MACHINE_END 165MACHINE_END
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ebde97f5d5f0..1cd40ad301d3 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -13,7 +13,6 @@ config ARCH_MSM7X00A
13 select CPU_V6 13 select CPU_V6
14 select GPIO_MSM_V1 14 select GPIO_MSM_V1
15 select MSM_PROC_COMM 15 select MSM_PROC_COMM
16 select HAS_MSM_DEBUG_UART_PHYS
17 16
18config ARCH_MSM7X30 17config ARCH_MSM7X30
19 bool "MSM7x30" 18 bool "MSM7x30"
@@ -25,7 +24,6 @@ config ARCH_MSM7X30
25 select MSM_GPIOMUX 24 select MSM_GPIOMUX
26 select GPIO_MSM_V1 25 select GPIO_MSM_V1
27 select MSM_PROC_COMM 26 select MSM_PROC_COMM
28 select HAS_MSM_DEBUG_UART_PHYS
29 27
30config ARCH_QSD8X50 28config ARCH_QSD8X50
31 bool "QSD8X50" 29 bool "QSD8X50"
@@ -37,7 +35,6 @@ config ARCH_QSD8X50
37 select MSM_GPIOMUX 35 select MSM_GPIOMUX
38 select GPIO_MSM_V1 36 select GPIO_MSM_V1
39 select MSM_PROC_COMM 37 select MSM_PROC_COMM
40 select HAS_MSM_DEBUG_UART_PHYS
41 38
42config ARCH_MSM8X60 39config ARCH_MSM8X60
43 bool "MSM8X60" 40 bool "MSM8X60"
@@ -63,19 +60,20 @@ config ARCH_MSM8960
63 60
64endchoice 61endchoice
65 62
63config MSM_HAS_DEBUG_UART_HS
64 bool
65
66config MSM_SOC_REV_A 66config MSM_SOC_REV_A
67 bool 67 bool
68config ARCH_MSM_SCORPIONMP 68config ARCH_MSM_SCORPIONMP
69 bool 69 bool
70 select HAVE_SMP
70 71
71config ARCH_MSM_ARM11 72config ARCH_MSM_ARM11
72 bool 73 bool
73config ARCH_MSM_SCORPION 74config ARCH_MSM_SCORPION
74 bool 75 bool
75 76
76config HAS_MSM_DEBUG_UART_PHYS
77 bool
78
79config MSM_VIC 77config MSM_VIC
80 bool 78 bool
81 79
@@ -152,32 +150,6 @@ config MACH_MSM8960_RUMI3
152 150
153endmenu 151endmenu
154 152
155config MSM_DEBUG_UART
156 int
157 default 1 if MSM_DEBUG_UART1
158 default 2 if MSM_DEBUG_UART2
159 default 3 if MSM_DEBUG_UART3
160
161if HAS_MSM_DEBUG_UART_PHYS
162choice
163 prompt "Debug UART"
164
165 default MSM_DEBUG_UART_NONE
166
167 config MSM_DEBUG_UART_NONE
168 bool "None"
169
170 config MSM_DEBUG_UART1
171 bool "UART1"
172
173 config MSM_DEBUG_UART2
174 bool "UART2"
175
176 config MSM_DEBUG_UART3
177 bool "UART3"
178endchoice
179endif
180
181config MSM_SMD_PKG3 153config MSM_SMD_PKG3
182 bool 154 bool
183 155
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 6dc1cbd2a595..ed3598128530 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
99 .map_io = msm8960_map_io, 99 .map_io = msm8960_map_io,
100 .init_irq = msm8960_init_irq, 100 .init_irq = msm8960_init_irq,
101 .timer = &msm_timer, 101 .timer = &msm_timer,
102 .handle_irq = gic_handle_irq,
102 .init_machine = msm8960_sim_init, 103 .init_machine = msm8960_sim_init,
103MACHINE_END 104MACHINE_END
104 105
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
108 .map_io = msm8960_map_io, 109 .map_io = msm8960_map_io,
109 .init_irq = msm8960_init_irq, 110 .init_irq = msm8960_init_irq,
110 .timer = &msm_timer, 111 .timer = &msm_timer,
112 .handle_irq = gic_handle_irq,
111 .init_machine = msm8960_rumi3_init, 113 .init_machine = msm8960_rumi3_init,
112MACHINE_END 114MACHINE_END
113 115
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 44bf71688373..0a113424632c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
108 .reserve = msm8x60_reserve, 108 .reserve = msm8x60_reserve,
109 .map_io = msm8x60_map_io, 109 .map_io = msm8x60_map_io,
110 .init_irq = msm8x60_init_irq, 110 .init_irq = msm8x60_init_irq,
111 .handle_irq = gic_handle_irq,
111 .init_machine = msm8x60_init, 112 .init_machine = msm8x60_init,
112 .timer = &msm_timer, 113 .timer = &msm_timer,
113MACHINE_END 114MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
117 .reserve = msm8x60_reserve, 118 .reserve = msm8x60_reserve,
118 .map_io = msm8x60_map_io, 119 .map_io = msm8x60_map_io,
119 .init_irq = msm8x60_init_irq, 120 .init_irq = msm8x60_init_irq,
121 .handle_irq = gic_handle_irq,
120 .init_machine = msm8x60_init, 122 .init_machine = msm8x60_init,
121 .timer = &msm_timer, 123 .timer = &msm_timer,
122MACHINE_END 124MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
126 .reserve = msm8x60_reserve, 128 .reserve = msm8x60_reserve,
127 .map_io = msm8x60_map_io, 129 .map_io = msm8x60_map_io,
128 .init_irq = msm8x60_init_irq, 130 .init_irq = msm8x60_init_irq,
131 .handle_irq = gic_handle_irq,
129 .init_machine = msm8x60_init, 132 .init_machine = msm8x60_init,
130 .timer = &msm_timer, 133 .timer = &msm_timer,
131MACHINE_END 134MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
135 .reserve = msm8x60_reserve, 138 .reserve = msm8x60_reserve,
136 .map_io = msm8x60_map_io, 139 .map_io = msm8x60_map_io,
137 .init_irq = msm8x60_init_irq, 140 .init_irq = msm8x60_init_irq,
141 .handle_irq = gic_handle_irq,
138 .init_machine = msm8x60_init, 142 .init_machine = msm8x60_init,
139 .timer = &msm_timer, 143 .timer = &msm_timer,
140MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 2dc73ccddb11..3ffd8668c9a5 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -1,6 +1,7 @@
1/* arch/arm/mach-msm7200/include/mach/debug-macro.S 1/*
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 5 * Author: Brian Swetland <swetland@google.com>
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
@@ -14,40 +15,52 @@
14 * 15 *
15 */ 16 */
16 17
17
18
19#include <mach/hardware.h> 18#include <mach/hardware.h>
20#include <mach/msm_iomap.h> 19#include <mach/msm_iomap.h>
21 20
22#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
23 .macro addruart, rp, rv, tmp 21 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
24 ldr \rp, =MSM_DEBUG_UART_PHYS 23 ldr \rp, =MSM_DEBUG_UART_PHYS
25 ldr \rv, =MSM_DEBUG_UART_BASE 24 ldr \rv, =MSM_DEBUG_UART_BASE
25#endif
26 .endm 26 .endm
27 27
28 .macro senduart,rd,rx 28 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
29 teq \rx, #0 33 teq \rx, #0
30 strne \rd, [\rx, #0x0C] 34 strne \rd, [\rx, #0x0C]
35#endif
31 .endm 36 .endm
32 37
33 .macro waituart,rd,rx 38 .macro waituart, rd, rx
39#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40 @ check for TX_EMT in UARTDM_SR
41 ldr \rd, [\rx, #0x08]
42 tst \rd, #0x08
43 bne 1002f
44 @ wait for TXREADY in UARTDM_ISR
451001: ldr \rd, [\rx, #0x14]
46 tst \rd, #0x80
47 beq 1001b
481002:
49 @ Clear TX_READY by writing to the UARTDM_CR register
50 mov \rd, #0x300
51 str \rd, [\rx, #0x10]
52 @ Write 0x1 to NCF register
53 mov \rd, #0x1
54 str \rd, [\rx, #0x40]
55 @ UARTDM reg. Read to induce delay
56 ldr \rd, [\rx, #0x08]
57#else
34 @ wait for TX_READY 58 @ wait for TX_READY
351001: ldr \rd, [\rx, #0x08] 591001: ldr \rd, [\rx, #0x08]
36 tst \rd, #0x04 60 tst \rd, #0x04
37 beq 1001b 61 beq 1001b
38 .endm
39#else
40 .macro addruart, rp, rv, tmp
41 mov \rv, #0xff000000
42 orr \rv, \rv, #0x00f00000
43 .endm
44
45 .macro senduart,rd,rx
46 .endm
47
48 .macro waituart,rd,rx
49 .endm
50#endif 62#endif
63 .endm
51 64
52 .macro busyuart,rd,rx 65 .macro busyuart, rd, rx
53 .endm 66 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca73..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Low-level IRQ helper macros
3 *
4 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b36..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <mach/msm_iomap.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 @ enable imprecise aborts
23 cpsie a
24 mov \base, #MSM_VIC_BASE
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 @ 0xD0 has irq# or old irq# if the irq has been handled
32 @ 0xD4 has irq# or -1 if none pending *but* if you just
33 @ read 0xD4 you never get the first irq for some reason
34 ldr \irqnr, [\base, #0xD0]
35 ldr \irqnr, [\base, #0xD4]
36 cmp \irqnr, #0xffffffff
37 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f..41f7003ef34f 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
16 * 16 *
17 */ 17 */
18 18
19#if defined(CONFIG_ARM_GIC) 19 .macro disable_fiq
20#include <mach/entry-macro-qgic.S> 20 .endm
21#else 21
22#include <mach/entry-macro-vic.S> 22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25#if !defined(CONFIG_ARM_GIC)
26#include <mach/msm_iomap.h>
27
28 .macro get_irqnr_preamble, base, tmp
29 @ enable imprecise aborts
30 cpsie a
31 mov \base, #MSM_VIC_BASE
32 .endm
33
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
35 @ 0xD0 has irq# or old irq# if the irq has been handled
36 @ 0xD4 has irq# or -1 if none pending *but* if you just
37 @ read 0xD4 you never get the first irq for some reason
38 ldr \irqnr, [\base, #0xD0]
39 ldr \irqnr, [\base, #0xD4]
40 cmp \irqnr, #0xffffffff
41 .endm
23#endif 42#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 94fe9fe6feb3..8af46123dab6 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -78,18 +78,6 @@
78#define MSM_UART3_PHYS 0xA9C00000 78#define MSM_UART3_PHYS 0xA9C00000
79#define MSM_UART3_SIZE SZ_4K 79#define MSM_UART3_SIZE SZ_4K
80 80
81#ifdef CONFIG_MSM_DEBUG_UART
82#define MSM_DEBUG_UART_BASE 0xE1000000
83#if CONFIG_MSM_DEBUG_UART == 1
84#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
85#elif CONFIG_MSM_DEBUG_UART == 2
86#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
87#elif CONFIG_MSM_DEBUG_UART == 3
88#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
89#endif
90#define MSM_DEBUG_UART_SIZE SZ_4K
91#endif
92
93#define MSM_SDC1_PHYS 0xA0400000 81#define MSM_SDC1_PHYS 0xA0400000
94#define MSM_SDC1_SIZE SZ_4K 82#define MSM_SDC1_SIZE SZ_4K
95 83
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 37694442d1bd..198202c267c8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -89,18 +89,6 @@
89#define MSM_UART3_PHYS 0xACC00000 89#define MSM_UART3_PHYS 0xACC00000
90#define MSM_UART3_SIZE SZ_4K 90#define MSM_UART3_SIZE SZ_4K
91 91
92#ifdef CONFIG_MSM_DEBUG_UART
93#define MSM_DEBUG_UART_BASE 0xE1000000
94#if CONFIG_MSM_DEBUG_UART == 1
95#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
96#elif CONFIG_MSM_DEBUG_UART == 2
97#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
98#elif CONFIG_MSM_DEBUG_UART == 3
99#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
100#endif
101#define MSM_DEBUG_UART_SIZE SZ_4K
102#endif
103
104#define MSM_MDC_BASE IOMEM(0xE0200000) 92#define MSM_MDC_BASE IOMEM(0xE0200000)
105#define MSM_MDC_PHYS 0xAA500000 93#define MSM_MDC_PHYS 0xAA500000
106#define MSM_MDC_SIZE SZ_1M 94#define MSM_MDC_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 3c9d9602a318..800b55767e6b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -45,4 +45,9 @@
45#define MSM8960_TMR0_PHYS 0x0208A000 45#define MSM8960_TMR0_PHYS 0x0208A000
46#define MSM8960_TMR0_SIZE SZ_4K 46#define MSM8960_TMR0_SIZE SZ_4K
47 47
48#ifdef CONFIG_DEBUG_MSM8960_UART
49#define MSM_DEBUG_UART_BASE 0xE1040000
50#define MSM_DEBUG_UART_PHYS 0x16440000
51#endif
52
48#endif 53#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index d67cd73316f4..0faa894729b7 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -83,18 +83,6 @@
83#define MSM_UART3_PHYS 0xA9C00000 83#define MSM_UART3_PHYS 0xA9C00000
84#define MSM_UART3_SIZE SZ_4K 84#define MSM_UART3_SIZE SZ_4K
85 85
86#ifdef CONFIG_MSM_DEBUG_UART
87#define MSM_DEBUG_UART_BASE 0xE1000000
88#if CONFIG_MSM_DEBUG_UART == 1
89#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
90#elif CONFIG_MSM_DEBUG_UART == 2
91#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
92#elif CONFIG_MSM_DEBUG_UART == 3
93#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
94#endif
95#define MSM_DEBUG_UART_SIZE SZ_4K
96#endif
97
98#define MSM_MDC_BASE IOMEM(0xE0200000) 86#define MSM_MDC_BASE IOMEM(0xE0200000)
99#define MSM_MDC_PHYS 0xAA500000 87#define MSM_MDC_PHYS 0xAA500000
100#define MSM_MDC_SIZE SZ_1M 88#define MSM_MDC_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 3b19b8f244b8..54e12caa8d86 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -62,4 +62,9 @@
62#define MSM8X60_TMR0_PHYS 0x02040000 62#define MSM8X60_TMR0_PHYS 0x02040000
63#define MSM8X60_TMR0_SIZE SZ_4K 63#define MSM8X60_TMR0_SIZE SZ_4K
64 64
65#ifdef CONFIG_DEBUG_MSM8660_UART
66#define MSM_DEBUG_UART_BASE 0xE1040000
67#define MSM_DEBUG_UART_PHYS 0x19C40000
68#endif
69
65#endif 70#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 4ded15238b60..90682f4599d3 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -55,6 +55,18 @@
55 55
56#include "msm_iomap-8960.h" 56#include "msm_iomap-8960.h"
57 57
58#define MSM_DEBUG_UART_SIZE SZ_4K
59#if defined(CONFIG_DEBUG_MSM_UART1)
60#define MSM_DEBUG_UART_BASE 0xE1000000
61#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
62#elif defined(CONFIG_DEBUG_MSM_UART2)
63#define MSM_DEBUG_UART_BASE 0xE1000000
64#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
65#elif defined(CONFIG_DEBUG_MSM_UART3)
66#define MSM_DEBUG_UART_BASE 0xE1000000
67#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
68#endif
69
58/* Virtual addresses shared across all MSM targets. */ 70/* Virtual addresses shared across all MSM targets. */
59#define MSM_CSR_BASE IOMEM(0xE0001000) 71#define MSM_CSR_BASE IOMEM(0xE0001000)
60#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) 72#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index d2e83f42ba16..311db2b35da0 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,16 +12,8 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15
16#include <mach/hardware.h>
17
18void arch_idle(void); 15void arch_idle(void);
19 16
20static inline void arch_reset(char mode, const char *cmd)
21{
22 for (;;) ; /* depends on IPC w/ other core */
23}
24
25/* low level hardware reset hook -- for example, hitting the 17/* low level hardware reset hook -- for example, hitting the
26 * PSHOLD line on the PMIC to hard reset the system 18 * PSHOLD line on the PMIC to hard reset the system
27 */ 19 */
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index d94292c29d8e..169a84007456 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -1,6 +1,6 @@
1/* arch/arm/mach-msm/include/mach/uncompress.h 1/*
2 *
3 * Copyright (C) 2007 Google, Inc. 2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * 4 *
5 * This software is licensed under the terms of the GNU General Public 5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and 6 * License version 2, as published by the Free Software Foundation, and
@@ -14,17 +14,40 @@
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H 16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18
19#include <asm/processor.h>
20#include <mach/msm_iomap.h>
21
22#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
23#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
17 24
18#include "hardware.h" 25#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
19#include "linux/io.h" 26#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
20#include "mach/msm_iomap.h" 27#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
28#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
29#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
21 30
22static void putc(int c) 31static void putc(int c)
23{ 32{
24#if defined(MSM_DEBUG_UART_PHYS) 33#if defined(MSM_DEBUG_UART_PHYS)
25 unsigned base = MSM_DEBUG_UART_PHYS; 34#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
26 while (!(readl(base + 0x08) & 0x04)) ; 35 /*
27 writel(c, base + 0x0c); 36 * Wait for TX_READY to be set; but skip it if we have a
37 * TX underrun.
38 */
39 if (UART_DM_SR & 0x08)
40 while (!(UART_DM_ISR & 0x80))
41 cpu_relax();
42
43 UART_DM_CR = 0x300;
44 UART_DM_NCHAR = 0x1;
45 UART_DM_TF = c;
46#else
47 while (!(UART_CSR & 0x04))
48 cpu_relax();
49 UART_TF = c;
50#endif
28#endif 51#endif
29} 52}
30 53
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
deleted file mode 100644
index d138448eff16..000000000000
--- a/arch/arm/mach-msm/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* arch/arm/mach-msm/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_VMALLOC_H
17#define __ASM_ARCH_MSM_VMALLOC_H
18
19#define VMALLOC_END 0xd0000000UL
20
21#endif
22
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 8759ecf7454f..578b04e42deb 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = {
47 MSM_CHIP_DEVICE(GPIO1, MSM7X00), 47 MSM_CHIP_DEVICE(GPIO1, MSM7X00),
48 MSM_CHIP_DEVICE(GPIO2, MSM7X00), 48 MSM_CHIP_DEVICE(GPIO2, MSM7X00),
49 MSM_DEVICE(CLK_CTL), 49 MSM_DEVICE(CLK_CTL),
50#ifdef CONFIG_MSM_DEBUG_UART 50#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
51 defined(CONFIG_DEBUG_MSM_UART3)
51 MSM_DEVICE(DEBUG_UART), 52 MSM_DEVICE(DEBUG_UART),
52#endif 53#endif
53#ifdef CONFIG_ARCH_MSM7X30 54#ifdef CONFIG_ARCH_MSM7X30
@@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
84 MSM_DEVICE(SCPLL), 85 MSM_DEVICE(SCPLL),
85 MSM_DEVICE(AD5), 86 MSM_DEVICE(AD5),
86 MSM_DEVICE(MDC), 87 MSM_DEVICE(MDC),
87#ifdef CONFIG_MSM_DEBUG_UART 88#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
89 defined(CONFIG_DEBUG_MSM_UART3)
88 MSM_DEVICE(DEBUG_UART), 90 MSM_DEVICE(DEBUG_UART),
89#endif 91#endif
90 { 92 {
@@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = {
109 MSM_CHIP_DEVICE(TMR0, MSM8X60), 111 MSM_CHIP_DEVICE(TMR0, MSM8X60),
110 MSM_DEVICE(ACC), 112 MSM_DEVICE(ACC),
111 MSM_DEVICE(GCC), 113 MSM_DEVICE(GCC),
114#ifdef CONFIG_DEBUG_MSM8660_UART
115 MSM_DEVICE(DEBUG_UART),
116#endif
112}; 117};
113 118
114void __init msm_map_msm8x60_io(void) 119void __init msm_map_msm8x60_io(void)
@@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = {
123 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), 128 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
124 MSM_CHIP_DEVICE(TMR, MSM8960), 129 MSM_CHIP_DEVICE(TMR, MSM8960),
125 MSM_CHIP_DEVICE(TMR0, MSM8960), 130 MSM_CHIP_DEVICE(TMR0, MSM8960),
131#ifdef CONFIG_DEBUG_MSM8960_UART
132 MSM_DEVICE(DEBUG_UART),
133#endif
126}; 134};
127 135
128void __init msm_map_msm8960_io(void) 136void __init msm_map_msm8960_io(void)
@@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
146 MSM_DEVICE(SAW), 154 MSM_DEVICE(SAW),
147 MSM_DEVICE(GCC), 155 MSM_DEVICE(GCC),
148 MSM_DEVICE(TCSR), 156 MSM_DEVICE(TCSR),
149#ifdef CONFIG_MSM_DEBUG_UART 157#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
158 defined(CONFIG_DEBUG_MSM_UART3)
150 MSM_DEVICE(DEBUG_UART), 159 MSM_DEVICE(DEBUG_UART),
151#endif 160#endif
152 { 161 {
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index fdec58aaa35c..0b3e357c4c8c 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
79 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), 79 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
80 SCM_FLAG_COLDBOOT_CPU1); 80 SCM_FLAG_COLDBOOT_CPU1);
81 if (ret == 0) { 81 if (ret == 0) {
82 void *sc1_base_ptr; 82 void __iomem *sc1_base_ptr;
83 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); 83 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2);
84 if (sc1_base_ptr) { 84 if (sc1_base_ptr) {
85 writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); 85 writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL);
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 0e94268d6e6f..ee74ec97c141 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
151 .init_early = mv78xx0_init_early, 151 .init_early = mv78xx0_init_early,
152 .init_irq = mv78xx0_init_irq, 152 .init_irq = mv78xx0_init_irq,
153 .timer = &mv78xx0_timer, 153 .timer = &mv78xx0_timer,
154 .restart = mv78xx0_restart,
154MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980ef59d..5b9632b01169 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -401,3 +401,19 @@ void __init mv78xx0_init(void)
401 feroceon_l2_init(is_l2_writethrough()); 401 feroceon_l2_init(is_l2_writethrough());
402#endif 402#endif
403} 403}
404
405void mv78xx0_restart(char mode, const char *cmd)
406{
407 /*
408 * Enable soft reset to assert RSTOUTn.
409 */
410 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
411
412 /*
413 * Assert soft reset.
414 */
415 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
416
417 while (1)
418 ;
419}
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d65e7a..07d5f8f6be7d 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void);
46void mv78xx0_uart2_init(void); 46void mv78xx0_uart2_init(void);
47void mv78xx0_uart3_init(void); 47void mv78xx0_uart3_init(void);
48void mv78xx0_i2c_init(void); 48void mv78xx0_i2c_init(void);
49void mv78xx0_restart(char, const char *);
49 50
50extern struct sys_timer mv78xx0_timer; 51extern struct sys_timer mv78xx0_timer;
51 52
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 50b85ae2da52..4d6d48bf51ef 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
99 .init_early = mv78xx0_init_early, 99 .init_early = mv78xx0_init_early,
100 .init_irq = mv78xx0_init_irq, 100 .init_irq = mv78xx0_init_irq,
101 .timer = &mv78xx0_timer, 101 .timer = &mv78xx0_timer,
102 .restart = mv78xx0_restart,
102MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 66e7ce4e90bd..8c3a5387cec7 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
deleted file mode 100644
index ba26fe98e640..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-mv78xx0/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index e85222e53578..9a882706e138 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
84 .init_early = mv78xx0_init_early, 84 .init_early = mv78xx0_init_early,
85 .init_irq = mv78xx0_init_irq, 85 .init_irq = mv78xx0_init_irq,
86 .timer = &mv78xx0_timer, 86 .timer = &mv78xx0_timer,
87 .restart = mv78xx0_restart,
87MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 1fc110348040..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
297 .handle_irq = imx51_handle_irq, 297 .handle_irq = imx51_handle_irq,
298 .timer = &mxc_timer, 298 .timer = &mxc_timer,
299 .init_machine = eukrea_cpuimx51_init, 299 .init_machine = eukrea_cpuimx51_init,
300 .restart = mxc_restart,
300MACHINE_END 301MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 52a11c1898e6..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
335 .handle_irq = imx51_handle_irq, 335 .handle_irq = imx51_handle_irq,
336 .timer = &mxc_timer, 336 .timer = &mxc_timer,
337 .init_machine = eukrea_cpuimx51sd_init, 337 .init_machine = eukrea_cpuimx51sd_init,
338 .restart = mxc_restart,
338MACHINE_END 339MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index fc3621d90bde..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
222 .handle_irq = imx50_handle_irq, 222 .handle_irq = imx50_handle_irq,
223 .timer = &mx50_rdp_timer, 223 .timer = &mx50_rdp_timer,
224 .init_machine = mx50_rdp_board_init, 224 .init_machine = mx50_rdp_board_init,
225 .restart = mxc_restart,
225MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 05783906db2b..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
175 .handle_irq = imx51_handle_irq, 175 .handle_irq = imx51_handle_irq,
176 .timer = &mx51_3ds_timer, 176 .timer = &mx51_3ds_timer,
177 .init_machine = mx51_3ds_init, 177 .init_machine = mx51_3ds_init,
178 .restart = mxc_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 24994bb52147..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
426 .handle_irq = imx51_handle_irq, 426 .handle_irq = imx51_handle_irq,
427 .timer = &mx51_babbage_timer, 427 .timer = &mx51_babbage_timer,
428 .init_machine = mx51_babbage_init, 428 .init_machine = mx51_babbage_init,
429 .restart = mxc_restart,
429MACHINE_END 430MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index a9e48662cf75..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon
182 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), 182 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
183}; 183};
184 184
185void mx51_efikamx_reset(void) 185static void mx51_efikamx_restart(char mode, const char *cmd)
186{ 186{
187 if (system_rev == 0x11) 187 if (system_rev == 0x11)
188 gpio_direction_output(EFIKAMX_RESET1_1, 0); 188 gpio_direction_output(EFIKAMX_RESET1_1, 0);
@@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
292 .handle_irq = imx51_handle_irq, 292 .handle_irq = imx51_handle_irq,
293 .timer = &mx51_efikamx_timer, 293 .timer = &mx51_efikamx_timer,
294 .init_machine = mx51_efikamx_init, 294 .init_machine = mx51_efikamx_init,
295 .restart = mx51_efikamx_restart,
295MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 38c4a3e28d3c..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
287 .handle_irq = imx51_handle_irq, 287 .handle_irq = imx51_handle_irq,
288 .init_machine = efikasb_board_init, 288 .init_machine = efikasb_board_init,
289 .timer = &mx51_efikasb_timer, 289 .timer = &mx51_efikasb_timer,
290 .restart = mxc_restart,
290MACHINE_END 291MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 0d7f0fffb23a..5f224f1c3eb6 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
257 .handle_irq = imx53_handle_irq, 257 .handle_irq = imx53_handle_irq,
258 .timer = &mx53_ard_timer, 258 .timer = &mx53_ard_timer,
259 .init_machine = mx53_ard_board_init, 259 .init_machine = mx53_ard_board_init,
260 .restart = mxc_restart,
260MACHINE_END 261MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 64bbfcea6f35..d6ce137896d6 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
175 .handle_irq = imx53_handle_irq, 175 .handle_irq = imx53_handle_irq,
176 .timer = &mx53_evk_timer, 176 .timer = &mx53_evk_timer,
177 .init_machine = mx53_evk_board_init, 177 .init_machine = mx53_evk_board_init,
178 .restart = mxc_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 237bdecd9331..fd8b524e1c58 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
317 .handle_irq = imx53_handle_irq, 317 .handle_irq = imx53_handle_irq,
318 .timer = &mx53_loco_timer, 318 .timer = &mx53_loco_timer,
319 .init_machine = mx53_loco_board_init, 319 .init_machine = mx53_loco_board_init,
320 .restart = mxc_restart,
320MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index d42132a80e8f..22c53c9b18aa 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
164 .handle_irq = imx53_handle_irq, 164 .handle_irq = imx53_handle_irq,
165 .timer = &mx53_smd_timer, 165 .timer = &mx53_smd_timer,
166 .init_machine = mx53_smd_board_init, 166 .init_machine = mx53_smd_board_init,
167 .restart = mxc_restart,
167MACHINE_END 168MACHINE_END
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index 596edd967dbf..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -115,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
115 .timer = &imx51_timer, 115 .timer = &imx51_timer,
116 .init_machine = imx51_dt_init, 116 .init_machine = imx51_dt_init,
117 .dt_compat = imx51_dt_board_compat, 117 .dt_compat = imx51_dt_board_compat,
118 .restart = mxc_restart,
118MACHINE_END 119MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index 85bfd5ff21b0..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -125,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
125 .timer = &imx53_timer, 125 .timer = &imx53_timer,
126 .init_machine = imx53_dt_init, 126 .init_machine = imx53_dt_init,
127 .dt_compat = imx53_dt_board_compat, 127 .dt_compat = imx53_dt_board_compat,
128 .restart = mxc_restart,
128MACHINE_END 129MACHINE_END
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 3bbb94f4bbe1..e1237ab25862 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -16,6 +16,7 @@ struct clk;
16extern const u32 *mxs_get_ocotp(void); 16extern const u32 *mxs_get_ocotp(void);
17extern int mxs_reset_block(void __iomem *); 17extern int mxs_reset_block(void __iomem *);
18extern void mxs_timer_init(struct clk *, int); 18extern void mxs_timer_init(struct clk *, int);
19extern void mxs_restart(char, const char *);
19extern int mxs_saif_clkmux_select(unsigned int clkmux); 20extern int mxs_saif_clkmux_select(unsigned int clkmux);
20 21
21extern int mx23_register_gpios(void); 22extern int mx23_register_gpios(void);
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
index 0e428239b433..e7ad1bb29423 100644
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ b/arch/arm/mach-mxs/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
22 cpu_do_idle(); 22 cpu_do_idle();
23} 23}
24 24
25void arch_reset(char mode, const char *cmd);
26
27#endif /* __MACH_MXS_SYSTEM_H__ */ 25#endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/vmalloc.h b/arch/arm/mach-mxs/include/mach/vmalloc.h
deleted file mode 100644
index 103b0165ed0b..000000000000
--- a/arch/arm/mach-mxs/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2000 Russell King.
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __MACH_MXS_VMALLOC_H__
17#define __MACH_MXS_VMALLOC_H__
18
19/* vmalloc ending address */
20#define VMALLOC_END 0xf4000000UL
21
22#endif /* __MACH_MXS_VMALLOC_H__ */
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 6b00577b7025..2f2758230edf 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -363,4 +363,5 @@ MACHINE_START(M28EVK, "DENX M28 EVK")
363 .init_irq = mx28_init_irq, 363 .init_irq = mx28_init_irq,
364 .timer = &m28evk_timer, 364 .timer = &m28evk_timer,
365 .init_machine = m28evk_init, 365 .init_machine = m28evk_init,
366 .restart = mxs_restart,
366MACHINE_END 367MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index c325fbe4e4c6..5ea1c57d2606 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK")
184 .init_irq = mx23_init_irq, 184 .init_irq = mx23_init_irq,
185 .timer = &mx23evk_timer, 185 .timer = &mx23evk_timer,
186 .init_machine = mx23evk_init, 186 .init_machine = mx23evk_init,
187 .restart = mxs_restart,
187MACHINE_END 188MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index ac84a10baa14..eb0597be4e23 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -515,4 +515,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK")
515 .init_irq = mx28_init_irq, 515 .init_irq = mx28_init_irq,
516 .timer = &mx28evk_timer, 516 .timer = &mx28evk_timer,
517 .init_machine = mx28evk_init, 517 .init_machine = mx28evk_init,
518 .restart = mxs_restart,
518MACHINE_END 519MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 6834dea38c04..a626c07b8713 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -117,4 +117,5 @@ MACHINE_START(STMP378X, "STMP378X")
117 .init_irq = mx23_init_irq, 117 .init_irq = mx23_init_irq,
118 .timer = &stmp378x_dvb_timer, 118 .timer = &stmp378x_dvb_timer,
119 .init_machine = stmp378x_dvb_init, 119 .init_machine = stmp378x_dvb_init,
120 .restart = mxs_restart,
120MACHINE_END 121MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index 9a1f0e7a338e..2c0862e655ee 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module")
178 .init_irq = mx28_init_irq, 178 .init_irq = mx28_init_irq,
179 .timer = &tx28_timer, 179 .timer = &tx28_timer,
180 .init_machine = tx28_stk5v3_init, 180 .init_machine = tx28_stk5v3_init,
181 .restart = mxs_restart,
181MACHINE_END 182MACHINE_END
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index 20ec3bddf7cd..b936633b7682 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr;
42/* 42/*
43 * Reset the system. It is called by machine_restart(). 43 * Reset the system. It is called by machine_restart().
44 */ 44 */
45void arch_reset(char mode, const char *cmd) 45void mxs_restart(char mode, const char *cmd)
46{ 46{
47 /* reset the chip */ 47 /* reset the chip */
48 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); 48 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr);
@@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
53 mdelay(50); 53 mdelay(50);
54 54
55 /* We'll take a jump through zero as a poor second */ 55 /* We'll take a jump through zero as a poor second */
56 cpu_reset(0); 56 soft_restart(0);
57} 57}
58 58
59static int __init mxs_arch_reset_init(void) 59static int __init mxs_arch_reset_init(void)
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 00023b5cf12b..59e67979f197 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -187,3 +187,8 @@ static int __init netx_init(void)
187 187
188subsys_initcall(netx_init); 188subsys_initcall(netx_init);
189 189
190void netx_restart(char mode, const char *cmd)
191{
192 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
193 NETX_SYSTEM_RES_CR);
194}
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index ede2d35341c3..9b915119b8d6 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -19,6 +19,7 @@
19 19
20extern void __init netx_map_io(void); 20extern void __init netx_map_io(void);
21extern void __init netx_init_irq(void); 21extern void __init netx_init_irq(void);
22extern void netx_restart(char, const char *);
22 23
23struct sys_timer; 24struct sys_timer;
24extern struct sys_timer netx_timer; 25extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9acbdf..6e9f1cbe1634 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include <mach/hardware.h>
22 21
23 .macro disable_fiq 22 .macro disable_fiq
24 .endm 23 .endm
25 24
26 .macro get_irqnr_preamble, base, tmp
27 ldr \base, =io_p2v(0x001ff000)
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 25 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 26 .endm
32
33 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
34 ldr \irqstat, [\base, #0]
35 clz \irqnr, \irqstat
36 rsb \irqnr, \irqnr, #31
37 cmp \irqstat, #0
38 .endm
39
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
index dc7b4bc003c5..b38fa36d58c4 100644
--- a/arch/arm/mach-netx/include/mach/system.h
+++ b/arch/arm/mach-netx/include/mach/system.h
@@ -19,20 +19,10 @@
19#ifndef __ASM_ARCH_SYSTEM_H 19#ifndef __ASM_ARCH_SYSTEM_H
20#define __ASM_ARCH_SYSTEM_H 20#define __ASM_ARCH_SYSTEM_H
21 21
22#include <linux/io.h>
23#include <mach/hardware.h>
24#include "netx-regs.h"
25
26static inline void arch_idle(void) 22static inline void arch_idle(void)
27{ 23{
28 cpu_do_idle(); 24 cpu_do_idle();
29} 25}
30 26
31static inline void arch_reset(char mode, const char *cmd)
32{
33 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
34 NETX_SYSTEM_RES_CR);
35}
36
37#endif 27#endif
38 28
diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h
deleted file mode 100644
index 871f1ef7bff5..000000000000
--- a/arch/arm/mach-netx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 90903dd44cbc..180ea899a48a 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -203,6 +204,8 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
203 .atag_offset = 0x100, 204 .atag_offset = 0x100,
204 .map_io = netx_map_io, 205 .map_io = netx_map_io,
205 .init_irq = netx_init_irq, 206 .init_irq = netx_init_irq,
207 .handle_irq = vic_handle_irq,
206 .timer = &netx_timer, 208 .timer = &netx_timer,
207 .init_machine = nxdb500_init, 209 .init_machine = nxdb500_init,
210 .restart = netx_restart,
208MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index c63384aba500..58009e29b20e 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -96,6 +97,8 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
96 .atag_offset = 0x100, 97 .atag_offset = 0x100,
97 .map_io = netx_map_io, 98 .map_io = netx_map_io,
98 .init_irq = netx_init_irq, 99 .init_irq = netx_init_irq,
100 .handle_irq = vic_handle_irq,
99 .timer = &netx_timer, 101 .timer = &netx_timer,
100 .init_machine = nxdkn_init, 102 .init_machine = nxdkn_init,
103 .restart = netx_restart,
101MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 8f548ec83ad2..122e99826ef6 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -180,6 +181,8 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
180 .atag_offset = 0x100, 181 .atag_offset = 0x100,
181 .map_io = netx_map_io, 182 .map_io = netx_map_io,
182 .init_irq = netx_init_irq, 183 .init_irq = netx_init_irq,
184 .handle_irq = vic_handle_irq,
183 .timer = &netx_timer, 185 .timer = &netx_timer,
184 .init_machine = nxeb500hmi_init, 186 .init_machine = nxeb500hmi_init,
187 .restart = netx_restart,
185MACHINE_END 188MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 0cbb74c96ef7..7c878bf00340 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
21#include <linux/mtd/onenand.h> 21#include <linux/mtd/onenand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/hardware/vic.h>
24#include <asm/sizes.h> 25#include <asm/sizes.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -34,6 +35,8 @@
34#include <mach/nand.h> 35#include <mach/nand.h>
35#include <mach/fsmc.h> 36#include <mach/fsmc.h>
36 37
38#include "cpu-8815.h"
39
37/* Initial value for SRC control register: all timers use MXTAL/8 source */ 40/* Initial value for SRC control register: all timers use MXTAL/8 source */
38#define SRC_CR_INIT_MASK 0x00007fff 41#define SRC_CR_INIT_MASK 0x00007fff
39#define SRC_CR_INIT_VAL 0x2aaa8000 42#define SRC_CR_INIT_VAL 0x2aaa8000
@@ -280,6 +283,8 @@ MACHINE_START(NOMADIK, "NHK8815")
280 .atag_offset = 0x100, 283 .atag_offset = 0x100,
281 .map_io = cpu8815_map_io, 284 .map_io = cpu8815_map_io,
282 .init_irq = cpu8815_init_irq, 285 .init_irq = cpu8815_init_irq,
286 .handle_irq = vic_handle_irq,
283 .timer = &nomadik_timer, 287 .timer = &nomadik_timer,
284 .init_machine = nhk8815_platform_init, 288 .init_machine = nhk8815_platform_init,
289 .restart = cpu8815_restart,
285MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index dc67717db6f0..65df7b4fdd3e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -21,6 +21,7 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/amba/bus.h> 22#include <linux/amba/bus.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h>
24 25
25#include <plat/gpio-nomadik.h> 26#include <plat/gpio-nomadik.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
@@ -32,6 +33,7 @@
32#include <asm/hardware/cache-l2x0.h> 33#include <asm/hardware/cache-l2x0.h>
33 34
34#include "clock.h" 35#include "clock.h"
36#include "cpu-8815.h"
35 37
36#define __MEM_4K_RESOURCE(x) \ 38#define __MEM_4K_RESOURCE(x) \
37 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} 39 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
@@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void)
164#endif 166#endif
165 return; 167 return;
166} 168}
169
170void cpu8815_restart(char mode, const char *cmd)
171{
172 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
173
174 /* FIXME: use egpio when implemented */
175
176 /* Write anything to Reset status register */
177 writel(1, src_rstsr);
178}
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h
new file mode 100644
index 000000000000..71c21e8a11dc
--- /dev/null
+++ b/arch/arm/mach-nomadik/cpu-8815.h
@@ -0,0 +1,4 @@
1extern void cpu8815_map_io(void);
2extern void cpu8815_platform_init(void);
3extern void cpu8815_init_irq(void);
4extern void cpu8815_restart(char, const char *);
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3bb420..98ea1c1fbbab 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#include <mach/hardware.h>
10#include <mach/irqs.h>
11
12 .macro disable_fiq 9 .macro disable_fiq
13 .endm 10 .endm
14 11
15 .macro get_irqnr_preamble, base, tmp
16 ldr \base, =IO_ADDRESS(NOMADIK_IC_BASE)
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 12 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 13 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23
24 /* This stanza gets the irq mask from one of two status registers */
25 mov \irqnr, #0
26 ldr \irqstat, [\base, #VIC_REG_IRQSR0] @ get masked status
27 cmp \irqstat, #0
28 bne 1001f
29 add \irqnr, \irqnr, #32
30 ldr \irqstat, [\base, #VIC_REG_IRQSR1] @ get masked status
31
321001: tst \irqstat, #15
33 bne 1002f
34 add \irqnr, \irqnr, #4
35 movs \irqstat, \irqstat, lsr #4
36 bne 1001b
371002: tst \irqstat, #1
38 bne 1003f
39 add \irqnr, \irqnr, #1
40 movs \irqstat, \irqstat, lsr #1
41 bne 1002b
421003: /* EQ will be set if no irqs pending */
43 .endm
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h
index b7897edf1f35..bcaeaf41c053 100644
--- a/arch/arm/mach-nomadik/include/mach/setup.h
+++ b/arch/arm/mach-nomadik/include/mach/setup.h
@@ -12,9 +12,6 @@
12 12
13#ifdef CONFIG_NOMADIK_8815 13#ifdef CONFIG_NOMADIK_8815
14 14
15extern void cpu8815_map_io(void);
16extern void cpu8815_platform_init(void);
17extern void cpu8815_init_irq(void);
18extern void nmdk_timer_init(void); 15extern void nmdk_timer_init(void);
19 16
20#endif /* NOMADIK_8815 */ 17#endif /* NOMADIK_8815 */
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
index 7119f688116e..25e198b8976c 100644
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ b/arch/arm/mach-nomadik/include/mach/system.h
@@ -20,9 +20,6 @@
20#ifndef __ASM_ARCH_SYSTEM_H 20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H 21#define __ASM_ARCH_SYSTEM_H
22 22
23#include <linux/io.h>
24#include <mach/hardware.h>
25
26static inline void arch_idle(void) 23static inline void arch_idle(void)
27{ 24{
28 /* 25 /*
@@ -32,14 +29,4 @@ static inline void arch_idle(void)
32 cpu_do_idle(); 29 cpu_do_idle();
33} 30}
34 31
35static inline void arch_reset(char mode, const char *cmd)
36{
37 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
38
39 /* FIXME: use egpio when implemented */
40
41 /* Write anything to Reset status register */
42 writel(1, src_rstsr);
43}
44
45#endif 32#endif
diff --git a/arch/arm/mach-nomadik/include/mach/vmalloc.h b/arch/arm/mach-nomadik/include/mach/vmalloc.h
deleted file mode 100644
index f83d574d9445..000000000000
--- a/arch/arm/mach-nomadik/include/mach/vmalloc.h
+++ /dev/null
@@ -1,2 +0,0 @@
1
2#define VMALLOC_END 0xe8000000UL
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index b0f15d234a12..88909cc0b254 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -35,7 +35,7 @@
35#include <plat/mux.h> 35#include <plat/mux.h>
36#include <plat/usb.h> 36#include <plat/usb.h>
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/common.h> 38#include "common.h"
39#include <mach/camera.h> 39#include <mach/camera.h>
40 40
41#include <mach/ams-delta-fiq.h> 41#include <mach/ams-delta-fiq.h>
@@ -386,6 +386,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
386 .init_irq = omap1_init_irq, 386 .init_irq = omap1_init_irq,
387 .init_machine = ams_delta_init, 387 .init_machine = ams_delta_init,
388 .timer = &omap1_timer, 388 .timer = &omap1_timer,
389 .restart = omap1_restart,
389MACHINE_END 390MACHINE_END
390 391
391EXPORT_SYMBOL(ams_delta_latch1_write); 392EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 23178275f96b..0b9464b41212 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -32,7 +32,7 @@
32#include <plat/flash.h> 32#include <plat/flash.h>
33#include <plat/fpga.h> 33#include <plat/fpga.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/common.h> 35#include "common.h"
36#include <plat/board.h> 36#include <plat/board.h>
37 37
38/* fsample is pretty close to p2-sample */ 38/* fsample is pretty close to p2-sample */
@@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
390 .init_irq = omap1_init_irq, 390 .init_irq = omap1_init_irq,
391 .init_machine = omap_fsample_init, 391 .init_machine = omap_fsample_init,
392 .timer = &omap1_timer, 392 .timer = &omap1_timer,
393 .restart = omap1_restart,
393MACHINE_END 394MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index dc5b75de531c..9a5fe581bc1c 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -25,7 +25,7 @@
25#include <plat/mux.h> 25#include <plat/mux.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/common.h> 28#include "common.h"
29 29
30/* assume no Mini-AB port */ 30/* assume no Mini-AB port */
31 31
@@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
89 .init_irq = omap1_init_irq, 89 .init_irq = omap1_init_irq,
90 .init_machine = omap_generic_init, 90 .init_machine = omap_generic_init,
91 .timer = &omap1_timer, 91 .timer = &omap1_timer,
92 .restart = omap1_restart,
92MACHINE_END 93MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index b334b1481678..00ad6b22d60a 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -43,7 +43,7 @@
43#include <plat/irda.h> 43#include <plat/irda.h>
44#include <plat/usb.h> 44#include <plat/usb.h>
45#include <plat/keypad.h> 45#include <plat/keypad.h>
46#include <plat/common.h> 46#include "common.h"
47#include <plat/flash.h> 47#include <plat/flash.h>
48 48
49#include "board-h2.h" 49#include "board-h2.h"
@@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
456 .init_irq = omap1_init_irq, 456 .init_irq = omap1_init_irq,
457 .init_machine = h2_init, 457 .init_machine = h2_init,
458 .timer = &omap1_timer, 458 .timer = &omap1_timer,
459 .restart = omap1_restart,
459MACHINE_END 460MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 74ebe72c9848..4a7f25149703 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -45,7 +45,7 @@
45#include <plat/usb.h> 45#include <plat/usb.h>
46#include <plat/keypad.h> 46#include <plat/keypad.h>
47#include <plat/dma.h> 47#include <plat/dma.h>
48#include <plat/common.h> 48#include "common.h"
49#include <plat/flash.h> 49#include <plat/flash.h>
50 50
51#include "board-h3.h" 51#include "board-h3.h"
@@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
444 .init_irq = omap1_init_irq, 444 .init_irq = omap1_init_irq,
445 .init_machine = h3_init, 445 .init_machine = h3_init,
446 .timer = &omap1_timer, 446 .timer = &omap1_timer,
447 .restart = omap1_restart,
447MACHINE_END 448MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 3e91baab1a89..731cc3db7ab3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -41,7 +41,7 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42 42
43#include <plat/omap7xx.h> 43#include <plat/omap7xx.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/board.h> 45#include <plat/board.h>
46#include <plat/keypad.h> 46#include <plat/keypad.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
@@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald")
610 .init_irq = omap1_init_irq, 610 .init_irq = omap1_init_irq,
611 .init_machine = htcherald_init, 611 .init_machine = htcherald_init,
612 .timer = &omap1_timer, 612 .timer = &omap1_timer,
613 .restart = omap1_restart,
613MACHINE_END 614MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 273153dba15b..309369ea6978 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -37,7 +37,7 @@
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <plat/usb.h> 38#include <plat/usb.h>
39#include <plat/keypad.h> 39#include <plat/keypad.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/mmc.h> 41#include <plat/mmc.h>
42 42
43/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 43/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
@@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
460 .init_irq = omap1_init_irq, 460 .init_irq = omap1_init_irq,
461 .init_machine = innovator_init, 461 .init_machine = innovator_init,
462 .timer = &omap1_timer, 462 .timer = &omap1_timer,
463 .restart = omap1_restart,
463MACHINE_END 464MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 6798b8488315..f9efc036ba96 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -30,7 +30,7 @@
30#include <plat/usb.h> 30#include <plat/usb.h>
31#include <plat/board.h> 31#include <plat/board.h>
32#include <plat/keypad.h> 32#include <plat/keypad.h>
33#include <plat/common.h> 33#include "common.h"
34#include <plat/hwa742.h> 34#include <plat/hwa742.h>
35#include <plat/lcd_mipid.h> 35#include <plat/lcd_mipid.h>
36#include <plat/mmc.h> 36#include <plat/mmc.h>
@@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
259 .init_irq = omap1_init_irq, 259 .init_irq = omap1_init_irq,
260 .init_machine = omap_nokia770_init, 260 .init_machine = omap_nokia770_init,
261 .timer = &omap1_timer, 261 .timer = &omap1_timer,
262 .restart = omap1_restart,
262MACHINE_END 263MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index c3859278d257..675de06557aa 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -51,7 +51,7 @@
51#include <plat/usb.h> 51#include <plat/usb.h>
52#include <plat/mux.h> 52#include <plat/mux.h>
53#include <plat/tc.h> 53#include <plat/tc.h>
54#include <plat/common.h> 54#include "common.h"
55 55
56/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ 56/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
57#define OMAP_OSK_ETHR_START 0x04800300 57#define OMAP_OSK_ETHR_START 0x04800300
@@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
578 .init_irq = omap1_init_irq, 578 .init_irq = omap1_init_irq,
579 .init_machine = osk_init, 579 .init_machine = osk_init,
580 .timer = &omap1_timer, 580 .timer = &omap1_timer,
581 .restart = omap1_restart,
581MACHINE_END 582MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index f9c44cb15b47..81fa27f88369 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -41,7 +41,7 @@
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/irda.h> 42#include <plat/irda.h>
43#include <plat/keypad.h> 43#include <plat/keypad.h>
44#include <plat/common.h> 44#include "common.h"
45 45
46#define PALMTE_USBDETECT_GPIO 0 46#define PALMTE_USBDETECT_GPIO 0
47#define PALMTE_USB_OR_DC_GPIO 1 47#define PALMTE_USB_OR_DC_GPIO 1
@@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
270 .init_irq = omap1_init_irq, 270 .init_irq = omap1_init_irq,
271 .init_machine = omap_palmte_init, 271 .init_machine = omap_palmte_init,
272 .timer = &omap1_timer, 272 .timer = &omap1_timer,
273 .restart = omap1_restart,
273MACHINE_END 274MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 11a98539f7bb..81cb82178388 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -39,7 +39,7 @@
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/irda.h> 40#include <plat/irda.h>
41#include <plat/keypad.h> 41#include <plat/keypad.h>
42#include <plat/common.h> 42#include "common.h"
43 43
44#include <linux/spi/spi.h> 44#include <linux/spi/spi.h>
45#include <linux/spi/ads7846.h> 45#include <linux/spi/ads7846.h>
@@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
317 .init_irq = omap1_init_irq, 317 .init_irq = omap1_init_irq,
318 .init_machine = omap_palmtt_init, 318 .init_machine = omap_palmtt_init,
319 .timer = &omap1_timer, 319 .timer = &omap1_timer,
320 .restart = omap1_restart,
320MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 42061573e380..e881945ce8ec 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -41,7 +41,7 @@
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/irda.h> 42#include <plat/irda.h>
43#include <plat/keypad.h> 43#include <plat/keypad.h>
44#include <plat/common.h> 44#include "common.h"
45 45
46#include <linux/spi/spi.h> 46#include <linux/spi/spi.h>
47#include <linux/spi/ads7846.h> 47#include <linux/spi/ads7846.h>
@@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
334 .init_irq = omap1_init_irq, 334 .init_irq = omap1_init_irq,
335 .init_machine = omap_palmz71_init, 335 .init_machine = omap_palmz71_init,
336 .timer = &omap1_timer, 336 .timer = &omap1_timer,
337 .restart = omap1_restart,
337MACHINE_END 338MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 203ae07550db..c000bed76276 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -32,7 +32,7 @@
32#include <plat/fpga.h> 32#include <plat/fpga.h>
33#include <plat/flash.h> 33#include <plat/flash.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/common.h> 35#include "common.h"
36#include <plat/board.h> 36#include <plat/board.h>
37 37
38static const unsigned int p2_keymap[] = { 38static const unsigned int p2_keymap[] = {
@@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
352 .init_irq = omap1_init_irq, 352 .init_irq = omap1_init_irq,
353 .init_machine = omap_perseus2_init, 353 .init_machine = omap_perseus2_init,
354 .timer = &omap1_timer, 354 .timer = &omap1_timer,
355 .restart = omap1_restart,
355MACHINE_END 356MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 092a4c046407..7bcd82ab0fd0 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -40,7 +40,7 @@
40#include <plat/usb.h> 40#include <plat/usb.h>
41#include <plat/tc.h> 41#include <plat/tc.h>
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <plat/keypad.h> 44#include <plat/keypad.h>
45#include <plat/board-sx1.h> 45#include <plat/board-sx1.h>
46 46
@@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
416 .init_irq = omap1_init_irq, 416 .init_irq = omap1_init_irq,
417 .init_machine = omap_sx1_init, 417 .init_machine = omap_sx1_init,
418 .timer = &omap1_timer, 418 .timer = &omap1_timer,
419 .restart = omap1_restart,
419MACHINE_END 420MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 61ed6cdab2bd..f83a502dc93c 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -28,13 +28,12 @@
28#include <linux/export.h> 28#include <linux/export.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/system.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35 34
36#include <plat/board-voiceblue.h> 35#include <plat/board-voiceblue.h>
37#include <plat/common.h> 36#include "common.h"
38#include <plat/flash.h> 37#include <plat/flash.h>
39#include <plat/mux.h> 38#include <plat/mux.h>
40#include <plat/tc.h> 39#include <plat/tc.h>
@@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void)
221 gpio_set_value(0, wdt_gpio_state); 220 gpio_set_value(0, wdt_gpio_state);
222} 221}
223 222
224static void voiceblue_reset(char mode, const char *cmd) 223static void voiceblue_restart(char mode, const char *cmd)
225{ 224{
226 /* 225 /*
227 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 226 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -285,8 +284,6 @@ static void __init voiceblue_init(void)
285 * (it is connected through invertor) */ 284 * (it is connected through invertor) */
286 omap_writeb(0x00, OMAP_LPG1_LCR); 285 omap_writeb(0x00, OMAP_LPG1_LCR);
287 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */ 286 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
288
289 arch_reset = voiceblue_reset;
290} 287}
291 288
292MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") 289MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
@@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
298 .init_irq = omap1_init_irq, 295 .init_irq = omap1_init_irq,
299 .init_machine = voiceblue_init, 296 .init_machine = voiceblue_init,
300 .timer = &omap1_timer, 297 .timer = &omap1_timer,
298 .restart = voiceblue_restart,
301MACHINE_END 299MACHINE_END
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
new file mode 100644
index 000000000000..a9a5146dd2d4
--- /dev/null
+++ b/arch/arm/mach-omap1/common.h
@@ -0,0 +1,62 @@
1/*
2 *
3 * Header for code common to all OMAP1 machines.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
27#define __ARCH_ARM_MACH_OMAP1_COMMON_H
28
29#include <plat/common.h>
30
31#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
32void omap7xx_map_io(void);
33#else
34static inline void omap7xx_map_io(void)
35{
36}
37#endif
38
39#ifdef CONFIG_ARCH_OMAP15XX
40void omap15xx_map_io(void);
41#else
42static inline void omap15xx_map_io(void)
43{
44}
45#endif
46
47#ifdef CONFIG_ARCH_OMAP16XX
48void omap16xx_map_io(void);
49#else
50static inline void omap16xx_map_io(void)
51{
52}
53#endif
54
55void omap1_init_early(void);
56void omap1_init_irq(void);
57void omap1_restart(char, const char *);
58
59extern struct sys_timer omap1_timer;
60extern bool omap_32k_timer_init(void);
61
62#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 475cb2f50d87..1d76a63c0983 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -22,7 +22,7 @@
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24 24
25#include <plat/common.h> 25#include "common.h"
26#include <plat/tc.h> 26#include <plat/tc.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/mux.h> 28#include <plat/mux.h>
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
deleted file mode 100644
index 22ec4a479577..000000000000
--- a/arch/arm/mach-omap1/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-omap1/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 7969cfda4454..8e55b6fb3478 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -121,7 +121,6 @@ void __init omap16xx_map_io(void)
121void omap1_init_early(void) 121void omap1_init_early(void)
122{ 122{
123 omap_check_revision(); 123 omap_check_revision();
124 omap_ioremap_init();
125 124
126 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 125 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
127 * on a Posted Write in the TIPB Bridge". 126 * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index ad951ee69205..91d199b64979 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -5,10 +5,9 @@
5#include <linux/io.h> 5#include <linux/io.h>
6 6
7#include <mach/hardware.h> 7#include <mach/hardware.h>
8#include <mach/system.h>
9#include <plat/prcm.h> 8#include <plat/prcm.h>
10 9
11void omap1_arch_reset(char mode, const char *cmd) 10void omap1_restart(char mode, const char *cmd)
12{ 11{
13 /* 12 /*
14 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 13 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd)
21 20
22 omap_writew(1, ARM_RSTCT1); 21 omap_writew(1, ARM_RSTCT1);
23} 22}
24
25void (*arch_reset)(char, const char *) = omap1_arch_reset;
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index a1837771e031..b8faffa44f9e 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -37,7 +37,6 @@
37#include <linux/init.h> 37#include <linux/init.h>
38#include <linux/delay.h> 38#include <linux/delay.h>
39#include <linux/interrupt.h> 39#include <linux/interrupt.h>
40#include <linux/sched.h>
41#include <linux/spinlock.h> 40#include <linux/spinlock.h>
42#include <linux/clk.h> 41#include <linux/clk.h>
43#include <linux/err.h> 42#include <linux/err.h>
@@ -54,7 +53,7 @@
54#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
55#include <asm/mach/time.h> 54#include <asm/mach/time.h>
56 55
57#include <plat/common.h> 56#include "common.h"
58 57
59#ifdef CONFIG_OMAP_MPU_TIMER 58#ifdef CONFIG_OMAP_MPU_TIMER
60 59
@@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
190 * --------------------------------------------------------------------------- 189 * ---------------------------------------------------------------------------
191 */ 190 */
192 191
193static DEFINE_CLOCK_DATA(cd); 192static u32 notrace omap_mpu_read_sched_clock(void)
194
195static inline unsigned long long notrace _omap_mpu_sched_clock(void)
196{
197 u32 cyc = ~omap_mpu_timer_read(1);
198 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
199}
200
201#ifndef CONFIG_OMAP_32K_TIMER
202unsigned long long notrace sched_clock(void)
203{
204 return _omap_mpu_sched_clock();
205}
206#else
207static unsigned long long notrace omap_mpu_sched_clock(void)
208{
209 return _omap_mpu_sched_clock();
210}
211#endif
212
213static void notrace mpu_update_sched_clock(void)
214{ 193{
215 u32 cyc = ~omap_mpu_timer_read(1); 194 return ~omap_mpu_timer_read(1);
216 update_sched_clock(&cd, cyc, (u32)~0);
217} 195}
218 196
219static void __init omap_init_clocksource(unsigned long rate) 197static void __init omap_init_clocksource(unsigned long rate)
@@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate)
223 "%s: can't register clocksource!\n"; 201 "%s: can't register clocksource!\n";
224 202
225 omap_mpu_timer_start(1, ~0, 1); 203 omap_mpu_timer_start(1, ~0, 1);
226 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate); 204 setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
227 205
228 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, 206 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
229 300, 32, clocksource_mmio_readl_down)) 207 300, 32, clocksource_mmio_readl_down))
@@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void)
254} 232}
255#endif /* CONFIG_OMAP_MPU_TIMER */ 233#endif /* CONFIG_OMAP_MPU_TIMER */
256 234
257#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
258static unsigned long long (*preferred_sched_clock)(void);
259
260unsigned long long notrace sched_clock(void)
261{
262 if (!preferred_sched_clock)
263 return 0;
264
265 return preferred_sched_clock();
266}
267
268static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
269{
270 if (use_32k_sched_clock)
271 preferred_sched_clock = omap_32k_sched_clock;
272 else
273 preferred_sched_clock = omap_mpu_sched_clock;
274}
275#else
276static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
277{
278}
279#endif
280
281static inline int omap_32k_timer_usable(void) 235static inline int omap_32k_timer_usable(void)
282{ 236{
283 int res = false; 237 int res = false;
@@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void)
299 */ 253 */
300static void __init omap1_timer_init(void) 254static void __init omap1_timer_init(void)
301{ 255{
302 if (omap_32k_timer_usable()) { 256 if (!omap_32k_timer_usable())
303 preferred_sched_clock_init(1);
304 } else {
305 omap_mpu_timer_init(); 257 omap_mpu_timer_init();
306 preferred_sched_clock_init(0);
307 }
308} 258}
309 259
310struct sys_timer omap1_timer = { 260struct sys_timer omap1_timer = {
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 96604a50c4fe..9a54ef4dcf5e 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,7 +52,7 @@
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 54#include <asm/mach/time.h>
55#include <plat/common.h> 55#include "common.h"
56#include <plat/dmtimer.h> 56#include <plat/dmtimer.h>
57 57
58/* 58/*
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e1293aa513d3..4f01533083cc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
25 depends on ARCH_OMAP2PLUS 25 depends on ARCH_OMAP2PLUS
26 default y 26 default y
27 select CPU_V6 27 select CPU_V6
28 select MULTI_IRQ_HANDLER
28 29
29config ARCH_OMAP3 30config ARCH_OMAP3
30 bool "TI OMAP3" 31 bool "TI OMAP3"
@@ -36,13 +37,16 @@ config ARCH_OMAP3
36 select ARCH_HAS_OPP 37 select ARCH_HAS_OPP
37 select PM_OPP if PM 38 select PM_OPP if PM
38 select ARM_CPU_SUSPEND if PM 39 select ARM_CPU_SUSPEND if PM
40 select MULTI_IRQ_HANDLER
39 41
40config ARCH_OMAP4 42config ARCH_OMAP4
41 bool "TI OMAP4" 43 bool "TI OMAP4"
42 default y 44 default y
43 depends on ARCH_OMAP2PLUS 45 depends on ARCH_OMAP2PLUS
46 select CACHE_L2X0
44 select CPU_V7 47 select CPU_V7
45 select ARM_GIC 48 select ARM_GIC
49 select HAVE_SMP
46 select LOCAL_TIMERS if SMP 50 select LOCAL_TIMERS if SMP
47 select PL310_ERRATA_588369 51 select PL310_ERRATA_588369
48 select PL310_ERRATA_727915 52 select PL310_ERRATA_727915
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d704f0ac328d..7370983f809f 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -34,7 +34,7 @@
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36#include <plat/board.h> 36#include <plat/board.h>
37#include <plat/common.h> 37#include "common.h"
38#include <plat/gpmc.h> 38#include <plat/gpmc.h>
39#include <plat/usb.h> 39#include <plat/usb.h>
40#include <plat/gpmc-smc91x.h> 40#include <plat/gpmc-smc91x.h>
@@ -301,6 +301,8 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
301 .map_io = omap243x_map_io, 301 .map_io = omap243x_map_io,
302 .init_early = omap2430_init_early, 302 .init_early = omap2430_init_early,
303 .init_irq = omap2_init_irq, 303 .init_irq = omap2_init_irq,
304 .handle_irq = omap2_intc_handle_irq,
304 .init_machine = omap_2430sdp_init, 305 .init_machine = omap_2430sdp_init,
305 .timer = &omap2_timer, 306 .timer = &omap2_timer,
307 .restart = omap_prcm_restart,
306MACHINE_END 308MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 77142c13fa13..9996334cb687 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -33,7 +33,7 @@
33#include <plat/mcspi.h> 33#include <plat/mcspi.h>
34#include <plat/board.h> 34#include <plat/board.h>
35#include <plat/usb.h> 35#include <plat/usb.h>
36#include <plat/common.h> 36#include "common.h"
37#include <plat/dma.h> 37#include <plat/dma.h>
38#include <plat/gpmc.h> 38#include <plat/gpmc.h>
39#include <video/omapdss.h> 39#include <video/omapdss.h>
@@ -728,6 +728,8 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
728 .map_io = omap3_map_io, 728 .map_io = omap3_map_io,
729 .init_early = omap3430_init_early, 729 .init_early = omap3430_init_early,
730 .init_irq = omap3_init_irq, 730 .init_irq = omap3_init_irq,
731 .handle_irq = omap3_intc_handle_irq,
731 .init_machine = omap_3430sdp_init, 732 .init_machine = omap_3430sdp_init,
732 .timer = &omap3_timer, 733 .timer = &omap3_timer,
734 .restart = omap_prcm_restart,
733MACHINE_END 735MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index f552305162fc..6ef350d1ae4f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -16,7 +16,7 @@
16#include <asm/mach-types.h> 16#include <asm/mach-types.h>
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20#include <plat/board.h> 20#include <plat/board.h>
21#include <plat/gpmc-smc91x.h> 21#include <plat/gpmc-smc91x.h>
22#include <plat/usb.h> 22#include <plat/usb.h>
@@ -215,6 +215,8 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
215 .map_io = omap3_map_io, 215 .map_io = omap3_map_io,
216 .init_early = omap3630_init_early, 216 .init_early = omap3630_init_early,
217 .init_irq = omap3_init_irq, 217 .init_irq = omap3_init_irq,
218 .handle_irq = omap3_intc_handle_irq,
218 .init_machine = omap_sdp_init, 219 .init_machine = omap_sdp_init,
219 .timer = &omap3_timer, 220 .timer = &omap3_timer,
221 .restart = omap_prcm_restart,
220MACHINE_END 222MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index ba23224963d0..594c8ab2790d 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,13 +27,13 @@
27#include <linux/leds_pwm.h> 27#include <linux/leds_pwm.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/omap4-common.h> 30#include <asm/hardware/gic.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34 34
35#include <plat/board.h> 35#include <plat/board.h>
36#include <plat/common.h> 36#include "common.h"
37#include <plat/usb.h> 37#include <plat/usb.h>
38#include <plat/mmc.h> 38#include <plat/mmc.h>
39#include <plat/omap4-keypad.h> 39#include <plat/omap4-keypad.h>
@@ -985,6 +985,8 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
985 .map_io = omap4_map_io, 985 .map_io = omap4_map_io,
986 .init_early = omap4430_init_early, 986 .init_early = omap4430_init_early,
987 .init_irq = gic_init_irq, 987 .init_irq = gic_init_irq,
988 .handle_irq = gic_handle_irq,
988 .init_machine = omap_4430sdp_init, 989 .init_machine = omap_4430sdp_init,
989 .timer = &omap4_timer, 990 .timer = &omap4_timer,
991 .restart = omap_prcm_restart,
990MACHINE_END 992MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7834536ab416..c3851e8de28b 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -27,7 +27,7 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include <plat/board.h> 29#include <plat/board.h>
30#include <plat/common.h> 30#include "common.h"
31#include <plat/usb.h> 31#include <plat/usb.h>
32 32
33#include "mux.h" 33#include "mux.h"
@@ -98,6 +98,8 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
98 .map_io = omap3_map_io, 98 .map_io = omap3_map_io,
99 .init_early = am35xx_init_early, 99 .init_early = am35xx_init_early,
100 .init_irq = omap3_init_irq, 100 .init_irq = omap3_init_irq,
101 .handle_irq = omap3_intc_handle_irq,
101 .init_machine = am3517_crane_init, 102 .init_machine = am3517_crane_init,
102 .timer = &omap3_timer, 103 .timer = &omap3_timer,
104 .restart = omap_prcm_restart,
103MACHINE_END 105MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f7df8d35ee90..4b1cfe32e6ba 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -33,7 +33,7 @@
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34 34
35#include <plat/board.h> 35#include <plat/board.h>
36#include <plat/common.h> 36#include "common.h"
37#include <plat/usb.h> 37#include <plat/usb.h>
38#include <video/omapdss.h> 38#include <video/omapdss.h>
39#include <video/omap-panel-generic-dpi.h> 39#include <video/omap-panel-generic-dpi.h>
@@ -513,6 +513,8 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
513 .map_io = omap3_map_io, 513 .map_io = omap3_map_io,
514 .init_early = am35xx_init_early, 514 .init_early = am35xx_init_early,
515 .init_irq = omap3_init_irq, 515 .init_irq = omap3_init_irq,
516 .handle_irq = omap3_intc_handle_irq,
516 .init_machine = am3517_evm_init, 517 .init_machine = am3517_evm_init,
517 .timer = &omap3_timer, 518 .timer = &omap3_timer,
519 .restart = omap_prcm_restart,
518MACHINE_END 520MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index de8134b7f580..ac773829941f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -37,7 +37,7 @@
37#include <plat/led.h> 37#include <plat/led.h>
38#include <plat/usb.h> 38#include <plat/usb.h>
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/gpmc.h> 41#include <plat/gpmc.h>
42 42
43#include <video/omapdss.h> 43#include <video/omapdss.h>
@@ -354,6 +354,8 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
354 .map_io = omap242x_map_io, 354 .map_io = omap242x_map_io,
355 .init_early = omap2420_init_early, 355 .init_early = omap2420_init_early,
356 .init_irq = omap2_init_irq, 356 .init_irq = omap2_init_irq,
357 .handle_irq = omap2_intc_handle_irq,
357 .init_machine = omap_apollon_init, 358 .init_machine = omap_apollon_init,
358 .timer = &omap2_timer, 359 .timer = &omap2_timer,
360 .restart = omap_prcm_restart,
359MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index bd1bcacb40f9..1545102d1f9b 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -37,7 +37,7 @@
37#include <asm/mach/map.h> 37#include <asm/mach/map.h>
38 38
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/nand.h> 41#include <plat/nand.h>
42#include <plat/gpmc.h> 42#include <plat/gpmc.h>
43#include <plat/usb.h> 43#include <plat/usb.h>
@@ -634,8 +634,10 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
634 .map_io = omap3_map_io, 634 .map_io = omap3_map_io,
635 .init_early = omap35xx_init_early, 635 .init_early = omap35xx_init_early,
636 .init_irq = omap3_init_irq, 636 .init_irq = omap3_init_irq,
637 .handle_irq = omap3_intc_handle_irq,
637 .init_machine = cm_t35_init, 638 .init_machine = cm_t35_init,
638 .timer = &omap3_timer, 639 .timer = &omap3_timer,
640 .restart = omap_prcm_restart,
639MACHINE_END 641MACHINE_END
640 642
641MACHINE_START(CM_T3730, "Compulab CM-T3730") 643MACHINE_START(CM_T3730, "Compulab CM-T3730")
@@ -644,6 +646,8 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
644 .map_io = omap3_map_io, 646 .map_io = omap3_map_io,
645 .init_early = omap3630_init_early, 647 .init_early = omap3630_init_early,
646 .init_irq = omap3_init_irq, 648 .init_irq = omap3_init_irq,
649 .handle_irq = omap3_intc_handle_irq,
647 .init_machine = cm_t3730_init, 650 .init_machine = cm_t3730_init,
648 .timer = &omap3_timer, 651 .timer = &omap3_timer,
652 .restart = omap_prcm_restart,
649MACHINE_END 653MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 3f4dc6626845..f36d694d2159 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -39,7 +39,7 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40 40
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/common.h> 42#include "common.h"
43#include <plat/usb.h> 43#include <plat/usb.h>
44#include <plat/nand.h> 44#include <plat/nand.h>
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
@@ -299,6 +299,8 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
299 .map_io = omap3_map_io, 299 .map_io = omap3_map_io,
300 .init_early = am35xx_init_early, 300 .init_early = am35xx_init_early,
301 .init_irq = omap3_init_irq, 301 .init_irq = omap3_init_irq,
302 .handle_irq = omap3_intc_handle_irq,
302 .init_machine = cm_t3517_init, 303 .init_machine = cm_t3517_init,
303 .timer = &omap3_timer, 304 .timer = &omap3_timer,
305 .restart = omap_prcm_restart,
304MACHINE_END 306MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 90154e411da0..e873063f4fda 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -41,7 +41,7 @@
41#include <asm/mach/flash.h> 41#include <asm/mach/flash.h>
42 42
43#include <plat/board.h> 43#include <plat/board.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
46#include <plat/nand.h> 46#include <plat/nand.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
@@ -660,6 +660,8 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
660 .map_io = omap3_map_io, 660 .map_io = omap3_map_io,
661 .init_early = omap35xx_init_early, 661 .init_early = omap35xx_init_early,
662 .init_irq = omap3_init_irq, 662 .init_irq = omap3_init_irq,
663 .handle_irq = omap3_intc_handle_irq,
663 .init_machine = devkit8000_init, 664 .init_machine = devkit8000_init,
664 .timer = &omap3_secure_timer, 665 .timer = &omap3_secure_timer,
666 .restart = omap_prcm_restart,
665MACHINE_END 667MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fb55fa3dad5a..f8c5b2cc7c9c 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -20,8 +20,7 @@
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21 21
22#include <plat/board.h> 22#include <plat/board.h>
23#include <plat/common.h> 23#include "common.h"
24#include <mach/omap4-common.h>
25#include "common-board-devices.h" 24#include "common-board-devices.h"
26 25
27/* 26/*
@@ -107,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
107 .init_machine = omap_generic_init, 106 .init_machine = omap_generic_init,
108 .timer = &omap2_timer, 107 .timer = &omap2_timer,
109 .dt_compat = omap242x_boards_compat, 108 .dt_compat = omap242x_boards_compat,
109 .restart = omap_prcm_restart,
110MACHINE_END 110MACHINE_END
111#endif 111#endif
112 112
@@ -122,9 +122,11 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
122 .map_io = omap243x_map_io, 122 .map_io = omap243x_map_io,
123 .init_early = omap2430_init_early, 123 .init_early = omap2430_init_early,
124 .init_irq = omap2_init_irq, 124 .init_irq = omap2_init_irq,
125 .handle_irq = omap2_intc_handle_irq,
125 .init_machine = omap_generic_init, 126 .init_machine = omap_generic_init,
126 .timer = &omap2_timer, 127 .timer = &omap2_timer,
127 .dt_compat = omap243x_boards_compat, 128 .dt_compat = omap243x_boards_compat,
129 .restart = omap_prcm_restart,
128MACHINE_END 130MACHINE_END
129#endif 131#endif
130 132
@@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
143 .init_machine = omap3_init, 145 .init_machine = omap3_init,
144 .timer = &omap3_timer, 146 .timer = &omap3_timer,
145 .dt_compat = omap3_boards_compat, 147 .dt_compat = omap3_boards_compat,
148 .restart = omap_prcm_restart,
146MACHINE_END 149MACHINE_END
147#endif 150#endif
148 151
@@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
161 .init_machine = omap4_init, 164 .init_machine = omap4_init,
162 .timer = &omap4_timer, 165 .timer = &omap4_timer,
163 .dt_compat = omap4_boards_compat, 166 .dt_compat = omap4_boards_compat,
167 .restart = omap_prcm_restart,
164MACHINE_END 168MACHINE_END
165#endif 169#endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8b351d92a1cc..54af800d143c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -34,7 +34,7 @@
34 34
35#include <plat/usb.h> 35#include <plat/usb.h>
36#include <plat/board.h> 36#include <plat/board.h>
37#include <plat/common.h> 37#include "common.h"
38#include <plat/menelaus.h> 38#include <plat/menelaus.h>
39#include <plat/dma.h> 39#include <plat/dma.h>
40#include <plat/gpmc.h> 40#include <plat/gpmc.h>
@@ -396,6 +396,8 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
396 .map_io = omap242x_map_io, 396 .map_io = omap242x_map_io,
397 .init_early = omap2420_init_early, 397 .init_early = omap2420_init_early,
398 .init_irq = omap2_init_irq, 398 .init_irq = omap2_init_irq,
399 .handle_irq = omap2_intc_handle_irq,
399 .init_machine = omap_h4_init, 400 .init_machine = omap_h4_init,
400 .timer = &omap2_timer, 401 .timer = &omap2_timer,
402 .restart = omap_prcm_restart,
401MACHINE_END 403MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d0a3f78a9b69..a59ace0ed560 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -28,7 +28,7 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29 29
30#include <plat/board.h> 30#include <plat/board.h>
31#include <plat/common.h> 31#include "common.h"
32#include <plat/gpmc.h> 32#include <plat/gpmc.h>
33#include <plat/usb.h> 33#include <plat/usb.h>
34#include <video/omapdss.h> 34#include <video/omapdss.h>
@@ -672,8 +672,10 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
672 .map_io = omap3_map_io, 672 .map_io = omap3_map_io,
673 .init_early = omap35xx_init_early, 673 .init_early = omap35xx_init_early,
674 .init_irq = omap3_init_irq, 674 .init_irq = omap3_init_irq,
675 .handle_irq = omap3_intc_handle_irq,
675 .init_machine = igep_init, 676 .init_machine = igep_init,
676 .timer = &omap3_timer, 677 .timer = &omap3_timer,
678 .restart = omap_prcm_restart,
677MACHINE_END 679MACHINE_END
678 680
679MACHINE_START(IGEP0030, "IGEP OMAP3 module") 681MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -682,6 +684,8 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
682 .map_io = omap3_map_io, 684 .map_io = omap3_map_io,
683 .init_early = omap35xx_init_early, 685 .init_early = omap35xx_init_early,
684 .init_irq = omap3_init_irq, 686 .init_irq = omap3_init_irq,
687 .handle_irq = omap3_intc_handle_irq,
685 .init_machine = igep_init, 688 .init_machine = igep_init,
686 .timer = &omap3_timer, 689 .timer = &omap3_timer,
690 .restart = omap_prcm_restart,
687MACHINE_END 691MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index e179da0c4da5..2d2a61f7dcbf 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -36,7 +36,7 @@
36 36
37#include <plat/mcspi.h> 37#include <plat/mcspi.h>
38#include <plat/board.h> 38#include <plat/board.h>
39#include <plat/common.h> 39#include "common.h"
40#include <plat/gpmc.h> 40#include <plat/gpmc.h>
41#include <mach/board-zoom.h> 41#include <mach/board-zoom.h>
42 42
@@ -434,6 +434,8 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
434 .map_io = omap3_map_io, 434 .map_io = omap3_map_io,
435 .init_early = omap3430_init_early, 435 .init_early = omap3430_init_early,
436 .init_irq = omap3_init_irq, 436 .init_irq = omap3_init_irq,
437 .handle_irq = omap3_intc_handle_irq,
437 .init_machine = omap_ldp_init, 438 .init_machine = omap_ldp_init,
438 .timer = &omap3_timer, 439 .timer = &omap3_timer,
440 .restart = omap_prcm_restart,
439MACHINE_END 441MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index e9d5f4a3d064..cef2cf1c0b8d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -26,7 +26,7 @@
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27 27
28#include <plat/board.h> 28#include <plat/board.h>
29#include <plat/common.h> 29#include "common.h"
30#include <plat/menelaus.h> 30#include <plat/menelaus.h>
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32#include <plat/mcspi.h> 32#include <plat/mcspi.h>
@@ -689,8 +689,10 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
689 .map_io = omap242x_map_io, 689 .map_io = omap242x_map_io,
690 .init_early = omap2420_init_early, 690 .init_early = omap2420_init_early,
691 .init_irq = omap2_init_irq, 691 .init_irq = omap2_init_irq,
692 .handle_irq = omap2_intc_handle_irq,
692 .init_machine = n8x0_init_machine, 693 .init_machine = n8x0_init_machine,
693 .timer = &omap2_timer, 694 .timer = &omap2_timer,
695 .restart = omap_prcm_restart,
694MACHINE_END 696MACHINE_END
695 697
696MACHINE_START(NOKIA_N810, "Nokia N810") 698MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -699,8 +701,10 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
699 .map_io = omap242x_map_io, 701 .map_io = omap242x_map_io,
700 .init_early = omap2420_init_early, 702 .init_early = omap2420_init_early,
701 .init_irq = omap2_init_irq, 703 .init_irq = omap2_init_irq,
704 .handle_irq = omap2_intc_handle_irq,
702 .init_machine = n8x0_init_machine, 705 .init_machine = n8x0_init_machine,
703 .timer = &omap2_timer, 706 .timer = &omap2_timer,
707 .restart = omap_prcm_restart,
704MACHINE_END 708MACHINE_END
705 709
706MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") 710MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -709,6 +713,8 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
709 .map_io = omap242x_map_io, 713 .map_io = omap242x_map_io,
710 .init_early = omap2420_init_early, 714 .init_early = omap2420_init_early,
711 .init_irq = omap2_init_irq, 715 .init_irq = omap2_init_irq,
716 .handle_irq = omap2_intc_handle_irq,
712 .init_machine = n8x0_init_machine, 717 .init_machine = n8x0_init_machine,
713 .timer = &omap2_timer, 718 .timer = &omap2_timer,
719 .restart = omap_prcm_restart,
714MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 4a71cb7e42d4..7ffcd2839e7b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -40,7 +40,7 @@
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41 41
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <video/omapdss.h> 44#include <video/omapdss.h>
45#include <video/omap-panel-dvi.h> 45#include <video/omap-panel-dvi.h>
46#include <plat/gpmc.h> 46#include <plat/gpmc.h>
@@ -559,6 +559,8 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
559 .map_io = omap3_map_io, 559 .map_io = omap3_map_io,
560 .init_early = omap3_init_early, 560 .init_early = omap3_init_early,
561 .init_irq = omap3_init_irq, 561 .init_irq = omap3_init_irq,
562 .handle_irq = omap3_intc_handle_irq,
562 .init_machine = omap3_beagle_init, 563 .init_machine = omap3_beagle_init,
563 .timer = &omap3_secure_timer, 564 .timer = &omap3_secure_timer,
565 .restart = omap_prcm_restart,
564MACHINE_END 566MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ec00b2ec7022..003fe34c9343 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,7 +43,7 @@
43 43
44#include <plat/board.h> 44#include <plat/board.h>
45#include <plat/usb.h> 45#include <plat/usb.h>
46#include <plat/common.h> 46#include "common.h"
47#include <plat/mcspi.h> 47#include <plat/mcspi.h>
48#include <video/omapdss.h> 48#include <video/omapdss.h>
49#include <video/omap-panel-dvi.h> 49#include <video/omap-panel-dvi.h>
@@ -681,6 +681,8 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
681 .map_io = omap3_map_io, 681 .map_io = omap3_map_io,
682 .init_early = omap35xx_init_early, 682 .init_early = omap35xx_init_early,
683 .init_irq = omap3_init_irq, 683 .init_irq = omap3_init_irq,
684 .handle_irq = omap3_intc_handle_irq,
684 .init_machine = omap3_evm_init, 685 .init_machine = omap3_evm_init,
685 .timer = &omap3_timer, 686 .timer = &omap3_timer,
687 .restart = omap_prcm_restart,
686MACHINE_END 688MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7c0f193f246d..4198dd017d8f 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -40,7 +40,7 @@
40 40
41#include <plat/mux.h> 41#include <plat/mux.h>
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <plat/gpmc-smsc911x.h> 44#include <plat/gpmc-smsc911x.h>
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
46#include <plat/sdrc.h> 46#include <plat/sdrc.h>
@@ -208,8 +208,10 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
208 .map_io = omap3_map_io, 208 .map_io = omap3_map_io,
209 .init_early = omap35xx_init_early, 209 .init_early = omap35xx_init_early,
210 .init_irq = omap3_init_irq, 210 .init_irq = omap3_init_irq,
211 .handle_irq = omap3_intc_handle_irq,
211 .init_machine = omap3logic_init, 212 .init_machine = omap3logic_init,
212 .timer = &omap3_timer, 213 .timer = &omap3_timer,
214 .restart = omap_prcm_restart,
213MACHINE_END 215MACHINE_END
214 216
215MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 217MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -217,6 +219,8 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
217 .map_io = omap3_map_io, 219 .map_io = omap3_map_io,
218 .init_early = omap35xx_init_early, 220 .init_early = omap35xx_init_early,
219 .init_irq = omap3_init_irq, 221 .init_irq = omap3_init_irq,
222 .handle_irq = omap3_intc_handle_irq,
220 .init_machine = omap3logic_init, 223 .init_machine = omap3logic_init,
221 .timer = &omap3_timer, 224 .timer = &omap3_timer,
225 .restart = omap_prcm_restart,
222MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index f7811f4cfc3d..1644b73017fc 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -41,7 +41,7 @@
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42 42
43#include <plat/board.h> 43#include <plat/board.h>
44#include <plat/common.h> 44#include "common.h"
45#include <mach/hardware.h> 45#include <mach/hardware.h>
46#include <plat/mcspi.h> 46#include <plat/mcspi.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
@@ -606,6 +606,8 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
606 .map_io = omap3_map_io, 606 .map_io = omap3_map_io,
607 .init_early = omap35xx_init_early, 607 .init_early = omap35xx_init_early,
608 .init_irq = omap3_init_irq, 608 .init_irq = omap3_init_irq,
609 .handle_irq = omap3_intc_handle_irq,
609 .init_machine = omap3pandora_init, 610 .init_machine = omap3pandora_init,
610 .timer = &omap3_timer, 611 .timer = &omap3_timer,
612 .restart = omap_prcm_restart,
611MACHINE_END 613MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index ddb7d6663c6d..cb089a46f62f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -35,7 +35,7 @@
35#include <asm/mach/flash.h> 35#include <asm/mach/flash.h>
36 36
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/common.h> 38#include "common.h"
39#include <plat/gpmc.h> 39#include <plat/gpmc.h>
40#include <plat/nand.h> 40#include <plat/nand.h>
41#include <plat/usb.h> 41#include <plat/usb.h>
@@ -454,6 +454,8 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
454 .map_io = omap3_map_io, 454 .map_io = omap3_map_io,
455 .init_early = omap35xx_init_early, 455 .init_early = omap35xx_init_early,
456 .init_irq = omap3_init_irq, 456 .init_irq = omap3_init_irq,
457 .handle_irq = omap3_intc_handle_irq,
457 .init_machine = omap3_stalker_init, 458 .init_machine = omap3_stalker_init,
458 .timer = &omap3_secure_timer, 459 .timer = &omap3_secure_timer,
460 .restart = omap_prcm_restart,
459MACHINE_END 461MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index a2d0d1971e27..a0b851aafcca 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,7 +44,7 @@
44#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
45 45
46#include <plat/board.h> 46#include <plat/board.h>
47#include <plat/common.h> 47#include "common.h"
48#include <plat/gpmc.h> 48#include <plat/gpmc.h>
49#include <plat/nand.h> 49#include <plat/nand.h>
50#include <plat/usb.h> 50#include <plat/usb.h>
@@ -381,6 +381,8 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
381 .map_io = omap3_map_io, 381 .map_io = omap3_map_io,
382 .init_early = omap3430_init_early, 382 .init_early = omap3430_init_early,
383 .init_irq = omap3_init_irq, 383 .init_irq = omap3_init_irq,
384 .handle_irq = omap3_intc_handle_irq,
384 .init_machine = omap3_touchbook_init, 385 .init_machine = omap3_touchbook_init,
385 .timer = &omap3_secure_timer, 386 .timer = &omap3_secure_timer,
387 .restart = omap_prcm_restart,
386MACHINE_END 388MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index a8c2c4263e38..8b06c6a60d02 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,14 +30,14 @@
30#include <linux/wl12xx.h> 30#include <linux/wl12xx.h>
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/omap4-common.h> 33#include <asm/hardware/gic.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38 38
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/usb.h> 41#include <plat/usb.h>
42#include <plat/mmc.h> 42#include <plat/mmc.h>
43#include <video/omap-panel-dvi.h> 43#include <video/omap-panel-dvi.h>
@@ -577,6 +577,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
577 .map_io = omap4_map_io, 577 .map_io = omap4_map_io,
578 .init_early = omap4430_init_early, 578 .init_early = omap4430_init_early,
579 .init_irq = gic_init_irq, 579 .init_irq = gic_init_irq,
580 .handle_irq = gic_handle_irq,
580 .init_machine = omap4_panda_init, 581 .init_machine = omap4_panda_init,
581 .timer = &omap4_timer, 582 .timer = &omap4_timer,
583 .restart = omap_prcm_restart,
582MACHINE_END 584MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 4cf7aeabab86..52c0cef77165 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -43,7 +43,7 @@
43#include <asm/mach/map.h> 43#include <asm/mach/map.h>
44 44
45#include <plat/board.h> 45#include <plat/board.h>
46#include <plat/common.h> 46#include "common.h"
47#include <video/omapdss.h> 47#include <video/omapdss.h>
48#include <video/omap-panel-generic-dpi.h> 48#include <video/omap-panel-generic-dpi.h>
49#include <video/omap-panel-dvi.h> 49#include <video/omap-panel-dvi.h>
@@ -562,6 +562,8 @@ MACHINE_START(OVERO, "Gumstix Overo")
562 .map_io = omap3_map_io, 562 .map_io = omap3_map_io,
563 .init_early = omap35xx_init_early, 563 .init_early = omap35xx_init_early,
564 .init_irq = omap3_init_irq, 564 .init_irq = omap3_init_irq,
565 .handle_irq = omap3_intc_handle_irq,
565 .init_machine = overo_init, 566 .init_machine = overo_init,
566 .timer = &omap3_timer, 567 .timer = &omap3_timer,
568 .restart = omap_prcm_restart,
567MACHINE_END 569MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 616fb39763b0..8678b386c6a2 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -25,7 +25,7 @@
25#include <plat/mmc.h> 25#include <plat/mmc.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27#include <plat/gpmc.h> 27#include <plat/gpmc.h>
28#include <plat/common.h> 28#include "common.h"
29#include <plat/onenand.h> 29#include <plat/onenand.h>
30 30
31#include "mux.h" 31#include "mux.h"
@@ -149,6 +149,8 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
149 .map_io = omap3_map_io, 149 .map_io = omap3_map_io,
150 .init_early = omap3630_init_early, 150 .init_early = omap3630_init_early,
151 .init_irq = omap3_init_irq, 151 .init_irq = omap3_init_irq,
152 .handle_irq = omap3_intc_handle_irq,
152 .init_machine = rm680_init, 153 .init_machine = rm680_init,
153 .timer = &omap3_timer, 154 .timer = &omap3_timer,
155 .restart = omap_prcm_restart,
154MACHINE_END 156MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index c15c5c9c9085..108fee6146fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -27,7 +27,7 @@
27 27
28#include <plat/mcspi.h> 28#include <plat/mcspi.h>
29#include <plat/board.h> 29#include <plat/board.h>
30#include <plat/common.h> 30#include "common.h"
31#include <plat/dma.h> 31#include <plat/dma.h>
32#include <plat/gpmc.h> 32#include <plat/gpmc.h>
33#include <plat/onenand.h> 33#include <plat/onenand.h>
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 4af7c4b2881a..27f01f051dff 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -25,7 +25,7 @@
25 25
26#include <plat/mcspi.h> 26#include <plat/mcspi.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/common.h> 28#include "common.h"
29#include <plat/dma.h> 29#include <plat/dma.h>
30#include <plat/gpmc.h> 30#include <plat/gpmc.h>
31#include <plat/usb.h> 31#include <plat/usb.h>
@@ -127,6 +127,8 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
127 .map_io = omap3_map_io, 127 .map_io = omap3_map_io,
128 .init_early = omap3430_init_early, 128 .init_early = omap3430_init_early,
129 .init_irq = omap3_init_irq, 129 .init_irq = omap3_init_irq,
130 .handle_irq = omap3_intc_handle_irq,
130 .init_machine = rx51_init, 131 .init_machine = rx51_init,
131 .timer = &omap3_timer, 132 .timer = &omap3_timer,
133 .restart = omap_prcm_restart,
132MACHINE_END 134MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e6ee8842285c..74713e3993e5 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -22,7 +22,7 @@
22 22
23#include <plat/irqs.h> 23#include <plat/irqs.h>
24#include <plat/board.h> 24#include <plat/board.h>
25#include <plat/common.h> 25#include "common.h"
26 26
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
28}; 28};
@@ -48,4 +48,5 @@ MACHINE_START(TI8168EVM, "ti8168evm")
48 .init_irq = ti816x_init_irq, 48 .init_irq = ti816x_init_irq,
49 .timer = &omap3_timer, 49 .timer = &omap3_timer,
50 .init_machine = ti8168_evm_init, 50 .init_machine = ti8168_evm_init,
51 .restart = omap_prcm_restart,
51MACHINE_END 52MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 6d0aa4fcb7c3..8d7ce11cfeaf 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -24,7 +24,7 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26 26
27#include <plat/common.h> 27#include "common.h"
28#include <plat/usb.h> 28#include <plat/usb.h>
29 29
30#include <mach/board-zoom.h> 30#include <mach/board-zoom.h>
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index be6684dc4f55..5c20bcc57f2b 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -21,7 +21,7 @@
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25#include <plat/board.h> 25#include <plat/board.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27 27
@@ -135,8 +135,10 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
135 .map_io = omap3_map_io, 135 .map_io = omap3_map_io,
136 .init_early = omap3430_init_early, 136 .init_early = omap3430_init_early,
137 .init_irq = omap3_init_irq, 137 .init_irq = omap3_init_irq,
138 .handle_irq = omap3_intc_handle_irq,
138 .init_machine = omap_zoom_init, 139 .init_machine = omap_zoom_init,
139 .timer = &omap3_timer, 140 .timer = &omap3_timer,
141 .restart = omap_prcm_restart,
140MACHINE_END 142MACHINE_END
141 143
142MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") 144MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -145,6 +147,8 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
145 .map_io = omap3_map_io, 147 .map_io = omap3_map_io,
146 .init_early = omap3630_init_early, 148 .init_early = omap3630_init_early,
147 .init_irq = omap3_init_irq, 149 .init_irq = omap3_init_irq,
150 .handle_irq = omap3_intc_handle_irq,
148 .init_machine = omap_zoom_init, 151 .init_machine = omap_zoom_init,
149 .timer = &omap3_timer, 152 .timer = &omap3_timer,
153 .restart = omap_prcm_restart,
150MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 38830d8d4783..04d39cdd2112 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "cm.h" 23#include "cm.h"
24#include "cm2xxx_3xxx.h" 24#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index e96f53ea01a1..6a836303252c 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "cm.h" 23#include "cm.h"
24#include "cm1_44xx.h" 24#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index eb2a472bbf46..6204deaf85b1 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -20,7 +20,7 @@
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include <plat/common.h> 23#include "common.h"
24 24
25#include "cm.h" 25#include "cm.h"
26#include "cm1_44xx.h" 26#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 110e5b9db145..684b8a7cd401 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,7 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/common.h> 20#include "common.h"
21#include <plat/board.h> 21#include <plat/board.h>
22#include <plat/mux.h> 22#include <plat/mux.h>
23 23
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
new file mode 100644
index 000000000000..cda888a2e635
--- /dev/null
+++ b/arch/arm/mach-omap2/common.h
@@ -0,0 +1,186 @@
1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27
28#include <linux/delay.h>
29#include <plat/common.h>
30
31#ifdef CONFIG_SOC_OMAP2420
32extern void omap242x_map_common_io(void);
33#else
34static inline void omap242x_map_common_io(void)
35{
36}
37#endif
38
39#ifdef CONFIG_SOC_OMAP2430
40extern void omap243x_map_common_io(void);
41#else
42static inline void omap243x_map_common_io(void)
43{
44}
45#endif
46
47#ifdef CONFIG_ARCH_OMAP3
48extern void omap34xx_map_common_io(void);
49#else
50static inline void omap34xx_map_common_io(void)
51{
52}
53#endif
54
55#ifdef CONFIG_SOC_OMAPTI816X
56extern void omapti816x_map_common_io(void);
57#else
58static inline void omapti816x_map_common_io(void)
59{
60}
61#endif
62
63#ifdef CONFIG_ARCH_OMAP4
64extern void omap44xx_map_common_io(void);
65#else
66static inline void omap44xx_map_common_io(void)
67{
68}
69#endif
70
71extern void omap2_init_common_infrastructure(void);
72
73extern struct sys_timer omap2_timer;
74extern struct sys_timer omap3_timer;
75extern struct sys_timer omap3_secure_timer;
76extern struct sys_timer omap4_timer;
77
78void omap2420_init_early(void);
79void omap2430_init_early(void);
80void omap3430_init_early(void);
81void omap35xx_init_early(void);
82void omap3630_init_early(void);
83void omap3_init_early(void); /* Do not use this one */
84void am35xx_init_early(void);
85void ti816x_init_early(void);
86void omap4430_init_early(void);
87void omap_prcm_restart(char, const char *);
88
89/*
90 * IO bases for various OMAP processors
91 * Except the tap base, rest all the io bases
92 * listed are physical addresses.
93 */
94struct omap_globals {
95 u32 class; /* OMAP class to detect */
96 void __iomem *tap; /* Control module ID code */
97 void __iomem *sdrc; /* SDRAM Controller */
98 void __iomem *sms; /* SDRAM Memory Scheduler */
99 void __iomem *ctrl; /* System Control Module */
100 void __iomem *ctrl_pad; /* PAD Control Module */
101 void __iomem *prm; /* Power and Reset Management */
102 void __iomem *cm; /* Clock Management */
103 void __iomem *cm2;
104};
105
106void omap2_set_globals_242x(void);
107void omap2_set_globals_243x(void);
108void omap2_set_globals_3xxx(void);
109void omap2_set_globals_443x(void);
110void omap2_set_globals_ti816x(void);
111
112/* These get called from omap2_set_globals_xxxx(), do not call these */
113void omap2_set_globals_tap(struct omap_globals *);
114void omap2_set_globals_sdrc(struct omap_globals *);
115void omap2_set_globals_control(struct omap_globals *);
116void omap2_set_globals_prcm(struct omap_globals *);
117
118void omap242x_map_io(void);
119void omap243x_map_io(void);
120void omap3_map_io(void);
121void omap4_map_io(void);
122
123/**
124 * omap_test_timeout - busy-loop, testing a condition
125 * @cond: condition to test until it evaluates to true
126 * @timeout: maximum number of microseconds in the timeout
127 * @index: loop index (integer)
128 *
129 * Loop waiting for @cond to become true or until at least @timeout
130 * microseconds have passed. To use, define some integer @index in the
131 * calling code. After running, if @index == @timeout, then the loop has
132 * timed out.
133 */
134#define omap_test_timeout(cond, timeout, index) \
135({ \
136 for (index = 0; index < timeout; index++) { \
137 if (cond) \
138 break; \
139 udelay(1); \
140 } \
141})
142
143extern struct device *omap2_get_mpuss_device(void);
144extern struct device *omap2_get_iva_device(void);
145extern struct device *omap2_get_l3_device(void);
146extern struct device *omap4_get_dsp_device(void);
147
148void omap2_init_irq(void);
149void omap3_init_irq(void);
150void ti816x_init_irq(void);
151extern int omap_irq_pending(void);
152void omap_intc_save_context(void);
153void omap_intc_restore_context(void);
154void omap3_intc_suspend(void);
155void omap3_intc_prepare_idle(void);
156void omap3_intc_resume_idle(void);
157void omap2_intc_handle_irq(struct pt_regs *regs);
158void omap3_intc_handle_irq(struct pt_regs *regs);
159
160/*
161 * wfi used in low power code. Directly opcode is used instead
162 * of instruction to avoid mulit-omap build break
163 */
164#ifdef CONFIG_THUMB2_KERNEL
165#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
166#else
167#define do_wfi() \
168 __asm__ __volatile__ (".word 0xe320f003" : : : "memory")
169#endif
170
171#ifdef CONFIG_CACHE_L2X0
172extern void __iomem *l2cache_base;
173#endif
174
175extern void __init gic_init_irq(void);
176extern void omap_smc1(u32 fn, u32 arg);
177
178#ifdef CONFIG_SMP
179/* Needed for secondary core boot */
180extern void omap_secondary_startup(void);
181extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
182extern void omap_auxcoreboot_addr(u32 cpu_addr);
183extern u32 omap_read_auxcoreboot0(void);
184#endif
185
186#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index e34d27f8c49c..114c037e433c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,7 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <plat/common.h> 18#include "common.h"
19#include <plat/sdrc.h> 19#include <plat/sdrc.h>
20 20
21#include "cm-regbits-34xx.h" 21#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 942bb4f19f9f..e20332f4abdc 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
34 34
35#include "pm.h" 35#include "pm.h"
36#include "control.h" 36#include "control.h"
37#include "common.h"
37 38
38#ifdef CONFIG_CPU_IDLE 39#ifdef CONFIG_CPU_IDLE
39 40
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index dce9905d64bb..bc6cf863a563 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -22,12 +22,13 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/delay.h>
25 26
26#include <video/omapdss.h> 27#include <video/omapdss.h>
27#include <plat/omap_hwmod.h> 28#include <plat/omap_hwmod.h>
28#include <plat/omap_device.h> 29#include <plat/omap_device.h>
29#include <plat/omap-pm.h> 30#include <plat/omap-pm.h>
30#include <plat/common.h> 31#include "common.h"
31 32
32#include "control.h" 33#include "control.h"
33#include "display.h" 34#include "display.h"
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index ace99944e96f..a12e224eb97d 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -21,7 +21,7 @@
21 21
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23#include <plat/i2c.h> 23#include <plat/i2c.h>
24#include <plat/common.h> 24#include "common.h"
25#include <plat/omap_hwmod.h> 25#include <plat/omap_hwmod.h>
26 26
27#include "mux.h" 27#include "mux.h"
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 7f47092a193f..27ad722df637 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,7 +21,7 @@
21 21
22#include <asm/cputype.h> 22#include <asm/cputype.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25#include <plat/cpu.h> 25#include <plat/cpu.h>
26 26
27#include <mach/id.h> 27#include <mach/id.h>
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a10945a..56964a0c4c7e 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <mach/io.h>
15#include <mach/irqs.h>
16#include <asm/hardware/gic.h>
17
18#include <plat/omap24xx.h>
19#include <plat/omap34xx.h>
20#include <plat/omap44xx.h>
21
22#include <plat/multi.h>
23
24#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
25#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
26#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
27#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
28#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
29 13
30 .macro disable_fiq 14 .macro disable_fiq
31 .endm 15 .endm
32 16
33 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 18 .endm
35
36/*
37 * Unoptimized irq functions for multi-omap2, 3 and 4
38 */
39
40#ifdef MULTI_OMAP2
41 /*
42 * Configure the interrupt base on the first interrupt.
43 * See also omap_irq_base_init for setting omap_irq_base.
44 */
45 .macro get_irqnr_preamble, base, tmp
46 ldr \base, =omap_irq_base @ irq base address
47 ldr \base, [\base, #0] @ irq base value
48 .endm
49
50 /* Check the pending interrupts. Note that base already set */
51 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
52 tst \base, #0x100 @ gic address?
53 bne 4401f @ found gic
54
55 /* Handle omap2 and omap3 */
56 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
57 cmp \irqnr, #0x0
58 bne 9998f
59 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
60 cmp \irqnr, #0x0
61 bne 9998f
62 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
63 cmp \irqnr, #0x0
64 bne 9998f
65
66 /*
67 * ti816x has additional IRQ pending register. Checking this
68 * register on omap2 & omap3 has no effect (read as 0).
69 */
70 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
71 cmp \irqnr, #0x0
729998:
73 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
74 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
75 b 9999f
76
77 /* Handle omap4 */
784401: ldr \irqstat, [\base, #GIC_CPU_INTACK]
79 ldr \tmp, =1021
80 bic \irqnr, \irqstat, #0x1c00
81 cmp \irqnr, #15
82 cmpcc \irqnr, \irqnr
83 cmpne \irqnr, \tmp
84 cmpcs \irqnr, \irqnr
859999:
86 .endm
87
88#ifdef CONFIG_SMP
89 /* We assume that irqstat (the raw value of the IRQ acknowledge
90 * register) is preserved from the macro above.
91 * If there is an IPI, we immediately signal end of interrupt
92 * on the controller, since this requires the original irqstat
93 * value which we won't easily be able to recreate later.
94 */
95
96 .macro test_for_ipi, irqnr, irqstat, base, tmp
97 bic \irqnr, \irqstat, #0x1c00
98 cmp \irqnr, #16
99 it cc
100 strcc \irqstat, [\base, #GIC_CPU_EOI]
101 it cs
102 cmpcs \irqnr, \irqnr
103 .endm
104#endif /* CONFIG_SMP */
105
106#else /* MULTI_OMAP2 */
107
108
109/*
110 * Optimized irq functions for omap2, 3 and 4
111 */
112
113#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
114 .macro get_irqnr_preamble, base, tmp
115#ifdef CONFIG_ARCH_OMAP2
116 ldr \base, =OMAP2_IRQ_BASE
117#else
118 ldr \base, =OMAP3_IRQ_BASE
119#endif
120 .endm
121
122 /* Check the pending interrupts. Note that base already set */
123 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
124 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
125 cmp \irqnr, #0x0
126 bne 9999f
127 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
128 cmp \irqnr, #0x0
129 bne 9999f
130 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
131 cmp \irqnr, #0x0
132#ifdef CONFIG_SOC_OMAPTI816X
133 bne 9999f
134 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
135 cmp \irqnr, #0x0
136#endif
1379999:
138 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
139 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
140
141 .endm
142#endif
143
144
145#ifdef CONFIG_ARCH_OMAP4
146#define HAVE_GET_IRQNR_PREAMBLE
147#include <asm/hardware/entry-macro-gic.S>
148
149 .macro get_irqnr_preamble, base, tmp
150 ldr \base, =OMAP4_IRQ_BASE
151 .endm
152
153#endif
154
155#endif /* MULTI_OMAP2 */
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
deleted file mode 100644
index e4bd87619734..000000000000
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * omap4-common.h: OMAP4 specific common header file
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 *
6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef OMAP_ARCH_OMAP4_COMMON_H
14#define OMAP_ARCH_OMAP4_COMMON_H
15
16/*
17 * wfi used in low power code. Directly opcode is used instead
18 * of instruction to avoid mulit-omap build break
19 */
20#ifdef CONFIG_THUMB2_KERNEL
21#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
22#else
23#define do_wfi() \
24 __asm__ __volatile__ (".word 0xe320f003" : : : "memory")
25#endif
26
27#ifdef CONFIG_CACHE_L2X0
28extern void __iomem *l2cache_base;
29#endif
30
31extern void __iomem *gic_dist_base_addr;
32
33extern void __init gic_init_irq(void);
34extern void omap_smc1(u32 fn, u32 arg);
35
36#ifdef CONFIG_SMP
37/* Needed for secondary core boot */
38extern void omap_secondary_startup(void);
39extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
40extern void omap_auxcoreboot_addr(u32 cpu_addr);
41extern u32 omap_read_auxcoreboot0(void);
42#endif
43#endif
diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h
deleted file mode 100644
index 866319947760..000000000000
--- a/arch/arm/mach-omap2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 25d20ced03e1..3f565dd2ea8d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -35,7 +35,7 @@
35#include "clock3xxx.h" 35#include "clock3xxx.h"
36#include "clock44xx.h" 36#include "clock44xx.h"
37 37
38#include <plat/common.h> 38#include "common.h"
39#include <plat/omap-pm.h> 39#include <plat/omap-pm.h>
40#include "voltage.h" 40#include "voltage.h"
41#include "powerdomain.h" 41#include "powerdomain.h"
@@ -43,7 +43,7 @@
43#include "clockdomain.h" 43#include "clockdomain.h"
44#include <plat/omap_hwmod.h> 44#include <plat/omap_hwmod.h>
45#include <plat/multi.h> 45#include <plat/multi.h>
46#include <plat/common.h> 46#include "common.h"
47 47
48/* 48/*
49 * The machine specific code may provide the extra mapping besides the 49 * The machine specific code may provide the extra mapping besides the
@@ -316,13 +316,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
317} 317}
318 318
319/* See irq.c, omap4-common.c and entry-macro.S */
320void __iomem *omap_irq_base;
321
322static void __init omap_common_init_early(void) 319static void __init omap_common_init_early(void)
323{ 320{
324 omap2_check_revision(); 321 omap2_check_revision();
325 omap_ioremap_init();
326 omap_init_consistent_dma_size(); 322 omap_init_consistent_dma_size();
327} 323}
328 324
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6a182c..42b1d6591912 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -15,6 +15,7 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <asm/exception.h>
18#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
19 20
20 21
@@ -35,6 +36,11 @@
35/* Number of IRQ state bits in each MIR register */ 36/* Number of IRQ state bits in each MIR register */
36#define IRQ_BITS_PER_REG 32 37#define IRQ_BITS_PER_REG 32
37 38
39#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
40#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
41#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
42#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
43
38/* 44/*
39 * OMAP2 has a number of different interrupt controllers, each interrupt 45 * OMAP2 has a number of different interrupt controllers, each interrupt
40 * controller is identified as its own "bank". Register definitions are 46 * controller is identified as its own "bank". Register definitions are
@@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
143 149
144static void __init omap_init_irq(u32 base, int nr_irqs) 150static void __init omap_init_irq(u32 base, int nr_irqs)
145{ 151{
152 void __iomem *omap_irq_base;
146 unsigned long nr_of_irqs = 0; 153 unsigned long nr_of_irqs = 0;
147 unsigned int nr_banks = 0; 154 unsigned int nr_banks = 0;
148 int i, j; 155 int i, j;
@@ -191,6 +198,44 @@ void __init ti816x_init_irq(void)
191 omap_init_irq(OMAP34XX_IC_BASE, 128); 198 omap_init_irq(OMAP34XX_IC_BASE, 128);
192} 199}
193 200
201static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
202{
203 u32 irqnr;
204
205 do {
206 irqnr = readl_relaxed(base_addr + 0x98);
207 if (irqnr)
208 goto out;
209
210 irqnr = readl_relaxed(base_addr + 0xb8);
211 if (irqnr)
212 goto out;
213
214 irqnr = readl_relaxed(base_addr + 0xd8);
215#ifdef CONFIG_SOC_OMAPTI816X
216 if (irqnr)
217 goto out;
218 irqnr = readl_relaxed(base_addr + 0xf8);
219#endif
220
221out:
222 if (!irqnr)
223 break;
224
225 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
226 irqnr &= ACTIVEIRQ_MASK;
227
228 if (irqnr)
229 handle_IRQ(irqnr, regs);
230 } while (irqnr);
231}
232
233asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
234{
235 void __iomem *base_addr = OMAP2_IRQ_BASE;
236 omap_intc_handle_irq(base_addr, regs);
237}
238
194#ifdef CONFIG_ARCH_OMAP3 239#ifdef CONFIG_ARCH_OMAP3
195static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 240static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
196 241
@@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void)
263 /* Re-enable autoidle */ 308 /* Re-enable autoidle */
264 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); 309 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
265} 310}
311
312asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
313{
314 void __iomem *base_addr = OMAP3_IRQ_BASE;
315 omap_intc_handle_irq(base_addr, regs);
316}
266#endif /* CONFIG_ARCH_OMAP3 */ 317#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 4976b9393e49..e5a1c3f40a86 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -19,7 +19,8 @@
19#include <linux/smp.h> 19#include <linux/smp.h>
20 20
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <mach/omap4-common.h> 22
23#include "common.h"
23 24
24int platform_cpu_kill(unsigned int cpu) 25int platform_cpu_kill(unsigned int cpu)
25{ 26{
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4412ddb7b3f6..e99bc6cd4714 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -24,7 +24,8 @@
24#include <asm/hardware/gic.h> 24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/omap4-common.h> 27
28#include "common.h"
28 29
29/* SCU base address */ 30/* SCU base address */
30static void __iomem *scu_base; 31static void __iomem *scu_base;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 35ac3e5f6e94..beecfdd56ea3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -22,17 +22,18 @@
22#include <plat/irqs.h> 22#include <plat/irqs.h>
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/omap4-common.h> 25
26#include "common.h"
26 27
27#ifdef CONFIG_CACHE_L2X0 28#ifdef CONFIG_CACHE_L2X0
28void __iomem *l2cache_base; 29void __iomem *l2cache_base;
29#endif 30#endif
30 31
31void __iomem *gic_dist_base_addr;
32
33
34void __init gic_init_irq(void) 32void __init gic_init_irq(void)
35{ 33{
34 void __iomem *omap_irq_base;
35 void __iomem *gic_dist_base_addr;
36
36 /* Static mapping, never released */ 37 /* Static mapping, never released */
37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); 38 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
38 BUG_ON(!gic_dist_base_addr); 39 BUG_ON(!gic_dist_base_addr);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 207a2ff9a8c4..529142aff766 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -137,7 +137,7 @@
137#include <linux/mutex.h> 137#include <linux/mutex.h>
138#include <linux/spinlock.h> 138#include <linux/spinlock.h>
139 139
140#include <plat/common.h> 140#include "common.h"
141#include <plat/cpu.h> 141#include <plat/cpu.h>
142#include "clockdomain.h" 142#include "clockdomain.h"
143#include "powerdomain.h" 143#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 00bff46ca48b..1881fe915149 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -18,7 +18,7 @@
18 18
19#include <plat/omap-pm.h> 19#include <plat/omap-pm.h>
20#include <plat/omap_device.h> 20#include <plat/omap_device.h>
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "voltage.h" 23#include "voltage.h"
24#include "powerdomain.h" 24#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index cf0c216132ab..ef8595c80296 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -42,6 +42,7 @@
42#include <plat/dma.h> 42#include <plat/dma.h>
43#include <plat/board.h> 43#include <plat/board.h>
44 44
45#include "common.h"
45#include "prm2xxx_3xxx.h" 46#include "prm2xxx_3xxx.h"
46#include "prm-regbits-24xx.h" 47#include "prm-regbits-24xx.h"
47#include "cm2xxx_3xxx.h" 48#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index efa66494c1e3..fa637dfdda53 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -42,6 +42,7 @@
42#include <plat/gpmc.h> 42#include <plat/gpmc.h>
43#include <plat/dma.h> 43#include <plat/dma.h>
44 44
45#include "common.h"
45#include "cm2xxx_3xxx.h" 46#include "cm2xxx_3xxx.h"
46#include "cm-regbits-34xx.h" 47#include "cm-regbits-34xx.h"
47#include "prm-regbits-34xx.h" 48#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 59a870be8390..8edb015f5618 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,8 +16,8 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18 18
19#include "common.h"
19#include "powerdomain.h" 20#include "powerdomain.h"
20#include <mach/omap4-common.h>
21 21
22struct power_state { 22struct power_state {
23 struct powerdomain *pwrdm; 23 struct powerdomain *pwrdm;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 597e2da831b3..626acfad7190 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -25,8 +25,7 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/export.h> 26#include <linux/export.h>
27 27
28#include <mach/system.h> 28#include "common.h"
29#include <plat/common.h>
30#include <plat/prcm.h> 29#include <plat/prcm.h>
31#include <plat/irqs.h> 30#include <plat/irqs.h>
32 31
@@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
59EXPORT_SYMBOL(omap_prcm_get_reset_sources); 58EXPORT_SYMBOL(omap_prcm_get_reset_sources);
60 59
61/* Resets clock rates and reboots the system. Only called from system.h */ 60/* Resets clock rates and reboots the system. Only called from system.h */
62static void omap_prcm_arch_reset(char mode, const char *cmd) 61void omap_prcm_restart(char mode, const char *cmd)
63{ 62{
64 s16 prcm_offs = 0; 63 s16 prcm_offs = 0;
65 64
@@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
110 omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ 109 omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
111} 110}
112 111
113void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
114
115/** 112/**
116 * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness 113 * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
117 * @reg: physical address of module IDLEST register 114 * @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index 171fe171a749..ca669b50f390 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -15,7 +15,7 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <plat/common.h> 18#include "common.h"
19 19
20#include "prcm_mpu44xx.h" 20#include "prcm_mpu44xx.h"
21#include "cm-regbits-44xx.h" 21#include "cm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index f02d87f68e54..9a08ba397327 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -16,7 +16,7 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/prcm.h> 21#include <plat/prcm.h>
22 22
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 495a31a7e8a7..dd885eecf22a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,7 +17,7 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/common.h> 20#include "common.h"
21#include <plat/cpu.h> 21#include <plat/cpu.h>
22#include <plat/prcm.h> 22#include <plat/prcm.h>
23 23
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 3a7bab16edd5..f6de5bc6b12a 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -16,7 +16,7 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20 20
21#include "prm44xx.h" 21#include "prm44xx.h"
22#include "prminst44xx.h" 22#include "prminst44xx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 14caa228bc0d..ee3a8ad304cb 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,7 +18,7 @@
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/io.h> 20#include <plat/io.h>
21#include <plat/common.h> 21#include "common.h"
22#include <plat/clock.h> 22#include <plat/clock.h>
23#include <plat/sdrc.h> 23#include <plat/sdrc.h>
24 24
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 8f2782874771..e3d345f46409 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,7 +23,7 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/common.h> 26#include "common.h"
27#include <plat/clock.h> 27#include <plat/clock.h>
28#include <plat/sram.h> 28#include <plat/sram.h>
29 29
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index ccdb010f169d..791a63cdceb2 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,7 +24,7 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <plat/common.h> 27#include "common.h"
28#include <plat/clock.h> 28#include <plat/clock.h>
29#include <plat/sram.h> 29#include <plat/sram.h>
30 30
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9992dbfdfdb3..42c326732a29 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -33,7 +33,7 @@
33#include <plat/omap-serial.h> 33#include <plat/omap-serial.h>
34#endif 34#endif
35 35
36#include <plat/common.h> 36#include "common.h"
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/clock.h> 38#include <plat/clock.h>
39#include <plat/dma.h> 39#include <plat/dma.h>
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index cf246b39bac7..9dd93453e563 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -26,7 +26,7 @@
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/pm_runtime.h> 27#include <linux/pm_runtime.h>
28 28
29#include <plat/common.h> 29#include "common.h"
30 30
31#include "pm.h" 31#include "pm.h"
32#include "smartreflex.h" 32#include "smartreflex.h"
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 037b0d7d4e05..6eeff0e0ae01 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,7 +41,7 @@
41#include <plat/dmtimer.h> 41#include <plat/dmtimer.h>
42#include <asm/localtimer.h> 42#include <asm/localtimer.h>
43#include <asm/sched_clock.h> 43#include <asm/sched_clock.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/omap_hwmod.h> 45#include <plat/omap_hwmod.h>
46#include <plat/omap_device.h> 46#include <plat/omap_device.h>
47#include <plat/omap-pm.h> 47#include <plat/omap-pm.h>
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc;
254/* 254/*
255 * clocksource 255 * clocksource
256 */ 256 */
257static DEFINE_CLOCK_DATA(cd);
258static cycle_t clocksource_read_cycles(struct clocksource *cs) 257static cycle_t clocksource_read_cycles(struct clocksource *cs)
259{ 258{
260 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); 259 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = {
268 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 267 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
269}; 268};
270 269
271static void notrace dmtimer_update_sched_clock(void) 270static u32 notrace dmtimer_read_sched_clock(void)
272{ 271{
273 u32 cyc;
274
275 cyc = __omap_dm_timer_read_counter(&clksrc, 1);
276
277 update_sched_clock(&cd, cyc, (u32)~0);
278}
279
280unsigned long long notrace sched_clock(void)
281{
282 u32 cyc = 0;
283
284 if (clksrc.reserved) 272 if (clksrc.reserved)
285 cyc = __omap_dm_timer_read_counter(&clksrc, 1); 273 return __omap_dm_timer_read_counter(clksrc.io_base, 1);
286 274
287 return cyc_to_sched_clock(&cd, cyc, (u32)~0); 275 return 0;
288} 276}
289 277
290/* Setup free-running counter for clocksource */ 278/* Setup free-running counter for clocksource */
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
301 289
302 __omap_dm_timer_load_start(&clksrc, 290 __omap_dm_timer_load_start(&clksrc,
303 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); 291 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
304 init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); 292 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
305 293
306 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) 294 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
307 pr_err("Could not register clocksource %s\n", 295 pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index cfe348e1af0e..a5ec7f8f2ea8 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "prm-regbits-34xx.h" 23#include "prm-regbits-34xx.h"
24#include "voltage.h" 24#include "voltage.h"
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 2740a968145e..d70b930f2739 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "prm44xx.h" 23#include "prm44xx.h"
24#include "prm-regbits-44xx.h" 24#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 1f8fdf736e63..8a36342e60d2 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -27,7 +27,7 @@
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29 29
30#include <plat/common.h> 30#include "common.h"
31 31
32#include "prm-regbits-34xx.h" 32#include "prm-regbits-34xx.h"
33#include "prm-regbits-44xx.h" 33#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 071101debbbc..474559d5b072 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23 23
24#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c4584e9ac717..4e11d022595d 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -21,7 +21,7 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/init.h> 22#include <linux/init.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25 25
26#include "prm-regbits-44xx.h" 26#include "prm-regbits-44xx.h"
27#include "prm44xx.h" 27#include "prm44xx.h"
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 66bd700a2b98..807391d84a9d 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -1,7 +1,7 @@
1#include <linux/kernel.h> 1#include <linux/kernel.h>
2#include <linux/init.h> 2#include <linux/init.h>
3 3
4#include <plat/common.h> 4#include "common.h"
5 5
6#include "voltage.h" 6#include "voltage.h"
7#include "vp.h" 7#include "vp.h"
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 260c554b1547..bd89f80089f5 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -19,7 +19,7 @@
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21
22#include <plat/common.h> 22#include "common.h"
23 23
24#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
25#include "voltage.h" 25#include "voltage.h"
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index b4e77044891e..8c031d16879e 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -19,7 +19,7 @@
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21
22#include <plat/common.h> 22#include "common.h"
23 23
24#include "prm44xx.h" 24#include "prm44xx.h"
25#include "prm-regbits-44xx.h" 25#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 22ace0bf2f92..41127e80cc1e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
18#include <linux/mbus.h> 18#include <linux/mbus.h>
19#include <linux/mv643xx_i2c.h> 19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/delay.h>
21#include <net/dsa.h> 22#include <net/dsa.h>
22#include <asm/page.h> 23#include <asm/page.h>
23#include <asm/setup.h> 24#include <asm/setup.h>
@@ -304,6 +305,17 @@ void __init orion5x_init(void)
304 orion5x_wdt_init(); 305 orion5x_wdt_init();
305} 306}
306 307
308void orion5x_restart(char mode, const char *cmd)
309{
310 /*
311 * Enable and issue soft reset
312 */
313 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
314 orion5x_setbits(CPU_SOFT_RESET, 1);
315 mdelay(200);
316 orion5x_clrbits(CPU_SOFT_RESET, 1);
317}
318
307/* 319/*
308 * Many orion-based systems have buggy bootloader implementations. 320 * Many orion-based systems have buggy bootloader implementations.
309 * This is a common fixup for bogus memory tags. 321 * This is a common fixup for bogus memory tags.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 909489f4d23e..37ef18de61b7 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -39,6 +39,7 @@ void orion5x_spi_init(void);
39void orion5x_uart0_init(void); 39void orion5x_uart0_init(void);
40void orion5x_uart1_init(void); 40void orion5x_uart1_init(void);
41void orion5x_xor_init(void); 41void orion5x_xor_init(void);
42void orion5x_restart(char, const char *);
42 43
43/* 44/*
44 * PCIe/PCI functions. 45 * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 8c8300951f46..d75dcfa0f01c 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
343 .init_irq = orion5x_init_irq, 343 .init_irq = orion5x_init_irq,
344 .timer = &orion5x_timer, 344 .timer = &orion5x_timer,
345 .fixup = tag_fixup_mem32, 345 .fixup = tag_fixup_mem32,
346 .restart = orion5x_restart,
346MACHINE_END 347MACHINE_END
347#endif 348#endif
348 349
@@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
355 .init_irq = orion5x_init_irq, 356 .init_irq = orion5x_init_irq,
356 .timer = &orion5x_timer, 357 .timer = &orion5x_timer,
357 .fixup = tag_fixup_mem32, 358 .fixup = tag_fixup_mem32,
359 .restart = orion5x_restart,
358MACHINE_END 360MACHINE_END
359#endif 361#endif
360 362
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 4b79a80d5e1f..a104d5a80e11 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
364 .init_early = orion5x_init_early, 364 .init_early = orion5x_init_early,
365 .init_irq = orion5x_init_irq, 365 .init_irq = orion5x_init_irq,
366 .timer = &orion5x_timer, 366 .timer = &orion5x_timer,
367 .restart = orion5x_restart,
367MACHINE_END 368MACHINE_END
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 343f60e9639f..91b0f4788597 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323")
736 .init_irq = orion5x_init_irq, 736 .init_irq = orion5x_init_irq,
737 .timer = &orion5x_timer, 737 .timer = &orion5x_timer,
738 .fixup = tag_fixup_mem32, 738 .fixup = tag_fixup_mem32,
739 .restart = orion5x_restart,
739MACHINE_END 740MACHINE_END
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 70a4e9265f06..355e962137c7 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
258 .init_irq = orion5x_init_irq, 258 .init_irq = orion5x_init_irq,
259 .timer = &orion5x_timer, 259 .timer = &orion5x_timer,
260 .fixup = tag_fixup_mem32, 260 .fixup = tag_fixup_mem32,
261 .restart = orion5x_restart,
261MACHINE_END 262MACHINE_END
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index c5196101a237..e9d9afdc2659 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -15,31 +15,6 @@
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17 17
18static inline void __iomem *
19__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
20{
21 void __iomem *retval;
22 unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE;
23 if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE &&
24 size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) {
25 retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs;
26 } else {
27 retval = __arm_ioremap(paddr, size, mtype);
28 }
29
30 return retval;
31}
32
33static inline void
34__arch_iounmap(void __iomem *addr)
35{
36 if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE ||
37 addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE))
38 __iounmap(addr);
39}
40
41#define __arch_ioremap __arch_ioremap
42#define __arch_iounmap __arch_iounmap
43#define __io(a) __typesafe_io(a) 18#define __io(a) __typesafe_io(a)
44#define __mem_pci(a) (a) 19#define __mem_pci(a) (a)
45 20
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
index a1d6e46ab035..825a2650cefa 100644
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -11,23 +11,9 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <mach/bridge-regs.h>
15
16static inline void arch_idle(void) 14static inline void arch_idle(void)
17{ 15{
18 cpu_do_idle(); 16 cpu_do_idle();
19} 17}
20 18
21static inline void arch_reset(char mode, const char *cmd)
22{
23 /*
24 * Enable and issue soft reset
25 */
26 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
27 orion5x_setbits(CPU_SOFT_RESET, 1);
28 mdelay(200);
29 orion5x_clrbits(CPU_SOFT_RESET, 1);
30}
31
32
33#endif 19#endif
diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h
deleted file mode 100644
index 06b50aeff7b9..000000000000
--- a/arch/arm/mach-orion5x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfd800000UL
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index d3cd3f63258a..47587b832842 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
386 .init_irq = orion5x_init_irq, 386 .init_irq = orion5x_init_irq,
387 .timer = &orion5x_timer, 387 .timer = &orion5x_timer,
388 .fixup = tag_fixup_mem32, 388 .fixup = tag_fixup_mem32,
389 .restart = orion5x_restart,
389MACHINE_END 390MACHINE_END
390#endif 391#endif
391 392
@@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
399 .init_irq = orion5x_init_irq, 400 .init_irq = orion5x_init_irq,
400 .timer = &orion5x_timer, 401 .timer = &orion5x_timer,
401 .fixup = tag_fixup_mem32, 402 .fixup = tag_fixup_mem32,
403 .restart = orion5x_restart,
402MACHINE_END 404MACHINE_END
403#endif 405#endif
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 9503fff404e3..527213169db0 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = {
140 140
141static void lschl_power_off(void) 141static void lschl_power_off(void)
142{ 142{
143 arm_machine_restart('h', NULL); 143 orion5x_restart('h', NULL);
144} 144}
145 145
146/***************************************************************************** 146/*****************************************************************************
@@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
325 .init_irq = orion5x_init_irq, 325 .init_irq = orion5x_init_irq,
326 .timer = &orion5x_timer, 326 .timer = &orion5x_timer,
327 .fixup = tag_fixup_mem32, 327 .fixup = tag_fixup_mem32,
328 .restart = orion5x_restart,
328MACHINE_END 329MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index ed6d772f4a24..9a8697b97dd7 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = {
186 186
187static void ls_hgl_power_off(void) 187static void ls_hgl_power_off(void)
188{ 188{
189 arm_machine_restart('h', NULL); 189 orion5x_restart('h', NULL);
190} 190}
191 191
192 192
@@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
272 .init_irq = orion5x_init_irq, 272 .init_irq = orion5x_init_irq,
273 .timer = &orion5x_timer, 273 .timer = &orion5x_timer,
274 .fixup = tag_fixup_mem32, 274 .fixup = tag_fixup_mem32,
275 .restart = orion5x_restart,
275MACHINE_END 276MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 743f7f1db181..09c73659f467 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
186 186
187static void lsmini_power_off(void) 187static void lsmini_power_off(void)
188{ 188{
189 arm_machine_restart('h', NULL); 189 orion5x_restart('h', NULL);
190} 190}
191 191
192 192
@@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
274 .init_irq = orion5x_init_irq, 274 .init_irq = orion5x_init_irq,
275 .timer = &orion5x_timer, 275 .timer = &orion5x_timer,
276 .fixup = tag_fixup_mem32, 276 .fixup = tag_fixup_mem32,
277 .restart = orion5x_restart,
277MACHINE_END 278MACHINE_END
278#endif 279#endif
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 6020e26b1c71..65faaa34de61 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
267 .init_early = orion5x_init_early, 267 .init_early = orion5x_init_early,
268 .init_irq = orion5x_init_irq, 268 .init_irq = orion5x_init_irq,
269 .timer = &orion5x_timer, 269 .timer = &orion5x_timer,
270 .fixup = tag_fixup_mem32 270 .fixup = tag_fixup_mem32,
271 .restart = orion5x_restart,
271MACHINE_END 272MACHINE_END
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 201ae3676289..c87fde4deeca 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
234 .init_early = orion5x_init_early, 234 .init_early = orion5x_init_early,
235 .init_irq = orion5x_init_irq, 235 .init_irq = orion5x_init_irq,
236 .timer = &orion5x_timer, 236 .timer = &orion5x_timer,
237 .fixup = tag_fixup_mem32 237 .fixup = tag_fixup_mem32,
238 .restart = orion5x_restart,
238MACHINE_END 239MACHINE_END
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 6197c79a2ecb..0180c393c711 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
426 .init_irq = orion5x_init_irq, 426 .init_irq = orion5x_init_irq,
427 .timer = &orion5x_timer, 427 .timer = &orion5x_timer,
428 .fixup = tag_fixup_mem32, 428 .fixup = tag_fixup_mem32,
429 .restart = orion5x_restart,
429MACHINE_END 430MACHINE_END
430 431
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index ebd6767d8e88..292038fc59fd 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
175 .init_irq = orion5x_init_irq, 175 .init_irq = orion5x_init_irq,
176 .timer = &orion5x_timer, 176 .timer = &orion5x_timer,
177 .fixup = tag_fixup_mem32, 177 .fixup = tag_fixup_mem32,
178 .restart = orion5x_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 05db2d336b08..c44eabaabc16 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
187 .init_irq = orion5x_init_irq, 187 .init_irq = orion5x_init_irq,
188 .timer = &orion5x_timer, 188 .timer = &orion5x_timer,
189 .fixup = tag_fixup_mem32, 189 .fixup = tag_fixup_mem32,
190 .restart = orion5x_restart,
190MACHINE_END 191MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index e47fa0578ae3..96438b6b2022 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
311 .init_early = orion5x_init_early, 311 .init_early = orion5x_init_early,
312 .init_irq = orion5x_init_irq, 312 .init_irq = orion5x_init_irq,
313 .timer = &orion5x_timer, 313 .timer = &orion5x_timer,
314 .restart = orion5x_restart,
314MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 64317251ec00..2c5fab00d205 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
128 .init_irq = orion5x_init_irq, 128 .init_irq = orion5x_init_irq,
129 .timer = &orion5x_timer, 129 .timer = &orion5x_timer,
130 .fixup = tag_fixup_mem32, 130 .fixup = tag_fixup_mem32,
131 .restart = orion5x_restart,
131MACHINE_END 132MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 29f1526f7b70..632a861ef82b 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
364 .init_irq = orion5x_init_irq, 364 .init_irq = orion5x_init_irq,
365 .timer = &orion5x_timer, 365 .timer = &orion5x_timer,
366 .fixup = tag_fixup_mem32, 366 .fixup = tag_fixup_mem32,
367 .restart = orion5x_restart,
367MACHINE_END 368MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 31e51f9b4b64..5d6408745582 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = {
178 178
179static int __init qnap_ts209_pci_init(void) 179static int __init qnap_ts209_pci_init(void)
180{ 180{
181 if (machine_is_ts_x09()) 181 if (machine_is_ts209())
182 pci_common_init(&qnap_ts209_pci); 182 pci_common_init(&qnap_ts209_pci);
183 183
184 return 0; 184 return 0;
@@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
329 .init_irq = orion5x_init_irq, 329 .init_irq = orion5x_init_irq,
330 .timer = &orion5x_timer, 330 .timer = &orion5x_timer,
331 .fixup = tag_fixup_mem32, 331 .fixup = tag_fixup_mem32,
332 .restart = orion5x_restart,
332MACHINE_END 333MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 0fbcc14e09d7..4e6ff759cd32 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409")
318 .init_irq = orion5x_init_irq, 318 .init_irq = orion5x_init_irq,
319 .timer = &orion5x_timer, 319 .timer = &orion5x_timer,
320 .fixup = tag_fixup_mem32, 320 .fixup = tag_fixup_mem32,
321 .restart = orion5x_restart,
321MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b35e2005a348..c96f37472eda 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
627 .init_early = orion5x_init_early, 627 .init_early = orion5x_init_early,
628 .init_irq = orion5x_init_irq, 628 .init_irq = orion5x_init_irq,
629 .timer = &orion5x_timer, 629 .timer = &orion5x_timer,
630 .restart = orion5x_restart,
630MACHINE_END 631MACHINE_END
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index b8be7d8d0cf4..078c03f7cd52 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
179 .init_irq = orion5x_init_irq, 179 .init_irq = orion5x_init_irq,
180 .timer = &orion5x_timer, 180 .timer = &orion5x_timer,
181 .fixup = tag_fixup_mem32, 181 .fixup = tag_fixup_mem32,
182 .restart = orion5x_restart,
182MACHINE_END 183MACHINE_END
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index faf81a039360..46a9778171ce 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
267 .init_irq = orion5x_init_irq, 267 .init_irq = orion5x_init_irq,
268 .timer = &orion5x_timer, 268 .timer = &orion5x_timer,
269 .fixup = tag_fixup_mem32, 269 .fixup = tag_fixup_mem32,
270 .restart = orion5x_restart,
270MACHINE_END 271MACHINE_END
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
index c550b6363488..e5ec4a8d9bcb 100644
--- a/arch/arm/mach-picoxcell/Makefile
+++ b/arch/arm/mach-picoxcell/Makefile
@@ -1,3 +1,2 @@
1obj-y := common.o 1obj-y := common.o
2obj-y += time.o 2obj-y += time.o
3obj-y += io.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 34d08347be5f..febee47bc116 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,16 +11,30 @@
11#include <linux/irqdomain.h> 11#include <linux/irqdomain.h>
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h> 13#include <linux/of_address.h>
14#include <linux/of_irq.h>
14#include <linux/of_platform.h> 15#include <linux/of_platform.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/hardware/vic.h> 18#include <asm/hardware/vic.h>
19#include <asm/mach/map.h>
18 20
19#include <mach/map.h> 21#include <mach/map.h>
20#include <mach/picoxcell_soc.h> 22#include <mach/picoxcell_soc.h>
21 23
22#include "common.h" 24#include "common.h"
23 25
26static struct map_desc io_map __initdata = {
27 .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
28 .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
29 .length = PICOXCELL_PERIPH_LENGTH,
30 .type = MT_DEVICE,
31};
32
33static void __init picoxcell_map_io(void)
34{
35 iotable_init(&io_map, 1);
36}
37
24static void __init picoxcell_init_machine(void) 38static void __init picoxcell_init_machine(void)
25{ 39{
26 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 40 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -33,22 +47,20 @@ static const char *picoxcell_dt_match[] = {
33}; 47};
34 48
35static const struct of_device_id vic_of_match[] __initconst = { 49static const struct of_device_id vic_of_match[] __initconst = {
36 { .compatible = "arm,pl192-vic" }, 50 { .compatible = "arm,pl192-vic", .data = vic_of_init, },
37 { /* Sentinel */ } 51 { /* Sentinel */ }
38}; 52};
39 53
40static void __init picoxcell_init_irq(void) 54static void __init picoxcell_init_irq(void)
41{ 55{
42 vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0); 56 of_irq_init(vic_of_match);
43 vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
44 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
45 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
46} 57}
47 58
48DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 59DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
49 .map_io = picoxcell_map_io, 60 .map_io = picoxcell_map_io,
50 .nr_irqs = ARCH_NR_IRQS, 61 .nr_irqs = NR_IRQS_LEGACY,
51 .init_irq = picoxcell_init_irq, 62 .init_irq = picoxcell_init_irq,
63 .handle_irq = vic_handle_irq,
52 .timer = &picoxcell_timer, 64 .timer = &picoxcell_timer,
53 .init_machine = picoxcell_init_machine, 65 .init_machine = picoxcell_init_machine,
54 .dt_compat = picoxcell_dt_match, 66 .dt_compat = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index 5263f0fa095c..83d55ab956a4 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -13,6 +13,5 @@
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14 14
15extern struct sys_timer picoxcell_timer; 15extern struct sys_timer picoxcell_timer;
16extern void picoxcell_map_io(void);
17 16
18#endif /* __PICOXCELL_COMMON_H__ */ 17#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
index a6b09f75d9df..9b505ac00be9 100644
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
@@ -9,11 +9,8 @@
9 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
11 */ 11 */
12#include <mach/hardware.h> 12 .macro disable_fiq
13#include <mach/irqs.h> 13 .endm
14#include <mach/map.h>
15 14
16#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) 15 .macro arch_ret_to_user, tmp1, tmp2
17#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) 16 .endm
18
19#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
index 4d13ed970919..59eac1ee2820 100644
--- a/arch/arm/mach-picoxcell/include/mach/irqs.h
+++ b/arch/arm/mach-picoxcell/include/mach/irqs.h
@@ -1,8 +1,6 @@
1/* 1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles 2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 * 3 *
4 * This file contains the hardware definitions of the picoXcell SoC devices.
5 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or 6 * the Free Software Foundation; either version 2 of the License, or
@@ -16,10 +14,7 @@
16#ifndef __MACH_IRQS_H 14#ifndef __MACH_IRQS_H
17#define __MACH_IRQS_H 15#define __MACH_IRQS_H
18 16
19#define ARCH_NR_IRQS 64 17/* We dynamically allocate our irq_desc's. */
20#define NR_IRQS (128 + ARCH_NR_IRQS) 18#define NR_IRQS 0
21
22#define IRQ_VIC0_BASE 0
23#define IRQ_VIC1_BASE 32
24 19
25#endif /* __MACH_IRQS_H */ 20#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/memory.h b/arch/arm/mach-picoxcell/include/mach/memory.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/memory.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
index 67c589b0c1bc..1a5d8cb57df4 100644
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ b/arch/arm/mach-picoxcell/include/mach/system.h
@@ -23,9 +23,4 @@ static inline void arch_idle(void)
23 cpu_do_idle(); 23 cpu_do_idle();
24} 24}
25 25
26static inline void arch_reset(int mode, const char *cmd)
27{
28 /* Watchdog reset to go here. */
29}
30
31#endif /* __ASM_ARCH_SYSTEM_H */ 26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/vmalloc.h b/arch/arm/mach-picoxcell/include/mach/vmalloc.h
deleted file mode 100644
index 0216cc4b1f0b..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-picoxcell/io.c b/arch/arm/mach-picoxcell/io.c
deleted file mode 100644
index 39e9b9e8cc37..000000000000
--- a/arch/arm/mach-picoxcell/io.c
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * All enquiries to support@picochip.com
9 */
10#include <linux/io.h>
11#include <linux/mm.h>
12#include <linux/module.h>
13#include <linux/of.h>
14
15#include <asm/mach/map.h>
16
17#include <mach/map.h>
18#include <mach/picoxcell_soc.h>
19
20#include "common.h"
21
22void __init picoxcell_map_io(void)
23{
24 struct map_desc io_map = {
25 .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
26 .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
27 .length = PICOXCELL_PERIPH_LENGTH,
28 .type = MT_DEVICE,
29 };
30
31 iotable_init(&io_map, 1);
32}
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
index 90a554ff4499..6c89cf8ab22e 100644
--- a/arch/arm/mach-picoxcell/time.c
+++ b/arch/arm/mach-picoxcell/time.c
@@ -11,7 +11,6 @@
11#include <linux/of.h> 11#include <linux/of.h>
12#include <linux/of_address.h> 12#include <linux/of_address.h>
13#include <linux/of_irq.h> 13#include <linux/of_irq.h>
14#include <linux/sched.h>
15 14
16#include <asm/mach/time.h> 15#include <asm/mach/time.h>
17#include <asm/sched_clock.h> 16#include <asm/sched_clock.h>
@@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer)
66 dw_apb_clocksource_register(cs); 65 dw_apb_clocksource_register(cs);
67} 66}
68 67
69static DEFINE_CLOCK_DATA(cd);
70static void __iomem *sched_io_base; 68static void __iomem *sched_io_base;
71 69
72unsigned long long notrace sched_clock(void) 70unsigned u32 notrace picoxcell_read_sched_clock(void)
73{ 71{
74 cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; 72 return __raw_readl(sched_io_base);
75
76 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
77}
78
79static void notrace picoxcell_update_sched_clock(void)
80{
81 cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
82
83 update_sched_clock(&cd, cyc, (u32)~0);
84} 73}
85 74
86static const struct of_device_id picoxcell_rtc_ids[] __initconst = { 75static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
@@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void)
100 timer_get_base_and_rate(sched_timer, &sched_io_base, &rate); 89 timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
101 of_node_put(sched_timer); 90 of_node_put(sched_timer);
102 91
103 init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate); 92 setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
104} 93}
105 94
106static const struct of_device_id picoxcell_timer_ids[] __initconst = { 95static const struct of_device_id picoxcell_timer_ids[] __initconst = {
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index cdb95e726f5c..4cfb40b2ec19 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -260,6 +260,11 @@ void __init pnx4008_map_io(void)
260 iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); 260 iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
261} 261}
262 262
263static void pnx4008_restart(char mode, const char *cmd)
264{
265 soft_restart(0);
266}
267
263extern struct sys_timer pnx4008_timer; 268extern struct sys_timer pnx4008_timer;
264 269
265MACHINE_START(PNX4008, "Philips PNX4008") 270MACHINE_START(PNX4008, "Philips PNX4008")
@@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008")
269 .init_irq = pnx4008_init_irq, 274 .init_irq = pnx4008_init_irq,
270 .init_machine = pnx4008_init, 275 .init_machine = pnx4008_init,
271 .timer = &pnx4008_timer, 276 .timer = &pnx4008_timer,
277 .restart = pnx4008_restart,
272MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 5dda2bb55f8d..60cfe7188091 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -21,18 +21,9 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28static void arch_idle(void) 24static void arch_idle(void)
29{ 25{
30 cpu_do_idle(); 26 cpu_do_idle();
31} 27}
32 28
33static inline void arch_reset(char mode, const char *cmd)
34{
35 cpu_reset(0);
36}
37
38#endif 29#endif
diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h
deleted file mode 100644
index 184913c71141..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-pnx4008/include/mach/vmalloc.h
3 *
4 * Author: Vitaly Wool <source@mvista.com>
5 *
6 * 2006 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12/*
13 * Just any arbitrary offset to the start of the vmalloc VM area: the
14 * current 8MB value just means that there will be a 8MB "hole" after the
15 * physical memory until the kernel virtual memory starts. That means that
16 * any out-of-bounds memory accesses will hopefully be caught.
17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
18 * area for the same reason. ;)
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 83e5d2128118..b28a930d4f8a 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer;
16 16
17extern void __init sirfsoc_of_irq_init(void); 17extern void __init sirfsoc_of_irq_init(void);
18extern void __init sirfsoc_of_clk_init(void); 18extern void __init sirfsoc_of_clk_init(void);
19extern void sirfsoc_restart(char, const char *);
19 20
20#ifndef CONFIG_DEBUG_LL 21#ifndef CONFIG_DEBUG_LL
21static inline void sirfsoc_map_lluart(void) {} 22static inline void sirfsoc_map_lluart(void) {}
diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h
index 66b1ae2e553f..6f243532570c 100644
--- a/arch/arm/mach-prima2/include/mach/map.h
+++ b/arch/arm/mach-prima2/include/mach/map.h
@@ -9,8 +9,10 @@
9#ifndef __MACH_PRIMA2_MAP_H__ 9#ifndef __MACH_PRIMA2_MAP_H__
10#define __MACH_PRIMA2_MAP_H__ 10#define __MACH_PRIMA2_MAP_H__
11 11
12#include <mach/vmalloc.h> 12#include <linux/const.h>
13 13
14#define SIRFSOC_VA(x) (VMALLOC_END + ((x) & 0x00FFF000)) 14#define SIRFSOC_VA_BASE _AC(0xFEC00000, UL)
15
16#define SIRFSOC_VA(x) (SIRFSOC_VA_BASE + ((x) & 0x00FFF000))
15 17
16#endif 18#endif
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
index 0dbd257ad16d..2c7d2a9d0c92 100644
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ b/arch/arm/mach-prima2/include/mach/system.h
@@ -9,21 +9,9 @@
9#ifndef __MACH_SYSTEM_H__ 9#ifndef __MACH_SYSTEM_H__
10#define __MACH_SYSTEM_H__ 10#define __MACH_SYSTEM_H__
11 11
12#include <linux/bitops.h>
13#include <mach/hardware.h>
14
15#define SIRFSOC_SYS_RST_BIT BIT(31)
16
17extern void __iomem *sirfsoc_rstc_base;
18
19static inline void arch_idle(void) 12static inline void arch_idle(void)
20{ 13{
21 cpu_do_idle(); 14 cpu_do_idle();
22} 15}
23 16
24static inline void arch_reset(char mode, const char *cmd)
25{
26 writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
27}
28
29#endif 17#endif
diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h
deleted file mode 100644
index c9f90fec78e3..000000000000
--- a/arch/arm/mach-prima2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/ach-prima2/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#ifndef __MACH_VMALLOC_H
10#define __MACH_VMALLOC_H
11
12#include <linux/const.h>
13
14#define VMALLOC_END _AC(0xFEC00000, UL)
15
16#endif
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index a12b689a8702..02b9c05ff990 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -40,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
40 .dma_zone_size = SZ_256M, 40 .dma_zone_size = SZ_256M,
41 .init_machine = sirfsoc_mach_init, 41 .init_machine = sirfsoc_mach_init,
42 .dt_compat = prima2cb_dt_match, 42 .dt_compat = prima2cb_dt_match,
43 .restart = sirfsoc_restart,
43MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 492cfa8d2610..762adb73ab7c 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev)
68 68
69 return 0; 69 return 0;
70} 70}
71
72#define SIRFSOC_SYS_RST_BIT BIT(31)
73
74void sirfsoc_restart(char mode, const char *cmd)
75{
76 writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
77}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 11f2223da576..5971c4653fd0 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3")
829 .timer = &pxa_timer, 829 .timer = &pxa_timer,
830 .init_machine = balloon3_init, 830 .init_machine = balloon3_init,
831 .atag_offset = 0x100, 831 .atag_offset = 0x100,
832 .restart = pxa_restart,
832MACHINE_END 833MACHINE_END
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 5516317b9e64..c91727d1fe09 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -153,5 +153,6 @@ MACHINE_START(CAPC7117,
153 .init_irq = pxa3xx_init_irq, 153 .init_irq = pxa3xx_init_irq,
154 .handle_irq = pxa3xx_handle_irq, 154 .handle_irq = pxa3xx_handle_irq,
155 .timer = &pxa_timer, 155 .timer = &pxa_timer,
156 .init_machine = capc7117_init 156 .init_machine = capc7117_init,
157 .restart = pxa_restart,
157MACHINE_END 158MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 9344a0e3ba8a..8fa4ad27edf3 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX")
524#ifdef CONFIG_PCI 524#ifdef CONFIG_PCI
525 .dma_zone_size = SZ_64M, 525 .dma_zone_size = SZ_64M,
526#endif 526#endif
527 .restart = pxa_restart,
527MACHINE_END 528MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 684acf6ed3d5..4b981b82d2a5 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module")
858 .timer = &pxa_timer, 858 .timer = &pxa_timer,
859 .init_machine = cm_x300_init, 859 .init_machine = cm_x300_init,
860 .fixup = cm_x300_fixup, 860 .fixup = cm_x300_fixup,
861 .restart = pxa_restart,
861MACHINE_END 862MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index f0fe9a51dfcc..29d5d541f602 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
313 .init_irq = pxa27x_init_irq, 313 .init_irq = pxa27x_init_irq,
314 .handle_irq = pxa27x_handle_irq, 314 .handle_irq = pxa27x_handle_irq,
315 .timer = &pxa_timer, 315 .timer = &pxa_timer,
316 .restart = pxa_restart,
316MACHINE_END 317MACHINE_END
317 318
318MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") 319MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
@@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
322 .init_irq = pxa27x_init_irq, 323 .init_irq = pxa27x_init_irq,
323 .handle_irq = pxa27x_handle_irq, 324 .handle_irq = pxa27x_handle_irq,
324 .timer = &pxa_timer, 325 .timer = &pxa_timer,
326 .restart = pxa_restart,
325MACHINE_END 327MACHINE_END
326 328
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 0a6222e20f9b..0846d210cb05 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
189 .init_irq = pxa3xx_init_irq, 189 .init_irq = pxa3xx_init_irq,
190 .handle_irq = pxa3xx_handle_irq, 190 .handle_irq = pxa3xx_handle_irq,
191 .timer = &pxa_timer, 191 .timer = &pxa_timer,
192 .restart = pxa_restart,
192MACHINE_END 193MACHINE_END
193 194
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 56ab7a634bca..6ad3359063af 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
259 .init_irq = pxa3xx_init_irq, 259 .init_irq = pxa3xx_init_irq,
260 .handle_irq = pxa3xx_handle_irq, 260 .handle_irq = pxa3xx_handle_irq,
261 .timer = &pxa_timer, 261 .timer = &pxa_timer,
262 .restart = pxa_restart,
262MACHINE_END 263MACHINE_END
263 264
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 3812ba0ff50c..66600f05e436 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -655,7 +655,7 @@ static void corgi_poweroff(void)
655 /* Green LED off tells the bootloader to halt */ 655 /* Green LED off tells the bootloader to halt */
656 gpio_set_value(CORGI_GPIO_LED_GREEN, 0); 656 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
657 657
658 arm_machine_restart('h', NULL); 658 pxa_restart('h', NULL);
659} 659}
660 660
661static void corgi_restart(char mode, const char *cmd) 661static void corgi_restart(char mode, const char *cmd)
@@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd)
664 /* Green LED on tells the bootloader to reboot */ 664 /* Green LED on tells the bootloader to reboot */
665 gpio_set_value(CORGI_GPIO_LED_GREEN, 1); 665 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
666 666
667 arm_machine_restart('h', cmd); 667 pxa_restart('h', cmd);
668} 668}
669 669
670static void __init corgi_init(void) 670static void __init corgi_init(void)
671{ 671{
672 pm_power_off = corgi_poweroff; 672 pm_power_off = corgi_poweroff;
673 arm_pm_restart = corgi_restart;
674 673
675 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 674 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
676 PCFR |= PCFR_OPDE; 675 PCFR |= PCFR_OPDE;
@@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi")
726 .handle_irq = pxa25x_handle_irq, 725 .handle_irq = pxa25x_handle_irq,
727 .init_machine = corgi_init, 726 .init_machine = corgi_init,
728 .timer = &pxa_timer, 727 .timer = &pxa_timer,
728 .restart = corgi_restart,
729MACHINE_END 729MACHINE_END
730#endif 730#endif
731 731
@@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd")
737 .handle_irq = pxa25x_handle_irq, 737 .handle_irq = pxa25x_handle_irq,
738 .init_machine = corgi_init, 738 .init_machine = corgi_init,
739 .timer = &pxa_timer, 739 .timer = &pxa_timer,
740 .restart = corgi_restart,
740MACHINE_END 741MACHINE_END
741#endif 742#endif
742 743
@@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky")
748 .handle_irq = pxa25x_handle_irq, 749 .handle_irq = pxa25x_handle_irq,
749 .init_machine = corgi_init, 750 .init_machine = corgi_init,
750 .timer = &pxa_timer, 751 .timer = &pxa_timer,
752 .restart = corgi_restart,
751MACHINE_END 753MACHINE_END
752#endif 754#endif
753 755
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 5e2cf39e9e4c..fb5a51d834e5 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726")
278 .handle_irq = pxa27x_handle_irq, 278 .handle_irq = pxa27x_handle_irq,
279 .init_machine = csb726_init, 279 .init_machine = csb726_init,
280 .timer = &pxa_timer, 280 .timer = &pxa_timer,
281 .restart = pxa_restart,
281MACHINE_END 282MACHINE_END
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 3358f4da2ec9..d80c0ba9a095 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270")
1305 .handle_irq = pxa27x_handle_irq, 1305 .handle_irq = pxa27x_handle_irq,
1306 .timer = &pxa_timer, 1306 .timer = &pxa_timer,
1307 .init_machine = em_x270_init, 1307 .init_machine = em_x270_init,
1308 .restart = pxa_restart,
1308MACHINE_END 1309MACHINE_END
1309 1310
1310MACHINE_START(EXEDA, "Compulab eXeda") 1311MACHINE_START(EXEDA, "Compulab eXeda")
@@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda")
1314 .handle_irq = pxa27x_handle_irq, 1315 .handle_irq = pxa27x_handle_irq,
1315 .timer = &pxa_timer, 1316 .timer = &pxa_timer,
1316 .init_machine = em_x270_init, 1317 .init_machine = em_x270_init,
1318 .restart = pxa_restart,
1317MACHINE_END 1319MACHINE_END
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index e556a1e3ff0f..f79a610c62fc 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330")
196 .fixup = eseries_fixup, 196 .fixup = eseries_fixup,
197 .init_machine = e330_init, 197 .init_machine = e330_init,
198 .timer = &pxa_timer, 198 .timer = &pxa_timer,
199 .restart = pxa_restart,
199MACHINE_END 200MACHINE_END
200#endif 201#endif
201 202
@@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350")
246 .fixup = eseries_fixup, 247 .fixup = eseries_fixup,
247 .init_machine = e350_init, 248 .init_machine = e350_init,
248 .timer = &pxa_timer, 249 .timer = &pxa_timer,
250 .restart = pxa_restart,
249MACHINE_END 251MACHINE_END
250#endif 252#endif
251 253
@@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400")
369 .fixup = eseries_fixup, 371 .fixup = eseries_fixup,
370 .init_machine = e400_init, 372 .init_machine = e400_init,
371 .timer = &pxa_timer, 373 .timer = &pxa_timer,
374 .restart = pxa_restart,
372MACHINE_END 375MACHINE_END
373#endif 376#endif
374 377
@@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740")
558 .fixup = eseries_fixup, 561 .fixup = eseries_fixup,
559 .init_machine = e740_init, 562 .init_machine = e740_init,
560 .timer = &pxa_timer, 563 .timer = &pxa_timer,
564 .restart = pxa_restart,
561MACHINE_END 565MACHINE_END
562#endif 566#endif
563 567
@@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750")
750 .fixup = eseries_fixup, 754 .fixup = eseries_fixup,
751 .init_machine = e750_init, 755 .init_machine = e750_init,
752 .timer = &pxa_timer, 756 .timer = &pxa_timer,
757 .restart = pxa_restart,
753MACHINE_END 758MACHINE_END
754#endif 759#endif
755 760
@@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800")
955 .fixup = eseries_fixup, 960 .fixup = eseries_fixup,
956 .init_machine = e800_init, 961 .init_machine = e800_init,
957 .timer = &pxa_timer, 962 .timer = &pxa_timer,
963 .restart = pxa_restart,
958MACHINE_END 964MACHINE_END
959#endif 965#endif
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 8308eee5a924..15ab2533667d 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780")
804 .handle_irq = pxa27x_handle_irq, 804 .handle_irq = pxa27x_handle_irq,
805 .timer = &pxa_timer, 805 .timer = &pxa_timer,
806 .init_machine = a780_init, 806 .init_machine = a780_init,
807 .restart = pxa_restart,
807MACHINE_END 808MACHINE_END
808#endif 809#endif
809 810
@@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680")
870 .handle_irq = pxa27x_handle_irq, 871 .handle_irq = pxa27x_handle_irq,
871 .timer = &pxa_timer, 872 .timer = &pxa_timer,
872 .init_machine = e680_init, 873 .init_machine = e680_init,
874 .restart = pxa_restart,
873MACHINE_END 875MACHINE_END
874#endif 876#endif
875 877
@@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200")
936 .handle_irq = pxa27x_handle_irq, 938 .handle_irq = pxa27x_handle_irq,
937 .timer = &pxa_timer, 939 .timer = &pxa_timer,
938 .init_machine = a1200_init, 940 .init_machine = a1200_init,
941 .restart = pxa_restart,
939MACHINE_END 942MACHINE_END
940#endif 943#endif
941 944
@@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910")
1127 .handle_irq = pxa27x_handle_irq, 1130 .handle_irq = pxa27x_handle_irq,
1128 .timer = &pxa_timer, 1131 .timer = &pxa_timer,
1129 .init_machine = a910_init, 1132 .init_machine = a910_init,
1133 .restart = pxa_restart,
1130MACHINE_END 1134MACHINE_END
1131#endif 1135#endif
1132 1136
@@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6")
1193 .handle_irq = pxa27x_handle_irq, 1197 .handle_irq = pxa27x_handle_irq,
1194 .timer = &pxa_timer, 1198 .timer = &pxa_timer,
1195 .init_machine = e6_init, 1199 .init_machine = e6_init,
1200 .restart = pxa_restart,
1196MACHINE_END 1201MACHINE_END
1197#endif 1202#endif
1198 1203
@@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2")
1233 .handle_irq = pxa27x_handle_irq, 1238 .handle_irq = pxa27x_handle_irq,
1234 .timer = &pxa_timer, 1239 .timer = &pxa_timer,
1235 .init_machine = e2_init, 1240 .init_machine = e2_init,
1241 .restart = pxa_restart,
1236MACHINE_END 1242MACHINE_END
1237#endif 1243#endif
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 92a2e85ab02c..0d729e6619df 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info);
57void __init pxa_set_btuart_info(void *info); 57void __init pxa_set_btuart_info(void *info);
58void __init pxa_set_stuart_info(void *info); 58void __init pxa_set_stuart_info(void *info);
59void __init pxa_set_hwuart_info(void *info); 59void __init pxa_set_hwuart_info(void *info);
60
61void pxa_restart(char, const char *);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ffdd70dad327..ac3b1cef4751 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix")
239 .handle_irq = pxa25x_handle_irq, 239 .handle_irq = pxa25x_handle_irq,
240 .timer = &pxa_timer, 240 .timer = &pxa_timer,
241 .init_machine = gumstix_init, 241 .init_machine = gumstix_init,
242 .restart = pxa_restart,
242MACHINE_END 243MACHINE_END
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 4b5e110640b1..fde6b4c873c4 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000")
209 .handle_irq = pxa25x_handle_irq, 209 .handle_irq = pxa25x_handle_irq,
210 .timer = &pxa_timer, 210 .timer = &pxa_timer,
211 .init_machine = h5000_init, 211 .init_machine = h5000_init,
212 .restart = pxa_restart,
212MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index f2c324570844..26d069a9f900 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya")
164 .handle_irq = pxa25x_handle_irq, 164 .handle_irq = pxa25x_handle_irq,
165 .init_machine = himalaya_init, 165 .init_machine = himalaya_init,
166 .timer = &pxa_timer, 166 .timer = &pxa_timer,
167 .restart = pxa_restart,
167MACHINE_END 168MACHINE_END
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 82e9976e5657..fb9b62dcf4ca 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700")
845 .handle_irq = pxa27x_handle_irq, 845 .handle_irq = pxa27x_handle_irq,
846 .init_machine = hx4700_init, 846 .init_machine = hx4700_init,
847 .timer = &pxa_timer, 847 .timer = &pxa_timer,
848 .restart = pxa_restart,
848MACHINE_END 849MACHINE_END
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index 33e81e87a9da..67400192ed3b 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
196 .init_irq = pxa3xx_init_irq, 196 .init_irq = pxa3xx_init_irq,
197 .handle_irq = pxa3xx_handle_irq, 197 .handle_irq = pxa3xx_handle_irq,
198 .timer = &pxa_timer, 198 .timer = &pxa_timer,
199 .init_machine = icontrol_init 199 .init_machine = icontrol_init,
200 .restart = pxa_restart,
200MACHINE_END 201MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index bb98ff57b71f..8af1840e12cc 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
199 .handle_irq = pxa25x_handle_irq, 199 .handle_irq = pxa25x_handle_irq,
200 .timer = &pxa_timer, 200 .timer = &pxa_timer,
201 .init_machine = idp_init, 201 .init_machine = idp_init,
202 .restart = pxa_restart,
202MACHINE_END 203MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index a73bc86a3c26..260c0c17692a 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -7,45 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/irqs.h>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
16 .macro get_irqnr_preamble, base, tmp
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 15 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
24 mov \tmp, \tmp, lsr #13
25 and \tmp, \tmp, #0x7 @ Core G
26 cmp \tmp, #1
27 bhi 1002f
28
29 @ Core Generation 1 (PXA25x)
30 mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
31 add \base, \base, #0x00d00000
32 ldr \irqstat, [\base, #0] @ ICIP
33 ldr \irqnr, [\base, #4] @ ICMR
34
35 ands \irqnr, \irqstat, \irqnr
36 beq 1001f
37 rsb \irqstat, \irqnr, #0
38 and \irqstat, \irqstat, \irqnr
39 clz \irqnr, \irqstat
40 rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
41 b 1001f
421002:
43 @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
44 mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP
45 tst \irqstat, #0x80000000
46 beq 1001f
47 bic \irqstat, \irqstat, #0x80000000
48 mov \irqnr, \irqstat, lsr #16
49 add \irqnr, \irqnr, #(PXA_IRQ(0))
501001:
51 .endm
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
index d1fce8b6d105..c5afacd3cc0b 100644
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ b/arch/arm/mach-pxa/include/mach/system.h
@@ -9,15 +9,7 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12
13#include <asm/proc-fns.h>
14#include "hardware.h"
15#include "pxa2xx-regs.h"
16
17static inline void arch_idle(void) 12static inline void arch_idle(void)
18{ 13{
19 cpu_do_idle(); 14 cpu_do_idle();
20} 15}
21
22
23void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h
deleted file mode 100644
index bfecfbf5f460..000000000000
--- a/arch/arm/mach-pxa/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/vmalloc.h
3 *
4 * Author: Nicolas Pitre
5 * Copyright: (C) 2001 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define VMALLOC_END (0xe8000000UL)
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index d21e28b46d81..1fb86edb857c 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto
445 .handle_irq = pxa3xx_handle_irq, 445 .handle_irq = pxa3xx_handle_irq,
446 .timer = &pxa_timer, 446 .timer = &pxa_timer,
447 .init_machine = littleton_init, 447 .init_machine = littleton_init,
448 .restart = pxa_restart,
448MACHINE_END 449MACHINE_END
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 565dd2f2eaa2..cee9ce2fc0b5 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
505 .handle_irq = pxa27x_handle_irq, 505 .handle_irq = pxa27x_handle_irq,
506 .timer = &pxa_timer, 506 .timer = &pxa_timer,
507 .init_machine = lpd270_init, 507 .init_machine = lpd270_init,
508 .restart = pxa_restart,
508MACHINE_END 509MACHINE_END
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 2fb2b50831d1..6ebd276aebeb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
556 .handle_irq = pxa25x_handle_irq, 556 .handle_irq = pxa25x_handle_irq,
557 .timer = &pxa_timer, 557 .timer = &pxa_timer,
558 .init_machine = lubbock_init, 558 .init_machine = lubbock_init,
559 .restart = pxa_restart,
559MACHINE_END 560MACHINE_END
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index e340ea084248..3d6baf91396c 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician")
760 .handle_irq = pxa27x_handle_irq, 760 .handle_irq = pxa27x_handle_irq,
761 .init_machine = magician_init, 761 .init_machine = magician_init,
762 .timer = &pxa_timer, 762 .timer = &pxa_timer,
763 .restart = pxa_restart,
763MACHINE_END 764MACHINE_END
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index ea62a990ae4b..1aebaf719462 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
622 .handle_irq = pxa27x_handle_irq, 622 .handle_irq = pxa27x_handle_irq,
623 .timer = &pxa_timer, 623 .timer = &pxa_timer,
624 .init_machine = mainstone_init, 624 .init_machine = mainstone_init,
625 .restart = pxa_restart,
625MACHINE_END 626MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 23f90c74c191..6518a30ece8e 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -696,13 +696,13 @@ static void mioa701_machine_exit(void);
696static void mioa701_poweroff(void) 696static void mioa701_poweroff(void)
697{ 697{
698 mioa701_machine_exit(); 698 mioa701_machine_exit();
699 arm_machine_restart('s', NULL); 699 pxa_restart('s', NULL);
700} 700}
701 701
702static void mioa701_restart(char c, const char *cmd) 702static void mioa701_restart(char c, const char *cmd)
703{ 703{
704 mioa701_machine_exit(); 704 mioa701_machine_exit();
705 arm_machine_restart('s', cmd); 705 pxa_restart('s', cmd);
706} 706}
707 707
708static struct gpio global_gpios[] = { 708static struct gpio global_gpios[] = {
@@ -734,7 +734,6 @@ static void __init mioa701_machine_init(void)
734 pxa_set_udc_info(&mioa701_udc_info); 734 pxa_set_udc_info(&mioa701_udc_info);
735 pxa_set_ac97_info(&mioa701_ac97_info); 735 pxa_set_ac97_info(&mioa701_ac97_info);
736 pm_power_off = mioa701_poweroff; 736 pm_power_off = mioa701_poweroff;
737 arm_pm_restart = mioa701_restart;
738 platform_add_devices(devices, ARRAY_SIZE(devices)); 737 platform_add_devices(devices, ARRAY_SIZE(devices));
739 gsm_init(); 738 gsm_init();
740 739
@@ -752,9 +751,11 @@ static void mioa701_machine_exit(void)
752 751
753MACHINE_START(MIOA701, "MIO A701") 752MACHINE_START(MIOA701, "MIO A701")
754 .atag_offset = 0x100, 753 .atag_offset = 0x100,
754 .restart_mode = 's',
755 .map_io = &pxa27x_map_io, 755 .map_io = &pxa27x_map_io,
756 .init_irq = &pxa27x_init_irq, 756 .init_irq = &pxa27x_init_irq,
757 .handle_irq = &pxa27x_handle_irq, 757 .handle_irq = &pxa27x_handle_irq,
758 .init_machine = mioa701_machine_init, 758 .init_machine = mioa701_machine_init,
759 .timer = &pxa_timer, 759 .timer = &pxa_timer,
760 .restart = mioa701_restart,
760MACHINE_END 761MACHINE_END
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 4af5d513c380..169bf8f97af0 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
98 .init_irq = pxa25x_init_irq, 98 .init_irq = pxa25x_init_irq,
99 .handle_irq = pxa25x_handle_irq, 99 .handle_irq = pxa25x_handle_irq,
100 .init_machine = mp900c_init, 100 .init_machine = mp900c_init,
101 .restart = pxa_restart,
101MACHINE_END 102MACHINE_END
102 103
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 3d4a2819cae1..1fa80f4f80c8 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive")
347 .init_irq = pxa27x_init_irq, 347 .init_irq = pxa27x_init_irq,
348 .handle_irq = pxa27x_handle_irq, 348 .handle_irq = pxa27x_handle_irq,
349 .timer = &pxa_timer, 349 .timer = &pxa_timer,
350 .init_machine = palmld_init 350 .init_machine = palmld_init,
351 .restart = pxa_restart,
351MACHINE_END 352MACHINE_END
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 99d6bcf1f974..5ba14316bd9c 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
208 .init_irq = pxa27x_init_irq, 208 .init_irq = pxa27x_init_irq,
209 .handle_irq = pxa27x_handle_irq, 209 .handle_irq = pxa27x_handle_irq,
210 .timer = &pxa_timer, 210 .timer = &pxa_timer,
211 .init_machine = palmt5_init 211 .init_machine = palmt5_init,
212 .restart = pxa_restart,
212MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 2c24c67fd92b..29b51b40f09d 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C")
542 .init_irq = pxa25x_init_irq, 542 .init_irq = pxa25x_init_irq,
543 .handle_irq = pxa25x_handle_irq, 543 .handle_irq = pxa25x_handle_irq,
544 .timer = &pxa_timer, 544 .timer = &pxa_timer,
545 .init_machine = palmtc_init 545 .init_machine = palmtc_init,
546 .restart = pxa_restart,
546MACHINE_END 547MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 9376da06404c..5ebf49acb827 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2")
361 .init_irq = pxa25x_init_irq, 361 .init_irq = pxa25x_init_irq,
362 .handle_irq = pxa25x_handle_irq, 362 .handle_irq = pxa25x_handle_irq,
363 .timer = &pxa_timer, 363 .timer = &pxa_timer,
364 .init_machine = palmte2_init 364 .init_machine = palmte2_init,
365 .restart = pxa_restart,
365MACHINE_END 366MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 94e9708b349d..ec8249156c08 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
452 .handle_irq = pxa27x_handle_irq, 452 .handle_irq = pxa27x_handle_irq,
453 .timer = &pxa_timer, 453 .timer = &pxa_timer,
454 .init_machine = treo680_init, 454 .init_machine = treo680_init,
455 .restart = pxa_restart,
455MACHINE_END 456MACHINE_END
456#endif 457#endif
457 458
@@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685")
464 .handle_irq = pxa27x_handle_irq, 465 .handle_irq = pxa27x_handle_irq,
465 .timer = &pxa_timer, 466 .timer = &pxa_timer,
466 .init_machine = centro_init, 467 .init_machine = centro_init,
468 .restart = pxa_restart,
467MACHINE_END 469MACHINE_END
468#endif 470#endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 4e3e45927e95..6170d76dfba8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X")
369 .init_irq = pxa27x_init_irq, 369 .init_irq = pxa27x_init_irq,
370 .handle_irq = pxa27x_handle_irq, 370 .handle_irq = pxa27x_handle_irq,
371 .timer = &pxa_timer, 371 .timer = &pxa_timer,
372 .init_machine = palmtx_init 372 .init_machine = palmtx_init,
373 .restart = pxa_restart,
373MACHINE_END 374MACHINE_END
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 68e18baf8e07..b2dff9d415eb 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72")
404 .init_irq = pxa27x_init_irq, 404 .init_irq = pxa27x_init_irq,
405 .handle_irq = pxa27x_handle_irq, 405 .handle_irq = pxa27x_handle_irq,
406 .timer = &pxa_timer, 406 .timer = &pxa_timer,
407 .init_machine = palmz72_init 407 .init_machine = palmz72_init,
408 .restart = pxa_restart,
408MACHINE_END 409MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 0b825a353537..fe9054435b6f 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
265 .handle_irq = pxa27x_handle_irq, 265 .handle_irq = pxa27x_handle_irq,
266 .timer = &pxa_timer, 266 .timer = &pxa_timer,
267 .init_machine = pcm027_init, 267 .init_machine = pcm027_init,
268 .restart = pxa_restart,
268MACHINE_END 269MACHINE_END
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 8ee4b6cfa385..69036e42ca31 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -417,12 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = {
417 417
418static void poodle_poweroff(void) 418static void poodle_poweroff(void)
419{ 419{
420 arm_machine_restart('h', NULL); 420 pxa_restart('h', NULL);
421}
422
423static void poodle_restart(char mode, const char *cmd)
424{
425 arm_machine_restart('h', cmd);
426} 421}
427 422
428static void __init poodle_init(void) 423static void __init poodle_init(void)
@@ -430,7 +425,6 @@ static void __init poodle_init(void)
430 int ret = 0; 425 int ret = 0;
431 426
432 pm_power_off = poodle_poweroff; 427 pm_power_off = poodle_poweroff;
433 arm_pm_restart = poodle_restart;
434 428
435 PCFR |= PCFR_OPDE; 429 PCFR |= PCFR_OPDE;
436 430
@@ -472,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle")
472 .handle_irq = pxa25x_handle_irq, 466 .handle_irq = pxa25x_handle_irq,
473 .timer = &pxa_timer, 467 .timer = &pxa_timer,
474 .init_machine = poodle_init, 468 .init_machine = poodle_init,
469 .restart = pxa_restart,
475MACHINE_END 470MACHINE_END
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 78d643783f99..22818c7694a8 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1093 .init_irq = pxa3xx_init_irq, 1093 .init_irq = pxa3xx_init_irq,
1094 .handle_irq = pxa3xx_handle_irq, 1094 .handle_irq = pxa3xx_handle_irq,
1095 .timer = &pxa_timer, 1095 .timer = &pxa_timer,
1096 .restart = pxa_restart,
1096MACHINE_END 1097MACHINE_END
1097#endif 1098#endif
1098 1099
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1104 .init_irq = pxa3xx_init_irq, 1105 .init_irq = pxa3xx_init_irq,
1105 .handle_irq = pxa3xx_handle_irq, 1106 .handle_irq = pxa3xx_handle_irq,
1106 .timer = &pxa_timer, 1107 .timer = &pxa_timer,
1108 .restart = pxa_restart,
1107MACHINE_END 1109MACHINE_END
1108#endif 1110#endif
1109 1111
@@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1115 .init_irq = pxa3xx_init_irq, 1117 .init_irq = pxa3xx_init_irq,
1116 .handle_irq = pxa3xx_handle_irq, 1118 .handle_irq = pxa3xx_handle_irq,
1117 .timer = &pxa_timer, 1119 .timer = &pxa_timer,
1120 .restart = pxa_restart,
1118MACHINE_END 1121MACHINE_END
1119#endif 1122#endif
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 01e9d643394a..c8497b00cdfe 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -81,14 +81,17 @@ static void do_hw_reset(void)
81 OSMR3 = OSCR + 368640; /* ... in 100 ms */ 81 OSMR3 = OSCR + 368640; /* ... in 100 ms */
82} 82}
83 83
84void arch_reset(char mode, const char *cmd) 84void pxa_restart(char mode, const char *cmd)
85{ 85{
86 local_irq_disable();
87 local_fiq_disable();
88
86 clear_reset_status(RESET_STATUS_ALL); 89 clear_reset_status(RESET_STATUS_ALL);
87 90
88 switch (mode) { 91 switch (mode) {
89 case 's': 92 case 's':
90 /* Jump into ROM at address 0 */ 93 /* Jump into ROM at address 0 */
91 cpu_reset(0); 94 soft_restart(0);
92 break; 95 break;
93 case 'g': 96 case 'g':
94 do_gpio_reset(); 97 do_gpio_reset();
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 423ec899a8a8..0fe354efb931 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
602 .handle_irq = pxa3xx_handle_irq, 602 .handle_irq = pxa3xx_handle_irq,
603 .timer = &pxa_timer, 603 .timer = &pxa_timer,
604 .init_machine = saar_init, 604 .init_machine = saar_init,
605 .restart = pxa_restart,
605MACHINE_END 606MACHINE_END
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index d1cdd6a081ed..febc809ed5a6 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
111 .handle_irq = pxa3xx_handle_irq, 111 .handle_irq = pxa3xx_handle_irq,
112 .timer = &pxa_timer, 112 .timer = &pxa_timer,
113 .init_machine = saarb_init, 113 .init_machine = saarb_init,
114 .restart = pxa_restart,
114MACHINE_END 115MACHINE_END
115 116
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 1b39cec03cce..abf355d0c92f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {}
926 ******************************************************************************/ 926 ******************************************************************************/
927static void spitz_poweroff(void) 927static void spitz_poweroff(void)
928{ 928{
929 arm_machine_restart('g', NULL); 929 pxa_restart('g', NULL);
930} 930}
931 931
932static void spitz_restart(char mode, const char *cmd) 932static void spitz_restart(char mode, const char *cmd)
@@ -943,7 +943,6 @@ static void __init spitz_init(void)
943{ 943{
944 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); 944 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
945 pm_power_off = spitz_poweroff; 945 pm_power_off = spitz_poweroff;
946 arm_pm_restart = spitz_restart;
947 946
948 PMCR = 0x00; 947 PMCR = 0x00;
949 948
@@ -982,33 +981,39 @@ static void __init spitz_fixup(struct tag *tags, char **cmdline,
982 981
983#ifdef CONFIG_MACH_SPITZ 982#ifdef CONFIG_MACH_SPITZ
984MACHINE_START(SPITZ, "SHARP Spitz") 983MACHINE_START(SPITZ, "SHARP Spitz")
984 .restart_mode = 'g',
985 .fixup = spitz_fixup, 985 .fixup = spitz_fixup,
986 .map_io = pxa27x_map_io, 986 .map_io = pxa27x_map_io,
987 .init_irq = pxa27x_init_irq, 987 .init_irq = pxa27x_init_irq,
988 .handle_irq = pxa27x_handle_irq, 988 .handle_irq = pxa27x_handle_irq,
989 .init_machine = spitz_init, 989 .init_machine = spitz_init,
990 .timer = &pxa_timer, 990 .timer = &pxa_timer,
991 .restart = spitz_restart,
991MACHINE_END 992MACHINE_END
992#endif 993#endif
993 994
994#ifdef CONFIG_MACH_BORZOI 995#ifdef CONFIG_MACH_BORZOI
995MACHINE_START(BORZOI, "SHARP Borzoi") 996MACHINE_START(BORZOI, "SHARP Borzoi")
997 .restart_mode = 'g',
996 .fixup = spitz_fixup, 998 .fixup = spitz_fixup,
997 .map_io = pxa27x_map_io, 999 .map_io = pxa27x_map_io,
998 .init_irq = pxa27x_init_irq, 1000 .init_irq = pxa27x_init_irq,
999 .handle_irq = pxa27x_handle_irq, 1001 .handle_irq = pxa27x_handle_irq,
1000 .init_machine = spitz_init, 1002 .init_machine = spitz_init,
1001 .timer = &pxa_timer, 1003 .timer = &pxa_timer,
1004 .restart = spitz_restart,
1002MACHINE_END 1005MACHINE_END
1003#endif 1006#endif
1004 1007
1005#ifdef CONFIG_MACH_AKITA 1008#ifdef CONFIG_MACH_AKITA
1006MACHINE_START(AKITA, "SHARP Akita") 1009MACHINE_START(AKITA, "SHARP Akita")
1010 .restart_mode = 'g',
1007 .fixup = spitz_fixup, 1011 .fixup = spitz_fixup,
1008 .map_io = pxa27x_map_io, 1012 .map_io = pxa27x_map_io,
1009 .init_irq = pxa27x_init_irq, 1013 .init_irq = pxa27x_init_irq,
1010 .handle_irq = pxa27x_handle_irq, 1014 .handle_irq = pxa27x_handle_irq,
1011 .init_machine = spitz_init, 1015 .init_machine = spitz_init,
1012 .timer = &pxa_timer, 1016 .timer = &pxa_timer,
1017 .restart = spitz_restart,
1013MACHINE_END 1018MACHINE_END
1014#endif 1019#endif
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 940ca56b37f9..d8a2467de92e 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2")
1005 .timer = &pxa_timer, 1005 .timer = &pxa_timer,
1006 .init_machine = imote2_init, 1006 .init_machine = imote2_init,
1007 .atag_offset = 0x100, 1007 .atag_offset = 0x100,
1008 .restart = pxa_restart,
1008MACHINE_END 1009MACHINE_END
1009#endif 1010#endif
1010 1011
@@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2")
1017 .timer = &pxa_timer, 1018 .timer = &pxa_timer,
1018 .init_machine = stargate2_init, 1019 .init_machine = stargate2_init,
1019 .atag_offset = 0x100, 1020 .atag_offset = 0x100,
1021 .restart = pxa_restart,
1020MACHINE_END 1022MACHINE_END
1021#endif 1023#endif
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 43bdcb9761f2..9fb38e80e076 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
495 .handle_irq = pxa3xx_handle_irq, 495 .handle_irq = pxa3xx_handle_irq,
496 .timer = &pxa_timer, 496 .timer = &pxa_timer,
497 .init_machine = tavorevb_init, 497 .init_machine = tavorevb_init,
498 .restart = pxa_restart,
498MACHINE_END 499MACHINE_END
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index 46c60b3cbe79..f7d9305cfd77 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
132 .handle_irq = pxa3xx_handle_irq, 132 .handle_irq = pxa3xx_handle_irq,
133 .timer = &pxa_timer, 133 .timer = &pxa_timer,
134 .init_machine = evb3_init, 134 .init_machine = evb3_init,
135 .restart = pxa_restart,
135MACHINE_END 136MACHINE_END
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index de684701449c..b503049d6d26 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -16,7 +16,6 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/clockchips.h> 18#include <linux/clockchips.h>
19#include <linux/sched.h>
20 19
21#include <asm/div64.h> 20#include <asm/div64.h>
22#include <asm/mach/irq.h> 21#include <asm/mach/irq.h>
@@ -32,18 +31,10 @@
32 * long as there is always less than 582 seconds between successive 31 * long as there is always less than 582 seconds between successive
33 * calls to sched_clock() which should always be the case in practice. 32 * calls to sched_clock() which should always be the case in practice.
34 */ 33 */
35static DEFINE_CLOCK_DATA(cd);
36 34
37unsigned long long notrace sched_clock(void) 35static u32 notrace pxa_read_sched_clock(void)
38{ 36{
39 u32 cyc = OSCR; 37 return OSCR;
40 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
41}
42
43static void notrace pxa_update_sched_clock(void)
44{
45 u32 cyc = OSCR;
46 update_sched_clock(&cd, cyc, (u32)~0);
47} 38}
48 39
49 40
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void)
119 OIER = 0; 110 OIER = 0;
120 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; 111 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
121 112
122 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); 113 setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
123 114
124 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); 115 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
125 ckevt_pxa_osmr0.max_delta_ns = 116 ckevt_pxa_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 1ddb9826448a..7ce5c436cc4e 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = {
905 905
906static void tosa_poweroff(void) 906static void tosa_poweroff(void)
907{ 907{
908 arm_machine_restart('g', NULL); 908 pxa_restart('g', NULL);
909} 909}
910 910
911static void tosa_restart(char mode, const char *cmd) 911static void tosa_restart(char mode, const char *cmd)
@@ -935,7 +935,6 @@ static void __init tosa_init(void)
935 init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); 935 init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
936 936
937 pm_power_off = tosa_poweroff; 937 pm_power_off = tosa_poweroff;
938 arm_pm_restart = tosa_restart;
939 938
940 PCFR |= PCFR_OPDE; 939 PCFR |= PCFR_OPDE;
941 940
@@ -970,6 +969,7 @@ static void __init fixup_tosa(struct tag *tags, char **cmdline,
970} 969}
971 970
972MACHINE_START(TOSA, "SHARP Tosa") 971MACHINE_START(TOSA, "SHARP Tosa")
972 .restart_mode = 'g',
973 .fixup = fixup_tosa, 973 .fixup = fixup_tosa,
974 .map_io = pxa25x_map_io, 974 .map_io = pxa25x_map_io,
975 .nr_irqs = TOSA_NR_IRQS, 975 .nr_irqs = TOSA_NR_IRQS,
@@ -977,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa")
977 .handle_irq = pxa25x_handle_irq, 977 .handle_irq = pxa25x_handle_irq,
978 .init_machine = tosa_init, 978 .init_machine = tosa_init,
979 .timer = &pxa_timer, 979 .timer = &pxa_timer,
980 .restart = tosa_restart,
980MACHINE_END 981MACHINE_END
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 1aaed2b17e10..0f30af617d8f 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
561 .init_irq = pxa27x_init_irq, 561 .init_irq = pxa27x_init_irq,
562 .handle_irq = pxa27x_handle_irq, 562 .handle_irq = pxa27x_handle_irq,
563 .timer = &pxa_timer, 563 .timer = &pxa_timer,
564 .restart = pxa_restart,
564MACHINE_END 565MACHINE_END
565 566
566MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") 567MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
@@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
571 .init_irq = pxa27x_init_irq, 572 .init_irq = pxa27x_init_irq,
572 .handle_irq = pxa27x_handle_irq, 573 .handle_irq = pxa27x_handle_irq,
573 .timer = &pxa_timer, 574 .timer = &pxa_timer,
575 .restart = pxa_restart,
574MACHINE_END 576MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index d9a653a77176..023d6ca789de 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
998 .handle_irq = pxa25x_handle_irq, 998 .handle_irq = pxa25x_handle_irq,
999 .timer = &pxa_timer, 999 .timer = &pxa_timer,
1000 .init_machine = viper_init, 1000 .init_machine = viper_init,
1001 .restart = pxa_restart,
1001MACHINE_END 1002MACHINE_END
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 9edeec65f6a3..1f5cfa96f6d6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270")
721 .init_irq = pxa27x_init_irq, 721 .init_irq = pxa27x_init_irq,
722 .handle_irq = pxa27x_handle_irq, 722 .handle_irq = pxa27x_handle_irq,
723 .timer = &pxa_timer, 723 .timer = &pxa_timer,
724 .init_machine = vpac270_init 724 .init_machine = vpac270_init,
725 .restart = pxa_restart,
725MACHINE_END 726MACHINE_END
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 70e1730ef282..4bbe9a36fe74 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP")
185 .init_irq = pxa25x_init_irq, 185 .init_irq = pxa25x_init_irq,
186 .handle_irq = pxa25x_handle_irq, 186 .handle_irq = pxa25x_handle_irq,
187 .timer = &pxa_timer, 187 .timer = &pxa_timer,
188 .restart = pxa_restart,
188MACHINE_END 189MACHINE_END
189 190
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 424661833ce2..b6476848b561 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2")
725 .handle_irq = pxa27x_handle_irq, 725 .handle_irq = pxa27x_handle_irq,
726 .timer = &pxa_timer, 726 .timer = &pxa_timer,
727 .init_machine = z2_init, 727 .init_machine = z2_init,
728 .restart = pxa_restart,
728MACHINE_END 729MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 68de9c17e4c5..a4dd1c347050 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
911 .handle_irq = pxa27x_handle_irq, 911 .handle_irq = pxa27x_handle_irq,
912 .timer = &pxa_timer, 912 .timer = &pxa_timer,
913 .init_machine = zeus_init, 913 .init_machine = zeus_init,
914 .restart = pxa_restart,
914MACHINE_END 915MACHINE_END
915 916
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index a4c807527095..98eec80623e3 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
430 .handle_irq = pxa3xx_handle_irq, 430 .handle_irq = pxa3xx_handle_irq,
431 .timer = &pxa_timer, 431 .timer = &pxa_timer,
432 .init_machine = zylonite_init, 432 .init_machine = zylonite_init,
433 .restart = pxa_restart,
433MACHINE_END 434MACHINE_END
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index dba6d0c1fc17..c593be428b8f 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP
12 bool "Support Multicore Cortex-A9 Tile" 12 bool "Support Multicore Cortex-A9 Tile"
13 depends on MACH_REALVIEW_EB 13 depends on MACH_REALVIEW_EB
14 select CPU_V7 14 select CPU_V7
15 select HAVE_SMP
16 select MIGHT_HAVE_CACHE_L2X0
15 help 17 help
16 Enable support for the Cortex-A9MPCore tile fitted to the 18 Enable support for the Cortex-A9MPCore tile fitted to the
17 Realview(R) Emulation Baseboard platform. 19 Realview(R) Emulation Baseboard platform.
@@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP
21 depends on MACH_REALVIEW_EB 23 depends on MACH_REALVIEW_EB
22 select CPU_V6K 24 select CPU_V6K
23 select ARCH_HAS_BARRIERS if SMP 25 select ARCH_HAS_BARRIERS if SMP
26 select HAVE_SMP
27 select MIGHT_HAVE_CACHE_L2X0
24 help 28 help
25 Enable support for the ARM11MPCore tile fitted to the Realview(R) 29 Enable support for the ARM11MPCore tile fitted to the Realview(R)
26 Emulation Baseboard platform. 30 Emulation Baseboard platform.
@@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP
39 select CPU_V6K 43 select CPU_V6K
40 select ARM_GIC 44 select ARM_GIC
41 select HAVE_PATA_PLATFORM 45 select HAVE_PATA_PLATFORM
46 select HAVE_SMP
47 select MIGHT_HAVE_CACHE_L2X0
42 select ARCH_HAS_BARRIERS if SMP 48 select ARCH_HAS_BARRIERS if SMP
43 help 49 help
44 Include support for the ARM(R) RealView(R) Platform Baseboard for 50 Include support for the ARM(R) RealView(R) Platform Baseboard for
@@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176
51 select CPU_V6 57 select CPU_V6
52 select ARM_GIC 58 select ARM_GIC
53 select HAVE_TCM 59 select HAVE_TCM
60 select MIGHT_HAVE_CACHE_L2X0
54 help 61 help
55 Include support for the ARM(R) RealView(R) Platform Baseboard for 62 Include support for the ARM(R) RealView(R) Platform Baseboard for
56 ARM1176JZF-S. 63 ARM1176JZF-S.
@@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX
78 bool "Support RealView(R) Platform Baseboard Explore" 85 bool "Support RealView(R) Platform Baseboard Explore"
79 select ARM_GIC 86 select ARM_GIC
80 select HAVE_PATA_PLATFORM 87 select HAVE_PATA_PLATFORM
88 select HAVE_SMP
89 select MIGHT_HAVE_CACHE_L2X0
81 select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET 90 select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
82 select ZONE_DMA if SPARSEMEM 91 select ZONE_DMA if SPARSEMEM
83 help 92 help
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 47259c89a75e..735b57aaf2d6 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res);
65extern void realview_init_early(void); 65extern void realview_init_early(void);
66extern void realview_fixup(struct tag *tags, char **from, 66extern void realview_fixup(struct tag *tags, char **from,
67 struct meminfo *meminfo); 67 struct meminfo *meminfo);
68extern void (*realview_reset)(char);
69 68
70#endif 69#endif
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4071164aebaa..e8a5179c2653 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -7,8 +7,6 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <asm/hardware/entry-macro-gic.S>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 6657ff231161..471b671159ce 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -21,12 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28void (*realview_reset)(char mode);
29
30static inline void arch_idle(void) 24static inline void arch_idle(void)
31{ 25{
32 /* 26 /*
@@ -36,15 +30,4 @@ static inline void arch_idle(void)
36 cpu_do_idle(); 30 cpu_do_idle();
37} 31}
38 32
39static inline void arch_reset(char mode, const char *cmd)
40{
41 /*
42 * To reset, we hit the on-board reset register
43 * in the system FPGA
44 */
45 if (realview_reset)
46 realview_reset(mode);
47 dsb();
48}
49
50#endif 33#endif
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
deleted file mode 100644
index a2a4c6861407..000000000000
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 026c66ad7ec2..f92a920cf507 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -91,8 +91,8 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
91 91
92static struct map_desc realview_eb11mp_io_desc[] __initdata = { 92static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93 { 93 {
94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE), 94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE), 95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
96 .length = SZ_4K, 96 .length = SZ_4K,
97 .type = MT_DEVICE, 97 .type = MT_DEVICE,
98 }, { 98 }, {
@@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = {
415 .init = realview_eb_timer_init, 415 .init = realview_eb_timer_init,
416}; 416};
417 417
418static void realview_eb_reset(char mode) 418static void realview_eb_restart(char mode, const char *cmd)
419{ 419{
420 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 420 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
421 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 421 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -427,6 +427,7 @@ static void realview_eb_reset(char mode)
427 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 427 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
428 if (core_tile_eb11mp()) 428 if (core_tile_eb11mp())
429 __raw_writel(0x0008, reset_ctrl); 429 __raw_writel(0x0008, reset_ctrl);
430 dsb();
430} 431}
431 432
432static void __init realview_eb_init(void) 433static void __init realview_eb_init(void)
@@ -458,7 +459,6 @@ static void __init realview_eb_init(void)
458#ifdef CONFIG_LEDS 459#ifdef CONFIG_LEDS
459 leds_event = realview_leds_event; 460 leds_event = realview_leds_event;
460#endif 461#endif
461 realview_reset = realview_eb_reset;
462} 462}
463 463
464MACHINE_START(REALVIEW_EB, "ARM-RealView EB") 464MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
@@ -469,8 +469,10 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
469 .init_early = realview_init_early, 469 .init_early = realview_init_early,
470 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
471 .timer = &realview_eb_timer, 471 .timer = &realview_eb_timer,
472 .handle_irq = gic_handle_irq,
472 .init_machine = realview_eb_init, 473 .init_machine = realview_eb_init,
473#ifdef CONFIG_ZONE_DMA 474#ifdef CONFIG_ZONE_DMA
474 .dma_zone_size = SZ_256M, 475 .dma_zone_size = SZ_256M,
475#endif 476#endif
477 .restart = realview_eb_restart,
476MACHINE_END 478MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c057540ec776..8ec37b29e0fa 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = {
336 .init = realview_pb1176_timer_init, 336 .init = realview_pb1176_timer_init,
337}; 337};
338 338
339static void realview_pb1176_reset(char mode) 339static void realview_pb1176_restart(char mode, const char *cmd)
340{ 340{
341 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 341 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
342 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 342 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
343 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 343 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
344 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); 344 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
345 dsb();
345} 346}
346 347
347static void realview_pb1176_fixup(struct tag *tags, char **from, 348static void realview_pb1176_fixup(struct tag *tags, char **from,
@@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void)
381#ifdef CONFIG_LEDS 382#ifdef CONFIG_LEDS
382 leds_event = realview_leds_event; 383 leds_event = realview_leds_event;
383#endif 384#endif
384 realview_reset = realview_pb1176_reset;
385} 385}
386 386
387MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 387MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
@@ -392,8 +392,10 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
392 .init_early = realview_init_early, 392 .init_early = realview_init_early,
393 .init_irq = gic_init_irq, 393 .init_irq = gic_init_irq,
394 .timer = &realview_pb1176_timer, 394 .timer = &realview_pb1176_timer,
395 .handle_irq = gic_handle_irq,
395 .init_machine = realview_pb1176_init, 396 .init_machine = realview_pb1176_init,
396#ifdef CONFIG_ZONE_DMA 397#ifdef CONFIG_ZONE_DMA
397 .dma_zone_size = SZ_256M, 398 .dma_zone_size = SZ_256M,
398#endif 399#endif
400 .restart = realview_pb1176_restart,
399MACHINE_END 401MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 671ad6d6ff00..f035fda8b619 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = {
315 .init = realview_pb11mp_timer_init, 315 .init = realview_pb11mp_timer_init,
316}; 316};
317 317
318static void realview_pb11mp_reset(char mode) 318static void realview_pb11mp_restart(char mode, const char *cmd)
319{ 319{
320 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 320 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
321 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 321 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode)
327 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 327 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
328 __raw_writel(0x0000, reset_ctrl); 328 __raw_writel(0x0000, reset_ctrl);
329 __raw_writel(0x0004, reset_ctrl); 329 __raw_writel(0x0004, reset_ctrl);
330 dsb();
330} 331}
331 332
332static void __init realview_pb11mp_init(void) 333static void __init realview_pb11mp_init(void)
@@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void)
355#ifdef CONFIG_LEDS 356#ifdef CONFIG_LEDS
356 leds_event = realview_leds_event; 357 leds_event = realview_leds_event;
357#endif 358#endif
358 realview_reset = realview_pb11mp_reset;
359} 359}
360 360
361MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 361MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
@@ -366,8 +366,10 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
366 .init_early = realview_init_early, 366 .init_early = realview_init_early,
367 .init_irq = gic_init_irq, 367 .init_irq = gic_init_irq,
368 .timer = &realview_pb11mp_timer, 368 .timer = &realview_pb11mp_timer,
369 .handle_irq = gic_handle_irq,
369 .init_machine = realview_pb11mp_init, 370 .init_machine = realview_pb11mp_init,
370#ifdef CONFIG_ZONE_DMA 371#ifdef CONFIG_ZONE_DMA
371 .dma_zone_size = SZ_256M, 372 .dma_zone_size = SZ_256M,
372#endif 373#endif
374 .restart = realview_pb11mp_restart,
373MACHINE_END 375MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index cbf22df4ad5b..0109c8b440cc 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = {
271 .init = realview_pba8_timer_init, 271 .init = realview_pba8_timer_init,
272}; 272};
273 273
274static void realview_pba8_reset(char mode) 274static void realview_pba8_restart(char mode, const char *cmd)
275{ 275{
276 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 276 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
277 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 277 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode)
283 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 283 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
284 __raw_writel(0x0000, reset_ctrl); 284 __raw_writel(0x0000, reset_ctrl);
285 __raw_writel(0x0004, reset_ctrl); 285 __raw_writel(0x0004, reset_ctrl);
286 dsb();
286} 287}
287 288
288static void __init realview_pba8_init(void) 289static void __init realview_pba8_init(void)
@@ -305,7 +306,6 @@ static void __init realview_pba8_init(void)
305#ifdef CONFIG_LEDS 306#ifdef CONFIG_LEDS
306 leds_event = realview_leds_event; 307 leds_event = realview_leds_event;
307#endif 308#endif
308 realview_reset = realview_pba8_reset;
309} 309}
310 310
311MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") 311MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
@@ -316,8 +316,10 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
316 .init_early = realview_init_early, 316 .init_early = realview_init_early,
317 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
318 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
319 .handle_irq = gic_handle_irq,
319 .init_machine = realview_pba8_init, 320 .init_machine = realview_pba8_init,
320#ifdef CONFIG_ZONE_DMA 321#ifdef CONFIG_ZONE_DMA
321 .dma_zone_size = SZ_256M, 322 .dma_zone_size = SZ_256M,
322#endif 323#endif
324 .restart = realview_pba8_restart,
323MACHINE_END 325MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 63c4114afae9..0194b3e26dc1 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -98,8 +98,8 @@ static struct map_desc realview_pbx_io_desc[] __initdata = {
98 98
99static struct map_desc realview_local_io_desc[] __initdata = { 99static struct map_desc realview_local_io_desc[] __initdata = {
100 { 100 {
101 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE), 101 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE), 102 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE),
103 .length = SZ_4K, 103 .length = SZ_4K,
104 .type = MT_DEVICE, 104 .type = MT_DEVICE,
105 }, { 105 }, {
@@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from,
339#endif 339#endif
340} 340}
341 341
342static void realview_pbx_reset(char mode) 342static void realview_pbx_restart(char mode, const char *cmd)
343{ 343{
344 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 344 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
345 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 345 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode)
351 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 351 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
352 __raw_writel(0x00F0, reset_ctrl); 352 __raw_writel(0x00F0, reset_ctrl);
353 __raw_writel(0x00F4, reset_ctrl); 353 __raw_writel(0x00F4, reset_ctrl);
354 dsb();
354} 355}
355 356
356static void __init realview_pbx_init(void) 357static void __init realview_pbx_init(void)
@@ -388,7 +389,6 @@ static void __init realview_pbx_init(void)
388#ifdef CONFIG_LEDS 389#ifdef CONFIG_LEDS
389 leds_event = realview_leds_event; 390 leds_event = realview_leds_event;
390#endif 391#endif
391 realview_reset = realview_pbx_reset;
392} 392}
393 393
394MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") 394MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
@@ -399,8 +399,10 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
399 .init_early = realview_init_early, 399 .init_early = realview_init_early,
400 .init_irq = gic_init_irq, 400 .init_irq = gic_init_irq,
401 .timer = &realview_pbx_timer, 401 .timer = &realview_pbx_timer,
402 .handle_irq = gic_handle_irq,
402 .init_machine = realview_pbx_init, 403 .init_machine = realview_pbx_init,
403#ifdef CONFIG_ZONE_DMA 404#ifdef CONFIG_ZONE_DMA
404 .dma_zone_size = SZ_256M, 405 .dma_zone_size = SZ_256M,
405#endif 406#endif
407 .restart = realview_pbx_restart,
406MACHINE_END 408MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index 45c7b935dc45..359bab94b6af 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -7,21 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
11#include <mach/hardware.h>
12#include <asm/hardware/iomd.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16 cpu_do_idle(); 12 cpu_do_idle();
17} 13}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 iomd_writeb(0, IOMD_ROMCR0);
22
23 /*
24 * Jump into the ROM
25 */
26 cpu_reset(0);
27}
diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h
deleted file mode 100644
index fb700228637a..000000000000
--- a/arch/arm/mach-rpc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-rpc/include/mach/vmalloc.h
3 *
4 * Copyright (C) 1997 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define VMALLOC_END 0xdc000000UL
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 8559598ab767..3d44a59fc0df 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -24,6 +24,7 @@
24#include <asm/elf.h> 24#include <asm/elf.h>
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <asm/hardware/iomd.h>
27#include <asm/page.h> 28#include <asm/page.h>
28#include <asm/domain.h> 29#include <asm/domain.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -214,6 +215,16 @@ static int __init rpc_init(void)
214 215
215arch_initcall(rpc_init); 216arch_initcall(rpc_init);
216 217
218static void rpc_restart(char mode, const char *cmd)
219{
220 iomd_writeb(0, IOMD_ROMCR0);
221
222 /*
223 * Jump into the ROM
224 */
225 soft_restart(0);
226}
227
217extern struct sys_timer ioc_timer; 228extern struct sys_timer ioc_timer;
218 229
219MACHINE_START(RISCPC, "Acorn-RiscPC") 230MACHINE_START(RISCPC, "Acorn-RiscPC")
@@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC")
224 .map_io = rpc_map_io, 235 .map_io = rpc_map_io,
225 .init_irq = rpc_init_irq, 236 .init_irq = rpc_init_irq,
226 .timer = &ioc_timer, 237 .timer = &ioc_timer,
238 .restart = rpc_restart,
227MACHINE_END 239MACHINE_END
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h
new file mode 100644
index 000000000000..f65dc8062961
--- /dev/null
+++ b/arch/arm/mach-s3c2410/common.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C2410 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H
13#define __ARCH_ARM_MACH_S3C2410_COMMON_H
14
15void s3c2410_restart(char mode, const char *cmd);
16
17#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h
deleted file mode 100644
index f8c9387b049d..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/reset.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/reset.h
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * S3C2410 CPU reset controls
12*/
13
14#ifndef __ASM_ARCH_RESET_H
15#define __ASM_ARCH_RESET_H __FILE__
16
17/* This allows the over-ride of the default reset code
18*/
19
20extern void (*s3c24xx_reset_hook)(void);
21
22#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
deleted file mode 100644
index 6faadcee7729..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/system-reset.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - System define for arch_reset() function
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <mach/hardware.h>
14#include <plat/watchdog-reset.h>
15
16extern void (*s3c24xx_reset_hook)(void);
17
18static void
19arch_reset(char mode, const char *cmd)
20{
21 if (mode == 's') {
22 cpu_reset(0);
23 }
24
25 if (s3c24xx_reset_hook)
26 s3c24xx_reset_hook();
27
28 arch_wdt_reset();
29
30 /* we'll take a jump through zero as a poor second */
31 cpu_reset(0);
32}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
index a8cbca6701e5..5e215c1a5c8f 100644
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ b/arch/arm/mach-s3c2410/include/mach/system.h
@@ -15,12 +15,10 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/idle.h> 17#include <mach/idle.h>
18#include <mach/reset.h>
19 18
20#include <mach/regs-clock.h> 19#include <mach/regs-clock.h>
21 20
22void (*s3c24xx_idle)(void); 21void (*s3c24xx_idle)(void);
23void (*s3c24xx_reset_hook)(void);
24 22
25void s3c24xx_default_idle(void) 23void s3c24xx_default_idle(void)
26{ 24{
@@ -54,5 +52,3 @@ static void arch_idle(void)
54 else 52 else
55 s3c24xx_default_idle(); 53 s3c24xx_default_idle();
56} 54}
57
58#include <mach/system-reset.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
deleted file mode 100644
index 7a311e8dddba..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2410 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 79838942b0ac..4220cc60de3c 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -63,6 +63,8 @@
63#include <linux/mtd/map.h> 63#include <linux/mtd/map.h>
64#include <linux/mtd/physmap.h> 64#include <linux/mtd/physmap.h>
65 65
66#include "common.h"
67
66static struct resource amlm5900_nor_resource = { 68static struct resource amlm5900_nor_resource = {
67 .start = 0x00000000, 69 .start = 0x00000000,
68 .end = 0x01000000 - 1, 70 .end = 0x01000000 - 1,
@@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900")
241 .init_irq = s3c24xx_init_irq, 243 .init_irq = s3c24xx_init_irq,
242 .init_machine = amlm5900_init, 244 .init_machine = amlm5900_init,
243 .timer = &s3c24xx_timer, 245 .timer = &s3c24xx_timer,
246 .restart = s3c2410_restart,
244MACHINE_END 247MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 71b955877793..feeaf73933dc 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -66,6 +66,7 @@
66 66
67#include "usb-simtec.h" 67#include "usb-simtec.h"
68#include "nor-simtec.h" 68#include "nor-simtec.h"
69#include "common.h"
69 70
70#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" 71#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
71 72
@@ -640,4 +641,5 @@ MACHINE_START(BAST, "Simtec-BAST")
640 .init_irq = s3c24xx_init_irq, 641 .init_irq = s3c24xx_init_irq,
641 .init_machine = bast_init, 642 .init_machine = bast_init,
642 .timer = &s3c24xx_timer, 643 .timer = &s3c24xx_timer,
644 .restart = s3c2410_restart,
643MACHINE_END 645MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 05a7d16e59f5..ad9d865651d7 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -70,6 +70,8 @@
70 70
71#include <sound/uda1380.h> 71#include <sound/uda1380.h>
72 72
73#include "common.h"
74
73#define H1940_LATCH ((void __force __iomem *)0xF8000000) 75#define H1940_LATCH ((void __force __iomem *)0xF8000000)
74 76
75#define H1940_PA_LATCH S3C2410_CS2 77#define H1940_PA_LATCH S3C2410_CS2
@@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940")
751 .init_irq = h1940_init_irq, 753 .init_irq = h1940_init_irq,
752 .init_machine = h1940_init, 754 .init_machine = h1940_init,
753 .timer = &s3c24xx_timer, 755 .timer = &s3c24xx_timer,
756 .restart = s3c2410_restart,
754MACHINE_END 757MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 1dc3e3234417..383d00ca8f60 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -51,6 +51,8 @@
51#include <plat/s3c2410.h> 51#include <plat/s3c2410.h>
52#include <plat/udc.h> 52#include <plat/udc.h>
53 53
54#include "common.h"
55
54static struct map_desc n30_iodesc[] __initdata = { 56static struct map_desc n30_iodesc[] __initdata = {
55 /* nothing here yet */ 57 /* nothing here yet */
56}; 58};
@@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30")
591 .init_machine = n30_init, 593 .init_machine = n30_init,
592 .init_irq = s3c24xx_init_irq, 594 .init_irq = s3c24xx_init_irq,
593 .map_io = n30_map_io, 595 .map_io = n30_map_io,
596 .restart = s3c2410_restart,
594MACHINE_END 597MACHINE_END
595 598
596MACHINE_START(N35, "Acer-N35") 599MACHINE_START(N35, "Acer-N35")
@@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35")
601 .init_machine = n30_init, 604 .init_machine = n30_init,
602 .init_irq = s3c24xx_init_irq, 605 .init_irq = s3c24xx_init_irq,
603 .map_io = n30_map_io, 606 .map_io = n30_map_io,
607 .restart = s3c2410_restart,
604MACHINE_END 608MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f03f3fd9cec9..5f1e0eeb38a9 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -38,6 +38,8 @@
38#include <plat/iic.h> 38#include <plat/iic.h>
39#include <plat/cpu.h> 39#include <plat/cpu.h>
40 40
41#include "common.h"
42
41static struct map_desc otom11_iodesc[] __initdata = { 43static struct map_desc otom11_iodesc[] __initdata = {
42 /* Device area */ 44 /* Device area */
43 { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, 45 { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE },
@@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
121 .init_machine = otom11_init, 123 .init_machine = otom11_init,
122 .init_irq = s3c24xx_init_irq, 124 .init_irq = s3c24xx_init_irq,
123 .timer = &s3c24xx_timer, 125 .timer = &s3c24xx_timer,
126 .restart = s3c2410_restart,
124MACHINE_END 127MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 451852156254..58f2c17b9f0d 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -62,6 +62,8 @@
62#include <plat/cpu.h> 62#include <plat/cpu.h>
63#include <plat/pm.h> 63#include <plat/pm.h>
64 64
65#include "common.h"
66
65static struct map_desc qt2410_iodesc[] __initdata = { 67static struct map_desc qt2410_iodesc[] __initdata = {
66 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } 68 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
67}; 69};
@@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410")
350 .init_irq = s3c24xx_init_irq, 352 .init_irq = s3c24xx_init_irq,
351 .init_machine = qt2410_machine_init, 353 .init_machine = qt2410_machine_init,
352 .timer = &s3c24xx_timer, 354 .timer = &s3c24xx_timer,
355 .restart = s3c2410_restart,
353MACHINE_END 356MACHINE_END
354
355
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 99c9dfdb71c7..bdc27e772876 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -54,6 +54,8 @@
54 54
55#include <plat/common-smdk.h> 55#include <plat/common-smdk.h>
56 56
57#include "common.h"
58
57static struct map_desc smdk2410_iodesc[] __initdata = { 59static struct map_desc smdk2410_iodesc[] __initdata = {
58 /* nothing here yet */ 60 /* nothing here yet */
59}; 61};
@@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
116 .init_irq = s3c24xx_init_irq, 118 .init_irq = s3c24xx_init_irq,
117 .init_machine = smdk2410_init, 119 .init_machine = smdk2410_init,
118 .timer = &s3c24xx_timer, 120 .timer = &s3c24xx_timer,
121 .restart = s3c2410_restart,
119MACHINE_END 122MACHINE_END
120
121
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index e0d0b6fb2800..1114666f0efb 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -54,6 +54,8 @@
54#include <linux/mtd/map.h> 54#include <linux/mtd/map.h>
55#include <linux/mtd/physmap.h> 55#include <linux/mtd/physmap.h>
56 56
57#include "common.h"
58
57static struct resource tct_hammer_nor_resource = { 59static struct resource tct_hammer_nor_resource = {
58 .start = 0x00000000, 60 .start = 0x00000000,
59 .end = 0x01000000 - 1, 61 .end = 0x01000000 - 1,
@@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
151 .init_irq = s3c24xx_init_irq, 153 .init_irq = s3c24xx_init_irq,
152 .init_machine = tct_hammer_init, 154 .init_machine = tct_hammer_init,
153 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
156 .restart = s3c2410_restart,
154MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 0f0a9a1795e9..dbe668a803ef 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -53,6 +53,7 @@
53 53
54#include "usb-simtec.h" 54#include "usb-simtec.h"
55#include "nor-simtec.h" 55#include "nor-simtec.h"
56#include "common.h"
56 57
57/* macros for virtual address mods for the io space entries */ 58/* macros for virtual address mods for the io space entries */
58#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) 59#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -381,4 +382,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
381 .init_machine = vr1000_init, 382 .init_machine = vr1000_init,
382 .init_irq = s3c24xx_init_irq, 383 .init_irq = s3c24xx_init_irq,
383 .timer = &s3c24xx_timer, 384 .timer = &s3c24xx_timer,
385 .restart = s3c2410_restart,
384MACHINE_END 386MACHINE_END
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index af74927bca14..dad596332c5e 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/pll.h> 43#include <plat/pll.h>
44#include <plat/pm.h> 44#include <plat/pm.h>
45#include <plat/watchdog-reset.h>
45 46
46#include <plat/gpio-core.h> 47#include <plat/gpio-core.h>
47#include <plat/gpio-cfg.h> 48#include <plat/gpio-cfg.h>
@@ -189,3 +190,15 @@ int __init s3c2410a_init(void)
189 s3c2410_sysdev.cls = &s3c2410a_sysclass; 190 s3c2410_sysdev.cls = &s3c2410a_sysclass;
190 return s3c2410_init(); 191 return s3c2410_init();
191} 192}
193
194void s3c2410_restart(char mode, const char *cmd)
195{
196 if (mode == 's') {
197 soft_restart(0);
198 }
199
200 arch_wdt_reset();
201
202 /* we'll take a jump through zero as a poor second */
203 soft_restart(0);
204}
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 286ef1738c61..ae73ba34ecc6 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -48,6 +48,7 @@
48#include <linux/mtd/nand_ecc.h> 48#include <linux/mtd/nand_ecc.h>
49#include <linux/mtd/partitions.h> 49#include <linux/mtd/partitions.h>
50 50
51#include <plat/s3c2412.h>
51#include <plat/gpio-cfg.h> 52#include <plat/gpio-cfg.h>
52#include <plat/clock.h> 53#include <plat/clock.h>
53#include <plat/devs.h> 54#include <plat/devs.h>
@@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE")
661 .map_io = jive_map_io, 662 .map_io = jive_map_io,
662 .init_machine = jive_machine_init, 663 .init_machine = jive_machine_init,
663 .timer = &s3c24xx_timer, 664 .timer = &s3c24xx_timer,
665 .restart = s3c2412_restart,
664MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index f1eec1b54932..b11451b853d8 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413")
134 .map_io = smdk2413_map_io, 134 .map_io = smdk2413_map_io,
135 .init_machine = smdk2413_machine_init, 135 .init_machine = smdk2413_machine_init,
136 .timer = &s3c24xx_timer, 136 .timer = &s3c24xx_timer,
137 .restart = s3c2412_restart,
137MACHINE_END 138MACHINE_END
138 139
139MACHINE_START(SMDK2412, "SMDK2412") 140MACHINE_START(SMDK2412, "SMDK2412")
@@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
145 .map_io = smdk2413_map_io, 146 .map_io = smdk2413_map_io,
146 .init_machine = smdk2413_machine_init, 147 .init_machine = smdk2413_machine_init,
147 .timer = &s3c24xx_timer, 148 .timer = &s3c24xx_timer,
149 .restart = s3c2412_restart,
148MACHINE_END 150MACHINE_END
149 151
150MACHINE_START(SMDK2413, "SMDK2413") 152MACHINE_START(SMDK2413, "SMDK2413")
@@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413")
156 .map_io = smdk2413_map_io, 158 .map_io = smdk2413_map_io,
157 .init_machine = smdk2413_machine_init, 159 .init_machine = smdk2413_machine_init,
158 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2412_restart,
159MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 1bbb1ef5f4ff..94bfaa1fb148 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS")
162 .init_machine = vstms_init, 162 .init_machine = vstms_init,
163 .map_io = vstms_map_io, 163 .map_io = vstms_map_io,
164 .timer = &s3c24xx_timer, 164 .timer = &s3c24xx_timer,
165 .restart = s3c2412_restart,
165MACHINE_END 166MACHINE_END
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 57a1e01e4e50..867ce2e269f6 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,7 +32,6 @@
32#include <asm/proc-fns.h> 32#include <asm/proc-fns.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34 34
35#include <mach/reset.h>
36#include <mach/idle.h> 35#include <mach/idle.h>
37 36
38#include <plat/cpu-freq.h> 37#include <plat/cpu-freq.h>
@@ -131,8 +130,11 @@ static void s3c2412_idle(void)
131 cpu_do_idle(); 130 cpu_do_idle();
132} 131}
133 132
134static void s3c2412_hard_reset(void) 133void s3c2412_restart(char mode, const char *cmd)
135{ 134{
135 if (mode == 's')
136 soft_restart(0);
137
136 /* errata "Watch-dog/Software Reset Problem" specifies that 138 /* errata "Watch-dog/Software Reset Problem" specifies that
137 * this reset must be done with the SYSCLK sourced from 139 * this reset must be done with the SYSCLK sourced from
138 * EXTCLK instead of FOUT to avoid a glitch in the reset 140 * EXTCLK instead of FOUT to avoid a glitch in the reset
@@ -164,10 +166,6 @@ void __init s3c2412_map_io(void)
164 166
165 s3c24xx_idle = s3c2412_idle; 167 s3c24xx_idle = s3c2412_idle;
166 168
167 /* set custom reset hook */
168
169 s3c24xx_reset_hook = s3c2412_hard_reset;
170
171 /* register our io-tables */ 169 /* register our io-tables */
172 170
173 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); 171 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
index a9eee531ca76..66b71736609c 100644
--- a/arch/arm/mach-s3c2416/mach-smdk2416.c
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416")
251 .map_io = smdk2416_map_io, 251 .map_io = smdk2416_map_io,
252 .init_machine = smdk2416_machine_init, 252 .init_machine = smdk2416_machine_init,
253 .timer = &s3c24xx_timer, 253 .timer = &s3c24xx_timer,
254 .restart = s3c2416_restart,
254MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc83c83..46062232bbc7 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
44#include <asm/proc-fns.h> 44#include <asm/proc-fns.h>
45#include <asm/irq.h> 45#include <asm/irq.h>
46 46
47#include <mach/reset.h>
48#include <mach/idle.h> 47#include <mach/idle.h>
49#include <mach/regs-s3c2443-clock.h> 48#include <mach/regs-s3c2443-clock.h>
50 49
@@ -76,8 +75,11 @@ static struct sys_device s3c2416_sysdev = {
76 .cls = &s3c2416_sysclass, 75 .cls = &s3c2416_sysclass,
77}; 76};
78 77
79static void s3c2416_hard_reset(void) 78void s3c2416_restart(char mode, const char *cmd)
80{ 79{
80 if (mode == 's')
81 soft_restart(0);
82
81 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); 83 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
82} 84}
83 85
@@ -85,7 +87,6 @@ int __init s3c2416_init(void)
85{ 87{
86 printk(KERN_INFO "S3C2416: Initializing architecture\n"); 88 printk(KERN_INFO "S3C2416: Initializing architecture\n");
87 89
88 s3c24xx_reset_hook = s3c2416_hard_reset;
89 /* s3c24xx_idle = s3c2416_idle; */ 90 /* s3c24xx_idle = s3c2416_idle; */
90 91
91 /* change WDT IRQ number */ 92 /* change WDT IRQ number */
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
new file mode 100644
index 000000000000..db8a98ac68c5
--- /dev/null
+++ b/arch/arm/mach-s3c2440/common.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C2440 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14
15void s3c2440_restart(char mode, const char *cmd);
16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index d8f36c0a16ad..24569550de1a 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -55,6 +55,8 @@
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56#include <plat/audio-simtec.h> 56#include <plat/audio-simtec.h>
57 57
58#include "common.h"
59
58#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" 60#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
59 61
60static struct map_desc anubis_iodesc[] __initdata = { 62static struct map_desc anubis_iodesc[] __initdata = {
@@ -485,4 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
485 .init_machine = anubis_init, 487 .init_machine = anubis_init,
486 .init_irq = s3c24xx_init_irq, 488 .init_irq = s3c24xx_init_irq,
487 .timer = &s3c24xx_timer, 489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart,
488MACHINE_END 491MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index aa86ca8fa1e9..d6a9763110cd 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -49,6 +49,8 @@
49#include <plat/cpu.h> 49#include <plat/cpu.h>
50#include <plat/mci.h> 50#include <plat/mci.h>
51 51
52#include "common.h"
53
52static struct map_desc at2440evb_iodesc[] __initdata = { 54static struct map_desc at2440evb_iodesc[] __initdata = {
53 /* Nothing here */ 55 /* Nothing here */
54}; 56};
@@ -220,4 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
220 .init_machine = at2440evb_init, 222 .init_machine = at2440evb_init,
221 .init_irq = s3c24xx_init_irq, 223 .init_irq = s3c24xx_init_irq,
222 .timer = &s3c24xx_timer, 224 .timer = &s3c24xx_timer,
225 .restart = s3c2440_restart,
223MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index de1e0ff46cec..5859e609d28c 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,6 +90,7 @@
90#include <plat/iic.h> 90#include <plat/iic.h>
91#include <plat/ts.h> 91#include <plat/ts.h>
92 92
93#include "common.h"
93 94
94static struct pcf50633 *gta02_pcf; 95static struct pcf50633 *gta02_pcf;
95 96
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
600 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
601 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
602 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart,
603MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 91fe0b4c95f1..437322ffd88d 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -60,6 +60,8 @@
60 60
61#include <sound/s3c24xx_uda134x.h> 61#include <sound/s3c24xx_uda134x.h>
62 62
63#include "common.h"
64
63#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) 65#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
64 66
65static struct map_desc mini2440_iodesc[] __initdata = { 67static struct map_desc mini2440_iodesc[] __initdata = {
@@ -681,4 +683,5 @@ MACHINE_START(MINI2440, "MINI2440")
681 .init_machine = mini2440_init, 683 .init_machine = mini2440_init,
682 .init_irq = s3c24xx_init_irq, 684 .init_irq = s3c24xx_init_irq,
683 .timer = &s3c24xx_timer, 685 .timer = &s3c24xx_timer,
686 .restart = s3c2440_restart,
684MACHINE_END 687MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 61c0bf148165..40eaf844bc1f 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -47,6 +47,8 @@
47#include <plat/devs.h> 47#include <plat/devs.h>
48#include <plat/cpu.h> 48#include <plat/cpu.h>
49 49
50#include "common.h"
51
50static struct map_desc nexcoder_iodesc[] __initdata = { 52static struct map_desc nexcoder_iodesc[] __initdata = {
51 /* nothing here yet */ 53 /* nothing here yet */
52}; 54};
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
156 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
157 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
158 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart,
159MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index d7e47b2b6ec9..4c480ef734f6 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -54,6 +54,8 @@
54#include <plat/devs.h> 54#include <plat/devs.h>
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56 56
57#include "common.h"
58
57/* onboard perihperal map */ 59/* onboard perihperal map */
58 60
59static struct map_desc osiris_iodesc[] __initdata = { 61static struct map_desc osiris_iodesc[] __initdata = {
@@ -434,4 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
434 .init_irq = s3c24xx_init_irq, 436 .init_irq = s3c24xx_init_irq,
435 .init_machine = osiris_init, 437 .init_machine = osiris_init,
436 .timer = &s3c24xx_timer, 438 .timer = &s3c24xx_timer,
439 .restart = s3c2440_restart,
437MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 4267cd56bfe7..f892e8befca8 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -62,6 +62,8 @@
62 62
63#include <sound/uda1380.h> 63#include <sound/uda1380.h>
64 64
65#include "common.h"
66
65#define LCD_PWM_PERIOD 192960 67#define LCD_PWM_PERIOD 192960
66#define LCD_PWM_DUTY 127353 68#define LCD_PWM_DUTY 127353
67 69
@@ -820,4 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
820 .init_irq = s3c24xx_init_irq, 822 .init_irq = s3c24xx_init_irq,
821 .init_machine = rx1950_init_machine, 823 .init_machine = rx1950_init_machine,
822 .timer = &s3c24xx_timer, 824 .timer = &s3c24xx_timer,
825 .restart = s3c2440_restart,
823MACHINE_END 826MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 3d5e2e67971e..88d648a874d4 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -51,6 +51,8 @@
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <plat/pm.h> 52#include <plat/pm.h>
53 53
54#include "common.h"
55
54static struct map_desc rx3715_iodesc[] __initdata = { 56static struct map_desc rx3715_iodesc[] __initdata = {
55 /* dump ISA space somewhere unused */ 57 /* dump ISA space somewhere unused */
56 58
@@ -211,4 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
211 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
212 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
213 .timer = &s3c24xx_timer, 215 .timer = &s3c24xx_timer,
216 .restart = s3c2440_restart,
214MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 36eeb4197a84..1deb60d12a60 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -47,6 +47,8 @@
47 47
48#include <plat/common-smdk.h> 48#include <plat/common-smdk.h>
49 49
50#include "common.h"
51
50static struct map_desc smdk2440_iodesc[] __initdata = { 52static struct map_desc smdk2440_iodesc[] __initdata = {
51 /* ISA IO Space map (memory space selected by A24) */ 53 /* ISA IO Space map (memory space selected by A24) */
52 54
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
181 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
182 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
183 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart,
184MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 37f8cc6aabd4..42d73f1e0cef 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,6 +35,7 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
38 39
39#include <plat/gpio-core.h> 40#include <plat/gpio-core.h>
40#include <plat/gpio-cfg.h> 41#include <plat/gpio-cfg.h>
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void)
73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
75} 76}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index bec107e00441..209236956222 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443")
145 .map_io = smdk2443_map_io, 145 .map_io = smdk2443_map_io,
146 .init_machine = smdk2443_machine_init, 146 .init_machine = smdk2443_machine_init,
147 .timer = &s3c24xx_timer, 147 .timer = &s3c24xx_timer,
148 .restart = s3c2443_restart,
148MACHINE_END 149MACHINE_END
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771b0f36..4568ded338d0 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -31,7 +31,6 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32 32
33#include <mach/regs-s3c2443-clock.h> 33#include <mach/regs-s3c2443-clock.h>
34#include <mach/reset.h>
35 34
36#include <plat/gpio-core.h> 35#include <plat/gpio-core.h>
37#include <plat/gpio-cfg.h> 36#include <plat/gpio-cfg.h>
@@ -57,8 +56,11 @@ static struct sys_device s3c2443_sysdev = {
57 .cls = &s3c2443_sysclass, 56 .cls = &s3c2443_sysclass,
58}; 57};
59 58
60static void s3c2443_hard_reset(void) 59void s3c2443_restart(char mode, const char *cmd)
61{ 60{
61 if (mode == 's')
62 soft_restart(0);
63
62 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); 64 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
63} 65}
64 66
@@ -66,8 +68,6 @@ int __init s3c2443_init(void)
66{ 68{
67 printk("S3C2443: Initialising architecture\n"); 69 printk("S3C2443: Initialising architecture\n");
68 70
69 s3c24xx_reset_hook = s3c2443_hard_reset;
70
71 s3c_nand_setname("s3c2412-nand"); 71 s3c_nand_setname("s3c2412-nand");
72 s3c_fb_setname("s3c2443-fb"); 72 s3c_fb_setname("s3c2443-fb");
73 73
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index d7d9bb5dfb72..1822ac2eba31 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -10,53 +10,49 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core files 13# Core
14obj-y += cpu.o
15obj-y += clock.o
16 14
17# Core support for S3C6400 system 15obj-y += common.o clock.o
16
17# Core support
18 18
19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o 19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o 20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
21 21
22obj-y += irq.o 22# PM
23obj-y += irq-eint.o 23
24obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o
24 25
25# DMA support 26# DMA support
26 27
27obj-$(CONFIG_S3C64XX_DMA) += dma.o 28obj-$(CONFIG_S3C64XX_DMA) += dma.o
28 29
29# Device setup 30# Device support
30 31
31obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o 32obj-y += dev-uart.o
32obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 33obj-y += dev-audio.o
33obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o 34obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
34obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
35obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
36obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
37obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o
38 35
39# PM 36# Device setup
40 37
41obj-$(CONFIG_PM) += pm.o 38obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
42obj-$(CONFIG_PM) += sleep.o 39obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
43obj-$(CONFIG_PM) += irq-pm.o 40obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
41obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
42obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
43obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
44obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o
44 45
45# Machine support 46# Machine support
46 47
47obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o 48obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
48obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o 49obj-$(CONFIG_MACH_HMT) += mach-hmt.o
49obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o 50obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o
50obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o 51obj-$(CONFIG_MACH_NCP) += mach-ncp.o
51obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o 52obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o
52obj-$(CONFIG_MACH_NCP) += mach-ncp.o 53obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o
53obj-$(CONFIG_MACH_HMT) += mach-hmt.o 54obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o
54obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o 55obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o
55obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o 56obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
56obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o 57obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
57obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o 58obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
58
59# device support
60
61obj-y += dev-uart.o
62obj-y += dev-audio.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 0187cde3a5dc..31bb27dc4aeb 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -760,7 +760,7 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
760 760
761#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 761#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
762 762
763void __init_or_cpufreq s3c6400_setup_clocks(void) 763void __init_or_cpufreq s3c64xx_setup_clocks(void)
764{ 764{
765 struct clk *xtal_clk; 765 struct clk *xtal_clk;
766 unsigned long xtal; 766 unsigned long xtal;
@@ -859,7 +859,7 @@ static struct clk *clks[] __initdata = {
859 * as ARMCLK as well as the necessary parent clocks. 859 * as ARMCLK as well as the necessary parent clocks.
860 * 860 *
861 * This call does not setup the clocks, which is left to the 861 * This call does not setup the clocks, which is left to the
862 * s3c6400_setup_clocks() call which may be needed by the cpufreq 862 * s3c64xx_setup_clocks() call which may be needed by the cpufreq
863 * or resume code to re-set the clocks if the bootloader has changed 863 * or resume code to re-set the clocks if the bootloader has changed
864 * them. 864 * them.
865 */ 865 */
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c
index 4d203be1f4c3..35182ba049da 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -1,11 +1,13 @@
1/* arch/arm/plat-s3c64xx/irq-eint.c 1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
2 * 4 *
3 * Copyright 2008 Openmoko, Inc. 5 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 6 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 7 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 8 * http://armlinux.simtec.co.uk/
7 * 9 *
8 * S3C64XX - Interrupt handling for IRQ_EINT(x) 10 * Common Codes for S3C64XX machines
9 * 11 *
10 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
@@ -13,21 +15,183 @@
13 */ 15 */
14 16
15#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/module.h>
16#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/ioport.h>
17#include <linux/sysdev.h> 22#include <linux/sysdev.h>
18#include <linux/gpio.h> 23#include <linux/serial_core.h>
19#include <linux/irq.h> 24#include <linux/platform_device.h>
20#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/dma-mapping.h>
27#include <linux/irq.h>
28#include <linux/gpio.h>
21 29
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
22#include <asm/hardware/vic.h> 32#include <asm/hardware/vic.h>
23 33
24#include <plat/regs-irqtype.h> 34#include <mach/map.h>
35#include <mach/hardware.h>
25#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
26#include <plat/gpio-cfg.h>
27 37
28#include <mach/map.h>
29#include <plat/cpu.h> 38#include <plat/cpu.h>
39#include <plat/clock.h>
40#include <plat/devs.h>
30#include <plat/pm.h> 41#include <plat/pm.h>
42#include <plat/gpio-cfg.h>
43#include <plat/irq-uart.h>
44#include <plat/irq-vic-timer.h>
45#include <plat/regs-irqtype.h>
46#include <plat/regs-serial.h>
47#include <plat/watchdog-reset.h>
48
49#include "common.h"
50
51/* uart registration process */
52
53void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
54{
55 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
56}
57
58/* table of supported CPUs */
59
60static const char name_s3c6400[] = "S3C6400";
61static const char name_s3c6410[] = "S3C6410";
62
63static struct cpu_table cpu_ids[] __initdata = {
64 {
65 .idcode = S3C6400_CPU_ID,
66 .idmask = S3C64XX_CPU_MASK,
67 .map_io = s3c6400_map_io,
68 .init_clocks = s3c6400_init_clocks,
69 .init_uarts = s3c64xx_init_uarts,
70 .init = s3c6400_init,
71 .name = name_s3c6400,
72 }, {
73 .idcode = S3C6410_CPU_ID,
74 .idmask = S3C64XX_CPU_MASK,
75 .map_io = s3c6410_map_io,
76 .init_clocks = s3c6410_init_clocks,
77 .init_uarts = s3c64xx_init_uarts,
78 .init = s3c6410_init,
79 .name = name_s3c6410,
80 },
81};
82
83/* minimal IO mapping */
84
85/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
86#define UART_OFFS (S3C_PA_UART & 0xfffff)
87
88static struct map_desc s3c_iodesc[] __initdata = {
89 {
90 .virtual = (unsigned long)S3C_VA_SYS,
91 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C_VA_MEM,
96 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 }, {
100 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
101 .pfn = __phys_to_pfn(S3C_PA_UART),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 }, {
105 .virtual = (unsigned long)VA_VIC0,
106 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
107 .length = SZ_16K,
108 .type = MT_DEVICE,
109 }, {
110 .virtual = (unsigned long)VA_VIC1,
111 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
112 .length = SZ_16K,
113 .type = MT_DEVICE,
114 }, {
115 .virtual = (unsigned long)S3C_VA_TIMER,
116 .pfn = __phys_to_pfn(S3C_PA_TIMER),
117 .length = SZ_16K,
118 .type = MT_DEVICE,
119 }, {
120 .virtual = (unsigned long)S3C64XX_VA_GPIO,
121 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
122 .length = SZ_4K,
123 .type = MT_DEVICE,
124 }, {
125 .virtual = (unsigned long)S3C64XX_VA_MODEM,
126 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
127 .length = SZ_4K,
128 .type = MT_DEVICE,
129 }, {
130 .virtual = (unsigned long)S3C_VA_WATCHDOG,
131 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
132 .length = SZ_4K,
133 .type = MT_DEVICE,
134 }, {
135 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
136 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
137 .length = SZ_1K,
138 .type = MT_DEVICE,
139 },
140};
141
142struct sysdev_class s3c64xx_sysclass = {
143 .name = "s3c64xx-core",
144};
145
146static struct sys_device s3c64xx_sysdev = {
147 .cls = &s3c64xx_sysclass,
148};
149
150/* read cpu identification code */
151
152void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
153{
154 /* initialise the io descriptors we need for initialisation */
155 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
156 iotable_init(mach_desc, size);
157 init_consistent_dma_size(SZ_8M);
158
159 /* detect cpu id */
160 s3c64xx_init_cpu();
161
162 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
163}
164
165static __init int s3c64xx_sysdev_init(void)
166{
167 sysdev_class_register(&s3c64xx_sysclass);
168 return sysdev_register(&s3c64xx_sysdev);
169}
170core_initcall(s3c64xx_sysdev_init);
171
172/*
173 * setup the sources the vic should advertise resume
174 * for, even though it is not doing the wake
175 * (set_irq_wake needs to be valid)
176 */
177#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
178#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
179 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
180 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
181 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
182 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
183
184void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
185{
186 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
187
188 /* initialise the pair of VICs */
189 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
190 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
191
192 /* add the timer sub-irqs */
193 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
194}
31 195
32#define eint_offset(irq) ((irq) - IRQ_EINT(0)) 196#define eint_offset(irq) ((irq) - IRQ_EINT(0))
33#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) 197#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
@@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void)
209 373
210 return 0; 374 return 0;
211} 375}
212
213arch_initcall(s3c64xx_init_irq_eint); 376arch_initcall(s3c64xx_init_irq_eint);
377
378void s3c64xx_restart(char mode, const char *cmd)
379{
380 if (mode != 's')
381 arch_wdt_reset();
382
383 /* if all else fails, or mode was for soft, jump to 0 */
384 soft_restart(0);
385}
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
new file mode 100644
index 000000000000..8dc8ab6d8d6d
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * Common Header for S3C64XX machines
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
18#define __ARCH_ARM_MACH_S3C64XX_COMMON_H
19
20void s3c64xx_init_irq(u32 vic0, u32 vic1);
21void s3c64xx_init_io(struct map_desc *mach_desc, int size);
22
23void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
24void s3c64xx_setup_clocks(void);
25
26void s3c64xx_restart(char mode, const char *cmd);
27
28extern struct syscore_ops s3c64xx_irq_syscore_ops;
29extern struct sysdev_class s3c64xx_sysclass;
30
31#ifdef CONFIG_CPU_S3C6400
32
33extern int s3c6400_init(void);
34extern void s3c6400_init_irq(void);
35extern void s3c6400_map_io(void);
36extern void s3c6400_init_clocks(int xtal);
37
38#else
39#define s3c6400_init_clocks NULL
40#define s3c6400_map_io NULL
41#define s3c6400_init NULL
42#endif
43
44#ifdef CONFIG_CPU_S3C6410
45
46extern int s3c6410_init(void);
47extern void s3c6410_init_irq(void);
48extern void s3c6410_map_io(void);
49extern void s3c6410_init_clocks(int xtal);
50
51#else
52#define s3c6410_init_clocks NULL
53#define s3c6410_map_io NULL
54#define s3c6410_init NULL
55#endif
56
57#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/cpu.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX CPU Support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/dma-mapping.h>
24
25#include <mach/hardware.h>
26#include <mach/map.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30
31#include <plat/regs-serial.h>
32
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h>
36
37#include <plat/s3c6400.h>
38#include <plat/s3c6410.h>
39
40/* table of supported CPUs */
41
42static const char name_s3c6400[] = "S3C6400";
43static const char name_s3c6410[] = "S3C6410";
44
45static struct cpu_table cpu_ids[] __initdata = {
46 {
47 .idcode = S3C6400_CPU_ID,
48 .idmask = S3C64XX_CPU_MASK,
49 .map_io = s3c6400_map_io,
50 .init_clocks = s3c6400_init_clocks,
51 .init_uarts = s3c6400_init_uarts,
52 .init = s3c6400_init,
53 .name = name_s3c6400,
54 }, {
55 .idcode = S3C6410_CPU_ID,
56 .idmask = S3C64XX_CPU_MASK,
57 .map_io = s3c6410_map_io,
58 .init_clocks = s3c6410_init_clocks,
59 .init_uarts = s3c6410_init_uarts,
60 .init = s3c6410_init,
61 .name = name_s3c6410,
62 },
63};
64
65/* minimal IO mapping */
66
67/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
68#define UART_OFFS (S3C_PA_UART & 0xfffff)
69
70static struct map_desc s3c_iodesc[] __initdata = {
71 {
72 .virtual = (unsigned long)S3C_VA_SYS,
73 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)S3C_VA_MEM,
78 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
79 .length = SZ_4K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
83 .pfn = __phys_to_pfn(S3C_PA_UART),
84 .length = SZ_4K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)VA_VIC1,
93 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
94 .length = SZ_16K,
95 .type = MT_DEVICE,
96 }, {
97 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S3C_PA_TIMER),
99 .length = SZ_16K,
100 .type = MT_DEVICE,
101 }, {
102 .virtual = (unsigned long)S3C64XX_VA_GPIO,
103 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
104 .length = SZ_4K,
105 .type = MT_DEVICE,
106 }, {
107 .virtual = (unsigned long)S3C64XX_VA_MODEM,
108 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
109 .length = SZ_4K,
110 .type = MT_DEVICE,
111 }, {
112 .virtual = (unsigned long)S3C_VA_WATCHDOG,
113 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
114 .length = SZ_4K,
115 .type = MT_DEVICE,
116 }, {
117 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
118 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
119 .length = SZ_1K,
120 .type = MT_DEVICE,
121 },
122};
123
124
125struct sysdev_class s3c64xx_sysclass = {
126 .name = "s3c64xx-core",
127};
128
129static struct sys_device s3c64xx_sysdev = {
130 .cls = &s3c64xx_sysclass,
131};
132
133/* uart registration process */
134
135void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
136{
137 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
138}
139
140/* read cpu identification code */
141
142void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
143{
144 /* initialise the io descriptors we need for initialisation */
145 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
146 iotable_init(mach_desc, size);
147 init_consistent_dma_size(SZ_8M);
148
149 /* detect cpu id */
150 s3c64xx_init_cpu();
151
152 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
153}
154
155static __init int s3c64xx_sysdev_init(void)
156{
157 sysdev_class_register(&s3c64xx_sysclass);
158 return sysdev_register(&s3c64xx_sysdev);
159}
160
161core_initcall(s3c64xx_sysdev_init);
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd362604dcce..dc2bc15142ce 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <mach/map.h> 15 .macro disable_fiq
16#include <mach/irqs.h> 16 .endm
17 17
18#include <asm/entry-macro-vic2.S> 18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..353ed4389ae7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -11,20 +11,9 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <plat/watchdog-reset.h>
15
16static void arch_idle(void) 14static void arch_idle(void)
17{ 15{
18 /* nothing here yet */ 16 /* nothing here yet */
19} 17}
20 18
21static void arch_reset(char mode, const char *cmd)
22{
23 if (mode != 's')
24 arch_wdt_reset();
25
26 /* if all else fails, or mode was for soft, jump to 0 */
27 cpu_reset(0);
28}
29
30#endif /* __ASM_ARCH_IRQ_H */ 19#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
deleted file mode 100644
index 23f75e556a30..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
deleted file mode 100644
index b07357e94958..000000000000
--- a/arch/arm/mach-s3c64xx/irq.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/* arch/arm/plat-s3c64xx/irq.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - Interrupt handling
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/serial_core.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <asm/hardware/vic.h>
22
23#include <mach/map.h>
24#include <plat/irq-vic-timer.h>
25#include <plat/irq-uart.h>
26#include <plat/cpu.h>
27
28/* setup the sources the vic should advertise resume for, even though it
29 * is not doing the wake (set_irq_wake needs to be valid) */
30#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
31#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
32 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
33 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
34 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
35 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
36
37void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
38{
39 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
40
41 /* initialise the pair of VICs */
42 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
43 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
44
45 /* add the timer sub-irqs */
46 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
47}
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 8eba88e7209e..b86f2779e4e6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
30 30
31#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
32 32
33#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
@@ -45,13 +46,14 @@
45#include <plat/fb.h> 46#include <plat/fb.h>
46#include <plat/regs-fb-v4.h> 47#include <plat/regs-fb-v4.h>
47 48
48#include <plat/s3c6410.h>
49#include <plat/clock.h> 49#include <plat/clock.h>
50#include <plat/devs.h> 50#include <plat/devs.h>
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
53#include <mach/regs-modem.h> 53#include <mach/regs-modem.h>
54 54
55#include "common.h"
56
55/* DM9000 */ 57/* DM9000 */
56#define ANW6410_PA_DM9000 (0x18000000) 58#define ANW6410_PA_DM9000 (0x18000000)
57 59
@@ -236,7 +238,9 @@ MACHINE_START(ANW6410, "A&W6410")
236 .atag_offset = 0x100, 238 .atag_offset = 0x100,
237 239
238 .init_irq = s3c6410_init_irq, 240 .init_irq = s3c6410_init_irq,
241 .handle_irq = vic_handle_irq,
239 .map_io = anw6410_map_io, 242 .map_io = anw6410_map_io,
240 .init_machine = anw6410_machine_init, 243 .init_machine = anw6410_machine_init,
241 .timer = &s3c24xx_timer, 244 .timer = &s3c24xx_timer,
245 .restart = s3c64xx_restart,
242MACHINE_END 246MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index d04b65448510..f1c848aa4a1e 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <asm/hardware/vic.h>
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42 43
@@ -50,7 +51,6 @@
50 51
51#include <mach/regs-gpio-memport.h> 52#include <mach/regs-gpio-memport.h>
52 53
53#include <plat/s3c6410.h>
54#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
55#include <plat/regs-fb-v4.h> 55#include <plat/regs-fb-v4.h>
56#include <plat/fb.h> 56#include <plat/fb.h>
@@ -66,6 +66,8 @@
66#include <plat/iic.h> 66#include <plat/iic.h>
67#include <plat/pm.h> 67#include <plat/pm.h>
68 68
69#include "common.h"
70
69/* serial port setup */ 71/* serial port setup */
70 72
71#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 73#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -711,7 +713,9 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
711 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 713 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
712 .atag_offset = 0x100, 714 .atag_offset = 0x100,
713 .init_irq = s3c6410_init_irq, 715 .init_irq = s3c6410_init_irq,
716 .handle_irq = vic_handle_irq,
714 .map_io = crag6410_map_io, 717 .map_io = crag6410_map_io,
715 .init_machine = crag6410_machine_init, 718 .init_machine = crag6410_machine_init,
716 .timer = &s3c24xx_timer, 719 .timer = &s3c24xx_timer,
720 .restart = s3c64xx_restart,
717MACHINE_END 721MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 952f75ff5deb..521e07b8501b 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/map.h> 30#include <mach/map.h>
31 31
32#include <asm/hardware/vic.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
@@ -37,12 +38,13 @@
37#include <plat/fb.h> 38#include <plat/fb.h>
38#include <plat/nand.h> 39#include <plat/nand.h>
39 40
40#include <plat/s3c6410.h>
41#include <plat/clock.h> 41#include <plat/clock.h>
42#include <plat/devs.h> 42#include <plat/devs.h>
43#include <plat/cpu.h> 43#include <plat/cpu.h>
44#include <plat/regs-fb-v4.h> 44#include <plat/regs-fb-v4.h>
45 45
46#include "common.h"
47
46#define UCON S3C2410_UCON_DEFAULT 48#define UCON S3C2410_UCON_DEFAULT
47#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
48#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -267,7 +269,9 @@ MACHINE_START(HMT, "Airgoo-HMT")
267 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 269 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
268 .atag_offset = 0x100, 270 .atag_offset = 0x100,
269 .init_irq = s3c6410_init_irq, 271 .init_irq = s3c6410_init_irq,
272 .handle_irq = vic_handle_irq,
270 .map_io = hmt_map_io, 273 .map_io = hmt_map_io,
271 .init_machine = hmt_machine_init, 274 .init_machine = hmt_machine_init,
272 .timer = &s3c24xx_timer, 275 .timer = &s3c24xx_timer,
276 .restart = s3c64xx_restart,
273MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 1bc85c359498..c34c2ab22ead 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
@@ -33,7 +34,6 @@
33#include <mach/regs-modem.h> 34#include <mach/regs-modem.h>
34#include <mach/regs-srom.h> 35#include <mach/regs-srom.h>
35 36
36#include <plat/s3c6410.h>
37#include <plat/adc.h> 37#include <plat/adc.h>
38#include <plat/cpu.h> 38#include <plat/cpu.h>
39#include <plat/devs.h> 39#include <plat/devs.h>
@@ -45,6 +45,8 @@
45 45
46#include <video/platform_lcd.h> 46#include <video/platform_lcd.h>
47 47
48#include "common.h"
49
48#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 52#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -345,7 +347,9 @@ MACHINE_START(MINI6410, "MINI6410")
345 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 347 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
346 .atag_offset = 0x100, 348 .atag_offset = 0x100,
347 .init_irq = s3c6410_init_irq, 349 .init_irq = s3c6410_init_irq,
350 .handle_irq = vic_handle_irq,
348 .map_io = mini6410_map_io, 351 .map_io = mini6410_map_io,
349 .init_machine = mini6410_machine_init, 352 .init_machine = mini6410_machine_init,
350 .timer = &s3c24xx_timer, 353 .timer = &s3c24xx_timer,
354 .restart = s3c64xx_restart,
351MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index cb13cba98b3d..0efa2ba783b2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
25 25
26#include <video/platform_lcd.h> 26#include <video/platform_lcd.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
@@ -39,12 +40,13 @@
39#include <plat/iic.h> 40#include <plat/iic.h>
40#include <plat/fb.h> 41#include <plat/fb.h>
41 42
42#include <plat/s3c6410.h>
43#include <plat/clock.h> 43#include <plat/clock.h>
44#include <plat/devs.h> 44#include <plat/devs.h>
45#include <plat/cpu.h> 45#include <plat/cpu.h>
46#include <plat/regs-fb-v4.h> 46#include <plat/regs-fb-v4.h>
47 47
48#include "common.h"
49
48#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
49#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE 51#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
50#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 52#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -99,7 +101,9 @@ MACHINE_START(NCP, "NCP")
99 /* Maintainer: Samsung Electronics */ 101 /* Maintainer: Samsung Electronics */
100 .atag_offset = 0x100, 102 .atag_offset = 0x100,
101 .init_irq = s3c6410_init_irq, 103 .init_irq = s3c6410_init_irq,
104 .handle_irq = vic_handle_irq,
102 .map_io = ncp_map_io, 105 .map_io = ncp_map_io,
103 .init_machine = ncp_machine_init, 106 .init_machine = ncp_machine_init,
104 .timer = &s3c24xx_timer, 107 .timer = &s3c24xx_timer,
108 .restart = s3c64xx_restart,
105MACHINE_END 109MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 87281e4b8471..be2a9a22ab74 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -34,7 +35,6 @@
34#include <mach/regs-modem.h> 35#include <mach/regs-modem.h>
35#include <mach/regs-srom.h> 36#include <mach/regs-srom.h>
36 37
37#include <plat/s3c6410.h>
38#include <plat/adc.h> 38#include <plat/adc.h>
39#include <plat/cpu.h> 39#include <plat/cpu.h>
40#include <plat/devs.h> 40#include <plat/devs.h>
@@ -46,6 +46,8 @@
46 46
47#include <video/platform_lcd.h> 47#include <video/platform_lcd.h>
48 48
49#include "common.h"
50
49#define UCON S3C2410_UCON_DEFAULT 51#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 52#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 53#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -326,7 +328,9 @@ MACHINE_START(REAL6410, "REAL6410")
326 .atag_offset = 0x100, 328 .atag_offset = 0x100,
327 329
328 .init_irq = s3c6410_init_irq, 330 .init_irq = s3c6410_init_irq,
331 .handle_irq = vic_handle_irq,
329 .map_io = real6410_map_io, 332 .map_io = real6410_map_io,
330 .init_machine = real6410_machine_init, 333 .init_machine = real6410_machine_init,
331 .timer = &s3c24xx_timer, 334 .timer = &s3c24xx_timer,
335 .restart = s3c64xx_restart,
332MACHINE_END 336MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index cb1ebeb08763..ce31db136231 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -40,6 +40,8 @@
40 40
41#include <video/platform_lcd.h> 41#include <video/platform_lcd.h>
42 42
43#include "common.h"
44
43#define UCON S3C2410_UCON_DEFAULT 45#define UCON S3C2410_UCON_DEFAULT
44#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 46#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
45#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 47#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 94c831d88365..3f42431d4dda 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,19 +17,20 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
23#include <mach/map.h> 24#include <mach/map.h>
24#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
25 26
26#include <plat/s3c6410.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/devs.h> 28#include <plat/devs.h>
29#include <plat/fb.h> 29#include <plat/fb.h>
30#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
31#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
32 32
33#include "common.h"
33#include "mach-smartq.h" 34#include "mach-smartq.h"
34 35
35static struct gpio_led smartq5_leds[] = { 36static struct gpio_led smartq5_leds[] = {
@@ -148,7 +149,9 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
148 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 149 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
149 .atag_offset = 0x100, 150 .atag_offset = 0x100,
150 .init_irq = s3c6410_init_irq, 151 .init_irq = s3c6410_init_irq,
152 .handle_irq = vic_handle_irq,
151 .map_io = smartq_map_io, 153 .map_io = smartq_map_io,
152 .init_machine = smartq5_machine_init, 154 .init_machine = smartq5_machine_init,
153 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
156 .restart = s3c64xx_restart,
154MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index f112547ce80a..e5c09b6db967 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,19 +17,20 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
23#include <mach/map.h> 24#include <mach/map.h>
24#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
25 26
26#include <plat/s3c6410.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/devs.h> 28#include <plat/devs.h>
29#include <plat/fb.h> 29#include <plat/fb.h>
30#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
31#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
32 32
33#include "common.h"
33#include "mach-smartq.h" 34#include "mach-smartq.h"
34 35
35static struct gpio_led smartq7_leds[] = { 36static struct gpio_led smartq7_leds[] = {
@@ -164,7 +165,9 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
164 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 165 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
165 .atag_offset = 0x100, 166 .atag_offset = 0x100,
166 .init_irq = s3c6410_init_irq, 167 .init_irq = s3c6410_init_irq,
168 .handle_irq = vic_handle_irq,
167 .map_io = smartq_map_io, 169 .map_io = smartq_map_io,
168 .init_machine = smartq7_machine_init, 170 .init_machine = smartq7_machine_init,
169 .timer = &s3c24xx_timer, 171 .timer = &s3c24xx_timer,
172 .restart = s3c64xx_restart,
170MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 73450c2b530a..5f096534f4c4 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
@@ -31,12 +32,13 @@
31 32
32#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
33 34
34#include <plat/s3c6400.h>
35#include <plat/clock.h> 35#include <plat/clock.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/cpu.h> 37#include <plat/cpu.h>
38#include <plat/iic.h> 38#include <plat/iic.h>
39 39
40#include "common.h"
41
40#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 42#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
41#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 43#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
42#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 44#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -88,7 +90,9 @@ MACHINE_START(SMDK6400, "SMDK6400")
88 .atag_offset = 0x100, 90 .atag_offset = 0x100,
89 91
90 .init_irq = s3c6400_init_irq, 92 .init_irq = s3c6400_init_irq,
93 .handle_irq = vic_handle_irq,
91 .map_io = smdk6400_map_io, 94 .map_io = smdk6400_map_io,
92 .init_machine = smdk6400_machine_init, 95 .init_machine = smdk6400_machine_init,
93 .timer = &s3c24xx_timer, 96 .timer = &s3c24xx_timer,
97 .restart = s3c64xx_restart,
94MACHINE_END 98MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8bc8edd85e5a..ca6fc204f0ea 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
43 43
44#include <video/platform_lcd.h> 44#include <video/platform_lcd.h>
45 45
46#include <asm/hardware/vic.h>
46#include <asm/mach/arch.h> 47#include <asm/mach/arch.h>
47#include <asm/mach/map.h> 48#include <asm/mach/map.h>
48#include <asm/mach/irq.h> 49#include <asm/mach/irq.h>
@@ -63,7 +64,6 @@
63#include <plat/fb.h> 64#include <plat/fb.h>
64#include <plat/gpio-cfg.h> 65#include <plat/gpio-cfg.h>
65 66
66#include <plat/s3c6410.h>
67#include <plat/clock.h> 67#include <plat/clock.h>
68#include <plat/devs.h> 68#include <plat/devs.h>
69#include <plat/cpu.h> 69#include <plat/cpu.h>
@@ -73,6 +73,8 @@
73#include <plat/backlight.h> 73#include <plat/backlight.h>
74#include <plat/regs-fb-v4.h> 74#include <plat/regs-fb-v4.h>
75 75
76#include "common.h"
77
76#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 78#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
77#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 79#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
78#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 80#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -700,7 +702,9 @@ MACHINE_START(SMDK6410, "SMDK6410")
700 .atag_offset = 0x100, 702 .atag_offset = 0x100,
701 703
702 .init_irq = s3c6410_init_irq, 704 .init_irq = s3c6410_init_irq,
705 .handle_irq = vic_handle_irq,
703 .map_io = smdk6410_map_io, 706 .map_io = smdk6410_map_io,
704 .init_machine = smdk6410_machine_init, 707 .init_machine = smdk6410_machine_init,
705 .timer = &s3c24xx_timer, 708 .timer = &s3c24xx_timer,
709 .restart = s3c64xx_restart,
706MACHINE_END 710MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 51c00f2453c6..b1e1571f2f6b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -38,7 +38,8 @@
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/onenand-core.h> 40#include <plat/onenand-core.h>
41#include <plat/s3c6400.h> 41
42#include "common.h"
42 43
43void __init s3c6400_map_io(void) 44void __init s3c6400_map_io(void)
44{ 45{
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void)
60void __init s3c6400_init_clocks(int xtal) 61void __init s3c6400_init_clocks(int xtal)
61{ 62{
62 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); 63 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
63 s3c6400_setup_clocks(); 64 s3c64xx_setup_clocks();
64} 65}
65 66
66void __init s3c6400_init_irq(void) 67void __init s3c6400_init_irq(void)
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 4117003464ad..fba71bd991c7 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -41,8 +41,8 @@
41#include <plat/adc-core.h> 41#include <plat/adc-core.h>
42#include <plat/iic-core.h> 42#include <plat/iic-core.h>
43#include <plat/onenand-core.h> 43#include <plat/onenand-core.h>
44#include <plat/s3c6400.h> 44
45#include <plat/s3c6410.h> 45#include "common.h"
46 46
47void __init s3c6410_map_io(void) 47void __init s3c6410_map_io(void)
48{ 48{
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal)
66{ 66{
67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); 68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
69 s3c6400_setup_clocks(); 69 s3c64xx_setup_clocks();
70} 70}
71 71
72void __init s3c6410_init_irq(void) 72void __init s3c6410_init_irq(void)
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index b44cc044b3c3..12bb951187a4 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -10,14 +10,16 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for S5P64X0 system 13# Core
14 14
15obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o 15obj-y += common.o clock.o
16obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
17obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o 16obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
18obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o 17obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
18
19obj-$(CONFIG_PM) += pm.o irq-pm.o 19obj-$(CONFIG_PM) += pm.o irq-pm.o
20 20
21obj-y += dma.o
22
21# machine support 23# machine support
22 24
23obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o 25obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
@@ -27,6 +29,7 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
27 29
28obj-y += dev-audio.o 30obj-y += dev-audio.o
29 31
32obj-y += setup-i2c0.o
30obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 33obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
31obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o 35obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c041ad7fbd60..4b3023e8423a 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -31,7 +31,8 @@
31#include <plat/pll.h> 31#include <plat/pll.h>
32#include <plat/s5p-clock.h> 32#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 33#include <plat/clock-clksrc.h>
34#include <plat/s5p6440.h> 34
35#include "common.h"
35 36
36static u32 epll_div[][5] = { 37static u32 epll_div[][5] = {
37 { 36000000, 0, 48, 1, 4 }, 38 { 36000000, 0, 48, 1, 4 },
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index b5087cb6e818..5bf607ccbaf7 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -31,7 +31,8 @@
31#include <plat/pll.h> 31#include <plat/pll.h>
32#include <plat/s5p-clock.h> 32#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 33#include <plat/clock-clksrc.h>
34#include <plat/s5p6450.h> 34
35#include "common.h"
35 36
36static struct clksrc_clk clk_mout_dpll = { 37static struct clksrc_clk clk_mout_dpll = {
37 .clk = { 38 .clk = {
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
index b52c6e2f37a6..b289b726a7d6 100644
--- a/arch/arm/mach-s5p64x0/clock.c
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -30,8 +30,8 @@
30#include <plat/pll.h> 30#include <plat/pll.h>
31#include <plat/s5p-clock.h> 31#include <plat/s5p-clock.h>
32#include <plat/clock-clksrc.h> 32#include <plat/clock-clksrc.h>
33#include <plat/s5p6440.h> 33
34#include <plat/s5p6450.h> 34#include "common.h"
35 35
36struct clksrc_clk clk_mout_apll = { 36struct clksrc_clk clk_mout_apll = {
37 .clk = { 37 .clk = {
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
new file mode 100644
index 000000000000..146fae18ef4d
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -0,0 +1,446 @@
1/*
2 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Codes for S5P64X0 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/sched.h>
24#include <linux/dma-mapping.h>
25#include <linux/gpio.h>
26#include <linux/irq.h>
27
28#include <asm/irq.h>
29#include <asm/proc-fns.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
33
34#include <mach/map.h>
35#include <mach/hardware.h>
36#include <mach/regs-clock.h>
37#include <mach/regs-gpio.h>
38
39#include <plat/cpu.h>
40#include <plat/clock.h>
41#include <plat/devs.h>
42#include <plat/pm.h>
43#include <plat/sdhci.h>
44#include <plat/adc-core.h>
45#include <plat/fb-core.h>
46#include <plat/gpio-cfg.h>
47#include <plat/regs-irqtype.h>
48#include <plat/regs-serial.h>
49#include <plat/watchdog-reset.h>
50
51#include "common.h"
52
53static const char name_s5p6440[] = "S5P6440";
54static const char name_s5p6450[] = "S5P6450";
55
56static struct cpu_table cpu_ids[] __initdata = {
57 {
58 .idcode = S5P6440_CPU_ID,
59 .idmask = S5P64XX_CPU_MASK,
60 .map_io = s5p6440_map_io,
61 .init_clocks = s5p6440_init_clocks,
62 .init_uarts = s5p6440_init_uarts,
63 .init = s5p64x0_init,
64 .name = name_s5p6440,
65 }, {
66 .idcode = S5P6450_CPU_ID,
67 .idmask = S5P64XX_CPU_MASK,
68 .map_io = s5p6450_map_io,
69 .init_clocks = s5p6450_init_clocks,
70 .init_uarts = s5p6450_init_uarts,
71 .init = s5p64x0_init,
72 .name = name_s5p6450,
73 },
74};
75
76/* Initial IO mappings */
77
78static struct map_desc s5p64x0_iodesc[] __initdata = {
79 {
80 .virtual = (unsigned long)S5P_VA_CHIPID,
81 .pfn = __phys_to_pfn(S5P64X0_PA_CHIPID),
82 .length = SZ_4K,
83 .type = MT_DEVICE,
84 }, {
85 .virtual = (unsigned long)S3C_VA_SYS,
86 .pfn = __phys_to_pfn(S5P64X0_PA_SYSCON),
87 .length = SZ_64K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = (unsigned long)S3C_VA_TIMER,
91 .pfn = __phys_to_pfn(S5P64X0_PA_TIMER),
92 .length = SZ_16K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C_VA_WATCHDOG,
96 .pfn = __phys_to_pfn(S5P64X0_PA_WDT),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 }, {
100 .virtual = (unsigned long)S5P_VA_SROMC,
101 .pfn = __phys_to_pfn(S5P64X0_PA_SROMC),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 }, {
105 .virtual = (unsigned long)S5P_VA_GPIO,
106 .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
107 .length = SZ_4K,
108 .type = MT_DEVICE,
109 }, {
110 .virtual = (unsigned long)VA_VIC0,
111 .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
112 .length = SZ_16K,
113 .type = MT_DEVICE,
114 }, {
115 .virtual = (unsigned long)VA_VIC1,
116 .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
117 .length = SZ_16K,
118 .type = MT_DEVICE,
119 },
120};
121
122static struct map_desc s5p6440_iodesc[] __initdata = {
123 {
124 .virtual = (unsigned long)S3C_VA_UART,
125 .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
126 .length = SZ_4K,
127 .type = MT_DEVICE,
128 },
129};
130
131static struct map_desc s5p6450_iodesc[] __initdata = {
132 {
133 .virtual = (unsigned long)S3C_VA_UART,
134 .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
135 .length = SZ_512K,
136 .type = MT_DEVICE,
137 }, {
138 .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
139 .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
140 .length = SZ_4K,
141 .type = MT_DEVICE,
142 },
143};
144
145static void s5p64x0_idle(void)
146{
147 unsigned long val;
148
149 if (!need_resched()) {
150 val = __raw_readl(S5P64X0_PWR_CFG);
151 val &= ~(0x3 << 5);
152 val |= (0x1 << 5);
153 __raw_writel(val, S5P64X0_PWR_CFG);
154
155 cpu_do_idle();
156 }
157 local_irq_enable();
158}
159
160/*
161 * s5p64x0_map_io
162 *
163 * register the standard CPU IO areas
164 */
165
166void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
167{
168 /* initialize the io descriptors we need for initialization */
169 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
170 if (mach_desc)
171 iotable_init(mach_desc, size);
172
173 /* detect cpu id and rev. */
174 s5p_init_cpu(S5P64X0_SYS_ID);
175
176 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
177}
178
179void __init s5p6440_map_io(void)
180{
181 /* initialize any device information early */
182 s3c_adc_setname("s3c64xx-adc");
183 s3c_fb_setname("s5p64x0-fb");
184
185 s5p64x0_default_sdhci0();
186 s5p64x0_default_sdhci1();
187 s5p6440_default_sdhci2();
188
189 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
190 init_consistent_dma_size(SZ_8M);
191}
192
193void __init s5p6450_map_io(void)
194{
195 /* initialize any device information early */
196 s3c_adc_setname("s3c64xx-adc");
197 s3c_fb_setname("s5p64x0-fb");
198
199 s5p64x0_default_sdhci0();
200 s5p64x0_default_sdhci1();
201 s5p6450_default_sdhci2();
202
203 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
204 init_consistent_dma_size(SZ_8M);
205}
206
207/*
208 * s5p64x0_init_clocks
209 *
210 * register and setup the CPU clocks
211 */
212
213void __init s5p6440_init_clocks(int xtal)
214{
215 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
216
217 s3c24xx_register_baseclocks(xtal);
218 s5p_register_clocks(xtal);
219 s5p6440_register_clocks();
220 s5p6440_setup_clocks();
221}
222
223void __init s5p6450_init_clocks(int xtal)
224{
225 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
226
227 s3c24xx_register_baseclocks(xtal);
228 s5p_register_clocks(xtal);
229 s5p6450_register_clocks();
230 s5p6450_setup_clocks();
231}
232
233/*
234 * s5p64x0_init_irq
235 *
236 * register the CPU interrupts
237 */
238
239void __init s5p6440_init_irq(void)
240{
241 /* S5P6440 supports 2 VIC */
242 u32 vic[2];
243
244 /*
245 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
246 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
247 */
248 vic[0] = 0xff800ae7;
249 vic[1] = 0xffbf23e5;
250
251 s5p_init_irq(vic, ARRAY_SIZE(vic));
252}
253
254void __init s5p6450_init_irq(void)
255{
256 /* S5P6450 supports only 2 VIC */
257 u32 vic[2];
258
259 /*
260 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
261 * VIC1 is missing IRQ VIC1[12, 14, 23]
262 */
263 vic[0] = 0xff9f1fff;
264 vic[1] = 0xff7fafff;
265
266 s5p_init_irq(vic, ARRAY_SIZE(vic));
267}
268
269struct sysdev_class s5p64x0_sysclass = {
270 .name = "s5p64x0-core",
271};
272
273static struct sys_device s5p64x0_sysdev = {
274 .cls = &s5p64x0_sysclass,
275};
276
277static int __init s5p64x0_core_init(void)
278{
279 return sysdev_class_register(&s5p64x0_sysclass);
280}
281core_initcall(s5p64x0_core_init);
282
283int __init s5p64x0_init(void)
284{
285 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
286
287 /* set idle function */
288 pm_idle = s5p64x0_idle;
289
290 return sysdev_register(&s5p64x0_sysdev);
291}
292
293/* uart registration process */
294void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
295{
296 int uart;
297
298 for (uart = 0; uart < no; uart++) {
299 s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
300 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
301 }
302
303 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
304}
305
306void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
307{
308 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
309}
310
311#define eint_offset(irq) ((irq) - IRQ_EINT(0))
312
313static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
314{
315 int offs = eint_offset(data->irq);
316 int shift;
317 u32 ctrl, mask;
318 u32 newvalue = 0;
319
320 if (offs > 15)
321 return -EINVAL;
322
323 switch (type) {
324 case IRQ_TYPE_NONE:
325 printk(KERN_WARNING "No edge setting!\n");
326 break;
327 case IRQ_TYPE_EDGE_RISING:
328 newvalue = S3C2410_EXTINT_RISEEDGE;
329 break;
330 case IRQ_TYPE_EDGE_FALLING:
331 newvalue = S3C2410_EXTINT_FALLEDGE;
332 break;
333 case IRQ_TYPE_EDGE_BOTH:
334 newvalue = S3C2410_EXTINT_BOTHEDGE;
335 break;
336 case IRQ_TYPE_LEVEL_LOW:
337 newvalue = S3C2410_EXTINT_LOWLEV;
338 break;
339 case IRQ_TYPE_LEVEL_HIGH:
340 newvalue = S3C2410_EXTINT_HILEV;
341 break;
342 default:
343 printk(KERN_ERR "No such irq type %d", type);
344 return -EINVAL;
345 }
346
347 shift = (offs / 2) * 4;
348 mask = 0x7 << shift;
349
350 ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
351 ctrl |= newvalue << shift;
352 __raw_writel(ctrl, S5P64X0_EINT0CON0);
353
354 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
355 if (soc_is_s5p6450())
356 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
357 else
358 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
359
360 return 0;
361}
362
363/*
364 * s5p64x0_irq_demux_eint
365 *
366 * This function demuxes the IRQ from the group0 external interrupts,
367 * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
368 * the specific handlers s5p64x0_irq_demux_eintX_Y.
369 */
370static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
371{
372 u32 status = __raw_readl(S5P64X0_EINT0PEND);
373 u32 mask = __raw_readl(S5P64X0_EINT0MASK);
374 unsigned int irq;
375
376 status &= ~mask;
377 status >>= start;
378 status &= (1 << (end - start + 1)) - 1;
379
380 for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
381 if (status & 1)
382 generic_handle_irq(irq);
383 status >>= 1;
384 }
385}
386
387static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
388{
389 s5p64x0_irq_demux_eint(0, 3);
390}
391
392static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
393{
394 s5p64x0_irq_demux_eint(4, 11);
395}
396
397static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
398 struct irq_desc *desc)
399{
400 s5p64x0_irq_demux_eint(12, 15);
401}
402
403static int s5p64x0_alloc_gc(void)
404{
405 struct irq_chip_generic *gc;
406 struct irq_chip_type *ct;
407
408 gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
409 S5P_VA_GPIO, handle_level_irq);
410 if (!gc) {
411 printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
412 "external interrupts failed\n", __func__);
413 return -EINVAL;
414 }
415
416 ct = gc->chip_types;
417 ct->chip.irq_ack = irq_gc_ack_set_bit;
418 ct->chip.irq_mask = irq_gc_mask_set_bit;
419 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
420 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
421 ct->chip.irq_set_wake = s3c_irqext_wake;
422 ct->regs.ack = EINT0PEND_OFFSET;
423 ct->regs.mask = EINT0MASK_OFFSET;
424 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
425 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
426 return 0;
427}
428
429static int __init s5p64x0_init_irq_eint(void)
430{
431 int ret = s5p64x0_alloc_gc();
432 irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
433 irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
434 irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
435
436 return ret;
437}
438arch_initcall(s5p64x0_init_irq_eint);
439
440void s5p64x0_restart(char mode, const char *cmd)
441{
442 if (mode != 's')
443 arch_wdt_reset();
444
445 soft_restart(0);
446}
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
new file mode 100644
index 000000000000..f8a60fdc5884
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5P64X0 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
13#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
14
15void s5p6440_init_irq(void);
16void s5p6450_init_irq(void);
17void s5p64x0_init_io(struct map_desc *mach_desc, int size);
18
19void s5p6440_register_clocks(void);
20void s5p6440_setup_clocks(void);
21
22void s5p6450_register_clocks(void);
23void s5p6450_setup_clocks(void);
24
25void s5p64x0_restart(char mode, const char *cmd);
26
27#ifdef CONFIG_CPU_S5P6440
28
29extern int s5p64x0_init(void);
30extern void s5p6440_map_io(void);
31extern void s5p6440_init_clocks(int xtal);
32
33extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
34
35#else
36#define s5p6440_init_clocks NULL
37#define s5p6440_init_uarts NULL
38#define s5p6440_map_io NULL
39#define s5p64x0_init NULL
40#endif
41
42#ifdef CONFIG_CPU_S5P6450
43
44extern int s5p64x0_init(void);
45extern void s5p6450_map_io(void);
46extern void s5p6450_init_clocks(int xtal);
47
48extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
49
50#else
51#define s5p6450_init_clocks NULL
52#define s5p6450_init_uarts NULL
53#define s5p6450_map_io NULL
54#define s5p64x0_init NULL
55#endif
56
57#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
deleted file mode 100644
index f6e24f3ef760..000000000000
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/cpu.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/sched.h>
23#include <linux/dma-mapping.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28#include <asm/proc-fns.h>
29#include <asm/irq.h>
30
31#include <mach/hardware.h>
32#include <mach/map.h>
33#include <mach/regs-clock.h>
34
35#include <plat/regs-serial.h>
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/s5p6440.h>
40#include <plat/s5p6450.h>
41#include <plat/adc-core.h>
42#include <plat/fb-core.h>
43#include <plat/sdhci.h>
44
45/* Initial IO mappings */
46
47static struct map_desc s5p64x0_iodesc[] __initdata = {
48 {
49 .virtual = (unsigned long)S5P_VA_GPIO,
50 .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)VA_VIC0,
55 .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
56 .length = SZ_16K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = (unsigned long)VA_VIC1,
60 .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
61 .length = SZ_16K,
62 .type = MT_DEVICE,
63 },
64};
65
66static struct map_desc s5p6440_iodesc[] __initdata = {
67 {
68 .virtual = (unsigned long)S3C_VA_UART,
69 .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 },
73};
74
75static struct map_desc s5p6450_iodesc[] __initdata = {
76 {
77 .virtual = (unsigned long)S3C_VA_UART,
78 .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
79 .length = SZ_512K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
83 .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
84 .length = SZ_4K,
85 .type = MT_DEVICE,
86 },
87};
88
89static void s5p64x0_idle(void)
90{
91 unsigned long val;
92
93 if (!need_resched()) {
94 val = __raw_readl(S5P64X0_PWR_CFG);
95 val &= ~(0x3 << 5);
96 val |= (0x1 << 5);
97 __raw_writel(val, S5P64X0_PWR_CFG);
98
99 cpu_do_idle();
100 }
101 local_irq_enable();
102}
103
104/*
105 * s5p64x0_map_io
106 *
107 * register the standard CPU IO areas
108 */
109
110void __init s5p6440_map_io(void)
111{
112 /* initialize any device information early */
113 s3c_adc_setname("s3c64xx-adc");
114 s3c_fb_setname("s5p64x0-fb");
115
116 s5p64x0_default_sdhci0();
117 s5p64x0_default_sdhci1();
118 s5p6440_default_sdhci2();
119
120 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
121 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
122 init_consistent_dma_size(SZ_8M);
123}
124
125void __init s5p6450_map_io(void)
126{
127 /* initialize any device information early */
128 s3c_adc_setname("s3c64xx-adc");
129 s3c_fb_setname("s5p64x0-fb");
130
131 s5p64x0_default_sdhci0();
132 s5p64x0_default_sdhci1();
133 s5p6450_default_sdhci2();
134
135 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
136 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
137 init_consistent_dma_size(SZ_8M);
138}
139
140/*
141 * s5p64x0_init_clocks
142 *
143 * register and setup the CPU clocks
144 */
145
146void __init s5p6440_init_clocks(int xtal)
147{
148 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
149
150 s3c24xx_register_baseclocks(xtal);
151 s5p_register_clocks(xtal);
152 s5p6440_register_clocks();
153 s5p6440_setup_clocks();
154}
155
156void __init s5p6450_init_clocks(int xtal)
157{
158 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
159
160 s3c24xx_register_baseclocks(xtal);
161 s5p_register_clocks(xtal);
162 s5p6450_register_clocks();
163 s5p6450_setup_clocks();
164}
165
166/*
167 * s5p64x0_init_irq
168 *
169 * register the CPU interrupts
170 */
171
172void __init s5p6440_init_irq(void)
173{
174 /* S5P6440 supports 2 VIC */
175 u32 vic[2];
176
177 /*
178 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
179 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
180 */
181 vic[0] = 0xff800ae7;
182 vic[1] = 0xffbf23e5;
183
184 s5p_init_irq(vic, ARRAY_SIZE(vic));
185}
186
187void __init s5p6450_init_irq(void)
188{
189 /* S5P6450 supports only 2 VIC */
190 u32 vic[2];
191
192 /*
193 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
194 * VIC1 is missing IRQ VIC1[12, 14, 23]
195 */
196 vic[0] = 0xff9f1fff;
197 vic[1] = 0xff7fafff;
198
199 s5p_init_irq(vic, ARRAY_SIZE(vic));
200}
201
202struct sysdev_class s5p64x0_sysclass = {
203 .name = "s5p64x0-core",
204};
205
206static struct sys_device s5p64x0_sysdev = {
207 .cls = &s5p64x0_sysclass,
208};
209
210static int __init s5p64x0_core_init(void)
211{
212 return sysdev_class_register(&s5p64x0_sysclass);
213}
214core_initcall(s5p64x0_core_init);
215
216int __init s5p64x0_init(void)
217{
218 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
219
220 /* set idle function */
221 pm_idle = s5p64x0_idle;
222
223 return sysdev_register(&s5p64x0_sysdev);
224}
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4f8211..fbb246d0a3df 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <mach/map.h> 13 .macro disable_fiq
14#include <plat/irqs.h> 14 .endm
15 15
16#include <asm/entry-macro-vic2.S> 16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
index 60f57532c970..cf26e0954a2f 100644
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
deleted file mode 100644
index 38dcc71a03cc..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
deleted file mode 100644
index 659a66c131a1..000000000000
--- a/arch/arm/mach-s5p64x0/init.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/init.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Init support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/serial_core.h>
17
18#include <mach/map.h>
19
20#include <plat/cpu.h>
21#include <plat/devs.h>
22#include <plat/s5p6440.h>
23#include <plat/s5p6450.h>
24#include <plat/regs-serial.h>
25
26/* uart registration process */
27void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
28{
29 int uart;
30
31 for (uart = 0; uart < no; uart++) {
32 s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
33 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
34 }
35
36 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
37}
38
39void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
40{
41 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
42}
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
deleted file mode 100644
index 275dc74f4a7b..000000000000
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/* arch/arm/mach-s5p64x0/irq-eint.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd
4 * http://www.samsung.com/
5 *
6 * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
7 *
8 * S5P64X0 - Interrupt handling for External Interrupts.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/gpio.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19
20#include <plat/cpu.h>
21#include <plat/regs-irqtype.h>
22#include <plat/gpio-cfg.h>
23#include <plat/pm.h>
24
25#include <mach/regs-gpio.h>
26#include <mach/regs-clock.h>
27
28#define eint_offset(irq) ((irq) - IRQ_EINT(0))
29
30static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
31{
32 int offs = eint_offset(data->irq);
33 int shift;
34 u32 ctrl, mask;
35 u32 newvalue = 0;
36
37 if (offs > 15)
38 return -EINVAL;
39
40 switch (type) {
41 case IRQ_TYPE_NONE:
42 printk(KERN_WARNING "No edge setting!\n");
43 break;
44 case IRQ_TYPE_EDGE_RISING:
45 newvalue = S3C2410_EXTINT_RISEEDGE;
46 break;
47 case IRQ_TYPE_EDGE_FALLING:
48 newvalue = S3C2410_EXTINT_FALLEDGE;
49 break;
50 case IRQ_TYPE_EDGE_BOTH:
51 newvalue = S3C2410_EXTINT_BOTHEDGE;
52 break;
53 case IRQ_TYPE_LEVEL_LOW:
54 newvalue = S3C2410_EXTINT_LOWLEV;
55 break;
56 case IRQ_TYPE_LEVEL_HIGH:
57 newvalue = S3C2410_EXTINT_HILEV;
58 break;
59 default:
60 printk(KERN_ERR "No such irq type %d", type);
61 return -EINVAL;
62 }
63
64 shift = (offs / 2) * 4;
65 mask = 0x7 << shift;
66
67 ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
68 ctrl |= newvalue << shift;
69 __raw_writel(ctrl, S5P64X0_EINT0CON0);
70
71 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
72 if (soc_is_s5p6450())
73 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
74 else
75 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
76
77 return 0;
78}
79
80/*
81 * s5p64x0_irq_demux_eint
82 *
83 * This function demuxes the IRQ from the group0 external interrupts,
84 * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
85 * the specific handlers s5p64x0_irq_demux_eintX_Y.
86 */
87static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
88{
89 u32 status = __raw_readl(S5P64X0_EINT0PEND);
90 u32 mask = __raw_readl(S5P64X0_EINT0MASK);
91 unsigned int irq;
92
93 status &= ~mask;
94 status >>= start;
95 status &= (1 << (end - start + 1)) - 1;
96
97 for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
98 if (status & 1)
99 generic_handle_irq(irq);
100 status >>= 1;
101 }
102}
103
104static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
105{
106 s5p64x0_irq_demux_eint(0, 3);
107}
108
109static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
110{
111 s5p64x0_irq_demux_eint(4, 11);
112}
113
114static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
115 struct irq_desc *desc)
116{
117 s5p64x0_irq_demux_eint(12, 15);
118}
119
120static int s5p64x0_alloc_gc(void)
121{
122 struct irq_chip_generic *gc;
123 struct irq_chip_type *ct;
124
125 gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
126 S5P_VA_GPIO, handle_level_irq);
127 if (!gc) {
128 printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
129 "external interrupts failed\n", __func__);
130 return -EINVAL;
131 }
132
133 ct = gc->chip_types;
134 ct->chip.irq_ack = irq_gc_ack_set_bit;
135 ct->chip.irq_mask = irq_gc_mask_set_bit;
136 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
137 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
138 ct->chip.irq_set_wake = s3c_irqext_wake;
139 ct->regs.ack = EINT0PEND_OFFSET;
140 ct->regs.mask = EINT0MASK_OFFSET;
141 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
142 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
143 return 0;
144}
145
146static int __init s5p64x0_init_irq_eint(void)
147{
148 int ret = s5p64x0_alloc_gc();
149 irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
150 irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
151 irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
152
153 return ret;
154}
155arch_initcall(s5p64x0_init_irq_eint);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index fe168a087531..a40e325d62c8 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -28,6 +28,7 @@
28 28
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30 30
31#include <asm/hardware/vic.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 33#include <asm/mach/map.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
@@ -41,7 +42,6 @@
41 42
42#include <plat/regs-serial.h> 43#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 44#include <plat/gpio-cfg.h>
44#include <plat/s5p6440.h>
45#include <plat/clock.h> 45#include <plat/clock.h>
46#include <plat/devs.h> 46#include <plat/devs.h>
47#include <plat/cpu.h> 47#include <plat/cpu.h>
@@ -55,6 +55,8 @@
55#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h> 56#include <plat/sdhci.h>
57 57
58#include "common.h"
59
58#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
60 S3C2410_UCON_TXIRQMODE | \ 62 S3C2410_UCON_TXIRQMODE | \
@@ -222,7 +224,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = {
222 224
223static void __init smdk6440_map_io(void) 225static void __init smdk6440_map_io(void)
224{ 226{
225 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 227 s5p64x0_init_io(NULL, 0);
226 s3c24xx_init_clocks(12000000); 228 s3c24xx_init_clocks(12000000);
227 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); 229 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
228 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 230 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -267,7 +269,9 @@ MACHINE_START(SMDK6440, "SMDK6440")
267 .atag_offset = 0x100, 269 .atag_offset = 0x100,
268 270
269 .init_irq = s5p6440_init_irq, 271 .init_irq = s5p6440_init_irq,
272 .handle_irq = vic_handle_irq,
270 .map_io = smdk6440_map_io, 273 .map_io = smdk6440_map_io,
271 .init_machine = smdk6440_machine_init, 274 .init_machine = smdk6440_machine_init,
272 .timer = &s5p_timer, 275 .timer = &s5p_timer,
276 .restart = s5p64x0_restart,
273MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 242a415dcf6b..efb69e2f2afe 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -28,6 +28,7 @@
28 28
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30 30
31#include <asm/hardware/vic.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 33#include <asm/mach/map.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
@@ -41,7 +42,6 @@
41 42
42#include <plat/regs-serial.h> 43#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 44#include <plat/gpio-cfg.h>
44#include <plat/s5p6450.h>
45#include <plat/clock.h> 45#include <plat/clock.h>
46#include <plat/devs.h> 46#include <plat/devs.h>
47#include <plat/cpu.h> 47#include <plat/cpu.h>
@@ -55,6 +55,8 @@
55#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h> 56#include <plat/sdhci.h>
57 57
58#include "common.h"
59
58#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
60 S3C2410_UCON_TXIRQMODE | \ 62 S3C2410_UCON_TXIRQMODE | \
@@ -241,7 +243,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = {
241 243
242static void __init smdk6450_map_io(void) 244static void __init smdk6450_map_io(void)
243{ 245{
244 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 246 s5p64x0_init_io(NULL, 0);
245 s3c24xx_init_clocks(19200000); 247 s3c24xx_init_clocks(19200000);
246 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); 248 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
247 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 249 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -286,7 +288,9 @@ MACHINE_START(SMDK6450, "SMDK6450")
286 .atag_offset = 0x100, 288 .atag_offset = 0x100,
287 289
288 .init_irq = s5p6450_init_irq, 290 .init_irq = s5p6450_init_irq,
291 .handle_irq = vic_handle_irq,
289 .map_io = smdk6450_map_io, 292 .map_io = smdk6450_map_io,
290 .init_machine = smdk6450_machine_init, 293 .init_machine = smdk6450_machine_init,
291 .timer = &s5p_timer, 294 .timer = &s5p_timer,
295 .restart = s5p64x0_restart,
292MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 291e246c0ec0..118c711f74e8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -9,27 +9,24 @@ obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
11 11
12# Core support for S5PC100 system 12# Core
13 13
14obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o 14obj-y += common.o clock.o
15obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o
16obj-$(CONFIG_CPU_S5PC100) += dma.o
17 15
18# Helper and device support 16obj-y += dma.o
19
20obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
21obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
22obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
23obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
24obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
25obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o
26
27# device support
28obj-y += dev-audio.o
29 17
30# machine support 18# machine support
31 19
32obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o 20obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o
33 21
34# device support 22# device support
23
35obj-y += dev-audio.o 24obj-y += dev-audio.o
25
26obj-y += setup-i2c0.o
27obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
28obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
29obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
30obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
31obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
32obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index eba721b551fc..247194dd366c 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -27,7 +27,8 @@
27#include <plat/pll.h> 27#include <plat/pll.h>
28#include <plat/s5p-clock.h> 28#include <plat/s5p-clock.h>
29#include <plat/clock-clksrc.h> 29#include <plat/clock-clksrc.h>
30#include <plat/s5pc100.h> 30
31#include "common.h"
31 32
32static struct clk s5p_clk_otgphy = { 33static struct clk s5p_clk_otgphy = {
33 .name = "otg_phy", 34 .name = "otg_phy",
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c
index fd2708e7d8a9..73594a2fcf26 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -1,17 +1,16 @@
1/* linux/arch/arm/mach-s5pc100/cpu.c 1/*
2 * 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
6 * Copyright 2009 Samsung Electronics Co. 5 * Copyright 2009 Samsung Electronics Co.
7 * Byungho Min <bhmin@samsung.com> 6 * Byungho Min <bhmin@samsung.com>
8 * 7 *
9 * Based on mach-s3c6410/cpu.c 8 * Common Codes for S5PC100
10 * 9 *
11 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
14*/ 13 */
15 14
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/types.h> 16#include <linux/types.h>
@@ -26,35 +25,73 @@
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/sched.h> 26#include <linux/sched.h>
28 27
28#include <asm/irq.h>
29#include <asm/proc-fns.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
32 33
33#include <asm/proc-fns.h>
34
35#include <mach/hardware.h>
36#include <mach/map.h> 34#include <mach/map.h>
37#include <asm/irq.h> 35#include <mach/hardware.h>
38
39#include <plat/regs-serial.h>
40#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
41 37
42#include <plat/cpu.h> 38#include <plat/cpu.h>
43#include <plat/devs.h> 39#include <plat/devs.h>
44#include <plat/clock.h> 40#include <plat/clock.h>
45#include <plat/ata-core.h>
46#include <plat/iic-core.h>
47#include <plat/sdhci.h> 41#include <plat/sdhci.h>
48#include <plat/adc-core.h> 42#include <plat/adc-core.h>
49#include <plat/onenand-core.h> 43#include <plat/ata-core.h>
50#include <plat/fb-core.h> 44#include <plat/fb-core.h>
45#include <plat/iic-core.h>
46#include <plat/onenand-core.h>
47#include <plat/regs-serial.h>
48#include <plat/watchdog-reset.h>
49
50#include "common.h"
51
52static const char name_s5pc100[] = "S5PC100";
51 53
52#include <plat/s5pc100.h> 54static struct cpu_table cpu_ids[] __initdata = {
55 {
56 .idcode = S5PC100_CPU_ID,
57 .idmask = S5PC100_CPU_MASK,
58 .map_io = s5pc100_map_io,
59 .init_clocks = s5pc100_init_clocks,
60 .init_uarts = s5pc100_init_uarts,
61 .init = s5pc100_init,
62 .name = name_s5pc100,
63 },
64};
53 65
54/* Initial IO mappings */ 66/* Initial IO mappings */
55 67
56static struct map_desc s5pc100_iodesc[] __initdata = { 68static struct map_desc s5pc100_iodesc[] __initdata = {
57 { 69 {
70 .virtual = (unsigned long)S5P_VA_CHIPID,
71 .pfn = __phys_to_pfn(S5PC100_PA_CHIPID),
72 .length = SZ_4K,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = (unsigned long)S3C_VA_SYS,
76 .pfn = __phys_to_pfn(S5PC100_PA_SYSCON),
77 .length = SZ_64K,
78 .type = MT_DEVICE,
79 }, {
80 .virtual = (unsigned long)S3C_VA_TIMER,
81 .pfn = __phys_to_pfn(S5PC100_PA_TIMER),
82 .length = SZ_16K,
83 .type = MT_DEVICE,
84 }, {
85 .virtual = (unsigned long)S3C_VA_WATCHDOG,
86 .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG),
87 .length = SZ_4K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = (unsigned long)S5P_VA_SROMC,
91 .pfn = __phys_to_pfn(S5PC100_PA_SROMC),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 }, {
58 .virtual = (unsigned long)S5P_VA_SYSTIMER, 95 .virtual = (unsigned long)S5P_VA_SYSTIMER,
59 .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), 96 .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER),
60 .length = SZ_16K, 97 .length = SZ_16K,
@@ -100,15 +137,27 @@ static void s5pc100_idle(void)
100 local_irq_enable(); 137 local_irq_enable();
101} 138}
102 139
103/* s5pc100_map_io 140/*
141 * s5pc100_map_io
104 * 142 *
105 * register the standard cpu IO areas 143 * register the standard CPU IO areas
106*/ 144 */
107 145
108void __init s5pc100_map_io(void) 146void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
109{ 147{
148 /* initialize the io descriptors we need for initialization */
110 iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); 149 iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
150 if (mach_desc)
151 iotable_init(mach_desc, size);
152
153 /* detect cpu id and rev. */
154 s5p_init_cpu(S5P_VA_CHIPID);
111 155
156 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
157}
158
159void __init s5pc100_map_io(void)
160{
112 /* initialise device information early */ 161 /* initialise device information early */
113 s5pc100_default_sdhci0(); 162 s5pc100_default_sdhci0();
114 s5pc100_default_sdhci1(); 163 s5pc100_default_sdhci1();
@@ -155,7 +204,6 @@ static int __init s5pc100_core_init(void)
155{ 204{
156 return sysdev_class_register(&s5pc100_sysclass); 205 return sysdev_class_register(&s5pc100_sysclass);
157} 206}
158
159core_initcall(s5pc100_core_init); 207core_initcall(s5pc100_core_init);
160 208
161int __init s5pc100_init(void) 209int __init s5pc100_init(void)
@@ -167,3 +215,18 @@ int __init s5pc100_init(void)
167 215
168 return sysdev_register(&s5pc100_sysdev); 216 return sysdev_register(&s5pc100_sysdev);
169} 217}
218
219/* uart registration process */
220
221void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
222{
223 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
224}
225
226void s5pc100_restart(char mode, const char *cmd)
227{
228 if (mode != 's')
229 arch_wdt_reset();
230
231 soft_restart(0);
232}
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h
new file mode 100644
index 000000000000..9fbd3ae2b401
--- /dev/null
+++ b/arch/arm/mach-s5pc100/common.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5PC100 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H
13#define __ARCH_ARM_MACH_S5PC100_COMMON_H
14
15void s5pc100_init_io(struct map_desc *mach_desc, int size);
16void s5pc100_init_irq(void);
17
18void s5pc100_register_clocks(void);
19void s5pc100_setup_clocks(void);
20
21void s5pc100_restart(char mode, const char *cmd);
22
23#ifdef CONFIG_CPU_S5PC100
24
25extern int s5pc100_init(void);
26extern void s5pc100_map_io(void);
27extern void s5pc100_init_clocks(int xtal);
28extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no);
29
30#else
31#define s5pc100_init_clocks NULL
32#define s5pc100_init_uarts NULL
33#define s5pc100_map_io NULL
34#define s5pc100_init NULL
35#endif
36
37#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c81..b8c242edfa22 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <asm/hardware/vic.h>
16#include <mach/map.h>
17#include <plat/irqs.h>
18
19 .macro disable_fiq 15 .macro disable_fiq
20 .endm 16 .endm
21 17
22 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
23 ldr \base, =VA_VIC0
24 .endm 19 .endm
25 20
26 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
27 .endm 22 .endm
28 23
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30
31 @ check the vic0
32 mov \irqnr, # S5P_IRQ_OFFSET + 31
33 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
34 teq \irqstat, #0
35
36 @ otherwise try vic1
37 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
38 addeq \irqnr, \irqnr, #32
39 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
40 teqeq \irqstat, #0
41
42 @ otherwise try vic2
43 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
44 addeq \irqnr, \irqnr, #32
45 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
46 teqeq \irqstat, #0
47
48 clzne \irqstat, \irqstat
49 subne \irqnr, \irqnr, \irqstat
50 .endm 25 .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index a9ea57c06600..afc96c298518 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <plat/system-reset.h>
15
16static void arch_idle(void) 14static void arch_idle(void)
17{ 15{
18 /* nothing here yet */ 16 /* nothing here yet */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
deleted file mode 100644
index 44c8e5726d9d..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END 0xF6000000UL
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c
deleted file mode 100644
index 19d7b523c137..000000000000
--- a/arch/arm/mach-s5pc100/init.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/* linux/arch/arm/plat-s5pc100/s5pc100-init.c
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/init.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pc100.h>
19
20/* uart registration process */
21void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
22{
23 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
24}
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 26f5c91c9427..674d22992f3c 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30 31
@@ -42,7 +43,6 @@
42#include <plat/clock.h> 43#include <plat/clock.h>
43#include <plat/devs.h> 44#include <plat/devs.h>
44#include <plat/cpu.h> 45#include <plat/cpu.h>
45#include <plat/s5pc100.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47#include <plat/iic.h> 47#include <plat/iic.h>
48#include <plat/ata.h> 48#include <plat/ata.h>
@@ -53,6 +53,8 @@
53#include <plat/backlight.h> 53#include <plat/backlight.h>
54#include <plat/regs-fb-v4.h> 54#include <plat/regs-fb-v4.h>
55 55
56#include "common.h"
57
56/* Following are default values for UCON, ULCON and UFCON UART registers */ 58/* Following are default values for UCON, ULCON and UFCON UART registers */
57#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 59#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
58 S3C2410_UCON_RXILEVEL | \ 60 S3C2410_UCON_RXILEVEL | \
@@ -215,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = {
215 217
216static void __init smdkc100_map_io(void) 218static void __init smdkc100_map_io(void)
217{ 219{
218 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 220 s5pc100_init_io(NULL, 0);
219 s3c24xx_init_clocks(12000000); 221 s3c24xx_init_clocks(12000000);
220 s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); 222 s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs));
221} 223}
@@ -250,7 +252,9 @@ MACHINE_START(SMDKC100, "SMDKC100")
250 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 252 /* Maintainer: Byungho Min <bhmin@samsung.com> */
251 .atag_offset = 0x100, 253 .atag_offset = 0x100,
252 .init_irq = s5pc100_init_irq, 254 .init_irq = s5pc100_init_irq,
255 .handle_irq = vic_handle_irq,
253 .map_io = smdkc100_map_io, 256 .map_io = smdkc100_map_io,
254 .init_machine = smdkc100_machine_init, 257 .init_machine = smdkc100_machine_init,
255 .timer = &s3c24xx_timer, 258 .timer = &s3c24xx_timer,
259 .restart = s5pc100_restart,
256MACHINE_END 260MACHINE_END
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 471df5d2d25c..76a121dd52b4 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -10,28 +10,31 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for S5PV210 system 13# Core
14
15obj-y += common.o clock.o
14 16
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
17obj-$(CONFIG_PM) += pm.o 17obj-$(CONFIG_PM) += pm.o
18 18
19obj-y += dma.o
20
19# machine support 21# machine support
20 22
21obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o 23obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o
22obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
23obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
24obj-$(CONFIG_MACH_GONI) += mach-goni.o 24obj-$(CONFIG_MACH_GONI) += mach-goni.o
25obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
26obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
25obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o 27obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
26 28
27# device support 29# device support
28 30
29obj-y += dev-audio.o 31obj-y += dev-audio.o
30 32
33obj-y += setup-i2c0.o
31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o 35obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o
33obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o 36obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
34obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 37obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
35obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o 38obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
36obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o 39obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
37obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 40obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index cead51321b29..11db6c0fb666 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -29,7 +29,8 @@
29#include <plat/pll.h> 29#include <plat/pll.h>
30#include <plat/s5p-clock.h> 30#include <plat/s5p-clock.h>
31#include <plat/clock-clksrc.h> 31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h> 32
33#include "common.h"
33 34
34static unsigned long xtal; 35static unsigned long xtal;
35 36
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c
index 84ec74633232..b9adefd9838e 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -1,12 +1,13 @@
1/* linux/arch/arm/mach-s5pv210/cpu.c 1/*
2 * 2 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
5 * Common Codes for S5PV210
6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
9*/ 10 */
10 11
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/types.h> 13#include <linux/types.h>
@@ -21,33 +22,74 @@
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/sched.h> 23#include <linux/sched.h>
23#include <linux/dma-mapping.h> 24#include <linux/dma-mapping.h>
25#include <linux/serial_core.h>
24 26
27#include <asm/proc-fns.h>
25#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 29#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
28 31
29#include <asm/proc-fns.h>
30#include <mach/map.h> 32#include <mach/map.h>
31#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
32 34
33#include <plat/cpu.h> 35#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h> 36#include <plat/clock.h>
36#include <plat/fb-core.h> 37#include <plat/devs.h>
37#include <plat/s5pv210.h> 38#include <plat/sdhci.h>
38#include <plat/adc-core.h> 39#include <plat/adc-core.h>
39#include <plat/ata-core.h> 40#include <plat/ata-core.h>
41#include <plat/fb-core.h>
40#include <plat/fimc-core.h> 42#include <plat/fimc-core.h>
41#include <plat/iic-core.h> 43#include <plat/iic-core.h>
42#include <plat/keypad-core.h> 44#include <plat/keypad-core.h>
43#include <plat/sdhci.h>
44#include <plat/reset.h>
45#include <plat/tv-core.h> 45#include <plat/tv-core.h>
46#include <plat/regs-serial.h>
47
48#include "common.h"
49
50static const char name_s5pv210[] = "S5PV210/S5PC110";
51
52static struct cpu_table cpu_ids[] __initdata = {
53 {
54 .idcode = S5PV210_CPU_ID,
55 .idmask = S5PV210_CPU_MASK,
56 .map_io = s5pv210_map_io,
57 .init_clocks = s5pv210_init_clocks,
58 .init_uarts = s5pv210_init_uarts,
59 .init = s5pv210_init,
60 .name = name_s5pv210,
61 },
62};
46 63
47/* Initial IO mappings */ 64/* Initial IO mappings */
48 65
49static struct map_desc s5pv210_iodesc[] __initdata = { 66static struct map_desc s5pv210_iodesc[] __initdata = {
50 { 67 {
68 .virtual = (unsigned long)S5P_VA_CHIPID,
69 .pfn = __phys_to_pfn(S5PV210_PA_CHIPID),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = (unsigned long)S3C_VA_SYS,
74 .pfn = __phys_to_pfn(S5PV210_PA_SYSCON),
75 .length = SZ_64K,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = (unsigned long)S3C_VA_TIMER,
79 .pfn = __phys_to_pfn(S5PV210_PA_TIMER),
80 .length = SZ_16K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = (unsigned long)S3C_VA_WATCHDOG,
84 .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = (unsigned long)S5P_VA_SROMC,
89 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 }, {
51 .virtual = (unsigned long)S5P_VA_SYSTIMER, 93 .virtual = (unsigned long)S5P_VA_SYSTIMER,
52 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), 94 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
53 .length = SZ_4K, 95 .length = SZ_4K,
@@ -108,19 +150,32 @@ static void s5pv210_idle(void)
108 local_irq_enable(); 150 local_irq_enable();
109} 151}
110 152
111static void s5pv210_sw_reset(void) 153void s5pv210_restart(char mode, const char *cmd)
112{ 154{
113 __raw_writel(0x1, S5P_SWRESET); 155 __raw_writel(0x1, S5P_SWRESET);
114} 156}
115 157
116/* s5pv210_map_io 158/*
159 * s5pv210_map_io
117 * 160 *
118 * register the standard cpu IO areas 161 * register the standard cpu IO areas
119*/ 162 */
120 163
121void __init s5pv210_map_io(void) 164void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
122{ 165{
166 /* initialize the io descriptors we need for initialization */
123 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 167 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
168 if (mach_desc)
169 iotable_init(mach_desc, size);
170
171 /* detect cpu id and rev. */
172 s5p_init_cpu(S5P_VA_CHIPID);
173
174 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
175}
176
177void __init s5pv210_map_io(void)
178{
124 init_consistent_dma_size(14 << 20); 179 init_consistent_dma_size(14 << 20);
125 180
126 /* initialise device information early */ 181 /* initialise device information early */
@@ -186,7 +241,6 @@ static int __init s5pv210_core_init(void)
186{ 241{
187 return sysdev_class_register(&s5pv210_sysclass); 242 return sysdev_class_register(&s5pv210_sysclass);
188} 243}
189
190core_initcall(s5pv210_core_init); 244core_initcall(s5pv210_core_init);
191 245
192int __init s5pv210_init(void) 246int __init s5pv210_init(void)
@@ -196,8 +250,12 @@ int __init s5pv210_init(void)
196 /* set idle function */ 250 /* set idle function */
197 pm_idle = s5pv210_idle; 251 pm_idle = s5pv210_idle;
198 252
199 /* set sw_reset function */
200 s5p_reset_hook = s5pv210_sw_reset;
201
202 return sysdev_register(&s5pv210_sysdev); 253 return sysdev_register(&s5pv210_sysdev);
203} 254}
255
256/* uart registration process */
257
258void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
259{
260 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
261}
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
new file mode 100644
index 000000000000..6ed2af5c7518
--- /dev/null
+++ b/arch/arm/mach-s5pv210/common.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5PV210 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
13#define __ARCH_ARM_MACH_S5PV210_COMMON_H
14
15void s5pv210_init_io(struct map_desc *mach_desc, int size);
16void s5pv210_init_irq(void);
17
18void s5pv210_register_clocks(void);
19void s5pv210_setup_clocks(void);
20
21void s5pv210_restart(char mode, const char *cmd);
22
23#ifdef CONFIG_CPU_S5PV210
24
25extern int s5pv210_init(void);
26extern void s5pv210_map_io(void);
27extern void s5pv210_init_clocks(int xtal);
28extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no);
29
30#else
31#define s5pv210_init_clocks NULL
32#define s5pv210_init_uarts NULL
33#define s5pv210_map_io NULL
34#define s5pv210_init NULL
35#endif
36
37#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac59f07..bebca1b5d0b1 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq 13 .macro disable_fiq
18 .endm 14 .endm
19 15
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
25 .endm 17 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 @ otherwise try vic3
47 addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
48 addeq \irqnr, \irqnr, #32
49 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
50 teqeq \irqstat, #0
51
52 clzne \irqstat, \irqstat
53 subne \irqnr, \irqnr, \irqstat
54 .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index af8a200b2135..bf288ced860a 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
deleted file mode 100644
index a6c659d68a5d..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
9 *
10 * S5PV210 vmalloc definition
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END 0xF6000000UL
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
deleted file mode 100644
index 468a5f886193..000000000000
--- a/arch/arm/mach-s5pv210/init.c
+++ /dev/null
@@ -1,25 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pv210.h>
19#include <plat/regs-serial.h>
20
21/* uart registration process */
22void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
23{
24 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
25}
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 5811a96125f0..5e734d025a6a 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/setup.h> 28#include <asm/setup.h>
@@ -32,7 +33,6 @@
32 33
33#include <plat/gpio-cfg.h> 34#include <plat/gpio-cfg.h>
34#include <plat/regs-serial.h> 35#include <plat/regs-serial.h>
35#include <plat/s5pv210.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/cpu.h> 37#include <plat/cpu.h>
38#include <plat/fb.h> 38#include <plat/fb.h>
@@ -41,6 +41,8 @@
41#include <plat/s5p-time.h> 41#include <plat/s5p-time.h>
42#include <plat/regs-fb-v4.h> 42#include <plat/regs-fb-v4.h>
43 43
44#include "common.h"
45
44/* Following are default values for UCON, ULCON and UFCON UART registers */ 46/* Following are default values for UCON, ULCON and UFCON UART registers */
45#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 47#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
46 S3C2410_UCON_RXILEVEL | \ 48 S3C2410_UCON_RXILEVEL | \
@@ -595,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
595 597
596static void aquila_setup_sdhci(void) 598static void aquila_setup_sdhci(void)
597{ 599{
598 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); 600 gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
599 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
600 601
601 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); 602 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
602 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); 603 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
@@ -644,7 +645,7 @@ static void __init aquila_sound_init(void)
644 645
645static void __init aquila_map_io(void) 646static void __init aquila_map_io(void)
646{ 647{
647 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 648 s5pv210_init_io(NULL, 0);
648 s3c24xx_init_clocks(24000000); 649 s3c24xx_init_clocks(24000000);
649 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); 650 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
650 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 651 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -680,7 +681,9 @@ MACHINE_START(AQUILA, "Aquila")
680 Kyungmin Park <kyungmin.park@samsung.com> */ 681 Kyungmin Park <kyungmin.park@samsung.com> */
681 .atag_offset = 0x100, 682 .atag_offset = 0x100,
682 .init_irq = s5pv210_init_irq, 683 .init_irq = s5pv210_init_irq,
684 .handle_irq = vic_handle_irq,
683 .map_io = aquila_map_io, 685 .map_io = aquila_map_io,
684 .init_machine = aquila_machine_init, 686 .init_machine = aquila_machine_init,
685 .timer = &s5p_timer, 687 .timer = &s5p_timer,
688 .restart = s5pv210_restart,
686MACHINE_END 689MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 15edcae448b9..ff9152610439 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -37,7 +38,6 @@
37 38
38#include <plat/gpio-cfg.h> 39#include <plat/gpio-cfg.h>
39#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
40#include <plat/s5pv210.h>
41#include <plat/devs.h> 41#include <plat/devs.h>
42#include <plat/cpu.h> 42#include <plat/cpu.h>
43#include <plat/fb.h> 43#include <plat/fb.h>
@@ -54,6 +54,8 @@
54#include <media/s5p_fimc.h> 54#include <media/s5p_fimc.h>
55#include <media/noon010pc30.h> 55#include <media/noon010pc30.h>
56 56
57#include "common.h"
58
57/* Following are default values for UCON, ULCON and UFCON UART registers */ 59/* Following are default values for UCON, ULCON and UFCON UART registers */
58#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
@@ -227,8 +229,7 @@ static void __init goni_radio_init(void)
227 i2c1_devs[0].irq = gpio_to_irq(gpio); 229 i2c1_devs[0].irq = gpio_to_irq(gpio);
228 230
229 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ 231 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */
230 gpio_request(gpio, "FM_RST"); 232 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST");
231 gpio_direction_output(gpio, 1);
232} 233}
233 234
234/* TSP */ 235/* TSP */
@@ -264,8 +265,7 @@ static void __init goni_tsp_init(void)
264 int gpio; 265 int gpio;
265 266
266 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ 267 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */
267 gpio_request(gpio, "TSP_LDO_ON"); 268 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
268 gpio_direction_output(gpio, 1);
269 gpio_export(gpio, 0); 269 gpio_export(gpio, 0);
270 270
271 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ 271 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */
@@ -890,7 +890,7 @@ static void __init goni_sound_init(void)
890 890
891static void __init goni_map_io(void) 891static void __init goni_map_io(void)
892{ 892{
893 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 893 s5pv210_init_io(NULL, 0);
894 s3c24xx_init_clocks(24000000); 894 s3c24xx_init_clocks(24000000);
895 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); 895 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
896 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 896 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -956,8 +956,10 @@ MACHINE_START(GONI, "GONI")
956 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 956 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
957 .atag_offset = 0x100, 957 .atag_offset = 0x100,
958 .init_irq = s5pv210_init_irq, 958 .init_irq = s5pv210_init_irq,
959 .handle_irq = vic_handle_irq,
959 .map_io = goni_map_io, 960 .map_io = goni_map_io,
960 .init_machine = goni_machine_init, 961 .init_machine = goni_machine_init,
961 .timer = &s5p_timer, 962 .timer = &s5p_timer,
962 .reserve = &goni_reserve, 963 .reserve = &goni_reserve,
964 .restart = s5pv210_restart,
963MACHINE_END 965MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index f7266bb0cac8..9405da4ae3a3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,6 +15,7 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17 17
18#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
20#include <asm/setup.h> 21#include <asm/setup.h>
@@ -24,7 +25,6 @@
24#include <mach/regs-clock.h> 25#include <mach/regs-clock.h>
25 26
26#include <plat/regs-serial.h> 27#include <plat/regs-serial.h>
27#include <plat/s5pv210.h>
28#include <plat/devs.h> 28#include <plat/devs.h>
29#include <plat/cpu.h> 29#include <plat/cpu.h>
30#include <plat/ata.h> 30#include <plat/ata.h>
@@ -32,6 +32,8 @@
32#include <plat/pm.h> 32#include <plat/pm.h>
33#include <plat/s5p-time.h> 33#include <plat/s5p-time.h>
34 34
35#include "common.h"
36
35/* Following are default values for UCON, ULCON and UFCON UART registers */ 37/* Following are default values for UCON, ULCON and UFCON UART registers */
36#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 38#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
37 S3C2410_UCON_RXILEVEL | \ 39 S3C2410_UCON_RXILEVEL | \
@@ -109,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
109 111
110static void __init smdkc110_map_io(void) 112static void __init smdkc110_map_io(void)
111{ 113{
112 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 114 s5pv210_init_io(NULL, 0);
113 s3c24xx_init_clocks(24000000); 115 s3c24xx_init_clocks(24000000);
114 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 116 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
115 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 117 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -138,7 +140,9 @@ MACHINE_START(SMDKC110, "SMDKC110")
138 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 140 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
139 .atag_offset = 0x100, 141 .atag_offset = 0x100,
140 .init_irq = s5pv210_init_irq, 142 .init_irq = s5pv210_init_irq,
143 .handle_irq = vic_handle_irq,
141 .map_io = smdkc110_map_io, 144 .map_io = smdkc110_map_io,
142 .init_machine = smdkc110_machine_init, 145 .init_machine = smdkc110_machine_init,
143 .timer = &s5p_timer, 146 .timer = &s5p_timer,
147 .restart = s5pv210_restart,
144MACHINE_END 148MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 8662ef6e5681..f6feef4dce65 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/hardware/vic.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -33,7 +34,6 @@
33#include <plat/regs-serial.h> 34#include <plat/regs-serial.h>
34#include <plat/regs-srom.h> 35#include <plat/regs-srom.h>
35#include <plat/gpio-cfg.h> 36#include <plat/gpio-cfg.h>
36#include <plat/s5pv210.h>
37#include <plat/devs.h> 37#include <plat/devs.h>
38#include <plat/cpu.h> 38#include <plat/cpu.h>
39#include <plat/adc.h> 39#include <plat/adc.h>
@@ -47,6 +47,8 @@
47#include <plat/backlight.h> 47#include <plat/backlight.h>
48#include <plat/regs-fb-v4.h> 48#include <plat/regs-fb-v4.h>
49 49
50#include "common.h"
51
50/* Following are default values for UCON, ULCON and UFCON UART registers */ 52/* Following are default values for UCON, ULCON and UFCON UART registers */
51#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 53#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
52 S3C2410_UCON_RXILEVEL | \ 54 S3C2410_UCON_RXILEVEL | \
@@ -153,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
153{ 155{
154 if (power) { 156 if (power) {
155#if !defined(CONFIG_BACKLIGHT_PWM) 157#if !defined(CONFIG_BACKLIGHT_PWM)
156 gpio_request(S5PV210_GPD0(3), "GPD0"); 158 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0");
157 gpio_direction_output(S5PV210_GPD0(3), 1);
158 gpio_free(S5PV210_GPD0(3)); 159 gpio_free(S5PV210_GPD0(3));
159#endif 160#endif
160 161
161 /* fire nRESET on power up */ 162 /* fire nRESET on power up */
162 gpio_request(S5PV210_GPH0(6), "GPH0"); 163 gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0");
163
164 gpio_direction_output(S5PV210_GPH0(6), 1);
165 164
166 gpio_set_value(S5PV210_GPH0(6), 0); 165 gpio_set_value(S5PV210_GPH0(6), 0);
167 mdelay(10); 166 mdelay(10);
@@ -172,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
172 gpio_free(S5PV210_GPH0(6)); 171 gpio_free(S5PV210_GPH0(6));
173 } else { 172 } else {
174#if !defined(CONFIG_BACKLIGHT_PWM) 173#if !defined(CONFIG_BACKLIGHT_PWM)
175 gpio_request(S5PV210_GPD0(3), "GPD0"); 174 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0");
176 gpio_direction_output(S5PV210_GPD0(3), 0);
177 gpio_free(S5PV210_GPD0(3)); 175 gpio_free(S5PV210_GPD0(3));
178#endif 176#endif
179 } 177 }
@@ -278,7 +276,7 @@ static struct platform_pwm_backlight_data smdkv210_bl_data = {
278 276
279static void __init smdkv210_map_io(void) 277static void __init smdkv210_map_io(void)
280{ 278{
281 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 279 s5pv210_init_io(NULL, 0);
282 s3c24xx_init_clocks(24000000); 280 s3c24xx_init_clocks(24000000);
283 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 281 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
284 s5p_set_timer_source(S5P_PWM2, S5P_PWM4); 282 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
@@ -316,7 +314,9 @@ MACHINE_START(SMDKV210, "SMDKV210")
316 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 314 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
317 .atag_offset = 0x100, 315 .atag_offset = 0x100,
318 .init_irq = s5pv210_init_irq, 316 .init_irq = s5pv210_init_irq,
317 .handle_irq = vic_handle_irq,
319 .map_io = smdkv210_map_io, 318 .map_io = smdkv210_map_io,
320 .init_machine = smdkv210_machine_init, 319 .init_machine = smdkv210_machine_init,
321 .timer = &s5p_timer, 320 .timer = &s5p_timer,
321 .restart = s5pv210_restart,
322MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 97cc066c5369..74e99bc0dc9b 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/hardware/vic.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -23,12 +24,13 @@
23#include <mach/regs-clock.h> 24#include <mach/regs-clock.h>
24 25
25#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
26#include <plat/s5pv210.h>
27#include <plat/devs.h> 27#include <plat/devs.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/iic.h> 29#include <plat/iic.h>
30#include <plat/s5p-time.h> 30#include <plat/s5p-time.h>
31 31
32#include "common.h"
33
32/* Following are default values for UCON, ULCON and UFCON UART registers */ 34/* Following are default values for UCON, ULCON and UFCON UART registers */
33#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 35#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
34 S3C2410_UCON_RXILEVEL | \ 36 S3C2410_UCON_RXILEVEL | \
@@ -102,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = {
102 104
103static void __init torbreck_map_io(void) 105static void __init torbreck_map_io(void)
104{ 106{
105 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 107 s5pv210_init_io(NULL, 0);
106 s3c24xx_init_clocks(24000000); 108 s3c24xx_init_clocks(24000000);
107 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); 109 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
108 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 110 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -127,7 +129,9 @@ MACHINE_START(TORBRECK, "TORBRECK")
127 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 129 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
128 .atag_offset = 0x100, 130 .atag_offset = 0x100,
129 .init_irq = s5pv210_init_irq, 131 .init_irq = s5pv210_init_irq,
132 .handle_irq = vic_handle_irq,
130 .map_io = torbreck_map_io, 133 .map_io = torbreck_map_io,
131 .init_machine = torbreck_machine_init, 134 .init_machine = torbreck_machine_init,
132 .timer = &s5p_timer, 135 .timer = &s5p_timer,
136 .restart = s5pv210_restart,
133MACHINE_END 137MACHINE_END
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 3dd133f18415..6b93e200bcac 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet")
455#ifdef CONFIG_SA1111 455#ifdef CONFIG_SA1111
456 .dma_zone_size = SZ_1M, 456 .dma_zone_size = SZ_1M,
457#endif 457#endif
458 .restart = sa11x0_restart,
458MACHINE_END 459MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index bda83e1ab078..b07a2c024cb7 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
309#ifdef CONFIG_SA1111 309#ifdef CONFIG_SA1111
310 .dma_zone_size = SZ_1M, 310 .dma_zone_size = SZ_1M,
311#endif 311#endif
312 .restart = sa11x0_restart,
312MACHINE_END 313MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 7f3da4b11ec9..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
139 .init_irq = cerf_init_irq, 139 .init_irq = cerf_init_irq,
140 .timer = &sa1100_timer, 140 .timer = &sa1100_timer,
141 .init_machine = cerf_init, 141 .init_machine = cerf_init,
142 .restart = sa11x0_restart,
142MACHINE_END 143MACHINE_END
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 2965cc9d424e..b9060e236def 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
387 .init_irq = sa1100_init_irq, 387 .init_irq = sa1100_init_irq,
388 .timer = &sa1100_timer, 388 .timer = &sa1100_timer,
389 .init_machine = collie_init, 389 .init_machine = collie_init,
390 .restart = sa11x0_restart,
390MACHINE_END 391MACHINE_END
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 3eff179d4fd7..480d2ea46b00 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -126,6 +126,17 @@ static void sa1100_power_off(void)
126 PMCR = PMCR_SF; 126 PMCR = PMCR_SF;
127} 127}
128 128
129void sa11x0_restart(char mode, const char *cmd)
130{
131 if (mode == 's') {
132 /* Jump into ROM at address 0 */
133 soft_restart(0);
134 } else {
135 /* Use on-chip reset capability */
136 RSRR = RSRR_SWR;
137 }
138}
139
129static void sa11x0_register_device(struct platform_device *dev, void *data) 140static void sa11x0_register_device(struct platform_device *dev, void *data)
130{ 141{
131 int err; 142 int err;
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index b7a9a601c2d1..33268cf6be36 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer;
10extern void __init sa1100_map_io(void); 10extern void __init sa1100_map_io(void);
11extern void __init sa1100_init_irq(void); 11extern void __init sa1100_init_irq(void);
12extern void __init sa1100_init_gpio(void); 12extern void __init sa1100_init_gpio(void);
13extern void sa11x0_restart(char, const char *);
13 14
14#define SET_BANK(__nr,__start,__size) \ 15#define SET_BANK(__nr,__start,__size) \
15 mi->bank[__nr].start = (__start), \ 16 mi->bank[__nr].start = (__start), \
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index b30733a2b82e..1e6b3c105ba6 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")
89 .init_irq = sa1100_init_irq, 89 .init_irq = sa1100_init_irq,
90 .timer = &sa1100_timer, 90 .timer = &sa1100_timer,
91 .init_machine = h3100_mach_init, 91 .init_machine = h3100_mach_init,
92 .restart = sa11x0_restart,
92MACHINE_END 93MACHINE_END
93 94
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 6fd324d92389..6b58e7460ecf 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")
130 .init_irq = sa1100_init_irq, 130 .init_irq = sa1100_init_irq,
131 .timer = &sa1100_timer, 131 .timer = &sa1100_timer,
132 .init_machine = h3600_mach_init, 132 .init_machine = h3600_mach_init,
133 .restart = sa11x0_restart,
133MACHINE_END 134MACHINE_END
134 135
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 30f4a551b8e5..c01bb36db940 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")
200 .init_irq = sa1100_init_irq, 200 .init_irq = sa1100_init_irq,
201 .timer = &sa1100_timer, 201 .timer = &sa1100_timer,
202 .init_machine = hackkit_init, 202 .init_machine = hackkit_init,
203 .restart = sa11x0_restart,
203MACHINE_END 204MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index ba9da9f7f183..e17b208f76d4 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -3,20 +3,7 @@
3 * 3 *
4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> 4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
5 */ 5 */
6#include <mach/hardware.h>
7
8static inline void arch_idle(void) 6static inline void arch_idle(void)
9{ 7{
10 cpu_do_idle(); 8 cpu_do_idle();
11} 9}
12
13static inline void arch_reset(char mode, const char *cmd)
14{
15 if (mode == 's') {
16 /* Jump into ROM at address 0 */
17 cpu_reset(0);
18 } else {
19 /* Use on-chip reset capability */
20 RSRR = RSRR_SWR;
21 }
22}
diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h
deleted file mode 100644
index b3d002398480..000000000000
--- a/arch/arm/mach-sa1100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (0xe8000000UL)
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 77198fe02bc5..ee121d6f0480 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
373#ifdef CONFIG_SA1111 373#ifdef CONFIG_SA1111
374 .dma_zone_size = SZ_1M, 374 .dma_zone_size = SZ_1M,
375#endif 375#endif
376 .restart = sa11x0_restart,
376MACHINE_END 377MACHINE_END
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index 5bc59d0947ba..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -66,4 +66,5 @@ MACHINE_START(LART, "LART")
66 .init_irq = sa1100_init_irq, 66 .init_irq = sa1100_init_irq,
67 .init_machine = lart_init, 67 .init_machine = lart_init,
68 .timer = &sa1100_timer, 68 .timer = &sa1100_timer,
69 .restart = sa11x0_restart,
69MACHINE_END 70MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 032f3881d145..85f6ee672225 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -19,6 +19,7 @@
19 19
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <asm/setup.h> 21#include <asm/setup.h>
22#include <asm/page.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/flash.h> 25#include <asm/mach/flash.h>
@@ -116,4 +117,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")
116 .init_irq = sa1100_init_irq, 117 .init_irq = sa1100_init_irq,
117 .timer = &sa1100_timer, 118 .timer = &sa1100_timer,
118 .init_machine = nanoengine_init, 119 .init_machine = nanoengine_init,
120 .restart = sa11x0_restart,
119MACHINE_END 121MACHINE_END
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 65161f2bea29..9307df053533 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB")
150 .init_irq = sa1100_init_irq, 150 .init_irq = sa1100_init_irq,
151 .timer = &sa1100_timer, 151 .timer = &sa1100_timer,
152 .init_machine = pleb_init, 152 .init_machine = pleb_init,
153 .restart = sa11x0_restart,
153MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 1cccbf5b9e9a..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
87 .init_irq = sa1100_init_irq, 87 .init_irq = sa1100_init_irq,
88 .timer = &sa1100_timer, 88 .timer = &sa1100_timer,
89 .init_machine = shannon_init, 89 .init_machine = shannon_init,
90 .restart = sa11x0_restart,
90MACHINE_END 91MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 4790f3f3d008..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad")
396 .map_io = simpad_map_io, 396 .map_io = simpad_map_io,
397 .init_irq = sa1100_init_irq, 397 .init_irq = sa1100_init_irq,
398 .timer = &sa1100_timer, 398 .timer = &sa1100_timer,
399 .restart = sa11x0_restart,
399MACHINE_END 400MACHINE_END
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa6602491d54..69e33535dee6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,7 +12,6 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/sched.h> /* just for sched_clock() - funny that */
16#include <linux/timex.h> 15#include <linux/timex.h>
17#include <linux/clockchips.h> 16#include <linux/clockchips.h>
18 17
@@ -20,29 +19,9 @@
20#include <asm/sched_clock.h> 19#include <asm/sched_clock.h>
21#include <mach/hardware.h> 20#include <mach/hardware.h>
22 21
23/* 22static u32 notrace sa1100_read_sched_clock(void)
24 * This is the SA11x0 sched_clock implementation.
25 */
26static DEFINE_CLOCK_DATA(cd);
27
28/*
29 * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
30 * NSEC_PER_SEC, 60).
31 * This gives a resolution of about 271ns and a wrap period of about 19min.
32 */
33#define SC_MULT 2275555556u
34#define SC_SHIFT 23
35
36unsigned long long notrace sched_clock(void)
37{
38 u32 cyc = OSCR;
39 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
40}
41
42static void notrace sa1100_update_sched_clock(void)
43{ 23{
44 u32 cyc = OSCR; 24 return OSCR;
45 update_sched_clock(&cd, cyc, (u32)~0);
46} 25}
47 26
48#define MIN_OSCR_DELTA 2 27#define MIN_OSCR_DELTA 2
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void)
109 OIER = 0; 88 OIER = 0;
110 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; 89 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
111 90
112 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, 91 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
113 3686400, SC_MULT, SC_SHIFT);
114 92
115 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); 93 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
116 ckevt_sa1100_osmr0.max_delta_ns = 94 ckevt_sa1100_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index feda3ca7fc95..a851c254ad6c 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -26,10 +26,9 @@
26#define ROMCARD_SIZE 0x08000000 26#define ROMCARD_SIZE 0x08000000
27#define ROMCARD_START 0x10000000 27#define ROMCARD_START 0x10000000
28 28
29void arch_reset(char mode, const char *cmd) 29static void shark_restart(char mode, const char *cmd)
30{ 30{
31 short temp; 31 short temp;
32 local_irq_disable();
33 /* Reset the Machine via pc[3] of the sequoia chipset */ 32 /* Reset the Machine via pc[3] of the sequoia chipset */
34 outw(0x09,0x24); 33 outw(0x09,0x24);
35 temp=inw(0x26); 34 temp=inw(0x26);
@@ -157,4 +156,5 @@ MACHINE_START(SHARK, "Shark")
157 .init_irq = shark_init_irq, 156 .init_irq = shark_init_irq,
158 .timer = &shark_timer, 157 .timer = &shark_timer,
159 .dma_zone_size = SZ_4M, 158 .dma_zone_size = SZ_4M,
159 .restart = shark_restart,
160MACHINE_END 160MACHINE_END
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
index 21c373b30bbc..1b2f2c5050a8 100644
--- a/arch/arm/mach-shark/include/mach/system.h
+++ b/arch/arm/mach-shark/include/mach/system.h
@@ -6,9 +6,6 @@
6#ifndef __ASM_ARCH_SYSTEM_H 6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H 7#define __ASM_ARCH_SYSTEM_H
8 8
9/* Found in arch/mach-shark/core.c */
10extern void arch_reset(char mode, const char *cmd);
11
12static inline void arch_idle(void) 9static inline void arch_idle(void)
13{ 10{
14} 11}
diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h
deleted file mode 100644
index b10df988526d..000000000000
--- a/arch/arm/mach-shark/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-shark/include/mach/vmalloc.h
3 */
4#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 737bdc631b0d..5ca1f9d66995 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o 28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o 29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o
30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o 30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
31obj-$(CONFIG_ARCH_SH73A0) += entry-gic.o
32 31
33# PM objects 32# PM objects
34obj-$(CONFIG_SUSPEND) += suspend.o 33obj-$(CONFIG_SUSPEND) += suspend.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index b862e9f81e3e..a4e6ca04e319 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = {
466static void __init ag5evm_map_io(void) 466static void __init ag5evm_map_io(void)
467{ 467{
468 iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc)); 468 iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
469 /* DMA memory at 0xf6000000 - 0xffdfffff */
470 init_consistent_dma_size(158 << 20);
471 469
472 /* setup early devices and console here as well */ 470 /* setup early devices and console here as well */
473 sh73a0_add_early_devices(); 471 sh73a0_add_early_devices();
@@ -607,8 +605,9 @@ struct sys_timer ag5evm_timer = {
607 605
608MACHINE_START(AG5EVM, "ag5evm") 606MACHINE_START(AG5EVM, "ag5evm")
609 .map_io = ag5evm_map_io, 607 .map_io = ag5evm_map_io,
608 .nr_irqs = NR_IRQS_LEGACY,
610 .init_irq = sh73a0_init_irq, 609 .init_irq = sh73a0_init_irq,
611 .handle_irq = shmobile_handle_irq_gic, 610 .handle_irq = gic_handle_irq,
612 .init_machine = ag5evm_init, 611 .init_machine = ag5evm_init,
613 .timer = &ag5evm_timer, 612 .timer = &ag5evm_timer,
614MACHINE_END 613MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 4c865ece9ac4..6a6f9f7568c2 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = {
1172static void __init ap4evb_map_io(void) 1172static void __init ap4evb_map_io(void)
1173{ 1173{
1174 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); 1174 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1175 /* DMA memory at 0xf6000000 - 0xffdfffff */
1176 init_consistent_dma_size(158 << 20);
1177 1175
1178 /* setup early devices and console here as well */ 1176 /* setup early devices and console here as well */
1179 sh7372_add_early_devices(); 1177 sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 8b620bf06221..72d557281b1f 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = {
261static void __init g3evm_map_io(void) 261static void __init g3evm_map_io(void)
262{ 262{
263 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); 263 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
264 /* DMA memory at 0xf6000000 - 0xffdfffff */
265 init_consistent_dma_size(158 << 20);
266 264
267 /* setup early devices and console here as well */ 265 /* setup early devices and console here as well */
268 sh7367_add_early_devices(); 266 sh7367_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 7719ddc5f591..2220b885cff5 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = {
275static void __init g4evm_map_io(void) 275static void __init g4evm_map_io(void)
276{ 276{
277 iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); 277 iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
278 /* DMA memory at 0xf6000000 - 0xffdfffff */
279 init_consistent_dma_size(158 << 20);
280 278
281 /* setup early devices and console here as well */ 279 /* setup early devices and console here as well */
282 sh7377_add_early_devices(); 280 sh7377_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index bd9a78424d6b..857ceeec1bb0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -33,6 +33,7 @@
33#include <linux/input/sh_keysc.h> 33#include <linux/input/sh_keysc.h>
34#include <linux/gpio_keys.h> 34#include <linux/gpio_keys.h>
35#include <linux/leds.h> 35#include <linux/leds.h>
36#include <linux/platform_data/leds-renesas-tpu.h>
36#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
37#include <linux/mmc/sh_mmcif.h> 38#include <linux/mmc/sh_mmcif.h>
38#include <linux/mfd/tmio.h> 39#include <linux/mfd/tmio.h>
@@ -56,7 +57,7 @@ static struct resource smsc9220_resources[] = {
56 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
57 }, 58 },
58 [1] = { 59 [1] = {
59 .start = gic_spi(33), /* PINTA2 @ PORT144 */ 60 .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
60 .flags = IORESOURCE_IRQ, 61 .flags = IORESOURCE_IRQ,
61 }, 62 },
62}; 63};
@@ -157,10 +158,6 @@ static struct platform_device gpio_keys_device = {
157#define GPIO_LED(n, g) { .name = n, .gpio = g } 158#define GPIO_LED(n, g) { .name = n, .gpio = g }
158 159
159static struct gpio_led gpio_leds[] = { 160static struct gpio_led gpio_leds[] = {
160 GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */
161 GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */
162 GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */
163 GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */
164 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ 161 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
165 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ 162 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
166 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ 163 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
@@ -179,6 +176,119 @@ static struct platform_device gpio_leds_device = {
179 }, 176 },
180}; 177};
181 178
179/* TPU LED */
180static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
181 .name = "V2513",
182 .pin_gpio_fn = GPIO_FN_TPU1TO2,
183 .pin_gpio = GPIO_PORT153,
184 .channel_offset = 0x90,
185 .timer_bit = 2,
186 .max_brightness = 1000,
187};
188
189static struct resource tpu12_resources[] = {
190 [0] = {
191 .name = "TPU12",
192 .start = 0xe6610090,
193 .end = 0xe66100b5,
194 .flags = IORESOURCE_MEM,
195 },
196};
197
198static struct platform_device leds_tpu12_device = {
199 .name = "leds-renesas-tpu",
200 .id = 12,
201 .dev = {
202 .platform_data = &led_renesas_tpu12_pdata,
203 },
204 .num_resources = ARRAY_SIZE(tpu12_resources),
205 .resource = tpu12_resources,
206};
207
208static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
209 .name = "V2514",
210 .pin_gpio_fn = GPIO_FN_TPU4TO1,
211 .pin_gpio = GPIO_PORT199,
212 .channel_offset = 0x50,
213 .timer_bit = 1,
214 .max_brightness = 1000,
215};
216
217static struct resource tpu41_resources[] = {
218 [0] = {
219 .name = "TPU41",
220 .start = 0xe6640050,
221 .end = 0xe6640075,
222 .flags = IORESOURCE_MEM,
223 },
224};
225
226static struct platform_device leds_tpu41_device = {
227 .name = "leds-renesas-tpu",
228 .id = 41,
229 .dev = {
230 .platform_data = &led_renesas_tpu41_pdata,
231 },
232 .num_resources = ARRAY_SIZE(tpu41_resources),
233 .resource = tpu41_resources,
234};
235
236static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
237 .name = "V2515",
238 .pin_gpio_fn = GPIO_FN_TPU2TO1,
239 .pin_gpio = GPIO_PORT197,
240 .channel_offset = 0x50,
241 .timer_bit = 1,
242 .max_brightness = 1000,
243};
244
245static struct resource tpu21_resources[] = {
246 [0] = {
247 .name = "TPU21",
248 .start = 0xe6620050,
249 .end = 0xe6620075,
250 .flags = IORESOURCE_MEM,
251 },
252};
253
254static struct platform_device leds_tpu21_device = {
255 .name = "leds-renesas-tpu",
256 .id = 21,
257 .dev = {
258 .platform_data = &led_renesas_tpu21_pdata,
259 },
260 .num_resources = ARRAY_SIZE(tpu21_resources),
261 .resource = tpu21_resources,
262};
263
264static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
265 .name = "KEYLED",
266 .pin_gpio_fn = GPIO_FN_TPU3TO0,
267 .pin_gpio = GPIO_PORT163,
268 .channel_offset = 0x10,
269 .timer_bit = 0,
270 .max_brightness = 1000,
271};
272
273static struct resource tpu30_resources[] = {
274 [0] = {
275 .name = "TPU30",
276 .start = 0xe6630010,
277 .end = 0xe6630035,
278 .flags = IORESOURCE_MEM,
279 },
280};
281
282static struct platform_device leds_tpu30_device = {
283 .name = "leds-renesas-tpu",
284 .id = 30,
285 .dev = {
286 .platform_data = &led_renesas_tpu30_pdata,
287 },
288 .num_resources = ARRAY_SIZE(tpu30_resources),
289 .resource = tpu30_resources,
290};
291
182/* MMCIF */ 292/* MMCIF */
183static struct resource mmcif_resources[] = { 293static struct resource mmcif_resources[] = {
184 [0] = { 294 [0] = {
@@ -291,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = {
291 &keysc_device, 401 &keysc_device,
292 &gpio_keys_device, 402 &gpio_keys_device,
293 &gpio_leds_device, 403 &gpio_leds_device,
404 &leds_tpu12_device,
405 &leds_tpu41_device,
406 &leds_tpu21_device,
407 &leds_tpu30_device,
294 &mmcif_device, 408 &mmcif_device,
295 &sdhi0_device, 409 &sdhi0_device,
296 &sdhi1_device, 410 &sdhi1_device,
@@ -317,18 +431,6 @@ static void __init kota2_map_io(void)
317 shmobile_setup_console(); 431 shmobile_setup_console();
318} 432}
319 433
320#define PINTER0A 0xe69000a0
321#define PINTCR0A 0xe69000b0
322
323void __init kota2_init_irq(void)
324{
325 sh73a0_init_irq();
326
327 /* setup PINT: enable PINTA2 as active low */
328 __raw_writel(1 << 29, PINTER0A);
329 __raw_writew(2 << 10, PINTCR0A);
330}
331
332static void __init kota2_init(void) 434static void __init kota2_init(void)
333{ 435{
334 sh73a0_pinmux_init(); 436 sh73a0_pinmux_init();
@@ -447,8 +549,9 @@ struct sys_timer kota2_timer = {
447 549
448MACHINE_START(KOTA2, "kota2") 550MACHINE_START(KOTA2, "kota2")
449 .map_io = kota2_map_io, 551 .map_io = kota2_map_io,
450 .init_irq = kota2_init_irq, 552 .nr_irqs = NR_IRQS_LEGACY,
451 .handle_irq = shmobile_handle_irq_gic, 553 .init_irq = sh73a0_init_irq,
554 .handle_irq = gic_handle_irq,
452 .init_machine = kota2_init, 555 .init_machine = kota2_init,
453 .timer = &kota2_timer, 556 .timer = &kota2_timer,
454MACHINE_END 557MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9c5e598e0e3d..ed5256687397 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = {
1390static void __init mackerel_map_io(void) 1390static void __init mackerel_map_io(void)
1391{ 1391{
1392 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); 1392 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
1393 /* DMA memory at 0xf6000000 - 0xffdfffff */
1394 init_consistent_dma_size(158 << 20);
1395 1393
1396 /* setup early devices and console here as well */ 1394 /* setup early devices and console here as well */
1397 sh7372_add_early_devices(); 1395 sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846bb30f2..1370a89ca358 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -113,6 +113,12 @@ static struct clk main_clk = {
113 .ops = &main_clk_ops, 113 .ops = &main_clk_ops,
114}; 114};
115 115
116/* Divide Main clock by two */
117static struct clk main_div2_clk = {
118 .ops = &div2_clk_ops,
119 .parent = &main_clk,
120};
121
116/* PLL0, PLL1, PLL2, PLL3 */ 122/* PLL0, PLL1, PLL2, PLL3 */
117static unsigned long pll_recalc(struct clk *clk) 123static unsigned long pll_recalc(struct clk *clk)
118{ 124{
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = {
181 &extal1_div2_clk, 187 &extal1_div2_clk,
182 &extal2_div2_clk, 188 &extal2_div2_clk,
183 &main_clk, 189 &main_clk,
190 &main_div2_clk,
184 &pll0_clk, 191 &pll0_clk,
185 &pll1_clk, 192 &pll1_clk,
186 &pll2_clk, 193 &pll2_clk,
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = {
243 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), 250 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
244 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), 251 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
245 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), 252 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
246 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0), 253 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
247 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), 254 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
248 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), 255 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
249 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), 256 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
@@ -268,6 +275,7 @@ enum { MSTP001,
268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 275 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 276 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
270 MSTP314, MSTP313, MSTP312, MSTP311, 277 MSTP314, MSTP313, MSTP312, MSTP311,
278 MSTP303, MSTP302, MSTP301, MSTP300,
271 MSTP411, MSTP410, MSTP403, 279 MSTP411, MSTP410, MSTP403,
272 MSTP_NR }; 280 MSTP_NR };
273 281
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = {
301 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 309 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
302 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 310 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
303 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ 311 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
312 [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
313 [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
314 [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
315 [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */
304 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ 316 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
305 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ 317 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
306 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 318 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = {
350 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 362 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
351 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 363 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
352 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 364 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
365 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
366 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
367 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
368 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
353 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 369 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
354 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 370 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
355 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 371 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b08c83..000000000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * ARM Interrupt demux handler using GIC
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2011 Paul Mundt
6 * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <asm/assembler.h>
14#include <asm/entry-macro-multi.S>
15#include <asm/hardware/gic.h>
16#include <asm/hardware/entry-macro-gic.S>
17
18 arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 834bd6cd508f..4bf82c156771 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void);
7struct clk; 7struct clk;
8extern int clk_init(void); 8extern int clk_init(void);
9extern void shmobile_handle_irq_intc(struct pt_regs *); 9extern void shmobile_handle_irq_intc(struct pt_regs *);
10extern void shmobile_handle_irq_gic(struct pt_regs *);
11extern struct platform_suspend_ops shmobile_suspend_ops; 10extern struct platform_suspend_ops shmobile_suspend_ops;
12struct cpuidle_driver; 11struct cpuidle_driver;
13extern void (*shmobile_cpuidle_modes[])(void); 12extern void (*shmobile_cpuidle_modes[])(void);
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index 8d4a416d4285..2a57b2964ee9 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -18,14 +18,5 @@
18 .macro disable_fiq 18 .macro disable_fiq
19 .endm 19 .endm
20 20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 .endm
26
27 .macro test_for_ipi, irqnr, irqstat, base, tmp
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 22 .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 7bf0890e16ba..de795b42232a 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -12,8 +12,6 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15
16#define ARCH_NR_GPIOS 1024
17#include <linux/sh_pfc.h> 15#include <linux/sh_pfc.h>
18 16
19#ifdef CONFIG_GPIOLIB 17#ifdef CONFIG_GPIOLIB
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 76a687eeaa22..956ac18ddbf9 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -8,7 +8,7 @@ static inline void arch_idle(void)
8 8
9static inline void arch_reset(char mode, const char *cmd) 9static inline void arch_reset(char mode, const char *cmd)
10{ 10{
11 cpu_reset(0); 11 soft_restart(0);
12} 12}
13 13
14#endif 14#endif
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
deleted file mode 100644
index 2b8fd8b942fe..000000000000
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_MACH_VMALLOC_H
2#define __ASM_MACH_VMALLOC_H
3
4/* Vmalloc at ... - 0xe5ffffff */
5#define VMALLOC_END 0xe6000000UL
6
7#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3d..de3bb41c8e9e 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 teq \irqstat, #0
30 beq 1001f @ this will set/reset
31 @ zero register
32 /*
33 * Following code will find bit position of least significang
34 * bit set in irqstat, using following equation
35 * least significant bit set in n = (n & ~(n-1))
36 */
37 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
38 mvn \tmp, \tmp @ tmp = ~tmp
39 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
40 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
41 clz \tmp, \irqstat @ tmp = leading zeros
42 rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
43
441001: /* EQ will be set if no irqs pending */
45 .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index b8f31c3935f7..14276e5a98d2 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -42,6 +42,8 @@ void __init spear3xx_map_io(void);
42void __init spear3xx_init_irq(void); 42void __init spear3xx_init_irq(void);
43void __init spear3xx_init(void); 43void __init spear3xx_init(void);
44 44
45void spear_restart(char, const char *);
46
45/* pad mux declarations */ 47/* pad mux declarations */
46#define PMX_FIRDA_MASK (1 << 14) 48#define PMX_FIRDA_MASK (1 << 14)
47#define PMX_I2C_MASK (1 << 13) 49#define PMX_I2C_MASK (1 << 13)
diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
deleted file mode 100644
index df977b3c9a63..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98eed1db..3462ab9d6122 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -67,6 +68,8 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
67 .atag_offset = 0x100, 68 .atag_offset = 0x100,
68 .map_io = spear3xx_map_io, 69 .map_io = spear3xx_map_io,
69 .init_irq = spear3xx_init_irq, 70 .init_irq = spear3xx_init_irq,
71 .handle_irq = vic_handle_irq,
70 .timer = &spear3xx_timer, 72 .timer = &spear3xx_timer,
71 .init_machine = spear300_evb_init, 73 .init_machine = spear300_evb_init,
74 .restart = spear_restart,
72MACHINE_END 75MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d59362..f92c4993f65a 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -73,6 +74,8 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
73 .atag_offset = 0x100, 74 .atag_offset = 0x100,
74 .map_io = spear3xx_map_io, 75 .map_io = spear3xx_map_io,
75 .init_irq = spear3xx_init_irq, 76 .init_irq = spear3xx_init_irq,
77 .handle_irq = vic_handle_irq,
76 .timer = &spear3xx_timer, 78 .timer = &spear3xx_timer,
77 .init_machine = spear310_evb_init, 79 .init_machine = spear310_evb_init,
80 .restart = spear_restart,
78MACHINE_END 81MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 22879848d73a..105334ab7021 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -71,6 +72,8 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
71 .atag_offset = 0x100, 72 .atag_offset = 0x100,
72 .map_io = spear3xx_map_io, 73 .map_io = spear3xx_map_io,
73 .init_irq = spear3xx_init_irq, 74 .init_irq = spear3xx_init_irq,
75 .handle_irq = vic_handle_irq,
74 .timer = &spear3xx_timer, 76 .timer = &spear3xx_timer,
75 .init_machine = spear320_evb_init, 77 .init_machine = spear320_evb_init,
78 .restart = spear_restart,
76MACHINE_END 79MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed7b203..d490a910d925 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 mov \irqnr, #0
30 teq \irqstat, #0
31 bne 1001f
32 ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
33 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
34 teq \irqstat, #0
35 beq 1002f @ this will set/reset
36 @ zero register
37 mov \irqnr, #32
381001:
39 /*
40 * Following code will find bit position of least significang
41 * bit set in irqstat, using following equation
42 * least significant bit set in n = (n & ~(n-1))
43 */
44 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
45 mvn \tmp, \tmp @ tmp = ~tmp
46 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
47 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
48 clz \tmp, \irqstat @ tmp = leading zeros
49
50 rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
51 add \irqnr, \irqnr, \tmp
52
531002: /* EQ will be set if no irqs pending */
54 .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 183f0238c5e2..116b99301cf5 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -41,6 +41,8 @@ void __init spear6xx_init(void);
41void __init spear600_init(void); 41void __init spear600_init(void);
42void __init spear6xx_clk_init(void); 42void __init spear6xx_clk_init(void);
43 43
44void spear_restart(char, const char *);
45
44/* Add spear600 machine device structure declarations here */ 46/* Add spear600 machine device structure declarations here */
45 47
46#endif /* __MACH_GENERIC_H */ 48#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
deleted file mode 100644
index 4a0b56cb2a91..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 8238fe38e713..c6e4254741cc 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -46,6 +47,8 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
46 .atag_offset = 0x100, 47 .atag_offset = 0x100,
47 .map_io = spear6xx_map_io, 48 .map_io = spear6xx_map_io,
48 .init_irq = spear6xx_init_irq, 49 .init_irq = spear6xx_init_irq,
50 .handle_irq = vic_handle_irq,
49 .timer = &spear6xx_timer, 51 .timer = &spear6xx_timer,
50 .init_machine = spear600_evb_init, 52 .init_machine = spear600_evb_init,
53 .restart = spear_restart,
51MACHINE_END 54MACHINE_END
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d1577..000000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
1if ARCH_TCC8K
2
3comment "TCC8000 systems:"
4
5config MACH_TCC8000_SDK
6 bool "Telechips TCC8000-SDK development kit"
7 default y
8 help
9 Support for the Telechips TCC8000-SDK board.
10
11endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49ba..000000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for TCC8K boards and common files.
3#
4
5# Common support
6obj-y += clock.o irq.o time.o io.o devices.o
7
8# Board specific support
9obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b04..000000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1 zreladdr-y += 0x20008000
2params_phys-y := 0x20000100
3initrd_phys-y := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed2..000000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/delay.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13
14#include <asm/mach-types.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/mach/time.h>
19
20#include <mach/clock.h>
21#include <mach/tcc-nand.h>
22#include <mach/tcc8k-regs.h>
23
24#include "common.h"
25
26#define XI_FREQUENCY 12000000
27#define XTI_FREQUENCY 32768
28
29#ifdef CONFIG_MTD_NAND_TCC
30/* NAND */
31static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
32 .width = 1,
33 .hw_ecc = 0,
34};
35#endif
36
37static void __init tcc8k_init(void)
38{
39#ifdef CONFIG_MTD_NAND_TCC
40 tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
41 platform_device_register(&tcc_nand_device);
42#endif
43}
44
45static void __init tcc8k_init_timer(void)
46{
47 tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
48}
49
50static struct sys_timer tcc8k_timer = {
51 .init = tcc8k_init_timer,
52};
53
54static void __init tcc8k_map_io(void)
55{
56 tcc8k_map_common_io();
57
58 /* set PLL0 clock to 96MHz, adapt UART0 divisor */
59 __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
60 __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
61
62 /* set PLL1 clock to 192MHz */
63 __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
64
65 /* set PLL2 clock to 48MHz */
66 __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
67
68 /* with CPU freq higher than 150 MHz, need extra DTCM wait */
69 __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
70
71 /* PLL locking time as specified */
72 udelay(300);
73}
74
75MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
76 .atag_offset = 0x100,
77 .map_io = tcc8k_map_io,
78 .init_irq = tcc8k_init_irq,
79 .init_machine = tcc8k_init,
80 .timer = &tcc8k_timer,
81MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a4..000000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
1/*
2 * Lowlevel clock handling for Telechips TCC8xxx SoCs
3 *
4 * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2
7 */
8
9#include <linux/clk.h>
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/spinlock.h>
15#include <linux/clkdev.h>
16
17#include <mach/clock.h>
18#include <mach/irqs.h>
19#include <mach/tcc8k-regs.h>
20
21#include "common.h"
22
23#define BCLKCTR0 (CKC_BASE + BCLKCTR0_OFFS)
24#define BCLKCTR1 (CKC_BASE + BCLKCTR1_OFFS)
25
26#define ACLKREF (CKC_BASE + ACLKREF_OFFS)
27#define ACLKUART0 (CKC_BASE + ACLKUART0_OFFS)
28#define ACLKUART1 (CKC_BASE + ACLKUART1_OFFS)
29#define ACLKUART2 (CKC_BASE + ACLKUART2_OFFS)
30#define ACLKUART3 (CKC_BASE + ACLKUART3_OFFS)
31#define ACLKUART4 (CKC_BASE + ACLKUART4_OFFS)
32#define ACLKI2C (CKC_BASE + ACLKI2C_OFFS)
33#define ACLKADC (CKC_BASE + ACLKADC_OFFS)
34#define ACLKUSBH (CKC_BASE + ACLKUSBH_OFFS)
35#define ACLKLCD (CKC_BASE + ACLKLCD_OFFS)
36#define ACLKSDH0 (CKC_BASE + ACLKSDH0_OFFS)
37#define ACLKSDH1 (CKC_BASE + ACLKSDH1_OFFS)
38#define ACLKSPI0 (CKC_BASE + ACLKSPI0_OFFS)
39#define ACLKSPI1 (CKC_BASE + ACLKSPI1_OFFS)
40#define ACLKSPDIF (CKC_BASE + ACLKSPDIF_OFFS)
41#define ACLKC3DEC (CKC_BASE + ACLKC3DEC_OFFS)
42#define ACLKCAN0 (CKC_BASE + ACLKCAN0_OFFS)
43#define ACLKCAN1 (CKC_BASE + ACLKCAN1_OFFS)
44#define ACLKGSB0 (CKC_BASE + ACLKGSB0_OFFS)
45#define ACLKGSB1 (CKC_BASE + ACLKGSB1_OFFS)
46#define ACLKGSB2 (CKC_BASE + ACLKGSB2_OFFS)
47#define ACLKGSB3 (CKC_BASE + ACLKGSB3_OFFS)
48#define ACLKTCT (CKC_BASE + ACLKTCT_OFFS)
49#define ACLKTCX (CKC_BASE + ACLKTCX_OFFS)
50#define ACLKTCZ (CKC_BASE + ACLKTCZ_OFFS)
51
52#define ACLK_MAX_DIV (0xfff + 1)
53
54/* Crystal frequencies */
55static unsigned long xi_rate, xti_rate;
56
57static void __iomem *pll_cfg_addr(int pll)
58{
59 switch (pll) {
60 case 0: return (CKC_BASE + PLL0CFG_OFFS);
61 case 1: return (CKC_BASE + PLL1CFG_OFFS);
62 case 2: return (CKC_BASE + PLL2CFG_OFFS);
63 default:
64 BUG();
65 }
66}
67
68static int pll_enable(int pll, int enable)
69{
70 u32 reg;
71 void __iomem *addr = pll_cfg_addr(pll);
72
73 reg = __raw_readl(addr);
74 if (enable)
75 reg &= ~PLLxCFG_PD;
76 else
77 reg |= PLLxCFG_PD;
78
79 __raw_writel(reg, addr);
80 return 0;
81}
82
83static int xi_enable(int enable)
84{
85 u32 reg;
86
87 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
88 if (enable)
89 reg |= CLKCTRL_XE;
90 else
91 reg &= ~CLKCTRL_XE;
92
93 __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
94 return 0;
95}
96
97static int root_clk_enable(enum root_clks src)
98{
99 switch (src) {
100 case CLK_SRC_PLL0: return pll_enable(0, 1);
101 case CLK_SRC_PLL1: return pll_enable(1, 1);
102 case CLK_SRC_PLL2: return pll_enable(2, 1);
103 case CLK_SRC_XI: return xi_enable(1);
104 default:
105 BUG();
106 }
107 return 0;
108}
109
110static int root_clk_disable(enum root_clks src)
111{
112 switch (src) {
113 case CLK_SRC_PLL0: return pll_enable(0, 0);
114 case CLK_SRC_PLL1: return pll_enable(1, 0);
115 case CLK_SRC_PLL2: return pll_enable(2, 0);
116 case CLK_SRC_XI: return xi_enable(0);
117 default:
118 BUG();
119 }
120 return 0;
121}
122
123static int enable_clk(struct clk *clk)
124{
125 u32 reg;
126
127 if (clk->root_id != CLK_SRC_NOROOT)
128 return root_clk_enable(clk->root_id);
129
130 if (clk->aclkreg) {
131 reg = __raw_readl(clk->aclkreg);
132 reg |= ACLK_EN;
133 __raw_writel(reg, clk->aclkreg);
134 }
135 if (clk->bclkctr) {
136 reg = __raw_readl(clk->bclkctr);
137 reg |= 1 << clk->bclk_shift;
138 __raw_writel(reg, clk->bclkctr);
139 }
140 return 0;
141}
142
143static void disable_clk(struct clk *clk)
144{
145 u32 reg;
146
147 if (clk->root_id != CLK_SRC_NOROOT) {
148 root_clk_disable(clk->root_id);
149 return;
150 }
151
152 if (clk->bclkctr) {
153 reg = __raw_readl(clk->bclkctr);
154 reg &= ~(1 << clk->bclk_shift);
155 __raw_writel(reg, clk->bclkctr);
156 }
157 if (clk->aclkreg) {
158 reg = __raw_readl(clk->aclkreg);
159 reg &= ~ACLK_EN;
160 __raw_writel(reg, clk->aclkreg);
161 }
162}
163
164static unsigned long get_rate_pll(int pll)
165{
166 u32 reg;
167 unsigned long s, m, p;
168 void __iomem *addr = pll_cfg_addr(pll);
169
170 reg = __raw_readl(addr);
171 s = (reg >> 16) & 0x07;
172 m = (reg >> 8) & 0xff;
173 p = reg & 0x3f;
174
175 return (m * xi_rate) / (p * (1 << s));
176}
177
178static unsigned long get_rate_pll_div(int pll)
179{
180 u32 reg;
181 unsigned long div = 0;
182 void __iomem *addr;
183
184 switch (pll) {
185 case 0:
186 addr = CKC_BASE + CLKDIVC0_OFFS;
187 reg = __raw_readl(addr);
188 if (reg & CLKDIVC0_P0E)
189 div = (reg >> 24) & 0x3f;
190 break;
191 case 1:
192 addr = CKC_BASE + CLKDIVC0_OFFS;
193 reg = __raw_readl(addr);
194 if (reg & CLKDIVC0_P1E)
195 div = (reg >> 16) & 0x3f;
196 break;
197 case 2:
198 addr = CKC_BASE + CLKDIVC1_OFFS;
199 reg = __raw_readl(addr);
200 if (reg & CLKDIVC1_P2E)
201 div = reg & 0x3f;
202 break;
203 }
204 return get_rate_pll(pll) / (div + 1);
205}
206
207static unsigned long get_rate_xi_div(void)
208{
209 unsigned long div = 0;
210 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
211
212 if (reg & CLKDIVC0_XE)
213 div = (reg >> 8) & 0x3f;
214
215 return xi_rate / (div + 1);
216}
217
218static unsigned long get_rate_xti_div(void)
219{
220 unsigned long div = 0;
221 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
222
223 if (reg & CLKDIVC0_XTE)
224 div = reg & 0x3f;
225
226 return xti_rate / (div + 1);
227}
228
229static unsigned long root_clk_get_rate(enum root_clks src)
230{
231 switch (src) {
232 case CLK_SRC_PLL0: return get_rate_pll(0);
233 case CLK_SRC_PLL1: return get_rate_pll(1);
234 case CLK_SRC_PLL2: return get_rate_pll(2);
235 case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
236 case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
237 case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
238 case CLK_SRC_XI: return xi_rate;
239 case CLK_SRC_XTI: return xti_rate;
240 case CLK_SRC_XIDIV: return get_rate_xi_div();
241 case CLK_SRC_XTIDIV: return get_rate_xti_div();
242 default: return 0;
243 }
244}
245
246static unsigned long aclk_get_rate(struct clk *clk)
247{
248 u32 reg;
249 unsigned long div;
250 unsigned int src;
251
252 reg = __raw_readl(clk->aclkreg);
253 div = reg & 0x0fff;
254 src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
255 return root_clk_get_rate(src) / (div + 1);
256}
257
258static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
259{
260 unsigned long div, src, freq, r1, r2;
261
262 if (!rate)
263 return ACLK_MAX_DIV;
264
265 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
266 src &= CLK_SRC_MASK;
267 freq = root_clk_get_rate(src);
268 div = freq / rate;
269 if (!div)
270 return 1;
271 if (div >= ACLK_MAX_DIV)
272 return ACLK_MAX_DIV;
273 r1 = freq / div;
274 r2 = freq / (div + 1);
275 if ((rate - r2) < (r1 - rate))
276 return div + 1;
277
278 return div;
279}
280
281static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
282{
283 unsigned int src;
284
285 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
286 src &= CLK_SRC_MASK;
287
288 return root_clk_get_rate(src) / aclk_best_div(clk, rate);
289}
290
291static int aclk_set_rate(struct clk *clk, unsigned long rate)
292{
293 u32 reg;
294
295 reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
296 reg |= aclk_best_div(clk, rate) - 1;
297 __raw_writel(reg, clk->aclkreg);
298 return 0;
299}
300
301static unsigned long get_rate_sys(struct clk *clk)
302{
303 unsigned int src;
304
305 src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
306 return root_clk_get_rate(src);
307}
308
309static unsigned long get_rate_bus(struct clk *clk)
310{
311 unsigned int reg, sdiv, bdiv, rate;
312
313 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
314 rate = get_rate_sys(clk);
315 sdiv = (reg >> 20) & 3;
316 if (sdiv)
317 rate /= sdiv + 1;
318 bdiv = (reg >> 4) & 0xff;
319 if (bdiv)
320 rate /= bdiv + 1;
321 return rate;
322}
323
324static unsigned long get_rate_cpu(struct clk *clk)
325{
326 unsigned int reg, div, fsys, fbus;
327
328 fbus = get_rate_bus(clk);
329 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
330 if (reg & (1 << 29))
331 return fbus;
332 fsys = get_rate_sys(clk);
333 div = (reg >> 16) & 0x0f;
334 return fbus + ((fsys - fbus) * (div + 1)) / 16;
335}
336
337static unsigned long get_rate_root(struct clk *clk)
338{
339 return root_clk_get_rate(clk->root_id);
340}
341
342static int aclk_set_parent(struct clk *clock, struct clk *parent)
343{
344 u32 reg;
345
346 if (clock->parent == parent)
347 return 0;
348
349 clock->parent = parent;
350
351 if (!parent)
352 return 0;
353
354 if (parent->root_id == CLK_SRC_NOROOT)
355 return 0;
356 reg = __raw_readl(clock->aclkreg);
357 reg &= ~ACLK_SEL_MASK;
358 reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
359 __raw_writel(reg, clock->aclkreg);
360
361 return 0;
362}
363
364#define DEFINE_ROOT_CLOCK(name, ri, p) \
365 static struct clk name = { \
366 .root_id = ri, \
367 .get_rate = get_rate_root, \
368 .enable = enable_clk, \
369 .disable = disable_clk, \
370 .parent = p, \
371 };
372
373#define DEFINE_SPECIAL_CLOCK(name, gr, p) \
374 static struct clk name = { \
375 .root_id = CLK_SRC_NOROOT, \
376 .get_rate = gr, \
377 .parent = p, \
378 };
379
380#define DEFINE_ACLOCK(name, bc, bs, ar) \
381 static struct clk name = { \
382 .root_id = CLK_SRC_NOROOT, \
383 .bclkctr = bc, \
384 .bclk_shift = bs, \
385 .aclkreg = ar, \
386 .get_rate = aclk_get_rate, \
387 .set_rate = aclk_set_rate, \
388 .round_rate = aclk_round_rate, \
389 .enable = enable_clk, \
390 .disable = disable_clk, \
391 .set_parent = aclk_set_parent, \
392 };
393
394#define DEFINE_BCLOCK(name, bc, bs, gr, p) \
395 static struct clk name = { \
396 .root_id = CLK_SRC_NOROOT, \
397 .bclkctr = bc, \
398 .bclk_shift = bs, \
399 .get_rate = gr, \
400 .enable = enable_clk, \
401 .disable = disable_clk, \
402 .parent = p, \
403 };
404
405DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
406DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
407DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
408DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
409DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
410DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
411DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
412DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
413DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
414DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
415
416/* The following 3 clocks are special and are initialized explicitly later */
417DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
418DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
419DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
420
421DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
422DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
423DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
424DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
425DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
426DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
427DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
428DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
429DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
430DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
431DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
432DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
433DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
434DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
435DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
436DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
437DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
438DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
439DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
440DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
441DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
442DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
443DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
444DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
445DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
446DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
447
448DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
449DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
450DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
451DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
452DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
453DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
454DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
455DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
456DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
457DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
458DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
459DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
460DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
461DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
462DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
463DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
464DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
465DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
466DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
467DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
468DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
469DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
470
471#define _REGISTER_CLOCK(d, n, c) \
472 { \
473 .dev_id = d, \
474 .con_id = n, \
475 .clk = &c, \
476 },
477
478static struct clk_lookup lookups[] = {
479 _REGISTER_CLOCK(NULL, "bus", bus)
480 _REGISTER_CLOCK(NULL, "cpu", cpu)
481 _REGISTER_CLOCK(NULL, "tct", tct)
482 _REGISTER_CLOCK(NULL, "tcx", tcx)
483 _REGISTER_CLOCK(NULL, "tcz", tcz)
484 _REGISTER_CLOCK(NULL, "ref", ref)
485 _REGISTER_CLOCK(NULL, "dai0", dai0)
486 _REGISTER_CLOCK(NULL, "pic", pic)
487 _REGISTER_CLOCK(NULL, "tc", tc)
488 _REGISTER_CLOCK(NULL, "gpio", gpio)
489 _REGISTER_CLOCK(NULL, "usbd", usbd)
490 _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
491 _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
492 _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
493 _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
494 _REGISTER_CLOCK(NULL, "ecc", ecc)
495 _REGISTER_CLOCK(NULL, "adc", adc)
496 _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
497 _REGISTER_CLOCK(NULL, "gdma0", gdma0)
498 _REGISTER_CLOCK(NULL, "lcd", lcd)
499 _REGISTER_CLOCK(NULL, "rtc", rtc)
500 _REGISTER_CLOCK(NULL, "nfc", nfc)
501 _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
502 _REGISTER_CLOCK(NULL, "g2d", g2d)
503 _REGISTER_CLOCK(NULL, "gdma1", gdma1)
504 _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
505 _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
506 _REGISTER_CLOCK(NULL, "mscl", mscl)
507 _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
508 _REGISTER_CLOCK(NULL, "bdma", bdma)
509 _REGISTER_CLOCK(NULL, "adma0", adma0)
510 _REGISTER_CLOCK(NULL, "spdif", spdif)
511 _REGISTER_CLOCK(NULL, "scfg", scfg)
512 _REGISTER_CLOCK(NULL, "cid", cid)
513 _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
514 _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
515 _REGISTER_CLOCK(NULL, "dai1", dai1)
516 _REGISTER_CLOCK(NULL, "adma1", adma1)
517 _REGISTER_CLOCK(NULL, "c3dec", c3dec)
518 _REGISTER_CLOCK("tcc-can.0", NULL, can0)
519 _REGISTER_CLOCK("tcc-can.1", NULL, can1)
520 _REGISTER_CLOCK(NULL, "gps", gps)
521 _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
522 _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
523 _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
524 _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
525 _REGISTER_CLOCK(NULL, "gdma2", gdma2)
526 _REGISTER_CLOCK(NULL, "gdma3", gdma3)
527 _REGISTER_CLOCK(NULL, "ddrc", ddrc)
528 _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
529};
530
531static struct clk *root_clk_by_index(enum root_clks src)
532{
533 switch (src) {
534 case CLK_SRC_PLL0: return &pll0;
535 case CLK_SRC_PLL1: return &pll1;
536 case CLK_SRC_PLL2: return &pll2;
537 case CLK_SRC_PLL0DIV: return &pll0div;
538 case CLK_SRC_PLL1DIV: return &pll1div;
539 case CLK_SRC_PLL2DIV: return &pll2div;
540 case CLK_SRC_XI: return &xi;
541 case CLK_SRC_XTI: return &xti;
542 case CLK_SRC_XIDIV: return &xidiv;
543 case CLK_SRC_XTIDIV: return &xtidiv;
544 default: return NULL;
545 }
546}
547
548static void find_aclk_parent(struct clk *clk)
549{
550 unsigned int src;
551 struct clk *clock;
552
553 if (!clk->aclkreg)
554 return;
555
556 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
557 src &= CLK_SRC_MASK;
558
559 clock = root_clk_by_index(src);
560 if (!clock)
561 return;
562
563 clk->parent = clock;
564 clk->set_parent = aclk_set_parent;
565}
566
567void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
568{
569 int i;
570
571 xi_rate = xi_freq;
572 xti_rate = xti_freq;
573
574 /* fixup parents and add the clock */
575 for (i = 0; i < ARRAY_SIZE(lookups); i++) {
576 find_aclk_parent(lookups[i].clk);
577 clkdev_add(&lookups[i]);
578 }
579 tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
580}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add395..000000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef MACH_TCC8K_COMMON_H
2#define MACH_TCC8K_COMMON_H
3
4#include <linux/platform_device.h>
5
6extern struct platform_device tcc_nand_device;
7
8struct clk;
9
10extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
11extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
12extern void tcc8k_init_irq(void);
13extern void tcc8k_map_common_io(void);
14
15#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c2836..000000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/devices.c
3 *
4 * Copyright (C) Telechips, Inc.
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of GPL v2.
8 *
9 */
10
11#include <linux/dma-mapping.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16
17#include <asm/mach/map.h>
18
19#include <mach/tcc8k-regs.h>
20#include <mach/irqs.h>
21
22#include "common.h"
23
24static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
25
26#ifdef CONFIG_MTD_NAND_TCC
27/* NAND controller */
28static struct resource tcc_nand_resources[] = {
29 {
30 .start = (resource_size_t)NFC_BASE,
31 .end = (resource_size_t)NFC_BASE + 0x7f,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = INT_NFC,
35 .end = INT_NFC,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40struct platform_device tcc_nand_device = {
41 .name = "tcc_nand",
42 .id = 0,
43 .num_resources = ARRAY_SIZE(tcc_nand_resources),
44 .resource = tcc_nand_resources,
45};
46#endif
47
48#ifdef CONFIG_MMC_TCC8K
49/* MMC controller */
50static struct resource tcc8k_mmc0_resource[] = {
51 {
52 .start = INT_SD0,
53 .end = INT_SD0,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct resource tcc8k_mmc1_resource[] = {
59 {
60 .start = INT_SD1,
61 .end = INT_SD1,
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66struct platform_device tcc8k_mmc0_device = {
67 .name = "tcc-mmc",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(tcc8k_mmc0_resource),
70 .resource = tcc8k_mmc0_resource,
71 .dev = {
72 .dma_mask = &tcc8k_dmamask,
73 .coherent_dma_mask = DMA_BIT_MASK(32),
74 }
75};
76
77struct platform_device tcc8k_mmc1_device = {
78 .name = "tcc-mmc",
79 .id = 1,
80 .num_resources = ARRAY_SIZE(tcc8k_mmc1_resource),
81 .resource = tcc8k_mmc1_resource,
82 .dev = {
83 .dma_mask = &tcc8k_dmamask,
84 .coherent_dma_mask = DMA_BIT_MASK(32),
85 }
86};
87
88static inline void tcc8k_init_mmc(void)
89{
90 u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
91
92 reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
93 __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
94
95 platform_device_register(&tcc8k_mmc0_device);
96 platform_device_register(&tcc8k_mmc1_device);
97}
98#else
99static inline void tcc8k_init_mmc(void) { }
100#endif
101
102#ifdef CONFIG_USB_OHCI_HCD
103static int tcc8k_ohci_init(struct device *dev)
104{
105 u32 reg;
106
107 /* Use GPIO PK19 as VBUS control output */
108 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
109 reg &= ~(1 << 19);
110 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
111 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
112 reg &= ~(1 << 19);
113 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
114
115 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
116 reg |= (1 << 19);
117 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
118 /* Turn on VBUS */
119 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
120 reg |= (1 << 19);
121 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
122
123 return 0;
124}
125
126static struct resource tcc8k_ohci0_resources[] = {
127 [0] = {
128 .start = (resource_size_t)USBH0_BASE,
129 .end = (resource_size_t)USBH0_BASE + 0x5c,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = INT_USBH0,
134 .end = INT_USBH0,
135 .flags = IORESOURCE_IRQ,
136 }
137};
138
139static struct resource tcc8k_ohci1_resources[] = {
140 [0] = {
141 .start = (resource_size_t)USBH1_BASE,
142 .end = (resource_size_t)USBH1_BASE + 0x5c,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = INT_USBH1,
147 .end = INT_USBH1,
148 .flags = IORESOURCE_IRQ,
149 }
150};
151
152static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
153 .controller = 0,
154 .port_mode = PMM_PERPORT_MODE,
155 .init = tcc8k_ohci_init,
156};
157
158static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
159 .controller = 1,
160 .port_mode = PMM_PERPORT_MODE,
161 .init = tcc8k_ohci_init,
162};
163
164static struct platform_device ohci0_device = {
165 .name = "tcc-ohci",
166 .id = 0,
167 .dev = {
168 .dma_mask = &tcc8k_dmamask,
169 .coherent_dma_mask = DMA_BIT_MASK(32),
170 .platform_data = &tcc8k_ohci0_platform_data,
171 },
172 .num_resources = ARRAY_SIZE(tcc8k_ohci0_resources),
173 .resource = tcc8k_ohci0_resources,
174};
175
176static struct platform_device ohci1_device = {
177 .name = "tcc-ohci",
178 .id = 1,
179 .dev = {
180 .dma_mask = &tcc8k_dmamask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
182 .platform_data = &tcc8k_ohci1_platform_data,
183 },
184 .num_resources = ARRAY_SIZE(tcc8k_ohci1_resources),
185 .resource = tcc8k_ohci1_resources,
186};
187
188static void __init tcc8k_init_usbhost(void)
189{
190 platform_device_register(&ohci0_device);
191 platform_device_register(&ohci1_device);
192}
193#else
194static void __init tcc8k_init_usbhost(void) { }
195#endif
196
197/* USB device controller*/
198#ifdef CONFIG_USB_GADGET_TCC8K
199static struct resource udc_resources[] = {
200 [0] = {
201 .start = INT_USBD,
202 .end = INT_USBD,
203 .flags = IORESOURCE_IRQ,
204 },
205 [1] = {
206 .start = INT_UDMA,
207 .end = INT_UDMA,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211
212static struct platform_device tcc8k_udc_device = {
213 .name = "tcc-udc",
214 .id = 0,
215 .resource = udc_resources,
216 .num_resources = ARRAY_SIZE(udc_resources),
217 .dev = {
218 .dma_mask = &tcc8k_dmamask,
219 .coherent_dma_mask = DMA_BIT_MASK(32),
220 },
221};
222
223static void __init tcc8k_init_usb_gadget(void)
224{
225 platform_device_register(&tcc8k_udc_device);
226}
227#else
228static void __init tcc8k_init_usb_gadget(void) { }
229#endif /* CONFIG_USB_GADGET_TCC83X */
230
231static int __init tcc8k_init_devices(void)
232{
233 tcc8k_init_mmc();
234 tcc8k_init_usbhost();
235 tcc8k_init_usb_gadget();
236 return 0;
237}
238
239arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658f..000000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/io.c
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * derived from TCC83xx io.c
7 * Copyright (C) Telechips, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17
18#include <asm/mach/map.h>
19
20#include <mach/tcc8k-regs.h>
21
22/*
23 * The machine specific code may provide the extra mapping besides the
24 * default mapping provided here.
25 */
26static struct map_desc tcc8k_io_desc[] __initdata = {
27 {
28 .virtual = (unsigned long)CS1_BASE_VIRT,
29 .pfn = __phys_to_pfn(CS1_BASE),
30 .length = CS1_SIZE,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = (unsigned long)AHB_PERI_BASE_VIRT,
34 .pfn = __phys_to_pfn(AHB_PERI_BASE),
35 .length = AHB_PERI_SIZE,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = (unsigned long)APB0_PERI_BASE_VIRT,
39 .pfn = __phys_to_pfn(APB0_PERI_BASE),
40 .length = APB0_PERI_SIZE,
41 .type = MT_DEVICE,
42 }, {
43 .virtual = (unsigned long)APB1_PERI_BASE_VIRT,
44 .pfn = __phys_to_pfn(APB1_PERI_BASE),
45 .length = APB1_PERI_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
49 .pfn = __phys_to_pfn(EXT_MEM_CTRL_BASE),
50 .length = EXT_MEM_CTRL_SIZE,
51 .type = MT_DEVICE,
52 },
53};
54
55/*
56 * Maps common IO regions for tcc8k.
57 *
58 */
59void __init tcc8k_map_common_io(void)
60{
61 iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
62}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4c..000000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * Copyright (C) Telechips, Inc.
3 * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the terms of the GNU GPL version 2.
6 */
7
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11
12#include <asm/irq.h>
13#include <asm/mach/irq.h>
14
15#include <mach/tcc8k-regs.h>
16#include <mach/irqs.h>
17
18#include "common.h"
19
20/* Disable IRQ */
21static void tcc8000_mask_ack_irq0(struct irq_data *d)
22{
23 PIC0_IEN &= ~(1 << d->irq);
24 PIC0_CREQ |= (1 << d->irq);
25}
26
27static void tcc8000_mask_ack_irq1(struct irq_data *d)
28{
29 PIC1_IEN &= ~(1 << (d->irq - 32));
30 PIC1_CREQ |= (1 << (d->irq - 32));
31}
32
33static void tcc8000_mask_irq0(struct irq_data *d)
34{
35 PIC0_IEN &= ~(1 << d->irq);
36}
37
38static void tcc8000_mask_irq1(struct irq_data *d)
39{
40 PIC1_IEN &= ~(1 << (d->irq - 32));
41}
42
43static void tcc8000_ack_irq0(struct irq_data *d)
44{
45 PIC0_CREQ |= (1 << d->irq);
46}
47
48static void tcc8000_ack_irq1(struct irq_data *d)
49{
50 PIC1_CREQ |= (1 << (d->irq - 32));
51}
52
53/* Enable IRQ */
54static void tcc8000_unmask_irq0(struct irq_data *d)
55{
56 PIC0_IEN |= (1 << d->irq);
57 PIC0_INTOEN |= (1 << d->irq);
58}
59
60static void tcc8000_unmask_irq1(struct irq_data *d)
61{
62 PIC1_IEN |= (1 << (d->irq - 32));
63 PIC1_INTOEN |= (1 << (d->irq - 32));
64}
65
66static struct irq_chip tcc8000_irq_chip0 = {
67 .name = "tcc_irq0",
68 .irq_mask = tcc8000_mask_irq0,
69 .irq_ack = tcc8000_ack_irq0,
70 .irq_mask_ack = tcc8000_mask_ack_irq0,
71 .irq_unmask = tcc8000_unmask_irq0,
72};
73
74static struct irq_chip tcc8000_irq_chip1 = {
75 .name = "tcc_irq1",
76 .irq_mask = tcc8000_mask_irq1,
77 .irq_ack = tcc8000_ack_irq1,
78 .irq_mask_ack = tcc8000_mask_ack_irq1,
79 .irq_unmask = tcc8000_unmask_irq1,
80};
81
82void __init tcc8k_init_irq(void)
83{
84 int irqno;
85
86 /* Mask and clear all interrupts */
87 PIC0_IEN = 0x00000000;
88 PIC0_CREQ = 0xffffffff;
89 PIC1_IEN = 0x00000000;
90 PIC1_CREQ = 0xffffffff;
91
92 PIC0_MEN0 = 0x00000003;
93 PIC1_MEN1 = 0x00000003;
94 PIC1_MEN = 0x00000003;
95
96 /* let all IRQs be level triggered */
97 PIC0_TMODE = 0xffffffff;
98 PIC1_TMODE = 0xffffffff;
99 /* all IRQs are IRQs (not FIQs) */
100 PIC0_IRQSEL = 0xffffffff;
101 PIC1_IRQSEL = 0xffffffff;
102
103 for (irqno = 0; irqno < NR_IRQS; irqno++) {
104 if (irqno < 32)
105 irq_set_chip(irqno, &tcc8000_irq_chip0);
106 else
107 irq_set_chip(irqno, &tcc8000_irq_chip1);
108 irq_set_handler(irqno, handle_level_irq);
109 set_irq_flags(irqno, IRQF_VALID);
110 }
111}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe83771..000000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * TCC8000 system timer setup
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL version 2.
7 *
8 */
9
10#include <linux/clk.h>
11#include <linux/clockchips.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/spinlock.h>
18
19#include <asm/mach/time.h>
20
21#include <mach/tcc8k-regs.h>
22#include <mach/irqs.h>
23
24#include "common.h"
25
26static void __iomem *timer_base;
27
28static int tcc_set_next_event(unsigned long evt,
29 struct clock_event_device *unused)
30{
31 unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
32
33 __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
34 return 0;
35}
36
37static void tcc_set_mode(enum clock_event_mode mode,
38 struct clock_event_device *evt)
39{
40 unsigned long tc32irq;
41
42 switch (mode) {
43 case CLOCK_EVT_MODE_ONESHOT:
44 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
45 tc32irq |= TC32IRQ_IRQEN0;
46 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
47 break;
48 case CLOCK_EVT_MODE_SHUTDOWN:
49 case CLOCK_EVT_MODE_UNUSED:
50 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
51 tc32irq &= ~TC32IRQ_IRQEN0;
52 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
53 break;
54 case CLOCK_EVT_MODE_PERIODIC:
55 case CLOCK_EVT_MODE_RESUME:
56 break;
57 }
58}
59
60static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
61{
62 struct clock_event_device *evt = dev_id;
63
64 /* Acknowledge TC32 interrupt by reading TC32IRQ */
65 __raw_readl(timer_base + TC32IRQ_OFFS);
66
67 evt->event_handler(evt);
68
69 return IRQ_HANDLED;
70}
71
72static struct clock_event_device clockevent_tcc = {
73 .name = "tcc_timer1",
74 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .shift = 32,
76 .set_mode = tcc_set_mode,
77 .set_next_event = tcc_set_next_event,
78 .rating = 200,
79};
80
81static struct irqaction tcc8k_timer_irq = {
82 .name = "TC32_timer",
83 .flags = IRQF_DISABLED | IRQF_TIMER,
84 .handler = tcc8k_timer_interrupt,
85 .dev_id = &clockevent_tcc,
86};
87
88static int __init tcc_clockevent_init(struct clk *clock)
89{
90 unsigned int c = clk_get_rate(clock);
91
92 clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
93 200, 32, clocksource_mmio_readl_up);
94
95 clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
96 clockevent_tcc.shift);
97 clockevent_tcc.max_delta_ns =
98 clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
99 clockevent_tcc.min_delta_ns =
100 clockevent_delta2ns(0xff, &clockevent_tcc);
101
102 clockevent_tcc.cpumask = cpumask_of(0);
103
104 clockevents_register_device(&clockevent_tcc);
105
106 return 0;
107}
108
109void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
110{
111 u32 reg;
112
113 timer_base = base;
114 tcc8k_timer_irq.irq = irq;
115
116 /* Enable clocks */
117 clk_enable(clock);
118
119 /* Initialize 32-bit timer */
120 reg = __raw_readl(timer_base + TC32EN_OFFS);
121 reg &= ~TC32EN_ENABLE; /* Disable timer */
122 __raw_writel(reg, timer_base + TC32EN_OFFS);
123 /* Free running timer, counting from 0 to 0xffffffff */
124 __raw_writel(0, timer_base + TC32EN_OFFS);
125 __raw_writel(0, timer_base + TC32LDV_OFFS);
126 reg = __raw_readl(timer_base + TC32IRQ_OFFS);
127 reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
128 __raw_writel(reg, timer_base + TC32IRQ_OFFS);
129
130 __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
131
132 tcc_clockevent_init(clock);
133 setup_irq(irq, &tcc8k_timer_irq);
134}
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 91a07e187208..5be8e9eefc95 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -18,20 +18,20 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
18obj-$(CONFIG_TEGRA_PCI) += pcie.o 18obj-$(CONFIG_TEGRA_PCI) += pcie.o
19obj-$(CONFIG_USB_SUPPORT) += usb_phy.o 19obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
20 20
21obj-${CONFIG_MACH_HARMONY} += board-harmony.o 21obj-$(CONFIG_MACH_HARMONY) += board-harmony.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 22obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o
23obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 23obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o
24obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o 24obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
25 25
26obj-${CONFIG_MACH_PAZ00} += board-paz00.o 26obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
27obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o 27obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
28 28
29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 29obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 30obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
31 31
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o 32obj-$(CONFIG_MACH_TEGRA_DT) += board-dt.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o 33obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o
34obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o 34obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o
35 35
36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 36obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
37obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 37obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 74743ad3d2d3..e417a8383dbb 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h> 33#include <linux/i2c-tegra.h>
34 34
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
37#include <asm/mach/time.h> 38#include <asm/mach/time.h>
@@ -130,7 +131,9 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
130 .map_io = tegra_map_common_io, 131 .map_io = tegra_map_common_io,
131 .init_early = tegra_init_early, 132 .init_early = tegra_init_early,
132 .init_irq = tegra_init_irq, 133 .init_irq = tegra_init_irq,
134 .handle_irq = gic_handle_irq,
133 .timer = &tegra_timer, 135 .timer = &tegra_timer,
134 .init_machine = tegra_dt_init, 136 .init_machine = tegra_dt_init,
137 .restart = tegra_assert_system_reset,
135 .dt_compat = tegra_dt_board_compat, 138 .dt_compat = tegra_dt_board_compat,
136MACHINE_END 139MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index f0bdc5e3fe52..70ee674131f9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34#include <asm/hardware/gic.h>
34#include <asm/setup.h> 35#include <asm/setup.h>
35 36
36#include <mach/tegra_wm8903_pdata.h> 37#include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,8 @@ MACHINE_START(HARMONY, "harmony")
187 .map_io = tegra_map_common_io, 188 .map_io = tegra_map_common_io,
188 .init_early = tegra_init_early, 189 .init_early = tegra_init_early,
189 .init_irq = tegra_init_irq, 190 .init_irq = tegra_init_irq,
191 .handle_irq = gic_handle_irq,
190 .timer = &tegra_timer, 192 .timer = &tegra_timer,
191 .init_machine = tegra_harmony_init, 193 .init_machine = tegra_harmony_init,
194 .restart = tegra_assert_system_reset,
192MACHINE_END 195MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 55c55ba89f1e..33d6205ad307 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -29,6 +29,7 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 30#include <linux/rfkill-gpio.h>
31 31
32#include <asm/hardware/gic.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/time.h> 35#include <asm/mach/time.h>
@@ -190,6 +191,8 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
190 .map_io = tegra_map_common_io, 191 .map_io = tegra_map_common_io,
191 .init_early = tegra_init_early, 192 .init_early = tegra_init_early,
192 .init_irq = tegra_init_irq, 193 .init_irq = tegra_init_irq,
194 .handle_irq = gic_handle_irq,
193 .timer = &tegra_timer, 195 .timer = &tegra_timer,
194 .init_machine = tegra_paz00_init, 196 .init_machine = tegra_paz00_init,
197 .restart = tegra_assert_system_reset,
195MACHINE_END 198MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index bf13ea355efc..c1599eb8e0cb 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
34 34
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/hardware/gic.h>
37 38
38#include "board.h" 39#include "board.h"
39#include "board-seaboard.h" 40#include "board-seaboard.h"
@@ -284,8 +285,10 @@ MACHINE_START(SEABOARD, "seaboard")
284 .map_io = tegra_map_common_io, 285 .map_io = tegra_map_common_io,
285 .init_early = tegra_init_early, 286 .init_early = tegra_init_early,
286 .init_irq = tegra_init_irq, 287 .init_irq = tegra_init_irq,
288 .handle_irq = gic_handle_irq,
287 .timer = &tegra_timer, 289 .timer = &tegra_timer,
288 .init_machine = tegra_seaboard_init, 290 .init_machine = tegra_seaboard_init,
291 .restart = tegra_assert_system_reset,
289MACHINE_END 292MACHINE_END
290 293
291MACHINE_START(KAEN, "kaen") 294MACHINE_START(KAEN, "kaen")
@@ -293,8 +296,10 @@ MACHINE_START(KAEN, "kaen")
293 .map_io = tegra_map_common_io, 296 .map_io = tegra_map_common_io,
294 .init_early = tegra_init_early, 297 .init_early = tegra_init_early,
295 .init_irq = tegra_init_irq, 298 .init_irq = tegra_init_irq,
299 .handle_irq = gic_handle_irq,
296 .timer = &tegra_timer, 300 .timer = &tegra_timer,
297 .init_machine = tegra_kaen_init, 301 .init_machine = tegra_kaen_init,
302 .restart = tegra_assert_system_reset,
298MACHINE_END 303MACHINE_END
299 304
300MACHINE_START(WARIO, "wario") 305MACHINE_START(WARIO, "wario")
@@ -302,6 +307,8 @@ MACHINE_START(WARIO, "wario")
302 .map_io = tegra_map_common_io, 307 .map_io = tegra_map_common_io,
303 .init_early = tegra_init_early, 308 .init_early = tegra_init_early,
304 .init_irq = tegra_init_irq, 309 .init_irq = tegra_init_irq,
310 .handle_irq = gic_handle_irq,
305 .timer = &tegra_timer, 311 .timer = &tegra_timer,
306 .init_machine = tegra_wario_init, 312 .init_machine = tegra_wario_init,
313 .restart = tegra_assert_system_reset,
307MACHINE_END 314MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 1a6617b7806f..c242314a1db5 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28 28
29#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -176,6 +177,8 @@ MACHINE_START(TRIMSLICE, "trimslice")
176 .map_io = tegra_map_common_io, 177 .map_io = tegra_map_common_io,
177 .init_early = tegra_init_early, 178 .init_early = tegra_init_early,
178 .init_irq = tegra_init_irq, 179 .init_irq = tegra_init_irq,
180 .handle_irq = gic_handle_irq,
179 .timer = &tegra_timer, 181 .timer = &tegra_timer,
180 .init_machine = tegra_trimslice_init, 182 .init_machine = tegra_trimslice_init,
183 .restart = tegra_assert_system_reset,
181MACHINE_END 184MACHINE_END
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 690b888be506..20f396d740fa 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -31,8 +31,6 @@
31#include "clock.h" 31#include "clock.h"
32#include "fuse.h" 32#include "fuse.h"
33 33
34void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
35
36void tegra_assert_system_reset(char mode, const char *cmd) 34void tegra_assert_system_reset(char mode, const char *cmd)
37{ 35{
38 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); 36 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889d..e577cfe27e72 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,45 +12,9 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15#include <mach/iomap.h>
16#include <mach/io.h>
17 15
18#if defined(CONFIG_ARM_GIC)
19#define HAVE_GET_IRQNR_PREAMBLE
20#include <asm/hardware/entry-macro-gic.S>
21
22 /* Uses the GIC interrupt controller built into the cpu */
23#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
24
25 .macro disable_fiq
26 .endm
27
28 .macro get_irqnr_preamble, base, tmp
29 movw \base, #(ICTRL_BASE & 0x0000ffff)
30 movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
31 .endm
32
33 .macro arch_ret_to_user, tmp1, tmp2
34 .endm
35#else
36 /* legacy interrupt controller for AP16 */
37 .macro disable_fiq 16 .macro disable_fiq
38 .endm 17 .endm
39 18
40 .macro get_irqnr_preamble, base, tmp
41 @ enable imprecise aborts
42 cpsie a
43 @ EVP base at 0xf010f000
44 mov \base, #0xf0000000
45 orr \base, #0x00100000
46 orr \base, #0x0000f000
47 .endm
48
49 .macro arch_ret_to_user, tmp1, tmp2 19 .macro arch_ret_to_user, tmp1, tmp2
50 .endm 20 .endm
51
52 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
53 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
54 cmp \irqnr, #0x80
55 .endm
56#endif
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 35a011fbc42d..f15defffb5d2 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -71,12 +71,6 @@
71 71
72#ifndef __ASSEMBLER__ 72#ifndef __ASSEMBLER__
73 73
74#define __arch_ioremap tegra_ioremap
75#define __arch_iounmap tegra_iounmap
76
77void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
78void tegra_iounmap(volatile void __iomem *addr);
79
80#define IO_ADDRESS(n) (IO_TO_VIRT(n)) 74#define IO_ADDRESS(n) (IO_TO_VIRT(n))
81 75
82#ifdef CONFIG_TEGRA_PCI 76#ifdef CONFIG_TEGRA_PCI
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index 027c4215d313..a312988bf6f8 100644
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -21,10 +21,6 @@
21#ifndef __MACH_TEGRA_SYSTEM_H 21#ifndef __MACH_TEGRA_SYSTEM_H
22#define __MACH_TEGRA_SYSTEM_H 22#define __MACH_TEGRA_SYSTEM_H
23 23
24#include <mach/iomap.h>
25
26extern void (*arch_reset)(char mode, const char *cmd);
27
28static inline void arch_idle(void) 24static inline void arch_idle(void)
29{ 25{
30} 26}
diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h
deleted file mode 100644
index fd6aa65b2dc6..000000000000
--- a/arch/arm/mach-tegra/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MACH_TEGRA_VMALLOC_H
22#define __MACH_TEGRA_VMALLOC_H
23
24#include <asm/sizes.h>
25
26#define VMALLOC_END 0xFE000000UL
27
28#endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 5489f8b5d6ad..d23ee2db2827 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -60,24 +60,3 @@ void __init tegra_map_common_io(void)
60{ 60{
61 iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc)); 61 iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
62} 62}
63
64/*
65 * Intercept ioremap() requests for addresses in our fixed mapping regions.
66 */
67void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type)
68{
69 void __iomem *v = IO_ADDRESS(p);
70 if (v == NULL)
71 v = __arm_ioremap(p, size, type);
72 return v;
73}
74EXPORT_SYMBOL(tegra_ioremap);
75
76void tegra_iounmap(volatile void __iomem *addr)
77{
78 unsigned long virt = (unsigned long)addr;
79
80 if (virt >= VMALLOC_START && virt < VMALLOC_END)
81 __iounmap(addr);
82}
83EXPORT_SYMBOL(tegra_iounmap);
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 4956c3cea731..8ad82af6a293 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -28,10 +28,6 @@
28 28
29#include "board.h" 29#include "board.h"
30 30
31#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE)
32#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE)
33#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ)
34
35#define ICTLR_CPU_IEP_VFIQ 0x08 31#define ICTLR_CPU_IEP_VFIQ 0x08
36#define ICTLR_CPU_IEP_FIR 0x14 32#define ICTLR_CPU_IEP_FIR 0x14
37#define ICTLR_CPU_IEP_FIR_SET 0x18 33#define ICTLR_CPU_IEP_FIR_SET 0x18
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a83..732c724008b1 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -19,7 +19,6 @@
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/sched.h>
23#include <linux/time.h> 22#include <linux/time.h>
24#include <linux/interrupt.h> 23#include <linux/interrupt.h>
25#include <linux/irq.h> 24#include <linux/irq.h>
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = {
106 .set_mode = tegra_timer_set_mode, 105 .set_mode = tegra_timer_set_mode,
107}; 106};
108 107
109static DEFINE_CLOCK_DATA(cd); 108static u32 notrace tegra_read_sched_clock(void)
110
111/*
112 * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
113 * This gives a resolution of about 1us and a wrap period of about 1h11min.
114 */
115#define SC_MULT 4194304000u
116#define SC_SHIFT 22
117
118unsigned long long notrace sched_clock(void)
119{
120 u32 cyc = timer_readl(TIMERUS_CNTR_1US);
121 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
122}
123
124static void notrace tegra_update_sched_clock(void)
125{ 109{
126 u32 cyc = timer_readl(TIMERUS_CNTR_1US); 110 return timer_readl(TIMERUS_CNTR_1US);
127 update_sched_clock(&cd, cyc, (u32)~0);
128} 111}
129 112
130/* 113/*
@@ -218,8 +201,7 @@ static void __init tegra_init_timer(void)
218 WARN(1, "Unknown clock rate"); 201 WARN(1, "Unknown clock rate");
219 } 202 }
220 203
221 init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, 204 setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
222 1000000, SC_MULT, SC_SHIFT);
223 205
224 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, 206 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
225 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { 207 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index ac0791e924bc..697930761b3e 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1888,3 +1888,23 @@ static int core_module_init(void)
1888 return mmc_init(&mmcsd_device); 1888 return mmc_init(&mmcsd_device);
1889} 1889}
1890module_init(core_module_init); 1890module_init(core_module_init);
1891
1892/* Forward declare this function from the watchdog */
1893void coh901327_watchdog_reset(void);
1894
1895void u300_restart(char mode, const char *cmd)
1896{
1897 switch (mode) {
1898 case 's':
1899 case 'h':
1900#ifdef CONFIG_COH901327_WATCHDOG
1901 coh901327_watchdog_reset();
1902#endif
1903 break;
1904 default:
1905 /* Do nothing */
1906 break;
1907 }
1908 /* Wait for system do die/reset. */
1909 while (1);
1910}
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae39d38..7181d6ac6651 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
8 * Low-level IRQ helper macros for ST-Ericsson U300 8 * Low-level IRQ helper macros for ST-Ericsson U300
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <mach/hardware.h>
12#include <asm/hardware/vic.h>
13 11
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 bne 1002f
291001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
30 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
31 mov \irqnr, #32
32 teq \irqstat, #0
33 beq 1003f
341002: tst \irqstat, #1
35 bne 1003f
36 add \irqnr, \irqnr, #1
37 movs \irqstat, \irqstat, lsr #1
38 bne 1002b
391003: /* EQ will be set if no irqs pending */
40 .endm
diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h
deleted file mode 100644
index c808f347a081..000000000000
--- a/arch/arm/mach-u300/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/memory.h
4 *
5 *
6 * Copyright (C) 2007-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Memory virtual/physical mapping constants.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
11 */
12
13#ifndef __MACH_MEMORY_H
14#define __MACH_MEMORY_H
15
16#define PLAT_PHYS_OFFSET UL(0x48000000)
17#define BOOT_PARAMS_OFFSET 0x100
18
19#endif
diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h
index 77d9210a82e2..096333f32fc3 100644
--- a/arch/arm/mach-u300/include/mach/platform.h
+++ b/arch/arm/mach-u300/include/mach/platform.h
@@ -14,6 +14,7 @@
14void u300_map_io(void); 14void u300_map_io(void);
15void u300_init_irq(void); 15void u300_init_irq(void);
16void u300_init_devices(void); 16void u300_init_devices(void);
17void u300_restart(char, const char *);
17extern struct sys_timer u300_timer; 18extern struct sys_timer u300_timer;
18 19
19#endif 20#endif
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
index 8daf13634ce0..574d46e38290 100644
--- a/arch/arm/mach-u300/include/mach/system.h
+++ b/arch/arm/mach-u300/include/mach/system.h
@@ -8,35 +8,7 @@
8 * System shutdown and reset functions. 8 * System shutdown and reset functions.
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <mach/hardware.h>
12#include <asm/io.h>
13#include <asm/hardware/vic.h>
14#include <asm/irq.h>
15
16/* Forward declare this function from the watchdog */
17void coh901327_watchdog_reset(void);
18
19static inline void arch_idle(void) 11static inline void arch_idle(void)
20{ 12{
21 cpu_do_idle(); 13 cpu_do_idle();
22} 14}
23
24static void arch_reset(char mode, const char *cmd)
25{
26 switch (mode) {
27 case 's':
28 case 'h':
29 printk(KERN_CRIT "RESET: shutting down/rebooting system\n");
30 /* Disable interrupts */
31 local_irq_disable();
32#ifdef CONFIG_COH901327_WATCHDOG
33 coh901327_watchdog_reset();
34#endif
35 break;
36 default:
37 /* Do nothing */
38 break;
39 }
40 /* Wait for system do die/reset. */
41 while (1);
42}
diff --git a/arch/arm/mach-u300/include/mach/vmalloc.h b/arch/arm/mach-u300/include/mach/vmalloc.h
deleted file mode 100644
index ec423b92b81d..000000000000
--- a/arch/arm/mach-u300/include/mach/vmalloc.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/vmalloc.h
4 *
5 *
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Virtual memory allocations
9 * End must be above the I/O registers and on an even 2MiB boundary.
10 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 */
12#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 5f51bdeef0ef..bc1c7897e82d 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -9,7 +9,6 @@
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/sched.h>
13#include <linux/time.h> 12#include <linux/time.h>
14#include <linux/timex.h> 13#include <linux/timex.h>
15#include <linux/clockchips.h> 14#include <linux/clockchips.h>
@@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = {
337 * this wraps around for now, since it is just a relative time 336 * this wraps around for now, since it is just a relative time
338 * stamp. (Inspired by OMAP implementation.) 337 * stamp. (Inspired by OMAP implementation.)
339 */ 338 */
340static DEFINE_CLOCK_DATA(cd);
341 339
342unsigned long long notrace sched_clock(void) 340static u32 notrace u300_read_sched_clock(void)
343{ 341{
344 u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); 342 return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
345 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
346}
347
348static void notrace u300_update_sched_clock(void)
349{
350 u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
351 update_sched_clock(&cd, cyc, (u32)~0);
352} 343}
353 344
354 345
@@ -366,7 +357,7 @@ static void __init u300_timer_init(void)
366 clk_enable(clk); 357 clk_enable(clk);
367 rate = clk_get_rate(clk); 358 rate = clk_get_rate(clk);
368 359
369 init_sched_clock(&cd, u300_update_sched_clock, 32, rate); 360 setup_sched_clock(u300_read_sched_clock, 32, rate);
370 361
371 /* 362 /*
372 * Disable the "OS" and "DD" timers - these are designed for Symbian! 363 * Disable the "OS" and "DD" timers - these are designed for Symbian!
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 89422ee7f3a8..f30c69d91d99 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/platform.h> 21#include <mach/platform.h>
22#include <asm/hardware/vic.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/memory.h> 25#include <asm/memory.h>
@@ -46,9 +47,11 @@ static void __init u300_init_machine(void)
46 47
47MACHINE_START(U300, MACH_U300_STRING) 48MACHINE_START(U300, MACH_U300_STRING)
48 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ 49 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
49 .atag_offset = BOOT_PARAMS_OFFSET, 50 .atag_offset = 0x100,
50 .map_io = u300_map_io, 51 .map_io = u300_map_io,
51 .init_irq = u300_init_irq, 52 .init_irq = u300_init_irq,
53 .handle_irq = vic_handle_irq,
52 .timer = &u300_timer, 54 .timer = &u300_timer,
53 .init_machine = u300_init_machine, 55 .init_machine = u300_init_machine,
56 .restart = u300_restart,
54MACHINE_END 57MACHINE_END
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7ad..de1f5f8f7330 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
33#include <linux/leds.h> 33#include <linux/leds.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/hardware/gic.h>
36 37
37#include <plat/i2c.h> 38#include <plat/i2c.h>
38#include <plat/ste_dma40.h> 39#include <plat/ste_dma40.h>
@@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
695 .init_irq = ux500_init_irq, 696 .init_irq = ux500_init_irq,
696 /* we re-use nomadik timer here */ 697 /* we re-use nomadik timer here */
697 .timer = &ux500_timer, 698 .timer = &ux500_timer,
699 .handle_irq = gic_handle_irq,
698 .init_machine = mop500_init_machine, 700 .init_machine = mop500_init_machine,
699MACHINE_END 701MACHINE_END
700 702
@@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
703 .map_io = u8500_map_io, 705 .map_io = u8500_map_io,
704 .init_irq = ux500_init_irq, 706 .init_irq = ux500_init_irq,
705 .timer = &ux500_timer, 707 .timer = &ux500_timer,
708 .handle_irq = gic_handle_irq,
706 .init_machine = hrefv60_init_machine, 709 .init_machine = hrefv60_init_machine,
707MACHINE_END 710MACHINE_END
708 711
@@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
712 .init_irq = ux500_init_irq, 715 .init_irq = ux500_init_irq,
713 /* we re-use nomadik timer here */ 716 /* we re-use nomadik timer here */
714 .timer = &ux500_timer, 717 .timer = &ux500_timer,
718 .handle_irq = gic_handle_irq,
715 .init_machine = snowball_init_machine, 719 .init_machine = snowball_init_machine,
716MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 82025ba70c03..fe1569b67c91 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -12,6 +12,7 @@
12#include <linux/i2c.h> 12#include <linux/i2c.h>
13#include <linux/mfd/ab5500/ab5500.h> 13#include <linux/mfd/ab5500/ab5500.h>
14 14
15#include <asm/hardware/gic.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17 18
@@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
149 .map_io = u5500_map_io, 150 .map_io = u5500_map_io,
150 .init_irq = ux500_init_irq, 151 .init_irq = ux500_init_irq,
151 .timer = &ux500_timer, 152 .timer = &ux500_timer,
153 .handle_irq = gic_handle_irq,
152 .init_machine = u5500_init_machine, 154 .init_machine = u5500_init_machine,
153MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 9de1af008094..5323286b265e 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = {
30}; 30};
31 31
32static struct map_desc u5500_io_desc[] __initdata = { 32static struct map_desc u5500_io_desc[] __initdata = {
33 __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K), 33 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
34 __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
34 __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K), 35 __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),
35 __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K), 36 __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),
36 __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),
37 __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K), 37 __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),
38 __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
39 __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K), 38 __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),
40 39
41 __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K), 40 __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 13e8890a8b8a..7f2729c05db3 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {
35}; 35};
36 36
37static struct map_desc u8500_io_desc[] __initdata = { 37static struct map_desc u8500_io_desc[] __initdata = {
38 __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), 38 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
39 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
39 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 40 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
40 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 41 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
41 __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
42 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 42 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
43 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
44 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 43 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
45 44
46 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 45 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba94f727..e16299e1020a 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <asm/hardware/entry-macro-gic.S>
15 13
16 .macro disable_fiq 14 .macro disable_fiq
17 .endm 15 .endm
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
index 7389df911b1a..c01ef66537f3 100644
--- a/arch/arm/mach-ux500/include/mach/gpio.h
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -1,10 +1,5 @@
1#ifndef __ASM_ARCH_GPIO_H 1#ifndef __ASM_ARCH_GPIO_H
2#define __ASM_ARCH_GPIO_H 2#define __ASM_ARCH_GPIO_H
3 3
4/*
5 * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
6 * room for a couple of GPIO expanders.
7 */
8#define ARCH_NR_GPIOS 350
9 4
10#endif /* __ASM_ARCH_GPIO_H */ 5#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
index c0cd8006f1a2..258e5c919c24 100644
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ b/arch/arm/mach-ux500/include/mach/system.h
@@ -17,9 +17,4 @@ static inline void arch_idle(void)
17 cpu_do_idle(); 17 cpu_do_idle();
18} 18}
19 19
20static inline void arch_reset(char mode, const char *cmd)
21{
22 /* yet to be implemented - TODO */
23}
24
25#endif 20#endif
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h
deleted file mode 100644
index a4945cb41172..000000000000
--- a/arch/arm/mach-ux500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index e340a54251df..cbcda61162d3 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -141,11 +141,6 @@ static struct map_desc versatile_io_desc[] __initdata = {
141 }, 141 },
142#ifdef CONFIG_MACH_VERSATILE_AB 142#ifdef CONFIG_MACH_VERSATILE_AB
143 { 143 {
144 .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE),
145 .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE),
146 .length = SZ_4K,
147 .type = MT_DEVICE
148 }, {
149 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), 144 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
150 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), 145 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
151 .length = SZ_64M, 146 .length = SZ_64M,
@@ -745,6 +740,19 @@ static void versatile_leds_event(led_event_t ledevt)
745} 740}
746#endif /* CONFIG_LEDS */ 741#endif /* CONFIG_LEDS */
747 742
743void versatile_restart(char mode, const char *cmd)
744{
745 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
746 u32 val;
747
748 val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET);
749 val |= 0x105;
750
751 __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET);
752 __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET);
753 __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET);
754}
755
748/* Early initializations */ 756/* Early initializations */
749void __init versatile_init_early(void) 757void __init versatile_init_early(void)
750{ 758{
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index e01422700ebb..2ef2f555f315 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -30,6 +30,7 @@ extern void __init versatile_init_early(void);
30extern void __init versatile_init_irq(void); 30extern void __init versatile_init_irq(void);
31extern void __init versatile_map_io(void); 31extern void __init versatile_map_io(void);
32extern struct sys_timer versatile_timer; 32extern struct sys_timer versatile_timer;
33extern void versatile_restart(char, const char *);
33extern unsigned int mmc_status(struct device *dev); 34extern unsigned int mmc_status(struct device *dev);
34#ifdef CONFIG_OF 35#ifdef CONFIG_OF
35extern struct of_dev_auxdata versatile_auxdata_lookup[]; 36extern struct of_dev_auxdata versatile_auxdata_lookup[];
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c1663160..b6f0dbf122ee 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/platform.h>
12#include <asm/hardware/vic.h>
13 10
14 .macro disable_fiq 11 .macro disable_fiq
15 .endm 12 .endm
16 13
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
22 .endm 15 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 beq 1003f
29
301001: tst \irqstat, #15
31 bne 1002f
32 add \irqnr, \irqnr, #4
33 movs \irqstat, \irqstat, lsr #4
34 bne 1001b
351002: tst \irqstat, #1
36 bne 1003f
37 add \irqnr, \irqnr, #1
38 movs \irqstat, \irqstat, lsr #1
39 bne 1002b
401003: /* EQ will be set if no irqs pending */
41
42@ clz \irqnr, \irqstat
43@1003: /* EQ will be set if we reach MAXIRQNUM */
44 .endm
45
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
index 8ffc12a7cb25..f3fa347895f0 100644
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ b/arch/arm/mach-versatile/include/mach/system.h
@@ -21,10 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28static inline void arch_idle(void) 24static inline void arch_idle(void)
29{ 25{
30 /* 26 /*
@@ -34,16 +30,4 @@ static inline void arch_idle(void)
34 cpu_do_idle(); 30 cpu_do_idle();
35} 31}
36 32
37static inline void arch_reset(char mode, const char *cmd)
38{
39 u32 val;
40
41 val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
42 val |= 0x105;
43
44 __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
45 __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
46 __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
47}
48
49#endif 33#endif
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h
deleted file mode 100644
index 7d8e069ad51b..000000000000
--- a/arch/arm/mach-versatile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index fda4866703cd..63b8dd2b9f4d 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -27,6 +27,7 @@
27 27
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/hardware/vic.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31 32
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -39,6 +40,8 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
39 .map_io = versatile_map_io, 40 .map_io = versatile_map_io,
40 .init_early = versatile_init_early, 41 .init_early = versatile_init_early,
41 .init_irq = versatile_init_irq, 42 .init_irq = versatile_init_irq,
43 .handle_irq = vic_handle_irq,
42 .timer = &versatile_timer, 44 .timer = &versatile_timer,
43 .init_machine = versatile_init, 45 .init_machine = versatile_init,
46 .restart = versatile_restart,
44MACHINE_END 47MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 54e037c090f5..ae5ad3c8f3dd 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29 30
@@ -45,7 +46,9 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
45 .map_io = versatile_map_io, 46 .map_io = versatile_map_io,
46 .init_early = versatile_init_early, 47 .init_early = versatile_init_early,
47 .init_irq = versatile_init_irq, 48 .init_irq = versatile_init_irq,
49 .handle_irq = vic_handle_irq,
48 .timer = &versatile_timer, 50 .timer = &versatile_timer,
49 .init_machine = versatile_dt_init, 51 .init_machine = versatile_dt_init,
50 .dt_compat = versatile_dt_match, 52 .dt_compat = versatile_dt_match,
53 .restart = versatile_restart,
51MACHINE_END 54MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index feaf9cbe60f6..7aab79b665e7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <asm/hardware/vic.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33 34
@@ -107,6 +108,8 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
107 .map_io = versatile_map_io, 108 .map_io = versatile_map_io,
108 .init_early = versatile_init_early, 109 .init_early = versatile_init_early,
109 .init_irq = versatile_init_irq, 110 .init_irq = versatile_init_irq,
111 .handle_irq = vic_handle_irq,
110 .timer = &versatile_timer, 112 .timer = &versatile_timer,
111 .init_machine = versatile_pb_init, 113 .init_machine = versatile_pb_init,
114 .restart = versatile_restart,
112MACHINE_END 115MACHINE_END
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 931148487f0b..9b3d0fbaee72 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4
8 select ARM_ERRATA_720789 8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472 9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970 10 select ARM_ERRATA_753970
11 select HAVE_SMP
12 select MIGHT_HAVE_CACHE_L2X0
11 13
12endmenu 14endmenu
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
index 899a4e628a4c..f653a8e265bd 100644
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -30,8 +30,4 @@ static inline void arch_idle(void)
30 cpu_do_idle(); 30 cpu_do_idle();
31} 31}
32 32
33static inline void arch_reset(char mode, const char *cmd)
34{
35}
36
37#endif 33#endif
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
deleted file mode 100644
index f43a36ef678b..000000000000
--- a/arch/arm/mach-vexpress/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1fafc3244607..6dd10e320ef6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/arm_timer.h> 23#include <asm/hardware/arm_timer.h>
24#include <asm/hardware/timer-sp.h> 24#include <asm/hardware/timer-sp.h>
25#include <asm/hardware/sp810.h> 25#include <asm/hardware/sp810.h>
26#include <asm/hardware/gic.h>
26 27
27#include <mach/ct-ca9x4.h> 28#include <mach/ct-ca9x4.h>
28#include <mach/motherboard.h> 29#include <mach/motherboard.h>
@@ -437,7 +438,6 @@ static void __init v2m_init(void)
437 amba_device_register(v2m_amba_devs[i], &iomem_resource); 438 amba_device_register(v2m_amba_devs[i], &iomem_resource);
438 439
439 pm_power_off = v2m_power_off; 440 pm_power_off = v2m_power_off;
440 arm_pm_restart = v2m_restart;
441 441
442 ct_desc->init_tile(); 442 ct_desc->init_tile();
443} 443}
@@ -448,5 +448,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
448 .init_early = v2m_init_early, 448 .init_early = v2m_init_early,
449 .init_irq = v2m_init_irq, 449 .init_irq = v2m_init_irq,
450 .timer = &v2m_timer, 450 .timer = &v2m_timer,
451 .handle_irq = gic_handle_irq,
451 .init_machine = v2m_init, 452 .init_machine = v2m_init,
453 .restart = v2m_restart,
452MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h
deleted file mode 100644
index 4642290ce416..000000000000
--- a/arch/arm/mach-vt8500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 0a235e502330..604e1db266e8 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -33,9 +33,11 @@
33#include <mach/regs-serial.h> 33#include <mach/regs-serial.h>
34#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
35#include <mach/regs-ebi.h> 35#include <mach/regs-ebi.h>
36#include <mach/regs-timer.h>
36 37
37#include "cpu.h" 38#include "cpu.h"
38#include "clock.h" 39#include "clock.h"
40#include "nuc9xx.h"
39 41
40/* Initial IO mappings */ 42/* Initial IO mappings */
41 43
@@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void)
222 clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs)); 224 clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
223} 225}
224 226
227#define WTCR (TMR_BA + 0x1C)
228#define WTCLK (1 << 10)
229#define WTE (1 << 7)
230#define WTRE (1 << 1)
231
232void nuc9xx_restart(char mode, const char *cmd)
233{
234 if (mode == 's') {
235 /* Jump into ROM at address 0 */
236 soft_restart(0);
237 } else {
238 __raw_writel(WTE | WTRE | WTCLK, WTCR);
239 }
240}
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index ce228bdc66dd..2aaeb9311619 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -14,28 +14,6 @@
14 * (at your option) any later version. 14 * (at your option) any later version.
15 * 15 *
16 */ 16 */
17
18#include <linux/io.h>
19#include <asm/proc-fns.h>
20#include <mach/map.h>
21#include <mach/regs-timer.h>
22
23#define WTCR (TMR_BA + 0x1C)
24#define WTCLK (1 << 10)
25#define WTE (1 << 7)
26#define WTRE (1 << 1)
27
28static void arch_idle(void) 17static void arch_idle(void)
29{ 18{
30} 19}
31
32static void arch_reset(char mode, const char *cmd)
33{
34 if (mode == 's') {
35 /* Jump into ROM at address 0 */
36 cpu_reset(0);
37 } else {
38 __raw_writel(WTE | WTRE | WTCLK, WTCR);
39 }
40}
41
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
deleted file mode 100644
index b067e44500a4..000000000000
--- a/arch/arm/mach-w90x900/include/mach/vmalloc.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_VMALLOC_H
19#define __ASM_ARCH_VMALLOC_H
20
21#define VMALLOC_END (0xe0000000UL)
22
23#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 7bf143c443f1..b466e2450ba3 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -28,6 +28,8 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/regs-irq.h> 29#include <mach/regs-irq.h>
30 30
31#include "nuc9xx.h"
32
31struct group_irq { 33struct group_irq {
32 unsigned long gpen; 34 unsigned long gpen;
33 unsigned int enabled; 35 unsigned int enabled;
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c
index 31c109018228..b4243e4f1565 100644
--- a/arch/arm/mach-w90x900/mach-nuc910evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc910evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB")
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc910evb_init, 39 .init_machine = nuc910evb_init,
40 .timer = &nuc900_timer, 40 .timer = &nuc900_timer,
41 .restart = nuc9xx_restart,
41MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index 4062e55a57d8..067d8f9166dc 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB")
41 .init_irq = nuc900_init_irq, 41 .init_irq = nuc900_init_irq,
42 .init_machine = nuc950evb_init, 42 .init_machine = nuc950evb_init,
43 .timer = &nuc900_timer, 43 .timer = &nuc900_timer,
44 .restart = nuc9xx_restart,
44MACHINE_END 45MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c
index 0ab9995d5b58..cbb3adc3db10 100644
--- a/arch/arm/mach-w90x900/mach-nuc960evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc960evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB")
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc960evb_init, 39 .init_machine = nuc960evb_init,
40 .timer = &nuc900_timer, 40 .timer = &nuc900_timer,
41 .restart = nuc9xx_restart,
41MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/nuc910.h b/arch/arm/mach-w90x900/nuc910.h
index 83e9ba5fc26c..b14c71a9e683 100644
--- a/arch/arm/mach-w90x900/nuc910.h
+++ b/arch/arm/mach-w90x900/nuc910.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc910.c */ 17/* extern file from nuc910.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc950.h b/arch/arm/mach-w90x900/nuc950.h
index 98a1148bc5ae..6e9de3051cd4 100644
--- a/arch/arm/mach-w90x900/nuc950.h
+++ b/arch/arm/mach-w90x900/nuc950.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc950.c */ 17/* extern file from nuc950.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc960.h b/arch/arm/mach-w90x900/nuc960.h
index f0c07cbe3a82..9f6df9a00286 100644
--- a/arch/arm/mach-w90x900/nuc960.h
+++ b/arch/arm/mach-w90x900/nuc960.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc960.c */ 17/* extern file from nuc960.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
new file mode 100644
index 000000000000..91acb4047793
--- /dev/null
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/mach-w90x900/nuc9xx.h
3 *
4 * Copied from nuc910.h, which had:
5 *
6 * Copyright (c) 2008 Nuvoton corporation
7 *
8 * Header file for NUC900 CPU support
9 *
10 * Wan ZongShun <mcuos.com@gmail.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17struct map_desc;
18struct sys_timer;
19
20/* core initialisation functions */
21
22extern void nuc900_init_irq(void);
23extern struct sys_timer nuc900_timer;
24extern void nuc9xx_restart(char, const char *);
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index a2c4e2d0a0d4..fa27c498ac09 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -33,6 +33,8 @@
33#include <mach/map.h> 33#include <mach/map.h>
34#include <mach/regs-timer.h> 34#include <mach/regs-timer.h>
35 35
36#include "nuc9xx.h"
37
36#define RESETINT 0x1f 38#define RESETINT 0x1f
37#define PERIOD (0x01 << 27) 39#define PERIOD (0x01 << 27)
38#define ONESHOT (0x00 << 27) 40#define ONESHOT (0x00 << 27)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e93687b81a..ab5cfddc0d7b 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
113 .map_io = xilinx_map_io, 113 .map_io = xilinx_map_io,
114 .init_irq = xilinx_irq_init, 114 .init_irq = xilinx_irq_init,
115 .handle_irq = gic_handle_irq,
115 .init_machine = xilinx_init_machine, 116 .init_machine = xilinx_init_machine,
116 .timer = &xttcpss_sys_timer, 117 .timer = &xttcpss_sys_timer,
117 .dt_compat = xilinx_dt_match, 118 .dt_compat = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b37461..d621fb732569 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 */ 21 */
22 22
23#include <mach/hardware.h>
24#include <asm/hardware/entry-macro-gic.S>
25
26 .macro disable_fiq 23 .macro disable_fiq
27 .endm 24 .endm
28 25
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
index 1b84d705c675..8e88e0b8d2ba 100644
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ b/arch/arm/mach-zynq/include/mach/system.h
@@ -20,9 +20,4 @@ static inline void arch_idle(void)
20 cpu_do_idle(); 20 cpu_do_idle();
21} 21}
22 22
23static inline void arch_reset(char mode, const char *cmd)
24{
25 /* Add architecture specific reset processing here */
26}
27
28#endif 23#endif
diff --git a/arch/arm/mach-zynq/include/mach/vmalloc.h b/arch/arm/mach-zynq/include/mach/vmalloc.h
deleted file mode 100644
index 2398eff1e8b8..000000000000
--- a/arch/arm/mach-zynq/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_VMALLOC_H__
16#define __MACH_VMALLOC_H__
17
18#define VMALLOC_END 0xE0000000UL
19
20#endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 67f75a0b66d6..4cefb57d9ed2 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -629,6 +629,23 @@ config IO_36
629 629
630comment "Processor Features" 630comment "Processor Features"
631 631
632config ARM_LPAE
633 bool "Support for the Large Physical Address Extension"
634 depends on MMU && CPU_V7
635 help
636 Say Y if you have an ARMv7 processor supporting the LPAE page
637 table format and you would like to access memory beyond the
638 4GB limit. The resulting kernel image will not run on
639 processors without the LPA extension.
640
641 If unsure, say N.
642
643config ARCH_PHYS_ADDR_T_64BIT
644 def_bool ARM_LPAE
645
646config ARCH_DMA_ADDR_T_64BIT
647 bool
648
632config ARM_THUMB 649config ARM_THUMB
633 bool "Support Thumb user binaries" 650 bool "Support Thumb user binaries"
634 depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON 651 depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON
@@ -816,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
816 Say Y here to use the Feroceon L2 cache in writethrough mode. 833 Say Y here to use the Feroceon L2 cache in writethrough mode.
817 Unless you specifically require this, say N for writeback mode. 834 Unless you specifically require this, say N for writeback mode.
818 835
836config MIGHT_HAVE_CACHE_L2X0
837 bool
838 help
839 This option should be selected by machines which have a L2x0
840 or PL310 cache controller, but where its use is optional.
841
842 The only effect of this option is to make CACHE_L2X0 and
843 related options available to the user for configuration.
844
845 Boards or SoCs which always require the cache controller
846 support to be present should select CACHE_L2X0 directly
847 instead of this option, thus preventing the user from
848 inadvertently configuring a broken kernel.
849
819config CACHE_L2X0 850config CACHE_L2X0
820 bool "Enable the L2x0 outer cache controller" 851 bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
821 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ 852 default MIGHT_HAVE_CACHE_L2X0
822 REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
823 ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
824 ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
825 ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
826 default y
827 select OUTER_CACHE 853 select OUTER_CACHE
828 select OUTER_CACHE_SYNC 854 select OUTER_CACHE_SYNC
829 help 855 help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index c335c76e0d88..caf14dc059e5 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -968,7 +968,7 @@ static int __init alignment_init(void)
968 ai_usermode = safe_usermode(ai_usermode, false); 968 ai_usermode = safe_usermode(ai_usermode, false);
969 } 969 }
970 970
971 hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN, 971 hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
972 "alignment exception"); 972 "alignment exception");
973 973
974 /* 974 /*
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 93aac068da94..ee9bb363d606 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -22,6 +22,21 @@ unsigned int cpu_last_asid = ASID_FIRST_VERSION;
22DEFINE_PER_CPU(struct mm_struct *, current_mm); 22DEFINE_PER_CPU(struct mm_struct *, current_mm);
23#endif 23#endif
24 24
25#ifdef CONFIG_ARM_LPAE
26#define cpu_set_asid(asid) { \
27 unsigned long ttbl, ttbh; \
28 asm volatile( \
29 " mrrc p15, 0, %0, %1, c2 @ read TTBR0\n" \
30 " mov %1, %2, lsl #(48 - 32) @ set ASID\n" \
31 " mcrr p15, 0, %0, %1, c2 @ set TTBR0\n" \
32 : "=&r" (ttbl), "=&r" (ttbh) \
33 : "r" (asid & ~ASID_MASK)); \
34}
35#else
36#define cpu_set_asid(asid) \
37 asm(" mcr p15, 0, %0, c13, c0, 1\n" : : "r" (asid))
38#endif
39
25/* 40/*
26 * We fork()ed a process, and we need a new context for the child 41 * We fork()ed a process, and we need a new context for the child
27 * to run in. We reserve version 0 for initial tasks so we will 42 * to run in. We reserve version 0 for initial tasks so we will
@@ -37,7 +52,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
37static void flush_context(void) 52static void flush_context(void)
38{ 53{
39 /* set the reserved ASID before flushing the TLB */ 54 /* set the reserved ASID before flushing the TLB */
40 asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (0)); 55 cpu_set_asid(0);
41 isb(); 56 isb();
42 local_flush_tlb_all(); 57 local_flush_tlb_all();
43 if (icache_is_vivt_asid_tagged()) { 58 if (icache_is_vivt_asid_tagged()) {
@@ -99,7 +114,7 @@ static void reset_context(void *info)
99 set_mm_context(mm, asid); 114 set_mm_context(mm, asid);
100 115
101 /* set the new ASID */ 116 /* set the new ASID */
102 asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (mm->context.id)); 117 cpu_set_asid(mm->context.id);
103 isb(); 118 isb();
104} 119}
105 120
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index aa33949fef60..bb7eac381a8e 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -27,19 +27,6 @@
27 27
28#include "fault.h" 28#include "fault.h"
29 29
30/*
31 * Fault status register encodings. We steal bit 31 for our own purposes.
32 */
33#define FSR_LNX_PF (1 << 31)
34#define FSR_WRITE (1 << 11)
35#define FSR_FS4 (1 << 10)
36#define FSR_FS3_0 (15)
37
38static inline int fsr_fs(unsigned int fsr)
39{
40 return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
41}
42
43#ifdef CONFIG_MMU 30#ifdef CONFIG_MMU
44 31
45#ifdef CONFIG_KPROBES 32#ifdef CONFIG_KPROBES
@@ -123,8 +110,10 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
123 110
124 pte = pte_offset_map(pmd, addr); 111 pte = pte_offset_map(pmd, addr);
125 printk(", *pte=%08llx", (long long)pte_val(*pte)); 112 printk(", *pte=%08llx", (long long)pte_val(*pte));
113#ifndef CONFIG_ARM_LPAE
126 printk(", *ppte=%08llx", 114 printk(", *ppte=%08llx",
127 (long long)pte_val(pte[PTE_HWTABLE_PTRS])); 115 (long long)pte_val(pte[PTE_HWTABLE_PTRS]));
116#endif
128 pte_unmap(pte); 117 pte_unmap(pte);
129 } while(0); 118 } while(0);
130 119
@@ -231,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
231 220
232static int __kprobes 221static int __kprobes
233__do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr, 222__do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
234 struct task_struct *tsk) 223 unsigned int flags, struct task_struct *tsk)
235{ 224{
236 struct vm_area_struct *vma; 225 struct vm_area_struct *vma;
237 int fault; 226 int fault;
@@ -253,18 +242,7 @@ good_area:
253 goto out; 242 goto out;
254 } 243 }
255 244
256 /* 245 return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
257 * If for any reason at all we couldn't handle the fault, make
258 * sure we exit gracefully rather than endlessly redo the fault.
259 */
260 fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);
261 if (unlikely(fault & VM_FAULT_ERROR))
262 return fault;
263 if (fault & VM_FAULT_MAJOR)
264 tsk->maj_flt++;
265 else
266 tsk->min_flt++;
267 return fault;
268 246
269check_stack: 247check_stack:
270 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) 248 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
@@ -279,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
279 struct task_struct *tsk; 257 struct task_struct *tsk;
280 struct mm_struct *mm; 258 struct mm_struct *mm;
281 int fault, sig, code; 259 int fault, sig, code;
260 int write = fsr & FSR_WRITE;
261 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
262 (write ? FAULT_FLAG_WRITE : 0);
282 263
283 if (notify_page_fault(regs, fsr)) 264 if (notify_page_fault(regs, fsr))
284 return 0; 265 return 0;
@@ -305,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
305 if (!down_read_trylock(&mm->mmap_sem)) { 286 if (!down_read_trylock(&mm->mmap_sem)) {
306 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc)) 287 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))
307 goto no_context; 288 goto no_context;
289retry:
308 down_read(&mm->mmap_sem); 290 down_read(&mm->mmap_sem);
309 } else { 291 } else {
310 /* 292 /*
@@ -320,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
320#endif 302#endif
321 } 303 }
322 304
323 fault = __do_page_fault(mm, addr, fsr, tsk); 305 fault = __do_page_fault(mm, addr, fsr, flags, tsk);
324 up_read(&mm->mmap_sem); 306
307 /* If we need to retry but a fatal signal is pending, handle the
308 * signal first. We do not need to release the mmap_sem because
309 * it would already be released in __lock_page_or_retry in
310 * mm/filemap.c. */
311 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
312 return 0;
313
314 /*
315 * Major/minor page fault accounting is only done on the
316 * initial attempt. If we go through a retry, it is extremely
317 * likely that the page will be found in page cache at that point.
318 */
325 319
326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 320 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
327 if (fault & VM_FAULT_MAJOR) 321 if (flags & FAULT_FLAG_ALLOW_RETRY) {
328 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr); 322 if (fault & VM_FAULT_MAJOR) {
329 else if (fault & VM_FAULT_MINOR) 323 tsk->maj_flt++;
330 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr); 324 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
325 regs, addr);
326 } else {
327 tsk->min_flt++;
328 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
329 regs, addr);
330 }
331 if (fault & VM_FAULT_RETRY) {
332 /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
333 * of starvation. */
334 flags &= ~FAULT_FLAG_ALLOW_RETRY;
335 goto retry;
336 }
337 }
338
339 up_read(&mm->mmap_sem);
331 340
332 /* 341 /*
333 * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR 342 * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR
@@ -441,6 +450,12 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
441 pmd = pmd_offset(pud, addr); 450 pmd = pmd_offset(pud, addr);
442 pmd_k = pmd_offset(pud_k, addr); 451 pmd_k = pmd_offset(pud_k, addr);
443 452
453#ifdef CONFIG_ARM_LPAE
454 /*
455 * Only one hardware entry per PMD with LPAE.
456 */
457 index = 0;
458#else
444 /* 459 /*
445 * On ARM one Linux PGD entry contains two hardware entries (see page 460 * On ARM one Linux PGD entry contains two hardware entries (see page
446 * tables layout in pgtable.h). We normally guarantee that we always 461 * tables layout in pgtable.h). We normally guarantee that we always
@@ -450,6 +465,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
450 * for the first of pair. 465 * for the first of pair.
451 */ 466 */
452 index = (addr >> SECTION_SHIFT) & 1; 467 index = (addr >> SECTION_SHIFT) & 1;
468#endif
453 if (pmd_none(pmd_k[index])) 469 if (pmd_none(pmd_k[index]))
454 goto bad_area; 470 goto bad_area;
455 471
@@ -489,55 +505,20 @@ do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
489 return 1; 505 return 1;
490} 506}
491 507
492static struct fsr_info { 508struct fsr_info {
493 int (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs); 509 int (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
494 int sig; 510 int sig;
495 int code; 511 int code;
496 const char *name; 512 const char *name;
497} fsr_info[] = {
498 /*
499 * The following are the standard ARMv3 and ARMv4 aborts. ARMv5
500 * defines these to be "precise" aborts.
501 */
502 { do_bad, SIGSEGV, 0, "vector exception" },
503 { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" },
504 { do_bad, SIGKILL, 0, "terminal exception" },
505 { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" },
506 { do_bad, SIGBUS, 0, "external abort on linefetch" },
507 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
508 { do_bad, SIGBUS, 0, "external abort on linefetch" },
509 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
510 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
511 { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
512 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
513 { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" },
514 { do_bad, SIGBUS, 0, "external abort on translation" },
515 { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
516 { do_bad, SIGBUS, 0, "external abort on translation" },
517 { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
518 /*
519 * The following are "imprecise" aborts, which are signalled by bit
520 * 10 of the FSR, and may not be recoverable. These are only
521 * supported if the CPU abort handler supports bit 10.
522 */
523 { do_bad, SIGBUS, 0, "unknown 16" },
524 { do_bad, SIGBUS, 0, "unknown 17" },
525 { do_bad, SIGBUS, 0, "unknown 18" },
526 { do_bad, SIGBUS, 0, "unknown 19" },
527 { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */
528 { do_bad, SIGBUS, 0, "unknown 21" },
529 { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */
530 { do_bad, SIGBUS, 0, "unknown 23" },
531 { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */
532 { do_bad, SIGBUS, 0, "unknown 25" },
533 { do_bad, SIGBUS, 0, "unknown 26" },
534 { do_bad, SIGBUS, 0, "unknown 27" },
535 { do_bad, SIGBUS, 0, "unknown 28" },
536 { do_bad, SIGBUS, 0, "unknown 29" },
537 { do_bad, SIGBUS, 0, "unknown 30" },
538 { do_bad, SIGBUS, 0, "unknown 31" }
539}; 513};
540 514
515/* FSR definition */
516#ifdef CONFIG_ARM_LPAE
517#include "fsr-3level.c"
518#else
519#include "fsr-2level.c"
520#endif
521
541void __init 522void __init
542hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), 523hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
543 int sig, int code, const char *name) 524 int sig, int code, const char *name)
@@ -573,42 +554,6 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
573 arm_notify_die("", regs, &info, fsr, 0); 554 arm_notify_die("", regs, &info, fsr, 0);
574} 555}
575 556
576
577static struct fsr_info ifsr_info[] = {
578 { do_bad, SIGBUS, 0, "unknown 0" },
579 { do_bad, SIGBUS, 0, "unknown 1" },
580 { do_bad, SIGBUS, 0, "debug event" },
581 { do_bad, SIGSEGV, SEGV_ACCERR, "section access flag fault" },
582 { do_bad, SIGBUS, 0, "unknown 4" },
583 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
584 { do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" },
585 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
586 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
587 { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
588 { do_bad, SIGBUS, 0, "unknown 10" },
589 { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" },
590 { do_bad, SIGBUS, 0, "external abort on translation" },
591 { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
592 { do_bad, SIGBUS, 0, "external abort on translation" },
593 { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
594 { do_bad, SIGBUS, 0, "unknown 16" },
595 { do_bad, SIGBUS, 0, "unknown 17" },
596 { do_bad, SIGBUS, 0, "unknown 18" },
597 { do_bad, SIGBUS, 0, "unknown 19" },
598 { do_bad, SIGBUS, 0, "unknown 20" },
599 { do_bad, SIGBUS, 0, "unknown 21" },
600 { do_bad, SIGBUS, 0, "unknown 22" },
601 { do_bad, SIGBUS, 0, "unknown 23" },
602 { do_bad, SIGBUS, 0, "unknown 24" },
603 { do_bad, SIGBUS, 0, "unknown 25" },
604 { do_bad, SIGBUS, 0, "unknown 26" },
605 { do_bad, SIGBUS, 0, "unknown 27" },
606 { do_bad, SIGBUS, 0, "unknown 28" },
607 { do_bad, SIGBUS, 0, "unknown 29" },
608 { do_bad, SIGBUS, 0, "unknown 30" },
609 { do_bad, SIGBUS, 0, "unknown 31" },
610};
611
612void __init 557void __init
613hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), 558hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
614 int sig, int code, const char *name) 559 int sig, int code, const char *name)
@@ -641,6 +586,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
641 arm_notify_die("", regs, &info, ifsr, 0); 586 arm_notify_die("", regs, &info, ifsr, 0);
642} 587}
643 588
589#ifndef CONFIG_ARM_LPAE
644static int __init exceptions_init(void) 590static int __init exceptions_init(void)
645{ 591{
646 if (cpu_architecture() >= CPU_ARCH_ARMv6) { 592 if (cpu_architecture() >= CPU_ARCH_ARMv6) {
@@ -663,3 +609,4 @@ static int __init exceptions_init(void)
663} 609}
664 610
665arch_initcall(exceptions_init); 611arch_initcall(exceptions_init);
612#endif
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 49e9e3804de4..cf08bdfbe0d6 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -1,3 +1,28 @@
1void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs); 1#ifndef __ARCH_ARM_FAULT_H
2#define __ARCH_ARM_FAULT_H
3
4/*
5 * Fault status register encodings. We steal bit 31 for our own purposes.
6 */
7#define FSR_LNX_PF (1 << 31)
8#define FSR_WRITE (1 << 11)
9#define FSR_FS4 (1 << 10)
10#define FSR_FS3_0 (15)
11#define FSR_FS5_0 (0x3f)
12
13#ifdef CONFIG_ARM_LPAE
14static inline int fsr_fs(unsigned int fsr)
15{
16 return fsr & FSR_FS5_0;
17}
18#else
19static inline int fsr_fs(unsigned int fsr)
20{
21 return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
22}
23#endif
2 24
25void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
3unsigned long search_exception_table(unsigned long addr); 26unsigned long search_exception_table(unsigned long addr);
27
28#endif /* __ARCH_ARM_FAULT_H */
diff --git a/arch/arm/mm/fsr-2level.c b/arch/arm/mm/fsr-2level.c
new file mode 100644
index 000000000000..18ca74c0f341
--- /dev/null
+++ b/arch/arm/mm/fsr-2level.c
@@ -0,0 +1,78 @@
1static struct fsr_info fsr_info[] = {
2 /*
3 * The following are the standard ARMv3 and ARMv4 aborts. ARMv5
4 * defines these to be "precise" aborts.
5 */
6 { do_bad, SIGSEGV, 0, "vector exception" },
7 { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" },
8 { do_bad, SIGKILL, 0, "terminal exception" },
9 { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" },
10 { do_bad, SIGBUS, 0, "external abort on linefetch" },
11 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
12 { do_bad, SIGBUS, 0, "external abort on linefetch" },
13 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
14 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
15 { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
16 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
17 { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" },
18 { do_bad, SIGBUS, 0, "external abort on translation" },
19 { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
20 { do_bad, SIGBUS, 0, "external abort on translation" },
21 { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
22 /*
23 * The following are "imprecise" aborts, which are signalled by bit
24 * 10 of the FSR, and may not be recoverable. These are only
25 * supported if the CPU abort handler supports bit 10.
26 */
27 { do_bad, SIGBUS, 0, "unknown 16" },
28 { do_bad, SIGBUS, 0, "unknown 17" },
29 { do_bad, SIGBUS, 0, "unknown 18" },
30 { do_bad, SIGBUS, 0, "unknown 19" },
31 { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */
32 { do_bad, SIGBUS, 0, "unknown 21" },
33 { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */
34 { do_bad, SIGBUS, 0, "unknown 23" },
35 { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */
36 { do_bad, SIGBUS, 0, "unknown 25" },
37 { do_bad, SIGBUS, 0, "unknown 26" },
38 { do_bad, SIGBUS, 0, "unknown 27" },
39 { do_bad, SIGBUS, 0, "unknown 28" },
40 { do_bad, SIGBUS, 0, "unknown 29" },
41 { do_bad, SIGBUS, 0, "unknown 30" },
42 { do_bad, SIGBUS, 0, "unknown 31" },
43};
44
45static struct fsr_info ifsr_info[] = {
46 { do_bad, SIGBUS, 0, "unknown 0" },
47 { do_bad, SIGBUS, 0, "unknown 1" },
48 { do_bad, SIGBUS, 0, "debug event" },
49 { do_bad, SIGSEGV, SEGV_ACCERR, "section access flag fault" },
50 { do_bad, SIGBUS, 0, "unknown 4" },
51 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
52 { do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" },
53 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
54 { do_bad, SIGBUS, 0, "external abort on non-linefetch" },
55 { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
56 { do_bad, SIGBUS, 0, "unknown 10" },
57 { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" },
58 { do_bad, SIGBUS, 0, "external abort on translation" },
59 { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
60 { do_bad, SIGBUS, 0, "external abort on translation" },
61 { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
62 { do_bad, SIGBUS, 0, "unknown 16" },
63 { do_bad, SIGBUS, 0, "unknown 17" },
64 { do_bad, SIGBUS, 0, "unknown 18" },
65 { do_bad, SIGBUS, 0, "unknown 19" },
66 { do_bad, SIGBUS, 0, "unknown 20" },
67 { do_bad, SIGBUS, 0, "unknown 21" },
68 { do_bad, SIGBUS, 0, "unknown 22" },
69 { do_bad, SIGBUS, 0, "unknown 23" },
70 { do_bad, SIGBUS, 0, "unknown 24" },
71 { do_bad, SIGBUS, 0, "unknown 25" },
72 { do_bad, SIGBUS, 0, "unknown 26" },
73 { do_bad, SIGBUS, 0, "unknown 27" },
74 { do_bad, SIGBUS, 0, "unknown 28" },
75 { do_bad, SIGBUS, 0, "unknown 29" },
76 { do_bad, SIGBUS, 0, "unknown 30" },
77 { do_bad, SIGBUS, 0, "unknown 31" },
78};
diff --git a/arch/arm/mm/fsr-3level.c b/arch/arm/mm/fsr-3level.c
new file mode 100644
index 000000000000..05a4e9431836
--- /dev/null
+++ b/arch/arm/mm/fsr-3level.c
@@ -0,0 +1,68 @@
1static struct fsr_info fsr_info[] = {
2 { do_bad, SIGBUS, 0, "unknown 0" },
3 { do_bad, SIGBUS, 0, "unknown 1" },
4 { do_bad, SIGBUS, 0, "unknown 2" },
5 { do_bad, SIGBUS, 0, "unknown 3" },
6 { do_bad, SIGBUS, 0, "reserved translation fault" },
7 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
8 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
9 { do_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
10 { do_bad, SIGBUS, 0, "reserved access flag fault" },
11 { do_bad, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
12 { do_bad, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
13 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
14 { do_bad, SIGBUS, 0, "reserved permission fault" },
15 { do_bad, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
16 { do_sect_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
17 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
18 { do_bad, SIGBUS, 0, "synchronous external abort" },
19 { do_bad, SIGBUS, 0, "asynchronous external abort" },
20 { do_bad, SIGBUS, 0, "unknown 18" },
21 { do_bad, SIGBUS, 0, "unknown 19" },
22 { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
23 { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
24 { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
25 { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
26 { do_bad, SIGBUS, 0, "synchronous parity error" },
27 { do_bad, SIGBUS, 0, "asynchronous parity error" },
28 { do_bad, SIGBUS, 0, "unknown 26" },
29 { do_bad, SIGBUS, 0, "unknown 27" },
30 { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
31 { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
32 { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
33 { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
34 { do_bad, SIGBUS, 0, "unknown 32" },
35 { do_bad, SIGBUS, BUS_ADRALN, "alignment fault" },
36 { do_bad, SIGBUS, 0, "debug event" },
37 { do_bad, SIGBUS, 0, "unknown 35" },
38 { do_bad, SIGBUS, 0, "unknown 36" },
39 { do_bad, SIGBUS, 0, "unknown 37" },
40 { do_bad, SIGBUS, 0, "unknown 38" },
41 { do_bad, SIGBUS, 0, "unknown 39" },
42 { do_bad, SIGBUS, 0, "unknown 40" },
43 { do_bad, SIGBUS, 0, "unknown 41" },
44 { do_bad, SIGBUS, 0, "unknown 42" },
45 { do_bad, SIGBUS, 0, "unknown 43" },
46 { do_bad, SIGBUS, 0, "unknown 44" },
47 { do_bad, SIGBUS, 0, "unknown 45" },
48 { do_bad, SIGBUS, 0, "unknown 46" },
49 { do_bad, SIGBUS, 0, "unknown 47" },
50 { do_bad, SIGBUS, 0, "unknown 48" },
51 { do_bad, SIGBUS, 0, "unknown 49" },
52 { do_bad, SIGBUS, 0, "unknown 50" },
53 { do_bad, SIGBUS, 0, "unknown 51" },
54 { do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" },
55 { do_bad, SIGBUS, 0, "unknown 53" },
56 { do_bad, SIGBUS, 0, "unknown 54" },
57 { do_bad, SIGBUS, 0, "unknown 55" },
58 { do_bad, SIGBUS, 0, "unknown 56" },
59 { do_bad, SIGBUS, 0, "unknown 57" },
60 { do_bad, SIGBUS, 0, "implementation fault (coprocessor abort)" },
61 { do_bad, SIGBUS, 0, "unknown 59" },
62 { do_bad, SIGBUS, 0, "unknown 60" },
63 { do_bad, SIGBUS, 0, "unknown 61" },
64 { do_bad, SIGBUS, 0, "unknown 62" },
65 { do_bad, SIGBUS, 0, "unknown 63" },
66};
67
68#define ifsr_info fsr_info
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2be9139a4ef3..feacf4c76712 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -1,9 +1,38 @@
1#include <linux/kernel.h> 1#include <linux/kernel.h>
2 2
3#include <asm/cputype.h> 3#include <asm/cputype.h>
4#include <asm/idmap.h>
4#include <asm/pgalloc.h> 5#include <asm/pgalloc.h>
5#include <asm/pgtable.h> 6#include <asm/pgtable.h>
7#include <asm/sections.h>
6 8
9pgd_t *idmap_pgd;
10
11#ifdef CONFIG_ARM_LPAE
12static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
13 unsigned long prot)
14{
15 pmd_t *pmd;
16 unsigned long next;
17
18 if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
19 pmd = pmd_alloc_one(&init_mm, addr);
20 if (!pmd) {
21 pr_warning("Failed to allocate identity pmd.\n");
22 return;
23 }
24 pud_populate(&init_mm, pud, pmd);
25 pmd += pmd_index(addr);
26 } else
27 pmd = pmd_offset(pud, addr);
28
29 do {
30 next = pmd_addr_end(addr, end);
31 *pmd = __pmd((addr & PMD_MASK) | prot);
32 flush_pmd_entry(pmd);
33 } while (pmd++, addr = next, addr != end);
34}
35#else /* !CONFIG_ARM_LPAE */
7static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, 36static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
8 unsigned long prot) 37 unsigned long prot)
9{ 38{
@@ -15,6 +44,7 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
15 pmd[1] = __pmd(addr); 44 pmd[1] = __pmd(addr);
16 flush_pmd_entry(pmd); 45 flush_pmd_entry(pmd);
17} 46}
47#endif /* CONFIG_ARM_LPAE */
18 48
19static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 49static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
20 unsigned long prot) 50 unsigned long prot)
@@ -28,11 +58,11 @@ static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
28 } while (pud++, addr = next, addr != end); 58 } while (pud++, addr = next, addr != end);
29} 59}
30 60
31void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) 61static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
32{ 62{
33 unsigned long prot, next; 63 unsigned long prot, next;
34 64
35 prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE; 65 prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
36 if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) 66 if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
37 prot |= PMD_BIT4; 67 prot |= PMD_BIT4;
38 68
@@ -43,48 +73,41 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
43 } while (pgd++, addr = next, addr != end); 73 } while (pgd++, addr = next, addr != end);
44} 74}
45 75
46#ifdef CONFIG_SMP 76extern char __idmap_text_start[], __idmap_text_end[];
47static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end)
48{
49 pmd_t *pmd = pmd_offset(pud, addr);
50 pmd_clear(pmd);
51}
52 77
53static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end) 78static int __init init_static_idmap(void)
54{ 79{
55 pud_t *pud = pud_offset(pgd, addr); 80 phys_addr_t idmap_start, idmap_end;
56 unsigned long next;
57 81
58 do { 82 idmap_pgd = pgd_alloc(&init_mm);
59 next = pud_addr_end(addr, end); 83 if (!idmap_pgd)
60 idmap_del_pmd(pud, addr, next); 84 return -ENOMEM;
61 } while (pud++, addr = next, addr != end);
62}
63 85
64void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) 86 /* Add an identity mapping for the physical address of the section. */
65{ 87 idmap_start = virt_to_phys((void *)__idmap_text_start);
66 unsigned long next; 88 idmap_end = virt_to_phys((void *)__idmap_text_end);
67 89
68 pgd += pgd_index(addr); 90 pr_info("Setting up static identity map for 0x%llx - 0x%llx\n",
69 do { 91 (long long)idmap_start, (long long)idmap_end);
70 next = pgd_addr_end(addr, end); 92 identity_mapping_add(idmap_pgd, idmap_start, idmap_end);
71 idmap_del_pud(pgd, addr, next); 93
72 } while (pgd++, addr = next, addr != end); 94 return 0;
73} 95}
74#endif 96early_initcall(init_static_idmap);
75 97
76/* 98/*
77 * In order to soft-boot, we need to insert a 1:1 mapping in place of 99 * In order to soft-boot, we need to switch to a 1:1 mapping for the
78 * the user-mode pages. This will then ensure that we have predictable 100 * cpu_reset functions. This will then ensure that we have predictable
79 * results when turning the mmu off 101 * results when turning off the mmu.
80 */ 102 */
81void setup_mm_for_reboot(char mode) 103void setup_mm_for_reboot(void)
82{ 104{
83 /* 105 /* Clean and invalidate L1. */
84 * We need to access to user-mode page tables here. For kernel threads 106 flush_cache_all();
85 * we don't have any user-mode mappings so we use the context that we 107
86 * "borrowed". 108 /* Switch to the identity mapping. */
87 */ 109 cpu_switch_mm(idmap_pgd, &init_mm);
88 identity_mapping_add(current->active_mm->pgd, 0, TASK_SIZE); 110
111 /* Flush the TLB. */
89 local_flush_tlb_all(); 112 local_flush_tlb_all();
90} 113}
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fbdd12ea3a58..786adddf1a86 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,7 +20,6 @@
20#include <linux/highmem.h> 20#include <linux/highmem.h>
21#include <linux/gfp.h> 21#include <linux/gfp.h>
22#include <linux/memblock.h> 22#include <linux/memblock.h>
23#include <linux/sort.h>
24 23
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/prom.h> 25#include <asm/prom.h>
@@ -134,30 +133,18 @@ void show_mem(unsigned int filter)
134} 133}
135 134
136static void __init find_limits(unsigned long *min, unsigned long *max_low, 135static void __init find_limits(unsigned long *min, unsigned long *max_low,
137 unsigned long *max_high) 136 unsigned long *max_high)
138{ 137{
139 struct meminfo *mi = &meminfo; 138 struct meminfo *mi = &meminfo;
140 int i; 139 int i;
141 140
142 *min = -1UL; 141 /* This assumes the meminfo array is properly sorted */
143 *max_low = *max_high = 0; 142 *min = bank_pfn_start(&mi->bank[0]);
144 143 for_each_bank (i, mi)
145 for_each_bank (i, mi) { 144 if (mi->bank[i].highmem)
146 struct membank *bank = &mi->bank[i]; 145 break;
147 unsigned long start, end; 146 *max_low = bank_pfn_end(&mi->bank[i - 1]);
148 147 *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
149 start = bank_pfn_start(bank);
150 end = bank_pfn_end(bank);
151
152 if (*min > start)
153 *min = start;
154 if (*max_high < end)
155 *max_high = end;
156 if (bank->highmem)
157 continue;
158 if (*max_low < end)
159 *max_low = end;
160 }
161} 148}
162 149
163static void __init arm_bootmem_init(unsigned long start_pfn, 150static void __init arm_bootmem_init(unsigned long start_pfn,
@@ -319,19 +306,10 @@ static void arm_memory_present(void)
319} 306}
320#endif 307#endif
321 308
322static int __init meminfo_cmp(const void *_a, const void *_b)
323{
324 const struct membank *a = _a, *b = _b;
325 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
326 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
327}
328
329void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) 309void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
330{ 310{
331 int i; 311 int i;
332 312
333 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
334
335 memblock_init(); 313 memblock_init();
336 for (i = 0; i < mi->nr_banks; i++) 314 for (i = 0; i < mi->nr_banks; i++)
337 memblock_add(mi->bank[i].start, mi->bank[i].size); 315 memblock_add(mi->bank[i].start, mi->bank[i].size);
@@ -403,8 +381,6 @@ void __init bootmem_init(void)
403 */ 381 */
404 arm_bootmem_free(min, max_low, max_high); 382 arm_bootmem_free(min, max_low, max_high);
405 383
406 high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
407
408 /* 384 /*
409 * This doesn't seem to be used by the Linux memory manager any 385 * This doesn't seem to be used by the Linux memory manager any
410 * more, but is used by ll_rw_block. If we can get rid of it, we 386 * more, but is used by ll_rw_block. If we can get rid of it, we
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index bdb248c4f55c..80632e8d7538 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -36,12 +36,6 @@
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include "mm.h" 37#include "mm.h"
38 38
39/*
40 * Used by ioremap() and iounmap() code to mark (super)section-mapped
41 * I/O regions in vm_struct->flags field.
42 */
43#define VM_ARM_SECTION_MAPPING 0x80000000
44
45int ioremap_page(unsigned long virt, unsigned long phys, 39int ioremap_page(unsigned long virt, unsigned long phys,
46 const struct mem_type *mtype) 40 const struct mem_type *mtype)
47{ 41{
@@ -64,7 +58,7 @@ void __check_kvm_seq(struct mm_struct *mm)
64 } while (seq != init_mm.context.kvm_seq); 58 } while (seq != init_mm.context.kvm_seq);
65} 59}
66 60
67#ifndef CONFIG_SMP 61#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
68/* 62/*
69 * Section support is unsafe on SMP - If you iounmap and ioremap a region, 63 * Section support is unsafe on SMP - If you iounmap and ioremap a region,
70 * the other CPUs will not see this change until their next context switch. 64 * the other CPUs will not see this change until their next context switch.
@@ -79,13 +73,16 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
79{ 73{
80 unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1)); 74 unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1));
81 pgd_t *pgd; 75 pgd_t *pgd;
76 pud_t *pud;
77 pmd_t *pmdp;
82 78
83 flush_cache_vunmap(addr, end); 79 flush_cache_vunmap(addr, end);
84 pgd = pgd_offset_k(addr); 80 pgd = pgd_offset_k(addr);
81 pud = pud_offset(pgd, addr);
82 pmdp = pmd_offset(pud, addr);
85 do { 83 do {
86 pmd_t pmd, *pmdp = pmd_offset(pgd, addr); 84 pmd_t pmd = *pmdp;
87 85
88 pmd = *pmdp;
89 if (!pmd_none(pmd)) { 86 if (!pmd_none(pmd)) {
90 /* 87 /*
91 * Clear the PMD from the page table, and 88 * Clear the PMD from the page table, and
@@ -104,8 +101,8 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
104 pte_free_kernel(&init_mm, pmd_page_vaddr(pmd)); 101 pte_free_kernel(&init_mm, pmd_page_vaddr(pmd));
105 } 102 }
106 103
107 addr += PGDIR_SIZE; 104 addr += PMD_SIZE;
108 pgd++; 105 pmdp += 2;
109 } while (addr < end); 106 } while (addr < end);
110 107
111 /* 108 /*
@@ -124,6 +121,8 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
124{ 121{
125 unsigned long addr = virt, end = virt + size; 122 unsigned long addr = virt, end = virt + size;
126 pgd_t *pgd; 123 pgd_t *pgd;
124 pud_t *pud;
125 pmd_t *pmd;
127 126
128 /* 127 /*
129 * Remove and free any PTE-based mapping, and 128 * Remove and free any PTE-based mapping, and
@@ -132,17 +131,17 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
132 unmap_area_sections(virt, size); 131 unmap_area_sections(virt, size);
133 132
134 pgd = pgd_offset_k(addr); 133 pgd = pgd_offset_k(addr);
134 pud = pud_offset(pgd, addr);
135 pmd = pmd_offset(pud, addr);
135 do { 136 do {
136 pmd_t *pmd = pmd_offset(pgd, addr);
137
138 pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); 137 pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
139 pfn += SZ_1M >> PAGE_SHIFT; 138 pfn += SZ_1M >> PAGE_SHIFT;
140 pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); 139 pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
141 pfn += SZ_1M >> PAGE_SHIFT; 140 pfn += SZ_1M >> PAGE_SHIFT;
142 flush_pmd_entry(pmd); 141 flush_pmd_entry(pmd);
143 142
144 addr += PGDIR_SIZE; 143 addr += PMD_SIZE;
145 pgd++; 144 pmd += 2;
146 } while (addr < end); 145 } while (addr < end);
147 146
148 return 0; 147 return 0;
@@ -154,6 +153,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
154{ 153{
155 unsigned long addr = virt, end = virt + size; 154 unsigned long addr = virt, end = virt + size;
156 pgd_t *pgd; 155 pgd_t *pgd;
156 pud_t *pud;
157 pmd_t *pmd;
157 158
158 /* 159 /*
159 * Remove and free any PTE-based mapping, and 160 * Remove and free any PTE-based mapping, and
@@ -162,6 +163,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
162 unmap_area_sections(virt, size); 163 unmap_area_sections(virt, size);
163 164
164 pgd = pgd_offset_k(virt); 165 pgd = pgd_offset_k(virt);
166 pud = pud_offset(pgd, addr);
167 pmd = pmd_offset(pud, addr);
165 do { 168 do {
166 unsigned long super_pmd_val, i; 169 unsigned long super_pmd_val, i;
167 170
@@ -170,14 +173,12 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
170 super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20; 173 super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20;
171 174
172 for (i = 0; i < 8; i++) { 175 for (i = 0; i < 8; i++) {
173 pmd_t *pmd = pmd_offset(pgd, addr);
174
175 pmd[0] = __pmd(super_pmd_val); 176 pmd[0] = __pmd(super_pmd_val);
176 pmd[1] = __pmd(super_pmd_val); 177 pmd[1] = __pmd(super_pmd_val);
177 flush_pmd_entry(pmd); 178 flush_pmd_entry(pmd);
178 179
179 addr += PGDIR_SIZE; 180 addr += PMD_SIZE;
180 pgd++; 181 pmd += 2;
181 } 182 }
182 183
183 pfn += SUPERSECTION_SIZE >> PAGE_SHIFT; 184 pfn += SUPERSECTION_SIZE >> PAGE_SHIFT;
@@ -195,17 +196,13 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
195 unsigned long addr; 196 unsigned long addr;
196 struct vm_struct * area; 197 struct vm_struct * area;
197 198
199#ifndef CONFIG_ARM_LPAE
198 /* 200 /*
199 * High mappings must be supersection aligned 201 * High mappings must be supersection aligned
200 */ 202 */
201 if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) 203 if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
202 return NULL; 204 return NULL;
203 205#endif
204 /*
205 * Don't allow RAM to be mapped - this causes problems with ARMv6+
206 */
207 if (WARN_ON(pfn_valid(pfn)))
208 return NULL;
209 206
210 type = get_mem_type(mtype); 207 type = get_mem_type(mtype);
211 if (!type) 208 if (!type)
@@ -216,12 +213,40 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
216 */ 213 */
217 size = PAGE_ALIGN(offset + size); 214 size = PAGE_ALIGN(offset + size);
218 215
216 /*
217 * Try to reuse one of the static mapping whenever possible.
218 */
219 read_lock(&vmlist_lock);
220 for (area = vmlist; area; area = area->next) {
221 if (!size || (sizeof(phys_addr_t) == 4 && pfn >= 0x100000))
222 break;
223 if (!(area->flags & VM_ARM_STATIC_MAPPING))
224 continue;
225 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
226 continue;
227 if (__phys_to_pfn(area->phys_addr) > pfn ||
228 __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
229 continue;
230 /* we can drop the lock here as we know *area is static */
231 read_unlock(&vmlist_lock);
232 addr = (unsigned long)area->addr;
233 addr += __pfn_to_phys(pfn) - area->phys_addr;
234 return (void __iomem *) (offset + addr);
235 }
236 read_unlock(&vmlist_lock);
237
238 /*
239 * Don't allow RAM to be mapped - this causes problems with ARMv6+
240 */
241 if (WARN_ON(pfn_valid(pfn)))
242 return NULL;
243
219 area = get_vm_area_caller(size, VM_IOREMAP, caller); 244 area = get_vm_area_caller(size, VM_IOREMAP, caller);
220 if (!area) 245 if (!area)
221 return NULL; 246 return NULL;
222 addr = (unsigned long)area->addr; 247 addr = (unsigned long)area->addr;
223 248
224#ifndef CONFIG_SMP 249#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
225 if (DOMAIN_IO == 0 && 250 if (DOMAIN_IO == 0 &&
226 (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || 251 (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
227 cpu_is_xsc3()) && pfn >= 0x100000 && 252 cpu_is_xsc3()) && pfn >= 0x100000 &&
@@ -313,28 +338,34 @@ __arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached)
313void __iounmap(volatile void __iomem *io_addr) 338void __iounmap(volatile void __iomem *io_addr)
314{ 339{
315 void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); 340 void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
316#ifndef CONFIG_SMP 341 struct vm_struct *vm;
317 struct vm_struct **p, *tmp;
318 342
319 /* 343 read_lock(&vmlist_lock);
320 * If this is a section based mapping we need to handle it 344 for (vm = vmlist; vm; vm = vm->next) {
321 * specially as the VM subsystem does not know how to handle 345 if (vm->addr > addr)
322 * such a beast. We need the lock here b/c we need to clear 346 break;
323 * all the mappings before the area can be reclaimed 347 if (!(vm->flags & VM_IOREMAP))
324 * by someone else. 348 continue;
325 */ 349 /* If this is a static mapping we must leave it alone */
326 write_lock(&vmlist_lock); 350 if ((vm->flags & VM_ARM_STATIC_MAPPING) &&
327 for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { 351 (vm->addr <= addr) && (vm->addr + vm->size > addr)) {
328 if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { 352 read_unlock(&vmlist_lock);
329 if (tmp->flags & VM_ARM_SECTION_MAPPING) { 353 return;
330 unmap_area_sections((unsigned long)tmp->addr, 354 }
331 tmp->size); 355#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
332 } 356 /*
357 * If this is a section based mapping we need to handle it
358 * specially as the VM subsystem does not know how to handle
359 * such a beast.
360 */
361 if ((vm->addr == addr) &&
362 (vm->flags & VM_ARM_SECTION_MAPPING)) {
363 unmap_area_sections((unsigned long)vm->addr, vm->size);
333 break; 364 break;
334 } 365 }
335 }
336 write_unlock(&vmlist_lock);
337#endif 366#endif
367 }
368 read_unlock(&vmlist_lock);
338 369
339 vunmap(addr); 370 vunmap(addr);
340} 371}
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index ad7cce3bc431..70f6d3ea4834 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -21,6 +21,20 @@ const struct mem_type *get_mem_type(unsigned int type);
21 21
22extern void __flush_dcache_page(struct address_space *mapping, struct page *page); 22extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
23 23
24/*
25 * ARM specific vm_struct->flags bits.
26 */
27
28/* (super)section-mapped I/O regions used by ioremap()/iounmap() */
29#define VM_ARM_SECTION_MAPPING 0x80000000
30
31/* permanent static mappings from iotable_init() */
32#define VM_ARM_STATIC_MAPPING 0x40000000
33
34/* mapping type (attributes) for permanent static mappings */
35#define VM_ARM_MTYPE(mt) ((mt) << 20)
36#define VM_ARM_MTYPE_MASK (0x1f << 20)
37
24#endif 38#endif
25 39
26#ifdef CONFIG_ZONE_DMA 40#ifdef CONFIG_ZONE_DMA
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 44b628e4d6ea..ce8cb1970d7a 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -11,10 +11,49 @@
11#include <linux/random.h> 11#include <linux/random.h>
12#include <asm/cachetype.h> 12#include <asm/cachetype.h>
13 13
14static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
15 unsigned long pgoff)
16{
17 unsigned long base = addr & ~(SHMLBA-1);
18 unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
19
20 if (base + off <= addr)
21 return base + off;
22
23 return base - off;
24}
25
14#define COLOUR_ALIGN(addr,pgoff) \ 26#define COLOUR_ALIGN(addr,pgoff) \
15 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ 27 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
16 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) 28 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
17 29
30/* gap between mmap and stack */
31#define MIN_GAP (128*1024*1024UL)
32#define MAX_GAP ((TASK_SIZE)/6*5)
33
34static int mmap_is_legacy(void)
35{
36 if (current->personality & ADDR_COMPAT_LAYOUT)
37 return 1;
38
39 if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
40 return 1;
41
42 return sysctl_legacy_va_layout;
43}
44
45static unsigned long mmap_base(unsigned long rnd)
46{
47 unsigned long gap = rlimit(RLIMIT_STACK);
48
49 if (gap < MIN_GAP)
50 gap = MIN_GAP;
51 else if (gap > MAX_GAP)
52 gap = MAX_GAP;
53
54 return PAGE_ALIGN(TASK_SIZE - gap - rnd);
55}
56
18/* 57/*
19 * We need to ensure that shared mappings are correctly aligned to 58 * We need to ensure that shared mappings are correctly aligned to
20 * avoid aliasing issues with VIPT caches. We need to ensure that 59 * avoid aliasing issues with VIPT caches. We need to ensure that
@@ -68,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
68 if (len > mm->cached_hole_size) { 107 if (len > mm->cached_hole_size) {
69 start_addr = addr = mm->free_area_cache; 108 start_addr = addr = mm->free_area_cache;
70 } else { 109 } else {
71 start_addr = addr = TASK_UNMAPPED_BASE; 110 start_addr = addr = mm->mmap_base;
72 mm->cached_hole_size = 0; 111 mm->cached_hole_size = 0;
73 } 112 }
74 /* 8 bits of randomness in 20 address space bits */
75 if ((current->flags & PF_RANDOMIZE) &&
76 !(current->personality & ADDR_NO_RANDOMIZE))
77 addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;
78 113
79full_search: 114full_search:
80 if (do_align) 115 if (do_align)
@@ -111,6 +146,134 @@ full_search:
111 } 146 }
112} 147}
113 148
149unsigned long
150arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
151 const unsigned long len, const unsigned long pgoff,
152 const unsigned long flags)
153{
154 struct vm_area_struct *vma;
155 struct mm_struct *mm = current->mm;
156 unsigned long addr = addr0;
157 int do_align = 0;
158 int aliasing = cache_is_vipt_aliasing();
159
160 /*
161 * We only need to do colour alignment if either the I or D
162 * caches alias.
163 */
164 if (aliasing)
165 do_align = filp || (flags & MAP_SHARED);
166
167 /* requested length too big for entire address space */
168 if (len > TASK_SIZE)
169 return -ENOMEM;
170
171 if (flags & MAP_FIXED) {
172 if (aliasing && flags & MAP_SHARED &&
173 (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
174 return -EINVAL;
175 return addr;
176 }
177
178 /* requesting a specific address */
179 if (addr) {
180 if (do_align)
181 addr = COLOUR_ALIGN(addr, pgoff);
182 else
183 addr = PAGE_ALIGN(addr);
184 vma = find_vma(mm, addr);
185 if (TASK_SIZE - len >= addr &&
186 (!vma || addr + len <= vma->vm_start))
187 return addr;
188 }
189
190 /* check if free_area_cache is useful for us */
191 if (len <= mm->cached_hole_size) {
192 mm->cached_hole_size = 0;
193 mm->free_area_cache = mm->mmap_base;
194 }
195
196 /* either no address requested or can't fit in requested address hole */
197 addr = mm->free_area_cache;
198 if (do_align) {
199 unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);
200 addr = base + len;
201 }
202
203 /* make sure it can fit in the remaining address space */
204 if (addr > len) {
205 vma = find_vma(mm, addr-len);
206 if (!vma || addr <= vma->vm_start)
207 /* remember the address as a hint for next time */
208 return (mm->free_area_cache = addr-len);
209 }
210
211 if (mm->mmap_base < len)
212 goto bottomup;
213
214 addr = mm->mmap_base - len;
215 if (do_align)
216 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
217
218 do {
219 /*
220 * Lookup failure means no vma is above this address,
221 * else if new region fits below vma->vm_start,
222 * return with success:
223 */
224 vma = find_vma(mm, addr);
225 if (!vma || addr+len <= vma->vm_start)
226 /* remember the address as a hint for next time */
227 return (mm->free_area_cache = addr);
228
229 /* remember the largest hole we saw so far */
230 if (addr + mm->cached_hole_size < vma->vm_start)
231 mm->cached_hole_size = vma->vm_start - addr;
232
233 /* try just below the current vma->vm_start */
234 addr = vma->vm_start - len;
235 if (do_align)
236 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
237 } while (len < vma->vm_start);
238
239bottomup:
240 /*
241 * A failed mmap() very likely causes application failure,
242 * so fall back to the bottom-up function here. This scenario
243 * can happen with large stack limits and large mmap()
244 * allocations.
245 */
246 mm->cached_hole_size = ~0UL;
247 mm->free_area_cache = TASK_UNMAPPED_BASE;
248 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
249 /*
250 * Restore the topdown base:
251 */
252 mm->free_area_cache = mm->mmap_base;
253 mm->cached_hole_size = ~0UL;
254
255 return addr;
256}
257
258void arch_pick_mmap_layout(struct mm_struct *mm)
259{
260 unsigned long random_factor = 0UL;
261
262 /* 8 bits of randomness in 20 address space bits */
263 if ((current->flags & PF_RANDOMIZE) &&
264 !(current->personality & ADDR_NO_RANDOMIZE))
265 random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;
266
267 if (mmap_is_legacy()) {
268 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
269 mm->get_unmapped_area = arch_get_unmapped_area;
270 mm->unmap_area = arch_unmap_area;
271 } else {
272 mm->mmap_base = mmap_base(random_factor);
273 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
274 mm->unmap_area = arch_unmap_area_topdown;
275 }
276}
114 277
115/* 278/*
116 * You really shouldn't be using read() or write() on /dev/mem. This 279 * You really shouldn't be using read() or write() on /dev/mem. This
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index dc8c550e6cbd..94c5a0c94f5e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
15#include <linux/nodemask.h> 15#include <linux/nodemask.h>
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/vmalloc.h>
18 19
19#include <asm/cputype.h> 20#include <asm/cputype.h>
20#include <asm/sections.h> 21#include <asm/sections.h>
@@ -150,6 +151,7 @@ static int __init early_nowrite(char *__unused)
150} 151}
151early_param("nowb", early_nowrite); 152early_param("nowb", early_nowrite);
152 153
154#ifndef CONFIG_ARM_LPAE
153static int __init early_ecc(char *p) 155static int __init early_ecc(char *p)
154{ 156{
155 if (memcmp(p, "on", 2) == 0) 157 if (memcmp(p, "on", 2) == 0)
@@ -159,6 +161,7 @@ static int __init early_ecc(char *p)
159 return 0; 161 return 0;
160} 162}
161early_param("ecc", early_ecc); 163early_param("ecc", early_ecc);
164#endif
162 165
163static int __init noalign_setup(char *__unused) 166static int __init noalign_setup(char *__unused)
164{ 167{
@@ -228,10 +231,12 @@ static struct mem_type mem_types[] = {
228 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, 231 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
229 .domain = DOMAIN_KERNEL, 232 .domain = DOMAIN_KERNEL,
230 }, 233 },
234#ifndef CONFIG_ARM_LPAE
231 [MT_MINICLEAN] = { 235 [MT_MINICLEAN] = {
232 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE, 236 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE,
233 .domain = DOMAIN_KERNEL, 237 .domain = DOMAIN_KERNEL,
234 }, 238 },
239#endif
235 [MT_LOW_VECTORS] = { 240 [MT_LOW_VECTORS] = {
236 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 241 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
237 L_PTE_RDONLY, 242 L_PTE_RDONLY,
@@ -429,6 +434,7 @@ static void __init build_mem_type_table(void)
429 * ARMv6 and above have extended page tables. 434 * ARMv6 and above have extended page tables.
430 */ 435 */
431 if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { 436 if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) {
437#ifndef CONFIG_ARM_LPAE
432 /* 438 /*
433 * Mark cache clean areas and XIP ROM read only 439 * Mark cache clean areas and XIP ROM read only
434 * from SVC mode and no access from userspace. 440 * from SVC mode and no access from userspace.
@@ -436,6 +442,7 @@ static void __init build_mem_type_table(void)
436 mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 442 mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
437 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 443 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
438 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 444 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
445#endif
439 446
440 if (is_smp()) { 447 if (is_smp()) {
441 /* 448 /*
@@ -474,6 +481,18 @@ static void __init build_mem_type_table(void)
474 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE; 481 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
475 } 482 }
476 483
484#ifdef CONFIG_ARM_LPAE
485 /*
486 * Do not generate access flag faults for the kernel mappings.
487 */
488 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
489 mem_types[i].prot_pte |= PTE_EXT_AF;
490 mem_types[i].prot_sect |= PMD_SECT_AF;
491 }
492 kern_pgprot |= PTE_EXT_AF;
493 vecs_pgprot |= PTE_EXT_AF;
494#endif
495
477 for (i = 0; i < 16; i++) { 496 for (i = 0; i < 16; i++) {
478 unsigned long v = pgprot_val(protection_map[i]); 497 unsigned long v = pgprot_val(protection_map[i]);
479 protection_map[i] = __pgprot(v | user_pgprot); 498 protection_map[i] = __pgprot(v | user_pgprot);
@@ -529,13 +548,18 @@ EXPORT_SYMBOL(phys_mem_access_prot);
529 548
530#define vectors_base() (vectors_high() ? 0xffff0000 : 0) 549#define vectors_base() (vectors_high() ? 0xffff0000 : 0)
531 550
532static void __init *early_alloc(unsigned long sz) 551static void __init *early_alloc_aligned(unsigned long sz, unsigned long align)
533{ 552{
534 void *ptr = __va(memblock_alloc(sz, sz)); 553 void *ptr = __va(memblock_alloc(sz, align));
535 memset(ptr, 0, sz); 554 memset(ptr, 0, sz);
536 return ptr; 555 return ptr;
537} 556}
538 557
558static void __init *early_alloc(unsigned long sz)
559{
560 return early_alloc_aligned(sz, sz);
561}
562
539static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) 563static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
540{ 564{
541 if (pmd_none(*pmd)) { 565 if (pmd_none(*pmd)) {
@@ -572,8 +596,10 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
572 if (((addr | end | phys) & ~SECTION_MASK) == 0) { 596 if (((addr | end | phys) & ~SECTION_MASK) == 0) {
573 pmd_t *p = pmd; 597 pmd_t *p = pmd;
574 598
599#ifndef CONFIG_ARM_LPAE
575 if (addr & SECTION_SIZE) 600 if (addr & SECTION_SIZE)
576 pmd++; 601 pmd++;
602#endif
577 603
578 do { 604 do {
579 *pmd = __pmd(phys | type->prot_sect); 605 *pmd = __pmd(phys | type->prot_sect);
@@ -603,6 +629,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
603 } while (pud++, addr = next, addr != end); 629 } while (pud++, addr = next, addr != end);
604} 630}
605 631
632#ifndef CONFIG_ARM_LPAE
606static void __init create_36bit_mapping(struct map_desc *md, 633static void __init create_36bit_mapping(struct map_desc *md,
607 const struct mem_type *type) 634 const struct mem_type *type)
608{ 635{
@@ -662,6 +689,7 @@ static void __init create_36bit_mapping(struct map_desc *md,
662 pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT; 689 pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT;
663 } while (addr != end); 690 } while (addr != end);
664} 691}
692#endif /* !CONFIG_ARM_LPAE */
665 693
666/* 694/*
667 * Create the page directory entries and any necessary 695 * Create the page directory entries and any necessary
@@ -685,14 +713,16 @@ static void __init create_mapping(struct map_desc *md)
685 } 713 }
686 714
687 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 715 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
688 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 716 md->virtual >= PAGE_OFFSET &&
717 (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
689 printk(KERN_WARNING "BUG: mapping for 0x%08llx" 718 printk(KERN_WARNING "BUG: mapping for 0x%08llx"
690 " at 0x%08lx overlaps vmalloc space\n", 719 " at 0x%08lx out of vmalloc space\n",
691 (long long)__pfn_to_phys((u64)md->pfn), md->virtual); 720 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
692 } 721 }
693 722
694 type = &mem_types[md->type]; 723 type = &mem_types[md->type];
695 724
725#ifndef CONFIG_ARM_LPAE
696 /* 726 /*
697 * Catch 36-bit addresses 727 * Catch 36-bit addresses
698 */ 728 */
@@ -700,6 +730,7 @@ static void __init create_mapping(struct map_desc *md)
700 create_36bit_mapping(md, type); 730 create_36bit_mapping(md, type);
701 return; 731 return;
702 } 732 }
733#endif
703 734
704 addr = md->virtual & PAGE_MASK; 735 addr = md->virtual & PAGE_MASK;
705 phys = __pfn_to_phys(md->pfn); 736 phys = __pfn_to_phys(md->pfn);
@@ -729,18 +760,33 @@ static void __init create_mapping(struct map_desc *md)
729 */ 760 */
730void __init iotable_init(struct map_desc *io_desc, int nr) 761void __init iotable_init(struct map_desc *io_desc, int nr)
731{ 762{
732 int i; 763 struct map_desc *md;
764 struct vm_struct *vm;
765
766 if (!nr)
767 return;
733 768
734 for (i = 0; i < nr; i++) 769 vm = early_alloc_aligned(sizeof(*vm) * nr, __alignof__(*vm));
735 create_mapping(io_desc + i); 770
771 for (md = io_desc; nr; md++, nr--) {
772 create_mapping(md);
773 vm->addr = (void *)(md->virtual & PAGE_MASK);
774 vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
775 vm->phys_addr = __pfn_to_phys(md->pfn);
776 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
777 vm->flags |= VM_ARM_MTYPE(md->type);
778 vm->caller = iotable_init;
779 vm_area_add_early(vm++);
780 }
736} 781}
737 782
738static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); 783static void * __initdata vmalloc_min =
784 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
739 785
740/* 786/*
741 * vmalloc=size forces the vmalloc area to be exactly 'size' 787 * vmalloc=size forces the vmalloc area to be exactly 'size'
742 * bytes. This can be used to increase (or decrease) the vmalloc 788 * bytes. This can be used to increase (or decrease) the vmalloc
743 * area - the default is 128m. 789 * area - the default is 240m.
744 */ 790 */
745static int __init early_vmalloc(char *arg) 791static int __init early_vmalloc(char *arg)
746{ 792{
@@ -775,6 +821,9 @@ void __init sanity_check_meminfo(void)
775 struct membank *bank = &meminfo.bank[j]; 821 struct membank *bank = &meminfo.bank[j];
776 *bank = meminfo.bank[i]; 822 *bank = meminfo.bank[i];
777 823
824 if (bank->start > ULONG_MAX)
825 highmem = 1;
826
778#ifdef CONFIG_HIGHMEM 827#ifdef CONFIG_HIGHMEM
779 if (__va(bank->start) >= vmalloc_min || 828 if (__va(bank->start) >= vmalloc_min ||
780 __va(bank->start) < (void *)PAGE_OFFSET) 829 __va(bank->start) < (void *)PAGE_OFFSET)
@@ -786,7 +835,7 @@ void __init sanity_check_meminfo(void)
786 * Split those memory banks which are partially overlapping 835 * Split those memory banks which are partially overlapping
787 * the vmalloc area greatly simplifying things later. 836 * the vmalloc area greatly simplifying things later.
788 */ 837 */
789 if (__va(bank->start) < vmalloc_min && 838 if (!highmem && __va(bank->start) < vmalloc_min &&
790 bank->size > vmalloc_min - __va(bank->start)) { 839 bank->size > vmalloc_min - __va(bank->start)) {
791 if (meminfo.nr_banks >= NR_BANKS) { 840 if (meminfo.nr_banks >= NR_BANKS) {
792 printk(KERN_CRIT "NR_BANKS too low, " 841 printk(KERN_CRIT "NR_BANKS too low, "
@@ -807,6 +856,17 @@ void __init sanity_check_meminfo(void)
807 bank->highmem = highmem; 856 bank->highmem = highmem;
808 857
809 /* 858 /*
859 * Highmem banks not allowed with !CONFIG_HIGHMEM.
860 */
861 if (highmem) {
862 printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
863 "(!CONFIG_HIGHMEM).\n",
864 (unsigned long long)bank->start,
865 (unsigned long long)bank->start + bank->size - 1);
866 continue;
867 }
868
869 /*
810 * Check whether this memory bank would entirely overlap 870 * Check whether this memory bank would entirely overlap
811 * the vmalloc area. 871 * the vmalloc area.
812 */ 872 */
@@ -860,6 +920,7 @@ void __init sanity_check_meminfo(void)
860 } 920 }
861#endif 921#endif
862 meminfo.nr_banks = j; 922 meminfo.nr_banks = j;
923 high_memory = __va(lowmem_limit - 1) + 1;
863 memblock_set_current_limit(lowmem_limit); 924 memblock_set_current_limit(lowmem_limit);
864} 925}
865 926
@@ -890,14 +951,20 @@ static inline void prepare_page_table(void)
890 951
891 /* 952 /*
892 * Clear out all the kernel space mappings, except for the first 953 * Clear out all the kernel space mappings, except for the first
893 * memory bank, up to the end of the vmalloc region. 954 * memory bank, up to the vmalloc region.
894 */ 955 */
895 for (addr = __phys_to_virt(end); 956 for (addr = __phys_to_virt(end);
896 addr < VMALLOC_END; addr += PMD_SIZE) 957 addr < VMALLOC_START; addr += PMD_SIZE)
897 pmd_clear(pmd_off_k(addr)); 958 pmd_clear(pmd_off_k(addr));
898} 959}
899 960
961#ifdef CONFIG_ARM_LPAE
962/* the first page is reserved for pgd */
963#define SWAPPER_PG_DIR_SIZE (PAGE_SIZE + \
964 PTRS_PER_PGD * PTRS_PER_PMD * sizeof(pmd_t))
965#else
900#define SWAPPER_PG_DIR_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) 966#define SWAPPER_PG_DIR_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
967#endif
901 968
902/* 969/*
903 * Reserve the special regions of memory 970 * Reserve the special regions of memory
@@ -920,8 +987,8 @@ void __init arm_mm_memblock_reserve(void)
920} 987}
921 988
922/* 989/*
923 * Set up device the mappings. Since we clear out the page tables for all 990 * Set up the device mappings. Since we clear out the page tables for all
924 * mappings above VMALLOC_END, we will remove any debug device mappings. 991 * mappings above VMALLOC_START, we will remove any debug device mappings.
925 * This means you have to be careful how you debug this function, or any 992 * This means you have to be careful how you debug this function, or any
926 * called function. This means you can't use any function or debugging 993 * called function. This means you can't use any function or debugging
927 * method which may touch any device, otherwise the kernel _will_ crash. 994 * method which may touch any device, otherwise the kernel _will_ crash.
@@ -936,7 +1003,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
936 */ 1003 */
937 vectors_page = early_alloc(PAGE_SIZE); 1004 vectors_page = early_alloc(PAGE_SIZE);
938 1005
939 for (addr = VMALLOC_END; addr; addr += PMD_SIZE) 1006 for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
940 pmd_clear(pmd_off_k(addr)); 1007 pmd_clear(pmd_off_k(addr));
941 1008
942 /* 1009 /*
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 941a98c9e8aa..4fc6794cca4b 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -29,6 +29,8 @@ void __init arm_mm_memblock_reserve(void)
29 29
30void __init sanity_check_meminfo(void) 30void __init sanity_check_meminfo(void)
31{ 31{
32 phys_addr_t end = bank_phys_end(&meminfo.bank[meminfo.nr_banks - 1]);
33 high_memory = __va(end - 1) + 1;
32} 34}
33 35
34/* 36/*
@@ -43,7 +45,7 @@ void __init paging_init(struct machine_desc *mdesc)
43/* 45/*
44 * We don't need to do anything here for nommu machines. 46 * We don't need to do anything here for nommu machines.
45 */ 47 */
46void setup_mm_for_reboot(char mode) 48void setup_mm_for_reboot(void)
47{ 49{
48} 50}
49 51
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index b2027c154b2a..a3e78ccabd65 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/gfp.h> 11#include <linux/gfp.h>
12#include <linux/highmem.h> 12#include <linux/highmem.h>
13#include <linux/slab.h>
13 14
14#include <asm/pgalloc.h> 15#include <asm/pgalloc.h>
15#include <asm/page.h> 16#include <asm/page.h>
@@ -17,6 +18,14 @@
17 18
18#include "mm.h" 19#include "mm.h"
19 20
21#ifdef CONFIG_ARM_LPAE
22#define __pgd_alloc() kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL)
23#define __pgd_free(pgd) kfree(pgd)
24#else
25#define __pgd_alloc() (pgd_t *)__get_free_pages(GFP_KERNEL, 2)
26#define __pgd_free(pgd) free_pages((unsigned long)pgd, 2)
27#endif
28
20/* 29/*
21 * need to get a 16k page for level 1 30 * need to get a 16k page for level 1
22 */ 31 */
@@ -27,7 +36,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
27 pmd_t *new_pmd, *init_pmd; 36 pmd_t *new_pmd, *init_pmd;
28 pte_t *new_pte, *init_pte; 37 pte_t *new_pte, *init_pte;
29 38
30 new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL, 2); 39 new_pgd = __pgd_alloc();
31 if (!new_pgd) 40 if (!new_pgd)
32 goto no_pgd; 41 goto no_pgd;
33 42
@@ -42,10 +51,25 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
42 51
43 clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t)); 52 clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t));
44 53
54#ifdef CONFIG_ARM_LPAE
55 /*
56 * Allocate PMD table for modules and pkmap mappings.
57 */
58 new_pud = pud_alloc(mm, new_pgd + pgd_index(MODULES_VADDR),
59 MODULES_VADDR);
60 if (!new_pud)
61 goto no_pud;
62
63 new_pmd = pmd_alloc(mm, new_pud, 0);
64 if (!new_pmd)
65 goto no_pmd;
66#endif
67
45 if (!vectors_high()) { 68 if (!vectors_high()) {
46 /* 69 /*
47 * On ARM, first page must always be allocated since it 70 * On ARM, first page must always be allocated since it
48 * contains the machine vectors. 71 * contains the machine vectors. The vectors are always high
72 * with LPAE.
49 */ 73 */
50 new_pud = pud_alloc(mm, new_pgd, 0); 74 new_pud = pud_alloc(mm, new_pgd, 0);
51 if (!new_pud) 75 if (!new_pud)
@@ -74,7 +98,7 @@ no_pte:
74no_pmd: 98no_pmd:
75 pud_free(mm, new_pud); 99 pud_free(mm, new_pud);
76no_pud: 100no_pud:
77 free_pages((unsigned long)new_pgd, 2); 101 __pgd_free(new_pgd);
78no_pgd: 102no_pgd:
79 return NULL; 103 return NULL;
80} 104}
@@ -111,5 +135,24 @@ no_pud:
111 pgd_clear(pgd); 135 pgd_clear(pgd);
112 pud_free(mm, pud); 136 pud_free(mm, pud);
113no_pgd: 137no_pgd:
114 free_pages((unsigned long) pgd_base, 2); 138#ifdef CONFIG_ARM_LPAE
139 /*
140 * Free modules/pkmap or identity pmd tables.
141 */
142 for (pgd = pgd_base; pgd < pgd_base + PTRS_PER_PGD; pgd++) {
143 if (pgd_none_or_clear_bad(pgd))
144 continue;
145 if (pgd_val(*pgd) & L_PGD_SWAPPER)
146 continue;
147 pud = pud_offset(pgd, 0);
148 if (pud_none_or_clear_bad(pud))
149 continue;
150 pmd = pmd_offset(pud, 0);
151 pud_clear(pud);
152 pmd_free(mm, pmd);
153 pgd_clear(pgd);
154 pud_free(mm, pud);
155 }
156#endif
157 __pgd_free(pgd_base);
115} 158}
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 67469665d47a..234951345eb3 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020_proc_fin)
95 * loc: location to jump to for soft reset 95 * loc: location to jump to for soft reset
96 */ 96 */
97 .align 5 97 .align 5
98 .pushsection .idmap.text, "ax"
98ENTRY(cpu_arm1020_reset) 99ENTRY(cpu_arm1020_reset)
99 mov ip, #0 100 mov ip, #0
100 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 101 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020_reset)
107 bic ip, ip, #0x1100 @ ...i...s........ 108 bic ip, ip, #0x1100 @ ...i...s........
108 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 109 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
109 mov pc, r0 110 mov pc, r0
111ENDPROC(cpu_arm1020_reset)
112 .popsection
110 113
111/* 114/*
112 * cpu_arm1020_do_idle() 115 * cpu_arm1020_do_idle()
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 4251421c0ed5..c244b06caac9 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020e_proc_fin)
95 * loc: location to jump to for soft reset 95 * loc: location to jump to for soft reset
96 */ 96 */
97 .align 5 97 .align 5
98 .pushsection .idmap.text, "ax"
98ENTRY(cpu_arm1020e_reset) 99ENTRY(cpu_arm1020e_reset)
99 mov ip, #0 100 mov ip, #0
100 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 101 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020e_reset)
107 bic ip, ip, #0x1100 @ ...i...s........ 108 bic ip, ip, #0x1100 @ ...i...s........
108 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 109 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
109 mov pc, r0 110 mov pc, r0
111ENDPROC(cpu_arm1020e_reset)
112 .popsection
110 113
111/* 114/*
112 * cpu_arm1020e_do_idle() 115 * cpu_arm1020e_do_idle()
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index d283cf3d06e3..38fe22efd18f 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1022_proc_fin)
84 * loc: location to jump to for soft reset 84 * loc: location to jump to for soft reset
85 */ 85 */
86 .align 5 86 .align 5
87 .pushsection .idmap.text, "ax"
87ENTRY(cpu_arm1022_reset) 88ENTRY(cpu_arm1022_reset)
88 mov ip, #0 89 mov ip, #0
89 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 90 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1022_reset)
96 bic ip, ip, #0x1100 @ ...i...s........ 97 bic ip, ip, #0x1100 @ ...i...s........
97 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 98 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
98 mov pc, r0 99 mov pc, r0
100ENDPROC(cpu_arm1022_reset)
101 .popsection
99 102
100/* 103/*
101 * cpu_arm1022_do_idle() 104 * cpu_arm1022_do_idle()
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 678a1ceafed2..3eb9c3c26c75 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1026_proc_fin)
84 * loc: location to jump to for soft reset 84 * loc: location to jump to for soft reset
85 */ 85 */
86 .align 5 86 .align 5
87 .pushsection .idmap.text, "ax"
87ENTRY(cpu_arm1026_reset) 88ENTRY(cpu_arm1026_reset)
88 mov ip, #0 89 mov ip, #0
89 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 90 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1026_reset)
96 bic ip, ip, #0x1100 @ ...i...s........ 97 bic ip, ip, #0x1100 @ ...i...s........
97 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 98 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
98 mov pc, r0 99 mov pc, r0
100ENDPROC(cpu_arm1026_reset)
101 .popsection
99 102
100/* 103/*
101 * cpu_arm1026_do_idle() 104 * cpu_arm1026_do_idle()
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index e5b974cddac3..4fbeb5b8e6c2 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -225,6 +225,7 @@ ENTRY(cpu_arm7_set_pte_ext)
225 * Params : r0 = address to jump to 225 * Params : r0 = address to jump to
226 * Notes : This sets up everything for a reset 226 * Notes : This sets up everything for a reset
227 */ 227 */
228 .pushsection .idmap.text, "ax"
228ENTRY(cpu_arm6_reset) 229ENTRY(cpu_arm6_reset)
229ENTRY(cpu_arm7_reset) 230ENTRY(cpu_arm7_reset)
230 mov r1, #0 231 mov r1, #0
@@ -235,6 +236,9 @@ ENTRY(cpu_arm7_reset)
235 mov r1, #0x30 236 mov r1, #0x30
236 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc 237 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc
237 mov pc, r0 238 mov pc, r0
239ENDPROC(cpu_arm6_reset)
240ENDPROC(cpu_arm7_reset)
241 .popsection
238 242
239 __CPUINIT 243 __CPUINIT
240 244
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 55f4e290665a..0ac908c7ade1 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -101,6 +101,7 @@ ENTRY(cpu_arm720_set_pte_ext)
101 * Params : r0 = address to jump to 101 * Params : r0 = address to jump to
102 * Notes : This sets up everything for a reset 102 * Notes : This sets up everything for a reset
103 */ 103 */
104 .pushsection .idmap.text, "ax"
104ENTRY(cpu_arm720_reset) 105ENTRY(cpu_arm720_reset)
105 mov ip, #0 106 mov ip, #0
106 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache 107 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
@@ -112,6 +113,8 @@ ENTRY(cpu_arm720_reset)
112 bic ip, ip, #0x2100 @ ..v....s........ 113 bic ip, ip, #0x2100 @ ..v....s........
113 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 114 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
114 mov pc, r0 115 mov pc, r0
116ENDPROC(cpu_arm720_reset)
117 .popsection
115 118
116 __CPUINIT 119 __CPUINIT
117 120
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 4506be3adda6..dc5de5d53f20 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -49,6 +49,7 @@ ENTRY(cpu_arm740_proc_fin)
49 * Params : r0 = address to jump to 49 * Params : r0 = address to jump to
50 * Notes : This sets up everything for a reset 50 * Notes : This sets up everything for a reset
51 */ 51 */
52 .pushsection .idmap.text, "ax"
52ENTRY(cpu_arm740_reset) 53ENTRY(cpu_arm740_reset)
53 mov ip, #0 54 mov ip, #0
54 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache 55 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
@@ -56,6 +57,8 @@ ENTRY(cpu_arm740_reset)
56 bic ip, ip, #0x0000000c @ ............wc.. 57 bic ip, ip, #0x0000000c @ ............wc..
57 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 58 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
58 mov pc, r0 59 mov pc, r0
60ENDPROC(cpu_arm740_reset)
61 .popsection
59 62
60 __CPUINIT 63 __CPUINIT
61 64
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 7e0e1fe4ed4d..6ddea3e464bd 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm7tdmi_proc_fin)
45 * Params : loc(r0) address to jump to 45 * Params : loc(r0) address to jump to
46 * Purpose : Sets up everything for a reset and jump to the location for soft reset. 46 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
47 */ 47 */
48 .pushsection .idmap.text, "ax"
48ENTRY(cpu_arm7tdmi_reset) 49ENTRY(cpu_arm7tdmi_reset)
49 mov pc, r0 50 mov pc, r0
51ENDPROC(cpu_arm7tdmi_reset)
52 .popsection
50 53
51 __CPUINIT 54 __CPUINIT
52 55
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 88fb3d9e0640..cb941ae95f66 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -85,6 +85,7 @@ ENTRY(cpu_arm920_proc_fin)
85 * loc: location to jump to for soft reset 85 * loc: location to jump to for soft reset
86 */ 86 */
87 .align 5 87 .align 5
88 .pushsection .idmap.text, "ax"
88ENTRY(cpu_arm920_reset) 89ENTRY(cpu_arm920_reset)
89 mov ip, #0 90 mov ip, #0
90 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 91 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -97,6 +98,8 @@ ENTRY(cpu_arm920_reset)
97 bic ip, ip, #0x1100 @ ...i...s........ 98 bic ip, ip, #0x1100 @ ...i...s........
98 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 99 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
99 mov pc, r0 100 mov pc, r0
101ENDPROC(cpu_arm920_reset)
102 .popsection
100 103
101/* 104/*
102 * cpu_arm920_do_idle() 105 * cpu_arm920_do_idle()
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 490e18833857..4ec0e074dd55 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -87,6 +87,7 @@ ENTRY(cpu_arm922_proc_fin)
87 * loc: location to jump to for soft reset 87 * loc: location to jump to for soft reset
88 */ 88 */
89 .align 5 89 .align 5
90 .pushsection .idmap.text, "ax"
90ENTRY(cpu_arm922_reset) 91ENTRY(cpu_arm922_reset)
91 mov ip, #0 92 mov ip, #0
92 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 93 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -99,6 +100,8 @@ ENTRY(cpu_arm922_reset)
99 bic ip, ip, #0x1100 @ ...i...s........ 100 bic ip, ip, #0x1100 @ ...i...s........
100 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 101 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
101 mov pc, r0 102 mov pc, r0
103ENDPROC(cpu_arm922_reset)
104 .popsection
102 105
103/* 106/*
104 * cpu_arm922_do_idle() 107 * cpu_arm922_do_idle()
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 51d494be057e..9dccd9a365b3 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -108,6 +108,7 @@ ENTRY(cpu_arm925_proc_fin)
108 * loc: location to jump to for soft reset 108 * loc: location to jump to for soft reset
109 */ 109 */
110 .align 5 110 .align 5
111 .pushsection .idmap.text, "ax"
111ENTRY(cpu_arm925_reset) 112ENTRY(cpu_arm925_reset)
112 /* Send software reset to MPU and DSP */ 113 /* Send software reset to MPU and DSP */
113 mov ip, #0xff000000 114 mov ip, #0xff000000
@@ -115,6 +116,8 @@ ENTRY(cpu_arm925_reset)
115 orr ip, ip, #0x0000ce00 116 orr ip, ip, #0x0000ce00
116 mov r4, #1 117 mov r4, #1
117 strh r4, [ip, #0x10] 118 strh r4, [ip, #0x10]
119ENDPROC(cpu_arm925_reset)
120 .popsection
118 121
119 mov ip, #0 122 mov ip, #0
120 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 123 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 9f8fd91f918a..820259b81a1f 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -77,6 +77,7 @@ ENTRY(cpu_arm926_proc_fin)
77 * loc: location to jump to for soft reset 77 * loc: location to jump to for soft reset
78 */ 78 */
79 .align 5 79 .align 5
80 .pushsection .idmap.text, "ax"
80ENTRY(cpu_arm926_reset) 81ENTRY(cpu_arm926_reset)
81 mov ip, #0 82 mov ip, #0
82 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 83 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -89,6 +90,8 @@ ENTRY(cpu_arm926_reset)
89 bic ip, ip, #0x1100 @ ...i...s........ 90 bic ip, ip, #0x1100 @ ...i...s........
90 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 91 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
91 mov pc, r0 92 mov pc, r0
93ENDPROC(cpu_arm926_reset)
94 .popsection
92 95
93/* 96/*
94 * cpu_arm926_do_idle() 97 * cpu_arm926_do_idle()
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index ac750d506153..9fdc0a170974 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -48,6 +48,7 @@ ENTRY(cpu_arm940_proc_fin)
48 * Params : r0 = address to jump to 48 * Params : r0 = address to jump to
49 * Notes : This sets up everything for a reset 49 * Notes : This sets up everything for a reset
50 */ 50 */
51 .pushsection .idmap.text, "ax"
51ENTRY(cpu_arm940_reset) 52ENTRY(cpu_arm940_reset)
52 mov ip, #0 53 mov ip, #0
53 mcr p15, 0, ip, c7, c5, 0 @ flush I cache 54 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
@@ -58,6 +59,8 @@ ENTRY(cpu_arm940_reset)
58 bic ip, ip, #0x00001000 @ i-cache 59 bic ip, ip, #0x00001000 @ i-cache
59 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 60 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
60 mov pc, r0 61 mov pc, r0
62ENDPROC(cpu_arm940_reset)
63 .popsection
61 64
62/* 65/*
63 * cpu_arm940_do_idle() 66 * cpu_arm940_do_idle()
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 683af3a182b7..f684cfedcca9 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -55,6 +55,7 @@ ENTRY(cpu_arm946_proc_fin)
55 * Params : r0 = address to jump to 55 * Params : r0 = address to jump to
56 * Notes : This sets up everything for a reset 56 * Notes : This sets up everything for a reset
57 */ 57 */
58 .pushsection .idmap.text, "ax"
58ENTRY(cpu_arm946_reset) 59ENTRY(cpu_arm946_reset)
59 mov ip, #0 60 mov ip, #0
60 mcr p15, 0, ip, c7, c5, 0 @ flush I cache 61 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
@@ -65,6 +66,8 @@ ENTRY(cpu_arm946_reset)
65 bic ip, ip, #0x00001000 @ i-cache 66 bic ip, ip, #0x00001000 @ i-cache
66 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 67 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
67 mov pc, r0 68 mov pc, r0
69ENDPROC(cpu_arm946_reset)
70 .popsection
68 71
69/* 72/*
70 * cpu_arm946_do_idle() 73 * cpu_arm946_do_idle()
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 2120f9e2af7f..8881391dfb9e 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm9tdmi_proc_fin)
45 * Params : loc(r0) address to jump to 45 * Params : loc(r0) address to jump to
46 * Purpose : Sets up everything for a reset and jump to the location for soft reset. 46 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
47 */ 47 */
48 .pushsection .idmap.text, "ax"
48ENTRY(cpu_arm9tdmi_reset) 49ENTRY(cpu_arm9tdmi_reset)
49 mov pc, r0 50 mov pc, r0
51ENDPROC(cpu_arm9tdmi_reset)
52 .popsection
50 53
51 __CPUINIT 54 __CPUINIT
52 55
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 4c7a5710472b..272558a133a3 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -57,6 +57,7 @@ ENTRY(cpu_fa526_proc_fin)
57 * loc: location to jump to for soft reset 57 * loc: location to jump to for soft reset
58 */ 58 */
59 .align 4 59 .align 4
60 .pushsection .idmap.text, "ax"
60ENTRY(cpu_fa526_reset) 61ENTRY(cpu_fa526_reset)
61/* TODO: Use CP8 if possible... */ 62/* TODO: Use CP8 if possible... */
62 mov ip, #0 63 mov ip, #0
@@ -73,6 +74,8 @@ ENTRY(cpu_fa526_reset)
73 nop 74 nop
74 nop 75 nop
75 mov pc, r0 76 mov pc, r0
77ENDPROC(cpu_fa526_reset)
78 .popsection
76 79
77/* 80/*
78 * cpu_fa526_do_idle() 81 * cpu_fa526_do_idle()
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 8a6c2f78c1c3..ba3c500584ac 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -98,6 +98,7 @@ ENTRY(cpu_feroceon_proc_fin)
98 * loc: location to jump to for soft reset 98 * loc: location to jump to for soft reset
99 */ 99 */
100 .align 5 100 .align 5
101 .pushsection .idmap.text, "ax"
101ENTRY(cpu_feroceon_reset) 102ENTRY(cpu_feroceon_reset)
102 mov ip, #0 103 mov ip, #0
103 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 104 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -110,6 +111,8 @@ ENTRY(cpu_feroceon_reset)
110 bic ip, ip, #0x1100 @ ...i...s........ 111 bic ip, ip, #0x1100 @ ...i...s........
111 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 112 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
112 mov pc, r0 113 mov pc, r0
114ENDPROC(cpu_feroceon_reset)
115 .popsection
113 116
114/* 117/*
115 * cpu_feroceon_do_idle() 118 * cpu_feroceon_do_idle()
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 307a4def8d3a..2d8ff3ad86d3 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -91,8 +91,9 @@
91#if L_PTE_SHARED != PTE_EXT_SHARED 91#if L_PTE_SHARED != PTE_EXT_SHARED
92#error PTE shared bit mismatch 92#error PTE shared bit mismatch
93#endif 93#endif
94#if (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ 94#if !defined (CONFIG_ARM_LPAE) && \
95 L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED 95 (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\
96 L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
96#error Invalid Linux PTE bit settings 97#error Invalid Linux PTE bit settings
97#endif 98#endif
98#endif /* CONFIG_MMU */ 99#endif /* CONFIG_MMU */
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index db52b0fb14a0..cdfedc5b8ad8 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -69,6 +69,7 @@ ENTRY(cpu_mohawk_proc_fin)
69 * (same as arm926) 69 * (same as arm926)
70 */ 70 */
71 .align 5 71 .align 5
72 .pushsection .idmap.text, "ax"
72ENTRY(cpu_mohawk_reset) 73ENTRY(cpu_mohawk_reset)
73 mov ip, #0 74 mov ip, #0
74 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 75 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -79,6 +80,8 @@ ENTRY(cpu_mohawk_reset)
79 bic ip, ip, #0x1100 @ ...i...s........ 80 bic ip, ip, #0x1100 @ ...i...s........
80 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 81 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
81 mov pc, r0 82 mov pc, r0
83ENDPROC(cpu_mohawk_reset)
84 .popsection
82 85
83/* 86/*
84 * cpu_mohawk_do_idle() 87 * cpu_mohawk_do_idle()
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index d50ada26edd6..775d70fba937 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -62,6 +62,7 @@ ENTRY(cpu_sa110_proc_fin)
62 * loc: location to jump to for soft reset 62 * loc: location to jump to for soft reset
63 */ 63 */
64 .align 5 64 .align 5
65 .pushsection .idmap.text, "ax"
65ENTRY(cpu_sa110_reset) 66ENTRY(cpu_sa110_reset)
66 mov ip, #0 67 mov ip, #0
67 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 68 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -74,6 +75,8 @@ ENTRY(cpu_sa110_reset)
74 bic ip, ip, #0x1100 @ ...i...s........ 75 bic ip, ip, #0x1100 @ ...i...s........
75 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 76 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
76 mov pc, r0 77 mov pc, r0
78ENDPROC(cpu_sa110_reset)
79 .popsection
77 80
78/* 81/*
79 * cpu_sa110_do_idle(type) 82 * cpu_sa110_do_idle(type)
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 7d91545d089b..3aa0da11fd84 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -70,6 +70,7 @@ ENTRY(cpu_sa1100_proc_fin)
70 * loc: location to jump to for soft reset 70 * loc: location to jump to for soft reset
71 */ 71 */
72 .align 5 72 .align 5
73 .pushsection .idmap.text, "ax"
73ENTRY(cpu_sa1100_reset) 74ENTRY(cpu_sa1100_reset)
74 mov ip, #0 75 mov ip, #0
75 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 76 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -82,6 +83,8 @@ ENTRY(cpu_sa1100_reset)
82 bic ip, ip, #0x1100 @ ...i...s........ 83 bic ip, ip, #0x1100 @ ...i...s........
83 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 84 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
84 mov pc, r0 85 mov pc, r0
86ENDPROC(cpu_sa1100_reset)
87 .popsection
85 88
86/* 89/*
87 * cpu_sa1100_do_idle(type) 90 * cpu_sa1100_do_idle(type)
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index d061d2fa5506..5900cd520e84 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -55,6 +55,7 @@ ENTRY(cpu_v6_proc_fin)
55 * - loc - location to jump to for soft reset 55 * - loc - location to jump to for soft reset
56 */ 56 */
57 .align 5 57 .align 5
58 .pushsection .idmap.text, "ax"
58ENTRY(cpu_v6_reset) 59ENTRY(cpu_v6_reset)
59 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 60 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
60 bic r1, r1, #0x1 @ ...............m 61 bic r1, r1, #0x1 @ ...............m
@@ -62,6 +63,8 @@ ENTRY(cpu_v6_reset)
62 mov r1, #0 63 mov r1, #0
63 mcr p15, 0, r1, c7, c5, 4 @ ISB 64 mcr p15, 0, r1, c7, c5, 4 @ ISB
64 mov pc, r0 65 mov pc, r0
66ENDPROC(cpu_v6_reset)
67 .popsection
65 68
66/* 69/*
67 * cpu_v6_do_idle() 70 * cpu_v6_do_idle()
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
new file mode 100644
index 000000000000..3a4b3e7b888c
--- /dev/null
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -0,0 +1,171 @@
1/*
2 * arch/arm/mm/proc-v7-2level.S
3 *
4 * Copyright (C) 2001 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#define TTB_S (1 << 1)
12#define TTB_RGN_NC (0 << 3)
13#define TTB_RGN_OC_WBWA (1 << 3)
14#define TTB_RGN_OC_WT (2 << 3)
15#define TTB_RGN_OC_WB (3 << 3)
16#define TTB_NOS (1 << 5)
17#define TTB_IRGN_NC ((0 << 0) | (0 << 6))
18#define TTB_IRGN_WBWA ((0 << 0) | (1 << 6))
19#define TTB_IRGN_WT ((1 << 0) | (0 << 6))
20#define TTB_IRGN_WB ((1 << 0) | (1 << 6))
21
22/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
23#define TTB_FLAGS_UP TTB_IRGN_WB|TTB_RGN_OC_WB
24#define PMD_FLAGS_UP PMD_SECT_WB
25
26/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
27#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
28#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
29
30/*
31 * cpu_v7_switch_mm(pgd_phys, tsk)
32 *
33 * Set the translation table base pointer to be pgd_phys
34 *
35 * - pgd_phys - physical address of new TTB
36 *
37 * It is assumed that:
38 * - we are not using split page tables
39 */
40ENTRY(cpu_v7_switch_mm)
41#ifdef CONFIG_MMU
42 mov r2, #0
43 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
44 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
45 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
46#ifdef CONFIG_ARM_ERRATA_430973
47 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
48#endif
49#ifdef CONFIG_ARM_ERRATA_754322
50 dsb
51#endif
52 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
53 isb
541: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
55 isb
56#ifdef CONFIG_ARM_ERRATA_754322
57 dsb
58#endif
59 mcr p15, 0, r1, c13, c0, 1 @ set context ID
60 isb
61#endif
62 mov pc, lr
63ENDPROC(cpu_v7_switch_mm)
64
65/*
66 * cpu_v7_set_pte_ext(ptep, pte)
67 *
68 * Set a level 2 translation table entry.
69 *
70 * - ptep - pointer to level 2 translation table entry
71 * (hardware version is stored at +2048 bytes)
72 * - pte - PTE value to store
73 * - ext - value for extended PTE bits
74 */
75ENTRY(cpu_v7_set_pte_ext)
76#ifdef CONFIG_MMU
77 str r1, [r0] @ linux version
78
79 bic r3, r1, #0x000003f0
80 bic r3, r3, #PTE_TYPE_MASK
81 orr r3, r3, r2
82 orr r3, r3, #PTE_EXT_AP0 | 2
83
84 tst r1, #1 << 4
85 orrne r3, r3, #PTE_EXT_TEX(1)
86
87 eor r1, r1, #L_PTE_DIRTY
88 tst r1, #L_PTE_RDONLY | L_PTE_DIRTY
89 orrne r3, r3, #PTE_EXT_APX
90
91 tst r1, #L_PTE_USER
92 orrne r3, r3, #PTE_EXT_AP1
93#ifdef CONFIG_CPU_USE_DOMAINS
94 @ allow kernel read/write access to read-only user pages
95 tstne r3, #PTE_EXT_APX
96 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
97#endif
98
99 tst r1, #L_PTE_XN
100 orrne r3, r3, #PTE_EXT_XN
101
102 tst r1, #L_PTE_YOUNG
103 tstne r1, #L_PTE_PRESENT
104 moveq r3, #0
105
106 ARM( str r3, [r0, #2048]! )
107 THUMB( add r0, r0, #2048 )
108 THUMB( str r3, [r0] )
109 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
110#endif
111 mov pc, lr
112ENDPROC(cpu_v7_set_pte_ext)
113
114 /*
115 * Memory region attributes with SCTLR.TRE=1
116 *
117 * n = TEX[0],C,B
118 * TR = PRRR[2n+1:2n] - memory type
119 * IR = NMRR[2n+1:2n] - inner cacheable property
120 * OR = NMRR[2n+17:2n+16] - outer cacheable property
121 *
122 * n TR IR OR
123 * UNCACHED 000 00
124 * BUFFERABLE 001 10 00 00
125 * WRITETHROUGH 010 10 10 10
126 * WRITEBACK 011 10 11 11
127 * reserved 110
128 * WRITEALLOC 111 10 01 01
129 * DEV_SHARED 100 01
130 * DEV_NONSHARED 100 01
131 * DEV_WC 001 10
132 * DEV_CACHED 011 10
133 *
134 * Other attributes:
135 *
136 * DS0 = PRRR[16] = 0 - device shareable property
137 * DS1 = PRRR[17] = 1 - device shareable property
138 * NS0 = PRRR[18] = 0 - normal shareable property
139 * NS1 = PRRR[19] = 1 - normal shareable property
140 * NOS = PRRR[24+n] = 1 - not outer shareable
141 */
142.equ PRRR, 0xff0a81a8
143.equ NMRR, 0x40e040e0
144
145 /*
146 * Macro for setting up the TTBRx and TTBCR registers.
147 * - \ttb0 and \ttb1 updated with the corresponding flags.
148 */
149 .macro v7_ttb_setup, zero, ttbr0, ttbr1, tmp
150 mcr p15, 0, \zero, c2, c0, 2 @ TTB control register
151 ALT_SMP(orr \ttbr0, \ttbr0, #TTB_FLAGS_SMP)
152 ALT_UP(orr \ttbr0, \ttbr0, #TTB_FLAGS_UP)
153 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
154 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
155 mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
156 .endm
157
158 __CPUINIT
159
160 /* AT
161 * TFR EV X F I D LR S
162 * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
163 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
164 * 1 0 110 0011 1100 .111 1101 < we want
165 */
166 .align 2
167 .type v7_crval, #object
168v7_crval:
169 crval clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
170
171 .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
new file mode 100644
index 000000000000..8de0f1dd1549
--- /dev/null
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -0,0 +1,150 @@
1/*
2 * arch/arm/mm/proc-v7-3level.S
3 *
4 * Copyright (C) 2001 Deep Blue Solutions Ltd.
5 * Copyright (C) 2011 ARM Ltd.
6 * Author: Catalin Marinas <catalin.marinas@arm.com>
7 * based on arch/arm/mm/proc-v7-2level.S
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define TTB_IRGN_NC (0 << 8)
24#define TTB_IRGN_WBWA (1 << 8)
25#define TTB_IRGN_WT (2 << 8)
26#define TTB_IRGN_WB (3 << 8)
27#define TTB_RGN_NC (0 << 10)
28#define TTB_RGN_OC_WBWA (1 << 10)
29#define TTB_RGN_OC_WT (2 << 10)
30#define TTB_RGN_OC_WB (3 << 10)
31#define TTB_S (3 << 12)
32#define TTB_EAE (1 << 31)
33
34/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
35#define TTB_FLAGS_UP (TTB_IRGN_WB|TTB_RGN_OC_WB)
36#define PMD_FLAGS_UP (PMD_SECT_WB)
37
38/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
39#define TTB_FLAGS_SMP (TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA)
40#define PMD_FLAGS_SMP (PMD_SECT_WBWA|PMD_SECT_S)
41
42/*
43 * cpu_v7_switch_mm(pgd_phys, tsk)
44 *
45 * Set the translation table base pointer to be pgd_phys (physical address of
46 * the new TTB).
47 */
48ENTRY(cpu_v7_switch_mm)
49#ifdef CONFIG_MMU
50 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
51 and r3, r1, #0xff
52 mov r3, r3, lsl #(48 - 32) @ ASID
53 mcrr p15, 0, r0, r3, c2 @ set TTB 0
54 isb
55#endif
56 mov pc, lr
57ENDPROC(cpu_v7_switch_mm)
58
59/*
60 * cpu_v7_set_pte_ext(ptep, pte)
61 *
62 * Set a level 2 translation table entry.
63 * - ptep - pointer to level 3 translation table entry
64 * - pte - PTE value to store (64-bit in r2 and r3)
65 */
66ENTRY(cpu_v7_set_pte_ext)
67#ifdef CONFIG_MMU
68 tst r2, #L_PTE_PRESENT
69 beq 1f
70 tst r3, #1 << (55 - 32) @ L_PTE_DIRTY
71 orreq r2, #L_PTE_RDONLY
721: strd r2, r3, [r0]
73 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
74#endif
75 mov pc, lr
76ENDPROC(cpu_v7_set_pte_ext)
77
78 /*
79 * Memory region attributes for LPAE (defined in pgtable-3level.h):
80 *
81 * n = AttrIndx[2:0]
82 *
83 * n MAIR
84 * UNCACHED 000 00000000
85 * BUFFERABLE 001 01000100
86 * DEV_WC 001 01000100
87 * WRITETHROUGH 010 10101010
88 * WRITEBACK 011 11101110
89 * DEV_CACHED 011 11101110
90 * DEV_SHARED 100 00000100
91 * DEV_NONSHARED 100 00000100
92 * unused 101
93 * unused 110
94 * WRITEALLOC 111 11111111
95 */
96.equ PRRR, 0xeeaa4400 @ MAIR0
97.equ NMRR, 0xff000004 @ MAIR1
98
99 /*
100 * Macro for setting up the TTBRx and TTBCR registers.
101 * - \ttbr1 updated.
102 */
103 .macro v7_ttb_setup, zero, ttbr0, ttbr1, tmp
104 ldr \tmp, =swapper_pg_dir @ swapper_pg_dir virtual address
105 cmp \ttbr1, \tmp @ PHYS_OFFSET > PAGE_OFFSET? (branch below)
106 mrc p15, 0, \tmp, c2, c0, 2 @ TTB control register
107 orr \tmp, \tmp, #TTB_EAE
108 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP)
109 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP)
110 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16)
111 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP << 16)
112 /*
113 * TTBR0/TTBR1 split (PAGE_OFFSET):
114 * 0x40000000: T0SZ = 2, T1SZ = 0 (not used)
115 * 0x80000000: T0SZ = 0, T1SZ = 1
116 * 0xc0000000: T0SZ = 0, T1SZ = 2
117 *
118 * Only use this feature if PHYS_OFFSET <= PAGE_OFFSET, otherwise
119 * booting secondary CPUs would end up using TTBR1 for the identity
120 * mapping set up in TTBR0.
121 */
122 bhi 9001f @ PHYS_OFFSET > PAGE_OFFSET?
123 orr \tmp, \tmp, #(((PAGE_OFFSET >> 30) - 1) << 16) @ TTBCR.T1SZ
124#if defined CONFIG_VMSPLIT_2G
125 /* PAGE_OFFSET == 0x80000000, T1SZ == 1 */
126 add \ttbr1, \ttbr1, #1 << 4 @ skip two L1 entries
127#elif defined CONFIG_VMSPLIT_3G
128 /* PAGE_OFFSET == 0xc0000000, T1SZ == 2 */
129 add \ttbr1, \ttbr1, #4096 * (1 + 3) @ only L2 used, skip pgd+3*pmd
130#endif
131 /* CONFIG_VMSPLIT_1G does not need TTBR1 adjustment */
1329001: mcr p15, 0, \tmp, c2, c0, 2 @ TTB control register
133 mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1
134 .endm
135
136 __CPUINIT
137
138 /*
139 * AT
140 * TFR EV X F IHD LR S
141 * .EEE ..EE PUI. .TAT 4RVI ZWRS BLDP WCAM
142 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
143 * 11 0 110 1 0011 1100 .111 1101 < we want
144 */
145 .align 2
146 .type v7_crval, #object
147v7_crval:
148 crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
149
150 .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c559ac38142..7e9b5bf910c1 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -19,24 +19,11 @@
19 19
20#include "proc-macros.S" 20#include "proc-macros.S"
21 21
22#define TTB_S (1 << 1) 22#ifdef CONFIG_ARM_LPAE
23#define TTB_RGN_NC (0 << 3) 23#include "proc-v7-3level.S"
24#define TTB_RGN_OC_WBWA (1 << 3) 24#else
25#define TTB_RGN_OC_WT (2 << 3) 25#include "proc-v7-2level.S"
26#define TTB_RGN_OC_WB (3 << 3) 26#endif
27#define TTB_NOS (1 << 5)
28#define TTB_IRGN_NC ((0 << 0) | (0 << 6))
29#define TTB_IRGN_WBWA ((0 << 0) | (1 << 6))
30#define TTB_IRGN_WT ((1 << 0) | (0 << 6))
31#define TTB_IRGN_WB ((1 << 0) | (1 << 6))
32
33/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
34#define TTB_FLAGS_UP TTB_IRGN_WB|TTB_RGN_OC_WB
35#define PMD_FLAGS_UP PMD_SECT_WB
36
37/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
38#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
39#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
40 27
41ENTRY(cpu_v7_proc_init) 28ENTRY(cpu_v7_proc_init)
42 mov pc, lr 29 mov pc, lr
@@ -63,6 +50,7 @@ ENDPROC(cpu_v7_proc_fin)
63 * caches disabled. 50 * caches disabled.
64 */ 51 */
65 .align 5 52 .align 5
53 .pushsection .idmap.text, "ax"
66ENTRY(cpu_v7_reset) 54ENTRY(cpu_v7_reset)
67 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 55 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
68 bic r1, r1, #0x1 @ ...............m 56 bic r1, r1, #0x1 @ ...............m
@@ -71,6 +59,7 @@ ENTRY(cpu_v7_reset)
71 isb 59 isb
72 mov pc, r0 60 mov pc, r0
73ENDPROC(cpu_v7_reset) 61ENDPROC(cpu_v7_reset)
62 .popsection
74 63
75/* 64/*
76 * cpu_v7_do_idle() 65 * cpu_v7_do_idle()
@@ -97,127 +86,12 @@ ENTRY(cpu_v7_dcache_clean_area)
97 mov pc, lr 86 mov pc, lr
98ENDPROC(cpu_v7_dcache_clean_area) 87ENDPROC(cpu_v7_dcache_clean_area)
99 88
100/*
101 * cpu_v7_switch_mm(pgd_phys, tsk)
102 *
103 * Set the translation table base pointer to be pgd_phys
104 *
105 * - pgd_phys - physical address of new TTB
106 *
107 * It is assumed that:
108 * - we are not using split page tables
109 */
110ENTRY(cpu_v7_switch_mm)
111#ifdef CONFIG_MMU
112 mov r2, #0
113 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
114 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
115 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
116#ifdef CONFIG_ARM_ERRATA_430973
117 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
118#endif
119#ifdef CONFIG_ARM_ERRATA_754322
120 dsb
121#endif
122 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
123 isb
1241: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
125 isb
126#ifdef CONFIG_ARM_ERRATA_754322
127 dsb
128#endif
129 mcr p15, 0, r1, c13, c0, 1 @ set context ID
130 isb
131#endif
132 mov pc, lr
133ENDPROC(cpu_v7_switch_mm)
134
135/*
136 * cpu_v7_set_pte_ext(ptep, pte)
137 *
138 * Set a level 2 translation table entry.
139 *
140 * - ptep - pointer to level 2 translation table entry
141 * (hardware version is stored at +2048 bytes)
142 * - pte - PTE value to store
143 * - ext - value for extended PTE bits
144 */
145ENTRY(cpu_v7_set_pte_ext)
146#ifdef CONFIG_MMU
147 str r1, [r0] @ linux version
148
149 bic r3, r1, #0x000003f0
150 bic r3, r3, #PTE_TYPE_MASK
151 orr r3, r3, r2
152 orr r3, r3, #PTE_EXT_AP0 | 2
153
154 tst r1, #1 << 4
155 orrne r3, r3, #PTE_EXT_TEX(1)
156
157 eor r1, r1, #L_PTE_DIRTY
158 tst r1, #L_PTE_RDONLY | L_PTE_DIRTY
159 orrne r3, r3, #PTE_EXT_APX
160
161 tst r1, #L_PTE_USER
162 orrne r3, r3, #PTE_EXT_AP1
163#ifdef CONFIG_CPU_USE_DOMAINS
164 @ allow kernel read/write access to read-only user pages
165 tstne r3, #PTE_EXT_APX
166 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
167#endif
168
169 tst r1, #L_PTE_XN
170 orrne r3, r3, #PTE_EXT_XN
171
172 tst r1, #L_PTE_YOUNG
173 tstne r1, #L_PTE_PRESENT
174 moveq r3, #0
175
176 ARM( str r3, [r0, #2048]! )
177 THUMB( add r0, r0, #2048 )
178 THUMB( str r3, [r0] )
179 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
180#endif
181 mov pc, lr
182ENDPROC(cpu_v7_set_pte_ext)
183
184 string cpu_v7_name, "ARMv7 Processor" 89 string cpu_v7_name, "ARMv7 Processor"
185 .align 90 .align
186 91
187 /*
188 * Memory region attributes with SCTLR.TRE=1
189 *
190 * n = TEX[0],C,B
191 * TR = PRRR[2n+1:2n] - memory type
192 * IR = NMRR[2n+1:2n] - inner cacheable property
193 * OR = NMRR[2n+17:2n+16] - outer cacheable property
194 *
195 * n TR IR OR
196 * UNCACHED 000 00
197 * BUFFERABLE 001 10 00 00
198 * WRITETHROUGH 010 10 10 10
199 * WRITEBACK 011 10 11 11
200 * reserved 110
201 * WRITEALLOC 111 10 01 01
202 * DEV_SHARED 100 01
203 * DEV_NONSHARED 100 01
204 * DEV_WC 001 10
205 * DEV_CACHED 011 10
206 *
207 * Other attributes:
208 *
209 * DS0 = PRRR[16] = 0 - device shareable property
210 * DS1 = PRRR[17] = 1 - device shareable property
211 * NS0 = PRRR[18] = 0 - normal shareable property
212 * NS1 = PRRR[19] = 1 - normal shareable property
213 * NOS = PRRR[24+n] = 1 - not outer shareable
214 */
215.equ PRRR, 0xff0a81a8
216.equ NMRR, 0x40e040e0
217
218/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ 92/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
219.globl cpu_v7_suspend_size 93.globl cpu_v7_suspend_size
220.equ cpu_v7_suspend_size, 4 * 7 94.equ cpu_v7_suspend_size, 4 * 8
221#ifdef CONFIG_ARM_CPU_SUSPEND 95#ifdef CONFIG_ARM_CPU_SUSPEND
222ENTRY(cpu_v7_do_suspend) 96ENTRY(cpu_v7_do_suspend)
223 stmfd sp!, {r4 - r10, lr} 97 stmfd sp!, {r4 - r10, lr}
@@ -226,10 +100,11 @@ ENTRY(cpu_v7_do_suspend)
226 stmia r0!, {r4 - r5} 100 stmia r0!, {r4 - r5}
227 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 101 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
228 mrc p15, 0, r7, c2, c0, 1 @ TTB 1 102 mrc p15, 0, r7, c2, c0, 1 @ TTB 1
103 mrc p15, 0, r11, c2, c0, 2 @ TTB control register
229 mrc p15, 0, r8, c1, c0, 0 @ Control register 104 mrc p15, 0, r8, c1, c0, 0 @ Control register
230 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register 105 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
231 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control 106 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
232 stmia r0, {r6 - r10} 107 stmia r0, {r6 - r11}
233 ldmfd sp!, {r4 - r10, pc} 108 ldmfd sp!, {r4 - r10, pc}
234ENDPROC(cpu_v7_do_suspend) 109ENDPROC(cpu_v7_do_suspend)
235 110
@@ -241,13 +116,15 @@ ENTRY(cpu_v7_do_resume)
241 ldmia r0!, {r4 - r5} 116 ldmia r0!, {r4 - r5}
242 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID 117 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID
243 mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID 118 mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID
244 ldmia r0, {r6 - r10} 119 ldmia r0, {r6 - r11}
245 mcr p15, 0, r6, c3, c0, 0 @ Domain ID 120 mcr p15, 0, r6, c3, c0, 0 @ Domain ID
121#ifndef CONFIG_ARM_LPAE
246 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) 122 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP)
247 ALT_UP(orr r1, r1, #TTB_FLAGS_UP) 123 ALT_UP(orr r1, r1, #TTB_FLAGS_UP)
124#endif
248 mcr p15, 0, r1, c2, c0, 0 @ TTB 0 125 mcr p15, 0, r1, c2, c0, 0 @ TTB 0
249 mcr p15, 0, r7, c2, c0, 1 @ TTB 1 126 mcr p15, 0, r7, c2, c0, 1 @ TTB 1
250 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 127 mcr p15, 0, r11, c2, c0, 2 @ TTB control register
251 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register 128 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
252 teq r4, r9 @ Is it already set? 129 teq r4, r9 @ Is it already set?
253 mcrne p15, 0, r9, c1, c0, 1 @ No, so write it 130 mcrne p15, 0, r9, c1, c0, 1 @ No, so write it
@@ -284,6 +161,7 @@ __v7_ca5mp_setup:
284__v7_ca9mp_setup: 161__v7_ca9mp_setup:
285 mov r10, #(1 << 0) @ TLB ops broadcasting 162 mov r10, #(1 << 0) @ TLB ops broadcasting
286 b 1f 163 b 1f
164__v7_ca7mp_setup:
287__v7_ca15mp_setup: 165__v7_ca15mp_setup:
288 mov r10, #0 166 mov r10, #0
2891: 1671:
@@ -363,11 +241,13 @@ __v7_setup:
363 orreq r10, r10, #1 << 6 @ set bit #6 241 orreq r10, r10, #1 << 6 @ set bit #6
364 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 242 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
365#endif 243#endif
366#ifdef CONFIG_ARM_ERRATA_751472 244#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
367 cmp r6, #0x30 @ present prior to r3p0 245 ALT_SMP(cmp r6, #0x30) @ present prior to r3p0
246 ALT_UP_B(1f)
368 mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register 247 mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register
369 orrlt r10, r10, #1 << 11 @ set bit #11 248 orrlt r10, r10, #1 << 11 @ set bit #11
370 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register 249 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register
2501:
371#endif 251#endif
372 252
3733: mov r10, #0 2533: mov r10, #0
@@ -377,12 +257,7 @@ __v7_setup:
377 dsb 257 dsb
378#ifdef CONFIG_MMU 258#ifdef CONFIG_MMU
379 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs 259 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
380 mcr p15, 0, r10, c2, c0, 2 @ TTB control register 260 v7_ttb_setup r10, r4, r8, r5 @ TTBCR, TTBRx setup
381 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP)
382 ALT_UP(orr r4, r4, #TTB_FLAGS_UP)
383 ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP)
384 ALT_UP(orr r8, r8, #TTB_FLAGS_UP)
385 mcr p15, 0, r8, c2, c0, 1 @ load TTB1
386 ldr r5, =PRRR @ PRRR 261 ldr r5, =PRRR @ PRRR
387 ldr r6, =NMRR @ NMRR 262 ldr r6, =NMRR @ NMRR
388 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 263 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
@@ -404,16 +279,7 @@ __v7_setup:
404 mov pc, lr @ return to head.S:__ret 279 mov pc, lr @ return to head.S:__ret
405ENDPROC(__v7_setup) 280ENDPROC(__v7_setup)
406 281
407 /* AT 282 .align 2
408 * TFR EV X F I D LR S
409 * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
410 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
411 * 1 0 110 0011 1100 .111 1101 < we want
412 */
413 .type v7_crval, #object
414v7_crval:
415 crval clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
416
417__v7_setup_stack: 283__v7_setup_stack:
418 .space 4 * 11 @ 11 registers 284 .space 4 * 11 @ 11 registers
419 285
@@ -435,11 +301,11 @@ __v7_setup_stack:
435 */ 301 */
436.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0 302.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0
437 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 303 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
438 PMD_FLAGS_SMP | \mm_mmuflags) 304 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags)
439 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 305 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
440 PMD_FLAGS_UP | \mm_mmuflags) 306 PMD_SECT_AF | PMD_FLAGS_UP | \mm_mmuflags)
441 .long PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | \ 307 .long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | \
442 PMD_SECT_AP_READ | \io_mmuflags 308 PMD_SECT_AP_READ | PMD_SECT_AF | \io_mmuflags
443 W(b) \initfunc 309 W(b) \initfunc
444 .long cpu_arch_name 310 .long cpu_arch_name
445 .long cpu_elf_name 311 .long cpu_elf_name
@@ -452,6 +318,7 @@ __v7_setup_stack:
452 .long v7_cache_fns 318 .long v7_cache_fns
453.endm 319.endm
454 320
321#ifndef CONFIG_ARM_LPAE
455 /* 322 /*
456 * ARM Ltd. Cortex A5 processor. 323 * ARM Ltd. Cortex A5 processor.
457 */ 324 */
@@ -463,6 +330,16 @@ __v7_ca5mp_proc_info:
463 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info 330 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
464 331
465 /* 332 /*
333 * ARM Ltd. Cortex A7 processor.
334 */
335 .type __v7_ca7mp_proc_info, #object
336__v7_ca7mp_proc_info:
337 .long 0x410fc070
338 .long 0xff0ffff0
339 __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
340 .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
341
342 /*
466 * ARM Ltd. Cortex A9 processor. 343 * ARM Ltd. Cortex A9 processor.
467 */ 344 */
468 .type __v7_ca9mp_proc_info, #object 345 .type __v7_ca9mp_proc_info, #object
@@ -471,6 +348,7 @@ __v7_ca9mp_proc_info:
471 .long 0xff0ffff0 348 .long 0xff0ffff0
472 __v7_proc __v7_ca9mp_setup 349 __v7_proc __v7_ca9mp_setup
473 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info 350 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
351#endif /* CONFIG_ARM_LPAE */
474 352
475 /* 353 /*
476 * ARM Ltd. Cortex A15 processor. 354 * ARM Ltd. Cortex A15 processor.
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index abf0507a08ae..b0d57869da2d 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -105,6 +105,7 @@ ENTRY(cpu_xsc3_proc_fin)
105 * loc: location to jump to for soft reset 105 * loc: location to jump to for soft reset
106 */ 106 */
107 .align 5 107 .align 5
108 .pushsection .idmap.text, "ax"
108ENTRY(cpu_xsc3_reset) 109ENTRY(cpu_xsc3_reset)
109 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
110 msr cpsr_c, r1 @ reset CPSR 111 msr cpsr_c, r1 @ reset CPSR
@@ -119,6 +120,8 @@ ENTRY(cpu_xsc3_reset)
119 @ already containing those two last instructions to survive. 120 @ already containing those two last instructions to survive.
120 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs 121 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
121 mov pc, r0 122 mov pc, r0
123ENDPROC(cpu_xsc3_reset)
124 .popsection
122 125
123/* 126/*
124 * cpu_xsc3_do_idle() 127 * cpu_xsc3_do_idle()
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 3277904bebaf..4ffebaa595ee 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -142,6 +142,7 @@ ENTRY(cpu_xscale_proc_fin)
142 * Beware PXA270 erratum E7. 142 * Beware PXA270 erratum E7.
143 */ 143 */
144 .align 5 144 .align 5
145 .pushsection .idmap.text, "ax"
145ENTRY(cpu_xscale_reset) 146ENTRY(cpu_xscale_reset)
146 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 147 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
147 msr cpsr_c, r1 @ reset CPSR 148 msr cpsr_c, r1 @ reset CPSR
@@ -160,6 +161,8 @@ ENTRY(cpu_xscale_reset)
160 @ already containing those two last instructions to survive. 161 @ already containing those two last instructions to survive.
161 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 162 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
162 mov pc, r0 163 mov pc, r0
164ENDPROC(cpu_xscale_reset)
165 .popsection
163 166
164/* 167/*
165 * cpu_xscale_do_idle() 168 * cpu_xscale_do_idle()
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index cafa18354339..d18dde95b8aa 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -20,6 +20,8 @@
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/ 21*/
22 22
23#include <asm/opcodes.h>
24
23/* This is the kernel's entry point into the floating point emulator. 25/* This is the kernel's entry point into the floating point emulator.
24It is called from the kernel with code similar to this: 26It is called from the kernel with code similar to this:
25 27
@@ -81,11 +83,11 @@ nwfpe_enter:
81 mov r6, r0 @ save the opcode 83 mov r6, r0 @ save the opcode
82emulate: 84emulate:
83 ldr r1, [sp, #S_PSR] @ fetch the PSR 85 ldr r1, [sp, #S_PSR] @ fetch the PSR
84 bl checkCondition @ check the condition 86 bl arm_check_condition @ check the condition
85 cmp r0, #0 @ r0 = 0 ==> condition failed 87 cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed?
86 88
87 @ if condition code failed to match, next insn 89 @ if condition code failed to match, next insn
88 beq next @ get the next instruction; 90 bne next @ get the next instruction;
89 91
90 mov r0, r6 @ prepare for EmulateAll() 92 mov r0, r6 @ prepare for EmulateAll()
91 bl EmulateAll @ emulate the instruction 93 bl EmulateAll @ emulate the instruction
diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c
index 922b81107585..ff9834673085 100644
--- a/arch/arm/nwfpe/fpopcode.c
+++ b/arch/arm/nwfpe/fpopcode.c
@@ -61,29 +61,3 @@ const float32 float32Constant[] = {
61 0x41200000 /* single 10.0 */ 61 0x41200000 /* single 10.0 */
62}; 62};
63 63
64/* condition code lookup table
65 index into the table is test code: EQ, NE, ... LT, GT, AL, NV
66 bit position in short is condition code: NZCV */
67static const unsigned short aCC[16] = {
68 0xF0F0, // EQ == Z set
69 0x0F0F, // NE
70 0xCCCC, // CS == C set
71 0x3333, // CC
72 0xFF00, // MI == N set
73 0x00FF, // PL
74 0xAAAA, // VS == V set
75 0x5555, // VC
76 0x0C0C, // HI == C set && Z clear
77 0xF3F3, // LS == C clear || Z set
78 0xAA55, // GE == (N==V)
79 0x55AA, // LT == (N!=V)
80 0x0A05, // GT == (!Z && (N==V))
81 0xF5FA, // LE == (Z || (N!=V))
82 0xFFFF, // AL always
83 0 // NV
84};
85
86unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)
87{
88 return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
89}
diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h
index 786e4c96156d..78f02dbfaa8f 100644
--- a/arch/arm/nwfpe/fpopcode.h
+++ b/arch/arm/nwfpe/fpopcode.h
@@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode)
475 return (nRc); 475 return (nRc);
476} 476}
477 477
478extern unsigned int checkCondition(const unsigned int opcode,
479 const unsigned int ccodes);
480
481extern const float64 float64Constant[]; 478extern const float64 float64Constant[];
482extern const float32 float32Constant[]; 479extern const float32 float32Constant[];
483 480
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index c074e66ad224..4e0a371630b3 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
116 return oprofile_perf_init(ops); 116 return oprofile_perf_init(ops);
117} 117}
118 118
119void __exit oprofile_arch_exit(void) 119void oprofile_arch_exit(void)
120{ 120{
121 oprofile_perf_exit(); 121 oprofile_perf_exit();
122} 122}
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 69b09c1cec8b..a99dc15a70f7 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -10,10 +10,10 @@ obj-$(CONFIG_ARCH_IOP32X) += i2c.o
10obj-$(CONFIG_ARCH_IOP32X) += pci.o 10obj-$(CONFIG_ARCH_IOP32X) += pci.o
11obj-$(CONFIG_ARCH_IOP32X) += setup.o 11obj-$(CONFIG_ARCH_IOP32X) += setup.o
12obj-$(CONFIG_ARCH_IOP32X) += time.o 12obj-$(CONFIG_ARCH_IOP32X) += time.o
13obj-$(CONFIG_ARCH_IOP32X) += io.o
14obj-$(CONFIG_ARCH_IOP32X) += cp6.o 13obj-$(CONFIG_ARCH_IOP32X) += cp6.o
15obj-$(CONFIG_ARCH_IOP32X) += adma.o 14obj-$(CONFIG_ARCH_IOP32X) += adma.o
16obj-$(CONFIG_ARCH_IOP32X) += pmu.o 15obj-$(CONFIG_ARCH_IOP32X) += pmu.o
16obj-$(CONFIG_ARCH_IOP32X) += restart.o
17 17
18# IOP33X 18# IOP33X
19obj-$(CONFIG_ARCH_IOP33X) += gpio.o 19obj-$(CONFIG_ARCH_IOP33X) += gpio.o
@@ -21,10 +21,10 @@ obj-$(CONFIG_ARCH_IOP33X) += i2c.o
21obj-$(CONFIG_ARCH_IOP33X) += pci.o 21obj-$(CONFIG_ARCH_IOP33X) += pci.o
22obj-$(CONFIG_ARCH_IOP33X) += setup.o 22obj-$(CONFIG_ARCH_IOP33X) += setup.o
23obj-$(CONFIG_ARCH_IOP33X) += time.o 23obj-$(CONFIG_ARCH_IOP33X) += time.o
24obj-$(CONFIG_ARCH_IOP33X) += io.o
25obj-$(CONFIG_ARCH_IOP33X) += cp6.o 24obj-$(CONFIG_ARCH_IOP33X) += cp6.o
26obj-$(CONFIG_ARCH_IOP33X) += adma.o 25obj-$(CONFIG_ARCH_IOP33X) += adma.o
27obj-$(CONFIG_ARCH_IOP33X) += pmu.o 26obj-$(CONFIG_ARCH_IOP33X) += pmu.o
27obj-$(CONFIG_ARCH_IOP33X) += restart.o
28 28
29# IOP13XX 29# IOP13XX
30obj-$(CONFIG_ARCH_IOP13XX) += cp6.o 30obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c
deleted file mode 100644
index e15bc17db90b..000000000000
--- a/arch/arm/plat-iop/io.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * iop3xx custom ioremap implementation
3 * Copyright (c) 2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/io.h>
22#include <mach/hardware.h>
23
24void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
25 unsigned int mtype)
26{
27 void __iomem * retval;
28
29 switch (cookie) {
30 case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA:
31 retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie);
32 break;
33 case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA:
34 retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie);
35 break;
36 default:
37 retval = __arm_ioremap_caller(cookie, size, mtype,
38 __builtin_return_address(0));
39 }
40
41 return retval;
42}
43EXPORT_SYMBOL(__iop3xx_ioremap);
44
45void __iop3xx_iounmap(void __iomem *addr)
46{
47 extern void __iounmap(volatile void __iomem *addr);
48
49 switch ((u32) addr) {
50 case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA:
51 case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA:
52 goto skip;
53 }
54 __iounmap(addr);
55
56skip:
57 return;
58}
59EXPORT_SYMBOL(__iop3xx_iounmap);
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
new file mode 100644
index 000000000000..6a85a0c502e6
--- /dev/null
+++ b/arch/arm/plat-iop/restart.c
@@ -0,0 +1,19 @@
1/*
2 * restart.c
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/hardware/iop3xx.h>
11#include <mach/hardware.h>
12
13void iop3xx_restart(char mode, const char *cmd)
14{
15 *IOP3XX_PCSR = 0x30;
16
17 /* Jump into ROM at address 0 */
18 soft_restart(0);
19}
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 568dd0223d17..cbfbbe461788 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,7 +18,6 @@
18#include <linux/time.h> 18#include <linux/time.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/timex.h> 20#include <linux/timex.h>
21#include <linux/sched.h>
22#include <linux/io.h> 21#include <linux/io.h>
23#include <linux/clocksource.h> 22#include <linux/clocksource.h>
24#include <linux/clockchips.h> 23#include <linux/clockchips.h>
@@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = {
52 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 51 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
53}; 52};
54 53
55static DEFINE_CLOCK_DATA(cd);
56
57/* 54/*
58 * IOP sched_clock() implementation via its clocksource. 55 * IOP sched_clock() implementation via its clocksource.
59 */ 56 */
60unsigned long long notrace sched_clock(void) 57static u32 notrace iop_read_sched_clock(void)
61{ 58{
62 u32 cyc = 0xffffffffu - read_tcr1(); 59 return 0xffffffffu - read_tcr1();
63 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
64}
65
66static void notrace iop_update_sched_clock(void)
67{
68 u32 cyc = 0xffffffffu - read_tcr1();
69 update_sched_clock(&cd, cyc, (u32)~0);
70} 60}
71 61
72/* 62/*
@@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
152{ 142{
153 u32 timer_ctl; 143 u32 timer_ctl;
154 144
155 init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate); 145 setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
156 146
157 ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); 147 ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
158 iop_tick_rate = tick_rate; 148 iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b3a1f2b3ada3..b30708e28c1d 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7
20 bool "i.MX3, i.MX6" 20 bool "i.MX3, i.MX6"
21 select AUTO_ZRELADDR if !ZBOOT_ROM 21 select AUTO_ZRELADDR if !ZBOOT_ROM
22 select ARM_PATCH_PHYS_VIRT 22 select ARM_PATCH_PHYS_VIRT
23 select MIGHT_HAVE_CACHE_L2X0
23 help 24 help
24 This enables support for systems based on the Freescale i.MX3 and i.MX6 25 This enables support for systems based on the Freescale i.MX3 and i.MX6
25 family. 26 family.
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index b9f0f5f499a4..076db84f3e31 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,7 +5,6 @@
5# Common support 5# Common support
6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o 6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
7 7
8obj-$(CONFIG_ARM_GIC) += gic.o
9obj-$(CONFIG_MXC_TZIC) += tzic.o 8obj-$(CONFIG_MXC_TZIC) += tzic.o
10obj-$(CONFIG_MXC_AVIC) += avic.o 9obj-$(CONFIG_MXC_AVIC) += avic.o
11 10
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index adbff706ef6f..73db34bf588a 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
98 return ret; 98 return ret;
99} 99}
100 100
101static int __init mxc_cpufreq_init(struct cpufreq_policy *policy) 101static int mxc_cpufreq_init(struct cpufreq_policy *policy)
102{ 102{
103 int ret; 103 int ret;
104 int i; 104 int i;
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
deleted file mode 100644
index 12f8f8109010..000000000000
--- a/arch/arm/plat-mxc/gic.c
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/io.h>
14#include <asm/exception.h>
15#include <asm/localtimer.h>
16#include <asm/hardware/gic.h>
17#ifdef CONFIG_SMP
18#include <asm/smp.h>
19#endif
20
21asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
22{
23 u32 irqstat, irqnr;
24
25 do {
26 irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
27 irqnr = irqstat & 0x3ff;
28 if (irqnr == 1023)
29 break;
30
31 if (irqnr > 15 && irqnr < 1021)
32 handle_IRQ(irqnr, regs);
33#ifdef CONFIG_SMP
34 else {
35 writel_relaxed(irqstat, gic_cpu_base_addr +
36 GIC_CPU_EOI);
37 handle_IPI(irqnr, regs);
38 }
39#endif
40 } while (1);
41}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index c75f254abd85..83cca9bcfc97 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void);
71extern struct platform_device *mxc_register_gpio(char *name, int id, 71extern struct platform_device *mxc_register_gpio(char *name, int id,
72 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 72 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
73extern void mxc_set_cpu_type(unsigned int type); 73extern void mxc_set_cpu_type(unsigned int type);
74extern void mxc_restart(char, const char *);
74extern void mxc_arch_reset_init(void __iomem *); 75extern void mxc_arch_reset_init(void __iomem *);
75extern void mx51_efikamx_reset(void);
76extern int mx53_revision(void); 76extern int mx53_revision(void);
77extern int mx53_display_revision(void); 77extern int mx53_display_revision(void);
78 78
@@ -89,7 +89,6 @@ extern void imx_print_silicon_rev(const char *cpu, int srev);
89 89
90void avic_handle_irq(struct pt_regs *); 90void avic_handle_irq(struct pt_regs *);
91void tzic_handle_irq(struct pt_regs *); 91void tzic_handle_irq(struct pt_regs *);
92void gic_handle_irq(struct pt_regs *);
93 92
94#define imx1_handle_irq avic_handle_irq 93#define imx1_handle_irq avic_handle_irq
95#define imx21_handle_irq avic_handle_irq 94#define imx21_handle_irq avic_handle_irq
@@ -122,6 +121,7 @@ static inline void imx_smp_prepare(void) {}
122extern void imx_enable_cpu(int cpu, bool enable); 121extern void imx_enable_cpu(int cpu, bool enable);
123extern void imx_set_cpu_jump(int cpu, void *jump_addr); 122extern void imx_set_cpu_jump(int cpu, void *jump_addr);
124extern void imx_src_init(void); 123extern void imx_src_init(void);
124extern void imx_src_prepare_restart(void);
125extern void imx_gpc_init(void); 125extern void imx_gpc_init(void);
126extern void imx_gpc_pre_suspend(void); 126extern void imx_gpc_pre_suspend(void);
127extern void imx_gpc_post_resume(void); 127extern void imx_gpc_post_resume(void);
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index ca5cf26a04b1..def5d30cb67e 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,19 +9,8 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
13
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 .endm
25
26 .macro test_for_ipi, irqnr, irqstat, base, tmp
27 .endm
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 97b19e7800bc..2b7c08d13e89 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -12,8 +12,6 @@
12#ifndef __MACH_MX1_H__ 12#ifndef __MACH_MX1_H__
13#define __MACH_MX1_H__ 13#define __MACH_MX1_H__
14 14
15#include <mach/vmalloc.h>
16
17/* 15/*
18 * Memory map 16 * Memory map
19 */ 17 */
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index b9895d250167..13ad0df2e860 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
22 cpu_do_idle(); 22 cpu_do_idle();
23} 23}
24 24
25void arch_reset(char mode, const char *cmd);
26
27#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ 25#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 88fd40452567..477971b00930 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
98 case MACH_TYPE_PCM043: 98 case MACH_TYPE_PCM043:
99 case MACH_TYPE_LILLY1131: 99 case MACH_TYPE_LILLY1131:
100 case MACH_TYPE_VPR200: 100 case MACH_TYPE_VPR200:
101 case MACH_TYPE_EUKREA_CPUIMX35SD:
101 uart_base = MX3X_UART1_BASE_ADDR; 102 uart_base = MX3X_UART1_BASE_ADDR;
102 break; 103 break;
103 case MACH_TYPE_MAGX_ZN5: 104 case MACH_TYPE_MAGX_ZN5:
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
deleted file mode 100644
index ef6379c474be..000000000000
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2000 Russell King.
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_MXC_VMALLOC_H__
17#define __ASM_ARCH_MXC_VMALLOC_H__
18
19/* vmalloc ending address */
20#define VMALLOC_END 0xf4000000UL
21
22#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 845de59f07ed..e032717f7d02 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 do_div(c, period_ns); 77 do_div(c, period_ns);
78 duty_cycles = c; 78 duty_cycles = c;
79 79
80 /*
81 * according to imx pwm RM, the real period value should be
82 * PERIOD value in PWMPR plus 2.
83 */
84 if (period_cycles > 2)
85 period_cycles -= 2;
86 else
87 period_cycles = 0;
88
80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 89 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 90 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
82 91
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index d65fb31a55ca..3599bf2cfd4f 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -37,17 +37,10 @@ static void __iomem *wdog_base;
37/* 37/*
38 * Reset the system. It is called by machine_restart(). 38 * Reset the system. It is called by machine_restart().
39 */ 39 */
40void arch_reset(char mode, const char *cmd) 40void mxc_restart(char mode, const char *cmd)
41{ 41{
42 unsigned int wcr_enable; 42 unsigned int wcr_enable;
43 43
44#ifdef CONFIG_MACH_MX51_EFIKAMX
45 if (machine_is_mx51_efikamx()) {
46 mx51_efikamx_reset();
47 return;
48 }
49#endif
50
51 if (cpu_is_mx1()) { 44 if (cpu_is_mx1()) {
52 wcr_enable = (1 << 0); 45 wcr_enable = (1 << 0);
53 } else { 46 } else {
@@ -71,7 +64,7 @@ void arch_reset(char mode, const char *cmd)
71 mdelay(50); 64 mdelay(50);
72 65
73 /* we'll take a jump through zero as a poor second */ 66 /* we'll take a jump through zero as a poor second */
74 cpu_reset(0); 67 soft_restart(0);
75} 68}
76 69
77void mxc_arch_reset_init(void __iomem *base) 70void mxc_arch_reset_init(void __iomem *base)
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 4b0fe285e83c..1c96cdb4c35e 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void)
108 108
109static void __iomem *sched_clock_reg; 109static void __iomem *sched_clock_reg;
110 110
111static DEFINE_CLOCK_DATA(cd); 111static u32 notrace mxc_read_sched_clock(void)
112unsigned long long notrace sched_clock(void)
113{ 112{
114 cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; 113 return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
115
116 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
117}
118
119static void notrace mxc_update_sched_clock(void)
120{
121 cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
122 update_sched_clock(&cd, cyc, (u32)~0);
123} 114}
124 115
125static int __init mxc_clocksource_init(struct clk *timer_clk) 116static int __init mxc_clocksource_init(struct clk *timer_clk)
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
129 120
130 sched_clock_reg = reg; 121 sched_clock_reg = reg;
131 122
132 init_sched_clock(&cd, mxc_update_sched_clock, 32, c); 123 setup_sched_clock(mxc_read_sched_clock, 32, c);
133 return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, 124 return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
134 clocksource_mmio_readl_up); 125 clocksource_mmio_readl_up);
135} 126}
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 30b6433d910d..ad1b45b605a4 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -17,7 +17,6 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/jiffies.h> 18#include <linux/jiffies.h>
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/sched.h>
21#include <asm/mach/time.h> 20#include <asm/mach/time.h>
22#include <asm/sched_clock.h> 21#include <asm/sched_clock.h>
23 22
@@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */
79 * local implementation which uses the clocksource to get some 78 * local implementation which uses the clocksource to get some
80 * better resolution when scheduling the kernel. 79 * better resolution when scheduling the kernel.
81 */ 80 */
82static DEFINE_CLOCK_DATA(cd); 81static u32 notrace nomadik_read_sched_clock(void)
83
84unsigned long long notrace sched_clock(void)
85{ 82{
86 u32 cyc;
87
88 if (unlikely(!mtu_base)) 83 if (unlikely(!mtu_base))
89 return 0; 84 return 0;
90 85
91 cyc = -readl(mtu_base + MTU_VAL(0)); 86 return -readl(mtu_base + MTU_VAL(0));
92 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
93}
94
95static void notrace nomadik_update_sched_clock(void)
96{
97 u32 cyc = -readl(mtu_base + MTU_VAL(0));
98 update_sched_clock(&cd, cyc, (u32)~0);
99} 87}
100#endif 88#endif
101 89
@@ -231,9 +219,11 @@ void __init nmdk_timer_init(void)
231 rate, 200, 32, clocksource_mmio_readl_down)) 219 rate, 200, 32, clocksource_mmio_readl_down))
232 pr_err("timer: failed to initialize clock source %s\n", 220 pr_err("timer: failed to initialize clock source %s\n",
233 "mtu_0"); 221 "mtu_0");
222
234#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK 223#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
235 init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); 224 setup_sched_clock(nomadik_read_sched_clock, 32, rate);
236#endif 225#endif
226
237 /* Timer 1 is used for events */ 227 /* Timer 1 is used for events */
238 228
239 clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); 229 clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 985262242f25..3df04d944e4d 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ 6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
7 usb.o fb.o io.o counter_32k.o 7 usb.o fb.o counter_32k.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d9f10a31e604..2ee6341fffdb 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/dma-mapping.h>
17#include <linux/omapfb.h> 18#include <linux/omapfb.h>
18 19
19#include <plat/common.h> 20#include <plat/common.h>
@@ -66,3 +67,10 @@ void __init omap_reserve(void)
66 omap_vram_reserve_sdram_memblock(); 67 omap_vram_reserve_sdram_memblock();
67 omap_dsp_reserve_sdram_memblock(); 68 omap_dsp_reserve_sdram_memblock();
68} 69}
70
71void __init omap_init_consistent_dma_size(void)
72{
73#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
74 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
75#endif
76}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb712da51..5f0f2292b7fb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -17,7 +17,6 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/sched.h>
21#include <linux/clocksource.h> 20#include <linux/clocksource.h>
22 21
23#include <asm/sched_clock.h> 22#include <asm/sched_clock.h>
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base;
37 36
38#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 37#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
39 38
40/* 39static u32 notrace omap_32k_read_sched_clock(void)
41 * Returns current time from boot in nsecs. It's OK for this to wrap
42 * around for now, as it's just a relative time stamp.
43 */
44static DEFINE_CLOCK_DATA(cd);
45
46/*
47 * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
48 * This gives a resolution of about 30us and a wrap period of about 36hrs.
49 */
50#define SC_MULT 4000000000u
51#define SC_SHIFT 17
52
53static inline unsigned long long notrace _omap_32k_sched_clock(void)
54{
55 u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
56 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
57}
58
59#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
60unsigned long long notrace sched_clock(void)
61{
62 return _omap_32k_sched_clock();
63}
64#else
65unsigned long long notrace omap_32k_sched_clock(void)
66{
67 return _omap_32k_sched_clock();
68}
69#endif
70
71static void notrace omap_update_sched_clock(void)
72{ 40{
73 u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; 41 return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
74 update_sched_clock(&cd, cyc, (u32)~0);
75} 42}
76 43
77/** 44/**
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void)
147 clocksource_mmio_readl_up)) 114 clocksource_mmio_readl_up))
148 printk(err, "32k_counter"); 115 printk(err, "32k_counter");
149 116
150 init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, 117 setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
151 32768, SC_MULT, SC_SHIFT);
152 } 118 }
153 return 0; 119 return 0;
154} 120}
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 3ff3e36580f2..b4d7ec3fbfbe 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -27,97 +27,14 @@
27#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H 27#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
28#define __ARCH_ARM_MACH_OMAP_COMMON_H 28#define __ARCH_ARM_MACH_OMAP_COMMON_H
29 29
30#include <linux/delay.h>
31
32#include <plat/i2c.h> 30#include <plat/i2c.h>
33#include <plat/omap_hwmod.h> 31#include <plat/omap_hwmod.h>
34 32
35struct sys_timer;
36
37extern void omap_map_common_io(void);
38extern struct sys_timer omap1_timer;
39extern struct sys_timer omap2_timer;
40extern struct sys_timer omap3_timer;
41extern struct sys_timer omap3_secure_timer;
42extern struct sys_timer omap4_timer;
43extern bool omap_32k_timer_init(void);
44extern int __init omap_init_clocksource_32k(void); 33extern int __init omap_init_clocksource_32k(void);
45extern unsigned long long notrace omap_32k_sched_clock(void);
46 34
47extern void omap_reserve(void); 35extern void omap_reserve(void);
48
49void omap2420_init_early(void);
50void omap2430_init_early(void);
51void omap3430_init_early(void);
52void omap35xx_init_early(void);
53void omap3630_init_early(void);
54void omap3_init_early(void); /* Do not use this one */
55void am35xx_init_early(void);
56void ti816x_init_early(void);
57void omap4430_init_early(void);
58
59extern int omap_dss_reset(struct omap_hwmod *); 36extern int omap_dss_reset(struct omap_hwmod *);
60 37
61void omap_sram_init(void); 38void omap_sram_init(void);
62 39
63/*
64 * IO bases for various OMAP processors
65 * Except the tap base, rest all the io bases
66 * listed are physical addresses.
67 */
68struct omap_globals {
69 u32 class; /* OMAP class to detect */
70 void __iomem *tap; /* Control module ID code */
71 void __iomem *sdrc; /* SDRAM Controller */
72 void __iomem *sms; /* SDRAM Memory Scheduler */
73 void __iomem *ctrl; /* System Control Module */
74 void __iomem *ctrl_pad; /* PAD Control Module */
75 void __iomem *prm; /* Power and Reset Management */
76 void __iomem *cm; /* Clock Management */
77 void __iomem *cm2;
78};
79
80void omap2_set_globals_242x(void);
81void omap2_set_globals_243x(void);
82void omap2_set_globals_3xxx(void);
83void omap2_set_globals_443x(void);
84void omap2_set_globals_ti816x(void);
85
86/* These get called from omap2_set_globals_xxxx(), do not call these */
87void omap2_set_globals_tap(struct omap_globals *);
88void omap2_set_globals_sdrc(struct omap_globals *);
89void omap2_set_globals_control(struct omap_globals *);
90void omap2_set_globals_prcm(struct omap_globals *);
91
92void omap242x_map_io(void);
93void omap243x_map_io(void);
94void omap3_map_io(void);
95void omap4_map_io(void);
96
97
98/**
99 * omap_test_timeout - busy-loop, testing a condition
100 * @cond: condition to test until it evaluates to true
101 * @timeout: maximum number of microseconds in the timeout
102 * @index: loop index (integer)
103 *
104 * Loop waiting for @cond to become true or until at least @timeout
105 * microseconds have passed. To use, define some integer @index in the
106 * calling code. After running, if @index == @timeout, then the loop has
107 * timed out.
108 */
109#define omap_test_timeout(cond, timeout, index) \
110({ \
111 for (index = 0; index < timeout; index++) { \
112 if (cond) \
113 break; \
114 udelay(1); \
115 } \
116})
117
118extern struct device *omap2_get_mpuss_device(void);
119extern struct device *omap2_get_iva_device(void);
120extern struct device *omap2_get_l3_device(void);
121extern struct device *omap4_get_dsp_device(void);
122
123#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 40#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 7f2969eadb85..1234944a4da0 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -247,8 +247,6 @@
247 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 247 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
248 */ 248 */
249 249
250void omap_ioremap_init(void);
251
252extern u8 omap_readb(u32 pa); 250extern u8 omap_readb(u32 pa);
253extern u16 omap_readw(u32 pa); 251extern u16 omap_readw(u32 pa);
254extern u32 omap_readl(u32 pa); 252extern u32 omap_readl(u32 pa);
@@ -257,83 +255,9 @@ extern void omap_writew(u16 v, u32 pa);
257extern void omap_writel(u32 v, u32 pa); 255extern void omap_writel(u32 v, u32 pa);
258 256
259struct omap_sdrc_params; 257struct omap_sdrc_params;
260
261#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
262void omap7xx_map_io(void);
263#else
264static inline void omap_map_io(void)
265{
266}
267#endif
268
269#ifdef CONFIG_ARCH_OMAP15XX
270void omap15xx_map_io(void);
271#else
272static inline void omap15xx_map_io(void)
273{
274}
275#endif
276
277#ifdef CONFIG_ARCH_OMAP16XX
278void omap16xx_map_io(void);
279#else
280static inline void omap16xx_map_io(void)
281{
282}
283#endif
284
285void omap1_init_early(void);
286
287#ifdef CONFIG_SOC_OMAP2420
288extern void omap242x_map_common_io(void);
289#else
290static inline void omap242x_map_common_io(void)
291{
292}
293#endif
294
295#ifdef CONFIG_SOC_OMAP2430
296extern void omap243x_map_common_io(void);
297#else
298static inline void omap243x_map_common_io(void)
299{
300}
301#endif
302
303#ifdef CONFIG_ARCH_OMAP3
304extern void omap34xx_map_common_io(void);
305#else
306static inline void omap34xx_map_common_io(void)
307{
308}
309#endif
310
311#ifdef CONFIG_SOC_OMAPTI816X
312extern void omapti816x_map_common_io(void);
313#else
314static inline void omapti816x_map_common_io(void)
315{
316}
317#endif
318
319#ifdef CONFIG_ARCH_OMAP4
320extern void omap44xx_map_common_io(void);
321#else
322static inline void omap44xx_map_common_io(void)
323{
324}
325#endif
326
327extern void omap2_init_common_infrastructure(void);
328extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 258extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
329 struct omap_sdrc_params *sdrc_cs1); 259 struct omap_sdrc_params *sdrc_cs1);
330 260
331#define __arch_ioremap omap_ioremap
332#define __arch_iounmap omap_iounmap
333
334void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
335void omap_iounmap(volatile void __iomem *addr);
336
337extern void __init omap_init_consistent_dma_size(void); 261extern void __init omap_init_consistent_dma_size(void);
338 262
339#endif 263#endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 6e5d3a0cb9d5..2efd6454bce0 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -436,20 +436,6 @@
436#define INTCPS_NR_MIR_REGS 3 436#define INTCPS_NR_MIR_REGS 3
437#define INTCPS_NR_IRQS 96 437#define INTCPS_NR_IRQS 96
438 438
439#ifndef __ASSEMBLY__
440extern void __iomem *omap_irq_base;
441void omap1_init_irq(void);
442void omap2_init_irq(void);
443void omap3_init_irq(void);
444void ti816x_init_irq(void);
445extern int omap_irq_pending(void);
446void omap_intc_save_context(void);
447void omap_intc_restore_context(void);
448void omap3_intc_suspend(void);
449void omap3_intc_prepare_idle(void);
450void omap3_intc_resume_idle(void);
451#endif
452
453#include <mach/hardware.h> 439#include <mach/hardware.h>
454 440
455#ifdef CONFIG_FIQ 441#ifdef CONFIG_FIQ
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c5fa9e929009..8e5ebd74b129 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -12,6 +12,4 @@ static inline void arch_idle(void)
12 cpu_do_idle(); 12 cpu_do_idle();
13} 13}
14 14
15extern void (*arch_reset)(char, const char *);
16
17#endif 15#endif
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
deleted file mode 100644
index 333871f59995..000000000000
--- a/arch/arm/plat-omap/io.c
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * Common io.c file
3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
4 *
5 * Copyright (C) 2009 Texas Instruments
6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/io.h>
14#include <linux/mm.h>
15#include <linux/dma-mapping.h>
16
17#include <plat/omap7xx.h>
18#include <plat/omap1510.h>
19#include <plat/omap16xx.h>
20#include <plat/omap24xx.h>
21#include <plat/omap34xx.h>
22#include <plat/omap44xx.h>
23
24#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
25#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
26
27static int initialized;
28
29/*
30 * Intercept ioremap() requests for addresses in our fixed mapping regions.
31 */
32void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
33{
34
35 WARN(!initialized, "Do not use ioremap before init_early\n");
36
37#ifdef CONFIG_ARCH_OMAP1
38 if (cpu_class_is_omap1()) {
39 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
40 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
41 }
42 if (cpu_is_omap7xx()) {
43 if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
44 return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
45
46 if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
47 return XLATE(p, OMAP7XX_DSPREG_BASE,
48 OMAP7XX_DSPREG_START);
49 }
50 if (cpu_is_omap15xx()) {
51 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
52 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
53
54 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
55 return XLATE(p, OMAP1510_DSPREG_BASE,
56 OMAP1510_DSPREG_START);
57 }
58 if (cpu_is_omap16xx()) {
59 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
60 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
61
62 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
63 return XLATE(p, OMAP16XX_DSPREG_BASE,
64 OMAP16XX_DSPREG_START);
65 }
66#endif
67#ifdef CONFIG_ARCH_OMAP2
68 if (cpu_is_omap24xx()) {
69 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
70 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
71 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
72 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
73 }
74 if (cpu_is_omap2420()) {
75 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
76 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
77 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
78 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
79 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
80 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
81 }
82 if (cpu_is_omap2430()) {
83 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
84 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
85 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
86 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
87 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
88 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
89 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
90 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
91 }
92#endif
93#ifdef CONFIG_ARCH_OMAP3
94 if (cpu_is_ti816x()) {
95 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
96 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
97 } else if (cpu_is_omap34xx()) {
98 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
99 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
100 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
101 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
102 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
103 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
104 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
105 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
106 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
107 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
108 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
109 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
110 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
111 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
112 }
113#endif
114#ifdef CONFIG_ARCH_OMAP4
115 if (cpu_is_omap44xx()) {
116 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
117 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
118 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
119 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
120 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
121 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
122 if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
123 return XLATE(p, OMAP44XX_EMIF1_PHYS, \
124 OMAP44XX_EMIF1_VIRT);
125 if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
126 return XLATE(p, OMAP44XX_EMIF2_PHYS, \
127 OMAP44XX_EMIF2_VIRT);
128 if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
129 return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
130 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
131 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
132 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
133 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
134 }
135#endif
136 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
137}
138EXPORT_SYMBOL(omap_ioremap);
139
140void omap_iounmap(volatile void __iomem *addr)
141{
142 unsigned long virt = (unsigned long)addr;
143
144 if (virt >= VMALLOC_START && virt < VMALLOC_END)
145 __iounmap(addr);
146}
147EXPORT_SYMBOL(omap_iounmap);
148
149void __init omap_init_consistent_dma_size(void)
150{
151#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
152 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
153#endif
154}
155
156void __init omap_ioremap_init(void)
157{
158 initialized++;
159}
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 41ab97ebe4cf..10d160888133 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
384 struct orion_gpio_chip *ochip; 384 struct orion_gpio_chip *ochip;
385 struct irq_chip_generic *gc; 385 struct irq_chip_generic *gc;
386 struct irq_chip_type *ct; 386 struct irq_chip_type *ct;
387 char gc_label[16];
387 388
388 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) 389 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
389 return; 390 return;
390 391
392 snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
393 orion_gpio_chip_count);
394
391 ochip = orion_gpio_chips + orion_gpio_chip_count; 395 ochip = orion_gpio_chips + orion_gpio_chip_count;
392 ochip->chip.label = "orion_gpio"; 396 ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
393 ochip->chip.request = orion_gpio_request; 397 ochip->chip.request = orion_gpio_request;
394 ochip->chip.direction_input = orion_gpio_direction_input; 398 ochip->chip.direction_input = orion_gpio_direction_input;
395 ochip->chip.get = orion_gpio_get; 399 ochip->chip.get = orion_gpio_get;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a61367e4b8..1ed8d1397fcf 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -12,7 +12,6 @@
12 */ 12 */
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/timer.h> 15#include <linux/timer.h>
17#include <linux/clockchips.h> 16#include <linux/clockchips.h>
18#include <linux/interrupt.h> 17#include <linux/interrupt.h>
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy;
60 * Orion's sched_clock implementation. It has a resolution of 59 * Orion's sched_clock implementation. It has a resolution of
61 * at least 7.5ns (133MHz TCLK). 60 * at least 7.5ns (133MHz TCLK).
62 */ 61 */
63static DEFINE_CLOCK_DATA(cd);
64 62
65unsigned long long notrace sched_clock(void) 63static u32 notrace orion_read_sched_clock(void)
66{ 64{
67 u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); 65 return ~readl(timer_base + TIMER0_VAL_OFF);
68 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
69}
70
71
72static void notrace orion_update_sched_clock(void)
73{
74 u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
75 update_sched_clock(&cd, cyc, (u32)~0);
76}
77
78static void __init setup_sched_clock(unsigned long tclk)
79{
80 init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
81} 66}
82 67
83/* 68/*
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
217 /* 202 /*
218 * Set scale and timer for sched_clock. 203 * Set scale and timer for sched_clock.
219 */ 204 */
220 setup_sched_clock(tclk); 205 setup_sched_clock(orion_read_sched_clock, 32, tclk);
221 206
222 /* 207 /*
223 * Setup free-running clocksource timer (interrupts 208 * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 3c6335307fb1..1121df13e15f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
192 return __raw_readl(S3C2410_GSTATUS1); 192 return __raw_readl(S3C2410_GSTATUS1);
193} 193}
194 194
195/* Hook for arm_pm_restart to ensure we execute the reset code
196 * with the caches enabled. It seems at least the S3C2440 has a problem
197 * resetting if there is bus activity interrupted by the reset.
198 */
199static void s3c24xx_pm_restart(char mode, const char *cmd)
200{
201 if (mode != 's') {
202 unsigned long flags;
203
204 local_irq_save(flags);
205 __cpuc_flush_kern_all();
206 __cpuc_flush_user_all();
207
208 arch_reset(mode, cmd);
209 local_irq_restore(flags);
210 }
211
212 /* fallback, or unhandled */
213 arm_machine_restart(mode, cmd);
214}
215
216void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) 195void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
217{ 196{
218 /* initialise the io descriptors we need for initialisation */ 197 /* initialise the io descriptors we need for initialisation */
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
226 } 205 }
227 s3c24xx_init_cpu(); 206 s3c24xx_init_cpu();
228 207
229 arm_pm_restart = s3c24xx_pm_restart;
230
231 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 208 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
232} 209}
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 53754bcf15a7..9fe35348e03b 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1437,11 +1437,10 @@ int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel)
1437 size_t map_sz = sizeof(*nmap) * sel->map_size; 1437 size_t map_sz = sizeof(*nmap) * sel->map_size;
1438 int ptr; 1438 int ptr;
1439 1439
1440 nmap = kmalloc(map_sz, GFP_KERNEL); 1440 nmap = kmemdup(sel->map, map_sz, GFP_KERNEL);
1441 if (nmap == NULL) 1441 if (nmap == NULL)
1442 return -ENOMEM; 1442 return -ENOMEM;
1443 1443
1444 memcpy(nmap, sel->map, map_sz);
1445 memcpy(&dma_sel, sel, sizeof(*sel)); 1444 memcpy(&dma_sel, sel, sizeof(*sel));
1446 1445
1447 dma_sel.map = nmap; 1446 dma_sel.map = nmap;
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9b9968fa8695..8167ce66188c 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -11,6 +11,7 @@ config PLAT_S5P
11 default y 11 default y
12 select ARM_VIC if !ARCH_EXYNOS4 12 select ARM_VIC if !ARCH_EXYNOS4
13 select ARM_GIC if ARCH_EXYNOS4 13 select ARM_GIC if ARCH_EXYNOS4
14 select GIC_NON_BANKED if ARCH_EXYNOS4
14 select NO_IOPORT 15 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB 16 select ARCH_REQUIRE_GPIOLIB
16 select S3C_GPIO_TRACK 17 select S3C_GPIO_TRACK
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 876344038b8d..30d8c3016e6b 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -13,7 +13,6 @@ obj- :=
13# Core files 13# Core files
14 14
15obj-y += dev-uart.o 15obj-y += dev-uart.o
16obj-y += cpu.o
17obj-y += clock.o 16obj-y += clock.o
18obj-y += irq.o 17obj-y += irq.o
19obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o 18obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
deleted file mode 100644
index a56959e83516..000000000000
--- a/arch/arm/plat-s5p/cpu.c
+++ /dev/null
@@ -1,144 +0,0 @@
1/* linux/arch/arm/plat-s5p/cpu.c
2 *
3 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P CPU Support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18
19#include <mach/map.h>
20#include <mach/regs-clock.h>
21
22#include <plat/cpu.h>
23#include <plat/s5p6440.h>
24#include <plat/s5p6450.h>
25#include <plat/s5pc100.h>
26#include <plat/s5pv210.h>
27#include <plat/exynos4.h>
28
29/* table of supported CPUs */
30
31static const char name_s5p6440[] = "S5P6440";
32static const char name_s5p6450[] = "S5P6450";
33static const char name_s5pc100[] = "S5PC100";
34static const char name_s5pv210[] = "S5PV210/S5PC110";
35static const char name_exynos4210[] = "EXYNOS4210";
36static const char name_exynos4212[] = "EXYNOS4212";
37static const char name_exynos4412[] = "EXYNOS4412";
38
39static struct cpu_table cpu_ids[] __initdata = {
40 {
41 .idcode = S5P6440_CPU_ID,
42 .idmask = S5P64XX_CPU_MASK,
43 .map_io = s5p6440_map_io,
44 .init_clocks = s5p6440_init_clocks,
45 .init_uarts = s5p6440_init_uarts,
46 .init = s5p64x0_init,
47 .name = name_s5p6440,
48 }, {
49 .idcode = S5P6450_CPU_ID,
50 .idmask = S5P64XX_CPU_MASK,
51 .map_io = s5p6450_map_io,
52 .init_clocks = s5p6450_init_clocks,
53 .init_uarts = s5p6450_init_uarts,
54 .init = s5p64x0_init,
55 .name = name_s5p6450,
56 }, {
57 .idcode = S5PC100_CPU_ID,
58 .idmask = S5PC100_CPU_MASK,
59 .map_io = s5pc100_map_io,
60 .init_clocks = s5pc100_init_clocks,
61 .init_uarts = s5pc100_init_uarts,
62 .init = s5pc100_init,
63 .name = name_s5pc100,
64 }, {
65 .idcode = S5PV210_CPU_ID,
66 .idmask = S5PV210_CPU_MASK,
67 .map_io = s5pv210_map_io,
68 .init_clocks = s5pv210_init_clocks,
69 .init_uarts = s5pv210_init_uarts,
70 .init = s5pv210_init,
71 .name = name_s5pv210,
72 }, {
73 .idcode = EXYNOS4210_CPU_ID,
74 .idmask = EXYNOS4_CPU_MASK,
75 .map_io = exynos4_map_io,
76 .init_clocks = exynos4_init_clocks,
77 .init_uarts = exynos4_init_uarts,
78 .init = exynos_init,
79 .name = name_exynos4210,
80 }, {
81 .idcode = EXYNOS4212_CPU_ID,
82 .idmask = EXYNOS4_CPU_MASK,
83 .map_io = exynos4_map_io,
84 .init_clocks = exynos4_init_clocks,
85 .init_uarts = exynos4_init_uarts,
86 .init = exynos_init,
87 .name = name_exynos4212,
88 }, {
89 .idcode = EXYNOS4412_CPU_ID,
90 .idmask = EXYNOS4_CPU_MASK,
91 .map_io = exynos4_map_io,
92 .init_clocks = exynos4_init_clocks,
93 .init_uarts = exynos4_init_uarts,
94 .init = exynos_init,
95 .name = name_exynos4412,
96 },
97};
98
99/* minimal IO mapping */
100
101static struct map_desc s5p_iodesc[] __initdata = {
102 {
103 .virtual = (unsigned long)S5P_VA_CHIPID,
104 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
105 .length = SZ_4K,
106 .type = MT_DEVICE,
107 }, {
108 .virtual = (unsigned long)S3C_VA_SYS,
109 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
110 .length = SZ_64K,
111 .type = MT_DEVICE,
112 }, {
113 .virtual = (unsigned long)S3C_VA_TIMER,
114 .pfn = __phys_to_pfn(S5P_PA_TIMER),
115 .length = SZ_16K,
116 .type = MT_DEVICE,
117 }, {
118 .virtual = (unsigned long)S3C_VA_WATCHDOG,
119 .pfn = __phys_to_pfn(S3C_PA_WDT),
120 .length = SZ_4K,
121 .type = MT_DEVICE,
122 }, {
123 .virtual = (unsigned long)S5P_VA_SROMC,
124 .pfn = __phys_to_pfn(S5P_PA_SROMC),
125 .length = SZ_4K,
126 .type = MT_DEVICE,
127 },
128};
129
130/* read cpu identification code */
131
132void __init s5p_init_io(struct map_desc *mach_desc,
133 int size, void __iomem *cpuid_addr)
134{
135 /* initialize the io descriptors we need for initialization */
136 iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
137 if (mach_desc)
138 iotable_init(mach_desc, size);
139
140 /* detect cpu id and rev. */
141 s5p_init_cpu(cpuid_addr);
142
143 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
144}
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index c833e7b57599..17c0a2c58dfd 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -10,7 +10,6 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <linux/sched.h>
14#include <linux/interrupt.h> 13#include <linux/interrupt.h>
15#include <linux/irq.h> 14#include <linux/irq.h>
16#include <linux/err.h> 15#include <linux/err.h>
@@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void)
321 * this wraps around for now, since it is just a relative time 320 * this wraps around for now, since it is just a relative time
322 * stamp. (Inspired by U300 implementation.) 321 * stamp. (Inspired by U300 implementation.)
323 */ 322 */
324static DEFINE_CLOCK_DATA(cd); 323static u32 notrace s5p_read_sched_clock(void)
325
326unsigned long long notrace sched_clock(void)
327{ 324{
328 void __iomem *reg = s5p_timer_reg(); 325 void __iomem *reg = s5p_timer_reg();
329 326
330 if (!reg) 327 if (!reg)
331 return 0; 328 return 0;
332 329
333 return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); 330 return ~__raw_readl(reg);
334}
335
336static void notrace s5p_update_sched_clock(void)
337{
338 void __iomem *reg = s5p_timer_reg();
339
340 if (!reg)
341 return;
342
343 update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
344} 331}
345 332
346static void __init s5p_clocksource_init(void) 333static void __init s5p_clocksource_init(void)
@@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void)
358 s5p_time_setup(timer_source.source_id, TCNT_MAX); 345 s5p_time_setup(timer_source.source_id, TCNT_MAX);
359 s5p_time_start(timer_source.source_id, PERIODIC); 346 s5p_time_start(timer_source.source_id, PERIODIC);
360 347
361 init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); 348 setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
362 349
363 if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer", 350 if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
364 clock_rate, 250, 32, clocksource_mmio_readl_down)) 351 clock_rate, 250, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index dac4760c0f0a..95509d8eb140 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
202extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); 202extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
203extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); 203extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
204 204
205extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
206 struct s3c_cpufreq_config *cfg,
207 union s3c_iobank *iob);
208
209extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
210 struct s3c_cpufreq_config *cfg,
211 union s3c_iobank *iob);
212
213#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS 205#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
214#define s3c_cpufreq_debugfs_call(x) x 206#define s3c_cpufreq_debugfs_call(x) x
215#else 207#else
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
226extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); 218extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
227 219
228#ifdef CONFIG_S3C2410_IOTIMING 220#ifdef CONFIG_S3C2410_IOTIMING
221extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
222 struct s3c_cpufreq_config *cfg,
223 union s3c_iobank *iob);
224
229extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, 225extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
230 struct s3c_iotimings *iot); 226 struct s3c_iotimings *iot);
231 227
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
235extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, 231extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
236 struct s3c_iotimings *iot); 232 struct s3c_iotimings *iot);
237#else 233#else
234#define s3c2410_iotiming_debugfs NULL
238#define s3c2410_iotiming_calc NULL 235#define s3c2410_iotiming_calc NULL
239#define s3c2410_iotiming_get NULL 236#define s3c2410_iotiming_get NULL
240#define s3c2410_iotiming_set NULL 237#define s3c2410_iotiming_set NULL
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
242 239
243/* S3C2412 compatible routines */ 240/* S3C2412 compatible routines */
244 241
245extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, 242#ifdef CONFIG_S3C2412_IOTIMING
246 struct s3c_iotimings *timings); 243extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
244 struct s3c_cpufreq_config *cfg,
245 union s3c_iobank *iob);
247 246
248extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, 247extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
249 struct s3c_iotimings *timings); 248 struct s3c_iotimings *timings);
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
253 252
254extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, 253extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
255 struct s3c_iotimings *iot); 254 struct s3c_iotimings *iot);
255#else
256#define s3c2412_iotiming_debugfs NULL
257#define s3c2412_iotiming_calc NULL
258#define s3c2412_iotiming_get NULL
259#define s3c2412_iotiming_set NULL
260#endif /* CONFIG_S3C2412_IOTIMING */
256 261
257#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG 262#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
258#define s3c_freq_dbg(x...) printk(KERN_INFO x) 263#define s3c_freq_dbg(x...) printk(KERN_INFO x)
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 40fd7b6b5e66..258d9d8a94f2 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode,
152/* core initialisation functions */ 152/* core initialisation functions */
153 153
154extern void s3c24xx_init_irq(void); 154extern void s3c24xx_init_irq(void);
155extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
156extern void s5p_init_irq(u32 *vic, u32 num_vic); 155extern void s5p_init_irq(u32 *vic, u32 num_vic);
157 156
158extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 157extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
159extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
160extern void s5p_init_io(struct map_desc *mach_desc,
161 int size, void __iomem *cpuid_addr);
162 158
163extern void s3c24xx_init_cpu(void); 159extern void s3c24xx_init_cpu(void);
164extern void s3c64xx_init_cpu(void); 160extern void s3c64xx_init_cpu(void);
@@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops;
183extern struct syscore_ops s3c2412_pm_syscore_ops; 179extern struct syscore_ops s3c2412_pm_syscore_ops;
184extern struct syscore_ops s3c2416_pm_syscore_ops; 180extern struct syscore_ops s3c2416_pm_syscore_ops;
185extern struct syscore_ops s3c244x_pm_syscore_ops; 181extern struct syscore_ops s3c244x_pm_syscore_ops;
186extern struct syscore_ops s3c64xx_irq_syscore_ops;
187 182
188/* system device classes */ 183/* system device classes */
189 184
@@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass;
195extern struct sysdev_class s3c2442_sysclass; 190extern struct sysdev_class s3c2442_sysclass;
196extern struct sysdev_class s3c2443_sysclass; 191extern struct sysdev_class s3c2443_sysclass;
197extern struct sysdev_class s3c6410_sysclass; 192extern struct sysdev_class s3c6410_sysclass;
198extern struct sysdev_class s3c64xx_sysclass;
199extern struct sysdev_class s5p64x0_sysclass; 193extern struct sysdev_class s5p64x0_sysclass;
200extern struct sysdev_class s5pv210_sysclass; 194extern struct sysdev_class s5pv210_sysclass;
201extern struct sysdev_class exynos4_sysclass; 195extern struct sysdev_class exynos4_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h
deleted file mode 100644
index f546e88ebc94..000000000000
--- a/arch/arm/plat-samsung/include/plat/exynos4.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/exynos4.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for exynos4 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for EXYNOS4 related SoCs */
14
15extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void exynos4_register_clocks(void);
17extern void exynos4210_register_clocks(void);
18extern void exynos4212_register_clocks(void);
19extern void exynos4_setup_clocks(void);
20
21#ifdef CONFIG_ARCH_EXYNOS
22extern int exynos_init(void);
23extern void exynos4_init_irq(void);
24extern void exynos4_map_io(void);
25extern void exynos4_init_clocks(int xtal);
26extern struct sys_timer exynos4_timer;
27
28#define exynos4_init_uarts exynos4_common_init_uarts
29
30#else
31#define exynos4_init_clocks NULL
32#define exynos4_init_uarts NULL
33#define exynos4_map_io NULL
34#define exynos_init NULL
35#endif
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h
deleted file mode 100644
index 32ca5179c6e1..000000000000
--- a/arch/arm/plat-samsung/include/plat/reset.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __PLAT_SAMSUNG_RESET_H
12#define __PLAT_SAMSUNG_RESET_H __FILE__
13
14extern void (*s5p_reset_hook)(void);
15
16#endif /* __PLAT_SAMSUNG_RESET_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h
index 5bcfd143ba16..cbae50ddacc8 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2412.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2412.h
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21extern void s3c2412_init_clocks(int xtal); 21extern void s3c2412_init_clocks(int xtal);
22 22
23extern int s3c2412_baseclk_add(void); 23extern int s3c2412_baseclk_add(void);
24
25extern void s3c2412_restart(char mode, const char *cmd);
24#else 26#else
25#define s3c2412_init_clocks NULL 27#define s3c2412_init_clocks NULL
26#define s3c2412_init_uarts NULL 28#define s3c2412_init_uarts NULL
27#define s3c2412_map_io NULL 29#define s3c2412_map_io NULL
28#define s3c2412_init NULL 30#define s3c2412_init NULL
31#define s3c2412_restart NULL
29#endif 32#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h
index a764f8503f52..de2b5bdc5ebd 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2416.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2416.h
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal);
23 23
24extern int s3c2416_baseclk_add(void); 24extern int s3c2416_baseclk_add(void);
25 25
26extern void s3c2416_restart(char mode, const char *cmd);
26#else 27#else
27#define s3c2416_init_clocks NULL 28#define s3c2416_init_clocks NULL
28#define s3c2416_init_uarts NULL 29#define s3c2416_init_uarts NULL
29#define s3c2416_map_io NULL 30#define s3c2416_map_io NULL
30#define s3c2416_init NULL 31#define s3c2416_init NULL
32#define s3c2416_restart NULL
31#endif 33#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h
index 7fae1a050694..dce05b43d51c 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2443.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2443.h
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal);
24 24
25extern int s3c2443_baseclk_add(void); 25extern int s3c2443_baseclk_add(void);
26 26
27extern void s3c2443_restart(char mode, const char *cmd);
27#else 28#else
28#define s3c2443_init_clocks NULL 29#define s3c2443_init_clocks NULL
29#define s3c2443_init_uarts NULL 30#define s3c2443_init_uarts NULL
30#define s3c2443_map_io NULL 31#define s3c2443_map_io NULL
31#define s3c2443_init NULL 32#define s3c2443_init NULL
33#define s3c2443_restart NULL
32#endif 34#endif
33 35
34/* common code used by s3c2443 and others. 36/* common code used by s3c2443 and others.
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h
deleted file mode 100644
index 37d428aaaebb..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6400.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Header file for s3c6400 cpu support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/* Common init code for S3C6400 related SoCs */
16
17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18extern void s3c6400_setup_clocks(void);
19
20extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
21
22#ifdef CONFIG_CPU_S3C6400
23
24extern int s3c6400_init(void);
25extern void s3c6400_init_irq(void);
26extern void s3c6400_map_io(void);
27extern void s3c6400_init_clocks(int xtal);
28
29#define s3c6400_init_uarts s3c6400_common_init_uarts
30
31#else
32#define s3c6400_init_clocks NULL
33#define s3c6400_init_uarts NULL
34#define s3c6400_map_io NULL
35#define s3c6400_init NULL
36#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h
deleted file mode 100644
index 20a6675b9d17..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6410.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Header file for s3c6410 cpu support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifdef CONFIG_CPU_S3C6410
16
17extern int s3c6410_init(void);
18extern void s3c6410_init_irq(void);
19extern void s3c6410_map_io(void);
20extern void s3c6410_init_clocks(int xtal);
21
22#define s3c6410_init_uarts s3c6400_common_init_uarts
23
24#else
25#define s3c6410_init_clocks NULL
26#define s3c6410_init_uarts NULL
27#define s3c6410_map_io NULL
28#define s3c6410_init NULL
29#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h
deleted file mode 100644
index bf85ebbb4fbc..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6440.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 /* Common init code for S5P6440 related SoCs */
14
15extern void s5p6440_register_clocks(void);
16extern void s5p6440_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6440
19
20extern int s5p64x0_init(void);
21extern void s5p6440_init_irq(void);
22extern void s5p6440_map_io(void);
23extern void s5p6440_init_clocks(int xtal);
24
25extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6440_init_clocks NULL
29#define s5p6440_init_uarts NULL
30#define s5p6440_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6440 timer */
35
36extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h
deleted file mode 100644
index da25f9a1c54a..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6450.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p6450 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6450 related SoCs */
14
15extern void s5p6450_register_clocks(void);
16extern void s5p6450_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6450
19
20extern int s5p64x0_init(void);
21extern void s5p6450_init_irq(void);
22extern void s5p6450_map_io(void);
23extern void s5p6450_init_clocks(int xtal);
24
25extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6450_init_clocks NULL
29#define s5p6450_init_uarts NULL
30#define s5p6450_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6450 timer */
35
36extern struct sys_timer s5p6450_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h
deleted file mode 100644
index 9a21aeaaf452..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pc100.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pc100 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PC100 related SoCs */
14
15extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pc100_register_clocks(void);
17extern void s5pc100_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PC100
20
21extern int s5pc100_init(void);
22extern void s5pc100_init_irq(void);
23extern void s5pc100_map_io(void);
24extern void s5pc100_init_clocks(int xtal);
25
26#define s5pc100_init_uarts s5pc100_common_init_uarts
27
28#else
29#define s5pc100_init_clocks NULL
30#define s5pc100_init_uarts NULL
31#define s5pc100_map_io NULL
32#define s5pc100_init NULL
33#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h
deleted file mode 100644
index b4bc6be77072..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pv210.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h
deleted file mode 100644
index a448e990964d..000000000000
--- a/arch/arm/plat-samsung/include/plat/system-reset.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/system-reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
7 *
8 * S5P - System define for arch_reset()
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/watchdog-reset.h>
16
17void (*s5p_reset_hook)(void);
18
19static void arch_reset(char mode, const char *cmd)
20{
21 /* SWRESET support in s5p_reset_hook() */
22
23 if (s5p_reset_hook)
24 s5p_reset_hook();
25
26 /* Perform reset using Watchdog reset
27 * if there is no s5p_reset_hook()
28 */
29
30 arch_wdt_reset();
31}
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 40dbb2b0ae22..f19aff19205c 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -17,6 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/delay.h>
20 21
21static inline void arch_wdt_reset(void) 22static inline void arch_wdt_reset(void)
22{ 23{
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
index b4f340b8f1f1..e0f2e5b9530c 100644
--- a/arch/arm/plat-spear/Makefile
+++ b/arch/arm/plat-spear/Makefile
@@ -3,6 +3,6 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := clock.o time.o 6obj-y := clock.o restart.o time.o
7 7
8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o 8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index a235fa0ca777..86c6f83b44cc 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -14,10 +14,6 @@
14#ifndef __PLAT_SYSTEM_H 14#ifndef __PLAT_SYSTEM_H
15#define __PLAT_SYSTEM_H 15#define __PLAT_SYSTEM_H
16 16
17#include <linux/io.h>
18#include <asm/hardware/sp810.h>
19#include <mach/hardware.h>
20
21static inline void arch_idle(void) 17static inline void arch_idle(void)
22{ 18{
23 /* 19 /*
@@ -27,15 +23,4 @@ static inline void arch_idle(void)
27 cpu_do_idle(); 23 cpu_do_idle();
28} 24}
29 25
30static inline void arch_reset(char mode, const char *cmd)
31{
32 if (mode == 's') {
33 /* software reset, Jump into ROM at address 0 */
34 cpu_reset(0);
35 } else {
36 /* hardware reset, Use on-chip reset capability */
37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
38 }
39}
40
41#endif /* __PLAT_SYSTEM_H */ 26#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
deleted file mode 100644
index 8c8b24d07046..000000000000
--- a/arch/arm/plat-spear/include/plat/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/plat-spear/include/plat/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_VMALLOC_H
15#define __PLAT_VMALLOC_H
16
17#define VMALLOC_END 0xF0000000UL
18
19#endif /* __PLAT_VMALLOC_H */
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
new file mode 100644
index 000000000000..2b4e3d82957c
--- /dev/null
+++ b/arch/arm/plat-spear/restart.c
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/plat-spear/restart.c
3 *
4 * SPEAr platform specific restart functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13#include <linux/io.h>
14#include <asm/hardware/sp810.h>
15#include <mach/hardware.h>
16#include <mach/generic.h>
17
18void spear_restart(char mode, const char *cmd)
19{
20 if (mode == 's') {
21 /* software reset, Jump into ROM at address 0 */
22 soft_restart(0);
23 } else {
24 /* hardware reset, Use on-chip reset capability */
25 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
26 }
27}
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f42..000000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
1if ARCH_TCC_926
2
3menu "Telechips ARM926-based CPUs"
4
5choice
6 prompt "Telechips CPU type:"
7 default ARCH_TCC8K
8
9config ARCH_TCC8K
10 bool TCC8000
11 select USB_ARCH_HAS_OHCI
12 help
13 Support for Telechips TCC8000 systems
14
15endchoice
16
17source "arch/arm/mach-tcc8k/Kconfig"
18
19endmenu
20endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8f..000000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1# "Telechips Platform Common Modules"
2
3obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d5271..000000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
1/*
2 * Clock framework for Telechips SoCs
3 * Based on arch/arm/plat-mxc/clock.c
4 *
5 * Copyright (C) 2004 - 2005 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
10 * Copyright 2010 Hans J. Koch, hjk@linutronix.de
11 *
12 * Licensed under the terms of the GPL v2.
13 */
14
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/string.h>
21
22#include <mach/clock.h>
23#include <mach/hardware.h>
24
25static DEFINE_MUTEX(clocks_mutex);
26
27/*-------------------------------------------------------------------------
28 * Standard clock functions defined in include/linux/clk.h
29 *-------------------------------------------------------------------------*/
30
31static void __clk_disable(struct clk *clk)
32{
33 BUG_ON(clk->refcount == 0);
34
35 if (!(--clk->refcount) && clk->disable) {
36 /* Unconditionally disable the clock in hardware */
37 clk->disable(clk);
38 /* recursively disable parents */
39 if (clk->parent)
40 __clk_disable(clk->parent);
41 }
42}
43
44static int __clk_enable(struct clk *clk)
45{
46 int ret = 0;
47
48 if (clk->refcount++ == 0 && clk->enable) {
49 if (clk->parent)
50 ret = __clk_enable(clk->parent);
51 if (ret)
52 return ret;
53 else
54 return clk->enable(clk);
55 }
56
57 return 0;
58}
59
60/* This function increments the reference count on the clock and enables the
61 * clock if not already enabled. The parent clock tree is recursively enabled
62 */
63int clk_enable(struct clk *clk)
64{
65 int ret = 0;
66
67 if (!clk)
68 return -EINVAL;
69
70 mutex_lock(&clocks_mutex);
71 ret = __clk_enable(clk);
72 mutex_unlock(&clocks_mutex);
73
74 return ret;
75}
76EXPORT_SYMBOL_GPL(clk_enable);
77
78/* This function decrements the reference count on the clock and disables
79 * the clock when reference count is 0. The parent clock tree is
80 * recursively disabled
81 */
82void clk_disable(struct clk *clk)
83{
84 if (!clk)
85 return;
86
87 mutex_lock(&clocks_mutex);
88 __clk_disable(clk);
89 mutex_unlock(&clocks_mutex);
90}
91EXPORT_SYMBOL_GPL(clk_disable);
92
93/* Retrieve the *current* clock rate. If the clock itself
94 * does not provide a special calculation routine, ask
95 * its parent and so on, until one is able to return
96 * a valid clock rate
97 */
98unsigned long clk_get_rate(struct clk *clk)
99{
100 if (!clk)
101 return 0UL;
102
103 if (clk->get_rate)
104 return clk->get_rate(clk);
105
106 return clk_get_rate(clk->parent);
107}
108EXPORT_SYMBOL_GPL(clk_get_rate);
109
110/* Round the requested clock rate to the nearest supported
111 * rate that is less than or equal to the requested rate.
112 * This is dependent on the clock's current parent.
113 */
114long clk_round_rate(struct clk *clk, unsigned long rate)
115{
116 if (!clk)
117 return 0;
118 if (!clk->round_rate)
119 return 0;
120
121 return clk->round_rate(clk, rate);
122}
123EXPORT_SYMBOL_GPL(clk_round_rate);
124
125/* Set the clock to the requested clock rate. The rate must
126 * match a supported rate exactly based on what clk_round_rate returns
127 */
128int clk_set_rate(struct clk *clk, unsigned long rate)
129{
130 int ret = -EINVAL;
131
132 if (!clk)
133 return ret;
134 if (!clk->set_rate || !rate)
135 return ret;
136
137 mutex_lock(&clocks_mutex);
138 ret = clk->set_rate(clk, rate);
139 mutex_unlock(&clocks_mutex);
140
141 return ret;
142}
143EXPORT_SYMBOL_GPL(clk_set_rate);
144
145/* Set the clock's parent to another clock source */
146int clk_set_parent(struct clk *clk, struct clk *parent)
147{
148 struct clk *old;
149 int ret = -EINVAL;
150
151 if (!clk)
152 return ret;
153 if (!clk->set_parent || !parent)
154 return ret;
155
156 mutex_lock(&clocks_mutex);
157 old = clk->parent;
158 if (clk->refcount)
159 __clk_enable(parent);
160 ret = clk->set_parent(clk, parent);
161 if (ret)
162 old = parent;
163 if (clk->refcount)
164 __clk_disable(old);
165 mutex_unlock(&clocks_mutex);
166
167 return ret;
168}
169EXPORT_SYMBOL_GPL(clk_set_parent);
170
171/* Retrieve the clock's parent clock source */
172struct clk *clk_get_parent(struct clk *clk)
173{
174 if (!clk)
175 return NULL;
176
177 return clk->parent;
178}
179EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a8..000000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Low level clock header file for Telechips TCC architecture
3 * (C) 2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the GPL v2.
6 */
7
8#ifndef __ASM_ARCH_TCC_CLOCK_H__
9#define __ASM_ARCH_TCC_CLOCK_H__
10
11#ifndef __ASSEMBLY__
12
13struct clk {
14 struct clk *parent;
15 /* id number of a root clock, 0 for normal clocks */
16 int root_id;
17 /* Reference count of clock enable/disable */
18 int refcount;
19 /* Address of associated BCLKCTRx register. Must be set. */
20 void __iomem *bclkctr;
21 /* Bit position for BCLKCTRx. Must be set. */
22 int bclk_shift;
23 /* Address of ACLKxxx register, if any. */
24 void __iomem *aclkreg;
25 /* get the current clock rate (always a fresh value) */
26 unsigned long (*get_rate) (struct clk *);
27 /* Function ptr to set the clock to a new rate. The rate must match a
28 supported rate returned from round_rate. Leave blank if clock is not
29 programmable */
30 int (*set_rate) (struct clk *, unsigned long);
31 /* Function ptr to round the requested clock rate to the nearest
32 supported rate that is less than or equal to the requested rate. */
33 unsigned long (*round_rate) (struct clk *, unsigned long);
34 /* Function ptr to enable the clock. Leave blank if clock can not
35 be gated. */
36 int (*enable) (struct clk *);
37 /* Function ptr to disable the clock. Leave blank if clock can not
38 be gated. */
39 void (*disable) (struct clk *);
40 /* Function ptr to set the parent clock of the clock. */
41 int (*set_parent) (struct clk *, struct clk *);
42};
43
44int clk_register(struct clk *clk);
45void clk_unregister(struct clk *clk);
46
47#endif /* __ASSEMBLY__ */
48#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30d..000000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (C) 1994-1999 Russell King
3 * Copyright (C) 2008-2009 Telechips
4 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 .macro addruart, rp, rv, tmp
13 moveq \rp, #0x90000000 @ physical base address
14 movne \rv, #0xF1000000 @ virtual base
15 orr \rp, \rp, #0x00007000 @ UART0
16 orr \rv, \rv, #0x00007000 @ UART0
17 .endm
18
19 .macro senduart,rd,rx
20 strb \rd, [\rx, #0x44]
21 .endm
22
23 .macro waituart,rd,rx
24 .endm
25
26 .macro busyuart,rd,rx
271001:
28 ldr \rd, [\rx, #0x14]
29 tst \rd, #0x20
30
31 beq 1001b
32 .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6d..000000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * include/asm-arm/arch-tcc83x/entry-macro.S
3 *
4 * Author : <linux@telechips.com>
5 * Created: June 10, 2008
6 * Description: Low-level IRQ helper macros for Telechips-based platforms
7 *
8 * Copyright (C) 2008-2009 Telechips
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <mach/hardware.h>
16#include <mach/irqs.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 ldr \base, =0xF2003000 @ base address of PIC registers
30
31 @@ read MREQ register of PIC0
32
33 mov \irqnr, #0
34 ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
35 cmp \irqstat, #0
36 bne 1001f
37
38 @@ read MREQ register of PIC1
39
40 ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
41 cmp \irqstat, #0
42 beq 1002f
43 mov \irqnr, #0x20
44
451001:
46 movs \tmp, \irqstat, lsl #16
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #16
49
50 movs \tmp, \irqstat, lsl #8
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #8
53
54 movs \tmp, \irqstat, lsl #4
55 movne \irqstat, \tmp
56 addeq \irqnr, \irqnr, #4
57
58 movs \tmp, \irqstat, lsl #2
59 movne \irqstat, \tmp
60 addeq \irqnr, \irqnr, #2
61
62 movs \tmp, \irqstat, lsl #1
63 addeq \irqnr, \irqnr, #1
64 orrs \base, \base, #1
651002:
66 @@ exit here, Z flag unset if IRQ
67
68 .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
3 * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
4 * and Dirk Behme <dirk.behme@de.bosch.com>
5 * Rewritten by: <linux@telechips.com>
6 * Description: Hardware definitions for TCC8300 processors and boards
7 *
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Copyright (C) 2008-2009 Telechips
10 *
11 * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
12 *
13 * Licensed under the terms of the GNU Pulic License version 2.
14 */
15
16#ifndef __ASM_ARCH_TCC_HARDWARE_H
17#define __ASM_ARCH_TCC_HARDWARE_H
18
19#include <asm/sizes.h>
20#ifndef __ASSEMBLER__
21#include <asm/types.h>
22#endif
23#include <mach/io.h>
24
25/*
26 * ----------------------------------------------------------------------------
27 * Clocks
28 * ----------------------------------------------------------------------------
29 */
30#define CLKGEN_REG_BASE 0xfffece00
31#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
32#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
33#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
34#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
35#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
36#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
37#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
38#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
39
40/* DPLL control registers */
41#define DPLL_CTL 0xfffecf00
42
43#endif /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f1..000000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * IO definitions for TCC8000 processors and boards
3 *
4 * Copyright (C) 1997-1999 Russell King
5 * Copyright (C) 2008-2009 Telechips
6 * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
7 *
8 * Licensed under the terms of the GNU Public License version 2.
9 */
10
11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16/*
17 * We don't actually have real ISA nor PCI buses, but there is so many
18 * drivers out there that might just work if we fake them...
19 */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22
23#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d498..000000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * IRQ definitions for TCC8xxx
3 *
4 * Copyright (C) 2008-2009 Telechips
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of the GPL v2.
8 *
9 */
10
11#ifndef __ASM_ARCH_TCC_IRQS_H
12#define __ASM_ARCH_TCC_IRQS_H
13
14#define NR_IRQS 64
15
16/* PIC0 interrupts */
17#define INT_ADMA1 0
18#define INT_BDMA 1
19#define INT_ADMA0 2
20#define INT_GDMA1 3
21#define INT_I2S0RX 4
22#define INT_I2S0TX 5
23#define INT_TC 6
24#define INT_UART0 7
25#define INT_USBD 8
26#define INT_SPI0TX 9
27#define INT_UDMA 10
28#define INT_LIRQ 11
29#define INT_GDMA2 12
30#define INT_GDMA0 13
31#define INT_TC32 14
32#define INT_LCD 15
33#define INT_ADC 16
34#define INT_I2C 17
35#define INT_RTCP 18
36#define INT_RTCA 19
37#define INT_NFC 20
38#define INT_SD0 21
39#define INT_GSB0 22
40#define INT_PK 23
41#define INT_USBH0 24
42#define INT_USBH1 25
43#define INT_G2D 26
44#define INT_ECC 27
45#define INT_SPI0RX 28
46#define INT_UART1 29
47#define INT_MSCL 30
48#define INT_GSB1 31
49/* PIC1 interrupts */
50#define INT_E0 32
51#define INT_E1 33
52#define INT_E2 34
53#define INT_E3 35
54#define INT_E4 36
55#define INT_E5 37
56#define INT_E6 38
57#define INT_E7 39
58#define INT_UART2 40
59#define INT_UART3 41
60#define INT_SPI1TX 42
61#define INT_SPI1RX 43
62#define INT_GSB2 44
63#define INT_SPDIF 45
64#define INT_CDIF 46
65#define INT_VBON 47
66#define INT_VBOFF 48
67#define INT_SD1 49
68#define INT_UART4 50
69#define INT_GDMA3 51
70#define INT_I2S1RX 52
71#define INT_I2S1TX 53
72#define INT_CAN0 54
73#define INT_CAN1 55
74#define INT_GSB3 56
75#define INT_KRST 57
76#define INT_UNUSED 58
77#define INT_SD0D3 59
78#define INT_SD1D3 60
79#define INT_GPS0 61
80#define INT_GPS1 62
81#define INT_GPS2 63
82
83#endif /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d843..000000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 * Description: LINUX SYSTEM FUNCTIONS for TCC83x
5 *
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 *
10 */
11
12#ifndef __ASM_ARCH_SYSTEM_H
13#define __ASM_ARCH_SYSTEM_H
14#include <linux/clk.h>
15
16#include <asm/mach-types.h>
17#include <mach/hardware.h>
18
19extern void plat_tcc_reboot(void);
20
21static inline void arch_idle(void)
22{
23 cpu_do_idle();
24}
25
26static inline void arch_reset(char mode, const char *cmd)
27{
28 plat_tcc_reboot();
29}
30
31#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d9428295332..000000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
1/*
2 * Telechips TCC8000 register definitions
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPLv2.
7 */
8
9#ifndef TCC8K_REGS_H
10#define TCC8K_REGS_H
11
12#include <linux/types.h>
13
14#define EXT_SDRAM_BASE 0x20000000
15#define INT_SRAM_BASE 0x30000000
16#define INT_SRAM_SIZE SZ_32K
17#define CS0_BASE 0x40000000
18#define CS1_BASE 0x50000000
19#define CS1_SIZE SZ_64K
20#define CS2_BASE 0x60000000
21#define CS3_BASE 0x70000000
22#define AHB_PERI_BASE 0x80000000
23#define AHB_PERI_SIZE SZ_64K
24#define APB0_PERI_BASE 0x90000000
25#define APB0_PERI_SIZE SZ_128K
26#define APB1_PERI_BASE 0x98000000
27#define APB1_PERI_SIZE SZ_128K
28#define DATA_TCM_BASE 0xa0000000
29#define DATA_TCM_SIZE SZ_8K
30#define EXT_MEM_CTRL_BASE 0xf0000000
31#define EXT_MEM_CTRL_SIZE SZ_4K
32
33#define CS1_BASE_VIRT (void __iomem *)0xf7000000
34#define AHB_PERI_BASE_VIRT (void __iomem *)0xf4000000
35#define APB0_PERI_BASE_VIRT (void __iomem *)0xf1000000
36#define APB1_PERI_BASE_VIRT (void __iomem *)0xf2000000
37#define EXT_MEM_CTRL_BASE_VIRT (void __iomem *)0xf3000000
38#define INT_SRAM_BASE_VIRT (void __iomem *)0xf5000000
39#define DATA_TCM_BASE_VIRT (void __iomem *)0xf6000000
40
41#define __REG(x) (*((volatile u32 *)(x)))
42
43/* USB Device Controller Registers */
44#define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000)
45#define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000)
46
47#define UDC_IR_OFFS 0x00
48#define UDC_EIR_OFFS 0x04
49#define UDC_EIER_OFFS 0x08
50#define UDC_FAR_OFFS 0x0c
51#define UDC_FNR_OFFS 0x10
52#define UDC_EDR_OFFS 0x14
53#define UDC_RT_OFFS 0x18
54#define UDC_SSR_OFFS 0x1c
55#define UDC_SCR_OFFS 0x20
56#define UDC_EP0SR_OFFS 0x24
57#define UDC_EP0CR_OFFS 0x28
58
59#define UDC_ESR_OFFS 0x2c
60#define UDC_ECR_OFFS 0x30
61#define UDC_BRCR_OFFS 0x34
62#define UDC_BWCR_OFFS 0x38
63#define UDC_MPR_OFFS 0x3c
64#define UDC_DCR_OFFS 0x40
65#define UDC_DTCR_OFFS 0x44
66#define UDC_DFCR_OFFS 0x48
67#define UDC_DTTCR1_OFFS 0x4c
68#define UDC_DTTCR2_OFFS 0x50
69#define UDC_ESR2_OFFS 0x54
70
71#define UDC_SCR2_OFFS 0x58
72#define UDC_EP0BUF_OFFS 0x60
73#define UDC_EP1BUF_OFFS 0x64
74#define UDC_EP2BUF_OFFS 0x68
75#define UDC_EP3BUF_OFFS 0x6c
76#define UDC_PLICR_OFFS 0xa0
77#define UDC_PCR_OFFS 0xa4
78
79#define UDC_UPCR0_OFFS 0xc8
80#define UDC_UPCR1_OFFS 0xcc
81#define UDC_UPCR2_OFFS 0xd0
82#define UDC_UPCR3_OFFS 0xd4
83
84/* Bits in UDC_EIR */
85#define UDC_EIR_EP0I (1 << 0)
86#define UDC_EIR_EP1I (1 << 1)
87#define UDC_EIR_EP2I (1 << 2)
88#define UDC_EIR_EP3I (1 << 3)
89#define UDC_EIR_EPI_MASK 0x0f
90
91/* Bits in UDC_EIER */
92#define UDC_EIER_EP0IE (1 << 0)
93#define UDC_EIER_EP1IE (1 << 1)
94#define UDC_EIER_EP2IE (1 << 2)
95#define UDC_EIER_EP3IE (1 << 3)
96
97/* Bits in UDC_FNR */
98#define UDC_FNR_FN_MASK 0x7ff
99#define UDC_FNR_SM (1 << 13)
100#define UDC_FNR_FTL (1 << 14)
101
102/* Bits in UDC_SSR */
103#define UDC_SSR_HFRES (1 << 0)
104#define UDC_SSR_HFSUSP (1 << 1)
105#define UDC_SSR_HFRM (1 << 2)
106#define UDC_SSR_SDE (1 << 3)
107#define UDC_SSR_HSP (1 << 4)
108#define UDC_SSR_DM (1 << 5)
109#define UDC_SSR_DP (1 << 6)
110#define UDC_SSR_TBM (1 << 7)
111#define UDC_SSR_VBON (1 << 8)
112#define UDC_SSR_VBOFF (1 << 9)
113#define UDC_SSR_EOERR (1 << 10)
114#define UDC_SSR_DCERR (1 << 11)
115#define UDC_SSR_TCERR (1 << 12)
116#define UDC_SSR_BSERR (1 << 13)
117#define UDC_SSR_TMERR (1 << 14)
118#define UDC_SSR_BAERR (1 << 15)
119
120/* Bits in UDC_SCR */
121#define UDC_SCR_HRESE (1 << 0)
122#define UDC_SCR_HSSPE (1 << 1)
123#define UDC_SCR_RRDE (1 << 5)
124#define UDC_SCR_SPDEN (1 << 6)
125#define UDC_SCR_DIEN (1 << 12)
126
127/* Bits in UDC_EP0SR */
128#define UDC_EP0SR_RSR (1 << 0)
129#define UDC_EP0SR_TST (1 << 1)
130#define UDC_EP0SR_SHT (1 << 4)
131#define UDC_EP0SR_LWO (1 << 6)
132
133/* Bits in UDC_EP0CR */
134#define UDC_EP0CR_ESS (1 << 1)
135
136/* Bits in UDC_ESR */
137#define UDC_ESR_RPS (1 << 0)
138#define UDC_ESR_TPS (1 << 1)
139#define UDC_ESR_LWO (1 << 4)
140#define UDC_ESR_FFS (1 << 6)
141
142/* Bits in UDC_ECR */
143#define UDC_ECR_ESS (1 << 1)
144#define UDC_ECR_CDP (1 << 2)
145
146#define UDC_ECR_FLUSH (1 << 6)
147#define UDC_ECR_DUEN (1 << 7)
148
149/* Bits in UDC_UPCR0 */
150#define UDC_UPCR0_VBD (1 << 1)
151#define UDC_UPCR0_VBDS (1 << 6)
152#define UDC_UPCR0_RCD_12 (0x0 << 9)
153#define UDC_UPCR0_RCD_24 (0x1 << 9)
154#define UDC_UPCR0_RCD_48 (0x2 << 9)
155#define UDC_UPCR0_RCS_EXT (0x1 << 11)
156#define UDC_UPCR0_RCS_XTAL (0x0 << 11)
157
158/* Bits in UDC_UPCR1 */
159#define UDC_UPCR1_CDT(x) ((x) << 0)
160#define UDC_UPCR1_OTGT(x) ((x) << 3)
161#define UDC_UPCR1_SQRXT(x) ((x) << 8)
162#define UDC_UPCR1_TXFSLST(x) ((x) << 12)
163
164/* Bits in UDC_UPCR2 */
165#define UDC_UPCR2_TP (1 << 0)
166#define UDC_UPCR2_TXRT(x) ((x) << 2)
167#define UDC_UPCR2_TXVRT(x) ((x) << 5)
168#define UDC_UPCR2_OPMODE(x) ((x) << 9)
169#define UDC_UPCR2_XCVRSEL(x) ((x) << 12)
170#define UDC_UPCR2_TM (1 << 14)
171
172/* USB Host Controller registers */
173#define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000)
174#define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800)
175
176#define OHCI_INT_ENABLE_OFFS 0x10
177
178#define RH_DESCRIPTOR_A_OFFS 0x48
179#define RH_DESCRIPTOR_B_OFFS 0x4c
180
181#define USBHTCFG0_OFFS 0x100
182#define USBHHCFG0_OFFS 0x104
183#define USBHHCFG1_OFFS 0x104
184
185/* DMA controller registers */
186#define DMAC0_BASE (AHB_PERI_BASE + 0x4000)
187#define DMAC1_BASE (AHB_PERI_BASE + 0xa000)
188#define DMAC2_BASE (AHB_PERI_BASE + 0x4800)
189#define DMAC3_BASE (AHB_PERI_BASE + 0xa800)
190
191#define DMAC_CH_OFFSET(ch) (ch * 0x30)
192
193#define ST_SADR_OFFS 0x00
194#define SPARAM_OFFS 0x04
195#define C_SADR_OFFS 0x0c
196#define ST_DADR_OFFS 0x10
197#define DPARAM_OFFS 0x14
198#define C_DADR_OFFS 0x1c
199#define HCOUNT_OFFS 0x20
200#define CHCTRL_OFFS 0x24
201#define RPTCTRL_OFFS 0x28
202#define EXTREQ_A_OFFS 0x2c
203
204/* Bits in CHCTRL register */
205#define CHCTRL_EN (1 << 0)
206
207#define CHCTRL_IEN (1 << 2)
208#define CHCTRL_FLAG (1 << 3)
209#define CHCTRL_WSIZE8 (0 << 4)
210#define CHCTRL_WSIZE16 (1 << 4)
211#define CHCTRL_WSIZE32 (2 << 4)
212
213#define CHCTRL_BSIZE1 (0 << 6)
214#define CHCTRL_BSIZE2 (1 << 6)
215#define CHCTRL_BSIZE4 (2 << 6)
216#define CHCTRL_BSIZE8 (3 << 6)
217
218#define CHCTRL_TYPE_SINGLE_E (0 << 8)
219#define CHCTRL_TYPE_HW (1 << 8)
220#define CHCTRL_TYPE_SW (2 << 8)
221#define CHCTRL_TYPE_SINGLE_L (3 << 8)
222
223#define CHCTRL_BST (1 << 10)
224
225/* Use DMA controller 0, channel 2 for USB */
226#define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2))
227
228/* NAND flash controller registers */
229#define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000)
230#define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000)
231
232#define NFC_CMD_OFFS 0x00
233#define NFC_LADDR_OFFS 0x04
234#define NFC_BADDR_OFFS 0x08
235#define NFC_SADDR_OFFS 0x0c
236#define NFC_WDATA_OFFS 0x10
237#define NFC_LDATA_OFFS 0x20
238#define NFC_SDATA_OFFS 0x40
239#define NFC_CTRL_OFFS 0x50
240#define NFC_PSTART_OFFS 0x54
241#define NFC_RSTART_OFFS 0x58
242#define NFC_DSIZE_OFFS 0x5c
243#define NFC_IREQ_OFFS 0x60
244#define NFC_RST_OFFS 0x64
245#define NFC_CTRL1_OFFS 0x68
246#define NFC_MDATA_OFFS 0x70
247
248#define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS)
249
250/* Bits in NFC_CTRL */
251#define NFC_CTRL_BHLD_MASK (0xf << 0)
252#define NFC_CTRL_BPW_MASK (0xf << 4)
253#define NFC_CTRL_BSTP_MASK (0xf << 8)
254#define NFC_CTRL_CADDR_MASK (0x7 << 12)
255#define NFC_CTRL_CADDR_1 (0x0 << 12)
256#define NFC_CTRL_CADDR_2 (0x1 << 12)
257#define NFC_CTRL_CADDR_3 (0x2 << 12)
258#define NFC_CTRL_CADDR_4 (0x3 << 12)
259#define NFC_CTRL_CADDR_5 (0x4 << 12)
260#define NFC_CTRL_MSK (1 << 15)
261#define NFC_CTRL_PSIZE256 (0 << 16)
262#define NFC_CTRL_PSIZE512 (1 << 16)
263#define NFC_CTRL_PSIZE1024 (2 << 16)
264#define NFC_CTRL_PSIZE2048 (3 << 16)
265#define NFC_CTRL_PSIZE4096 (4 << 16)
266#define NFC_CTRL_PSIZE_MASK (7 << 16)
267#define NFC_CTRL_BSIZE1 (0 << 19)
268#define NFC_CTRL_BSIZE2 (1 << 19)
269#define NFC_CTRL_BSIZE4 (2 << 19)
270#define NFC_CTRL_BSIZE8 (3 << 19)
271#define NFC_CTRL_BSIZE_MASK (3 << 19)
272#define NFC_CTRL_RDY (1 << 21)
273#define NFC_CTRL_CS0SEL (1 << 22)
274#define NFC_CTRL_CS1SEL (1 << 23)
275#define NFC_CTRL_CS2SEL (1 << 24)
276#define NFC_CTRL_CS3SEL (1 << 25)
277#define NFC_CTRL_CSMASK (0xf << 22)
278#define NFC_CTRL_BW (1 << 26)
279#define NFC_CTRL_FS (1 << 27)
280#define NFC_CTRL_DEN (1 << 28)
281#define NFC_CTRL_READ_IEN (1 << 29)
282#define NFC_CTRL_PROG_IEN (1 << 30)
283#define NFC_CTRL_RDY_IEN (1 << 31)
284
285/* Bits in NFC_IREQ */
286#define NFC_IREQ_IRQ0 (1 << 0)
287#define NFC_IREQ_IRQ1 (1 << 1)
288#define NFC_IREQ_IRQ2 (1 << 2)
289
290#define NFC_IREQ_FLAG0 (1 << 4)
291#define NFC_IREQ_FLAG1 (1 << 5)
292#define NFC_IREQ_FLAG2 (1 << 6)
293
294/* MMC controller registers */
295#define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000)
296#define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800)
297
298/* UART base addresses */
299
300#define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000)
301#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
302#define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000)
303#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
304#define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000)
305#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
306#define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000)
307#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
308#define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000)
309#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
310
311#define UART_BASE UART0_BASE
312#define UART_BASE_PHYS UART0_BASE_PHYS
313
314/* ECC controller */
315#define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000)
316
317#define ECC_CTRL_OFFS 0x00
318#define ECC_BASE_OFFS 0x04
319#define ECC_MASK_OFFS 0x08
320#define ECC_CLEAR_OFFS 0x0c
321#define ECC4_0_OFFS 0x10
322#define ECC4_1_OFFS 0x14
323
324#define ECC_EADDR0_OFFS 0x50
325
326#define ECC_ERRNUM_OFFS 0x90
327#define ECC_IREQ_OFFS 0x94
328
329/* Bits in ECC_CTRL */
330#define ECC_CTRL_ECC4_DIEN (1 << 28)
331#define ECC_CTRL_ECC8_DIEN (1 << 29)
332#define ECC_CTRL_ECC12_DIEN (1 << 30)
333#define ECC_CTRL_ECC_DISABLE 0x0
334#define ECC_CTRL_ECC_SLC_ENC 0x8
335#define ECC_CTRL_ECC_SLC_DEC 0x9
336#define ECC_CTRL_ECC4_ENC 0xa
337#define ECC_CTRL_ECC4_DEC 0xb
338#define ECC_CTRL_ECC8_ENC 0xc
339#define ECC_CTRL_ECC8_DEC 0xd
340#define ECC_CTRL_ECC12_ENC 0xe
341#define ECC_CTRL_ECC12_DEC 0xf
342
343/* Bits in ECC_IREQ */
344#define ECC_IREQ_E4DI (1 << 4)
345
346#define ECC_IREQ_E4DF (1 << 20)
347#define ECC_IREQ_E4EF (1 << 21)
348
349/* Interrupt controller */
350
351#define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000)
352#define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000)
353
354#define PIC0_IEN_OFFS 0x00
355#define PIC0_CREQ_OFFS 0x04
356#define PIC0_IREQ_OFFS 0x08
357#define PIC0_IRQSEL_OFFS 0x0c
358#define PIC0_SRC_OFFS 0x10
359#define PIC0_MREQ_OFFS 0x14
360#define PIC0_TSTREQ_OFFS 0x18
361#define PIC0_POL_OFFS 0x1c
362#define PIC0_IRQ_OFFS 0x20
363#define PIC0_FIQ_OFFS 0x24
364#define PIC0_MIRQ_OFFS 0x28
365#define PIC0_MFIQ_OFFS 0x2c
366#define PIC0_TMODE_OFFS 0x30
367#define PIC0_SYNC_OFFS 0x34
368#define PIC0_WKUP_OFFS 0x38
369#define PIC0_TMODEA_OFFS 0x3c
370#define PIC0_INTOEN_OFFS 0x40
371#define PIC0_MEN0_OFFS 0x44
372#define PIC0_MEN_OFFS 0x48
373
374#define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS)
375#define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
376#define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS)
377#define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
378#define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS)
379#define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
380#define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
381#define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS)
382#define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS)
383#define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
384#define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS)
385#define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS)
386#define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS)
387#define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
388#define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
389#define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS)
390#define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
391#define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS)
392#define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS)
393#define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
394#define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
395#define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS)
396#define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS)
397
398#define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080)
399
400#define PIC1_IEN_OFFS 0x00
401#define PIC1_CREQ_OFFS 0x04
402#define PIC1_IREQ_OFFS 0x08
403#define PIC1_IRQSEL_OFFS 0x0c
404#define PIC1_SRC_OFFS 0x10
405#define PIC1_MREQ_OFFS 0x14
406#define PIC1_TSTREQ_OFFS 0x18
407#define PIC1_POL_OFFS 0x1c
408#define PIC1_IRQ_OFFS 0x20
409#define PIC1_FIQ_OFFS 0x24
410#define PIC1_MIRQ_OFFS 0x28
411#define PIC1_MFIQ_OFFS 0x2c
412#define PIC1_TMODE_OFFS 0x30
413#define PIC1_SYNC_OFFS 0x34
414#define PIC1_WKUP_OFFS 0x38
415#define PIC1_TMODEA_OFFS 0x3c
416#define PIC1_INTOEN_OFFS 0x40
417#define PIC1_MEN1_OFFS 0x44
418#define PIC1_MEN_OFFS 0x48
419
420#define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS)
421#define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS)
422#define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS)
423#define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
424#define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS)
425#define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS)
426#define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
427#define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS)
428#define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS)
429#define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS)
430#define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
431#define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
432#define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS)
433#define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS)
434#define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS)
435#define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
436#define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
437#define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS)
438#define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS)
439
440/* Timer registers */
441#define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000)
442#define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000)
443
444#define TWDCFG_OFFS 0x70
445
446#define TC32EN_OFFS 0x80
447#define TC32LDV_OFFS 0x84
448#define TC32CMP0_OFFS 0x88
449#define TC32CMP1_OFFS 0x8c
450#define TC32PCNT_OFFS 0x90
451#define TC32MCNT_OFFS 0x94
452#define TC32IRQ_OFFS 0x98
453
454/* Bits in TC32EN */
455#define TC32EN_PRESCALE_MASK 0x00ffffff
456#define TC32EN_ENABLE (1 << 24)
457#define TC32EN_LOADZERO (1 << 25)
458#define TC32EN_STOPMODE (1 << 26)
459#define TC32EN_LDM0 (1 << 28)
460#define TC32EN_LDM1 (1 << 29)
461
462/* Bits in TC32IRQ */
463#define TC32IRQ_MSTAT_MASK 0x0000001f
464#define TC32IRQ_RSTAT_MASK (0x1f << 8)
465#define TC32IRQ_IRQEN0 (1 << 16)
466#define TC32IRQ_IRQEN1 (1 << 17)
467#define TC32IRQ_IRQEN2 (1 << 18)
468#define TC32IRQ_IRQEN3 (1 << 19)
469#define TC32IRQ_IRQEN4 (1 << 20)
470#define TC32IRQ_RSYNC (1 << 30)
471#define TC32IRQ_IRQCLR (1 << 31)
472
473/* GPIO registers */
474#define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
475
476#define GPIOPD_DAT_OFFS 0x00
477#define GPIOPD_DOE_OFFS 0x04
478#define GPIOPD_FS0_OFFS 0x08
479#define GPIOPD_FS1_OFFS 0x0c
480#define GPIOPD_FS2_OFFS 0x10
481#define GPIOPD_RPU_OFFS 0x30
482#define GPIOPD_RPD_OFFS 0x34
483#define GPIOPD_DV0_OFFS 0x38
484#define GPIOPD_DV1_OFFS 0x3c
485
486#define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000)
487
488#define GPIOPS_DAT_OFFS 0x40
489#define GPIOPS_DOE_OFFS 0x44
490#define GPIOPS_FS0_OFFS 0x48
491#define GPIOPS_FS1_OFFS 0x4c
492#define GPIOPS_FS2_OFFS 0x50
493#define GPIOPS_FS3_OFFS 0x54
494#define GPIOPS_RPU_OFFS 0x70
495#define GPIOPS_RPD_OFFS 0x74
496#define GPIOPS_DV0_OFFS 0x78
497#define GPIOPS_DV1_OFFS 0x7c
498
499#define GPIOPS_FS1_SDH0_BITS 0x000000ff
500#define GPIOPS_FS1_SDH1_BITS 0x0000ff00
501
502#define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000)
503
504#define GPIOPU_DAT_OFFS 0x80
505#define GPIOPU_DOE_OFFS 0x84
506#define GPIOPU_FS0_OFFS 0x88
507#define GPIOPU_FS1_OFFS 0x8c
508#define GPIOPU_FS2_OFFS 0x90
509#define GPIOPU_RPU_OFFS 0xb0
510#define GPIOPU_RPD_OFFS 0xb4
511#define GPIOPU_DV0_OFFS 0xb8
512#define GPIOPU_DV1_OFFS 0xbc
513
514#define GPIOPU_FS0_TXD0 (1 << 0)
515#define GPIOPU_FS0_RXD0 (1 << 1)
516#define GPIOPU_FS0_CTS0 (1 << 2)
517#define GPIOPU_FS0_RTS0 (1 << 3)
518#define GPIOPU_FS0_TXD1 (1 << 4)
519#define GPIOPU_FS0_RXD1 (1 << 5)
520#define GPIOPU_FS0_CTS1 (1 << 6)
521#define GPIOPU_FS0_RTS1 (1 << 7)
522#define GPIOPU_FS0_TXD2 (1 << 8)
523#define GPIOPU_FS0_RXD2 (1 << 9)
524#define GPIOPU_FS0_CTS2 (1 << 10)
525#define GPIOPU_FS0_RTS2 (1 << 11)
526#define GPIOPU_FS0_TXD3 (1 << 12)
527#define GPIOPU_FS0_RXD3 (1 << 13)
528#define GPIOPU_FS0_CTS3 (1 << 14)
529#define GPIOPU_FS0_RTS3 (1 << 15)
530#define GPIOPU_FS0_TXD4 (1 << 16)
531#define GPIOPU_FS0_RXD4 (1 << 17)
532#define GPIOPU_FS0_CTS4 (1 << 18)
533#define GPIOPU_FS0_RTS4 (1 << 19)
534
535#define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
536
537#define GPIOFC_DAT_OFFS 0xc0
538#define GPIOFC_DOE_OFFS 0xc4
539#define GPIOFC_FS0_OFFS 0xc8
540#define GPIOFC_FS1_OFFS 0xcc
541#define GPIOFC_FS2_OFFS 0xd0
542#define GPIOFC_FS3_OFFS 0xd4
543#define GPIOFC_RPU_OFFS 0xf0
544#define GPIOFC_RPD_OFFS 0xf4
545#define GPIOFC_DV0_OFFS 0xf8
546#define GPIOFC_DV1_OFFS 0xfc
547
548#define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
549
550#define GPIOFD_DAT_OFFS 0x100
551#define GPIOFD_DOE_OFFS 0x104
552#define GPIOFD_FS0_OFFS 0x108
553#define GPIOFD_FS1_OFFS 0x10c
554#define GPIOFD_FS2_OFFS 0x110
555#define GPIOFD_RPU_OFFS 0x130
556#define GPIOFD_RPD_OFFS 0x134
557#define GPIOFD_DV0_OFFS 0x138
558#define GPIOFD_DV1_OFFS 0x13c
559
560#define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
561
562#define GPIOLC_DAT_OFFS 0x140
563#define GPIOLC_DOE_OFFS 0x144
564#define GPIOLC_FS0_OFFS 0x148
565#define GPIOLC_FS1_OFFS 0x14c
566#define GPIOLC_RPU_OFFS 0x170
567#define GPIOLC_RPD_OFFS 0x174
568#define GPIOLC_DV0_OFFS 0x178
569#define GPIOLC_DV1_OFFS 0x17c
570
571#define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
572
573#define GPIOLD_DAT_OFFS 0x180
574#define GPIOLD_DOE_OFFS 0x184
575#define GPIOLD_FS0_OFFS 0x188
576#define GPIOLD_FS1_OFFS 0x18c
577#define GPIOLD_FS2_OFFS 0x190
578#define GPIOLD_RPU_OFFS 0x1b0
579#define GPIOLD_RPD_OFFS 0x1b4
580#define GPIOLD_DV0_OFFS 0x1b8
581#define GPIOLD_DV1_OFFS 0x1bc
582
583#define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
584
585#define GPIOAD_DAT_OFFS 0x1c0
586#define GPIOAD_DOE_OFFS 0x1c4
587#define GPIOAD_FS0_OFFS 0x1c8
588#define GPIOAD_RPU_OFFS 0x1f0
589#define GPIOAD_RPD_OFFS 0x1f4
590#define GPIOAD_DV0_OFFS 0x1f8
591#define GPIOAD_DV1_OFFS 0x1fc
592
593#define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
594
595#define GPIOXC_DAT_OFFS 0x200
596#define GPIOXC_DOE_OFFS 0x204
597#define GPIOXC_FS0_OFFS 0x208
598#define GPIOXC_RPU_OFFS 0x230
599#define GPIOXC_RPD_OFFS 0x234
600#define GPIOXC_DV0_OFFS 0x238
601#define GPIOXC_DV1_OFFS 0x23c
602
603#define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
604
605#define GPIOXC_FS0_CS0 (1 << 26)
606#define GPIOXC_FS0_CS1 (1 << 27)
607
608#define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
609
610#define GPIOXD_DAT_OFFS 0x240
611#define GPIOXD_FS0_OFFS 0x248
612#define GPIOXD_RPU_OFFS 0x270
613#define GPIOXD_RPD_OFFS 0x274
614#define GPIOXD_DV0_OFFS 0x278
615#define GPIOXD_DV1_OFFS 0x27c
616
617#define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000)
618
619#define GPIOPK_RST_OFFS 0x008
620#define GPIOPK_DAT_OFFS 0x100
621#define GPIOPK_DOE_OFFS 0x104
622#define GPIOPK_FS0_OFFS 0x108
623#define GPIOPK_FS1_OFFS 0x10c
624#define GPIOPK_FS2_OFFS 0x110
625#define GPIOPK_IRQST_OFFS 0x210
626#define GPIOPK_IRQEN_OFFS 0x214
627#define GPIOPK_IRQPOL_OFFS 0x218
628#define GPIOPK_IRQTM0_OFFS 0x21c
629#define GPIOPK_IRQTM1_OFFS 0x220
630#define GPIOPK_CTL_OFFS 0x22c
631
632#define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000)
633#define BACKUP_RAM_BASE PMGPIO_BASE
634
635#define PMGPIO_DAT_OFFS 0x800
636#define PMGPIO_DOE_OFFS 0x804
637#define PMGPIO_FS0_OFFS 0x808
638#define PMGPIO_RPU_OFFS 0x810
639#define PMGPIO_RPD_OFFS 0x814
640#define PMGPIO_DV0_OFFS 0x818
641#define PMGPIO_DV1_OFFS 0x81c
642#define PMGPIO_EE0_OFFS 0x820
643#define PMGPIO_EE1_OFFS 0x824
644#define PMGPIO_CTL_OFFS 0x828
645#define PMGPIO_DI_OFFS 0x82c
646#define PMGPIO_STR_OFFS 0x830
647#define PMGPIO_STF_OFFS 0x834
648#define PMGPIO_POL_OFFS 0x838
649#define PMGPIO_APB_OFFS 0x800
650
651/* Clock controller registers */
652#define CKC_BASE ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
653
654#define CLKCTRL_OFFS 0x00
655#define PLL0CFG_OFFS 0x04
656#define PLL1CFG_OFFS 0x08
657#define CLKDIVC0_OFFS 0x0c
658
659#define BCLKCTR0_OFFS 0x14
660#define SWRESET0_OFFS 0x18
661
662#define BCLKCTR1_OFFS 0x60
663#define SWRESET1_OFFS 0x64
664#define PWDCTL_OFFS 0x68
665#define PLL2CFG_OFFS 0x6c
666#define CLKDIVC1_OFFS 0x70
667
668#define ACLKREF_OFFS 0x80
669#define ACLKI2C_OFFS 0x84
670#define ACLKSPI0_OFFS 0x88
671#define ACLKSPI1_OFFS 0x8c
672#define ACLKUART0_OFFS 0x90
673#define ACLKUART1_OFFS 0x94
674#define ACLKUART2_OFFS 0x98
675#define ACLKUART3_OFFS 0x9c
676#define ACLKUART4_OFFS 0xa0
677#define ACLKTCT_OFFS 0xa4
678#define ACLKTCX_OFFS 0xa8
679#define ACLKTCZ_OFFS 0xac
680#define ACLKADC_OFFS 0xb0
681#define ACLKDAI0_OFFS 0xb4
682#define ACLKDAI1_OFFS 0xb8
683#define ACLKLCD_OFFS 0xbc
684#define ACLKSPDIF_OFFS 0xc0
685#define ACLKUSBH_OFFS 0xc4
686#define ACLKSDH0_OFFS 0xc8
687#define ACLKSDH1_OFFS 0xcc
688#define ACLKC3DEC_OFFS 0xd0
689#define ACLKEXT_OFFS 0xd4
690#define ACLKCAN0_OFFS 0xd8
691#define ACLKCAN1_OFFS 0xdc
692#define ACLKGSB0_OFFS 0xe0
693#define ACLKGSB1_OFFS 0xe4
694#define ACLKGSB2_OFFS 0xe8
695#define ACLKGSB3_OFFS 0xec
696
697#define PLLxCFG_PD (1 << 31)
698
699/* CLKCTRL bits */
700#define CLKCTRL_XE (1 << 31)
701
702/* CLKDIVCx bits */
703#define CLKDIVC0_XTE (1 << 7)
704#define CLKDIVC0_XE (1 << 15)
705#define CLKDIVC0_P1E (1 << 23)
706#define CLKDIVC0_P0E (1 << 31)
707
708#define CLKDIVC1_P2E (1 << 7)
709
710/* BCLKCTR0 clock bits */
711#define BCLKCTR0_USBD (1 << 4)
712#define BCLKCTR0_ECC (1 << 9)
713#define BCLKCTR0_USBH0 (1 << 11)
714#define BCLKCTR0_NFC (1 << 16)
715
716/* BCLKCTR1 clock bits */
717#define BCLKCTR1_USBH1 (1 << 20)
718
719/* SWRESET0 bits */
720#define SWRESET0_USBD (1 << 4)
721#define SWRESET0_USBH0 (1 << 11)
722
723/* SWRESET1 bits */
724#define SWRESET1_USBH1 (1 << 20)
725
726/* System clock sources.
727 * Note: These are the clock sources that serve as parents for
728 * all other clocks. They have no parents themselves.
729 *
730 * These values are used for struct clk->root_id. All clocks
731 * that are not system clock sources have this value set to
732 * CLK_SRC_NOROOT.
733 * The values for system clocks start with CLK_SRC_PLL0 == 0
734 * because this gives us exactly the values needed for the lower
735 * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
736 * defined as -1 to not disturb the order.
737 */
738enum root_clks {
739 CLK_SRC_NOROOT = -1,
740 CLK_SRC_PLL0 = 0,
741 CLK_SRC_PLL1,
742 CLK_SRC_PLL0DIV,
743 CLK_SRC_PLL1DIV,
744 CLK_SRC_XI,
745 CLK_SRC_XIDIV,
746 CLK_SRC_XTI,
747 CLK_SRC_XTIDIV,
748 CLK_SRC_PLL2,
749 CLK_SRC_PLL2DIV,
750 CLK_SRC_PK0,
751 CLK_SRC_PK1,
752 CLK_SRC_PK2,
753 CLK_SRC_PK3,
754 CLK_SRC_PK4,
755 CLK_SRC_48MHZ
756};
757
758#define CLK_SRC_MASK 0xf
759
760/* Bits in ACLK* registers */
761#define ACLK_EN (1 << 28)
762#define ACLK_SEL_SHIFT 24
763#define ACLK_SEL_MASK 0x0f000000
764#define ACLK_DIV_MASK 0x00000fff
765
766/* System configuration registers */
767
768#define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000)
769
770#define BMI_OFFS 0x00
771#define AHBCON0_OFFS 0x04
772#define APBPWE_OFFS 0x08
773#define DTCMWAIT_OFFS 0x0c
774#define ECCSEL_OFFS 0x10
775#define AHBCON1_OFFS 0x14
776#define SDHCFG_OFFS 0x18
777#define REMAP_OFFS 0x20
778#define LCDSIAE_OFFS 0x24
779#define XMCCFG_OFFS 0xe0
780#define IMCCFG_OFFS 0xe4
781
782/* Values for ECCSEL */
783#define ECCSEL_EXTMEM 0x0
784#define ECCSEL_DTCM 0x1
785#define ECCSEL_INT_SRAM 0x2
786#define ECCSEL_AHB 0x3
787
788/* Bits in XMCCFG */
789#define XMCCFG_NFCE (1 << 1)
790#define XMCCFG_FDXD (1 << 2)
791
792/* External memory controller registers */
793
794#define EMC_BASE EXT_MEM_CTRL_BASE
795
796#define SDCFG_OFFS 0x00
797#define SDFSM_OFFS 0x04
798#define MCFG_OFFS 0x08
799
800#define CSCFG0_OFFS 0x10
801#define CSCFG1_OFFS 0x14
802#define CSCFG2_OFFS 0x18
803#define CSCFG3_OFFS 0x1c
804
805#define MCFG_SDEN (1 << 4)
806
807#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d9..000000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * A definition needed by arch core code.
3 *
4 */
5#define CLOCK_TICK_RATE (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a30..000000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This file is licensed under the terms of the GPL version 2.
5 */
6
7#include <linux/serial_reg.h>
8#include <linux/types.h>
9
10#include <mach/tcc8k-regs.h>
11
12unsigned int system_rev;
13
14#define ID_MASK 0x7fff
15
16static void putc(int c)
17{
18 u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
19 u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
20
21 while (!(*uart_lsr & UART_LSR_THRE))
22 barrier();
23 *uart_tx = c;
24}
25
26static inline void flush(void)
27{
28}
29
30/*
31 * nothing to do
32 */
33#define arch_decomp_setup()
34#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h
deleted file mode 100644
index 99414d9c2b94..000000000000
--- a/arch/arm/plat-tcc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 *
5 * Copyright (C) 2000 Russell King.
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 */
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7a..000000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * System functions for Telechips TCCxxxx SoCs
3 *
4 * Copyright (C) Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2.
7 *
8 */
9
10#include <linux/io.h>
11
12#include <mach/tcc8k-regs.h>
13
14/* System reboot */
15void plat_tcc_reboot(void)
16{
17 /* Make sure clocks are on */
18 __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
19
20 /* Enable watchdog reset */
21 __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
22 /* Wait for reset */
23 while(1)
24 ;
25}
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c292cab..b33b74c87232 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -18,41 +18,24 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include <linux/kernel.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/sched.h>
23 23
24#include <asm/sched_clock.h> 24#include <asm/sched_clock.h>
25#include <plat/sched_clock.h> 25#include <plat/sched_clock.h>
26 26
27static DEFINE_CLOCK_DATA(cd);
28static void __iomem *ctr; 27static void __iomem *ctr;
29 28
30/* 29static u32 notrace versatile_read_sched_clock(void)
31 * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
32 * This gives a resolution of about 41ns and a wrap period of about 178s.
33 */
34#define SC_MULT 2796202667u
35#define SC_SHIFT 26
36
37unsigned long long notrace sched_clock(void)
38{ 30{
39 if (ctr) { 31 if (ctr)
40 u32 cyc = readl(ctr); 32 return readl(ctr);
41 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
42 SC_MULT, SC_SHIFT);
43 } else
44 return 0;
45}
46 33
47static void notrace versatile_update_sched_clock(void) 34 return 0;
48{
49 u32 cyc = readl(ctr);
50 update_sched_clock(&cd, cyc, (u32)~0);
51} 35}
52 36
53void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate) 37void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
54{ 38{
55 ctr = reg; 39 ctr = reg;
56 init_fixed_sched_clock(&cd, versatile_update_sched_clock, 40 setup_sched_clock(versatile_read_sched_clock, 32, rate);
57 32, rate, SC_MULT, SC_SHIFT);
58} 41}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index ccbe16f47227..f9c9f33f8cbe 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -16,7 +16,7 @@
16# are merged into mainline or have been edited in the machine database 16# are merged into mainline or have been edited in the machine database
17# within the last 12 months. References to machine_is_NAME() do not count! 17# within the last 12 months. References to machine_is_NAME() do not count!
18# 18#
19# Last update: Sat May 7 08:48:24 2011 19# Last update: Tue Dec 6 11:07:38 2011
20# 20#
21# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 21# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
22# 22#
@@ -269,7 +269,7 @@ dns323 MACH_DNS323 DNS323 1542
269omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 269omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546
270nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 270nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548
271pcm038 MACH_PCM038 PCM038 1551 271pcm038 MACH_PCM038 PCM038 1551
272ts_x09 MACH_TS209 TS209 1565 272ts209 MACH_TS209 TS209 1565
273at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 273at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566
274mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 274mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574
275vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 275vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578
@@ -321,7 +321,6 @@ lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769
321mx25_3ds MACH_MX25_3DS MX25_3DS 1771 321mx25_3ds MACH_MX25_3DS MX25_3DS 1771
322omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 322omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773
323davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 323davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781
324at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783
325dove_db MACH_DOVE_DB DOVE_DB 1788 324dove_db MACH_DOVE_DB DOVE_DB 1788
326overo MACH_OVERO OVERO 1798 325overo MACH_OVERO OVERO 1798
327at2440evb MACH_AT2440EVB AT2440EVB 1799 326at2440evb MACH_AT2440EVB AT2440EVB 1799
@@ -459,7 +458,7 @@ guruplug MACH_GURUPLUG GURUPLUG 2659
459spear310 MACH_SPEAR310 SPEAR310 2660 458spear310 MACH_SPEAR310 SPEAR310 2660
460spear320 MACH_SPEAR320 SPEAR320 2661 459spear320 MACH_SPEAR320 SPEAR320 2661
461aquila MACH_AQUILA AQUILA 2676 460aquila MACH_AQUILA AQUILA 2676
462sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 461esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
463msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 462msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
464ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683 463ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683
465terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 464terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697
@@ -491,380 +490,53 @@ eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821
491eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 490eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822
492eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 491eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823
493smdkc210 MACH_SMDKC210 SMDKC210 2838 492smdkc210 MACH_SMDKC210 SMDKC210 2838
494omap3_braillo MACH_OMAP3_BRAILLO OMAP3_BRAILLO 2839
495spyplug MACH_SPYPLUG SPYPLUG 2840
496ginger MACH_GINGER GINGER 2841
497tny_t3530 MACH_TNY_T3530 TNY_T3530 2842
498pca102 MACH_PCA102 PCA102 2843 493pca102 MACH_PCA102 PCA102 2843
499spade MACH_SPADE SPADE 2844
500mxc25_topaz MACH_MXC25_TOPAZ MXC25_TOPAZ 2845
501t5325 MACH_T5325 T5325 2846 494t5325 MACH_T5325 T5325 2846
502gw2361 MACH_GW2361 GW2361 2847
503elog MACH_ELOG ELOG 2848
504income MACH_INCOME INCOME 2849 495income MACH_INCOME INCOME 2849
505bcm589x MACH_BCM589X BCM589X 2850
506etna MACH_ETNA ETNA 2851
507hawks MACH_HAWKS HAWKS 2852
508meson MACH_MESON MESON 2853
509xsbase255 MACH_XSBASE255 XSBASE255 2854
510pvm2030 MACH_PVM2030 PVM2030 2855
511mioa502 MACH_MIOA502 MIOA502 2856
512vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857 496vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857
513vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858 497vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858
514vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859 498vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859
515htc_spv_m700 MACH_HTC_SPV_M700 HTC_SPV_M700 2860
516mx257sx MACH_MX257SX MX257SX 2861 499mx257sx MACH_MX257SX MX257SX 2861
517goni MACH_GONI GONI 2862 500goni MACH_GONI GONI 2862
518msm8x55_svlte_ffa MACH_MSM8X55_SVLTE_FFA MSM8X55_SVLTE_FFA 2863
519msm8x55_svlte_surf MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF 2864
520quickstep MACH_QUICKSTEP QUICKSTEP 2865
521dmw96 MACH_DMW96 DMW96 2866
522hammerhead MACH_HAMMERHEAD HAMMERHEAD 2867
523trident MACH_TRIDENT TRIDENT 2868
524lightning MACH_LIGHTNING LIGHTNING 2869
525iconnect MACH_ICONNECT ICONNECT 2870
526autobot MACH_AUTOBOT AUTOBOT 2871
527coconut MACH_COCONUT COCONUT 2872
528durian MACH_DURIAN DURIAN 2873
529cayenne MACH_CAYENNE CAYENNE 2874
530fuji MACH_FUJI FUJI 2875
531synology_6282 MACH_SYNOLOGY_6282 SYNOLOGY_6282 2876
532em1sy MACH_EM1SY EM1SY 2877
533m502 MACH_M502 M502 2878
534matrix518 MACH_MATRIX518 MATRIX518 2879
535tiny_gurnard MACH_TINY_GURNARD TINY_GURNARD 2880
536spear1310 MACH_SPEAR1310 SPEAR1310 2881
537bv07 MACH_BV07 BV07 2882 501bv07 MACH_BV07 BV07 2882
538mxt_td61 MACH_MXT_TD61 MXT_TD61 2883
539openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884 502openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884
540devixp MACH_DEVIXP DEVIXP 2885 503devixp MACH_DEVIXP DEVIXP 2885
541miccpt MACH_MICCPT MICCPT 2886 504miccpt MACH_MICCPT MICCPT 2886
542mic256 MACH_MIC256 MIC256 2887 505mic256 MACH_MIC256 MIC256 2887
543as1167 MACH_AS1167 AS1167 2888
544omap3_ibiza MACH_OMAP3_IBIZA OMAP3_IBIZA 2889
545u5500 MACH_U5500 U5500 2890 506u5500 MACH_U5500 U5500 2890
546davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891
547mecha MACH_MECHA MECHA 2892
548bubba3 MACH_BUBBA3 BUBBA3 2893
549pupitre MACH_PUPITRE PUPITRE 2894
550tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896
551tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897
552simplenet MACH_SIMPLENET SIMPLENET 2898
553ec4350tbm MACH_EC4350TBM EC4350TBM 2899
554pec_tc MACH_PEC_TC PEC_TC 2900
555pec_hc2 MACH_PEC_HC2 PEC_HC2 2901
556esl_mobilis_a MACH_ESL_MOBILIS_A ESL_MOBILIS_A 2902
557esl_mobilis_b MACH_ESL_MOBILIS_B ESL_MOBILIS_B 2903
558esl_wave_a MACH_ESL_WAVE_A ESL_WAVE_A 2904
559esl_wave_b MACH_ESL_WAVE_B ESL_WAVE_B 2905
560unisense_mmm MACH_UNISENSE_MMM UNISENSE_MMM 2906
561blueshark MACH_BLUESHARK BLUESHARK 2907
562e10 MACH_E10 E10 2908
563app3k_robin MACH_APP3K_ROBIN APP3K_ROBIN 2909
564pov15hd MACH_POV15HD POV15HD 2910
565stella MACH_STELLA STELLA 2911
566linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 507linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913
567netwalker MACH_NETWALKER NETWALKER 2914
568acsx106 MACH_ACSX106 ACSX106 2915
569atlas5_c1 MACH_ATLAS5_C1 ATLAS5_C1 2916
570nsb3ast MACH_NSB3AST NSB3AST 2917
571gnet_slc MACH_GNET_SLC GNET_SLC 2918
572af4000 MACH_AF4000 AF4000 2919
573ark9431 MACH_ARK9431 ARK9431 2920
574fs_s5pc100 MACH_FS_S5PC100 FS_S5PC100 2921
575omap3505nova8 MACH_OMAP3505NOVA8 OMAP3505NOVA8 2922
576omap3621_edp1 MACH_OMAP3621_EDP1 OMAP3621_EDP1 2923
577oratisaes MACH_ORATISAES ORATISAES 2924
578smdkv310 MACH_SMDKV310 SMDKV310 2925 508smdkv310 MACH_SMDKV310 SMDKV310 2925
579siemens_l0 MACH_SIEMENS_L0 SIEMENS_L0 2926
580ventana MACH_VENTANA VENTANA 2927
581wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928 509wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928
582ec4350sdb MACH_EC4350SDB EC4350SDB 2929
583mimas MACH_MIMAS MIMAS 2930
584titan MACH_TITAN TITAN 2931
585craneboard MACH_CRANEBOARD CRANEBOARD 2932 510craneboard MACH_CRANEBOARD CRANEBOARD 2932
586es2440 MACH_ES2440 ES2440 2933
587najay_a9263 MACH_NAJAY_A9263 NAJAY_A9263 2934
588htctornado MACH_HTCTORNADO HTCTORNADO 2935
589dimm_mx257 MACH_DIMM_MX257 DIMM_MX257 2936
590jigen301 MACH_JIGEN JIGEN 2937
591smdk6450 MACH_SMDK6450 SMDK6450 2938 511smdk6450 MACH_SMDK6450 SMDK6450 2938
592meno_qng MACH_MENO_QNG MENO_QNG 2939
593ns2416 MACH_NS2416 NS2416 2940
594rpc353 MACH_RPC353 RPC353 2941
595tq6410 MACH_TQ6410 TQ6410 2942
596sky6410 MACH_SKY6410 SKY6410 2943
597dynasty MACH_DYNASTY DYNASTY 2944
598vivo MACH_VIVO VIVO 2945
599bury_bl7582 MACH_BURY_BL7582 BURY_BL7582 2946
600bury_bps5270 MACH_BURY_BPS5270 BURY_BPS5270 2947
601basi MACH_BASI BASI 2948
602tn200 MACH_TN200 TN200 2949
603c2mmi MACH_C2MMI C2MMI 2950
604meson_6236m MACH_MESON_6236M MESON_6236M 2951
605meson_8626m MACH_MESON_8626M MESON_8626M 2952
606tube MACH_TUBE TUBE 2953
607messina MACH_MESSINA MESSINA 2954
608mx50_arm2 MACH_MX50_ARM2 MX50_ARM2 2955
609cetus9263 MACH_CETUS9263 CETUS9263 2956
610brownstone MACH_BROWNSTONE BROWNSTONE 2957 512brownstone MACH_BROWNSTONE BROWNSTONE 2957
611vmx25 MACH_VMX25 VMX25 2958
612vmx51 MACH_VMX51 VMX51 2959
613abacus MACH_ABACUS ABACUS 2960
614cm4745 MACH_CM4745 CM4745 2961
615oratislink MACH_ORATISLINK ORATISLINK 2962
616davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963
617netviz MACH_NETVIZ NETVIZ 2964
618flexibity MACH_FLEXIBITY FLEXIBITY 2965 513flexibity MACH_FLEXIBITY FLEXIBITY 2965
619wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966
620lpc24xx MACH_LPC24XX LPC24XX 2967
621spica MACH_SPICA SPICA 2968
622gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969
623bipnet MACH_BIPNET BIPNET 2970
624overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971
625davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972
626pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973
627ptx7545 MACH_PTX7545 PTX7545 2974
628tm_efdc MACH_TM_EFDC TM_EFDC 2975
629omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977
630flyer MACH_FLYER FLYER 2978
631tornado3240 MACH_TORNADO3240 TORNADO3240 2979
632soli_01 MACH_SOLI_01 SOLI_01 2980
633omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981
634helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982
635netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983
636ssc MACH_SSC SSC 2984
637premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
638wasabi MACH_WASABI WASABI 2986
639mx50_rdp MACH_MX50_RDP MX50_RDP 2988 514mx50_rdp MACH_MX50_RDP MX50_RDP 2988
640universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 515universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989
641real6410 MACH_REAL6410 REAL6410 2990 516real6410 MACH_REAL6410 REAL6410 2990
642spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991
643ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992
644omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993
645thebe MACH_THEBE THEBE 2994
646rv082 MACH_RV082 RV082 2995
647armlguest MACH_ARMLGUEST ARMLGUEST 2996
648tjinc1000 MACH_TJINC1000 TJINC1000 2997
649dockstar MACH_DOCKSTAR DOCKSTAR 2998 517dockstar MACH_DOCKSTAR DOCKSTAR 2998
650ax8008 MACH_AX8008 AX8008 2999
651gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000
652pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
653ea20 MACH_EA20 EA20 3002
654awm2 MACH_AWM2 AWM2 3003
655ti8148evm MACH_TI8148EVM TI8148EVM 3004 518ti8148evm MACH_TI8148EVM TI8148EVM 3004
656seaboard MACH_SEABOARD SEABOARD 3005 519seaboard MACH_SEABOARD SEABOARD 3005
657linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
658tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
659rubys MACH_RUBYS RUBYS 3008
660aquarius MACH_AQUARIUS AQUARIUS 3009
661mx53_ard MACH_MX53_ARD MX53_ARD 3010 520mx53_ard MACH_MX53_ARD MX53_ARD 3010
662mx53_smd MACH_MX53_SMD MX53_SMD 3011 521mx53_smd MACH_MX53_SMD MX53_SMD 3011
663lswxl MACH_LSWXL LSWXL 3012
664dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013
665sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014
666jocpu550 MACH_JOCPU550 JOCPU550 3015
667msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016 522msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016
668msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017 523msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017
669yanomami MACH_YANOMAMI YANOMAMI 3018
670gta04 MACH_GTA04 GTA04 3019
671cm_a510 MACH_CM_A510 CM_A510 3020 524cm_a510 MACH_CM_A510 CM_A510 3020
672omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021
673kx33xx MACH_KX33XX KX33XX 3022
674ptx7510 MACH_PTX7510 PTX7510 3023
675top9000 MACH_TOP9000 TOP9000 3024
676teenote MACH_TEENOTE TEENOTE 3025
677ts3 MACH_TS3 TS3 3026
678a0 MACH_A0 A0 3027
679fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028
680fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029
681frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030
682remus MACH_REMUS REMUS 3031
683at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032
684at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033
685kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034
686armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036
687spdm MACH_SPDM SPDM 3037
688gtib MACH_GTIB GTIB 3038
689dgm3240 MACH_DGM3240 DGM3240 3039
690htcmega MACH_HTCMEGA HTCMEGA 3041
691tricorder MACH_TRICORDER TRICORDER 3042
692tx28 MACH_TX28 TX28 3043 525tx28 MACH_TX28 TX28 3043
693bstbrd MACH_BSTBRD BSTBRD 3044
694pwb3090 MACH_PWB3090 PWB3090 3045
695idea6410 MACH_IDEA6410 IDEA6410 3046
696qbc9263 MACH_QBC9263 QBC9263 3047
697borabora MACH_BORABORA BORABORA 3048
698valdez MACH_VALDEZ VALDEZ 3049
699ls9g20 MACH_LS9G20 LS9G20 3050
700mios_v1 MACH_MIOS_V1 MIOS_V1 3051
701s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052
702controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053
703tin307 MACH_TIN307 TIN307 3054
704tin510 MACH_TIN510 TIN510 3055
705bluecheese MACH_BLUECHEESE BLUECHEESE 3057
706tem3x30 MACH_TEM3X30 TEM3X30 3058
707harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059
708msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060
709spear900 MACH_SPEAR900 SPEAR900 3061
710pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 526pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062
711rdstor MACH_RDSTOR RDSTOR 3063
712usdloader MACH_USDLOADER USDLOADER 3064
713tsoploader MACH_TSOPLOADER TSOPLOADER 3065
714kronos MACH_KRONOS KRONOS 3066
715ffcore MACH_FFCORE FFCORE 3067
716mone MACH_MONE MONE 3068
717unit2s MACH_UNIT2S UNIT2S 3069
718acer_a5 MACH_ACER_A5 ACER_A5 3070
719etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071
720stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072
721p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073
722tulip MACH_TULIP TULIP 3074
723sunflower MACH_SUNFLOWER SUNFLOWER 3075
724rib MACH_RIB RIB 3076
725clod MACH_CLOD CLOD 3077
726rump MACH_RUMP RUMP 3078
727tenderloin MACH_TENDERLOIN TENDERLOIN 3079
728shortloin MACH_SHORTLOIN SHORTLOIN 3080
729antares MACH_ANTARES ANTARES 3082
730wb40n MACH_WB40N WB40N 3083
731herring MACH_HERRING HERRING 3084
732naxy400 MACH_NAXY400 NAXY400 3085
733naxy1200 MACH_NAXY1200 NAXY1200 3086
734vpr200 MACH_VPR200 VPR200 3087 527vpr200 MACH_VPR200 VPR200 3087
735bug20 MACH_BUG20 BUG20 3088
736goflexnet MACH_GOFLEXNET GOFLEXNET 3089
737torbreck MACH_TORBRECK TORBRECK 3090 528torbreck MACH_TORBRECK TORBRECK 3090
738saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091
739callisto MACH_CALLISTO CALLISTO 3092
740multhsu MACH_MULTHSU MULTHSU 3093
741saluda MACH_SALUDA SALUDA 3094
742pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095
743vc0718 MACH_VC0718 VC0718 3096
744mvblx MACH_MVBLX MVBLX 3097
745inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098
746inhand_fury MACH_INHAND_FURY INHAND_FURY 3099
747inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100
748hdnvp MACH_HDNVP HDNVP 3101
749softwinner MACH_SOFTWINNER SOFTWINNER 3102
750prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 529prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103
751nas6210 MACH_NAS6210 NAS6210 3104
752unisdev MACH_UNISDEV UNISDEV 3105
753sbca11 MACH_SBCA11 SBCA11 3106
754saga MACH_SAGA SAGA 3107
755ns_k330 MACH_NS_K330 NS_K330 3108
756tanna MACH_TANNA TANNA 3109
757imate8502 MACH_IMATE8502 IMATE8502 3110
758aspen MACH_ASPEN ASPEN 3111
759daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112
760zmx25 MACH_ZMX25 ZMX25 3113
761maple1 MACH_MAPLE1 MAPLE1 3114
762qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115
763qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116
764abilene MACH_ABILENE ABILENE 3117
765eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118
766iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119
767coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120
768santiago MACH_SANTIAGO SANTIAGO 3121
769mx257sol MACH_MX257SOL MX257SOL 3122
770strasbourg MACH_STRASBOURG STRASBOURG 3123
771msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124
772smartqv5 MACH_SMARTQV5 SMARTQV5 3125
773smartqv3 MACH_SMARTQV3 SMARTQV3 3126
774smartqv7 MACH_SMARTQV7 SMARTQV7 3127
775paz00 MACH_PAZ00 PAZ00 3128 530paz00 MACH_PAZ00 PAZ00 3128
776acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 531acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
777fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131
778hdgu MACH_HDGU HDGU 3132
779pyramid MACH_PYRAMID PYRAMID 3133
780epiphan MACH_EPIPHAN EPIPHAN 3134
781omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135
782gurnard MACH_GURNARD GURNARD 3136
783gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137
784bcm2708 MACH_BCM2708 BCM2708 3138
785mx51_ggc MACH_MX51_GGC MX51_GGC 3139
786sharespace MACH_SHARESPACE SHARESPACE 3140
787haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141
788simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142
789crux MACH_CRUX CRUX 3143
790mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144
791charon MACH_CHARON CHARON 3145
792picocom3 MACH_PICOCOM3 PICOCOM3 3146
793picocom4 MACH_PICOCOM4 PICOCOM4 3147
794serrano MACH_SERRANO SERRANO 3148
795doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149
796evsy MACH_EVSY EVSY 3150
797huashan MACH_HUASHAN HUASHAN 3151
798lausanne MACH_LAUSANNE LAUSANNE 3152
799emerald MACH_EMERALD EMERALD 3153
800tqma35 MACH_TQMA35 TQMA35 3154
801marvel MACH_MARVEL MARVEL 3155
802manuae MACH_MANUAE MANUAE 3156
803chacha MACH_CHACHA CHACHA 3157
804lemon MACH_LEMON LEMON 3158
805csc MACH_CSC CSC 3159
806gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160
807t20 MACH_T20 T20 3161
808hdmini MACH_HDMINI HDMINI 3162
809sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163
810express MACH_EXPRESS EXPRESS 3164
811express_kt MACH_EXPRESS_KT EXPRESS_KT 3165
812maximasp MACH_MAXIMASP MAXIMASP 3166
813nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167
814nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168
815sunfire MACH_SUNFIRE SUNFIRE 3169
816arowana MACH_AROWANA AROWANA 3170
817tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171
818tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172
819edison MACH_EDISON EDISON 3173
820svp8500v1 MACH_SVP8500V1 SVP8500V1 3174
821svp8500v2 MACH_SVP8500V2 SVP8500V2 3175
822svp5500 MACH_SVP5500 SVP5500 3176
823b5500 MACH_B5500 B5500 3177
824s5500 MACH_S5500 S5500 3178
825icon MACH_ICON ICON 3179
826elephant MACH_ELEPHANT ELEPHANT 3180
827shooter MACH_SHOOTER SHOOTER 3182
828spade_lte MACH_SPADE_LTE SPADE_LTE 3183
829philhwani MACH_PHILHWANI PHILHWANI 3184
830gsncomm MACH_GSNCOMM GSNCOMM 3185
831strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186
832mmm MACH_MMM MMM 3187
833davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188
834ag5evm MACH_AG5EVM AG5EVM 3189 532ag5evm MACH_AG5EVM AG5EVM 3189
835sc575plc MACH_SC575PLC SC575PLC 3190
836sc575hmi MACH_SC575IPC SC575IPC 3191
837omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192
838top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194
839top9000_su MACH_TOP9000_SU TOP9000_SU 3195
840utm300 MACH_UTM300 UTM300 3196
841tsunagi MACH_TSUNAGI TSUNAGI 3197 533tsunagi MACH_TSUNAGI TSUNAGI 3197
842ts75xx MACH_TS75XX TS75XX 3198
843ts47xx MACH_TS47XX TS47XX 3200
844da850_k5 MACH_DA850_K5 DA850_K5 3201
845ax502 MACH_AX502 AX502 3202
846igep0032 MACH_IGEP0032 IGEP0032 3203
847antero MACH_ANTERO ANTERO 3204
848synergy MACH_SYNERGY SYNERGY 3205
849ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 534ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
850wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 535wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
851punica MACH_PUNICA PUNICA 3208
852trimslice MACH_TRIMSLICE TRIMSLICE 3209 536trimslice MACH_TRIMSLICE TRIMSLICE 3209
853mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
854mackerel MACH_MACKEREL MACKEREL 3211 537mackerel MACH_MACKEREL MACKEREL 3211
855fa9x27 MACH_FA9X27 FA9X27 3213
856ns2816tb MACH_NS2816TB NS2816TB 3214
857ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215
858ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216
859kaen MACH_KAEN KAEN 3217 538kaen MACH_KAEN KAEN 3217
860nv1000 MACH_NV1000 NV1000 3218
861nuc950ts MACH_NUC950TS NUC950TS 3219
862nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 539nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
863ast2200 MACH_AST2200 AST2200 3221
864lead MACH_LEAD LEAD 3222
865unino1 MACH_UNINO1 UNINO1 3223
866greeco MACH_GREECO GREECO 3224
867verdi MACH_VERDI VERDI 3225
868dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226 540dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226
869quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227 541quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227
870abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228 542abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228
@@ -949,13 +621,11 @@ koi MACH_KOI KOI 3312
949ts4800 MACH_TS4800 TS4800 3313 621ts4800 MACH_TS4800 TS4800 3313
950tqma9263 MACH_TQMA9263 TQMA9263 3314 622tqma9263 MACH_TQMA9263 TQMA9263 3314
951holiday MACH_HOLIDAY HOLIDAY 3315 623holiday MACH_HOLIDAY HOLIDAY 3315
952dma_6410 MACH_DMA6410 DMA6410 3316
953pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317 624pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
954hwgw6410 MACH_HWGW6410 HWGW6410 3318 625hwgw6410 MACH_HWGW6410 HWGW6410 3318
955shenzhou MACH_SHENZHOU SHENZHOU 3319 626shenzhou MACH_SHENZHOU SHENZHOU 3319
956cwme9210 MACH_CWME9210 CWME9210 3320 627cwme9210 MACH_CWME9210 CWME9210 3320
957cwme9210js MACH_CWME9210JS CWME9210JS 3321 628cwme9210js MACH_CWME9210JS CWME9210JS 3321
958pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
959colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 629colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
960w21 MACH_W21 W21 3324 630w21 MACH_W21 W21 3324
961polysat1 MACH_POLYSAT1 POLYSAT1 3325 631polysat1 MACH_POLYSAT1 POLYSAT1 3325
@@ -1021,13 +691,11 @@ viprinet MACH_VIPRINET VIPRINET 3385
1021bockw MACH_BOCKW BOCKW 3386 691bockw MACH_BOCKW BOCKW 3386
1022eva2000 MACH_EVA2000 EVA2000 3387 692eva2000 MACH_EVA2000 EVA2000 3387
1023steelyard MACH_STEELYARD STEELYARD 3388 693steelyard MACH_STEELYARD STEELYARD 3388
1024sdh001 MACH_MACH_SDH001 MACH_SDH001 3390
1025nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 694nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392
1026geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 695geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393
1027spear1340 MACH_SPEAR1340 SPEAR1340 3394 696spear1340 MACH_SPEAR1340 SPEAR1340 3394
1028rexmas MACH_REXMAS REXMAS 3395 697rexmas MACH_REXMAS REXMAS 3395
1029msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 698msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396
1030msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397
1031msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 699msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398
1032msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 700msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399
1033helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 701helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400
@@ -1123,6 +791,381 @@ blissc MACH_BLISSC BLISSC 3491
1123thales_adc MACH_THALES_ADC THALES_ADC 3492 791thales_adc MACH_THALES_ADC THALES_ADC 3492
1124ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 792ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493
1125atdgp318 MACH_ATDGP318 ATDGP318 3494 793atdgp318 MACH_ATDGP318 ATDGP318 3494
794dma210u MACH_DMA210U DMA210U 3495
795em_t3 MACH_EM_T3 EM_T3 3496
796htx3250 MACH_HTX3250 HTX3250 3497
797g50 MACH_G50 G50 3498
798eco5 MACH_ECO5 ECO5 3499
799wintergrasp MACH_WINTERGRASP WINTERGRASP 3500
800puro MACH_PURO PURO 3501
801shooter_k MACH_SHOOTER_K SHOOTER_K 3502
802nspire MACH_NSPIRE NSPIRE 3503
803mickxx MACH_MICKXX MICKXX 3504
804lxmb MACH_LXMB LXMB 3505
805adam MACH_ADAM ADAM 3507
806b1004 MACH_B1004 B1004 3508
807oboea MACH_OBOEA OBOEA 3509
808a1015 MACH_A1015 A1015 3510
809robin_vbdt30 MACH_ROBIN_VBDT30 ROBIN_VBDT30 3511
810tegra_enterprise MACH_TEGRA_ENTERPRISE TEGRA_ENTERPRISE 3512
811rfl108200_mk10 MACH_RFL108200_MK10 RFL108200_MK10 3513
812rfl108300_mk16 MACH_RFL108300_MK16 RFL108300_MK16 3514
813rover_v7 MACH_ROVER_V7 ROVER_V7 3515
814miphone MACH_MIPHONE MIPHONE 3516
815femtobts MACH_FEMTOBTS FEMTOBTS 3517
816monopoli MACH_MONOPOLI MONOPOLI 3518
817boss MACH_BOSS BOSS 3519
818davinci_dm368_vtam MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM 3520
819clcon MACH_CLCON CLCON 3521
820nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522
821tahiti MACH_TAHITI TAHITI 3523
822fighter MACH_FIGHTER FIGHTER 3524
823sgh_i710 MACH_SGH_I710 SGH_I710 3525
824integreproscb MACH_INTEGREPROSCB INTEGREPROSCB 3526
825monza MACH_MONZA MONZA 3527
826calimain MACH_CALIMAIN CALIMAIN 3528
827mx6q_sabreauto MACH_MX6Q_SABREAUTO MX6Q_SABREAUTO 3529
828gma01x MACH_GMA01X GMA01X 3530
829sbc51 MACH_SBC51 SBC51 3531
830fit MACH_FIT FIT 3532
831steelhead MACH_STEELHEAD STEELHEAD 3533
832panther MACH_PANTHER PANTHER 3534
833msm8960_liquid MACH_MSM8960_LIQUID MSM8960_LIQUID 3535
834lexikonct MACH_LEXIKONCT LEXIKONCT 3536
835ns2816_stb MACH_NS2816_STB NS2816_STB 3537
836sei_mm2_lpc3250 MACH_SEI_MM2_LPC3250 SEI_MM2_LPC3250 3538
837cmimx53 MACH_CMIMX53 CMIMX53 3539
838sandwich MACH_SANDWICH SANDWICH 3540
839chief MACH_CHIEF CHIEF 3541
840pogo_e02 MACH_POGO_E02 POGO_E02 3542
841mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543
842htcmozart MACH_HTCMOZART HTCMOZART 3544
843htcgold MACH_HTCGOLD HTCGOLD 3545
844mt72xx MACH_MT72XX MT72XX 3546
845mx51_ivy MACH_MX51_IVY MX51_IVY 3547
846mx51_lvd MACH_MX51_LVD MX51_LVD 3548
847omap3_wiser2 MACH_OMAP3_WISER2 OMAP3_WISER2 3549
848dreamplug MACH_DREAMPLUG DREAMPLUG 3550
849cobas_c_111 MACH_COBAS_C_111 COBAS_C_111 3551
850cobas_u_411 MACH_COBAS_U_411 COBAS_U_411 3552
851hssd MACH_HSSD HSSD 3553
852iom35x MACH_IOM35X IOM35X 3554
853psom_omap MACH_PSOM_OMAP PSOM_OMAP 3555
854iphone_2g MACH_IPHONE_2G IPHONE_2G 3556
855iphone_3g MACH_IPHONE_3G IPHONE_3G 3557
856ipod_touch_1g MACH_IPOD_TOUCH_1G IPOD_TOUCH_1G 3558
857pharos_tpc MACH_PHAROS_TPC PHAROS_TPC 3559
858mx53_hydra MACH_MX53_HYDRA MX53_HYDRA 3560
859ns2816_dev_board MACH_NS2816_DEV_BOARD NS2816_DEV_BOARD 3561
860iphone_3gs MACH_IPHONE_3GS IPHONE_3GS 3562
861iphone_4 MACH_IPHONE_4 IPHONE_4 3563
862ipod_touch_4g MACH_IPOD_TOUCH_4G IPOD_TOUCH_4G 3564
863dragon_e1100 MACH_DRAGON_E1100 DRAGON_E1100 3565
864topside MACH_TOPSIDE TOPSIDE 3566
865irisiii MACH_IRISIII IRISIII 3567
866deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568
867eti_d1 MACH_ETI_D1 ETI_D1 3569
868som3530sdk MACH_SOM3530SDK SOM3530SDK 3570
869oc_engine MACH_OC_ENGINE OC_ENGINE 3571
870apq8064_sim MACH_APQ8064_SIM APQ8064_SIM 3572
871alps MACH_ALPS ALPS 3575
872tny_t3730 MACH_TNY_T3730 TNY_T3730 3576
873geryon_nfe MACH_GERYON_NFE GERYON_NFE 3577
874ns2816_ref_board MACH_NS2816_REF_BOARD NS2816_REF_BOARD 3578
875silverstone MACH_SILVERSTONE SILVERSTONE 3579
876mtt2440 MACH_MTT2440 MTT2440 3580
877ynicdb MACH_YNICDB YNICDB 3581
878bct MACH_BCT BCT 3582
879tuscan MACH_TUSCAN TUSCAN 3583
880xbt_sam9g45 MACH_XBT_SAM9G45 XBT_SAM9G45 3584
881enbw_cmc MACH_ENBW_CMC ENBW_CMC 3585
882ch104mx257 MACH_CH104MX257 CH104MX257 3587
883openpri MACH_OPENPRI OPENPRI 3588
884am335xevm MACH_AM335XEVM AM335XEVM 3589
885picodmb MACH_PICODMB PICODMB 3590
886waluigi MACH_WALUIGI WALUIGI 3591
887punicag7 MACH_PUNICAG7 PUNICAG7 3592
888ipad_1g MACH_IPAD_1G IPAD_1G 3593
889appletv_2g MACH_APPLETV_2G APPLETV_2G 3594
890mach_ecog45 MACH_MACH_ECOG45 MACH_ECOG45 3595
891ait_cam_enc_4xx MACH_AIT_CAM_ENC_4XX AIT_CAM_ENC_4XX 3596
892runnymede MACH_RUNNYMEDE RUNNYMEDE 3597
893play MACH_PLAY PLAY 3598
894hw90260 MACH_HW90260 HW90260 3599
895tagh MACH_TAGH TAGH 3600
896filbert MACH_FILBERT FILBERT 3601
897getinge_netcomv3 MACH_GETINGE_NETCOMV3 GETINGE_NETCOMV3 3602
898cw20 MACH_CW20 CW20 3603
899cinema MACH_CINEMA CINEMA 3604
900cinema_tea MACH_CINEMA_TEA CINEMA_TEA 3605
901cinema_coffee MACH_CINEMA_COFFEE CINEMA_COFFEE 3606
902cinema_juice MACH_CINEMA_JUICE CINEMA_JUICE 3607
903mx53_mirage2 MACH_MX53_MIRAGE2 MX53_MIRAGE2 3609
904mx53_efikasb MACH_MX53_EFIKASB MX53_EFIKASB 3610
905stm_b2000 MACH_STM_B2000 STM_B2000 3612
1126m28evk MACH_M28EVK M28EVK 3613 906m28evk MACH_M28EVK M28EVK 3613
907pda MACH_PDA PDA 3614
908meraki_mr58 MACH_MERAKI_MR58 MERAKI_MR58 3615
909kota2 MACH_KOTA2 KOTA2 3616
910letcool MACH_LETCOOL LETCOOL 3617
911mx27iat MACH_MX27IAT MX27IAT 3618
912apollo_td MACH_APOLLO_TD APOLLO_TD 3619
913arena MACH_ARENA ARENA 3620
914gsngateway MACH_GSNGATEWAY GSNGATEWAY 3621
915lf2000 MACH_LF2000 LF2000 3622
916bonito MACH_BONITO BONITO 3623
917asymptote MACH_ASYMPTOTE ASYMPTOTE 3624
918bst2brd MACH_BST2BRD BST2BRD 3625
919tx335s MACH_TX335S TX335S 3626
920pelco_tesla MACH_PELCO_TESLA PELCO_TESLA 3627
921rrhtestplat MACH_RRHTESTPLAT RRHTESTPLAT 3628
922vidtonic_pro MACH_VIDTONIC_PRO VIDTONIC_PRO 3629
923pl_apollo MACH_PL_APOLLO PL_APOLLO 3630
924pl_phoenix MACH_PL_PHOENIX PL_PHOENIX 3631
925m28cu3 MACH_M28CU3 M28CU3 3632
926vvbox_hd MACH_VVBOX_HD VVBOX_HD 3633
927coreware_sam9260_ MACH_COREWARE_SAM9260_ COREWARE_SAM9260_ 3634
928marmaduke MACH_MARMADUKE MARMADUKE 3635
929amg_xlcore_camera MACH_AMG_XLCORE_CAMERA AMG_XLCORE_CAMERA 3636
930omap3_egf MACH_OMAP3_EGF OMAP3_EGF 3637
1127smdk4212 MACH_SMDK4212 SMDK4212 3638 931smdk4212 MACH_SMDK4212 SMDK4212 3638
932dnp9200 MACH_DNP9200 DNP9200 3639
933tf101 MACH_TF101 TF101 3640
934omap3silvio MACH_OMAP3SILVIO OMAP3SILVIO 3641
935picasso2 MACH_PICASSO2 PICASSO2 3642
936vangogh2 MACH_VANGOGH2 VANGOGH2 3643
937olpc_xo_1_75 MACH_OLPC_XO_1_75 OLPC_XO_1_75 3644
938gx400 MACH_GX400 GX400 3645
939gs300 MACH_GS300 GS300 3646
940acer_a9 MACH_ACER_A9 ACER_A9 3647
941vivow_evm MACH_VIVOW_EVM VIVOW_EVM 3648
942veloce_cxq MACH_VELOCE_CXQ VELOCE_CXQ 3649
943veloce_cxm MACH_VELOCE_CXM VELOCE_CXM 3650
944p1852 MACH_P1852 P1852 3651
945naxy100 MACH_NAXY100 NAXY100 3652
946taishan MACH_TAISHAN TAISHAN 3653
947touchlink MACH_TOUCHLINK TOUCHLINK 3654
948stm32f103ze MACH_STM32F103ZE STM32F103ZE 3655
949mcx MACH_MCX MCX 3656
950stm_nmhdk_fli7610 MACH_STM_NMHDK_FLI7610 STM_NMHDK_FLI7610 3657
951top28x MACH_TOP28X TOP28X 3658
952okl4vp_microvisor MACH_OKL4VP_MICROVISOR OKL4VP_MICROVISOR 3659
953pop MACH_POP POP 3660
954layer MACH_LAYER LAYER 3661
955trondheim MACH_TRONDHEIM TRONDHEIM 3662
956eva MACH_EVA EVA 3663
957trust_taurus MACH_TRUST_TAURUS TRUST_TAURUS 3664
958ns2816_huashan MACH_NS2816_HUASHAN NS2816_HUASHAN 3665
959ns2816_yangcheng MACH_NS2816_YANGCHENG NS2816_YANGCHENG 3666
960p852 MACH_P852 P852 3667
961flea3 MACH_FLEA3 FLEA3 3668
962bowfin MACH_BOWFIN BOWFIN 3669
963mv88de3100 MACH_MV88DE3100 MV88DE3100 3670
964pia_am35x MACH_PIA_AM35X PIA_AM35X 3671
965cedar MACH_CEDAR CEDAR 3672
966picasso_e MACH_PICASSO_E PICASSO_E 3673
967samsung_e60 MACH_SAMSUNG_E60 SAMSUNG_E60 3674
968sdvr_mini MACH_SDVR_MINI SDVR_MINI 3676
969omap3_ij3k MACH_OMAP3_IJ3K OMAP3_IJ3K 3677
970modasmc1 MACH_MODASMC1 MODASMC1 3678
971apq8064_rumi3 MACH_APQ8064_RUMI3 APQ8064_RUMI3 3679
972matrix506 MACH_MATRIX506 MATRIX506 3680
973msm9615_mtp MACH_MSM9615_MTP MSM9615_MTP 3681
974dm36x_spawndc MACH_DM36X_SPAWNDC DM36X_SPAWNDC 3682
975sff792 MACH_SFF792 SFF792 3683
976am335xiaevm MACH_AM335XIAEVM AM335XIAEVM 3684
977g3c2440 MACH_G3C2440 G3C2440 3685
978tion270 MACH_TION270 TION270 3686
979w22q7arm02 MACH_W22Q7ARM02 W22Q7ARM02 3687
980omap_cat MACH_OMAP_CAT OMAP_CAT 3688
981at91sam9n12ek MACH_AT91SAM9N12EK AT91SAM9N12EK 3689
982morrison MACH_MORRISON MORRISON 3690
983svdu MACH_SVDU SVDU 3691
984lpp01 MACH_LPP01 LPP01 3692
985ubc283 MACH_UBC283 UBC283 3693
986zeppelin MACH_ZEPPELIN ZEPPELIN 3694
987motus MACH_MOTUS MOTUS 3695
988neomainboard MACH_NEOMAINBOARD NEOMAINBOARD 3696
989devkit3250 MACH_DEVKIT3250 DEVKIT3250 3697
990devkit7000 MACH_DEVKIT7000 DEVKIT7000 3698
991fmc_uic MACH_FMC_UIC FMC_UIC 3699
992fmc_dcm MACH_FMC_DCM FMC_DCM 3700
993batwm MACH_BATWM BATWM 3701
994atlas6cb MACH_ATLAS6CB ATLAS6CB 3702
995blue MACH_BLUE BLUE 3705
996colorado MACH_COLORADO COLORADO 3706
997popc MACH_POPC POPC 3707
998promwad_jade MACH_PROMWAD_JADE PROMWAD_JADE 3708
999amp MACH_AMP AMP 3709
1000gnet_amp MACH_GNET_AMP GNET_AMP 3710
1001toques MACH_TOQUES TOQUES 3711
1002dct_storm MACH_DCT_STORM DCT_STORM 3713
1003owl MACH_OWL OWL 3715
1004cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716
1005adillustra610 MACH_ADILLUSTRA610 ADILLUSTRA610 3718
1006ecafe_na04 MACH_ECAFE_NA04 ECAFE_NA04 3719
1007popct MACH_POPCT POPCT 3720
1008omap3_helena MACH_OMAP3_HELENA OMAP3_HELENA 3721
1009ach MACH_ACH ACH 3722
1010module_dtb MACH_MODULE_DTB MODULE_DTB 3723
1011oslo_elisabeth MACH_OSLO_ELISABETH OSLO_ELISABETH 3725
1012tt01 MACH_TT01 TT01 3726
1013msm8930_cdp MACH_MSM8930_CDP MSM8930_CDP 3727
1014msm8930_mtp MACH_MSM8930_MTP MSM8930_MTP 3728
1015msm8930_fluid MACH_MSM8930_FLUID MSM8930_FLUID 3729
1016ltu11 MACH_LTU11 LTU11 3730
1017am1808_spawnco MACH_AM1808_SPAWNCO AM1808_SPAWNCO 3731
1018flx6410 MACH_FLX6410 FLX6410 3732
1019mx6q_qsb MACH_MX6Q_QSB MX6Q_QSB 3733
1020mx53_plt424 MACH_MX53_PLT424 MX53_PLT424 3734
1021jasmine MACH_JASMINE JASMINE 3735
1022l138_owlboard_plus MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS 3736
1023wr21 MACH_WR21 WR21 3737
1024peaboy MACH_PEABOY PEABOY 3739
1025mx28_plato MACH_MX28_PLATO MX28_PLATO 3740
1026kacom2 MACH_KACOM2 KACOM2 3741
1027slco MACH_SLCO SLCO 3742
1028imx51pico MACH_IMX51PICO IMX51PICO 3743
1029glink1 MACH_GLINK1 GLINK1 3744
1030diamond MACH_DIAMOND DIAMOND 3745
1031d9000 MACH_D9000 D9000 3746
1032w5300e01 MACH_W5300E01 W5300E01 3747
1033im6000 MACH_IM6000 IM6000 3748
1034mx51_fred51 MACH_MX51_FRED51 MX51_FRED51 3749
1035stm32f2 MACH_STM32F2 STM32F2 3750
1036ville MACH_VILLE VILLE 3751
1037ptip_murnau MACH_PTIP_MURNAU PTIP_MURNAU 3752
1038ptip_classic MACH_PTIP_CLASSIC PTIP_CLASSIC 3753
1039mx53grb MACH_MX53GRB MX53GRB 3754
1040gagarin MACH_GAGARIN GAGARIN 3755
1041nas2big MACH_NAS2BIG NAS2BIG 3757
1042superfemto MACH_SUPERFEMTO SUPERFEMTO 3758
1043teufel MACH_TEUFEL TEUFEL 3759
1044dinara MACH_DINARA DINARA 3760
1045vanquish MACH_VANQUISH VANQUISH 3761
1046zipabox1 MACH_ZIPABOX1 ZIPABOX1 3762
1047u9540 MACH_U9540 U9540 3763
1048jet MACH_JET JET 3764
1128smdk4412 MACH_SMDK4412 SMDK4412 3765 1049smdk4412 MACH_SMDK4412 SMDK4412 3765
1050elite MACH_ELITE ELITE 3766
1051spear320_hmi MACH_SPEAR320_HMI SPEAR320_HMI 3767
1052ontario MACH_ONTARIO ONTARIO 3768
1053mx6q_sabrelite MACH_MX6Q_SABRELITE MX6Q_SABRELITE 3769
1054vc200 MACH_VC200 VC200 3770
1055msm7625a_ffa MACH_MSM7625A_FFA MSM7625A_FFA 3771
1056msm7625a_surf MACH_MSM7625A_SURF MSM7625A_SURF 3772
1057benthossbp MACH_BENTHOSSBP BENTHOSSBP 3773
1058smdk5210 MACH_SMDK5210 SMDK5210 3774
1059empq2300 MACH_EMPQ2300 EMPQ2300 3775
1060minipos MACH_MINIPOS MINIPOS 3776
1061omap5_sevm MACH_OMAP5_SEVM OMAP5_SEVM 3777
1062shelter MACH_SHELTER SHELTER 3778
1063omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779
1064edgetd MACH_EDGETD EDGETD 3780
1065copperyard MACH_COPPERYARD COPPERYARD 3781
1066edge MACH_EDGE EDGE 3782
1067edge_u MACH_EDGE_U EDGE_U 3783
1068edge_td MACH_EDGE_TD EDGE_TD 3784
1069wdss MACH_WDSS WDSS 3785
1070dl_pb25 MACH_DL_PB25 DL_PB25 3786
1071dss11 MACH_DSS11 DSS11 3787
1072cpa MACH_CPA CPA 3788
1073aptp2000 MACH_APTP2000 APTP2000 3789
1074marzen MACH_MARZEN MARZEN 3790
1075st_turbine MACH_ST_TURBINE ST_TURBINE 3791
1076gtl_it3300 MACH_GTL_IT3300 GTL_IT3300 3792
1077mx6_mule MACH_MX6_MULE MX6_MULE 3793
1078v7pxa_dt MACH_V7PXA_DT V7PXA_DT 3794
1079v7mmp_dt MACH_V7MMP_DT V7MMP_DT 3795
1080dragon7 MACH_DRAGON7 DRAGON7 3796
1081krome MACH_KROME KROME 3797
1082oratisdante MACH_ORATISDANTE ORATISDANTE 3798
1083fathom MACH_FATHOM FATHOM 3799
1084dns325 MACH_DNS325 DNS325 3800
1085sarnen MACH_SARNEN SARNEN 3801
1086ubisys_g1 MACH_UBISYS_G1 UBISYS_G1 3802
1087mx53_pf1 MACH_MX53_PF1 MX53_PF1 3803
1088asanti MACH_ASANTI ASANTI 3804
1089volta MACH_VOLTA VOLTA 3805
1090knight MACH_KNIGHT KNIGHT 3807
1091beaglebone MACH_BEAGLEBONE BEAGLEBONE 3808
1092becker MACH_BECKER BECKER 3809
1093fc360 MACH_FC360 FC360 3810
1094pmi2_xls MACH_PMI2_XLS PMI2_XLS 3811
1095taranto MACH_TARANTO TARANTO 3812
1096plutux MACH_PLUTUX PLUTUX 3813
1097ipmp_medcom MACH_IPMP_MEDCOM IPMP_MEDCOM 3814
1098absolut MACH_ABSOLUT ABSOLUT 3815
1099awpb3 MACH_AWPB3 AWPB3 3816
1100nfp32xx_dt MACH_NFP32XX_DT NFP32XX_DT 3817
1101dl_pb53 MACH_DL_PB53 DL_PB53 3818
1102acu_ii MACH_ACU_II ACU_II 3819
1103avalon MACH_AVALON AVALON 3820
1104sphinx MACH_SPHINX SPHINX 3821
1105titan_t MACH_TITAN_T TITAN_T 3822
1106harvest_boris MACH_HARVEST_BORIS HARVEST_BORIS 3823
1107mach_msm7x30_m3s MACH_MACH_MSM7X30_M3S MACH_MSM7X30_M3S 3824
1108smdk5250 MACH_SMDK5250 SMDK5250 3825
1109imxt_lite MACH_IMXT_LITE IMXT_LITE 3826
1110imxt_std MACH_IMXT_STD IMXT_STD 3827
1111imxt_log MACH_IMXT_LOG IMXT_LOG 3828
1112imxt_nav MACH_IMXT_NAV IMXT_NAV 3829
1113imxt_full MACH_IMXT_FULL IMXT_FULL 3830
1114ag09015 MACH_AG09015 AG09015 3831
1115am3517_mt_ventoux MACH_AM3517_MT_VENTOUX AM3517_MT_VENTOUX 3832
1116dp1arm9 MACH_DP1ARM9 DP1ARM9 3833
1117picasso_m MACH_PICASSO_M PICASSO_M 3834
1118video_gadget MACH_VIDEO_GADGET VIDEO_GADGET 3835
1119mtt_om3x MACH_MTT_OM3X MTT_OM3X 3836
1120mx6q_arm2 MACH_MX6Q_ARM2 MX6Q_ARM2 3837
1121picosam9g45 MACH_PICOSAM9G45 PICOSAM9G45 3838
1122vpm_dm365 MACH_VPM_DM365 VPM_DM365 3839
1123bonfire MACH_BONFIRE BONFIRE 3840
1124mt2p2d MACH_MT2P2D MT2P2D 3841
1125sigpda01 MACH_SIGPDA01 SIGPDA01 3842
1126cn27 MACH_CN27 CN27 3843
1127mx25_cwtap MACH_MX25_CWTAP MX25_CWTAP 3844
1128apf28 MACH_APF28 APF28 3845
1129pelco_maxwell MACH_PELCO_MAXWELL PELCO_MAXWELL 3846
1130ge_phoenix MACH_GE_PHOENIX GE_PHOENIX 3847
1131empc_a500 MACH_EMPC_A500 EMPC_A500 3848
1132ims_arm9 MACH_IMS_ARM9 IMS_ARM9 3849
1133mini2416 MACH_MINI2416 MINI2416 3850
1134mini2450 MACH_MINI2450 MINI2450 3851
1135mini310 MACH_MINI310 MINI310 3852
1136spear_hurricane MACH_SPEAR_HURRICANE SPEAR_HURRICANE 3853
1137mt7208 MACH_MT7208 MT7208 3854
1138lpc178x MACH_LPC178X LPC178X 3855
1139farleys MACH_FARLEYS FARLEYS 3856
1140efm32gg_dk3750 MACH_EFM32GG_DK3750 EFM32GG_DK3750 3857
1141zeus_board MACH_ZEUS_BOARD ZEUS_BOARD 3858
1142cc51 MACH_CC51 CC51 3859
1143fxi_c210 MACH_FXI_C210 FXI_C210 3860
1144msm8627_cdp MACH_MSM8627_CDP MSM8627_CDP 3861
1145msm8627_mtp MACH_MSM8627_MTP MSM8627_MTP 3862
1146armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863
1147primou MACH_PRIMOU PRIMOU 3864
1148primoc MACH_PRIMOC PRIMOC 3865
1149primoct MACH_PRIMOCT PRIMOCT 3866
1150a9500 MACH_A9500 A9500 3867
1151pluto MACH_PLUTO PLUTO 3869
1152acfx100 MACH_ACFX100 ACFX100 3870
1153msm8625_rumi3 MACH_MSM8625_RUMI3 MSM8625_RUMI3 3871
1154valente MACH_VALENTE VALENTE 3872
1155crfs_rfeye MACH_CRFS_RFEYE CRFS_RFEYE 3873
1156rfeye MACH_RFEYE RFEYE 3874
1157phidget_sbc3 MACH_PHIDGET_SBC3 PHIDGET_SBC3 3875
1158tcw_mika MACH_TCW_MIKA TCW_MIKA 3876
1159imx28_egf MACH_IMX28_EGF IMX28_EGF 3877
1160valente_wx MACH_VALENTE_WX VALENTE_WX 3878
1161huangshans MACH_HUANGSHANS HUANGSHANS 3879
1162bosphorus1 MACH_BOSPHORUS1 BOSPHORUS1 3880
1163prima MACH_PRIMA PRIMA 3881
1164evita_ulk MACH_EVITA_ULK EVITA_ULK 3884
1165merisc600 MACH_MERISC600 MERISC600 3885
1166dolak MACH_DOLAK DOLAK 3886
1167sbc53 MACH_SBC53 SBC53 3887
1168elite_ulk MACH_ELITE_ULK ELITE_ULK 3888
1169pov2 MACH_POV2 POV2 3889
1170ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890
1171da850_pqab MACH_DA850_PQAB DA850_PQAB 3891
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 6073b187528a..5a274af31b2b 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -60,6 +60,7 @@ typedef u64 cputime64_t;
60 */ 60 */
61#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) 61#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC)
62#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) 62#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC)
63#define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs)
63 64
64/* 65/*
65 * Convert cputime <-> seconds 66 * Convert cputime <-> seconds
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 1cf20bdfbeca..98b7c4b49c9d 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
150 return ct; 150 return ct;
151} 151}
152 152
153#define usecs_to_cputime64(us) usecs_to_cputime(us)
154
153/* 155/*
154 * Convert cputime <-> seconds 156 * Convert cputime <-> seconds
155 */ 157 */
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index d4df013ad779..69c7377d2071 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
381} 381}
382#endif 382#endif
383 383
384static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
385 unsigned long pte_index)
386{
387 unsigned long rb, va_low;
388
389 rb = (v & ~0x7fUL) << 16; /* AVA field */
390 va_low = pte_index >> 3;
391 if (v & HPTE_V_SECONDARY)
392 va_low = ~va_low;
393 /* xor vsid from AVA */
394 if (!(v & HPTE_V_1TB_SEG))
395 va_low ^= v >> 12;
396 else
397 va_low ^= v >> 24;
398 va_low &= 0x7ff;
399 if (v & HPTE_V_LARGE) {
400 rb |= 1; /* L field */
401 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
402 (r & 0xff000)) {
403 /* non-16MB large page, must be 64k */
404 /* (masks depend on page size) */
405 rb |= 0x1000; /* page encoding in LP field */
406 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
407 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
408 }
409 } else {
410 /* 4kB page */
411 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
412 }
413 rb |= (v >> 54) & 0x300; /* B field */
414 return rb;
415}
416
417/* Magic register values loaded into r3 and r4 before the 'sc' assembly 384/* Magic register values loaded into r3 and r4 before the 'sc' assembly
418 * instruction for the OSI hypercalls */ 385 * instruction for the OSI hypercalls */
419#define OSI_SC_MAGIC_R3 0x113724FA 386#define OSI_SC_MAGIC_R3 0x113724FA
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index e43fe42b9875..d0ac94f98f9e 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
29 29
30#define SPAPR_TCE_SHIFT 12 30#define SPAPR_TCE_SHIFT 12
31 31
32static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
33 unsigned long pte_index)
34{
35 unsigned long rb, va_low;
36
37 rb = (v & ~0x7fUL) << 16; /* AVA field */
38 va_low = pte_index >> 3;
39 if (v & HPTE_V_SECONDARY)
40 va_low = ~va_low;
41 /* xor vsid from AVA */
42 if (!(v & HPTE_V_1TB_SEG))
43 va_low ^= v >> 12;
44 else
45 va_low ^= v >> 24;
46 va_low &= 0x7ff;
47 if (v & HPTE_V_LARGE) {
48 rb |= 1; /* L field */
49 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
50 (r & 0xff000)) {
51 /* non-16MB large page, must be 64k */
52 /* (masks depend on page size) */
53 rb |= 0x1000; /* page encoding in LP field */
54 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
55 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
56 }
57 } else {
58 /* 4kB page */
59 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
60 }
61 rb |= (v >> 54) & 0x300; /* B field */
62 return rb;
63}
64
32#endif /* __ASM_KVM_BOOK3S_64_H__ */ 65#endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0cb137a9b038..336983da9e72 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
538 tpaca->kvm_hstate.napping = 0; 538 tpaca->kvm_hstate.napping = 0;
539 vcpu->cpu = vc->pcpu; 539 vcpu->cpu = vc->pcpu;
540 smp_wmb(); 540 smp_wmb();
541#ifdef CONFIG_PPC_ICP_NATIVE 541#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
542 if (vcpu->arch.ptid) { 542 if (vcpu->arch.ptid) {
543 tpaca->cpu_start = 0x80; 543 tpaca->cpu_start = 0x80;
544 wmb(); 544 wmb();
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 3c791e1eb675..e2cfb9e1e20e 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -658,10 +658,12 @@ program_interrupt:
658 ulong cmd = kvmppc_get_gpr(vcpu, 3); 658 ulong cmd = kvmppc_get_gpr(vcpu, 3);
659 int i; 659 int i;
660 660
661#ifdef CONFIG_KVM_BOOK3S_64_PR
661 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { 662 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
662 r = RESUME_GUEST; 663 r = RESUME_GUEST;
663 break; 664 break;
664 } 665 }
666#endif
665 667
666 run->papr_hcall.nr = cmd; 668 run->papr_hcall.nr = cmd;
667 for (i = 0; i < 9; ++i) { 669 for (i = 0; i < 9; ++i) {
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d20903f2bc..8c0d45a6faf7 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -15,6 +15,7 @@
15#include <linux/kvm_host.h> 15#include <linux/kvm_host.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/export.h>
18 19
19#include <asm/reg.h> 20#include <asm/reg.h>
20#include <asm/cputable.h> 21#include <asm/cputable.h>
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 081434878296..b9acaaa175d8 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m)
87 return (cputime_t) m * 4096; 87 return (cputime_t) m * 4096;
88} 88}
89 89
90#define usecs_to_cputime64(m) usecs_to_cputime(m)
91
90/* 92/*
91 * Convert cputime to milliseconds and back. 93 * Convert cputime to milliseconds and back.
92 */ 94 */
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index 6efc18b5e60a..bd58b72454cf 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -88,7 +88,7 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf,
88 return -EINVAL; 88 return -EINVAL;
89 89
90 retval = oprofilefs_ulong_from_user(&val, buf, count); 90 retval = oprofilefs_ulong_from_user(&val, buf, count);
91 if (retval) 91 if (retval <= 0)
92 return retval; 92 return retval;
93 93
94 if (oprofile_started) 94 if (oprofile_started)
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index ec8c84c14b17..895e337c79b6 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -50,9 +50,9 @@ static struct platform_device heartbeat_device = {
50#define GBECONT 0xffc10100 50#define GBECONT 0xffc10100
51#define GBECONT_RMII1 BIT(17) 51#define GBECONT_RMII1 BIT(17)
52#define GBECONT_RMII0 BIT(16) 52#define GBECONT_RMII0 BIT(16)
53static void sh7757_eth_set_mdio_gate(unsigned long addr) 53static void sh7757_eth_set_mdio_gate(void *addr)
54{ 54{
55 if ((addr & 0x00000fff) < 0x0800) 55 if (((unsigned long)addr & 0x00000fff) < 0x0800)
56 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); 56 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
57 else 57 else
58 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); 58 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
@@ -116,9 +116,9 @@ static struct platform_device sh7757_eth1_device = {
116 }, 116 },
117}; 117};
118 118
119static void sh7757_eth_giga_set_mdio_gate(unsigned long addr) 119static void sh7757_eth_giga_set_mdio_gate(void *addr)
120{ 120{
121 if ((addr & 0x00000fff) < 0x0800) { 121 if (((unsigned long)addr & 0x00000fff) < 0x0800) {
122 gpio_set_value(GPIO_PTT4, 1); 122 gpio_set_value(GPIO_PTT4, 1);
123 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); 123 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
124 } else { 124 } else {
@@ -210,8 +210,12 @@ static struct resource sh_mmcif_resources[] = {
210}; 210};
211 211
212static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { 212static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
213 .chan_priv_tx = SHDMA_SLAVE_MMCIF_TX, 213 .chan_priv_tx = {
214 .chan_priv_rx = SHDMA_SLAVE_MMCIF_RX, 214 .slave_id = SHDMA_SLAVE_MMCIF_TX,
215 },
216 .chan_priv_rx = {
217 .slave_id = SHDMA_SLAVE_MMCIF_RX,
218 }
215}; 219};
216 220
217static struct sh_mmcif_plat_data sh_mmcif_plat = { 221static struct sh_mmcif_plat_data sh_mmcif_plat = {
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index b4c2d2b946dd..e4dd5d5a1115 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -49,7 +49,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
49 return oprofile_perf_init(ops); 49 return oprofile_perf_init(ops);
50} 50}
51 51
52void __exit oprofile_arch_exit(void) 52void oprofile_arch_exit(void)
53{ 53{
54 oprofile_perf_exit(); 54 oprofile_perf_exit();
55 kfree(sh_pmu_op_name); 55 kfree(sh_pmu_op_name);
@@ -60,5 +60,5 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
60 ops->backtrace = sh_backtrace; 60 ops->backtrace = sh_backtrace;
61 return -ENODEV; 61 return -ENODEV;
62} 62}
63void __exit oprofile_arch_exit(void) {} 63void oprofile_arch_exit(void) {}
64#endif /* CONFIG_HW_PERF_EVENTS */ 64#endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index b272cda35a01..af5755d20fbe 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
849 if (!irq) 849 if (!irq)
850 return -ENOMEM; 850 return -ENOMEM;
851 851
852 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
853 return -EINVAL;
854 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) 852 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
855 return -EINVAL; 853 return -EINVAL;
854 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
855 return -EINVAL;
856 856
857 return irq; 857 return irq;
858} 858}
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 8d601b18bf9f..121f1be4da19 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1169,7 +1169,7 @@ again:
1169 */ 1169 */
1170 c = &unconstrained; 1170 c = &unconstrained;
1171 } else if (intel_try_alt_er(event, orig_idx)) { 1171 } else if (intel_try_alt_er(event, orig_idx)) {
1172 raw_spin_unlock(&era->lock); 1172 raw_spin_unlock_irqrestore(&era->lock, flags);
1173 goto again; 1173 goto again;
1174 } 1174 }
1175 raw_spin_unlock_irqrestore(&era->lock, flags); 1175 raw_spin_unlock_irqrestore(&era->lock, flags);
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index 3b97a80ce329..c99f9ed013d5 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -116,16 +116,16 @@ void show_registers(struct pt_regs *regs)
116 for (i = 0; i < code_len; i++, ip++) { 116 for (i = 0; i < code_len; i++, ip++) {
117 if (ip < (u8 *)PAGE_OFFSET || 117 if (ip < (u8 *)PAGE_OFFSET ||
118 probe_kernel_address(ip, c)) { 118 probe_kernel_address(ip, c)) {
119 printk(" Bad EIP value."); 119 printk(KERN_CONT " Bad EIP value.");
120 break; 120 break;
121 } 121 }
122 if (ip == (u8 *)regs->ip) 122 if (ip == (u8 *)regs->ip)
123 printk("<%02x> ", c); 123 printk(KERN_CONT "<%02x> ", c);
124 else 124 else
125 printk("%02x ", c); 125 printk(KERN_CONT "%02x ", c);
126 } 126 }
127 } 127 }
128 printk("\n"); 128 printk(KERN_CONT "\n");
129} 129}
130 130
131int is_valid_bugaddr(unsigned long ip) 131int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 19853ad8afc5..6d728d9284bd 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -284,16 +284,16 @@ void show_registers(struct pt_regs *regs)
284 for (i = 0; i < code_len; i++, ip++) { 284 for (i = 0; i < code_len; i++, ip++) {
285 if (ip < (u8 *)PAGE_OFFSET || 285 if (ip < (u8 *)PAGE_OFFSET ||
286 probe_kernel_address(ip, c)) { 286 probe_kernel_address(ip, c)) {
287 printk(" Bad RIP value."); 287 printk(KERN_CONT " Bad RIP value.");
288 break; 288 break;
289 } 289 }
290 if (ip == (u8 *)regs->ip) 290 if (ip == (u8 *)regs->ip)
291 printk("<%02x> ", c); 291 printk(KERN_CONT "<%02x> ", c);
292 else 292 else
293 printk("%02x ", c); 293 printk(KERN_CONT "%02x ", c);
294 } 294 }
295 } 295 }
296 printk("\n"); 296 printk(KERN_CONT "\n");
297} 297}
298 298
299int is_valid_bugaddr(unsigned long ip) 299int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 76e3f1cd0369..405f2620392f 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
338 return HRTIMER_NORESTART; 338 return HRTIMER_NORESTART;
339} 339}
340 340
341static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) 341static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
342{ 342{
343 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
343 struct kvm_timer *pt = &ps->pit_timer; 344 struct kvm_timer *pt = &ps->pit_timer;
344 s64 interval; 345 s64 interval;
345 346
347 if (!irqchip_in_kernel(kvm))
348 return;
349
346 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); 350 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
347 351
348 pr_debug("create pit timer, interval is %llu nsec\n", interval); 352 pr_debug("create pit timer, interval is %llu nsec\n", interval);
@@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
394 /* FIXME: enhance mode 4 precision */ 398 /* FIXME: enhance mode 4 precision */
395 case 4: 399 case 4:
396 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { 400 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
397 create_pit_timer(ps, val, 0); 401 create_pit_timer(kvm, val, 0);
398 } 402 }
399 break; 403 break;
400 case 2: 404 case 2:
401 case 3: 405 case 3:
402 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ 406 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
403 create_pit_timer(ps, val, 1); 407 create_pit_timer(kvm, val, 1);
404 } 408 }
405 break; 409 break;
406 default: 410 default:
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c38efd7b792e..4c938da2ba00 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
602{ 602{
603 struct kvm_cpuid_entry2 *best; 603 struct kvm_cpuid_entry2 *best;
604 struct kvm_lapic *apic = vcpu->arch.apic; 604 struct kvm_lapic *apic = vcpu->arch.apic;
605 u32 timer_mode_mask;
606 605
607 best = kvm_find_cpuid_entry(vcpu, 1, 0); 606 best = kvm_find_cpuid_entry(vcpu, 1, 0);
608 if (!best) 607 if (!best)
@@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
615 best->ecx |= bit(X86_FEATURE_OSXSAVE); 614 best->ecx |= bit(X86_FEATURE_OSXSAVE);
616 } 615 }
617 616
618 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && 617 if (apic) {
619 best->function == 0x1) { 618 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
620 best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER); 619 apic->lapic_timer.timer_mode_mask = 3 << 17;
621 timer_mode_mask = 3 << 17; 620 else
622 } else 621 apic->lapic_timer.timer_mode_mask = 1 << 17;
623 timer_mode_mask = 1 << 17; 622 }
624
625 if (apic)
626 apic->lapic_timer.timer_mode_mask = timer_mode_mask;
627} 623}
628 624
629int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) 625int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
2135 case KVM_CAP_TSC_CONTROL: 2131 case KVM_CAP_TSC_CONTROL:
2136 r = kvm_has_tsc_control; 2132 r = kvm_has_tsc_control;
2137 break; 2133 break;
2134 case KVM_CAP_TSC_DEADLINE_TIMER:
2135 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2136 break;
2138 default: 2137 default:
2139 r = 0; 2138 r = 0;
2140 break; 2139 break;
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index bfab3fa10edc..7b65f752c5f8 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i];
568 break; 568 break;
569 } 569 }
570 if (filter[i].jt != 0) { 570 if (filter[i].jt != 0) {
571 if (filter[i].jf) 571 if (filter[i].jf && f_offset)
572 t_offset += is_near(f_offset) ? 2 : 6; 572 t_offset += is_near(f_offset) ? 2 : 5;
573 EMIT_COND_JMP(t_op, t_offset); 573 EMIT_COND_JMP(t_op, t_offset);
574 if (filter[i].jf) 574 if (filter[i].jf)
575 EMIT_JMP(f_offset); 575 EMIT_JMP(f_offset);
diff --git a/block/blk-map.c b/block/blk-map.c
index 164cd0059706..623e1cd4cffe 100644
--- a/block/blk-map.c
+++ b/block/blk-map.c
@@ -311,7 +311,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf,
311 if (IS_ERR(bio)) 311 if (IS_ERR(bio))
312 return PTR_ERR(bio); 312 return PTR_ERR(bio);
313 313
314 if (rq_data_dir(rq) == WRITE) 314 if (!reading)
315 bio->bi_rw |= REQ_WRITE; 315 bio->bi_rw |= REQ_WRITE;
316 316
317 if (do_copy) 317 if (do_copy)
diff --git a/block/blk-tag.c b/block/blk-tag.c
index e74d6d13838f..4af6f5cc1167 100644
--- a/block/blk-tag.c
+++ b/block/blk-tag.c
@@ -282,18 +282,9 @@ EXPORT_SYMBOL(blk_queue_resize_tags);
282void blk_queue_end_tag(struct request_queue *q, struct request *rq) 282void blk_queue_end_tag(struct request_queue *q, struct request *rq)
283{ 283{
284 struct blk_queue_tag *bqt = q->queue_tags; 284 struct blk_queue_tag *bqt = q->queue_tags;
285 int tag = rq->tag; 285 unsigned tag = rq->tag; /* negative tags invalid */
286 286
287 BUG_ON(tag == -1); 287 BUG_ON(tag >= bqt->real_max_depth);
288
289 if (unlikely(tag >= bqt->max_depth)) {
290 /*
291 * This can happen after tag depth has been reduced.
292 * But tag shouldn't be larger than real_max_depth.
293 */
294 WARN_ON(tag >= bqt->real_max_depth);
295 return;
296 }
297 288
298 list_del_init(&rq->queuelist); 289 list_del_init(&rq->queuelist);
299 rq->cmd_flags &= ~REQ_QUEUED; 290 rq->cmd_flags &= ~REQ_QUEUED;
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 4c12869fcf77..3548705b04e4 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -1655,6 +1655,8 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
1655 struct request *next) 1655 struct request *next)
1656{ 1656{
1657 struct cfq_queue *cfqq = RQ_CFQQ(rq); 1657 struct cfq_queue *cfqq = RQ_CFQQ(rq);
1658 struct cfq_data *cfqd = q->elevator->elevator_data;
1659
1658 /* 1660 /*
1659 * reposition in fifo if next is older than rq 1661 * reposition in fifo if next is older than rq
1660 */ 1662 */
@@ -1669,6 +1671,16 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
1669 cfq_remove_request(next); 1671 cfq_remove_request(next);
1670 cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg, 1672 cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg,
1671 rq_data_dir(next), rq_is_sync(next)); 1673 rq_data_dir(next), rq_is_sync(next));
1674
1675 cfqq = RQ_CFQQ(next);
1676 /*
1677 * all requests of this queue are merged to other queues, delete it
1678 * from the service tree. If it's the active_queue,
1679 * cfq_dispatch_requests() will choose to expire it or do idle
1680 */
1681 if (cfq_cfqq_on_rr(cfqq) && RB_EMPTY_ROOT(&cfqq->sort_list) &&
1682 cfqq != cfqd->active_queue)
1683 cfq_del_cfqq_rr(cfqd, cfqq);
1672} 1684}
1673 1685
1674static int cfq_allow_merge(struct request_queue *q, struct request *rq, 1686static int cfq_allow_merge(struct request_queue *q, struct request *rq,
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6bdedd7cca2c..cf047c406d92 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -820,7 +820,7 @@ config PATA_PLATFORM
820 820
821config PATA_OF_PLATFORM 821config PATA_OF_PLATFORM
822 tristate "OpenFirmware platform device PATA support" 822 tristate "OpenFirmware platform device PATA support"
823 depends on PATA_PLATFORM && OF 823 depends on PATA_PLATFORM && OF && OF_IRQ
824 help 824 help
825 This option enables support for generic directly connected ATA 825 This option enables support for generic directly connected ATA
826 devices commonly found on embedded systems with OpenFirmware 826 devices commonly found on embedded systems with OpenFirmware
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index a76f24a8e5db..5249e6d918a3 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -360,7 +360,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
360 ap->flags |= ATA_FLAG_SLAVE_POSS; 360 ap->flags |= ATA_FLAG_SLAVE_POSS;
361 ap->pio_mask = ATA_PIO4; 361 ap->pio_mask = ATA_PIO4;
362 362
363 if (!irq) { 363 if (!gpio_is_valid(irq)) {
364 ap->flags |= ATA_FLAG_PIO_POLLING; 364 ap->flags |= ATA_FLAG_PIO_POLLING;
365 ata_port_desc(ap, "no IRQ, using PIO polling"); 365 ata_port_desc(ap, "no IRQ, using PIO polling");
366 } 366 }
@@ -414,8 +414,8 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
414 414
415 host->private_data = info; 415 host->private_data = info;
416 416
417 ret = ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, 417 return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
418 irq ? ata_sff_interrupt : NULL, 418 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
419 irq_flags, &pata_at91_sht); 419 irq_flags, &pata_at91_sht);
420 420
421 if (!ret) 421 if (!ret)
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c
index c2917ffad2c2..34767a6d7f42 100644
--- a/drivers/char/ipmi/ipmi_watchdog.c
+++ b/drivers/char/ipmi/ipmi_watchdog.c
@@ -139,6 +139,8 @@
139#define IPMI_WDOG_SET_TIMER 0x24 139#define IPMI_WDOG_SET_TIMER 0x24
140#define IPMI_WDOG_GET_TIMER 0x25 140#define IPMI_WDOG_GET_TIMER 0x25
141 141
142#define IPMI_WDOG_TIMER_NOT_INIT_RESP 0x80
143
142/* These are here until the real ones get into the watchdog.h interface. */ 144/* These are here until the real ones get into the watchdog.h interface. */
143#ifndef WDIOC_GETTIMEOUT 145#ifndef WDIOC_GETTIMEOUT
144#define WDIOC_GETTIMEOUT _IOW(WATCHDOG_IOCTL_BASE, 20, int) 146#define WDIOC_GETTIMEOUT _IOW(WATCHDOG_IOCTL_BASE, 20, int)
@@ -596,6 +598,7 @@ static int ipmi_heartbeat(void)
596 struct kernel_ipmi_msg msg; 598 struct kernel_ipmi_msg msg;
597 int rv; 599 int rv;
598 struct ipmi_system_interface_addr addr; 600 struct ipmi_system_interface_addr addr;
601 int timeout_retries = 0;
599 602
600 if (ipmi_ignore_heartbeat) 603 if (ipmi_ignore_heartbeat)
601 return 0; 604 return 0;
@@ -616,6 +619,7 @@ static int ipmi_heartbeat(void)
616 619
617 mutex_lock(&heartbeat_lock); 620 mutex_lock(&heartbeat_lock);
618 621
622restart:
619 atomic_set(&heartbeat_tofree, 2); 623 atomic_set(&heartbeat_tofree, 2);
620 624
621 /* 625 /*
@@ -653,7 +657,33 @@ static int ipmi_heartbeat(void)
653 /* Wait for the heartbeat to be sent. */ 657 /* Wait for the heartbeat to be sent. */
654 wait_for_completion(&heartbeat_wait); 658 wait_for_completion(&heartbeat_wait);
655 659
656 if (heartbeat_recv_msg.msg.data[0] != 0) { 660 if (heartbeat_recv_msg.msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP) {
661 timeout_retries++;
662 if (timeout_retries > 3) {
663 printk(KERN_ERR PFX ": Unable to restore the IPMI"
664 " watchdog's settings, giving up.\n");
665 rv = -EIO;
666 goto out_unlock;
667 }
668
669 /*
670 * The timer was not initialized, that means the BMC was
671 * probably reset and lost the watchdog information. Attempt
672 * to restore the timer's info. Note that we still hold
673 * the heartbeat lock, to keep a heartbeat from happening
674 * in this process, so must say no heartbeat to avoid a
675 * deadlock on this mutex.
676 */
677 rv = ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB);
678 if (rv) {
679 printk(KERN_ERR PFX ": Unable to send the command to"
680 " set the watchdog's settings, giving up.\n");
681 goto out_unlock;
682 }
683
684 /* We might need a new heartbeat, so do it now */
685 goto restart;
686 } else if (heartbeat_recv_msg.msg.data[0] != 0) {
657 /* 687 /*
658 * Got an error in the heartbeat response. It was already 688 * Got an error in the heartbeat response. It was already
659 * reported in ipmi_wdog_msg_handler, but we should return 689 * reported in ipmi_wdog_msg_handler, but we should return
@@ -662,6 +692,7 @@ static int ipmi_heartbeat(void)
662 rv = -EINVAL; 692 rv = -EINVAL;
663 } 693 }
664 694
695out_unlock:
665 mutex_unlock(&heartbeat_lock); 696 mutex_unlock(&heartbeat_lock);
666 697
667 return rv; 698 return rv;
@@ -922,11 +953,15 @@ static struct miscdevice ipmi_wdog_miscdev = {
922static void ipmi_wdog_msg_handler(struct ipmi_recv_msg *msg, 953static void ipmi_wdog_msg_handler(struct ipmi_recv_msg *msg,
923 void *handler_data) 954 void *handler_data)
924{ 955{
925 if (msg->msg.data[0] != 0) { 956 if (msg->msg.cmd == IPMI_WDOG_RESET_TIMER &&
957 msg->msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP)
958 printk(KERN_INFO PFX "response: The IPMI controller appears"
959 " to have been reset, will attempt to reinitialize"
960 " the watchdog timer\n");
961 else if (msg->msg.data[0] != 0)
926 printk(KERN_ERR PFX "response: Error %x on cmd %x\n", 962 printk(KERN_ERR PFX "response: Error %x on cmd %x\n",
927 msg->msg.data[0], 963 msg->msg.data[0],
928 msg->msg.cmd); 964 msg->msg.cmd);
929 }
930 965
931 ipmi_free_recv_msg(msg); 966 ipmi_free_recv_msg(msg);
932} 967}
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index 59feefe0e3e6..fb6b6d28b60e 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = {
58}; 58};
59 59
60#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 60#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
61static DEFINE_CLOCK_DATA(cd);
62 61
63unsigned long long notrace sched_clock(void) 62static u32 notrace dbx500_prcmu_sched_clock_read(void)
64{ 63{
65 u32 cyc;
66
67 if (unlikely(!clksrc_dbx500_timer_base)) 64 if (unlikely(!clksrc_dbx500_timer_base))
68 return 0; 65 return 0;
69 66
70 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); 67 return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
71
72 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
73} 68}
74 69
75static void notrace clksrc_dbx500_prcmu_update_sched_clock(void)
76{
77 u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
78 update_sched_clock(&cd, cyc, (u32)~0);
79}
80#endif 70#endif
81 71
82void __init clksrc_dbx500_prcmu_init(void __iomem *base) 72void __init clksrc_dbx500_prcmu_init(void __iomem *base)
@@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
97 clksrc_dbx500_timer_base + PRCMU_TIMER_REF); 87 clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
98 } 88 }
99#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 89#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
100 init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, 90 setup_sched_clock(dbx500_prcmu_sched_clock_read,
101 32, RATE_32K); 91 32, RATE_32K);
102#endif 92#endif
103 clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, 93 clocksource_calc_mult_shift(&clocksource_dbx500_prcmu,
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ab8f469f5cf8..5a99bb3f255a 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -124,7 +124,7 @@ config MV_XOR
124 124
125config MX3_IPU 125config MX3_IPU
126 bool "MX3x Image Processing Unit support" 126 bool "MX3x Image Processing Unit support"
127 depends on ARCH_MX3 127 depends on SOC_IMX31 || SOC_IMX35
128 select DMA_ENGINE 128 select DMA_ENGINE
129 default y 129 default y
130 help 130 help
@@ -216,7 +216,7 @@ config PCH_DMA
216 216
217config IMX_SDMA 217config IMX_SDMA
218 tristate "i.MX SDMA support" 218 tristate "i.MX SDMA support"
219 depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5 219 depends on ARCH_MX25 || SOC_IMX31 || SOC_IMX35 || ARCH_MX5
220 select DMA_ENGINE 220 select DMA_ENGINE
221 help 221 help
222 Support the i.MX SDMA engine. This engine is integrated into 222 Support the i.MX SDMA engine. This engine is integrated into
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c681dc149d2a..b9da8900ae4e 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -756,9 +756,9 @@ intel_enable_semaphores(struct drm_device *dev)
756 if (i915_semaphores >= 0) 756 if (i915_semaphores >= 0)
757 return i915_semaphores; 757 return i915_semaphores;
758 758
759 /* Enable semaphores on SNB when IO remapping is off */ 759 /* Disable semaphores on SNB */
760 if (INTEL_INFO(dev)->gen == 6) 760 if (INTEL_INFO(dev)->gen == 6)
761 return !intel_iommu_enabled; 761 return 0;
762 762
763 return 1; 763 return 1;
764} 764}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d809b038ca88..daa5743ccbd6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7922,13 +7922,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
7922 return 0; 7922 return 0;
7923 7923
7924 /* 7924 /*
7925 * Enable rc6 on Sandybridge if DMA remapping is disabled 7925 * Disable rc6 on Sandybridge
7926 */ 7926 */
7927 if (INTEL_INFO(dev)->gen == 6) { 7927 if (INTEL_INFO(dev)->gen == 6) {
7928 DRM_DEBUG_DRIVER("Sandybridge: intel_iommu_enabled %s -- RC6 %sabled\n", 7928 DRM_DEBUG_DRIVER("Sandybridge: RC6 disabled\n");
7929 intel_iommu_enabled ? "true" : "false", 7929 return 0;
7930 !intel_iommu_enabled ? "en" : "dis");
7931 return !intel_iommu_enabled;
7932 } 7930 }
7933 DRM_DEBUG_DRIVER("RC6 enabled\n"); 7931 DRM_DEBUG_DRIVER("RC6 enabled\n");
7934 return 1; 7932 return 1;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 5e00d1670aa9..92c9628c572d 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev)
3276 rdev->accel_working = false; 3276 rdev->accel_working = false;
3277 } 3277 }
3278 } 3278 }
3279
3280 /* Don't start up if the MC ucode is missing on BTC parts.
3281 * The default clocks and voltages before the MC ucode
3282 * is loaded are not suffient for advanced operations.
3283 */
3284 if (ASIC_IS_DCE5(rdev)) {
3285 if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) {
3286 DRM_ERROR("radeon: MC ucode required for NI+.\n");
3287 return -EINVAL;
3288 }
3289 }
3290
3279 return 0; 3291 return 0;
3280} 3292}
3281 3293
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 8cca91a93bde..dc279706ca70 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -390,6 +390,11 @@ extern int vmw_context_check(struct vmw_private *dev_priv,
390 struct ttm_object_file *tfile, 390 struct ttm_object_file *tfile,
391 int id, 391 int id,
392 struct vmw_resource **p_res); 392 struct vmw_resource **p_res);
393extern int vmw_user_lookup_handle(struct vmw_private *dev_priv,
394 struct ttm_object_file *tfile,
395 uint32_t handle,
396 struct vmw_surface **out_surf,
397 struct vmw_dma_buffer **out_buf);
393extern void vmw_surface_res_free(struct vmw_resource *res); 398extern void vmw_surface_res_free(struct vmw_resource *res);
394extern int vmw_surface_init(struct vmw_private *dev_priv, 399extern int vmw_surface_init(struct vmw_private *dev_priv,
395 struct vmw_surface *srf, 400 struct vmw_surface *srf,
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
index 03bbc2a6f9a7..a0c2f12b1e1b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -33,6 +33,7 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
33{ 33{
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; 34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
35 uint32_t fifo_min, hwversion; 35 uint32_t fifo_min, hwversion;
36 const struct vmw_fifo_state *fifo = &dev_priv->fifo;
36 37
37 if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) 38 if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO))
38 return false; 39 return false;
@@ -41,7 +42,12 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
41 if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int)) 42 if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
42 return false; 43 return false;
43 44
44 hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); 45 hwversion = ioread32(fifo_mem +
46 ((fifo->capabilities &
47 SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
48 SVGA_FIFO_3D_HWVERSION_REVISED :
49 SVGA_FIFO_3D_HWVERSION));
50
45 if (hwversion == 0) 51 if (hwversion == 0)
46 return false; 52 return false;
47 53
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 5ff561d4e0b4..66917c6c3813 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -58,8 +58,14 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
58 case DRM_VMW_PARAM_FIFO_HW_VERSION: 58 case DRM_VMW_PARAM_FIFO_HW_VERSION:
59 { 59 {
60 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; 60 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
61 61 const struct vmw_fifo_state *fifo = &dev_priv->fifo;
62 param->value = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); 62
63 param->value =
64 ioread32(fifo_mem +
65 ((fifo->capabilities &
66 SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
67 SVGA_FIFO_3D_HWVERSION_REVISED :
68 SVGA_FIFO_3D_HWVERSION));
63 break; 69 break;
64 } 70 }
65 default: 71 default:
@@ -166,13 +172,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
166 ret = -EINVAL; 172 ret = -EINVAL;
167 goto out_no_fb; 173 goto out_no_fb;
168 } 174 }
169
170 vfb = vmw_framebuffer_to_vfb(obj_to_fb(obj)); 175 vfb = vmw_framebuffer_to_vfb(obj_to_fb(obj));
171 if (!vfb->dmabuf) {
172 DRM_ERROR("Framebuffer not dmabuf backed.\n");
173 ret = -EINVAL;
174 goto out_no_fb;
175 }
176 176
177 ret = ttm_read_lock(&vmaster->lock, true); 177 ret = ttm_read_lock(&vmaster->lock, true);
178 if (unlikely(ret != 0)) 178 if (unlikely(ret != 0))
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 37d40545ed77..f94b33ae2215 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -31,6 +31,44 @@
31/* Might need a hrtimer here? */ 31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) 32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33 33
34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39/**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
34void vmw_display_unit_cleanup(struct vmw_display_unit *du) 72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
35{ 73{
36 if (du->cursor_surface) 74 if (du->cursor_surface)
@@ -82,6 +120,43 @@ int vmw_cursor_update_image(struct vmw_private *dev_priv,
82 return 0; 120 return 0;
83} 121}
84 122
123int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
124 struct vmw_dma_buffer *dmabuf,
125 u32 width, u32 height,
126 u32 hotspotX, u32 hotspotY)
127{
128 struct ttm_bo_kmap_obj map;
129 unsigned long kmap_offset;
130 unsigned long kmap_num;
131 void *virtual;
132 bool dummy;
133 int ret;
134
135 kmap_offset = 0;
136 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
137
138 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
139 if (unlikely(ret != 0)) {
140 DRM_ERROR("reserve failed\n");
141 return -EINVAL;
142 }
143
144 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
145 if (unlikely(ret != 0))
146 goto err_unreserve;
147
148 virtual = ttm_kmap_obj_virtual(&map, &dummy);
149 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
150 hotspotX, hotspotY);
151
152 ttm_bo_kunmap(&map);
153err_unreserve:
154 ttm_bo_unreserve(&dmabuf->base);
155
156 return ret;
157}
158
159
85void vmw_cursor_update_position(struct vmw_private *dev_priv, 160void vmw_cursor_update_position(struct vmw_private *dev_priv,
86 bool show, int x, int y) 161 bool show, int x, int y)
87{ 162{
@@ -110,24 +185,21 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
110 return -EINVAL; 185 return -EINVAL;
111 186
112 if (handle) { 187 if (handle) {
113 ret = vmw_user_surface_lookup_handle(dev_priv, tfile, 188 ret = vmw_user_lookup_handle(dev_priv, tfile,
114 handle, &surface); 189 handle, &surface, &dmabuf);
115 if (!ret) { 190 if (ret) {
116 if (!surface->snooper.image) { 191 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
117 DRM_ERROR("surface not suitable for cursor\n"); 192 return -EINVAL;
118 vmw_surface_unreference(&surface);
119 return -EINVAL;
120 }
121 } else {
122 ret = vmw_user_dmabuf_lookup(tfile,
123 handle, &dmabuf);
124 if (ret) {
125 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
126 return -EINVAL;
127 }
128 } 193 }
129 } 194 }
130 195
196 /* need to do this before taking down old image */
197 if (surface && !surface->snooper.image) {
198 DRM_ERROR("surface not suitable for cursor\n");
199 vmw_surface_unreference(&surface);
200 return -EINVAL;
201 }
202
131 /* takedown old cursor */ 203 /* takedown old cursor */
132 if (du->cursor_surface) { 204 if (du->cursor_surface) {
133 du->cursor_surface->snooper.crtc = NULL; 205 du->cursor_surface->snooper.crtc = NULL;
@@ -146,36 +218,11 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
146 vmw_cursor_update_image(dev_priv, surface->snooper.image, 218 vmw_cursor_update_image(dev_priv, surface->snooper.image,
147 64, 64, du->hotspot_x, du->hotspot_y); 219 64, 64, du->hotspot_x, du->hotspot_y);
148 } else if (dmabuf) { 220 } else if (dmabuf) {
149 struct ttm_bo_kmap_obj map;
150 unsigned long kmap_offset;
151 unsigned long kmap_num;
152 void *virtual;
153 bool dummy;
154
155 /* vmw_user_surface_lookup takes one reference */ 221 /* vmw_user_surface_lookup takes one reference */
156 du->cursor_dmabuf = dmabuf; 222 du->cursor_dmabuf = dmabuf;
157 223
158 kmap_offset = 0; 224 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
159 kmap_num = (64*64*4) >> PAGE_SHIFT; 225 du->hotspot_x, du->hotspot_y);
160
161 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
162 if (unlikely(ret != 0)) {
163 DRM_ERROR("reserve failed\n");
164 return -EINVAL;
165 }
166
167 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
168 if (unlikely(ret != 0))
169 goto err_unreserve;
170
171 virtual = ttm_kmap_obj_virtual(&map, &dummy);
172 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
173 du->hotspot_x, du->hotspot_y);
174
175 ttm_bo_kunmap(&map);
176err_unreserve:
177 ttm_bo_unreserve(&dmabuf->base);
178
179 } else { 226 } else {
180 vmw_cursor_update_position(dev_priv, false, 0, 0); 227 vmw_cursor_update_position(dev_priv, false, 0, 0);
181 return 0; 228 return 0;
@@ -377,8 +424,9 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
377 struct drm_clip_rect *clips, 424 struct drm_clip_rect *clips,
378 unsigned num_clips, int inc) 425 unsigned num_clips, int inc)
379{ 426{
380 struct drm_clip_rect *clips_ptr;
381 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; 427 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
428 struct drm_clip_rect *clips_ptr;
429 struct drm_clip_rect *tmp;
382 struct drm_crtc *crtc; 430 struct drm_crtc *crtc;
383 size_t fifo_size; 431 size_t fifo_size;
384 int i, num_units; 432 int i, num_units;
@@ -391,7 +439,6 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
391 } *cmd; 439 } *cmd;
392 SVGASignedRect *blits; 440 SVGASignedRect *blits;
393 441
394
395 num_units = 0; 442 num_units = 0;
396 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, 443 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
397 head) { 444 head) {
@@ -402,13 +449,24 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
402 449
403 BUG_ON(!clips || !num_clips); 450 BUG_ON(!clips || !num_clips);
404 451
452 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
453 if (unlikely(tmp == NULL)) {
454 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
455 return -ENOMEM;
456 }
457
405 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; 458 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
406 cmd = kzalloc(fifo_size, GFP_KERNEL); 459 cmd = kzalloc(fifo_size, GFP_KERNEL);
407 if (unlikely(cmd == NULL)) { 460 if (unlikely(cmd == NULL)) {
408 DRM_ERROR("Temporary fifo memory alloc failed.\n"); 461 DRM_ERROR("Temporary fifo memory alloc failed.\n");
409 return -ENOMEM; 462 ret = -ENOMEM;
463 goto out_free_tmp;
410 } 464 }
411 465
466 /* setup blits pointer */
467 blits = (SVGASignedRect *)&cmd[1];
468
469 /* initial clip region */
412 left = clips->x1; 470 left = clips->x1;
413 right = clips->x2; 471 right = clips->x2;
414 top = clips->y1; 472 top = clips->y1;
@@ -434,45 +492,60 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
434 cmd->body.srcRect.bottom = bottom; 492 cmd->body.srcRect.bottom = bottom;
435 493
436 clips_ptr = clips; 494 clips_ptr = clips;
437 blits = (SVGASignedRect *)&cmd[1];
438 for (i = 0; i < num_clips; i++, clips_ptr += inc) { 495 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
439 blits[i].left = clips_ptr->x1 - left; 496 tmp[i].x1 = clips_ptr->x1 - left;
440 blits[i].right = clips_ptr->x2 - left; 497 tmp[i].x2 = clips_ptr->x2 - left;
441 blits[i].top = clips_ptr->y1 - top; 498 tmp[i].y1 = clips_ptr->y1 - top;
442 blits[i].bottom = clips_ptr->y2 - top; 499 tmp[i].y2 = clips_ptr->y2 - top;
443 } 500 }
444 501
445 /* do per unit writing, reuse fifo for each */ 502 /* do per unit writing, reuse fifo for each */
446 for (i = 0; i < num_units; i++) { 503 for (i = 0; i < num_units; i++) {
447 struct vmw_display_unit *unit = units[i]; 504 struct vmw_display_unit *unit = units[i];
448 int clip_x1 = left - unit->crtc.x; 505 struct vmw_clip_rect clip;
449 int clip_y1 = top - unit->crtc.y; 506 int num;
450 int clip_x2 = right - unit->crtc.x; 507
451 int clip_y2 = bottom - unit->crtc.y; 508 clip.x1 = left - unit->crtc.x;
509 clip.y1 = top - unit->crtc.y;
510 clip.x2 = right - unit->crtc.x;
511 clip.y2 = bottom - unit->crtc.y;
452 512
453 /* skip any crtcs that misses the clip region */ 513 /* skip any crtcs that misses the clip region */
454 if (clip_x1 >= unit->crtc.mode.hdisplay || 514 if (clip.x1 >= unit->crtc.mode.hdisplay ||
455 clip_y1 >= unit->crtc.mode.vdisplay || 515 clip.y1 >= unit->crtc.mode.vdisplay ||
456 clip_x2 <= 0 || clip_y2 <= 0) 516 clip.x2 <= 0 || clip.y2 <= 0)
457 continue; 517 continue;
458 518
519 /*
520 * In order for the clip rects to be correctly scaled
521 * the src and dest rects needs to be the same size.
522 */
523 cmd->body.destRect.left = clip.x1;
524 cmd->body.destRect.right = clip.x2;
525 cmd->body.destRect.top = clip.y1;
526 cmd->body.destRect.bottom = clip.y2;
527
528 /* create a clip rect of the crtc in dest coords */
529 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
530 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
531 clip.x1 = 0 - clip.x1;
532 clip.y1 = 0 - clip.y1;
533
459 /* need to reset sid as it is changed by execbuf */ 534 /* need to reset sid as it is changed by execbuf */
460 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); 535 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
461
462 cmd->body.destScreenId = unit->unit; 536 cmd->body.destScreenId = unit->unit;
463 537
464 /* 538 /* clip and write blits to cmd stream */
465 * The blit command is a lot more resilient then the 539 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
466 * readback command when it comes to clip rects. So its
467 * okay to go out of bounds.
468 */
469 540
470 cmd->body.destRect.left = clip_x1; 541 /* if no cliprects hit skip this */
471 cmd->body.destRect.right = clip_x2; 542 if (num == 0)
472 cmd->body.destRect.top = clip_y1; 543 continue;
473 cmd->body.destRect.bottom = clip_y2;
474 544
475 545
546 /* recalculate package length */
547 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
548 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
476 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, 549 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
477 fifo_size, 0, NULL); 550 fifo_size, 0, NULL);
478 551
@@ -480,7 +553,10 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
480 break; 553 break;
481 } 554 }
482 555
556
483 kfree(cmd); 557 kfree(cmd);
558out_free_tmp:
559 kfree(tmp);
484 560
485 return ret; 561 return ret;
486} 562}
@@ -556,6 +632,10 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
556 * Sanity checks. 632 * Sanity checks.
557 */ 633 */
558 634
635 /* Surface must be marked as a scanout. */
636 if (unlikely(!surface->scanout))
637 return -EINVAL;
638
559 if (unlikely(surface->mip_levels[0] != 1 || 639 if (unlikely(surface->mip_levels[0] != 1 ||
560 surface->num_sizes != 1 || 640 surface->num_sizes != 1 ||
561 surface->sizes[0].width < mode_cmd->width || 641 surface->sizes[0].width < mode_cmd->width ||
@@ -782,6 +862,7 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
782 int clip_y1 = clips_ptr->y1 - unit->crtc.y; 862 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
783 int clip_x2 = clips_ptr->x2 - unit->crtc.x; 863 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
784 int clip_y2 = clips_ptr->y2 - unit->crtc.y; 864 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
865 int move_x, move_y;
785 866
786 /* skip any crtcs that misses the clip region */ 867 /* skip any crtcs that misses the clip region */
787 if (clip_x1 >= unit->crtc.mode.hdisplay || 868 if (clip_x1 >= unit->crtc.mode.hdisplay ||
@@ -789,12 +870,21 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
789 clip_x2 <= 0 || clip_y2 <= 0) 870 clip_x2 <= 0 || clip_y2 <= 0)
790 continue; 871 continue;
791 872
873 /* clip size to crtc size */
874 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
875 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
876
877 /* translate both src and dest to bring clip into screen */
878 move_x = min_t(int, clip_x1, 0);
879 move_y = min_t(int, clip_y1, 0);
880
881 /* actual translate done here */
792 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; 882 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
793 blits[hit_num].body.destScreenId = unit->unit; 883 blits[hit_num].body.destScreenId = unit->unit;
794 blits[hit_num].body.srcOrigin.x = clips_ptr->x1; 884 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
795 blits[hit_num].body.srcOrigin.y = clips_ptr->y1; 885 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
796 blits[hit_num].body.destRect.left = clip_x1; 886 blits[hit_num].body.destRect.left = clip_x1 - move_x;
797 blits[hit_num].body.destRect.top = clip_y1; 887 blits[hit_num].body.destRect.top = clip_y1 - move_y;
798 blits[hit_num].body.destRect.right = clip_x2; 888 blits[hit_num].body.destRect.right = clip_x2;
799 blits[hit_num].body.destRect.bottom = clip_y2; 889 blits[hit_num].body.destRect.bottom = clip_y2;
800 hit_num++; 890 hit_num++;
@@ -1003,7 +1093,6 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1003 struct vmw_surface *surface = NULL; 1093 struct vmw_surface *surface = NULL;
1004 struct vmw_dma_buffer *bo = NULL; 1094 struct vmw_dma_buffer *bo = NULL;
1005 struct ttm_base_object *user_obj; 1095 struct ttm_base_object *user_obj;
1006 u64 required_size;
1007 int ret; 1096 int ret;
1008 1097
1009 /** 1098 /**
@@ -1012,8 +1101,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1012 * requested framebuffer. 1101 * requested framebuffer.
1013 */ 1102 */
1014 1103
1015 required_size = mode_cmd->pitch * mode_cmd->height; 1104 if (!vmw_kms_validate_mode_vram(dev_priv,
1016 if (unlikely(required_size > (u64) dev_priv->vram_size)) { 1105 mode_cmd->pitch,
1106 mode_cmd->height)) {
1017 DRM_ERROR("VRAM size is too small for requested mode.\n"); 1107 DRM_ERROR("VRAM size is too small for requested mode.\n");
1018 return ERR_PTR(-ENOMEM); 1108 return ERR_PTR(-ENOMEM);
1019 } 1109 }
@@ -1033,46 +1123,29 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1033 return ERR_PTR(-ENOENT); 1123 return ERR_PTR(-ENOENT);
1034 } 1124 }
1035 1125
1036 /** 1126 /* returns either a dmabuf or surface */
1037 * End conditioned code. 1127 ret = vmw_user_lookup_handle(dev_priv, tfile,
1038 */ 1128 mode_cmd->handle,
1039 1129 &surface, &bo);
1040 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
1041 mode_cmd->handle, &surface);
1042 if (ret) 1130 if (ret)
1043 goto try_dmabuf; 1131 goto err_out;
1044 1132
1045 if (!surface->scanout) 1133 /* Create the new framebuffer depending one what we got back */
1046 goto err_not_scanout; 1134 if (bo)
1047 1135 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1048 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface, 1136 mode_cmd);
1049 &vfb, mode_cmd); 1137 else if (surface)
1050 1138 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
1051 /* vmw_user_surface_lookup takes one ref so does new_fb */ 1139 surface, &vfb, mode_cmd);
1052 vmw_surface_unreference(&surface); 1140 else
1053 1141 BUG();
1054 if (ret) {
1055 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1056 ttm_base_object_unref(&user_obj);
1057 return ERR_PTR(ret);
1058 } else
1059 vfb->user_obj = user_obj;
1060 return &vfb->base;
1061
1062try_dmabuf:
1063 DRM_INFO("%s: trying buffer\n", __func__);
1064
1065 ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
1066 if (ret) {
1067 DRM_ERROR("failed to find buffer: %i\n", ret);
1068 return ERR_PTR(-ENOENT);
1069 }
1070
1071 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1072 mode_cmd);
1073 1142
1074 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */ 1143err_out:
1075 vmw_dmabuf_unreference(&bo); 1144 /* vmw_user_lookup_handle takes one ref so does new_fb */
1145 if (bo)
1146 vmw_dmabuf_unreference(&bo);
1147 if (surface)
1148 vmw_surface_unreference(&surface);
1076 1149
1077 if (ret) { 1150 if (ret) {
1078 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); 1151 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
@@ -1082,14 +1155,6 @@ try_dmabuf:
1082 vfb->user_obj = user_obj; 1155 vfb->user_obj = user_obj;
1083 1156
1084 return &vfb->base; 1157 return &vfb->base;
1085
1086err_not_scanout:
1087 DRM_ERROR("surface not marked as scanout\n");
1088 /* vmw_user_surface_lookup takes one ref */
1089 vmw_surface_unreference(&surface);
1090 ttm_base_object_unref(&user_obj);
1091
1092 return ERR_PTR(-EINVAL);
1093} 1158}
1094 1159
1095static struct drm_mode_config_funcs vmw_kms_funcs = { 1160static struct drm_mode_config_funcs vmw_kms_funcs = {
@@ -1106,10 +1171,12 @@ int vmw_kms_present(struct vmw_private *dev_priv,
1106 uint32_t num_clips) 1171 uint32_t num_clips)
1107{ 1172{
1108 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; 1173 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1174 struct drm_clip_rect *tmp;
1109 struct drm_crtc *crtc; 1175 struct drm_crtc *crtc;
1110 size_t fifo_size; 1176 size_t fifo_size;
1111 int i, k, num_units; 1177 int i, k, num_units;
1112 int ret = 0; /* silence warning */ 1178 int ret = 0; /* silence warning */
1179 int left, right, top, bottom;
1113 1180
1114 struct { 1181 struct {
1115 SVGA3dCmdHeader header; 1182 SVGA3dCmdHeader header;
@@ -1127,60 +1194,95 @@ int vmw_kms_present(struct vmw_private *dev_priv,
1127 BUG_ON(surface == NULL); 1194 BUG_ON(surface == NULL);
1128 BUG_ON(!clips || !num_clips); 1195 BUG_ON(!clips || !num_clips);
1129 1196
1197 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1198 if (unlikely(tmp == NULL)) {
1199 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1200 return -ENOMEM;
1201 }
1202
1130 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; 1203 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1131 cmd = kmalloc(fifo_size, GFP_KERNEL); 1204 cmd = kmalloc(fifo_size, GFP_KERNEL);
1132 if (unlikely(cmd == NULL)) { 1205 if (unlikely(cmd == NULL)) {
1133 DRM_ERROR("Failed to allocate temporary fifo memory.\n"); 1206 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1134 return -ENOMEM; 1207 ret = -ENOMEM;
1208 goto out_free_tmp;
1209 }
1210
1211 left = clips->x;
1212 right = clips->x + clips->w;
1213 top = clips->y;
1214 bottom = clips->y + clips->h;
1215
1216 for (i = 1; i < num_clips; i++) {
1217 left = min_t(int, left, (int)clips[i].x);
1218 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1219 top = min_t(int, top, (int)clips[i].y);
1220 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1135 } 1221 }
1136 1222
1137 /* only need to do this once */ 1223 /* only need to do this once */
1138 memset(cmd, 0, fifo_size); 1224 memset(cmd, 0, fifo_size);
1139 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); 1225 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1140 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1141
1142 cmd->body.srcRect.left = 0;
1143 cmd->body.srcRect.right = surface->sizes[0].width;
1144 cmd->body.srcRect.top = 0;
1145 cmd->body.srcRect.bottom = surface->sizes[0].height;
1146 1226
1147 blits = (SVGASignedRect *)&cmd[1]; 1227 blits = (SVGASignedRect *)&cmd[1];
1228
1229 cmd->body.srcRect.left = left;
1230 cmd->body.srcRect.right = right;
1231 cmd->body.srcRect.top = top;
1232 cmd->body.srcRect.bottom = bottom;
1233
1148 for (i = 0; i < num_clips; i++) { 1234 for (i = 0; i < num_clips; i++) {
1149 blits[i].left = clips[i].x; 1235 tmp[i].x1 = clips[i].x - left;
1150 blits[i].right = clips[i].x + clips[i].w; 1236 tmp[i].x2 = clips[i].x + clips[i].w - left;
1151 blits[i].top = clips[i].y; 1237 tmp[i].y1 = clips[i].y - top;
1152 blits[i].bottom = clips[i].y + clips[i].h; 1238 tmp[i].y2 = clips[i].y + clips[i].h - top;
1153 } 1239 }
1154 1240
1155 for (k = 0; k < num_units; k++) { 1241 for (k = 0; k < num_units; k++) {
1156 struct vmw_display_unit *unit = units[k]; 1242 struct vmw_display_unit *unit = units[k];
1157 int clip_x1 = destX - unit->crtc.x; 1243 struct vmw_clip_rect clip;
1158 int clip_y1 = destY - unit->crtc.y; 1244 int num;
1159 int clip_x2 = clip_x1 + surface->sizes[0].width; 1245
1160 int clip_y2 = clip_y1 + surface->sizes[0].height; 1246 clip.x1 = left + destX - unit->crtc.x;
1247 clip.y1 = top + destY - unit->crtc.y;
1248 clip.x2 = right + destX - unit->crtc.x;
1249 clip.y2 = bottom + destY - unit->crtc.y;
1161 1250
1162 /* skip any crtcs that misses the clip region */ 1251 /* skip any crtcs that misses the clip region */
1163 if (clip_x1 >= unit->crtc.mode.hdisplay || 1252 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1164 clip_y1 >= unit->crtc.mode.vdisplay || 1253 clip.y1 >= unit->crtc.mode.vdisplay ||
1165 clip_x2 <= 0 || clip_y2 <= 0) 1254 clip.x2 <= 0 || clip.y2 <= 0)
1166 continue; 1255 continue;
1167 1256
1257 /*
1258 * In order for the clip rects to be correctly scaled
1259 * the src and dest rects needs to be the same size.
1260 */
1261 cmd->body.destRect.left = clip.x1;
1262 cmd->body.destRect.right = clip.x2;
1263 cmd->body.destRect.top = clip.y1;
1264 cmd->body.destRect.bottom = clip.y2;
1265
1266 /* create a clip rect of the crtc in dest coords */
1267 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1268 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1269 clip.x1 = 0 - clip.x1;
1270 clip.y1 = 0 - clip.y1;
1271
1168 /* need to reset sid as it is changed by execbuf */ 1272 /* need to reset sid as it is changed by execbuf */
1169 cmd->body.srcImage.sid = sid; 1273 cmd->body.srcImage.sid = sid;
1170
1171 cmd->body.destScreenId = unit->unit; 1274 cmd->body.destScreenId = unit->unit;
1172 1275
1173 /* 1276 /* clip and write blits to cmd stream */
1174 * The blit command is a lot more resilient then the 1277 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
1175 * readback command when it comes to clip rects. So its
1176 * okay to go out of bounds.
1177 */
1178 1278
1179 cmd->body.destRect.left = clip_x1; 1279 /* if no cliprects hit skip this */
1180 cmd->body.destRect.right = clip_x2; 1280 if (num == 0)
1181 cmd->body.destRect.top = clip_y1; 1281 continue;
1182 cmd->body.destRect.bottom = clip_y2;
1183 1282
1283 /* recalculate package length */
1284 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1285 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1184 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, 1286 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1185 fifo_size, 0, NULL); 1287 fifo_size, 0, NULL);
1186 1288
@@ -1189,6 +1291,8 @@ int vmw_kms_present(struct vmw_private *dev_priv,
1189 } 1291 }
1190 1292
1191 kfree(cmd); 1293 kfree(cmd);
1294out_free_tmp:
1295 kfree(tmp);
1192 1296
1193 return ret; 1297 return ret;
1194} 1298}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
index af8e6e5bd964..e1cb8556355f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -62,9 +62,14 @@ struct vmw_framebuffer {
62int vmw_cursor_update_image(struct vmw_private *dev_priv, 62int vmw_cursor_update_image(struct vmw_private *dev_priv,
63 u32 *image, u32 width, u32 height, 63 u32 *image, u32 width, u32 height,
64 u32 hotspotX, u32 hotspotY); 64 u32 hotspotX, u32 hotspotY);
65int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
66 struct vmw_dma_buffer *dmabuf,
67 u32 width, u32 height,
68 u32 hotspotX, u32 hotspotY);
65void vmw_cursor_update_position(struct vmw_private *dev_priv, 69void vmw_cursor_update_position(struct vmw_private *dev_priv,
66 bool show, int x, int y); 70 bool show, int x, int y);
67 71
72
68/** 73/**
69 * Base class display unit. 74 * Base class display unit.
70 * 75 *
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 90c5e3928491..8f8dbd43c33d 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -74,9 +74,10 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
74{ 74{
75 struct vmw_legacy_display *lds = dev_priv->ldu_priv; 75 struct vmw_legacy_display *lds = dev_priv->ldu_priv;
76 struct vmw_legacy_display_unit *entry; 76 struct vmw_legacy_display_unit *entry;
77 struct vmw_display_unit *du = NULL;
77 struct drm_framebuffer *fb = NULL; 78 struct drm_framebuffer *fb = NULL;
78 struct drm_crtc *crtc = NULL; 79 struct drm_crtc *crtc = NULL;
79 int i = 0; 80 int i = 0, ret;
80 81
81 /* If there is no display topology the host just assumes 82 /* If there is no display topology the host just assumes
82 * that the guest will set the same layout as the host. 83 * that the guest will set the same layout as the host.
@@ -129,6 +130,25 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
129 130
130 lds->last_num_active = lds->num_active; 131 lds->last_num_active = lds->num_active;
131 132
133
134 /* Find the first du with a cursor. */
135 list_for_each_entry(entry, &lds->active, active) {
136 du = &entry->base;
137
138 if (!du->cursor_dmabuf)
139 continue;
140
141 ret = vmw_cursor_update_dmabuf(dev_priv,
142 du->cursor_dmabuf,
143 64, 64,
144 du->hotspot_x,
145 du->hotspot_y);
146 if (ret == 0)
147 break;
148
149 DRM_ERROR("Could not update cursor image\n");
150 }
151
132 return 0; 152 return 0;
133} 153}
134 154
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index 86c5e4cceb31..1c7f09e26819 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -1190,6 +1190,29 @@ void vmw_resource_unreserve(struct list_head *list)
1190 write_unlock(lock); 1190 write_unlock(lock);
1191} 1191}
1192 1192
1193/**
1194 * Helper function that looks either a surface or dmabuf.
1195 *
1196 * The pointer this pointed at by out_surf and out_buf needs to be null.
1197 */
1198int vmw_user_lookup_handle(struct vmw_private *dev_priv,
1199 struct ttm_object_file *tfile,
1200 uint32_t handle,
1201 struct vmw_surface **out_surf,
1202 struct vmw_dma_buffer **out_buf)
1203{
1204 int ret;
1205
1206 BUG_ON(*out_surf || *out_buf);
1207
1208 ret = vmw_user_surface_lookup_handle(dev_priv, tfile, handle, out_surf);
1209 if (!ret)
1210 return 0;
1211
1212 ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf);
1213 return ret;
1214}
1215
1193 1216
1194int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv, 1217int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv,
1195 struct ttm_object_file *tfile, 1218 struct ttm_object_file *tfile,
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 8cebef49aeac..18936ac9d51c 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -893,6 +893,13 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,
893 /* Set the number of I2C channel instance */ 893 /* Set the number of I2C channel instance */
894 adap_info->ch_num = id->driver_data; 894 adap_info->ch_num = id->driver_data;
895 895
896 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
897 KBUILD_MODNAME, adap_info);
898 if (ret) {
899 pch_pci_err(pdev, "request_irq FAILED\n");
900 goto err_request_irq;
901 }
902
896 for (i = 0; i < adap_info->ch_num; i++) { 903 for (i = 0; i < adap_info->ch_num; i++) {
897 pch_adap = &adap_info->pch_data[i].pch_adapter; 904 pch_adap = &adap_info->pch_data[i].pch_adapter;
898 adap_info->pch_i2c_suspended = false; 905 adap_info->pch_i2c_suspended = false;
@@ -910,28 +917,23 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,
910 917
911 pch_adap->dev.parent = &pdev->dev; 918 pch_adap->dev.parent = &pdev->dev;
912 919
920 pch_i2c_init(&adap_info->pch_data[i]);
913 ret = i2c_add_adapter(pch_adap); 921 ret = i2c_add_adapter(pch_adap);
914 if (ret) { 922 if (ret) {
915 pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i); 923 pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i);
916 goto err_i2c_add_adapter; 924 goto err_add_adapter;
917 } 925 }
918
919 pch_i2c_init(&adap_info->pch_data[i]);
920 }
921 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
922 KBUILD_MODNAME, adap_info);
923 if (ret) {
924 pch_pci_err(pdev, "request_irq FAILED\n");
925 goto err_i2c_add_adapter;
926 } 926 }
927 927
928 pci_set_drvdata(pdev, adap_info); 928 pci_set_drvdata(pdev, adap_info);
929 pch_pci_dbg(pdev, "returns %d.\n", ret); 929 pch_pci_dbg(pdev, "returns %d.\n", ret);
930 return 0; 930 return 0;
931 931
932err_i2c_add_adapter: 932err_add_adapter:
933 for (j = 0; j < i; j++) 933 for (j = 0; j < i; j++)
934 i2c_del_adapter(&adap_info->pch_data[j].pch_adapter); 934 i2c_del_adapter(&adap_info->pch_data[j].pch_adapter);
935 free_irq(pdev->irq, adap_info);
936err_request_irq:
935 pci_iounmap(pdev, base_addr); 937 pci_iounmap(pdev, base_addr);
936err_pci_iomap: 938err_pci_iomap:
937 pci_release_regions(pdev); 939 pci_release_regions(pdev);
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index a43d0023446a..fa23faa20f0e 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1047,13 +1047,14 @@ omap_i2c_probe(struct platform_device *pdev)
1047 * size. This is to ensure that we can handle the status on int 1047 * size. This is to ensure that we can handle the status on int
1048 * call back latencies. 1048 * call back latencies.
1049 */ 1049 */
1050 if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) { 1050
1051 dev->fifo_size = 0; 1051 dev->fifo_size = (dev->fifo_size / 2);
1052
1053 if (dev->rev >= OMAP_I2C_REV_ON_3530_4430)
1052 dev->b_hw = 0; /* Disable hardware fixes */ 1054 dev->b_hw = 0; /* Disable hardware fixes */
1053 } else { 1055 else
1054 dev->fifo_size = (dev->fifo_size / 2);
1055 dev->b_hw = 1; /* Enable hardware fixes */ 1056 dev->b_hw = 1; /* Enable hardware fixes */
1056 } 1057
1057 /* calculate wakeup latency constraint for MPU */ 1058 /* calculate wakeup latency constraint for MPU */
1058 if (dev->set_mpu_wkup_lat != NULL) 1059 if (dev->set_mpu_wkup_lat != NULL)
1059 dev->latency = (1000000 * dev->fifo_size) / 1060 dev->latency = (1000000 * dev->fifo_size) /
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 2754cef86a06..4c1718081685 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -534,6 +534,7 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
534 534
535 /* first, try busy waiting briefly */ 535 /* first, try busy waiting briefly */
536 do { 536 do {
537 cpu_relax();
537 iicstat = readl(i2c->regs + S3C2410_IICSTAT); 538 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
538 } while ((iicstat & S3C2410_IICSTAT_START) && --spins); 539 } while ((iicstat & S3C2410_IICSTAT_START) && --spins);
539 540
@@ -786,7 +787,7 @@ static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
786#else 787#else
787static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) 788static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
788{ 789{
789 return -EINVAL; 790 return 0;
790} 791}
791 792
792static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) 793static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
diff --git a/drivers/ide/at91_ide.c b/drivers/ide/at91_ide.c
index 6dede8f366c5..41d415529479 100644
--- a/drivers/ide/at91_ide.c
+++ b/drivers/ide/at91_ide.c
@@ -314,7 +314,7 @@ static int __init at91_ide_probe(struct platform_device *pdev)
314 apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); 314 apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
315 315
316 /* with GPIO interrupt we have to do quirks in handler */ 316 /* with GPIO interrupt we have to do quirks in handler */
317 if (board->irq_pin >= PIN_BASE) 317 if (gpio_is_valid(board->irq_pin))
318 host->irq_handler = at91_irq_handler; 318 host->irq_handler = at91_irq_handler;
319 319
320 host->ports[0]->select_data = board->chipselect; 320 host->ports[0]->select_data = board->chipselect;
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index 75ff821c0af0..d0d4aa9f4802 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -2513,6 +2513,9 @@ static int cma_resolve_ib_udp(struct rdma_id_private *id_priv,
2513 2513
2514 req.private_data_len = sizeof(struct cma_hdr) + 2514 req.private_data_len = sizeof(struct cma_hdr) +
2515 conn_param->private_data_len; 2515 conn_param->private_data_len;
2516 if (req.private_data_len < conn_param->private_data_len)
2517 return -EINVAL;
2518
2516 req.private_data = kzalloc(req.private_data_len, GFP_ATOMIC); 2519 req.private_data = kzalloc(req.private_data_len, GFP_ATOMIC);
2517 if (!req.private_data) 2520 if (!req.private_data)
2518 return -ENOMEM; 2521 return -ENOMEM;
@@ -2562,6 +2565,9 @@ static int cma_connect_ib(struct rdma_id_private *id_priv,
2562 memset(&req, 0, sizeof req); 2565 memset(&req, 0, sizeof req);
2563 offset = cma_user_data_offset(id_priv->id.ps); 2566 offset = cma_user_data_offset(id_priv->id.ps);
2564 req.private_data_len = offset + conn_param->private_data_len; 2567 req.private_data_len = offset + conn_param->private_data_len;
2568 if (req.private_data_len < conn_param->private_data_len)
2569 return -EINVAL;
2570
2565 private_data = kzalloc(req.private_data_len, GFP_ATOMIC); 2571 private_data = kzalloc(req.private_data_len, GFP_ATOMIC);
2566 if (!private_data) 2572 if (!private_data)
2567 return -ENOMEM; 2573 return -ENOMEM;
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index 77f3dbc0aaa1..18836cdf1e10 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -1244,7 +1244,8 @@ err_reg:
1244 1244
1245err_counter: 1245err_counter:
1246 for (; i; --i) 1246 for (; i; --i)
1247 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]); 1247 if (ibdev->counters[i - 1] != -1)
1248 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
1248 1249
1249err_map: 1250err_map:
1250 iounmap(ibdev->uar_map); 1251 iounmap(ibdev->uar_map);
@@ -1275,7 +1276,8 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
1275 } 1276 }
1276 iounmap(ibdev->uar_map); 1277 iounmap(ibdev->uar_map);
1277 for (p = 0; p < ibdev->num_ports; ++p) 1278 for (p = 0; p < ibdev->num_ports; ++p)
1278 mlx4_counter_free(ibdev->dev, ibdev->counters[p]); 1279 if (ibdev->counters[p] != -1)
1280 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
1279 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 1281 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
1280 mlx4_CLOSE_PORT(dev, p); 1282 mlx4_CLOSE_PORT(dev, p);
1281 1283
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c
index 574600ef5b42..a7403248d83d 100644
--- a/drivers/infiniband/hw/qib/qib_file_ops.c
+++ b/drivers/infiniband/hw/qib/qib_file_ops.c
@@ -1285,7 +1285,7 @@ static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1285 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); 1285 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1286 ctxt_fp(fp) = rcd; 1286 ctxt_fp(fp) = rcd;
1287 qib_stats.sps_ctxts++; 1287 qib_stats.sps_ctxts++;
1288 dd->freectxts++; 1288 dd->freectxts--;
1289 ret = 0; 1289 ret = 0;
1290 goto bail; 1290 goto bail;
1291 1291
@@ -1794,7 +1794,7 @@ static int qib_close(struct inode *in, struct file *fp)
1794 if (dd->pageshadow) 1794 if (dd->pageshadow)
1795 unlock_expected_tids(rcd); 1795 unlock_expected_tids(rcd);
1796 qib_stats.sps_ctxts--; 1796 qib_stats.sps_ctxts--;
1797 dd->freectxts--; 1797 dd->freectxts++;
1798 } 1798 }
1799 1799
1800 mutex_unlock(&qib_mutex); 1800 mutex_unlock(&qib_mutex);
diff --git a/drivers/input/misc/cma3000_d0x.c b/drivers/input/misc/cma3000_d0x.c
index 80793f1608eb..06517e60e50c 100644
--- a/drivers/input/misc/cma3000_d0x.c
+++ b/drivers/input/misc/cma3000_d0x.c
@@ -115,8 +115,8 @@ static void decode_mg(struct cma3000_accl_data *data, int *datax,
115static irqreturn_t cma3000_thread_irq(int irq, void *dev_id) 115static irqreturn_t cma3000_thread_irq(int irq, void *dev_id)
116{ 116{
117 struct cma3000_accl_data *data = dev_id; 117 struct cma3000_accl_data *data = dev_id;
118 int datax, datay, dataz; 118 int datax, datay, dataz, intr_status;
119 u8 ctrl, mode, range, intr_status; 119 u8 ctrl, mode, range;
120 120
121 intr_status = CMA3000_READ(data, CMA3000_INTSTATUS, "interrupt status"); 121 intr_status = CMA3000_READ(data, CMA3000_INTSTATUS, "interrupt status");
122 if (intr_status < 0) 122 if (intr_status < 0)
diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c
index c5b12d2e955a..86d6f39178b0 100644
--- a/drivers/input/mouse/sentelic.c
+++ b/drivers/input/mouse/sentelic.c
@@ -2,7 +2,7 @@
2 * Finger Sensing Pad PS/2 mouse driver. 2 * Finger Sensing Pad PS/2 mouse driver.
3 * 3 *
4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. 4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
5 * Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation. 5 * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -162,7 +162,7 @@ static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val)
162 ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); 162 ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2);
163 163
164 if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) 164 if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
165 return -1; 165 goto out;
166 166
167 if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { 167 if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
168 /* inversion is required */ 168 /* inversion is required */
@@ -261,7 +261,7 @@ static int fsp_page_reg_write(struct psmouse *psmouse, int reg_val)
261 ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2); 261 ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2);
262 262
263 if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) 263 if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
264 return -1; 264 goto out;
265 265
266 if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { 266 if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
267 ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2); 267 ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2);
@@ -309,7 +309,7 @@ static int fsp_get_buttons(struct psmouse *psmouse, int *btn)
309 }; 309 };
310 int val; 310 int val;
311 311
312 if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &val) == -1) 312 if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS, &val) == -1)
313 return -EIO; 313 return -EIO;
314 314
315 *btn = buttons[(val & 0x30) >> 4]; 315 *btn = buttons[(val & 0x30) >> 4];
diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h
index ed1395ac7b8b..2e4af24f8c15 100644
--- a/drivers/input/mouse/sentelic.h
+++ b/drivers/input/mouse/sentelic.h
@@ -2,7 +2,7 @@
2 * Finger Sensing Pad PS/2 mouse driver. 2 * Finger Sensing Pad PS/2 mouse driver.
3 * 3 *
4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. 4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
5 * Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation. 5 * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -33,6 +33,7 @@
33/* Finger-sensing Pad control registers */ 33/* Finger-sensing Pad control registers */
34#define FSP_REG_SYSCTL1 0x10 34#define FSP_REG_SYSCTL1 0x10
35#define FSP_BIT_EN_REG_CLK BIT(5) 35#define FSP_BIT_EN_REG_CLK BIT(5)
36#define FSP_REG_TMOD_STATUS 0x20
36#define FSP_REG_OPC_QDOWN 0x31 37#define FSP_REG_OPC_QDOWN 0x31
37#define FSP_BIT_EN_OPC_TAG BIT(7) 38#define FSP_BIT_EN_OPC_TAG BIT(7)
38#define FSP_REG_OPTZ_XLO 0x34 39#define FSP_REG_OPTZ_XLO 0x34
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index c080b828e5dc..a6dcd18e9adf 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -24,6 +24,7 @@
24 */ 24 */
25 25
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/delay.h>
27#include <linux/dmi.h> 28#include <linux/dmi.h>
28#include <linux/input/mt.h> 29#include <linux/input/mt.h>
29#include <linux/serio.h> 30#include <linux/serio.h>
@@ -1220,6 +1221,16 @@ static int synaptics_reconnect(struct psmouse *psmouse)
1220 1221
1221 do { 1222 do {
1222 psmouse_reset(psmouse); 1223 psmouse_reset(psmouse);
1224 if (retry) {
1225 /*
1226 * On some boxes, right after resuming, the touchpad
1227 * needs some time to finish initializing (I assume
1228 * it needs time to calibrate) and start responding
1229 * to Synaptics-specific queries, so let's wait a
1230 * bit.
1231 */
1232 ssleep(1);
1233 }
1223 error = synaptics_detect(psmouse, 0); 1234 error = synaptics_detect(psmouse, 0);
1224 } while (error && ++retry < 3); 1235 } while (error && ++retry < 3);
1225 1236
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index da0d8761e778..2ee47d01a3b4 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -1470,6 +1470,9 @@ static const struct wacom_features wacom_features_0xE3 =
1470static const struct wacom_features wacom_features_0xE6 = 1470static const struct wacom_features wacom_features_0xE6 =
1471 { "Wacom ISDv4 E6", WACOM_PKGLEN_TPC2FG, 27760, 15694, 255, 1471 { "Wacom ISDv4 E6", WACOM_PKGLEN_TPC2FG, 27760, 15694, 255,
1472 0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; 1472 0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES };
1473static const struct wacom_features wacom_features_0xEC =
1474 { "Wacom ISDv4 EC", WACOM_PKGLEN_GRAPHIRE, 25710, 14500, 255,
1475 0, TABLETPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES };
1473static const struct wacom_features wacom_features_0x47 = 1476static const struct wacom_features wacom_features_0x47 =
1474 { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, 1477 { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023,
1475 31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; 1478 31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES };
@@ -1611,6 +1614,7 @@ const struct usb_device_id wacom_ids[] = {
1611 { USB_DEVICE_WACOM(0xE2) }, 1614 { USB_DEVICE_WACOM(0xE2) },
1612 { USB_DEVICE_WACOM(0xE3) }, 1615 { USB_DEVICE_WACOM(0xE3) },
1613 { USB_DEVICE_WACOM(0xE6) }, 1616 { USB_DEVICE_WACOM(0xE6) },
1617 { USB_DEVICE_WACOM(0xEC) },
1614 { USB_DEVICE_WACOM(0x47) }, 1618 { USB_DEVICE_WACOM(0x47) },
1615 { USB_DEVICE_LENOVO(0x6004) }, 1619 { USB_DEVICE_LENOVO(0x6004) },
1616 { } 1620 { }
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 2fb2963df553..5b5fa5cdaa31 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -90,7 +90,7 @@ struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
90 if (bus == NULL || bus->iommu_ops == NULL) 90 if (bus == NULL || bus->iommu_ops == NULL)
91 return NULL; 91 return NULL;
92 92
93 domain = kmalloc(sizeof(*domain), GFP_KERNEL); 93 domain = kzalloc(sizeof(*domain), GFP_KERNEL);
94 if (!domain) 94 if (!domain)
95 return NULL; 95 return NULL;
96 96
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c
index b6907118283a..6d03774b176e 100644
--- a/drivers/md/bitmap.c
+++ b/drivers/md/bitmap.c
@@ -1393,9 +1393,6 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto
1393 atomic_read(&bitmap->behind_writes), 1393 atomic_read(&bitmap->behind_writes),
1394 bitmap->mddev->bitmap_info.max_write_behind); 1394 bitmap->mddev->bitmap_info.max_write_behind);
1395 } 1395 }
1396 if (bitmap->mddev->degraded)
1397 /* Never clear bits or update events_cleared when degraded */
1398 success = 0;
1399 1396
1400 while (sectors) { 1397 while (sectors) {
1401 sector_t blocks; 1398 sector_t blocks;
@@ -1409,7 +1406,7 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto
1409 return; 1406 return;
1410 } 1407 }
1411 1408
1412 if (success && 1409 if (success && !bitmap->mddev->degraded &&
1413 bitmap->events_cleared < bitmap->mddev->events) { 1410 bitmap->events_cleared < bitmap->mddev->events) {
1414 bitmap->events_cleared = bitmap->mddev->events; 1411 bitmap->events_cleared = bitmap->mddev->events;
1415 bitmap->need_sync = 1; 1412 bitmap->need_sync = 1;
diff --git a/drivers/md/linear.c b/drivers/md/linear.c
index c3273efd08cb..627456542fb3 100644
--- a/drivers/md/linear.c
+++ b/drivers/md/linear.c
@@ -230,6 +230,7 @@ static int linear_add(struct mddev *mddev, struct md_rdev *rdev)
230 return -EINVAL; 230 return -EINVAL;
231 231
232 rdev->raid_disk = rdev->saved_raid_disk; 232 rdev->raid_disk = rdev->saved_raid_disk;
233 rdev->saved_raid_disk = -1;
233 234
234 newconf = linear_conf(mddev,mddev->raid_disks+1); 235 newconf = linear_conf(mddev,mddev->raid_disks+1);
235 236
diff --git a/drivers/md/md.c b/drivers/md/md.c
index ee981737edfc..f47f1f8ac44b 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -7360,8 +7360,7 @@ static int remove_and_add_spares(struct mddev *mddev)
7360 spares++; 7360 spares++;
7361 md_new_event(mddev); 7361 md_new_event(mddev);
7362 set_bit(MD_CHANGE_DEVS, &mddev->flags); 7362 set_bit(MD_CHANGE_DEVS, &mddev->flags);
7363 } else 7363 }
7364 break;
7365 } 7364 }
7366 } 7365 }
7367 } 7366 }
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 31670f8d6b65..858fdbb7eb07 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -3065,11 +3065,17 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s)
3065 } 3065 }
3066 } else if (test_bit(In_sync, &rdev->flags)) 3066 } else if (test_bit(In_sync, &rdev->flags))
3067 set_bit(R5_Insync, &dev->flags); 3067 set_bit(R5_Insync, &dev->flags);
3068 else { 3068 else if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset)
3069 /* in sync if before recovery_offset */ 3069 /* in sync if before recovery_offset */
3070 if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) 3070 set_bit(R5_Insync, &dev->flags);
3071 set_bit(R5_Insync, &dev->flags); 3071 else if (test_bit(R5_UPTODATE, &dev->flags) &&
3072 } 3072 test_bit(R5_Expanded, &dev->flags))
3073 /* If we've reshaped into here, we assume it is Insync.
3074 * We will shortly update recovery_offset to make
3075 * it official.
3076 */
3077 set_bit(R5_Insync, &dev->flags);
3078
3073 if (rdev && test_bit(R5_WriteError, &dev->flags)) { 3079 if (rdev && test_bit(R5_WriteError, &dev->flags)) {
3074 clear_bit(R5_Insync, &dev->flags); 3080 clear_bit(R5_Insync, &dev->flags);
3075 if (!test_bit(Faulty, &rdev->flags)) { 3081 if (!test_bit(Faulty, &rdev->flags)) {
diff --git a/drivers/media/common/tuners/mxl5007t.c b/drivers/media/common/tuners/mxl5007t.c
index 7eb1bf75cd07..5d02221e99dd 100644
--- a/drivers/media/common/tuners/mxl5007t.c
+++ b/drivers/media/common/tuners/mxl5007t.c
@@ -488,9 +488,10 @@ static int mxl5007t_write_regs(struct mxl5007t_state *state,
488 488
489static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val) 489static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
490{ 490{
491 u8 buf[2] = { 0xfb, reg };
491 struct i2c_msg msg[] = { 492 struct i2c_msg msg[] = {
492 { .addr = state->i2c_props.addr, .flags = 0, 493 { .addr = state->i2c_props.addr, .flags = 0,
493 .buf = &reg, .len = 1 }, 494 .buf = buf, .len = 2 },
494 { .addr = state->i2c_props.addr, .flags = I2C_M_RD, 495 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
495 .buf = val, .len = 1 }, 496 .buf = val, .len = 1 },
496 }; 497 };
diff --git a/drivers/media/common/tuners/tda18218.c b/drivers/media/common/tuners/tda18218.c
index aacfe2387e28..4fc29730a12c 100644
--- a/drivers/media/common/tuners/tda18218.c
+++ b/drivers/media/common/tuners/tda18218.c
@@ -141,7 +141,7 @@ static int tda18218_set_params(struct dvb_frontend *fe,
141 switch (params->u.ofdm.bandwidth) { 141 switch (params->u.ofdm.bandwidth) {
142 case BANDWIDTH_6_MHZ: 142 case BANDWIDTH_6_MHZ:
143 LP_Fc = 0; 143 LP_Fc = 0;
144 LO_Frac = params->frequency + 4000000; 144 LO_Frac = params->frequency + 3000000;
145 break; 145 break;
146 case BANDWIDTH_7_MHZ: 146 case BANDWIDTH_7_MHZ:
147 LP_Fc = 1; 147 LP_Fc = 1;
diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c
index 303f22ea04c0..01bb8daf4b09 100644
--- a/drivers/media/rc/ati_remote.c
+++ b/drivers/media/rc/ati_remote.c
@@ -189,7 +189,7 @@ struct ati_remote {
189 dma_addr_t inbuf_dma; 189 dma_addr_t inbuf_dma;
190 dma_addr_t outbuf_dma; 190 dma_addr_t outbuf_dma;
191 191
192 unsigned char old_data[2]; /* Detect duplicate events */ 192 unsigned char old_data; /* Detect duplicate events */
193 unsigned long old_jiffies; 193 unsigned long old_jiffies;
194 unsigned long acc_jiffies; /* handle acceleration */ 194 unsigned long acc_jiffies; /* handle acceleration */
195 unsigned long first_jiffies; 195 unsigned long first_jiffies;
@@ -221,35 +221,35 @@ struct ati_remote {
221/* Translation table from hardware messages to input events. */ 221/* Translation table from hardware messages to input events. */
222static const struct { 222static const struct {
223 short kind; 223 short kind;
224 unsigned char data1, data2; 224 unsigned char data;
225 int type; 225 int type;
226 unsigned int code; 226 unsigned int code;
227 int value; 227 int value;
228} ati_remote_tbl[] = { 228} ati_remote_tbl[] = {
229 /* Directional control pad axes */ 229 /* Directional control pad axes */
230 {KIND_ACCEL, 0x35, 0x70, EV_REL, REL_X, -1}, /* left */ 230 {KIND_ACCEL, 0x70, EV_REL, REL_X, -1}, /* left */
231 {KIND_ACCEL, 0x36, 0x71, EV_REL, REL_X, 1}, /* right */ 231 {KIND_ACCEL, 0x71, EV_REL, REL_X, 1}, /* right */
232 {KIND_ACCEL, 0x37, 0x72, EV_REL, REL_Y, -1}, /* up */ 232 {KIND_ACCEL, 0x72, EV_REL, REL_Y, -1}, /* up */
233 {KIND_ACCEL, 0x38, 0x73, EV_REL, REL_Y, 1}, /* down */ 233 {KIND_ACCEL, 0x73, EV_REL, REL_Y, 1}, /* down */
234 /* Directional control pad diagonals */ 234 /* Directional control pad diagonals */
235 {KIND_LU, 0x39, 0x74, EV_REL, 0, 0}, /* left up */ 235 {KIND_LU, 0x74, EV_REL, 0, 0}, /* left up */
236 {KIND_RU, 0x3a, 0x75, EV_REL, 0, 0}, /* right up */ 236 {KIND_RU, 0x75, EV_REL, 0, 0}, /* right up */
237 {KIND_LD, 0x3c, 0x77, EV_REL, 0, 0}, /* left down */ 237 {KIND_LD, 0x77, EV_REL, 0, 0}, /* left down */
238 {KIND_RD, 0x3b, 0x76, EV_REL, 0, 0}, /* right down */ 238 {KIND_RD, 0x76, EV_REL, 0, 0}, /* right down */
239 239
240 /* "Mouse button" buttons */ 240 /* "Mouse button" buttons */
241 {KIND_LITERAL, 0x3d, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */ 241 {KIND_LITERAL, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */
242 {KIND_LITERAL, 0x3e, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */ 242 {KIND_LITERAL, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */
243 {KIND_LITERAL, 0x41, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */ 243 {KIND_LITERAL, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */
244 {KIND_LITERAL, 0x42, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */ 244 {KIND_LITERAL, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */
245 245
246 /* Artificial "doubleclick" events are generated by the hardware. 246 /* Artificial "doubleclick" events are generated by the hardware.
247 * They are mapped to the "side" and "extra" mouse buttons here. */ 247 * They are mapped to the "side" and "extra" mouse buttons here. */
248 {KIND_FILTERED, 0x3f, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */ 248 {KIND_FILTERED, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */
249 {KIND_FILTERED, 0x43, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */ 249 {KIND_FILTERED, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */
250 250
251 /* Non-mouse events are handled by rc-core */ 251 /* Non-mouse events are handled by rc-core */
252 {KIND_END, 0x00, 0x00, EV_MAX + 1, 0, 0} 252 {KIND_END, 0x00, EV_MAX + 1, 0, 0}
253}; 253};
254 254
255/* Local function prototypes */ 255/* Local function prototypes */
@@ -397,25 +397,6 @@ static int ati_remote_sendpacket(struct ati_remote *ati_remote, u16 cmd, unsigne
397} 397}
398 398
399/* 399/*
400 * ati_remote_event_lookup
401 */
402static int ati_remote_event_lookup(int rem, unsigned char d1, unsigned char d2)
403{
404 int i;
405
406 for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) {
407 /*
408 * Decide if the table entry matches the remote input.
409 */
410 if (ati_remote_tbl[i].data1 == d1 &&
411 ati_remote_tbl[i].data2 == d2)
412 return i;
413
414 }
415 return -1;
416}
417
418/*
419 * ati_remote_compute_accel 400 * ati_remote_compute_accel
420 * 401 *
421 * Implements acceleration curve for directional control pad 402 * Implements acceleration curve for directional control pad
@@ -463,7 +444,15 @@ static void ati_remote_input_report(struct urb *urb)
463 int index = -1; 444 int index = -1;
464 int acc; 445 int acc;
465 int remote_num; 446 int remote_num;
466 unsigned char scancode[2]; 447 unsigned char scancode;
448 int i;
449
450 /*
451 * data[0] = 0x14
452 * data[1] = data[2] + data[3] + 0xd5 (a checksum byte)
453 * data[2] = the key code (with toggle bit in MSB with some models)
454 * data[3] = channel << 4 (the low 4 bits must be zero)
455 */
467 456
468 /* Deal with strange looking inputs */ 457 /* Deal with strange looking inputs */
469 if ( (urb->actual_length != 4) || (data[0] != 0x14) || 458 if ( (urb->actual_length != 4) || (data[0] != 0x14) ||
@@ -472,6 +461,13 @@ static void ati_remote_input_report(struct urb *urb)
472 return; 461 return;
473 } 462 }
474 463
464 if (data[1] != ((data[2] + data[3] + 0xd5) & 0xff)) {
465 dbginfo(&ati_remote->interface->dev,
466 "wrong checksum in input: %02x %02x %02x %02x\n",
467 data[0], data[1], data[2], data[3]);
468 return;
469 }
470
475 /* Mask unwanted remote channels. */ 471 /* Mask unwanted remote channels. */
476 /* note: remote_num is 0-based, channel 1 on remote == 0 here */ 472 /* note: remote_num is 0-based, channel 1 on remote == 0 here */
477 remote_num = (data[3] >> 4) & 0x0f; 473 remote_num = (data[3] >> 4) & 0x0f;
@@ -482,31 +478,30 @@ static void ati_remote_input_report(struct urb *urb)
482 return; 478 return;
483 } 479 }
484 480
485 scancode[0] = (((data[1] - ((remote_num + 1) << 4)) & 0xf0) | (data[1] & 0x0f));
486
487 /* 481 /*
488 * Some devices (e.g. SnapStream Firefly) use 8080 as toggle code, 482 * MSB is a toggle code, though only used by some devices
489 * so we have to clear them. The first bit is a bit tricky as the 483 * (e.g. SnapStream Firefly)
490 * "non-toggled" state depends on remote_num, so we xor it with the
491 * second bit which is only used for toggle.
492 */ 484 */
493 scancode[0] ^= (data[2] & 0x80); 485 scancode = data[2] & 0x7f;
494
495 scancode[1] = data[2] & ~0x80;
496 486
497 /* Look up event code index in mouse translation table. */ 487 /* Look up event code index in the mouse translation table. */
498 index = ati_remote_event_lookup(remote_num, scancode[0], scancode[1]); 488 for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) {
489 if (scancode == ati_remote_tbl[i].data) {
490 index = i;
491 break;
492 }
493 }
499 494
500 if (index >= 0) { 495 if (index >= 0) {
501 dbginfo(&ati_remote->interface->dev, 496 dbginfo(&ati_remote->interface->dev,
502 "channel 0x%02x; mouse data %02x,%02x; index %d; keycode %d\n", 497 "channel 0x%02x; mouse data %02x; index %d; keycode %d\n",
503 remote_num, data[1], data[2], index, ati_remote_tbl[index].code); 498 remote_num, data[2], index, ati_remote_tbl[index].code);
504 if (!dev) 499 if (!dev)
505 return; /* no mouse device */ 500 return; /* no mouse device */
506 } else 501 } else
507 dbginfo(&ati_remote->interface->dev, 502 dbginfo(&ati_remote->interface->dev,
508 "channel 0x%02x; key data %02x,%02x, scancode %02x,%02x\n", 503 "channel 0x%02x; key data %02x, scancode %02x\n",
509 remote_num, data[1], data[2], scancode[0], scancode[1]); 504 remote_num, data[2], scancode);
510 505
511 506
512 if (index >= 0 && ati_remote_tbl[index].kind == KIND_LITERAL) { 507 if (index >= 0 && ati_remote_tbl[index].kind == KIND_LITERAL) {
@@ -523,8 +518,7 @@ static void ati_remote_input_report(struct urb *urb)
523 unsigned long now = jiffies; 518 unsigned long now = jiffies;
524 519
525 /* Filter duplicate events which happen "too close" together. */ 520 /* Filter duplicate events which happen "too close" together. */
526 if (ati_remote->old_data[0] == data[1] && 521 if (ati_remote->old_data == data[2] &&
527 ati_remote->old_data[1] == data[2] &&
528 time_before(now, ati_remote->old_jiffies + 522 time_before(now, ati_remote->old_jiffies +
529 msecs_to_jiffies(repeat_filter))) { 523 msecs_to_jiffies(repeat_filter))) {
530 ati_remote->repeat_count++; 524 ati_remote->repeat_count++;
@@ -533,8 +527,7 @@ static void ati_remote_input_report(struct urb *urb)
533 ati_remote->first_jiffies = now; 527 ati_remote->first_jiffies = now;
534 } 528 }
535 529
536 ati_remote->old_data[0] = data[1]; 530 ati_remote->old_data = data[2];
537 ati_remote->old_data[1] = data[2];
538 ati_remote->old_jiffies = now; 531 ati_remote->old_jiffies = now;
539 532
540 /* Ensure we skip at least the 4 first duplicate events (generated 533 /* Ensure we skip at least the 4 first duplicate events (generated
@@ -549,14 +542,13 @@ static void ati_remote_input_report(struct urb *urb)
549 542
550 if (index < 0) { 543 if (index < 0) {
551 /* Not a mouse event, hand it to rc-core. */ 544 /* Not a mouse event, hand it to rc-core. */
552 u32 rc_code = (scancode[0] << 8) | scancode[1];
553 545
554 /* 546 /*
555 * We don't use the rc-core repeat handling yet as 547 * We don't use the rc-core repeat handling yet as
556 * it would cause ghost repeats which would be a 548 * it would cause ghost repeats which would be a
557 * regression for this driver. 549 * regression for this driver.
558 */ 550 */
559 rc_keydown_notimeout(ati_remote->rdev, rc_code, 551 rc_keydown_notimeout(ati_remote->rdev, scancode,
560 data[2]); 552 data[2]);
561 rc_keyup(ati_remote->rdev); 553 rc_keyup(ati_remote->rdev);
562 return; 554 return;
@@ -607,8 +599,7 @@ static void ati_remote_input_report(struct urb *urb)
607 input_sync(dev); 599 input_sync(dev);
608 600
609 ati_remote->old_jiffies = jiffies; 601 ati_remote->old_jiffies = jiffies;
610 ati_remote->old_data[0] = data[1]; 602 ati_remote->old_data = data[2];
611 ati_remote->old_data[1] = data[2];
612 } 603 }
613} 604}
614 605
diff --git a/drivers/media/rc/keymaps/rc-ati-x10.c b/drivers/media/rc/keymaps/rc-ati-x10.c
index e1b8b2605c48..81506440eded 100644
--- a/drivers/media/rc/keymaps/rc-ati-x10.c
+++ b/drivers/media/rc/keymaps/rc-ati-x10.c
@@ -27,55 +27,55 @@
27#include <media/rc-map.h> 27#include <media/rc-map.h>
28 28
29static struct rc_map_table ati_x10[] = { 29static struct rc_map_table ati_x10[] = {
30 { 0xd20d, KEY_1 }, 30 { 0x0d, KEY_1 },
31 { 0xd30e, KEY_2 }, 31 { 0x0e, KEY_2 },
32 { 0xd40f, KEY_3 }, 32 { 0x0f, KEY_3 },
33 { 0xd510, KEY_4 }, 33 { 0x10, KEY_4 },
34 { 0xd611, KEY_5 }, 34 { 0x11, KEY_5 },
35 { 0xd712, KEY_6 }, 35 { 0x12, KEY_6 },
36 { 0xd813, KEY_7 }, 36 { 0x13, KEY_7 },
37 { 0xd914, KEY_8 }, 37 { 0x14, KEY_8 },
38 { 0xda15, KEY_9 }, 38 { 0x15, KEY_9 },
39 { 0xdc17, KEY_0 }, 39 { 0x17, KEY_0 },
40 { 0xc500, KEY_A }, 40 { 0x00, KEY_A },
41 { 0xc601, KEY_B }, 41 { 0x01, KEY_B },
42 { 0xde19, KEY_C }, 42 { 0x19, KEY_C },
43 { 0xe01b, KEY_D }, 43 { 0x1b, KEY_D },
44 { 0xe621, KEY_E }, 44 { 0x21, KEY_E },
45 { 0xe823, KEY_F }, 45 { 0x23, KEY_F },
46 46
47 { 0xdd18, KEY_KPENTER }, /* "check" */ 47 { 0x18, KEY_KPENTER }, /* "check" */
48 { 0xdb16, KEY_MENU }, /* "menu" */ 48 { 0x16, KEY_MENU }, /* "menu" */
49 { 0xc702, KEY_POWER }, /* Power */ 49 { 0x02, KEY_POWER }, /* Power */
50 { 0xc803, KEY_TV }, /* TV */ 50 { 0x03, KEY_TV }, /* TV */
51 { 0xc904, KEY_DVD }, /* DVD */ 51 { 0x04, KEY_DVD }, /* DVD */
52 { 0xca05, KEY_WWW }, /* WEB */ 52 { 0x05, KEY_WWW }, /* WEB */
53 { 0xcb06, KEY_BOOKMARKS }, /* "book" */ 53 { 0x06, KEY_BOOKMARKS }, /* "book" */
54 { 0xcc07, KEY_EDIT }, /* "hand" */ 54 { 0x07, KEY_EDIT }, /* "hand" */
55 { 0xe11c, KEY_COFFEE }, /* "timer" */ 55 { 0x1c, KEY_COFFEE }, /* "timer" */
56 { 0xe520, KEY_FRONT }, /* "max" */ 56 { 0x20, KEY_FRONT }, /* "max" */
57 { 0xe21d, KEY_LEFT }, /* left */ 57 { 0x1d, KEY_LEFT }, /* left */
58 { 0xe41f, KEY_RIGHT }, /* right */ 58 { 0x1f, KEY_RIGHT }, /* right */
59 { 0xe722, KEY_DOWN }, /* down */ 59 { 0x22, KEY_DOWN }, /* down */
60 { 0xdf1a, KEY_UP }, /* up */ 60 { 0x1a, KEY_UP }, /* up */
61 { 0xe31e, KEY_OK }, /* "OK" */ 61 { 0x1e, KEY_OK }, /* "OK" */
62 { 0xce09, KEY_VOLUMEDOWN }, /* VOL + */ 62 { 0x09, KEY_VOLUMEDOWN }, /* VOL + */
63 { 0xcd08, KEY_VOLUMEUP }, /* VOL - */ 63 { 0x08, KEY_VOLUMEUP }, /* VOL - */
64 { 0xcf0a, KEY_MUTE }, /* MUTE */ 64 { 0x0a, KEY_MUTE }, /* MUTE */
65 { 0xd00b, KEY_CHANNELUP }, /* CH + */ 65 { 0x0b, KEY_CHANNELUP }, /* CH + */
66 { 0xd10c, KEY_CHANNELDOWN },/* CH - */ 66 { 0x0c, KEY_CHANNELDOWN },/* CH - */
67 { 0xec27, KEY_RECORD }, /* ( o) red */ 67 { 0x27, KEY_RECORD }, /* ( o) red */
68 { 0xea25, KEY_PLAY }, /* ( >) */ 68 { 0x25, KEY_PLAY }, /* ( >) */
69 { 0xe924, KEY_REWIND }, /* (<<) */ 69 { 0x24, KEY_REWIND }, /* (<<) */
70 { 0xeb26, KEY_FORWARD }, /* (>>) */ 70 { 0x26, KEY_FORWARD }, /* (>>) */
71 { 0xed28, KEY_STOP }, /* ([]) */ 71 { 0x28, KEY_STOP }, /* ([]) */
72 { 0xee29, KEY_PAUSE }, /* ('') */ 72 { 0x29, KEY_PAUSE }, /* ('') */
73 { 0xf02b, KEY_PREVIOUS }, /* (<-) */ 73 { 0x2b, KEY_PREVIOUS }, /* (<-) */
74 { 0xef2a, KEY_NEXT }, /* (>+) */ 74 { 0x2a, KEY_NEXT }, /* (>+) */
75 { 0xf22d, KEY_INFO }, /* PLAYING */ 75 { 0x2d, KEY_INFO }, /* PLAYING */
76 { 0xf32e, KEY_HOME }, /* TOP */ 76 { 0x2e, KEY_HOME }, /* TOP */
77 { 0xf42f, KEY_END }, /* END */ 77 { 0x2f, KEY_END }, /* END */
78 { 0xf530, KEY_SELECT }, /* SELECT */ 78 { 0x30, KEY_SELECT }, /* SELECT */
79}; 79};
80 80
81static struct rc_map_list ati_x10_map = { 81static struct rc_map_list ati_x10_map = {
diff --git a/drivers/media/rc/keymaps/rc-medion-x10.c b/drivers/media/rc/keymaps/rc-medion-x10.c
index 09e2cc01d110..479cdb897810 100644
--- a/drivers/media/rc/keymaps/rc-medion-x10.c
+++ b/drivers/media/rc/keymaps/rc-medion-x10.c
@@ -25,70 +25,70 @@
25#include <media/rc-map.h> 25#include <media/rc-map.h>
26 26
27static struct rc_map_table medion_x10[] = { 27static struct rc_map_table medion_x10[] = {
28 { 0xf12c, KEY_TV }, /* TV */ 28 { 0x2c, KEY_TV }, /* TV */
29 { 0xf22d, KEY_VCR }, /* VCR */ 29 { 0x2d, KEY_VCR }, /* VCR */
30 { 0xc904, KEY_DVD }, /* DVD */ 30 { 0x04, KEY_DVD }, /* DVD */
31 { 0xcb06, KEY_AUDIO }, /* MUSIC */ 31 { 0x06, KEY_AUDIO }, /* MUSIC */
32 32
33 { 0xf32e, KEY_RADIO }, /* RADIO */ 33 { 0x2e, KEY_RADIO }, /* RADIO */
34 { 0xca05, KEY_DIRECTORY }, /* PHOTO */ 34 { 0x05, KEY_DIRECTORY }, /* PHOTO */
35 { 0xf42f, KEY_INFO }, /* TV-PREVIEW */ 35 { 0x2f, KEY_INFO }, /* TV-PREVIEW */
36 { 0xf530, KEY_LIST }, /* CHANNEL-LST */ 36 { 0x30, KEY_LIST }, /* CHANNEL-LST */
37 37
38 { 0xe01b, KEY_SETUP }, /* SETUP */ 38 { 0x1b, KEY_SETUP }, /* SETUP */
39 { 0xf631, KEY_VIDEO }, /* VIDEO DESKTOP */ 39 { 0x31, KEY_VIDEO }, /* VIDEO DESKTOP */
40 40
41 { 0xcd08, KEY_VOLUMEDOWN }, /* VOL - */ 41 { 0x08, KEY_VOLUMEDOWN }, /* VOL - */
42 { 0xce09, KEY_VOLUMEUP }, /* VOL + */ 42 { 0x09, KEY_VOLUMEUP }, /* VOL + */
43 { 0xd00b, KEY_CHANNELUP }, /* CHAN + */ 43 { 0x0b, KEY_CHANNELUP }, /* CHAN + */
44 { 0xd10c, KEY_CHANNELDOWN }, /* CHAN - */ 44 { 0x0c, KEY_CHANNELDOWN }, /* CHAN - */
45 { 0xc500, KEY_MUTE }, /* MUTE */ 45 { 0x00, KEY_MUTE }, /* MUTE */
46 46
47 { 0xf732, KEY_RED }, /* red */ 47 { 0x32, KEY_RED }, /* red */
48 { 0xf833, KEY_GREEN }, /* green */ 48 { 0x33, KEY_GREEN }, /* green */
49 { 0xf934, KEY_YELLOW }, /* yellow */ 49 { 0x34, KEY_YELLOW }, /* yellow */
50 { 0xfa35, KEY_BLUE }, /* blue */ 50 { 0x35, KEY_BLUE }, /* blue */
51 { 0xdb16, KEY_TEXT }, /* TXT */ 51 { 0x16, KEY_TEXT }, /* TXT */
52 52
53 { 0xd20d, KEY_1 }, 53 { 0x0d, KEY_1 },
54 { 0xd30e, KEY_2 }, 54 { 0x0e, KEY_2 },
55 { 0xd40f, KEY_3 }, 55 { 0x0f, KEY_3 },
56 { 0xd510, KEY_4 }, 56 { 0x10, KEY_4 },
57 { 0xd611, KEY_5 }, 57 { 0x11, KEY_5 },
58 { 0xd712, KEY_6 }, 58 { 0x12, KEY_6 },
59 { 0xd813, KEY_7 }, 59 { 0x13, KEY_7 },
60 { 0xd914, KEY_8 }, 60 { 0x14, KEY_8 },
61 { 0xda15, KEY_9 }, 61 { 0x15, KEY_9 },
62 { 0xdc17, KEY_0 }, 62 { 0x17, KEY_0 },
63 { 0xe11c, KEY_SEARCH }, /* TV/RAD, CH SRC */ 63 { 0x1c, KEY_SEARCH }, /* TV/RAD, CH SRC */
64 { 0xe520, KEY_DELETE }, /* DELETE */ 64 { 0x20, KEY_DELETE }, /* DELETE */
65 65
66 { 0xfb36, KEY_KEYBOARD }, /* RENAME */ 66 { 0x36, KEY_KEYBOARD }, /* RENAME */
67 { 0xdd18, KEY_SCREEN }, /* SNAPSHOT */ 67 { 0x18, KEY_SCREEN }, /* SNAPSHOT */
68 68
69 { 0xdf1a, KEY_UP }, /* up */ 69 { 0x1a, KEY_UP }, /* up */
70 { 0xe722, KEY_DOWN }, /* down */ 70 { 0x22, KEY_DOWN }, /* down */
71 { 0xe21d, KEY_LEFT }, /* left */ 71 { 0x1d, KEY_LEFT }, /* left */
72 { 0xe41f, KEY_RIGHT }, /* right */ 72 { 0x1f, KEY_RIGHT }, /* right */
73 { 0xe31e, KEY_OK }, /* OK */ 73 { 0x1e, KEY_OK }, /* OK */
74 74
75 { 0xfc37, KEY_SELECT }, /* ACQUIRE IMAGE */ 75 { 0x37, KEY_SELECT }, /* ACQUIRE IMAGE */
76 { 0xfd38, KEY_EDIT }, /* EDIT IMAGE */ 76 { 0x38, KEY_EDIT }, /* EDIT IMAGE */
77 77
78 { 0xe924, KEY_REWIND }, /* rewind (<<) */ 78 { 0x24, KEY_REWIND }, /* rewind (<<) */
79 { 0xea25, KEY_PLAY }, /* play ( >) */ 79 { 0x25, KEY_PLAY }, /* play ( >) */
80 { 0xeb26, KEY_FORWARD }, /* forward (>>) */ 80 { 0x26, KEY_FORWARD }, /* forward (>>) */
81 { 0xec27, KEY_RECORD }, /* record ( o) */ 81 { 0x27, KEY_RECORD }, /* record ( o) */
82 { 0xed28, KEY_STOP }, /* stop ([]) */ 82 { 0x28, KEY_STOP }, /* stop ([]) */
83 { 0xee29, KEY_PAUSE }, /* pause ('') */ 83 { 0x29, KEY_PAUSE }, /* pause ('') */
84 84
85 { 0xe621, KEY_PREVIOUS }, /* prev */ 85 { 0x21, KEY_PREVIOUS }, /* prev */
86 { 0xfe39, KEY_SWITCHVIDEOMODE }, /* F SCR */ 86 { 0x39, KEY_SWITCHVIDEOMODE }, /* F SCR */
87 { 0xe823, KEY_NEXT }, /* next */ 87 { 0x23, KEY_NEXT }, /* next */
88 { 0xde19, KEY_MENU }, /* MENU */ 88 { 0x19, KEY_MENU }, /* MENU */
89 { 0xff3a, KEY_LANGUAGE }, /* AUDIO */ 89 { 0x3a, KEY_LANGUAGE }, /* AUDIO */
90 90
91 { 0xc702, KEY_POWER }, /* POWER */ 91 { 0x02, KEY_POWER }, /* POWER */
92}; 92};
93 93
94static struct rc_map_list medion_x10_map = { 94static struct rc_map_list medion_x10_map = {
diff --git a/drivers/media/rc/keymaps/rc-snapstream-firefly.c b/drivers/media/rc/keymaps/rc-snapstream-firefly.c
index ef146520931c..c7f33ec719b4 100644
--- a/drivers/media/rc/keymaps/rc-snapstream-firefly.c
+++ b/drivers/media/rc/keymaps/rc-snapstream-firefly.c
@@ -22,63 +22,63 @@
22#include <media/rc-map.h> 22#include <media/rc-map.h>
23 23
24static struct rc_map_table snapstream_firefly[] = { 24static struct rc_map_table snapstream_firefly[] = {
25 { 0xf12c, KEY_ZOOM }, /* Maximize */ 25 { 0x2c, KEY_ZOOM }, /* Maximize */
26 { 0xc702, KEY_CLOSE }, 26 { 0x02, KEY_CLOSE },
27 27
28 { 0xd20d, KEY_1 }, 28 { 0x0d, KEY_1 },
29 { 0xd30e, KEY_2 }, 29 { 0x0e, KEY_2 },
30 { 0xd40f, KEY_3 }, 30 { 0x0f, KEY_3 },
31 { 0xd510, KEY_4 }, 31 { 0x10, KEY_4 },
32 { 0xd611, KEY_5 }, 32 { 0x11, KEY_5 },
33 { 0xd712, KEY_6 }, 33 { 0x12, KEY_6 },
34 { 0xd813, KEY_7 }, 34 { 0x13, KEY_7 },
35 { 0xd914, KEY_8 }, 35 { 0x14, KEY_8 },
36 { 0xda15, KEY_9 }, 36 { 0x15, KEY_9 },
37 { 0xdc17, KEY_0 }, 37 { 0x17, KEY_0 },
38 { 0xdb16, KEY_BACK }, 38 { 0x16, KEY_BACK },
39 { 0xdd18, KEY_KPENTER }, /* ent */ 39 { 0x18, KEY_KPENTER }, /* ent */
40 40
41 { 0xce09, KEY_VOLUMEUP }, 41 { 0x09, KEY_VOLUMEUP },
42 { 0xcd08, KEY_VOLUMEDOWN }, 42 { 0x08, KEY_VOLUMEDOWN },
43 { 0xcf0a, KEY_MUTE }, 43 { 0x0a, KEY_MUTE },
44 { 0xd00b, KEY_CHANNELUP }, 44 { 0x0b, KEY_CHANNELUP },
45 { 0xd10c, KEY_CHANNELDOWN }, 45 { 0x0c, KEY_CHANNELDOWN },
46 { 0xc500, KEY_VENDOR }, /* firefly */ 46 { 0x00, KEY_VENDOR }, /* firefly */
47 47
48 { 0xf32e, KEY_INFO }, 48 { 0x2e, KEY_INFO },
49 { 0xf42f, KEY_OPTION }, 49 { 0x2f, KEY_OPTION },
50 50
51 { 0xe21d, KEY_LEFT }, 51 { 0x1d, KEY_LEFT },
52 { 0xe41f, KEY_RIGHT }, 52 { 0x1f, KEY_RIGHT },
53 { 0xe722, KEY_DOWN }, 53 { 0x22, KEY_DOWN },
54 { 0xdf1a, KEY_UP }, 54 { 0x1a, KEY_UP },
55 { 0xe31e, KEY_OK }, 55 { 0x1e, KEY_OK },
56 56
57 { 0xe11c, KEY_MENU }, 57 { 0x1c, KEY_MENU },
58 { 0xe520, KEY_EXIT }, 58 { 0x20, KEY_EXIT },
59 59
60 { 0xec27, KEY_RECORD }, 60 { 0x27, KEY_RECORD },
61 { 0xea25, KEY_PLAY }, 61 { 0x25, KEY_PLAY },
62 { 0xed28, KEY_STOP }, 62 { 0x28, KEY_STOP },
63 { 0xe924, KEY_REWIND }, 63 { 0x24, KEY_REWIND },
64 { 0xeb26, KEY_FORWARD }, 64 { 0x26, KEY_FORWARD },
65 { 0xee29, KEY_PAUSE }, 65 { 0x29, KEY_PAUSE },
66 { 0xf02b, KEY_PREVIOUS }, 66 { 0x2b, KEY_PREVIOUS },
67 { 0xef2a, KEY_NEXT }, 67 { 0x2a, KEY_NEXT },
68 68
69 { 0xcb06, KEY_AUDIO }, /* Music */ 69 { 0x06, KEY_AUDIO }, /* Music */
70 { 0xca05, KEY_IMAGES }, /* Photos */ 70 { 0x05, KEY_IMAGES }, /* Photos */
71 { 0xc904, KEY_DVD }, 71 { 0x04, KEY_DVD },
72 { 0xc803, KEY_TV }, 72 { 0x03, KEY_TV },
73 { 0xcc07, KEY_VIDEO }, 73 { 0x07, KEY_VIDEO },
74 74
75 { 0xc601, KEY_HELP }, 75 { 0x01, KEY_HELP },
76 { 0xf22d, KEY_MODE }, /* Mouse */ 76 { 0x2d, KEY_MODE }, /* Mouse */
77 77
78 { 0xde19, KEY_A }, 78 { 0x19, KEY_A },
79 { 0xe01b, KEY_B }, 79 { 0x1b, KEY_B },
80 { 0xe621, KEY_C }, 80 { 0x21, KEY_C },
81 { 0xe823, KEY_D }, 81 { 0x23, KEY_D },
82}; 82};
83 83
84static struct rc_map_list snapstream_firefly_map = { 84static struct rc_map_list snapstream_firefly_map = {
diff --git a/drivers/media/video/au0828/au0828-cards.c b/drivers/media/video/au0828/au0828-cards.c
index 39fc923fc46b..1c6015a04f96 100644
--- a/drivers/media/video/au0828/au0828-cards.c
+++ b/drivers/media/video/au0828/au0828-cards.c
@@ -162,11 +162,14 @@ static void hauppauge_eeprom(struct au0828_dev *dev, u8 *eeprom_data)
162 switch (tv.model) { 162 switch (tv.model) {
163 case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */ 163 case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */
164 case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ 164 case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */
165 case 72101: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */
166 case 72201: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */
165 case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ 167 case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */
166 case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ 168 case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */
167 case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ 169 case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */
168 case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and analog video */ 170 case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and analog video */
169 case 72251: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ 171 case 72251: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */
172 case 72261: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */
170 case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and analog video */ 173 case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and analog video */
171 case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ 174 case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */
172 break; 175 break;
@@ -324,6 +327,10 @@ struct usb_device_id au0828_usb_id_table[] = {
324 .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL }, 327 .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL },
325 { USB_DEVICE(0x2040, 0x8200), 328 { USB_DEVICE(0x2040, 0x8200),
326 .driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY }, 329 .driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY },
330 { USB_DEVICE(0x2040, 0x7260),
331 .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q },
332 { USB_DEVICE(0x2040, 0x7213),
333 .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q },
327 { }, 334 { },
328}; 335};
329 336
diff --git a/drivers/media/video/davinci/vpif.h b/drivers/media/video/davinci/vpif.h
index 10550bd93b06..25036cb11bea 100644
--- a/drivers/media/video/davinci/vpif.h
+++ b/drivers/media/video/davinci/vpif.h
@@ -20,6 +20,7 @@
20#include <linux/videodev2.h> 20#include <linux/videodev2.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/dm646x.h> 22#include <mach/dm646x.h>
23#include <media/davinci/vpif_types.h>
23 24
24/* Maximum channel allowed */ 25/* Maximum channel allowed */
25#define VPIF_NUM_CHANNELS (4) 26#define VPIF_NUM_CHANNELS (4)
diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h
index 064550f5ce4a..a693d4ebda55 100644
--- a/drivers/media/video/davinci/vpif_capture.h
+++ b/drivers/media/video/davinci/vpif_capture.h
@@ -27,7 +27,7 @@
27#include <media/v4l2-device.h> 27#include <media/v4l2-device.h>
28#include <media/videobuf-core.h> 28#include <media/videobuf-core.h>
29#include <media/videobuf-dma-contig.h> 29#include <media/videobuf-dma-contig.h>
30#include <mach/dm646x.h> 30#include <media/davinci/vpif_types.h>
31 31
32#include "vpif.h" 32#include "vpif.h"
33 33
diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h
index 5d1936dafed2..56879d1a0684 100644
--- a/drivers/media/video/davinci/vpif_display.h
+++ b/drivers/media/video/davinci/vpif_display.h
@@ -22,6 +22,7 @@
22#include <media/v4l2-device.h> 22#include <media/v4l2-device.h>
23#include <media/videobuf-core.h> 23#include <media/videobuf-core.h>
24#include <media/videobuf-dma-contig.h> 24#include <media/videobuf-dma-contig.h>
25#include <media/davinci/vpif_types.h>
25 26
26#include "vpif.h" 27#include "vpif.h"
27 28
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 881e04c7ffe6..2ca10dfec91f 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -838,13 +838,13 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
838 gspca_dev->usb_err = 0; 838 gspca_dev->usb_err = 0;
839 839
840 /* do the specific subdriver stuff before endpoint selection */ 840 /* do the specific subdriver stuff before endpoint selection */
841 gspca_dev->alt = 0; 841 intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
842 gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0;
842 if (gspca_dev->sd_desc->isoc_init) { 843 if (gspca_dev->sd_desc->isoc_init) {
843 ret = gspca_dev->sd_desc->isoc_init(gspca_dev); 844 ret = gspca_dev->sd_desc->isoc_init(gspca_dev);
844 if (ret < 0) 845 if (ret < 0)
845 goto unlock; 846 goto unlock;
846 } 847 }
847 intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
848 xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK 848 xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
849 : USB_ENDPOINT_XFER_ISOC; 849 : USB_ENDPOINT_XFER_ISOC;
850 850
@@ -957,7 +957,7 @@ retry:
957 ret = -EIO; 957 ret = -EIO;
958 goto out; 958 goto out;
959 } 959 }
960 alt = ep_tb[--alt_idx].alt; 960 gspca_dev->alt = ep_tb[--alt_idx].alt;
961 } 961 }
962 } 962 }
963out: 963out:
diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h
index 89d09a8914f8..82c8817bd32d 100644
--- a/drivers/media/video/m5mols/m5mols.h
+++ b/drivers/media/video/m5mols/m5mols.h
@@ -162,7 +162,6 @@ struct m5mols_version {
162 * @pad: media pad 162 * @pad: media pad
163 * @ffmt: current fmt according to resolution type 163 * @ffmt: current fmt according to resolution type
164 * @res_type: current resolution type 164 * @res_type: current resolution type
165 * @code: current code
166 * @irq_waitq: waitqueue for the capture 165 * @irq_waitq: waitqueue for the capture
167 * @work_irq: workqueue for the IRQ 166 * @work_irq: workqueue for the IRQ
168 * @flags: state variable for the interrupt handler 167 * @flags: state variable for the interrupt handler
@@ -192,7 +191,6 @@ struct m5mols_info {
192 struct media_pad pad; 191 struct media_pad pad;
193 struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX]; 192 struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX];
194 int res_type; 193 int res_type;
195 enum v4l2_mbus_pixelcode code;
196 wait_queue_head_t irq_waitq; 194 wait_queue_head_t irq_waitq;
197 struct work_struct work_irq; 195 struct work_struct work_irq;
198 unsigned long flags; 196 unsigned long flags;
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c
index 05ab3700647e..e0f09e531800 100644
--- a/drivers/media/video/m5mols/m5mols_core.c
+++ b/drivers/media/video/m5mols/m5mols_core.c
@@ -334,7 +334,7 @@ int m5mols_mode(struct m5mols_info *info, u8 mode)
334 int ret = -EINVAL; 334 int ret = -EINVAL;
335 u8 reg; 335 u8 reg;
336 336
337 if (mode < REG_PARAMETER && mode > REG_CAPTURE) 337 if (mode < REG_PARAMETER || mode > REG_CAPTURE)
338 return ret; 338 return ret;
339 339
340 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg); 340 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg);
@@ -511,9 +511,6 @@ static int m5mols_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
511 struct m5mols_info *info = to_m5mols(sd); 511 struct m5mols_info *info = to_m5mols(sd);
512 struct v4l2_mbus_framefmt *format; 512 struct v4l2_mbus_framefmt *format;
513 513
514 if (fmt->pad != 0)
515 return -EINVAL;
516
517 format = __find_format(info, fh, fmt->which, info->res_type); 514 format = __find_format(info, fh, fmt->which, info->res_type);
518 if (!format) 515 if (!format)
519 return -EINVAL; 516 return -EINVAL;
@@ -532,9 +529,6 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
532 u32 resolution = 0; 529 u32 resolution = 0;
533 int ret; 530 int ret;
534 531
535 if (fmt->pad != 0)
536 return -EINVAL;
537
538 ret = __find_resolution(sd, format, &type, &resolution); 532 ret = __find_resolution(sd, format, &type, &resolution);
539 if (ret < 0) 533 if (ret < 0)
540 return ret; 534 return ret;
@@ -543,13 +537,14 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
543 if (!sfmt) 537 if (!sfmt)
544 return 0; 538 return 0;
545 539
546 *sfmt = m5mols_default_ffmt[type]; 540
547 sfmt->width = format->width; 541 format->code = m5mols_default_ffmt[type].code;
548 sfmt->height = format->height; 542 format->colorspace = V4L2_COLORSPACE_JPEG;
543 format->field = V4L2_FIELD_NONE;
549 544
550 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 545 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
546 *sfmt = *format;
551 info->resolution = resolution; 547 info->resolution = resolution;
552 info->code = format->code;
553 info->res_type = type; 548 info->res_type = type;
554 } 549 }
555 550
@@ -626,13 +621,14 @@ static int m5mols_start_monitor(struct m5mols_info *info)
626static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) 621static int m5mols_s_stream(struct v4l2_subdev *sd, int enable)
627{ 622{
628 struct m5mols_info *info = to_m5mols(sd); 623 struct m5mols_info *info = to_m5mols(sd);
624 u32 code = info->ffmt[info->res_type].code;
629 625
630 if (enable) { 626 if (enable) {
631 int ret = -EINVAL; 627 int ret = -EINVAL;
632 628
633 if (is_code(info->code, M5MOLS_RESTYPE_MONITOR)) 629 if (is_code(code, M5MOLS_RESTYPE_MONITOR))
634 ret = m5mols_start_monitor(info); 630 ret = m5mols_start_monitor(info);
635 if (is_code(info->code, M5MOLS_RESTYPE_CAPTURE)) 631 if (is_code(code, M5MOLS_RESTYPE_CAPTURE))
636 ret = m5mols_start_capture(info); 632 ret = m5mols_start_capture(info);
637 633
638 return ret; 634 return ret;
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c
index cf2c0fb95f2f..398f96ffd35e 100644
--- a/drivers/media/video/mt9m111.c
+++ b/drivers/media/video/mt9m111.c
@@ -955,6 +955,7 @@ static int mt9m111_probe(struct i2c_client *client,
955 mt9m111->rect.height = MT9M111_MAX_HEIGHT; 955 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
956 mt9m111->fmt = &mt9m111_colour_fmts[0]; 956 mt9m111->fmt = &mt9m111_colour_fmts[0];
957 mt9m111->lastpage = -1; 957 mt9m111->lastpage = -1;
958 mutex_init(&mt9m111->power_lock);
958 959
959 ret = mt9m111_video_probe(client); 960 ret = mt9m111_video_probe(client);
960 if (ret) { 961 if (ret) {
diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c
index 32114a3c0ca7..7b34b11daf24 100644
--- a/drivers/media/video/mt9t112.c
+++ b/drivers/media/video/mt9t112.c
@@ -1083,8 +1083,10 @@ static int mt9t112_probe(struct i2c_client *client,
1083 v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); 1083 v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops);
1084 1084
1085 ret = mt9t112_camera_probe(client); 1085 ret = mt9t112_camera_probe(client);
1086 if (ret) 1086 if (ret) {
1087 kfree(priv); 1087 kfree(priv);
1088 return ret;
1089 }
1088 1090
1089 /* Cannot fail: using the default supported pixel code */ 1091 /* Cannot fail: using the default supported pixel code */
1090 mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8); 1092 mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8);
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c
index 9c5c19f142de..ee0d0b39cd17 100644
--- a/drivers/media/video/omap/omap_vout.c
+++ b/drivers/media/video/omap/omap_vout.c
@@ -38,6 +38,7 @@
38#include <linux/irq.h> 38#include <linux/irq.h>
39#include <linux/videodev2.h> 39#include <linux/videodev2.h>
40#include <linux/dma-mapping.h> 40#include <linux/dma-mapping.h>
41#include <linux/slab.h>
41 42
42#include <media/videobuf-dma-contig.h> 43#include <media/videobuf-dma-contig.h>
43#include <media/v4l2-device.h> 44#include <media/v4l2-device.h>
@@ -2169,6 +2170,14 @@ static int __init omap_vout_probe(struct platform_device *pdev)
2169 vid_dev->num_displays = 0; 2170 vid_dev->num_displays = 0;
2170 for_each_dss_dev(dssdev) { 2171 for_each_dss_dev(dssdev) {
2171 omap_dss_get_device(dssdev); 2172 omap_dss_get_device(dssdev);
2173
2174 if (!dssdev->driver) {
2175 dev_warn(&pdev->dev, "no driver for display: %s\n",
2176 dssdev->name);
2177 omap_dss_put_device(dssdev);
2178 continue;
2179 }
2180
2172 vid_dev->displays[vid_dev->num_displays++] = dssdev; 2181 vid_dev->displays[vid_dev->num_displays++] = dssdev;
2173 } 2182 }
2174 2183
diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c
index e87ae2f634b2..6a6cf388bae4 100644
--- a/drivers/media/video/omap1_camera.c
+++ b/drivers/media/video/omap1_camera.c
@@ -24,6 +24,7 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/module.h>
27#include <linux/platform_device.h> 28#include <linux/platform_device.h>
28#include <linux/slab.h> 29#include <linux/slab.h>
29 30
diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c
index 1d54b86c936b..3ea38a8def8e 100644
--- a/drivers/media/video/omap24xxcam-dma.c
+++ b/drivers/media/video/omap24xxcam-dma.c
@@ -506,7 +506,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma,
506 unsigned long flags; 506 unsigned long flags;
507 struct sgdma_state *sg_state; 507 struct sgdma_state *sg_state;
508 508
509 if ((sglen < 0) || ((sglen > 0) & !sglist)) 509 if ((sglen < 0) || ((sglen > 0) && !sglist))
510 return -EINVAL; 510 return -EINVAL;
511 511
512 spin_lock_irqsave(&sgdma->lock, flags); 512 spin_lock_irqsave(&sgdma->lock, flags);
diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c
index b0b0fa5a3572..54a4a3f22e2e 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -1408,7 +1408,7 @@ static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1408{ 1408{
1409 struct isp_pipeline *pipe = 1409 struct isp_pipeline *pipe =
1410 to_isp_pipeline(&ccdc->video_out.video.entity); 1410 to_isp_pipeline(&ccdc->video_out.video.entity);
1411 struct video_device *vdev = &ccdc->subdev.devnode; 1411 struct video_device *vdev = ccdc->subdev.devnode;
1412 struct v4l2_event event; 1412 struct v4l2_event event;
1413 1413
1414 memset(&event, 0, sizeof(event)); 1414 memset(&event, 0, sizeof(event));
diff --git a/drivers/media/video/omap3isp/ispstat.c b/drivers/media/video/omap3isp/ispstat.c
index 68d539456c55..bc0b2c7349b9 100644
--- a/drivers/media/video/omap3isp/ispstat.c
+++ b/drivers/media/video/omap3isp/ispstat.c
@@ -496,7 +496,7 @@ static int isp_stat_bufs_alloc(struct ispstat *stat, u32 size)
496 496
497static void isp_stat_queue_event(struct ispstat *stat, int err) 497static void isp_stat_queue_event(struct ispstat *stat, int err)
498{ 498{
499 struct video_device *vdev = &stat->subdev.devnode; 499 struct video_device *vdev = stat->subdev.devnode;
500 struct v4l2_event event; 500 struct v4l2_event event;
501 struct omap3isp_stat_event_status *status = (void *)event.u.data; 501 struct omap3isp_stat_event_status *status = (void *)event.u.data;
502 502
diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c
index d1000723c5ae..f2290578448c 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -26,6 +26,7 @@
26#include <asm/cacheflush.h> 26#include <asm/cacheflush.h>
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/mm.h> 28#include <linux/mm.h>
29#include <linux/module.h>
29#include <linux/pagemap.h> 30#include <linux/pagemap.h>
30#include <linux/scatterlist.h> 31#include <linux/scatterlist.h>
31#include <linux/sched.h> 32#include <linux/sched.h>
diff --git a/drivers/media/video/ov6650.c b/drivers/media/video/ov6650.c
index 9f2d26b1d4cb..6806345ec2f0 100644
--- a/drivers/media/video/ov6650.c
+++ b/drivers/media/video/ov6650.c
@@ -540,7 +540,7 @@ static u8 to_clkrc(struct v4l2_fract *timeperframe,
540static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf) 540static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
541{ 541{
542 struct i2c_client *client = v4l2_get_subdevdata(sd); 542 struct i2c_client *client = v4l2_get_subdevdata(sd);
543 struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; 543 struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd);
544 struct soc_camera_sense *sense = icd->sense; 544 struct soc_camera_sense *sense = icd->sense;
545 struct ov6650 *priv = to_ov6650(client); 545 struct ov6650 *priv = to_ov6650(client);
546 bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect); 546 bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect);
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c
index c8d91b0cd9bd..2cc3b9166724 100644
--- a/drivers/media/video/s5p-fimc/fimc-capture.c
+++ b/drivers/media/video/s5p-fimc/fimc-capture.c
@@ -98,6 +98,10 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
98 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); 98 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
99 } 99 }
100 set_bit(ST_CAPT_SUSPENDED, &fimc->state); 100 set_bit(ST_CAPT_SUSPENDED, &fimc->state);
101
102 fimc_hw_reset(fimc);
103 cap->buf_index = 0;
104
101 spin_unlock_irqrestore(&fimc->slock, flags); 105 spin_unlock_irqrestore(&fimc->slock, flags);
102 106
103 if (streaming) 107 if (streaming)
@@ -137,7 +141,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx)
137 struct fimc_dev *fimc = ctx->fimc_dev; 141 struct fimc_dev *fimc = ctx->fimc_dev;
138 int ret; 142 int ret;
139 143
140 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) 144 if (!test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
141 return 0; 145 return 0;
142 146
143 spin_lock(&ctx->slock); 147 spin_lock(&ctx->slock);
@@ -150,7 +154,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx)
150 fimc_hw_set_rotation(ctx); 154 fimc_hw_set_rotation(ctx);
151 fimc_prepare_dma_offset(ctx, &ctx->d_frame); 155 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
152 fimc_hw_set_out_dma(ctx); 156 fimc_hw_set_out_dma(ctx);
153 set_bit(ST_CAPT_APPLY_CFG, &fimc->state); 157 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
154 } 158 }
155 spin_unlock(&ctx->slock); 159 spin_unlock(&ctx->slock);
156 return ret; 160 return ret;
@@ -164,7 +168,6 @@ static int start_streaming(struct vb2_queue *q, unsigned int count)
164 int min_bufs; 168 int min_bufs;
165 int ret; 169 int ret;
166 170
167 fimc_hw_reset(fimc);
168 vid_cap->frame_count = 0; 171 vid_cap->frame_count = 0;
169 172
170 ret = fimc_init_capture(fimc); 173 ret = fimc_init_capture(fimc);
@@ -523,7 +526,7 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
523 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; 526 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
524 min_w = ctx->state & FIMC_DST_CROP ? dst->width : var->min_out_pixsize; 527 min_w = ctx->state & FIMC_DST_CROP ? dst->width : var->min_out_pixsize;
525 min_h = ctx->state & FIMC_DST_CROP ? dst->height : var->min_out_pixsize; 528 min_h = ctx->state & FIMC_DST_CROP ? dst->height : var->min_out_pixsize;
526 if (fimc->id == 1 && var->pix_hoff) 529 if (var->min_vsize_align == 1 && !rotation)
527 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; 530 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
528 531
529 depth = fimc_get_format_depth(ffmt); 532 depth = fimc_get_format_depth(ffmt);
@@ -1239,6 +1242,7 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1239 1242
1240 mutex_lock(&fimc->lock); 1243 mutex_lock(&fimc->lock);
1241 set_frame_bounds(ff, mf->width, mf->height); 1244 set_frame_bounds(ff, mf->width, mf->height);
1245 fimc->vid_cap.mf = *mf;
1242 ff->fmt = ffmt; 1246 ff->fmt = ffmt;
1243 1247
1244 /* Reset the crop rectangle if required. */ 1248 /* Reset the crop rectangle if required. */
@@ -1375,7 +1379,7 @@ static void fimc_destroy_capture_subdev(struct fimc_dev *fimc)
1375 media_entity_cleanup(&sd->entity); 1379 media_entity_cleanup(&sd->entity);
1376 v4l2_device_unregister_subdev(sd); 1380 v4l2_device_unregister_subdev(sd);
1377 kfree(sd); 1381 kfree(sd);
1378 sd = NULL; 1382 fimc->vid_cap.subdev = NULL;
1379} 1383}
1380 1384
1381/* Set default format at the sensor and host interface */ 1385/* Set default format at the sensor and host interface */
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c
index 19ca6db38b2f..07c6254faee3 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.c
+++ b/drivers/media/video/s5p-fimc/fimc-core.c
@@ -37,7 +37,7 @@ static char *fimc_clocks[MAX_FIMC_CLOCKS] = {
37static struct fimc_fmt fimc_formats[] = { 37static struct fimc_fmt fimc_formats[] = {
38 { 38 {
39 .name = "RGB565", 39 .name = "RGB565",
40 .fourcc = V4L2_PIX_FMT_RGB565X, 40 .fourcc = V4L2_PIX_FMT_RGB565,
41 .depth = { 16 }, 41 .depth = { 16 },
42 .color = S5P_FIMC_RGB565, 42 .color = S5P_FIMC_RGB565,
43 .memplanes = 1, 43 .memplanes = 1,
@@ -1038,12 +1038,11 @@ static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)
1038 mod_x = 6; /* 64 x 32 pixels tile */ 1038 mod_x = 6; /* 64 x 32 pixels tile */
1039 mod_y = 5; 1039 mod_y = 5;
1040 } else { 1040 } else {
1041 if (fimc->id == 1 && variant->pix_hoff) 1041 if (variant->min_vsize_align == 1)
1042 mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1; 1042 mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1;
1043 else 1043 else
1044 mod_y = mod_x; 1044 mod_y = ffs(variant->min_vsize_align) - 1;
1045 } 1045 }
1046 dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x, mod_y, max_w);
1047 1046
1048 v4l_bound_align_image(&pix->width, 16, max_w, mod_x, 1047 v4l_bound_align_image(&pix->width, 16, max_w, mod_x,
1049 &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0); 1048 &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0);
@@ -1226,10 +1225,10 @@ static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr)
1226 fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize; 1225 fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize;
1227 1226
1228 /* Get pixel alignment constraints. */ 1227 /* Get pixel alignment constraints. */
1229 if (fimc->id == 1 && fimc->variant->pix_hoff) 1228 if (fimc->variant->min_vsize_align == 1)
1230 halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1; 1229 halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1;
1231 else 1230 else
1232 halign = ffs(min_size) - 1; 1231 halign = ffs(fimc->variant->min_vsize_align) - 1;
1233 1232
1234 for (i = 0; i < f->fmt->colplanes; i++) 1233 for (i = 0; i < f->fmt->colplanes; i++)
1235 depth += f->fmt->depth[i]; 1234 depth += f->fmt->depth[i];
@@ -1615,7 +1614,6 @@ static int fimc_probe(struct platform_device *pdev)
1615 pdata = pdev->dev.platform_data; 1614 pdata = pdev->dev.platform_data;
1616 fimc->pdata = pdata; 1615 fimc->pdata = pdata;
1617 1616
1618 set_bit(ST_LPM, &fimc->state);
1619 1617
1620 init_waitqueue_head(&fimc->irq_queue); 1618 init_waitqueue_head(&fimc->irq_queue);
1621 spin_lock_init(&fimc->slock); 1619 spin_lock_init(&fimc->slock);
@@ -1707,8 +1705,6 @@ static int fimc_runtime_resume(struct device *dev)
1707 /* Enable clocks and perform basic initalization */ 1705 /* Enable clocks and perform basic initalization */
1708 clk_enable(fimc->clock[CLK_GATE]); 1706 clk_enable(fimc->clock[CLK_GATE]);
1709 fimc_hw_reset(fimc); 1707 fimc_hw_reset(fimc);
1710 if (fimc->variant->out_buf_count > 4)
1711 fimc_hw_set_dma_seq(fimc, 0xF);
1712 1708
1713 /* Resume the capture or mem-to-mem device */ 1709 /* Resume the capture or mem-to-mem device */
1714 if (fimc_capture_busy(fimc)) 1710 if (fimc_capture_busy(fimc))
@@ -1750,8 +1746,6 @@ static int fimc_resume(struct device *dev)
1750 return 0; 1746 return 0;
1751 } 1747 }
1752 fimc_hw_reset(fimc); 1748 fimc_hw_reset(fimc);
1753 if (fimc->variant->out_buf_count > 4)
1754 fimc_hw_set_dma_seq(fimc, 0xF);
1755 spin_unlock_irqrestore(&fimc->slock, flags); 1749 spin_unlock_irqrestore(&fimc->slock, flags);
1756 1750
1757 if (fimc_capture_busy(fimc)) 1751 if (fimc_capture_busy(fimc))
@@ -1780,7 +1774,6 @@ static int __devexit fimc_remove(struct platform_device *pdev)
1780 struct fimc_dev *fimc = platform_get_drvdata(pdev); 1774 struct fimc_dev *fimc = platform_get_drvdata(pdev);
1781 1775
1782 pm_runtime_disable(&pdev->dev); 1776 pm_runtime_disable(&pdev->dev);
1783 fimc_runtime_suspend(&pdev->dev);
1784 pm_runtime_set_suspended(&pdev->dev); 1777 pm_runtime_set_suspended(&pdev->dev);
1785 1778
1786 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); 1779 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
@@ -1840,6 +1833,7 @@ static struct samsung_fimc_variant fimc0_variant_s5p = {
1840 .min_inp_pixsize = 16, 1833 .min_inp_pixsize = 16,
1841 .min_out_pixsize = 16, 1834 .min_out_pixsize = 16,
1842 .hor_offs_align = 8, 1835 .hor_offs_align = 8,
1836 .min_vsize_align = 16,
1843 .out_buf_count = 4, 1837 .out_buf_count = 4,
1844 .pix_limit = &s5p_pix_limit[0], 1838 .pix_limit = &s5p_pix_limit[0],
1845}; 1839};
@@ -1849,6 +1843,7 @@ static struct samsung_fimc_variant fimc2_variant_s5p = {
1849 .min_inp_pixsize = 16, 1843 .min_inp_pixsize = 16,
1850 .min_out_pixsize = 16, 1844 .min_out_pixsize = 16,
1851 .hor_offs_align = 8, 1845 .hor_offs_align = 8,
1846 .min_vsize_align = 16,
1852 .out_buf_count = 4, 1847 .out_buf_count = 4,
1853 .pix_limit = &s5p_pix_limit[1], 1848 .pix_limit = &s5p_pix_limit[1],
1854}; 1849};
@@ -1861,6 +1856,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv210 = {
1861 .min_inp_pixsize = 16, 1856 .min_inp_pixsize = 16,
1862 .min_out_pixsize = 16, 1857 .min_out_pixsize = 16,
1863 .hor_offs_align = 8, 1858 .hor_offs_align = 8,
1859 .min_vsize_align = 16,
1864 .out_buf_count = 4, 1860 .out_buf_count = 4,
1865 .pix_limit = &s5p_pix_limit[1], 1861 .pix_limit = &s5p_pix_limit[1],
1866}; 1862};
@@ -1874,6 +1870,7 @@ static struct samsung_fimc_variant fimc1_variant_s5pv210 = {
1874 .min_inp_pixsize = 16, 1870 .min_inp_pixsize = 16,
1875 .min_out_pixsize = 16, 1871 .min_out_pixsize = 16,
1876 .hor_offs_align = 1, 1872 .hor_offs_align = 1,
1873 .min_vsize_align = 1,
1877 .out_buf_count = 4, 1874 .out_buf_count = 4,
1878 .pix_limit = &s5p_pix_limit[2], 1875 .pix_limit = &s5p_pix_limit[2],
1879}; 1876};
@@ -1884,6 +1881,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = {
1884 .min_inp_pixsize = 16, 1881 .min_inp_pixsize = 16,
1885 .min_out_pixsize = 16, 1882 .min_out_pixsize = 16,
1886 .hor_offs_align = 8, 1883 .hor_offs_align = 8,
1884 .min_vsize_align = 16,
1887 .out_buf_count = 4, 1885 .out_buf_count = 4,
1888 .pix_limit = &s5p_pix_limit[2], 1886 .pix_limit = &s5p_pix_limit[2],
1889}; 1887};
@@ -1898,6 +1896,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = {
1898 .min_inp_pixsize = 16, 1896 .min_inp_pixsize = 16,
1899 .min_out_pixsize = 16, 1897 .min_out_pixsize = 16,
1900 .hor_offs_align = 2, 1898 .hor_offs_align = 2,
1899 .min_vsize_align = 1,
1901 .out_buf_count = 32, 1900 .out_buf_count = 32,
1902 .pix_limit = &s5p_pix_limit[1], 1901 .pix_limit = &s5p_pix_limit[1],
1903}; 1902};
@@ -1910,6 +1909,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = {
1910 .min_inp_pixsize = 16, 1909 .min_inp_pixsize = 16,
1911 .min_out_pixsize = 16, 1910 .min_out_pixsize = 16,
1912 .hor_offs_align = 2, 1911 .hor_offs_align = 2,
1912 .min_vsize_align = 1,
1913 .out_buf_count = 32, 1913 .out_buf_count = 32,
1914 .pix_limit = &s5p_pix_limit[3], 1914 .pix_limit = &s5p_pix_limit[3],
1915}; 1915};
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h
index a6936dad5b10..c7f01c47b20f 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.h
+++ b/drivers/media/video/s5p-fimc/fimc-core.h
@@ -377,6 +377,7 @@ struct fimc_pix_limit {
377 * @min_inp_pixsize: minimum input pixel size 377 * @min_inp_pixsize: minimum input pixel size
378 * @min_out_pixsize: minimum output pixel size 378 * @min_out_pixsize: minimum output pixel size
379 * @hor_offs_align: horizontal pixel offset aligment 379 * @hor_offs_align: horizontal pixel offset aligment
380 * @min_vsize_align: minimum vertical pixel size alignment
380 * @out_buf_count: the number of buffers in output DMA sequence 381 * @out_buf_count: the number of buffers in output DMA sequence
381 */ 382 */
382struct samsung_fimc_variant { 383struct samsung_fimc_variant {
@@ -390,6 +391,7 @@ struct samsung_fimc_variant {
390 u16 min_inp_pixsize; 391 u16 min_inp_pixsize;
391 u16 min_out_pixsize; 392 u16 min_out_pixsize;
392 u16 hor_offs_align; 393 u16 hor_offs_align;
394 u16 min_vsize_align;
393 u16 out_buf_count; 395 u16 out_buf_count;
394}; 396};
395 397
diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c
index cc337b1de913..615c862f0360 100644
--- a/drivers/media/video/s5p-fimc/fimc-mdevice.c
+++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c
@@ -220,6 +220,7 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
220 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter, 220 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
221 s_info->pdata->board_info, NULL); 221 s_info->pdata->board_info, NULL);
222 if (IS_ERR_OR_NULL(sd)) { 222 if (IS_ERR_OR_NULL(sd)) {
223 i2c_put_adapter(adapter);
223 v4l2_err(&fmd->v4l2_dev, "Failed to acquire subdev\n"); 224 v4l2_err(&fmd->v4l2_dev, "Failed to acquire subdev\n");
224 return NULL; 225 return NULL;
225 } 226 }
@@ -234,12 +235,15 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
234static void fimc_md_unregister_sensor(struct v4l2_subdev *sd) 235static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
235{ 236{
236 struct i2c_client *client = v4l2_get_subdevdata(sd); 237 struct i2c_client *client = v4l2_get_subdevdata(sd);
238 struct i2c_adapter *adapter;
237 239
238 if (!client) 240 if (!client)
239 return; 241 return;
240 v4l2_device_unregister_subdev(sd); 242 v4l2_device_unregister_subdev(sd);
243 adapter = client->adapter;
241 i2c_unregister_device(client); 244 i2c_unregister_device(client);
242 i2c_put_adapter(client->adapter); 245 if (adapter)
246 i2c_put_adapter(adapter);
243} 247}
244 248
245static int fimc_md_register_sensor_entities(struct fimc_md *fmd) 249static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
@@ -381,20 +385,28 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd)
381 385
382static int fimc_md_register_video_nodes(struct fimc_md *fmd) 386static int fimc_md_register_video_nodes(struct fimc_md *fmd)
383{ 387{
388 struct video_device *vdev;
384 int i, ret = 0; 389 int i, ret = 0;
385 390
386 for (i = 0; i < FIMC_MAX_DEVS && !ret; i++) { 391 for (i = 0; i < FIMC_MAX_DEVS && !ret; i++) {
387 if (!fmd->fimc[i]) 392 if (!fmd->fimc[i])
388 continue; 393 continue;
389 394
390 if (fmd->fimc[i]->m2m.vfd) 395 vdev = fmd->fimc[i]->m2m.vfd;
391 ret = video_register_device(fmd->fimc[i]->m2m.vfd, 396 if (vdev) {
392 VFL_TYPE_GRABBER, -1); 397 ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
393 if (ret) 398 if (ret)
394 break; 399 break;
395 if (fmd->fimc[i]->vid_cap.vfd) 400 v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n",
396 ret = video_register_device(fmd->fimc[i]->vid_cap.vfd, 401 vdev->name, video_device_node_name(vdev));
397 VFL_TYPE_GRABBER, -1); 402 }
403
404 vdev = fmd->fimc[i]->vid_cap.vfd;
405 if (vdev == NULL)
406 continue;
407 ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
408 v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n",
409 vdev->name, video_device_node_name(vdev));
398 } 410 }
399 411
400 return ret; 412 return ret;
@@ -502,7 +514,7 @@ static int fimc_md_create_links(struct fimc_md *fmd)
502 if (WARN(csis == NULL, 514 if (WARN(csis == NULL,
503 "MIPI-CSI interface specified " 515 "MIPI-CSI interface specified "
504 "but s5p-csis module is not loaded!\n")) 516 "but s5p-csis module is not loaded!\n"))
505 continue; 517 return -EINVAL;
506 518
507 ret = media_entity_create_link(&sensor->entity, 0, 519 ret = media_entity_create_link(&sensor->entity, 0,
508 &csis->entity, CSIS_PAD_SINK, 520 &csis->entity, CSIS_PAD_SINK,
@@ -742,9 +754,6 @@ static int __devinit fimc_md_probe(struct platform_device *pdev)
742 struct fimc_md *fmd; 754 struct fimc_md *fmd;
743 int ret; 755 int ret;
744 756
745 if (WARN(!pdev->dev.platform_data, "Platform data not specified!\n"))
746 return -EINVAL;
747
748 fmd = kzalloc(sizeof(struct fimc_md), GFP_KERNEL); 757 fmd = kzalloc(sizeof(struct fimc_md), GFP_KERNEL);
749 if (!fmd) 758 if (!fmd)
750 return -ENOMEM; 759 return -ENOMEM;
@@ -782,9 +791,11 @@ static int __devinit fimc_md_probe(struct platform_device *pdev)
782 if (ret) 791 if (ret)
783 goto err3; 792 goto err3;
784 793
785 ret = fimc_md_register_sensor_entities(fmd); 794 if (pdev->dev.platform_data) {
786 if (ret) 795 ret = fimc_md_register_sensor_entities(fmd);
787 goto err3; 796 if (ret)
797 goto err3;
798 }
788 ret = fimc_md_create_links(fmd); 799 ret = fimc_md_create_links(fmd);
789 if (ret) 800 if (ret)
790 goto err3; 801 goto err3;
diff --git a/drivers/media/video/s5p-fimc/fimc-reg.c b/drivers/media/video/s5p-fimc/fimc-reg.c
index 20e664e34163..44f5c2d1920b 100644
--- a/drivers/media/video/s5p-fimc/fimc-reg.c
+++ b/drivers/media/video/s5p-fimc/fimc-reg.c
@@ -35,6 +35,9 @@ void fimc_hw_reset(struct fimc_dev *dev)
35 cfg = readl(dev->regs + S5P_CIGCTRL); 35 cfg = readl(dev->regs + S5P_CIGCTRL);
36 cfg &= ~S5P_CIGCTRL_SWRST; 36 cfg &= ~S5P_CIGCTRL_SWRST;
37 writel(cfg, dev->regs + S5P_CIGCTRL); 37 writel(cfg, dev->regs + S5P_CIGCTRL);
38
39 if (dev->variant->out_buf_count > 4)
40 fimc_hw_set_dma_seq(dev, 0xF);
38} 41}
39 42
40static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) 43static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx)
@@ -251,7 +254,14 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx)
251 struct fimc_scaler *sc = &ctx->scaler; 254 struct fimc_scaler *sc = &ctx->scaler;
252 struct fimc_frame *src_frame = &ctx->s_frame; 255 struct fimc_frame *src_frame = &ctx->s_frame;
253 struct fimc_frame *dst_frame = &ctx->d_frame; 256 struct fimc_frame *dst_frame = &ctx->d_frame;
254 u32 cfg = 0; 257
258 u32 cfg = readl(dev->regs + S5P_CISCCTRL);
259
260 cfg &= ~(S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE |
261 S5P_CISCCTRL_SCALEUP_H | S5P_CISCCTRL_SCALEUP_V |
262 S5P_CISCCTRL_SCALERBYPASS | S5P_CISCCTRL_ONE2ONE |
263 S5P_CISCCTRL_INRGB_FMT_MASK | S5P_CISCCTRL_OUTRGB_FMT_MASK |
264 S5P_CISCCTRL_INTERLACE | S5P_CISCCTRL_RGB_EXT);
255 265
256 if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) 266 if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW))
257 cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE); 267 cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE);
@@ -308,9 +318,9 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx)
308 fimc_hw_set_scaler(ctx); 318 fimc_hw_set_scaler(ctx);
309 319
310 cfg = readl(dev->regs + S5P_CISCCTRL); 320 cfg = readl(dev->regs + S5P_CISCCTRL);
321 cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK);
311 322
312 if (variant->has_mainscaler_ext) { 323 if (variant->has_mainscaler_ext) {
313 cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK);
314 cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio); 324 cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio);
315 cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio); 325 cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio);
316 writel(cfg, dev->regs + S5P_CISCCTRL); 326 writel(cfg, dev->regs + S5P_CISCCTRL);
@@ -323,7 +333,6 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx)
323 cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio); 333 cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio);
324 writel(cfg, dev->regs + S5P_CIEXTEN); 334 writel(cfg, dev->regs + S5P_CIEXTEN);
325 } else { 335 } else {
326 cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK);
327 cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio); 336 cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio);
328 cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio); 337 cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio);
329 writel(cfg, dev->regs + S5P_CISCCTRL); 338 writel(cfg, dev->regs + S5P_CISCCTRL);
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c
index 1e8cdb77d4b8..dff9dc798795 100644
--- a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c
@@ -61,7 +61,7 @@ static struct s5p_mfc_fmt formats[] = {
61 .num_planes = 1, 61 .num_planes = 1,
62 }, 62 },
63 { 63 {
64 .name = "H264 Encoded Stream", 64 .name = "H263 Encoded Stream",
65 .fourcc = V4L2_PIX_FMT_H263, 65 .fourcc = V4L2_PIX_FMT_H263,
66 .codec_mode = S5P_FIMV_CODEC_H263_ENC, 66 .codec_mode = S5P_FIMV_CODEC_H263_ENC,
67 .type = MFC_FMT_ENC, 67 .type = MFC_FMT_ENC,
diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c
index e16d3a4bc1dc..b47d0c06ecf5 100644
--- a/drivers/media/video/s5p-tv/mixer_video.c
+++ b/drivers/media/video/s5p-tv/mixer_video.c
@@ -16,6 +16,7 @@
16#include <media/v4l2-ioctl.h> 16#include <media/v4l2-ioctl.h>
17#include <linux/videodev2.h> 17#include <linux/videodev2.h>
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/module.h>
19#include <linux/version.h> 20#include <linux/version.h>
20#include <linux/timer.h> 21#include <linux/timer.h>
21#include <media/videobuf2-dma-contig.h> 22#include <media/videobuf2-dma-contig.h>
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index f390682629cf..c51decfcae19 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -566,8 +566,10 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
566 ret = sh_mobile_ceu_soft_reset(pcdev); 566 ret = sh_mobile_ceu_soft_reset(pcdev);
567 567
568 csi2_sd = find_csi2(pcdev); 568 csi2_sd = find_csi2(pcdev);
569 if (csi2_sd) 569 if (csi2_sd) {
570 csi2_sd->grp_id = (long)icd; 570 csi2_sd->grp_id = soc_camera_grp_id(icd);
571 v4l2_set_subdev_hostdata(csi2_sd, icd);
572 }
571 573
572 ret = v4l2_subdev_call(csi2_sd, core, s_power, 1); 574 ret = v4l2_subdev_call(csi2_sd, core, s_power, 1);
573 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { 575 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) {
@@ -768,7 +770,7 @@ static struct v4l2_subdev *find_bus_subdev(struct sh_mobile_ceu_dev *pcdev,
768{ 770{
769 if (pcdev->csi2_pdev) { 771 if (pcdev->csi2_pdev) {
770 struct v4l2_subdev *csi2_sd = find_csi2(pcdev); 772 struct v4l2_subdev *csi2_sd = find_csi2(pcdev);
771 if (csi2_sd && csi2_sd->grp_id == (u32)icd) 773 if (csi2_sd && csi2_sd->grp_id == soc_camera_grp_id(icd))
772 return csi2_sd; 774 return csi2_sd;
773 } 775 }
774 776
@@ -1089,8 +1091,9 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int
1089 /* Try 2560x1920, 1280x960, 640x480, 320x240 */ 1091 /* Try 2560x1920, 1280x960, 640x480, 320x240 */
1090 mf.width = 2560 >> shift; 1092 mf.width = 2560 >> shift;
1091 mf.height = 1920 >> shift; 1093 mf.height = 1920 >> shift;
1092 ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, 1094 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1093 s_mbus_fmt, &mf); 1095 soc_camera_grp_id(icd), video,
1096 s_mbus_fmt, &mf);
1094 if (ret < 0) 1097 if (ret < 0)
1095 return ret; 1098 return ret;
1096 shift++; 1099 shift++;
@@ -1389,7 +1392,8 @@ static int client_s_fmt(struct soc_camera_device *icd,
1389 bool ceu_1to1; 1392 bool ceu_1to1;
1390 int ret; 1393 int ret;
1391 1394
1392 ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, 1395 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1396 soc_camera_grp_id(icd), video,
1393 s_mbus_fmt, mf); 1397 s_mbus_fmt, mf);
1394 if (ret < 0) 1398 if (ret < 0)
1395 return ret; 1399 return ret;
@@ -1426,8 +1430,9 @@ static int client_s_fmt(struct soc_camera_device *icd,
1426 tmp_h = min(2 * tmp_h, max_height); 1430 tmp_h = min(2 * tmp_h, max_height);
1427 mf->width = tmp_w; 1431 mf->width = tmp_w;
1428 mf->height = tmp_h; 1432 mf->height = tmp_h;
1429 ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, 1433 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1430 s_mbus_fmt, mf); 1434 soc_camera_grp_id(icd), video,
1435 s_mbus_fmt, mf);
1431 dev_geo(dev, "Camera scaled to %ux%u\n", 1436 dev_geo(dev, "Camera scaled to %ux%u\n",
1432 mf->width, mf->height); 1437 mf->width, mf->height);
1433 if (ret < 0) { 1438 if (ret < 0) {
@@ -1580,8 +1585,9 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
1580 } 1585 }
1581 1586
1582 if (interm_width < icd->user_width || interm_height < icd->user_height) { 1587 if (interm_width < icd->user_width || interm_height < icd->user_height) {
1583 ret = v4l2_device_call_until_err(sd->v4l2_dev, (int)icd, video, 1588 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1584 s_mbus_fmt, &mf); 1589 soc_camera_grp_id(icd), video,
1590 s_mbus_fmt, &mf);
1585 if (ret < 0) 1591 if (ret < 0)
1586 return ret; 1592 return ret;
1587 1593
@@ -1867,7 +1873,8 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
1867 mf.code = xlate->code; 1873 mf.code = xlate->code;
1868 mf.colorspace = pix->colorspace; 1874 mf.colorspace = pix->colorspace;
1869 1875
1870 ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, try_mbus_fmt, &mf); 1876 ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd),
1877 video, try_mbus_fmt, &mf);
1871 if (ret < 0) 1878 if (ret < 0)
1872 return ret; 1879 return ret;
1873 1880
@@ -1891,8 +1898,9 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
1891 */ 1898 */
1892 mf.width = 2560; 1899 mf.width = 2560;
1893 mf.height = 1920; 1900 mf.height = 1920;
1894 ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, 1901 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1895 try_mbus_fmt, &mf); 1902 soc_camera_grp_id(icd), video,
1903 try_mbus_fmt, &mf);
1896 if (ret < 0) { 1904 if (ret < 0) {
1897 /* Shouldn't actually happen... */ 1905 /* Shouldn't actually happen... */
1898 dev_err(icd->parent, 1906 dev_err(icd->parent,
diff --git a/drivers/media/video/sh_mobile_csi2.c b/drivers/media/video/sh_mobile_csi2.c
index ea4f0473ed3b..8a652b53ff7e 100644
--- a/drivers/media/video/sh_mobile_csi2.c
+++ b/drivers/media/video/sh_mobile_csi2.c
@@ -143,7 +143,7 @@ static int sh_csi2_s_mbus_config(struct v4l2_subdev *sd,
143 const struct v4l2_mbus_config *cfg) 143 const struct v4l2_mbus_config *cfg)
144{ 144{
145 struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev); 145 struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev);
146 struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; 146 struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd);
147 struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); 147 struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd);
148 struct v4l2_mbus_config client_cfg = {.type = V4L2_MBUS_CSI2, 148 struct v4l2_mbus_config client_cfg = {.type = V4L2_MBUS_CSI2,
149 .flags = priv->mipi_flags}; 149 .flags = priv->mipi_flags};
@@ -202,7 +202,7 @@ static void sh_csi2_hwinit(struct sh_csi2 *priv)
202static int sh_csi2_client_connect(struct sh_csi2 *priv) 202static int sh_csi2_client_connect(struct sh_csi2 *priv)
203{ 203{
204 struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; 204 struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data;
205 struct soc_camera_device *icd = (struct soc_camera_device *)priv->subdev.grp_id; 205 struct soc_camera_device *icd = v4l2_get_subdev_hostdata(&priv->subdev);
206 struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); 206 struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd);
207 struct device *dev = v4l2_get_subdevdata(&priv->subdev); 207 struct device *dev = v4l2_get_subdevdata(&priv->subdev);
208 struct v4l2_mbus_config cfg; 208 struct v4l2_mbus_config cfg;
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index b72580c38957..62e4312515cb 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -1103,7 +1103,8 @@ static int soc_camera_probe(struct soc_camera_device *icd)
1103 } 1103 }
1104 1104
1105 sd = soc_camera_to_subdev(icd); 1105 sd = soc_camera_to_subdev(icd);
1106 sd->grp_id = (long)icd; 1106 sd->grp_id = soc_camera_grp_id(icd);
1107 v4l2_set_subdev_hostdata(sd, icd);
1107 1108
1108 if (v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler)) 1109 if (v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler))
1109 goto ectrl; 1110 goto ectrl;
diff --git a/drivers/mfd/ab5500-debugfs.c b/drivers/mfd/ab5500-debugfs.c
index 43c0ebb81956..b7b2d3483fd4 100644
--- a/drivers/mfd/ab5500-debugfs.c
+++ b/drivers/mfd/ab5500-debugfs.c
@@ -4,7 +4,7 @@
4 * Debugfs support for the AB5500 MFD driver 4 * Debugfs support for the AB5500 MFD driver
5 */ 5 */
6 6
7#include <linux/export.h> 7#include <linux/module.h>
8#include <linux/debugfs.h> 8#include <linux/debugfs.h>
9#include <linux/seq_file.h> 9#include <linux/seq_file.h>
10#include <linux/mfd/ab5500/ab5500.h> 10#include <linux/mfd/ab5500/ab5500.h>
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c
index 1e9173804ede..d3d572b2317b 100644
--- a/drivers/mfd/ab8500-core.c
+++ b/drivers/mfd/ab8500-core.c
@@ -620,6 +620,7 @@ static struct resource __devinitdata ab8500_fg_resources[] = {
620 620
621static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 621static struct resource __devinitdata ab8500_chargalg_resources[] = {};
622 622
623#ifdef CONFIG_DEBUG_FS
623static struct resource __devinitdata ab8500_debug_resources[] = { 624static struct resource __devinitdata ab8500_debug_resources[] = {
624 { 625 {
625 .name = "IRQ_FIRST", 626 .name = "IRQ_FIRST",
@@ -634,6 +635,7 @@ static struct resource __devinitdata ab8500_debug_resources[] = {
634 .flags = IORESOURCE_IRQ, 635 .flags = IORESOURCE_IRQ,
635 }, 636 },
636}; 637};
638#endif
637 639
638static struct resource __devinitdata ab8500_usb_resources[] = { 640static struct resource __devinitdata ab8500_usb_resources[] = {
639 { 641 {
diff --git a/drivers/mfd/adp5520.c b/drivers/mfd/adp5520.c
index f1d88483112c..8d816cce8322 100644
--- a/drivers/mfd/adp5520.c
+++ b/drivers/mfd/adp5520.c
@@ -109,7 +109,7 @@ int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask)
109 109
110 ret = __adp5520_read(chip->client, reg, &reg_val); 110 ret = __adp5520_read(chip->client, reg, &reg_val);
111 111
112 if (!ret && ((reg_val & bit_mask) == 0)) { 112 if (!ret && ((reg_val & bit_mask) != bit_mask)) {
113 reg_val |= bit_mask; 113 reg_val |= bit_mask;
114 ret = __adp5520_write(chip->client, reg, reg_val); 114 ret = __adp5520_write(chip->client, reg, reg_val);
115 } 115 }
diff --git a/drivers/mfd/da903x.c b/drivers/mfd/da903x.c
index 1b79c37fd599..1924b857a0fb 100644
--- a/drivers/mfd/da903x.c
+++ b/drivers/mfd/da903x.c
@@ -182,7 +182,7 @@ int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
182 if (ret) 182 if (ret)
183 goto out; 183 goto out;
184 184
185 if ((reg_val & bit_mask) == 0) { 185 if ((reg_val & bit_mask) != bit_mask) {
186 reg_val |= bit_mask; 186 reg_val |= bit_mask;
187 ret = __da903x_write(chip->client, reg, reg_val); 187 ret = __da903x_write(chip->client, reg, reg_val);
188 } 188 }
@@ -549,6 +549,7 @@ static int __devexit da903x_remove(struct i2c_client *client)
549 struct da903x_chip *chip = i2c_get_clientdata(client); 549 struct da903x_chip *chip = i2c_get_clientdata(client);
550 550
551 da903x_remove_subdevs(chip); 551 da903x_remove_subdevs(chip);
552 free_irq(client->irq, chip);
552 kfree(chip); 553 kfree(chip);
553 return 0; 554 return 0;
554} 555}
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
index 1e9ee533eacb..ef39528088f2 100644
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -16,6 +16,7 @@
16 */ 16 */
17 17
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h>
19#include <linux/irq.h> 20#include <linux/irq.h>
20#include <linux/interrupt.h> 21#include <linux/interrupt.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c
index bba26d96c240..a5ddf31b60ca 100644
--- a/drivers/mfd/tps6586x.c
+++ b/drivers/mfd/tps6586x.c
@@ -197,7 +197,7 @@ int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
197 if (ret) 197 if (ret)
198 goto out; 198 goto out;
199 199
200 if ((reg_val & bit_mask) == 0) { 200 if ((reg_val & bit_mask) != bit_mask) {
201 reg_val |= bit_mask; 201 reg_val |= bit_mask;
202 ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); 202 ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val);
203 } 203 }
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c
index 6f5b8cf2f652..c1da84bc1573 100644
--- a/drivers/mfd/tps65910.c
+++ b/drivers/mfd/tps65910.c
@@ -120,7 +120,7 @@ int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
120 goto out; 120 goto out;
121 } 121 }
122 122
123 data &= mask; 123 data &= ~mask;
124 err = tps65910_i2c_write(tps65910, reg, 1, &data); 124 err = tps65910_i2c_write(tps65910, reg, 1, &data);
125 if (err) 125 if (err)
126 dev_err(tps65910->dev, "write to reg %x failed\n", reg); 126 dev_err(tps65910->dev, "write to reg %x failed\n", reg);
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index bfbd66021afd..61e70cfaa774 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -363,13 +363,13 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
363 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 363 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
364 return -EPERM; 364 return -EPERM;
365 } 365 }
366 sid = twl_map[mod_no].sid;
367 twl = &twl_modules[sid];
368
369 if (unlikely(!inuse)) { 366 if (unlikely(!inuse)) {
370 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); 367 pr_err("%s: not initialized\n", DRIVER_NAME);
371 return -EPERM; 368 return -EPERM;
372 } 369 }
370 sid = twl_map[mod_no].sid;
371 twl = &twl_modules[sid];
372
373 mutex_lock(&twl->xfer_lock); 373 mutex_lock(&twl->xfer_lock);
374 /* 374 /*
375 * [MSG1]: fill the register address data 375 * [MSG1]: fill the register address data
@@ -420,13 +420,13 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
420 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 420 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
421 return -EPERM; 421 return -EPERM;
422 } 422 }
423 sid = twl_map[mod_no].sid;
424 twl = &twl_modules[sid];
425
426 if (unlikely(!inuse)) { 423 if (unlikely(!inuse)) {
427 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); 424 pr_err("%s: not initialized\n", DRIVER_NAME);
428 return -EPERM; 425 return -EPERM;
429 } 426 }
427 sid = twl_map[mod_no].sid;
428 twl = &twl_modules[sid];
429
430 mutex_lock(&twl->xfer_lock); 430 mutex_lock(&twl->xfer_lock);
431 /* [MSG1] fill the register address data */ 431 /* [MSG1] fill the register address data */
432 msg = &twl->xfer_msg[0]; 432 msg = &twl->xfer_msg[0];
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index f062c8cc6c38..29f11e0765fe 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -432,6 +432,7 @@ struct sih_agent {
432 u32 edge_change; 432 u32 edge_change;
433 433
434 struct mutex irq_lock; 434 struct mutex irq_lock;
435 char *irq_name;
435}; 436};
436 437
437/*----------------------------------------------------------------------*/ 438/*----------------------------------------------------------------------*/
@@ -589,7 +590,7 @@ static inline int sih_read_isr(const struct sih *sih)
589 * Generic handler for SIH interrupts ... we "know" this is called 590 * Generic handler for SIH interrupts ... we "know" this is called
590 * in task context, with IRQs enabled. 591 * in task context, with IRQs enabled.
591 */ 592 */
592static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) 593static irqreturn_t handle_twl4030_sih(int irq, void *data)
593{ 594{
594 struct sih_agent *agent = irq_get_handler_data(irq); 595 struct sih_agent *agent = irq_get_handler_data(irq);
595 const struct sih *sih = agent->sih; 596 const struct sih *sih = agent->sih;
@@ -602,7 +603,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
602 pr_err("twl4030: %s SIH, read ISR error %d\n", 603 pr_err("twl4030: %s SIH, read ISR error %d\n",
603 sih->name, isr); 604 sih->name, isr);
604 /* REVISIT: recover; eventually mask it all, etc */ 605 /* REVISIT: recover; eventually mask it all, etc */
605 return; 606 return IRQ_HANDLED;
606 } 607 }
607 608
608 while (isr) { 609 while (isr) {
@@ -616,6 +617,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
616 pr_err("twl4030: %s SIH, invalid ISR bit %d\n", 617 pr_err("twl4030: %s SIH, invalid ISR bit %d\n",
617 sih->name, irq); 618 sih->name, irq);
618 } 619 }
620 return IRQ_HANDLED;
619} 621}
620 622
621static unsigned twl4030_irq_next; 623static unsigned twl4030_irq_next;
@@ -668,18 +670,19 @@ int twl4030_sih_setup(int module)
668 activate_irq(irq); 670 activate_irq(irq);
669 } 671 }
670 672
671 status = irq_base;
672 twl4030_irq_next += i; 673 twl4030_irq_next += i;
673 674
674 /* replace generic PIH handler (handle_simple_irq) */ 675 /* replace generic PIH handler (handle_simple_irq) */
675 irq = sih_mod + twl4030_irq_base; 676 irq = sih_mod + twl4030_irq_base;
676 irq_set_handler_data(irq, agent); 677 irq_set_handler_data(irq, agent);
677 irq_set_chained_handler(irq, handle_twl4030_sih); 678 agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name);
679 status = request_threaded_irq(irq, NULL, handle_twl4030_sih, 0,
680 agent->irq_name ?: sih->name, NULL);
678 681
679 pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, 682 pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name,
680 irq, irq_base, twl4030_irq_next - 1); 683 irq, irq_base, twl4030_irq_next - 1);
681 684
682 return status; 685 return status < 0 ? status : irq_base;
683} 686}
684 687
685/* FIXME need a call to reverse twl4030_sih_setup() ... */ 688/* FIXME need a call to reverse twl4030_sih_setup() ... */
@@ -733,8 +736,9 @@ int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
733 } 736 }
734 737
735 /* install an irq handler to demultiplex the TWL4030 interrupt */ 738 /* install an irq handler to demultiplex the TWL4030 interrupt */
736 status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, 0, 739 status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih,
737 "TWL4030-PIH", NULL); 740 IRQF_ONESHOT,
741 "TWL4030-PIH", NULL);
738 if (status < 0) { 742 if (status < 0) {
739 pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status); 743 pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status);
740 goto fail_rqirq; 744 goto fail_rqirq;
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index 5d6ba132837e..61894fced8ea 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -239,6 +239,7 @@ static int wm8994_suspend(struct device *dev)
239 239
240 switch (wm8994->type) { 240 switch (wm8994->type) {
241 case WM8958: 241 case WM8958:
242 case WM1811:
242 ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1); 243 ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1);
243 if (ret < 0) { 244 if (ret < 0) {
244 dev_err(dev, "Failed to read power status: %d\n", ret); 245 dev_err(dev, "Failed to read power status: %d\n", ret);
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index e8a5eb38748b..d31c78b72b0f 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -302,17 +302,6 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev)
302 host->max_blk_size = 512; 302 host->max_blk_size = 512;
303 host->max_blk_count = PAGE_CACHE_SIZE / 512; 303 host->max_blk_count = PAGE_CACHE_SIZE / 512;
304 304
305 /*
306 * Enable runtime power management by default. This flag was added due
307 * to runtime power management causing disruption for some users, but
308 * the power on/off code has been improved since then.
309 *
310 * We'll enable this flag by default as an experiment, and if no
311 * problems are reported, we will follow up later and remove the flag
312 * altogether.
313 */
314 host->caps = MMC_CAP_POWER_OFF_CARD;
315
316 return host; 305 return host;
317 306
318free: 307free:
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index a8b4d2aa18e5..f437c3e6f3aa 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -741,7 +741,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
741 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); 741 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
742 742
743 /* maybe switch power to the card */ 743 /* maybe switch power to the card */
744 if (host->board->vcc_pin) { 744 if (gpio_is_valid(host->board->vcc_pin)) {
745 switch (ios->power_mode) { 745 switch (ios->power_mode) {
746 case MMC_POWER_OFF: 746 case MMC_POWER_OFF:
747 gpio_set_value(host->board->vcc_pin, 0); 747 gpio_set_value(host->board->vcc_pin, 0);
@@ -897,7 +897,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc)
897{ 897{
898 struct at91mci_host *host = mmc_priv(mmc); 898 struct at91mci_host *host = mmc_priv(mmc);
899 899
900 if (host->board->wp_pin) 900 if (gpio_is_valid(host->board->wp_pin))
901 return !!gpio_get_value(host->board->wp_pin); 901 return !!gpio_get_value(host->board->wp_pin);
902 /* 902 /*
903 * Board doesn't support read only detection; let the mmc core 903 * Board doesn't support read only detection; let the mmc core
@@ -991,21 +991,21 @@ static int __init at91_mci_probe(struct platform_device *pdev)
991 * Reserve GPIOs ... board init code makes sure these pins are set 991 * Reserve GPIOs ... board init code makes sure these pins are set
992 * up as GPIOs with the right direction (input, except for vcc) 992 * up as GPIOs with the right direction (input, except for vcc)
993 */ 993 */
994 if (host->board->det_pin) { 994 if (gpio_is_valid(host->board->det_pin)) {
995 ret = gpio_request(host->board->det_pin, "mmc_detect"); 995 ret = gpio_request(host->board->det_pin, "mmc_detect");
996 if (ret < 0) { 996 if (ret < 0) {
997 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n"); 997 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
998 goto fail4b; 998 goto fail4b;
999 } 999 }
1000 } 1000 }
1001 if (host->board->wp_pin) { 1001 if (gpio_is_valid(host->board->wp_pin)) {
1002 ret = gpio_request(host->board->wp_pin, "mmc_wp"); 1002 ret = gpio_request(host->board->wp_pin, "mmc_wp");
1003 if (ret < 0) { 1003 if (ret < 0) {
1004 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n"); 1004 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
1005 goto fail4; 1005 goto fail4;
1006 } 1006 }
1007 } 1007 }
1008 if (host->board->vcc_pin) { 1008 if (gpio_is_valid(host->board->vcc_pin)) {
1009 ret = gpio_request(host->board->vcc_pin, "mmc_vcc"); 1009 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
1010 if (ret < 0) { 1010 if (ret < 0) {
1011 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n"); 1011 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
@@ -1057,7 +1057,7 @@ static int __init at91_mci_probe(struct platform_device *pdev)
1057 /* 1057 /*
1058 * Add host to MMC layer 1058 * Add host to MMC layer
1059 */ 1059 */
1060 if (host->board->det_pin) { 1060 if (gpio_is_valid(host->board->det_pin)) {
1061 host->present = !gpio_get_value(host->board->det_pin); 1061 host->present = !gpio_get_value(host->board->det_pin);
1062 } 1062 }
1063 else 1063 else
@@ -1068,7 +1068,7 @@ static int __init at91_mci_probe(struct platform_device *pdev)
1068 /* 1068 /*
1069 * monitor card insertion/removal if we can 1069 * monitor card insertion/removal if we can
1070 */ 1070 */
1071 if (host->board->det_pin) { 1071 if (gpio_is_valid(host->board->det_pin)) {
1072 ret = request_irq(gpio_to_irq(host->board->det_pin), 1072 ret = request_irq(gpio_to_irq(host->board->det_pin),
1073 at91_mmc_det_irq, 0, mmc_hostname(mmc), host); 1073 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
1074 if (ret) 1074 if (ret)
@@ -1087,13 +1087,13 @@ fail0:
1087fail1: 1087fail1:
1088 clk_put(host->mci_clk); 1088 clk_put(host->mci_clk);
1089fail2: 1089fail2:
1090 if (host->board->vcc_pin) 1090 if (gpio_is_valid(host->board->vcc_pin))
1091 gpio_free(host->board->vcc_pin); 1091 gpio_free(host->board->vcc_pin);
1092fail3: 1092fail3:
1093 if (host->board->wp_pin) 1093 if (gpio_is_valid(host->board->wp_pin))
1094 gpio_free(host->board->wp_pin); 1094 gpio_free(host->board->wp_pin);
1095fail4: 1095fail4:
1096 if (host->board->det_pin) 1096 if (gpio_is_valid(host->board->det_pin))
1097 gpio_free(host->board->det_pin); 1097 gpio_free(host->board->det_pin);
1098fail4b: 1098fail4b:
1099 if (host->buffer) 1099 if (host->buffer)
@@ -1125,7 +1125,7 @@ static int __exit at91_mci_remove(struct platform_device *pdev)
1125 dma_free_coherent(&pdev->dev, MCI_BUFSIZE, 1125 dma_free_coherent(&pdev->dev, MCI_BUFSIZE,
1126 host->buffer, host->physical_address); 1126 host->buffer, host->physical_address);
1127 1127
1128 if (host->board->det_pin) { 1128 if (gpio_is_valid(host->board->det_pin)) {
1129 if (device_can_wakeup(&pdev->dev)) 1129 if (device_can_wakeup(&pdev->dev))
1130 free_irq(gpio_to_irq(host->board->det_pin), host); 1130 free_irq(gpio_to_irq(host->board->det_pin), host);
1131 device_init_wakeup(&pdev->dev, 0); 1131 device_init_wakeup(&pdev->dev, 0);
@@ -1140,9 +1140,9 @@ static int __exit at91_mci_remove(struct platform_device *pdev)
1140 clk_disable(host->mci_clk); /* Disable the peripheral clock */ 1140 clk_disable(host->mci_clk); /* Disable the peripheral clock */
1141 clk_put(host->mci_clk); 1141 clk_put(host->mci_clk);
1142 1142
1143 if (host->board->vcc_pin) 1143 if (gpio_is_valid(host->board->vcc_pin))
1144 gpio_free(host->board->vcc_pin); 1144 gpio_free(host->board->vcc_pin);
1145 if (host->board->wp_pin) 1145 if (gpio_is_valid(host->board->wp_pin))
1146 gpio_free(host->board->wp_pin); 1146 gpio_free(host->board->wp_pin);
1147 1147
1148 iounmap(host->baseaddr); 1148 iounmap(host->baseaddr);
@@ -1163,7 +1163,7 @@ static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1163 struct at91mci_host *host = mmc_priv(mmc); 1163 struct at91mci_host *host = mmc_priv(mmc);
1164 int ret = 0; 1164 int ret = 0;
1165 1165
1166 if (host->board->det_pin && device_may_wakeup(&pdev->dev)) 1166 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1167 enable_irq_wake(host->board->det_pin); 1167 enable_irq_wake(host->board->det_pin);
1168 1168
1169 if (mmc) 1169 if (mmc)
@@ -1178,7 +1178,7 @@ static int at91_mci_resume(struct platform_device *pdev)
1178 struct at91mci_host *host = mmc_priv(mmc); 1178 struct at91mci_host *host = mmc_priv(mmc);
1179 int ret = 0; 1179 int ret = 0;
1180 1180
1181 if (host->board->det_pin && device_may_wakeup(&pdev->dev)) 1181 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1182 disable_irq_wake(host->board->det_pin); 1182 disable_irq_wake(host->board->det_pin);
1183 1183
1184 if (mmc) 1184 if (mmc)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 50b5f9926f64..0726e59fd418 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -675,7 +675,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
675 unsigned int status) 675 unsigned int status)
676{ 676{
677 /* First check for errors */ 677 /* First check for errors */
678 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { 678 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
679 MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
679 u32 remain, success; 680 u32 remain, success;
680 681
681 /* Terminate the DMA transfer */ 682 /* Terminate the DMA transfer */
@@ -754,8 +755,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
754 } 755 }
755 756
756 if (!cmd->data || cmd->error) { 757 if (!cmd->data || cmd->error) {
757 if (host->data) 758 if (host->data) {
759 /* Terminate the DMA transfer */
760 if (dma_inprogress(host))
761 mmci_dma_data_error(host);
758 mmci_stop_data(host); 762 mmci_stop_data(host);
763 }
759 mmci_request_end(host, cmd->mrq); 764 mmci_request_end(host, cmd->mrq);
760 } else if (!(cmd->data->flags & MMC_DATA_READ)) { 765 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
761 mmci_start_data(host, cmd->data); 766 mmci_start_data(host, cmd->data);
@@ -955,8 +960,9 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
955 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); 960 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status);
956 961
957 data = host->data; 962 data = host->data;
958 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN| 963 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
959 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data) 964 MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND|
965 MCI_DATABLOCKEND) && data)
960 mmci_data_irq(host, data, status); 966 mmci_data_irq(host, data, status);
961 967
962 cmd = host->cmd; 968 cmd = host->cmd;
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index 87b6f079b6e0..b4257e700617 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -109,13 +109,10 @@ static struct platform_driver sdhci_cns3xxx_driver = {
109 .driver = { 109 .driver = {
110 .name = "sdhci-cns3xxx", 110 .name = "sdhci-cns3xxx",
111 .owner = THIS_MODULE, 111 .owner = THIS_MODULE,
112 .pm = SDHCI_PLTFM_PMOPS,
112 }, 113 },
113 .probe = sdhci_cns3xxx_probe, 114 .probe = sdhci_cns3xxx_probe,
114 .remove = __devexit_p(sdhci_cns3xxx_remove), 115 .remove = __devexit_p(sdhci_cns3xxx_remove),
115#ifdef CONFIG_PM
116 .suspend = sdhci_pltfm_suspend,
117 .resume = sdhci_pltfm_resume,
118#endif
119}; 116};
120 117
121static int __init sdhci_cns3xxx_init(void) 118static int __init sdhci_cns3xxx_init(void)
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c
index f2d29dca4420..a81312c91f70 100644
--- a/drivers/mmc/host/sdhci-dove.c
+++ b/drivers/mmc/host/sdhci-dove.c
@@ -82,13 +82,10 @@ static struct platform_driver sdhci_dove_driver = {
82 .driver = { 82 .driver = {
83 .name = "sdhci-dove", 83 .name = "sdhci-dove",
84 .owner = THIS_MODULE, 84 .owner = THIS_MODULE,
85 .pm = SDHCI_PLTFM_PMOPS,
85 }, 86 },
86 .probe = sdhci_dove_probe, 87 .probe = sdhci_dove_probe,
87 .remove = __devexit_p(sdhci_dove_remove), 88 .remove = __devexit_p(sdhci_dove_remove),
88#ifdef CONFIG_PM
89 .suspend = sdhci_pltfm_suspend,
90 .resume = sdhci_pltfm_resume,
91#endif
92}; 89};
93 90
94static int __init sdhci_dove_init(void) 91static int __init sdhci_dove_init(void)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 4b976f00ea85..38ebc4ea259f 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -599,14 +599,11 @@ static struct platform_driver sdhci_esdhc_imx_driver = {
599 .name = "sdhci-esdhc-imx", 599 .name = "sdhci-esdhc-imx",
600 .owner = THIS_MODULE, 600 .owner = THIS_MODULE,
601 .of_match_table = imx_esdhc_dt_ids, 601 .of_match_table = imx_esdhc_dt_ids,
602 .pm = SDHCI_PLTFM_PMOPS,
602 }, 603 },
603 .id_table = imx_esdhc_devtype, 604 .id_table = imx_esdhc_devtype,
604 .probe = sdhci_esdhc_imx_probe, 605 .probe = sdhci_esdhc_imx_probe,
605 .remove = __devexit_p(sdhci_esdhc_imx_remove), 606 .remove = __devexit_p(sdhci_esdhc_imx_remove),
606#ifdef CONFIG_PM
607 .suspend = sdhci_pltfm_suspend,
608 .resume = sdhci_pltfm_resume,
609#endif
610}; 607};
611 608
612static int __init sdhci_esdhc_imx_init(void) 609static int __init sdhci_esdhc_imx_init(void)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 59e9d003e589..01e5f627e0f0 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -125,13 +125,10 @@ static struct platform_driver sdhci_esdhc_driver = {
125 .name = "sdhci-esdhc", 125 .name = "sdhci-esdhc",
126 .owner = THIS_MODULE, 126 .owner = THIS_MODULE,
127 .of_match_table = sdhci_esdhc_of_match, 127 .of_match_table = sdhci_esdhc_of_match,
128 .pm = SDHCI_PLTFM_PMOPS,
128 }, 129 },
129 .probe = sdhci_esdhc_probe, 130 .probe = sdhci_esdhc_probe,
130 .remove = __devexit_p(sdhci_esdhc_remove), 131 .remove = __devexit_p(sdhci_esdhc_remove),
131#ifdef CONFIG_PM
132 .suspend = sdhci_pltfm_suspend,
133 .resume = sdhci_pltfm_resume,
134#endif
135}; 132};
136 133
137static int __init sdhci_esdhc_init(void) 134static int __init sdhci_esdhc_init(void)
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
index 9b0d794a4f69..3619adc7d9fc 100644
--- a/drivers/mmc/host/sdhci-of-hlwd.c
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -87,13 +87,10 @@ static struct platform_driver sdhci_hlwd_driver = {
87 .name = "sdhci-hlwd", 87 .name = "sdhci-hlwd",
88 .owner = THIS_MODULE, 88 .owner = THIS_MODULE,
89 .of_match_table = sdhci_hlwd_of_match, 89 .of_match_table = sdhci_hlwd_of_match,
90 .pm = SDHCI_PLTFM_PMOPS,
90 }, 91 },
91 .probe = sdhci_hlwd_probe, 92 .probe = sdhci_hlwd_probe,
92 .remove = __devexit_p(sdhci_hlwd_remove), 93 .remove = __devexit_p(sdhci_hlwd_remove),
93#ifdef CONFIG_PM
94 .suspend = sdhci_pltfm_suspend,
95 .resume = sdhci_pltfm_resume,
96#endif
97}; 94};
98 95
99static int __init sdhci_hlwd_init(void) 96static int __init sdhci_hlwd_init(void)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index d833d9c2f7e3..6878a94626bc 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -54,8 +54,7 @@ struct sdhci_pci_fixes {
54 int (*probe_slot) (struct sdhci_pci_slot *); 54 int (*probe_slot) (struct sdhci_pci_slot *);
55 void (*remove_slot) (struct sdhci_pci_slot *, int); 55 void (*remove_slot) (struct sdhci_pci_slot *, int);
56 56
57 int (*suspend) (struct sdhci_pci_chip *, 57 int (*suspend) (struct sdhci_pci_chip *);
58 pm_message_t);
59 int (*resume) (struct sdhci_pci_chip *); 58 int (*resume) (struct sdhci_pci_chip *);
60}; 59};
61 60
@@ -549,7 +548,7 @@ static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
549 jmicron_enable_mmc(slot->host, 0); 548 jmicron_enable_mmc(slot->host, 0);
550} 549}
551 550
552static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state) 551static int jmicron_suspend(struct sdhci_pci_chip *chip)
553{ 552{
554 int i; 553 int i;
555 554
@@ -993,8 +992,9 @@ static struct sdhci_ops sdhci_pci_ops = {
993 992
994#ifdef CONFIG_PM 993#ifdef CONFIG_PM
995 994
996static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) 995static int sdhci_pci_suspend(struct device *dev)
997{ 996{
997 struct pci_dev *pdev = to_pci_dev(dev);
998 struct sdhci_pci_chip *chip; 998 struct sdhci_pci_chip *chip;
999 struct sdhci_pci_slot *slot; 999 struct sdhci_pci_slot *slot;
1000 mmc_pm_flag_t slot_pm_flags; 1000 mmc_pm_flag_t slot_pm_flags;
@@ -1010,7 +1010,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1010 if (!slot) 1010 if (!slot)
1011 continue; 1011 continue;
1012 1012
1013 ret = sdhci_suspend_host(slot->host, state); 1013 ret = sdhci_suspend_host(slot->host);
1014 1014
1015 if (ret) { 1015 if (ret) {
1016 for (i--; i >= 0; i--) 1016 for (i--; i >= 0; i--)
@@ -1026,7 +1026,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1026 } 1026 }
1027 1027
1028 if (chip->fixes && chip->fixes->suspend) { 1028 if (chip->fixes && chip->fixes->suspend) {
1029 ret = chip->fixes->suspend(chip, state); 1029 ret = chip->fixes->suspend(chip);
1030 if (ret) { 1030 if (ret) {
1031 for (i = chip->num_slots - 1; i >= 0; i--) 1031 for (i = chip->num_slots - 1; i >= 0; i--)
1032 sdhci_resume_host(chip->slots[i]->host); 1032 sdhci_resume_host(chip->slots[i]->host);
@@ -1042,16 +1042,17 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1042 } 1042 }
1043 pci_set_power_state(pdev, PCI_D3hot); 1043 pci_set_power_state(pdev, PCI_D3hot);
1044 } else { 1044 } else {
1045 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 1045 pci_enable_wake(pdev, PCI_D3hot, 0);
1046 pci_disable_device(pdev); 1046 pci_disable_device(pdev);
1047 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 1047 pci_set_power_state(pdev, PCI_D3hot);
1048 } 1048 }
1049 1049
1050 return 0; 1050 return 0;
1051} 1051}
1052 1052
1053static int sdhci_pci_resume(struct pci_dev *pdev) 1053static int sdhci_pci_resume(struct device *dev)
1054{ 1054{
1055 struct pci_dev *pdev = to_pci_dev(dev);
1055 struct sdhci_pci_chip *chip; 1056 struct sdhci_pci_chip *chip;
1056 struct sdhci_pci_slot *slot; 1057 struct sdhci_pci_slot *slot;
1057 int i, ret; 1058 int i, ret;
@@ -1099,7 +1100,6 @@ static int sdhci_pci_runtime_suspend(struct device *dev)
1099 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); 1100 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1100 struct sdhci_pci_chip *chip; 1101 struct sdhci_pci_chip *chip;
1101 struct sdhci_pci_slot *slot; 1102 struct sdhci_pci_slot *slot;
1102 pm_message_t state = { .event = PM_EVENT_SUSPEND };
1103 int i, ret; 1103 int i, ret;
1104 1104
1105 chip = pci_get_drvdata(pdev); 1105 chip = pci_get_drvdata(pdev);
@@ -1121,7 +1121,7 @@ static int sdhci_pci_runtime_suspend(struct device *dev)
1121 } 1121 }
1122 1122
1123 if (chip->fixes && chip->fixes->suspend) { 1123 if (chip->fixes && chip->fixes->suspend) {
1124 ret = chip->fixes->suspend(chip, state); 1124 ret = chip->fixes->suspend(chip);
1125 if (ret) { 1125 if (ret) {
1126 for (i = chip->num_slots - 1; i >= 0; i--) 1126 for (i = chip->num_slots - 1; i >= 0; i--)
1127 sdhci_runtime_resume_host(chip->slots[i]->host); 1127 sdhci_runtime_resume_host(chip->slots[i]->host);
@@ -1176,6 +1176,8 @@ static int sdhci_pci_runtime_idle(struct device *dev)
1176#endif 1176#endif
1177 1177
1178static const struct dev_pm_ops sdhci_pci_pm_ops = { 1178static const struct dev_pm_ops sdhci_pci_pm_ops = {
1179 .suspend = sdhci_pci_suspend,
1180 .resume = sdhci_pci_resume,
1179 .runtime_suspend = sdhci_pci_runtime_suspend, 1181 .runtime_suspend = sdhci_pci_runtime_suspend,
1180 .runtime_resume = sdhci_pci_runtime_resume, 1182 .runtime_resume = sdhci_pci_runtime_resume,
1181 .runtime_idle = sdhci_pci_runtime_idle, 1183 .runtime_idle = sdhci_pci_runtime_idle,
@@ -1428,8 +1430,6 @@ static struct pci_driver sdhci_driver = {
1428 .id_table = pci_ids, 1430 .id_table = pci_ids,
1429 .probe = sdhci_pci_probe, 1431 .probe = sdhci_pci_probe,
1430 .remove = __devexit_p(sdhci_pci_remove), 1432 .remove = __devexit_p(sdhci_pci_remove),
1431 .suspend = sdhci_pci_suspend,
1432 .resume = sdhci_pci_resume,
1433 .driver = { 1433 .driver = {
1434 .pm = &sdhci_pci_pm_ops 1434 .pm = &sdhci_pci_pm_ops
1435 }, 1435 },
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c
index a9e12ea05583..03970bcb3495 100644
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -194,21 +194,25 @@ int sdhci_pltfm_unregister(struct platform_device *pdev)
194EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); 194EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister);
195 195
196#ifdef CONFIG_PM 196#ifdef CONFIG_PM
197int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) 197static int sdhci_pltfm_suspend(struct device *dev)
198{ 198{
199 struct sdhci_host *host = platform_get_drvdata(dev); 199 struct sdhci_host *host = dev_get_drvdata(dev);
200 200
201 return sdhci_suspend_host(host, state); 201 return sdhci_suspend_host(host);
202} 202}
203EXPORT_SYMBOL_GPL(sdhci_pltfm_suspend);
204 203
205int sdhci_pltfm_resume(struct platform_device *dev) 204static int sdhci_pltfm_resume(struct device *dev)
206{ 205{
207 struct sdhci_host *host = platform_get_drvdata(dev); 206 struct sdhci_host *host = dev_get_drvdata(dev);
208 207
209 return sdhci_resume_host(host); 208 return sdhci_resume_host(host);
210} 209}
211EXPORT_SYMBOL_GPL(sdhci_pltfm_resume); 210
211const struct dev_pm_ops sdhci_pltfm_pmops = {
212 .suspend = sdhci_pltfm_suspend,
213 .resume = sdhci_pltfm_resume,
214};
215EXPORT_SYMBOL_GPL(sdhci_pltfm_pmops);
212#endif /* CONFIG_PM */ 216#endif /* CONFIG_PM */
213 217
214static int __init sdhci_pltfm_drv_init(void) 218static int __init sdhci_pltfm_drv_init(void)
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index 3a9fc3f40840..37e0e184a0bb 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -99,8 +99,10 @@ extern int sdhci_pltfm_register(struct platform_device *pdev,
99extern int sdhci_pltfm_unregister(struct platform_device *pdev); 99extern int sdhci_pltfm_unregister(struct platform_device *pdev);
100 100
101#ifdef CONFIG_PM 101#ifdef CONFIG_PM
102extern int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state); 102extern const struct dev_pm_ops sdhci_pltfm_pmops;
103extern int sdhci_pltfm_resume(struct platform_device *dev); 103#define SDHCI_PLTFM_PMOPS (&sdhci_pltfm_pmops)
104#else
105#define SDHCI_PLTFM_PMOPS NULL
104#endif 106#endif
105 107
106#endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */ 108#endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
index d4bf6d30c7ba..7a039c3cb1f1 100644
--- a/drivers/mmc/host/sdhci-pxav2.c
+++ b/drivers/mmc/host/sdhci-pxav2.c
@@ -218,13 +218,10 @@ static struct platform_driver sdhci_pxav2_driver = {
218 .driver = { 218 .driver = {
219 .name = "sdhci-pxav2", 219 .name = "sdhci-pxav2",
220 .owner = THIS_MODULE, 220 .owner = THIS_MODULE,
221 .pm = SDHCI_PLTFM_PMOPS,
221 }, 222 },
222 .probe = sdhci_pxav2_probe, 223 .probe = sdhci_pxav2_probe,
223 .remove = __devexit_p(sdhci_pxav2_remove), 224 .remove = __devexit_p(sdhci_pxav2_remove),
224#ifdef CONFIG_PM
225 .suspend = sdhci_pltfm_suspend,
226 .resume = sdhci_pltfm_resume,
227#endif
228}; 225};
229static int __init sdhci_pxav2_init(void) 226static int __init sdhci_pxav2_init(void)
230{ 227{
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index cff4ad3e7a59..15673a7ee6a5 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -264,13 +264,10 @@ static struct platform_driver sdhci_pxav3_driver = {
264 .driver = { 264 .driver = {
265 .name = "sdhci-pxav3", 265 .name = "sdhci-pxav3",
266 .owner = THIS_MODULE, 266 .owner = THIS_MODULE,
267 .pm = SDHCI_PLTFM_PMOPS,
267 }, 268 },
268 .probe = sdhci_pxav3_probe, 269 .probe = sdhci_pxav3_probe,
269 .remove = __devexit_p(sdhci_pxav3_remove), 270 .remove = __devexit_p(sdhci_pxav3_remove),
270#ifdef CONFIG_PM
271 .suspend = sdhci_pltfm_suspend,
272 .resume = sdhci_pltfm_resume,
273#endif
274}; 271};
275static int __init sdhci_pxav3_init(void) 272static int __init sdhci_pxav3_init(void)
276{ 273{
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 6b3f3664edeb..9a20d1f55bb7 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -619,23 +619,29 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
619 619
620#ifdef CONFIG_PM 620#ifdef CONFIG_PM
621 621
622static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) 622static int sdhci_s3c_suspend(struct device *dev)
623{ 623{
624 struct sdhci_host *host = platform_get_drvdata(dev); 624 struct sdhci_host *host = dev_get_drvdata(dev);
625 625
626 return sdhci_suspend_host(host, pm); 626 return sdhci_suspend_host(host);
627} 627}
628 628
629static int sdhci_s3c_resume(struct platform_device *dev) 629static int sdhci_s3c_resume(struct device *dev)
630{ 630{
631 struct sdhci_host *host = platform_get_drvdata(dev); 631 struct sdhci_host *host = dev_get_drvdata(dev);
632 632
633 return sdhci_resume_host(host); 633 return sdhci_resume_host(host);
634} 634}
635 635
636static const struct dev_pm_ops sdhci_s3c_pmops = {
637 .suspend = sdhci_s3c_suspend,
638 .resume = sdhci_s3c_resume,
639};
640
641#define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
642
636#else 643#else
637#define sdhci_s3c_suspend NULL 644#define SDHCI_S3C_PMOPS NULL
638#define sdhci_s3c_resume NULL
639#endif 645#endif
640 646
641static struct platform_driver sdhci_s3c_driver = { 647static struct platform_driver sdhci_s3c_driver = {
@@ -644,6 +650,7 @@ static struct platform_driver sdhci_s3c_driver = {
644 .driver = { 650 .driver = {
645 .owner = THIS_MODULE, 651 .owner = THIS_MODULE,
646 .name = "s3c-sdhci", 652 .name = "s3c-sdhci",
653 .pm = SDHCI_S3C_PMOPS,
647 }, 654 },
648}; 655};
649 656
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 89699e861fc1..e2e18d3f949c 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -318,13 +318,10 @@ static struct platform_driver sdhci_tegra_driver = {
318 .name = "sdhci-tegra", 318 .name = "sdhci-tegra",
319 .owner = THIS_MODULE, 319 .owner = THIS_MODULE,
320 .of_match_table = sdhci_tegra_dt_match, 320 .of_match_table = sdhci_tegra_dt_match,
321 .pm = SDHCI_PLTFM_PMOPS,
321 }, 322 },
322 .probe = sdhci_tegra_probe, 323 .probe = sdhci_tegra_probe,
323 .remove = __devexit_p(sdhci_tegra_remove), 324 .remove = __devexit_p(sdhci_tegra_remove),
324#ifdef CONFIG_PM
325 .suspend = sdhci_pltfm_suspend,
326 .resume = sdhci_pltfm_resume,
327#endif
328}; 325};
329 326
330static int __init sdhci_tegra_init(void) 327static int __init sdhci_tegra_init(void)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 6d8eea323541..19ed580f2cab 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2327,7 +2327,7 @@ out:
2327 2327
2328#ifdef CONFIG_PM 2328#ifdef CONFIG_PM
2329 2329
2330int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) 2330int sdhci_suspend_host(struct sdhci_host *host)
2331{ 2331{
2332 int ret; 2332 int ret;
2333 2333
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 0a5b65460d8a..a04d4d0c6fd2 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -374,7 +374,7 @@ extern int sdhci_add_host(struct sdhci_host *host);
374extern void sdhci_remove_host(struct sdhci_host *host, int dead); 374extern void sdhci_remove_host(struct sdhci_host *host, int dead);
375 375
376#ifdef CONFIG_PM 376#ifdef CONFIG_PM
377extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); 377extern int sdhci_suspend_host(struct sdhci_host *host);
378extern int sdhci_resume_host(struct sdhci_host *host); 378extern int sdhci_resume_host(struct sdhci_host *host);
379extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); 379extern void sdhci_enable_irq_wakeups(struct sdhci_host *host);
380#endif 380#endif
diff --git a/drivers/mmc/host/vub300.c b/drivers/mmc/host/vub300.c
index e8f6e65183d7..2ec978bc32ba 100644
--- a/drivers/mmc/host/vub300.c
+++ b/drivers/mmc/host/vub300.c
@@ -259,7 +259,7 @@ static int firmware_rom_wait_states = 0x04;
259static int firmware_rom_wait_states = 0x1C; 259static int firmware_rom_wait_states = 0x1C;
260#endif 260#endif
261 261
262module_param(firmware_rom_wait_states, bool, 0644); 262module_param(firmware_rom_wait_states, int, 0644);
263MODULE_PARM_DESC(firmware_rom_wait_states, 263MODULE_PARM_DESC(firmware_rom_wait_states,
264 "ROM wait states byte=RRRIIEEE (Reserved Internal External)"); 264 "ROM wait states byte=RRRIIEEE (Reserved Internal External)");
265 265
diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c
index 94f553489725..45876d0e5b8e 100644
--- a/drivers/mtd/maps/plat-ram.c
+++ b/drivers/mtd/maps/plat-ram.c
@@ -227,10 +227,14 @@ static int platram_probe(struct platform_device *pdev)
227 if (!err) 227 if (!err)
228 dev_info(&pdev->dev, "registered mtd device\n"); 228 dev_info(&pdev->dev, "registered mtd device\n");
229 229
230 /* add the whole device. */ 230 if (pdata->nr_partitions) {
231 err = mtd_device_register(info->mtd, NULL, 0); 231 /* add the whole device. */
232 if (err) 232 err = mtd_device_register(info->mtd, NULL, 0);
233 dev_err(&pdev->dev, "failed to register the entire device\n"); 233 if (err) {
234 dev_err(&pdev->dev,
235 "failed to register the entire device\n");
236 }
237 }
234 238
235 return err; 239 return err;
236 240
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 411a17df9fc1..2a25b6789af4 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -98,7 +98,7 @@ static int __devinit pxa2xx_flash_probe(struct platform_device *pdev)
98 } 98 }
99 info->mtd->owner = THIS_MODULE; 99 info->mtd->owner = THIS_MODULE;
100 100
101 mtd_device_parse_register(info->mtd, probes, 0, NULL, 0); 101 mtd_device_parse_register(info->mtd, probes, 0, flash->parts, flash->nr_parts);
102 102
103 platform_set_drvdata(pdev, info); 103 platform_set_drvdata(pdev, info);
104 return 0; 104 return 0;
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 23e5d77c39fc..4dd056e2e16a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -113,7 +113,7 @@ static int cpu_has_dma(void)
113 */ 113 */
114static void atmel_nand_enable(struct atmel_nand_host *host) 114static void atmel_nand_enable(struct atmel_nand_host *host)
115{ 115{
116 if (host->board->enable_pin) 116 if (gpio_is_valid(host->board->enable_pin))
117 gpio_set_value(host->board->enable_pin, 0); 117 gpio_set_value(host->board->enable_pin, 0);
118} 118}
119 119
@@ -122,7 +122,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
122 */ 122 */
123static void atmel_nand_disable(struct atmel_nand_host *host) 123static void atmel_nand_disable(struct atmel_nand_host *host)
124{ 124{
125 if (host->board->enable_pin) 125 if (gpio_is_valid(host->board->enable_pin))
126 gpio_set_value(host->board->enable_pin, 1); 126 gpio_set_value(host->board->enable_pin, 1);
127} 127}
128 128
@@ -492,7 +492,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
492 nand_chip->IO_ADDR_W = host->io_base; 492 nand_chip->IO_ADDR_W = host->io_base;
493 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; 493 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
494 494
495 if (host->board->rdy_pin) 495 if (gpio_is_valid(host->board->rdy_pin))
496 nand_chip->dev_ready = atmel_nand_device_ready; 496 nand_chip->dev_ready = atmel_nand_device_ready;
497 497
498 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); 498 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -530,7 +530,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
530 platform_set_drvdata(pdev, host); 530 platform_set_drvdata(pdev, host);
531 atmel_nand_enable(host); 531 atmel_nand_enable(host);
532 532
533 if (host->board->det_pin) { 533 if (gpio_is_valid(host->board->det_pin)) {
534 if (gpio_get_value(host->board->det_pin)) { 534 if (gpio_get_value(host->board->det_pin)) {
535 printk(KERN_INFO "No SmartMedia card inserted.\n"); 535 printk(KERN_INFO "No SmartMedia card inserted.\n");
536 res = -ENXIO; 536 res = -ENXIO;
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 071b63420f0e..493ec2fcf97f 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -21,9 +21,9 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/module.h>
24#include <linux/mtd/gpmi-nand.h> 25#include <linux/mtd/gpmi-nand.h>
25#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
26
27#include "gpmi-nand.h" 27#include "gpmi-nand.h"
28 28
29/* add our owner bbt descriptor */ 29/* add our owner bbt descriptor */
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index ee1713907b92..f8aacf48ecdd 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -188,7 +188,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
188 if (!flash_np) 188 if (!flash_np)
189 return -ENODEV; 189 return -ENODEV;
190 190
191 ppdata->of_node = flash_np; 191 ppdata.of_node = flash_np;
192 ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s", 192 ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s",
193 dev_name(&ndfc->ofdev->dev), flash_np->name); 193 dev_name(&ndfc->ofdev->dev), flash_np->name);
194 if (!ndfc->mtd.name) { 194 if (!ndfc->mtd.name) {
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c
index c7b60839ac99..dea0cb4400e2 100644
--- a/drivers/net/ethernet/marvell/skge.c
+++ b/drivers/net/ethernet/marvell/skge.c
@@ -2606,6 +2606,9 @@ static int skge_up(struct net_device *dev)
2606 spin_unlock_irq(&hw->hw_lock); 2606 spin_unlock_irq(&hw->hw_lock);
2607 2607
2608 napi_enable(&skge->napi); 2608 napi_enable(&skge->napi);
2609
2610 skge_set_multicast(dev);
2611
2609 return 0; 2612 return 0;
2610 2613
2611 free_tx_ring: 2614 free_tx_ring:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index 227997d775e8..5829e0b47e7e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -147,6 +147,7 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
147 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); 147 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
148 if (priv->mdev->dev->caps.comp_pool && cq->vector) 148 if (priv->mdev->dev->caps.comp_pool && cq->vector)
149 mlx4_release_eq(priv->mdev->dev, cq->vector); 149 mlx4_release_eq(priv->mdev->dev, cq->vector);
150 cq->vector = 0;
150 cq->buf_size = 0; 151 cq->buf_size = 0;
151 cq->buf = NULL; 152 cq->buf = NULL;
152} 153}
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 67bf07819992..c8f47f17186f 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -477,7 +477,6 @@ enum rtl_register_content {
477 /* Config1 register p.24 */ 477 /* Config1 register p.24 */
478 LEDS1 = (1 << 7), 478 LEDS1 = (1 << 7),
479 LEDS0 = (1 << 6), 479 LEDS0 = (1 << 6),
480 MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */
481 Speed_down = (1 << 4), 480 Speed_down = (1 << 4),
482 MEMMAP = (1 << 3), 481 MEMMAP = (1 << 3),
483 IOMAP = (1 << 2), 482 IOMAP = (1 << 2),
@@ -485,6 +484,7 @@ enum rtl_register_content {
485 PMEnable = (1 << 0), /* Power Management Enable */ 484 PMEnable = (1 << 0), /* Power Management Enable */
486 485
487 /* Config2 register p. 25 */ 486 /* Config2 register p. 25 */
487 MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */
488 PCI_Clock_66MHz = 0x01, 488 PCI_Clock_66MHz = 0x01,
489 PCI_Clock_33MHz = 0x00, 489 PCI_Clock_33MHz = 0x00,
490 490
@@ -3426,22 +3426,24 @@ static const struct rtl_cfg_info {
3426}; 3426};
3427 3427
3428/* Cfg9346_Unlock assumed. */ 3428/* Cfg9346_Unlock assumed. */
3429static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, 3429static unsigned rtl_try_msi(struct rtl8169_private *tp,
3430 const struct rtl_cfg_info *cfg) 3430 const struct rtl_cfg_info *cfg)
3431{ 3431{
3432 void __iomem *ioaddr = tp->mmio_addr;
3432 unsigned msi = 0; 3433 unsigned msi = 0;
3433 u8 cfg2; 3434 u8 cfg2;
3434 3435
3435 cfg2 = RTL_R8(Config2) & ~MSIEnable; 3436 cfg2 = RTL_R8(Config2) & ~MSIEnable;
3436 if (cfg->features & RTL_FEATURE_MSI) { 3437 if (cfg->features & RTL_FEATURE_MSI) {
3437 if (pci_enable_msi(pdev)) { 3438 if (pci_enable_msi(tp->pci_dev)) {
3438 dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); 3439 netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
3439 } else { 3440 } else {
3440 cfg2 |= MSIEnable; 3441 cfg2 |= MSIEnable;
3441 msi = RTL_FEATURE_MSI; 3442 msi = RTL_FEATURE_MSI;
3442 } 3443 }
3443 } 3444 }
3444 RTL_W8(Config2, cfg2); 3445 if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
3446 RTL_W8(Config2, cfg2);
3445 return msi; 3447 return msi;
3446} 3448}
3447 3449
@@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4077 tp->features |= RTL_FEATURE_WOL; 4079 tp->features |= RTL_FEATURE_WOL;
4078 if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) 4080 if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
4079 tp->features |= RTL_FEATURE_WOL; 4081 tp->features |= RTL_FEATURE_WOL;
4080 tp->features |= rtl_try_msi(pdev, ioaddr, cfg); 4082 tp->features |= rtl_try_msi(tp, cfg);
4081 RTL_W8(Cfg9346, Cfg9346_Lock); 4083 RTL_W8(Cfg9346, Cfg9346_Lock);
4082 4084
4083 if (rtl_tbi_enabled(tp)) { 4085 if (rtl_tbi_enabled(tp)) {
diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c
index dca9d3369cdd..c97d2f590855 100644
--- a/drivers/net/ethernet/ti/davinci_cpdma.c
+++ b/drivers/net/ethernet/ti/davinci_cpdma.c
@@ -836,11 +836,13 @@ int cpdma_chan_stop(struct cpdma_chan *chan)
836 chan_write(chan, cp, CPDMA_TEARDOWN_VALUE); 836 chan_write(chan, cp, CPDMA_TEARDOWN_VALUE);
837 837
838 /* handle completed packets */ 838 /* handle completed packets */
839 spin_unlock_irqrestore(&chan->lock, flags);
839 do { 840 do {
840 ret = __cpdma_chan_process(chan); 841 ret = __cpdma_chan_process(chan);
841 if (ret < 0) 842 if (ret < 0)
842 break; 843 break;
843 } while ((ret & CPDMA_DESC_TD_COMPLETE) == 0); 844 } while ((ret & CPDMA_DESC_TD_COMPLETE) == 0);
845 spin_lock_irqsave(&chan->lock, flags);
844 846
845 /* remaining packets haven't been tx/rx'ed, clean them up */ 847 /* remaining packets haven't been tx/rx'ed, clean them up */
846 while (chan->head) { 848 while (chan->head) {
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index e6fed4d4cb77..e95f0e60a9bc 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -1655,6 +1655,10 @@ static const struct usb_device_id products [] = {
1655 // ASIX 88772a 1655 // ASIX 88772a
1656 USB_DEVICE(0x0db0, 0xa877), 1656 USB_DEVICE(0x0db0, 0xa877),
1657 .driver_info = (unsigned long) &ax88772_info, 1657 .driver_info = (unsigned long) &ax88772_info,
1658}, {
1659 // Asus USB Ethernet Adapter
1660 USB_DEVICE (0x0b95, 0x7e2b),
1661 .driver_info = (unsigned long) &ax88772_info,
1658}, 1662},
1659 { }, // END 1663 { }, // END
1660}; 1664};
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 888abc2be3a5..528d5f3e868c 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -1271,7 +1271,9 @@ static void ath_rc_init(struct ath_softc *sc,
1271 1271
1272 ath_rc_priv->max_valid_rate = k; 1272 ath_rc_priv->max_valid_rate = k;
1273 ath_rc_sort_validrates(rate_table, ath_rc_priv); 1273 ath_rc_sort_validrates(rate_table, ath_rc_priv);
1274 ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; 1274 ath_rc_priv->rate_max_phy = (k > 4) ?
1275 ath_rc_priv->valid_rate_index[k-4] :
1276 ath_rc_priv->valid_rate_index[k-1];
1275 ath_rc_priv->rate_table = rate_table; 1277 ath_rc_priv->rate_table = rate_table;
1276 1278
1277 ath_dbg(common, ATH_DBG_CONFIG, 1279 ath_dbg(common, ATH_DBG_CONFIG,
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
index a7a6def40d05..5c7c17c7166a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
@@ -606,8 +606,8 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
606 if (ctx->ht.enabled) { 606 if (ctx->ht.enabled) {
607 /* if HT40 is used, it should not change 607 /* if HT40 is used, it should not change
608 * after associated except channel switch */ 608 * after associated except channel switch */
609 if (iwl_is_associated_ctx(ctx) && 609 if (!ctx->ht.is_40mhz ||
610 !ctx->ht.is_40mhz) 610 !iwl_is_associated_ctx(ctx))
611 iwlagn_config_ht40(conf, ctx); 611 iwlagn_config_ht40(conf, ctx);
612 } else 612 } else
613 ctx->ht.is_40mhz = false; 613 ctx->ht.is_40mhz = false;
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
index 35a6b71f358c..df1540ca6102 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
@@ -91,7 +91,10 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
91 tx_cmd->tid_tspec = qc[0] & 0xf; 91 tx_cmd->tid_tspec = qc[0] & 0xf;
92 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 92 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
93 } else { 93 } else {
94 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 94 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
95 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
96 else
97 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
95 } 98 }
96 99
97 iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags); 100 iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index bacc06c95e7a..e0e9a3dfbc00 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -2850,6 +2850,9 @@ static int iwlagn_mac_tx_sync(struct ieee80211_hw *hw,
2850 int ret; 2850 int ret;
2851 u8 sta_id; 2851 u8 sta_id;
2852 2852
2853 if (ctx->ctxid != IWL_RXON_CTX_PAN)
2854 return 0;
2855
2853 IWL_DEBUG_MAC80211(priv, "enter\n"); 2856 IWL_DEBUG_MAC80211(priv, "enter\n");
2854 mutex_lock(&priv->shrd->mutex); 2857 mutex_lock(&priv->shrd->mutex);
2855 2858
@@ -2898,6 +2901,9 @@ static void iwlagn_mac_finish_tx_sync(struct ieee80211_hw *hw,
2898 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 2901 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2899 struct iwl_rxon_context *ctx = vif_priv->ctx; 2902 struct iwl_rxon_context *ctx = vif_priv->ctx;
2900 2903
2904 if (ctx->ctxid != IWL_RXON_CTX_PAN)
2905 return;
2906
2901 IWL_DEBUG_MAC80211(priv, "enter\n"); 2907 IWL_DEBUG_MAC80211(priv, "enter\n");
2902 mutex_lock(&priv->shrd->mutex); 2908 mutex_lock(&priv->shrd->mutex);
2903 2909
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c
index ce918980e977..5f17ab8e76ba 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c
@@ -1197,9 +1197,7 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
1197 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); 1197 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
1198 1198
1199 /* Set up entry for this TFD in Tx byte-count array */ 1199 /* Set up entry for this TFD in Tx byte-count array */
1200 if (is_agg) 1200 iwl_trans_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len));
1201 iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
1202 le16_to_cpu(tx_cmd->len));
1203 1201
1204 dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen, 1202 dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
1205 DMA_BIDIRECTIONAL); 1203 DMA_BIDIRECTIONAL);
diff --git a/drivers/net/wireless/mwifiex/cmdevt.c b/drivers/net/wireless/mwifiex/cmdevt.c
index ac278156d390..6e0a3eaecf70 100644
--- a/drivers/net/wireless/mwifiex/cmdevt.c
+++ b/drivers/net/wireless/mwifiex/cmdevt.c
@@ -939,7 +939,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
939{ 939{
940 struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL; 940 struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL;
941 unsigned long cmd_flags; 941 unsigned long cmd_flags;
942 unsigned long cmd_pending_q_flags;
943 unsigned long scan_pending_q_flags; 942 unsigned long scan_pending_q_flags;
944 uint16_t cancel_scan_cmd = false; 943 uint16_t cancel_scan_cmd = false;
945 944
@@ -949,12 +948,9 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
949 cmd_node = adapter->curr_cmd; 948 cmd_node = adapter->curr_cmd;
950 cmd_node->wait_q_enabled = false; 949 cmd_node->wait_q_enabled = false;
951 cmd_node->cmd_flag |= CMD_F_CANCELED; 950 cmd_node->cmd_flag |= CMD_F_CANCELED;
952 spin_lock_irqsave(&adapter->cmd_pending_q_lock,
953 cmd_pending_q_flags);
954 list_del(&cmd_node->list);
955 spin_unlock_irqrestore(&adapter->cmd_pending_q_lock,
956 cmd_pending_q_flags);
957 mwifiex_insert_cmd_to_free_q(adapter, cmd_node); 951 mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
952 mwifiex_complete_cmd(adapter, adapter->curr_cmd);
953 adapter->curr_cmd = NULL;
958 spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); 954 spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
959 } 955 }
960 956
@@ -981,7 +977,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
981 spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); 977 spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
982 } 978 }
983 adapter->cmd_wait_q.status = -1; 979 adapter->cmd_wait_q.status = -1;
984 mwifiex_complete_cmd(adapter, adapter->curr_cmd);
985} 980}
986 981
987/* 982/*
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index cbd5d701c7e0..63b3ec48c203 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -314,7 +314,7 @@ static const struct of_dev_auxdata *of_dev_lookup(const struct of_dev_auxdata *l
314 if (!lookup) 314 if (!lookup)
315 return NULL; 315 return NULL;
316 316
317 for(; lookup->name != NULL; lookup++) { 317 for(; lookup->compatible != NULL; lookup++) {
318 if (!of_device_is_compatible(np, lookup->compatible)) 318 if (!of_device_is_compatible(np, lookup->compatible))
319 continue; 319 continue;
320 if (of_address_to_resource(np, 0, &res)) 320 if (of_address_to_resource(np, 0, &res))
diff --git a/drivers/oprofile/oprofile_files.c b/drivers/oprofile/oprofile_files.c
index 89f63456646f..84a208dbed93 100644
--- a/drivers/oprofile/oprofile_files.c
+++ b/drivers/oprofile/oprofile_files.c
@@ -45,7 +45,7 @@ static ssize_t timeout_write(struct file *file, char const __user *buf,
45 return -EINVAL; 45 return -EINVAL;
46 46
47 retval = oprofilefs_ulong_from_user(&val, buf, count); 47 retval = oprofilefs_ulong_from_user(&val, buf, count);
48 if (retval) 48 if (retval <= 0)
49 return retval; 49 return retval;
50 50
51 retval = oprofile_set_timeout(val); 51 retval = oprofile_set_timeout(val);
@@ -84,7 +84,7 @@ static ssize_t depth_write(struct file *file, char const __user *buf, size_t cou
84 return -EINVAL; 84 return -EINVAL;
85 85
86 retval = oprofilefs_ulong_from_user(&val, buf, count); 86 retval = oprofilefs_ulong_from_user(&val, buf, count);
87 if (retval) 87 if (retval <= 0)
88 return retval; 88 return retval;
89 89
90 retval = oprofile_set_ulong(&oprofile_backtrace_depth, val); 90 retval = oprofile_set_ulong(&oprofile_backtrace_depth, val);
@@ -141,9 +141,10 @@ static ssize_t enable_write(struct file *file, char const __user *buf, size_t co
141 return -EINVAL; 141 return -EINVAL;
142 142
143 retval = oprofilefs_ulong_from_user(&val, buf, count); 143 retval = oprofilefs_ulong_from_user(&val, buf, count);
144 if (retval) 144 if (retval <= 0)
145 return retval; 145 return retval;
146 146
147 retval = 0;
147 if (val) 148 if (val)
148 retval = oprofile_start(); 149 retval = oprofile_start();
149 else 150 else
diff --git a/drivers/oprofile/oprofilefs.c b/drivers/oprofile/oprofilefs.c
index d0de6cc2d7a5..2f0aa0f700e6 100644
--- a/drivers/oprofile/oprofilefs.c
+++ b/drivers/oprofile/oprofilefs.c
@@ -60,6 +60,13 @@ ssize_t oprofilefs_ulong_to_user(unsigned long val, char __user *buf, size_t cou
60} 60}
61 61
62 62
63/*
64 * Note: If oprofilefs_ulong_from_user() returns 0, then *val remains
65 * unchanged and might be uninitialized. This follows write syscall
66 * implementation when count is zero: "If count is zero ... [and if]
67 * no errors are detected, 0 will be returned without causing any
68 * other effect." (man 2 write)
69 */
63int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_t count) 70int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_t count)
64{ 71{
65 char tmpbuf[TMPBUFSIZE]; 72 char tmpbuf[TMPBUFSIZE];
@@ -79,7 +86,7 @@ int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_
79 raw_spin_lock_irqsave(&oprofilefs_lock, flags); 86 raw_spin_lock_irqsave(&oprofilefs_lock, flags);
80 *val = simple_strtoul(tmpbuf, NULL, 0); 87 *val = simple_strtoul(tmpbuf, NULL, 0);
81 raw_spin_unlock_irqrestore(&oprofilefs_lock, flags); 88 raw_spin_unlock_irqrestore(&oprofilefs_lock, flags);
82 return 0; 89 return count;
83} 90}
84 91
85 92
@@ -99,7 +106,7 @@ static ssize_t ulong_write_file(struct file *file, char const __user *buf, size_
99 return -EINVAL; 106 return -EINVAL;
100 107
101 retval = oprofilefs_ulong_from_user(&value, buf, count); 108 retval = oprofilefs_ulong_from_user(&value, buf, count);
102 if (retval) 109 if (retval <= 0)
103 return retval; 110 return retval;
104 111
105 retval = oprofile_set_ulong(file->private_data, value); 112 retval = oprofile_set_ulong(file->private_data, value);
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 7ec56fb0bd78..b0dd08e6a9da 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -13,6 +13,7 @@
13#include <linux/export.h> 13#include <linux/export.h>
14#include <linux/pci-ats.h> 14#include <linux/pci-ats.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/slab.h>
16 17
17#include "pci.h" 18#include "pci.h"
18 19
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index fce1c54a0c8d..9ddf69e3bbef 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -132,6 +132,18 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
132 if (!acpi_pci_check_ejectable(pbus, handle) && !is_dock_device(handle)) 132 if (!acpi_pci_check_ejectable(pbus, handle) && !is_dock_device(handle))
133 return AE_OK; 133 return AE_OK;
134 134
135 pdev = pbus->self;
136 if (pdev && pci_is_pcie(pdev)) {
137 tmp = acpi_find_root_bridge_handle(pdev);
138 if (tmp) {
139 struct acpi_pci_root *root = acpi_pci_find_root(tmp);
140
141 if (root && (root->osc_control_set &
142 OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
143 return AE_OK;
144 }
145 }
146
135 acpi_evaluate_integer(handle, "_ADR", NULL, &adr); 147 acpi_evaluate_integer(handle, "_ADR", NULL, &adr);
136 device = (adr >> 16) & 0xffff; 148 device = (adr >> 16) & 0xffff;
137 function = adr & 0xffff; 149 function = adr & 0xffff;
@@ -213,7 +225,6 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
213 225
214 pdev = pci_get_slot(pbus, PCI_DEVFN(device, function)); 226 pdev = pci_get_slot(pbus, PCI_DEVFN(device, function));
215 if (pdev) { 227 if (pdev) {
216 pdev->current_state = PCI_D0;
217 slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON); 228 slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON);
218 pci_dev_put(pdev); 229 pci_dev_put(pdev);
219 } 230 }
@@ -459,17 +470,8 @@ static int add_bridge(acpi_handle handle)
459{ 470{
460 acpi_status status; 471 acpi_status status;
461 unsigned long long tmp; 472 unsigned long long tmp;
462 struct acpi_pci_root *root;
463 acpi_handle dummy_handle; 473 acpi_handle dummy_handle;
464 474
465 /*
466 * We shouldn't use this bridge if PCIe native hotplug control has been
467 * granted by the BIOS for it.
468 */
469 root = acpi_pci_find_root(handle);
470 if (root && (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
471 return -ENODEV;
472
473 /* if the bridge doesn't have _STA, we assume it is always there */ 475 /* if the bridge doesn't have _STA, we assume it is always there */
474 status = acpi_get_handle(handle, "_STA", &dummy_handle); 476 status = acpi_get_handle(handle, "_STA", &dummy_handle);
475 if (ACPI_SUCCESS(status)) { 477 if (ACPI_SUCCESS(status)) {
@@ -1385,19 +1387,11 @@ static void handle_hotplug_event_func(acpi_handle handle, u32 type,
1385static acpi_status 1387static acpi_status
1386find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) 1388find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv)
1387{ 1389{
1388 struct acpi_pci_root *root;
1389 int *count = (int *)context; 1390 int *count = (int *)context;
1390 1391
1391 if (!acpi_is_root_bridge(handle)) 1392 if (!acpi_is_root_bridge(handle))
1392 return AE_OK; 1393 return AE_OK;
1393 1394
1394 root = acpi_pci_find_root(handle);
1395 if (!root)
1396 return AE_OK;
1397
1398 if (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
1399 return AE_OK;
1400
1401 (*count)++; 1395 (*count)++;
1402 acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY, 1396 acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY,
1403 handle_hotplug_event_bridge, NULL); 1397 handle_hotplug_event_bridge, NULL);
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index b82c155d7b37..1969a3ee3058 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -283,6 +283,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
283 struct resource *res; 283 struct resource *res;
284 struct pci_dev *pdev; 284 struct pci_dev *pdev;
285 struct pci_sriov *iov = dev->sriov; 285 struct pci_sriov *iov = dev->sriov;
286 int bars = 0;
286 287
287 if (!nr_virtfn) 288 if (!nr_virtfn)
288 return 0; 289 return 0;
@@ -307,6 +308,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
307 308
308 nres = 0; 309 nres = 0;
309 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 310 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
311 bars |= (1 << (i + PCI_IOV_RESOURCES));
310 res = dev->resource + PCI_IOV_RESOURCES + i; 312 res = dev->resource + PCI_IOV_RESOURCES + i;
311 if (res->parent) 313 if (res->parent)
312 nres++; 314 nres++;
@@ -324,6 +326,11 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
324 return -ENOMEM; 326 return -ENOMEM;
325 } 327 }
326 328
329 if (pci_enable_resources(dev, bars)) {
330 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
331 return -ENOMEM;
332 }
333
327 if (iov->link != dev->devfn) { 334 if (iov->link != dev->devfn) {
328 pdev = pci_get_slot(dev->bus, iov->link); 335 pdev = pci_get_slot(dev->bus, iov->link);
329 if (!pdev) 336 if (!pdev)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6f45a73c6e9f..6d4a5319148d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -664,6 +664,9 @@ static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state)
664 error = platform_pci_set_power_state(dev, state); 664 error = platform_pci_set_power_state(dev, state);
665 if (!error) 665 if (!error)
666 pci_update_current_state(dev, state); 666 pci_update_current_state(dev, state);
667 /* Fall back to PCI_D0 if native PM is not supported */
668 if (!dev->pm_cap)
669 dev->current_state = PCI_D0;
667 } else { 670 } else {
668 error = -ENODEV; 671 error = -ENODEV;
669 /* Fall back to PCI_D0 if native PM is not supported */ 672 /* Fall back to PCI_D0 if native PM is not supported */
@@ -1126,7 +1129,11 @@ static int __pci_enable_device_flags(struct pci_dev *dev,
1126 if (atomic_add_return(1, &dev->enable_cnt) > 1) 1129 if (atomic_add_return(1, &dev->enable_cnt) > 1)
1127 return 0; /* already enabled */ 1130 return 0; /* already enabled */
1128 1131
1129 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 1132 /* only skip sriov related */
1133 for (i = 0; i <= PCI_ROM_RESOURCE; i++)
1134 if (dev->resource[i].flags & flags)
1135 bars |= (1 << i);
1136 for (i = PCI_BRIDGE_RESOURCES; i < DEVICE_COUNT_RESOURCE; i++)
1130 if (dev->resource[i].flags & flags) 1137 if (dev->resource[i].flags & flags)
1131 bars |= (1 << i); 1138 bars |= (1 << i);
1132 1139
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index fa4d9f324189..3bcc7cfcaba7 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -73,6 +73,8 @@ int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm)
73 err = -EINVAL; 73 err = -EINVAL;
74 74
75 mutex_unlock(&rtc->ops_lock); 75 mutex_unlock(&rtc->ops_lock);
76 /* A timer might have just expired */
77 schedule_work(&rtc->irqwork);
76 return err; 78 return err;
77} 79}
78EXPORT_SYMBOL_GPL(rtc_set_time); 80EXPORT_SYMBOL_GPL(rtc_set_time);
@@ -112,6 +114,8 @@ int rtc_set_mmss(struct rtc_device *rtc, unsigned long secs)
112 err = -EINVAL; 114 err = -EINVAL;
113 115
114 mutex_unlock(&rtc->ops_lock); 116 mutex_unlock(&rtc->ops_lock);
117 /* A timer might have just expired */
118 schedule_work(&rtc->irqwork);
115 119
116 return err; 120 return err;
117} 121}
@@ -403,6 +407,8 @@ int rtc_initialize_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
403 timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node); 407 timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node);
404 } 408 }
405 mutex_unlock(&rtc->ops_lock); 409 mutex_unlock(&rtc->ops_lock);
410 /* maybe that was in the past.*/
411 schedule_work(&rtc->irqwork);
406 return err; 412 return err;
407} 413}
408EXPORT_SYMBOL_GPL(rtc_initialize_alarm); 414EXPORT_SYMBOL_GPL(rtc_initialize_alarm);
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index e39b77a4609a..dc474bc6522d 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -32,11 +32,17 @@
32 32
33#include <mach/at91_rtc.h> 33#include <mach/at91_rtc.h>
34 34
35#define at91_rtc_read(field) \
36 __raw_readl(at91_rtc_regs + field)
37#define at91_rtc_write(field, val) \
38 __raw_writel((val), at91_rtc_regs + field)
35 39
36#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ 40#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */
37 41
38static DECLARE_COMPLETION(at91_rtc_updated); 42static DECLARE_COMPLETION(at91_rtc_updated);
39static unsigned int at91_alarm_year = AT91_RTC_EPOCH; 43static unsigned int at91_alarm_year = AT91_RTC_EPOCH;
44static void __iomem *at91_rtc_regs;
45static int irq;
40 46
41/* 47/*
42 * Decode time/date into rtc_time structure 48 * Decode time/date into rtc_time structure
@@ -48,10 +54,10 @@ static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
48 54
49 /* must read twice in case it changes */ 55 /* must read twice in case it changes */
50 do { 56 do {
51 time = at91_sys_read(timereg); 57 time = at91_rtc_read(timereg);
52 date = at91_sys_read(calreg); 58 date = at91_rtc_read(calreg);
53 } while ((time != at91_sys_read(timereg)) || 59 } while ((time != at91_rtc_read(timereg)) ||
54 (date != at91_sys_read(calreg))); 60 (date != at91_rtc_read(calreg)));
55 61
56 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); 62 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
57 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); 63 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
@@ -98,19 +104,19 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
98 tm->tm_hour, tm->tm_min, tm->tm_sec); 104 tm->tm_hour, tm->tm_min, tm->tm_sec);
99 105
100 /* Stop Time/Calendar from counting */ 106 /* Stop Time/Calendar from counting */
101 cr = at91_sys_read(AT91_RTC_CR); 107 cr = at91_rtc_read(AT91_RTC_CR);
102 at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); 108 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);
103 109
104 at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); 110 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD);
105 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ 111 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */
106 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); 112 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD);
107 113
108 at91_sys_write(AT91_RTC_TIMR, 114 at91_rtc_write(AT91_RTC_TIMR,
109 bin2bcd(tm->tm_sec) << 0 115 bin2bcd(tm->tm_sec) << 0
110 | bin2bcd(tm->tm_min) << 8 116 | bin2bcd(tm->tm_min) << 8
111 | bin2bcd(tm->tm_hour) << 16); 117 | bin2bcd(tm->tm_hour) << 16);
112 118
113 at91_sys_write(AT91_RTC_CALR, 119 at91_rtc_write(AT91_RTC_CALR,
114 bin2bcd((tm->tm_year + 1900) / 100) /* century */ 120 bin2bcd((tm->tm_year + 1900) / 100) /* century */
115 | bin2bcd(tm->tm_year % 100) << 8 /* year */ 121 | bin2bcd(tm->tm_year % 100) << 8 /* year */
116 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ 122 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */
@@ -118,8 +124,8 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
118 | bin2bcd(tm->tm_mday) << 24); 124 | bin2bcd(tm->tm_mday) << 24);
119 125
120 /* Restart Time/Calendar */ 126 /* Restart Time/Calendar */
121 cr = at91_sys_read(AT91_RTC_CR); 127 cr = at91_rtc_read(AT91_RTC_CR);
122 at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); 128 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
123 129
124 return 0; 130 return 0;
125} 131}
@@ -135,7 +141,7 @@ static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
135 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); 141 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
136 tm->tm_year = at91_alarm_year - 1900; 142 tm->tm_year = at91_alarm_year - 1900;
137 143
138 alrm->enabled = (at91_sys_read(AT91_RTC_IMR) & AT91_RTC_ALARM) 144 alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM)
139 ? 1 : 0; 145 ? 1 : 0;
140 146
141 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 147 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
@@ -160,20 +166,20 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
160 tm.tm_min = alrm->time.tm_min; 166 tm.tm_min = alrm->time.tm_min;
161 tm.tm_sec = alrm->time.tm_sec; 167 tm.tm_sec = alrm->time.tm_sec;
162 168
163 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); 169 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);
164 at91_sys_write(AT91_RTC_TIMALR, 170 at91_rtc_write(AT91_RTC_TIMALR,
165 bin2bcd(tm.tm_sec) << 0 171 bin2bcd(tm.tm_sec) << 0
166 | bin2bcd(tm.tm_min) << 8 172 | bin2bcd(tm.tm_min) << 8
167 | bin2bcd(tm.tm_hour) << 16 173 | bin2bcd(tm.tm_hour) << 16
168 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); 174 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
169 at91_sys_write(AT91_RTC_CALALR, 175 at91_rtc_write(AT91_RTC_CALALR,
170 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ 176 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */
171 | bin2bcd(tm.tm_mday) << 24 177 | bin2bcd(tm.tm_mday) << 24
172 | AT91_RTC_DATEEN | AT91_RTC_MTHEN); 178 | AT91_RTC_DATEEN | AT91_RTC_MTHEN);
173 179
174 if (alrm->enabled) { 180 if (alrm->enabled) {
175 at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 181 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
176 at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); 182 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
177 } 183 }
178 184
179 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 185 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
@@ -188,10 +194,10 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
188 pr_debug("%s(): cmd=%08x\n", __func__, enabled); 194 pr_debug("%s(): cmd=%08x\n", __func__, enabled);
189 195
190 if (enabled) { 196 if (enabled) {
191 at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 197 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
192 at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); 198 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
193 } else 199 } else
194 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); 200 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);
195 201
196 return 0; 202 return 0;
197} 203}
@@ -200,7 +206,7 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
200 */ 206 */
201static int at91_rtc_proc(struct device *dev, struct seq_file *seq) 207static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
202{ 208{
203 unsigned long imr = at91_sys_read(AT91_RTC_IMR); 209 unsigned long imr = at91_rtc_read(AT91_RTC_IMR);
204 210
205 seq_printf(seq, "update_IRQ\t: %s\n", 211 seq_printf(seq, "update_IRQ\t: %s\n",
206 (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); 212 (imr & AT91_RTC_ACKUPD) ? "yes" : "no");
@@ -220,7 +226,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
220 unsigned int rtsr; 226 unsigned int rtsr;
221 unsigned long events = 0; 227 unsigned long events = 0;
222 228
223 rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); 229 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR);
224 if (rtsr) { /* this interrupt is shared! Is it ours? */ 230 if (rtsr) { /* this interrupt is shared! Is it ours? */
225 if (rtsr & AT91_RTC_ALARM) 231 if (rtsr & AT91_RTC_ALARM)
226 events |= (RTC_AF | RTC_IRQF); 232 events |= (RTC_AF | RTC_IRQF);
@@ -229,7 +235,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
229 if (rtsr & AT91_RTC_ACKUPD) 235 if (rtsr & AT91_RTC_ACKUPD)
230 complete(&at91_rtc_updated); 236 complete(&at91_rtc_updated);
231 237
232 at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ 238 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
233 239
234 rtc_update_irq(rtc, 1, events); 240 rtc_update_irq(rtc, 1, events);
235 241
@@ -256,22 +262,41 @@ static const struct rtc_class_ops at91_rtc_ops = {
256static int __init at91_rtc_probe(struct platform_device *pdev) 262static int __init at91_rtc_probe(struct platform_device *pdev)
257{ 263{
258 struct rtc_device *rtc; 264 struct rtc_device *rtc;
259 int ret; 265 struct resource *regs;
266 int ret = 0;
260 267
261 at91_sys_write(AT91_RTC_CR, 0); 268 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
262 at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ 269 if (!regs) {
270 dev_err(&pdev->dev, "no mmio resource defined\n");
271 return -ENXIO;
272 }
273
274 irq = platform_get_irq(pdev, 0);
275 if (irq < 0) {
276 dev_err(&pdev->dev, "no irq resource defined\n");
277 return -ENXIO;
278 }
279
280 at91_rtc_regs = ioremap(regs->start, resource_size(regs));
281 if (!at91_rtc_regs) {
282 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
283 return -ENOMEM;
284 }
285
286 at91_rtc_write(AT91_RTC_CR, 0);
287 at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
263 288
264 /* Disable all interrupts */ 289 /* Disable all interrupts */
265 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 290 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
266 AT91_RTC_SECEV | AT91_RTC_TIMEV | 291 AT91_RTC_SECEV | AT91_RTC_TIMEV |
267 AT91_RTC_CALEV); 292 AT91_RTC_CALEV);
268 293
269 ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, 294 ret = request_irq(irq, at91_rtc_interrupt,
270 IRQF_SHARED, 295 IRQF_SHARED,
271 "at91_rtc", pdev); 296 "at91_rtc", pdev);
272 if (ret) { 297 if (ret) {
273 printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", 298 printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n",
274 AT91_ID_SYS); 299 irq);
275 return ret; 300 return ret;
276 } 301 }
277 302
@@ -284,7 +309,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
284 rtc = rtc_device_register(pdev->name, &pdev->dev, 309 rtc = rtc_device_register(pdev->name, &pdev->dev,
285 &at91_rtc_ops, THIS_MODULE); 310 &at91_rtc_ops, THIS_MODULE);
286 if (IS_ERR(rtc)) { 311 if (IS_ERR(rtc)) {
287 free_irq(AT91_ID_SYS, pdev); 312 free_irq(irq, pdev);
288 return PTR_ERR(rtc); 313 return PTR_ERR(rtc);
289 } 314 }
290 platform_set_drvdata(pdev, rtc); 315 platform_set_drvdata(pdev, rtc);
@@ -301,10 +326,10 @@ static int __exit at91_rtc_remove(struct platform_device *pdev)
301 struct rtc_device *rtc = platform_get_drvdata(pdev); 326 struct rtc_device *rtc = platform_get_drvdata(pdev);
302 327
303 /* Disable all interrupts */ 328 /* Disable all interrupts */
304 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 329 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
305 AT91_RTC_SECEV | AT91_RTC_TIMEV | 330 AT91_RTC_SECEV | AT91_RTC_TIMEV |
306 AT91_RTC_CALEV); 331 AT91_RTC_CALEV);
307 free_irq(AT91_ID_SYS, pdev); 332 free_irq(irq, pdev);
308 333
309 rtc_device_unregister(rtc); 334 rtc_device_unregister(rtc);
310 platform_set_drvdata(pdev, NULL); 335 platform_set_drvdata(pdev, NULL);
@@ -323,13 +348,13 @@ static int at91_rtc_suspend(struct device *dev)
323 /* this IRQ is shared with DBGU and other hardware which isn't 348 /* this IRQ is shared with DBGU and other hardware which isn't
324 * necessarily doing PM like we are... 349 * necessarily doing PM like we are...
325 */ 350 */
326 at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) 351 at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR)
327 & (AT91_RTC_ALARM|AT91_RTC_SECEV); 352 & (AT91_RTC_ALARM|AT91_RTC_SECEV);
328 if (at91_rtc_imr) { 353 if (at91_rtc_imr) {
329 if (device_may_wakeup(dev)) 354 if (device_may_wakeup(dev))
330 enable_irq_wake(AT91_ID_SYS); 355 enable_irq_wake(irq);
331 else 356 else
332 at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); 357 at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr);
333 } 358 }
334 return 0; 359 return 0;
335} 360}
@@ -338,9 +363,9 @@ static int at91_rtc_resume(struct device *dev)
338{ 363{
339 if (at91_rtc_imr) { 364 if (at91_rtc_imr) {
340 if (device_may_wakeup(dev)) 365 if (device_may_wakeup(dev))
341 disable_irq_wake(AT91_ID_SYS); 366 disable_irq_wake(irq);
342 else 367 else
343 at91_sys_write(AT91_RTC_IER, at91_rtc_imr); 368 at91_rtc_write(AT91_RTC_IER, at91_rtc_imr);
344 } 369 }
345 return 0; 370 return 0;
346} 371}
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c
index eda128fc1d38..64aedd8cc095 100644
--- a/drivers/rtc/rtc-m41t80.c
+++ b/drivers/rtc/rtc-m41t80.c
@@ -357,10 +357,19 @@ static int m41t80_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *t)
357static struct rtc_class_ops m41t80_rtc_ops = { 357static struct rtc_class_ops m41t80_rtc_ops = {
358 .read_time = m41t80_rtc_read_time, 358 .read_time = m41t80_rtc_read_time,
359 .set_time = m41t80_rtc_set_time, 359 .set_time = m41t80_rtc_set_time,
360 /*
361 * XXX - m41t80 alarm functionality is reported broken.
362 * until it is fixed, don't register alarm functions.
363 *
360 .read_alarm = m41t80_rtc_read_alarm, 364 .read_alarm = m41t80_rtc_read_alarm,
361 .set_alarm = m41t80_rtc_set_alarm, 365 .set_alarm = m41t80_rtc_set_alarm,
366 */
362 .proc = m41t80_rtc_proc, 367 .proc = m41t80_rtc_proc,
368 /*
369 * See above comment on broken alarm
370 *
363 .alarm_irq_enable = m41t80_rtc_alarm_irq_enable, 371 .alarm_irq_enable = m41t80_rtc_alarm_irq_enable,
372 */
364}; 373};
365 374
366#if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) 375#if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 11f07f888223..b79576b64f45 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -55,6 +55,10 @@ static void zfcp_scsi_slave_destroy(struct scsi_device *sdev)
55{ 55{
56 struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); 56 struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev);
57 57
58 /* if previous slave_alloc returned early, there is nothing to do */
59 if (!zfcp_sdev->port)
60 return;
61
58 zfcp_erp_lun_shutdown_wait(sdev, "scssd_1"); 62 zfcp_erp_lun_shutdown_wait(sdev, "scssd_1");
59 put_device(&zfcp_sdev->port->dev); 63 put_device(&zfcp_sdev->port->dev);
60} 64}
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c
index dba72a4e6a1c..1ad0b8225560 100644
--- a/drivers/scsi/bnx2i/bnx2i_hwi.c
+++ b/drivers/scsi/bnx2i/bnx2i_hwi.c
@@ -1906,18 +1906,19 @@ static int bnx2i_queue_scsi_cmd_resp(struct iscsi_session *session,
1906 spin_lock(&session->lock); 1906 spin_lock(&session->lock);
1907 task = iscsi_itt_to_task(bnx2i_conn->cls_conn->dd_data, 1907 task = iscsi_itt_to_task(bnx2i_conn->cls_conn->dd_data,
1908 cqe->itt & ISCSI_CMD_RESPONSE_INDEX); 1908 cqe->itt & ISCSI_CMD_RESPONSE_INDEX);
1909 if (!task) { 1909 if (!task || !task->sc) {
1910 spin_unlock(&session->lock); 1910 spin_unlock(&session->lock);
1911 return -EINVAL; 1911 return -EINVAL;
1912 } 1912 }
1913 sc = task->sc; 1913 sc = task->sc;
1914 spin_unlock(&session->lock);
1915 1914
1916 if (!blk_rq_cpu_valid(sc->request)) 1915 if (!blk_rq_cpu_valid(sc->request))
1917 cpu = smp_processor_id(); 1916 cpu = smp_processor_id();
1918 else 1917 else
1919 cpu = sc->request->cpu; 1918 cpu = sc->request->cpu;
1920 1919
1920 spin_unlock(&session->lock);
1921
1921 p = &per_cpu(bnx2i_percpu, cpu); 1922 p = &per_cpu(bnx2i_percpu, cpu);
1922 spin_lock(&p->p_work_lock); 1923 spin_lock(&p->p_work_lock);
1923 if (unlikely(!p->iothread)) { 1924 if (unlikely(!p->iothread)) {
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c
index cefbe44bb84a..8d67467dd9ce 100644
--- a/drivers/scsi/fcoe/fcoe.c
+++ b/drivers/scsi/fcoe/fcoe.c
@@ -31,6 +31,8 @@
31#include <linux/sysfs.h> 31#include <linux/sysfs.h>
32#include <linux/ctype.h> 32#include <linux/ctype.h>
33#include <linux/workqueue.h> 33#include <linux/workqueue.h>
34#include <net/dcbnl.h>
35#include <net/dcbevent.h>
34#include <scsi/scsi_tcq.h> 36#include <scsi/scsi_tcq.h>
35#include <scsi/scsicam.h> 37#include <scsi/scsicam.h>
36#include <scsi/scsi_transport.h> 38#include <scsi/scsi_transport.h>
@@ -101,6 +103,8 @@ static int fcoe_ddp_done(struct fc_lport *, u16);
101static int fcoe_ddp_target(struct fc_lport *, u16, struct scatterlist *, 103static int fcoe_ddp_target(struct fc_lport *, u16, struct scatterlist *,
102 unsigned int); 104 unsigned int);
103static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *); 105static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *);
106static int fcoe_dcb_app_notification(struct notifier_block *notifier,
107 ulong event, void *ptr);
104 108
105static bool fcoe_match(struct net_device *netdev); 109static bool fcoe_match(struct net_device *netdev);
106static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode); 110static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode);
@@ -129,6 +133,11 @@ static struct notifier_block fcoe_cpu_notifier = {
129 .notifier_call = fcoe_cpu_callback, 133 .notifier_call = fcoe_cpu_callback,
130}; 134};
131 135
136/* notification function for DCB events */
137static struct notifier_block dcb_notifier = {
138 .notifier_call = fcoe_dcb_app_notification,
139};
140
132static struct scsi_transport_template *fcoe_nport_scsi_transport; 141static struct scsi_transport_template *fcoe_nport_scsi_transport;
133static struct scsi_transport_template *fcoe_vport_scsi_transport; 142static struct scsi_transport_template *fcoe_vport_scsi_transport;
134 143
@@ -1522,6 +1531,8 @@ int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp)
1522 skb_reset_network_header(skb); 1531 skb_reset_network_header(skb);
1523 skb->mac_len = elen; 1532 skb->mac_len = elen;
1524 skb->protocol = htons(ETH_P_FCOE); 1533 skb->protocol = htons(ETH_P_FCOE);
1534 skb->priority = port->priority;
1535
1525 if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN && 1536 if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN &&
1526 fcoe->realdev->features & NETIF_F_HW_VLAN_TX) { 1537 fcoe->realdev->features & NETIF_F_HW_VLAN_TX) {
1527 skb->vlan_tci = VLAN_TAG_PRESENT | 1538 skb->vlan_tci = VLAN_TAG_PRESENT |
@@ -1624,6 +1635,7 @@ static inline int fcoe_filter_frames(struct fc_lport *lport,
1624 stats->InvalidCRCCount++; 1635 stats->InvalidCRCCount++;
1625 if (stats->InvalidCRCCount < 5) 1636 if (stats->InvalidCRCCount < 5)
1626 printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); 1637 printk(KERN_WARNING "fcoe: dropping frame with CRC error\n");
1638 put_cpu();
1627 return -EINVAL; 1639 return -EINVAL;
1628} 1640}
1629 1641
@@ -1746,6 +1758,7 @@ int fcoe_percpu_receive_thread(void *arg)
1746 */ 1758 */
1747static void fcoe_dev_setup(void) 1759static void fcoe_dev_setup(void)
1748{ 1760{
1761 register_dcbevent_notifier(&dcb_notifier);
1749 register_netdevice_notifier(&fcoe_notifier); 1762 register_netdevice_notifier(&fcoe_notifier);
1750} 1763}
1751 1764
@@ -1754,9 +1767,69 @@ static void fcoe_dev_setup(void)
1754 */ 1767 */
1755static void fcoe_dev_cleanup(void) 1768static void fcoe_dev_cleanup(void)
1756{ 1769{
1770 unregister_dcbevent_notifier(&dcb_notifier);
1757 unregister_netdevice_notifier(&fcoe_notifier); 1771 unregister_netdevice_notifier(&fcoe_notifier);
1758} 1772}
1759 1773
1774static struct fcoe_interface *
1775fcoe_hostlist_lookup_realdev_port(struct net_device *netdev)
1776{
1777 struct fcoe_interface *fcoe;
1778 struct net_device *real_dev;
1779
1780 list_for_each_entry(fcoe, &fcoe_hostlist, list) {
1781 if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN)
1782 real_dev = vlan_dev_real_dev(fcoe->netdev);
1783 else
1784 real_dev = fcoe->netdev;
1785
1786 if (netdev == real_dev)
1787 return fcoe;
1788 }
1789 return NULL;
1790}
1791
1792static int fcoe_dcb_app_notification(struct notifier_block *notifier,
1793 ulong event, void *ptr)
1794{
1795 struct dcb_app_type *entry = ptr;
1796 struct fcoe_interface *fcoe;
1797 struct net_device *netdev;
1798 struct fcoe_port *port;
1799 int prio;
1800
1801 if (entry->app.selector != DCB_APP_IDTYPE_ETHTYPE)
1802 return NOTIFY_OK;
1803
1804 netdev = dev_get_by_index(&init_net, entry->ifindex);
1805 if (!netdev)
1806 return NOTIFY_OK;
1807
1808 fcoe = fcoe_hostlist_lookup_realdev_port(netdev);
1809 dev_put(netdev);
1810 if (!fcoe)
1811 return NOTIFY_OK;
1812
1813 if (entry->dcbx & DCB_CAP_DCBX_VER_CEE)
1814 prio = ffs(entry->app.priority) - 1;
1815 else
1816 prio = entry->app.priority;
1817
1818 if (prio < 0)
1819 return NOTIFY_OK;
1820
1821 if (entry->app.protocol == ETH_P_FIP ||
1822 entry->app.protocol == ETH_P_FCOE)
1823 fcoe->ctlr.priority = prio;
1824
1825 if (entry->app.protocol == ETH_P_FCOE) {
1826 port = lport_priv(fcoe->ctlr.lp);
1827 port->priority = prio;
1828 }
1829
1830 return NOTIFY_OK;
1831}
1832
1760/** 1833/**
1761 * fcoe_device_notification() - Handler for net device events 1834 * fcoe_device_notification() - Handler for net device events
1762 * @notifier: The context of the notification 1835 * @notifier: The context of the notification
@@ -1965,6 +2038,46 @@ static bool fcoe_match(struct net_device *netdev)
1965} 2038}
1966 2039
1967/** 2040/**
2041 * fcoe_dcb_create() - Initialize DCB attributes and hooks
2042 * @netdev: The net_device object of the L2 link that should be queried
2043 * @port: The fcoe_port to bind FCoE APP priority with
2044 * @
2045 */
2046static void fcoe_dcb_create(struct fcoe_interface *fcoe)
2047{
2048#ifdef CONFIG_DCB
2049 int dcbx;
2050 u8 fup, up;
2051 struct net_device *netdev = fcoe->realdev;
2052 struct fcoe_port *port = lport_priv(fcoe->ctlr.lp);
2053 struct dcb_app app = {
2054 .priority = 0,
2055 .protocol = ETH_P_FCOE
2056 };
2057
2058 /* setup DCB priority attributes. */
2059 if (netdev && netdev->dcbnl_ops && netdev->dcbnl_ops->getdcbx) {
2060 dcbx = netdev->dcbnl_ops->getdcbx(netdev);
2061
2062 if (dcbx & DCB_CAP_DCBX_VER_IEEE) {
2063 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
2064 up = dcb_ieee_getapp_mask(netdev, &app);
2065 app.protocol = ETH_P_FIP;
2066 fup = dcb_ieee_getapp_mask(netdev, &app);
2067 } else {
2068 app.selector = DCB_APP_IDTYPE_ETHTYPE;
2069 up = dcb_getapp(netdev, &app);
2070 app.protocol = ETH_P_FIP;
2071 fup = dcb_getapp(netdev, &app);
2072 }
2073
2074 port->priority = ffs(up) ? ffs(up) - 1 : 0;
2075 fcoe->ctlr.priority = ffs(fup) ? ffs(fup) - 1 : port->priority;
2076 }
2077#endif
2078}
2079
2080/**
1968 * fcoe_create() - Create a fcoe interface 2081 * fcoe_create() - Create a fcoe interface
1969 * @netdev : The net_device object the Ethernet interface to create on 2082 * @netdev : The net_device object the Ethernet interface to create on
1970 * @fip_mode: The FIP mode for this creation 2083 * @fip_mode: The FIP mode for this creation
@@ -2007,6 +2120,9 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode)
2007 /* Make this the "master" N_Port */ 2120 /* Make this the "master" N_Port */
2008 fcoe->ctlr.lp = lport; 2121 fcoe->ctlr.lp = lport;
2009 2122
2123 /* setup DCB priority attributes. */
2124 fcoe_dcb_create(fcoe);
2125
2010 /* add to lports list */ 2126 /* add to lports list */
2011 fcoe_hostlist_add(lport); 2127 fcoe_hostlist_add(lport);
2012 2128
diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c
index c74c4b8e71ef..e7522dcc296e 100644
--- a/drivers/scsi/fcoe/fcoe_ctlr.c
+++ b/drivers/scsi/fcoe/fcoe_ctlr.c
@@ -320,6 +320,7 @@ static void fcoe_ctlr_solicit(struct fcoe_ctlr *fip, struct fcoe_fcf *fcf)
320 320
321 skb_put(skb, sizeof(*sol)); 321 skb_put(skb, sizeof(*sol));
322 skb->protocol = htons(ETH_P_FIP); 322 skb->protocol = htons(ETH_P_FIP);
323 skb->priority = fip->priority;
323 skb_reset_mac_header(skb); 324 skb_reset_mac_header(skb);
324 skb_reset_network_header(skb); 325 skb_reset_network_header(skb);
325 fip->send(fip, skb); 326 fip->send(fip, skb);
@@ -474,6 +475,7 @@ static void fcoe_ctlr_send_keep_alive(struct fcoe_ctlr *fip,
474 } 475 }
475 skb_put(skb, len); 476 skb_put(skb, len);
476 skb->protocol = htons(ETH_P_FIP); 477 skb->protocol = htons(ETH_P_FIP);
478 skb->priority = fip->priority;
477 skb_reset_mac_header(skb); 479 skb_reset_mac_header(skb);
478 skb_reset_network_header(skb); 480 skb_reset_network_header(skb);
479 fip->send(fip, skb); 481 fip->send(fip, skb);
@@ -566,6 +568,7 @@ static int fcoe_ctlr_encaps(struct fcoe_ctlr *fip, struct fc_lport *lport,
566 cap->fip.fip_dl_len = htons(dlen / FIP_BPW); 568 cap->fip.fip_dl_len = htons(dlen / FIP_BPW);
567 569
568 skb->protocol = htons(ETH_P_FIP); 570 skb->protocol = htons(ETH_P_FIP);
571 skb->priority = fip->priority;
569 skb_reset_mac_header(skb); 572 skb_reset_mac_header(skb);
570 skb_reset_network_header(skb); 573 skb_reset_network_header(skb);
571 return 0; 574 return 0;
@@ -1911,6 +1914,7 @@ static void fcoe_ctlr_vn_send(struct fcoe_ctlr *fip,
1911 1914
1912 skb_put(skb, len); 1915 skb_put(skb, len);
1913 skb->protocol = htons(ETH_P_FIP); 1916 skb->protocol = htons(ETH_P_FIP);
1917 skb->priority = fip->priority;
1914 skb_reset_mac_header(skb); 1918 skb_reset_mac_header(skb);
1915 skb_reset_network_header(skb); 1919 skb_reset_network_header(skb);
1916 1920
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
index 4e041f6d808c..d570573b7963 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -4335,7 +4335,7 @@ _scsih_smart_predicted_fault(struct MPT2SAS_ADAPTER *ioc, u16 handle)
4335 /* insert into event log */ 4335 /* insert into event log */
4336 sz = offsetof(Mpi2EventNotificationReply_t, EventData) + 4336 sz = offsetof(Mpi2EventNotificationReply_t, EventData) +
4337 sizeof(Mpi2EventDataSasDeviceStatusChange_t); 4337 sizeof(Mpi2EventDataSasDeviceStatusChange_t);
4338 event_reply = kzalloc(sz, GFP_KERNEL); 4338 event_reply = kzalloc(sz, GFP_ATOMIC);
4339 if (!event_reply) { 4339 if (!event_reply) {
4340 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 4340 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
4341 ioc->name, __FILE__, __LINE__, __func__); 4341 ioc->name, __FILE__, __LINE__, __func__);
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index ac326c41e931..6465dae5883a 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -1762,12 +1762,31 @@ qla2x00_get_host_port_state(struct Scsi_Host *shost)
1762 scsi_qla_host_t *vha = shost_priv(shost); 1762 scsi_qla_host_t *vha = shost_priv(shost);
1763 struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev); 1763 struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev);
1764 1764
1765 if (!base_vha->flags.online) 1765 if (!base_vha->flags.online) {
1766 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE; 1766 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
1767 else if (atomic_read(&base_vha->loop_state) == LOOP_TIMEOUT) 1767 return;
1768 fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN; 1768 }
1769 else 1769
1770 switch (atomic_read(&base_vha->loop_state)) {
1771 case LOOP_UPDATE:
1772 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
1773 break;
1774 case LOOP_DOWN:
1775 if (test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags))
1776 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
1777 else
1778 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
1779 break;
1780 case LOOP_DEAD:
1781 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
1782 break;
1783 case LOOP_READY:
1770 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE; 1784 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
1785 break;
1786 default:
1787 fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN;
1788 break;
1789 }
1771} 1790}
1772 1791
1773static int 1792static int
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index 9df4787715c0..f3cddd5800c3 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -12,17 +12,17 @@
12 * | Level | Last Value Used | Holes | 12 * | Level | Last Value Used | Holes |
13 * ---------------------------------------------------------------------- 13 * ----------------------------------------------------------------------
14 * | Module Init and Probe | 0x0116 | | 14 * | Module Init and Probe | 0x0116 | |
15 * | Mailbox commands | 0x1129 | | 15 * | Mailbox commands | 0x112b | |
16 * | Device Discovery | 0x2083 | | 16 * | Device Discovery | 0x2083 | |
17 * | Queue Command and IO tracing | 0x302e | 0x3008 | 17 * | Queue Command and IO tracing | 0x302e | 0x3008 |
18 * | DPC Thread | 0x401c | | 18 * | DPC Thread | 0x401c | |
19 * | Async Events | 0x5059 | | 19 * | Async Events | 0x5059 | |
20 * | Timer Routines | 0x600d | | 20 * | Timer Routines | 0x6010 | 0x600e,0x600f |
21 * | User Space Interactions | 0x709d | | 21 * | User Space Interactions | 0x709d | |
22 * | Task Management | 0x8041 | | 22 * | Task Management | 0x8041 | 0x800b |
23 * | AER/EEH | 0x900f | | 23 * | AER/EEH | 0x900f | |
24 * | Virtual Port | 0xa007 | | 24 * | Virtual Port | 0xa007 | |
25 * | ISP82XX Specific | 0xb051 | | 25 * | ISP82XX Specific | 0xb052 | |
26 * | MultiQ | 0xc00b | | 26 * | MultiQ | 0xc00b | |
27 * | Misc | 0xd00b | | 27 * | Misc | 0xd00b | |
28 * ---------------------------------------------------------------------- 28 * ----------------------------------------------------------------------
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index ce32d8135c9e..c0c11afb685c 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -578,6 +578,7 @@ extern int qla82xx_check_md_needed(scsi_qla_host_t *);
578extern void qla82xx_chip_reset_cleanup(scsi_qla_host_t *); 578extern void qla82xx_chip_reset_cleanup(scsi_qla_host_t *);
579extern int qla82xx_mbx_beacon_ctl(scsi_qla_host_t *, int); 579extern int qla82xx_mbx_beacon_ctl(scsi_qla_host_t *, int);
580extern char *qdev_state(uint32_t); 580extern char *qdev_state(uint32_t);
581extern void qla82xx_clear_pending_mbx(scsi_qla_host_t *);
581 582
582/* BSG related functions */ 583/* BSG related functions */
583extern int qla24xx_bsg_request(struct fc_bsg_job *); 584extern int qla24xx_bsg_request(struct fc_bsg_job *);
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index f03e915f1877..54ea68cec4c5 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1509,7 +1509,8 @@ enable_82xx_npiv:
1509 &ha->fw_xcb_count, NULL, NULL, 1509 &ha->fw_xcb_count, NULL, NULL,
1510 &ha->max_npiv_vports, NULL); 1510 &ha->max_npiv_vports, NULL);
1511 1511
1512 if (!fw_major_version && ql2xallocfwdump) 1512 if (!fw_major_version && ql2xallocfwdump
1513 && !IS_QLA82XX(ha))
1513 qla2x00_alloc_fw_dump(vha); 1514 qla2x00_alloc_fw_dump(vha);
1514 } 1515 }
1515 } else { 1516 } else {
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c
index dbec89622a0f..a4b267e60a35 100644
--- a/drivers/scsi/qla2xxx/qla_iocb.c
+++ b/drivers/scsi/qla2xxx/qla_iocb.c
@@ -120,11 +120,10 @@ qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
120 * Returns a pointer to the continuation type 1 IOCB packet. 120 * Returns a pointer to the continuation type 1 IOCB packet.
121 */ 121 */
122static inline cont_a64_entry_t * 122static inline cont_a64_entry_t *
123qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha) 123qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
124{ 124{
125 cont_a64_entry_t *cont_pkt; 125 cont_a64_entry_t *cont_pkt;
126 126
127 struct req_que *req = vha->req;
128 /* Adjust ring index. */ 127 /* Adjust ring index. */
129 req->ring_index++; 128 req->ring_index++;
130 if (req->ring_index == req->length) { 129 if (req->ring_index == req->length) {
@@ -292,7 +291,7 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
292 * Five DSDs are available in the Continuation 291 * Five DSDs are available in the Continuation
293 * Type 1 IOCB. 292 * Type 1 IOCB.
294 */ 293 */
295 cont_pkt = qla2x00_prep_cont_type1_iocb(vha); 294 cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
296 cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; 295 cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
297 avail_dsds = 5; 296 avail_dsds = 5;
298 } 297 }
@@ -684,7 +683,7 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
684 * Five DSDs are available in the Continuation 683 * Five DSDs are available in the Continuation
685 * Type 1 IOCB. 684 * Type 1 IOCB.
686 */ 685 */
687 cont_pkt = qla2x00_prep_cont_type1_iocb(vha); 686 cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
688 cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; 687 cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
689 avail_dsds = 5; 688 avail_dsds = 5;
690 } 689 }
@@ -2070,7 +2069,8 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
2070 * Five DSDs are available in the Cont. 2069 * Five DSDs are available in the Cont.
2071 * Type 1 IOCB. 2070 * Type 1 IOCB.
2072 */ 2071 */
2073 cont_pkt = qla2x00_prep_cont_type1_iocb(vha); 2072 cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
2073 vha->hw->req_q_map[0]);
2074 cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; 2074 cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
2075 avail_dsds = 5; 2075 avail_dsds = 5;
2076 cont_iocb_prsnt = 1; 2076 cont_iocb_prsnt = 1;
@@ -2096,6 +2096,7 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
2096 int index; 2096 int index;
2097 uint16_t tot_dsds; 2097 uint16_t tot_dsds;
2098 scsi_qla_host_t *vha = sp->fcport->vha; 2098 scsi_qla_host_t *vha = sp->fcport->vha;
2099 struct qla_hw_data *ha = vha->hw;
2099 struct fc_bsg_job *bsg_job = ((struct srb_ctx *)sp->ctx)->u.bsg_job; 2100 struct fc_bsg_job *bsg_job = ((struct srb_ctx *)sp->ctx)->u.bsg_job;
2100 int loop_iterartion = 0; 2101 int loop_iterartion = 0;
2101 int cont_iocb_prsnt = 0; 2102 int cont_iocb_prsnt = 0;
@@ -2141,7 +2142,8 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
2141 * Five DSDs are available in the Cont. 2142 * Five DSDs are available in the Cont.
2142 * Type 1 IOCB. 2143 * Type 1 IOCB.
2143 */ 2144 */
2144 cont_pkt = qla2x00_prep_cont_type1_iocb(vha); 2145 cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
2146 ha->req_q_map[0]);
2145 cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; 2147 cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
2146 avail_dsds = 5; 2148 avail_dsds = 5;
2147 cont_iocb_prsnt = 1; 2149 cont_iocb_prsnt = 1;
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 2516adf1aeea..7b91b290ffd6 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -1741,7 +1741,7 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1741 resid, scsi_bufflen(cp)); 1741 resid, scsi_bufflen(cp));
1742 1742
1743 cp->result = DID_ERROR << 16 | lscsi_status; 1743 cp->result = DID_ERROR << 16 | lscsi_status;
1744 break; 1744 goto check_scsi_status;
1745 } 1745 }
1746 1746
1747 if (!lscsi_status && 1747 if (!lscsi_status &&
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 3b3cec9f6ac2..82a33533ed26 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -79,8 +79,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
79 mcp->mb[0] = MBS_LINK_DOWN_ERROR; 79 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
80 ql_log(ql_log_warn, base_vha, 0x1004, 80 ql_log(ql_log_warn, base_vha, 0x1004,
81 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); 81 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
82 rval = QLA_FUNCTION_FAILED; 82 return QLA_FUNCTION_TIMEOUT;
83 goto premature_exit;
84 } 83 }
85 84
86 /* 85 /*
@@ -163,6 +162,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
163 HINT_MBX_INT_PENDING) { 162 HINT_MBX_INT_PENDING) {
164 spin_unlock_irqrestore(&ha->hardware_lock, 163 spin_unlock_irqrestore(&ha->hardware_lock,
165 flags); 164 flags);
165 ha->flags.mbox_busy = 0;
166 ql_dbg(ql_dbg_mbx, base_vha, 0x1010, 166 ql_dbg(ql_dbg_mbx, base_vha, 0x1010,
167 "Pending mailbox timeout, exiting.\n"); 167 "Pending mailbox timeout, exiting.\n");
168 rval = QLA_FUNCTION_TIMEOUT; 168 rval = QLA_FUNCTION_TIMEOUT;
@@ -188,6 +188,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
188 HINT_MBX_INT_PENDING) { 188 HINT_MBX_INT_PENDING) {
189 spin_unlock_irqrestore(&ha->hardware_lock, 189 spin_unlock_irqrestore(&ha->hardware_lock,
190 flags); 190 flags);
191 ha->flags.mbox_busy = 0;
191 ql_dbg(ql_dbg_mbx, base_vha, 0x1012, 192 ql_dbg(ql_dbg_mbx, base_vha, 0x1012,
192 "Pending mailbox timeout, exiting.\n"); 193 "Pending mailbox timeout, exiting.\n");
193 rval = QLA_FUNCTION_TIMEOUT; 194 rval = QLA_FUNCTION_TIMEOUT;
@@ -302,7 +303,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
302 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 303 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
303 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 304 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
304 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 305 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
305 306 if (IS_QLA82XX(ha)) {
307 ql_dbg(ql_dbg_mbx, vha, 0x112a,
308 "disabling pause transmit on port "
309 "0 & 1.\n");
310 qla82xx_wr_32(ha,
311 QLA82XX_CRB_NIU + 0x98,
312 CRB_NIU_XG_PAUSE_CTL_P0|
313 CRB_NIU_XG_PAUSE_CTL_P1);
314 }
306 ql_log(ql_log_info, base_vha, 0x101c, 315 ql_log(ql_log_info, base_vha, 0x101c,
307 "Mailbox cmd timeout occured. " 316 "Mailbox cmd timeout occured. "
308 "Scheduling ISP abort eeh_busy=0x%x.\n", 317 "Scheduling ISP abort eeh_busy=0x%x.\n",
@@ -318,7 +327,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
318 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 327 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
319 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 328 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
320 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 329 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
321 330 if (IS_QLA82XX(ha)) {
331 ql_dbg(ql_dbg_mbx, vha, 0x112b,
332 "disabling pause transmit on port "
333 "0 & 1.\n");
334 qla82xx_wr_32(ha,
335 QLA82XX_CRB_NIU + 0x98,
336 CRB_NIU_XG_PAUSE_CTL_P0|
337 CRB_NIU_XG_PAUSE_CTL_P1);
338 }
322 ql_log(ql_log_info, base_vha, 0x101e, 339 ql_log(ql_log_info, base_vha, 0x101e,
323 "Mailbox cmd timeout occured. " 340 "Mailbox cmd timeout occured. "
324 "Scheduling ISP abort.\n"); 341 "Scheduling ISP abort.\n");
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c
index 94bded5ddce4..03554934b0a5 100644
--- a/drivers/scsi/qla2xxx/qla_nx.c
+++ b/drivers/scsi/qla2xxx/qla_nx.c
@@ -3817,6 +3817,20 @@ exit:
3817 return rval; 3817 return rval;
3818} 3818}
3819 3819
3820void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha)
3821{
3822 struct qla_hw_data *ha = vha->hw;
3823
3824 if (ha->flags.mbox_busy) {
3825 ha->flags.mbox_int = 1;
3826 ha->flags.mbox_busy = 0;
3827 ql_log(ql_log_warn, vha, 0x6010,
3828 "Doing premature completion of mbx command.\n");
3829 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags))
3830 complete(&ha->mbx_intr_comp);
3831 }
3832}
3833
3820void qla82xx_watchdog(scsi_qla_host_t *vha) 3834void qla82xx_watchdog(scsi_qla_host_t *vha)
3821{ 3835{
3822 uint32_t dev_state, halt_status; 3836 uint32_t dev_state, halt_status;
@@ -3839,9 +3853,13 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)
3839 qla2xxx_wake_dpc(vha); 3853 qla2xxx_wake_dpc(vha);
3840 } else { 3854 } else {
3841 if (qla82xx_check_fw_alive(vha)) { 3855 if (qla82xx_check_fw_alive(vha)) {
3856 ql_dbg(ql_dbg_timer, vha, 0x6011,
3857 "disabling pause transmit on port 0 & 1.\n");
3858 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
3859 CRB_NIU_XG_PAUSE_CTL_P0|CRB_NIU_XG_PAUSE_CTL_P1);
3842 halt_status = qla82xx_rd_32(ha, 3860 halt_status = qla82xx_rd_32(ha,
3843 QLA82XX_PEG_HALT_STATUS1); 3861 QLA82XX_PEG_HALT_STATUS1);
3844 ql_dbg(ql_dbg_timer, vha, 0x6005, 3862 ql_log(ql_log_info, vha, 0x6005,
3845 "dumping hw/fw registers:.\n " 3863 "dumping hw/fw registers:.\n "
3846 " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " 3864 " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n "
3847 " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " 3865 " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n "
@@ -3858,6 +3876,11 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)
3858 QLA82XX_CRB_PEG_NET_3 + 0x3c), 3876 QLA82XX_CRB_PEG_NET_3 + 0x3c),
3859 qla82xx_rd_32(ha, 3877 qla82xx_rd_32(ha,
3860 QLA82XX_CRB_PEG_NET_4 + 0x3c)); 3878 QLA82XX_CRB_PEG_NET_4 + 0x3c));
3879 if (LSW(MSB(halt_status)) == 0x67)
3880 ql_log(ql_log_warn, vha, 0xb052,
3881 "Firmware aborted with "
3882 "error code 0x00006700. Device is "
3883 "being reset.\n");
3861 if (halt_status & HALT_STATUS_UNRECOVERABLE) { 3884 if (halt_status & HALT_STATUS_UNRECOVERABLE) {
3862 set_bit(ISP_UNRECOVERABLE, 3885 set_bit(ISP_UNRECOVERABLE,
3863 &vha->dpc_flags); 3886 &vha->dpc_flags);
@@ -3869,16 +3892,8 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)
3869 } 3892 }
3870 qla2xxx_wake_dpc(vha); 3893 qla2xxx_wake_dpc(vha);
3871 ha->flags.isp82xx_fw_hung = 1; 3894 ha->flags.isp82xx_fw_hung = 1;
3872 if (ha->flags.mbox_busy) { 3895 ql_log(ql_log_warn, vha, 0x6007, "Firmware hung.\n");
3873 ha->flags.mbox_int = 1; 3896 qla82xx_clear_pending_mbx(vha);
3874 ql_log(ql_log_warn, vha, 0x6007,
3875 "Due to FW hung, doing "
3876 "premature completion of mbx "
3877 "command.\n");
3878 if (test_bit(MBX_INTR_WAIT,
3879 &ha->mbx_cmd_flags))
3880 complete(&ha->mbx_intr_comp);
3881 }
3882 } 3897 }
3883 } 3898 }
3884 } 3899 }
@@ -4073,10 +4088,7 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha)
4073 msleep(1000); 4088 msleep(1000);
4074 if (qla82xx_check_fw_alive(vha)) { 4089 if (qla82xx_check_fw_alive(vha)) {
4075 ha->flags.isp82xx_fw_hung = 1; 4090 ha->flags.isp82xx_fw_hung = 1;
4076 if (ha->flags.mbox_busy) { 4091 qla82xx_clear_pending_mbx(vha);
4077 ha->flags.mbox_int = 1;
4078 complete(&ha->mbx_intr_comp);
4079 }
4080 break; 4092 break;
4081 } 4093 }
4082 } 4094 }
diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h
index 57820c199bc2..57a226be339a 100644
--- a/drivers/scsi/qla2xxx/qla_nx.h
+++ b/drivers/scsi/qla2xxx/qla_nx.h
@@ -1173,4 +1173,8 @@ struct qla82xx_md_entry_queue {
1173 1173
1174static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC, 1174static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC,
1175 0x410000B8, 0x410000BC }; 1175 0x410000B8, 0x410000BC };
1176
1177#define CRB_NIU_XG_PAUSE_CTL_P0 0x1
1178#define CRB_NIU_XG_PAUSE_CTL_P1 0x8
1179
1176#endif 1180#endif
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index fd14c7bfc626..f9e5b85e84d8 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -201,12 +201,12 @@ MODULE_PARM_DESC(ql2xmdcapmask,
201 "Set the Minidump driver capture mask level. " 201 "Set the Minidump driver capture mask level. "
202 "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F."); 202 "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
203 203
204int ql2xmdenable; 204int ql2xmdenable = 1;
205module_param(ql2xmdenable, int, S_IRUGO); 205module_param(ql2xmdenable, int, S_IRUGO);
206MODULE_PARM_DESC(ql2xmdenable, 206MODULE_PARM_DESC(ql2xmdenable,
207 "Enable/disable MiniDump. " 207 "Enable/disable MiniDump. "
208 "0 (Default) - MiniDump disabled. " 208 "0 - MiniDump disabled. "
209 "1 - MiniDump enabled."); 209 "1 (Default) - MiniDump enabled.");
210 210
211/* 211/*
212 * SCSI host template entry points 212 * SCSI host template entry points
@@ -423,6 +423,7 @@ fail2:
423 qla25xx_delete_queues(vha); 423 qla25xx_delete_queues(vha);
424 destroy_workqueue(ha->wq); 424 destroy_workqueue(ha->wq);
425 ha->wq = NULL; 425 ha->wq = NULL;
426 vha->req = ha->req_q_map[0];
426fail: 427fail:
427 ha->mqenable = 0; 428 ha->mqenable = 0;
428 kfree(ha->req_q_map); 429 kfree(ha->req_q_map);
@@ -814,49 +815,6 @@ qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
814 return return_status; 815 return return_status;
815} 816}
816 817
817/*
818 * qla2x00_wait_for_loop_ready
819 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
820 * to be in LOOP_READY state.
821 * Input:
822 * ha - pointer to host adapter structure
823 *
824 * Note:
825 * Does context switching-Release SPIN_LOCK
826 * (if any) before calling this routine.
827 *
828 *
829 * Return:
830 * Success (LOOP_READY) : 0
831 * Failed (LOOP_NOT_READY) : 1
832 */
833static inline int
834qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
835{
836 int return_status = QLA_SUCCESS;
837 unsigned long loop_timeout ;
838 struct qla_hw_data *ha = vha->hw;
839 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
840
841 /* wait for 5 min at the max for loop to be ready */
842 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
843
844 while ((!atomic_read(&base_vha->loop_down_timer) &&
845 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
846 atomic_read(&base_vha->loop_state) != LOOP_READY) {
847 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
848 return_status = QLA_FUNCTION_FAILED;
849 break;
850 }
851 msleep(1000);
852 if (time_after_eq(jiffies, loop_timeout)) {
853 return_status = QLA_FUNCTION_FAILED;
854 break;
855 }
856 }
857 return (return_status);
858}
859
860static void 818static void
861sp_get(struct srb *sp) 819sp_get(struct srb *sp)
862{ 820{
@@ -1035,12 +993,6 @@ __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1035 "Wait for hba online failed for cmd=%p.\n", cmd); 993 "Wait for hba online failed for cmd=%p.\n", cmd);
1036 goto eh_reset_failed; 994 goto eh_reset_failed;
1037 } 995 }
1038 err = 1;
1039 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) {
1040 ql_log(ql_log_warn, vha, 0x800b,
1041 "Wait for loop ready failed for cmd=%p.\n", cmd);
1042 goto eh_reset_failed;
1043 }
1044 err = 2; 996 err = 2;
1045 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) 997 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1046 != QLA_SUCCESS) { 998 != QLA_SUCCESS) {
@@ -1137,10 +1089,9 @@ qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1137 goto eh_bus_reset_done; 1089 goto eh_bus_reset_done;
1138 } 1090 }
1139 1091
1140 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) { 1092 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1141 if (qla2x00_loop_reset(vha) == QLA_SUCCESS) 1093 ret = SUCCESS;
1142 ret = SUCCESS; 1094
1143 }
1144 if (ret == FAILED) 1095 if (ret == FAILED)
1145 goto eh_bus_reset_done; 1096 goto eh_bus_reset_done;
1146 1097
@@ -1206,15 +1157,6 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1206 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) 1157 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1207 goto eh_host_reset_lock; 1158 goto eh_host_reset_lock;
1208 1159
1209 /*
1210 * Fixme-may be dpc thread is active and processing
1211 * loop_resync,so wait a while for it to
1212 * be completed and then issue big hammer.Otherwise
1213 * it may cause I/O failure as big hammer marks the
1214 * devices as lost kicking of the port_down_timer
1215 * while dpc is stuck for the mailbox to complete.
1216 */
1217 qla2x00_wait_for_loop_ready(vha);
1218 if (vha != base_vha) { 1160 if (vha != base_vha) {
1219 if (qla2x00_vp_abort_isp(vha)) 1161 if (qla2x00_vp_abort_isp(vha))
1220 goto eh_host_reset_lock; 1162 goto eh_host_reset_lock;
@@ -1297,16 +1239,13 @@ qla2x00_loop_reset(scsi_qla_host_t *vha)
1297 atomic_set(&vha->loop_state, LOOP_DOWN); 1239 atomic_set(&vha->loop_state, LOOP_DOWN);
1298 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1240 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1299 qla2x00_mark_all_devices_lost(vha, 0); 1241 qla2x00_mark_all_devices_lost(vha, 0);
1300 qla2x00_wait_for_loop_ready(vha);
1301 } 1242 }
1302 1243
1303 if (ha->flags.enable_lip_reset) { 1244 if (ha->flags.enable_lip_reset) {
1304 ret = qla2x00_lip_reset(vha); 1245 ret = qla2x00_lip_reset(vha);
1305 if (ret != QLA_SUCCESS) { 1246 if (ret != QLA_SUCCESS)
1306 ql_dbg(ql_dbg_taskm, vha, 0x802e, 1247 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1307 "lip_reset failed (%d).\n", ret); 1248 "lip_reset failed (%d).\n", ret);
1308 } else
1309 qla2x00_wait_for_loop_ready(vha);
1310 } 1249 }
1311 1250
1312 /* Issue marker command only when we are going to start the I/O */ 1251 /* Issue marker command only when we are going to start the I/O */
@@ -4070,13 +4009,8 @@ qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4070 /* For ISP82XX complete any pending mailbox cmd */ 4009 /* For ISP82XX complete any pending mailbox cmd */
4071 if (IS_QLA82XX(ha)) { 4010 if (IS_QLA82XX(ha)) {
4072 ha->flags.isp82xx_fw_hung = 1; 4011 ha->flags.isp82xx_fw_hung = 1;
4073 if (ha->flags.mbox_busy) { 4012 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
4074 ha->flags.mbox_int = 1; 4013 qla82xx_clear_pending_mbx(vha);
4075 ql_dbg(ql_dbg_aer, vha, 0x9001,
4076 "Due to pci channel io frozen, doing premature "
4077 "completion of mbx command.\n");
4078 complete(&ha->mbx_intr_comp);
4079 }
4080 } 4014 }
4081 qla2x00_free_irqs(vha); 4015 qla2x00_free_irqs(vha);
4082 pci_disable_device(pdev); 4016 pci_disable_device(pdev);
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index 13b6357c1fa2..23f33a6d52d7 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
7/* 7/*
8 * Driver version 8 * Driver version
9 */ 9 */
10#define QLA2XXX_VERSION "8.03.07.07-k" 10#define QLA2XXX_VERSION "8.03.07.12-k"
11 11
12#define QLA_DRIVER_MAJOR_VER 8 12#define QLA_DRIVER_MAJOR_VER 8
13#define QLA_DRIVER_MINOR_VER 3 13#define QLA_DRIVER_MINOR_VER 3
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h
index ace637bf254e..fd5edc6e166d 100644
--- a/drivers/scsi/qla4xxx/ql4_def.h
+++ b/drivers/scsi/qla4xxx/ql4_def.h
@@ -147,7 +147,7 @@
147#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ 147#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */
148#define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ 148#define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */
149 149
150#define QL4_SESS_RECOVERY_TMO 30 /* iSCSI session */ 150#define QL4_SESS_RECOVERY_TMO 120 /* iSCSI session */
151 /* recovery timeout */ 151 /* recovery timeout */
152 152
153#define LSDW(x) ((u32)((u64)(x))) 153#define LSDW(x) ((u32)((u64)(x)))
@@ -173,6 +173,8 @@
173#define ISNS_DEREG_TOV 5 173#define ISNS_DEREG_TOV 5
174#define HBA_ONLINE_TOV 30 174#define HBA_ONLINE_TOV 30
175#define DISABLE_ACB_TOV 30 175#define DISABLE_ACB_TOV 30
176#define IP_CONFIG_TOV 30
177#define LOGIN_TOV 12
176 178
177#define MAX_RESET_HA_RETRIES 2 179#define MAX_RESET_HA_RETRIES 2
178 180
@@ -240,6 +242,45 @@ struct ddb_entry {
240 242
241 uint16_t fw_ddb_index; /* DDB firmware index */ 243 uint16_t fw_ddb_index; /* DDB firmware index */
242 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ 244 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */
245 uint16_t ddb_type;
246#define FLASH_DDB 0x01
247
248 struct dev_db_entry fw_ddb_entry;
249 int (*unblock_sess)(struct iscsi_cls_session *cls_session);
250 int (*ddb_change)(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
251 struct ddb_entry *ddb_entry, uint32_t state);
252
253 /* Driver Re-login */
254 unsigned long flags; /* DDB Flags */
255 uint16_t default_relogin_timeout; /* Max time to wait for
256 * relogin to complete */
257 atomic_t retry_relogin_timer; /* Min Time between relogins
258 * (4000 only) */
259 atomic_t relogin_timer; /* Max Time to wait for
260 * relogin to complete */
261 atomic_t relogin_retry_count; /* Num of times relogin has been
262 * retried */
263 uint32_t default_time2wait; /* Default Min time between
264 * relogins (+aens) */
265
266};
267
268struct qla_ddb_index {
269 struct list_head list;
270 uint16_t fw_ddb_idx;
271 struct dev_db_entry fw_ddb;
272};
273
274#define DDB_IPADDR_LEN 64
275
276struct ql4_tuple_ddb {
277 int port;
278 int tpgt;
279 char ip_addr[DDB_IPADDR_LEN];
280 char iscsi_name[ISCSI_NAME_SIZE];
281 uint16_t options;
282#define DDB_OPT_IPV6 0x0e0e
283#define DDB_OPT_IPV4 0x0f0f
243}; 284};
244 285
245/* 286/*
@@ -411,7 +452,7 @@ struct scsi_qla_host {
411#define AF_FW_RECOVERY 19 /* 0x00080000 */ 452#define AF_FW_RECOVERY 19 /* 0x00080000 */
412#define AF_EEH_BUSY 20 /* 0x00100000 */ 453#define AF_EEH_BUSY 20 /* 0x00100000 */
413#define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ 454#define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */
414 455#define AF_BUILD_DDB_LIST 22 /* 0x00400000 */
415 unsigned long dpc_flags; 456 unsigned long dpc_flags;
416 457
417#define DPC_RESET_HA 1 /* 0x00000002 */ 458#define DPC_RESET_HA 1 /* 0x00000002 */
@@ -604,6 +645,7 @@ struct scsi_qla_host {
604 uint16_t bootload_minor; 645 uint16_t bootload_minor;
605 uint16_t bootload_patch; 646 uint16_t bootload_patch;
606 uint16_t bootload_build; 647 uint16_t bootload_build;
648 uint16_t def_timeout; /* Default login timeout */
607 649
608 uint32_t flash_state; 650 uint32_t flash_state;
609#define QLFLASH_WAITING 0 651#define QLFLASH_WAITING 0
@@ -623,6 +665,11 @@ struct scsi_qla_host {
623 uint16_t iscsi_pci_func_cnt; 665 uint16_t iscsi_pci_func_cnt;
624 uint8_t model_name[16]; 666 uint8_t model_name[16];
625 struct completion disable_acb_comp; 667 struct completion disable_acb_comp;
668 struct dma_pool *fw_ddb_dma_pool;
669#define DDB_DMA_BLOCK_SIZE 512
670 uint16_t pri_ddb_idx;
671 uint16_t sec_ddb_idx;
672 int is_reset;
626}; 673};
627 674
628struct ql4_task_data { 675struct ql4_task_data {
@@ -835,6 +882,10 @@ static inline int ql4xxx_reset_active(struct scsi_qla_host *ha)
835/*---------------------------------------------------------------------------*/ 882/*---------------------------------------------------------------------------*/
836 883
837/* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */ 884/* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */
885
886#define INIT_ADAPTER 0
887#define RESET_ADAPTER 1
888
838#define PRESERVE_DDB_LIST 0 889#define PRESERVE_DDB_LIST 0
839#define REBUILD_DDB_LIST 1 890#define REBUILD_DDB_LIST 1
840 891
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h
index cbd5a20dbbd1..4ac07f882521 100644
--- a/drivers/scsi/qla4xxx/ql4_fw.h
+++ b/drivers/scsi/qla4xxx/ql4_fw.h
@@ -12,6 +12,7 @@
12#define MAX_PRST_DEV_DB_ENTRIES 64 12#define MAX_PRST_DEV_DB_ENTRIES 64
13#define MIN_DISC_DEV_DB_ENTRY MAX_PRST_DEV_DB_ENTRIES 13#define MIN_DISC_DEV_DB_ENTRY MAX_PRST_DEV_DB_ENTRIES
14#define MAX_DEV_DB_ENTRIES 512 14#define MAX_DEV_DB_ENTRIES 512
15#define MAX_DEV_DB_ENTRIES_40XX 256
15 16
16/************************************************************************* 17/*************************************************************************
17 * 18 *
@@ -604,6 +605,13 @@ struct addr_ctrl_blk {
604 uint8_t res14[140]; /* 274-2FF */ 605 uint8_t res14[140]; /* 274-2FF */
605}; 606};
606 607
608#define IP_ADDR_COUNT 4 /* Total 4 IP address supported in one interface
609 * One IPv4, one IPv6 link local and 2 IPv6
610 */
611
612#define IP_STATE_MASK 0x0F000000
613#define IP_STATE_SHIFT 24
614
607struct init_fw_ctrl_blk { 615struct init_fw_ctrl_blk {
608 struct addr_ctrl_blk pri; 616 struct addr_ctrl_blk pri;
609/* struct addr_ctrl_blk sec;*/ 617/* struct addr_ctrl_blk sec;*/
diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h
index 160db9d5ea21..d0dd4b330206 100644
--- a/drivers/scsi/qla4xxx/ql4_glbl.h
+++ b/drivers/scsi/qla4xxx/ql4_glbl.h
@@ -13,7 +13,7 @@ struct iscsi_cls_conn;
13int qla4xxx_hw_reset(struct scsi_qla_host *ha); 13int qla4xxx_hw_reset(struct scsi_qla_host *ha);
14int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a); 14int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a);
15int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb); 15int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb);
16int qla4xxx_initialize_adapter(struct scsi_qla_host *ha); 16int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset);
17int qla4xxx_soft_reset(struct scsi_qla_host *ha); 17int qla4xxx_soft_reset(struct scsi_qla_host *ha);
18irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id); 18irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id);
19 19
@@ -153,10 +153,13 @@ int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
153 uint32_t *mbx_sts); 153 uint32_t *mbx_sts);
154int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index); 154int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index);
155int qla4xxx_send_passthru0(struct iscsi_task *task); 155int qla4xxx_send_passthru0(struct iscsi_task *task);
156void qla4xxx_free_ddb_index(struct scsi_qla_host *ha);
156int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, 157int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
157 uint16_t stats_size, dma_addr_t stats_dma); 158 uint16_t stats_size, dma_addr_t stats_dma);
158void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, 159void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
159 struct ddb_entry *ddb_entry); 160 struct ddb_entry *ddb_entry);
161void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha,
162 struct ddb_entry *ddb_entry);
160int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, 163int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
161 struct dev_db_entry *fw_ddb_entry, 164 struct dev_db_entry *fw_ddb_entry,
162 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index); 165 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index);
@@ -169,11 +172,22 @@ int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
169int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, 172int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
170 uint32_t region, uint32_t field0, 173 uint32_t region, uint32_t field0,
171 uint32_t field1); 174 uint32_t field1);
175int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index);
176void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session);
177int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session);
178int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session);
179int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
180 struct ddb_entry *ddb_entry, uint32_t state);
181int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
182 struct ddb_entry *ddb_entry, uint32_t state);
183void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset);
172 184
173/* BSG Functions */ 185/* BSG Functions */
174int qla4xxx_bsg_request(struct bsg_job *bsg_job); 186int qla4xxx_bsg_request(struct bsg_job *bsg_job);
175int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job); 187int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job);
176 188
189void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry);
190
177extern int ql4xextended_error_logging; 191extern int ql4xextended_error_logging;
178extern int ql4xdontresethba; 192extern int ql4xdontresethba;
179extern int ql4xenablemsix; 193extern int ql4xenablemsix;
diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c
index 3075fbaef553..1bdfa8120ac8 100644
--- a/drivers/scsi/qla4xxx/ql4_init.c
+++ b/drivers/scsi/qla4xxx/ql4_init.c
@@ -773,22 +773,24 @@ int qla4xxx_start_firmware(struct scsi_qla_host *ha)
773 * be freed so that when login happens from user space there are free DDB 773 * be freed so that when login happens from user space there are free DDB
774 * indices available. 774 * indices available.
775 **/ 775 **/
776static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) 776void qla4xxx_free_ddb_index(struct scsi_qla_host *ha)
777{ 777{
778 int max_ddbs; 778 int max_ddbs;
779 int ret; 779 int ret;
780 uint32_t idx = 0, next_idx = 0; 780 uint32_t idx = 0, next_idx = 0;
781 uint32_t state = 0, conn_err = 0; 781 uint32_t state = 0, conn_err = 0;
782 782
783 max_ddbs = is_qla40XX(ha) ? MAX_PRST_DEV_DB_ENTRIES : 783 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX :
784 MAX_DEV_DB_ENTRIES; 784 MAX_DEV_DB_ENTRIES;
785 785
786 for (idx = 0; idx < max_ddbs; idx = next_idx) { 786 for (idx = 0; idx < max_ddbs; idx = next_idx) {
787 ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, 787 ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL,
788 &next_idx, &state, &conn_err, 788 &next_idx, &state, &conn_err,
789 NULL, NULL); 789 NULL, NULL);
790 if (ret == QLA_ERROR) 790 if (ret == QLA_ERROR) {
791 next_idx++;
791 continue; 792 continue;
793 }
792 if (state == DDB_DS_NO_CONNECTION_ACTIVE || 794 if (state == DDB_DS_NO_CONNECTION_ACTIVE ||
793 state == DDB_DS_SESSION_FAILED) { 795 state == DDB_DS_SESSION_FAILED) {
794 DEBUG2(ql4_printk(KERN_INFO, ha, 796 DEBUG2(ql4_printk(KERN_INFO, ha,
@@ -804,7 +806,6 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha)
804 } 806 }
805} 807}
806 808
807
808/** 809/**
809 * qla4xxx_initialize_adapter - initiailizes hba 810 * qla4xxx_initialize_adapter - initiailizes hba
810 * @ha: Pointer to host adapter structure. 811 * @ha: Pointer to host adapter structure.
@@ -812,7 +813,7 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha)
812 * This routine parforms all of the steps necessary to initialize the adapter. 813 * This routine parforms all of the steps necessary to initialize the adapter.
813 * 814 *
814 **/ 815 **/
815int qla4xxx_initialize_adapter(struct scsi_qla_host *ha) 816int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset)
816{ 817{
817 int status = QLA_ERROR; 818 int status = QLA_ERROR;
818 819
@@ -840,7 +841,8 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha)
840 if (status == QLA_ERROR) 841 if (status == QLA_ERROR)
841 goto exit_init_hba; 842 goto exit_init_hba;
842 843
843 qla4xxx_free_ddb_index(ha); 844 if (is_reset == RESET_ADAPTER)
845 qla4xxx_build_ddb_list(ha, is_reset);
844 846
845 set_bit(AF_ONLINE, &ha->flags); 847 set_bit(AF_ONLINE, &ha->flags);
846exit_init_hba: 848exit_init_hba:
@@ -855,38 +857,12 @@ exit_init_hba:
855 return status; 857 return status;
856} 858}
857 859
858/** 860int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
859 * qla4xxx_process_ddb_changed - process ddb state change 861 struct ddb_entry *ddb_entry, uint32_t state)
860 * @ha - Pointer to host adapter structure.
861 * @fw_ddb_index - Firmware's device database index
862 * @state - Device state
863 *
864 * This routine processes a Decive Database Changed AEN Event.
865 **/
866int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
867 uint32_t state, uint32_t conn_err)
868{ 862{
869 struct ddb_entry * ddb_entry;
870 uint32_t old_fw_ddb_device_state; 863 uint32_t old_fw_ddb_device_state;
871 int status = QLA_ERROR; 864 int status = QLA_ERROR;
872 865
873 /* check for out of range index */
874 if (fw_ddb_index >= MAX_DDB_ENTRIES)
875 goto exit_ddb_event;
876
877 /* Get the corresponging ddb entry */
878 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index);
879 /* Device does not currently exist in our database. */
880 if (ddb_entry == NULL) {
881 ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n",
882 __func__, fw_ddb_index);
883
884 if (state == DDB_DS_NO_CONNECTION_ACTIVE)
885 clear_bit(fw_ddb_index, ha->ddb_idx_map);
886
887 goto exit_ddb_event;
888 }
889
890 old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; 866 old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state;
891 DEBUG2(ql4_printk(KERN_INFO, ha, 867 DEBUG2(ql4_printk(KERN_INFO, ha,
892 "%s: DDB - old state = 0x%x, new state = 0x%x for " 868 "%s: DDB - old state = 0x%x, new state = 0x%x for "
@@ -900,9 +876,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
900 switch (state) { 876 switch (state) {
901 case DDB_DS_SESSION_ACTIVE: 877 case DDB_DS_SESSION_ACTIVE:
902 case DDB_DS_DISCOVERY: 878 case DDB_DS_DISCOVERY:
903 iscsi_conn_start(ddb_entry->conn); 879 ddb_entry->unblock_sess(ddb_entry->sess);
904 iscsi_conn_login_event(ddb_entry->conn,
905 ISCSI_CONN_STATE_LOGGED_IN);
906 qla4xxx_update_session_conn_param(ha, ddb_entry); 880 qla4xxx_update_session_conn_param(ha, ddb_entry);
907 status = QLA_SUCCESS; 881 status = QLA_SUCCESS;
908 break; 882 break;
@@ -936,9 +910,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
936 switch (state) { 910 switch (state) {
937 case DDB_DS_SESSION_ACTIVE: 911 case DDB_DS_SESSION_ACTIVE:
938 case DDB_DS_DISCOVERY: 912 case DDB_DS_DISCOVERY:
939 iscsi_conn_start(ddb_entry->conn); 913 ddb_entry->unblock_sess(ddb_entry->sess);
940 iscsi_conn_login_event(ddb_entry->conn,
941 ISCSI_CONN_STATE_LOGGED_IN);
942 qla4xxx_update_session_conn_param(ha, ddb_entry); 914 qla4xxx_update_session_conn_param(ha, ddb_entry);
943 status = QLA_SUCCESS; 915 status = QLA_SUCCESS;
944 break; 916 break;
@@ -954,7 +926,198 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
954 __func__)); 926 __func__));
955 break; 927 break;
956 } 928 }
929 return status;
930}
931
932void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry)
933{
934 /*
935 * This triggers a relogin. After the relogin_timer
936 * expires, the relogin gets scheduled. We must wait a
937 * minimum amount of time since receiving an 0x8014 AEN
938 * with failed device_state or a logout response before
939 * we can issue another relogin.
940 *
941 * Firmware pads this timeout: (time2wait +1).
942 * Driver retry to login should be longer than F/W.
943 * Otherwise F/W will fail
944 * set_ddb() mbx cmd with 0x4005 since it still
945 * counting down its time2wait.
946 */
947 atomic_set(&ddb_entry->relogin_timer, 0);
948 atomic_set(&ddb_entry->retry_relogin_timer,
949 ddb_entry->default_time2wait + 4);
950
951}
952
953int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
954 struct ddb_entry *ddb_entry, uint32_t state)
955{
956 uint32_t old_fw_ddb_device_state;
957 int status = QLA_ERROR;
958
959 old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state;
960 DEBUG2(ql4_printk(KERN_INFO, ha,
961 "%s: DDB - old state = 0x%x, new state = 0x%x for "
962 "index [%d]\n", __func__,
963 ddb_entry->fw_ddb_device_state, state, fw_ddb_index));
964
965 ddb_entry->fw_ddb_device_state = state;
966
967 switch (old_fw_ddb_device_state) {
968 case DDB_DS_LOGIN_IN_PROCESS:
969 case DDB_DS_NO_CONNECTION_ACTIVE:
970 switch (state) {
971 case DDB_DS_SESSION_ACTIVE:
972 ddb_entry->unblock_sess(ddb_entry->sess);
973 qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry);
974 status = QLA_SUCCESS;
975 break;
976 case DDB_DS_SESSION_FAILED:
977 iscsi_block_session(ddb_entry->sess);
978 if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
979 qla4xxx_arm_relogin_timer(ddb_entry);
980 status = QLA_SUCCESS;
981 break;
982 }
983 break;
984 case DDB_DS_SESSION_ACTIVE:
985 switch (state) {
986 case DDB_DS_SESSION_FAILED:
987 iscsi_block_session(ddb_entry->sess);
988 if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
989 qla4xxx_arm_relogin_timer(ddb_entry);
990 status = QLA_SUCCESS;
991 break;
992 }
993 break;
994 case DDB_DS_SESSION_FAILED:
995 switch (state) {
996 case DDB_DS_SESSION_ACTIVE:
997 ddb_entry->unblock_sess(ddb_entry->sess);
998 qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry);
999 status = QLA_SUCCESS;
1000 break;
1001 case DDB_DS_SESSION_FAILED:
1002 if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
1003 qla4xxx_arm_relogin_timer(ddb_entry);
1004 status = QLA_SUCCESS;
1005 break;
1006 }
1007 break;
1008 default:
1009 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n",
1010 __func__));
1011 break;
1012 }
1013 return status;
1014}
1015
1016/**
1017 * qla4xxx_process_ddb_changed - process ddb state change
1018 * @ha - Pointer to host adapter structure.
1019 * @fw_ddb_index - Firmware's device database index
1020 * @state - Device state
1021 *
1022 * This routine processes a Decive Database Changed AEN Event.
1023 **/
1024int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha,
1025 uint32_t fw_ddb_index,
1026 uint32_t state, uint32_t conn_err)
1027{
1028 struct ddb_entry *ddb_entry;
1029 int status = QLA_ERROR;
1030
1031 /* check for out of range index */
1032 if (fw_ddb_index >= MAX_DDB_ENTRIES)
1033 goto exit_ddb_event;
1034
1035 /* Get the corresponging ddb entry */
1036 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index);
1037 /* Device does not currently exist in our database. */
1038 if (ddb_entry == NULL) {
1039 ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n",
1040 __func__, fw_ddb_index);
1041
1042 if (state == DDB_DS_NO_CONNECTION_ACTIVE)
1043 clear_bit(fw_ddb_index, ha->ddb_idx_map);
1044
1045 goto exit_ddb_event;
1046 }
1047
1048 ddb_entry->ddb_change(ha, fw_ddb_index, ddb_entry, state);
957 1049
958exit_ddb_event: 1050exit_ddb_event:
959 return status; 1051 return status;
960} 1052}
1053
1054/**
1055 * qla4xxx_login_flash_ddb - Login to target (DDB)
1056 * @cls_session: Pointer to the session to login
1057 *
1058 * This routine logins to the target.
1059 * Issues setddb and conn open mbx
1060 **/
1061void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session)
1062{
1063 struct iscsi_session *sess;
1064 struct ddb_entry *ddb_entry;
1065 struct scsi_qla_host *ha;
1066 struct dev_db_entry *fw_ddb_entry = NULL;
1067 dma_addr_t fw_ddb_dma;
1068 uint32_t mbx_sts = 0;
1069 int ret;
1070
1071 sess = cls_session->dd_data;
1072 ddb_entry = sess->dd_data;
1073 ha = ddb_entry->ha;
1074
1075 if (!test_bit(AF_LINK_UP, &ha->flags))
1076 return;
1077
1078 if (ddb_entry->ddb_type != FLASH_DDB) {
1079 DEBUG2(ql4_printk(KERN_INFO, ha,
1080 "Skipping login to non FLASH DB"));
1081 goto exit_login;
1082 }
1083
1084 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL,
1085 &fw_ddb_dma);
1086 if (fw_ddb_entry == NULL) {
1087 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n"));
1088 goto exit_login;
1089 }
1090
1091 if (ddb_entry->fw_ddb_index == INVALID_ENTRY) {
1092 ret = qla4xxx_get_ddb_index(ha, &ddb_entry->fw_ddb_index);
1093 if (ret == QLA_ERROR)
1094 goto exit_login;
1095
1096 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry;
1097 ha->tot_ddbs++;
1098 }
1099
1100 memcpy(fw_ddb_entry, &ddb_entry->fw_ddb_entry,
1101 sizeof(struct dev_db_entry));
1102 ddb_entry->sess->target_id = ddb_entry->fw_ddb_index;
1103
1104 ret = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
1105 fw_ddb_dma, &mbx_sts);
1106 if (ret == QLA_ERROR) {
1107 DEBUG2(ql4_printk(KERN_ERR, ha, "Set DDB failed\n"));
1108 goto exit_login;
1109 }
1110
1111 ddb_entry->fw_ddb_device_state = DDB_DS_LOGIN_IN_PROCESS;
1112 ret = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index);
1113 if (ret == QLA_ERROR) {
1114 ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__,
1115 sess->targetname);
1116 goto exit_login;
1117 }
1118
1119exit_login:
1120 if (fw_ddb_entry)
1121 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma);
1122}
1123
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c
index 4c2b84870392..c2593782fbbe 100644
--- a/drivers/scsi/qla4xxx/ql4_mbx.c
+++ b/drivers/scsi/qla4xxx/ql4_mbx.c
@@ -41,6 +41,16 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
41 return status; 41 return status;
42 } 42 }
43 43
44 if (is_qla40XX(ha)) {
45 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
47 "prematurely completing mbx cmd as "
48 "adapter removal detected\n",
49 ha->host_no, __func__));
50 return status;
51 }
52 }
53
44 if (is_qla8022(ha)) { 54 if (is_qla8022(ha)) {
45 if (test_bit(AF_FW_RECOVERY, &ha->flags)) { 55 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " 56 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
@@ -413,6 +423,7 @@ qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
413 memcpy(ha->name_string, init_fw_cb->iscsi_name, 423 memcpy(ha->name_string, init_fw_cb->iscsi_name,
414 min(sizeof(ha->name_string), 424 min(sizeof(ha->name_string),
415 sizeof(init_fw_cb->iscsi_name))); 425 sizeof(init_fw_cb->iscsi_name)));
426 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
416 /*memcpy(ha->alias, init_fw_cb->Alias, 427 /*memcpy(ha->alias, init_fw_cb->Alias,
417 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/ 428 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
418 429
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index 30f31b127f33..4169c8baa112 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -8,6 +8,7 @@
8#include <linux/slab.h> 8#include <linux/slab.h>
9#include <linux/blkdev.h> 9#include <linux/blkdev.h>
10#include <linux/iscsi_boot_sysfs.h> 10#include <linux/iscsi_boot_sysfs.h>
11#include <linux/inet.h>
11 12
12#include <scsi/scsi_tcq.h> 13#include <scsi/scsi_tcq.h>
13#include <scsi/scsicam.h> 14#include <scsi/scsicam.h>
@@ -31,6 +32,13 @@ static struct kmem_cache *srb_cachep;
31/* 32/*
32 * Module parameter information and variables 33 * Module parameter information and variables
33 */ 34 */
35int ql4xdisablesysfsboot = 1;
36module_param(ql4xdisablesysfsboot, int, S_IRUGO | S_IWUSR);
37MODULE_PARM_DESC(ql4xdisablesysfsboot,
38 "Set to disable exporting boot targets to sysfs\n"
39 " 0 - Export boot targets\n"
40 " 1 - Do not export boot targets (Default)");
41
34int ql4xdontresethba = 0; 42int ql4xdontresethba = 0;
35module_param(ql4xdontresethba, int, S_IRUGO | S_IWUSR); 43module_param(ql4xdontresethba, int, S_IRUGO | S_IWUSR);
36MODULE_PARM_DESC(ql4xdontresethba, 44MODULE_PARM_DESC(ql4xdontresethba,
@@ -63,7 +71,7 @@ static int ql4xsess_recovery_tmo = QL4_SESS_RECOVERY_TMO;
63module_param(ql4xsess_recovery_tmo, int, S_IRUGO); 71module_param(ql4xsess_recovery_tmo, int, S_IRUGO);
64MODULE_PARM_DESC(ql4xsess_recovery_tmo, 72MODULE_PARM_DESC(ql4xsess_recovery_tmo,
65 "Target Session Recovery Timeout.\n" 73 "Target Session Recovery Timeout.\n"
66 " Default: 30 sec."); 74 " Default: 120 sec.");
67 75
68static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha); 76static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha);
69/* 77/*
@@ -415,7 +423,7 @@ static int qla4xxx_ep_poll(struct iscsi_endpoint *ep, int timeout_ms)
415 qla_ep = ep->dd_data; 423 qla_ep = ep->dd_data;
416 ha = to_qla_host(qla_ep->host); 424 ha = to_qla_host(qla_ep->host);
417 425
418 if (adapter_up(ha)) 426 if (adapter_up(ha) && !test_bit(AF_BUILD_DDB_LIST, &ha->flags))
419 ret = 1; 427 ret = 1;
420 428
421 return ret; 429 return ret;
@@ -975,6 +983,150 @@ static int qla4xxx_conn_get_param(struct iscsi_cls_conn *cls_conn,
975 983
976} 984}
977 985
986int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index)
987{
988 uint32_t mbx_sts = 0;
989 uint16_t tmp_ddb_index;
990 int ret;
991
992get_ddb_index:
993 tmp_ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES);
994
995 if (tmp_ddb_index >= MAX_DDB_ENTRIES) {
996 DEBUG2(ql4_printk(KERN_INFO, ha,
997 "Free DDB index not available\n"));
998 ret = QLA_ERROR;
999 goto exit_get_ddb_index;
1000 }
1001
1002 if (test_and_set_bit(tmp_ddb_index, ha->ddb_idx_map))
1003 goto get_ddb_index;
1004
1005 DEBUG2(ql4_printk(KERN_INFO, ha,
1006 "Found a free DDB index at %d\n", tmp_ddb_index));
1007 ret = qla4xxx_req_ddb_entry(ha, tmp_ddb_index, &mbx_sts);
1008 if (ret == QLA_ERROR) {
1009 if (mbx_sts == MBOX_STS_COMMAND_ERROR) {
1010 ql4_printk(KERN_INFO, ha,
1011 "DDB index = %d not available trying next\n",
1012 tmp_ddb_index);
1013 goto get_ddb_index;
1014 }
1015 DEBUG2(ql4_printk(KERN_INFO, ha,
1016 "Free FW DDB not available\n"));
1017 }
1018
1019 *ddb_index = tmp_ddb_index;
1020
1021exit_get_ddb_index:
1022 return ret;
1023}
1024
1025static int qla4xxx_match_ipaddress(struct scsi_qla_host *ha,
1026 struct ddb_entry *ddb_entry,
1027 char *existing_ipaddr,
1028 char *user_ipaddr)
1029{
1030 uint8_t dst_ipaddr[IPv6_ADDR_LEN];
1031 char formatted_ipaddr[DDB_IPADDR_LEN];
1032 int status = QLA_SUCCESS, ret = 0;
1033
1034 if (ddb_entry->fw_ddb_entry.options & DDB_OPT_IPV6_DEVICE) {
1035 ret = in6_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr,
1036 '\0', NULL);
1037 if (ret == 0) {
1038 status = QLA_ERROR;
1039 goto out_match;
1040 }
1041 ret = sprintf(formatted_ipaddr, "%pI6", dst_ipaddr);
1042 } else {
1043 ret = in4_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr,
1044 '\0', NULL);
1045 if (ret == 0) {
1046 status = QLA_ERROR;
1047 goto out_match;
1048 }
1049 ret = sprintf(formatted_ipaddr, "%pI4", dst_ipaddr);
1050 }
1051
1052 if (strcmp(existing_ipaddr, formatted_ipaddr))
1053 status = QLA_ERROR;
1054
1055out_match:
1056 return status;
1057}
1058
1059static int qla4xxx_match_fwdb_session(struct scsi_qla_host *ha,
1060 struct iscsi_cls_conn *cls_conn)
1061{
1062 int idx = 0, max_ddbs, rval;
1063 struct iscsi_cls_session *cls_sess = iscsi_conn_to_session(cls_conn);
1064 struct iscsi_session *sess, *existing_sess;
1065 struct iscsi_conn *conn, *existing_conn;
1066 struct ddb_entry *ddb_entry;
1067
1068 sess = cls_sess->dd_data;
1069 conn = cls_conn->dd_data;
1070
1071 if (sess->targetname == NULL ||
1072 conn->persistent_address == NULL ||
1073 conn->persistent_port == 0)
1074 return QLA_ERROR;
1075
1076 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX :
1077 MAX_DEV_DB_ENTRIES;
1078
1079 for (idx = 0; idx < max_ddbs; idx++) {
1080 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx);
1081 if (ddb_entry == NULL)
1082 continue;
1083
1084 if (ddb_entry->ddb_type != FLASH_DDB)
1085 continue;
1086
1087 existing_sess = ddb_entry->sess->dd_data;
1088 existing_conn = ddb_entry->conn->dd_data;
1089
1090 if (existing_sess->targetname == NULL ||
1091 existing_conn->persistent_address == NULL ||
1092 existing_conn->persistent_port == 0)
1093 continue;
1094
1095 DEBUG2(ql4_printk(KERN_INFO, ha,
1096 "IQN = %s User IQN = %s\n",
1097 existing_sess->targetname,
1098 sess->targetname));
1099
1100 DEBUG2(ql4_printk(KERN_INFO, ha,
1101 "IP = %s User IP = %s\n",
1102 existing_conn->persistent_address,
1103 conn->persistent_address));
1104
1105 DEBUG2(ql4_printk(KERN_INFO, ha,
1106 "Port = %d User Port = %d\n",
1107 existing_conn->persistent_port,
1108 conn->persistent_port));
1109
1110 if (strcmp(existing_sess->targetname, sess->targetname))
1111 continue;
1112 rval = qla4xxx_match_ipaddress(ha, ddb_entry,
1113 existing_conn->persistent_address,
1114 conn->persistent_address);
1115 if (rval == QLA_ERROR)
1116 continue;
1117 if (existing_conn->persistent_port != conn->persistent_port)
1118 continue;
1119 break;
1120 }
1121
1122 if (idx == max_ddbs)
1123 return QLA_ERROR;
1124
1125 DEBUG2(ql4_printk(KERN_INFO, ha,
1126 "Match found in fwdb sessions\n"));
1127 return QLA_SUCCESS;
1128}
1129
978static struct iscsi_cls_session * 1130static struct iscsi_cls_session *
979qla4xxx_session_create(struct iscsi_endpoint *ep, 1131qla4xxx_session_create(struct iscsi_endpoint *ep,
980 uint16_t cmds_max, uint16_t qdepth, 1132 uint16_t cmds_max, uint16_t qdepth,
@@ -984,8 +1136,7 @@ qla4xxx_session_create(struct iscsi_endpoint *ep,
984 struct scsi_qla_host *ha; 1136 struct scsi_qla_host *ha;
985 struct qla_endpoint *qla_ep; 1137 struct qla_endpoint *qla_ep;
986 struct ddb_entry *ddb_entry; 1138 struct ddb_entry *ddb_entry;
987 uint32_t ddb_index; 1139 uint16_t ddb_index;
988 uint32_t mbx_sts = 0;
989 struct iscsi_session *sess; 1140 struct iscsi_session *sess;
990 struct sockaddr *dst_addr; 1141 struct sockaddr *dst_addr;
991 int ret; 1142 int ret;
@@ -1000,32 +1151,9 @@ qla4xxx_session_create(struct iscsi_endpoint *ep,
1000 dst_addr = (struct sockaddr *)&qla_ep->dst_addr; 1151 dst_addr = (struct sockaddr *)&qla_ep->dst_addr;
1001 ha = to_qla_host(qla_ep->host); 1152 ha = to_qla_host(qla_ep->host);
1002 1153
1003get_ddb_index: 1154 ret = qla4xxx_get_ddb_index(ha, &ddb_index);
1004 ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); 1155 if (ret == QLA_ERROR)
1005
1006 if (ddb_index >= MAX_DDB_ENTRIES) {
1007 DEBUG2(ql4_printk(KERN_INFO, ha,
1008 "Free DDB index not available\n"));
1009 return NULL;
1010 }
1011
1012 if (test_and_set_bit(ddb_index, ha->ddb_idx_map))
1013 goto get_ddb_index;
1014
1015 DEBUG2(ql4_printk(KERN_INFO, ha,
1016 "Found a free DDB index at %d\n", ddb_index));
1017 ret = qla4xxx_req_ddb_entry(ha, ddb_index, &mbx_sts);
1018 if (ret == QLA_ERROR) {
1019 if (mbx_sts == MBOX_STS_COMMAND_ERROR) {
1020 ql4_printk(KERN_INFO, ha,
1021 "DDB index = %d not available trying next\n",
1022 ddb_index);
1023 goto get_ddb_index;
1024 }
1025 DEBUG2(ql4_printk(KERN_INFO, ha,
1026 "Free FW DDB not available\n"));
1027 return NULL; 1156 return NULL;
1028 }
1029 1157
1030 cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, qla_ep->host, 1158 cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, qla_ep->host,
1031 cmds_max, sizeof(struct ddb_entry), 1159 cmds_max, sizeof(struct ddb_entry),
@@ -1040,6 +1168,8 @@ get_ddb_index:
1040 ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; 1168 ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE;
1041 ddb_entry->ha = ha; 1169 ddb_entry->ha = ha;
1042 ddb_entry->sess = cls_sess; 1170 ddb_entry->sess = cls_sess;
1171 ddb_entry->unblock_sess = qla4xxx_unblock_ddb;
1172 ddb_entry->ddb_change = qla4xxx_ddb_change;
1043 cls_sess->recovery_tmo = ql4xsess_recovery_tmo; 1173 cls_sess->recovery_tmo = ql4xsess_recovery_tmo;
1044 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; 1174 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry;
1045 ha->tot_ddbs++; 1175 ha->tot_ddbs++;
@@ -1077,6 +1207,9 @@ qla4xxx_conn_create(struct iscsi_cls_session *cls_sess, uint32_t conn_idx)
1077 DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); 1207 DEBUG2(printk(KERN_INFO "Func: %s\n", __func__));
1078 cls_conn = iscsi_conn_setup(cls_sess, sizeof(struct qla_conn), 1208 cls_conn = iscsi_conn_setup(cls_sess, sizeof(struct qla_conn),
1079 conn_idx); 1209 conn_idx);
1210 if (!cls_conn)
1211 return NULL;
1212
1080 sess = cls_sess->dd_data; 1213 sess = cls_sess->dd_data;
1081 ddb_entry = sess->dd_data; 1214 ddb_entry = sess->dd_data;
1082 ddb_entry->conn = cls_conn; 1215 ddb_entry->conn = cls_conn;
@@ -1109,7 +1242,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn)
1109 struct iscsi_session *sess; 1242 struct iscsi_session *sess;
1110 struct ddb_entry *ddb_entry; 1243 struct ddb_entry *ddb_entry;
1111 struct scsi_qla_host *ha; 1244 struct scsi_qla_host *ha;
1112 struct dev_db_entry *fw_ddb_entry; 1245 struct dev_db_entry *fw_ddb_entry = NULL;
1113 dma_addr_t fw_ddb_entry_dma; 1246 dma_addr_t fw_ddb_entry_dma;
1114 uint32_t mbx_sts = 0; 1247 uint32_t mbx_sts = 0;
1115 int ret = 0; 1248 int ret = 0;
@@ -1120,12 +1253,25 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn)
1120 ddb_entry = sess->dd_data; 1253 ddb_entry = sess->dd_data;
1121 ha = ddb_entry->ha; 1254 ha = ddb_entry->ha;
1122 1255
1256 /* Check if we have matching FW DDB, if yes then do not
1257 * login to this target. This could cause target to logout previous
1258 * connection
1259 */
1260 ret = qla4xxx_match_fwdb_session(ha, cls_conn);
1261 if (ret == QLA_SUCCESS) {
1262 ql4_printk(KERN_INFO, ha,
1263 "Session already exist in FW.\n");
1264 ret = -EEXIST;
1265 goto exit_conn_start;
1266 }
1267
1123 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), 1268 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1124 &fw_ddb_entry_dma, GFP_KERNEL); 1269 &fw_ddb_entry_dma, GFP_KERNEL);
1125 if (!fw_ddb_entry) { 1270 if (!fw_ddb_entry) {
1126 ql4_printk(KERN_ERR, ha, 1271 ql4_printk(KERN_ERR, ha,
1127 "%s: Unable to allocate dma buffer\n", __func__); 1272 "%s: Unable to allocate dma buffer\n", __func__);
1128 return -ENOMEM; 1273 ret = -ENOMEM;
1274 goto exit_conn_start;
1129 } 1275 }
1130 1276
1131 ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts); 1277 ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts);
@@ -1138,9 +1284,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn)
1138 if (mbx_sts) 1284 if (mbx_sts)
1139 if (ddb_entry->fw_ddb_device_state == 1285 if (ddb_entry->fw_ddb_device_state ==
1140 DDB_DS_SESSION_ACTIVE) { 1286 DDB_DS_SESSION_ACTIVE) {
1141 iscsi_conn_start(ddb_entry->conn); 1287 ddb_entry->unblock_sess(ddb_entry->sess);
1142 iscsi_conn_login_event(ddb_entry->conn,
1143 ISCSI_CONN_STATE_LOGGED_IN);
1144 goto exit_set_param; 1288 goto exit_set_param;
1145 } 1289 }
1146 1290
@@ -1167,8 +1311,9 @@ exit_set_param:
1167 ret = 0; 1311 ret = 0;
1168 1312
1169exit_conn_start: 1313exit_conn_start:
1170 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), 1314 if (fw_ddb_entry)
1171 fw_ddb_entry, fw_ddb_entry_dma); 1315 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1316 fw_ddb_entry, fw_ddb_entry_dma);
1172 return ret; 1317 return ret;
1173} 1318}
1174 1319
@@ -1344,6 +1489,101 @@ static int qla4xxx_task_xmit(struct iscsi_task *task)
1344 return -ENOSYS; 1489 return -ENOSYS;
1345} 1490}
1346 1491
1492static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha,
1493 struct dev_db_entry *fw_ddb_entry,
1494 struct iscsi_cls_session *cls_sess,
1495 struct iscsi_cls_conn *cls_conn)
1496{
1497 int buflen = 0;
1498 struct iscsi_session *sess;
1499 struct iscsi_conn *conn;
1500 char ip_addr[DDB_IPADDR_LEN];
1501 uint16_t options = 0;
1502
1503 sess = cls_sess->dd_data;
1504 conn = cls_conn->dd_data;
1505
1506 conn->max_recv_dlength = BYTE_UNITS *
1507 le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len);
1508
1509 conn->max_xmit_dlength = BYTE_UNITS *
1510 le16_to_cpu(fw_ddb_entry->iscsi_max_snd_data_seg_len);
1511
1512 sess->initial_r2t_en =
1513 (BIT_10 & le16_to_cpu(fw_ddb_entry->iscsi_options));
1514
1515 sess->max_r2t = le16_to_cpu(fw_ddb_entry->iscsi_max_outsnd_r2t);
1516
1517 sess->imm_data_en = (BIT_11 & le16_to_cpu(fw_ddb_entry->iscsi_options));
1518
1519 sess->first_burst = BYTE_UNITS *
1520 le16_to_cpu(fw_ddb_entry->iscsi_first_burst_len);
1521
1522 sess->max_burst = BYTE_UNITS *
1523 le16_to_cpu(fw_ddb_entry->iscsi_max_burst_len);
1524
1525 sess->time2wait = le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait);
1526
1527 sess->time2retain = le16_to_cpu(fw_ddb_entry->iscsi_def_time2retain);
1528
1529 conn->persistent_port = le16_to_cpu(fw_ddb_entry->port);
1530
1531 sess->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp);
1532
1533 options = le16_to_cpu(fw_ddb_entry->options);
1534 if (options & DDB_OPT_IPV6_DEVICE)
1535 sprintf(ip_addr, "%pI6", fw_ddb_entry->ip_addr);
1536 else
1537 sprintf(ip_addr, "%pI4", fw_ddb_entry->ip_addr);
1538
1539 iscsi_set_param(cls_conn, ISCSI_PARAM_TARGET_NAME,
1540 (char *)fw_ddb_entry->iscsi_name, buflen);
1541 iscsi_set_param(cls_conn, ISCSI_PARAM_INITIATOR_NAME,
1542 (char *)ha->name_string, buflen);
1543 iscsi_set_param(cls_conn, ISCSI_PARAM_PERSISTENT_ADDRESS,
1544 (char *)ip_addr, buflen);
1545}
1546
1547void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha,
1548 struct ddb_entry *ddb_entry)
1549{
1550 struct iscsi_cls_session *cls_sess;
1551 struct iscsi_cls_conn *cls_conn;
1552 uint32_t ddb_state;
1553 dma_addr_t fw_ddb_entry_dma;
1554 struct dev_db_entry *fw_ddb_entry;
1555
1556 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1557 &fw_ddb_entry_dma, GFP_KERNEL);
1558 if (!fw_ddb_entry) {
1559 ql4_printk(KERN_ERR, ha,
1560 "%s: Unable to allocate dma buffer\n", __func__);
1561 goto exit_session_conn_fwddb_param;
1562 }
1563
1564 if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry,
1565 fw_ddb_entry_dma, NULL, NULL, &ddb_state,
1566 NULL, NULL, NULL) == QLA_ERROR) {
1567 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1568 "get_ddb_entry for fw_ddb_index %d\n",
1569 ha->host_no, __func__,
1570 ddb_entry->fw_ddb_index));
1571 goto exit_session_conn_fwddb_param;
1572 }
1573
1574 cls_sess = ddb_entry->sess;
1575
1576 cls_conn = ddb_entry->conn;
1577
1578 /* Update params */
1579 qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, cls_conn);
1580
1581exit_session_conn_fwddb_param:
1582 if (fw_ddb_entry)
1583 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1584 fw_ddb_entry, fw_ddb_entry_dma);
1585}
1586
1347void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, 1587void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
1348 struct ddb_entry *ddb_entry) 1588 struct ddb_entry *ddb_entry)
1349{ 1589{
@@ -1360,7 +1600,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
1360 if (!fw_ddb_entry) { 1600 if (!fw_ddb_entry) {
1361 ql4_printk(KERN_ERR, ha, 1601 ql4_printk(KERN_ERR, ha,
1362 "%s: Unable to allocate dma buffer\n", __func__); 1602 "%s: Unable to allocate dma buffer\n", __func__);
1363 return; 1603 goto exit_session_conn_param;
1364 } 1604 }
1365 1605
1366 if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, 1606 if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry,
@@ -1370,7 +1610,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
1370 "get_ddb_entry for fw_ddb_index %d\n", 1610 "get_ddb_entry for fw_ddb_index %d\n",
1371 ha->host_no, __func__, 1611 ha->host_no, __func__,
1372 ddb_entry->fw_ddb_index)); 1612 ddb_entry->fw_ddb_index));
1373 return; 1613 goto exit_session_conn_param;
1374 } 1614 }
1375 1615
1376 cls_sess = ddb_entry->sess; 1616 cls_sess = ddb_entry->sess;
@@ -1379,6 +1619,12 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
1379 cls_conn = ddb_entry->conn; 1619 cls_conn = ddb_entry->conn;
1380 conn = cls_conn->dd_data; 1620 conn = cls_conn->dd_data;
1381 1621
1622 /* Update timers after login */
1623 ddb_entry->default_relogin_timeout =
1624 le16_to_cpu(fw_ddb_entry->def_timeout);
1625 ddb_entry->default_time2wait =
1626 le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait);
1627
1382 /* Update params */ 1628 /* Update params */
1383 conn->max_recv_dlength = BYTE_UNITS * 1629 conn->max_recv_dlength = BYTE_UNITS *
1384 le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); 1630 le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len);
@@ -1407,6 +1653,11 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha,
1407 1653
1408 memcpy(sess->initiatorname, ha->name_string, 1654 memcpy(sess->initiatorname, ha->name_string,
1409 min(sizeof(ha->name_string), sizeof(sess->initiatorname))); 1655 min(sizeof(ha->name_string), sizeof(sess->initiatorname)));
1656
1657exit_session_conn_param:
1658 if (fw_ddb_entry)
1659 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1660 fw_ddb_entry, fw_ddb_entry_dma);
1410} 1661}
1411 1662
1412/* 1663/*
@@ -1607,6 +1858,9 @@ static void qla4xxx_mem_free(struct scsi_qla_host *ha)
1607 vfree(ha->chap_list); 1858 vfree(ha->chap_list);
1608 ha->chap_list = NULL; 1859 ha->chap_list = NULL;
1609 1860
1861 if (ha->fw_ddb_dma_pool)
1862 dma_pool_destroy(ha->fw_ddb_dma_pool);
1863
1610 /* release io space registers */ 1864 /* release io space registers */
1611 if (is_qla8022(ha)) { 1865 if (is_qla8022(ha)) {
1612 if (ha->nx_pcibase) 1866 if (ha->nx_pcibase)
@@ -1689,6 +1943,16 @@ static int qla4xxx_mem_alloc(struct scsi_qla_host *ha)
1689 goto mem_alloc_error_exit; 1943 goto mem_alloc_error_exit;
1690 } 1944 }
1691 1945
1946 ha->fw_ddb_dma_pool = dma_pool_create("ql4_fw_ddb", &ha->pdev->dev,
1947 DDB_DMA_BLOCK_SIZE, 8, 0);
1948
1949 if (ha->fw_ddb_dma_pool == NULL) {
1950 ql4_printk(KERN_WARNING, ha,
1951 "%s: fw_ddb_dma_pool allocation failed..\n",
1952 __func__);
1953 goto mem_alloc_error_exit;
1954 }
1955
1692 return QLA_SUCCESS; 1956 return QLA_SUCCESS;
1693 1957
1694mem_alloc_error_exit: 1958mem_alloc_error_exit:
@@ -1800,6 +2064,60 @@ void qla4_8xxx_watchdog(struct scsi_qla_host *ha)
1800 } 2064 }
1801} 2065}
1802 2066
2067void qla4xxx_check_relogin_flash_ddb(struct iscsi_cls_session *cls_sess)
2068{
2069 struct iscsi_session *sess;
2070 struct ddb_entry *ddb_entry;
2071 struct scsi_qla_host *ha;
2072
2073 sess = cls_sess->dd_data;
2074 ddb_entry = sess->dd_data;
2075 ha = ddb_entry->ha;
2076
2077 if (!(ddb_entry->ddb_type == FLASH_DDB))
2078 return;
2079
2080 if (adapter_up(ha) && !test_bit(DF_RELOGIN, &ddb_entry->flags) &&
2081 !iscsi_is_session_online(cls_sess)) {
2082 if (atomic_read(&ddb_entry->retry_relogin_timer) !=
2083 INVALID_ENTRY) {
2084 if (atomic_read(&ddb_entry->retry_relogin_timer) ==
2085 0) {
2086 atomic_set(&ddb_entry->retry_relogin_timer,
2087 INVALID_ENTRY);
2088 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags);
2089 set_bit(DF_RELOGIN, &ddb_entry->flags);
2090 DEBUG2(ql4_printk(KERN_INFO, ha,
2091 "%s: index [%d] login device\n",
2092 __func__, ddb_entry->fw_ddb_index));
2093 } else
2094 atomic_dec(&ddb_entry->retry_relogin_timer);
2095 }
2096 }
2097
2098 /* Wait for relogin to timeout */
2099 if (atomic_read(&ddb_entry->relogin_timer) &&
2100 (atomic_dec_and_test(&ddb_entry->relogin_timer) != 0)) {
2101 /*
2102 * If the relogin times out and the device is
2103 * still NOT ONLINE then try and relogin again.
2104 */
2105 if (!iscsi_is_session_online(cls_sess)) {
2106 /* Reset retry relogin timer */
2107 atomic_inc(&ddb_entry->relogin_retry_count);
2108 DEBUG2(ql4_printk(KERN_INFO, ha,
2109 "%s: index[%d] relogin timed out-retrying"
2110 " relogin (%d), retry (%d)\n", __func__,
2111 ddb_entry->fw_ddb_index,
2112 atomic_read(&ddb_entry->relogin_retry_count),
2113 ddb_entry->default_time2wait + 4));
2114 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags);
2115 atomic_set(&ddb_entry->retry_relogin_timer,
2116 ddb_entry->default_time2wait + 4);
2117 }
2118 }
2119}
2120
1803/** 2121/**
1804 * qla4xxx_timer - checks every second for work to do. 2122 * qla4xxx_timer - checks every second for work to do.
1805 * @ha: Pointer to host adapter structure. 2123 * @ha: Pointer to host adapter structure.
@@ -1809,6 +2127,8 @@ static void qla4xxx_timer(struct scsi_qla_host *ha)
1809 int start_dpc = 0; 2127 int start_dpc = 0;
1810 uint16_t w; 2128 uint16_t w;
1811 2129
2130 iscsi_host_for_each_session(ha->host, qla4xxx_check_relogin_flash_ddb);
2131
1812 /* If we are in the middle of AER/EEH processing 2132 /* If we are in the middle of AER/EEH processing
1813 * skip any processing and reschedule the timer 2133 * skip any processing and reschedule the timer
1814 */ 2134 */
@@ -2078,7 +2398,12 @@ static void qla4xxx_fail_session(struct iscsi_cls_session *cls_session)
2078 sess = cls_session->dd_data; 2398 sess = cls_session->dd_data;
2079 ddb_entry = sess->dd_data; 2399 ddb_entry = sess->dd_data;
2080 ddb_entry->fw_ddb_device_state = DDB_DS_SESSION_FAILED; 2400 ddb_entry->fw_ddb_device_state = DDB_DS_SESSION_FAILED;
2081 iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED); 2401
2402 if (ddb_entry->ddb_type == FLASH_DDB)
2403 iscsi_block_session(ddb_entry->sess);
2404 else
2405 iscsi_session_failure(cls_session->dd_data,
2406 ISCSI_ERR_CONN_FAILED);
2082} 2407}
2083 2408
2084/** 2409/**
@@ -2163,7 +2488,7 @@ recover_ha_init_adapter:
2163 2488
2164 /* NOTE: AF_ONLINE flag set upon successful completion of 2489 /* NOTE: AF_ONLINE flag set upon successful completion of
2165 * qla4xxx_initialize_adapter */ 2490 * qla4xxx_initialize_adapter */
2166 status = qla4xxx_initialize_adapter(ha); 2491 status = qla4xxx_initialize_adapter(ha, RESET_ADAPTER);
2167 } 2492 }
2168 2493
2169 /* Retry failed adapter initialization, if necessary 2494 /* Retry failed adapter initialization, if necessary
@@ -2245,17 +2570,108 @@ static void qla4xxx_relogin_devices(struct iscsi_cls_session *cls_session)
2245 iscsi_unblock_session(ddb_entry->sess); 2570 iscsi_unblock_session(ddb_entry->sess);
2246 } else { 2571 } else {
2247 /* Trigger relogin */ 2572 /* Trigger relogin */
2248 iscsi_session_failure(cls_session->dd_data, 2573 if (ddb_entry->ddb_type == FLASH_DDB) {
2249 ISCSI_ERR_CONN_FAILED); 2574 if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
2575 qla4xxx_arm_relogin_timer(ddb_entry);
2576 } else
2577 iscsi_session_failure(cls_session->dd_data,
2578 ISCSI_ERR_CONN_FAILED);
2250 } 2579 }
2251 } 2580 }
2252} 2581}
2253 2582
2583int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session)
2584{
2585 struct iscsi_session *sess;
2586 struct ddb_entry *ddb_entry;
2587 struct scsi_qla_host *ha;
2588
2589 sess = cls_session->dd_data;
2590 ddb_entry = sess->dd_data;
2591 ha = ddb_entry->ha;
2592 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]"
2593 " unblock session\n", ha->host_no, __func__,
2594 ddb_entry->fw_ddb_index);
2595
2596 iscsi_unblock_session(ddb_entry->sess);
2597
2598 /* Start scan target */
2599 if (test_bit(AF_ONLINE, &ha->flags)) {
2600 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]"
2601 " start scan\n", ha->host_no, __func__,
2602 ddb_entry->fw_ddb_index);
2603 scsi_queue_work(ha->host, &ddb_entry->sess->scan_work);
2604 }
2605 return QLA_SUCCESS;
2606}
2607
2608int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session)
2609{
2610 struct iscsi_session *sess;
2611 struct ddb_entry *ddb_entry;
2612 struct scsi_qla_host *ha;
2613
2614 sess = cls_session->dd_data;
2615 ddb_entry = sess->dd_data;
2616 ha = ddb_entry->ha;
2617 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]"
2618 " unblock user space session\n", ha->host_no, __func__,
2619 ddb_entry->fw_ddb_index);
2620 iscsi_conn_start(ddb_entry->conn);
2621 iscsi_conn_login_event(ddb_entry->conn,
2622 ISCSI_CONN_STATE_LOGGED_IN);
2623
2624 return QLA_SUCCESS;
2625}
2626
2254static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha) 2627static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha)
2255{ 2628{
2256 iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices); 2629 iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices);
2257} 2630}
2258 2631
2632static void qla4xxx_relogin_flash_ddb(struct iscsi_cls_session *cls_sess)
2633{
2634 uint16_t relogin_timer;
2635 struct iscsi_session *sess;
2636 struct ddb_entry *ddb_entry;
2637 struct scsi_qla_host *ha;
2638
2639 sess = cls_sess->dd_data;
2640 ddb_entry = sess->dd_data;
2641 ha = ddb_entry->ha;
2642
2643 relogin_timer = max(ddb_entry->default_relogin_timeout,
2644 (uint16_t)RELOGIN_TOV);
2645 atomic_set(&ddb_entry->relogin_timer, relogin_timer);
2646
2647 DEBUG2(ql4_printk(KERN_INFO, ha,
2648 "scsi%ld: Relogin index [%d]. TOV=%d\n", ha->host_no,
2649 ddb_entry->fw_ddb_index, relogin_timer));
2650
2651 qla4xxx_login_flash_ddb(cls_sess);
2652}
2653
2654static void qla4xxx_dpc_relogin(struct iscsi_cls_session *cls_sess)
2655{
2656 struct iscsi_session *sess;
2657 struct ddb_entry *ddb_entry;
2658 struct scsi_qla_host *ha;
2659
2660 sess = cls_sess->dd_data;
2661 ddb_entry = sess->dd_data;
2662 ha = ddb_entry->ha;
2663
2664 if (!(ddb_entry->ddb_type == FLASH_DDB))
2665 return;
2666
2667 if (test_and_clear_bit(DF_RELOGIN, &ddb_entry->flags) &&
2668 !iscsi_is_session_online(cls_sess)) {
2669 DEBUG2(ql4_printk(KERN_INFO, ha,
2670 "relogin issued\n"));
2671 qla4xxx_relogin_flash_ddb(cls_sess);
2672 }
2673}
2674
2259void qla4xxx_wake_dpc(struct scsi_qla_host *ha) 2675void qla4xxx_wake_dpc(struct scsi_qla_host *ha)
2260{ 2676{
2261 if (ha->dpc_thread) 2677 if (ha->dpc_thread)
@@ -2356,6 +2772,12 @@ dpc_post_reset_ha:
2356 if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) 2772 if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags))
2357 qla4xxx_get_dhcp_ip_address(ha); 2773 qla4xxx_get_dhcp_ip_address(ha);
2358 2774
2775 /* ---- relogin device? --- */
2776 if (adapter_up(ha) &&
2777 test_and_clear_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags)) {
2778 iscsi_host_for_each_session(ha->host, qla4xxx_dpc_relogin);
2779 }
2780
2359 /* ---- link change? --- */ 2781 /* ---- link change? --- */
2360 if (test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) { 2782 if (test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) {
2361 if (!test_bit(AF_LINK_UP, &ha->flags)) { 2783 if (!test_bit(AF_LINK_UP, &ha->flags)) {
@@ -2368,8 +2790,12 @@ dpc_post_reset_ha:
2368 * fatal error recovery. Therefore, the driver must 2790 * fatal error recovery. Therefore, the driver must
2369 * manually relogin to devices when recovering from 2791 * manually relogin to devices when recovering from
2370 * connection failures, logouts, expired KATO, etc. */ 2792 * connection failures, logouts, expired KATO, etc. */
2371 2793 if (test_and_clear_bit(AF_BUILD_DDB_LIST, &ha->flags)) {
2372 qla4xxx_relogin_all_devices(ha); 2794 qla4xxx_build_ddb_list(ha, ha->is_reset);
2795 iscsi_host_for_each_session(ha->host,
2796 qla4xxx_login_flash_ddb);
2797 } else
2798 qla4xxx_relogin_all_devices(ha);
2373 } 2799 }
2374 } 2800 }
2375} 2801}
@@ -2867,6 +3293,9 @@ static int get_fw_boot_info(struct scsi_qla_host *ha, uint16_t ddb_index[])
2867 " target ID %d\n", __func__, ddb_index[0], 3293 " target ID %d\n", __func__, ddb_index[0],
2868 ddb_index[1])); 3294 ddb_index[1]));
2869 3295
3296 ha->pri_ddb_idx = ddb_index[0];
3297 ha->sec_ddb_idx = ddb_index[1];
3298
2870exit_boot_info_free: 3299exit_boot_info_free:
2871 dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma); 3300 dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma);
2872exit_boot_info: 3301exit_boot_info:
@@ -3034,6 +3463,9 @@ static int qla4xxx_get_boot_info(struct scsi_qla_host *ha)
3034 return ret; 3463 return ret;
3035 } 3464 }
3036 3465
3466 if (ql4xdisablesysfsboot)
3467 return QLA_SUCCESS;
3468
3037 if (ddb_index[0] == 0xffff) 3469 if (ddb_index[0] == 0xffff)
3038 goto sec_target; 3470 goto sec_target;
3039 3471
@@ -3066,7 +3498,15 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha)
3066 struct iscsi_boot_kobj *boot_kobj; 3498 struct iscsi_boot_kobj *boot_kobj;
3067 3499
3068 if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS) 3500 if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS)
3069 return 0; 3501 return QLA_ERROR;
3502
3503 if (ql4xdisablesysfsboot) {
3504 ql4_printk(KERN_INFO, ha,
3505 "%s: syfsboot disabled - driver will trigger login"
3506 "and publish session for discovery .\n", __func__);
3507 return QLA_SUCCESS;
3508 }
3509
3070 3510
3071 ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no); 3511 ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no);
3072 if (!ha->boot_kset) 3512 if (!ha->boot_kset)
@@ -3108,7 +3548,7 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha)
3108 if (!boot_kobj) 3548 if (!boot_kobj)
3109 goto put_host; 3549 goto put_host;
3110 3550
3111 return 0; 3551 return QLA_SUCCESS;
3112 3552
3113put_host: 3553put_host:
3114 scsi_host_put(ha->host); 3554 scsi_host_put(ha->host);
@@ -3174,9 +3614,507 @@ static void qla4xxx_create_chap_list(struct scsi_qla_host *ha)
3174exit_chap_list: 3614exit_chap_list:
3175 dma_free_coherent(&ha->pdev->dev, chap_size, 3615 dma_free_coherent(&ha->pdev->dev, chap_size,
3176 chap_flash_data, chap_dma); 3616 chap_flash_data, chap_dma);
3177 return;
3178} 3617}
3179 3618
3619static void qla4xxx_get_param_ddb(struct ddb_entry *ddb_entry,
3620 struct ql4_tuple_ddb *tddb)
3621{
3622 struct scsi_qla_host *ha;
3623 struct iscsi_cls_session *cls_sess;
3624 struct iscsi_cls_conn *cls_conn;
3625 struct iscsi_session *sess;
3626 struct iscsi_conn *conn;
3627
3628 DEBUG2(printk(KERN_INFO "Func: %s\n", __func__));
3629 ha = ddb_entry->ha;
3630 cls_sess = ddb_entry->sess;
3631 sess = cls_sess->dd_data;
3632 cls_conn = ddb_entry->conn;
3633 conn = cls_conn->dd_data;
3634
3635 tddb->tpgt = sess->tpgt;
3636 tddb->port = conn->persistent_port;
3637 strncpy(tddb->iscsi_name, sess->targetname, ISCSI_NAME_SIZE);
3638 strncpy(tddb->ip_addr, conn->persistent_address, DDB_IPADDR_LEN);
3639}
3640
3641static void qla4xxx_convert_param_ddb(struct dev_db_entry *fw_ddb_entry,
3642 struct ql4_tuple_ddb *tddb)
3643{
3644 uint16_t options = 0;
3645
3646 tddb->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp);
3647 memcpy(&tddb->iscsi_name[0], &fw_ddb_entry->iscsi_name[0],
3648 min(sizeof(tddb->iscsi_name), sizeof(fw_ddb_entry->iscsi_name)));
3649
3650 options = le16_to_cpu(fw_ddb_entry->options);
3651 if (options & DDB_OPT_IPV6_DEVICE)
3652 sprintf(tddb->ip_addr, "%pI6", fw_ddb_entry->ip_addr);
3653 else
3654 sprintf(tddb->ip_addr, "%pI4", fw_ddb_entry->ip_addr);
3655
3656 tddb->port = le16_to_cpu(fw_ddb_entry->port);
3657}
3658
3659static int qla4xxx_compare_tuple_ddb(struct scsi_qla_host *ha,
3660 struct ql4_tuple_ddb *old_tddb,
3661 struct ql4_tuple_ddb *new_tddb)
3662{
3663 if (strcmp(old_tddb->iscsi_name, new_tddb->iscsi_name))
3664 return QLA_ERROR;
3665
3666 if (strcmp(old_tddb->ip_addr, new_tddb->ip_addr))
3667 return QLA_ERROR;
3668
3669 if (old_tddb->port != new_tddb->port)
3670 return QLA_ERROR;
3671
3672 DEBUG2(ql4_printk(KERN_INFO, ha,
3673 "Match Found, fw[%d,%d,%s,%s], [%d,%d,%s,%s]",
3674 old_tddb->port, old_tddb->tpgt, old_tddb->ip_addr,
3675 old_tddb->iscsi_name, new_tddb->port, new_tddb->tpgt,
3676 new_tddb->ip_addr, new_tddb->iscsi_name));
3677
3678 return QLA_SUCCESS;
3679}
3680
3681static int qla4xxx_is_session_exists(struct scsi_qla_host *ha,
3682 struct dev_db_entry *fw_ddb_entry)
3683{
3684 struct ddb_entry *ddb_entry;
3685 struct ql4_tuple_ddb *fw_tddb = NULL;
3686 struct ql4_tuple_ddb *tmp_tddb = NULL;
3687 int idx;
3688 int ret = QLA_ERROR;
3689
3690 fw_tddb = vzalloc(sizeof(*fw_tddb));
3691 if (!fw_tddb) {
3692 DEBUG2(ql4_printk(KERN_WARNING, ha,
3693 "Memory Allocation failed.\n"));
3694 ret = QLA_SUCCESS;
3695 goto exit_check;
3696 }
3697
3698 tmp_tddb = vzalloc(sizeof(*tmp_tddb));
3699 if (!tmp_tddb) {
3700 DEBUG2(ql4_printk(KERN_WARNING, ha,
3701 "Memory Allocation failed.\n"));
3702 ret = QLA_SUCCESS;
3703 goto exit_check;
3704 }
3705
3706 qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb);
3707
3708 for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) {
3709 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx);
3710 if (ddb_entry == NULL)
3711 continue;
3712
3713 qla4xxx_get_param_ddb(ddb_entry, tmp_tddb);
3714 if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) {
3715 ret = QLA_SUCCESS; /* found */
3716 goto exit_check;
3717 }
3718 }
3719
3720exit_check:
3721 if (fw_tddb)
3722 vfree(fw_tddb);
3723 if (tmp_tddb)
3724 vfree(tmp_tddb);
3725 return ret;
3726}
3727
3728static int qla4xxx_is_flash_ddb_exists(struct scsi_qla_host *ha,
3729 struct list_head *list_nt,
3730 struct dev_db_entry *fw_ddb_entry)
3731{
3732 struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp;
3733 struct ql4_tuple_ddb *fw_tddb = NULL;
3734 struct ql4_tuple_ddb *tmp_tddb = NULL;
3735 int ret = QLA_ERROR;
3736
3737 fw_tddb = vzalloc(sizeof(*fw_tddb));
3738 if (!fw_tddb) {
3739 DEBUG2(ql4_printk(KERN_WARNING, ha,
3740 "Memory Allocation failed.\n"));
3741 ret = QLA_SUCCESS;
3742 goto exit_check;
3743 }
3744
3745 tmp_tddb = vzalloc(sizeof(*tmp_tddb));
3746 if (!tmp_tddb) {
3747 DEBUG2(ql4_printk(KERN_WARNING, ha,
3748 "Memory Allocation failed.\n"));
3749 ret = QLA_SUCCESS;
3750 goto exit_check;
3751 }
3752
3753 qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb);
3754
3755 list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) {
3756 qla4xxx_convert_param_ddb(&nt_ddb_idx->fw_ddb, tmp_tddb);
3757 if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) {
3758 ret = QLA_SUCCESS; /* found */
3759 goto exit_check;
3760 }
3761 }
3762
3763exit_check:
3764 if (fw_tddb)
3765 vfree(fw_tddb);
3766 if (tmp_tddb)
3767 vfree(tmp_tddb);
3768 return ret;
3769}
3770
3771static void qla4xxx_free_nt_list(struct list_head *list_nt)
3772{
3773 struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp;
3774
3775 /* Free up the normaltargets list */
3776 list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) {
3777 list_del_init(&nt_ddb_idx->list);
3778 vfree(nt_ddb_idx);
3779 }
3780
3781}
3782
3783static struct iscsi_endpoint *qla4xxx_get_ep_fwdb(struct scsi_qla_host *ha,
3784 struct dev_db_entry *fw_ddb_entry)
3785{
3786 struct iscsi_endpoint *ep;
3787 struct sockaddr_in *addr;
3788 struct sockaddr_in6 *addr6;
3789 struct sockaddr *dst_addr;
3790 char *ip;
3791
3792 /* TODO: need to destroy on unload iscsi_endpoint*/
3793 dst_addr = vmalloc(sizeof(*dst_addr));
3794 if (!dst_addr)
3795 return NULL;
3796
3797 if (fw_ddb_entry->options & DDB_OPT_IPV6_DEVICE) {
3798 dst_addr->sa_family = AF_INET6;
3799 addr6 = (struct sockaddr_in6 *)dst_addr;
3800 ip = (char *)&addr6->sin6_addr;
3801 memcpy(ip, fw_ddb_entry->ip_addr, IPv6_ADDR_LEN);
3802 addr6->sin6_port = htons(le16_to_cpu(fw_ddb_entry->port));
3803
3804 } else {
3805 dst_addr->sa_family = AF_INET;
3806 addr = (struct sockaddr_in *)dst_addr;
3807 ip = (char *)&addr->sin_addr;
3808 memcpy(ip, fw_ddb_entry->ip_addr, IP_ADDR_LEN);
3809 addr->sin_port = htons(le16_to_cpu(fw_ddb_entry->port));
3810 }
3811
3812 ep = qla4xxx_ep_connect(ha->host, dst_addr, 0);
3813 vfree(dst_addr);
3814 return ep;
3815}
3816
3817static int qla4xxx_verify_boot_idx(struct scsi_qla_host *ha, uint16_t idx)
3818{
3819 if (ql4xdisablesysfsboot)
3820 return QLA_SUCCESS;
3821 if (idx == ha->pri_ddb_idx || idx == ha->sec_ddb_idx)
3822 return QLA_ERROR;
3823 return QLA_SUCCESS;
3824}
3825
3826static void qla4xxx_setup_flash_ddb_entry(struct scsi_qla_host *ha,
3827 struct ddb_entry *ddb_entry)
3828{
3829 ddb_entry->ddb_type = FLASH_DDB;
3830 ddb_entry->fw_ddb_index = INVALID_ENTRY;
3831 ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE;
3832 ddb_entry->ha = ha;
3833 ddb_entry->unblock_sess = qla4xxx_unblock_flash_ddb;
3834 ddb_entry->ddb_change = qla4xxx_flash_ddb_change;
3835
3836 atomic_set(&ddb_entry->retry_relogin_timer, INVALID_ENTRY);
3837 atomic_set(&ddb_entry->relogin_timer, 0);
3838 atomic_set(&ddb_entry->relogin_retry_count, 0);
3839
3840 ddb_entry->default_relogin_timeout =
3841 le16_to_cpu(ddb_entry->fw_ddb_entry.def_timeout);
3842 ddb_entry->default_time2wait =
3843 le16_to_cpu(ddb_entry->fw_ddb_entry.iscsi_def_time2wait);
3844}
3845
3846static void qla4xxx_wait_for_ip_configuration(struct scsi_qla_host *ha)
3847{
3848 uint32_t idx = 0;
3849 uint32_t ip_idx[IP_ADDR_COUNT] = {0, 1, 2, 3}; /* 4 IP interfaces */
3850 uint32_t sts[MBOX_REG_COUNT];
3851 uint32_t ip_state;
3852 unsigned long wtime;
3853 int ret;
3854
3855 wtime = jiffies + (HZ * IP_CONFIG_TOV);
3856 do {
3857 for (idx = 0; idx < IP_ADDR_COUNT; idx++) {
3858 if (ip_idx[idx] == -1)
3859 continue;
3860
3861 ret = qla4xxx_get_ip_state(ha, 0, ip_idx[idx], sts);
3862
3863 if (ret == QLA_ERROR) {
3864 ip_idx[idx] = -1;
3865 continue;
3866 }
3867
3868 ip_state = (sts[1] & IP_STATE_MASK) >> IP_STATE_SHIFT;
3869
3870 DEBUG2(ql4_printk(KERN_INFO, ha,
3871 "Waiting for IP state for idx = %d, state = 0x%x\n",
3872 ip_idx[idx], ip_state));
3873 if (ip_state == IP_ADDRSTATE_UNCONFIGURED ||
3874 ip_state == IP_ADDRSTATE_INVALID ||
3875 ip_state == IP_ADDRSTATE_PREFERRED ||
3876 ip_state == IP_ADDRSTATE_DEPRICATED ||
3877 ip_state == IP_ADDRSTATE_DISABLING)
3878 ip_idx[idx] = -1;
3879
3880 }
3881
3882 /* Break if all IP states checked */
3883 if ((ip_idx[0] == -1) &&
3884 (ip_idx[1] == -1) &&
3885 (ip_idx[2] == -1) &&
3886 (ip_idx[3] == -1))
3887 break;
3888 schedule_timeout_uninterruptible(HZ);
3889 } while (time_after(wtime, jiffies));
3890}
3891
3892void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset)
3893{
3894 int max_ddbs;
3895 int ret;
3896 uint32_t idx = 0, next_idx = 0;
3897 uint32_t state = 0, conn_err = 0;
3898 uint16_t conn_id;
3899 struct dev_db_entry *fw_ddb_entry;
3900 struct ddb_entry *ddb_entry = NULL;
3901 dma_addr_t fw_ddb_dma;
3902 struct iscsi_cls_session *cls_sess;
3903 struct iscsi_session *sess;
3904 struct iscsi_cls_conn *cls_conn;
3905 struct iscsi_endpoint *ep;
3906 uint16_t cmds_max = 32, tmo = 0;
3907 uint32_t initial_cmdsn = 0;
3908 struct list_head list_st, list_nt; /* List of sendtargets */
3909 struct qla_ddb_index *st_ddb_idx, *st_ddb_idx_tmp;
3910 int fw_idx_size;
3911 unsigned long wtime;
3912 struct qla_ddb_index *nt_ddb_idx;
3913
3914 if (!test_bit(AF_LINK_UP, &ha->flags)) {
3915 set_bit(AF_BUILD_DDB_LIST, &ha->flags);
3916 ha->is_reset = is_reset;
3917 return;
3918 }
3919 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX :
3920 MAX_DEV_DB_ENTRIES;
3921
3922 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL,
3923 &fw_ddb_dma);
3924 if (fw_ddb_entry == NULL) {
3925 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n"));
3926 goto exit_ddb_list;
3927 }
3928
3929 INIT_LIST_HEAD(&list_st);
3930 INIT_LIST_HEAD(&list_nt);
3931 fw_idx_size = sizeof(struct qla_ddb_index);
3932
3933 for (idx = 0; idx < max_ddbs; idx = next_idx) {
3934 ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry,
3935 fw_ddb_dma, NULL,
3936 &next_idx, &state, &conn_err,
3937 NULL, &conn_id);
3938 if (ret == QLA_ERROR)
3939 break;
3940
3941 if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS)
3942 goto continue_next_st;
3943
3944 /* Check if ST, add to the list_st */
3945 if (strlen((char *) fw_ddb_entry->iscsi_name) != 0)
3946 goto continue_next_st;
3947
3948 st_ddb_idx = vzalloc(fw_idx_size);
3949 if (!st_ddb_idx)
3950 break;
3951
3952 st_ddb_idx->fw_ddb_idx = idx;
3953
3954 list_add_tail(&st_ddb_idx->list, &list_st);
3955continue_next_st:
3956 if (next_idx == 0)
3957 break;
3958 }
3959
3960 /* Before issuing conn open mbox, ensure all IPs states are configured
3961 * Note, conn open fails if IPs are not configured
3962 */
3963 qla4xxx_wait_for_ip_configuration(ha);
3964
3965 /* Go thru the STs and fire the sendtargets by issuing conn open mbx */
3966 list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) {
3967 qla4xxx_conn_open(ha, st_ddb_idx->fw_ddb_idx);
3968 }
3969
3970 /* Wait to ensure all sendtargets are done for min 12 sec wait */
3971 tmo = ((ha->def_timeout < LOGIN_TOV) ? LOGIN_TOV : ha->def_timeout);
3972 DEBUG2(ql4_printk(KERN_INFO, ha,
3973 "Default time to wait for build ddb %d\n", tmo));
3974
3975 wtime = jiffies + (HZ * tmo);
3976 do {
3977 list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st,
3978 list) {
3979 ret = qla4xxx_get_fwddb_entry(ha,
3980 st_ddb_idx->fw_ddb_idx,
3981 NULL, 0, NULL, &next_idx,
3982 &state, &conn_err, NULL,
3983 NULL);
3984 if (ret == QLA_ERROR)
3985 continue;
3986
3987 if (state == DDB_DS_NO_CONNECTION_ACTIVE ||
3988 state == DDB_DS_SESSION_FAILED) {
3989 list_del_init(&st_ddb_idx->list);
3990 vfree(st_ddb_idx);
3991 }
3992 }
3993 schedule_timeout_uninterruptible(HZ / 10);
3994 } while (time_after(wtime, jiffies));
3995
3996 /* Free up the sendtargets list */
3997 list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) {
3998 list_del_init(&st_ddb_idx->list);
3999 vfree(st_ddb_idx);
4000 }
4001
4002 for (idx = 0; idx < max_ddbs; idx = next_idx) {
4003 ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry,
4004 fw_ddb_dma, NULL,
4005 &next_idx, &state, &conn_err,
4006 NULL, &conn_id);
4007 if (ret == QLA_ERROR)
4008 break;
4009
4010 if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS)
4011 goto continue_next_nt;
4012
4013 /* Check if NT, then add to list it */
4014 if (strlen((char *) fw_ddb_entry->iscsi_name) == 0)
4015 goto continue_next_nt;
4016
4017 if (state == DDB_DS_NO_CONNECTION_ACTIVE ||
4018 state == DDB_DS_SESSION_FAILED) {
4019 DEBUG2(ql4_printk(KERN_INFO, ha,
4020 "Adding DDB to session = 0x%x\n",
4021 idx));
4022 if (is_reset == INIT_ADAPTER) {
4023 nt_ddb_idx = vmalloc(fw_idx_size);
4024 if (!nt_ddb_idx)
4025 break;
4026
4027 nt_ddb_idx->fw_ddb_idx = idx;
4028
4029 memcpy(&nt_ddb_idx->fw_ddb, fw_ddb_entry,
4030 sizeof(struct dev_db_entry));
4031
4032 if (qla4xxx_is_flash_ddb_exists(ha, &list_nt,
4033 fw_ddb_entry) == QLA_SUCCESS) {
4034 vfree(nt_ddb_idx);
4035 goto continue_next_nt;
4036 }
4037 list_add_tail(&nt_ddb_idx->list, &list_nt);
4038 } else if (is_reset == RESET_ADAPTER) {
4039 if (qla4xxx_is_session_exists(ha,
4040 fw_ddb_entry) == QLA_SUCCESS)
4041 goto continue_next_nt;
4042 }
4043
4044 /* Create session object, with INVALID_ENTRY,
4045 * the targer_id would get set when we issue the login
4046 */
4047 cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport,
4048 ha->host, cmds_max,
4049 sizeof(struct ddb_entry),
4050 sizeof(struct ql4_task_data),
4051 initial_cmdsn, INVALID_ENTRY);
4052 if (!cls_sess)
4053 goto exit_ddb_list;
4054
4055 /*
4056 * iscsi_session_setup increments the driver reference
4057 * count which wouldn't let the driver to be unloaded.
4058 * so calling module_put function to decrement the
4059 * reference count.
4060 **/
4061 module_put(qla4xxx_iscsi_transport.owner);
4062 sess = cls_sess->dd_data;
4063 ddb_entry = sess->dd_data;
4064 ddb_entry->sess = cls_sess;
4065
4066 cls_sess->recovery_tmo = ql4xsess_recovery_tmo;
4067 memcpy(&ddb_entry->fw_ddb_entry, fw_ddb_entry,
4068 sizeof(struct dev_db_entry));
4069
4070 qla4xxx_setup_flash_ddb_entry(ha, ddb_entry);
4071
4072 cls_conn = iscsi_conn_setup(cls_sess,
4073 sizeof(struct qla_conn),
4074 conn_id);
4075 if (!cls_conn)
4076 goto exit_ddb_list;
4077
4078 ddb_entry->conn = cls_conn;
4079
4080 /* Setup ep, for displaying attributes in sysfs */
4081 ep = qla4xxx_get_ep_fwdb(ha, fw_ddb_entry);
4082 if (ep) {
4083 ep->conn = cls_conn;
4084 cls_conn->ep = ep;
4085 } else {
4086 DEBUG2(ql4_printk(KERN_ERR, ha,
4087 "Unable to get ep\n"));
4088 }
4089
4090 /* Update sess/conn params */
4091 qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess,
4092 cls_conn);
4093
4094 if (is_reset == RESET_ADAPTER) {
4095 iscsi_block_session(cls_sess);
4096 /* Use the relogin path to discover new devices
4097 * by short-circuting the logic of setting
4098 * timer to relogin - instead set the flags
4099 * to initiate login right away.
4100 */
4101 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags);
4102 set_bit(DF_RELOGIN, &ddb_entry->flags);
4103 }
4104 }
4105continue_next_nt:
4106 if (next_idx == 0)
4107 break;
4108 }
4109exit_ddb_list:
4110 qla4xxx_free_nt_list(&list_nt);
4111 if (fw_ddb_entry)
4112 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma);
4113
4114 qla4xxx_free_ddb_index(ha);
4115}
4116
4117
3180/** 4118/**
3181 * qla4xxx_probe_adapter - callback function to probe HBA 4119 * qla4xxx_probe_adapter - callback function to probe HBA
3182 * @pdev: pointer to pci_dev structure 4120 * @pdev: pointer to pci_dev structure
@@ -3298,7 +4236,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev,
3298 * firmware 4236 * firmware
3299 * NOTE: interrupts enabled upon successful completion 4237 * NOTE: interrupts enabled upon successful completion
3300 */ 4238 */
3301 status = qla4xxx_initialize_adapter(ha); 4239 status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER);
3302 while ((!test_bit(AF_ONLINE, &ha->flags)) && 4240 while ((!test_bit(AF_ONLINE, &ha->flags)) &&
3303 init_retry_count++ < MAX_INIT_RETRIES) { 4241 init_retry_count++ < MAX_INIT_RETRIES) {
3304 4242
@@ -3319,7 +4257,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev,
3319 if (ha->isp_ops->reset_chip(ha) == QLA_ERROR) 4257 if (ha->isp_ops->reset_chip(ha) == QLA_ERROR)
3320 continue; 4258 continue;
3321 4259
3322 status = qla4xxx_initialize_adapter(ha); 4260 status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER);
3323 } 4261 }
3324 4262
3325 if (!test_bit(AF_ONLINE, &ha->flags)) { 4263 if (!test_bit(AF_ONLINE, &ha->flags)) {
@@ -3386,12 +4324,16 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev,
3386 ha->host_no, ha->firmware_version[0], ha->firmware_version[1], 4324 ha->host_no, ha->firmware_version[0], ha->firmware_version[1],
3387 ha->patch_number, ha->build_number); 4325 ha->patch_number, ha->build_number);
3388 4326
3389 qla4xxx_create_chap_list(ha);
3390
3391 if (qla4xxx_setup_boot_info(ha)) 4327 if (qla4xxx_setup_boot_info(ha))
3392 ql4_printk(KERN_ERR, ha, "%s:ISCSI boot info setup failed\n", 4328 ql4_printk(KERN_ERR, ha, "%s:ISCSI boot info setup failed\n",
3393 __func__); 4329 __func__);
3394 4330
4331 /* Perform the build ddb list and login to each */
4332 qla4xxx_build_ddb_list(ha, INIT_ADAPTER);
4333 iscsi_host_for_each_session(ha->host, qla4xxx_login_flash_ddb);
4334
4335 qla4xxx_create_chap_list(ha);
4336
3395 qla4xxx_create_ifaces(ha); 4337 qla4xxx_create_ifaces(ha);
3396 return 0; 4338 return 0;
3397 4339
@@ -3449,6 +4391,38 @@ static void qla4xxx_prevent_other_port_reinit(struct scsi_qla_host *ha)
3449 } 4391 }
3450} 4392}
3451 4393
4394static void qla4xxx_destroy_fw_ddb_session(struct scsi_qla_host *ha)
4395{
4396 struct ddb_entry *ddb_entry;
4397 int options;
4398 int idx;
4399
4400 for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) {
4401
4402 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx);
4403 if ((ddb_entry != NULL) &&
4404 (ddb_entry->ddb_type == FLASH_DDB)) {
4405
4406 options = LOGOUT_OPTION_CLOSE_SESSION;
4407 if (qla4xxx_session_logout_ddb(ha, ddb_entry, options)
4408 == QLA_ERROR)
4409 ql4_printk(KERN_ERR, ha, "%s: Logout failed\n",
4410 __func__);
4411
4412 qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index);
4413 /*
4414 * we have decremented the reference count of the driver
4415 * when we setup the session to have the driver unload
4416 * to be seamless without actually destroying the
4417 * session
4418 **/
4419 try_module_get(qla4xxx_iscsi_transport.owner);
4420 iscsi_destroy_endpoint(ddb_entry->conn->ep);
4421 qla4xxx_free_ddb(ha, ddb_entry);
4422 iscsi_session_teardown(ddb_entry->sess);
4423 }
4424 }
4425}
3452/** 4426/**
3453 * qla4xxx_remove_adapter - calback function to remove adapter. 4427 * qla4xxx_remove_adapter - calback function to remove adapter.
3454 * @pci_dev: PCI device pointer 4428 * @pci_dev: PCI device pointer
@@ -3465,9 +4439,11 @@ static void __devexit qla4xxx_remove_adapter(struct pci_dev *pdev)
3465 /* destroy iface from sysfs */ 4439 /* destroy iface from sysfs */
3466 qla4xxx_destroy_ifaces(ha); 4440 qla4xxx_destroy_ifaces(ha);
3467 4441
3468 if (ha->boot_kset) 4442 if ((!ql4xdisablesysfsboot) && ha->boot_kset)
3469 iscsi_boot_destroy_kset(ha->boot_kset); 4443 iscsi_boot_destroy_kset(ha->boot_kset);
3470 4444
4445 qla4xxx_destroy_fw_ddb_session(ha);
4446
3471 scsi_remove_host(ha->host); 4447 scsi_remove_host(ha->host);
3472 4448
3473 qla4xxx_free_adapter(ha); 4449 qla4xxx_free_adapter(ha);
@@ -4115,7 +5091,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha)
4115 5091
4116 qla4_8xxx_idc_unlock(ha); 5092 qla4_8xxx_idc_unlock(ha);
4117 clear_bit(AF_FW_RECOVERY, &ha->flags); 5093 clear_bit(AF_FW_RECOVERY, &ha->flags);
4118 rval = qla4xxx_initialize_adapter(ha); 5094 rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER);
4119 qla4_8xxx_idc_lock(ha); 5095 qla4_8xxx_idc_lock(ha);
4120 5096
4121 if (rval != QLA_SUCCESS) { 5097 if (rval != QLA_SUCCESS) {
@@ -4151,7 +5127,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha)
4151 if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == 5127 if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
4152 QLA82XX_DEV_READY)) { 5128 QLA82XX_DEV_READY)) {
4153 clear_bit(AF_FW_RECOVERY, &ha->flags); 5129 clear_bit(AF_FW_RECOVERY, &ha->flags);
4154 rval = qla4xxx_initialize_adapter(ha); 5130 rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER);
4155 if (rval == QLA_SUCCESS) { 5131 if (rval == QLA_SUCCESS) {
4156 ret = qla4xxx_request_irqs(ha); 5132 ret = qla4xxx_request_irqs(ha);
4157 if (ret) { 5133 if (ret) {
diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h
index c15347d3f532..5254e57968f5 100644
--- a/drivers/scsi/qla4xxx/ql4_version.h
+++ b/drivers/scsi/qla4xxx/ql4_version.h
@@ -5,4 +5,4 @@
5 * See LICENSE.qla4xxx for copyright and licensing details. 5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */ 6 */
7 7
8#define QLA4XXX_DRIVER_VERSION "5.02.00-k8" 8#define QLA4XXX_DRIVER_VERSION "5.02.00-k9"
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 717ebc9ff941..600d82348511 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
264 ret = -ENODEV; 264 ret = -ENODEV;
265 goto err0; 265 goto err0;
266 } 266 }
267 dwc->revision = reg & DWC3_GSNPSREV_MASK; 267 dwc->revision = reg;
268 268
269 dwc3_core_soft_reset(dwc); 269 dwc3_core_soft_reset(dwc);
270 270
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 8efe0fa9228d..1ed56d8492d7 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1748,7 +1748,7 @@ static int __init at91udc_probe(struct platform_device *pdev)
1748 1748
1749 /* rm9200 needs manual D+ pullup; off by default */ 1749 /* rm9200 needs manual D+ pullup; off by default */
1750 if (cpu_is_at91rm9200()) { 1750 if (cpu_is_at91rm9200()) {
1751 if (udc->board.pullup_pin <= 0) { 1751 if (gpio_is_valid(udc->board.pullup_pin)) {
1752 DBG("no D+ pullup?\n"); 1752 DBG("no D+ pullup?\n");
1753 retval = -ENODEV; 1753 retval = -ENODEV;
1754 goto fail0; 1754 goto fail0;
@@ -1815,7 +1815,7 @@ static int __init at91udc_probe(struct platform_device *pdev)
1815 DBG("request irq %d failed\n", udc->udp_irq); 1815 DBG("request irq %d failed\n", udc->udp_irq);
1816 goto fail1; 1816 goto fail1;
1817 } 1817 }
1818 if (udc->board.vbus_pin > 0) { 1818 if (gpio_is_valid(udc->board.vbus_pin)) {
1819 retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); 1819 retval = gpio_request(udc->board.vbus_pin, "udc_vbus");
1820 if (retval < 0) { 1820 if (retval < 0) {
1821 DBG("request vbus pin failed\n"); 1821 DBG("request vbus pin failed\n");
@@ -1859,10 +1859,10 @@ static int __init at91udc_probe(struct platform_device *pdev)
1859 INFO("%s version %s\n", driver_name, DRIVER_VERSION); 1859 INFO("%s version %s\n", driver_name, DRIVER_VERSION);
1860 return 0; 1860 return 0;
1861fail4: 1861fail4:
1862 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled) 1862 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled)
1863 free_irq(udc->board.vbus_pin, udc); 1863 free_irq(udc->board.vbus_pin, udc);
1864fail3: 1864fail3:
1865 if (udc->board.vbus_pin > 0) 1865 if (gpio_is_valid(udc->board.vbus_pin))
1866 gpio_free(udc->board.vbus_pin); 1866 gpio_free(udc->board.vbus_pin);
1867fail2: 1867fail2:
1868 free_irq(udc->udp_irq, udc); 1868 free_irq(udc->udp_irq, udc);
@@ -1897,7 +1897,7 @@ static int __exit at91udc_remove(struct platform_device *pdev)
1897 1897
1898 device_init_wakeup(&pdev->dev, 0); 1898 device_init_wakeup(&pdev->dev, 0);
1899 remove_debug_file(udc); 1899 remove_debug_file(udc);
1900 if (udc->board.vbus_pin > 0) { 1900 if (gpio_is_valid(udc->board.vbus_pin)) {
1901 free_irq(udc->board.vbus_pin, udc); 1901 free_irq(udc->board.vbus_pin, udc);
1902 gpio_free(udc->board.vbus_pin); 1902 gpio_free(udc->board.vbus_pin);
1903 } 1903 }
@@ -1941,7 +1941,7 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg)
1941 enable_irq_wake(udc->udp_irq); 1941 enable_irq_wake(udc->udp_irq);
1942 1942
1943 udc->active_suspend = wake; 1943 udc->active_suspend = wake;
1944 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) 1944 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake)
1945 enable_irq_wake(udc->board.vbus_pin); 1945 enable_irq_wake(udc->board.vbus_pin);
1946 return 0; 1946 return 0;
1947} 1947}
@@ -1951,7 +1951,7 @@ static int at91udc_resume(struct platform_device *pdev)
1951 struct at91_udc *udc = platform_get_drvdata(pdev); 1951 struct at91_udc *udc = platform_get_drvdata(pdev);
1952 unsigned long flags; 1952 unsigned long flags;
1953 1953
1954 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && 1954 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled &&
1955 udc->active_suspend) 1955 udc->active_suspend)
1956 disable_irq_wake(udc->board.vbus_pin); 1956 disable_irq_wake(udc->board.vbus_pin);
1957 1957
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 596a0b464e61..4dff83d2f265 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -130,9 +130,6 @@ ep_matches (
130 num_req_streams = ep_comp->bmAttributes & 0x1f; 130 num_req_streams = ep_comp->bmAttributes & 0x1f;
131 if (num_req_streams > ep->max_streams) 131 if (num_req_streams > ep->max_streams)
132 return 0; 132 return 0;
133 /* Update the ep_comp descriptor if needed */
134 if (num_req_streams != ep->max_streams)
135 ep_comp->bmAttributes = ep->max_streams;
136 } 133 }
137 134
138 } 135 }
diff --git a/drivers/usb/host/isp1760-if.c b/drivers/usb/host/isp1760-if.c
index a7dc1e1d45f2..2ac4ac2e4ef9 100644
--- a/drivers/usb/host/isp1760-if.c
+++ b/drivers/usb/host/isp1760-if.c
@@ -18,7 +18,7 @@
18 18
19#include "isp1760-hcd.h" 19#include "isp1760-hcd.h"
20 20
21#ifdef CONFIG_OF 21#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_platform.h> 24#include <linux/of_platform.h>
@@ -31,7 +31,7 @@
31#include <linux/pci.h> 31#include <linux/pci.h>
32#endif 32#endif
33 33
34#ifdef CONFIG_OF 34#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
35struct isp1760 { 35struct isp1760 {
36 struct usb_hcd *hcd; 36 struct usb_hcd *hcd;
37 int rst_gpio; 37 int rst_gpio;
@@ -437,7 +437,7 @@ static int __init isp1760_init(void)
437 ret = platform_driver_register(&isp1760_plat_driver); 437 ret = platform_driver_register(&isp1760_plat_driver);
438 if (!ret) 438 if (!ret)
439 any_ret = 0; 439 any_ret = 0;
440#ifdef CONFIG_OF 440#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
441 ret = platform_driver_register(&isp1760_of_driver); 441 ret = platform_driver_register(&isp1760_of_driver);
442 if (!ret) 442 if (!ret)
443 any_ret = 0; 443 any_ret = 0;
@@ -457,7 +457,7 @@ module_init(isp1760_init);
457static void __exit isp1760_exit(void) 457static void __exit isp1760_exit(void)
458{ 458{
459 platform_driver_unregister(&isp1760_plat_driver); 459 platform_driver_unregister(&isp1760_plat_driver);
460#ifdef CONFIG_OF 460#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
461 platform_driver_unregister(&isp1760_of_driver); 461 platform_driver_unregister(&isp1760_of_driver);
462#endif 462#endif
463#ifdef CONFIG_PCI 463#ifdef CONFIG_PCI
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 95a9fec38e89..5df0b0e3392b 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -223,7 +223,7 @@ static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int
223 if (port < 0 || port >= 2) 223 if (port < 0 || port >= 2)
224 return; 224 return;
225 225
226 if (pdata->vbus_pin[port] <= 0) 226 if (!gpio_is_valid(pdata->vbus_pin[port]))
227 return; 227 return;
228 228
229 gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); 229 gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable);
@@ -234,7 +234,7 @@ static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port)
234 if (port < 0 || port >= 2) 234 if (port < 0 || port >= 2)
235 return -EINVAL; 235 return -EINVAL;
236 236
237 if (pdata->vbus_pin[port] <= 0) 237 if (!gpio_is_valid(pdata->vbus_pin[port]))
238 return -EINVAL; 238 return -EINVAL;
239 239
240 return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; 240 return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted;
@@ -465,7 +465,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
465 465
466 if (pdata) { 466 if (pdata) {
467 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { 467 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
468 if (pdata->vbus_pin[i] <= 0) 468 if (!gpio_is_valid(pdata->vbus_pin[i]))
469 continue; 469 continue;
470 gpio_request(pdata->vbus_pin[i], "ohci_vbus"); 470 gpio_request(pdata->vbus_pin[i], "ohci_vbus");
471 ohci_at91_usb_set_power(pdata, i, 1); 471 ohci_at91_usb_set_power(pdata, i, 1);
@@ -474,7 +474,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
474 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { 474 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
475 int ret; 475 int ret;
476 476
477 if (pdata->overcurrent_pin[i] <= 0) 477 if (!gpio_is_valid(pdata->overcurrent_pin[i]))
478 continue; 478 continue;
479 gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); 479 gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent");
480 480
@@ -499,14 +499,14 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev)
499 499
500 if (pdata) { 500 if (pdata) {
501 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { 501 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
502 if (pdata->vbus_pin[i] <= 0) 502 if (!gpio_is_valid(pdata->vbus_pin[i]))
503 continue; 503 continue;
504 ohci_at91_usb_set_power(pdata, i, 0); 504 ohci_at91_usb_set_power(pdata, i, 0);
505 gpio_free(pdata->vbus_pin[i]); 505 gpio_free(pdata->vbus_pin[i]);
506 } 506 }
507 507
508 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { 508 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
509 if (pdata->overcurrent_pin[i] <= 0) 509 if (!gpio_is_valid(pdata->overcurrent_pin[i]))
510 continue; 510 continue;
511 free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); 511 free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev);
512 gpio_free(pdata->overcurrent_pin[i]); 512 gpio_free(pdata->overcurrent_pin[i]);
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 60ddba8066ea..79cb0af779fa 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -774,6 +774,10 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
774 if (musb->double_buffer_not_ok) 774 if (musb->double_buffer_not_ok)
775 musb_writew(epio, MUSB_TXMAXP, 775 musb_writew(epio, MUSB_TXMAXP,
776 hw_ep->max_packet_sz_tx); 776 hw_ep->max_packet_sz_tx);
777 else if (can_bulk_split(musb, qh->type))
778 musb_writew(epio, MUSB_TXMAXP, packet_sz
779 | ((hw_ep->max_packet_sz_tx /
780 packet_sz) - 1) << 11);
777 else 781 else
778 musb_writew(epio, MUSB_TXMAXP, 782 musb_writew(epio, MUSB_TXMAXP,
779 qh->maxpacket | 783 qh->maxpacket |
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 87445b2d72a7..00562566ef5f 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -35,6 +35,11 @@
35 35
36#define DRV_NAME "AT91SAM9 Watchdog" 36#define DRV_NAME "AT91SAM9 Watchdog"
37 37
38#define wdt_read(field) \
39 __raw_readl(at91wdt_private.base + field)
40#define wdt_write(field, val) \
41 __raw_writel((val), at91wdt_private.base + field)
42
38/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, 43/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
39 * use this to convert a watchdog 44 * use this to convert a watchdog
40 * value from/to milliseconds. 45 * value from/to milliseconds.
@@ -63,6 +68,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
63static void at91_ping(unsigned long data); 68static void at91_ping(unsigned long data);
64 69
65static struct { 70static struct {
71 void __iomem *base;
66 unsigned long next_heartbeat; /* the next_heartbeat for the timer */ 72 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
67 unsigned long open; 73 unsigned long open;
68 char expect_close; 74 char expect_close;
@@ -77,7 +83,7 @@ static struct {
77 */ 83 */
78static inline void at91_wdt_reset(void) 84static inline void at91_wdt_reset(void)
79{ 85{
80 at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); 86 wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
81} 87}
82 88
83/* 89/*
@@ -132,7 +138,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
132 unsigned int mr; 138 unsigned int mr;
133 139
134 /* Check if disabled */ 140 /* Check if disabled */
135 mr = at91_sys_read(AT91_WDT_MR); 141 mr = wdt_read(AT91_WDT_MR);
136 if (mr & AT91_WDT_WDDIS) { 142 if (mr & AT91_WDT_WDDIS) {
137 printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); 143 printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
138 return -EIO; 144 return -EIO;
@@ -149,7 +155,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
149 | AT91_WDT_WDDBGHLT /* disabled in debug mode */ 155 | AT91_WDT_WDDBGHLT /* disabled in debug mode */
150 | AT91_WDT_WDD /* restart at any time */ 156 | AT91_WDT_WDD /* restart at any time */
151 | (timeout & AT91_WDT_WDV); /* timer value */ 157 | (timeout & AT91_WDT_WDV); /* timer value */
152 at91_sys_write(AT91_WDT_MR, reg); 158 wdt_write(AT91_WDT_MR, reg);
153 159
154 return 0; 160 return 0;
155} 161}
@@ -248,12 +254,22 @@ static struct miscdevice at91wdt_miscdev = {
248 254
249static int __init at91wdt_probe(struct platform_device *pdev) 255static int __init at91wdt_probe(struct platform_device *pdev)
250{ 256{
257 struct resource *r;
251 int res; 258 int res;
252 259
253 if (at91wdt_miscdev.parent) 260 if (at91wdt_miscdev.parent)
254 return -EBUSY; 261 return -EBUSY;
255 at91wdt_miscdev.parent = &pdev->dev; 262 at91wdt_miscdev.parent = &pdev->dev;
256 263
264 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 if (!r)
266 return -ENODEV;
267 at91wdt_private.base = ioremap(r->start, resource_size(r));
268 if (!at91wdt_private.base) {
269 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
270 return -ENOMEM;
271 }
272
257 /* Set watchdog */ 273 /* Set watchdog */
258 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); 274 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
259 if (res) 275 if (res)
diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
index 757f9cab5c82..c6fbb2e6c41b 100644
--- a/drivers/watchdog/at91sam9_wdt.h
+++ b/drivers/watchdog/at91sam9_wdt.h
@@ -16,11 +16,11 @@
16#ifndef AT91_WDT_H 16#ifndef AT91_WDT_H
17#define AT91_WDT_H 17#define AT91_WDT_H
18 18
19#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ 19#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ 20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ 21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
22 22
23#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ 23#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ 24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ 25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ 26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
@@ -30,7 +30,7 @@
30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ 30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ 31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
32 32
33#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ 33#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ 34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ 35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
36 36
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index 03f449a430d2..5b89f7d6cd0f 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -76,8 +76,6 @@ static int irq;
76static void __iomem *virtbase; 76static void __iomem *virtbase;
77static unsigned long coh901327_users; 77static unsigned long coh901327_users;
78static unsigned long boot_status; 78static unsigned long boot_status;
79static u16 wdogenablestore;
80static u16 irqmaskstore;
81static struct device *parent; 79static struct device *parent;
82 80
83/* 81/*
@@ -461,6 +459,10 @@ out:
461} 459}
462 460
463#ifdef CONFIG_PM 461#ifdef CONFIG_PM
462
463static u16 wdogenablestore;
464static u16 irqmaskstore;
465
464static int coh901327_suspend(struct platform_device *pdev, pm_message_t state) 466static int coh901327_suspend(struct platform_device *pdev, pm_message_t state)
465{ 467{
466 irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U; 468 irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U;
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index 3774c9b8dac9..8464ea1c36a1 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -231,6 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry,
231 231
232 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; 232 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
233 233
234 set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
234 asminline_call(&cmn_regs, bios32_entrypoint); 235 asminline_call(&cmn_regs, bios32_entrypoint);
235 236
236 if (cmn_regs.u1.ral != 0) { 237 if (cmn_regs.u1.ral != 0) {
@@ -248,8 +249,10 @@ static int __devinit cru_detect(unsigned long map_entry,
248 if ((physical_bios_base + physical_bios_offset)) { 249 if ((physical_bios_base + physical_bios_offset)) {
249 cru_rom_addr = 250 cru_rom_addr =
250 ioremap(cru_physical_address, cru_length); 251 ioremap(cru_physical_address, cru_length);
251 if (cru_rom_addr) 252 if (cru_rom_addr) {
253 set_memory_x((unsigned long)cru_rom_addr, cru_length);
252 retval = 0; 254 retval = 0;
255 }
253 } 256 }
254 257
255 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", 258 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index ba6ad662635a..99796c5d913d 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -384,10 +384,10 @@ MODULE_PARM_DESC(nowayout,
384 "Watchdog cannot be stopped once started (default=" 384 "Watchdog cannot be stopped once started (default="
385 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 385 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
386 386
387static int turn_SMI_watchdog_clear_off = 0; 387static int turn_SMI_watchdog_clear_off = 1;
388module_param(turn_SMI_watchdog_clear_off, int, 0); 388module_param(turn_SMI_watchdog_clear_off, int, 0);
389MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, 389MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
390 "Turn off SMI clearing watchdog (default=0)"); 390 "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
391 391
392/* 392/*
393 * Some TCO specific functions 393 * Some TCO specific functions
@@ -813,7 +813,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
813 ret = -EIO; 813 ret = -EIO;
814 goto out_unmap; 814 goto out_unmap;
815 } 815 }
816 if (turn_SMI_watchdog_clear_off) { 816 if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
817 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ 817 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
818 val32 = inl(SMI_EN); 818 val32 = inl(SMI_EN);
819 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ 819 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index cc2cfbe33b30..bfaf9bb1ee0d 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -351,7 +351,7 @@ static int __devexit sp805_wdt_remove(struct amba_device *adev)
351 return 0; 351 return 0;
352} 352}
353 353
354static struct amba_id sp805_wdt_ids[] __initdata = { 354static struct amba_id sp805_wdt_ids[] = {
355 { 355 {
356 .id = 0x00141805, 356 .id = 0x00141805,
357 .mask = 0x00ffffff, 357 .mask = 0x00ffffff,
diff --git a/drivers/xen/xenbus/xenbus_xs.c b/drivers/xen/xenbus/xenbus_xs.c
index b3b8f2f3ad10..ede860f921df 100644
--- a/drivers/xen/xenbus/xenbus_xs.c
+++ b/drivers/xen/xenbus/xenbus_xs.c
@@ -621,15 +621,6 @@ static struct xenbus_watch *find_watch(const char *token)
621 return NULL; 621 return NULL;
622} 622}
623 623
624static void xs_reset_watches(void)
625{
626 int err;
627
628 err = xs_error(xs_single(XBT_NIL, XS_RESET_WATCHES, "", NULL));
629 if (err && err != -EEXIST)
630 printk(KERN_WARNING "xs_reset_watches failed: %d\n", err);
631}
632
633/* Register callback to watch this node. */ 624/* Register callback to watch this node. */
634int register_xenbus_watch(struct xenbus_watch *watch) 625int register_xenbus_watch(struct xenbus_watch *watch)
635{ 626{
@@ -906,9 +897,5 @@ int xs_init(void)
906 if (IS_ERR(task)) 897 if (IS_ERR(task))
907 return PTR_ERR(task); 898 return PTR_ERR(task);
908 899
909 /* shutdown watches for kexec boot */
910 if (xen_hvm_domain())
911 xs_reset_watches();
912
913 return 0; 900 return 0;
914} 901}
diff --git a/firmware/README.AddingFirmware b/firmware/README.AddingFirmware
index e24cd8986d8b..ea78c3a17eec 100644
--- a/firmware/README.AddingFirmware
+++ b/firmware/README.AddingFirmware
@@ -12,7 +12,7 @@ here.
12This directory is _NOT_ for adding arbitrary new firmware images. The 12This directory is _NOT_ for adding arbitrary new firmware images. The
13place to add those is the separate linux-firmware repository: 13place to add those is the separate linux-firmware repository:
14 14
15 git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git 15 git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
16 16
17That repository contains all these firmware images which have been 17That repository contains all these firmware images which have been
18extracted from older drivers, as well various new firmware images which 18extracted from older drivers, as well various new firmware images which
@@ -22,6 +22,7 @@ been permitted to redistribute under separate cover.
22To submit firmware to that repository, please send either a git binary 22To submit firmware to that repository, please send either a git binary
23diff or preferably a git pull request to: 23diff or preferably a git pull request to:
24 David Woodhouse <dwmw2@infradead.org> 24 David Woodhouse <dwmw2@infradead.org>
25 Ben Hutchings <ben@decadent.org.uk>
25 26
26Your commit should include an update to the WHENCE file clearly 27Your commit should include an update to the WHENCE file clearly
27identifying the licence under which the firmware is available, and 28identifying the licence under which the firmware is available, and
diff --git a/fs/btrfs/async-thread.c b/fs/btrfs/async-thread.c
index cb97174e2366..0b394580d860 100644
--- a/fs/btrfs/async-thread.c
+++ b/fs/btrfs/async-thread.c
@@ -563,8 +563,8 @@ static struct btrfs_worker_thread *find_worker(struct btrfs_workers *workers)
563 struct list_head *fallback; 563 struct list_head *fallback;
564 int ret; 564 int ret;
565 565
566again:
567 spin_lock_irqsave(&workers->lock, flags); 566 spin_lock_irqsave(&workers->lock, flags);
567again:
568 worker = next_worker(workers); 568 worker = next_worker(workers);
569 569
570 if (!worker) { 570 if (!worker) {
@@ -579,6 +579,7 @@ again:
579 spin_unlock_irqrestore(&workers->lock, flags); 579 spin_unlock_irqrestore(&workers->lock, flags);
580 /* we're below the limit, start another worker */ 580 /* we're below the limit, start another worker */
581 ret = __btrfs_start_workers(workers); 581 ret = __btrfs_start_workers(workers);
582 spin_lock_irqsave(&workers->lock, flags);
582 if (ret) 583 if (ret)
583 goto fallback; 584 goto fallback;
584 goto again; 585 goto again;
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 0a6b928813a4..fd1a06df5bc6 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -4590,10 +4590,6 @@ static int btrfs_add_nondir(struct btrfs_trans_handle *trans,
4590 int err = btrfs_add_link(trans, dir, inode, 4590 int err = btrfs_add_link(trans, dir, inode,
4591 dentry->d_name.name, dentry->d_name.len, 4591 dentry->d_name.name, dentry->d_name.len,
4592 backref, index); 4592 backref, index);
4593 if (!err) {
4594 d_instantiate(dentry, inode);
4595 return 0;
4596 }
4597 if (err > 0) 4593 if (err > 0)
4598 err = -EEXIST; 4594 err = -EEXIST;
4599 return err; 4595 return err;
@@ -4655,6 +4651,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry,
4655 else { 4651 else {
4656 init_special_inode(inode, inode->i_mode, rdev); 4652 init_special_inode(inode, inode->i_mode, rdev);
4657 btrfs_update_inode(trans, root, inode); 4653 btrfs_update_inode(trans, root, inode);
4654 d_instantiate(dentry, inode);
4658 } 4655 }
4659out_unlock: 4656out_unlock:
4660 nr = trans->blocks_used; 4657 nr = trans->blocks_used;
@@ -4722,6 +4719,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry,
4722 inode->i_mapping->a_ops = &btrfs_aops; 4719 inode->i_mapping->a_ops = &btrfs_aops;
4723 inode->i_mapping->backing_dev_info = &root->fs_info->bdi; 4720 inode->i_mapping->backing_dev_info = &root->fs_info->bdi;
4724 BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops; 4721 BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops;
4722 d_instantiate(dentry, inode);
4725 } 4723 }
4726out_unlock: 4724out_unlock:
4727 nr = trans->blocks_used; 4725 nr = trans->blocks_used;
@@ -4779,6 +4777,7 @@ static int btrfs_link(struct dentry *old_dentry, struct inode *dir,
4779 struct dentry *parent = dentry->d_parent; 4777 struct dentry *parent = dentry->d_parent;
4780 err = btrfs_update_inode(trans, root, inode); 4778 err = btrfs_update_inode(trans, root, inode);
4781 BUG_ON(err); 4779 BUG_ON(err);
4780 d_instantiate(dentry, inode);
4782 btrfs_log_new_name(trans, inode, NULL, parent); 4781 btrfs_log_new_name(trans, inode, NULL, parent);
4783 } 4782 }
4784 4783
@@ -7245,6 +7244,8 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry,
7245 drop_inode = 1; 7244 drop_inode = 1;
7246 7245
7247out_unlock: 7246out_unlock:
7247 if (!err)
7248 d_instantiate(dentry, inode);
7248 nr = trans->blocks_used; 7249 nr = trans->blocks_used;
7249 btrfs_end_transaction_throttle(trans, root); 7250 btrfs_end_transaction_throttle(trans, root);
7250 if (drop_inode) { 7251 if (drop_inode) {
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index 3eeb97661262..98954003a8d3 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -1094,42 +1094,19 @@ static int ceph_snapdir_d_revalidate(struct dentry *dentry,
1094/* 1094/*
1095 * Set/clear/test dir complete flag on the dir's dentry. 1095 * Set/clear/test dir complete flag on the dir's dentry.
1096 */ 1096 */
1097static struct dentry * __d_find_any_alias(struct inode *inode)
1098{
1099 struct dentry *alias;
1100
1101 if (list_empty(&inode->i_dentry))
1102 return NULL;
1103 alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias);
1104 return alias;
1105}
1106
1107void ceph_dir_set_complete(struct inode *inode) 1097void ceph_dir_set_complete(struct inode *inode)
1108{ 1098{
1109 struct dentry *dentry = __d_find_any_alias(inode); 1099 /* not yet implemented */
1110
1111 if (dentry && ceph_dentry(dentry)) {
1112 dout(" marking %p (%p) complete\n", inode, dentry);
1113 set_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
1114 }
1115} 1100}
1116 1101
1117void ceph_dir_clear_complete(struct inode *inode) 1102void ceph_dir_clear_complete(struct inode *inode)
1118{ 1103{
1119 struct dentry *dentry = __d_find_any_alias(inode); 1104 /* not yet implemented */
1120
1121 if (dentry && ceph_dentry(dentry)) {
1122 dout(" marking %p (%p) NOT complete\n", inode, dentry);
1123 clear_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
1124 }
1125} 1105}
1126 1106
1127bool ceph_dir_test_complete(struct inode *inode) 1107bool ceph_dir_test_complete(struct inode *inode)
1128{ 1108{
1129 struct dentry *dentry = __d_find_any_alias(inode); 1109 /* not yet implemented */
1130
1131 if (dentry && ceph_dentry(dentry))
1132 return test_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
1133 return false; 1110 return false;
1134} 1111}
1135 1112
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c
index ac86f8b3e3cb..517f211a3bd4 100644
--- a/fs/fs-writeback.c
+++ b/fs/fs-writeback.c
@@ -47,17 +47,6 @@ struct wb_writeback_work {
47 struct completion *done; /* set if the caller waits */ 47 struct completion *done; /* set if the caller waits */
48}; 48};
49 49
50const char *wb_reason_name[] = {
51 [WB_REASON_BACKGROUND] = "background",
52 [WB_REASON_TRY_TO_FREE_PAGES] = "try_to_free_pages",
53 [WB_REASON_SYNC] = "sync",
54 [WB_REASON_PERIODIC] = "periodic",
55 [WB_REASON_LAPTOP_TIMER] = "laptop_timer",
56 [WB_REASON_FREE_MORE_MEM] = "free_more_memory",
57 [WB_REASON_FS_FREE_SPACE] = "fs_free_space",
58 [WB_REASON_FORKER_THREAD] = "forker_thread"
59};
60
61/* 50/*
62 * Include the creation of the trace points after defining the 51 * Include the creation of the trace points after defining the
63 * wb_writeback_work structure so that the definition remains local to this 52 * wb_writeback_work structure so that the definition remains local to this
diff --git a/fs/locks.c b/fs/locks.c
index 3b0d05dcd7c1..637694bf3a03 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1205,6 +1205,8 @@ int __break_lease(struct inode *inode, unsigned int mode)
1205 int want_write = (mode & O_ACCMODE) != O_RDONLY; 1205 int want_write = (mode & O_ACCMODE) != O_RDONLY;
1206 1206
1207 new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK); 1207 new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK);
1208 if (IS_ERR(new_fl))
1209 return PTR_ERR(new_fl);
1208 1210
1209 lock_flocks(); 1211 lock_flocks();
1210 1212
@@ -1221,12 +1223,6 @@ int __break_lease(struct inode *inode, unsigned int mode)
1221 if (fl->fl_owner == current->files) 1223 if (fl->fl_owner == current->files)
1222 i_have_this_lease = 1; 1224 i_have_this_lease = 1;
1223 1225
1224 if (IS_ERR(new_fl) && !i_have_this_lease
1225 && ((mode & O_NONBLOCK) == 0)) {
1226 error = PTR_ERR(new_fl);
1227 goto out;
1228 }
1229
1230 break_time = 0; 1226 break_time = 0;
1231 if (lease_break_time > 0) { 1227 if (lease_break_time > 0) {
1232 break_time = jiffies + lease_break_time * HZ; 1228 break_time = jiffies + lease_break_time * HZ;
@@ -1284,8 +1280,7 @@ restart:
1284 1280
1285out: 1281out:
1286 unlock_flocks(); 1282 unlock_flocks();
1287 if (!IS_ERR(new_fl)) 1283 locks_free_lock(new_fl);
1288 locks_free_lock(new_fl);
1289 return error; 1284 return error;
1290} 1285}
1291 1286
diff --git a/fs/nfs/file.c b/fs/nfs/file.c
index eca56d4b39c0..606ef0f20aed 100644
--- a/fs/nfs/file.c
+++ b/fs/nfs/file.c
@@ -147,7 +147,7 @@ static loff_t nfs_file_llseek(struct file *filp, loff_t offset, int origin)
147 * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate 147 * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate
148 * the cached file length 148 * the cached file length
149 */ 149 */
150 if (origin != SEEK_SET || origin != SEEK_CUR) { 150 if (origin != SEEK_SET && origin != SEEK_CUR) {
151 struct inode *inode = filp->f_mapping->host; 151 struct inode *inode = filp->f_mapping->host;
152 152
153 int retval = nfs_revalidate_file_size(inode, filp); 153 int retval = nfs_revalidate_file_size(inode, filp);
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index be2bbac13817..d9f4d78c3413 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -39,6 +39,8 @@
39#include <linux/delay.h> 39#include <linux/delay.h>
40#include <linux/errno.h> 40#include <linux/errno.h>
41#include <linux/string.h> 41#include <linux/string.h>
42#include <linux/ratelimit.h>
43#include <linux/printk.h>
42#include <linux/slab.h> 44#include <linux/slab.h>
43#include <linux/sunrpc/clnt.h> 45#include <linux/sunrpc/clnt.h>
44#include <linux/sunrpc/gss_api.h> 46#include <linux/sunrpc/gss_api.h>
@@ -894,6 +896,8 @@ out:
894 896
895static int can_open_delegated(struct nfs_delegation *delegation, fmode_t fmode) 897static int can_open_delegated(struct nfs_delegation *delegation, fmode_t fmode)
896{ 898{
899 if (delegation == NULL)
900 return 0;
897 if ((delegation->type & fmode) != fmode) 901 if ((delegation->type & fmode) != fmode)
898 return 0; 902 return 0;
899 if (test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags)) 903 if (test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags))
@@ -1036,8 +1040,7 @@ static struct nfs4_state *nfs4_try_open_cached(struct nfs4_opendata *opendata)
1036 } 1040 }
1037 rcu_read_lock(); 1041 rcu_read_lock();
1038 delegation = rcu_dereference(nfsi->delegation); 1042 delegation = rcu_dereference(nfsi->delegation);
1039 if (delegation == NULL || 1043 if (!can_open_delegated(delegation, fmode)) {
1040 !can_open_delegated(delegation, fmode)) {
1041 rcu_read_unlock(); 1044 rcu_read_unlock();
1042 break; 1045 break;
1043 } 1046 }
@@ -1091,7 +1094,12 @@ static struct nfs4_state *nfs4_opendata_to_nfs4_state(struct nfs4_opendata *data
1091 if (delegation) 1094 if (delegation)
1092 delegation_flags = delegation->flags; 1095 delegation_flags = delegation->flags;
1093 rcu_read_unlock(); 1096 rcu_read_unlock();
1094 if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0) 1097 if (data->o_arg.claim == NFS4_OPEN_CLAIM_DELEGATE_CUR) {
1098 pr_err_ratelimited("NFS: Broken NFSv4 server %s is "
1099 "returning a delegation for "
1100 "OPEN(CLAIM_DELEGATE_CUR)\n",
1101 NFS_CLIENT(inode)->cl_server);
1102 } else if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0)
1095 nfs_inode_set_delegation(state->inode, 1103 nfs_inode_set_delegation(state->inode,
1096 data->owner->so_cred, 1104 data->owner->so_cred,
1097 &data->o_res); 1105 &data->o_res);
@@ -1423,11 +1431,9 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata)
1423 goto out_no_action; 1431 goto out_no_action;
1424 rcu_read_lock(); 1432 rcu_read_lock();
1425 delegation = rcu_dereference(NFS_I(data->state->inode)->delegation); 1433 delegation = rcu_dereference(NFS_I(data->state->inode)->delegation);
1426 if (delegation != NULL && 1434 if (data->o_arg.claim != NFS4_OPEN_CLAIM_DELEGATE_CUR &&
1427 test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags) == 0) { 1435 can_open_delegated(delegation, data->o_arg.fmode))
1428 rcu_read_unlock(); 1436 goto unlock_no_action;
1429 goto out_no_action;
1430 }
1431 rcu_read_unlock(); 1437 rcu_read_unlock();
1432 } 1438 }
1433 /* Update sequence id. */ 1439 /* Update sequence id. */
@@ -1444,6 +1450,8 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata)
1444 return; 1450 return;
1445 rpc_call_start(task); 1451 rpc_call_start(task);
1446 return; 1452 return;
1453unlock_no_action:
1454 rcu_read_unlock();
1447out_no_action: 1455out_no_action:
1448 task->tk_action = NULL; 1456 task->tk_action = NULL;
1449 1457
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index 39914be40b03..6a7107ae6b72 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -1156,11 +1156,13 @@ restart:
1156 if (status >= 0) { 1156 if (status >= 0) {
1157 status = nfs4_reclaim_locks(state, ops); 1157 status = nfs4_reclaim_locks(state, ops);
1158 if (status >= 0) { 1158 if (status >= 0) {
1159 spin_lock(&state->state_lock);
1159 list_for_each_entry(lock, &state->lock_states, ls_locks) { 1160 list_for_each_entry(lock, &state->lock_states, ls_locks) {
1160 if (!(lock->ls_flags & NFS_LOCK_INITIALIZED)) 1161 if (!(lock->ls_flags & NFS_LOCK_INITIALIZED))
1161 printk("%s: Lock reclaim failed!\n", 1162 printk("%s: Lock reclaim failed!\n",
1162 __func__); 1163 __func__);
1163 } 1164 }
1165 spin_unlock(&state->state_lock);
1164 nfs4_put_open_state(state); 1166 nfs4_put_open_state(state);
1165 goto restart; 1167 goto restart;
1166 } 1168 }
@@ -1224,10 +1226,12 @@ static void nfs4_clear_open_state(struct nfs4_state *state)
1224 clear_bit(NFS_O_RDONLY_STATE, &state->flags); 1226 clear_bit(NFS_O_RDONLY_STATE, &state->flags);
1225 clear_bit(NFS_O_WRONLY_STATE, &state->flags); 1227 clear_bit(NFS_O_WRONLY_STATE, &state->flags);
1226 clear_bit(NFS_O_RDWR_STATE, &state->flags); 1228 clear_bit(NFS_O_RDWR_STATE, &state->flags);
1229 spin_lock(&state->state_lock);
1227 list_for_each_entry(lock, &state->lock_states, ls_locks) { 1230 list_for_each_entry(lock, &state->lock_states, ls_locks) {
1228 lock->ls_seqid.flags = 0; 1231 lock->ls_seqid.flags = 0;
1229 lock->ls_flags &= ~NFS_LOCK_INITIALIZED; 1232 lock->ls_flags &= ~NFS_LOCK_INITIALIZED;
1230 } 1233 }
1234 spin_unlock(&state->state_lock);
1231} 1235}
1232 1236
1233static void nfs4_reset_seqids(struct nfs_server *server, 1237static void nfs4_reset_seqids(struct nfs_server *server,
@@ -1350,12 +1354,14 @@ static void nfs4_warn_keyexpired(const char *s)
1350static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) 1354static int nfs4_recovery_handle_error(struct nfs_client *clp, int error)
1351{ 1355{
1352 switch (error) { 1356 switch (error) {
1357 case 0:
1358 break;
1353 case -NFS4ERR_CB_PATH_DOWN: 1359 case -NFS4ERR_CB_PATH_DOWN:
1354 nfs_handle_cb_pathdown(clp); 1360 nfs_handle_cb_pathdown(clp);
1355 return 0; 1361 break;
1356 case -NFS4ERR_NO_GRACE: 1362 case -NFS4ERR_NO_GRACE:
1357 nfs4_state_end_reclaim_reboot(clp); 1363 nfs4_state_end_reclaim_reboot(clp);
1358 return 0; 1364 break;
1359 case -NFS4ERR_STALE_CLIENTID: 1365 case -NFS4ERR_STALE_CLIENTID:
1360 case -NFS4ERR_LEASE_MOVED: 1366 case -NFS4ERR_LEASE_MOVED:
1361 set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state); 1367 set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state);
@@ -1375,13 +1381,15 @@ static int nfs4_recovery_handle_error(struct nfs_client *clp, int error)
1375 case -NFS4ERR_SEQ_MISORDERED: 1381 case -NFS4ERR_SEQ_MISORDERED:
1376 set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state); 1382 set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state);
1377 /* Zero session reset errors */ 1383 /* Zero session reset errors */
1378 return 0; 1384 break;
1379 case -EKEYEXPIRED: 1385 case -EKEYEXPIRED:
1380 /* Nothing we can do */ 1386 /* Nothing we can do */
1381 nfs4_warn_keyexpired(clp->cl_hostname); 1387 nfs4_warn_keyexpired(clp->cl_hostname);
1382 return 0; 1388 break;
1389 default:
1390 return error;
1383 } 1391 }
1384 return error; 1392 return 0;
1385} 1393}
1386 1394
1387static int nfs4_do_reclaim(struct nfs_client *clp, const struct nfs4_state_recovery_ops *ops) 1395static int nfs4_do_reclaim(struct nfs_client *clp, const struct nfs4_state_recovery_ops *ops)
@@ -1428,7 +1436,7 @@ static int nfs4_check_lease(struct nfs_client *clp)
1428 struct rpc_cred *cred; 1436 struct rpc_cred *cred;
1429 const struct nfs4_state_maintenance_ops *ops = 1437 const struct nfs4_state_maintenance_ops *ops =
1430 clp->cl_mvops->state_renewal_ops; 1438 clp->cl_mvops->state_renewal_ops;
1431 int status = -NFS4ERR_EXPIRED; 1439 int status;
1432 1440
1433 /* Is the client already known to have an expired lease? */ 1441 /* Is the client already known to have an expired lease? */
1434 if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) 1442 if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state))
@@ -1438,6 +1446,7 @@ static int nfs4_check_lease(struct nfs_client *clp)
1438 spin_unlock(&clp->cl_lock); 1446 spin_unlock(&clp->cl_lock);
1439 if (cred == NULL) { 1447 if (cred == NULL) {
1440 cred = nfs4_get_setclientid_cred(clp); 1448 cred = nfs4_get_setclientid_cred(clp);
1449 status = -ENOKEY;
1441 if (cred == NULL) 1450 if (cred == NULL)
1442 goto out; 1451 goto out;
1443 } 1452 }
@@ -1525,16 +1534,16 @@ void nfs41_handle_sequence_flag_errors(struct nfs_client *clp, u32 flags)
1525{ 1534{
1526 if (!flags) 1535 if (!flags)
1527 return; 1536 return;
1528 else if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED) 1537 if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED)
1529 nfs41_handle_server_reboot(clp); 1538 nfs41_handle_server_reboot(clp);
1530 else if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED | 1539 if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED |
1531 SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED | 1540 SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED |
1532 SEQ4_STATUS_ADMIN_STATE_REVOKED | 1541 SEQ4_STATUS_ADMIN_STATE_REVOKED |
1533 SEQ4_STATUS_LEASE_MOVED)) 1542 SEQ4_STATUS_LEASE_MOVED))
1534 nfs41_handle_state_revoked(clp); 1543 nfs41_handle_state_revoked(clp);
1535 else if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED) 1544 if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED)
1536 nfs41_handle_recallable_state_revoked(clp); 1545 nfs41_handle_recallable_state_revoked(clp);
1537 else if (flags & (SEQ4_STATUS_CB_PATH_DOWN | 1546 if (flags & (SEQ4_STATUS_CB_PATH_DOWN |
1538 SEQ4_STATUS_BACKCHANNEL_FAULT | 1547 SEQ4_STATUS_BACKCHANNEL_FAULT |
1539 SEQ4_STATUS_CB_PATH_DOWN_SESSION)) 1548 SEQ4_STATUS_CB_PATH_DOWN_SESSION))
1540 nfs41_handle_cb_path_down(clp); 1549 nfs41_handle_cb_path_down(clp);
@@ -1662,10 +1671,10 @@ static void nfs4_state_manager(struct nfs_client *clp)
1662 1671
1663 if (test_and_clear_bit(NFS4CLNT_CHECK_LEASE, &clp->cl_state)) { 1672 if (test_and_clear_bit(NFS4CLNT_CHECK_LEASE, &clp->cl_state)) {
1664 status = nfs4_check_lease(clp); 1673 status = nfs4_check_lease(clp);
1674 if (status < 0)
1675 goto out_error;
1665 if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) 1676 if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state))
1666 continue; 1677 continue;
1667 if (status < 0 && status != -NFS4ERR_CB_PATH_DOWN)
1668 goto out_error;
1669 } 1678 }
1670 1679
1671 /* Initialize or reset the session */ 1680 /* Initialize or reset the session */
diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c
index 41d6743d303c..ac258beeda3c 100644
--- a/fs/nilfs2/ioctl.c
+++ b/fs/nilfs2/ioctl.c
@@ -625,6 +625,9 @@ static int nilfs_ioctl_clean_segments(struct inode *inode, struct file *filp,
625 if (argv[n].v_nmembs > nsegs * nilfs->ns_blocks_per_segment) 625 if (argv[n].v_nmembs > nsegs * nilfs->ns_blocks_per_segment)
626 goto out_free; 626 goto out_free;
627 627
628 if (argv[n].v_nmembs >= UINT_MAX / argv[n].v_size)
629 goto out_free;
630
628 len = argv[n].v_size * argv[n].v_nmembs; 631 len = argv[n].v_size * argv[n].v_nmembs;
629 base = (void __user *)(unsigned long)argv[n].v_base; 632 base = (void __user *)(unsigned long)argv[n].v_base;
630 if (len == 0) { 633 if (len == 0) {
@@ -842,6 +845,19 @@ long nilfs_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
842 case FS_IOC32_GETVERSION: 845 case FS_IOC32_GETVERSION:
843 cmd = FS_IOC_GETVERSION; 846 cmd = FS_IOC_GETVERSION;
844 break; 847 break;
848 case NILFS_IOCTL_CHANGE_CPMODE:
849 case NILFS_IOCTL_DELETE_CHECKPOINT:
850 case NILFS_IOCTL_GET_CPINFO:
851 case NILFS_IOCTL_GET_CPSTAT:
852 case NILFS_IOCTL_GET_SUINFO:
853 case NILFS_IOCTL_GET_SUSTAT:
854 case NILFS_IOCTL_GET_VINFO:
855 case NILFS_IOCTL_GET_BDESCS:
856 case NILFS_IOCTL_CLEAN_SEGMENTS:
857 case NILFS_IOCTL_SYNC:
858 case NILFS_IOCTL_RESIZE:
859 case NILFS_IOCTL_SET_ALLOC_RANGE:
860 break;
845 default: 861 default:
846 return -ENOIOCTLCMD; 862 return -ENOIOCTLCMD;
847 } 863 }
diff --git a/fs/proc/stat.c b/fs/proc/stat.c
index 2a30d67dd6b8..0855e6f20391 100644
--- a/fs/proc/stat.c
+++ b/fs/proc/stat.c
@@ -32,7 +32,7 @@ static cputime64_t get_idle_time(int cpu)
32 idle = kstat_cpu(cpu).cpustat.idle; 32 idle = kstat_cpu(cpu).cpustat.idle;
33 idle = cputime64_add(idle, arch_idle_time(cpu)); 33 idle = cputime64_add(idle, arch_idle_time(cpu));
34 } else 34 } else
35 idle = nsecs_to_jiffies64(1000 * idle_time); 35 idle = usecs_to_cputime64(idle_time);
36 36
37 return idle; 37 return idle;
38} 38}
@@ -46,7 +46,7 @@ static cputime64_t get_iowait_time(int cpu)
46 /* !NO_HZ so we can rely on cpustat.iowait */ 46 /* !NO_HZ so we can rely on cpustat.iowait */
47 iowait = kstat_cpu(cpu).cpustat.iowait; 47 iowait = kstat_cpu(cpu).cpustat.iowait;
48 else 48 else
49 iowait = nsecs_to_jiffies64(1000 * iowait_time); 49 iowait = usecs_to_cputime64(iowait_time);
50 50
51 return iowait; 51 return iowait;
52} 52}
diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c
index 3eca58f51ae9..8a899496fd5f 100644
--- a/fs/xfs/xfs_super.c
+++ b/fs/xfs/xfs_super.c
@@ -869,27 +869,6 @@ xfs_fs_dirty_inode(
869} 869}
870 870
871STATIC int 871STATIC int
872xfs_log_inode(
873 struct xfs_inode *ip)
874{
875 struct xfs_mount *mp = ip->i_mount;
876 struct xfs_trans *tp;
877 int error;
878
879 tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
880 error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
881 if (error) {
882 xfs_trans_cancel(tp, 0);
883 return error;
884 }
885
886 xfs_ilock(ip, XFS_ILOCK_EXCL);
887 xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
888 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
889 return xfs_trans_commit(tp, 0);
890}
891
892STATIC int
893xfs_fs_write_inode( 872xfs_fs_write_inode(
894 struct inode *inode, 873 struct inode *inode,
895 struct writeback_control *wbc) 874 struct writeback_control *wbc)
@@ -902,10 +881,8 @@ xfs_fs_write_inode(
902 881
903 if (XFS_FORCED_SHUTDOWN(mp)) 882 if (XFS_FORCED_SHUTDOWN(mp))
904 return -XFS_ERROR(EIO); 883 return -XFS_ERROR(EIO);
905 if (!ip->i_update_core)
906 return 0;
907 884
908 if (wbc->sync_mode == WB_SYNC_ALL) { 885 if (wbc->sync_mode == WB_SYNC_ALL || wbc->for_kupdate) {
909 /* 886 /*
910 * Make sure the inode has made it it into the log. Instead 887 * Make sure the inode has made it it into the log. Instead
911 * of forcing it all the way to stable storage using a 888 * of forcing it all the way to stable storage using a
@@ -913,11 +890,14 @@ xfs_fs_write_inode(
913 * ->sync_fs call do that for thus, which reduces the number 890 * ->sync_fs call do that for thus, which reduces the number
914 * of synchronous log forces dramatically. 891 * of synchronous log forces dramatically.
915 */ 892 */
916 error = xfs_log_inode(ip); 893 error = xfs_log_dirty_inode(ip, NULL, 0);
917 if (error) 894 if (error)
918 goto out; 895 goto out;
919 return 0; 896 return 0;
920 } else { 897 } else {
898 if (!ip->i_update_core)
899 return 0;
900
921 /* 901 /*
922 * We make this non-blocking if the inode is contended, return 902 * We make this non-blocking if the inode is contended, return
923 * EAGAIN to indicate to the caller that they did not succeed. 903 * EAGAIN to indicate to the caller that they did not succeed.
diff --git a/fs/xfs/xfs_sync.c b/fs/xfs/xfs_sync.c
index be5c51d8f757..f0994aedcd15 100644
--- a/fs/xfs/xfs_sync.c
+++ b/fs/xfs/xfs_sync.c
@@ -336,6 +336,32 @@ xfs_sync_fsdata(
336 return error; 336 return error;
337} 337}
338 338
339int
340xfs_log_dirty_inode(
341 struct xfs_inode *ip,
342 struct xfs_perag *pag,
343 int flags)
344{
345 struct xfs_mount *mp = ip->i_mount;
346 struct xfs_trans *tp;
347 int error;
348
349 if (!ip->i_update_core)
350 return 0;
351
352 tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
353 error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
354 if (error) {
355 xfs_trans_cancel(tp, 0);
356 return error;
357 }
358
359 xfs_ilock(ip, XFS_ILOCK_EXCL);
360 xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
361 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
362 return xfs_trans_commit(tp, 0);
363}
364
339/* 365/*
340 * When remounting a filesystem read-only or freezing the filesystem, we have 366 * When remounting a filesystem read-only or freezing the filesystem, we have
341 * two phases to execute. This first phase is syncing the data before we 367 * two phases to execute. This first phase is syncing the data before we
@@ -359,6 +385,16 @@ xfs_quiesce_data(
359{ 385{
360 int error, error2 = 0; 386 int error, error2 = 0;
361 387
388 /*
389 * Log all pending size and timestamp updates. The vfs writeback
390 * code is supposed to do this, but due to its overagressive
391 * livelock detection it will skip inodes where appending writes
392 * were written out in the first non-blocking sync phase if their
393 * completion took long enough that it happened after taking the
394 * timestamp for the cut-off in the blocking phase.
395 */
396 xfs_inode_ag_iterator(mp, xfs_log_dirty_inode, 0);
397
362 xfs_qm_sync(mp, SYNC_TRYLOCK); 398 xfs_qm_sync(mp, SYNC_TRYLOCK);
363 xfs_qm_sync(mp, SYNC_WAIT); 399 xfs_qm_sync(mp, SYNC_WAIT);
364 400
diff --git a/fs/xfs/xfs_sync.h b/fs/xfs/xfs_sync.h
index 941202e7ac6e..fa965479d788 100644
--- a/fs/xfs/xfs_sync.h
+++ b/fs/xfs/xfs_sync.h
@@ -34,6 +34,8 @@ void xfs_quiesce_attr(struct xfs_mount *mp);
34 34
35void xfs_flush_inodes(struct xfs_inode *ip); 35void xfs_flush_inodes(struct xfs_inode *ip);
36 36
37int xfs_log_dirty_inode(struct xfs_inode *ip, struct xfs_perag *pag, int flags);
38
37int xfs_reclaim_inodes(struct xfs_mount *mp, int mode); 39int xfs_reclaim_inodes(struct xfs_mount *mp, int mode);
38int xfs_reclaim_inodes_count(struct xfs_mount *mp); 40int xfs_reclaim_inodes_count(struct xfs_mount *mp);
39void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan); 41void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan);
diff --git a/include/asm-generic/cputime.h b/include/asm-generic/cputime.h
index 62ce6823c0f2..12a1764f612b 100644
--- a/include/asm-generic/cputime.h
+++ b/include/asm-generic/cputime.h
@@ -40,6 +40,7 @@ typedef u64 cputime64_t;
40 */ 40 */
41#define cputime_to_usecs(__ct) jiffies_to_usecs(__ct) 41#define cputime_to_usecs(__ct) jiffies_to_usecs(__ct)
42#define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs) 42#define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs)
43#define usecs_to_cputime64(__msecs) nsecs_to_jiffies64((__msecs) * 1000)
43 44
44/* 45/*
45 * Convert cputime to seconds and back. 46 * Convert cputime to seconds and back.
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index c86c940d1de3..081147da0564 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -71,7 +71,7 @@ struct timecounter {
71 71
72/** 72/**
73 * cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds 73 * cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds
74 * @tc: Pointer to cycle counter. 74 * @cc: Pointer to cycle counter.
75 * @cycles: Cycles 75 * @cycles: Cycles
76 * 76 *
77 * XXX - This could use some mult_lxl_ll() asm optimization. Same code 77 * XXX - This could use some mult_lxl_ll() asm optimization. Same code
@@ -114,7 +114,7 @@ extern u64 timecounter_read(struct timecounter *tc);
114 * time base as values returned by 114 * time base as values returned by
115 * timecounter_read() 115 * timecounter_read()
116 * @tc: Pointer to time counter. 116 * @tc: Pointer to time counter.
117 * @cycle: a value returned by tc->cc->read() 117 * @cycle_tstamp: a value returned by tc->cc->read()
118 * 118 *
119 * Cycle counts that are converted correctly as long as they 119 * Cycle counts that are converted correctly as long as they
120 * fall into the interval [-1/2 max cycle count, +1/2 max cycle count], 120 * fall into the interval [-1/2 max cycle count, +1/2 max cycle count],
@@ -156,11 +156,12 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
156 * @mult: cycle to nanosecond multiplier 156 * @mult: cycle to nanosecond multiplier
157 * @shift: cycle to nanosecond divisor (power of two) 157 * @shift: cycle to nanosecond divisor (power of two)
158 * @max_idle_ns: max idle time permitted by the clocksource (nsecs) 158 * @max_idle_ns: max idle time permitted by the clocksource (nsecs)
159 * @maxadj maximum adjustment value to mult (~11%) 159 * @maxadj: maximum adjustment value to mult (~11%)
160 * @flags: flags describing special properties 160 * @flags: flags describing special properties
161 * @archdata: arch-specific data 161 * @archdata: arch-specific data
162 * @suspend: suspend function for the clocksource, if necessary 162 * @suspend: suspend function for the clocksource, if necessary
163 * @resume: resume function for the clocksource, if necessary 163 * @resume: resume function for the clocksource, if necessary
164 * @cycle_last: most recent cycle counter value seen by ::read()
164 */ 165 */
165struct clocksource { 166struct clocksource {
166 /* 167 /*
@@ -187,6 +188,7 @@ struct clocksource {
187 void (*suspend)(struct clocksource *cs); 188 void (*suspend)(struct clocksource *cs);
188 void (*resume)(struct clocksource *cs); 189 void (*resume)(struct clocksource *cs);
189 190
191 /* private: */
190#ifdef CONFIG_CLOCKSOURCE_WATCHDOG 192#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
191 /* Watchdog related data, used by the framework */ 193 /* Watchdog related data, used by the framework */
192 struct list_head wd_list; 194 struct list_head wd_list;
@@ -261,6 +263,9 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant)
261 263
262/** 264/**
263 * clocksource_cyc2ns - converts clocksource cycles to nanoseconds 265 * clocksource_cyc2ns - converts clocksource cycles to nanoseconds
266 * @cycles: cycles
267 * @mult: cycle to nanosecond multiplier
268 * @shift: cycle to nanosecond divisor (power of two)
264 * 269 *
265 * Converts cycles to nanoseconds, using the given mult and shift. 270 * Converts cycles to nanoseconds, using the given mult and shift.
266 * 271 *
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index 99834e581b9e..bd4272b61a14 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -91,10 +91,11 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
91 91
92extern void irq_domain_add(struct irq_domain *domain); 92extern void irq_domain_add(struct irq_domain *domain);
93extern void irq_domain_del(struct irq_domain *domain); 93extern void irq_domain_del(struct irq_domain *domain);
94
95extern struct irq_domain_ops irq_domain_simple_ops;
94#endif /* CONFIG_IRQ_DOMAIN */ 96#endif /* CONFIG_IRQ_DOMAIN */
95 97
96#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ) 98#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
97extern struct irq_domain_ops irq_domain_simple_ops;
98extern void irq_domain_add_simple(struct device_node *controller, int irq_base); 99extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
99extern void irq_domain_generate_simple(const struct of_device_id *match, 100extern void irq_domain_generate_simple(const struct of_device_id *match,
100 u64 phys_base, unsigned int irq_start); 101 u64 phys_base, unsigned int irq_start);
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index c3892fc1d538..68e67e50d028 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo {
557#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ 557#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
558#define KVM_CAP_PPC_PAPR 68 558#define KVM_CAP_PPC_PAPR 68
559#define KVM_CAP_S390_GMAP 71 559#define KVM_CAP_S390_GMAP 71
560#define KVM_CAP_TSC_DEADLINE_TIMER 72
560 561
561#ifdef KVM_CAP_IRQ_ROUTING 562#ifdef KVM_CAP_IRQ_ROUTING
562 563
diff --git a/include/linux/lglock.h b/include/linux/lglock.h
index f549056fb20b..87f402ccec55 100644
--- a/include/linux/lglock.h
+++ b/include/linux/lglock.h
@@ -22,6 +22,7 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/lockdep.h> 23#include <linux/lockdep.h>
24#include <linux/percpu.h> 24#include <linux/percpu.h>
25#include <linux/cpu.h>
25 26
26/* can make br locks by using local lock for read side, global lock for write */ 27/* can make br locks by using local lock for read side, global lock for write */
27#define br_lock_init(name) name##_lock_init() 28#define br_lock_init(name) name##_lock_init()
@@ -72,9 +73,31 @@
72 73
73#define DEFINE_LGLOCK(name) \ 74#define DEFINE_LGLOCK(name) \
74 \ 75 \
76 DEFINE_SPINLOCK(name##_cpu_lock); \
77 cpumask_t name##_cpus __read_mostly; \
75 DEFINE_PER_CPU(arch_spinlock_t, name##_lock); \ 78 DEFINE_PER_CPU(arch_spinlock_t, name##_lock); \
76 DEFINE_LGLOCK_LOCKDEP(name); \ 79 DEFINE_LGLOCK_LOCKDEP(name); \
77 \ 80 \
81 static int \
82 name##_lg_cpu_callback(struct notifier_block *nb, \
83 unsigned long action, void *hcpu) \
84 { \
85 switch (action & ~CPU_TASKS_FROZEN) { \
86 case CPU_UP_PREPARE: \
87 spin_lock(&name##_cpu_lock); \
88 cpu_set((unsigned long)hcpu, name##_cpus); \
89 spin_unlock(&name##_cpu_lock); \
90 break; \
91 case CPU_UP_CANCELED: case CPU_DEAD: \
92 spin_lock(&name##_cpu_lock); \
93 cpu_clear((unsigned long)hcpu, name##_cpus); \
94 spin_unlock(&name##_cpu_lock); \
95 } \
96 return NOTIFY_OK; \
97 } \
98 static struct notifier_block name##_lg_cpu_notifier = { \
99 .notifier_call = name##_lg_cpu_callback, \
100 }; \
78 void name##_lock_init(void) { \ 101 void name##_lock_init(void) { \
79 int i; \ 102 int i; \
80 LOCKDEP_INIT_MAP(&name##_lock_dep_map, #name, &name##_lock_key, 0); \ 103 LOCKDEP_INIT_MAP(&name##_lock_dep_map, #name, &name##_lock_key, 0); \
@@ -83,6 +106,11 @@
83 lock = &per_cpu(name##_lock, i); \ 106 lock = &per_cpu(name##_lock, i); \
84 *lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; \ 107 *lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; \
85 } \ 108 } \
109 register_hotcpu_notifier(&name##_lg_cpu_notifier); \
110 get_online_cpus(); \
111 for_each_online_cpu(i) \
112 cpu_set(i, name##_cpus); \
113 put_online_cpus(); \
86 } \ 114 } \
87 EXPORT_SYMBOL(name##_lock_init); \ 115 EXPORT_SYMBOL(name##_lock_init); \
88 \ 116 \
@@ -124,9 +152,9 @@
124 \ 152 \
125 void name##_global_lock_online(void) { \ 153 void name##_global_lock_online(void) { \
126 int i; \ 154 int i; \
127 preempt_disable(); \ 155 spin_lock(&name##_cpu_lock); \
128 rwlock_acquire(&name##_lock_dep_map, 0, 0, _RET_IP_); \ 156 rwlock_acquire(&name##_lock_dep_map, 0, 0, _RET_IP_); \
129 for_each_online_cpu(i) { \ 157 for_each_cpu(i, &name##_cpus) { \
130 arch_spinlock_t *lock; \ 158 arch_spinlock_t *lock; \
131 lock = &per_cpu(name##_lock, i); \ 159 lock = &per_cpu(name##_lock, i); \
132 arch_spin_lock(lock); \ 160 arch_spin_lock(lock); \
@@ -137,12 +165,12 @@
137 void name##_global_unlock_online(void) { \ 165 void name##_global_unlock_online(void) { \
138 int i; \ 166 int i; \
139 rwlock_release(&name##_lock_dep_map, 1, _RET_IP_); \ 167 rwlock_release(&name##_lock_dep_map, 1, _RET_IP_); \
140 for_each_online_cpu(i) { \ 168 for_each_cpu(i, &name##_cpus) { \
141 arch_spinlock_t *lock; \ 169 arch_spinlock_t *lock; \
142 lock = &per_cpu(name##_lock, i); \ 170 lock = &per_cpu(name##_lock, i); \
143 arch_spin_unlock(lock); \ 171 arch_spin_unlock(lock); \
144 } \ 172 } \
145 preempt_enable(); \ 173 spin_unlock(&name##_cpu_lock); \
146 } \ 174 } \
147 EXPORT_SYMBOL(name##_global_unlock_online); \ 175 EXPORT_SYMBOL(name##_global_unlock_online); \
148 \ 176 \
diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h
index e7c748fb6053..b081c7245ec8 100644
--- a/include/linux/platform_data/macb.h
+++ b/include/linux/platform_data/macb.h
@@ -10,7 +10,7 @@
10 10
11struct macb_platform_data { 11struct macb_platform_data {
12 u32 phy_mask; 12 u32 phy_mask;
13 u8 phy_irq_pin; /* PHY IRQ */ 13 int phy_irq_pin; /* PHY IRQ */
14 u8 is_rmii; /* using RMII interface? */ 14 u8 is_rmii; /* using RMII interface? */
15}; 15};
16 16
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 4bde182fcf93..dcdfc2bda922 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -131,6 +131,7 @@ extern long vwrite(char *buf, char *addr, unsigned long count);
131 */ 131 */
132extern rwlock_t vmlist_lock; 132extern rwlock_t vmlist_lock;
133extern struct vm_struct *vmlist; 133extern struct vm_struct *vmlist;
134extern __init void vm_area_add_early(struct vm_struct *vm);
134extern __init void vm_area_register_early(struct vm_struct *vm, size_t align); 135extern __init void vm_area_register_early(struct vm_struct *vm, size_t align);
135 136
136#ifdef CONFIG_SMP 137#ifdef CONFIG_SMP
diff --git a/include/media/davinci/vpif_types.h b/include/media/davinci/vpif_types.h
new file mode 100644
index 000000000000..9929b05cff3a
--- /dev/null
+++ b/include/media/davinci/vpif_types.h
@@ -0,0 +1,71 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation version 2.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17#ifndef _VPIF_TYPES_H
18#define _VPIF_TYPES_H
19
20#define VPIF_CAPTURE_MAX_CHANNELS 2
21
22enum vpif_if_type {
23 VPIF_IF_BT656,
24 VPIF_IF_BT1120,
25 VPIF_IF_RAW_BAYER
26};
27
28struct vpif_interface {
29 enum vpif_if_type if_type;
30 unsigned hd_pol:1;
31 unsigned vd_pol:1;
32 unsigned fid_pol:1;
33};
34
35struct vpif_subdev_info {
36 const char *name;
37 struct i2c_board_info board_info;
38 u32 input;
39 u32 output;
40 unsigned can_route:1;
41 struct vpif_interface vpif_if;
42};
43
44struct vpif_display_config {
45 int (*set_clock)(int, int);
46 struct vpif_subdev_info *subdevinfo;
47 int subdev_count;
48 const char **output;
49 int output_count;
50 const char *card_name;
51};
52
53struct vpif_input {
54 struct v4l2_input input;
55 const char *subdev_name;
56};
57
58struct vpif_capture_chan_config {
59 const struct vpif_input *inputs;
60 int input_count;
61};
62
63struct vpif_capture_config {
64 int (*setup_input_channel_mode)(int);
65 int (*setup_input_path)(int, const char *);
66 struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
67 struct vpif_subdev_info *subdev_info;
68 int subdev_count;
69 const char *card_name;
70};
71#endif /* _VPIF_TYPES_H */
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index b1377b931eb7..5fb2c3d10c05 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -254,7 +254,7 @@ unsigned long soc_camera_apply_board_flags(struct soc_camera_link *icl,
254static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client) 254static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client)
255{ 255{
256 struct v4l2_subdev *sd = i2c_get_clientdata(client); 256 struct v4l2_subdev *sd = i2c_get_clientdata(client);
257 struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; 257 struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd);
258 return icd ? icd->vdev : NULL; 258 return icd ? icd->vdev : NULL;
259} 259}
260 260
@@ -279,6 +279,11 @@ static inline struct soc_camera_device *soc_camera_from_vbq(const struct videobu
279 return container_of(vq, struct soc_camera_device, vb_vidq); 279 return container_of(vq, struct soc_camera_device, vb_vidq);
280} 280}
281 281
282static inline u32 soc_camera_grp_id(const struct soc_camera_device *icd)
283{
284 return (icd->iface << 8) | (icd->devnum + 1);
285}
286
282void soc_camera_lock(struct vb2_queue *vq); 287void soc_camera_lock(struct vb2_queue *vq);
283void soc_camera_unlock(struct vb2_queue *vq); 288void soc_camera_unlock(struct vb2_queue *vq);
284 289
diff --git a/include/net/dst.h b/include/net/dst.h
index 6faec1a60216..75766b42660e 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -53,6 +53,7 @@ struct dst_entry {
53#define DST_NOHASH 0x0008 53#define DST_NOHASH 0x0008
54#define DST_NOCACHE 0x0010 54#define DST_NOCACHE 0x0010
55#define DST_NOCOUNT 0x0020 55#define DST_NOCOUNT 0x0020
56#define DST_NOPEER 0x0040
56 57
57 short error; 58 short error;
58 short obsolete; 59 short obsolete;
diff --git a/include/net/flow.h b/include/net/flow.h
index a09447749e2d..57f15a7f1cdd 100644
--- a/include/net/flow.h
+++ b/include/net/flow.h
@@ -207,6 +207,7 @@ extern struct flow_cache_object *flow_cache_lookup(
207 u8 dir, flow_resolve_t resolver, void *ctx); 207 u8 dir, flow_resolve_t resolver, void *ctx);
208 208
209extern void flow_cache_flush(void); 209extern void flow_cache_flush(void);
210extern void flow_cache_flush_deferred(void);
210extern atomic_t flow_cache_genid; 211extern atomic_t flow_cache_genid;
211 212
212#endif 213#endif
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 873d5be7926c..e5a7b9aaf552 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -1207,7 +1207,7 @@ extern void ip_vs_control_cleanup(void);
1207extern struct ip_vs_dest * 1207extern struct ip_vs_dest *
1208ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr, 1208ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr,
1209 __be16 dport, const union nf_inet_addr *vaddr, __be16 vport, 1209 __be16 dport, const union nf_inet_addr *vaddr, __be16 vport,
1210 __u16 protocol, __u32 fwmark); 1210 __u16 protocol, __u32 fwmark, __u32 flags);
1211extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp); 1211extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp);
1212 1212
1213 1213
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index e90e7a9935dd..a15432da27c3 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -241,6 +241,9 @@ extern struct sctp_globals {
241 * bits is an indicator of when to send and window update SACK. 241 * bits is an indicator of when to send and window update SACK.
242 */ 242 */
243 int rwnd_update_shift; 243 int rwnd_update_shift;
244
245 /* Threshold for autoclose timeout, in seconds. */
246 unsigned long max_autoclose;
244} sctp_globals; 247} sctp_globals;
245 248
246#define sctp_rto_initial (sctp_globals.rto_initial) 249#define sctp_rto_initial (sctp_globals.rto_initial)
@@ -281,6 +284,7 @@ extern struct sctp_globals {
281#define sctp_auth_enable (sctp_globals.auth_enable) 284#define sctp_auth_enable (sctp_globals.auth_enable)
282#define sctp_checksum_disable (sctp_globals.checksum_disable) 285#define sctp_checksum_disable (sctp_globals.checksum_disable)
283#define sctp_rwnd_upd_shift (sctp_globals.rwnd_update_shift) 286#define sctp_rwnd_upd_shift (sctp_globals.rwnd_update_shift)
287#define sctp_max_autoclose (sctp_globals.max_autoclose)
284 288
285/* SCTP Socket type: UDP or TCP style. */ 289/* SCTP Socket type: UDP or TCP style. */
286typedef enum { 290typedef enum {
diff --git a/include/net/sock.h b/include/net/sock.h
index abb6e0f0c3c3..32e39371fba6 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -637,12 +637,14 @@ static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb)
637 637
638/* 638/*
639 * Take into account size of receive queue and backlog queue 639 * Take into account size of receive queue and backlog queue
640 * Do not take into account this skb truesize,
641 * to allow even a single big packet to come.
640 */ 642 */
641static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb) 643static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb)
642{ 644{
643 unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc); 645 unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc);
644 646
645 return qsize + skb->truesize > sk->sk_rcvbuf; 647 return qsize > sk->sk_rcvbuf;
646} 648}
647 649
648/* The per-socket spinlock must be held here. */ 650/* The per-socket spinlock must be held here. */
diff --git a/include/scsi/libfcoe.h b/include/scsi/libfcoe.h
index d1e95c6ac776..5a35a2a2d3c5 100644
--- a/include/scsi/libfcoe.h
+++ b/include/scsi/libfcoe.h
@@ -147,6 +147,7 @@ struct fcoe_ctlr {
147 u8 map_dest; 147 u8 map_dest;
148 u8 spma; 148 u8 spma;
149 u8 probe_tries; 149 u8 probe_tries;
150 u8 priority;
150 u8 dest_addr[ETH_ALEN]; 151 u8 dest_addr[ETH_ALEN];
151 u8 ctl_src_addr[ETH_ALEN]; 152 u8 ctl_src_addr[ETH_ALEN];
152 153
@@ -301,6 +302,7 @@ struct fcoe_percpu_s {
301 * @lport: The associated local port 302 * @lport: The associated local port
302 * @fcoe_pending_queue: The pending Rx queue of skbs 303 * @fcoe_pending_queue: The pending Rx queue of skbs
303 * @fcoe_pending_queue_active: Indicates if the pending queue is active 304 * @fcoe_pending_queue_active: Indicates if the pending queue is active
305 * @priority: Packet priority (DCB)
304 * @max_queue_depth: Max queue depth of pending queue 306 * @max_queue_depth: Max queue depth of pending queue
305 * @min_queue_depth: Min queue depth of pending queue 307 * @min_queue_depth: Min queue depth of pending queue
306 * @timer: The queue timer 308 * @timer: The queue timer
@@ -316,6 +318,7 @@ struct fcoe_port {
316 struct fc_lport *lport; 318 struct fc_lport *lport;
317 struct sk_buff_head fcoe_pending_queue; 319 struct sk_buff_head fcoe_pending_queue;
318 u8 fcoe_pending_queue_active; 320 u8 fcoe_pending_queue_active;
321 u8 priority;
319 u32 max_queue_depth; 322 u32 max_queue_depth;
320 u32 min_queue_depth; 323 u32 min_queue_depth;
321 struct timer_list timer; 324 struct timer_list timer;
diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h
index b99caa8b780c..99d1d0decf88 100644
--- a/include/trace/events/writeback.h
+++ b/include/trace/events/writeback.h
@@ -21,6 +21,16 @@
21 {I_REFERENCED, "I_REFERENCED"} \ 21 {I_REFERENCED, "I_REFERENCED"} \
22 ) 22 )
23 23
24#define WB_WORK_REASON \
25 {WB_REASON_BACKGROUND, "background"}, \
26 {WB_REASON_TRY_TO_FREE_PAGES, "try_to_free_pages"}, \
27 {WB_REASON_SYNC, "sync"}, \
28 {WB_REASON_PERIODIC, "periodic"}, \
29 {WB_REASON_LAPTOP_TIMER, "laptop_timer"}, \
30 {WB_REASON_FREE_MORE_MEM, "free_more_memory"}, \
31 {WB_REASON_FS_FREE_SPACE, "fs_free_space"}, \
32 {WB_REASON_FORKER_THREAD, "forker_thread"}
33
24struct wb_writeback_work; 34struct wb_writeback_work;
25 35
26DECLARE_EVENT_CLASS(writeback_work_class, 36DECLARE_EVENT_CLASS(writeback_work_class,
@@ -55,7 +65,7 @@ DECLARE_EVENT_CLASS(writeback_work_class,
55 __entry->for_kupdate, 65 __entry->for_kupdate,
56 __entry->range_cyclic, 66 __entry->range_cyclic,
57 __entry->for_background, 67 __entry->for_background,
58 wb_reason_name[__entry->reason] 68 __print_symbolic(__entry->reason, WB_WORK_REASON)
59 ) 69 )
60); 70);
61#define DEFINE_WRITEBACK_WORK_EVENT(name) \ 71#define DEFINE_WRITEBACK_WORK_EVENT(name) \
@@ -184,7 +194,8 @@ TRACE_EVENT(writeback_queue_io,
184 __entry->older, /* older_than_this in jiffies */ 194 __entry->older, /* older_than_this in jiffies */
185 __entry->age, /* older_than_this in relative milliseconds */ 195 __entry->age, /* older_than_this in relative milliseconds */
186 __entry->moved, 196 __entry->moved,
187 wb_reason_name[__entry->reason]) 197 __print_symbolic(__entry->reason, WB_WORK_REASON)
198 )
188); 199);
189 200
190TRACE_EVENT(global_dirty_state, 201TRACE_EVENT(global_dirty_state,
diff --git a/include/xen/interface/io/xs_wire.h b/include/xen/interface/io/xs_wire.h
index f0b6890370be..f6f07aa35af5 100644
--- a/include/xen/interface/io/xs_wire.h
+++ b/include/xen/interface/io/xs_wire.h
@@ -29,8 +29,7 @@ enum xsd_sockmsg_type
29 XS_IS_DOMAIN_INTRODUCED, 29 XS_IS_DOMAIN_INTRODUCED,
30 XS_RESUME, 30 XS_RESUME,
31 XS_SET_TARGET, 31 XS_SET_TARGET,
32 XS_RESTRICT, 32 XS_RESTRICT
33 XS_RESET_WATCHES
34}; 33};
35 34
36#define XS_WRITE_NONE "NONE" 35#define XS_WRITE_NONE "NONE"
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index d9d5648f3cdc..a184470cf9b5 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -2098,11 +2098,6 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader)
2098 continue; 2098 continue;
2099 /* get old css_set pointer */ 2099 /* get old css_set pointer */
2100 task_lock(tsk); 2100 task_lock(tsk);
2101 if (tsk->flags & PF_EXITING) {
2102 /* ignore this task if it's going away */
2103 task_unlock(tsk);
2104 continue;
2105 }
2106 oldcg = tsk->cgroups; 2101 oldcg = tsk->cgroups;
2107 get_css_set(oldcg); 2102 get_css_set(oldcg);
2108 task_unlock(tsk); 2103 task_unlock(tsk);
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 9fe58c46a426..0b1712dba587 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -123,6 +123,19 @@ static inline struct cpuset *task_cs(struct task_struct *task)
123 struct cpuset, css); 123 struct cpuset, css);
124} 124}
125 125
126#ifdef CONFIG_NUMA
127static inline bool task_has_mempolicy(struct task_struct *task)
128{
129 return task->mempolicy;
130}
131#else
132static inline bool task_has_mempolicy(struct task_struct *task)
133{
134 return false;
135}
136#endif
137
138
126/* bits in struct cpuset flags field */ 139/* bits in struct cpuset flags field */
127typedef enum { 140typedef enum {
128 CS_CPU_EXCLUSIVE, 141 CS_CPU_EXCLUSIVE,
@@ -949,7 +962,7 @@ static void cpuset_migrate_mm(struct mm_struct *mm, const nodemask_t *from,
949static void cpuset_change_task_nodemask(struct task_struct *tsk, 962static void cpuset_change_task_nodemask(struct task_struct *tsk,
950 nodemask_t *newmems) 963 nodemask_t *newmems)
951{ 964{
952 bool masks_disjoint = !nodes_intersects(*newmems, tsk->mems_allowed); 965 bool need_loop;
953 966
954repeat: 967repeat:
955 /* 968 /*
@@ -962,6 +975,14 @@ repeat:
962 return; 975 return;
963 976
964 task_lock(tsk); 977 task_lock(tsk);
978 /*
979 * Determine if a loop is necessary if another thread is doing
980 * get_mems_allowed(). If at least one node remains unchanged and
981 * tsk does not have a mempolicy, then an empty nodemask will not be
982 * possible when mems_allowed is larger than a word.
983 */
984 need_loop = task_has_mempolicy(tsk) ||
985 !nodes_intersects(*newmems, tsk->mems_allowed);
965 nodes_or(tsk->mems_allowed, tsk->mems_allowed, *newmems); 986 nodes_or(tsk->mems_allowed, tsk->mems_allowed, *newmems);
966 mpol_rebind_task(tsk, newmems, MPOL_REBIND_STEP1); 987 mpol_rebind_task(tsk, newmems, MPOL_REBIND_STEP1);
967 988
@@ -981,11 +1002,9 @@ repeat:
981 1002
982 /* 1003 /*
983 * Allocation of memory is very fast, we needn't sleep when waiting 1004 * Allocation of memory is very fast, we needn't sleep when waiting
984 * for the read-side. No wait is necessary, however, if at least one 1005 * for the read-side.
985 * node remains unchanged.
986 */ 1006 */
987 while (masks_disjoint && 1007 while (need_loop && ACCESS_ONCE(tsk->mems_allowed_change_disable)) {
988 ACCESS_ONCE(tsk->mems_allowed_change_disable)) {
989 task_unlock(tsk); 1008 task_unlock(tsk);
990 if (!task_curr(tsk)) 1009 if (!task_curr(tsk))
991 yield(); 1010 yield();
diff --git a/kernel/events/core.c b/kernel/events/core.c
index d3b9df5962c2..58690af323e4 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -3558,9 +3558,13 @@ static void ring_buffer_wakeup(struct perf_event *event)
3558 3558
3559 rcu_read_lock(); 3559 rcu_read_lock();
3560 rb = rcu_dereference(event->rb); 3560 rb = rcu_dereference(event->rb);
3561 list_for_each_entry_rcu(event, &rb->event_list, rb_entry) { 3561 if (!rb)
3562 goto unlock;
3563
3564 list_for_each_entry_rcu(event, &rb->event_list, rb_entry)
3562 wake_up_all(&event->waitq); 3565 wake_up_all(&event->waitq);
3563 } 3566
3567unlock:
3564 rcu_read_unlock(); 3568 rcu_read_unlock();
3565} 3569}
3566 3570
diff --git a/kernel/futex.c b/kernel/futex.c
index ea87f4d2f455..1614be20173d 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -314,17 +314,29 @@ again:
314#endif 314#endif
315 315
316 lock_page(page_head); 316 lock_page(page_head);
317
318 /*
319 * If page_head->mapping is NULL, then it cannot be a PageAnon
320 * page; but it might be the ZERO_PAGE or in the gate area or
321 * in a special mapping (all cases which we are happy to fail);
322 * or it may have been a good file page when get_user_pages_fast
323 * found it, but truncated or holepunched or subjected to
324 * invalidate_complete_page2 before we got the page lock (also
325 * cases which we are happy to fail). And we hold a reference,
326 * so refcount care in invalidate_complete_page's remove_mapping
327 * prevents drop_caches from setting mapping to NULL beneath us.
328 *
329 * The case we do have to guard against is when memory pressure made
330 * shmem_writepage move it from filecache to swapcache beneath us:
331 * an unlikely race, but we do need to retry for page_head->mapping.
332 */
317 if (!page_head->mapping) { 333 if (!page_head->mapping) {
334 int shmem_swizzled = PageSwapCache(page_head);
318 unlock_page(page_head); 335 unlock_page(page_head);
319 put_page(page_head); 336 put_page(page_head);
320 /* 337 if (shmem_swizzled)
321 * ZERO_PAGE pages don't have a mapping. Avoid a busy loop 338 goto again;
322 * trying to find one. RW mapping would have COW'd (and thus 339 return -EFAULT;
323 * have a mapping) so this page is RO and won't ever change.
324 */
325 if ((page_head == ZERO_PAGE(address)))
326 return -EFAULT;
327 goto again;
328 } 340 }
329 341
330 /* 342 /*
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 200ce832c585..7ca523b249ef 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -143,11 +143,6 @@ int irq_domain_simple_dt_translate(struct irq_domain *d,
143 return 0; 143 return 0;
144} 144}
145 145
146struct irq_domain_ops irq_domain_simple_ops = {
147 .dt_translate = irq_domain_simple_dt_translate,
148};
149EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
150
151/** 146/**
152 * irq_domain_create_simple() - Set up a 'simple' translation range 147 * irq_domain_create_simple() - Set up a 'simple' translation range
153 */ 148 */
@@ -182,3 +177,10 @@ void irq_domain_generate_simple(const struct of_device_id *match,
182} 177}
183EXPORT_SYMBOL_GPL(irq_domain_generate_simple); 178EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
184#endif /* CONFIG_OF_IRQ */ 179#endif /* CONFIG_OF_IRQ */
180
181struct irq_domain_ops irq_domain_simple_ops = {
182#ifdef CONFIG_OF_IRQ
183 .dt_translate = irq_domain_simple_dt_translate,
184#endif /* CONFIG_OF_IRQ */
185};
186EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
index a78ed2736ba7..8a39fa3e3c6c 100644
--- a/kernel/sched_fair.c
+++ b/kernel/sched_fair.c
@@ -2352,13 +2352,11 @@ again:
2352 if (!smt && (sd->flags & SD_SHARE_CPUPOWER)) 2352 if (!smt && (sd->flags & SD_SHARE_CPUPOWER))
2353 continue; 2353 continue;
2354 2354
2355 if (!(sd->flags & SD_SHARE_PKG_RESOURCES)) { 2355 if (smt && !(sd->flags & SD_SHARE_CPUPOWER))
2356 if (!smt) { 2356 break;
2357 smt = 1; 2357
2358 goto again; 2358 if (!(sd->flags & SD_SHARE_PKG_RESOURCES))
2359 }
2360 break; 2359 break;
2361 }
2362 2360
2363 sg = sd->groups; 2361 sg = sd->groups;
2364 do { 2362 do {
@@ -2378,6 +2376,10 @@ next:
2378 sg = sg->next; 2376 sg = sg->next;
2379 } while (sg != sd->groups); 2377 } while (sg != sd->groups);
2380 } 2378 }
2379 if (!smt) {
2380 smt = 1;
2381 goto again;
2382 }
2381done: 2383done:
2382 rcu_read_unlock(); 2384 rcu_read_unlock();
2383 2385
diff --git a/kernel/sysctl_binary.c b/kernel/sysctl_binary.c
index 6318b511afa1..a650694883a1 100644
--- a/kernel/sysctl_binary.c
+++ b/kernel/sysctl_binary.c
@@ -1354,7 +1354,7 @@ static ssize_t binary_sysctl(const int *name, int nlen,
1354 1354
1355 fput(file); 1355 fput(file);
1356out_putname: 1356out_putname:
1357 putname(pathname); 1357 __putname(pathname);
1358out: 1358out:
1359 return result; 1359 return result;
1360} 1360}
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index c4eb71c8b2ea..1ecd6ba36d6c 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -387,7 +387,6 @@ void clockevents_exchange_device(struct clock_event_device *old,
387 * released list and do a notify add later. 387 * released list and do a notify add later.
388 */ 388 */
389 if (old) { 389 if (old) {
390 old->event_handler = clockevents_handle_noop;
391 clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED); 390 clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED);
392 list_del(&old->list); 391 list_del(&old->list);
393 list_add(&old->list, &clockevents_released); 392 list_add(&old->list, &clockevents_released);
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index da2f760e780c..d3ad022136e5 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -647,7 +647,7 @@ static void clocksource_enqueue(struct clocksource *cs)
647 647
648/** 648/**
649 * __clocksource_updatefreq_scale - Used update clocksource with new freq 649 * __clocksource_updatefreq_scale - Used update clocksource with new freq
650 * @t: clocksource to be registered 650 * @cs: clocksource to be registered
651 * @scale: Scale factor multiplied against freq to get clocksource hz 651 * @scale: Scale factor multiplied against freq to get clocksource hz
652 * @freq: clocksource frequency (cycles per second) divided by scale 652 * @freq: clocksource frequency (cycles per second) divided by scale
653 * 653 *
@@ -699,7 +699,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
699 699
700/** 700/**
701 * __clocksource_register_scale - Used to install new clocksources 701 * __clocksource_register_scale - Used to install new clocksources
702 * @t: clocksource to be registered 702 * @cs: clocksource to be registered
703 * @scale: Scale factor multiplied against freq to get clocksource hz 703 * @scale: Scale factor multiplied against freq to get clocksource hz
704 * @freq: clocksource frequency (cycles per second) divided by scale 704 * @freq: clocksource frequency (cycles per second) divided by scale
705 * 705 *
@@ -727,7 +727,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
727 727
728/** 728/**
729 * clocksource_register - Used to install new clocksources 729 * clocksource_register - Used to install new clocksources
730 * @t: clocksource to be registered 730 * @cs: clocksource to be registered
731 * 731 *
732 * Returns -EBUSY if registration fails, zero otherwise. 732 * Returns -EBUSY if registration fails, zero otherwise.
733 */ 733 */
@@ -761,6 +761,8 @@ static void __clocksource_change_rating(struct clocksource *cs, int rating)
761 761
762/** 762/**
763 * clocksource_change_rating - Change the rating of a registered clocksource 763 * clocksource_change_rating - Change the rating of a registered clocksource
764 * @cs: clocksource to be changed
765 * @rating: new rating
764 */ 766 */
765void clocksource_change_rating(struct clocksource *cs, int rating) 767void clocksource_change_rating(struct clocksource *cs, int rating)
766{ 768{
@@ -772,6 +774,7 @@ EXPORT_SYMBOL(clocksource_change_rating);
772 774
773/** 775/**
774 * clocksource_unregister - remove a registered clocksource 776 * clocksource_unregister - remove a registered clocksource
777 * @cs: clocksource to be unregistered
775 */ 778 */
776void clocksource_unregister(struct clocksource *cs) 779void clocksource_unregister(struct clocksource *cs)
777{ 780{
@@ -787,6 +790,7 @@ EXPORT_SYMBOL(clocksource_unregister);
787/** 790/**
788 * sysfs_show_current_clocksources - sysfs interface for current clocksource 791 * sysfs_show_current_clocksources - sysfs interface for current clocksource
789 * @dev: unused 792 * @dev: unused
793 * @attr: unused
790 * @buf: char buffer to be filled with clocksource list 794 * @buf: char buffer to be filled with clocksource list
791 * 795 *
792 * Provides sysfs interface for listing current clocksource. 796 * Provides sysfs interface for listing current clocksource.
@@ -807,6 +811,7 @@ sysfs_show_current_clocksources(struct sys_device *dev,
807/** 811/**
808 * sysfs_override_clocksource - interface for manually overriding clocksource 812 * sysfs_override_clocksource - interface for manually overriding clocksource
809 * @dev: unused 813 * @dev: unused
814 * @attr: unused
810 * @buf: name of override clocksource 815 * @buf: name of override clocksource
811 * @count: length of buffer 816 * @count: length of buffer
812 * 817 *
@@ -842,6 +847,7 @@ static ssize_t sysfs_override_clocksource(struct sys_device *dev,
842/** 847/**
843 * sysfs_show_available_clocksources - sysfs interface for listing clocksource 848 * sysfs_show_available_clocksources - sysfs interface for listing clocksource
844 * @dev: unused 849 * @dev: unused
850 * @attr: unused
845 * @buf: char buffer to be filled with clocksource list 851 * @buf: char buffer to be filled with clocksource list
846 * 852 *
847 * Provides sysfs interface for listing registered clocksources 853 * Provides sysfs interface for listing registered clocksources
diff --git a/mm/filemap.c b/mm/filemap.c
index c106d3b3cc64..5f0a3c91fdac 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1828,7 +1828,7 @@ repeat:
1828 page = __page_cache_alloc(gfp | __GFP_COLD); 1828 page = __page_cache_alloc(gfp | __GFP_COLD);
1829 if (!page) 1829 if (!page)
1830 return ERR_PTR(-ENOMEM); 1830 return ERR_PTR(-ENOMEM);
1831 err = add_to_page_cache_lru(page, mapping, index, GFP_KERNEL); 1831 err = add_to_page_cache_lru(page, mapping, index, gfp);
1832 if (unlikely(err)) { 1832 if (unlikely(err)) {
1833 page_cache_release(page); 1833 page_cache_release(page);
1834 if (err == -EEXIST) 1834 if (err == -EEXIST)
@@ -1925,10 +1925,7 @@ static struct page *wait_on_page_read(struct page *page)
1925 * @gfp: the page allocator flags to use if allocating 1925 * @gfp: the page allocator flags to use if allocating
1926 * 1926 *
1927 * This is the same as "read_mapping_page(mapping, index, NULL)", but with 1927 * This is the same as "read_mapping_page(mapping, index, NULL)", but with
1928 * any new page allocations done using the specified allocation flags. Note 1928 * any new page allocations done using the specified allocation flags.
1929 * that the Radix tree operations will still use GFP_KERNEL, so you can't
1930 * expect to do this atomically or anything like that - but you can pass in
1931 * other page requirements.
1932 * 1929 *
1933 * If the page does not get brought uptodate, return -EIO. 1930 * If the page does not get brought uptodate, return -EIO.
1934 */ 1931 */
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 73f17c0293c0..2316840b337a 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -901,7 +901,6 @@ retry:
901 h->resv_huge_pages += delta; 901 h->resv_huge_pages += delta;
902 ret = 0; 902 ret = 0;
903 903
904 spin_unlock(&hugetlb_lock);
905 /* Free the needed pages to the hugetlb pool */ 904 /* Free the needed pages to the hugetlb pool */
906 list_for_each_entry_safe(page, tmp, &surplus_list, lru) { 905 list_for_each_entry_safe(page, tmp, &surplus_list, lru) {
907 if ((--needed) < 0) 906 if ((--needed) < 0)
@@ -915,6 +914,7 @@ retry:
915 VM_BUG_ON(page_count(page)); 914 VM_BUG_ON(page_count(page));
916 enqueue_huge_page(h, page); 915 enqueue_huge_page(h, page);
917 } 916 }
917 spin_unlock(&hugetlb_lock);
918 918
919 /* Free unnecessary surplus pages to the buddy allocator */ 919 /* Free unnecessary surplus pages to the buddy allocator */
920free: 920free:
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 6aff93c98aca..b63f5f7dfa07 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -4907,9 +4907,9 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
4907 int cpu; 4907 int cpu;
4908 enable_swap_cgroup(); 4908 enable_swap_cgroup();
4909 parent = NULL; 4909 parent = NULL;
4910 root_mem_cgroup = memcg;
4911 if (mem_cgroup_soft_limit_tree_init()) 4910 if (mem_cgroup_soft_limit_tree_init())
4912 goto free_out; 4911 goto free_out;
4912 root_mem_cgroup = memcg;
4913 for_each_possible_cpu(cpu) { 4913 for_each_possible_cpu(cpu) {
4914 struct memcg_stock_pcp *stock = 4914 struct memcg_stock_pcp *stock =
4915 &per_cpu(memcg_stock, cpu); 4915 &per_cpu(memcg_stock, cpu);
@@ -4948,7 +4948,6 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
4948 return &memcg->css; 4948 return &memcg->css;
4949free_out: 4949free_out:
4950 __mem_cgroup_free(memcg); 4950 __mem_cgroup_free(memcg);
4951 root_mem_cgroup = NULL;
4952 return ERR_PTR(error); 4951 return ERR_PTR(error);
4953} 4952}
4954 4953
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index adc395481813..c3fdbcb17658 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -636,6 +636,7 @@ static int mbind_range(struct mm_struct *mm, unsigned long start,
636 struct vm_area_struct *prev; 636 struct vm_area_struct *prev;
637 struct vm_area_struct *vma; 637 struct vm_area_struct *vma;
638 int err = 0; 638 int err = 0;
639 pgoff_t pgoff;
639 unsigned long vmstart; 640 unsigned long vmstart;
640 unsigned long vmend; 641 unsigned long vmend;
641 642
@@ -643,13 +644,21 @@ static int mbind_range(struct mm_struct *mm, unsigned long start,
643 if (!vma || vma->vm_start > start) 644 if (!vma || vma->vm_start > start)
644 return -EFAULT; 645 return -EFAULT;
645 646
647 if (start > vma->vm_start)
648 prev = vma;
649
646 for (; vma && vma->vm_start < end; prev = vma, vma = next) { 650 for (; vma && vma->vm_start < end; prev = vma, vma = next) {
647 next = vma->vm_next; 651 next = vma->vm_next;
648 vmstart = max(start, vma->vm_start); 652 vmstart = max(start, vma->vm_start);
649 vmend = min(end, vma->vm_end); 653 vmend = min(end, vma->vm_end);
650 654
655 if (mpol_equal(vma_policy(vma), new_pol))
656 continue;
657
658 pgoff = vma->vm_pgoff +
659 ((vmstart - vma->vm_start) >> PAGE_SHIFT);
651 prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags, 660 prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags,
652 vma->anon_vma, vma->vm_file, vma->vm_pgoff, 661 vma->anon_vma, vma->vm_file, pgoff,
653 new_pol); 662 new_pol);
654 if (prev) { 663 if (prev) {
655 vma = prev; 664 vma = prev;
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 76f2c5ae908e..069b64e521fc 100644
--- a/mm/oom_kill.c
+++ b/mm/oom_kill.c
@@ -176,7 +176,7 @@ static bool oom_unkillable_task(struct task_struct *p,
176unsigned int oom_badness(struct task_struct *p, struct mem_cgroup *mem, 176unsigned int oom_badness(struct task_struct *p, struct mem_cgroup *mem,
177 const nodemask_t *nodemask, unsigned long totalpages) 177 const nodemask_t *nodemask, unsigned long totalpages)
178{ 178{
179 int points; 179 long points;
180 180
181 if (oom_unkillable_task(p, mem, nodemask)) 181 if (oom_unkillable_task(p, mem, nodemask))
182 return 0; 182 return 0;
diff --git a/mm/percpu.c b/mm/percpu.c
index 3bb810a72006..716eb4acf2fc 100644
--- a/mm/percpu.c
+++ b/mm/percpu.c
@@ -1023,9 +1023,11 @@ phys_addr_t per_cpu_ptr_to_phys(void *addr)
1023 if (!is_vmalloc_addr(addr)) 1023 if (!is_vmalloc_addr(addr))
1024 return __pa(addr); 1024 return __pa(addr);
1025 else 1025 else
1026 return page_to_phys(vmalloc_to_page(addr)); 1026 return page_to_phys(vmalloc_to_page(addr)) +
1027 offset_in_page(addr);
1027 } else 1028 } else
1028 return page_to_phys(pcpu_addr_to_page(addr)); 1029 return page_to_phys(pcpu_addr_to_page(addr)) +
1030 offset_in_page(addr);
1029} 1031}
1030 1032
1031/** 1033/**
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 1d8b32f07139..21fdf46ad5aa 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1118,6 +1118,32 @@ void *vm_map_ram(struct page **pages, unsigned int count, int node, pgprot_t pro
1118EXPORT_SYMBOL(vm_map_ram); 1118EXPORT_SYMBOL(vm_map_ram);
1119 1119
1120/** 1120/**
1121 * vm_area_add_early - add vmap area early during boot
1122 * @vm: vm_struct to add
1123 *
1124 * This function is used to add fixed kernel vm area to vmlist before
1125 * vmalloc_init() is called. @vm->addr, @vm->size, and @vm->flags
1126 * should contain proper values and the other fields should be zero.
1127 *
1128 * DO NOT USE THIS FUNCTION UNLESS YOU KNOW WHAT YOU'RE DOING.
1129 */
1130void __init vm_area_add_early(struct vm_struct *vm)
1131{
1132 struct vm_struct *tmp, **p;
1133
1134 BUG_ON(vmap_initialized);
1135 for (p = &vmlist; (tmp = *p) != NULL; p = &tmp->next) {
1136 if (tmp->addr >= vm->addr) {
1137 BUG_ON(tmp->addr < vm->addr + vm->size);
1138 break;
1139 } else
1140 BUG_ON(tmp->addr + tmp->size > vm->addr);
1141 }
1142 vm->next = *p;
1143 *p = vm;
1144}
1145
1146/**
1121 * vm_area_register_early - register vmap area early during boot 1147 * vm_area_register_early - register vmap area early during boot
1122 * @vm: vm_struct to register 1148 * @vm: vm_struct to register
1123 * @align: requested alignment 1149 * @align: requested alignment
@@ -1139,8 +1165,7 @@ void __init vm_area_register_early(struct vm_struct *vm, size_t align)
1139 1165
1140 vm->addr = (void *)addr; 1166 vm->addr = (void *)addr;
1141 1167
1142 vm->next = vmlist; 1168 vm_area_add_early(vm);
1143 vmlist = vm;
1144} 1169}
1145 1170
1146void __init vmalloc_init(void) 1171void __init vmalloc_init(void)
@@ -1290,7 +1315,7 @@ static struct vm_struct *__get_vm_area_node(unsigned long size,
1290 unsigned long align, unsigned long flags, unsigned long start, 1315 unsigned long align, unsigned long flags, unsigned long start,
1291 unsigned long end, int node, gfp_t gfp_mask, void *caller) 1316 unsigned long end, int node, gfp_t gfp_mask, void *caller)
1292{ 1317{
1293 static struct vmap_area *va; 1318 struct vmap_area *va;
1294 struct vm_struct *area; 1319 struct vm_struct *area;
1295 1320
1296 BUG_ON(in_interrupt()); 1321 BUG_ON(in_interrupt());
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index e0af7237cd92..c1c597e3e198 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -673,7 +673,7 @@ int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type)
673 goto encrypt; 673 goto encrypt;
674 674
675auth: 675auth:
676 if (test_and_set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) 676 if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend))
677 return 0; 677 return 0;
678 678
679 if (!hci_conn_auth(conn, sec_level, auth_type)) 679 if (!hci_conn_auth(conn, sec_level, auth_type))
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 5ea94a1eecf2..17b5b1cd9657 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -2152,7 +2152,7 @@ static int l2cap_parse_conf_rsp(struct l2cap_chan *chan, void *rsp, int len, voi
2152 void *ptr = req->data; 2152 void *ptr = req->data;
2153 int type, olen; 2153 int type, olen;
2154 unsigned long val; 2154 unsigned long val;
2155 struct l2cap_conf_rfc rfc; 2155 struct l2cap_conf_rfc rfc = { .mode = L2CAP_MODE_BASIC };
2156 2156
2157 BT_DBG("chan %p, rsp %p, len %d, req %p", chan, rsp, len, data); 2157 BT_DBG("chan %p, rsp %p, len %d, req %p", chan, rsp, len, data);
2158 2158
@@ -2271,6 +2271,16 @@ static void l2cap_conf_rfc_get(struct l2cap_chan *chan, void *rsp, int len)
2271 } 2271 }
2272 } 2272 }
2273 2273
2274 /* Use sane default values in case a misbehaving remote device
2275 * did not send an RFC option.
2276 */
2277 rfc.mode = chan->mode;
2278 rfc.retrans_timeout = cpu_to_le16(L2CAP_DEFAULT_RETRANS_TO);
2279 rfc.monitor_timeout = cpu_to_le16(L2CAP_DEFAULT_MONITOR_TO);
2280 rfc.max_pdu_size = cpu_to_le16(chan->imtu);
2281
2282 BT_ERR("Expected RFC option was not found, using defaults");
2283
2274done: 2284done:
2275 switch (rfc.mode) { 2285 switch (rfc.mode) {
2276 case L2CAP_MODE_ERTM: 2286 case L2CAP_MODE_ERTM:
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
index 4e32e18211f9..2d28dfe98389 100644
--- a/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
@@ -1146,6 +1146,7 @@ static int rfcomm_recv_ua(struct rfcomm_session *s, u8 dlci)
1146 if (list_empty(&s->dlcs)) { 1146 if (list_empty(&s->dlcs)) {
1147 s->state = BT_DISCONN; 1147 s->state = BT_DISCONN;
1148 rfcomm_send_disc(s, 0); 1148 rfcomm_send_disc(s, 0);
1149 rfcomm_session_clear_timer(s);
1149 } 1150 }
1150 1151
1151 break; 1152 break;
diff --git a/net/bridge/br_netfilter.c b/net/bridge/br_netfilter.c
index d6ec3720c77e..fa8b8f763580 100644
--- a/net/bridge/br_netfilter.c
+++ b/net/bridge/br_netfilter.c
@@ -114,12 +114,18 @@ static struct neighbour *fake_neigh_lookup(const struct dst_entry *dst, const vo
114 return NULL; 114 return NULL;
115} 115}
116 116
117static unsigned int fake_mtu(const struct dst_entry *dst)
118{
119 return dst->dev->mtu;
120}
121
117static struct dst_ops fake_dst_ops = { 122static struct dst_ops fake_dst_ops = {
118 .family = AF_INET, 123 .family = AF_INET,
119 .protocol = cpu_to_be16(ETH_P_IP), 124 .protocol = cpu_to_be16(ETH_P_IP),
120 .update_pmtu = fake_update_pmtu, 125 .update_pmtu = fake_update_pmtu,
121 .cow_metrics = fake_cow_metrics, 126 .cow_metrics = fake_cow_metrics,
122 .neigh_lookup = fake_neigh_lookup, 127 .neigh_lookup = fake_neigh_lookup,
128 .mtu = fake_mtu,
123}; 129};
124 130
125/* 131/*
@@ -141,7 +147,7 @@ void br_netfilter_rtable_init(struct net_bridge *br)
141 rt->dst.dev = br->dev; 147 rt->dst.dev = br->dev;
142 rt->dst.path = &rt->dst; 148 rt->dst.path = &rt->dst;
143 dst_init_metrics(&rt->dst, br_dst_default_metrics, true); 149 dst_init_metrics(&rt->dst, br_dst_default_metrics, true);
144 rt->dst.flags = DST_NOXFRM; 150 rt->dst.flags = DST_NOXFRM | DST_NOPEER;
145 rt->dst.ops = &fake_dst_ops; 151 rt->dst.ops = &fake_dst_ops;
146} 152}
147 153
diff --git a/net/core/flow.c b/net/core/flow.c
index 8ae42de9c79e..e318c7e98042 100644
--- a/net/core/flow.c
+++ b/net/core/flow.c
@@ -358,6 +358,18 @@ void flow_cache_flush(void)
358 put_online_cpus(); 358 put_online_cpus();
359} 359}
360 360
361static void flow_cache_flush_task(struct work_struct *work)
362{
363 flow_cache_flush();
364}
365
366static DECLARE_WORK(flow_cache_flush_work, flow_cache_flush_task);
367
368void flow_cache_flush_deferred(void)
369{
370 schedule_work(&flow_cache_flush_work);
371}
372
361static int __cpuinit flow_cache_cpu_prepare(struct flow_cache *fc, int cpu) 373static int __cpuinit flow_cache_cpu_prepare(struct flow_cache *fc, int cpu)
362{ 374{
363 struct flow_cache_percpu *fcp = per_cpu_ptr(fc->percpu, cpu); 375 struct flow_cache_percpu *fcp = per_cpu_ptr(fc->percpu, cpu);
diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c
index c71c434a4c05..385aefe53648 100644
--- a/net/core/net-sysfs.c
+++ b/net/core/net-sysfs.c
@@ -665,11 +665,14 @@ static ssize_t store_rps_dev_flow_table_cnt(struct netdev_rx_queue *queue,
665 if (count) { 665 if (count) {
666 int i; 666 int i;
667 667
668 if (count > 1<<30) { 668 if (count > INT_MAX)
669 return -EINVAL;
670 count = roundup_pow_of_two(count);
671 if (count > (ULONG_MAX - sizeof(struct rps_dev_flow_table))
672 / sizeof(struct rps_dev_flow)) {
669 /* Enforce a limit to prevent overflow */ 673 /* Enforce a limit to prevent overflow */
670 return -EINVAL; 674 return -EINVAL;
671 } 675 }
672 count = roundup_pow_of_two(count);
673 table = vmalloc(RPS_DEV_FLOW_TABLE_SIZE(count)); 676 table = vmalloc(RPS_DEV_FLOW_TABLE_SIZE(count));
674 if (!table) 677 if (!table)
675 return -ENOMEM; 678 return -ENOMEM;
diff --git a/net/core/sock.c b/net/core/sock.c
index 4ed7b1d12f5e..b23f174ab84c 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -288,11 +288,7 @@ int sock_queue_rcv_skb(struct sock *sk, struct sk_buff *skb)
288 unsigned long flags; 288 unsigned long flags;
289 struct sk_buff_head *list = &sk->sk_receive_queue; 289 struct sk_buff_head *list = &sk->sk_receive_queue;
290 290
291 /* Cast sk->rcvbuf to unsigned... It's pointless, but reduces 291 if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) {
292 number of warnings when compiling with -W --ANK
293 */
294 if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >=
295 (unsigned)sk->sk_rcvbuf) {
296 atomic_inc(&sk->sk_drops); 292 atomic_inc(&sk->sk_drops);
297 trace_sock_rcvqueue_full(sk, skb); 293 trace_sock_rcvqueue_full(sk, skb);
298 return -ENOMEM; 294 return -ENOMEM;
diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 0da2afc97f32..99ec116bef14 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -253,6 +253,10 @@ static int __init ic_open_devs(void)
253 } 253 }
254 } 254 }
255 255
256 /* no point in waiting if we could not bring up at least one device */
257 if (!ic_first_dev)
258 goto have_carrier;
259
256 /* wait for a carrier on at least one device */ 260 /* wait for a carrier on at least one device */
257 start = jiffies; 261 start = jiffies;
258 while (jiffies - start < msecs_to_jiffies(CONF_CARRIER_TIMEOUT)) { 262 while (jiffies - start < msecs_to_jiffies(CONF_CARRIER_TIMEOUT)) {
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 46af62363b8c..94cdbc55ca7e 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -91,6 +91,7 @@
91#include <linux/rcupdate.h> 91#include <linux/rcupdate.h>
92#include <linux/times.h> 92#include <linux/times.h>
93#include <linux/slab.h> 93#include <linux/slab.h>
94#include <linux/prefetch.h>
94#include <net/dst.h> 95#include <net/dst.h>
95#include <net/net_namespace.h> 96#include <net/net_namespace.h>
96#include <net/protocol.h> 97#include <net/protocol.h>
@@ -120,6 +121,7 @@
120 121
121static int ip_rt_max_size; 122static int ip_rt_max_size;
122static int ip_rt_gc_timeout __read_mostly = RT_GC_TIMEOUT; 123static int ip_rt_gc_timeout __read_mostly = RT_GC_TIMEOUT;
124static int ip_rt_gc_interval __read_mostly = 60 * HZ;
123static int ip_rt_gc_min_interval __read_mostly = HZ / 2; 125static int ip_rt_gc_min_interval __read_mostly = HZ / 2;
124static int ip_rt_redirect_number __read_mostly = 9; 126static int ip_rt_redirect_number __read_mostly = 9;
125static int ip_rt_redirect_load __read_mostly = HZ / 50; 127static int ip_rt_redirect_load __read_mostly = HZ / 50;
@@ -133,6 +135,9 @@ static int ip_rt_min_advmss __read_mostly = 256;
133static int rt_chain_length_max __read_mostly = 20; 135static int rt_chain_length_max __read_mostly = 20;
134static int redirect_genid; 136static int redirect_genid;
135 137
138static struct delayed_work expires_work;
139static unsigned long expires_ljiffies;
140
136/* 141/*
137 * Interface to generic destination cache. 142 * Interface to generic destination cache.
138 */ 143 */
@@ -830,6 +835,97 @@ static int has_noalias(const struct rtable *head, const struct rtable *rth)
830 return ONE; 835 return ONE;
831} 836}
832 837
838static void rt_check_expire(void)
839{
840 static unsigned int rover;
841 unsigned int i = rover, goal;
842 struct rtable *rth;
843 struct rtable __rcu **rthp;
844 unsigned long samples = 0;
845 unsigned long sum = 0, sum2 = 0;
846 unsigned long delta;
847 u64 mult;
848
849 delta = jiffies - expires_ljiffies;
850 expires_ljiffies = jiffies;
851 mult = ((u64)delta) << rt_hash_log;
852 if (ip_rt_gc_timeout > 1)
853 do_div(mult, ip_rt_gc_timeout);
854 goal = (unsigned int)mult;
855 if (goal > rt_hash_mask)
856 goal = rt_hash_mask + 1;
857 for (; goal > 0; goal--) {
858 unsigned long tmo = ip_rt_gc_timeout;
859 unsigned long length;
860
861 i = (i + 1) & rt_hash_mask;
862 rthp = &rt_hash_table[i].chain;
863
864 if (need_resched())
865 cond_resched();
866
867 samples++;
868
869 if (rcu_dereference_raw(*rthp) == NULL)
870 continue;
871 length = 0;
872 spin_lock_bh(rt_hash_lock_addr(i));
873 while ((rth = rcu_dereference_protected(*rthp,
874 lockdep_is_held(rt_hash_lock_addr(i)))) != NULL) {
875 prefetch(rth->dst.rt_next);
876 if (rt_is_expired(rth)) {
877 *rthp = rth->dst.rt_next;
878 rt_free(rth);
879 continue;
880 }
881 if (rth->dst.expires) {
882 /* Entry is expired even if it is in use */
883 if (time_before_eq(jiffies, rth->dst.expires)) {
884nofree:
885 tmo >>= 1;
886 rthp = &rth->dst.rt_next;
887 /*
888 * We only count entries on
889 * a chain with equal hash inputs once
890 * so that entries for different QOS
891 * levels, and other non-hash input
892 * attributes don't unfairly skew
893 * the length computation
894 */
895 length += has_noalias(rt_hash_table[i].chain, rth);
896 continue;
897 }
898 } else if (!rt_may_expire(rth, tmo, ip_rt_gc_timeout))
899 goto nofree;
900
901 /* Cleanup aged off entries. */
902 *rthp = rth->dst.rt_next;
903 rt_free(rth);
904 }
905 spin_unlock_bh(rt_hash_lock_addr(i));
906 sum += length;
907 sum2 += length*length;
908 }
909 if (samples) {
910 unsigned long avg = sum / samples;
911 unsigned long sd = int_sqrt(sum2 / samples - avg*avg);
912 rt_chain_length_max = max_t(unsigned long,
913 ip_rt_gc_elasticity,
914 (avg + 4*sd) >> FRACT_BITS);
915 }
916 rover = i;
917}
918
919/*
920 * rt_worker_func() is run in process context.
921 * we call rt_check_expire() to scan part of the hash table
922 */
923static void rt_worker_func(struct work_struct *work)
924{
925 rt_check_expire();
926 schedule_delayed_work(&expires_work, ip_rt_gc_interval);
927}
928
833/* 929/*
834 * Perturbation of rt_genid by a small quantity [1..256] 930 * Perturbation of rt_genid by a small quantity [1..256]
835 * Using 8 bits of shuffling ensure we can call rt_cache_invalidate() 931 * Using 8 bits of shuffling ensure we can call rt_cache_invalidate()
@@ -1271,7 +1367,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more)
1271{ 1367{
1272 struct rtable *rt = (struct rtable *) dst; 1368 struct rtable *rt = (struct rtable *) dst;
1273 1369
1274 if (rt) { 1370 if (rt && !(rt->dst.flags & DST_NOPEER)) {
1275 if (rt->peer == NULL) 1371 if (rt->peer == NULL)
1276 rt_bind_peer(rt, rt->rt_dst, 1); 1372 rt_bind_peer(rt, rt->rt_dst, 1);
1277 1373
@@ -1282,7 +1378,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more)
1282 iph->id = htons(inet_getid(rt->peer, more)); 1378 iph->id = htons(inet_getid(rt->peer, more));
1283 return; 1379 return;
1284 } 1380 }
1285 } else 1381 } else if (!rt)
1286 printk(KERN_DEBUG "rt_bind_peer(0) @%p\n", 1382 printk(KERN_DEBUG "rt_bind_peer(0) @%p\n",
1287 __builtin_return_address(0)); 1383 __builtin_return_address(0));
1288 1384
@@ -3179,6 +3275,13 @@ static ctl_table ipv4_route_table[] = {
3179 .proc_handler = proc_dointvec_jiffies, 3275 .proc_handler = proc_dointvec_jiffies,
3180 }, 3276 },
3181 { 3277 {
3278 .procname = "gc_interval",
3279 .data = &ip_rt_gc_interval,
3280 .maxlen = sizeof(int),
3281 .mode = 0644,
3282 .proc_handler = proc_dointvec_jiffies,
3283 },
3284 {
3182 .procname = "redirect_load", 3285 .procname = "redirect_load",
3183 .data = &ip_rt_redirect_load, 3286 .data = &ip_rt_redirect_load,
3184 .maxlen = sizeof(int), 3287 .maxlen = sizeof(int),
@@ -3388,6 +3491,11 @@ int __init ip_rt_init(void)
3388 devinet_init(); 3491 devinet_init();
3389 ip_fib_init(); 3492 ip_fib_init();
3390 3493
3494 INIT_DELAYED_WORK_DEFERRABLE(&expires_work, rt_worker_func);
3495 expires_ljiffies = jiffies;
3496 schedule_delayed_work(&expires_work,
3497 net_random() % ip_rt_gc_interval + ip_rt_gc_interval);
3498
3391 if (ip_rt_proc_init()) 3499 if (ip_rt_proc_init())
3392 printk(KERN_ERR "Unable to create route proc files\n"); 3500 printk(KERN_ERR "Unable to create route proc files\n");
3393#ifdef CONFIG_XFRM 3501#ifdef CONFIG_XFRM
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 84d0bd5cac93..ec562713db9b 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -603,7 +603,7 @@ void ipv6_select_ident(struct frag_hdr *fhdr, struct rt6_info *rt)
603 static atomic_t ipv6_fragmentation_id; 603 static atomic_t ipv6_fragmentation_id;
604 int old, new; 604 int old, new;
605 605
606 if (rt) { 606 if (rt && !(rt->dst.flags & DST_NOPEER)) {
607 struct inet_peer *peer; 607 struct inet_peer *peer;
608 608
609 if (!rt->rt6i_peer) 609 if (!rt->rt6i_peer)
diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c
index dfd3a648a551..a18e6c3d36e3 100644
--- a/net/llc/af_llc.c
+++ b/net/llc/af_llc.c
@@ -833,15 +833,15 @@ static int llc_ui_recvmsg(struct kiocb *iocb, struct socket *sock,
833 copied += used; 833 copied += used;
834 len -= used; 834 len -= used;
835 835
836 /* For non stream protcols we get one packet per recvmsg call */
837 if (sk->sk_type != SOCK_STREAM)
838 goto copy_uaddr;
839
836 if (!(flags & MSG_PEEK)) { 840 if (!(flags & MSG_PEEK)) {
837 sk_eat_skb(sk, skb, 0); 841 sk_eat_skb(sk, skb, 0);
838 *seq = 0; 842 *seq = 0;
839 } 843 }
840 844
841 /* For non stream protcols we get one packet per recvmsg call */
842 if (sk->sk_type != SOCK_STREAM)
843 goto copy_uaddr;
844
845 /* Partial read */ 845 /* Partial read */
846 if (used + offset < skb->len) 846 if (used + offset < skb->len)
847 continue; 847 continue;
@@ -857,6 +857,12 @@ copy_uaddr:
857 } 857 }
858 if (llc_sk(sk)->cmsg_flags) 858 if (llc_sk(sk)->cmsg_flags)
859 llc_cmsg_rcv(msg, skb); 859 llc_cmsg_rcv(msg, skb);
860
861 if (!(flags & MSG_PEEK)) {
862 sk_eat_skb(sk, skb, 0);
863 *seq = 0;
864 }
865
860 goto out; 866 goto out;
861} 867}
862 868
diff --git a/net/netfilter/ipvs/ip_vs_conn.c b/net/netfilter/ipvs/ip_vs_conn.c
index 12571fb2881c..29fa5badde75 100644
--- a/net/netfilter/ipvs/ip_vs_conn.c
+++ b/net/netfilter/ipvs/ip_vs_conn.c
@@ -616,7 +616,7 @@ struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp)
616 if ((cp) && (!cp->dest)) { 616 if ((cp) && (!cp->dest)) {
617 dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr, 617 dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr,
618 cp->dport, &cp->vaddr, cp->vport, 618 cp->dport, &cp->vaddr, cp->vport,
619 cp->protocol, cp->fwmark); 619 cp->protocol, cp->fwmark, cp->flags);
620 ip_vs_bind_dest(cp, dest); 620 ip_vs_bind_dest(cp, dest);
621 return dest; 621 return dest;
622 } else 622 } else
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index 008bf97cc91a..e1a66cf37f9a 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -619,15 +619,21 @@ struct ip_vs_dest *ip_vs_find_dest(struct net *net, int af,
619 const union nf_inet_addr *daddr, 619 const union nf_inet_addr *daddr,
620 __be16 dport, 620 __be16 dport,
621 const union nf_inet_addr *vaddr, 621 const union nf_inet_addr *vaddr,
622 __be16 vport, __u16 protocol, __u32 fwmark) 622 __be16 vport, __u16 protocol, __u32 fwmark,
623 __u32 flags)
623{ 624{
624 struct ip_vs_dest *dest; 625 struct ip_vs_dest *dest;
625 struct ip_vs_service *svc; 626 struct ip_vs_service *svc;
627 __be16 port = dport;
626 628
627 svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport); 629 svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport);
628 if (!svc) 630 if (!svc)
629 return NULL; 631 return NULL;
630 dest = ip_vs_lookup_dest(svc, daddr, dport); 632 if (fwmark && (flags & IP_VS_CONN_F_FWD_MASK) != IP_VS_CONN_F_MASQ)
633 port = 0;
634 dest = ip_vs_lookup_dest(svc, daddr, port);
635 if (!dest)
636 dest = ip_vs_lookup_dest(svc, daddr, port ^ dport);
631 if (dest) 637 if (dest)
632 atomic_inc(&dest->refcnt); 638 atomic_inc(&dest->refcnt);
633 ip_vs_service_put(svc); 639 ip_vs_service_put(svc);
diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c
index 3cdd479f9b5d..2b6678c0ce14 100644
--- a/net/netfilter/ipvs/ip_vs_sync.c
+++ b/net/netfilter/ipvs/ip_vs_sync.c
@@ -740,7 +740,7 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param,
740 * but still handled. 740 * but still handled.
741 */ 741 */
742 dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr, 742 dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr,
743 param->vport, protocol, fwmark); 743 param->vport, protocol, fwmark, flags);
744 744
745 /* Set the approprite ativity flag */ 745 /* Set the approprite ativity flag */
746 if (protocol == IPPROTO_TCP) { 746 if (protocol == IPPROTO_TCP) {
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index ef21b221f036..257e77256c5c 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -135,7 +135,7 @@ nla_put_failure:
135static inline int 135static inline int
136ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct) 136ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct)
137{ 137{
138 long timeout = (ct->timeout.expires - jiffies) / HZ; 138 long timeout = ((long)ct->timeout.expires - (long)jiffies) / HZ;
139 139
140 if (timeout < 0) 140 if (timeout < 0)
141 timeout = 0; 141 timeout = 0;
@@ -1358,12 +1358,15 @@ ctnetlink_create_conntrack(struct net *net, u16 zone,
1358 nf_ct_protonum(ct)); 1358 nf_ct_protonum(ct));
1359 if (helper == NULL) { 1359 if (helper == NULL) {
1360 rcu_read_unlock(); 1360 rcu_read_unlock();
1361 spin_unlock_bh(&nf_conntrack_lock);
1361#ifdef CONFIG_MODULES 1362#ifdef CONFIG_MODULES
1362 if (request_module("nfct-helper-%s", helpname) < 0) { 1363 if (request_module("nfct-helper-%s", helpname) < 0) {
1364 spin_lock_bh(&nf_conntrack_lock);
1363 err = -EOPNOTSUPP; 1365 err = -EOPNOTSUPP;
1364 goto err1; 1366 goto err1;
1365 } 1367 }
1366 1368
1369 spin_lock_bh(&nf_conntrack_lock);
1367 rcu_read_lock(); 1370 rcu_read_lock();
1368 helper = __nf_conntrack_helper_find(helpname, 1371 helper = __nf_conntrack_helper_find(helpname,
1369 nf_ct_l3num(ct), 1372 nf_ct_l3num(ct),
@@ -1638,7 +1641,7 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb,
1638 const struct nf_conntrack_expect *exp) 1641 const struct nf_conntrack_expect *exp)
1639{ 1642{
1640 struct nf_conn *master = exp->master; 1643 struct nf_conn *master = exp->master;
1641 long timeout = (exp->timeout.expires - jiffies) / HZ; 1644 long timeout = ((long)exp->timeout.expires - (long)jiffies) / HZ;
1642 struct nf_conn_help *help; 1645 struct nf_conn_help *help;
1643 1646
1644 if (timeout < 0) 1647 if (timeout < 0)
@@ -1869,25 +1872,30 @@ ctnetlink_get_expect(struct sock *ctnl, struct sk_buff *skb,
1869 1872
1870 err = -ENOMEM; 1873 err = -ENOMEM;
1871 skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); 1874 skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
1872 if (skb2 == NULL) 1875 if (skb2 == NULL) {
1876 nf_ct_expect_put(exp);
1873 goto out; 1877 goto out;
1878 }
1874 1879
1875 rcu_read_lock(); 1880 rcu_read_lock();
1876 err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid, 1881 err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid,
1877 nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp); 1882 nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp);
1878 rcu_read_unlock(); 1883 rcu_read_unlock();
1884 nf_ct_expect_put(exp);
1879 if (err <= 0) 1885 if (err <= 0)
1880 goto free; 1886 goto free;
1881 1887
1882 nf_ct_expect_put(exp); 1888 err = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT);
1889 if (err < 0)
1890 goto out;
1883 1891
1884 return netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); 1892 return 0;
1885 1893
1886free: 1894free:
1887 kfree_skb(skb2); 1895 kfree_skb(skb2);
1888out: 1896out:
1889 nf_ct_expect_put(exp); 1897 /* this avoids a loop in nfnetlink. */
1890 return err; 1898 return err == -EAGAIN ? -ENOBUFS : err;
1891} 1899}
1892 1900
1893static int 1901static int
diff --git a/net/netfilter/xt_connbytes.c b/net/netfilter/xt_connbytes.c
index 5b138506690e..9ddf1c3bfb39 100644
--- a/net/netfilter/xt_connbytes.c
+++ b/net/netfilter/xt_connbytes.c
@@ -87,10 +87,10 @@ connbytes_mt(const struct sk_buff *skb, struct xt_action_param *par)
87 break; 87 break;
88 } 88 }
89 89
90 if (sinfo->count.to) 90 if (sinfo->count.to >= sinfo->count.from)
91 return what <= sinfo->count.to && what >= sinfo->count.from; 91 return what <= sinfo->count.to && what >= sinfo->count.from;
92 else 92 else /* inverted */
93 return what >= sinfo->count.from; 93 return what < sinfo->count.to || what > sinfo->count.from;
94} 94}
95 95
96static int connbytes_mt_check(const struct xt_mtchk_param *par) 96static int connbytes_mt_check(const struct xt_mtchk_param *par)
diff --git a/net/nfc/nci/core.c b/net/nfc/nci/core.c
index 3925c6578767..ea66034499ce 100644
--- a/net/nfc/nci/core.c
+++ b/net/nfc/nci/core.c
@@ -69,7 +69,7 @@ static int __nci_request(struct nci_dev *ndev,
69 __u32 timeout) 69 __u32 timeout)
70{ 70{
71 int rc = 0; 71 int rc = 0;
72 unsigned long completion_rc; 72 long completion_rc;
73 73
74 ndev->req_status = NCI_REQ_PEND; 74 ndev->req_status = NCI_REQ_PEND;
75 75
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 82a6f34d39d0..d9d4970b9b07 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -1630,8 +1630,7 @@ static int packet_rcv(struct sk_buff *skb, struct net_device *dev,
1630 if (snaplen > res) 1630 if (snaplen > res)
1631 snaplen = res; 1631 snaplen = res;
1632 1632
1633 if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >= 1633 if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf)
1634 (unsigned)sk->sk_rcvbuf)
1635 goto drop_n_acct; 1634 goto drop_n_acct;
1636 1635
1637 if (skb_shared(skb)) { 1636 if (skb_shared(skb)) {
@@ -1762,8 +1761,7 @@ static int tpacket_rcv(struct sk_buff *skb, struct net_device *dev,
1762 if (po->tp_version <= TPACKET_V2) { 1761 if (po->tp_version <= TPACKET_V2) {
1763 if (macoff + snaplen > po->rx_ring.frame_size) { 1762 if (macoff + snaplen > po->rx_ring.frame_size) {
1764 if (po->copy_thresh && 1763 if (po->copy_thresh &&
1765 atomic_read(&sk->sk_rmem_alloc) + skb->truesize 1764 atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) {
1766 < (unsigned)sk->sk_rcvbuf) {
1767 if (skb_shared(skb)) { 1765 if (skb_shared(skb)) {
1768 copy_skb = skb_clone(skb, GFP_ATOMIC); 1766 copy_skb = skb_clone(skb, GFP_ATOMIC);
1769 } else { 1767 } else {
@@ -2450,8 +2448,12 @@ static int packet_do_bind(struct sock *sk, struct net_device *dev, __be16 protoc
2450{ 2448{
2451 struct packet_sock *po = pkt_sk(sk); 2449 struct packet_sock *po = pkt_sk(sk);
2452 2450
2453 if (po->fanout) 2451 if (po->fanout) {
2452 if (dev)
2453 dev_put(dev);
2454
2454 return -EINVAL; 2455 return -EINVAL;
2456 }
2455 2457
2456 lock_sock(sk); 2458 lock_sock(sk);
2457 2459
diff --git a/net/sched/sch_mqprio.c b/net/sched/sch_mqprio.c
index f88256cbacbf..28de43092330 100644
--- a/net/sched/sch_mqprio.c
+++ b/net/sched/sch_mqprio.c
@@ -107,7 +107,7 @@ static int mqprio_init(struct Qdisc *sch, struct nlattr *opt)
107 if (!netif_is_multiqueue(dev)) 107 if (!netif_is_multiqueue(dev))
108 return -EOPNOTSUPP; 108 return -EOPNOTSUPP;
109 109
110 if (nla_len(opt) < sizeof(*qopt)) 110 if (!opt || nla_len(opt) < sizeof(*qopt))
111 return -EINVAL; 111 return -EINVAL;
112 112
113 qopt = nla_data(opt); 113 qopt = nla_data(opt);
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index eb3b9a86c6ed..a4ab207cdc59 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -488,7 +488,7 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr)
488 return -EINVAL; 488 return -EINVAL;
489 489
490 s = sizeof(struct disttable) + n * sizeof(s16); 490 s = sizeof(struct disttable) + n * sizeof(s16);
491 d = kmalloc(s, GFP_KERNEL); 491 d = kmalloc(s, GFP_KERNEL | __GFP_NOWARN);
492 if (!d) 492 if (!d)
493 d = vmalloc(s); 493 d = vmalloc(s);
494 if (!d) 494 if (!d)
@@ -501,9 +501,10 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr)
501 root_lock = qdisc_root_sleeping_lock(sch); 501 root_lock = qdisc_root_sleeping_lock(sch);
502 502
503 spin_lock_bh(root_lock); 503 spin_lock_bh(root_lock);
504 dist_free(q->delay_dist); 504 swap(q->delay_dist, d);
505 q->delay_dist = d;
506 spin_unlock_bh(root_lock); 505 spin_unlock_bh(root_lock);
506
507 dist_free(d);
507 return 0; 508 return 0;
508} 509}
509 510
diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 152b5b3c3fff..acd2edbc073e 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -173,7 +173,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a
173 asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0; 173 asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0;
174 asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay; 174 asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay;
175 asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] = 175 asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] =
176 (unsigned long)sp->autoclose * HZ; 176 min_t(unsigned long, sp->autoclose, sctp_max_autoclose) * HZ;
177 177
178 /* Initializes the timers */ 178 /* Initializes the timers */
179 for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i) 179 for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i)
diff --git a/net/sctp/output.c b/net/sctp/output.c
index 08b3cead6503..817174eb5f41 100644
--- a/net/sctp/output.c
+++ b/net/sctp/output.c
@@ -697,13 +697,7 @@ static void sctp_packet_append_data(struct sctp_packet *packet,
697 /* Keep track of how many bytes are in flight to the receiver. */ 697 /* Keep track of how many bytes are in flight to the receiver. */
698 asoc->outqueue.outstanding_bytes += datasize; 698 asoc->outqueue.outstanding_bytes += datasize;
699 699
700 /* Update our view of the receiver's rwnd. Include sk_buff overhead 700 /* Update our view of the receiver's rwnd. */
701 * while updating peer.rwnd so that it reduces the chances of a
702 * receiver running out of receive buffer space even when receive
703 * window is still open. This can happen when a sender is sending
704 * sending small messages.
705 */
706 datasize += sizeof(struct sk_buff);
707 if (datasize < rwnd) 701 if (datasize < rwnd)
708 rwnd -= datasize; 702 rwnd -= datasize;
709 else 703 else
diff --git a/net/sctp/outqueue.c b/net/sctp/outqueue.c
index 14c2b06028ff..cfeb1d4a1ee6 100644
--- a/net/sctp/outqueue.c
+++ b/net/sctp/outqueue.c
@@ -411,8 +411,7 @@ void sctp_retransmit_mark(struct sctp_outq *q,
411 chunk->transport->flight_size -= 411 chunk->transport->flight_size -=
412 sctp_data_size(chunk); 412 sctp_data_size(chunk);
413 q->outstanding_bytes -= sctp_data_size(chunk); 413 q->outstanding_bytes -= sctp_data_size(chunk);
414 q->asoc->peer.rwnd += (sctp_data_size(chunk) + 414 q->asoc->peer.rwnd += sctp_data_size(chunk);
415 sizeof(struct sk_buff));
416 } 415 }
417 continue; 416 continue;
418 } 417 }
@@ -432,8 +431,7 @@ void sctp_retransmit_mark(struct sctp_outq *q,
432 * (Section 7.2.4)), add the data size of those 431 * (Section 7.2.4)), add the data size of those
433 * chunks to the rwnd. 432 * chunks to the rwnd.
434 */ 433 */
435 q->asoc->peer.rwnd += (sctp_data_size(chunk) + 434 q->asoc->peer.rwnd += sctp_data_size(chunk);
436 sizeof(struct sk_buff));
437 q->outstanding_bytes -= sctp_data_size(chunk); 435 q->outstanding_bytes -= sctp_data_size(chunk);
438 if (chunk->transport) 436 if (chunk->transport)
439 transport->flight_size -= sctp_data_size(chunk); 437 transport->flight_size -= sctp_data_size(chunk);
diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c
index 61b9fca5a173..6f6ad8686833 100644
--- a/net/sctp/protocol.c
+++ b/net/sctp/protocol.c
@@ -1285,6 +1285,9 @@ SCTP_STATIC __init int sctp_init(void)
1285 sctp_max_instreams = SCTP_DEFAULT_INSTREAMS; 1285 sctp_max_instreams = SCTP_DEFAULT_INSTREAMS;
1286 sctp_max_outstreams = SCTP_DEFAULT_OUTSTREAMS; 1286 sctp_max_outstreams = SCTP_DEFAULT_OUTSTREAMS;
1287 1287
1288 /* Initialize maximum autoclose timeout. */
1289 sctp_max_autoclose = INT_MAX / HZ;
1290
1288 /* Initialize handle used for association ids. */ 1291 /* Initialize handle used for association ids. */
1289 idr_init(&sctp_assocs_id); 1292 idr_init(&sctp_assocs_id);
1290 1293
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index 13bf5fcdbff1..54a7cd2fdd7a 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -2200,8 +2200,6 @@ static int sctp_setsockopt_autoclose(struct sock *sk, char __user *optval,
2200 return -EINVAL; 2200 return -EINVAL;
2201 if (copy_from_user(&sp->autoclose, optval, optlen)) 2201 if (copy_from_user(&sp->autoclose, optval, optlen))
2202 return -EFAULT; 2202 return -EFAULT;
2203 /* make sure it won't exceed MAX_SCHEDULE_TIMEOUT */
2204 sp->autoclose = min_t(long, sp->autoclose, MAX_SCHEDULE_TIMEOUT / HZ);
2205 2203
2206 return 0; 2204 return 0;
2207} 2205}
diff --git a/net/sctp/sysctl.c b/net/sctp/sysctl.c
index 6b3952961b85..60ffbd067ff7 100644
--- a/net/sctp/sysctl.c
+++ b/net/sctp/sysctl.c
@@ -53,6 +53,10 @@ static int sack_timer_min = 1;
53static int sack_timer_max = 500; 53static int sack_timer_max = 500;
54static int addr_scope_max = 3; /* check sctp_scope_policy_t in include/net/sctp/constants.h for max entries */ 54static int addr_scope_max = 3; /* check sctp_scope_policy_t in include/net/sctp/constants.h for max entries */
55static int rwnd_scale_max = 16; 55static int rwnd_scale_max = 16;
56static unsigned long max_autoclose_min = 0;
57static unsigned long max_autoclose_max =
58 (MAX_SCHEDULE_TIMEOUT / HZ > UINT_MAX)
59 ? UINT_MAX : MAX_SCHEDULE_TIMEOUT / HZ;
56 60
57extern long sysctl_sctp_mem[3]; 61extern long sysctl_sctp_mem[3];
58extern int sysctl_sctp_rmem[3]; 62extern int sysctl_sctp_rmem[3];
@@ -258,6 +262,15 @@ static ctl_table sctp_table[] = {
258 .extra1 = &one, 262 .extra1 = &one,
259 .extra2 = &rwnd_scale_max, 263 .extra2 = &rwnd_scale_max,
260 }, 264 },
265 {
266 .procname = "max_autoclose",
267 .data = &sctp_max_autoclose,
268 .maxlen = sizeof(unsigned long),
269 .mode = 0644,
270 .proc_handler = &proc_doulongvec_minmax,
271 .extra1 = &max_autoclose_min,
272 .extra2 = &max_autoclose_max,
273 },
261 274
262 { /* sentinel */ } 275 { /* sentinel */ }
263}; 276};
diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c
index d12ffa545811..00a1a2acd587 100644
--- a/net/sunrpc/sched.c
+++ b/net/sunrpc/sched.c
@@ -590,6 +590,27 @@ void rpc_prepare_task(struct rpc_task *task)
590 task->tk_ops->rpc_call_prepare(task, task->tk_calldata); 590 task->tk_ops->rpc_call_prepare(task, task->tk_calldata);
591} 591}
592 592
593static void
594rpc_init_task_statistics(struct rpc_task *task)
595{
596 /* Initialize retry counters */
597 task->tk_garb_retry = 2;
598 task->tk_cred_retry = 2;
599 task->tk_rebind_retry = 2;
600
601 /* starting timestamp */
602 task->tk_start = ktime_get();
603}
604
605static void
606rpc_reset_task_statistics(struct rpc_task *task)
607{
608 task->tk_timeouts = 0;
609 task->tk_flags &= ~(RPC_CALL_MAJORSEEN|RPC_TASK_KILLED|RPC_TASK_SENT);
610
611 rpc_init_task_statistics(task);
612}
613
593/* 614/*
594 * Helper that calls task->tk_ops->rpc_call_done if it exists 615 * Helper that calls task->tk_ops->rpc_call_done if it exists
595 */ 616 */
@@ -602,6 +623,7 @@ void rpc_exit_task(struct rpc_task *task)
602 WARN_ON(RPC_ASSASSINATED(task)); 623 WARN_ON(RPC_ASSASSINATED(task));
603 /* Always release the RPC slot and buffer memory */ 624 /* Always release the RPC slot and buffer memory */
604 xprt_release(task); 625 xprt_release(task);
626 rpc_reset_task_statistics(task);
605 } 627 }
606 } 628 }
607} 629}
@@ -804,11 +826,6 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta
804 task->tk_calldata = task_setup_data->callback_data; 826 task->tk_calldata = task_setup_data->callback_data;
805 INIT_LIST_HEAD(&task->tk_task); 827 INIT_LIST_HEAD(&task->tk_task);
806 828
807 /* Initialize retry counters */
808 task->tk_garb_retry = 2;
809 task->tk_cred_retry = 2;
810 task->tk_rebind_retry = 2;
811
812 task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW; 829 task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW;
813 task->tk_owner = current->tgid; 830 task->tk_owner = current->tgid;
814 831
@@ -818,8 +835,7 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta
818 if (task->tk_ops->rpc_call_prepare != NULL) 835 if (task->tk_ops->rpc_call_prepare != NULL)
819 task->tk_action = rpc_prepare_task; 836 task->tk_action = rpc_prepare_task;
820 837
821 /* starting timestamp */ 838 rpc_init_task_statistics(task);
822 task->tk_start = ktime_get();
823 839
824 dprintk("RPC: new task initialized, procpid %u\n", 840 dprintk("RPC: new task initialized, procpid %u\n",
825 task_pid_nr(current)); 841 task_pid_nr(current));
diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c
index f4385e45a5fc..c64c0ef519b5 100644
--- a/net/sunrpc/xprt.c
+++ b/net/sunrpc/xprt.c
@@ -995,13 +995,11 @@ out_init_req:
995 995
996static void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req) 996static void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req)
997{ 997{
998 if (xprt_dynamic_free_slot(xprt, req))
999 return;
1000
1001 memset(req, 0, sizeof(*req)); /* mark unused */
1002
1003 spin_lock(&xprt->reserve_lock); 998 spin_lock(&xprt->reserve_lock);
1004 list_add(&req->rq_list, &xprt->free); 999 if (!xprt_dynamic_free_slot(xprt, req)) {
1000 memset(req, 0, sizeof(*req)); /* mark unused */
1001 list_add(&req->rq_list, &xprt->free);
1002 }
1005 rpc_wake_up_next(&xprt->backlog); 1003 rpc_wake_up_next(&xprt->backlog);
1006 spin_unlock(&xprt->reserve_lock); 1004 spin_unlock(&xprt->reserve_lock);
1007} 1005}
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 2118d6446630..9049a5caeb25 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -2276,8 +2276,6 @@ static void __xfrm_garbage_collect(struct net *net)
2276{ 2276{
2277 struct dst_entry *head, *next; 2277 struct dst_entry *head, *next;
2278 2278
2279 flow_cache_flush();
2280
2281 spin_lock_bh(&xfrm_policy_sk_bundle_lock); 2279 spin_lock_bh(&xfrm_policy_sk_bundle_lock);
2282 head = xfrm_policy_sk_bundles; 2280 head = xfrm_policy_sk_bundles;
2283 xfrm_policy_sk_bundles = NULL; 2281 xfrm_policy_sk_bundles = NULL;
@@ -2290,6 +2288,18 @@ static void __xfrm_garbage_collect(struct net *net)
2290 } 2288 }
2291} 2289}
2292 2290
2291static void xfrm_garbage_collect(struct net *net)
2292{
2293 flow_cache_flush();
2294 __xfrm_garbage_collect(net);
2295}
2296
2297static void xfrm_garbage_collect_deferred(struct net *net)
2298{
2299 flow_cache_flush_deferred();
2300 __xfrm_garbage_collect(net);
2301}
2302
2293static void xfrm_init_pmtu(struct dst_entry *dst) 2303static void xfrm_init_pmtu(struct dst_entry *dst)
2294{ 2304{
2295 do { 2305 do {
@@ -2422,7 +2432,7 @@ int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo)
2422 if (likely(dst_ops->neigh_lookup == NULL)) 2432 if (likely(dst_ops->neigh_lookup == NULL))
2423 dst_ops->neigh_lookup = xfrm_neigh_lookup; 2433 dst_ops->neigh_lookup = xfrm_neigh_lookup;
2424 if (likely(afinfo->garbage_collect == NULL)) 2434 if (likely(afinfo->garbage_collect == NULL))
2425 afinfo->garbage_collect = __xfrm_garbage_collect; 2435 afinfo->garbage_collect = xfrm_garbage_collect_deferred;
2426 xfrm_policy_afinfo[afinfo->family] = afinfo; 2436 xfrm_policy_afinfo[afinfo->family] = afinfo;
2427 } 2437 }
2428 write_unlock_bh(&xfrm_policy_afinfo_lock); 2438 write_unlock_bh(&xfrm_policy_afinfo_lock);
@@ -2516,7 +2526,7 @@ static int xfrm_dev_event(struct notifier_block *this, unsigned long event, void
2516 2526
2517 switch (event) { 2527 switch (event) {
2518 case NETDEV_DOWN: 2528 case NETDEV_DOWN:
2519 __xfrm_garbage_collect(dev_net(dev)); 2529 xfrm_garbage_collect(dev_net(dev));
2520 } 2530 }
2521 return NOTIFY_DONE; 2531 return NOTIFY_DONE;
2522} 2532}
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index ba573fe7c74d..914833d99b06 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -60,8 +60,8 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h
60 --directory=$(srctree) --directory=$(objtree) \ 60 --directory=$(srctree) --directory=$(objtree) \
61 --output $(obj)/config.pot 61 --output $(obj)/config.pot
62 $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot 62 $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot
63 $(Q)ln -fs Kconfig.x86 arch/um/Kconfig 63 $(Q)(for i in `ls $(srctree)/arch/*/Kconfig \
64 $(Q)(for i in `ls $(srctree)/arch/*/Kconfig`; \ 64 $(srctree)/arch/*/um/Kconfig`; \
65 do \ 65 do \
66 echo " GEN $$i"; \ 66 echo " GEN $$i"; \
67 $(obj)/kxgettext $$i \ 67 $(obj)/kxgettext $$i \
@@ -69,7 +69,6 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h
69 done ) 69 done )
70 $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \ 70 $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \
71 --output $(obj)/linux.pot 71 --output $(obj)/linux.pot
72 $(Q)rm -f $(srctree)/arch/um/Kconfig
73 $(Q)rm -f $(obj)/config.pot 72 $(Q)rm -f $(obj)/config.pot
74 73
75PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig 74PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig
diff --git a/security/integrity/evm/evm_crypto.c b/security/integrity/evm/evm_crypto.c
index 5dd5b140242c..8738deff26fa 100644
--- a/security/integrity/evm/evm_crypto.c
+++ b/security/integrity/evm/evm_crypto.c
@@ -27,20 +27,35 @@ static int evmkey_len = MAX_KEY_SIZE;
27 27
28struct crypto_shash *hmac_tfm; 28struct crypto_shash *hmac_tfm;
29 29
30static DEFINE_MUTEX(mutex);
31
30static struct shash_desc *init_desc(void) 32static struct shash_desc *init_desc(void)
31{ 33{
32 int rc; 34 int rc;
33 struct shash_desc *desc; 35 struct shash_desc *desc;
34 36
35 if (hmac_tfm == NULL) { 37 if (hmac_tfm == NULL) {
38 mutex_lock(&mutex);
39 if (hmac_tfm)
40 goto out;
36 hmac_tfm = crypto_alloc_shash(evm_hmac, 0, CRYPTO_ALG_ASYNC); 41 hmac_tfm = crypto_alloc_shash(evm_hmac, 0, CRYPTO_ALG_ASYNC);
37 if (IS_ERR(hmac_tfm)) { 42 if (IS_ERR(hmac_tfm)) {
38 pr_err("Can not allocate %s (reason: %ld)\n", 43 pr_err("Can not allocate %s (reason: %ld)\n",
39 evm_hmac, PTR_ERR(hmac_tfm)); 44 evm_hmac, PTR_ERR(hmac_tfm));
40 rc = PTR_ERR(hmac_tfm); 45 rc = PTR_ERR(hmac_tfm);
41 hmac_tfm = NULL; 46 hmac_tfm = NULL;
47 mutex_unlock(&mutex);
48 return ERR_PTR(rc);
49 }
50 rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len);
51 if (rc) {
52 crypto_free_shash(hmac_tfm);
53 hmac_tfm = NULL;
54 mutex_unlock(&mutex);
42 return ERR_PTR(rc); 55 return ERR_PTR(rc);
43 } 56 }
57out:
58 mutex_unlock(&mutex);
44 } 59 }
45 60
46 desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(hmac_tfm), 61 desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(hmac_tfm),
@@ -51,11 +66,7 @@ static struct shash_desc *init_desc(void)
51 desc->tfm = hmac_tfm; 66 desc->tfm = hmac_tfm;
52 desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; 67 desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
53 68
54 rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len);
55 if (rc)
56 goto out;
57 rc = crypto_shash_init(desc); 69 rc = crypto_shash_init(desc);
58out:
59 if (rc) { 70 if (rc) {
60 kfree(desc); 71 kfree(desc);
61 return ERR_PTR(rc); 72 return ERR_PTR(rc);
diff --git a/security/selinux/netport.c b/security/selinux/netport.c
index 0b62bd112461..7b9eb1faf68b 100644
--- a/security/selinux/netport.c
+++ b/security/selinux/netport.c
@@ -123,7 +123,9 @@ static void sel_netport_insert(struct sel_netport *port)
123 if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) { 123 if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) {
124 struct sel_netport *tail; 124 struct sel_netport *tail;
125 tail = list_entry( 125 tail = list_entry(
126 rcu_dereference(sel_netport_hash[idx].list.prev), 126 rcu_dereference_protected(
127 sel_netport_hash[idx].list.prev,
128 lockdep_is_held(&sel_netport_lock)),
127 struct sel_netport, list); 129 struct sel_netport, list);
128 list_del_rcu(&tail->list); 130 list_del_rcu(&tail->list);
129 kfree_rcu(tail, rcu); 131 kfree_rcu(tail, rcu);
diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c
index 6e5addeb236b..73516f69ac7c 100644
--- a/sound/atmel/ac97c.c
+++ b/sound/atmel/ac97c.c
@@ -899,6 +899,10 @@ static void atmel_ac97c_reset(struct atmel_ac97c *chip)
899 /* AC97 v2.2 specifications says minimum 1 us. */ 899 /* AC97 v2.2 specifications says minimum 1 us. */
900 udelay(2); 900 udelay(2);
901 gpio_set_value(chip->reset_pin, 1); 901 gpio_set_value(chip->reset_pin, 1);
902 } else {
903 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
904 udelay(2);
905 ac97c_writel(chip, MR, AC97C_MR_ENA);
902 } 906 }
903} 907}
904 908
diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c
index bfdc52370ad0..d3b0a20744f1 100644
--- a/sound/soc/codecs/wm8776.c
+++ b/sound/soc/codecs/wm8776.c
@@ -235,6 +235,7 @@ static int wm8776_hw_params(struct snd_pcm_substream *substream,
235 switch (snd_pcm_format_width(params_format(params))) { 235 switch (snd_pcm_format_width(params_format(params))) {
236 case 16: 236 case 16:
237 iface = 0; 237 iface = 0;
238 break;
238 case 20: 239 case 20:
239 iface = 0x10; 240 iface = 0x10;
240 break; 241 break;
diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c
index 3ad0925d23a9..758e3b36d4cf 100644
--- a/virt/kvm/assigned-dev.c
+++ b/virt/kvm/assigned-dev.c
@@ -17,6 +17,8 @@
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/namei.h>
21#include <linux/fs.h>
20#include "irq.h" 22#include "irq.h"
21 23
22static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head, 24static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
@@ -480,12 +482,76 @@ out:
480 return r; 482 return r;
481} 483}
482 484
485/*
486 * We want to test whether the caller has been granted permissions to
487 * use this device. To be able to configure and control the device,
488 * the user needs access to PCI configuration space and BAR resources.
489 * These are accessed through PCI sysfs. PCI config space is often
490 * passed to the process calling this ioctl via file descriptor, so we
491 * can't rely on access to that file. We can check for permissions
492 * on each of the BAR resource files, which is a pretty clear
493 * indicator that the user has been granted access to the device.
494 */
495static int probe_sysfs_permissions(struct pci_dev *dev)
496{
497#ifdef CONFIG_SYSFS
498 int i;
499 bool bar_found = false;
500
501 for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++) {
502 char *kpath, *syspath;
503 struct path path;
504 struct inode *inode;
505 int r;
506
507 if (!pci_resource_len(dev, i))
508 continue;
509
510 kpath = kobject_get_path(&dev->dev.kobj, GFP_KERNEL);
511 if (!kpath)
512 return -ENOMEM;
513
514 /* Per sysfs-rules, sysfs is always at /sys */
515 syspath = kasprintf(GFP_KERNEL, "/sys%s/resource%d", kpath, i);
516 kfree(kpath);
517 if (!syspath)
518 return -ENOMEM;
519
520 r = kern_path(syspath, LOOKUP_FOLLOW, &path);
521 kfree(syspath);
522 if (r)
523 return r;
524
525 inode = path.dentry->d_inode;
526
527 r = inode_permission(inode, MAY_READ | MAY_WRITE | MAY_ACCESS);
528 path_put(&path);
529 if (r)
530 return r;
531
532 bar_found = true;
533 }
534
535 /* If no resources, probably something special */
536 if (!bar_found)
537 return -EPERM;
538
539 return 0;
540#else
541 return -EINVAL; /* No way to control the device without sysfs */
542#endif
543}
544
483static int kvm_vm_ioctl_assign_device(struct kvm *kvm, 545static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
484 struct kvm_assigned_pci_dev *assigned_dev) 546 struct kvm_assigned_pci_dev *assigned_dev)
485{ 547{
486 int r = 0, idx; 548 int r = 0, idx;
487 struct kvm_assigned_dev_kernel *match; 549 struct kvm_assigned_dev_kernel *match;
488 struct pci_dev *dev; 550 struct pci_dev *dev;
551 u8 header_type;
552
553 if (!(assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU))
554 return -EINVAL;
489 555
490 mutex_lock(&kvm->lock); 556 mutex_lock(&kvm->lock);
491 idx = srcu_read_lock(&kvm->srcu); 557 idx = srcu_read_lock(&kvm->srcu);
@@ -513,6 +579,18 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
513 r = -EINVAL; 579 r = -EINVAL;
514 goto out_free; 580 goto out_free;
515 } 581 }
582
583 /* Don't allow bridges to be assigned */
584 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
585 if ((header_type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL) {
586 r = -EPERM;
587 goto out_put;
588 }
589
590 r = probe_sysfs_permissions(dev);
591 if (r)
592 goto out_put;
593
516 if (pci_enable_device(dev)) { 594 if (pci_enable_device(dev)) {
517 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__); 595 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
518 r = -EBUSY; 596 r = -EBUSY;
@@ -544,16 +622,14 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
544 622
545 list_add(&match->list, &kvm->arch.assigned_dev_head); 623 list_add(&match->list, &kvm->arch.assigned_dev_head);
546 624
547 if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) { 625 if (!kvm->arch.iommu_domain) {
548 if (!kvm->arch.iommu_domain) { 626 r = kvm_iommu_map_guest(kvm);
549 r = kvm_iommu_map_guest(kvm);
550 if (r)
551 goto out_list_del;
552 }
553 r = kvm_assign_device(kvm, match);
554 if (r) 627 if (r)
555 goto out_list_del; 628 goto out_list_del;
556 } 629 }
630 r = kvm_assign_device(kvm, match);
631 if (r)
632 goto out_list_del;
557 633
558out: 634out:
559 srcu_read_unlock(&kvm->srcu, idx); 635 srcu_read_unlock(&kvm->srcu, idx);
@@ -593,8 +669,7 @@ static int kvm_vm_ioctl_deassign_device(struct kvm *kvm,
593 goto out; 669 goto out;
594 } 670 }
595 671
596 if (match->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) 672 kvm_deassign_device(kvm, match);
597 kvm_deassign_device(kvm, match);
598 673
599 kvm_free_assigned_device(kvm, match); 674 kvm_free_assigned_device(kvm, match);
600 675