diff options
-rw-r--r-- | arch/arm/mach-davinci/clock.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-davinci/clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-davinci/psc.c | 32 |
8 files changed, 57 insertions, 14 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index f0baaa15a57e..39bf321d70a2 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -42,7 +42,8 @@ static void __clk_enable(struct clk *clk) | |||
42 | if (clk->parent) | 42 | if (clk->parent) |
43 | __clk_enable(clk->parent); | 43 | __clk_enable(clk->parent); |
44 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) | 44 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
45 | davinci_psc_config(psc_domain(clk), clk->lpsc, 1); | 45 | davinci_psc_config(psc_domain(clk), clk->psc_ctlr, |
46 | clk->lpsc, 1); | ||
46 | } | 47 | } |
47 | 48 | ||
48 | static void __clk_disable(struct clk *clk) | 49 | static void __clk_disable(struct clk *clk) |
@@ -50,7 +51,8 @@ static void __clk_disable(struct clk *clk) | |||
50 | if (WARN_ON(clk->usecount == 0)) | 51 | if (WARN_ON(clk->usecount == 0)) |
51 | return; | 52 | return; |
52 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) | 53 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) |
53 | davinci_psc_config(psc_domain(clk), clk->lpsc, 0); | 54 | davinci_psc_config(psc_domain(clk), clk->psc_ctlr, |
55 | clk->lpsc, 0); | ||
54 | if (clk->parent) | 56 | if (clk->parent) |
55 | __clk_disable(clk->parent); | 57 | __clk_disable(clk->parent); |
56 | } | 58 | } |
@@ -164,11 +166,11 @@ static int __init clk_disable_unused(void) | |||
164 | continue; | 166 | continue; |
165 | 167 | ||
166 | /* ignore if in Disabled or SwRstDisable states */ | 168 | /* ignore if in Disabled or SwRstDisable states */ |
167 | if (!davinci_psc_is_clk_active(ck->lpsc)) | 169 | if (!davinci_psc_is_clk_active(ck->psc_ctlr, ck->lpsc)) |
168 | continue; | 170 | continue; |
169 | 171 | ||
170 | pr_info("Clocks: disable unused %s\n", ck->name); | 172 | pr_info("Clocks: disable unused %s\n", ck->name); |
171 | davinci_psc_config(psc_domain(ck), ck->lpsc, 0); | 173 | davinci_psc_config(psc_domain(ck), ck->psc_ctlr, ck->lpsc, 0); |
172 | } | 174 | } |
173 | spin_unlock_irq(&clockfw_lock); | 175 | spin_unlock_irq(&clockfw_lock); |
174 | 176 | ||
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 584494a32070..27233cb4a2fb 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -67,6 +67,7 @@ struct clk { | |||
67 | u8 usecount; | 67 | u8 usecount; |
68 | u8 flags; | 68 | u8 flags; |
69 | u8 lpsc; | 69 | u8 lpsc; |
70 | u8 psc_ctlr; | ||
70 | struct clk *parent; | 71 | struct clk *parent; |
71 | struct pll_data *pll_data; | 72 | struct pll_data *pll_data; |
72 | u32 div_reg; | 73 | u32 div_reg; |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index e93840a814ed..37f20a7214be 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -545,6 +545,10 @@ static struct davinci_id dm355_ids[] = { | |||
545 | }, | 545 | }, |
546 | }; | 546 | }; |
547 | 547 | ||
548 | static void __iomem *dm355_psc_bases[] = { | ||
549 | IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), | ||
550 | }; | ||
551 | |||
548 | static struct davinci_soc_info davinci_soc_info_dm355 = { | 552 | static struct davinci_soc_info davinci_soc_info_dm355 = { |
549 | .io_desc = dm355_io_desc, | 553 | .io_desc = dm355_io_desc, |
550 | .io_desc_num = ARRAY_SIZE(dm355_io_desc), | 554 | .io_desc_num = ARRAY_SIZE(dm355_io_desc), |
@@ -552,6 +556,8 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { | |||
552 | .ids = dm355_ids, | 556 | .ids = dm355_ids, |
553 | .ids_num = ARRAY_SIZE(dm355_ids), | 557 | .ids_num = ARRAY_SIZE(dm355_ids), |
554 | .cpu_clks = dm355_clks, | 558 | .cpu_clks = dm355_clks, |
559 | .psc_bases = dm355_psc_bases, | ||
560 | .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), | ||
555 | }; | 561 | }; |
556 | 562 | ||
557 | void __init dm355_init(void) | 563 | void __init dm355_init(void) |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 648160c2960d..7b15faba56ed 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -485,6 +485,10 @@ static struct davinci_id dm644x_ids[] = { | |||
485 | }, | 485 | }, |
486 | }; | 486 | }; |
487 | 487 | ||
488 | static void __iomem *dm644x_psc_bases[] = { | ||
489 | IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), | ||
490 | }; | ||
491 | |||
488 | static struct davinci_soc_info davinci_soc_info_dm644x = { | 492 | static struct davinci_soc_info davinci_soc_info_dm644x = { |
489 | .io_desc = dm644x_io_desc, | 493 | .io_desc = dm644x_io_desc, |
490 | .io_desc_num = ARRAY_SIZE(dm644x_io_desc), | 494 | .io_desc_num = ARRAY_SIZE(dm644x_io_desc), |
@@ -492,6 +496,8 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { | |||
492 | .ids = dm644x_ids, | 496 | .ids = dm644x_ids, |
493 | .ids_num = ARRAY_SIZE(dm644x_ids), | 497 | .ids_num = ARRAY_SIZE(dm644x_ids), |
494 | .cpu_clks = dm644x_clks, | 498 | .cpu_clks = dm644x_clks, |
499 | .psc_bases = dm644x_psc_bases, | ||
500 | .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), | ||
495 | }; | 501 | }; |
496 | 502 | ||
497 | void __init dm644x_init(void) | 503 | void __init dm644x_init(void) |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 7cf9705be9ce..3c61543c7cfa 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -465,6 +465,10 @@ static struct davinci_id dm646x_ids[] = { | |||
465 | }, | 465 | }, |
466 | }; | 466 | }; |
467 | 467 | ||
468 | static void __iomem *dm646x_psc_bases[] = { | ||
469 | IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), | ||
470 | }; | ||
471 | |||
468 | static struct davinci_soc_info davinci_soc_info_dm646x = { | 472 | static struct davinci_soc_info davinci_soc_info_dm646x = { |
469 | .io_desc = dm646x_io_desc, | 473 | .io_desc = dm646x_io_desc, |
470 | .io_desc_num = ARRAY_SIZE(dm646x_io_desc), | 474 | .io_desc_num = ARRAY_SIZE(dm646x_io_desc), |
@@ -472,6 +476,8 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { | |||
472 | .ids = dm646x_ids, | 476 | .ids = dm646x_ids, |
473 | .ids_num = ARRAY_SIZE(dm646x_ids), | 477 | .ids_num = ARRAY_SIZE(dm646x_ids), |
474 | .cpu_clks = dm646x_clks, | 478 | .cpu_clks = dm646x_clks, |
479 | .psc_bases = dm646x_psc_bases, | ||
480 | .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), | ||
475 | }; | 481 | }; |
476 | 482 | ||
477 | void __init dm646x_init(void) | 483 | void __init dm646x_init(void) |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 97782a765882..7851d5680c13 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
@@ -34,6 +34,8 @@ struct davinci_soc_info { | |||
34 | struct davinci_id *ids; | 34 | struct davinci_id *ids; |
35 | unsigned long ids_num; | 35 | unsigned long ids_num; |
36 | struct davinci_clk *cpu_clks; | 36 | struct davinci_clk *cpu_clks; |
37 | void __iomem **psc_bases; | ||
38 | unsigned long psc_bases_num; | ||
37 | }; | 39 | }; |
38 | 40 | ||
39 | extern struct davinci_soc_info davinci_soc_info; | 41 | extern struct davinci_soc_info davinci_soc_info; |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 55a90d419fac..ab8a2586d1cc 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -27,6 +27,8 @@ | |||
27 | #ifndef __ASM_ARCH_PSC_H | 27 | #ifndef __ASM_ARCH_PSC_H |
28 | #define __ASM_ARCH_PSC_H | 28 | #define __ASM_ARCH_PSC_H |
29 | 29 | ||
30 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 | ||
31 | |||
30 | /* Power and Sleep Controller (PSC) Domains */ | 32 | /* Power and Sleep Controller (PSC) Domains */ |
31 | #define DAVINCI_GPSC_ARMDOMAIN 0 | 33 | #define DAVINCI_GPSC_ARMDOMAIN 0 |
32 | #define DAVINCI_GPSC_DSPDOMAIN 1 | 34 | #define DAVINCI_GPSC_DSPDOMAIN 1 |
@@ -116,8 +118,8 @@ | |||
116 | #define DM646X_LPSC_TIMER1 35 | 118 | #define DM646X_LPSC_TIMER1 35 |
117 | #define DM646X_LPSC_ARM_INTC 45 | 119 | #define DM646X_LPSC_ARM_INTC 45 |
118 | 120 | ||
119 | extern int davinci_psc_is_clk_active(unsigned int id); | 121 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); |
120 | extern void davinci_psc_config(unsigned int domain, unsigned int id, | 122 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
121 | char enable); | 123 | unsigned int id, char enable); |
122 | 124 | ||
123 | #endif /* __ASM_ARCH_PSC_H */ | 125 | #endif /* __ASM_ARCH_PSC_H */ |
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 84171abf5f7b..a78b657e916e 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -28,8 +28,6 @@ | |||
28 | #include <mach/psc.h> | 28 | #include <mach/psc.h> |
29 | #include <mach/mux.h> | 29 | #include <mach/mux.h> |
30 | 30 | ||
31 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 | ||
32 | |||
33 | /* PSC register offsets */ | 31 | /* PSC register offsets */ |
34 | #define EPCPR 0x070 | 32 | #define EPCPR 0x070 |
35 | #define PTCMD 0x120 | 33 | #define PTCMD 0x120 |
@@ -42,22 +40,42 @@ | |||
42 | #define MDSTAT_STATE_MASK 0x1f | 40 | #define MDSTAT_STATE_MASK 0x1f |
43 | 41 | ||
44 | /* Return nonzero iff the domain's clock is active */ | 42 | /* Return nonzero iff the domain's clock is active */ |
45 | int __init davinci_psc_is_clk_active(unsigned int id) | 43 | int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) |
46 | { | 44 | { |
47 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); | 45 | void __iomem *psc_base; |
48 | u32 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); | 46 | u32 mdstat; |
47 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
48 | |||
49 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { | ||
50 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", | ||
51 | (int)soc_info->psc_bases, ctlr); | ||
52 | return 0; | ||
53 | } | ||
54 | |||
55 | psc_base = soc_info->psc_bases[ctlr]; | ||
56 | mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); | ||
49 | 57 | ||
50 | /* if clocked, state can be "Enable" or "SyncReset" */ | 58 | /* if clocked, state can be "Enable" or "SyncReset" */ |
51 | return mdstat & BIT(12); | 59 | return mdstat & BIT(12); |
52 | } | 60 | } |
53 | 61 | ||
54 | /* Enable or disable a PSC domain */ | 62 | /* Enable or disable a PSC domain */ |
55 | void davinci_psc_config(unsigned int domain, unsigned int id, char enable) | 63 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
64 | unsigned int id, char enable) | ||
56 | { | 65 | { |
57 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; | 66 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; |
58 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); | 67 | void __iomem *psc_base; |
68 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
59 | u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ | 69 | u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ |
60 | 70 | ||
71 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { | ||
72 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", | ||
73 | (int)soc_info->psc_bases, ctlr); | ||
74 | return; | ||
75 | } | ||
76 | |||
77 | psc_base = soc_info->psc_bases[ctlr]; | ||
78 | |||
61 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); | 79 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); |
62 | mdctl &= ~MDSTAT_STATE_MASK; | 80 | mdctl &= ~MDSTAT_STATE_MASK; |
63 | mdctl |= next_state; | 81 | mdctl |= next_state; |