aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/mach-realview/platsmp.c43
-rw-r--r--arch/arm/mm/proc-v6.S14
-rw-r--r--include/asm-arm/arch-realview/scu.h11
-rw-r--r--include/asm-arm/hardware/arm_scu.h15
4 files changed, 43 insertions, 40 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index de2b7159557d..2ff1acaf2be7 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -15,11 +15,13 @@
15#include <linux/smp.h> 15#include <linux/smp.h>
16 16
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include <asm/hardware/arm_scu.h>
19#include <asm/hardware.h> 18#include <asm/hardware.h>
20#include <asm/io.h> 19#include <asm/io.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22 21
22#include <asm/arch/board-eb.h>
23#include <asm/arch/scu.h>
24
23extern void realview_secondary_startup(void); 25extern void realview_secondary_startup(void);
24 26
25/* 27/*
@@ -31,9 +33,13 @@ volatile int __cpuinitdata pen_release = -1;
31static unsigned int __init get_core_count(void) 33static unsigned int __init get_core_count(void)
32{ 34{
33 unsigned int ncores; 35 unsigned int ncores;
36 void __iomem *scu_base = 0;
37
38 if (machine_is_realview_eb() && core_tile_eb11mp())
39 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
34 40
35 if (machine_is_realview_eb() && core_tile_eb11mp()) { 41 if (scu_base) {
36 ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG); 42 ncores = __raw_readl(scu_base + SCU_CONFIG);
37 ncores = (ncores & 0x03) + 1; 43 ncores = (ncores & 0x03) + 1;
38 } else 44 } else
39 ncores = 1; 45 ncores = 1;
@@ -41,6 +47,24 @@ static unsigned int __init get_core_count(void)
41 return ncores; 47 return ncores;
42} 48}
43 49
50/*
51 * Setup the SCU
52 */
53static void scu_enable(void)
54{
55 u32 scu_ctrl;
56 void __iomem *scu_base;
57
58 if (machine_is_realview_eb() && core_tile_eb11mp())
59 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
60 else
61 BUG();
62
63 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
64 scu_ctrl |= 1;
65 __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
66}
67
44static DEFINE_SPINLOCK(boot_lock); 68static DEFINE_SPINLOCK(boot_lock);
45 69
46void __cpuinit platform_secondary_init(unsigned int cpu) 70void __cpuinit platform_secondary_init(unsigned int cpu)
@@ -210,11 +234,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
210 cpu_set(i, cpu_present_map); 234 cpu_set(i, cpu_present_map);
211 235
212 /* 236 /*
213 * Do we need any more CPUs? If so, then let them know where 237 * Initialise the SCU if there are more than one CPU and let
214 * to start. Note that, on modern versions of MILO, the "poke" 238 * them know where to start. Note that, on modern versions of
215 * doesn't actually do anything until each individual core is 239 * MILO, the "poke" doesn't actually do anything until each
216 * sent a soft interrupt to get it out of WFI 240 * individual core is sent a soft interrupt to get it out of
241 * WFI
217 */ 242 */
218 if (max_cpus > 1) 243 if (max_cpus > 1) {
244 scu_enable();
219 poke_milo(); 245 poke_milo();
246 }
220} 247}
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 2162a692d99a..bf760ea2f789 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -17,10 +17,6 @@
17#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19 19
20#ifdef CONFIG_SMP
21#include <asm/hardware/arm_scu.h>
22#endif
23
24#include "proc-macros.S" 20#include "proc-macros.S"
25 21
26#define D_CACHE_LINE_SIZE 32 22#define D_CACHE_LINE_SIZE 32
@@ -187,20 +183,10 @@ cpu_v6_name:
187 */ 183 */
188__v6_setup: 184__v6_setup:
189#ifdef CONFIG_SMP 185#ifdef CONFIG_SMP
190 /* Set up the SCU on core 0 only */
191 mrc p15, 0, r0, c0, c0, 5 @ CPU core number
192 ands r0, r0, #15
193 ldreq r0, =SCU_BASE
194 ldreq r5, [r0, #SCU_CTRL]
195 orreq r5, r5, #1
196 streq r5, [r0, #SCU_CTRL]
197
198#ifndef CONFIG_CPU_DCACHE_DISABLE
199 mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode 186 mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode
200 orr r0, r0, #0x20 187 orr r0, r0, #0x20
201 mcr p15, 0, r0, c1, c0, 1 188 mcr p15, 0, r0, c1, c0, 1
202#endif 189#endif
203#endif
204 190
205 mov r0, #0 191 mov r0, #0
206 mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache 192 mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache
diff --git a/include/asm-arm/arch-realview/scu.h b/include/asm-arm/arch-realview/scu.h
index 08b3db883c36..d55802d645af 100644
--- a/include/asm-arm/arch-realview/scu.h
+++ b/include/asm-arm/arch-realview/scu.h
@@ -1,8 +1,13 @@
1#ifndef __ASMARM_ARCH_SCU_H 1#ifndef __ASMARM_ARCH_SCU_H
2#define __ASMARM_ARCH_SCU_H 2#define __ASMARM_ARCH_SCU_H
3 3
4#include <asm/arch/board-eb.h> 4/*
5 5 * SCU registers
6#define SCU_BASE REALVIEW_EB11MP_SCU_BASE 6 */
7#define SCU_CTRL 0x00
8#define SCU_CONFIG 0x04
9#define SCU_CPU_STATUS 0x08
10#define SCU_INVALIDATE 0x0c
11#define SCU_FPGA_REVISION 0x10
7 12
8#endif 13#endif
diff --git a/include/asm-arm/hardware/arm_scu.h b/include/asm-arm/hardware/arm_scu.h
deleted file mode 100644
index 7d28eb5a1758..000000000000
--- a/include/asm-arm/hardware/arm_scu.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef ASMARM_HARDWARE_ARM_SCU_H
2#define ASMARM_HARDWARE_ARM_SCU_H
3
4#include <asm/arch/scu.h>
5
6/*
7 * SCU registers
8 */
9#define SCU_CTRL 0x00
10#define SCU_CONFIG 0x04
11#define SCU_CPU_STATUS 0x08
12#define SCU_INVALIDATE 0x0c
13#define SCU_FPGA_REVISION 0x10
14
15#endif