diff options
-rw-r--r-- | drivers/net/tulip/Kconfig | 12 | ||||
-rw-r--r-- | drivers/net/tulip/de2104x.c | 13 |
2 files changed, 24 insertions, 1 deletions
diff --git a/drivers/net/tulip/Kconfig b/drivers/net/tulip/Kconfig index d913405bc393..1cc8cf4425d1 100644 --- a/drivers/net/tulip/Kconfig +++ b/drivers/net/tulip/Kconfig | |||
@@ -27,6 +27,18 @@ config DE2104X | |||
27 | To compile this driver as a module, choose M here. The module will | 27 | To compile this driver as a module, choose M here. The module will |
28 | be called de2104x. | 28 | be called de2104x. |
29 | 29 | ||
30 | config DE2104X_DSL | ||
31 | int "Descriptor Skip Length in 32 bit longwords" | ||
32 | depends on DE2104X | ||
33 | range 0 31 | ||
34 | default 0 | ||
35 | help | ||
36 | Setting this value allows to align ring buffer descriptors into their | ||
37 | own cache lines. Value of 4 corresponds to the typical 32 byte line | ||
38 | (the descriptor is 16 bytes). This is necessary on systems that lack | ||
39 | cache coherence, an example is PowerMac 5500. Otherwise 0 is safe. | ||
40 | Default is 0, and range is 0 to 31. | ||
41 | |||
30 | config TULIP | 42 | config TULIP |
31 | tristate "DECchip Tulip (dc2114x) PCI support" | 43 | tristate "DECchip Tulip (dc2114x) PCI support" |
32 | depends on PCI | 44 | depends on PCI |
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index d4c5ecc51f77..e7609a05032d 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -82,6 +82,13 @@ MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copi | |||
82 | NETIF_MSG_RX_ERR | \ | 82 | NETIF_MSG_RX_ERR | \ |
83 | NETIF_MSG_TX_ERR) | 83 | NETIF_MSG_TX_ERR) |
84 | 84 | ||
85 | /* Descriptor skip length in 32 bit longwords. */ | ||
86 | #ifndef CONFIG_DE2104X_DSL | ||
87 | #define DSL 0 | ||
88 | #else | ||
89 | #define DSL CONFIG_DE2104X_DSL | ||
90 | #endif | ||
91 | |||
85 | #define DE_RX_RING_SIZE 64 | 92 | #define DE_RX_RING_SIZE 64 |
86 | #define DE_TX_RING_SIZE 64 | 93 | #define DE_TX_RING_SIZE 64 |
87 | #define DE_RING_BYTES \ | 94 | #define DE_RING_BYTES \ |
@@ -153,6 +160,7 @@ enum { | |||
153 | CmdReset = (1 << 0), | 160 | CmdReset = (1 << 0), |
154 | CacheAlign16 = 0x00008000, | 161 | CacheAlign16 = 0x00008000, |
155 | BurstLen4 = 0x00000400, | 162 | BurstLen4 = 0x00000400, |
163 | DescSkipLen = (DSL << 2), | ||
156 | 164 | ||
157 | /* Rx/TxPoll bits */ | 165 | /* Rx/TxPoll bits */ |
158 | NormalTxPoll = (1 << 0), | 166 | NormalTxPoll = (1 << 0), |
@@ -246,7 +254,7 @@ static const u32 de_intr_mask = | |||
246 | * Set the programmable burst length to 4 longwords for all: | 254 | * Set the programmable burst length to 4 longwords for all: |
247 | * DMA errors result without these values. Cache align 16 long. | 255 | * DMA errors result without these values. Cache align 16 long. |
248 | */ | 256 | */ |
249 | static const u32 de_bus_mode = CacheAlign16 | BurstLen4; | 257 | static const u32 de_bus_mode = CacheAlign16 | BurstLen4 | DescSkipLen; |
250 | 258 | ||
251 | struct de_srom_media_block { | 259 | struct de_srom_media_block { |
252 | u8 opts; | 260 | u8 opts; |
@@ -266,6 +274,9 @@ struct de_desc { | |||
266 | __le32 opts2; | 274 | __le32 opts2; |
267 | __le32 addr1; | 275 | __le32 addr1; |
268 | __le32 addr2; | 276 | __le32 addr2; |
277 | #if DSL | ||
278 | __le32 skip[DSL]; | ||
279 | #endif | ||
269 | }; | 280 | }; |
270 | 281 | ||
271 | struct media_info { | 282 | struct media_info { |