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-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h52
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h9
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h100
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h84
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s5p.h (renamed from arch/arm/plat-s5p/include/plat/map-s5p.h)6
5 files changed, 134 insertions, 117 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 425552d84b60..4cf495f813a7 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -14,9 +14,53 @@
14#define __ASM_ARCH_MAP_H 14#define __ASM_ARCH_MAP_H
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map.h>
18 17
19#define S3C2410_ADDR(x) S3C_ADDR(x) 18/*
19 * S3C2410 UART offset is 0x4000 but the other SoCs are 0x400.
20 * So need to define it, and here is to avoid redefinition warning.
21 */
22#define S3C_UART_OFFSET (0x4000)
23
24#include <plat/map-s3c.h>
25
26/*
27 * interrupt controller is the first thing we put in, to make
28 * the assembly code for the irq detection easier
29 */
30#define S3C2410_PA_IRQ (0x4A000000)
31#define S3C24XX_SZ_IRQ SZ_1M
32
33/* memory controller registers */
34#define S3C2410_PA_MEMCTRL (0x48000000)
35#define S3C24XX_SZ_MEMCTRL SZ_1M
36
37/* UARTs */
38#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
39
40/* Timers */
41#define S3C2410_PA_TIMER (0x51000000)
42#define S3C24XX_SZ_TIMER SZ_1M
43
44/* Clock and Power management */
45#define S3C24XX_SZ_CLKPWR SZ_1M
46
47/* USB Device port */
48#define S3C2410_PA_USBDEV (0x52000000)
49#define S3C24XX_SZ_USBDEV SZ_1M
50
51/* Watchdog */
52#define S3C2410_PA_WATCHDOG (0x53000000)
53#define S3C24XX_SZ_WATCHDOG SZ_1M
54
55/* Standard size definitions for peripheral blocks. */
56
57#define S3C24XX_SZ_UART SZ_1M
58#define S3C24XX_SZ_IIS SZ_1M
59#define S3C24XX_SZ_ADC SZ_1M
60#define S3C24XX_SZ_SPI SZ_1M
61#define S3C24XX_SZ_SDI SZ_1M
62#define S3C24XX_SZ_NAND SZ_1M
63#define S3C24XX_SZ_GPIO SZ_1M
20 64
21/* USB host controller */ 65/* USB host controller */
22#define S3C2410_PA_USBHOST (0x49000000) 66#define S3C2410_PA_USBHOST (0x49000000)
@@ -75,10 +119,8 @@
75 119
76/* S3C2412 memory and IO controls */ 120/* S3C2412 memory and IO controls */
77#define S3C2412_PA_SSMC (0x4F000000) 121#define S3C2412_PA_SSMC (0x4F000000)
78#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
79 122
80#define S3C2412_PA_EBI (0x48800000) 123#define S3C2412_PA_EBI (0x48800000)
81#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
82 124
83/* physical addresses of all the chip-select areas */ 125/* physical addresses of all the chip-select areas */
84 126
@@ -100,12 +142,10 @@
100#define S3C24XX_PA_DMA S3C2410_PA_DMA 142#define S3C24XX_PA_DMA S3C2410_PA_DMA
101#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR 143#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
102#define S3C24XX_PA_LCD S3C2410_PA_LCD 144#define S3C24XX_PA_LCD S3C2410_PA_LCD
103#define S3C24XX_PA_UART S3C2410_PA_UART
104#define S3C24XX_PA_TIMER S3C2410_PA_TIMER 145#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
105#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV 146#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
106#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG 147#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
107#define S3C24XX_PA_IIS S3C2410_PA_IIS 148#define S3C24XX_PA_IIS S3C2410_PA_IIS
108#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
109#define S3C24XX_PA_RTC S3C2410_PA_RTC 149#define S3C24XX_PA_RTC S3C2410_PA_RTC
110#define S3C24XX_PA_ADC S3C2410_PA_ADC 150#define S3C24XX_PA_ADC S3C2410_PA_ADC
111#define S3C24XX_PA_SPI S3C2410_PA_SPI 151#define S3C24XX_PA_SPI S3C2410_PA_SPI
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index a1f13f02c841..23a1d71e4d53 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -16,6 +16,7 @@
16#define __ASM_ARCH_MAP_H __FILE__ 16#define __ASM_ARCH_MAP_H __FILE__
17 17
18#include <plat/map-base.h> 18#include <plat/map-base.h>
19#include <plat/map-s3c.h>
19 20
20/* 21/*
21 * Post-mux Chip Select Regions Xm0CSn_ 22 * Post-mux Chip Select Regions Xm0CSn_
@@ -83,7 +84,6 @@
83#define S3C64XX_PA_IIC1 (0x7F00F000) 84#define S3C64XX_PA_IIC1 (0x7F00F000)
84 85
85#define S3C64XX_PA_GPIO (0x7F008000) 86#define S3C64XX_PA_GPIO (0x7F008000)
86#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
87#define S3C64XX_SZ_GPIO SZ_4K 87#define S3C64XX_SZ_GPIO SZ_4K
88 88
89#define S3C64XX_PA_SDRAM (0x50000000) 89#define S3C64XX_PA_SDRAM (0x50000000)
@@ -94,16 +94,10 @@
94#define S3C64XX_PA_VIC1 (0x71300000) 94#define S3C64XX_PA_VIC1 (0x71300000)
95 95
96#define S3C64XX_PA_MODEM (0x74108000) 96#define S3C64XX_PA_MODEM (0x74108000)
97#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
98 97
99#define S3C64XX_PA_USBHOST (0x74300000) 98#define S3C64XX_PA_USBHOST (0x74300000)
100 99
101#define S3C64XX_PA_USB_HSPHY (0x7C100000) 100#define S3C64XX_PA_USB_HSPHY (0x7C100000)
102#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
103
104/* place VICs close together */
105#define VA_VIC0 (S3C_VA_IRQ + 0x00)
106#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
107 101
108/* compatibiltiy defines. */ 102/* compatibiltiy defines. */
109#define S3C_PA_TIMER S3C64XX_PA_TIMER 103#define S3C_PA_TIMER S3C64XX_PA_TIMER
@@ -119,7 +113,6 @@
119#define S3C_PA_FB S3C64XX_PA_FB 113#define S3C_PA_FB S3C64XX_PA_FB
120#define S3C_PA_USBHOST S3C64XX_PA_USBHOST 114#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
121#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
122#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
123#define S3C_PA_RTC S3C64XX_PA_RTC 116#define S3C_PA_RTC S3C64XX_PA_RTC
124#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
125 118
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
deleted file mode 100644
index bd534d32b993..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/map.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/map.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S3C24XX_MAP_H
14#define __ASM_PLAT_S3C24XX_MAP_H
15
16/* interrupt controller is the first thing we put in, to make
17 * the assembly code for the irq detection easier
18 */
19#define S3C24XX_VA_IRQ S3C_VA_IRQ
20#define S3C2410_PA_IRQ (0x4A000000)
21#define S3C24XX_SZ_IRQ SZ_1M
22
23/* memory controller registers */
24#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
25#define S3C2410_PA_MEMCTRL (0x48000000)
26#define S3C24XX_SZ_MEMCTRL SZ_1M
27
28/* UARTs */
29#define S3C24XX_VA_UART S3C_VA_UART
30#define S3C2410_PA_UART (0x50000000)
31#define S3C24XX_SZ_UART SZ_1M
32#define S3C_UART_OFFSET (0x4000)
33
34#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
35
36/* Timers */
37#define S3C24XX_VA_TIMER S3C_VA_TIMER
38#define S3C2410_PA_TIMER (0x51000000)
39#define S3C24XX_SZ_TIMER SZ_1M
40
41/* Clock and Power management */
42#define S3C24XX_VA_CLKPWR S3C_VA_SYS
43#define S3C24XX_SZ_CLKPWR SZ_1M
44
45/* USB Device port */
46#define S3C2410_PA_USBDEV (0x52000000)
47#define S3C24XX_SZ_USBDEV SZ_1M
48
49/* Watchdog */
50#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
51#define S3C2410_PA_WATCHDOG (0x53000000)
52#define S3C24XX_SZ_WATCHDOG SZ_1M
53
54/* Standard size definitions for peripheral blocks. */
55
56#define S3C24XX_SZ_IIS SZ_1M
57#define S3C24XX_SZ_ADC SZ_1M
58#define S3C24XX_SZ_SPI SZ_1M
59#define S3C24XX_SZ_SDI SZ_1M
60#define S3C24XX_SZ_NAND SZ_1M
61
62/* GPIO ports */
63
64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 mapping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system.
70*/
71
72#define S3C2410_PA_GPIO (0x56000000)
73#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
74#define S3C24XX_SZ_GPIO SZ_1M
75
76
77/* ISA style IO, for each machine to sort out mappings for, if it
78 * implements it. We reserve two 16M regions for ISA.
79 */
80
81#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
82#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
83
84/* deal with the registers that move under the 2412/2413 */
85
86#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
87#ifndef __ASSEMBLY__
88extern void __iomem *s3c24xx_va_gpio2;
89#endif
90#ifdef CONFIG_CPU_S3C2412_ONLY
91#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
92#else
93#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
94#endif
95#else
96#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
97#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
98#endif
99
100#endif /* __ASM_PLAT_S3C24XX_MAP_H */
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
new file mode 100644
index 000000000000..7d048759b772
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -0,0 +1,84 @@
1/* linux/arch/arm/plat-samsung/include/plat/map-s3c.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S3C_H
14#define __ASM_PLAT_MAP_S3C_H __FILE__
15
16#define S3C24XX_VA_IRQ S3C_VA_IRQ
17#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
18#define S3C24XX_VA_UART S3C_VA_UART
19
20#define S3C24XX_VA_TIMER S3C_VA_TIMER
21#define S3C24XX_VA_CLKPWR S3C_VA_SYS
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
26
27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART
29
30#ifndef S3C_UART_OFFSET
31#define S3C_UART_OFFSET (0x400)
32#endif
33
34/*
35 * GPIO ports
36 *
37 * the calculation for the VA of this must ensure that
38 * it is the same distance apart from the UART in the
39 * phsyical address space, as the initial mapping for the IO
40 * is done as a 1:1 mapping. This puts it (currently) at
41 * 0xFA800000, which is not in the way of any current mapping
42 * by the base system.
43*/
44
45#define S3C2410_PA_GPIO (0x56000000)
46#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
47
48#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
49#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
50
51#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
52#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
53
54#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
55
56/*
57 * ISA style IO, for each machine to sort out mappings for,
58 * if it implements it. We reserve two 16M regions for ISA.
59 */
60
61#define S3C2410_ADDR(x) S3C_ADDR(x)
62
63#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
64#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
65
66/* deal with the registers that move under the 2412/2413 */
67
68#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
69#ifndef __ASSEMBLY__
70extern void __iomem *s3c24xx_va_gpio2;
71#endif
72#ifdef CONFIG_CPU_S3C2412_ONLY
73#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
74#else
75#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
76#endif
77#else
78#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
79#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
80#endif
81
82#include <plat/map-s5p.h>
83
84#endif /* __ASM_PLAT_MAP_S3C_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index 36d3551173b2..c2d7bdae5891 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h 1/* linux/arch/arm/plat-samsung/include/plat/map-s5p.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
@@ -40,8 +40,6 @@
40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000) 40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000) 41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
42 42
43#define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000)
44
45#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 43#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
46#define VA_VIC0 VA_VIC(0) 44#define VA_VIC0 VA_VIC(0)
47#define VA_VIC1 VA_VIC(1) 45#define VA_VIC1 VA_VIC(1)
@@ -58,4 +56,6 @@
58#define S3C_UART_OFFSET (0x400) 56#define S3C_UART_OFFSET (0x400)
59#endif 57#endif
60 58
59#include <plat/map-s3c.h>
60
61#endif /* __ASM_PLAT_MAP_S5P_H */ 61#endif /* __ASM_PLAT_MAP_S5P_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-31 15:38:24 -0400