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-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index c9b0a4d53dc1..282a7919821b 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -147,12 +147,13 @@ void __init generate_cplb_tables_all(void)
147 /* Normal RAM, including MTD FS. */ 147 /* Normal RAM, including MTD FS. */
148 icplb_bounds[i_i].eaddr = uncached_end; 148 icplb_bounds[i_i].eaddr = uncached_end;
149 icplb_bounds[i_i++].data = SDRAM_IGENERIC; 149 icplb_bounds[i_i++].data = SDRAM_IGENERIC;
150 /* DMA uncached region. */
151 if (DMA_UNCACHED_REGION) {
152 icplb_bounds[i_i].eaddr = _ramend;
153 icplb_bounds[i_i++].data = 0;
154 }
155 if (_ramend != physical_mem_end) { 150 if (_ramend != physical_mem_end) {
151 /* DMA uncached region. */
152 if (DMA_UNCACHED_REGION) {
153 /* Normally this hole is caught by the async below. */
154 icplb_bounds[i_i].eaddr = _ramend;
155 icplb_bounds[i_i++].data = 0;
156 }
156 /* Reserved memory. */ 157 /* Reserved memory. */
157 icplb_bounds[i_i].eaddr = physical_mem_end; 158 icplb_bounds[i_i].eaddr = physical_mem_end;
158 icplb_bounds[i_i++].data = (reserved_mem_icache_on ? 159 icplb_bounds[i_i++].data = (reserved_mem_icache_on ?