diff options
-rw-r--r-- | arch/mips/Kconfig | 8 | ||||
-rw-r--r-- | arch/mips/bcm47xx/Kconfig | 18 | ||||
-rw-r--r-- | arch/mips/bcm47xx/Makefile | 3 | ||||
-rw-r--r-- | arch/mips/bcm47xx/gpio.c | 6 | ||||
-rw-r--r-- | arch/mips/bcm47xx/nvram.c | 4 | ||||
-rw-r--r-- | arch/mips/bcm47xx/serial.c | 4 | ||||
-rw-r--r-- | arch/mips/bcm47xx/setup.c | 8 | ||||
-rw-r--r-- | arch/mips/bcm47xx/time.c | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm47xx/gpio.h | 12 | ||||
-rw-r--r-- | arch/mips/pci/pci-bcm47xx.c | 6 | ||||
-rw-r--r-- | drivers/watchdog/bcm47xx_wdt.c | 4 |
12 files changed, 71 insertions, 8 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 177cdaf83564..0dbb4edc2dd1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -91,15 +91,8 @@ config BCM47XX | |||
91 | select DMA_NONCOHERENT | 91 | select DMA_NONCOHERENT |
92 | select HW_HAS_PCI | 92 | select HW_HAS_PCI |
93 | select IRQ_CPU | 93 | select IRQ_CPU |
94 | select SYS_HAS_CPU_MIPS32_R1 | ||
95 | select SYS_SUPPORTS_32BIT_KERNEL | 94 | select SYS_SUPPORTS_32BIT_KERNEL |
96 | select SYS_SUPPORTS_LITTLE_ENDIAN | 95 | select SYS_SUPPORTS_LITTLE_ENDIAN |
97 | select SSB | ||
98 | select SSB_DRIVER_MIPS | ||
99 | select SSB_DRIVER_EXTIF | ||
100 | select SSB_EMBEDDED | ||
101 | select SSB_B43_PCI_BRIDGE if PCI | ||
102 | select SSB_PCICORE_HOSTMODE if PCI | ||
103 | select GENERIC_GPIO | 96 | select GENERIC_GPIO |
104 | select SYS_HAS_EARLY_PRINTK | 97 | select SYS_HAS_EARLY_PRINTK |
105 | select CFE | 98 | select CFE |
@@ -788,6 +781,7 @@ endchoice | |||
788 | 781 | ||
789 | source "arch/mips/alchemy/Kconfig" | 782 | source "arch/mips/alchemy/Kconfig" |
790 | source "arch/mips/ath79/Kconfig" | 783 | source "arch/mips/ath79/Kconfig" |
784 | source "arch/mips/bcm47xx/Kconfig" | ||
791 | source "arch/mips/bcm63xx/Kconfig" | 785 | source "arch/mips/bcm63xx/Kconfig" |
792 | source "arch/mips/jazz/Kconfig" | 786 | source "arch/mips/jazz/Kconfig" |
793 | source "arch/mips/jz4740/Kconfig" | 787 | source "arch/mips/jz4740/Kconfig" |
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig new file mode 100644 index 000000000000..0346f92d12a2 --- /dev/null +++ b/arch/mips/bcm47xx/Kconfig | |||
@@ -0,0 +1,18 @@ | |||
1 | if BCM47XX | ||
2 | |||
3 | config BCM47XX_SSB | ||
4 | bool "SSB Support for Broadcom BCM47XX" | ||
5 | select SYS_HAS_CPU_MIPS32_R1 | ||
6 | select SSB | ||
7 | select SSB_DRIVER_MIPS | ||
8 | select SSB_DRIVER_EXTIF | ||
9 | select SSB_EMBEDDED | ||
10 | select SSB_B43_PCI_BRIDGE if PCI | ||
11 | select SSB_PCICORE_HOSTMODE if PCI | ||
12 | default y | ||
13 | help | ||
14 | Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. | ||
15 | |||
16 | This will generate an image with support for SSB and MIPS32 R1 instruction set. | ||
17 | |||
18 | endif | ||
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile index 7465e8a72d9a..4add17349ff9 100644 --- a/arch/mips/bcm47xx/Makefile +++ b/arch/mips/bcm47xx/Makefile | |||
@@ -3,4 +3,5 @@ | |||
3 | # under Linux. | 3 | # under Linux. |
4 | # | 4 | # |
5 | 5 | ||
6 | obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o | 6 | obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o |
7 | obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o | ||
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c index 99e1c50caf6b..2b804c36750b 100644 --- a/arch/mips/bcm47xx/gpio.c +++ b/arch/mips/bcm47xx/gpio.c | |||
@@ -21,6 +21,7 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); | |||
21 | int gpio_request(unsigned gpio, const char *tag) | 21 | int gpio_request(unsigned gpio, const char *tag) |
22 | { | 22 | { |
23 | switch (bcm47xx_bus_type) { | 23 | switch (bcm47xx_bus_type) { |
24 | #ifdef CONFIG_BCM47XX_SSB | ||
24 | case BCM47XX_BUS_TYPE_SSB: | 25 | case BCM47XX_BUS_TYPE_SSB: |
25 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && | 26 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && |
26 | ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) | 27 | ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) |
@@ -34,6 +35,7 @@ int gpio_request(unsigned gpio, const char *tag) | |||
34 | return -EBUSY; | 35 | return -EBUSY; |
35 | 36 | ||
36 | return 0; | 37 | return 0; |
38 | #endif | ||
37 | } | 39 | } |
38 | return -EINVAL; | 40 | return -EINVAL; |
39 | } | 41 | } |
@@ -42,6 +44,7 @@ EXPORT_SYMBOL(gpio_request); | |||
42 | void gpio_free(unsigned gpio) | 44 | void gpio_free(unsigned gpio) |
43 | { | 45 | { |
44 | switch (bcm47xx_bus_type) { | 46 | switch (bcm47xx_bus_type) { |
47 | #ifdef CONFIG_BCM47XX_SSB | ||
45 | case BCM47XX_BUS_TYPE_SSB: | 48 | case BCM47XX_BUS_TYPE_SSB: |
46 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && | 49 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && |
47 | ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) | 50 | ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) |
@@ -53,6 +56,7 @@ void gpio_free(unsigned gpio) | |||
53 | 56 | ||
54 | clear_bit(gpio, gpio_in_use); | 57 | clear_bit(gpio, gpio_in_use); |
55 | return; | 58 | return; |
59 | #endif | ||
56 | } | 60 | } |
57 | } | 61 | } |
58 | EXPORT_SYMBOL(gpio_free); | 62 | EXPORT_SYMBOL(gpio_free); |
@@ -60,6 +64,7 @@ EXPORT_SYMBOL(gpio_free); | |||
60 | int gpio_to_irq(unsigned gpio) | 64 | int gpio_to_irq(unsigned gpio) |
61 | { | 65 | { |
62 | switch (bcm47xx_bus_type) { | 66 | switch (bcm47xx_bus_type) { |
67 | #ifdef CONFIG_BCM47XX_SSB | ||
63 | case BCM47XX_BUS_TYPE_SSB: | 68 | case BCM47XX_BUS_TYPE_SSB: |
64 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) | 69 | if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) |
65 | return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; | 70 | return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; |
@@ -67,6 +72,7 @@ int gpio_to_irq(unsigned gpio) | |||
67 | return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; | 72 | return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; |
68 | else | 73 | else |
69 | return -EINVAL; | 74 | return -EINVAL; |
75 | #endif | ||
70 | } | 76 | } |
71 | return -EINVAL; | 77 | return -EINVAL; |
72 | } | 78 | } |
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index bcac2ffd1248..4e994edb1425 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c | |||
@@ -26,7 +26,9 @@ static char nvram_buf[NVRAM_SPACE]; | |||
26 | /* Probe for NVRAM header */ | 26 | /* Probe for NVRAM header */ |
27 | static void early_nvram_init(void) | 27 | static void early_nvram_init(void) |
28 | { | 28 | { |
29 | #ifdef CONFIG_BCM47XX_SSB | ||
29 | struct ssb_mipscore *mcore_ssb; | 30 | struct ssb_mipscore *mcore_ssb; |
31 | #endif | ||
30 | struct nvram_header *header; | 32 | struct nvram_header *header; |
31 | int i; | 33 | int i; |
32 | u32 base = 0; | 34 | u32 base = 0; |
@@ -35,11 +37,13 @@ static void early_nvram_init(void) | |||
35 | u32 *src, *dst; | 37 | u32 *src, *dst; |
36 | 38 | ||
37 | switch (bcm47xx_bus_type) { | 39 | switch (bcm47xx_bus_type) { |
40 | #ifdef CONFIG_BCM47XX_SSB | ||
38 | case BCM47XX_BUS_TYPE_SSB: | 41 | case BCM47XX_BUS_TYPE_SSB: |
39 | mcore_ssb = &bcm47xx_bus.ssb.mipscore; | 42 | mcore_ssb = &bcm47xx_bus.ssb.mipscore; |
40 | base = mcore_ssb->flash_window; | 43 | base = mcore_ssb->flash_window; |
41 | lim = mcore_ssb->flash_window_size; | 44 | lim = mcore_ssb->flash_window_size; |
42 | break; | 45 | break; |
46 | #endif | ||
43 | } | 47 | } |
44 | 48 | ||
45 | off = FLASH_MIN; | 49 | off = FLASH_MIN; |
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c index 17c67e24b549..fcef68836979 100644 --- a/arch/mips/bcm47xx/serial.c +++ b/arch/mips/bcm47xx/serial.c | |||
@@ -23,6 +23,7 @@ static struct platform_device uart8250_device = { | |||
23 | }, | 23 | }, |
24 | }; | 24 | }; |
25 | 25 | ||
26 | #ifdef CONFIG_BCM47XX_SSB | ||
26 | static int __init uart8250_init_ssb(void) | 27 | static int __init uart8250_init_ssb(void) |
27 | { | 28 | { |
28 | int i; | 29 | int i; |
@@ -44,12 +45,15 @@ static int __init uart8250_init_ssb(void) | |||
44 | } | 45 | } |
45 | return platform_device_register(&uart8250_device); | 46 | return platform_device_register(&uart8250_device); |
46 | } | 47 | } |
48 | #endif | ||
47 | 49 | ||
48 | static int __init uart8250_init(void) | 50 | static int __init uart8250_init(void) |
49 | { | 51 | { |
50 | switch (bcm47xx_bus_type) { | 52 | switch (bcm47xx_bus_type) { |
53 | #ifdef CONFIG_BCM47XX_SSB | ||
51 | case BCM47XX_BUS_TYPE_SSB: | 54 | case BCM47XX_BUS_TYPE_SSB: |
52 | return uart8250_init_ssb(); | 55 | return uart8250_init_ssb(); |
56 | #endif | ||
53 | } | 57 | } |
54 | return -EINVAL; | 58 | return -EINVAL; |
55 | } | 59 | } |
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index 271cedb339ae..142cf1bc8884 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c | |||
@@ -47,9 +47,11 @@ static void bcm47xx_machine_restart(char *command) | |||
47 | local_irq_disable(); | 47 | local_irq_disable(); |
48 | /* Set the watchdog timer to reset immediately */ | 48 | /* Set the watchdog timer to reset immediately */ |
49 | switch (bcm47xx_bus_type) { | 49 | switch (bcm47xx_bus_type) { |
50 | #ifdef CONFIG_BCM47XX_SSB | ||
50 | case BCM47XX_BUS_TYPE_SSB: | 51 | case BCM47XX_BUS_TYPE_SSB: |
51 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); | 52 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); |
52 | break; | 53 | break; |
54 | #endif | ||
53 | } | 55 | } |
54 | while (1) | 56 | while (1) |
55 | cpu_relax(); | 57 | cpu_relax(); |
@@ -60,14 +62,17 @@ static void bcm47xx_machine_halt(void) | |||
60 | /* Disable interrupts and watchdog and spin forever */ | 62 | /* Disable interrupts and watchdog and spin forever */ |
61 | local_irq_disable(); | 63 | local_irq_disable(); |
62 | switch (bcm47xx_bus_type) { | 64 | switch (bcm47xx_bus_type) { |
65 | #ifdef CONFIG_BCM47XX_SSB | ||
63 | case BCM47XX_BUS_TYPE_SSB: | 66 | case BCM47XX_BUS_TYPE_SSB: |
64 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); | 67 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); |
65 | break; | 68 | break; |
69 | #endif | ||
66 | } | 70 | } |
67 | while (1) | 71 | while (1) |
68 | cpu_relax(); | 72 | cpu_relax(); |
69 | } | 73 | } |
70 | 74 | ||
75 | #ifdef CONFIG_BCM47XX_SSB | ||
71 | #define READ_FROM_NVRAM(_outvar, name, buf) \ | 76 | #define READ_FROM_NVRAM(_outvar, name, buf) \ |
72 | if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ | 77 | if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ |
73 | sprom->_outvar = simple_strtoul(buf, NULL, 0); | 78 | sprom->_outvar = simple_strtoul(buf, NULL, 0); |
@@ -288,13 +293,16 @@ static void __init bcm47xx_register_ssb(void) | |||
288 | } | 293 | } |
289 | } | 294 | } |
290 | } | 295 | } |
296 | #endif | ||
291 | 297 | ||
292 | void __init plat_mem_setup(void) | 298 | void __init plat_mem_setup(void) |
293 | { | 299 | { |
294 | struct cpuinfo_mips *c = ¤t_cpu_data; | 300 | struct cpuinfo_mips *c = ¤t_cpu_data; |
295 | 301 | ||
302 | #ifdef CONFIG_BCM47XX_SSB | ||
296 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; | 303 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; |
297 | bcm47xx_register_ssb(); | 304 | bcm47xx_register_ssb(); |
305 | #endif | ||
298 | 306 | ||
299 | _machine_restart = bcm47xx_machine_restart; | 307 | _machine_restart = bcm47xx_machine_restart; |
300 | _machine_halt = bcm47xx_machine_halt; | 308 | _machine_halt = bcm47xx_machine_halt; |
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c index 50aea2e1808c..03dfc65b1b60 100644 --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c | |||
@@ -40,9 +40,11 @@ void __init plat_time_init(void) | |||
40 | write_c0_compare(0xffff); | 40 | write_c0_compare(0xffff); |
41 | 41 | ||
42 | switch (bcm47xx_bus_type) { | 42 | switch (bcm47xx_bus_type) { |
43 | #ifdef CONFIG_BCM47XX_SSB | ||
43 | case BCM47XX_BUS_TYPE_SSB: | 44 | case BCM47XX_BUS_TYPE_SSB: |
44 | hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; | 45 | hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; |
45 | break; | 46 | break; |
47 | #endif | ||
46 | } | 48 | } |
47 | 49 | ||
48 | if (!hz) | 50 | if (!hz) |
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h index 7cf481bb1a05..d037afb6677e 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | |||
@@ -22,11 +22,15 @@ | |||
22 | #include <linux/ssb/ssb.h> | 22 | #include <linux/ssb/ssb.h> |
23 | 23 | ||
24 | enum bcm47xx_bus_type { | 24 | enum bcm47xx_bus_type { |
25 | #ifdef CONFIG_BCM47XX_SSB | ||
25 | BCM47XX_BUS_TYPE_SSB, | 26 | BCM47XX_BUS_TYPE_SSB, |
27 | #endif | ||
26 | }; | 28 | }; |
27 | 29 | ||
28 | union bcm47xx_bus { | 30 | union bcm47xx_bus { |
31 | #ifdef CONFIG_BCM47XX_SSB | ||
29 | struct ssb_bus ssb; | 32 | struct ssb_bus ssb; |
33 | #endif | ||
30 | }; | 34 | }; |
31 | 35 | ||
32 | extern union bcm47xx_bus bcm47xx_bus; | 36 | extern union bcm47xx_bus bcm47xx_bus; |
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h index 6b78827dd140..1d5f5af56b5f 100644 --- a/arch/mips/include/asm/mach-bcm47xx/gpio.h +++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h | |||
@@ -22,8 +22,10 @@ extern int gpio_to_irq(unsigned gpio); | |||
22 | static inline int gpio_get_value(unsigned gpio) | 22 | static inline int gpio_get_value(unsigned gpio) |
23 | { | 23 | { |
24 | switch (bcm47xx_bus_type) { | 24 | switch (bcm47xx_bus_type) { |
25 | #ifdef CONFIG_BCM47XX_SSB | ||
25 | case BCM47XX_BUS_TYPE_SSB: | 26 | case BCM47XX_BUS_TYPE_SSB: |
26 | return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio); | 27 | return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio); |
28 | #endif | ||
27 | } | 29 | } |
28 | return -EINVAL; | 30 | return -EINVAL; |
29 | } | 31 | } |
@@ -31,18 +33,22 @@ static inline int gpio_get_value(unsigned gpio) | |||
31 | static inline void gpio_set_value(unsigned gpio, int value) | 33 | static inline void gpio_set_value(unsigned gpio, int value) |
32 | { | 34 | { |
33 | switch (bcm47xx_bus_type) { | 35 | switch (bcm47xx_bus_type) { |
36 | #ifdef CONFIG_BCM47XX_SSB | ||
34 | case BCM47XX_BUS_TYPE_SSB: | 37 | case BCM47XX_BUS_TYPE_SSB: |
35 | ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, | 38 | ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, |
36 | value ? 1 << gpio : 0); | 39 | value ? 1 << gpio : 0); |
40 | #endif | ||
37 | } | 41 | } |
38 | } | 42 | } |
39 | 43 | ||
40 | static inline int gpio_direction_input(unsigned gpio) | 44 | static inline int gpio_direction_input(unsigned gpio) |
41 | { | 45 | { |
42 | switch (bcm47xx_bus_type) { | 46 | switch (bcm47xx_bus_type) { |
47 | #ifdef CONFIG_BCM47XX_SSB | ||
43 | case BCM47XX_BUS_TYPE_SSB: | 48 | case BCM47XX_BUS_TYPE_SSB: |
44 | ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0); | 49 | ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0); |
45 | return 0; | 50 | return 0; |
51 | #endif | ||
46 | } | 52 | } |
47 | return -EINVAL; | 53 | return -EINVAL; |
48 | } | 54 | } |
@@ -50,6 +56,7 @@ static inline int gpio_direction_input(unsigned gpio) | |||
50 | static inline int gpio_direction_output(unsigned gpio, int value) | 56 | static inline int gpio_direction_output(unsigned gpio, int value) |
51 | { | 57 | { |
52 | switch (bcm47xx_bus_type) { | 58 | switch (bcm47xx_bus_type) { |
59 | #ifdef CONFIG_BCM47XX_SSB | ||
53 | case BCM47XX_BUS_TYPE_SSB: | 60 | case BCM47XX_BUS_TYPE_SSB: |
54 | /* first set the gpio out value */ | 61 | /* first set the gpio out value */ |
55 | ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, | 62 | ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, |
@@ -57,6 +64,7 @@ static inline int gpio_direction_output(unsigned gpio, int value) | |||
57 | /* then set the gpio mode */ | 64 | /* then set the gpio mode */ |
58 | ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio); | 65 | ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio); |
59 | return 0; | 66 | return 0; |
67 | #endif | ||
60 | } | 68 | } |
61 | return -EINVAL; | 69 | return -EINVAL; |
62 | } | 70 | } |
@@ -64,10 +72,12 @@ static inline int gpio_direction_output(unsigned gpio, int value) | |||
64 | static inline int gpio_intmask(unsigned gpio, int value) | 72 | static inline int gpio_intmask(unsigned gpio, int value) |
65 | { | 73 | { |
66 | switch (bcm47xx_bus_type) { | 74 | switch (bcm47xx_bus_type) { |
75 | #ifdef CONFIG_BCM47XX_SSB | ||
67 | case BCM47XX_BUS_TYPE_SSB: | 76 | case BCM47XX_BUS_TYPE_SSB: |
68 | ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio, | 77 | ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio, |
69 | value ? 1 << gpio : 0); | 78 | value ? 1 << gpio : 0); |
70 | return 0; | 79 | return 0; |
80 | #endif | ||
71 | } | 81 | } |
72 | return -EINVAL; | 82 | return -EINVAL; |
73 | } | 83 | } |
@@ -75,10 +85,12 @@ static inline int gpio_intmask(unsigned gpio, int value) | |||
75 | static inline int gpio_polarity(unsigned gpio, int value) | 85 | static inline int gpio_polarity(unsigned gpio, int value) |
76 | { | 86 | { |
77 | switch (bcm47xx_bus_type) { | 87 | switch (bcm47xx_bus_type) { |
88 | #ifdef CONFIG_BCM47XX_SSB | ||
78 | case BCM47XX_BUS_TYPE_SSB: | 89 | case BCM47XX_BUS_TYPE_SSB: |
79 | ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio, | 90 | ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio, |
80 | value ? 1 << gpio : 0); | 91 | value ? 1 << gpio : 0); |
81 | return 0; | 92 | return 0; |
93 | #endif | ||
82 | } | 94 | } |
83 | return -EINVAL; | 95 | return -EINVAL; |
84 | } | 96 | } |
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c index 455f8e50a007..400535a955d0 100644 --- a/arch/mips/pci/pci-bcm47xx.c +++ b/arch/mips/pci/pci-bcm47xx.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
27 | #include <linux/ssb/ssb.h> | 27 | #include <linux/ssb/ssb.h> |
28 | #include <bcm47xx.h> | ||
28 | 29 | ||
29 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 30 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
30 | { | 31 | { |
@@ -33,9 +34,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
33 | 34 | ||
34 | int pcibios_plat_dev_init(struct pci_dev *dev) | 35 | int pcibios_plat_dev_init(struct pci_dev *dev) |
35 | { | 36 | { |
37 | #ifdef CONFIG_BCM47XX_SSB | ||
36 | int res; | 38 | int res; |
37 | u8 slot, pin; | 39 | u8 slot, pin; |
38 | 40 | ||
41 | if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB) | ||
42 | return 0; | ||
43 | |||
39 | res = ssb_pcibios_plat_dev_init(dev); | 44 | res = ssb_pcibios_plat_dev_init(dev); |
40 | if (res < 0) { | 45 | if (res < 0) { |
41 | printk(KERN_ALERT "PCI: Failed to init device %s\n", | 46 | printk(KERN_ALERT "PCI: Failed to init device %s\n", |
@@ -55,5 +60,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev) | |||
55 | } | 60 | } |
56 | 61 | ||
57 | dev->irq = res; | 62 | dev->irq = res; |
63 | #endif | ||
58 | return 0; | 64 | return 0; |
59 | } | 65 | } |
diff --git a/drivers/watchdog/bcm47xx_wdt.c b/drivers/watchdog/bcm47xx_wdt.c index c43406c48613..6b037024464f 100644 --- a/drivers/watchdog/bcm47xx_wdt.c +++ b/drivers/watchdog/bcm47xx_wdt.c | |||
@@ -55,17 +55,21 @@ static inline void bcm47xx_wdt_hw_start(void) | |||
55 | { | 55 | { |
56 | /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */ | 56 | /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */ |
57 | switch (bcm47xx_bus_type) { | 57 | switch (bcm47xx_bus_type) { |
58 | #ifdef CONFIG_BCM47XX_SSB | ||
58 | case BCM47XX_BUS_TYPE_SSB: | 59 | case BCM47XX_BUS_TYPE_SSB: |
59 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff); | 60 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff); |
60 | break; | 61 | break; |
62 | #endif | ||
61 | } | 63 | } |
62 | } | 64 | } |
63 | 65 | ||
64 | static inline int bcm47xx_wdt_hw_stop(void) | 66 | static inline int bcm47xx_wdt_hw_stop(void) |
65 | { | 67 | { |
66 | switch (bcm47xx_bus_type) { | 68 | switch (bcm47xx_bus_type) { |
69 | #ifdef CONFIG_BCM47XX_SSB | ||
67 | case BCM47XX_BUS_TYPE_SSB: | 70 | case BCM47XX_BUS_TYPE_SSB: |
68 | return ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); | 71 | return ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); |
72 | #endif | ||
69 | } | 73 | } |
70 | return -EINVAL; | 74 | return -EINVAL; |
71 | } | 75 | } |