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-rw-r--r--arch/alpha/kernel/sys_dp264.c41
1 files changed, 23 insertions, 18 deletions
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index 9e36b07fa940..d5da6b1b28ee 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -395,6 +395,22 @@ clipper_init_irq(void)
395 */ 395 */
396 396
397static int __init 397static int __init
398isa_irq_fixup(struct pci_dev *dev, int irq)
399{
400 u8 irq8;
401
402 if (irq > 0)
403 return irq;
404
405 /* This interrupt is routed via ISA bridge, so we'll
406 just have to trust whatever value the console might
407 have assigned. */
408 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq8);
409
410 return irq8 & 0xf;
411}
412
413static int __init
398dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 414dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
399{ 415{
400 static char irq_tab[6][5] __initdata = { 416 static char irq_tab[6][5] __initdata = {
@@ -407,25 +423,13 @@ dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
407 { 16+ 3, 16+ 3, 16+ 2, 16+ 1, 16+ 0} /* IdSel 10 slot 3 */ 423 { 16+ 3, 16+ 3, 16+ 2, 16+ 1, 16+ 0} /* IdSel 10 slot 3 */
408 }; 424 };
409 const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5; 425 const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5;
410
411 struct pci_controller *hose = dev->sysdata; 426 struct pci_controller *hose = dev->sysdata;
412 int irq = COMMON_TABLE_LOOKUP; 427 int irq = COMMON_TABLE_LOOKUP;
413 428
414 if (irq > 0) { 429 if (irq > 0)
415 irq += 16 * hose->index; 430 irq += 16 * hose->index;
416 } else {
417 /* ??? The Contaq IDE controller on the ISA bridge uses
418 "legacy" interrupts 14 and 15. I don't know if anything
419 can wind up at the same slot+pin on hose1, so we'll
420 just have to trust whatever value the console might
421 have assigned. */
422
423 u8 irq8;
424 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq8);
425 irq = irq8;
426 }
427 431
428 return irq; 432 return isa_irq_fixup(dev, irq);
429} 433}
430 434
431static int __init 435static int __init
@@ -453,7 +457,8 @@ monet_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
453 { 24, 24, 25, 26, 27} /* IdSel 15 slot 5 PCI2*/ 457 { 24, 24, 25, 26, 27} /* IdSel 15 slot 5 PCI2*/
454 }; 458 };
455 const long min_idsel = 3, max_idsel = 15, irqs_per_slot = 5; 459 const long min_idsel = 3, max_idsel = 15, irqs_per_slot = 5;
456 return COMMON_TABLE_LOOKUP; 460
461 return isa_irq_fixup(dev, COMMON_TABLE_LOOKUP);
457} 462}
458 463
459static u8 __init 464static u8 __init
@@ -507,7 +512,8 @@ webbrick_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
507 { 47, 47, 46, 45, 44}, /* IdSel 17 slot 3 */ 512 { 47, 47, 46, 45, 44}, /* IdSel 17 slot 3 */
508 }; 513 };
509 const long min_idsel = 7, max_idsel = 17, irqs_per_slot = 5; 514 const long min_idsel = 7, max_idsel = 17, irqs_per_slot = 5;
510 return COMMON_TABLE_LOOKUP; 515
516 return isa_irq_fixup(dev, COMMON_TABLE_LOOKUP);
511} 517}
512 518
513static int __init 519static int __init
@@ -524,14 +530,13 @@ clipper_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
524 { -1, -1, -1, -1, -1} /* IdSel 7 ISA Bridge */ 530 { -1, -1, -1, -1, -1} /* IdSel 7 ISA Bridge */
525 }; 531 };
526 const long min_idsel = 1, max_idsel = 7, irqs_per_slot = 5; 532 const long min_idsel = 1, max_idsel = 7, irqs_per_slot = 5;
527
528 struct pci_controller *hose = dev->sysdata; 533 struct pci_controller *hose = dev->sysdata;
529 int irq = COMMON_TABLE_LOOKUP; 534 int irq = COMMON_TABLE_LOOKUP;
530 535
531 if (irq > 0) 536 if (irq > 0)
532 irq += 16 * hose->index; 537 irq += 16 * hose->index;
533 538
534 return irq; 539 return isa_irq_fixup(dev, irq);
535} 540}
536 541
537static void __init 542static void __init