1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 18729259c2fc..1c9a9c461762 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -655,6 +655,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
                                 p1pll->pll_out_min = 64800;
                         else
                                 p1pll->pll_out_min = 20000;
+                } else if (p1pll->pll_out_min > 64800) {
+                        /* Limiting the pll output range is a good thing generally as
+                         * it limits the number of possible pll combinations for a given
+                         * frequency presumably to the ones that work best on each card.
+                         * However, certain duallink DVI monitors seem to like
+                         * pll combinations that would be limited by this at least on
+                         * pre-DCE 3.0 r6xx hardware.  This might need to be adjusted per
+                         * family.
+                         */
+                        p1pll->pll_out_min = 64800;
                 }
 
                 p1pll->pll_in_min =