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-rw-r--r--arch/arm/kernel/traps.c2
-rw-r--r--arch/arm/mach-footbridge/dc21285.c27
-rw-r--r--arch/arm/vfp/vfpinstr.h8
-rw-r--r--include/asm-arm/arch-l7200/io.h8
-rw-r--r--include/asm-arm/tlbflush.h76
5 files changed, 62 insertions, 59 deletions
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index aeeed806f991..bede380c07a9 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -191,7 +191,7 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
191 if (tsk != current) 191 if (tsk != current)
192 fp = thread_saved_fp(tsk); 192 fp = thread_saved_fp(tsk);
193 else 193 else
194 asm("mov%? %0, fp" : "=r" (fp)); 194 asm("mov %0, fp" : "=r" (fp) : : "cc");
195 195
196 c_backtrace(fp, 0x10); 196 c_backtrace(fp, 0x10);
197 barrier(); 197 barrier();
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 823e25d4547e..a1ae49df5c3b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -69,16 +69,16 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
69 if (addr) 69 if (addr)
70 switch (size) { 70 switch (size) {
71 case 1: 71 case 1:
72 asm("ldr%?b %0, [%1, %2]" 72 asm("ldrb %0, [%1, %2]"
73 : "=r" (v) : "r" (addr), "r" (where)); 73 : "=r" (v) : "r" (addr), "r" (where) : "cc");
74 break; 74 break;
75 case 2: 75 case 2:
76 asm("ldr%?h %0, [%1, %2]" 76 asm("ldrh %0, [%1, %2]"
77 : "=r" (v) : "r" (addr), "r" (where)); 77 : "=r" (v) : "r" (addr), "r" (where) : "cc");
78 break; 78 break;
79 case 4: 79 case 4:
80 asm("ldr%? %0, [%1, %2]" 80 asm("ldr %0, [%1, %2]"
81 : "=r" (v) : "r" (addr), "r" (where)); 81 : "=r" (v) : "r" (addr), "r" (where) : "cc");
82 break; 82 break;
83 } 83 }
84 84
@@ -103,16 +103,19 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
103 if (addr) 103 if (addr)
104 switch (size) { 104 switch (size) {
105 case 1: 105 case 1:
106 asm("str%?b %0, [%1, %2]" 106 asm("strb %0, [%1, %2]"
107 : : "r" (value), "r" (addr), "r" (where)); 107 : : "r" (value), "r" (addr), "r" (where)
108 : "cc");
108 break; 109 break;
109 case 2: 110 case 2:
110 asm("str%?h %0, [%1, %2]" 111 asm("strh %0, [%1, %2]"
111 : : "r" (value), "r" (addr), "r" (where)); 112 : : "r" (value), "r" (addr), "r" (where)
113 : "cc");
112 break; 114 break;
113 case 4: 115 case 4:
114 asm("str%? %0, [%1, %2]" 116 asm("str %0, [%1, %2]"
115 : : "r" (value), "r" (addr), "r" (where)); 117 : : "r" (value), "r" (addr), "r" (where)
118 : "cc");
116 break; 119 break;
117 } 120 }
118 121
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h
index 6c819aeae006..7f343a4beca0 100644
--- a/arch/arm/vfp/vfpinstr.h
+++ b/arch/arm/vfp/vfpinstr.h
@@ -73,14 +73,14 @@
73 73
74#define fmrx(_vfp_) ({ \ 74#define fmrx(_vfp_) ({ \
75 u32 __v; \ 75 u32 __v; \
76 asm("mrc%? p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \ 76 asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \
77 : "=r" (__v)); \ 77 : "=r" (__v) : : "cc"); \
78 __v; \ 78 __v; \
79 }) 79 })
80 80
81#define fmxr(_vfp_,_var_) \ 81#define fmxr(_vfp_,_var_) \
82 asm("mcr%? p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \ 82 asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \
83 : : "r" (_var_)) 83 : : "r" (_var_) : "cc")
84 84
85u32 vfp_single_cpdo(u32 inst, u32 fpscr); 85u32 vfp_single_cpdo(u32 inst, u32 fpscr);
86u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs); 86u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);
diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h
index cd080d8384d9..d744d97c18a5 100644
--- a/include/asm-arm/arch-l7200/io.h
+++ b/include/asm-arm/arch-l7200/io.h
@@ -31,9 +31,9 @@
31static inline unsigned int __arch_getw(unsigned long a) 31static inline unsigned int __arch_getw(unsigned long a)
32{ 32{
33 unsigned int value; 33 unsigned int value;
34 __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" 34 __asm__ __volatile__("ldrh %0, [%1, #0] @ getw"
35 : "=&r" (value) 35 : "=&r" (value)
36 : "r" (a)); 36 : "r" (a) : "cc");
37 return value; 37 return value;
38} 38}
39 39
@@ -42,8 +42,8 @@ static inline unsigned int __arch_getw(unsigned long a)
42 42
43static inline void __arch_putw(unsigned int value, unsigned long a) 43static inline void __arch_putw(unsigned int value, unsigned long a)
44{ 44{
45 __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" 45 __asm__ __volatile__("strh %0, [%1, #0] @ putw"
46 : : "r" (value), "r" (a)); 46 : : "r" (value), "r" (a) : "cc");
47} 47}
48 48
49/* 49/*
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index d97fc76189a5..cd10a0b5f8ae 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -247,16 +247,16 @@ static inline void local_flush_tlb_all(void)
247 const unsigned int __tlb_flag = __cpu_tlb_flags; 247 const unsigned int __tlb_flag = __cpu_tlb_flags;
248 248
249 if (tlb_flag(TLB_WB)) 249 if (tlb_flag(TLB_WB))
250 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); 250 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
251 251
252 if (tlb_flag(TLB_V3_FULL)) 252 if (tlb_flag(TLB_V3_FULL))
253 asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (zero)); 253 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
254 if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL)) 254 if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL))
255 asm("mcr%? p15, 0, %0, c8, c7, 0" : : "r" (zero)); 255 asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
256 if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL)) 256 if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL))
257 asm("mcr%? p15, 0, %0, c8, c6, 0" : : "r" (zero)); 257 asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
258 if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL)) 258 if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
259 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 259 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
260} 260}
261 261
262static inline void local_flush_tlb_mm(struct mm_struct *mm) 262static inline void local_flush_tlb_mm(struct mm_struct *mm)
@@ -266,25 +266,25 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
266 const unsigned int __tlb_flag = __cpu_tlb_flags; 266 const unsigned int __tlb_flag = __cpu_tlb_flags;
267 267
268 if (tlb_flag(TLB_WB)) 268 if (tlb_flag(TLB_WB))
269 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); 269 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
270 270
271 if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) { 271 if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) {
272 if (tlb_flag(TLB_V3_FULL)) 272 if (tlb_flag(TLB_V3_FULL))
273 asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (zero)); 273 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
274 if (tlb_flag(TLB_V4_U_FULL)) 274 if (tlb_flag(TLB_V4_U_FULL))
275 asm("mcr%? p15, 0, %0, c8, c7, 0" : : "r" (zero)); 275 asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
276 if (tlb_flag(TLB_V4_D_FULL)) 276 if (tlb_flag(TLB_V4_D_FULL))
277 asm("mcr%? p15, 0, %0, c8, c6, 0" : : "r" (zero)); 277 asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
278 if (tlb_flag(TLB_V4_I_FULL)) 278 if (tlb_flag(TLB_V4_I_FULL))
279 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 279 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
280 } 280 }
281 281
282 if (tlb_flag(TLB_V6_U_ASID)) 282 if (tlb_flag(TLB_V6_U_ASID))
283 asm("mcr%? p15, 0, %0, c8, c7, 2" : : "r" (asid)); 283 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
284 if (tlb_flag(TLB_V6_D_ASID)) 284 if (tlb_flag(TLB_V6_D_ASID))
285 asm("mcr%? p15, 0, %0, c8, c6, 2" : : "r" (asid)); 285 asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
286 if (tlb_flag(TLB_V6_I_ASID)) 286 if (tlb_flag(TLB_V6_I_ASID))
287 asm("mcr%? p15, 0, %0, c8, c5, 2" : : "r" (asid)); 287 asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
288} 288}
289 289
290static inline void 290static inline void
@@ -296,27 +296,27 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
296 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); 296 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
297 297
298 if (tlb_flag(TLB_WB)) 298 if (tlb_flag(TLB_WB))
299 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); 299 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero));
300 300
301 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { 301 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
302 if (tlb_flag(TLB_V3_PAGE)) 302 if (tlb_flag(TLB_V3_PAGE))
303 asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (uaddr)); 303 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc");
304 if (tlb_flag(TLB_V4_U_PAGE)) 304 if (tlb_flag(TLB_V4_U_PAGE))
305 asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (uaddr)); 305 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
306 if (tlb_flag(TLB_V4_D_PAGE)) 306 if (tlb_flag(TLB_V4_D_PAGE))
307 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (uaddr)); 307 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
308 if (tlb_flag(TLB_V4_I_PAGE)) 308 if (tlb_flag(TLB_V4_I_PAGE))
309 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr)); 309 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
310 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) 310 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
311 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 311 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
312 } 312 }
313 313
314 if (tlb_flag(TLB_V6_U_PAGE)) 314 if (tlb_flag(TLB_V6_U_PAGE))
315 asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (uaddr)); 315 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
316 if (tlb_flag(TLB_V6_D_PAGE)) 316 if (tlb_flag(TLB_V6_D_PAGE))
317 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (uaddr)); 317 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
318 if (tlb_flag(TLB_V6_I_PAGE)) 318 if (tlb_flag(TLB_V6_I_PAGE))
319 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr)); 319 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
320} 320}
321 321
322static inline void local_flush_tlb_kernel_page(unsigned long kaddr) 322static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -327,31 +327,31 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
327 kaddr &= PAGE_MASK; 327 kaddr &= PAGE_MASK;
328 328
329 if (tlb_flag(TLB_WB)) 329 if (tlb_flag(TLB_WB))
330 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); 330 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
331 331
332 if (tlb_flag(TLB_V3_PAGE)) 332 if (tlb_flag(TLB_V3_PAGE))
333 asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (kaddr)); 333 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc");
334 if (tlb_flag(TLB_V4_U_PAGE)) 334 if (tlb_flag(TLB_V4_U_PAGE))
335 asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (kaddr)); 335 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
336 if (tlb_flag(TLB_V4_D_PAGE)) 336 if (tlb_flag(TLB_V4_D_PAGE))
337 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); 337 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
338 if (tlb_flag(TLB_V4_I_PAGE)) 338 if (tlb_flag(TLB_V4_I_PAGE))
339 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); 339 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
340 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) 340 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
341 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 341 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
342 342
343 if (tlb_flag(TLB_V6_U_PAGE)) 343 if (tlb_flag(TLB_V6_U_PAGE))
344 asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (kaddr)); 344 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
345 if (tlb_flag(TLB_V6_D_PAGE)) 345 if (tlb_flag(TLB_V6_D_PAGE))
346 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); 346 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
347 if (tlb_flag(TLB_V6_I_PAGE)) 347 if (tlb_flag(TLB_V6_I_PAGE))
348 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); 348 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
349 349
350 /* The ARM ARM states that the completion of a TLB maintenance 350 /* The ARM ARM states that the completion of a TLB maintenance
351 * operation is only guaranteed by a DSB instruction 351 * operation is only guaranteed by a DSB instruction
352 */ 352 */
353 if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE)) 353 if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
354 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); 354 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
355} 355}
356 356
357/* 357/*
@@ -373,11 +373,11 @@ static inline void flush_pmd_entry(pmd_t *pmd)
373 const unsigned int __tlb_flag = __cpu_tlb_flags; 373 const unsigned int __tlb_flag = __cpu_tlb_flags;
374 374
375 if (tlb_flag(TLB_DCLEAN)) 375 if (tlb_flag(TLB_DCLEAN))
376 asm("mcr%? p15, 0, %0, c7, c10, 1 @ flush_pmd" 376 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
377 : : "r" (pmd)); 377 : : "r" (pmd) : "cc");
378 if (tlb_flag(TLB_WB)) 378 if (tlb_flag(TLB_WB))
379 asm("mcr%? p15, 0, %0, c7, c10, 4 @ flush_pmd" 379 asm("mcr p15, 0, %0, c7, c10, 4 @ flush_pmd"
380 : : "r" (zero)); 380 : : "r" (zero) : "cc");
381} 381}
382 382
383static inline void clean_pmd_entry(pmd_t *pmd) 383static inline void clean_pmd_entry(pmd_t *pmd)
@@ -385,8 +385,8 @@ static inline void clean_pmd_entry(pmd_t *pmd)
385 const unsigned int __tlb_flag = __cpu_tlb_flags; 385 const unsigned int __tlb_flag = __cpu_tlb_flags;
386 386
387 if (tlb_flag(TLB_DCLEAN)) 387 if (tlb_flag(TLB_DCLEAN))
388 asm("mcr%? p15, 0, %0, c7, c10, 1 @ flush_pmd" 388 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
389 : : "r" (pmd)); 389 : : "r" (pmd) : "cc");
390} 390}
391 391
392#undef tlb_flag 392#undef tlb_flag
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 04:49:56 -0400