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-rw-r--r--arch/parisc/kernel/smp.c4
-rw-r--r--arch/parisc/kernel/time.c20
2 files changed, 14 insertions, 10 deletions
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 98e40959a564..f33e8de438dc 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -430,8 +430,9 @@ smp_do_timer(struct pt_regs *regs)
430static void __init 430static void __init
431smp_cpu_init(int cpunum) 431smp_cpu_init(int cpunum)
432{ 432{
433 extern int init_per_cpu(int); /* arch/parisc/kernel/setup.c */ 433 extern int init_per_cpu(int); /* arch/parisc/kernel/processor.c */
434 extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */ 434 extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
435 extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
435 436
436 /* Set modes and Enable floating point coprocessor */ 437 /* Set modes and Enable floating point coprocessor */
437 (void) init_per_cpu(cpunum); 438 (void) init_per_cpu(cpunum);
@@ -457,6 +458,7 @@ smp_cpu_init(int cpunum)
457 enter_lazy_tlb(&init_mm, current); 458 enter_lazy_tlb(&init_mm, current);
458 459
459 init_IRQ(); /* make sure no IRQ's are enabled or pending */ 460 init_IRQ(); /* make sure no IRQ's are enabled or pending */
461 start_cpu_itimer();
460} 462}
461 463
462 464
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index ab641d67f551..47831c2cd093 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -223,22 +223,24 @@ unsigned long long sched_clock(void)
223} 223}
224 224
225 225
226void __init start_cpu_itimer(void)
227{
228 unsigned int cpu = smp_processor_id();
229 unsigned long next_tick = mfctl(16) + clocktick;
230
231 mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
232
233 cpu_data[cpu].it_value = next_tick;
234}
235
226void __init time_init(void) 236void __init time_init(void)
227{ 237{
228 unsigned long next_tick;
229 static struct pdc_tod tod_data; 238 static struct pdc_tod tod_data;
230 239
231 clocktick = (100 * PAGE0->mem_10msec) / HZ; 240 clocktick = (100 * PAGE0->mem_10msec) / HZ;
232 halftick = clocktick / 2; 241 halftick = clocktick / 2;
233 242
234 /* Setup clock interrupt timing */ 243 start_cpu_itimer(); /* get CPU 0 started */
235
236 next_tick = mfctl(16);
237 next_tick += clocktick;
238 cpu_data[smp_processor_id()].it_value = next_tick;
239
240 /* kick off Itimer (CR16) */
241 mtctl(next_tick, 16);
242 244
243 if(pdc_tod_read(&tod_data) == 0) { 245 if(pdc_tod_read(&tod_data) == 0) {
244 write_seqlock_irq(&xtime_lock); 246 write_seqlock_irq(&xtime_lock);