diff options
-rw-r--r-- | arch/arm/kernel/asm-offsets.c | 7 | ||||
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 34 | ||||
-rw-r--r-- | arch/arm/kernel/entry-common.S | 5 | ||||
-rw-r--r-- | arch/arm/mm/Kconfig | 23 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1022.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1026.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm6_7.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm720.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm920.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm922.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm925.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm926.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-feroceon.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-sa110.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-sa1100.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-v6.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 1 | ||||
-rw-r--r-- | include/asm-arm/cpu-multi32.h | 4 | ||||
-rw-r--r-- | include/asm-arm/glue.h | 87 |
22 files changed, 137 insertions, 40 deletions
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 6604b474cfd7..0a0d2479274b 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c | |||
@@ -111,5 +111,12 @@ int main(void) | |||
111 | DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); | 111 | DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); |
112 | DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags)); | 112 | DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags)); |
113 | DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags)); | 113 | DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags)); |
114 | BLANK(); | ||
115 | #ifdef MULTI_DABORT | ||
116 | DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort)); | ||
117 | #endif | ||
118 | #ifdef MULTI_PABORT | ||
119 | DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); | ||
120 | #endif | ||
114 | return 0; | 121 | return 0; |
115 | } | 122 | } |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index a46d5b456765..5e647eb6b3b9 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -166,12 +166,12 @@ __dabt_svc: | |||
166 | @ The abort handler must return the aborted address in r0, and | 166 | @ The abort handler must return the aborted address in r0, and |
167 | @ the fault status register in r1. r9 must be preserved. | 167 | @ the fault status register in r1. r9 must be preserved. |
168 | @ | 168 | @ |
169 | #ifdef MULTI_ABORT | 169 | #ifdef MULTI_DABORT |
170 | ldr r4, .LCprocfns | 170 | ldr r4, .LCprocfns |
171 | mov lr, pc | 171 | mov lr, pc |
172 | ldr pc, [r4] | 172 | ldr pc, [r4, #PROCESSOR_DABT_FUNC] |
173 | #else | 173 | #else |
174 | bl CPU_ABORT_HANDLER | 174 | bl CPU_DABORT_HANDLER |
175 | #endif | 175 | #endif |
176 | 176 | ||
177 | @ | 177 | @ |
@@ -293,7 +293,6 @@ __pabt_svc: | |||
293 | mrs r9, cpsr | 293 | mrs r9, cpsr |
294 | tst r3, #PSR_I_BIT | 294 | tst r3, #PSR_I_BIT |
295 | biceq r9, r9, #PSR_I_BIT | 295 | biceq r9, r9, #PSR_I_BIT |
296 | msr cpsr_c, r9 | ||
297 | 296 | ||
298 | @ | 297 | @ |
299 | @ set args, then call main handler | 298 | @ set args, then call main handler |
@@ -301,7 +300,15 @@ __pabt_svc: | |||
301 | @ r0 - address of faulting instruction | 300 | @ r0 - address of faulting instruction |
302 | @ r1 - pointer to registers on stack | 301 | @ r1 - pointer to registers on stack |
303 | @ | 302 | @ |
304 | mov r0, r2 @ address (pc) | 303 | #ifdef MULTI_PABORT |
304 | mov r0, r2 @ pass address of aborted instruction. | ||
305 | ldr r4, .LCprocfns | ||
306 | mov lr, pc | ||
307 | ldr pc, [r4, #PROCESSOR_PABT_FUNC] | ||
308 | #else | ||
309 | CPU_PABORT_HANDLER(r0, r2) | ||
310 | #endif | ||
311 | msr cpsr_c, r9 @ Maybe enable interrupts | ||
305 | mov r1, sp @ regs | 312 | mov r1, sp @ regs |
306 | bl do_PrefetchAbort @ call abort handler | 313 | bl do_PrefetchAbort @ call abort handler |
307 | 314 | ||
@@ -320,7 +327,7 @@ __pabt_svc: | |||
320 | .align 5 | 327 | .align 5 |
321 | .LCcralign: | 328 | .LCcralign: |
322 | .word cr_alignment | 329 | .word cr_alignment |
323 | #ifdef MULTI_ABORT | 330 | #ifdef MULTI_DABORT |
324 | .LCprocfns: | 331 | .LCprocfns: |
325 | .word processor | 332 | .word processor |
326 | #endif | 333 | #endif |
@@ -404,12 +411,12 @@ __dabt_usr: | |||
404 | @ The abort handler must return the aborted address in r0, and | 411 | @ The abort handler must return the aborted address in r0, and |
405 | @ the fault status register in r1. | 412 | @ the fault status register in r1. |
406 | @ | 413 | @ |
407 | #ifdef MULTI_ABORT | 414 | #ifdef MULTI_DABORT |
408 | ldr r4, .LCprocfns | 415 | ldr r4, .LCprocfns |
409 | mov lr, pc | 416 | mov lr, pc |
410 | ldr pc, [r4] | 417 | ldr pc, [r4, #PROCESSOR_DABT_FUNC] |
411 | #else | 418 | #else |
412 | bl CPU_ABORT_HANDLER | 419 | bl CPU_DABORT_HANDLER |
413 | #endif | 420 | #endif |
414 | 421 | ||
415 | @ | 422 | @ |
@@ -619,8 +626,15 @@ __und_usr_unknown: | |||
619 | __pabt_usr: | 626 | __pabt_usr: |
620 | usr_entry | 627 | usr_entry |
621 | 628 | ||
629 | #ifdef MULTI_PABORT | ||
630 | mov r0, r2 @ pass address of aborted instruction. | ||
631 | ldr r4, .LCprocfns | ||
632 | mov lr, pc | ||
633 | ldr pc, [r4, #PROCESSOR_PABT_FUNC] | ||
634 | #else | ||
635 | CPU_PABORT_HANDLER(r0, r2) | ||
636 | #endif | ||
622 | enable_irq @ Enable interrupts | 637 | enable_irq @ Enable interrupts |
623 | mov r0, r2 @ address (pc) | ||
624 | mov r1, sp @ regs | 638 | mov r1, sp @ regs |
625 | bl do_PrefetchAbort @ call abort handler | 639 | bl do_PrefetchAbort @ call abort handler |
626 | /* fall through */ | 640 | /* fall through */ |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 6c90c50a9ee3..597ed00a08d8 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -352,6 +352,11 @@ sys_mmap2: | |||
352 | b do_mmap2 | 352 | b do_mmap2 |
353 | #endif | 353 | #endif |
354 | 354 | ||
355 | ENTRY(pabort_ifar) | ||
356 | mrc p15, 0, r0, cr6, cr0, 2 | ||
357 | ENTRY(pabort_noifar) | ||
358 | mov pc, lr | ||
359 | |||
355 | #ifdef CONFIG_OABI_COMPAT | 360 | #ifdef CONFIG_OABI_COMPAT |
356 | 361 | ||
357 | /* | 362 | /* |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 084fe8de3efe..708ee25b8df4 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -18,6 +18,7 @@ config CPU_ARM610 | |||
18 | select CPU_CP15_MMU | 18 | select CPU_CP15_MMU |
19 | select CPU_COPY_V3 if MMU | 19 | select CPU_COPY_V3 if MMU |
20 | select CPU_TLB_V3 if MMU | 20 | select CPU_TLB_V3 if MMU |
21 | select CPU_PABRT_NOIFAR | ||
21 | help | 22 | help |
22 | The ARM610 is the successor to the ARM3 processor | 23 | The ARM610 is the successor to the ARM3 processor |
23 | and was produced by VLSI Technology Inc. | 24 | and was produced by VLSI Technology Inc. |
@@ -49,6 +50,7 @@ config CPU_ARM710 | |||
49 | select CPU_CP15_MMU | 50 | select CPU_CP15_MMU |
50 | select CPU_COPY_V3 if MMU | 51 | select CPU_COPY_V3 if MMU |
51 | select CPU_TLB_V3 if MMU | 52 | select CPU_TLB_V3 if MMU |
53 | select CPU_PABRT_NOIFAR | ||
52 | help | 54 | help |
53 | A 32-bit RISC microprocessor based on the ARM7 processor core | 55 | A 32-bit RISC microprocessor based on the ARM7 processor core |
54 | designed by Advanced RISC Machines Ltd. The ARM710 is the | 56 | designed by Advanced RISC Machines Ltd. The ARM710 is the |
@@ -64,6 +66,7 @@ config CPU_ARM720T | |||
64 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X | 66 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X |
65 | select CPU_32v4T | 67 | select CPU_32v4T |
66 | select CPU_ABRT_LV4T | 68 | select CPU_ABRT_LV4T |
69 | select CPU_PABRT_NOIFAR | ||
67 | select CPU_CACHE_V4 | 70 | select CPU_CACHE_V4 |
68 | select CPU_CACHE_VIVT | 71 | select CPU_CACHE_VIVT |
69 | select CPU_CP15_MMU | 72 | select CPU_CP15_MMU |
@@ -113,6 +116,7 @@ config CPU_ARM920T | |||
113 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 | 116 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 |
114 | select CPU_32v4T | 117 | select CPU_32v4T |
115 | select CPU_ABRT_EV4T | 118 | select CPU_ABRT_EV4T |
119 | select CPU_PABRT_NOIFAR | ||
116 | select CPU_CACHE_V4WT | 120 | select CPU_CACHE_V4WT |
117 | select CPU_CACHE_VIVT | 121 | select CPU_CACHE_VIVT |
118 | select CPU_CP15_MMU | 122 | select CPU_CP15_MMU |
@@ -135,6 +139,7 @@ config CPU_ARM922T | |||
135 | default y if ARCH_LH7A40X || ARCH_KS8695 | 139 | default y if ARCH_LH7A40X || ARCH_KS8695 |
136 | select CPU_32v4T | 140 | select CPU_32v4T |
137 | select CPU_ABRT_EV4T | 141 | select CPU_ABRT_EV4T |
142 | select CPU_PABRT_NOIFAR | ||
138 | select CPU_CACHE_V4WT | 143 | select CPU_CACHE_V4WT |
139 | select CPU_CACHE_VIVT | 144 | select CPU_CACHE_VIVT |
140 | select CPU_CP15_MMU | 145 | select CPU_CP15_MMU |
@@ -155,6 +160,7 @@ config CPU_ARM925T | |||
155 | default y if ARCH_OMAP15XX | 160 | default y if ARCH_OMAP15XX |
156 | select CPU_32v4T | 161 | select CPU_32v4T |
157 | select CPU_ABRT_EV4T | 162 | select CPU_ABRT_EV4T |
163 | select CPU_PABRT_NOIFAR | ||
158 | select CPU_CACHE_V4WT | 164 | select CPU_CACHE_V4WT |
159 | select CPU_CACHE_VIVT | 165 | select CPU_CACHE_VIVT |
160 | select CPU_CP15_MMU | 166 | select CPU_CP15_MMU |
@@ -175,6 +181,7 @@ config CPU_ARM926T | |||
175 | default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI | 181 | default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI |
176 | select CPU_32v5 | 182 | select CPU_32v5 |
177 | select CPU_ABRT_EV5TJ | 183 | select CPU_ABRT_EV5TJ |
184 | select CPU_PABRT_NOIFAR | ||
178 | select CPU_CACHE_VIVT | 185 | select CPU_CACHE_VIVT |
179 | select CPU_CP15_MMU | 186 | select CPU_CP15_MMU |
180 | select CPU_COPY_V4WB if MMU | 187 | select CPU_COPY_V4WB if MMU |
@@ -226,6 +233,7 @@ config CPU_ARM1020 | |||
226 | depends on ARCH_INTEGRATOR | 233 | depends on ARCH_INTEGRATOR |
227 | select CPU_32v5 | 234 | select CPU_32v5 |
228 | select CPU_ABRT_EV4T | 235 | select CPU_ABRT_EV4T |
236 | select CPU_PABRT_NOIFAR | ||
229 | select CPU_CACHE_V4WT | 237 | select CPU_CACHE_V4WT |
230 | select CPU_CACHE_VIVT | 238 | select CPU_CACHE_VIVT |
231 | select CPU_CP15_MMU | 239 | select CPU_CP15_MMU |
@@ -244,6 +252,7 @@ config CPU_ARM1020E | |||
244 | depends on ARCH_INTEGRATOR | 252 | depends on ARCH_INTEGRATOR |
245 | select CPU_32v5 | 253 | select CPU_32v5 |
246 | select CPU_ABRT_EV4T | 254 | select CPU_ABRT_EV4T |
255 | select CPU_PABRT_NOIFAR | ||
247 | select CPU_CACHE_V4WT | 256 | select CPU_CACHE_V4WT |
248 | select CPU_CACHE_VIVT | 257 | select CPU_CACHE_VIVT |
249 | select CPU_CP15_MMU | 258 | select CPU_CP15_MMU |
@@ -257,6 +266,7 @@ config CPU_ARM1022 | |||
257 | depends on ARCH_INTEGRATOR | 266 | depends on ARCH_INTEGRATOR |
258 | select CPU_32v5 | 267 | select CPU_32v5 |
259 | select CPU_ABRT_EV4T | 268 | select CPU_ABRT_EV4T |
269 | select CPU_PABRT_NOIFAR | ||
260 | select CPU_CACHE_VIVT | 270 | select CPU_CACHE_VIVT |
261 | select CPU_CP15_MMU | 271 | select CPU_CP15_MMU |
262 | select CPU_COPY_V4WB if MMU # can probably do better | 272 | select CPU_COPY_V4WB if MMU # can probably do better |
@@ -275,6 +285,7 @@ config CPU_ARM1026 | |||
275 | depends on ARCH_INTEGRATOR | 285 | depends on ARCH_INTEGRATOR |
276 | select CPU_32v5 | 286 | select CPU_32v5 |
277 | select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 | 287 | select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 |
288 | select CPU_PABRT_NOIFAR | ||
278 | select CPU_CACHE_VIVT | 289 | select CPU_CACHE_VIVT |
279 | select CPU_CP15_MMU | 290 | select CPU_CP15_MMU |
280 | select CPU_COPY_V4WB if MMU # can probably do better | 291 | select CPU_COPY_V4WB if MMU # can probably do better |
@@ -293,6 +304,7 @@ config CPU_SA110 | |||
293 | select CPU_32v3 if ARCH_RPC | 304 | select CPU_32v3 if ARCH_RPC |
294 | select CPU_32v4 if !ARCH_RPC | 305 | select CPU_32v4 if !ARCH_RPC |
295 | select CPU_ABRT_EV4 | 306 | select CPU_ABRT_EV4 |
307 | select CPU_PABRT_NOIFAR | ||
296 | select CPU_CACHE_V4WB | 308 | select CPU_CACHE_V4WB |
297 | select CPU_CACHE_VIVT | 309 | select CPU_CACHE_VIVT |
298 | select CPU_CP15_MMU | 310 | select CPU_CP15_MMU |
@@ -314,6 +326,7 @@ config CPU_SA1100 | |||
314 | default y | 326 | default y |
315 | select CPU_32v4 | 327 | select CPU_32v4 |
316 | select CPU_ABRT_EV4 | 328 | select CPU_ABRT_EV4 |
329 | select CPU_PABRT_NOIFAR | ||
317 | select CPU_CACHE_V4WB | 330 | select CPU_CACHE_V4WB |
318 | select CPU_CACHE_VIVT | 331 | select CPU_CACHE_VIVT |
319 | select CPU_CP15_MMU | 332 | select CPU_CP15_MMU |
@@ -326,6 +339,7 @@ config CPU_XSCALE | |||
326 | default y | 339 | default y |
327 | select CPU_32v5 | 340 | select CPU_32v5 |
328 | select CPU_ABRT_EV5T | 341 | select CPU_ABRT_EV5T |
342 | select CPU_PABRT_NOIFAR | ||
329 | select CPU_CACHE_VIVT | 343 | select CPU_CACHE_VIVT |
330 | select CPU_CP15_MMU | 344 | select CPU_CP15_MMU |
331 | select CPU_TLB_V4WBI if MMU | 345 | select CPU_TLB_V4WBI if MMU |
@@ -349,6 +363,7 @@ config CPU_FEROCEON | |||
349 | default y | 363 | default y |
350 | select CPU_32v5 | 364 | select CPU_32v5 |
351 | select CPU_ABRT_EV5T | 365 | select CPU_ABRT_EV5T |
366 | select CPU_PABRT_NOIFAR | ||
352 | select CPU_CACHE_VIVT | 367 | select CPU_CACHE_VIVT |
353 | select CPU_CP15_MMU | 368 | select CPU_CP15_MMU |
354 | select CPU_COPY_V4WB if MMU | 369 | select CPU_COPY_V4WB if MMU |
@@ -371,6 +386,7 @@ config CPU_V6 | |||
371 | default y if ARCH_MSM7X00A | 386 | default y if ARCH_MSM7X00A |
372 | select CPU_32v6 | 387 | select CPU_32v6 |
373 | select CPU_ABRT_EV6 | 388 | select CPU_ABRT_EV6 |
389 | select CPU_PABRT_NOIFAR | ||
374 | select CPU_CACHE_V6 | 390 | select CPU_CACHE_V6 |
375 | select CPU_CACHE_VIPT | 391 | select CPU_CACHE_VIPT |
376 | select CPU_CP15_MMU | 392 | select CPU_CP15_MMU |
@@ -397,6 +413,7 @@ config CPU_V7 | |||
397 | select CPU_32v6K | 413 | select CPU_32v6K |
398 | select CPU_32v7 | 414 | select CPU_32v7 |
399 | select CPU_ABRT_EV7 | 415 | select CPU_ABRT_EV7 |
416 | select CPU_PABRT_IFAR | ||
400 | select CPU_CACHE_V7 | 417 | select CPU_CACHE_V7 |
401 | select CPU_CACHE_VIPT | 418 | select CPU_CACHE_VIPT |
402 | select CPU_CP15_MMU | 419 | select CPU_CP15_MMU |
@@ -458,6 +475,12 @@ config CPU_ABRT_EV6 | |||
458 | config CPU_ABRT_EV7 | 475 | config CPU_ABRT_EV7 |
459 | bool | 476 | bool |
460 | 477 | ||
478 | config CPU_PABRT_IFAR | ||
479 | bool | ||
480 | |||
481 | config CPU_PABRT_NOIFAR | ||
482 | bool | ||
483 | |||
461 | # The cache model | 484 | # The cache model |
462 | config CPU_CACHE_V3 | 485 | config CPU_CACHE_V3 |
463 | bool | 486 | bool |
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 700c04d6996e..32fd7ea533f2 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -478,6 +478,7 @@ arm1020_processor_functions: | |||
478 | .word cpu_arm1020_dcache_clean_area | 478 | .word cpu_arm1020_dcache_clean_area |
479 | .word cpu_arm1020_switch_mm | 479 | .word cpu_arm1020_switch_mm |
480 | .word cpu_arm1020_set_pte_ext | 480 | .word cpu_arm1020_set_pte_ext |
481 | .word pabort_noifar | ||
481 | .size arm1020_processor_functions, . - arm1020_processor_functions | 482 | .size arm1020_processor_functions, . - arm1020_processor_functions |
482 | 483 | ||
483 | .section ".rodata" | 484 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 1cc206ab5eae..fe2b0ae70274 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -459,6 +459,7 @@ arm1020e_processor_functions: | |||
459 | .word cpu_arm1020e_dcache_clean_area | 459 | .word cpu_arm1020e_dcache_clean_area |
460 | .word cpu_arm1020e_switch_mm | 460 | .word cpu_arm1020e_switch_mm |
461 | .word cpu_arm1020e_set_pte_ext | 461 | .word cpu_arm1020e_set_pte_ext |
462 | .word pabort_noifar | ||
462 | .size arm1020e_processor_functions, . - arm1020e_processor_functions | 463 | .size arm1020e_processor_functions, . - arm1020e_processor_functions |
463 | 464 | ||
464 | .section ".rodata" | 465 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index aff0ea08e2f8..06dde678e19d 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
@@ -442,6 +442,7 @@ arm1022_processor_functions: | |||
442 | .word cpu_arm1022_dcache_clean_area | 442 | .word cpu_arm1022_dcache_clean_area |
443 | .word cpu_arm1022_switch_mm | 443 | .word cpu_arm1022_switch_mm |
444 | .word cpu_arm1022_set_pte_ext | 444 | .word cpu_arm1022_set_pte_ext |
445 | .word pabort_noifar | ||
445 | .size arm1022_processor_functions, . - arm1022_processor_functions | 446 | .size arm1022_processor_functions, . - arm1022_processor_functions |
446 | 447 | ||
447 | .section ".rodata" | 448 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 65e43a109085..f5506e6e681e 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
@@ -437,6 +437,7 @@ arm1026_processor_functions: | |||
437 | .word cpu_arm1026_dcache_clean_area | 437 | .word cpu_arm1026_dcache_clean_area |
438 | .word cpu_arm1026_switch_mm | 438 | .word cpu_arm1026_switch_mm |
439 | .word cpu_arm1026_set_pte_ext | 439 | .word cpu_arm1026_set_pte_ext |
440 | .word pabort_noifar | ||
440 | .size arm1026_processor_functions, . - arm1026_processor_functions | 441 | .size arm1026_processor_functions, . - arm1026_processor_functions |
441 | 442 | ||
442 | .section .rodata | 443 | .section .rodata |
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index 123a7dc7a433..14b6a95c8d45 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S | |||
@@ -300,6 +300,7 @@ ENTRY(arm6_processor_functions) | |||
300 | .word cpu_arm6_dcache_clean_area | 300 | .word cpu_arm6_dcache_clean_area |
301 | .word cpu_arm6_switch_mm | 301 | .word cpu_arm6_switch_mm |
302 | .word cpu_arm6_set_pte_ext | 302 | .word cpu_arm6_set_pte_ext |
303 | .word pabort_noifar | ||
303 | .size arm6_processor_functions, . - arm6_processor_functions | 304 | .size arm6_processor_functions, . - arm6_processor_functions |
304 | 305 | ||
305 | /* | 306 | /* |
@@ -316,6 +317,7 @@ ENTRY(arm7_processor_functions) | |||
316 | .word cpu_arm7_dcache_clean_area | 317 | .word cpu_arm7_dcache_clean_area |
317 | .word cpu_arm7_switch_mm | 318 | .word cpu_arm7_switch_mm |
318 | .word cpu_arm7_set_pte_ext | 319 | .word cpu_arm7_set_pte_ext |
320 | .word pabort_noifar | ||
319 | .size arm7_processor_functions, . - arm7_processor_functions | 321 | .size arm7_processor_functions, . - arm7_processor_functions |
320 | 322 | ||
321 | .section ".rodata" | 323 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index dc763be43362..ca5e7aac2da7 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S | |||
@@ -205,6 +205,7 @@ ENTRY(arm720_processor_functions) | |||
205 | .word cpu_arm720_dcache_clean_area | 205 | .word cpu_arm720_dcache_clean_area |
206 | .word cpu_arm720_switch_mm | 206 | .word cpu_arm720_switch_mm |
207 | .word cpu_arm720_set_pte_ext | 207 | .word cpu_arm720_set_pte_ext |
208 | .word pabort_noifar | ||
208 | .size arm720_processor_functions, . - arm720_processor_functions | 209 | .size arm720_processor_functions, . - arm720_processor_functions |
209 | 210 | ||
210 | .section ".rodata" | 211 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 75c945ed6c4d..0170d4f466ea 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -424,6 +424,7 @@ arm920_processor_functions: | |||
424 | .word cpu_arm920_dcache_clean_area | 424 | .word cpu_arm920_dcache_clean_area |
425 | .word cpu_arm920_switch_mm | 425 | .word cpu_arm920_switch_mm |
426 | .word cpu_arm920_set_pte_ext | 426 | .word cpu_arm920_set_pte_ext |
427 | .word pabort_noifar | ||
427 | .size arm920_processor_functions, . - arm920_processor_functions | 428 | .size arm920_processor_functions, . - arm920_processor_functions |
428 | 429 | ||
429 | .section ".rodata" | 430 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index ffb751b877ff..b7952493d404 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
@@ -428,6 +428,7 @@ arm922_processor_functions: | |||
428 | .word cpu_arm922_dcache_clean_area | 428 | .word cpu_arm922_dcache_clean_area |
429 | .word cpu_arm922_switch_mm | 429 | .word cpu_arm922_switch_mm |
430 | .word cpu_arm922_set_pte_ext | 430 | .word cpu_arm922_set_pte_ext |
431 | .word pabort_noifar | ||
431 | .size arm922_processor_functions, . - arm922_processor_functions | 432 | .size arm922_processor_functions, . - arm922_processor_functions |
432 | 433 | ||
433 | .section ".rodata" | 434 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 44c2c997819f..e2988eba4cf6 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -491,6 +491,7 @@ arm925_processor_functions: | |||
491 | .word cpu_arm925_dcache_clean_area | 491 | .word cpu_arm925_dcache_clean_area |
492 | .word cpu_arm925_switch_mm | 492 | .word cpu_arm925_switch_mm |
493 | .word cpu_arm925_set_pte_ext | 493 | .word cpu_arm925_set_pte_ext |
494 | .word pabort_noifar | ||
494 | .size arm925_processor_functions, . - arm925_processor_functions | 495 | .size arm925_processor_functions, . - arm925_processor_functions |
495 | 496 | ||
496 | .section ".rodata" | 497 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 194ef48968e6..62f7d1dfe016 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -444,6 +444,7 @@ arm926_processor_functions: | |||
444 | .word cpu_arm926_dcache_clean_area | 444 | .word cpu_arm926_dcache_clean_area |
445 | .word cpu_arm926_switch_mm | 445 | .word cpu_arm926_switch_mm |
446 | .word cpu_arm926_set_pte_ext | 446 | .word cpu_arm926_set_pte_ext |
447 | .word pabort_noifar | ||
447 | .size arm926_processor_functions, . - arm926_processor_functions | 448 | .size arm926_processor_functions, . - arm926_processor_functions |
448 | 449 | ||
449 | .section ".rodata" | 450 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index fa0dc7e6f0ea..2f169b28e938 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -430,6 +430,7 @@ feroceon_processor_functions: | |||
430 | .word cpu_feroceon_dcache_clean_area | 430 | .word cpu_feroceon_dcache_clean_area |
431 | .word cpu_feroceon_switch_mm | 431 | .word cpu_feroceon_switch_mm |
432 | .word cpu_feroceon_set_pte_ext | 432 | .word cpu_feroceon_set_pte_ext |
433 | .word pabort_noifar | ||
433 | .size feroceon_processor_functions, . - feroceon_processor_functions | 434 | .size feroceon_processor_functions, . - feroceon_processor_functions |
434 | 435 | ||
435 | .section ".rodata" | 436 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index 6e226e12989f..4db3d6299a2b 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S | |||
@@ -223,6 +223,7 @@ ENTRY(sa110_processor_functions) | |||
223 | .word cpu_sa110_dcache_clean_area | 223 | .word cpu_sa110_dcache_clean_area |
224 | .word cpu_sa110_switch_mm | 224 | .word cpu_sa110_switch_mm |
225 | .word cpu_sa110_set_pte_ext | 225 | .word cpu_sa110_set_pte_ext |
226 | .word pabort_noifar | ||
226 | .size sa110_processor_functions, . - sa110_processor_functions | 227 | .size sa110_processor_functions, . - sa110_processor_functions |
227 | 228 | ||
228 | .section ".rodata" | 229 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 9afb11d089fe..3cdef043760f 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S | |||
@@ -238,6 +238,7 @@ ENTRY(sa1100_processor_functions) | |||
238 | .word cpu_sa1100_dcache_clean_area | 238 | .word cpu_sa1100_dcache_clean_area |
239 | .word cpu_sa1100_switch_mm | 239 | .word cpu_sa1100_switch_mm |
240 | .word cpu_sa1100_set_pte_ext | 240 | .word cpu_sa1100_set_pte_ext |
241 | .word pabort_noifar | ||
241 | .size sa1100_processor_functions, . - sa1100_processor_functions | 242 | .size sa1100_processor_functions, . - sa1100_processor_functions |
242 | 243 | ||
243 | .section ".rodata" | 244 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index eb42e5b94863..2162a692d99a 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -240,6 +240,7 @@ ENTRY(v6_processor_functions) | |||
240 | .word cpu_v6_dcache_clean_area | 240 | .word cpu_v6_dcache_clean_area |
241 | .word cpu_v6_switch_mm | 241 | .word cpu_v6_switch_mm |
242 | .word cpu_v6_set_pte_ext | 242 | .word cpu_v6_set_pte_ext |
243 | .word pabort_noifar | ||
243 | .size v6_processor_functions, . - v6_processor_functions | 244 | .size v6_processor_functions, . - v6_processor_functions |
244 | 245 | ||
245 | .type cpu_arch_name, #object | 246 | .type cpu_arch_name, #object |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index e0acc5ae6f6f..a1d7331cd64c 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -212,6 +212,7 @@ ENTRY(v7_processor_functions) | |||
212 | .word cpu_v7_dcache_clean_area | 212 | .word cpu_v7_dcache_clean_area |
213 | .word cpu_v7_switch_mm | 213 | .word cpu_v7_switch_mm |
214 | .word cpu_v7_set_pte_ext | 214 | .word cpu_v7_set_pte_ext |
215 | .word pabort_ifar | ||
215 | .size v7_processor_functions, . - v7_processor_functions | 216 | .size v7_processor_functions, . - v7_processor_functions |
216 | 217 | ||
217 | .type cpu_arch_name, #object | 218 | .type cpu_arch_name, #object |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 016690b9d564..1a6d89823dff 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -534,6 +534,7 @@ ENTRY(xscale_processor_functions) | |||
534 | .word cpu_xscale_dcache_clean_area | 534 | .word cpu_xscale_dcache_clean_area |
535 | .word cpu_xscale_switch_mm | 535 | .word cpu_xscale_switch_mm |
536 | .word cpu_xscale_set_pte_ext | 536 | .word cpu_xscale_set_pte_ext |
537 | .word pabort_noifar | ||
537 | .size xscale_processor_functions, . - xscale_processor_functions | 538 | .size xscale_processor_functions, . - xscale_processor_functions |
538 | 539 | ||
539 | .section ".rodata" | 540 | .section ".rodata" |
diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h index 715e18a4add1..3479de9266e5 100644 --- a/include/asm-arm/cpu-multi32.h +++ b/include/asm-arm/cpu-multi32.h | |||
@@ -21,6 +21,10 @@ extern struct processor { | |||
21 | */ | 21 | */ |
22 | void (*_data_abort)(unsigned long pc); | 22 | void (*_data_abort)(unsigned long pc); |
23 | /* | 23 | /* |
24 | * Retrieve prefetch fault address | ||
25 | */ | ||
26 | unsigned long (*_prefetch_abort)(unsigned long lr); | ||
27 | /* | ||
24 | * Set up any processor specifics | 28 | * Set up any processor specifics |
25 | */ | 29 | */ |
26 | void (*_proc_init)(void); | 30 | void (*_proc_init)(void); |
diff --git a/include/asm-arm/glue.h b/include/asm-arm/glue.h index 22274ce81375..a97a182ba287 100644 --- a/include/asm-arm/glue.h +++ b/include/asm-arm/glue.h | |||
@@ -40,83 +40,110 @@ | |||
40 | * v6_early - ARMv6 generic early abort handler | 40 | * v6_early - ARMv6 generic early abort handler |
41 | * v7_early - ARMv7 generic early abort handler | 41 | * v7_early - ARMv7 generic early abort handler |
42 | */ | 42 | */ |
43 | #undef CPU_ABORT_HANDLER | 43 | #undef CPU_DABORT_HANDLER |
44 | #undef MULTI_ABORT | 44 | #undef MULTI_DABORT |
45 | 45 | ||
46 | #if defined(CONFIG_CPU_ARM610) | 46 | #if defined(CONFIG_CPU_ARM610) |
47 | # ifdef CPU_ABORT_HANDLER | 47 | # ifdef CPU_DABORT_HANDLER |
48 | # define MULTI_ABORT 1 | 48 | # define MULTI_DABORT 1 |
49 | # else | 49 | # else |
50 | # define CPU_ABORT_HANDLER cpu_arm6_data_abort | 50 | # define CPU_DABORT_HANDLER cpu_arm6_data_abort |
51 | # endif | 51 | # endif |
52 | #endif | 52 | #endif |
53 | 53 | ||
54 | #if defined(CONFIG_CPU_ARM710) | 54 | #if defined(CONFIG_CPU_ARM710) |
55 | # ifdef CPU_ABORT_HANDLER | 55 | # ifdef CPU_DABORT_HANDLER |
56 | # define MULTI_ABORT 1 | 56 | # define MULTI_DABORT 1 |
57 | # else | 57 | # else |
58 | # define CPU_ABORT_HANDLER cpu_arm7_data_abort | 58 | # define CPU_DABORT_HANDLER cpu_arm7_data_abort |
59 | # endif | 59 | # endif |
60 | #endif | 60 | #endif |
61 | 61 | ||
62 | #ifdef CONFIG_CPU_ABRT_LV4T | 62 | #ifdef CONFIG_CPU_ABRT_LV4T |
63 | # ifdef CPU_ABORT_HANDLER | 63 | # ifdef CPU_DABORT_HANDLER |
64 | # define MULTI_ABORT 1 | 64 | # define MULTI_DABORT 1 |
65 | # else | 65 | # else |
66 | # define CPU_ABORT_HANDLER v4t_late_abort | 66 | # define CPU_DABORT_HANDLER v4t_late_abort |
67 | # endif | 67 | # endif |
68 | #endif | 68 | #endif |
69 | 69 | ||
70 | #ifdef CONFIG_CPU_ABRT_EV4 | 70 | #ifdef CONFIG_CPU_ABRT_EV4 |
71 | # ifdef CPU_ABORT_HANDLER | 71 | # ifdef CPU_DABORT_HANDLER |
72 | # define MULTI_ABORT 1 | 72 | # define MULTI_DABORT 1 |
73 | # else | 73 | # else |
74 | # define CPU_ABORT_HANDLER v4_early_abort | 74 | # define CPU_DABORT_HANDLER v4_early_abort |
75 | # endif | 75 | # endif |
76 | #endif | 76 | #endif |
77 | 77 | ||
78 | #ifdef CONFIG_CPU_ABRT_EV4T | 78 | #ifdef CONFIG_CPU_ABRT_EV4T |
79 | # ifdef CPU_ABORT_HANDLER | 79 | # ifdef CPU_DABORT_HANDLER |
80 | # define MULTI_ABORT 1 | 80 | # define MULTI_DABORT 1 |
81 | # else | 81 | # else |
82 | # define CPU_ABORT_HANDLER v4t_early_abort | 82 | # define CPU_DABORT_HANDLER v4t_early_abort |
83 | # endif | 83 | # endif |
84 | #endif | 84 | #endif |
85 | 85 | ||
86 | #ifdef CONFIG_CPU_ABRT_EV5TJ | 86 | #ifdef CONFIG_CPU_ABRT_EV5TJ |
87 | # ifdef CPU_ABORT_HANDLER | 87 | # ifdef CPU_DABORT_HANDLER |
88 | # define MULTI_ABORT 1 | 88 | # define MULTI_DABORT 1 |
89 | # else | 89 | # else |
90 | # define CPU_ABORT_HANDLER v5tj_early_abort | 90 | # define CPU_DABORT_HANDLER v5tj_early_abort |
91 | # endif | 91 | # endif |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | #ifdef CONFIG_CPU_ABRT_EV5T | 94 | #ifdef CONFIG_CPU_ABRT_EV5T |
95 | # ifdef CPU_ABORT_HANDLER | 95 | # ifdef CPU_DABORT_HANDLER |
96 | # define MULTI_ABORT 1 | 96 | # define MULTI_DABORT 1 |
97 | # else | 97 | # else |
98 | # define CPU_ABORT_HANDLER v5t_early_abort | 98 | # define CPU_DABORT_HANDLER v5t_early_abort |
99 | # endif | 99 | # endif |
100 | #endif | 100 | #endif |
101 | 101 | ||
102 | #ifdef CONFIG_CPU_ABRT_EV6 | 102 | #ifdef CONFIG_CPU_ABRT_EV6 |
103 | # ifdef CPU_ABORT_HANDLER | 103 | # ifdef CPU_DABORT_HANDLER |
104 | # define MULTI_ABORT 1 | 104 | # define MULTI_DABORT 1 |
105 | # else | 105 | # else |
106 | # define CPU_ABORT_HANDLER v6_early_abort | 106 | # define CPU_DABORT_HANDLER v6_early_abort |
107 | # endif | 107 | # endif |
108 | #endif | 108 | #endif |
109 | 109 | ||
110 | #ifdef CONFIG_CPU_ABRT_EV7 | 110 | #ifdef CONFIG_CPU_ABRT_EV7 |
111 | # ifdef CPU_ABORT_HANDLER | 111 | # ifdef CPU_DABORT_HANDLER |
112 | # define MULTI_ABORT 1 | 112 | # define MULTI_DABORT 1 |
113 | # else | 113 | # else |
114 | # define CPU_ABORT_HANDLER v7_early_abort | 114 | # define CPU_DABORT_HANDLER v7_early_abort |
115 | # endif | 115 | # endif |
116 | #endif | 116 | #endif |
117 | 117 | ||
118 | #ifndef CPU_ABORT_HANDLER | 118 | #ifndef CPU_DABORT_HANDLER |
119 | #error Unknown data abort handler type | 119 | #error Unknown data abort handler type |
120 | #endif | 120 | #endif |
121 | 121 | ||
122 | /* | ||
123 | * Prefetch abort handler. If the CPU has an IFAR use that, otherwise | ||
124 | * use the address of the aborted instruction | ||
125 | */ | ||
126 | #undef CPU_PABORT_HANDLER | ||
127 | #undef MULTI_PABORT | ||
128 | |||
129 | #ifdef CONFIG_CPU_PABRT_IFAR | ||
130 | # ifdef CPU_PABORT_HANDLER | ||
131 | # define MULTI_PABORT 1 | ||
132 | # else | ||
133 | # define CPU_PABORT_HANDLER(reg, insn) mrc p15, 0, reg, cr6, cr0, 2 | ||
134 | # endif | ||
135 | #endif | ||
136 | |||
137 | #ifdef CONFIG_CPU_PABRT_NOIFAR | ||
138 | # ifdef CPU_PABORT_HANDLER | ||
139 | # define MULTI_PABORT 1 | ||
140 | # else | ||
141 | # define CPU_PABORT_HANDLER(reg, insn) mov reg, insn | ||
142 | # endif | ||
143 | #endif | ||
144 | |||
145 | #ifndef CPU_PABORT_HANDLER | ||
146 | #error Unknown prefetch abort handler type | ||
147 | #endif | ||
148 | |||
122 | #endif | 149 | #endif |