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-rw-r--r--arch/x86/pci/ce4100.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 41bd2a2d2c50..b914e20b5a00 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
115 reg_read(reg, value); 115 reg_read(reg, value);
116} 116}
117 117
118static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
119{
120 unsigned long flags;
121
122 raw_spin_lock_irqsave(&pci_config_lock, flags);
123 /* force interrupt pin value to 0 */
124 *value = reg->sim_reg.value & 0xfff00ff;
125 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
126}
127
118static struct sim_dev_reg bus1_fixups[] = { 128static struct sim_dev_reg bus1_fixups[] = {
119 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 129 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
120 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 130 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = {
144 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) 154 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
145 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) 155 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
146 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) 156 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
157 DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
147 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 158 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
148 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) 159 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
149 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) 160 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = {
161 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) 172 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
162 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) 173 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
163 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) 174 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
175 DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
164 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 176 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
165 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) 177 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
178 DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
166}; 179};
167 180
168static void __init init_sim_regs(void) 181static void __init init_sim_regs(void)