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-rw-r--r--drivers/net/mlx4/en_main.c12
-rw-r--r--drivers/net/mlx4/en_params.c5
2 files changed, 4 insertions, 13 deletions
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c
index 34f3a191fbdf..eda72dd2120f 100644
--- a/drivers/net/mlx4/en_main.c
+++ b/drivers/net/mlx4/en_main.c
@@ -169,14 +169,10 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
169 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 169 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
170 mlx4_info(mdev, "Using %d tx rings for port:%d\n", 170 mlx4_info(mdev, "Using %d tx rings for port:%d\n",
171 mdev->profile.prof[i].tx_ring_num, i); 171 mdev->profile.prof[i].tx_ring_num, i);
172 if (!mdev->profile.prof[i].rx_ring_num) { 172 mdev->profile.prof[i].rx_ring_num =
173 mdev->profile.prof[i].rx_ring_num = 173 min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS);
174 min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS); 174 mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n",
175 mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n", 175 mdev->profile.prof[i].rx_ring_num, i);
176 mdev->profile.prof[i].rx_ring_num, i);
177 } else
178 mlx4_info(mdev, "Using %d rx rings for port:%d\n",
179 mdev->profile.prof[i].rx_ring_num, i);
180 } 176 }
181 177
182 /* Create our own workqueue for reset/multicast tasks 178 /* Create our own workqueue for reset/multicast tasks
diff --git a/drivers/net/mlx4/en_params.c b/drivers/net/mlx4/en_params.c
index 047b37f5a747..6483ae9d45b1 100644
--- a/drivers/net/mlx4/en_params.c
+++ b/drivers/net/mlx4/en_params.c
@@ -65,9 +65,6 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
65MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." 65MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
66 " Per priority bit mask"); 66 " Per priority bit mask");
67 67
68MLX4_EN_PARM_INT(rx_ring_num1, 0, "Number or Rx rings for port 1 (0 = #cores)");
69MLX4_EN_PARM_INT(rx_ring_num2, 0, "Number or Rx rings for port 2 (0 = #cores)");
70
71MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1"); 68MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1");
72MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2"); 69MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2");
73MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1"); 70MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1");
@@ -95,8 +92,6 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
95 params->prof[1].tx_ring_num = 1; 92 params->prof[1].tx_ring_num = 1;
96 params->prof[2].tx_ring_num = 1; 93 params->prof[2].tx_ring_num = 1;
97 } 94 }
98 params->prof[1].rx_ring_num = min_t(int, rx_ring_num1, MAX_RX_RINGS);
99 params->prof[2].rx_ring_num = min_t(int, rx_ring_num2, MAX_RX_RINGS);
100 95
101 if (tx_ring_size1 == MLX4_EN_AUTO_CONF) 96 if (tx_ring_size1 == MLX4_EN_AUTO_CONF)
102 tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE; 97 tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE;