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-rw-r--r--drivers/ide/cris/ide-cris.c33
-rw-r--r--drivers/ide/ide.c54
-rw-r--r--drivers/ide/legacy/buddha.c72
-rw-r--r--drivers/ide/legacy/falconide.c42
-rw-r--r--drivers/ide/legacy/gayle.c39
-rw-r--r--drivers/ide/legacy/macide.c57
-rw-r--r--drivers/ide/legacy/q40ide.c9
-rw-r--r--include/linux/ide.h11
8 files changed, 133 insertions, 184 deletions
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 00587a8c2ba1..e79bf8f9b7db 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -753,6 +753,25 @@ static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed)
753 cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); 753 cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
754} 754}
755 755
756static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base)
757{
758 int i;
759
760 memset(hw, 0, sizeof(*hw));
761
762 for (i = 0; i <= 7; i++)
763 hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1);
764
765 /*
766 * the IDE control register is at ATA address 6,
767 * with CS1 active instead of CS0
768 */
769 hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0);
770
771 hw->irq = ide_default_irq(0);
772 hw->ack_intr = cris_ide_ack_intr;
773}
774
756static const struct ide_port_info cris_port_info __initdata = { 775static const struct ide_port_info cris_port_info __initdata = {
757 .chipset = ide_etrax100, 776 .chipset = ide_etrax100,
758 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 777 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
@@ -765,24 +784,16 @@ static const struct ide_port_info cris_port_info __initdata = {
765static int __init init_e100_ide(void) 784static int __init init_e100_ide(void)
766{ 785{
767 hw_regs_t hw; 786 hw_regs_t hw;
768 int ide_offsets[IDE_NR_PORTS], h, i; 787 int h;
769 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 788 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
770 789
771 printk("ide: ETRAX FS built-in ATA DMA controller\n"); 790 printk("ide: ETRAX FS built-in ATA DMA controller\n");
772 791
773 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
774 ide_offsets[i] = cris_ide_reg_addr(i, 0, 1);
775
776 /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
777 ide_offsets[IDE_CONTROL_OFFSET] = cris_ide_reg_addr(6, 1, 0);
778
779 for (h = 0; h < 4; h++) { 792 for (h = 0; h < 4; h++) {
780 ide_hwif_t *hwif = NULL; 793 ide_hwif_t *hwif = NULL;
781 794
782 ide_setup_ports(&hw, cris_ide_base_address(h), 795 cris_setup_ports(&hw, cris_ide_base_address(h));
783 ide_offsets, 796
784 0, 0, cris_ide_ack_intr,
785 ide_default_irq(0));
786 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 797 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
787 if (hwif == NULL) 798 if (hwif == NULL)
788 continue; 799 continue;
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index ac6136001615..ad0e9955f73c 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -618,60 +618,6 @@ abort:
618 618
619EXPORT_SYMBOL(ide_unregister); 619EXPORT_SYMBOL(ide_unregister);
620 620
621
622/**
623 * ide_setup_ports - set up IDE interface ports
624 * @hw: register descriptions
625 * @base: base register
626 * @offsets: table of register offsets
627 * @ctrl: control register
628 * @ack_irq: IRQ ack
629 * @irq: interrupt lie
630 *
631 * Setup hw_regs_t structure described by parameters. You
632 * may set up the hw structure yourself OR use this routine to
633 * do it for you. This is basically a helper
634 *
635 */
636
637void ide_setup_ports ( hw_regs_t *hw,
638 unsigned long base, int *offsets,
639 unsigned long ctrl, unsigned long intr,
640 ide_ack_intr_t *ack_intr,
641/*
642 * ide_io_ops_t *iops,
643 */
644 int irq)
645{
646 int i;
647
648 memset(hw, 0, sizeof(hw_regs_t));
649 for (i = 0; i < IDE_NR_PORTS; i++) {
650 if (offsets[i] == -1) {
651 switch(i) {
652 case IDE_CONTROL_OFFSET:
653 hw->io_ports[i] = ctrl;
654 break;
655#if defined(CONFIG_AMIGA) || defined(CONFIG_MAC)
656 case IDE_IRQ_OFFSET:
657 hw->io_ports[i] = intr;
658 break;
659#endif /* (CONFIG_AMIGA) || (CONFIG_MAC) */
660 default:
661 hw->io_ports[i] = 0;
662 break;
663 }
664 } else {
665 hw->io_ports[i] = base + offsets[i];
666 }
667 }
668 hw->irq = irq;
669 hw->ack_intr = ack_intr;
670/*
671 * hw->iops = iops;
672 */
673}
674
675void ide_init_port_hw(ide_hwif_t *hwif, hw_regs_t *hw) 621void ide_init_port_hw(ide_hwif_t *hwif, hw_regs_t *hw)
676{ 622{
677 memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports)); 623 memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports));
diff --git a/drivers/ide/legacy/buddha.c b/drivers/ide/legacy/buddha.c
index 8bdb79da17e8..50ffa871d5e9 100644
--- a/drivers/ide/legacy/buddha.c
+++ b/drivers/ide/legacy/buddha.c
@@ -56,31 +56,11 @@ static u_int xsurf_bases[XSURF_NUM_HWIFS] __initdata = {
56 XSURF_BASE1, XSURF_BASE2 56 XSURF_BASE1, XSURF_BASE2
57}; 57};
58 58
59
60 /* 59 /*
61 * Offsets from one of the above bases 60 * Offsets from one of the above bases
62 */ 61 */
63 62
64#define BUDDHA_DATA 0x00
65#define BUDDHA_ERROR 0x06 /* see err-bits */
66#define BUDDHA_NSECTOR 0x0a /* nr of sectors to read/write */
67#define BUDDHA_SECTOR 0x0e /* starting sector */
68#define BUDDHA_LCYL 0x12 /* starting cylinder */
69#define BUDDHA_HCYL 0x16 /* high byte of starting cyl */
70#define BUDDHA_SELECT 0x1a /* 101dhhhh , d=drive, hhhh=head */
71#define BUDDHA_STATUS 0x1e /* see status-bits */
72#define BUDDHA_CONTROL 0x11a 63#define BUDDHA_CONTROL 0x11a
73#define XSURF_CONTROL -1 /* X-Surf has no CS1* (Control/AltStat) */
74
75static int buddha_offsets[IDE_NR_PORTS] __initdata = {
76 BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,
77 BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, BUDDHA_CONTROL, -1
78};
79
80static int xsurf_offsets[IDE_NR_PORTS] __initdata = {
81 BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,
82 BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, XSURF_CONTROL, -1
83};
84 64
85 /* 65 /*
86 * Other registers 66 * Other registers
@@ -140,6 +120,26 @@ static int xsurf_ack_intr(ide_hwif_t *hwif)
140 return 1; 120 return 1;
141} 121}
142 122
123static void __init buddha_setup_ports(hw_regs_t *hw, unsigned long base,
124 unsigned long ctl, unsigned long irq_port,
125 ide_ack_intr_t *ack_intr)
126{
127 int i;
128
129 memset(hw, 0, sizeof(*hw));
130
131 hw->io_ports[IDE_DATA_OFFSET] = base;
132
133 for (i = 1; i < 8; i++)
134 hw->io_ports[i] = base + 2 + i * 4;
135
136 hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
137 hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
138
139 hw->irq = IRQ_AMIGA_PORTS;
140 hw->ack_intr = ack_intr;
141}
142
143 /* 143 /*
144 * Probe for a Buddha or Catweasel IDE interface 144 * Probe for a Buddha or Catweasel IDE interface
145 */ 145 */
@@ -202,22 +202,24 @@ fail_base2:
202 printk(KERN_INFO "ide: %s IDE controller\n", 202 printk(KERN_INFO "ide: %s IDE controller\n",
203 buddha_board_name[type]); 203 buddha_board_name[type]);
204 204
205 for(i=0;i<buddha_num_hwifs;i++) { 205 for (i = 0; i < buddha_num_hwifs; i++) {
206 if(type != BOARD_XSURF) { 206 unsigned long base, ctl, irq_port;
207 ide_setup_ports(&hw, (buddha_board+buddha_bases[i]), 207 ide_ack_intr_t *ack_intr;
208 buddha_offsets, 0, 208
209 (buddha_board+buddha_irqports[i]), 209 if (type != BOARD_XSURF) {
210 buddha_ack_intr, 210 base = buddha_board + buddha_bases[i];
211// budda_iops, 211 ctl = base + BUDDHA_CONTROL;
212 IRQ_AMIGA_PORTS); 212 irq_port = buddha_board + buddha_irqports[i];
213 ack_intr = buddha_ack_intr;
213 } else { 214 } else {
214 ide_setup_ports(&hw, (buddha_board+xsurf_bases[i]), 215 base = buddha_board + xsurf_bases[i];
215 xsurf_offsets, 0, 216 /* X-Surf has no CS1* (Control/AltStat) */
216 (buddha_board+xsurf_irqports[i]), 217 ctl = 0;
217 xsurf_ack_intr, 218 irq_port = buddha_board + xsurf_irqports[i];
218// xsurf_iops, 219 ack_intr = xsurf_ack_intr;
219 IRQ_AMIGA_PORTS); 220 }
220 } 221
222 buddha_setup_ports(&hw, base, ctl, irq_port, ack_intr);
221 223
222 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 224 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
223 if (hwif) { 225 if (hwif) {
diff --git a/drivers/ide/legacy/falconide.c b/drivers/ide/legacy/falconide.c
index 85b69a82825f..f044048903b3 100644
--- a/drivers/ide/legacy/falconide.c
+++ b/drivers/ide/legacy/falconide.c
@@ -33,22 +33,8 @@
33 * Offsets from the above base 33 * Offsets from the above base
34 */ 34 */
35 35
36#define ATA_HD_DATA 0x00
37#define ATA_HD_ERROR 0x05 /* see err-bits */
38#define ATA_HD_NSECTOR 0x09 /* nr of sectors to read/write */
39#define ATA_HD_SECTOR 0x0d /* starting sector */
40#define ATA_HD_LCYL 0x11 /* starting cylinder */
41#define ATA_HD_HCYL 0x15 /* high byte of starting cyl */
42#define ATA_HD_SELECT 0x19 /* 101dhhhh , d=drive, hhhh=head */
43#define ATA_HD_STATUS 0x1d /* see status-bits */
44#define ATA_HD_CONTROL 0x39 36#define ATA_HD_CONTROL 0x39
45 37
46static int falconide_offsets[IDE_NR_PORTS] __initdata = {
47 ATA_HD_DATA, ATA_HD_ERROR, ATA_HD_NSECTOR, ATA_HD_SECTOR, ATA_HD_LCYL,
48 ATA_HD_HCYL, ATA_HD_SELECT, ATA_HD_STATUS, ATA_HD_CONTROL, -1
49};
50
51
52 /* 38 /*
53 * falconide_intr_lock is used to obtain access to the IDE interrupt, 39 * falconide_intr_lock is used to obtain access to the IDE interrupt,
54 * which is shared between several drivers. 40 * which is shared between several drivers.
@@ -57,6 +43,22 @@ static int falconide_offsets[IDE_NR_PORTS] __initdata = {
57int falconide_intr_lock; 43int falconide_intr_lock;
58EXPORT_SYMBOL(falconide_intr_lock); 44EXPORT_SYMBOL(falconide_intr_lock);
59 45
46static void __init falconide_setup_ports(hw_regs_t *hw)
47{
48 int i;
49
50 memset(hw, 0, sizeof(*hw));
51
52 hw->io_ports[IDE_DATA_OFFSET] = ATA_HD_BASE;
53
54 for (i = 1; i < 8; i++)
55 hw->io_ports[i] = ATA_HD_BASE + 1 + i * 4;
56
57 hw->io_ports[IDE_CONTROL_OFFSET] = ATA_HD_CONTROL;
58
59 hw->irq = IRQ_MFP_IDE;
60 hw->ack_intr = NULL;
61}
60 62
61 /* 63 /*
62 * Probe for a Falcon IDE interface 64 * Probe for a Falcon IDE interface
@@ -64,16 +66,15 @@ EXPORT_SYMBOL(falconide_intr_lock);
64 66
65static int __init falconide_init(void) 67static int __init falconide_init(void)
66{ 68{
67 if (MACH_IS_ATARI && ATARIHW_PRESENT(IDE)) {
68 hw_regs_t hw; 69 hw_regs_t hw;
69 ide_hwif_t *hwif; 70 ide_hwif_t *hwif;
70 71
72 if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))
73 return 0;
74
71 printk(KERN_INFO "ide: Falcon IDE controller\n"); 75 printk(KERN_INFO "ide: Falcon IDE controller\n");
72 76
73 ide_setup_ports(&hw, ATA_HD_BASE, falconide_offsets, 77 falconide_setup_ports(&hw);
74 0, 0, NULL,
75// falconide_iops,
76 IRQ_MFP_IDE);
77 78
78 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 79 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
79 if (hwif) { 80 if (hwif) {
@@ -85,9 +86,8 @@ static int __init falconide_init(void)
85 86
86 ide_device_add(idx, NULL); 87 ide_device_add(idx, NULL);
87 } 88 }
88 }
89 89
90 return 0; 90 return 0;
91} 91}
92 92
93module_init(falconide_init); 93module_init(falconide_init);
diff --git a/drivers/ide/legacy/gayle.c b/drivers/ide/legacy/gayle.c
index fc29ce75aff1..9d3851d27677 100644
--- a/drivers/ide/legacy/gayle.c
+++ b/drivers/ide/legacy/gayle.c
@@ -34,22 +34,8 @@
34 * Offsets from one of the above bases 34 * Offsets from one of the above bases
35 */ 35 */
36 36
37#define GAYLE_DATA 0x00
38#define GAYLE_ERROR 0x06 /* see err-bits */
39#define GAYLE_NSECTOR 0x0a /* nr of sectors to read/write */
40#define GAYLE_SECTOR 0x0e /* starting sector */
41#define GAYLE_LCYL 0x12 /* starting cylinder */
42#define GAYLE_HCYL 0x16 /* high byte of starting cyl */
43#define GAYLE_SELECT 0x1a /* 101dhhhh , d=drive, hhhh=head */
44#define GAYLE_STATUS 0x1e /* see status-bits */
45#define GAYLE_CONTROL 0x101a 37#define GAYLE_CONTROL 0x101a
46 38
47static int gayle_offsets[IDE_NR_PORTS] __initdata = {
48 GAYLE_DATA, GAYLE_ERROR, GAYLE_NSECTOR, GAYLE_SECTOR, GAYLE_LCYL,
49 GAYLE_HCYL, GAYLE_SELECT, GAYLE_STATUS, -1, -1
50};
51
52
53 /* 39 /*
54 * These are at different offsets from the base 40 * These are at different offsets from the base
55 */ 41 */
@@ -106,6 +92,26 @@ static int gayle_ack_intr_a1200(ide_hwif_t *hwif)
106 return 1; 92 return 1;
107} 93}
108 94
95static void __init gayle_setup_ports(hw_regs_t *hw, unsigned long base,
96 unsigned long ctl, unsigned long irq_port,
97 ide_ack_intr_t *ack_intr);
98{
99 int i;
100
101 memset(hw, 0, sizeof(*hw));
102
103 hw->io_ports[IDE_DATA_OFFSET] = base;
104
105 for (i = 1; i < 8; i++)
106 hw->io_ports[i] = base + 2 + i * 4;
107
108 hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
109 hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
110
111 hw->irq = IRQ_AMIGA_PORTS;
112 hw->ack_intr = ack_intr;
113}
114
109 /* 115 /*
110 * Probe for a Gayle IDE interface (and optionally for an IDE doubler) 116 * Probe for a Gayle IDE interface (and optionally for an IDE doubler)
111 */ 117 */
@@ -167,10 +173,7 @@ found:
167 base = (unsigned long)ZTWO_VADDR(phys_base); 173 base = (unsigned long)ZTWO_VADDR(phys_base);
168 ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0; 174 ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
169 175
170 ide_setup_ports(&hw, base, gayle_offsets, 176 gayle_setup_ports(&hw, base, ctrlport, irqport, ack_intr);
171 ctrlport, irqport, ack_intr,
172// &gayle_iops,
173 IRQ_AMIGA_PORTS);
174 177
175 hwif = ide_find_port(base); 178 hwif = ide_find_port(base);
176 if (hwif) { 179 if (hwif) {
diff --git a/drivers/ide/legacy/macide.c b/drivers/ide/legacy/macide.c
index 06df8df857a3..a61e60737dc7 100644
--- a/drivers/ide/legacy/macide.c
+++ b/drivers/ide/legacy/macide.c
@@ -31,14 +31,6 @@
31 * These match MkLinux so they should be correct. 31 * These match MkLinux so they should be correct.
32 */ 32 */
33 33
34#define IDE_DATA 0x00
35#define IDE_ERROR 0x04 /* see err-bits */
36#define IDE_NSECTOR 0x08 /* nr of sectors to read/write */
37#define IDE_SECTOR 0x0c /* starting sector */
38#define IDE_LCYL 0x10 /* starting cylinder */
39#define IDE_HCYL 0x14 /* high byte of starting cyl */
40#define IDE_SELECT 0x18 /* 101dhhhh , d=drive, hhhh=head */
41#define IDE_STATUS 0x1c /* see status-bits */
42#define IDE_CONTROL 0x38 /* control/altstatus */ 34#define IDE_CONTROL 0x38 /* control/altstatus */
43 35
44/* 36/*
@@ -63,11 +55,6 @@
63 55
64volatile unsigned char *ide_ifr = (unsigned char *) (IDE_BASE + IDE_IFR); 56volatile unsigned char *ide_ifr = (unsigned char *) (IDE_BASE + IDE_IFR);
65 57
66static int macide_offsets[IDE_NR_PORTS] = {
67 IDE_DATA, IDE_ERROR, IDE_NSECTOR, IDE_SECTOR, IDE_LCYL,
68 IDE_HCYL, IDE_SELECT, IDE_STATUS, IDE_CONTROL
69};
70
71int macide_ack_intr(ide_hwif_t* hwif) 58int macide_ack_intr(ide_hwif_t* hwif)
72{ 59{
73 if (*ide_ifr & 0x20) { 60 if (*ide_ifr & 0x20) {
@@ -77,6 +64,22 @@ int macide_ack_intr(ide_hwif_t* hwif)
77 return 0; 64 return 0;
78} 65}
79 66
67static void __init macide_setup_ports(hw_regs_t *hw, unsigned long base,
68 int irq, ide_ack_intr_t *ack_intr)
69{
70 int i;
71
72 memset(hw, 0, sizeof(*hw));
73
74 for (i = 0; i < 8; i++)
75 hw->io_ports[i] = base + i * 4;
76
77 hw->io_ports[IDE_CONTROL_OFFSET] = IDE_CONTROL;
78
79 hw->irq = irq;
80 hw->ack_intr = ack_intr;
81}
82
80static const char *mac_ide_name[] = 83static const char *mac_ide_name[] =
81 { "Quadra", "Powerbook", "Powerbook Baboon" }; 84 { "Quadra", "Powerbook", "Powerbook Baboon" };
82 85
@@ -86,27 +89,27 @@ static const char *mac_ide_name[] =
86 89
87static int __init macide_init(void) 90static int __init macide_init(void)
88{ 91{
89 hw_regs_t hw;
90 ide_hwif_t *hwif; 92 ide_hwif_t *hwif;
93 ide_ack_intr_t *ack_intr;
94 unsigned long base;
95 int irq;
96 hw_regs_t hw;
91 97
92 switch (macintosh_config->ide_type) { 98 switch (macintosh_config->ide_type) {
93 case MAC_IDE_QUADRA: 99 case MAC_IDE_QUADRA:
94 ide_setup_ports(&hw, IDE_BASE, macide_offsets, 100 base = IDE_BASE;
95 0, 0, macide_ack_intr, 101 ack_intr = macide_ack_intr;
96// quadra_ide_iops, 102 irq = IRQ_NUBUS_F;
97 IRQ_NUBUS_F);
98 break; 103 break;
99 case MAC_IDE_PB: 104 case MAC_IDE_PB:
100 ide_setup_ports(&hw, IDE_BASE, macide_offsets, 105 base = IDE_BASE;
101 0, 0, macide_ack_intr, 106 ack_intr = macide_ack_intr;
102// macide_pb_iops, 107 irq = IRQ_NUBUS_C;
103 IRQ_NUBUS_C);
104 break; 108 break;
105 case MAC_IDE_BABOON: 109 case MAC_IDE_BABOON:
106 ide_setup_ports(&hw, BABOON_BASE, macide_offsets, 110 base = BABOON_BASE;
107 0, 0, NULL, 111 ack_intr = NULL;
108// macide_baboon_iops, 112 irq = IRQ_BABOON_1;
109 IRQ_BABOON_1);
110 break; 113 break;
111 default: 114 default:
112 return -ENODEV; 115 return -ENODEV;
@@ -115,6 +118,8 @@ static int __init macide_init(void)
115 printk(KERN_INFO "ide: Macintosh %s IDE controller\n", 118 printk(KERN_INFO "ide: Macintosh %s IDE controller\n",
116 mac_ide_name[macintosh_config->ide_type - 1]); 119 mac_ide_name[macintosh_config->ide_type - 1]);
117 120
121 macide_setup_ports(&hw, base, irq, ack_intr);
122
118 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 123 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
119 if (hwif) { 124 if (hwif) {
120 u8 index = hwif->index; 125 u8 index = hwif->index;
diff --git a/drivers/ide/legacy/q40ide.c b/drivers/ide/legacy/q40ide.c
index 2f0b34d892a1..1381b91bc316 100644
--- a/drivers/ide/legacy/q40ide.c
+++ b/drivers/ide/legacy/q40ide.c
@@ -66,16 +66,12 @@ static int q40ide_default_irq(unsigned long base)
66 66
67 67
68/* 68/*
69 * This is very similar to ide_setup_ports except that addresses 69 * Addresses are pretranslated for Q40 ISA access.
70 * are pretranslated for q40 ISA access
71 */ 70 */
72void q40_ide_setup_ports ( hw_regs_t *hw, 71void q40_ide_setup_ports ( hw_regs_t *hw,
73 unsigned long base, int *offsets, 72 unsigned long base, int *offsets,
74 unsigned long ctrl, unsigned long intr, 73 unsigned long ctrl, unsigned long intr,
75 ide_ack_intr_t *ack_intr, 74 ide_ack_intr_t *ack_intr,
76/*
77 * ide_io_ops_t *iops,
78 */
79 int irq) 75 int irq)
80{ 76{
81 int i; 77 int i;
@@ -92,9 +88,6 @@ void q40_ide_setup_ports ( hw_regs_t *hw,
92 88
93 hw->irq = irq; 89 hw->irq = irq;
94 hw->ack_intr = ack_intr; 90 hw->ack_intr = ack_intr;
95/*
96 * hw->iops = iops;
97 */
98} 91}
99 92
100 93
diff --git a/include/linux/ide.h b/include/linux/ide.h
index e02fd111a7ea..2f66aaa1be2f 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -194,17 +194,6 @@ struct ide_drive_s;
194int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *), 194int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
195 struct hwif_s **); 195 struct hwif_s **);
196 196
197void ide_setup_ports( hw_regs_t *hw,
198 unsigned long base,
199 int *offsets,
200 unsigned long ctrl,
201 unsigned long intr,
202 ide_ack_intr_t *ack_intr,
203#if 0
204 ide_io_ops_t *iops,
205#endif
206 int irq);
207
208static inline void ide_std_init_ports(hw_regs_t *hw, 197static inline void ide_std_init_ports(hw_regs_t *hw,
209 unsigned long io_addr, 198 unsigned long io_addr,
210 unsigned long ctl_addr) 199 unsigned long ctl_addr)