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-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c17
-rw-r--r--arch/arm/mach-at91rm9200/generic.h3
-rw-r--r--arch/arm/mach-at91rm9200/irq.c14
-rw-r--r--arch/arm/mach-at91rm9200/pm.c9
-rw-r--r--include/asm-arm/arch-at91rm9200/system.h12
5 files changed, 38 insertions, 17 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index dcf6136fedf9..0422593032fc 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -14,6 +14,7 @@
14 14
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 16#include <asm/mach/map.h>
17#include <asm/arch/at91rm9200.h>
17 18
18#include <asm/hardware.h> 19#include <asm/hardware.h>
19#include "generic.h" 20#include "generic.h"
@@ -222,6 +223,16 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
222 } 223 }
223}; 224};
224 225
226static void at91rm9200_reset(void)
227{
228 /*
229 * Perform a hardware reset with the use of the Watchdog timer.
230 */
231 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
232 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
233}
234
235
225/* -------------------------------------------------------------------- 236/* --------------------------------------------------------------------
226 * AT91RM9200 processor initialization 237 * AT91RM9200 processor initialization
227 * -------------------------------------------------------------------- */ 238 * -------------------------------------------------------------------- */
@@ -230,6 +241,12 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
230 /* Map peripherals */ 241 /* Map peripherals */
231 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 242 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
232 243
244 at91_arch_reset = at91rm9200_reset;
245 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
246 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
247 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
248 | (1 << AT91RM9200_ID_IRQ6);
249
233 /* Init clock subsystem */ 250 /* Init clock subsystem */
234 at91_clock_init(main_clock); 251 at91_clock_init(main_clock);
235 252
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 694e411e285f..fd98e353c5a2 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -39,3 +39,6 @@ struct at91_gpio_bank {
39}; 39};
40extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 40extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
41extern void __init at91_gpio_irq_setup(void); 41extern void __init at91_gpio_irq_setup(void);
42
43extern void (*at91_arch_reset)(void);
44extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index 3e488117ca91..2cea07a34a85 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -47,6 +47,10 @@ static void at91_aic_unmask_irq(unsigned int irq)
47 at91_sys_write(AT91_AIC_IECR, 1 << irq); 47 at91_sys_write(AT91_AIC_IECR, 1 << irq);
48} 48}
49 49
50unsigned int at91_extern_irq;
51
52#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
53
50static int at91_aic_set_type(unsigned irq, unsigned type) 54static int at91_aic_set_type(unsigned irq, unsigned type)
51{ 55{
52 unsigned int smr, srctype; 56 unsigned int smr, srctype;
@@ -59,14 +63,16 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
59 srctype = AT91_AIC_SRCTYPE_RISING; 63 srctype = AT91_AIC_SRCTYPE_RISING;
60 break; 64 break;
61 case IRQT_LOW: 65 case IRQT_LOW:
62 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 66 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
67 srctype = AT91_AIC_SRCTYPE_LOW;
68 else
63 return -EINVAL; 69 return -EINVAL;
64 srctype = AT91_AIC_SRCTYPE_LOW;
65 break; 70 break;
66 case IRQT_FALLING: 71 case IRQT_FALLING:
67 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 72 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
73 srctype = AT91_AIC_SRCTYPE_FALLING;
74 else
68 return -EINVAL; 75 return -EINVAL;
69 srctype = AT91_AIC_SRCTYPE_FALLING;
70 break; 76 break;
71 default: 77 default:
72 return -EINVAL; 78 return -EINVAL;
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 32c95d8eaacf..5e3b6e306f1a 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -112,7 +112,6 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
112static void (*slow_clock)(void); 112static void (*slow_clock)(void);
113 113
114 114
115
116static int at91_pm_enter(suspend_state_t state) 115static int at91_pm_enter(suspend_state_t state)
117{ 116{
118 at91_gpio_suspend(); 117 at91_gpio_suspend();
@@ -123,13 +122,7 @@ static int at91_pm_enter(suspend_state_t state)
123 (at91_sys_read(AT91_PMC_PCSR) 122 (at91_sys_read(AT91_PMC_PCSR)
124 | (1 << AT91_ID_FIQ) 123 | (1 << AT91_ID_FIQ)
125 | (1 << AT91_ID_SYS) 124 | (1 << AT91_ID_SYS)
126 | (1 << AT91RM9200_ID_IRQ0) 125 | (at91_extern_irq))
127 | (1 << AT91RM9200_ID_IRQ1)
128 | (1 << AT91RM9200_ID_IRQ2)
129 | (1 << AT91RM9200_ID_IRQ3)
130 | (1 << AT91RM9200_ID_IRQ4)
131 | (1 << AT91RM9200_ID_IRQ5)
132 | (1 << AT91RM9200_ID_IRQ6))
133 & at91_sys_read(AT91_AIC_IMR), 126 & at91_sys_read(AT91_AIC_IMR),
134 state); 127 state);
135 128
diff --git a/include/asm-arm/arch-at91rm9200/system.h b/include/asm-arm/arch-at91rm9200/system.h
index 8a2ff472e4cf..1d54185e036d 100644
--- a/include/asm-arm/arch-at91rm9200/system.h
+++ b/include/asm-arm/arch-at91rm9200/system.h
@@ -39,13 +39,15 @@ static inline void arch_idle(void)
39 cpu_do_idle(); 39 cpu_do_idle();
40} 40}
41 41
42void (*at91_arch_reset)(void);
43
42static inline void arch_reset(char mode) 44static inline void arch_reset(char mode)
43{ 45{
44 /* 46 /* call the CPU-specific reset function */
45 * Perform a hardware reset with the use of the Watchdog timer. 47 if (at91_arch_reset)
46 */ 48 (at91_arch_reset)();
47 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); 49
48 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); 50 for (;;) {} /* wait fovever */
49} 51}
50 52
51#define ARCH_ID_AT91RM9200 0x09200080 53#define ARCH_ID_AT91RM9200 0x09200080