diff options
-rw-r--r-- | sound/pci/hda/hda_intel.c | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index ba97795d89c4..8b2e4160de8d 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -859,13 +859,18 @@ static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) | |||
859 | SD_CTL_DMA_START | SD_INT_MASK); | 859 | SD_CTL_DMA_START | SD_INT_MASK); |
860 | } | 860 | } |
861 | 861 | ||
862 | /* stop a stream */ | 862 | /* stop DMA */ |
863 | static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) | 863 | static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev) |
864 | { | 864 | { |
865 | /* stop DMA */ | ||
866 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & | 865 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
867 | ~(SD_CTL_DMA_START | SD_INT_MASK)); | 866 | ~(SD_CTL_DMA_START | SD_INT_MASK)); |
868 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ | 867 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ |
868 | } | ||
869 | |||
870 | /* stop a stream */ | ||
871 | static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) | ||
872 | { | ||
873 | azx_stream_clear(chip, azx_dev); | ||
869 | /* disable SIE */ | 874 | /* disable SIE */ |
870 | azx_writeb(chip, INTCTL, | 875 | azx_writeb(chip, INTCTL, |
871 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); | 876 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); |
@@ -1126,18 +1131,14 @@ static int azx_setup_periods(struct azx *chip, | |||
1126 | return -EINVAL; | 1131 | return -EINVAL; |
1127 | } | 1132 | } |
1128 | 1133 | ||
1129 | /* | 1134 | /* reset stream */ |
1130 | * set up the SD for streaming | 1135 | static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev) |
1131 | */ | ||
1132 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | ||
1133 | { | 1136 | { |
1134 | unsigned char val; | 1137 | unsigned char val; |
1135 | int timeout; | 1138 | int timeout; |
1136 | 1139 | ||
1137 | /* make sure the run bit is zero for SD */ | 1140 | azx_stream_clear(chip, azx_dev); |
1138 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & | 1141 | |
1139 | ~SD_CTL_DMA_START); | ||
1140 | /* reset stream */ | ||
1141 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | | 1142 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
1142 | SD_CTL_STREAM_RESET); | 1143 | SD_CTL_STREAM_RESET); |
1143 | udelay(3); | 1144 | udelay(3); |
@@ -1154,7 +1155,15 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
1154 | while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && | 1155 | while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
1155 | --timeout) | 1156 | --timeout) |
1156 | ; | 1157 | ; |
1158 | } | ||
1157 | 1159 | ||
1160 | /* | ||
1161 | * set up the SD for streaming | ||
1162 | */ | ||
1163 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | ||
1164 | { | ||
1165 | /* make sure the run bit is zero for SD */ | ||
1166 | azx_stream_clear(chip, azx_dev); | ||
1158 | /* program the stream_tag */ | 1167 | /* program the stream_tag */ |
1159 | azx_sd_writel(azx_dev, SD_CTL, | 1168 | azx_sd_writel(azx_dev, SD_CTL, |
1160 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| | 1169 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| |
@@ -1399,6 +1408,8 @@ static int azx_pcm_open(struct snd_pcm_substream *substream) | |||
1399 | runtime->private_data = azx_dev; | 1408 | runtime->private_data = azx_dev; |
1400 | snd_pcm_set_sync(substream); | 1409 | snd_pcm_set_sync(substream); |
1401 | mutex_unlock(&chip->open_mutex); | 1410 | mutex_unlock(&chip->open_mutex); |
1411 | |||
1412 | azx_stream_reset(chip, azx_dev); | ||
1402 | return 0; | 1413 | return 0; |
1403 | } | 1414 | } |
1404 | 1415 | ||