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-rw-r--r--arch/arm/mm/copypage-v4mc.c4
-rw-r--r--arch/arm/mm/copypage-v6.c4
-rw-r--r--arch/arm/mm/copypage-xscale.c4
-rw-r--r--arch/arm/mm/flush.c4
-rw-r--r--arch/arm/mm/init.c20
-rw-r--r--arch/arm/mm/mm-armv.c14
-rw-r--r--arch/arm/mm/mm.h19
-rw-r--r--include/asm-arm/page.h3
8 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index fc69dccdace1..df1645e14b4c 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -20,6 +20,8 @@
20#include <asm/pgtable.h> 20#include <asm/pgtable.h>
21#include <asm/tlbflush.h> 21#include <asm/tlbflush.h>
22 22
23#include "mm.h"
24
23/* 25/*
24 * 0xffff8000 to 0xffffffff is reserved for any ARM architecture 26 * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
25 * specific hacks for copying pages efficiently. 27 * specific hacks for copying pages efficiently.
@@ -27,8 +29,6 @@
27#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ 29#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
28 L_PTE_CACHEABLE) 30 L_PTE_CACHEABLE)
29 31
30#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
31
32static DEFINE_SPINLOCK(minicache_lock); 32static DEFINE_SPINLOCK(minicache_lock);
33 33
34/* 34/*
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 269ce6913ee9..3d0d3a963d20 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -17,6 +17,8 @@
17#include <asm/tlbflush.h> 17#include <asm/tlbflush.h>
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19 19
20#include "mm.h"
21
20#if SHMLBA > 16384 22#if SHMLBA > 16384
21#error FIX ME 23#error FIX ME
22#endif 24#endif
@@ -24,8 +26,6 @@
24#define from_address (0xffff8000) 26#define from_address (0xffff8000)
25#define to_address (0xffffc000) 27#define to_address (0xffffc000)
26 28
27#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
28
29static DEFINE_SPINLOCK(v6_lock); 29static DEFINE_SPINLOCK(v6_lock);
30 30
31/* 31/*
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 42a6ee255ce0..84ebe0aa379e 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -20,6 +20,8 @@
20#include <asm/pgtable.h> 20#include <asm/pgtable.h>
21#include <asm/tlbflush.h> 21#include <asm/tlbflush.h>
22 22
23#include "mm.h"
24
23/* 25/*
24 * 0xffff8000 to 0xffffffff is reserved for any ARM architecture 26 * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
25 * specific hacks for copying pages efficiently. 27 * specific hacks for copying pages efficiently.
@@ -29,8 +31,6 @@
29#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ 31#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
30 L_PTE_CACHEABLE) 32 L_PTE_CACHEABLE)
31 33
32#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
33
34static DEFINE_SPINLOCK(minicache_lock); 34static DEFINE_SPINLOCK(minicache_lock);
35 35
36/* 36/*
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index d438ce41cdd5..1efb05c64db3 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -15,12 +15,12 @@
15#include <asm/system.h> 15#include <asm/system.h>
16#include <asm/tlbflush.h> 16#include <asm/tlbflush.h>
17 17
18#include "mm.h"
19
18#ifdef CONFIG_CPU_CACHE_VIPT 20#ifdef CONFIG_CPU_CACHE_VIPT
19 21
20#define ALIAS_FLUSH_START 0xffff4000 22#define ALIAS_FLUSH_START 0xffff4000
21 23
22#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
23
24static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) 24static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
25{ 25{
26 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT); 26 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fe3f7f625008..1099af6d470a 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -25,6 +25,8 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include "mm.h"
29
28DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 30DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
29 31
30extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 32extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
@@ -44,6 +46,11 @@ static struct meminfo meminfo __initdata = { 0, };
44 */ 46 */
45struct page *empty_zero_page; 47struct page *empty_zero_page;
46 48
49/*
50 * The pmd table for the upper-most set of pages.
51 */
52pmd_t *top_pmd;
53
47void show_mem(void) 54void show_mem(void)
48{ 55{
49 int free = 0, total = 0, reserved = 0; 56 int free = 0, total = 0, reserved = 0;
@@ -83,16 +90,6 @@ void show_mem(void)
83 printk("%d pages swap cached\n", cached); 90 printk("%d pages swap cached\n", cached);
84} 91}
85 92
86static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
87{
88 return pmd_offset(pgd, virt);
89}
90
91static inline pmd_t *pmd_off_k(unsigned long virt)
92{
93 return pmd_off(pgd_offset_k(virt), virt);
94}
95
96#define for_each_nodebank(iter,mi,no) \ 93#define for_each_nodebank(iter,mi,no) \
97 for (iter = 0; iter < mi->nr_banks; iter++) \ 94 for (iter = 0; iter < mi->nr_banks; iter++) \
98 if (mi->bank[iter].node == no) 95 if (mi->bank[iter].node == no)
@@ -229,9 +226,6 @@ static __init void reserve_node_zero(pg_data_t *pgdat)
229 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size); 226 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size);
230} 227}
231 228
232void __init build_mem_type_table(void);
233void __init create_mapping(struct map_desc *md);
234
235static unsigned long __init 229static unsigned long __init
236bootmem_init_node(int node, int initrd_node, struct meminfo *mi) 230bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
237{ 231{
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 38769f5862bc..ee9647823fad 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -23,6 +23,8 @@
23 23
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include "mm.h"
27
26#define CPOLICY_UNCACHED 0 28#define CPOLICY_UNCACHED 0
27#define CPOLICY_BUFFERED 1 29#define CPOLICY_BUFFERED 1
28#define CPOLICY_WRITETHROUGH 2 30#define CPOLICY_WRITETHROUGH 2
@@ -35,8 +37,6 @@ pgprot_t pgprot_kernel;
35 37
36EXPORT_SYMBOL(pgprot_kernel); 38EXPORT_SYMBOL(pgprot_kernel);
37 39
38pmd_t *top_pmd;
39
40struct cachepolicy { 40struct cachepolicy {
41 const char policy[16]; 41 const char policy[16];
42 unsigned int cr_mask; 42 unsigned int cr_mask;
@@ -142,16 +142,6 @@ __setup("noalign", noalign_setup);
142 142
143#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD) 143#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
144 144
145static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
146{
147 return pmd_offset(pgd, virt);
148}
149
150static inline pmd_t *pmd_off_k(unsigned long virt)
151{
152 return pmd_off(pgd_offset_k(virt), virt);
153}
154
155/* 145/*
156 * need to get a 16k page for level 1 146 * need to get a 16k page for level 1
157 */ 147 */
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
new file mode 100644
index 000000000000..8d73ffbce8df
--- /dev/null
+++ b/arch/arm/mm/mm.h
@@ -0,0 +1,19 @@
1/* the upper-most page table pointer */
2extern pmd_t *top_pmd;
3
4#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
5
6static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
7{
8 return pmd_offset(pgd, virt);
9}
10
11static inline pmd_t *pmd_off_k(unsigned long virt)
12{
13 return pmd_off(pgd_offset_k(virt), virt);
14}
15
16struct map_desc;
17
18void __init build_mem_type_table(void);
19void __init create_mapping(struct map_desc *md);
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index b721270b9986..af9c3fe7588c 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -174,9 +174,6 @@ typedef unsigned long pgprot_t;
174 174
175#endif /* STRICT_MM_TYPECHECKS */ 175#endif /* STRICT_MM_TYPECHECKS */
176 176
177/* the upper-most page table pointer */
178extern pmd_t *top_pmd;
179
180#endif /* CONFIG_MMU */ 177#endif /* CONFIG_MMU */
181 178
182#include <asm/memory.h> 179#include <asm/memory.h>