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-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_psc.h9
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h12
-rw-r--r--sound/oss/au1550_ac97.c2
3 files changed, 21 insertions, 2 deletions
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index 5c3e2a38ce12..d7cbacdd21fe 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -39,7 +39,12 @@
39#define PSC0_BASE_ADDR 0xb1a00000 39#define PSC0_BASE_ADDR 0xb1a00000
40#define PSC1_BASE_ADDR 0xb1b00000 40#define PSC1_BASE_ADDR 0xb1b00000
41#define PSC2_BASE_ADDR 0xb0a00000 41#define PSC2_BASE_ADDR 0xb0a00000
42#define PSC3_BASE_ADDR 0xb0d00000 42#define PSC3_BASE_ADDR 0xb0b00000
43#endif
44
45#ifdef CONFIG_SOC_AU1200
46#define PSC0_BASE_ADDR 0xb1a00000
47#define PSC1_BASE_ADDR 0xb1b00000
43#endif 48#endif
44 49
45/* The PSC select and control registers are common to 50/* The PSC select and control registers are common to
@@ -227,6 +232,8 @@ typedef struct psc_i2s {
227#define PSC_I2SCFG_DD_DISABLE (1 << 27) 232#define PSC_I2SCFG_DD_DISABLE (1 << 27)
228#define PSC_I2SCFG_DE_ENABLE (1 << 26) 233#define PSC_I2SCFG_DE_ENABLE (1 << 26)
229#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) 234#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
235#define PSC_I2SCFG_WS(n) ((n & 0xFF) << 16)
236#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
230#define PSC_I2SCFG_WI (1 << 15) 237#define PSC_I2SCFG_WI (1 << 15)
231 238
232#define PSC_I2SCFG_DIV_MASK (3 << 13) 239#define PSC_I2SCFG_DIV_MASK (3 << 13)
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 8fbb4b42a8b5..0f5f4c29f4e8 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -30,8 +30,20 @@
30 30
31 31
32#ifdef CONFIG_MIPS_DB1550 32#ifdef CONFIG_MIPS_DB1550
33
34#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
35#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
36#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
37#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
38
39#define SPI_PSC_BASE PSC0_BASE_ADDR
40#define AC97_PSC_BASE PSC1_BASE_ADDR
41#define SMBUS_PSC_BASE PSC2_BASE_ADDR
42#define I2S_PSC_BASE PSC3_BASE_ADDR
43
33#define BCSR_KSEG1_ADDR 0xAF000000 44#define BCSR_KSEG1_ADDR 0xAF000000
34#define NAND_PHYS_ADDR 0x20000000 45#define NAND_PHYS_ADDR 0x20000000
46
35#else 47#else
36#define BCSR_KSEG1_ADDR 0xAE000000 48#define BCSR_KSEG1_ADDR 0xAE000000
37#endif 49#endif
diff --git a/sound/oss/au1550_ac97.c b/sound/oss/au1550_ac97.c
index c1168fae6be6..9011abe241ab 100644
--- a/sound/oss/au1550_ac97.c
+++ b/sound/oss/au1550_ac97.c
@@ -57,9 +57,9 @@
57#include <asm/io.h> 57#include <asm/io.h>
58#include <asm/uaccess.h> 58#include <asm/uaccess.h>
59#include <asm/hardirq.h> 59#include <asm/hardirq.h>
60#include <asm/mach-au1x00/au1000.h>
61#include <asm/mach-au1x00/au1xxx_psc.h> 60#include <asm/mach-au1x00/au1xxx_psc.h>
62#include <asm/mach-au1x00/au1xxx_dbdma.h> 61#include <asm/mach-au1x00/au1xxx_dbdma.h>
62#include <asm/mach-au1x00/au1xxx.h>
63 63
64#undef OSS_DOCUMENTED_MIXER_SEMANTICS 64#undef OSS_DOCUMENTED_MIXER_SEMANTICS
65 65