diff options
-rw-r--r-- | arch/arm/mach-ixp2000/core.c | 10 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/ixp2000-regs.h | 10 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 6851abaf5524..cfd5bef3190b 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -106,6 +106,16 @@ static struct map_desc ixp2000_io_desc[] __initdata = { | |||
106 | .length = IXP2000_MSF_SIZE, | 106 | .length = IXP2000_MSF_SIZE, |
107 | .type = MT_IXP2000_DEVICE, | 107 | .type = MT_IXP2000_DEVICE, |
108 | }, { | 108 | }, { |
109 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, | ||
110 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), | ||
111 | .length = IXP2000_SCRATCH_RING_SIZE, | ||
112 | .type = MT_IXP2000_DEVICE, | ||
113 | }, { | ||
114 | .virtual = IXP2000_SRAM0_VIRT_BASE, | ||
115 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), | ||
116 | .length = IXP2000_SRAM0_SIZE, | ||
117 | .type = MT_IXP2000_DEVICE, | ||
118 | }, { | ||
109 | .virtual = IXP2000_PCI_IO_VIRT_BASE, | 119 | .virtual = IXP2000_PCI_IO_VIRT_BASE, |
110 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), | 120 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), |
111 | .length = IXP2000_PCI_IO_SIZE, | 121 | .length = IXP2000_PCI_IO_SIZE, |
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index 8cf70ff160af..2b57f91b4ebd 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h | |||
@@ -26,6 +26,8 @@ | |||
26 | * fc000000 da000000 16M PCI CFG0 | 26 | * fc000000 da000000 16M PCI CFG0 |
27 | * fd000000 d8000000 16M PCI I/O | 27 | * fd000000 d8000000 16M PCI I/O |
28 | * fe[0-7]00000 8M per-platform mappings | 28 | * fe[0-7]00000 8M per-platform mappings |
29 | * fe900000 80000000 1M SRAM #0 (first MB) | ||
30 | * fea00000 cb400000 1M SCRATCH ring get/put | ||
29 | * feb00000 c8000000 1M MSF | 31 | * feb00000 c8000000 1M MSF |
30 | * fec00000 df000000 1M PCI CSRs | 32 | * fec00000 df000000 1M PCI CSRs |
31 | * fed00000 de000000 1M PCI CREG | 33 | * fed00000 de000000 1M PCI CREG |
@@ -91,6 +93,14 @@ | |||
91 | #define IXP2000_MSF_VIRT_BASE 0xfeb00000 | 93 | #define IXP2000_MSF_VIRT_BASE 0xfeb00000 |
92 | #define IXP2000_MSF_SIZE 0x00100000 | 94 | #define IXP2000_MSF_SIZE 0x00100000 |
93 | 95 | ||
96 | #define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000 | ||
97 | #define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000 | ||
98 | #define IXP2000_SCRATCH_RING_SIZE 0x00100000 | ||
99 | |||
100 | #define IXP2000_SRAM0_PHYS_BASE 0x80000000 | ||
101 | #define IXP2000_SRAM0_VIRT_BASE 0xfe900000 | ||
102 | #define IXP2000_SRAM0_SIZE 0x00100000 | ||
103 | |||
94 | #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 | 104 | #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 |
95 | #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 | 105 | #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 |
96 | #define IXP2000_PCI_IO_SIZE 0x01000000 | 106 | #define IXP2000_PCI_IO_SIZE 0x01000000 |