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-rw-r--r--arch/arm/configs/davinci_all_defconfig1
-rw-r--r--arch/arm/mach-davinci/Kconfig7
-rw-r--r--arch/arm/mach-davinci/Makefile1
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c323
-rw-r--r--arch/arm/mach-davinci/dm644x.c5
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h5
6 files changed, 342 insertions, 0 deletions
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 22077803e9a6..bd656e8e6e4c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -210,6 +210,7 @@ CONFIG_ARCH_DAVINCI_DM365=y
210# 210#
211CONFIG_MACH_DAVINCI_EVM=y 211CONFIG_MACH_DAVINCI_EVM=y
212CONFIG_MACH_SFFSDR=y 212CONFIG_MACH_SFFSDR=y
213CONFIG_MACH_NEUROS_OSD2=y
213CONFIG_MACH_DAVINCI_DM355_EVM=y 214CONFIG_MACH_DAVINCI_DM355_EVM=y
214CONFIG_MACH_DM355_LEOPARD=y 215CONFIG_MACH_DM355_LEOPARD=y
215CONFIG_MACH_DAVINCI_DM6467_EVM=y 216CONFIG_MACH_DAVINCI_DM6467_EVM=y
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 89d5aa7d43a7..033bfede6b67 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -65,6 +65,13 @@ config MACH_SFFSDR
65 Say Y here to select the Lyrtech Small Form Factor 65 Say Y here to select the Lyrtech Small Form Factor
66 Software Defined Radio (SFFSDR) board. 66 Software Defined Radio (SFFSDR) board.
67 67
68config MACH_NEUROS_OSD2
69 bool "Neuros OSD2 Open Television Set Top Box"
70 depends on ARCH_DAVINCI_DM644x
71 help
72 Configure this option to specify the whether the board used
73 for development is a Neuros OSD2 Open Set Top Box.
74
68config MACH_DAVINCI_DM355_EVM 75config MACH_DAVINCI_DM355_EVM
69 bool "TI DM355 EVM" 76 bool "TI DM355 EVM"
70 default ARCH_DAVINCI_DM355 77 default ARCH_DAVINCI_DM355
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 5eae1a9d3697..eeb9230d8844 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_CP_INTC) += cp_intc.o
23# Board specific 23# Board specific
24obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o 24obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
25obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o 25obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o
26obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o
26obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o 27obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o
27obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o 28obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o
28obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o 29obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
new file mode 100644
index 000000000000..bd9ca079b69d
--- /dev/null
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -0,0 +1,323 @@
1/*
2 * Neuros Technologies OSD2 board support
3 *
4 * Modified from original 644X-EVM board support.
5 * 2008 (c) Neuros Technology, LLC.
6 * 2009 (c) Jorge Luis Zapata Muga <jorgeluis.zapata@gmail.com>
7 * 2009 (c) Andrey A. Porodko <Andrey.Porodko@gmail.com>
8 *
9 * The Neuros OSD 2.0 is the hardware component of the Neuros Open
10 * Internet Television Platform. Hardware is very close to TI
11 * DM644X-EVM board. It has:
12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14 * Additionaly realtime clock, IR remote control receiver,
15 * IR Blaster based on MSP430 (firmware although is different
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds.
18 *
19 * For more information please refer to
20 * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26#include <linux/platform_device.h>
27#include <linux/gpio.h>
28#include <linux/mtd/partitions.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32
33#include <mach/dm644x.h>
34#include <mach/i2c.h>
35#include <mach/serial.h>
36#include <mach/mux.h>
37#include <mach/nand.h>
38#include <mach/mmc.h>
39#include <mach/usb.h>
40
41#define NEUROS_OSD2_PHY_MASK 0x2
42#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
43
44#define DAVINCI_CFC_ATA_BASE 0x01C66000
45
46#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
47#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
48
49#define LXT971_PHY_ID 0x001378e2
50#define LXT971_PHY_MASK 0xfffffff0
51
52#define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
53#define NTOSD2_MSP430_I2C_ADDR 0x59
54#define NTOSD2_MSP430_IRQ 2
55
56/* Neuros OSD2 has a Samsung 256 MByte NAND flash (Dev ID of 0xAA,
57 * 2048 blocks in the device, 64 pages per block, 2048 bytes per
58 * page.
59 */
60
61#define NAND_BLOCK_SIZE SZ_128K
62
63struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
64 {
65 /* UBL (a few copies) plus U-Boot */
66 .name = "bootloader",
67 .offset = 0,
68 .size = 15 * NAND_BLOCK_SIZE,
69 .mask_flags = MTD_WRITEABLE, /* force read-only */
70 }, {
71 /* U-Boot environment */
72 .name = "params",
73 .offset = MTDPART_OFS_APPEND,
74 .size = 1 * NAND_BLOCK_SIZE,
75 .mask_flags = 0,
76 }, {
77 /* Kernel */
78 .name = "kernel",
79 .offset = MTDPART_OFS_APPEND,
80 .size = SZ_4M,
81 .mask_flags = 0,
82 }, {
83 /* File System */
84 .name = "filesystem",
85 .offset = MTDPART_OFS_APPEND,
86 .size = MTDPART_SIZ_FULL,
87 .mask_flags = 0,
88 }
89 /* A few blocks at end hold a flash Bad Block Table. */
90};
91
92static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
93 .parts = davinci_ntosd2_nandflash_partition,
94 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
95 .ecc_mode = NAND_ECC_HW,
96 .options = NAND_USE_FLASH_BBT,
97};
98
99static struct resource davinci_ntosd2_nandflash_resource[] = {
100 {
101 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
102 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
103 .flags = IORESOURCE_MEM,
104 }, {
105 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
106 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
107 .flags = IORESOURCE_MEM,
108 },
109};
110
111static struct platform_device davinci_ntosd2_nandflash_device = {
112 .name = "davinci_nand",
113 .id = 0,
114 .dev = {
115 .platform_data = &davinci_ntosd2_nandflash_data,
116 },
117 .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
118 .resource = davinci_ntosd2_nandflash_resource,
119};
120
121static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
122
123static struct platform_device davinci_fb_device = {
124 .name = "davincifb",
125 .id = -1,
126 .dev = {
127 .dma_mask = &davinci_fb_dma_mask,
128 .coherent_dma_mask = DMA_BIT_MASK(32),
129 },
130 .num_resources = 0,
131};
132
133static struct resource ide_resources[] = {
134 {
135 .start = DAVINCI_CFC_ATA_BASE,
136 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
137 .flags = IORESOURCE_MEM,
138 },
139 {
140 .start = IRQ_IDE,
141 .end = IRQ_IDE,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static u64 ide_dma_mask = DMA_BIT_MASK(32);
147
148static struct platform_device ide_dev = {
149 .name = "palm_bk3710",
150 .id = -1,
151 .resource = ide_resources,
152 .num_resources = ARRAY_SIZE(ide_resources),
153 .dev = {
154 .dma_mask = &ide_dma_mask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 },
157};
158
159static struct snd_platform_data dm644x_ntosd2_snd_data;
160
161static struct gpio_led ntosd2_leds[] = {
162 { .name = "led1_green", .gpio = GPIO(10), },
163 { .name = "led1_red", .gpio = GPIO(11), },
164 { .name = "led2_green", .gpio = GPIO(12), },
165 { .name = "led2_red", .gpio = GPIO(13), },
166};
167
168static struct gpio_led_platform_data ntosd2_leds_data = {
169 .num_leds = ARRAY_SIZE(ntosd2_leds),
170 .leds = ntosd2_leds,
171};
172
173static struct platform_device ntosd2_leds_dev = {
174 .name = "leds-gpio",
175 .id = -1,
176 .dev = {
177 .platform_data = &ntosd2_leds_data,
178 },
179};
180
181
182static struct platform_device *davinci_ntosd2_devices[] __initdata = {
183 &davinci_fb_device,
184 &ntosd2_leds_dev,
185};
186
187static struct davinci_uart_config uart_config __initdata = {
188 .enabled_uarts = (1 << 0),
189};
190
191static void __init davinci_ntosd2_map_io(void)
192{
193 dm644x_init();
194}
195
196/*
197 I2C initialization
198*/
199static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
200 .bus_freq = 20 /* kHz */,
201 .bus_delay = 100 /* usec */,
202};
203
204static struct i2c_board_info __initdata ntosd2_i2c_info[] = {
205};
206
207static int ntosd2_init_i2c(void)
208{
209 int status;
210
211 davinci_init_i2c(&ntosd2_i2c_pdata);
212 status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
213 if (status == 0) {
214 status = gpio_direction_input(NTOSD2_MSP430_IRQ);
215 if (status == 0) {
216 status = gpio_to_irq(NTOSD2_MSP430_IRQ);
217 if (status > 0) {
218 ntosd2_i2c_info[0].irq = status;
219 i2c_register_board_info(1,
220 ntosd2_i2c_info,
221 ARRAY_SIZE(ntosd2_i2c_info));
222 }
223 }
224 }
225 return status;
226}
227
228static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
229 .wires = 4,
230 .version = MMC_CTLR_VERSION_1
231};
232
233
234#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
235 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
236#define HAS_ATA 1
237#else
238#define HAS_ATA 0
239#endif
240
241#if defined(CONFIG_MTD_NAND_DAVINCI) || \
242 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
243#define HAS_NAND 1
244#else
245#define HAS_NAND 0
246#endif
247
248static __init void davinci_ntosd2_init(void)
249{
250 struct clk *aemif_clk;
251 struct davinci_soc_info *soc_info = &davinci_soc_info;
252 int status;
253
254 aemif_clk = clk_get(NULL, "aemif");
255 clk_enable(aemif_clk);
256
257 if (HAS_ATA) {
258 if (HAS_NAND)
259 pr_warning("WARNING: both IDE and Flash are "
260 "enabled, but they share AEMIF pins.\n"
261 "\tDisable IDE for NAND/NOR support.\n");
262 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
263 davinci_cfg_reg(DM644X_ATAEN);
264 davinci_cfg_reg(DM644X_HDIREN);
265 platform_device_register(&ide_dev);
266 } else if (HAS_NAND) {
267 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
268 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
269
270 /* only one device will be jumpered and detected */
271 if (HAS_NAND)
272 platform_device_register(
273 &davinci_ntosd2_nandflash_device);
274 }
275
276 platform_add_devices(davinci_ntosd2_devices,
277 ARRAY_SIZE(davinci_ntosd2_devices));
278
279 /* Initialize I2C interface specific for this board */
280 status = ntosd2_init_i2c();
281 if (status < 0)
282 pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
283 " %d\n", status);
284
285 davinci_serial_init(&uart_config);
286 dm644x_init_asp(&dm644x_ntosd2_snd_data);
287
288 soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK;
289 soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY;
290
291 davinci_setup_usb(1000, 8);
292 /*
293 * Mux the pins to be GPIOs, VLYNQEN is already done at startup.
294 * The AEAWx are five new AEAW pins that can be muxed by separately.
295 * They are a bitmask for GPIO management. According TI
296 * documentation (http://www.ti.com/lit/gpn/tms320dm6446) to employ
297 * gpio(10,11,12,13) for leds any combination of bits works except
298 * four last. So we are to reset all five.
299 */
300 davinci_cfg_reg(DM644X_AEAW0);
301 davinci_cfg_reg(DM644X_AEAW1);
302 davinci_cfg_reg(DM644X_AEAW2);
303 davinci_cfg_reg(DM644X_AEAW3);
304 davinci_cfg_reg(DM644X_AEAW4);
305
306 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
307}
308
309static __init void davinci_ntosd2_irq_init(void)
310{
311 davinci_irq_init();
312}
313
314MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
315 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */
316 .phys_io = IO_PHYS,
317 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
318 .boot_params = (DAVINCI_DDR_BASE + 0x100),
319 .map_io = davinci_ntosd2_map_io,
320 .init_irq = davinci_ntosd2_irq_init,
321 .timer = &davinci_timer,
322 .init_machine = davinci_ntosd2_init,
323MACHINE_END
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 84d3d26831c7..2cd008156dea 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -368,6 +368,11 @@ MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
368MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true) 368MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
369 369
370MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true) 370MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
371MUX_CFG(DM644X, AEAW0, 0, 0, 1, 0, true)
372MUX_CFG(DM644X, AEAW1, 0, 1, 1, 0, true)
373MUX_CFG(DM644X, AEAW2, 0, 2, 1, 0, true)
374MUX_CFG(DM644X, AEAW3, 0, 3, 1, 0, true)
375MUX_CFG(DM644X, AEAW4, 0, 4, 1, 0, true)
371 376
372MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false) 377MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false)
373 378
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index d41ad16966b7..b60c693985ff 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -40,6 +40,11 @@ enum davinci_dm644x_index {
40 40
41 /* AEAW functions */ 41 /* AEAW functions */
42 DM644X_AEAW, 42 DM644X_AEAW,
43 DM644X_AEAW0,
44 DM644X_AEAW1,
45 DM644X_AEAW2,
46 DM644X_AEAW3,
47 DM644X_AEAW4,
43 48
44 /* Memory Stick */ 49 /* Memory Stick */
45 DM644X_MSTK, 50 DM644X_MSTK,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 02:37:52 -0500