diff options
-rw-r--r-- | include/asm-arm/arch-pxa/entry-macro.S | 28 |
1 files changed, 23 insertions, 5 deletions
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index b7bf0dd4fa44..b7e730851461 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S | |||
@@ -20,15 +20,33 @@ | |||
20 | .endm | 20 | .endm |
21 | 21 | ||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | #ifdef CONFIG_PXA27x | 23 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID |
24 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | 24 | mov \tmp, \tmp, lsr #13 |
25 | mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR | 25 | and \tmp, \tmp, #0x7 @ Core G |
26 | #else | 26 | cmp \tmp, #1 |
27 | bhi 1004f | ||
28 | |||
27 | mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 | 29 | mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 |
28 | add \base, \base, #0x00d00000 | 30 | add \base, \base, #0x00d00000 |
29 | ldr \irqstat, [\base, #0] @ ICIP | 31 | ldr \irqstat, [\base, #0] @ ICIP |
30 | ldr \irqnr, [\base, #4] @ ICMR | 32 | ldr \irqnr, [\base, #4] @ ICMR |
31 | #endif | 33 | b 1002f |
34 | |||
35 | 1004: | ||
36 | mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 | ||
37 | mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 | ||
38 | ands \irqstat, \irqstat, \irqnr | ||
39 | beq 1003f | ||
40 | rsb \irqstat, \irqnr, #0 | ||
41 | and \irqstat, \irqstat, \irqnr | ||
42 | clz \irqnr, \irqstat | ||
43 | rsb \irqnr, \irqnr, #31 | ||
44 | add \irqnr, \irqnr, #32 | ||
45 | b 1001f | ||
46 | 1003: | ||
47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | ||
48 | mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR | ||
49 | 1002: | ||
32 | ands \irqnr, \irqstat, \irqnr | 50 | ands \irqnr, \irqstat, \irqnr |
33 | beq 1001f | 51 | beq 1001f |
34 | rsb \irqstat, \irqnr, #0 | 52 | rsb \irqstat, \irqnr, #0 |