aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/sparc/Kconfig18
-rw-r--r--arch/sparc/include/asm/floppy_32.h8
-rw-r--r--arch/sparc/include/asm/floppy_64.h4
-rw-r--r--arch/sparc/include/asm/leon.h3
-rw-r--r--arch/sparc/include/asm/leon_pci.h21
-rw-r--r--arch/sparc/include/asm/pci_32.h24
-rw-r--r--arch/sparc/include/asm/pcic.h2
-rw-r--r--arch/sparc/include/asm/system_32.h2
-rw-r--r--arch/sparc/include/asm/system_64.h2
-rw-r--r--arch/sparc/kernel/Makefile4
-rw-r--r--arch/sparc/kernel/apc.c2
-rw-r--r--arch/sparc/kernel/auxio_32.c2
-rw-r--r--arch/sparc/kernel/chmc.c2
-rw-r--r--arch/sparc/kernel/entry.S8
-rw-r--r--arch/sparc/kernel/leon_kernel.c31
-rw-r--r--arch/sparc/kernel/leon_pci.c253
-rw-r--r--arch/sparc/kernel/leon_pci_grpci2.c897
-rw-r--r--arch/sparc/kernel/module.c2
-rw-r--r--arch/sparc/kernel/pci_common.c4
-rw-r--r--arch/sparc/kernel/pci_schizo.c6
-rw-r--r--arch/sparc/kernel/prom_irqtrans.c2
-rw-r--r--arch/sparc/kernel/psycho_common.c2
-rw-r--r--arch/sparc/kernel/sbus.c4
-rw-r--r--arch/sparc/kernel/setup_32.c2
-rw-r--r--arch/sparc/kernel/setup_64.c2
-rw-r--r--arch/sparc/kernel/smp_32.c6
-rw-r--r--arch/sparc/kernel/sun4d_irq.c126
-rw-r--r--arch/sparc/kernel/sys_sparc32.c2
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c6
-rw-r--r--arch/sparc/kernel/time_64.c2
-rw-r--r--arch/sparc/kernel/traps_64.c2
-rw-r--r--arch/sparc/kernel/unaligned_64.c6
-rw-r--r--arch/sparc/kernel/us2e_cpufreq.c6
-rw-r--r--arch/sparc/kernel/us3_cpufreq.c4
-rw-r--r--arch/sparc/kernel/viohs.c2
-rw-r--r--arch/sparc/kernel/visemul.c14
-rw-r--r--arch/sparc/mm/fault_32.c2
-rw-r--r--arch/sparc/mm/init_32.c2
-rw-r--r--arch/sparc/mm/init_64.c6
-rw-r--r--arch/sparc/mm/srmmu.c4
-rw-r--r--arch/sparc/mm/sun4c.c8
-rw-r--r--arch/sparc/mm/tsb.c6
-rw-r--r--arch/sparc/prom/console_32.c2
-rw-r--r--arch/sparc/prom/init_32.c2
-rw-r--r--arch/sparc/prom/mp.c2
-rw-r--r--drivers/pci/Makefile1
46 files changed, 1401 insertions, 117 deletions
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index af32e17fa170..253986bd6bb6 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -26,7 +26,6 @@ config SPARC
26 select HAVE_DMA_API_DEBUG 26 select HAVE_DMA_API_DEBUG
27 select HAVE_ARCH_JUMP_LABEL 27 select HAVE_ARCH_JUMP_LABEL
28 select HAVE_GENERIC_HARDIRQS 28 select HAVE_GENERIC_HARDIRQS
29 select GENERIC_HARDIRQS_NO_DEPRECATED
30 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_SHOW
31 select USE_GENERIC_SMP_HELPERS if SMP 30 select USE_GENERIC_SMP_HELPERS if SMP
32 31
@@ -528,6 +527,23 @@ config PCI_DOMAINS
528config PCI_SYSCALL 527config PCI_SYSCALL
529 def_bool PCI 528 def_bool PCI
530 529
530config PCIC_PCI
531 bool
532 depends on PCI && SPARC32 && !SPARC_LEON
533 default y
534
535config LEON_PCI
536 bool
537 depends on PCI && SPARC_LEON
538 default y
539
540config GRPCI2
541 bool "GRPCI2 Host Bridge Support"
542 depends on LEON_PCI
543 default y
544 help
545 Say Y here to include the GRPCI2 Host Bridge Driver.
546
531source "drivers/pci/Kconfig" 547source "drivers/pci/Kconfig"
532 548
533source "drivers/pcmcia/Kconfig" 549source "drivers/pcmcia/Kconfig"
diff --git a/arch/sparc/include/asm/floppy_32.h b/arch/sparc/include/asm/floppy_32.h
index 482c79e2a416..7440915e86d8 100644
--- a/arch/sparc/include/asm/floppy_32.h
+++ b/arch/sparc/include/asm/floppy_32.h
@@ -138,7 +138,7 @@ static unsigned char sun_82072_fd_inb(int port)
138 return sun_fdc->data_82072; 138 return sun_fdc->data_82072;
139 case 7: /* FD_DIR */ 139 case 7: /* FD_DIR */
140 return sun_read_dir(); 140 return sun_read_dir();
141 }; 141 }
142 panic("sun_82072_fd_inb: How did I get here?"); 142 panic("sun_82072_fd_inb: How did I get here?");
143} 143}
144 144
@@ -161,7 +161,7 @@ static void sun_82072_fd_outb(unsigned char value, int port)
161 case 4: /* FD_STATUS */ 161 case 4: /* FD_STATUS */
162 sun_fdc->status_82072 = value; 162 sun_fdc->status_82072 = value;
163 break; 163 break;
164 }; 164 }
165 return; 165 return;
166} 166}
167 167
@@ -186,7 +186,7 @@ static unsigned char sun_82077_fd_inb(int port)
186 return sun_fdc->data_82077; 186 return sun_fdc->data_82077;
187 case 7: /* FD_DIR */ 187 case 7: /* FD_DIR */
188 return sun_read_dir(); 188 return sun_read_dir();
189 }; 189 }
190 panic("sun_82077_fd_inb: How did I get here?"); 190 panic("sun_82077_fd_inb: How did I get here?");
191} 191}
192 192
@@ -212,7 +212,7 @@ static void sun_82077_fd_outb(unsigned char value, int port)
212 case 3: /* FD_TDR */ 212 case 3: /* FD_TDR */
213 sun_fdc->tapectl_82077 = value; 213 sun_fdc->tapectl_82077 = value;
214 break; 214 break;
215 }; 215 }
216 return; 216 return;
217} 217}
218 218
diff --git a/arch/sparc/include/asm/floppy_64.h b/arch/sparc/include/asm/floppy_64.h
index 6597ce874d78..bcef1f5a2a6d 100644
--- a/arch/sparc/include/asm/floppy_64.h
+++ b/arch/sparc/include/asm/floppy_64.h
@@ -111,7 +111,7 @@ static unsigned char sun_82077_fd_inb(unsigned long port)
111 case 7: /* FD_DIR */ 111 case 7: /* FD_DIR */
112 /* XXX: Is DCL on 0x80 in sun4m? */ 112 /* XXX: Is DCL on 0x80 in sun4m? */
113 return sbus_readb(&sun_fdc->dir_82077); 113 return sbus_readb(&sun_fdc->dir_82077);
114 }; 114 }
115 panic("sun_82072_fd_inb: How did I get here?"); 115 panic("sun_82072_fd_inb: How did I get here?");
116} 116}
117 117
@@ -135,7 +135,7 @@ static void sun_82077_fd_outb(unsigned char value, unsigned long port)
135 case 4: /* FD_STATUS */ 135 case 4: /* FD_STATUS */
136 sbus_writeb(value, &sun_fdc->status_82077); 136 sbus_writeb(value, &sun_fdc->status_82077);
137 break; 137 break;
138 }; 138 }
139 return; 139 return;
140} 140}
141 141
diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h
index 6bdaf1e43d2a..a4e457f003ed 100644
--- a/arch/sparc/include/asm/leon.h
+++ b/arch/sparc/include/asm/leon.h
@@ -318,6 +318,9 @@ struct device_node;
318extern unsigned int leon_build_device_irq(unsigned int real_irq, 318extern unsigned int leon_build_device_irq(unsigned int real_irq,
319 irq_flow_handler_t flow_handler, 319 irq_flow_handler_t flow_handler,
320 const char *name, int do_ack); 320 const char *name, int do_ack);
321extern void leon_update_virq_handling(unsigned int virq,
322 irq_flow_handler_t flow_handler,
323 const char *name, int do_ack);
321extern void leon_clear_clock_irq(void); 324extern void leon_clear_clock_irq(void);
322extern void leon_load_profile_irq(int cpu, unsigned int limit); 325extern void leon_load_profile_irq(int cpu, unsigned int limit);
323extern void leon_init_timers(irq_handler_t counter_fn); 326extern void leon_init_timers(irq_handler_t counter_fn);
diff --git a/arch/sparc/include/asm/leon_pci.h b/arch/sparc/include/asm/leon_pci.h
new file mode 100644
index 000000000000..42b4b31a82fe
--- /dev/null
+++ b/arch/sparc/include/asm/leon_pci.h
@@ -0,0 +1,21 @@
1/*
2 * asm/leon_pci.h
3 *
4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5 */
6
7#ifndef _ASM_LEON_PCI_H_
8#define _ASM_LEON_PCI_H_
9
10/* PCI related definitions */
11struct leon_pci_info {
12 struct pci_ops *ops;
13 struct resource io_space;
14 struct resource mem_space;
15 int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
16};
17
18extern void leon_pci_init(struct platform_device *ofdev,
19 struct leon_pci_info *info);
20
21#endif /* _ASM_LEON_PCI_H_ */
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 332ac9ab36bc..862e3ce92b15 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -47,7 +47,31 @@ extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
47 47
48#endif /* __KERNEL__ */ 48#endif /* __KERNEL__ */
49 49
50#ifndef CONFIG_LEON_PCI
50/* generic pci stuff */ 51/* generic pci stuff */
51#include <asm-generic/pci.h> 52#include <asm-generic/pci.h>
53#else
54/*
55 * On LEON PCI Memory space is mapped 1:1 with physical address space.
56 *
57 * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses
58 * are converted into CPU addresses to virtual addresses that are mapped with
59 * MMU to the PCI Host PCI I/O space window which are translated to the low
60 * 64Kbytes by the Host controller.
61 */
62
63extern void
64pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
65 struct resource *res);
66
67extern void
68pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
69 struct pci_bus_region *region);
70
71static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
72{
73 return PCI_IRQ_NONE;
74}
75#endif
52 76
53#endif /* __SPARC_PCI_H */ 77#endif /* __SPARC_PCI_H */
diff --git a/arch/sparc/include/asm/pcic.h b/arch/sparc/include/asm/pcic.h
index 7eb5d78f5211..6676cbcc8b6a 100644
--- a/arch/sparc/include/asm/pcic.h
+++ b/arch/sparc/include/asm/pcic.h
@@ -29,7 +29,7 @@ struct linux_pcic {
29 int pcic_imdim; 29 int pcic_imdim;
30}; 30};
31 31
32#ifdef CONFIG_PCI 32#ifdef CONFIG_PCIC_PCI
33extern int pcic_present(void); 33extern int pcic_present(void);
34extern int pcic_probe(void); 34extern int pcic_probe(void);
35extern void pci_time_init(void); 35extern void pci_time_init(void);
diff --git a/arch/sparc/include/asm/system_32.h b/arch/sparc/include/asm/system_32.h
index 47a7e862474e..aba16092a81b 100644
--- a/arch/sparc/include/asm/system_32.h
+++ b/arch/sparc/include/asm/system_32.h
@@ -220,7 +220,7 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int
220 switch (size) { 220 switch (size) {
221 case 4: 221 case 4:
222 return xchg_u32(ptr, x); 222 return xchg_u32(ptr, x);
223 }; 223 }
224 __xchg_called_with_bad_pointer(); 224 __xchg_called_with_bad_pointer();
225 return x; 225 return x;
226} 226}
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h
index 3c96d3bb9f15..10bcabce97b2 100644
--- a/arch/sparc/include/asm/system_64.h
+++ b/arch/sparc/include/asm/system_64.h
@@ -234,7 +234,7 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
234 return xchg32(ptr, x); 234 return xchg32(ptr, x);
235 case 8: 235 case 8:
236 return xchg64(ptr, x); 236 return xchg64(ptr, x);
237 }; 237 }
238 __xchg_called_with_bad_pointer(); 238 __xchg_called_with_bad_pointer();
239 return x; 239 return x;
240} 240}
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index 9cff2709a96d..b90b4a1d070a 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -73,7 +73,9 @@ obj-$(CONFIG_SPARC64_SMP) += cpumap.o
73 73
74obj-y += dma.o 74obj-y += dma.o
75 75
76obj-$(CONFIG_SPARC32_PCI) += pcic.o 76obj-$(CONFIG_PCIC_PCI) += pcic.o
77obj-$(CONFIG_LEON_PCI) += leon_pci.o
78obj-$(CONFIG_GRPCI2) += leon_pci_grpci2.o
77 79
78obj-$(CONFIG_SMP) += trampoline_$(BITS).o smp_$(BITS).o 80obj-$(CONFIG_SMP) += trampoline_$(BITS).o smp_$(BITS).o
79obj-$(CONFIG_SPARC32_SMP) += sun4m_smp.o sun4d_smp.o leon_smp.o 81obj-$(CONFIG_SPARC32_SMP) += sun4m_smp.o sun4d_smp.o leon_smp.o
diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c
index 1e34f29e58bb..caef9deb5866 100644
--- a/arch/sparc/kernel/apc.c
+++ b/arch/sparc/kernel/apc.c
@@ -123,7 +123,7 @@ static long apc_ioctl(struct file *f, unsigned int cmd, unsigned long __arg)
123 123
124 default: 124 default:
125 return -EINVAL; 125 return -EINVAL;
126 }; 126 }
127 127
128 return 0; 128 return 0;
129} 129}
diff --git a/arch/sparc/kernel/auxio_32.c b/arch/sparc/kernel/auxio_32.c
index 8505e0ac78ba..acf5151f3c1d 100644
--- a/arch/sparc/kernel/auxio_32.c
+++ b/arch/sparc/kernel/auxio_32.c
@@ -101,7 +101,7 @@ void set_auxio(unsigned char bits_on, unsigned char bits_off)
101 break; 101 break;
102 default: 102 default:
103 panic("Can't set AUXIO register on this machine."); 103 panic("Can't set AUXIO register on this machine.");
104 }; 104 }
105 spin_unlock_irqrestore(&auxio_lock, flags); 105 spin_unlock_irqrestore(&auxio_lock, flags);
106} 106}
107EXPORT_SYMBOL(set_auxio); 107EXPORT_SYMBOL(set_auxio);
diff --git a/arch/sparc/kernel/chmc.c b/arch/sparc/kernel/chmc.c
index 668c7be5d365..5f450260981d 100644
--- a/arch/sparc/kernel/chmc.c
+++ b/arch/sparc/kernel/chmc.c
@@ -664,7 +664,7 @@ static void chmc_interpret_one_decode_reg(struct chmc *p, int which_bank, u64 va
664 case 0x0: 664 case 0x0:
665 bp->interleave = 16; 665 bp->interleave = 16;
666 break; 666 break;
667 }; 667 }
668 668
669 /* UK[10] is reserved, and UK[11] is not set for the SDRAM 669 /* UK[10] is reserved, and UK[11] is not set for the SDRAM
670 * bank size definition. 670 * bank size definition.
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S
index 8341963f4c84..9fe08a1ea6c6 100644
--- a/arch/sparc/kernel/entry.S
+++ b/arch/sparc/kernel/entry.S
@@ -229,7 +229,7 @@ real_irq_entry:
229#ifdef CONFIG_SMP 229#ifdef CONFIG_SMP
230 .globl patchme_maybe_smp_msg 230 .globl patchme_maybe_smp_msg
231 231
232 cmp %l7, 12 232 cmp %l7, 11
233patchme_maybe_smp_msg: 233patchme_maybe_smp_msg:
234 bgu maybe_smp4m_msg 234 bgu maybe_smp4m_msg
235 nop 235 nop
@@ -293,7 +293,7 @@ maybe_smp4m_msg:
293 WRITE_PAUSE 293 WRITE_PAUSE
294 wr %l4, PSR_ET, %psr 294 wr %l4, PSR_ET, %psr
295 WRITE_PAUSE 295 WRITE_PAUSE
296 sll %o2, 28, %o2 ! shift for simpler checks below 296 sll %o3, 28, %o2 ! shift for simpler checks below
297maybe_smp4m_msg_check_single: 297maybe_smp4m_msg_check_single:
298 andcc %o2, 0x1, %g0 298 andcc %o2, 0x1, %g0
299 beq,a maybe_smp4m_msg_check_mask 299 beq,a maybe_smp4m_msg_check_mask
@@ -1604,7 +1604,7 @@ restore_current:
1604 retl 1604 retl
1605 nop 1605 nop
1606 1606
1607#ifdef CONFIG_PCI 1607#ifdef CONFIG_PCIC_PCI
1608#include <asm/pcic.h> 1608#include <asm/pcic.h>
1609 1609
1610 .align 4 1610 .align 4
@@ -1650,7 +1650,7 @@ pcic_nmi_trap_patch:
1650 rd %psr, %l0 1650 rd %psr, %l0
1651 .word 0 1651 .word 0
1652 1652
1653#endif /* CONFIG_PCI */ 1653#endif /* CONFIG_PCIC_PCI */
1654 1654
1655 .globl flushw_all 1655 .globl flushw_all
1656flushw_all: 1656flushw_all:
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index 2f538ac2e139..d17255a2bbac 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -236,6 +236,21 @@ static unsigned int _leon_build_device_irq(struct platform_device *op,
236 return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0); 236 return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
237} 237}
238 238
239void leon_update_virq_handling(unsigned int virq,
240 irq_flow_handler_t flow_handler,
241 const char *name, int do_ack)
242{
243 unsigned long mask = (unsigned long)irq_get_chip_data(virq);
244
245 mask &= ~LEON_DO_ACK_HW;
246 if (do_ack)
247 mask |= LEON_DO_ACK_HW;
248
249 irq_set_chip_and_handler_name(virq, &leon_irq,
250 flow_handler, name);
251 irq_set_chip_data(virq, (void *)mask);
252}
253
239void __init leon_init_timers(irq_handler_t counter_fn) 254void __init leon_init_timers(irq_handler_t counter_fn)
240{ 255{
241 int irq, eirq; 256 int irq, eirq;
@@ -361,6 +376,22 @@ void __init leon_init_timers(irq_handler_t counter_fn)
361 prom_halt(); 376 prom_halt();
362 } 377 }
363 378
379#ifdef CONFIG_SMP
380 {
381 unsigned long flags;
382
383 /*
384 * In SMP, sun4m adds a IPI handler to IRQ trap handler that
385 * LEON never must take, sun4d and LEON overwrites the branch
386 * with a NOP.
387 */
388 local_irq_save(flags);
389 patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
390 local_flush_cache_all();
391 local_irq_restore(flags);
392 }
393#endif
394
364 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 395 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
365 LEON3_GPTIMER_EN | 396 LEON3_GPTIMER_EN |
366 LEON3_GPTIMER_RL | 397 LEON3_GPTIMER_RL |
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
new file mode 100644
index 000000000000..a8a9a275037d
--- /dev/null
+++ b/arch/sparc/kernel/leon_pci.c
@@ -0,0 +1,253 @@
1/*
2 * leon_pci.c: LEON Host PCI support
3 *
4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5 *
6 * Code is partially derived from pcic.c
7 */
8
9#include <linux/of_device.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
12#include <asm/leon.h>
13#include <asm/leon_pci.h>
14
15/* The LEON architecture does not rely on a BIOS or bootloader to setup
16 * PCI for us. The Linux generic routines are used to setup resources,
17 * reset values of confuration-space registers settings ae preseved.
18 */
19void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
20{
21 struct pci_bus *root_bus;
22
23 root_bus = pci_scan_bus_parented(&ofdev->dev, 0, info->ops, info);
24 if (root_bus) {
25 root_bus->resource[0] = &info->io_space;
26 root_bus->resource[1] = &info->mem_space;
27 root_bus->resource[2] = NULL;
28
29 /* Init all PCI devices into PCI tree */
30 pci_bus_add_devices(root_bus);
31
32 /* Setup IRQs of all devices using custom routines */
33 pci_fixup_irqs(pci_common_swizzle, info->map_irq);
34
35 /* Assign devices with resources */
36 pci_assign_unassigned_resources();
37 }
38}
39
40/* PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
41 * accessed through a Window which is translated to low 64KB in PCI space, the
42 * first 4KB is not used so 60KB is available.
43 *
44 * This function is used by generic code to translate resource addresses into
45 * PCI addresses.
46 */
47void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
48 struct resource *res)
49{
50 struct leon_pci_info *info = dev->bus->sysdata;
51
52 region->start = res->start;
53 region->end = res->end;
54
55 if (res->flags & IORESOURCE_IO) {
56 region->start -= (info->io_space.start - 0x1000);
57 region->end -= (info->io_space.start - 0x1000);
58 }
59}
60EXPORT_SYMBOL(pcibios_resource_to_bus);
61
62/* see pcibios_resource_to_bus() comment */
63void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
64 struct pci_bus_region *region)
65{
66 struct leon_pci_info *info = dev->bus->sysdata;
67
68 res->start = region->start;
69 res->end = region->end;
70
71 if (res->flags & IORESOURCE_IO) {
72 res->start += (info->io_space.start - 0x1000);
73 res->end += (info->io_space.start - 0x1000);
74 }
75}
76EXPORT_SYMBOL(pcibios_bus_to_resource);
77
78void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
79{
80 struct leon_pci_info *info = pbus->sysdata;
81 struct pci_dev *dev;
82 int i, has_io, has_mem;
83 u16 cmd;
84
85 /* Generic PCI bus probing sets these to point at
86 * &io{port,mem}_resouce which is wrong for us.
87 */
88 if (pbus->self == NULL) {
89 pbus->resource[0] = &info->io_space;
90 pbus->resource[1] = &info->mem_space;
91 pbus->resource[2] = NULL;
92 }
93
94 list_for_each_entry(dev, &pbus->devices, bus_list) {
95 /*
96 * We can not rely on that the bootloader has enabled I/O
97 * or memory access to PCI devices. Instead we enable it here
98 * if the device has BARs of respective type.
99 */
100 has_io = has_mem = 0;
101 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
102 unsigned long f = dev->resource[i].flags;
103 if (f & IORESOURCE_IO)
104 has_io = 1;
105 else if (f & IORESOURCE_MEM)
106 has_mem = 1;
107 }
108 /* ROM BARs are mapped into 32-bit memory space */
109 if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
110 dev->resource[PCI_ROM_RESOURCE].flags |=
111 IORESOURCE_ROM_ENABLE;
112 has_mem = 1;
113 }
114 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
115 if (has_io && !(cmd & PCI_COMMAND_IO)) {
116#ifdef CONFIG_PCI_DEBUG
117 printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
118 pci_name(dev));
119#endif
120 cmd |= PCI_COMMAND_IO;
121 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
122 cmd);
123 }
124 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
125#ifdef CONFIG_PCI_DEBUG
126 printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
127 "%s\n", pci_name(dev));
128#endif
129 cmd |= PCI_COMMAND_MEMORY;
130 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
131 cmd);
132 }
133 }
134}
135
136/*
137 * Other archs parse arguments here.
138 */
139char * __devinit pcibios_setup(char *str)
140{
141 return str;
142}
143
144resource_size_t pcibios_align_resource(void *data, const struct resource *res,
145 resource_size_t size, resource_size_t align)
146{
147 return res->start;
148}
149
150int pcibios_enable_device(struct pci_dev *dev, int mask)
151{
152 return pci_enable_resources(dev, mask);
153}
154
155struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
156{
157 /*
158 * Currently the OpenBoot nodes are not connected with the PCI device,
159 * this is because the LEON PROM does not create PCI nodes. Eventually
160 * this will change and the same approach as pcic.c can be used to
161 * match PROM nodes with pci devices.
162 */
163 return NULL;
164}
165EXPORT_SYMBOL(pci_device_to_OF_node);
166
167void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
168{
169#ifdef CONFIG_PCI_DEBUG
170 printk(KERN_DEBUG "LEONPCI: Assigning IRQ %02d to %s\n", irq,
171 pci_name(dev));
172#endif
173 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
174}
175
176/* in/out routines taken from pcic.c
177 *
178 * This probably belongs here rather than ioport.c because
179 * we do not want this crud linked into SBus kernels.
180 * Also, think for a moment about likes of floppy.c that
181 * include architecture specific parts. They may want to redefine ins/outs.
182 *
183 * We do not use horrible macros here because we want to
184 * advance pointer by sizeof(size).
185 */
186void outsb(unsigned long addr, const void *src, unsigned long count)
187{
188 while (count) {
189 count -= 1;
190 outb(*(const char *)src, addr);
191 src += 1;
192 /* addr += 1; */
193 }
194}
195EXPORT_SYMBOL(outsb);
196
197void outsw(unsigned long addr, const void *src, unsigned long count)
198{
199 while (count) {
200 count -= 2;
201 outw(*(const short *)src, addr);
202 src += 2;
203 /* addr += 2; */
204 }
205}
206EXPORT_SYMBOL(outsw);
207
208void outsl(unsigned long addr, const void *src, unsigned long count)
209{
210 while (count) {
211 count -= 4;
212 outl(*(const long *)src, addr);
213 src += 4;
214 /* addr += 4; */
215 }
216}
217EXPORT_SYMBOL(outsl);
218
219void insb(unsigned long addr, void *dst, unsigned long count)
220{
221 while (count) {
222 count -= 1;
223 *(unsigned char *)dst = inb(addr);
224 dst += 1;
225 /* addr += 1; */
226 }
227}
228EXPORT_SYMBOL(insb);
229
230void insw(unsigned long addr, void *dst, unsigned long count)
231{
232 while (count) {
233 count -= 2;
234 *(unsigned short *)dst = inw(addr);
235 dst += 2;
236 /* addr += 2; */
237 }
238}
239EXPORT_SYMBOL(insw);
240
241void insl(unsigned long addr, void *dst, unsigned long count)
242{
243 while (count) {
244 count -= 4;
245 /*
246 * XXX I am sure we are in for an unaligned trap here.
247 */
248 *(unsigned long *)dst = inl(addr);
249 dst += 4;
250 /* addr += 4; */
251 }
252}
253EXPORT_SYMBOL(insl);
diff --git a/arch/sparc/kernel/leon_pci_grpci2.c b/arch/sparc/kernel/leon_pci_grpci2.c
new file mode 100644
index 000000000000..44dc093ee33a
--- /dev/null
+++ b/arch/sparc/kernel/leon_pci_grpci2.c
@@ -0,0 +1,897 @@
1/*
2 * leon_pci_grpci2.c: GRPCI2 Host PCI driver
3 *
4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5 *
6 */
7
8#include <linux/of_device.h>
9#include <linux/kernel.h>
10#include <linux/pci.h>
11#include <linux/delay.h>
12#include <linux/module.h>
13#include <asm/io.h>
14#include <asm/leon.h>
15#include <asm/vaddrs.h>
16#include <asm/sections.h>
17#include <asm/leon_pci.h>
18
19#include "irq.h"
20
21struct grpci2_barcfg {
22 unsigned long pciadr; /* PCI Space Address */
23 unsigned long ahbadr; /* PCI Base address mapped to this AHB addr */
24};
25
26/* Device Node Configuration options:
27 * - barcfgs : Custom Configuration of Host's 6 target BARs
28 * - irq_mask : Limit which PCI interrupts are enabled
29 * - do_reset : Force PCI Reset on startup
30 *
31 * barcfgs
32 * =======
33 *
34 * Optional custom Target BAR configuration (see struct grpci2_barcfg). All
35 * addresses are physical. Array always contains 6 elements (len=2*4*6 bytes)
36 *
37 * -1 means not configured (let host driver do default setup).
38 *
39 * [i*2+0] = PCI Address of BAR[i] on target interface
40 * [i*2+1] = Accessing PCI address of BAR[i] result in this AMBA address
41 *
42 *
43 * irq_mask
44 * ========
45 *
46 * Limit which PCI interrupts are enabled. 0=Disable, 1=Enable. By default
47 * all are enabled. Use this when PCI interrupt pins are floating on PCB.
48 * int, len=4.
49 * bit0 = PCI INTA#
50 * bit1 = PCI INTB#
51 * bit2 = PCI INTC#
52 * bit3 = PCI INTD#
53 *
54 *
55 * reset
56 * =====
57 *
58 * Force PCI reset on startup. int, len=4
59 */
60
61/* Enable Debugging Configuration Space Access */
62#undef GRPCI2_DEBUG_CFGACCESS
63
64/*
65 * GRPCI2 APB Register MAP
66 */
67struct grpci2_regs {
68 unsigned int ctrl; /* 0x00 Control */
69 unsigned int sts_cap; /* 0x04 Status / Capabilities */
70 int res1; /* 0x08 */
71 unsigned int io_map; /* 0x0C I/O Map address */
72 unsigned int dma_ctrl; /* 0x10 DMA */
73 unsigned int dma_bdbase; /* 0x14 DMA */
74 int res2[2]; /* 0x18 */
75 unsigned int bars[6]; /* 0x20 read-only PCI BARs */
76 int res3[2]; /* 0x38 */
77 unsigned int ahbmst_map[16]; /* 0x40 AHB->PCI Map per AHB Master */
78
79 /* PCI Trace Buffer Registers (OPTIONAL) */
80 unsigned int t_ctrl; /* 0x80 */
81 unsigned int t_cnt; /* 0x84 */
82 unsigned int t_adpat; /* 0x88 */
83 unsigned int t_admask; /* 0x8C */
84 unsigned int t_sigpat; /* 0x90 */
85 unsigned int t_sigmask; /* 0x94 */
86 unsigned int t_adstate; /* 0x98 */
87 unsigned int t_sigstate; /* 0x9C */
88};
89
90#define REGLOAD(a) (be32_to_cpu(__raw_readl(&(a))))
91#define REGSTORE(a, v) (__raw_writel(cpu_to_be32(v), &(a)))
92
93#define CTRL_BUS_BIT 16
94
95#define CTRL_RESET (1<<31)
96#define CTRL_SI (1<<27)
97#define CTRL_PE (1<<26)
98#define CTRL_EI (1<<25)
99#define CTRL_ER (1<<24)
100#define CTRL_BUS (0xff<<CTRL_BUS_BIT)
101#define CTRL_HOSTINT 0xf
102
103#define STS_HOST_BIT 31
104#define STS_MST_BIT 30
105#define STS_TAR_BIT 29
106#define STS_DMA_BIT 28
107#define STS_DI_BIT 27
108#define STS_HI_BIT 26
109#define STS_IRQMODE_BIT 24
110#define STS_TRACE_BIT 23
111#define STS_CFGERRVALID_BIT 20
112#define STS_CFGERR_BIT 19
113#define STS_INTTYPE_BIT 12
114#define STS_INTSTS_BIT 8
115#define STS_FDEPTH_BIT 2
116#define STS_FNUM_BIT 0
117
118#define STS_HOST (1<<STS_HOST_BIT)
119#define STS_MST (1<<STS_MST_BIT)
120#define STS_TAR (1<<STS_TAR_BIT)
121#define STS_DMA (1<<STS_DMA_BIT)
122#define STS_DI (1<<STS_DI_BIT)
123#define STS_HI (1<<STS_HI_BIT)
124#define STS_IRQMODE (0x3<<STS_IRQMODE_BIT)
125#define STS_TRACE (1<<STS_TRACE_BIT)
126#define STS_CFGERRVALID (1<<STS_CFGERRVALID_BIT)
127#define STS_CFGERR (1<<STS_CFGERR_BIT)
128#define STS_INTTYPE (0x3f<<STS_INTTYPE_BIT)
129#define STS_INTSTS (0xf<<STS_INTSTS_BIT)
130#define STS_FDEPTH (0x7<<STS_FDEPTH_BIT)
131#define STS_FNUM (0x3<<STS_FNUM_BIT)
132
133#define STS_ISYSERR (1<<17)
134#define STS_IDMA (1<<16)
135#define STS_IDMAERR (1<<15)
136#define STS_IMSTABRT (1<<14)
137#define STS_ITGTABRT (1<<13)
138#define STS_IPARERR (1<<12)
139
140#define STS_ERR_IRQ (STS_ISYSERR | STS_IMSTABRT | STS_ITGTABRT | STS_IPARERR)
141
142struct grpci2_bd_chan {
143 unsigned int ctrl; /* 0x00 DMA Control */
144 unsigned int nchan; /* 0x04 Next DMA Channel Address */
145 unsigned int nbd; /* 0x08 Next Data Descriptor in chan */
146 unsigned int res; /* 0x0C Reserved */
147};
148
149#define BD_CHAN_EN 0x80000000
150#define BD_CHAN_TYPE 0x00300000
151#define BD_CHAN_BDCNT 0x0000ffff
152#define BD_CHAN_EN_BIT 31
153#define BD_CHAN_TYPE_BIT 20
154#define BD_CHAN_BDCNT_BIT 0
155
156struct grpci2_bd_data {
157 unsigned int ctrl; /* 0x00 DMA Data Control */
158 unsigned int pci_adr; /* 0x04 PCI Start Address */
159 unsigned int ahb_adr; /* 0x08 AHB Start address */
160 unsigned int next; /* 0x0C Next Data Descriptor in chan */
161};
162
163#define BD_DATA_EN 0x80000000
164#define BD_DATA_IE 0x40000000
165#define BD_DATA_DR 0x20000000
166#define BD_DATA_TYPE 0x00300000
167#define BD_DATA_ER 0x00080000
168#define BD_DATA_LEN 0x0000ffff
169#define BD_DATA_EN_BIT 31
170#define BD_DATA_IE_BIT 30
171#define BD_DATA_DR_BIT 29
172#define BD_DATA_TYPE_BIT 20
173#define BD_DATA_ER_BIT 19
174#define BD_DATA_LEN_BIT 0
175
176/* GRPCI2 Capability */
177struct grpci2_cap_first {
178 unsigned int ctrl;
179 unsigned int pci2ahb_map[6];
180 unsigned int ext2ahb_map;
181 unsigned int io_map;
182 unsigned int pcibar_size[6];
183};
184#define CAP9_CTRL_OFS 0
185#define CAP9_BAR_OFS 0x4
186#define CAP9_IOMAP_OFS 0x20
187#define CAP9_BARSIZE_OFS 0x24
188
189struct grpci2_priv {
190 struct leon_pci_info info; /* must be on top of this structure */
191 struct grpci2_regs *regs;
192 char irq;
193 char irq_mode; /* IRQ Mode from CAPSTS REG */
194 char bt_enabled;
195 char do_reset;
196 char irq_mask;
197 u32 pciid; /* PCI ID of Host */
198 unsigned char irq_map[4];
199
200 /* Virtual IRQ numbers */
201 unsigned int virq_err;
202 unsigned int virq_dma;
203
204 /* AHB PCI Windows */
205 unsigned long pci_area; /* MEMORY */
206 unsigned long pci_area_end;
207 unsigned long pci_io; /* I/O */
208 unsigned long pci_conf; /* CONFIGURATION */
209 unsigned long pci_conf_end;
210 unsigned long pci_io_va;
211
212 struct grpci2_barcfg tgtbars[6];
213};
214
215DEFINE_SPINLOCK(grpci2_dev_lock);
216struct grpci2_priv *grpci2priv;
217
218int grpci2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
219{
220 struct grpci2_priv *priv = dev->bus->sysdata;
221 int irq_group;
222
223 /* Use default IRQ decoding on PCI BUS0 according slot numbering */
224 irq_group = slot & 0x3;
225 pin = ((pin - 1) + irq_group) & 0x3;
226
227 return priv->irq_map[pin];
228}
229
230static int grpci2_cfg_r32(struct grpci2_priv *priv, unsigned int bus,
231 unsigned int devfn, int where, u32 *val)
232{
233 unsigned int *pci_conf;
234 unsigned long flags;
235 u32 tmp;
236
237 if (where & 0x3)
238 return -EINVAL;
239
240 if (bus == 0 && PCI_SLOT(devfn) != 0)
241 devfn += (0x8 * 6);
242
243 /* Select bus */
244 spin_lock_irqsave(&grpci2_dev_lock, flags);
245 REGSTORE(priv->regs->ctrl, (REGLOAD(priv->regs->ctrl) & ~(0xff << 16)) |
246 (bus << 16));
247 spin_unlock_irqrestore(&grpci2_dev_lock, flags);
248
249 /* clear old status */
250 REGSTORE(priv->regs->sts_cap, (STS_CFGERR | STS_CFGERRVALID));
251
252 pci_conf = (unsigned int *) (priv->pci_conf |
253 (devfn << 8) | (where & 0xfc));
254 tmp = LEON3_BYPASS_LOAD_PA(pci_conf);
255
256 /* Wait until GRPCI2 signals that CFG access is done, it should be
257 * done instantaneously unless a DMA operation is ongoing...
258 */
259 while ((REGLOAD(priv->regs->sts_cap) & STS_CFGERRVALID) == 0)
260 ;
261
262 if (REGLOAD(priv->regs->sts_cap) & STS_CFGERR) {
263 *val = 0xffffffff;
264 } else {
265 /* Bus always little endian (unaffected by byte-swapping) */
266 *val = flip_dword(tmp);
267 }
268
269 return 0;
270}
271
272static int grpci2_cfg_r16(struct grpci2_priv *priv, unsigned int bus,
273 unsigned int devfn, int where, u32 *val)
274{
275 u32 v;
276 int ret;
277
278 if (where & 0x1)
279 return -EINVAL;
280 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v);
281 *val = 0xffff & (v >> (8 * (where & 0x3)));
282 return ret;
283}
284
285static int grpci2_cfg_r8(struct grpci2_priv *priv, unsigned int bus,
286 unsigned int devfn, int where, u32 *val)
287{
288 u32 v;
289 int ret;
290
291 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v);
292 *val = 0xff & (v >> (8 * (where & 3)));
293
294 return ret;
295}
296
297static int grpci2_cfg_w32(struct grpci2_priv *priv, unsigned int bus,
298 unsigned int devfn, int where, u32 val)
299{
300 unsigned int *pci_conf;
301 unsigned long flags;
302
303 if (where & 0x3)
304 return -EINVAL;
305
306 if (bus == 0 && PCI_SLOT(devfn) != 0)
307 devfn += (0x8 * 6);
308
309 /* Select bus */
310 spin_lock_irqsave(&grpci2_dev_lock, flags);
311 REGSTORE(priv->regs->ctrl, (REGLOAD(priv->regs->ctrl) & ~(0xff << 16)) |
312 (bus << 16));
313 spin_unlock_irqrestore(&grpci2_dev_lock, flags);
314
315 /* clear old status */
316 REGSTORE(priv->regs->sts_cap, (STS_CFGERR | STS_CFGERRVALID));
317
318 pci_conf = (unsigned int *) (priv->pci_conf |
319 (devfn << 8) | (where & 0xfc));
320 LEON3_BYPASS_STORE_PA(pci_conf, flip_dword(val));
321
322 /* Wait until GRPCI2 signals that CFG access is done, it should be
323 * done instantaneously unless a DMA operation is ongoing...
324 */
325 while ((REGLOAD(priv->regs->sts_cap) & STS_CFGERRVALID) == 0)
326 ;
327
328 return 0;
329}
330
331static int grpci2_cfg_w16(struct grpci2_priv *priv, unsigned int bus,
332 unsigned int devfn, int where, u32 val)
333{
334 int ret;
335 u32 v;
336
337 if (where & 0x1)
338 return -EINVAL;
339 ret = grpci2_cfg_r32(priv, bus, devfn, where&~3, &v);
340 if (ret)
341 return ret;
342 v = (v & ~(0xffff << (8 * (where & 0x3)))) |
343 ((0xffff & val) << (8 * (where & 0x3)));
344 return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v);
345}
346
347static int grpci2_cfg_w8(struct grpci2_priv *priv, unsigned int bus,
348 unsigned int devfn, int where, u32 val)
349{
350 int ret;
351 u32 v;
352
353 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v);
354 if (ret != 0)
355 return ret;
356 v = (v & ~(0xff << (8 * (where & 0x3)))) |
357 ((0xff & val) << (8 * (where & 0x3)));
358 return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v);
359}
360
361/* Read from Configuration Space. When entering here the PCI layer has taken
362 * the pci_lock spinlock and IRQ is off.
363 */
364static int grpci2_read_config(struct pci_bus *bus, unsigned int devfn,
365 int where, int size, u32 *val)
366{
367 struct grpci2_priv *priv = grpci2priv;
368 unsigned int busno = bus->number;
369 int ret;
370
371 if (PCI_SLOT(devfn) > 15 || (PCI_SLOT(devfn) == 0 && busno == 0)) {
372 *val = ~0;
373 return 0;
374 }
375
376 switch (size) {
377 case 1:
378 ret = grpci2_cfg_r8(priv, busno, devfn, where, val);
379 break;
380 case 2:
381 ret = grpci2_cfg_r16(priv, busno, devfn, where, val);
382 break;
383 case 4:
384 ret = grpci2_cfg_r32(priv, busno, devfn, where, val);
385 break;
386 default:
387 ret = -EINVAL;
388 break;
389 }
390
391#ifdef GRPCI2_DEBUG_CFGACCESS
392 printk(KERN_INFO "grpci2_read_config: [%02x:%02x:%x] ofs=%d val=%x "
393 "size=%d\n", busno, PCI_SLOT(devfn), PCI_FUNC(devfn), where,
394 *val, size);
395#endif
396
397 return ret;
398}
399
400/* Write to Configuration Space. When entering here the PCI layer has taken
401 * the pci_lock spinlock and IRQ is off.
402 */
403static int grpci2_write_config(struct pci_bus *bus, unsigned int devfn,
404 int where, int size, u32 val)
405{
406 struct grpci2_priv *priv = grpci2priv;
407 unsigned int busno = bus->number;
408
409 if (PCI_SLOT(devfn) > 15 || (PCI_SLOT(devfn) == 0 && busno == 0))
410 return 0;
411
412#ifdef GRPCI2_DEBUG_CFGACCESS
413 printk(KERN_INFO "grpci2_write_config: [%02x:%02x:%x] ofs=%d size=%d "
414 "val=%x\n", busno, PCI_SLOT(devfn), PCI_FUNC(devfn),
415 where, size, val);
416#endif
417
418 switch (size) {
419 default:
420 return -EINVAL;
421 case 1:
422 return grpci2_cfg_w8(priv, busno, devfn, where, val);
423 case 2:
424 return grpci2_cfg_w16(priv, busno, devfn, where, val);
425 case 4:
426 return grpci2_cfg_w32(priv, busno, devfn, where, val);
427 }
428}
429
430static struct pci_ops grpci2_ops = {
431 .read = grpci2_read_config,
432 .write = grpci2_write_config,
433};
434
435/* GENIRQ IRQ chip implementation for GRPCI2 irqmode=0..2. In configuration
436 * 3 where all PCI Interrupts has a separate IRQ on the system IRQ controller
437 * this is not needed and the standard IRQ controller can be used.
438 */
439
440static void grpci2_mask_irq(struct irq_data *data)
441{
442 unsigned long flags;
443 unsigned int irqidx;
444 struct grpci2_priv *priv = grpci2priv;
445
446 irqidx = (unsigned int)data->chip_data - 1;
447 if (irqidx > 3) /* only mask PCI interrupts here */
448 return;
449
450 spin_lock_irqsave(&grpci2_dev_lock, flags);
451 REGSTORE(priv->regs->ctrl, REGLOAD(priv->regs->ctrl) & ~(1 << irqidx));
452 spin_unlock_irqrestore(&grpci2_dev_lock, flags);
453}
454
455static void grpci2_unmask_irq(struct irq_data *data)
456{
457 unsigned long flags;
458 unsigned int irqidx;
459 struct grpci2_priv *priv = grpci2priv;
460
461 irqidx = (unsigned int)data->chip_data - 1;
462 if (irqidx > 3) /* only unmask PCI interrupts here */
463 return;
464
465 spin_lock_irqsave(&grpci2_dev_lock, flags);
466 REGSTORE(priv->regs->ctrl, REGLOAD(priv->regs->ctrl) | (1 << irqidx));
467 spin_unlock_irqrestore(&grpci2_dev_lock, flags);
468}
469
470static unsigned int grpci2_startup_irq(struct irq_data *data)
471{
472 grpci2_unmask_irq(data);
473 return 0;
474}
475
476static void grpci2_shutdown_irq(struct irq_data *data)
477{
478 grpci2_mask_irq(data);
479}
480
481static struct irq_chip grpci2_irq = {
482 .name = "grpci2",
483 .irq_startup = grpci2_startup_irq,
484 .irq_shutdown = grpci2_shutdown_irq,
485 .irq_mask = grpci2_mask_irq,
486 .irq_unmask = grpci2_unmask_irq,
487};
488
489/* Handle one or multiple IRQs from the PCI core */
490static void grpci2_pci_flow_irq(unsigned int irq, struct irq_desc *desc)
491{
492 struct grpci2_priv *priv = grpci2priv;
493 int i, ack = 0;
494 unsigned int ctrl, sts_cap, pci_ints;
495
496 ctrl = REGLOAD(priv->regs->ctrl);
497 sts_cap = REGLOAD(priv->regs->sts_cap);
498
499 /* Error Interrupt? */
500 if (sts_cap & STS_ERR_IRQ) {
501 generic_handle_irq(priv->virq_err);
502 ack = 1;
503 }
504
505 /* PCI Interrupt? */
506 pci_ints = ((~sts_cap) >> STS_INTSTS_BIT) & ctrl & CTRL_HOSTINT;
507 if (pci_ints) {
508 /* Call respective PCI Interrupt handler */
509 for (i = 0; i < 4; i++) {
510 if (pci_ints & (1 << i))
511 generic_handle_irq(priv->irq_map[i]);
512 }
513 ack = 1;
514 }
515
516 /*
517 * Decode DMA Interrupt only when shared with Err and PCI INTX#, when
518 * the DMA is a unique IRQ the DMA interrupts doesn't end up here, they
519 * goes directly to DMA ISR.
520 */
521 if ((priv->irq_mode == 0) && (sts_cap & (STS_IDMA | STS_IDMAERR))) {
522 generic_handle_irq(priv->virq_dma);
523 ack = 1;
524 }
525
526 /*
527 * Call "first level" IRQ chip end-of-irq handler. It will ACK LEON IRQ
528 * Controller, this must be done after IRQ sources have been handled to
529 * avoid double IRQ generation
530 */
531 if (ack)
532 desc->irq_data.chip->irq_eoi(&desc->irq_data);
533}
534
535/* Create a virtual IRQ */
536static unsigned int grpci2_build_device_irq(unsigned int irq)
537{
538 unsigned int virq = 0, pil;
539
540 pil = 1 << 8;
541 virq = irq_alloc(irq, pil);
542 if (virq == 0)
543 goto out;
544
545 irq_set_chip_and_handler_name(virq, &grpci2_irq, handle_simple_irq,
546 "pcilvl");
547 irq_set_chip_data(virq, (void *)irq);
548
549out:
550 return virq;
551}
552
553void grpci2_hw_init(struct grpci2_priv *priv)
554{
555 u32 ahbadr, pciadr, bar_sz, capptr, io_map, data;
556 struct grpci2_regs *regs = priv->regs;
557 int i;
558 struct grpci2_barcfg *barcfg = priv->tgtbars;
559
560 /* Reset any earlier setup */
561 if (priv->do_reset) {
562 printk(KERN_INFO "GRPCI2: Resetting PCI bus\n");
563 REGSTORE(regs->ctrl, CTRL_RESET);
564 ssleep(1); /* Wait for boards to settle */
565 }
566 REGSTORE(regs->ctrl, 0);
567 REGSTORE(regs->sts_cap, ~0); /* Clear Status */
568 REGSTORE(regs->dma_ctrl, 0);
569 REGSTORE(regs->dma_bdbase, 0);
570
571 /* Translate I/O accesses to 0, I/O Space always @ PCI low 64Kbytes */
572 REGSTORE(regs->io_map, REGLOAD(regs->io_map) & 0x0000ffff);
573
574 /* set 1:1 mapping between AHB -> PCI memory space, for all Masters
575 * Each AHB master has it's own mapping registers. Max 16 AHB masters.
576 */
577 for (i = 0; i < 16; i++)
578 REGSTORE(regs->ahbmst_map[i], priv->pci_area);
579
580 /* Get the GRPCI2 Host PCI ID */
581 grpci2_cfg_r32(priv, 0, 0, PCI_VENDOR_ID, &priv->pciid);
582
583 /* Get address to first (always defined) capability structure */
584 grpci2_cfg_r8(priv, 0, 0, PCI_CAPABILITY_LIST, &capptr);
585
586 /* Enable/Disable Byte twisting */
587 grpci2_cfg_r32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, &io_map);
588 io_map = (io_map & ~0x1) | (priv->bt_enabled ? 1 : 0);
589 grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, io_map);
590
591 /* Setup the Host's PCI Target BARs for other peripherals to access,
592 * and do DMA to the host's memory. The target BARs can be sized and
593 * enabled individually.
594 *
595 * User may set custom target BARs, but default is:
596 * The first BARs is used to map kernel low (DMA is part of normal
597 * region on sparc which is SRMMU_MAXMEM big) main memory 1:1 to the
598 * PCI bus, the other BARs are disabled. We assume that the first BAR
599 * is always available.
600 */
601 for (i = 0; i < 6; i++) {
602 if (barcfg[i].pciadr != ~0 && barcfg[i].ahbadr != ~0) {
603 /* Target BARs must have the proper alignment */
604 ahbadr = barcfg[i].ahbadr;
605 pciadr = barcfg[i].pciadr;
606 bar_sz = ((pciadr - 1) & ~pciadr) + 1;
607 } else {
608 if (i == 0) {
609 /* Map main memory */
610 bar_sz = 0xf0000008; /* 256MB prefetchable */
611 ahbadr = 0xf0000000 & (u32)__pa(PAGE_ALIGN(
612 (unsigned long) &_end));
613 pciadr = ahbadr;
614 } else {
615 bar_sz = 0;
616 ahbadr = 0;
617 pciadr = 0;
618 }
619 }
620 grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BARSIZE_OFS+i*4, bar_sz);
621 grpci2_cfg_w32(priv, 0, 0, PCI_BASE_ADDRESS_0+i*4, pciadr);
622 grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BAR_OFS+i*4, ahbadr);
623 printk(KERN_INFO " TGT BAR[%d]: 0x%08x (PCI)-> 0x%08x\n",
624 i, pciadr, ahbadr);
625 }
626
627 /* set as bus master and enable pci memory responses */
628 grpci2_cfg_r32(priv, 0, 0, PCI_COMMAND, &data);
629 data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
630 grpci2_cfg_w32(priv, 0, 0, PCI_COMMAND, data);
631
632 /* Enable Error respone (CPU-TRAP) on illegal memory access. */
633 REGSTORE(regs->ctrl, CTRL_ER | CTRL_PE);
634}
635
636static irqreturn_t grpci2_jump_interrupt(int irq, void *arg)
637{
638 printk(KERN_ERR "GRPCI2: Jump IRQ happened\n");
639 return IRQ_NONE;
640}
641
642/* Handle GRPCI2 Error Interrupt */
643static irqreturn_t grpci2_err_interrupt(int irq, void *arg)
644{
645 struct grpci2_priv *priv = arg;
646 struct grpci2_regs *regs = priv->regs;
647 unsigned int status;
648
649 status = REGLOAD(regs->sts_cap);
650 if ((status & STS_ERR_IRQ) == 0)
651 return IRQ_NONE;
652
653 if (status & STS_IPARERR)
654 printk(KERN_ERR "GRPCI2: Parity Error\n");
655
656 if (status & STS_ITGTABRT)
657 printk(KERN_ERR "GRPCI2: Target Abort\n");
658
659 if (status & STS_IMSTABRT)
660 printk(KERN_ERR "GRPCI2: Master Abort\n");
661
662 if (status & STS_ISYSERR)
663 printk(KERN_ERR "GRPCI2: System Error\n");
664
665 /* Clear handled INT TYPE IRQs */
666 REGSTORE(regs->sts_cap, status & STS_ERR_IRQ);
667
668 return IRQ_HANDLED;
669}
670
671static int __devinit grpci2_of_probe(struct platform_device *ofdev)
672{
673 struct grpci2_regs *regs;
674 struct grpci2_priv *priv;
675 int err, i, len;
676 const int *tmp;
677 unsigned int capability;
678
679 if (grpci2priv) {
680 printk(KERN_ERR "GRPCI2: only one GRPCI2 core supported\n");
681 return -ENODEV;
682 }
683
684 if (ofdev->num_resources < 3) {
685 printk(KERN_ERR "GRPCI2: not enough APB/AHB resources\n");
686 return -EIO;
687 }
688
689 /* Find Device Address */
690 regs = of_ioremap(&ofdev->resource[0], 0,
691 resource_size(&ofdev->resource[0]),
692 "grlib-grpci2 regs");
693 if (regs == NULL) {
694 printk(KERN_ERR "GRPCI2: ioremap failed\n");
695 return -EIO;
696 }
697
698 /*
699 * Check that we're in Host Slot and that we can act as a Host Bridge
700 * and not only as target.
701 */
702 capability = REGLOAD(regs->sts_cap);
703 if ((capability & STS_HOST) || !(capability & STS_MST)) {
704 printk(KERN_INFO "GRPCI2: not in host system slot\n");
705 err = -EIO;
706 goto err1;
707 }
708
709 priv = grpci2priv = kzalloc(sizeof(struct grpci2_priv), GFP_KERNEL);
710 if (grpci2priv == NULL) {
711 err = -ENOMEM;
712 goto err1;
713 }
714 memset(grpci2priv, 0, sizeof(*grpci2priv));
715 priv->regs = regs;
716 priv->irq = ofdev->archdata.irqs[0]; /* BASE IRQ */
717 priv->irq_mode = (capability & STS_IRQMODE) >> STS_IRQMODE_BIT;
718
719 printk(KERN_INFO "GRPCI2: host found at %p, irq%d\n", regs, priv->irq);
720
721 /* Byte twisting should be made configurable from kernel command line */
722 priv->bt_enabled = 1;
723
724 /* Let user do custom Target BAR assignment */
725 tmp = of_get_property(ofdev->dev.of_node, "barcfg", &len);
726 if (tmp && (len == 2*4*6))
727 memcpy(priv->tgtbars, tmp, 2*4*6);
728 else
729 memset(priv->tgtbars, -1, 2*4*6);
730
731 /* Limit IRQ unmasking in irq_mode 2 and 3 */
732 tmp = of_get_property(ofdev->dev.of_node, "irq_mask", &len);
733 if (tmp && (len == 4))
734 priv->do_reset = *tmp;
735 else
736 priv->irq_mask = 0xf;
737
738 /* Optional PCI reset. Force PCI reset on startup */
739 tmp = of_get_property(ofdev->dev.of_node, "reset", &len);
740 if (tmp && (len == 4))
741 priv->do_reset = *tmp;
742 else
743 priv->do_reset = 0;
744
745 /* Find PCI Memory, I/O and Configuration Space Windows */
746 priv->pci_area = ofdev->resource[1].start;
747 priv->pci_area_end = ofdev->resource[1].end+1;
748 priv->pci_io = ofdev->resource[2].start;
749 priv->pci_conf = ofdev->resource[2].start + 0x10000;
750 priv->pci_conf_end = priv->pci_conf + 0x10000;
751 priv->pci_io_va = (unsigned long)ioremap(priv->pci_io, 0x10000);
752 if (!priv->pci_io_va) {
753 err = -EIO;
754 goto err2;
755 }
756
757 printk(KERN_INFO
758 "GRPCI2: MEMORY SPACE [0x%08lx - 0x%08lx]\n"
759 " I/O SPACE [0x%08lx - 0x%08lx]\n"
760 " CONFIG SPACE [0x%08lx - 0x%08lx]\n",
761 priv->pci_area, priv->pci_area_end-1,
762 priv->pci_io, priv->pci_conf-1,
763 priv->pci_conf, priv->pci_conf_end-1);
764
765 /*
766 * I/O Space resources in I/O Window mapped into Virtual Adr Space
767 * We never use low 4KB because some devices seem have problems using
768 * address 0.
769 */
770 memset(&priv->info.io_space, 0, sizeof(struct resource));
771 priv->info.io_space.name = "GRPCI2 PCI I/O Space";
772 priv->info.io_space.start = priv->pci_io_va + 0x1000;
773 priv->info.io_space.end = priv->pci_io_va + 0x10000 - 1;
774 priv->info.io_space.flags = IORESOURCE_IO;
775
776 /*
777 * GRPCI2 has no prefetchable memory, map everything as
778 * non-prefetchable memory
779 */
780 memset(&priv->info.mem_space, 0, sizeof(struct resource));
781 priv->info.mem_space.name = "GRPCI2 PCI MEM Space";
782 priv->info.mem_space.start = priv->pci_area;
783 priv->info.mem_space.end = priv->pci_area_end - 1;
784 priv->info.mem_space.flags = IORESOURCE_MEM;
785
786 if (request_resource(&iomem_resource, &priv->info.mem_space) < 0)
787 goto err3;
788 if (request_resource(&ioport_resource, &priv->info.io_space) < 0)
789 goto err4;
790
791 grpci2_hw_init(priv);
792
793 /*
794 * Get PCI Interrupt to System IRQ mapping and setup IRQ handling
795 * Error IRQ always on PCI INTA.
796 */
797 if (priv->irq_mode < 2) {
798 /* All PCI interrupts are shared using the same system IRQ */
799 leon_update_virq_handling(priv->irq, grpci2_pci_flow_irq,
800 "pcilvl", 0);
801
802 priv->irq_map[0] = grpci2_build_device_irq(1);
803 priv->irq_map[1] = grpci2_build_device_irq(2);
804 priv->irq_map[2] = grpci2_build_device_irq(3);
805 priv->irq_map[3] = grpci2_build_device_irq(4);
806
807 priv->virq_err = grpci2_build_device_irq(5);
808 if (priv->irq_mode & 1)
809 priv->virq_dma = ofdev->archdata.irqs[1];
810 else
811 priv->virq_dma = grpci2_build_device_irq(6);
812
813 /* Enable IRQs on LEON IRQ controller */
814 err = request_irq(priv->irq, grpci2_jump_interrupt, 0,
815 "GRPCI2_JUMP", priv);
816 if (err)
817 printk(KERN_ERR "GRPCI2: ERR IRQ request failed\n");
818 } else {
819 /* All PCI interrupts have an unique IRQ interrupt */
820 for (i = 0; i < 4; i++) {
821 /* Make LEON IRQ layer handle level IRQ by acking */
822 leon_update_virq_handling(ofdev->archdata.irqs[i],
823 handle_fasteoi_irq, "pcilvl",
824 1);
825 priv->irq_map[i] = ofdev->archdata.irqs[i];
826 }
827 priv->virq_err = priv->irq_map[0];
828 if (priv->irq_mode & 1)
829 priv->virq_dma = ofdev->archdata.irqs[4];
830 else
831 priv->virq_dma = priv->irq_map[0];
832
833 /* Unmask all PCI interrupts, request_irq will not do that */
834 REGSTORE(regs->ctrl, REGLOAD(regs->ctrl)|(priv->irq_mask&0xf));
835 }
836
837 /* Setup IRQ handler for non-configuration space access errors */
838 err = request_irq(priv->virq_err, grpci2_err_interrupt, IRQF_SHARED,
839 "GRPCI2_ERR", priv);
840 if (err) {
841 printk(KERN_DEBUG "GRPCI2: ERR VIRQ request failed: %d\n", err);
842 goto err5;
843 }
844
845 /*
846 * Enable Error Interrupts. PCI interrupts are unmasked once request_irq
847 * is called by the PCI Device drivers
848 */
849 REGSTORE(regs->ctrl, REGLOAD(regs->ctrl) | CTRL_EI | CTRL_SI);
850
851 /* Init common layer and scan buses */
852 priv->info.ops = &grpci2_ops;
853 priv->info.map_irq = grpci2_map_irq;
854 leon_pci_init(ofdev, &priv->info);
855
856 return 0;
857
858err5:
859 release_resource(&priv->info.io_space);
860err4:
861 release_resource(&priv->info.mem_space);
862err3:
863 err = -ENOMEM;
864 iounmap((void *)priv->pci_io_va);
865err2:
866 kfree(priv);
867err1:
868 of_iounmap(&ofdev->resource[0], regs,
869 resource_size(&ofdev->resource[0]));
870 return err;
871}
872
873static struct of_device_id grpci2_of_match[] = {
874 {
875 .name = "GAISLER_GRPCI2",
876 },
877 {
878 .name = "01_07c",
879 },
880 {},
881};
882
883static struct platform_driver grpci2_of_driver = {
884 .driver = {
885 .name = "grpci2",
886 .owner = THIS_MODULE,
887 .of_match_table = grpci2_of_match,
888 },
889 .probe = grpci2_of_probe,
890};
891
892static int __init grpci2_init(void)
893{
894 return platform_driver_register(&grpci2_of_driver);
895}
896
897subsys_initcall(grpci2_init);
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 8d348c474a2f..99ba5baa9497 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -214,7 +214,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
214 me->name, 214 me->name,
215 (int) (ELF_R_TYPE(rel[i].r_info) & 0xff)); 215 (int) (ELF_R_TYPE(rel[i].r_info) & 0xff));
216 return -ENOEXEC; 216 return -ENOEXEC;
217 }; 217 }
218 } 218 }
219 return 0; 219 return 0;
220} 220}
diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index 6e3874b64488..a6895987fb70 100644
--- a/arch/sparc/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
@@ -281,7 +281,7 @@ static int sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
281 case 4: 281 case 4:
282 *value = ret & 0xffffffff; 282 *value = ret & 0xffffffff;
283 break; 283 break;
284 }; 284 }
285 285
286 286
287 return PCIBIOS_SUCCESSFUL; 287 return PCIBIOS_SUCCESSFUL;
@@ -456,7 +456,7 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
456 456
457 default: 457 default:
458 break; 458 break;
459 }; 459 }
460 } 460 }
461 461
462 if (!saw_io || !saw_mem) { 462 if (!saw_io || !saw_mem) {
diff --git a/arch/sparc/kernel/pci_schizo.c b/arch/sparc/kernel/pci_schizo.c
index 283fbc329a43..f030b02edddd 100644
--- a/arch/sparc/kernel/pci_schizo.c
+++ b/arch/sparc/kernel/pci_schizo.c
@@ -264,7 +264,7 @@ static void schizo_check_iommu_error_pbm(struct pci_pbm_info *pbm,
264 default: 264 default:
265 type_string = "ECC Error"; 265 type_string = "ECC Error";
266 break; 266 break;
267 }; 267 }
268 printk("%s: IOMMU Error, type[%s]\n", 268 printk("%s: IOMMU Error, type[%s]\n",
269 pbm->name, type_string); 269 pbm->name, type_string);
270 270
@@ -319,7 +319,7 @@ static void schizo_check_iommu_error_pbm(struct pci_pbm_info *pbm,
319 default: 319 default:
320 type_string = "ECC Error"; 320 type_string = "ECC Error";
321 break; 321 break;
322 }; 322 }
323 printk("%s: IOMMU TAG(%d)[error(%s) ctx(%x) wr(%d) str(%d) " 323 printk("%s: IOMMU TAG(%d)[error(%s) ctx(%x) wr(%d) str(%d) "
324 "sz(%dK) vpg(%08lx)]\n", 324 "sz(%dK) vpg(%08lx)]\n",
325 pbm->name, i, type_string, 325 pbm->name, i, type_string,
@@ -1328,7 +1328,7 @@ static int __devinit schizo_pbm_init(struct pci_pbm_info *pbm,
1328 default: 1328 default:
1329 chipset_name = "SCHIZO"; 1329 chipset_name = "SCHIZO";
1330 break; 1330 break;
1331 }; 1331 }
1332 1332
1333 /* For SCHIZO, three OBP regs: 1333 /* For SCHIZO, three OBP regs:
1334 * 1) PBM controller regs 1334 * 1) PBM controller regs
diff --git a/arch/sparc/kernel/prom_irqtrans.c b/arch/sparc/kernel/prom_irqtrans.c
index 570b98f6e897..40e4936bd479 100644
--- a/arch/sparc/kernel/prom_irqtrans.c
+++ b/arch/sparc/kernel/prom_irqtrans.c
@@ -694,7 +694,7 @@ static unsigned int sbus_of_build_irq(struct device_node *dp,
694 case 3: 694 case 3:
695 iclr = reg_base + SYSIO_ICLR_SLOT3; 695 iclr = reg_base + SYSIO_ICLR_SLOT3;
696 break; 696 break;
697 }; 697 }
698 698
699 iclr += ((unsigned long)sbus_level - 1UL) * 8UL; 699 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
700 } 700 }
diff --git a/arch/sparc/kernel/psycho_common.c b/arch/sparc/kernel/psycho_common.c
index fe2af66bb198..8db48e808ed4 100644
--- a/arch/sparc/kernel/psycho_common.c
+++ b/arch/sparc/kernel/psycho_common.c
@@ -228,7 +228,7 @@ void psycho_check_iommu_error(struct pci_pbm_info *pbm,
228 default: 228 default:
229 type_str = "ECC Error"; 229 type_str = "ECC Error";
230 break; 230 break;
231 }; 231 }
232 printk(KERN_ERR "%s: IOMMU Error, type[%s]\n", 232 printk(KERN_ERR "%s: IOMMU Error, type[%s]\n",
233 pbm->name, type_str); 233 pbm->name, type_str);
234 234
diff --git a/arch/sparc/kernel/sbus.c b/arch/sparc/kernel/sbus.c
index 2ca32d13abcf..a161b9c77f05 100644
--- a/arch/sparc/kernel/sbus.c
+++ b/arch/sparc/kernel/sbus.c
@@ -97,7 +97,7 @@ void sbus_set_sbus64(struct device *dev, int bursts)
97 97
98 default: 98 default:
99 return; 99 return;
100 }; 100 }
101 101
102 val = upa_readq(cfg_reg); 102 val = upa_readq(cfg_reg);
103 if (val & (1UL << 14UL)) { 103 if (val & (1UL << 14UL)) {
@@ -244,7 +244,7 @@ static unsigned int sbus_build_irq(struct platform_device *op, unsigned int ino)
244 case 3: 244 case 3:
245 iclr = reg_base + SYSIO_ICLR_SLOT3; 245 iclr = reg_base + SYSIO_ICLR_SLOT3;
246 break; 246 break;
247 }; 247 }
248 248
249 iclr += ((unsigned long)sbus_level - 1UL) * 8UL; 249 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
250 } 250 }
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c
index 3249d3f3234d..d26e1f6c717a 100644
--- a/arch/sparc/kernel/setup_32.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -267,7 +267,7 @@ void __init setup_arch(char **cmdline_p)
267 default: 267 default:
268 printk("UNKNOWN!\n"); 268 printk("UNKNOWN!\n");
269 break; 269 break;
270 }; 270 }
271 271
272#ifdef CONFIG_DUMMY_CONSOLE 272#ifdef CONFIG_DUMMY_CONSOLE
273 conswitchp = &dummy_con; 273 conswitchp = &dummy_con;
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index f3b6850cc8db..c4dd0999da86 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -209,7 +209,7 @@ void __init per_cpu_patch(void)
209 default: 209 default:
210 prom_printf("Unknown cpu type, halting.\n"); 210 prom_printf("Unknown cpu type, halting.\n");
211 prom_halt(); 211 prom_halt();
212 }; 212 }
213 213
214 *(unsigned int *) (addr + 0) = insns[0]; 214 *(unsigned int *) (addr + 0) = insns[0];
215 wmb(); 215 wmb();
diff --git a/arch/sparc/kernel/smp_32.c b/arch/sparc/kernel/smp_32.c
index d5b3958be0b4..21b125341bf7 100644
--- a/arch/sparc/kernel/smp_32.c
+++ b/arch/sparc/kernel/smp_32.c
@@ -114,7 +114,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
114 printk("UNKNOWN!\n"); 114 printk("UNKNOWN!\n");
115 BUG(); 115 BUG();
116 break; 116 break;
117 }; 117 }
118} 118}
119 119
120void cpu_panic(void) 120void cpu_panic(void)
@@ -374,7 +374,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
374 printk("UNKNOWN!\n"); 374 printk("UNKNOWN!\n");
375 BUG(); 375 BUG();
376 break; 376 break;
377 }; 377 }
378} 378}
379 379
380/* Set this up early so that things like the scheduler can init 380/* Set this up early so that things like the scheduler can init
@@ -447,7 +447,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
447 printk("UNKNOWN!\n"); 447 printk("UNKNOWN!\n");
448 BUG(); 448 BUG();
449 break; 449 break;
450 }; 450 }
451 451
452 if (!ret) { 452 if (!ret) {
453 cpumask_set_cpu(cpu, &smp_commenced_mask); 453 cpumask_set_cpu(cpu, &smp_commenced_mask);
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index a9ea60eb2c10..1d13c5bda0b1 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -103,10 +103,9 @@ static void sun4d_sbus_handler_irq(int sbusl)
103 103
104 sbil = (sbusl << 2); 104 sbil = (sbusl << 2);
105 /* Loop for each pending SBI */ 105 /* Loop for each pending SBI */
106 for (sbino = 0; bus_mask; sbino++) { 106 for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1) {
107 unsigned int idx, mask; 107 unsigned int idx, mask;
108 108
109 bus_mask >>= 1;
110 if (!(bus_mask & 1)) 109 if (!(bus_mask & 1))
111 continue; 110 continue;
112 /* XXX This seems to ACK the irq twice. acquire_sbi() 111 /* XXX This seems to ACK the irq twice. acquire_sbi()
@@ -118,19 +117,16 @@ static void sun4d_sbus_handler_irq(int sbusl)
118 mask &= (0xf << sbil); 117 mask &= (0xf << sbil);
119 118
120 /* Loop for each pending SBI slot */ 119 /* Loop for each pending SBI slot */
121 idx = 0;
122 slot = (1 << sbil); 120 slot = (1 << sbil);
123 while (mask != 0) { 121 for (idx = 0; mask != 0; idx++, slot <<= 1) {
124 unsigned int pil; 122 unsigned int pil;
125 struct irq_bucket *p; 123 struct irq_bucket *p;
126 124
127 idx++;
128 slot <<= 1;
129 if (!(mask & slot)) 125 if (!(mask & slot))
130 continue; 126 continue;
131 127
132 mask &= ~slot; 128 mask &= ~slot;
133 pil = sun4d_encode_irq(sbino, sbil, idx); 129 pil = sun4d_encode_irq(sbino, sbusl, idx);
134 130
135 p = irq_map[pil]; 131 p = irq_map[pil];
136 while (p) { 132 while (p) {
@@ -218,10 +214,10 @@ static void sun4d_unmask_irq(struct irq_data *data)
218 214
219#ifdef CONFIG_SMP 215#ifdef CONFIG_SMP
220 spin_lock_irqsave(&sun4d_imsk_lock, flags); 216 spin_lock_irqsave(&sun4d_imsk_lock, flags);
221 cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) | ~(1 << real_irq)); 217 cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) & ~(1 << real_irq));
222 spin_unlock_irqrestore(&sun4d_imsk_lock, flags); 218 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
223#else 219#else
224 cc_set_imsk(cc_get_imsk() | ~(1 << real_irq)); 220 cc_set_imsk(cc_get_imsk() & ~(1 << real_irq));
225#endif 221#endif
226} 222}
227 223
@@ -299,26 +295,68 @@ static void __init sun4d_load_profile_irqs(void)
299 } 295 }
300} 296}
301 297
298unsigned int _sun4d_build_device_irq(unsigned int real_irq,
299 unsigned int pil,
300 unsigned int board)
301{
302 struct sun4d_handler_data *handler_data;
303 unsigned int irq;
304
305 irq = irq_alloc(real_irq, pil);
306 if (irq == 0) {
307 prom_printf("IRQ: allocate for %d %d %d failed\n",
308 real_irq, pil, board);
309 goto err_out;
310 }
311
312 handler_data = irq_get_handler_data(irq);
313 if (unlikely(handler_data))
314 goto err_out;
315
316 handler_data = kzalloc(sizeof(struct sun4d_handler_data), GFP_ATOMIC);
317 if (unlikely(!handler_data)) {
318 prom_printf("IRQ: kzalloc(sun4d_handler_data) failed.\n");
319 prom_halt();
320 }
321 handler_data->cpuid = board_to_cpu[board];
322 handler_data->real_irq = real_irq;
323 irq_set_chip_and_handler_name(irq, &sun4d_irq,
324 handle_level_irq, "level");
325 irq_set_handler_data(irq, handler_data);
326
327err_out:
328 return irq;
329}
330
331
332
302unsigned int sun4d_build_device_irq(struct platform_device *op, 333unsigned int sun4d_build_device_irq(struct platform_device *op,
303 unsigned int real_irq) 334 unsigned int real_irq)
304{ 335{
305 struct device_node *dp = op->dev.of_node; 336 struct device_node *dp = op->dev.of_node;
306 struct device_node *io_unit, *sbi = dp->parent; 337 struct device_node *board_parent, *bus = dp->parent;
338 char *bus_connection;
307 const struct linux_prom_registers *regs; 339 const struct linux_prom_registers *regs;
308 struct sun4d_handler_data *handler_data;
309 unsigned int pil; 340 unsigned int pil;
310 unsigned int irq; 341 unsigned int irq;
311 int board, slot; 342 int board, slot;
312 int sbusl; 343 int sbusl;
313 344
314 irq = 0; 345 irq = real_irq;
315 while (sbi) { 346 while (bus) {
316 if (!strcmp(sbi->name, "sbi")) 347 if (!strcmp(bus->name, "sbi")) {
348 bus_connection = "io-unit";
349 break;
350 }
351
352 if (!strcmp(bus->name, "bootbus")) {
353 bus_connection = "cpu-unit";
317 break; 354 break;
355 }
318 356
319 sbi = sbi->parent; 357 bus = bus->parent;
320 } 358 }
321 if (!sbi) 359 if (!bus)
322 goto err_out; 360 goto err_out;
323 361
324 regs = of_get_property(dp, "reg", NULL); 362 regs = of_get_property(dp, "reg", NULL);
@@ -328,17 +366,19 @@ unsigned int sun4d_build_device_irq(struct platform_device *op,
328 slot = regs->which_io; 366 slot = regs->which_io;
329 367
330 /* 368 /*
331 * If SBI's parent is not io-unit or the io-unit lacks 369 * If Bus nodes parent is not io-unit/cpu-unit or the io-unit/cpu-unit
332 * a "board#" property, something is very wrong. 370 * lacks a "board#" property, something is very wrong.
333 */ 371 */
334 if (!sbi->parent || strcmp(sbi->parent->name, "io-unit")) { 372 if (!bus->parent || strcmp(bus->parent->name, bus_connection)) {
335 printk("%s: Error, parent is not io-unit.\n", sbi->full_name); 373 printk(KERN_ERR "%s: Error, parent is not %s.\n",
374 bus->full_name, bus_connection);
336 goto err_out; 375 goto err_out;
337 } 376 }
338 io_unit = sbi->parent; 377 board_parent = bus->parent;
339 board = of_getintprop_default(io_unit, "board#", -1); 378 board = of_getintprop_default(board_parent, "board#", -1);
340 if (board == -1) { 379 if (board == -1) {
341 printk("%s: Error, lacks board# property.\n", io_unit->full_name); 380 printk(KERN_ERR "%s: Error, lacks board# property.\n",
381 board_parent->full_name);
342 goto err_out; 382 goto err_out;
343 } 383 }
344 384
@@ -348,29 +388,17 @@ unsigned int sun4d_build_device_irq(struct platform_device *op,
348 else 388 else
349 pil = real_irq; 389 pil = real_irq;
350 390
351 irq = irq_alloc(real_irq, pil); 391 irq = _sun4d_build_device_irq(real_irq, pil, board);
352 if (irq == 0)
353 goto err_out;
354
355 handler_data = irq_get_handler_data(irq);
356 if (unlikely(handler_data))
357 goto err_out;
358
359 handler_data = kzalloc(sizeof(struct sun4d_handler_data), GFP_ATOMIC);
360 if (unlikely(!handler_data)) {
361 prom_printf("IRQ: kzalloc(sun4d_handler_data) failed.\n");
362 prom_halt();
363 }
364 handler_data->cpuid = board_to_cpu[board];
365 handler_data->real_irq = real_irq;
366 irq_set_chip_and_handler_name(irq, &sun4d_irq,
367 handle_level_irq, "level");
368 irq_set_handler_data(irq, handler_data);
369
370err_out: 392err_out:
371 return real_irq; 393 return irq;
372} 394}
373 395
396unsigned int sun4d_build_timer_irq(unsigned int board, unsigned int real_irq)
397{
398 return _sun4d_build_device_irq(real_irq, real_irq, board);
399}
400
401
374static void __init sun4d_fixup_trap_table(void) 402static void __init sun4d_fixup_trap_table(void)
375{ 403{
376#ifdef CONFIG_SMP 404#ifdef CONFIG_SMP
@@ -402,6 +430,7 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn)
402 unsigned int irq; 430 unsigned int irq;
403 const u32 *reg; 431 const u32 *reg;
404 int err; 432 int err;
433 int board;
405 434
406 dp = of_find_node_by_name(NULL, "cpu-unit"); 435 dp = of_find_node_by_name(NULL, "cpu-unit");
407 if (!dp) { 436 if (!dp) {
@@ -414,12 +443,19 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn)
414 * bootbus. 443 * bootbus.
415 */ 444 */
416 reg = of_get_property(dp, "reg", NULL); 445 reg = of_get_property(dp, "reg", NULL);
417 of_node_put(dp);
418 if (!reg) { 446 if (!reg) {
419 prom_printf("sun4d_init_timers: No reg property\n"); 447 prom_printf("sun4d_init_timers: No reg property\n");
420 prom_halt(); 448 prom_halt();
421 } 449 }
422 450
451 board = of_getintprop_default(dp, "board#", -1);
452 if (board == -1) {
453 prom_printf("sun4d_init_timers: No board# property on cpu-unit\n");
454 prom_halt();
455 }
456
457 of_node_put(dp);
458
423 res.start = reg[1]; 459 res.start = reg[1];
424 res.end = reg[2] - 1; 460 res.end = reg[2] - 1;
425 res.flags = reg[0] & 0xff; 461 res.flags = reg[0] & 0xff;
@@ -434,7 +470,7 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn)
434 470
435 master_l10_counter = &sun4d_timers->l10_cur_count; 471 master_l10_counter = &sun4d_timers->l10_cur_count;
436 472
437 irq = sun4d_build_device_irq(NULL, SUN4D_TIMER_IRQ); 473 irq = sun4d_build_timer_irq(board, SUN4D_TIMER_IRQ);
438 err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL); 474 err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);
439 if (err) { 475 if (err) {
440 prom_printf("sun4d_init_timers: request_irq() failed with %d\n", 476 prom_printf("sun4d_init_timers: request_irq() failed with %d\n",
diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index 6db18c6927fb..170cd8e8eb2a 100644
--- a/arch/sparc/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
@@ -109,7 +109,7 @@ asmlinkage long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compa
109 109
110 default: 110 default:
111 return -ENOSYS; 111 return -ENOSYS;
112 }; 112 }
113 113
114 return -ENOSYS; 114 return -ENOSYS;
115} 115}
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 96082d30def0..908b47a5ee24 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -460,7 +460,7 @@ SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second
460 default: 460 default:
461 err = -ENOSYS; 461 err = -ENOSYS;
462 goto out; 462 goto out;
463 }; 463 }
464 } 464 }
465 if (call <= MSGCTL) { 465 if (call <= MSGCTL) {
466 switch (call) { 466 switch (call) {
@@ -481,7 +481,7 @@ SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second
481 default: 481 default:
482 err = -ENOSYS; 482 err = -ENOSYS;
483 goto out; 483 goto out;
484 }; 484 }
485 } 485 }
486 if (call <= SHMCTL) { 486 if (call <= SHMCTL) {
487 switch (call) { 487 switch (call) {
@@ -507,7 +507,7 @@ SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second
507 default: 507 default:
508 err = -ENOSYS; 508 err = -ENOSYS;
509 goto out; 509 goto out;
510 }; 510 }
511 } else { 511 } else {
512 err = -ENOSYS; 512 err = -ENOSYS;
513 } 513 }
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c
index 2b8d54b2d850..1db6b18964d2 100644
--- a/arch/sparc/kernel/time_64.c
+++ b/arch/sparc/kernel/time_64.c
@@ -708,7 +708,7 @@ static void sparc64_timer_setup(enum clock_event_mode mode,
708 case CLOCK_EVT_MODE_UNUSED: 708 case CLOCK_EVT_MODE_UNUSED:
709 WARN_ON(1); 709 WARN_ON(1);
710 break; 710 break;
711 }; 711 }
712} 712}
713 713
714static struct clock_event_device sparc64_clockevent = { 714static struct clock_event_device sparc64_clockevent = {
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index 1ed547bd850f..0cbdaa41cd1e 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -1804,7 +1804,7 @@ static const char *sun4v_err_type_to_str(u32 type)
1804 return "warning resumable"; 1804 return "warning resumable";
1805 default: 1805 default:
1806 return "unknown"; 1806 return "unknown";
1807 }; 1807 }
1808} 1808}
1809 1809
1810static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent, int cpu, const char *pfx, atomic_t *ocnt) 1810static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent, int cpu, const char *pfx, atomic_t *ocnt)
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index c752c4c479bd..b2b019ea8caa 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -211,7 +211,7 @@ static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
211 default: 211 default:
212 BUG(); 212 BUG();
213 break; 213 break;
214 }; 214 }
215 } 215 }
216 return __do_int_store(dst_addr, size, src_val, asi); 216 return __do_int_store(dst_addr, size, src_val, asi);
217} 217}
@@ -328,7 +328,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
328 case ASI_SNFL: 328 case ASI_SNFL:
329 asi &= ~0x08; 329 asi &= ~0x08;
330 break; 330 break;
331 }; 331 }
332 switch (dir) { 332 switch (dir) {
333 case load: 333 case load:
334 reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs); 334 reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
@@ -351,7 +351,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
351 default: 351 default:
352 BUG(); 352 BUG();
353 break; 353 break;
354 }; 354 }
355 *reg_addr = val_in; 355 *reg_addr = val_in;
356 } 356 }
357 break; 357 break;
diff --git a/arch/sparc/kernel/us2e_cpufreq.c b/arch/sparc/kernel/us2e_cpufreq.c
index 531d54fc9829..489fc15f3194 100644
--- a/arch/sparc/kernel/us2e_cpufreq.c
+++ b/arch/sparc/kernel/us2e_cpufreq.c
@@ -176,7 +176,7 @@ static unsigned long index_to_estar_mode(unsigned int index)
176 176
177 default: 177 default:
178 BUG(); 178 BUG();
179 }; 179 }
180} 180}
181 181
182static unsigned long index_to_divisor(unsigned int index) 182static unsigned long index_to_divisor(unsigned int index)
@@ -199,7 +199,7 @@ static unsigned long index_to_divisor(unsigned int index)
199 199
200 default: 200 default:
201 BUG(); 201 BUG();
202 }; 202 }
203} 203}
204 204
205static unsigned long estar_to_divisor(unsigned long estar) 205static unsigned long estar_to_divisor(unsigned long estar)
@@ -224,7 +224,7 @@ static unsigned long estar_to_divisor(unsigned long estar)
224 break; 224 break;
225 default: 225 default:
226 BUG(); 226 BUG();
227 }; 227 }
228 228
229 return ret; 229 return ret;
230} 230}
diff --git a/arch/sparc/kernel/us3_cpufreq.c b/arch/sparc/kernel/us3_cpufreq.c
index 9a8ceb700833..eb1624b931d9 100644
--- a/arch/sparc/kernel/us3_cpufreq.c
+++ b/arch/sparc/kernel/us3_cpufreq.c
@@ -71,7 +71,7 @@ static unsigned long get_current_freq(unsigned int cpu, unsigned long safari_cfg
71 break; 71 break;
72 default: 72 default:
73 BUG(); 73 BUG();
74 }; 74 }
75 75
76 return ret; 76 return ret;
77} 77}
@@ -125,7 +125,7 @@ static void us3_set_cpu_divider_index(unsigned int cpu, unsigned int index)
125 125
126 default: 126 default:
127 BUG(); 127 BUG();
128 }; 128 }
129 129
130 reg = read_safari_cfg(); 130 reg = read_safari_cfg();
131 131
diff --git a/arch/sparc/kernel/viohs.c b/arch/sparc/kernel/viohs.c
index aa6ac70d4fd5..29348ea139c3 100644
--- a/arch/sparc/kernel/viohs.c
+++ b/arch/sparc/kernel/viohs.c
@@ -363,7 +363,7 @@ static int process_ver(struct vio_driver_state *vio, struct vio_ver_info *pkt)
363 363
364 default: 364 default:
365 return handshake_failure(vio); 365 return handshake_failure(vio);
366 }; 366 }
367} 367}
368 368
369static int process_attr(struct vio_driver_state *vio, void *pkt) 369static int process_attr(struct vio_driver_state *vio, void *pkt)
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 9dfd2ebcb157..36357717d691 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -334,7 +334,7 @@ static void edge(struct pt_regs *regs, unsigned int insn, unsigned int opf)
334 left = edge32_tab_l[(rs1 >> 2) & 0x1].left; 334 left = edge32_tab_l[(rs1 >> 2) & 0x1].left;
335 right = edge32_tab_l[(rs2 >> 2) & 0x1].right; 335 right = edge32_tab_l[(rs2 >> 2) & 0x1].right;
336 break; 336 break;
337 }; 337 }
338 338
339 if ((rs1 & ~0x7UL) == (rs2 & ~0x7UL)) 339 if ((rs1 & ~0x7UL) == (rs2 & ~0x7UL))
340 rd_val = right & left; 340 rd_val = right & left;
@@ -360,7 +360,7 @@ static void edge(struct pt_regs *regs, unsigned int insn, unsigned int opf)
360 tstate = regs->tstate & ~(TSTATE_XCC | TSTATE_ICC); 360 tstate = regs->tstate & ~(TSTATE_XCC | TSTATE_ICC);
361 regs->tstate = tstate | (ccr << 32UL); 361 regs->tstate = tstate | (ccr << 32UL);
362 } 362 }
363 }; 363 }
364} 364}
365 365
366static void array(struct pt_regs *regs, unsigned int insn, unsigned int opf) 366static void array(struct pt_regs *regs, unsigned int insn, unsigned int opf)
@@ -392,7 +392,7 @@ static void array(struct pt_regs *regs, unsigned int insn, unsigned int opf)
392 392
393 case ARRAY32_OPF: 393 case ARRAY32_OPF:
394 rd_val <<= 2; 394 rd_val <<= 2;
395 }; 395 }
396 396
397 store_reg(regs, rd_val, RD(insn)); 397 store_reg(regs, rd_val, RD(insn));
398} 398}
@@ -577,7 +577,7 @@ static void pformat(struct pt_regs *regs, unsigned int insn, unsigned int opf)
577 *fpd_regaddr(f, RD(insn)) = rd_val; 577 *fpd_regaddr(f, RD(insn)) = rd_val;
578 break; 578 break;
579 } 579 }
580 }; 580 }
581} 581}
582 582
583static void pmul(struct pt_regs *regs, unsigned int insn, unsigned int opf) 583static void pmul(struct pt_regs *regs, unsigned int insn, unsigned int opf)
@@ -693,7 +693,7 @@ static void pmul(struct pt_regs *regs, unsigned int insn, unsigned int opf)
693 *fpd_regaddr(f, RD(insn)) = rd_val; 693 *fpd_regaddr(f, RD(insn)) = rd_val;
694 break; 694 break;
695 } 695 }
696 }; 696 }
697} 697}
698 698
699static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf) 699static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
@@ -786,7 +786,7 @@ static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
786 rd_val |= 1 << i; 786 rd_val |= 1 << i;
787 } 787 }
788 break; 788 break;
789 }; 789 }
790 790
791 maybe_flush_windows(0, 0, RD(insn), 0); 791 maybe_flush_windows(0, 0, RD(insn), 0);
792 store_reg(regs, rd_val, RD(insn)); 792 store_reg(regs, rd_val, RD(insn));
@@ -885,7 +885,7 @@ int vis_emul(struct pt_regs *regs, unsigned int insn)
885 case BSHUFFLE_OPF: 885 case BSHUFFLE_OPF:
886 bshuffle(regs, insn); 886 bshuffle(regs, insn);
887 break; 887 break;
888 }; 888 }
889 889
890 regs->tpc = regs->tnpc; 890 regs->tpc = regs->tnpc;
891 regs->tnpc += 4; 891 regs->tnpc += 4;
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c
index b10ac4d62378..7543ddbdadb2 100644
--- a/arch/sparc/mm/fault_32.c
+++ b/arch/sparc/mm/fault_32.c
@@ -135,7 +135,7 @@ asmlinkage int lookup_fault(unsigned long pc, unsigned long ret_pc,
135 135
136 default: 136 default:
137 break; 137 break;
138 }; 138 }
139 139
140 memset(&regs, 0, sizeof (regs)); 140 memset(&regs, 0, sizeof (regs));
141 regs.pc = pc; 141 regs.pc = pc;
diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c
index ca217327e8d2..7b00de61c5f1 100644
--- a/arch/sparc/mm/init_32.c
+++ b/arch/sparc/mm/init_32.c
@@ -340,7 +340,7 @@ void __init paging_init(void)
340 prom_printf("paging_init: sparc_cpu_model = %d\n", sparc_cpu_model); 340 prom_printf("paging_init: sparc_cpu_model = %d\n", sparc_cpu_model);
341 prom_printf("paging_init: Halting...\n"); 341 prom_printf("paging_init: Halting...\n");
342 prom_halt(); 342 prom_halt();
343 }; 343 }
344 344
345 /* Initialize the protection map with non-constant, MMU dependent values. */ 345 /* Initialize the protection map with non-constant, MMU dependent values. */
346 protection_map[0] = PAGE_NONE; 346 protection_map[0] = PAGE_NONE;
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index e10cd03fab80..3fd8e18bed80 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -1625,7 +1625,7 @@ static void __init sun4v_ktsb_init(void)
1625 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB; 1625 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB;
1626 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB; 1626 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB;
1627 break; 1627 break;
1628 }; 1628 }
1629 1629
1630 ktsb_descr[0].assoc = 1; 1630 ktsb_descr[0].assoc = 1;
1631 ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES; 1631 ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES;
@@ -2266,7 +2266,7 @@ unsigned long pte_sz_bits(unsigned long sz)
2266 return _PAGE_SZ512K_4V; 2266 return _PAGE_SZ512K_4V;
2267 case 4 * 1024 * 1024: 2267 case 4 * 1024 * 1024:
2268 return _PAGE_SZ4MB_4V; 2268 return _PAGE_SZ4MB_4V;
2269 }; 2269 }
2270 } else { 2270 } else {
2271 switch (sz) { 2271 switch (sz) {
2272 case 8 * 1024: 2272 case 8 * 1024:
@@ -2278,7 +2278,7 @@ unsigned long pte_sz_bits(unsigned long sz)
2278 return _PAGE_SZ512K_4U; 2278 return _PAGE_SZ512K_4U;
2279 case 4 * 1024 * 1024: 2279 case 4 * 1024 * 1024:
2280 return _PAGE_SZ4MB_4U; 2280 return _PAGE_SZ4MB_4U;
2281 }; 2281 }
2282 } 2282 }
2283} 2283}
2284 2284
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index fe09fd8be695..cbef74e793b8 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -1665,7 +1665,7 @@ static void __init init_swift(void)
1665 default: 1665 default:
1666 srmmu_modtype = Swift_ok; 1666 srmmu_modtype = Swift_ok;
1667 break; 1667 break;
1668 }; 1668 }
1669 1669
1670 BTFIXUPSET_CALL(flush_cache_all, swift_flush_cache_all, BTFIXUPCALL_NORM); 1670 BTFIXUPSET_CALL(flush_cache_all, swift_flush_cache_all, BTFIXUPCALL_NORM);
1671 BTFIXUPSET_CALL(flush_cache_mm, swift_flush_cache_mm, BTFIXUPCALL_NORM); 1671 BTFIXUPSET_CALL(flush_cache_mm, swift_flush_cache_mm, BTFIXUPCALL_NORM);
@@ -2069,7 +2069,7 @@ static void __init get_srmmu_type(void)
2069 /* Some other Cypress revision, assume a 605. */ 2069 /* Some other Cypress revision, assume a 605. */
2070 init_cypress_605(mod_rev); 2070 init_cypress_605(mod_rev);
2071 break; 2071 break;
2072 }; 2072 }
2073 return; 2073 return;
2074 } 2074 }
2075 2075
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index a2350b5e68aa..1cf4f198709a 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -318,7 +318,7 @@ void __init sun4c_probe_vac(void)
318 prom_printf("probe_vac: Didn't expect vac-linesize of %d, halting\n", 318 prom_printf("probe_vac: Didn't expect vac-linesize of %d, halting\n",
319 sun4c_vacinfo.linesize); 319 sun4c_vacinfo.linesize);
320 prom_halt(); 320 prom_halt();
321 }; 321 }
322 322
323 sun4c_flush_all(); 323 sun4c_flush_all();
324 sun4c_enable_vac(); 324 sun4c_enable_vac();
@@ -364,7 +364,7 @@ static void __init patch_kernel_fault_handler(void)
364 prom_printf("Unhandled number of segmaps: %d\n", 364 prom_printf("Unhandled number of segmaps: %d\n",
365 num_segmaps); 365 num_segmaps);
366 prom_halt(); 366 prom_halt();
367 }; 367 }
368 switch (num_contexts) { 368 switch (num_contexts) {
369 case 8: 369 case 8:
370 /* Default, nothing to do. */ 370 /* Default, nothing to do. */
@@ -377,7 +377,7 @@ static void __init patch_kernel_fault_handler(void)
377 prom_printf("Unhandled number of contexts: %d\n", 377 prom_printf("Unhandled number of contexts: %d\n",
378 num_contexts); 378 num_contexts);
379 prom_halt(); 379 prom_halt();
380 }; 380 }
381 381
382 if (sun4c_vacinfo.do_hwflushes != 0) { 382 if (sun4c_vacinfo.do_hwflushes != 0) {
383 PATCH_INSN(vac_hwflush_patch1_on, vac_hwflush_patch1); 383 PATCH_INSN(vac_hwflush_patch1_on, vac_hwflush_patch1);
@@ -394,7 +394,7 @@ static void __init patch_kernel_fault_handler(void)
394 prom_printf("Impossible VAC linesize %d, halting...\n", 394 prom_printf("Impossible VAC linesize %d, halting...\n",
395 sun4c_vacinfo.linesize); 395 sun4c_vacinfo.linesize);
396 prom_halt(); 396 prom_halt();
397 }; 397 }
398 } 398 }
399} 399}
400 400
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c
index 948461513499..a5f51b22fcbe 100644
--- a/arch/sparc/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -180,7 +180,7 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
180 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n", 180 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n",
181 current->comm, current->pid, tsb_bytes); 181 current->comm, current->pid, tsb_bytes);
182 do_exit(SIGSEGV); 182 do_exit(SIGSEGV);
183 }; 183 }
184 tte |= pte_sz_bits(page_sz); 184 tte |= pte_sz_bits(page_sz);
185 185
186 if (tlb_type == cheetah_plus || tlb_type == hypervisor) { 186 if (tlb_type == cheetah_plus || tlb_type == hypervisor) {
@@ -215,7 +215,7 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
215#endif 215#endif
216 default: 216 default:
217 BUG(); 217 BUG();
218 }; 218 }
219 hp->assoc = 1; 219 hp->assoc = 1;
220 hp->num_ttes = tsb_bytes / 16; 220 hp->num_ttes = tsb_bytes / 16;
221 hp->ctx_idx = 0; 221 hp->ctx_idx = 0;
@@ -230,7 +230,7 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
230#endif 230#endif
231 default: 231 default:
232 BUG(); 232 BUG();
233 }; 233 }
234 hp->tsb_base = tsb_paddr; 234 hp->tsb_base = tsb_paddr;
235 hp->resv = 0; 235 hp->resv = 0;
236 } 236 }
diff --git a/arch/sparc/prom/console_32.c b/arch/sparc/prom/console_32.c
index b05e3db5fa63..a00f47b16c10 100644
--- a/arch/sparc/prom/console_32.c
+++ b/arch/sparc/prom/console_32.c
@@ -38,7 +38,7 @@ static int prom_nbputchar(const char *buf)
38 break; 38 break;
39 default: 39 default:
40 break; 40 break;
41 }; 41 }
42 restore_current(); 42 restore_current();
43 spin_unlock_irqrestore(&prom_lock, flags); 43 spin_unlock_irqrestore(&prom_lock, flags);
44 return i; /* Ugh, we could spin forever on unsupported proms ;( */ 44 return i; /* Ugh, we could spin forever on unsupported proms ;( */
diff --git a/arch/sparc/prom/init_32.c b/arch/sparc/prom/init_32.c
index 0a601b300639..26c64cea3c9c 100644
--- a/arch/sparc/prom/init_32.c
+++ b/arch/sparc/prom/init_32.c
@@ -53,7 +53,7 @@ void __init prom_init(struct linux_romvec *rp)
53 romvec->pv_romvers); 53 romvec->pv_romvers);
54 prom_halt(); 54 prom_halt();
55 break; 55 break;
56 }; 56 }
57 57
58 prom_rev = romvec->pv_plugin_revision; 58 prom_rev = romvec->pv_plugin_revision;
59 prom_prev = romvec->pv_printrev; 59 prom_prev = romvec->pv_printrev;
diff --git a/arch/sparc/prom/mp.c b/arch/sparc/prom/mp.c
index 97c44c9ddbc8..0da8256cf76f 100644
--- a/arch/sparc/prom/mp.c
+++ b/arch/sparc/prom/mp.c
@@ -35,7 +35,7 @@ prom_startcpu(int cpunode, struct linux_prom_registers *ctable_reg, int ctx, cha
35 case PROM_V3: 35 case PROM_V3:
36 ret = (*(romvec->v3_cpustart))(cpunode, (int) ctable_reg, ctx, pc); 36 ret = (*(romvec->v3_cpustart))(cpunode, (int) ctable_reg, ctx, pc);
37 break; 37 break;
38 }; 38 }
39 restore_current(); 39 restore_current();
40 spin_unlock_irqrestore(&prom_lock, flags); 40 spin_unlock_irqrestore(&prom_lock, flags);
41 41
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index c85f744270a5..094308e41be5 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_X86_VISWS) += setup-irq.o
51obj-$(CONFIG_MN10300) += setup-bus.o 51obj-$(CONFIG_MN10300) += setup-bus.o
52obj-$(CONFIG_MICROBLAZE) += setup-bus.o 52obj-$(CONFIG_MICROBLAZE) += setup-bus.o
53obj-$(CONFIG_TILE) += setup-bus.o setup-irq.o 53obj-$(CONFIG_TILE) += setup-bus.o setup-irq.o
54obj-$(CONFIG_SPARC_LEON) += setup-bus.o setup-irq.o
54 55
55# 56#
56# ACPI Related PCI FW Functions 57# ACPI Related PCI FW Functions
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 21:42:42 -0500