diff options
-rw-r--r-- | arch/arm/mach-davinci/board-dm355-evm.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm355-leopard.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm365-evm.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm644x-evm.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm646x-evm.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-neuros-osd2.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-sffsdr.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm355.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm365.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm644x.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm646x.h | 3 |
11 files changed, 42 insertions, 52 deletions
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index aa48e3f69715..a0ad7d9f5c85 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -33,9 +33,6 @@ | |||
33 | #include <mach/mmc.h> | 33 | #include <mach/mmc.h> |
34 | #include <mach/usb.h> | 34 | #include <mach/usb.h> |
35 | 35 | ||
36 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000 | ||
37 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
38 | |||
39 | /* NOTE: this is geared for the standard config, with a socketed | 36 | /* NOTE: this is geared for the standard config, with a socketed |
40 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 37 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
41 | * swap chips, maybe with a different block size, partitioning may | 38 | * swap chips, maybe with a different block size, partitioning may |
@@ -86,12 +83,12 @@ static struct davinci_nand_pdata davinci_nand_data = { | |||
86 | 83 | ||
87 | static struct resource davinci_nand_resources[] = { | 84 | static struct resource davinci_nand_resources[] = { |
88 | { | 85 | { |
89 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 86 | .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, |
90 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, | 87 | .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, |
91 | .flags = IORESOURCE_MEM, | 88 | .flags = IORESOURCE_MEM, |
92 | }, { | 89 | }, { |
93 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 90 | .start = DM355_ASYNC_EMIF_CONTROL_BASE, |
94 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 91 | .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
95 | .flags = IORESOURCE_MEM, | 92 | .flags = IORESOURCE_MEM, |
96 | }, | 93 | }, |
97 | }; | 94 | }; |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index 21f32eb41e8c..c3d5a70a7f38 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -30,9 +30,6 @@ | |||
30 | #include <mach/mmc.h> | 30 | #include <mach/mmc.h> |
31 | #include <mach/usb.h> | 31 | #include <mach/usb.h> |
32 | 32 | ||
33 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000 | ||
34 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
35 | |||
36 | /* NOTE: this is geared for the standard config, with a socketed | 33 | /* NOTE: this is geared for the standard config, with a socketed |
37 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 34 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
38 | * swap chips, maybe with a different block size, partitioning may | 35 | * swap chips, maybe with a different block size, partitioning may |
@@ -82,12 +79,12 @@ static struct davinci_nand_pdata davinci_nand_data = { | |||
82 | 79 | ||
83 | static struct resource davinci_nand_resources[] = { | 80 | static struct resource davinci_nand_resources[] = { |
84 | { | 81 | { |
85 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 82 | .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, |
86 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, | 83 | .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, |
87 | .flags = IORESOURCE_MEM, | 84 | .flags = IORESOURCE_MEM, |
88 | }, { | 85 | }, { |
89 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 86 | .start = DM355_ASYNC_EMIF_CONTROL_BASE, |
90 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 87 | .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
91 | .flags = IORESOURCE_MEM, | 88 | .flags = IORESOURCE_MEM, |
92 | }, | 89 | }, |
93 | }; | 90 | }; |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index df4ab2105869..b98b35c9e0e2 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -54,11 +54,6 @@ static inline int have_tvp7002(void) | |||
54 | return 0; | 54 | return 0; |
55 | } | 55 | } |
56 | 56 | ||
57 | |||
58 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 | ||
59 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
60 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
61 | |||
62 | #define DM365_EVM_PHY_MASK (0x2) | 57 | #define DM365_EVM_PHY_MASK (0x2) |
63 | #define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | 58 | #define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ |
64 | 59 | ||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 95cef1f46ef2..d028bab6f981 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -43,12 +43,6 @@ | |||
43 | 43 | ||
44 | #define DAVINCI_CFC_ATA_BASE 0x01C66000 | 44 | #define DAVINCI_CFC_ATA_BASE 0x01C66000 |
45 | 45 | ||
46 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
47 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
48 | #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
49 | #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
50 | #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
51 | |||
52 | #define LXT971_PHY_ID (0x001378e2) | 46 | #define LXT971_PHY_ID (0x001378e2) |
53 | #define LXT971_PHY_MASK (0xfffffff0) | 47 | #define LXT971_PHY_MASK (0xfffffff0) |
54 | 48 | ||
@@ -92,8 +86,8 @@ static struct physmap_flash_data davinci_evm_norflash_data = { | |||
92 | /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF | 86 | /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF |
93 | * limits addresses to 16M, so using addresses past 16M will wrap */ | 87 | * limits addresses to 16M, so using addresses past 16M will wrap */ |
94 | static struct resource davinci_evm_norflash_resource = { | 88 | static struct resource davinci_evm_norflash_resource = { |
95 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 89 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
96 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | 90 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, |
97 | .flags = IORESOURCE_MEM, | 91 | .flags = IORESOURCE_MEM, |
98 | }; | 92 | }; |
99 | 93 | ||
@@ -154,12 +148,12 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = { | |||
154 | 148 | ||
155 | static struct resource davinci_evm_nandflash_resource[] = { | 149 | static struct resource davinci_evm_nandflash_resource[] = { |
156 | { | 150 | { |
157 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 151 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
158 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | 152 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, |
159 | .flags = IORESOURCE_MEM, | 153 | .flags = IORESOURCE_MEM, |
160 | }, { | 154 | }, { |
161 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 155 | .start = DM644X_ASYNC_EMIF_CONTROL_BASE, |
162 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 156 | .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
163 | .flags = IORESOURCE_MEM, | 157 | .flags = IORESOURCE_MEM, |
164 | }, | 158 | }, |
165 | }; | 159 | }; |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 5ba3cb2daaa0..b22e22cefcdd 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -80,17 +80,14 @@ static struct davinci_nand_pdata davinci_nand_data = { | |||
80 | .options = 0, | 80 | .options = 0, |
81 | }; | 81 | }; |
82 | 82 | ||
83 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
84 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 | ||
85 | |||
86 | static struct resource davinci_nand_resources[] = { | 83 | static struct resource davinci_nand_resources[] = { |
87 | { | 84 | { |
88 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 85 | .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE, |
89 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, | 86 | .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1, |
90 | .flags = IORESOURCE_MEM, | 87 | .flags = IORESOURCE_MEM, |
91 | }, { | 88 | }, { |
92 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 89 | .start = DM646X_ASYNC_EMIF_CONTROL_BASE, |
93 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 90 | .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
94 | .flags = IORESOURCE_MEM, | 91 | .flags = IORESOURCE_MEM, |
95 | }, | 92 | }, |
96 | }; | 93 | }; |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 1fadc68d9fbb..5afe37e3a4cb 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -43,9 +43,6 @@ | |||
43 | 43 | ||
44 | #define DAVINCI_CFC_ATA_BASE 0x01C66000 | 44 | #define DAVINCI_CFC_ATA_BASE 0x01C66000 |
45 | 45 | ||
46 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
47 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
48 | |||
49 | #define LXT971_PHY_ID 0x001378e2 | 46 | #define LXT971_PHY_ID 0x001378e2 |
50 | #define LXT971_PHY_MASK 0xfffffff0 | 47 | #define LXT971_PHY_MASK 0xfffffff0 |
51 | 48 | ||
@@ -98,12 +95,12 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = { | |||
98 | 95 | ||
99 | static struct resource davinci_ntosd2_nandflash_resource[] = { | 96 | static struct resource davinci_ntosd2_nandflash_resource[] = { |
100 | { | 97 | { |
101 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 98 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
102 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | 99 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, |
103 | .flags = IORESOURCE_MEM, | 100 | .flags = IORESOURCE_MEM, |
104 | }, { | 101 | }, { |
105 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 102 | .start = DM644X_ASYNC_EMIF_CONTROL_BASE, |
106 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 103 | .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
107 | .flags = IORESOURCE_MEM, | 104 | .flags = IORESOURCE_MEM, |
108 | }, | 105 | }, |
109 | }; | 106 | }; |
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index a7cf810bb13e..1ed0662cc0e4 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c | |||
@@ -45,9 +45,6 @@ | |||
45 | #define SFFSDR_PHY_MASK (0x2) | 45 | #define SFFSDR_PHY_MASK (0x2) |
46 | #define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | 46 | #define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ |
47 | 47 | ||
48 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
49 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
50 | |||
51 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { | 48 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { |
52 | /* U-Boot Environment: Block 0 | 49 | /* U-Boot Environment: Block 0 |
53 | * UBL: Block 1 | 50 | * UBL: Block 1 |
@@ -76,12 +73,12 @@ static struct flash_platform_data davinci_sffsdr_nandflash_data = { | |||
76 | 73 | ||
77 | static struct resource davinci_sffsdr_nandflash_resource[] = { | 74 | static struct resource davinci_sffsdr_nandflash_resource[] = { |
78 | { | 75 | { |
79 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | 76 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
80 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | 77 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, |
81 | .flags = IORESOURCE_MEM, | 78 | .flags = IORESOURCE_MEM, |
82 | }, { | 79 | }, { |
83 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | 80 | .start = DM644X_ASYNC_EMIF_CONTROL_BASE, |
84 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | 81 | .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, |
85 | .flags = IORESOURCE_MEM, | 82 | .flags = IORESOURCE_MEM, |
86 | }, | 83 | }, |
87 | }; | 84 | }; |
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h index 85536d8e8336..36dff4a0ce3f 100644 --- a/arch/arm/mach-davinci/include/mach/dm355.h +++ b/arch/arm/mach-davinci/include/mach/dm355.h | |||
@@ -15,6 +15,9 @@ | |||
15 | #include <mach/asp.h> | 15 | #include <mach/asp.h> |
16 | #include <media/davinci/vpfe_capture.h> | 16 | #include <media/davinci/vpfe_capture.h> |
17 | 17 | ||
18 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01E10000 | ||
19 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
20 | |||
18 | #define ASP1_TX_EVT_EN 1 | 21 | #define ASP1_TX_EVT_EN 1 |
19 | #define ASP1_RX_EVT_EN 2 | 22 | #define ASP1_RX_EVT_EN 2 |
20 | 23 | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 3a37b5a6983c..ea5df3b49ec4 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h | |||
@@ -36,6 +36,10 @@ | |||
36 | #define DAVINCI_DMA_VC_TX 2 | 36 | #define DAVINCI_DMA_VC_TX 2 |
37 | #define DAVINCI_DMA_VC_RX 3 | 37 | #define DAVINCI_DMA_VC_RX 3 |
38 | 38 | ||
39 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000 | ||
40 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
41 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
42 | |||
39 | void __init dm365_init(void); | 43 | void __init dm365_init(void); |
40 | void __init dm365_init_asp(struct snd_platform_data *pdata); | 44 | void __init dm365_init_asp(struct snd_platform_data *pdata); |
41 | void __init dm365_init_vc(struct snd_platform_data *pdata); | 45 | void __init dm365_init_vc(struct snd_platform_data *pdata); |
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h index 1a8b09ccc3c8..6fca568a0fd2 100644 --- a/arch/arm/mach-davinci/include/mach/dm644x.h +++ b/arch/arm/mach-davinci/include/mach/dm644x.h | |||
@@ -34,6 +34,12 @@ | |||
34 | #define DM644X_EMAC_MDIO_OFFSET (0x4000) | 34 | #define DM644X_EMAC_MDIO_OFFSET (0x4000) |
35 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) | 35 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) |
36 | 36 | ||
37 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 | ||
38 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
39 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
40 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
41 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
42 | |||
37 | void __init dm644x_init(void); | 43 | void __init dm644x_init(void); |
38 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | 44 | void __init dm644x_init_asp(struct snd_platform_data *pdata); |
39 | void dm644x_set_vpfe_config(struct vpfe_config *cfg); | 45 | void dm644x_set_vpfe_config(struct vpfe_config *cfg); |
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 846da98b619a..4d62db7b6f94 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
@@ -27,6 +27,9 @@ | |||
27 | 27 | ||
28 | #define DM646X_ATA_REG_BASE (0x01C66000) | 28 | #define DM646X_ATA_REG_BASE (0x01C66000) |
29 | 29 | ||
30 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
31 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 | ||
32 | |||
30 | void __init dm646x_init(void); | 33 | void __init dm646x_init(void); |
31 | void __init dm646x_init_ide(void); | 34 | void __init dm646x_init_ide(void); |
32 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | 35 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); |