diff options
-rw-r--r-- | arch/arm/mach-omap1/gpio15xx.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap1/gpio16xx.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap1/gpio7xx.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 33 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/gpio.h | 22 |
5 files changed, 27 insertions, 31 deletions
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index dbd81688eada..04c4b04cf54e 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c | |||
@@ -38,6 +38,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { | |||
38 | .virtual_irq_start = IH_MPUIO_BASE, | 38 | .virtual_irq_start = IH_MPUIO_BASE, |
39 | .bank_type = METHOD_MPUIO, | 39 | .bank_type = METHOD_MPUIO, |
40 | .bank_width = 16, | 40 | .bank_width = 16, |
41 | .bank_stride = 1, | ||
41 | }; | 42 | }; |
42 | 43 | ||
43 | static struct __initdata platform_device omap15xx_mpu_gpio = { | 44 | static struct __initdata platform_device omap15xx_mpu_gpio = { |
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 8d4d0a061b56..5dd0d4c82b24 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c | |||
@@ -41,6 +41,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { | |||
41 | .virtual_irq_start = IH_MPUIO_BASE, | 41 | .virtual_irq_start = IH_MPUIO_BASE, |
42 | .bank_type = METHOD_MPUIO, | 42 | .bank_type = METHOD_MPUIO, |
43 | .bank_width = 16, | 43 | .bank_width = 16, |
44 | .bank_stride = 1, | ||
44 | }; | 45 | }; |
45 | 46 | ||
46 | static struct __initdata platform_device omap16xx_mpu_gpio = { | 47 | static struct __initdata platform_device omap16xx_mpu_gpio = { |
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 94bccd44181d..1204c8b871af 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c | |||
@@ -43,6 +43,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { | |||
43 | .virtual_irq_start = IH_MPUIO_BASE, | 43 | .virtual_irq_start = IH_MPUIO_BASE, |
44 | .bank_type = METHOD_MPUIO, | 44 | .bank_type = METHOD_MPUIO, |
45 | .bank_width = 32, | 45 | .bank_width = 32, |
46 | .bank_stride = 2, | ||
46 | }; | 47 | }; |
47 | 48 | ||
48 | static struct __initdata platform_device omap7xx_mpu_gpio = { | 49 | static struct __initdata platform_device omap7xx_mpu_gpio = { |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 6f53dee98a91..8d493b992e70 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -159,6 +159,7 @@ struct gpio_bank { | |||
159 | u32 dbck_enable_mask; | 159 | u32 dbck_enable_mask; |
160 | struct device *dev; | 160 | struct device *dev; |
161 | bool dbck_flag; | 161 | bool dbck_flag; |
162 | int stride; | ||
162 | }; | 163 | }; |
163 | 164 | ||
164 | #ifdef CONFIG_ARCH_OMAP3 | 165 | #ifdef CONFIG_ARCH_OMAP3 |
@@ -267,7 +268,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
267 | switch (bank->method) { | 268 | switch (bank->method) { |
268 | #ifdef CONFIG_ARCH_OMAP1 | 269 | #ifdef CONFIG_ARCH_OMAP1 |
269 | case METHOD_MPUIO: | 270 | case METHOD_MPUIO: |
270 | reg += OMAP_MPUIO_IO_CNTL; | 271 | reg += OMAP_MPUIO_IO_CNTL / bank->stride; |
271 | break; | 272 | break; |
272 | #endif | 273 | #endif |
273 | #ifdef CONFIG_ARCH_OMAP15XX | 274 | #ifdef CONFIG_ARCH_OMAP15XX |
@@ -315,7 +316,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
315 | switch (bank->method) { | 316 | switch (bank->method) { |
316 | #ifdef CONFIG_ARCH_OMAP1 | 317 | #ifdef CONFIG_ARCH_OMAP1 |
317 | case METHOD_MPUIO: | 318 | case METHOD_MPUIO: |
318 | reg += OMAP_MPUIO_OUTPUT; | 319 | reg += OMAP_MPUIO_OUTPUT / bank->stride; |
319 | l = __raw_readl(reg); | 320 | l = __raw_readl(reg); |
320 | if (enable) | 321 | if (enable) |
321 | l |= 1 << gpio; | 322 | l |= 1 << gpio; |
@@ -387,7 +388,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) | |||
387 | switch (bank->method) { | 388 | switch (bank->method) { |
388 | #ifdef CONFIG_ARCH_OMAP1 | 389 | #ifdef CONFIG_ARCH_OMAP1 |
389 | case METHOD_MPUIO: | 390 | case METHOD_MPUIO: |
390 | reg += OMAP_MPUIO_INPUT_LATCH; | 391 | reg += OMAP_MPUIO_INPUT_LATCH / bank->stride; |
391 | break; | 392 | break; |
392 | #endif | 393 | #endif |
393 | #ifdef CONFIG_ARCH_OMAP15XX | 394 | #ifdef CONFIG_ARCH_OMAP15XX |
@@ -433,7 +434,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) | |||
433 | switch (bank->method) { | 434 | switch (bank->method) { |
434 | #ifdef CONFIG_ARCH_OMAP1 | 435 | #ifdef CONFIG_ARCH_OMAP1 |
435 | case METHOD_MPUIO: | 436 | case METHOD_MPUIO: |
436 | reg += OMAP_MPUIO_OUTPUT; | 437 | reg += OMAP_MPUIO_OUTPUT / bank->stride; |
437 | break; | 438 | break; |
438 | #endif | 439 | #endif |
439 | #ifdef CONFIG_ARCH_OMAP15XX | 440 | #ifdef CONFIG_ARCH_OMAP15XX |
@@ -620,7 +621,7 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | |||
620 | 621 | ||
621 | switch (bank->method) { | 622 | switch (bank->method) { |
622 | case METHOD_MPUIO: | 623 | case METHOD_MPUIO: |
623 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 624 | reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride; |
624 | break; | 625 | break; |
625 | #ifdef CONFIG_ARCH_OMAP15XX | 626 | #ifdef CONFIG_ARCH_OMAP15XX |
626 | case METHOD_GPIO_1510: | 627 | case METHOD_GPIO_1510: |
@@ -654,7 +655,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
654 | switch (bank->method) { | 655 | switch (bank->method) { |
655 | #ifdef CONFIG_ARCH_OMAP1 | 656 | #ifdef CONFIG_ARCH_OMAP1 |
656 | case METHOD_MPUIO: | 657 | case METHOD_MPUIO: |
657 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 658 | reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride; |
658 | l = __raw_readl(reg); | 659 | l = __raw_readl(reg); |
659 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) | 660 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
660 | bank->toggle_mask |= 1 << gpio; | 661 | bank->toggle_mask |= 1 << gpio; |
@@ -840,7 +841,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
840 | switch (bank->method) { | 841 | switch (bank->method) { |
841 | #ifdef CONFIG_ARCH_OMAP1 | 842 | #ifdef CONFIG_ARCH_OMAP1 |
842 | case METHOD_MPUIO: | 843 | case METHOD_MPUIO: |
843 | reg += OMAP_MPUIO_GPIO_MASKIT; | 844 | reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
844 | mask = 0xffff; | 845 | mask = 0xffff; |
845 | inv = 1; | 846 | inv = 1; |
846 | break; | 847 | break; |
@@ -897,7 +898,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
897 | switch (bank->method) { | 898 | switch (bank->method) { |
898 | #ifdef CONFIG_ARCH_OMAP1 | 899 | #ifdef CONFIG_ARCH_OMAP1 |
899 | case METHOD_MPUIO: | 900 | case METHOD_MPUIO: |
900 | reg += OMAP_MPUIO_GPIO_MASKIT; | 901 | reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
901 | l = __raw_readl(reg); | 902 | l = __raw_readl(reg); |
902 | if (enable) | 903 | if (enable) |
903 | l &= ~(gpio_mask); | 904 | l &= ~(gpio_mask); |
@@ -1147,7 +1148,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1147 | bank = get_irq_data(irq); | 1148 | bank = get_irq_data(irq); |
1148 | #ifdef CONFIG_ARCH_OMAP1 | 1149 | #ifdef CONFIG_ARCH_OMAP1 |
1149 | if (bank->method == METHOD_MPUIO) | 1150 | if (bank->method == METHOD_MPUIO) |
1150 | isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; | 1151 | isr_reg = bank->base + |
1152 | OMAP_MPUIO_GPIO_INT / bank->stride; | ||
1151 | #endif | 1153 | #endif |
1152 | #ifdef CONFIG_ARCH_OMAP15XX | 1154 | #ifdef CONFIG_ARCH_OMAP15XX |
1153 | if (bank->method == METHOD_GPIO_1510) | 1155 | if (bank->method == METHOD_GPIO_1510) |
@@ -1345,7 +1347,8 @@ static int omap_mpuio_suspend_noirq(struct device *dev) | |||
1345 | { | 1347 | { |
1346 | struct platform_device *pdev = to_platform_device(dev); | 1348 | struct platform_device *pdev = to_platform_device(dev); |
1347 | struct gpio_bank *bank = platform_get_drvdata(pdev); | 1349 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
1348 | void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; | 1350 | void __iomem *mask_reg = bank->base + |
1351 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; | ||
1349 | unsigned long flags; | 1352 | unsigned long flags; |
1350 | 1353 | ||
1351 | spin_lock_irqsave(&bank->lock, flags); | 1354 | spin_lock_irqsave(&bank->lock, flags); |
@@ -1360,7 +1363,8 @@ static int omap_mpuio_resume_noirq(struct device *dev) | |||
1360 | { | 1363 | { |
1361 | struct platform_device *pdev = to_platform_device(dev); | 1364 | struct platform_device *pdev = to_platform_device(dev); |
1362 | struct gpio_bank *bank = platform_get_drvdata(pdev); | 1365 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
1363 | void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; | 1366 | void __iomem *mask_reg = bank->base + |
1367 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; | ||
1364 | unsigned long flags; | 1368 | unsigned long flags; |
1365 | 1369 | ||
1366 | spin_lock_irqsave(&bank->lock, flags); | 1370 | spin_lock_irqsave(&bank->lock, flags); |
@@ -1440,7 +1444,7 @@ static int gpio_is_input(struct gpio_bank *bank, int mask) | |||
1440 | 1444 | ||
1441 | switch (bank->method) { | 1445 | switch (bank->method) { |
1442 | case METHOD_MPUIO: | 1446 | case METHOD_MPUIO: |
1443 | reg += OMAP_MPUIO_IO_CNTL; | 1447 | reg += OMAP_MPUIO_IO_CNTL / bank->stride; |
1444 | break; | 1448 | break; |
1445 | case METHOD_GPIO_1510: | 1449 | case METHOD_GPIO_1510: |
1446 | reg += OMAP1510_GPIO_DIR_CONTROL; | 1450 | reg += OMAP1510_GPIO_DIR_CONTROL; |
@@ -1601,8 +1605,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id) | |||
1601 | } | 1605 | } |
1602 | } else if (cpu_class_is_omap1()) { | 1606 | } else if (cpu_class_is_omap1()) { |
1603 | if (bank_is_mpuio(bank)) | 1607 | if (bank_is_mpuio(bank)) |
1604 | __raw_writew(0xffff, bank->base | 1608 | __raw_writew(0xffff, bank->base + |
1605 | + OMAP_MPUIO_GPIO_MASKIT); | 1609 | OMAP_MPUIO_GPIO_MASKIT / bank->stride); |
1606 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { | 1610 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { |
1607 | __raw_writew(0xffff, bank->base | 1611 | __raw_writew(0xffff, bank->base |
1608 | + OMAP1510_GPIO_INT_MASK); | 1612 | + OMAP1510_GPIO_INT_MASK); |
@@ -1716,6 +1720,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev) | |||
1716 | bank->method = pdata->bank_type; | 1720 | bank->method = pdata->bank_type; |
1717 | bank->dev = &pdev->dev; | 1721 | bank->dev = &pdev->dev; |
1718 | bank->dbck_flag = pdata->dbck_flag; | 1722 | bank->dbck_flag = pdata->dbck_flag; |
1723 | bank->stride = pdata->bank_stride; | ||
1719 | bank_width = pdata->bank_width; | 1724 | bank_width = pdata->bank_width; |
1720 | 1725 | ||
1721 | spin_lock_init(&bank->lock); | 1726 | spin_lock_init(&bank->lock); |
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index 5f118ff0d3eb..41ff2f8943f0 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h | |||
@@ -32,22 +32,10 @@ | |||
32 | 32 | ||
33 | #define OMAP1_MPUIO_BASE 0xfffb5000 | 33 | #define OMAP1_MPUIO_BASE 0xfffb5000 |
34 | 34 | ||
35 | #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) | 35 | /* |
36 | 36 | * These are the omap15xx/16xx offsets. The omap7xx offset are | |
37 | #define OMAP_MPUIO_INPUT_LATCH 0x00 | 37 | * OMAP_MPUIO_ / 2 offsets below. |
38 | #define OMAP_MPUIO_OUTPUT 0x02 | 38 | */ |
39 | #define OMAP_MPUIO_IO_CNTL 0x04 | ||
40 | #define OMAP_MPUIO_KBR_LATCH 0x08 | ||
41 | #define OMAP_MPUIO_KBC 0x0a | ||
42 | #define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c | ||
43 | #define OMAP_MPUIO_GPIO_INT_EDGE 0x0e | ||
44 | #define OMAP_MPUIO_KBD_INT 0x10 | ||
45 | #define OMAP_MPUIO_GPIO_INT 0x12 | ||
46 | #define OMAP_MPUIO_KBD_MASKIT 0x14 | ||
47 | #define OMAP_MPUIO_GPIO_MASKIT 0x16 | ||
48 | #define OMAP_MPUIO_GPIO_DEBOUNCING 0x18 | ||
49 | #define OMAP_MPUIO_LATCH 0x1a | ||
50 | #else | ||
51 | #define OMAP_MPUIO_INPUT_LATCH 0x00 | 39 | #define OMAP_MPUIO_INPUT_LATCH 0x00 |
52 | #define OMAP_MPUIO_OUTPUT 0x04 | 40 | #define OMAP_MPUIO_OUTPUT 0x04 |
53 | #define OMAP_MPUIO_IO_CNTL 0x08 | 41 | #define OMAP_MPUIO_IO_CNTL 0x08 |
@@ -61,7 +49,6 @@ | |||
61 | #define OMAP_MPUIO_GPIO_MASKIT 0x2c | 49 | #define OMAP_MPUIO_GPIO_MASKIT 0x2c |
62 | #define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 | 50 | #define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 |
63 | #define OMAP_MPUIO_LATCH 0x34 | 51 | #define OMAP_MPUIO_LATCH 0x34 |
64 | #endif | ||
65 | 52 | ||
66 | #define OMAP34XX_NR_GPIOS 6 | 53 | #define OMAP34XX_NR_GPIOS 6 |
67 | 54 | ||
@@ -88,6 +75,7 @@ struct omap_gpio_platform_data { | |||
88 | u16 virtual_irq_start; | 75 | u16 virtual_irq_start; |
89 | int bank_type; | 76 | int bank_type; |
90 | int bank_width; /* GPIO bank width */ | 77 | int bank_width; /* GPIO bank width */ |
78 | int bank_stride; /* Only needed for omap1 MPUIO */ | ||
91 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ | 79 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ |
92 | }; | 80 | }; |
93 | 81 | ||