diff options
-rw-r--r-- | arch/arm/mach-mx1/clock.c | 47 | ||||
-rw-r--r-- | arch/arm/mach-mx1/crm_regs.h | 55 |
2 files changed, 40 insertions, 62 deletions
diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-mx1/clock.c index 610b88d98a86..c05096c38301 100644 --- a/arch/arm/mach-mx1/clock.c +++ b/arch/arm/mach-mx1/clock.c | |||
@@ -2,18 +2,17 @@ | |||
2 | * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | 2 | * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License version 2 as |
6 | * the Free Software Foundation; either version 2 of the License, or | 6 | * published by the Free Software Foundation. |
7 | * (at your option) any later version. | ||
8 | * | 7 | * |
9 | * This program is distributed in the hope that it will be useful, | 8 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
12 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
13 | * | 12 | * |
14 | * You should have received a copy of the GNU General Public License | 13 | * You should have received a copy of the GNU General Public License along |
15 | * along with this program; if not, write to the Free Software | 14 | * with this program; if not, write to the Free Software Foundation, Inc., |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 15 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
17 | */ | 16 | */ |
18 | 17 | ||
19 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
@@ -29,7 +28,41 @@ | |||
29 | #include <mach/clock.h> | 28 | #include <mach/clock.h> |
30 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
31 | #include <mach/common.h> | 30 | #include <mach/common.h> |
32 | #include "crm_regs.h" | 31 | |
32 | #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) | ||
33 | |||
34 | /* CCM register addresses */ | ||
35 | #define CCM_CSCR IO_ADDR_CCM(0x0) | ||
36 | #define CCM_MPCTL0 IO_ADDR_CCM(0x4) | ||
37 | #define CCM_SPCTL0 IO_ADDR_CCM(0xc) | ||
38 | #define CCM_PCDR IO_ADDR_CCM(0x20) | ||
39 | |||
40 | #define CCM_CSCR_CLKO_OFFSET 29 | ||
41 | #define CCM_CSCR_CLKO_MASK (0x7 << 29) | ||
42 | #define CCM_CSCR_USB_OFFSET 26 | ||
43 | #define CCM_CSCR_USB_MASK (0x7 << 26) | ||
44 | #define CCM_CSCR_OSC_EN_SHIFT 17 | ||
45 | #define CCM_CSCR_SYSTEM_SEL (1 << 16) | ||
46 | #define CCM_CSCR_BCLK_OFFSET 10 | ||
47 | #define CCM_CSCR_BCLK_MASK (0xf << 10) | ||
48 | #define CCM_CSCR_PRESC (1 << 15) | ||
49 | |||
50 | #define CCM_PCDR_PCLK3_OFFSET 16 | ||
51 | #define CCM_PCDR_PCLK3_MASK (0x7f << 16) | ||
52 | #define CCM_PCDR_PCLK2_OFFSET 4 | ||
53 | #define CCM_PCDR_PCLK2_MASK (0xf << 4) | ||
54 | #define CCM_PCDR_PCLK1_OFFSET 0 | ||
55 | #define CCM_PCDR_PCLK1_MASK 0xf | ||
56 | |||
57 | #define IO_ADDR_SCM(off) (MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off))) | ||
58 | |||
59 | /* SCM register addresses */ | ||
60 | #define SCM_GCCR IO_ADDR_SCM(0xc) | ||
61 | |||
62 | #define SCM_GCCR_DMA_CLK_EN_OFFSET 3 | ||
63 | #define SCM_GCCR_CSI_CLK_EN_OFFSET 2 | ||
64 | #define SCM_GCCR_MMA_CLK_EN_OFFSET 1 | ||
65 | #define SCM_GCCR_USBD_CLK_EN_OFFSET 0 | ||
33 | 66 | ||
34 | static int _clk_enable(struct clk *clk) | 67 | static int _clk_enable(struct clk *clk) |
35 | { | 68 | { |
diff --git a/arch/arm/mach-mx1/crm_regs.h b/arch/arm/mach-mx1/crm_regs.h deleted file mode 100644 index 13e81e6e589f..000000000000 --- a/arch/arm/mach-mx1/crm_regs.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | ||
4 | * | ||
5 | * This file may be distributed under the terms of the GNU General | ||
6 | * Public License, version 2. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ARCH_ARM_MACH_MX1_CRM_REGS_H__ | ||
10 | #define __ARCH_ARM_MACH_MX1_CRM_REGS_H__ | ||
11 | |||
12 | #define CCM_BASE MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR) | ||
13 | #define SCM_BASE MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR) | ||
14 | |||
15 | /* CCM register addresses */ | ||
16 | #define CCM_CSCR (CCM_BASE + 0x0) | ||
17 | #define CCM_MPCTL0 (CCM_BASE + 0x4) | ||
18 | #define CCM_MPCTL1 (CCM_BASE + 0x8) | ||
19 | #define CCM_SPCTL0 (CCM_BASE + 0xC) | ||
20 | #define CCM_SPCTL1 (CCM_BASE + 0x10) | ||
21 | #define CCM_PCDR (CCM_BASE + 0x20) | ||
22 | |||
23 | #define CCM_CSCR_CLKO_OFFSET 29 | ||
24 | #define CCM_CSCR_CLKO_MASK (0x7 << 29) | ||
25 | #define CCM_CSCR_USB_OFFSET 26 | ||
26 | #define CCM_CSCR_USB_MASK (0x7 << 26) | ||
27 | #define CCM_CSCR_SPLL_RESTART (1 << 22) | ||
28 | #define CCM_CSCR_MPLL_RESTART (1 << 21) | ||
29 | #define CCM_CSCR_OSC_EN_SHIFT 17 | ||
30 | #define CCM_CSCR_SYSTEM_SEL (1 << 16) | ||
31 | #define CCM_CSCR_BCLK_OFFSET 10 | ||
32 | #define CCM_CSCR_BCLK_MASK (0xF << 10) | ||
33 | #define CCM_CSCR_PRESC (1 << 15) | ||
34 | #define CCM_CSCR_SPEN (1 << 1) | ||
35 | #define CCM_CSCR_MPEN (1 << 0) | ||
36 | |||
37 | #define CCM_PCDR_PCLK3_OFFSET 16 | ||
38 | #define CCM_PCDR_PCLK3_MASK (0x7F << 16) | ||
39 | #define CCM_PCDR_PCLK2_OFFSET 4 | ||
40 | #define CCM_PCDR_PCLK2_MASK (0xF << 4) | ||
41 | #define CCM_PCDR_PCLK1_OFFSET 0 | ||
42 | #define CCM_PCDR_PCLK1_MASK 0xF | ||
43 | |||
44 | /* SCM register addresses */ | ||
45 | #define SCM_SIDR (SCM_BASE + 0x0) | ||
46 | #define SCM_FMCR (SCM_BASE + 0x4) | ||
47 | #define SCM_GPCR (SCM_BASE + 0x8) | ||
48 | #define SCM_GCCR (SCM_BASE + 0xC) | ||
49 | |||
50 | #define SCM_GCCR_DMA_CLK_EN_OFFSET 3 | ||
51 | #define SCM_GCCR_CSI_CLK_EN_OFFSET 2 | ||
52 | #define SCM_GCCR_MMA_CLK_EN_OFFSET 1 | ||
53 | #define SCM_GCCR_USBD_CLK_EN_OFFSET 0 | ||
54 | |||
55 | #endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */ | ||