diff options
688 files changed, 11694 insertions, 6225 deletions
diff --git a/.gitignore b/.gitignore index 8faa6c02b39e..5d56a3fd0de6 100644 --- a/.gitignore +++ b/.gitignore | |||
@@ -28,6 +28,7 @@ modules.builtin | |||
28 | *.gz | 28 | *.gz |
29 | *.bz2 | 29 | *.bz2 |
30 | *.lzma | 30 | *.lzma |
31 | *.xz | ||
31 | *.lzo | 32 | *.lzo |
32 | *.patch | 33 | *.patch |
33 | *.gcno | 34 | *.gcno |
diff --git a/Documentation/DocBook/filesystems.tmpl b/Documentation/DocBook/filesystems.tmpl index 5e87ad58c0b5..f51f28531b8d 100644 --- a/Documentation/DocBook/filesystems.tmpl +++ b/Documentation/DocBook/filesystems.tmpl | |||
@@ -82,6 +82,11 @@ | |||
82 | </sect1> | 82 | </sect1> |
83 | </chapter> | 83 | </chapter> |
84 | 84 | ||
85 | <chapter id="fs_events"> | ||
86 | <title>Events based on file descriptors</title> | ||
87 | !Efs/eventfd.c | ||
88 | </chapter> | ||
89 | |||
85 | <chapter id="sysfs"> | 90 | <chapter id="sysfs"> |
86 | <title>The Filesystem for Exporting Kernel Objects</title> | 91 | <title>The Filesystem for Exporting Kernel Objects</title> |
87 | !Efs/sysfs/file.c | 92 | !Efs/sysfs/file.c |
diff --git a/Documentation/arm/SH-Mobile/Makefile b/Documentation/arm/SH-Mobile/Makefile new file mode 100644 index 000000000000..8771d832cf8c --- /dev/null +++ b/Documentation/arm/SH-Mobile/Makefile | |||
@@ -0,0 +1,8 @@ | |||
1 | BIN := vrl4 | ||
2 | |||
3 | .PHONY: all | ||
4 | all: $(BIN) | ||
5 | |||
6 | .PHONY: clean | ||
7 | clean: | ||
8 | rm -f *.o $(BIN) | ||
diff --git a/Documentation/arm/SH-Mobile/vrl4.c b/Documentation/arm/SH-Mobile/vrl4.c new file mode 100644 index 000000000000..e8a191358ad2 --- /dev/null +++ b/Documentation/arm/SH-Mobile/vrl4.c | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | * vrl4 format generator | ||
3 | * | ||
4 | * Copyright (C) 2010 Simon Horman | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * usage: vrl4 < zImage > out | ||
13 | * dd if=out of=/dev/sdx bs=512 seek=1 # Write the image to sector 1 | ||
14 | * | ||
15 | * Reads a zImage from stdin and writes a vrl4 image to stdout. | ||
16 | * In practice this means writing a padded vrl4 header to stdout followed | ||
17 | * by the zImage. | ||
18 | * | ||
19 | * The padding places the zImage at ALIGN bytes into the output. | ||
20 | * The vrl4 uses ALIGN + START_BASE as the start_address. | ||
21 | * This is where the mask ROM will jump to after verifying the header. | ||
22 | * | ||
23 | * The header sets copy_size to min(sizeof(zImage), MAX_BOOT_PROG_LEN) + ALIGN. | ||
24 | * That is, the mask ROM will load the padded header (ALIGN bytes) | ||
25 | * And then MAX_BOOT_PROG_LEN bytes of the image, or the entire image, | ||
26 | * whichever is smaller. | ||
27 | * | ||
28 | * The zImage is not modified in any way. | ||
29 | */ | ||
30 | |||
31 | #define _BSD_SOURCE | ||
32 | #include <endian.h> | ||
33 | #include <unistd.h> | ||
34 | #include <stdint.h> | ||
35 | #include <stdio.h> | ||
36 | #include <errno.h> | ||
37 | |||
38 | struct hdr { | ||
39 | uint32_t magic1; | ||
40 | uint32_t reserved1; | ||
41 | uint32_t magic2; | ||
42 | uint32_t reserved2; | ||
43 | uint16_t copy_size; | ||
44 | uint16_t boot_options; | ||
45 | uint32_t reserved3; | ||
46 | uint32_t start_address; | ||
47 | uint32_t reserved4; | ||
48 | uint32_t reserved5; | ||
49 | char reserved6[308]; | ||
50 | }; | ||
51 | |||
52 | #define DECLARE_HDR(h) \ | ||
53 | struct hdr (h) = { \ | ||
54 | .magic1 = htole32(0xea000000), \ | ||
55 | .reserved1 = htole32(0x56), \ | ||
56 | .magic2 = htole32(0xe59ff008), \ | ||
57 | .reserved3 = htole16(0x1) } | ||
58 | |||
59 | /* Align to 512 bytes, the MMCIF sector size */ | ||
60 | #define ALIGN_BITS 9 | ||
61 | #define ALIGN (1 << ALIGN_BITS) | ||
62 | |||
63 | #define START_BASE 0xe55b0000 | ||
64 | |||
65 | /* | ||
66 | * With an alignment of 512 the header uses the first sector. | ||
67 | * There is a 128 sector (64kbyte) limit on the data loaded by the mask ROM. | ||
68 | * So there are 127 sectors left for the boot programme. But in practice | ||
69 | * Only a small portion of a zImage is needed, 16 sectors should be more | ||
70 | * than enough. | ||
71 | * | ||
72 | * Note that this sets how much of the zImage is copied by the mask ROM. | ||
73 | * The entire zImage is present after the header and is loaded | ||
74 | * by the code in the boot program (which is the first portion of the zImage). | ||
75 | */ | ||
76 | #define MAX_BOOT_PROG_LEN (16 * 512) | ||
77 | |||
78 | #define ROUND_UP(x) ((x + ALIGN - 1) & ~(ALIGN - 1)) | ||
79 | |||
80 | ssize_t do_read(int fd, void *buf, size_t count) | ||
81 | { | ||
82 | size_t offset = 0; | ||
83 | ssize_t l; | ||
84 | |||
85 | while (offset < count) { | ||
86 | l = read(fd, buf + offset, count - offset); | ||
87 | if (!l) | ||
88 | break; | ||
89 | if (l < 0) { | ||
90 | if (errno == EAGAIN || errno == EWOULDBLOCK) | ||
91 | continue; | ||
92 | perror("read"); | ||
93 | return -1; | ||
94 | } | ||
95 | offset += l; | ||
96 | } | ||
97 | |||
98 | return offset; | ||
99 | } | ||
100 | |||
101 | ssize_t do_write(int fd, const void *buf, size_t count) | ||
102 | { | ||
103 | size_t offset = 0; | ||
104 | ssize_t l; | ||
105 | |||
106 | while (offset < count) { | ||
107 | l = write(fd, buf + offset, count - offset); | ||
108 | if (l < 0) { | ||
109 | if (errno == EAGAIN || errno == EWOULDBLOCK) | ||
110 | continue; | ||
111 | perror("write"); | ||
112 | return -1; | ||
113 | } | ||
114 | offset += l; | ||
115 | } | ||
116 | |||
117 | return offset; | ||
118 | } | ||
119 | |||
120 | ssize_t write_zero(int fd, size_t len) | ||
121 | { | ||
122 | size_t i = len; | ||
123 | |||
124 | while (i--) { | ||
125 | const char x = 0; | ||
126 | if (do_write(fd, &x, 1) < 0) | ||
127 | return -1; | ||
128 | } | ||
129 | |||
130 | return len; | ||
131 | } | ||
132 | |||
133 | int main(void) | ||
134 | { | ||
135 | DECLARE_HDR(hdr); | ||
136 | char boot_program[MAX_BOOT_PROG_LEN]; | ||
137 | size_t aligned_hdr_len, alligned_prog_len; | ||
138 | ssize_t prog_len; | ||
139 | |||
140 | prog_len = do_read(0, boot_program, sizeof(boot_program)); | ||
141 | if (prog_len <= 0) | ||
142 | return -1; | ||
143 | |||
144 | aligned_hdr_len = ROUND_UP(sizeof(hdr)); | ||
145 | hdr.start_address = htole32(START_BASE + aligned_hdr_len); | ||
146 | alligned_prog_len = ROUND_UP(prog_len); | ||
147 | hdr.copy_size = htole16(aligned_hdr_len + alligned_prog_len); | ||
148 | |||
149 | if (do_write(1, &hdr, sizeof(hdr)) < 0) | ||
150 | return -1; | ||
151 | if (write_zero(1, aligned_hdr_len - sizeof(hdr)) < 0) | ||
152 | return -1; | ||
153 | |||
154 | if (do_write(1, boot_program, prog_len) < 0) | ||
155 | return 1; | ||
156 | |||
157 | /* Write out the rest of the kernel */ | ||
158 | while (1) { | ||
159 | prog_len = do_read(0, boot_program, sizeof(boot_program)); | ||
160 | if (prog_len < 0) | ||
161 | return 1; | ||
162 | if (prog_len == 0) | ||
163 | break; | ||
164 | if (do_write(1, boot_program, prog_len) < 0) | ||
165 | return 1; | ||
166 | } | ||
167 | |||
168 | return 0; | ||
169 | } | ||
diff --git a/Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt b/Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt new file mode 100644 index 000000000000..efff8ae2713d --- /dev/null +++ b/Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | |||
@@ -0,0 +1,29 @@ | |||
1 | ROM-able zImage boot from MMC | ||
2 | ----------------------------- | ||
3 | |||
4 | An ROM-able zImage compiled with ZBOOT_ROM_MMCIF may be written to MMC and | ||
5 | SuperH Mobile ARM will to boot directly from the MMCIF hardware block. | ||
6 | |||
7 | This is achieved by the mask ROM loading the first portion of the image into | ||
8 | MERAM and then jumping to it. This portion contains loader code which | ||
9 | copies the entire image to SDRAM and jumps to it. From there the zImage | ||
10 | boot code proceeds as normal, uncompressing the image into its final | ||
11 | location and then jumping to it. | ||
12 | |||
13 | This code has been tested on an AP4EB board using the developer 1A eMMC | ||
14 | boot mode which is configured using the following jumper settings. | ||
15 | The board used for testing required a patched mask ROM in order for | ||
16 | this mode to function. | ||
17 | |||
18 | 8 7 6 5 4 3 2 1 | ||
19 | x|x|x|x|x| |x| | ||
20 | S4 -+-+-+-+-+-+-+- | ||
21 | | | | | |x| |x on | ||
22 | |||
23 | The zImage must be written to the MMC card at sector 1 (512 bytes) in | ||
24 | vrl4 format. A utility vrl4 is supplied to accomplish this. | ||
25 | |||
26 | e.g. | ||
27 | vrl4 < zImage | dd of=/dev/sdX bs=512 seek=1 | ||
28 | |||
29 | A dual-voltage MMC 4.0 card was used for testing. | ||
diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42 index 0e76ef12e4c6..a22ecf48f255 100644 --- a/Documentation/hwmon/jc42 +++ b/Documentation/hwmon/jc42 | |||
@@ -51,7 +51,8 @@ Supported chips: | |||
51 | * JEDEC JC 42.4 compliant temperature sensor chips | 51 | * JEDEC JC 42.4 compliant temperature sensor chips |
52 | Prefix: 'jc42' | 52 | Prefix: 'jc42' |
53 | Addresses scanned: I2C 0x18 - 0x1f | 53 | Addresses scanned: I2C 0x18 - 0x1f |
54 | Datasheet: - | 54 | Datasheet: |
55 | http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf | ||
55 | 56 | ||
56 | Author: | 57 | Author: |
57 | Guenter Roeck <guenter.roeck@ericsson.com> | 58 | Guenter Roeck <guenter.roeck@ericsson.com> |
@@ -60,7 +61,11 @@ Author: | |||
60 | Description | 61 | Description |
61 | ----------- | 62 | ----------- |
62 | 63 | ||
63 | This driver implements support for JEDEC JC 42.4 compliant temperature sensors. | 64 | This driver implements support for JEDEC JC 42.4 compliant temperature sensors, |
65 | which are used on many DDR3 memory modules for mobile devices and servers. Some | ||
66 | systems use the sensor to prevent memory overheating by automatically throttling | ||
67 | the memory controller. | ||
68 | |||
64 | The driver auto-detects the chips listed above, but can be manually instantiated | 69 | The driver auto-detects the chips listed above, but can be manually instantiated |
65 | to support other JC 42.4 compliant chips. | 70 | to support other JC 42.4 compliant chips. |
66 | 71 | ||
@@ -81,15 +86,19 @@ limits. The chip supports only a single register to configure the hysteresis, | |||
81 | which applies to all limits. This register can be written by writing into | 86 | which applies to all limits. This register can be written by writing into |
82 | temp1_crit_hyst. Other hysteresis attributes are read-only. | 87 | temp1_crit_hyst. Other hysteresis attributes are read-only. |
83 | 88 | ||
89 | If the BIOS has configured the sensor for automatic temperature management, it | ||
90 | is likely that it has locked the registers, i.e., that the temperature limits | ||
91 | cannot be changed. | ||
92 | |||
84 | Sysfs entries | 93 | Sysfs entries |
85 | ------------- | 94 | ------------- |
86 | 95 | ||
87 | temp1_input Temperature (RO) | 96 | temp1_input Temperature (RO) |
88 | temp1_min Minimum temperature (RW) | 97 | temp1_min Minimum temperature (RO or RW) |
89 | temp1_max Maximum temperature (RW) | 98 | temp1_max Maximum temperature (RO or RW) |
90 | temp1_crit Critical high temperature (RW) | 99 | temp1_crit Critical high temperature (RO or RW) |
91 | 100 | ||
92 | temp1_crit_hyst Critical hysteresis temperature (RW) | 101 | temp1_crit_hyst Critical hysteresis temperature (RO or RW) |
93 | temp1_max_hyst Maximum hysteresis temperature (RO) | 102 | temp1_max_hyst Maximum hysteresis temperature (RO) |
94 | 103 | ||
95 | temp1_min_alarm Temperature low alarm | 104 | temp1_min_alarm Temperature low alarm |
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp index 6526eee525a6..d2b56a4fd1f5 100644 --- a/Documentation/hwmon/k10temp +++ b/Documentation/hwmon/k10temp | |||
@@ -9,6 +9,8 @@ Supported chips: | |||
9 | Socket S1G3: Athlon II, Sempron, Turion II | 9 | Socket S1G3: Athlon II, Sempron, Turion II |
10 | * AMD Family 11h processors: | 10 | * AMD Family 11h processors: |
11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) | 11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) |
12 | * AMD Family 12h processors: "Llano" | ||
13 | * AMD Family 14h processors: "Brazos" (C/E/G-Series) | ||
12 | 14 | ||
13 | Prefix: 'k10temp' | 15 | Prefix: 'k10temp' |
14 | Addresses scanned: PCI space | 16 | Addresses scanned: PCI space |
@@ -17,10 +19,14 @@ Supported chips: | |||
17 | http://support.amd.com/us/Processor_TechDocs/31116.pdf | 19 | http://support.amd.com/us/Processor_TechDocs/31116.pdf |
18 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: | 20 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: |
19 | http://support.amd.com/us/Processor_TechDocs/41256.pdf | 21 | http://support.amd.com/us/Processor_TechDocs/41256.pdf |
22 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors: | ||
23 | http://support.amd.com/us/Processor_TechDocs/43170.pdf | ||
20 | Revision Guide for AMD Family 10h Processors: | 24 | Revision Guide for AMD Family 10h Processors: |
21 | http://support.amd.com/us/Processor_TechDocs/41322.pdf | 25 | http://support.amd.com/us/Processor_TechDocs/41322.pdf |
22 | Revision Guide for AMD Family 11h Processors: | 26 | Revision Guide for AMD Family 11h Processors: |
23 | http://support.amd.com/us/Processor_TechDocs/41788.pdf | 27 | http://support.amd.com/us/Processor_TechDocs/41788.pdf |
28 | Revision Guide for AMD Family 14h Models 00h-0Fh Processors: | ||
29 | http://support.amd.com/us/Processor_TechDocs/47534.pdf | ||
24 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: | 30 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: |
25 | http://support.amd.com/us/Processor_TechDocs/43373.pdf | 31 | http://support.amd.com/us/Processor_TechDocs/43373.pdf |
26 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: | 32 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: |
@@ -34,7 +40,7 @@ Description | |||
34 | ----------- | 40 | ----------- |
35 | 41 | ||
36 | This driver permits reading of the internal temperature sensor of AMD | 42 | This driver permits reading of the internal temperature sensor of AMD |
37 | Family 10h and 11h processors. | 43 | Family 10h/11h/12h/14h processors. |
38 | 44 | ||
39 | All these processors have a sensor, but on those for Socket F or AM2+, | 45 | All these processors have a sensor, but on those for Socket F or AM2+, |
40 | the sensor may return inconsistent values (erratum 319). The driver | 46 | the sensor may return inconsistent values (erratum 319). The driver |
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 89835a4766a6..f4a04c0c7edc 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt | |||
@@ -144,6 +144,11 @@ a fixed number of characters. This limit depends on the architecture | |||
144 | and is between 256 and 4096 characters. It is defined in the file | 144 | and is between 256 and 4096 characters. It is defined in the file |
145 | ./include/asm/setup.h as COMMAND_LINE_SIZE. | 145 | ./include/asm/setup.h as COMMAND_LINE_SIZE. |
146 | 146 | ||
147 | Finally, the [KMG] suffix is commonly described after a number of kernel | ||
148 | parameter values. These 'K', 'M', and 'G' letters represent the _binary_ | ||
149 | multipliers 'Kilo', 'Mega', and 'Giga', equalling 2^10, 2^20, and 2^30 | ||
150 | bytes respectively. Such letter suffixes can also be entirely omitted. | ||
151 | |||
147 | 152 | ||
148 | acpi= [HW,ACPI,X86] | 153 | acpi= [HW,ACPI,X86] |
149 | Advanced Configuration and Power Interface | 154 | Advanced Configuration and Power Interface |
@@ -545,16 +550,20 @@ and is between 256 and 4096 characters. It is defined in the file | |||
545 | Format: | 550 | Format: |
546 | <first_slot>,<last_slot>,<port>,<enum_bit>[,<debug>] | 551 | <first_slot>,<last_slot>,<port>,<enum_bit>[,<debug>] |
547 | 552 | ||
548 | crashkernel=nn[KMG]@ss[KMG] | 553 | crashkernel=size[KMG][@offset[KMG]] |
549 | [KNL] Reserve a chunk of physical memory to | 554 | [KNL] Using kexec, Linux can switch to a 'crash kernel' |
550 | hold a kernel to switch to with kexec on panic. | 555 | upon panic. This parameter reserves the physical |
556 | memory region [offset, offset + size] for that kernel | ||
557 | image. If '@offset' is omitted, then a suitable offset | ||
558 | is selected automatically. Check | ||
559 | Documentation/kdump/kdump.txt for further details. | ||
551 | 560 | ||
552 | crashkernel=range1:size1[,range2:size2,...][@offset] | 561 | crashkernel=range1:size1[,range2:size2,...][@offset] |
553 | [KNL] Same as above, but depends on the memory | 562 | [KNL] Same as above, but depends on the memory |
554 | in the running system. The syntax of range is | 563 | in the running system. The syntax of range is |
555 | start-[end] where start and end are both | 564 | start-[end] where start and end are both |
556 | a memory unit (amount[KMG]). See also | 565 | a memory unit (amount[KMG]). See also |
557 | Documentation/kdump/kdump.txt for a example. | 566 | Documentation/kdump/kdump.txt for an example. |
558 | 567 | ||
559 | cs89x0_dma= [HW,NET] | 568 | cs89x0_dma= [HW,NET] |
560 | Format: <dma> | 569 | Format: <dma> |
@@ -1262,10 +1271,9 @@ and is between 256 and 4096 characters. It is defined in the file | |||
1262 | 6 (KERN_INFO) informational | 1271 | 6 (KERN_INFO) informational |
1263 | 7 (KERN_DEBUG) debug-level messages | 1272 | 7 (KERN_DEBUG) debug-level messages |
1264 | 1273 | ||
1265 | log_buf_len=n Sets the size of the printk ring buffer, in bytes. | 1274 | log_buf_len=n[KMG] Sets the size of the printk ring buffer, |
1266 | Format: { n | nk | nM } | 1275 | in bytes. n must be a power of two. The default |
1267 | n must be a power of two. The default size | 1276 | size is set in the kernel config file. |
1268 | is set in the kernel config file. | ||
1269 | 1277 | ||
1270 | logo.nologo [FB] Disables display of the built-in Linux logo. | 1278 | logo.nologo [FB] Disables display of the built-in Linux logo. |
1271 | This may be used to provide more screen space for | 1279 | This may be used to provide more screen space for |
diff --git a/Documentation/networking/00-INDEX b/Documentation/networking/00-INDEX index fe5c099b8fc8..4edd78dfb362 100644 --- a/Documentation/networking/00-INDEX +++ b/Documentation/networking/00-INDEX | |||
@@ -40,8 +40,6 @@ decnet.txt | |||
40 | - info on using the DECnet networking layer in Linux. | 40 | - info on using the DECnet networking layer in Linux. |
41 | depca.txt | 41 | depca.txt |
42 | - the Digital DEPCA/EtherWORKS DE1?? and DE2?? LANCE Ethernet driver | 42 | - the Digital DEPCA/EtherWORKS DE1?? and DE2?? LANCE Ethernet driver |
43 | dgrs.txt | ||
44 | - the Digi International RightSwitch SE-X Ethernet driver | ||
45 | dmfe.txt | 43 | dmfe.txt |
46 | - info on the Davicom DM9102(A)/DM9132/DM9801 fast ethernet driver. | 44 | - info on the Davicom DM9102(A)/DM9132/DM9801 fast ethernet driver. |
47 | e100.txt | 45 | e100.txt |
@@ -50,8 +48,6 @@ e1000.txt | |||
50 | - info on Intel's E1000 line of gigabit ethernet boards | 48 | - info on Intel's E1000 line of gigabit ethernet boards |
51 | eql.txt | 49 | eql.txt |
52 | - serial IP load balancing | 50 | - serial IP load balancing |
53 | ethertap.txt | ||
54 | - the Ethertap user space packet reception and transmission driver | ||
55 | ewrk3.txt | 51 | ewrk3.txt |
56 | - the Digital EtherWORKS 3 DE203/4/5 Ethernet driver | 52 | - the Digital EtherWORKS 3 DE203/4/5 Ethernet driver |
57 | filter.txt | 53 | filter.txt |
@@ -104,8 +100,6 @@ tuntap.txt | |||
104 | - TUN/TAP device driver, allowing user space Rx/Tx of packets. | 100 | - TUN/TAP device driver, allowing user space Rx/Tx of packets. |
105 | vortex.txt | 101 | vortex.txt |
106 | - info on using 3Com Vortex (3c590, 3c592, 3c595, 3c597) Ethernet cards. | 102 | - info on using 3Com Vortex (3c590, 3c592, 3c595, 3c597) Ethernet cards. |
107 | wavelan.txt | ||
108 | - AT&T GIS (nee NCR) WaveLAN card: An Ethernet-like radio transceiver | ||
109 | x25.txt | 103 | x25.txt |
110 | - general info on X.25 development. | 104 | - general info on X.25 development. |
111 | x25-iface.txt | 105 | x25-iface.txt |
diff --git a/Documentation/networking/Makefile b/Documentation/networking/Makefile index 5aba7a33aeeb..24c308dd3fd1 100644 --- a/Documentation/networking/Makefile +++ b/Documentation/networking/Makefile | |||
@@ -4,6 +4,8 @@ obj- := dummy.o | |||
4 | # List of programs to build | 4 | # List of programs to build |
5 | hostprogs-y := ifenslave | 5 | hostprogs-y := ifenslave |
6 | 6 | ||
7 | HOSTCFLAGS_ifenslave.o += -I$(objtree)/usr/include | ||
8 | |||
7 | # Tell kbuild to always build the programs | 9 | # Tell kbuild to always build the programs |
8 | always := $(hostprogs-y) | 10 | always := $(hostprogs-y) |
9 | 11 | ||
diff --git a/Documentation/networking/dns_resolver.txt b/Documentation/networking/dns_resolver.txt index aefd1e681804..04ca06325b08 100644 --- a/Documentation/networking/dns_resolver.txt +++ b/Documentation/networking/dns_resolver.txt | |||
@@ -61,7 +61,6 @@ before the more general line given above as the first match is the one taken. | |||
61 | create dns_resolver foo:* * /usr/sbin/dns.foo %k | 61 | create dns_resolver foo:* * /usr/sbin/dns.foo %k |
62 | 62 | ||
63 | 63 | ||
64 | |||
65 | ===== | 64 | ===== |
66 | USAGE | 65 | USAGE |
67 | ===== | 66 | ===== |
@@ -104,6 +103,14 @@ implemented in the module can be called after doing: | |||
104 | returned also. | 103 | returned also. |
105 | 104 | ||
106 | 105 | ||
106 | =============================== | ||
107 | READING DNS KEYS FROM USERSPACE | ||
108 | =============================== | ||
109 | |||
110 | Keys of dns_resolver type can be read from userspace using keyctl_read() or | ||
111 | "keyctl read/print/pipe". | ||
112 | |||
113 | |||
107 | ========= | 114 | ========= |
108 | MECHANISM | 115 | MECHANISM |
109 | ========= | 116 | ========= |
diff --git a/Documentation/workqueue.txt b/Documentation/workqueue.txt index 996a27d9b8db..01c513fac40e 100644 --- a/Documentation/workqueue.txt +++ b/Documentation/workqueue.txt | |||
@@ -190,9 +190,9 @@ resources, scheduled and executed. | |||
190 | * Long running CPU intensive workloads which can be better | 190 | * Long running CPU intensive workloads which can be better |
191 | managed by the system scheduler. | 191 | managed by the system scheduler. |
192 | 192 | ||
193 | WQ_FREEZEABLE | 193 | WQ_FREEZABLE |
194 | 194 | ||
195 | A freezeable wq participates in the freeze phase of the system | 195 | A freezable wq participates in the freeze phase of the system |
196 | suspend operations. Work items on the wq are drained and no | 196 | suspend operations. Work items on the wq are drained and no |
197 | new work item starts execution until thawed. | 197 | new work item starts execution until thawed. |
198 | 198 | ||
diff --git a/MAINTAINERS b/MAINTAINERS index 5dd6c751e6a6..560ecce38ff5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -885,7 +885,7 @@ S: Supported | |||
885 | 885 | ||
886 | ARM/QUALCOMM MSM MACHINE SUPPORT | 886 | ARM/QUALCOMM MSM MACHINE SUPPORT |
887 | M: David Brown <davidb@codeaurora.org> | 887 | M: David Brown <davidb@codeaurora.org> |
888 | M: Daniel Walker <dwalker@codeaurora.org> | 888 | M: Daniel Walker <dwalker@fifo99.com> |
889 | M: Bryan Huntsman <bryanh@codeaurora.org> | 889 | M: Bryan Huntsman <bryanh@codeaurora.org> |
890 | L: linux-arm-msm@vger.kernel.org | 890 | L: linux-arm-msm@vger.kernel.org |
891 | F: arch/arm/mach-msm/ | 891 | F: arch/arm/mach-msm/ |
@@ -1010,6 +1010,15 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) | |||
1010 | S: Maintained | 1010 | S: Maintained |
1011 | F: arch/arm/mach-s5p*/ | 1011 | F: arch/arm/mach-s5p*/ |
1012 | 1012 | ||
1013 | ARM/SAMSUNG MOBILE MACHINE SUPPORT | ||
1014 | M: Kyungmin Park <kyungmin.park@samsung.com> | ||
1015 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | ||
1016 | S: Maintained | ||
1017 | F: arch/arm/mach-s5pv210/mach-aquila.c | ||
1018 | F: arch/arm/mach-s5pv210/mach-goni.c | ||
1019 | F: arch/arm/mach-exynos4/mach-universal_c210.c | ||
1020 | F: arch/arm/mach-exynos4/mach-nuri.c | ||
1021 | |||
1013 | ARM/SAMSUNG S5P SERIES FIMC SUPPORT | 1022 | ARM/SAMSUNG S5P SERIES FIMC SUPPORT |
1014 | M: Kyungmin Park <kyungmin.park@samsung.com> | 1023 | M: Kyungmin Park <kyungmin.park@samsung.com> |
1015 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> | 1024 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> |
@@ -1467,6 +1476,7 @@ F: include/net/bluetooth/ | |||
1467 | 1476 | ||
1468 | BONDING DRIVER | 1477 | BONDING DRIVER |
1469 | M: Jay Vosburgh <fubar@us.ibm.com> | 1478 | M: Jay Vosburgh <fubar@us.ibm.com> |
1479 | M: Andy Gospodarek <andy@greyhouse.net> | ||
1470 | L: netdev@vger.kernel.org | 1480 | L: netdev@vger.kernel.org |
1471 | W: http://sourceforge.net/projects/bonding/ | 1481 | W: http://sourceforge.net/projects/bonding/ |
1472 | S: Supported | 1482 | S: Supported |
@@ -1692,6 +1702,13 @@ M: Andy Whitcroft <apw@canonical.com> | |||
1692 | S: Supported | 1702 | S: Supported |
1693 | F: scripts/checkpatch.pl | 1703 | F: scripts/checkpatch.pl |
1694 | 1704 | ||
1705 | CHINESE DOCUMENTATION | ||
1706 | M: Harry Wei <harryxiyou@gmail.com> | ||
1707 | L: xiyoulinuxkernelgroup@googlegroups.com | ||
1708 | L: linux-kernel@zh-kernel.org (moderated for non-subscribers) | ||
1709 | S: Maintained | ||
1710 | F: Documentation/zh_CN/ | ||
1711 | |||
1695 | CISCO VIC ETHERNET NIC DRIVER | 1712 | CISCO VIC ETHERNET NIC DRIVER |
1696 | M: Vasanthy Kolluri <vkolluri@cisco.com> | 1713 | M: Vasanthy Kolluri <vkolluri@cisco.com> |
1697 | M: Roopa Prabhu <roprabhu@cisco.com> | 1714 | M: Roopa Prabhu <roprabhu@cisco.com> |
@@ -2026,7 +2043,7 @@ F: Documentation/scsi/dc395x.txt | |||
2026 | F: drivers/scsi/dc395x.* | 2043 | F: drivers/scsi/dc395x.* |
2027 | 2044 | ||
2028 | DCCP PROTOCOL | 2045 | DCCP PROTOCOL |
2029 | M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> | 2046 | M: Gerrit Renker <gerrit@erg.abdn.ac.uk> |
2030 | L: dccp@vger.kernel.org | 2047 | L: dccp@vger.kernel.org |
2031 | W: http://www.linuxfoundation.org/collaborate/workgroups/networking/dccp | 2048 | W: http://www.linuxfoundation.org/collaborate/workgroups/networking/dccp |
2032 | S: Maintained | 2049 | S: Maintained |
@@ -2873,7 +2890,6 @@ M: Guenter Roeck <guenter.roeck@ericsson.com> | |||
2873 | L: lm-sensors@lm-sensors.org | 2890 | L: lm-sensors@lm-sensors.org |
2874 | W: http://www.lm-sensors.org/ | 2891 | W: http://www.lm-sensors.org/ |
2875 | T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/ | 2892 | T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/ |
2876 | T: quilt kernel.org/pub/linux/kernel/people/groeck/linux-staging/ | ||
2877 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git | 2893 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git |
2878 | S: Maintained | 2894 | S: Maintained |
2879 | F: Documentation/hwmon/ | 2895 | F: Documentation/hwmon/ |
@@ -3513,7 +3529,7 @@ F: drivers/hwmon/jc42.c | |||
3513 | F: Documentation/hwmon/jc42 | 3529 | F: Documentation/hwmon/jc42 |
3514 | 3530 | ||
3515 | JFS FILESYSTEM | 3531 | JFS FILESYSTEM |
3516 | M: Dave Kleikamp <shaggy@linux.vnet.ibm.com> | 3532 | M: Dave Kleikamp <shaggy@kernel.org> |
3517 | L: jfs-discussion@lists.sourceforge.net | 3533 | L: jfs-discussion@lists.sourceforge.net |
3518 | W: http://jfs.sourceforge.net/ | 3534 | W: http://jfs.sourceforge.net/ |
3519 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git | 3535 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git |
@@ -5165,6 +5181,7 @@ F: drivers/char/random.c | |||
5165 | 5181 | ||
5166 | RAPIDIO SUBSYSTEM | 5182 | RAPIDIO SUBSYSTEM |
5167 | M: Matt Porter <mporter@kernel.crashing.org> | 5183 | M: Matt Porter <mporter@kernel.crashing.org> |
5184 | M: Alexandre Bounine <alexandre.bounine@idt.com> | ||
5168 | S: Maintained | 5185 | S: Maintained |
5169 | F: drivers/rapidio/ | 5186 | F: drivers/rapidio/ |
5170 | 5187 | ||
@@ -5267,7 +5284,7 @@ S: Maintained | |||
5267 | F: drivers/net/wireless/rtl818x/rtl8180/ | 5284 | F: drivers/net/wireless/rtl818x/rtl8180/ |
5268 | 5285 | ||
5269 | RTL8187 WIRELESS DRIVER | 5286 | RTL8187 WIRELESS DRIVER |
5270 | M: Herton Ronaldo Krzesinski <herton@mandriva.com.br> | 5287 | M: Herton Ronaldo Krzesinski <herton@canonical.com> |
5271 | M: Hin-Tak Leung <htl10@users.sourceforge.net> | 5288 | M: Hin-Tak Leung <htl10@users.sourceforge.net> |
5272 | M: Larry Finger <Larry.Finger@lwfinger.net> | 5289 | M: Larry Finger <Larry.Finger@lwfinger.net> |
5273 | L: linux-wireless@vger.kernel.org | 5290 | L: linux-wireless@vger.kernel.org |
@@ -6105,7 +6122,7 @@ S: Maintained | |||
6105 | F: security/tomoyo/ | 6122 | F: security/tomoyo/ |
6106 | 6123 | ||
6107 | TOPSTAR LAPTOP EXTRAS DRIVER | 6124 | TOPSTAR LAPTOP EXTRAS DRIVER |
6108 | M: Herton Ronaldo Krzesinski <herton@mandriva.com.br> | 6125 | M: Herton Ronaldo Krzesinski <herton@canonical.com> |
6109 | L: platform-driver-x86@vger.kernel.org | 6126 | L: platform-driver-x86@vger.kernel.org |
6110 | S: Maintained | 6127 | S: Maintained |
6111 | F: drivers/platform/x86/topstar-laptop.c | 6128 | F: drivers/platform/x86/topstar-laptop.c |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 38 | 3 | SUBLEVEL = 38 |
4 | EXTRAVERSION = -rc5 | 4 | EXTRAVERSION = -rc8 |
5 | NAME = Flesh-Eating Bats with Fangs | 5 | NAME = Flesh-Eating Bats with Fangs |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 47f63d480141..cc31bec2e316 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig | |||
@@ -11,6 +11,7 @@ config ALPHA | |||
11 | select HAVE_GENERIC_HARDIRQS | 11 | select HAVE_GENERIC_HARDIRQS |
12 | select GENERIC_IRQ_PROBE | 12 | select GENERIC_IRQ_PROBE |
13 | select AUTO_IRQ_AFFINITY if SMP | 13 | select AUTO_IRQ_AFFINITY if SMP |
14 | select GENERIC_HARDIRQS_NO_DEPRECATED | ||
14 | help | 15 | help |
15 | The Alpha is a 64-bit general-purpose processor designed and | 16 | The Alpha is a 64-bit general-purpose processor designed and |
16 | marketed by the Digital Equipment Corporation of blessed memory, | 17 | marketed by the Digital Equipment Corporation of blessed memory, |
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 9ab234f48dd8..a19d60082299 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c | |||
@@ -44,11 +44,16 @@ static char irq_user_affinity[NR_IRQS]; | |||
44 | 44 | ||
45 | int irq_select_affinity(unsigned int irq) | 45 | int irq_select_affinity(unsigned int irq) |
46 | { | 46 | { |
47 | struct irq_desc *desc = irq_to_desc[irq]; | 47 | struct irq_data *data = irq_get_irq_data(irq); |
48 | struct irq_chip *chip; | ||
48 | static int last_cpu; | 49 | static int last_cpu; |
49 | int cpu = last_cpu + 1; | 50 | int cpu = last_cpu + 1; |
50 | 51 | ||
51 | if (!desc || !get_irq_desc_chip(desc)->set_affinity || irq_user_affinity[irq]) | 52 | if (!data) |
53 | return 1; | ||
54 | chip = irq_data_get_irq_chip(data); | ||
55 | |||
56 | if (!chip->irq_set_affinity || irq_user_affinity[irq]) | ||
52 | return 1; | 57 | return 1; |
53 | 58 | ||
54 | while (!cpu_possible(cpu) || | 59 | while (!cpu_possible(cpu) || |
@@ -56,8 +61,8 @@ int irq_select_affinity(unsigned int irq) | |||
56 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); | 61 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); |
57 | last_cpu = cpu; | 62 | last_cpu = cpu; |
58 | 63 | ||
59 | cpumask_copy(desc->affinity, cpumask_of(cpu)); | 64 | cpumask_copy(data->affinity, cpumask_of(cpu)); |
60 | get_irq_desc_chip(desc)->set_affinity(irq, cpumask_of(cpu)); | 65 | chip->irq_set_affinity(data, cpumask_of(cpu), false); |
61 | return 0; | 66 | return 0; |
62 | } | 67 | } |
63 | #endif /* CONFIG_SMP */ | 68 | #endif /* CONFIG_SMP */ |
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 2d0679b60939..411ca11d0a18 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c | |||
@@ -228,14 +228,9 @@ struct irqaction timer_irqaction = { | |||
228 | void __init | 228 | void __init |
229 | init_rtc_irq(void) | 229 | init_rtc_irq(void) |
230 | { | 230 | { |
231 | struct irq_desc *desc = irq_to_desc(RTC_IRQ); | 231 | set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, |
232 | 232 | handle_simple_irq, "RTC"); | |
233 | if (desc) { | 233 | setup_irq(RTC_IRQ, &timer_irqaction); |
234 | desc->status |= IRQ_DISABLED; | ||
235 | set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, | ||
236 | handle_simple_irq, "RTC"); | ||
237 | setup_irq(RTC_IRQ, &timer_irqaction); | ||
238 | } | ||
239 | } | 234 | } |
240 | 235 | ||
241 | /* Dummy irqactions. */ | 236 | /* Dummy irqactions. */ |
diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index 956ea0ed1694..c7cc9813e45f 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c | |||
@@ -33,10 +33,10 @@ i8259_update_irq_hw(unsigned int irq, unsigned long mask) | |||
33 | } | 33 | } |
34 | 34 | ||
35 | inline void | 35 | inline void |
36 | i8259a_enable_irq(unsigned int irq) | 36 | i8259a_enable_irq(struct irq_data *d) |
37 | { | 37 | { |
38 | spin_lock(&i8259_irq_lock); | 38 | spin_lock(&i8259_irq_lock); |
39 | i8259_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq)); | 39 | i8259_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); |
40 | spin_unlock(&i8259_irq_lock); | 40 | spin_unlock(&i8259_irq_lock); |
41 | } | 41 | } |
42 | 42 | ||
@@ -47,16 +47,18 @@ __i8259a_disable_irq(unsigned int irq) | |||
47 | } | 47 | } |
48 | 48 | ||
49 | void | 49 | void |
50 | i8259a_disable_irq(unsigned int irq) | 50 | i8259a_disable_irq(struct irq_data *d) |
51 | { | 51 | { |
52 | spin_lock(&i8259_irq_lock); | 52 | spin_lock(&i8259_irq_lock); |
53 | __i8259a_disable_irq(irq); | 53 | __i8259a_disable_irq(d->irq); |
54 | spin_unlock(&i8259_irq_lock); | 54 | spin_unlock(&i8259_irq_lock); |
55 | } | 55 | } |
56 | 56 | ||
57 | void | 57 | void |
58 | i8259a_mask_and_ack_irq(unsigned int irq) | 58 | i8259a_mask_and_ack_irq(struct irq_data *d) |
59 | { | 59 | { |
60 | unsigned int irq = d->irq; | ||
61 | |||
60 | spin_lock(&i8259_irq_lock); | 62 | spin_lock(&i8259_irq_lock); |
61 | __i8259a_disable_irq(irq); | 63 | __i8259a_disable_irq(irq); |
62 | 64 | ||
@@ -71,9 +73,9 @@ i8259a_mask_and_ack_irq(unsigned int irq) | |||
71 | 73 | ||
72 | struct irq_chip i8259a_irq_type = { | 74 | struct irq_chip i8259a_irq_type = { |
73 | .name = "XT-PIC", | 75 | .name = "XT-PIC", |
74 | .unmask = i8259a_enable_irq, | 76 | .irq_unmask = i8259a_enable_irq, |
75 | .mask = i8259a_disable_irq, | 77 | .irq_mask = i8259a_disable_irq, |
76 | .mask_ack = i8259a_mask_and_ack_irq, | 78 | .irq_mask_ack = i8259a_mask_and_ack_irq, |
77 | }; | 79 | }; |
78 | 80 | ||
79 | void __init | 81 | void __init |
diff --git a/arch/alpha/kernel/irq_impl.h b/arch/alpha/kernel/irq_impl.h index b63ccd7386f1..d507a234b05d 100644 --- a/arch/alpha/kernel/irq_impl.h +++ b/arch/alpha/kernel/irq_impl.h | |||
@@ -31,11 +31,9 @@ extern void init_rtc_irq(void); | |||
31 | 31 | ||
32 | extern void common_init_isa_dma(void); | 32 | extern void common_init_isa_dma(void); |
33 | 33 | ||
34 | extern void i8259a_enable_irq(unsigned int); | 34 | extern void i8259a_enable_irq(struct irq_data *d); |
35 | extern void i8259a_disable_irq(unsigned int); | 35 | extern void i8259a_disable_irq(struct irq_data *d); |
36 | extern void i8259a_mask_and_ack_irq(unsigned int); | 36 | extern void i8259a_mask_and_ack_irq(struct irq_data *d); |
37 | extern unsigned int i8259a_startup_irq(unsigned int); | ||
38 | extern void i8259a_end_irq(unsigned int); | ||
39 | extern struct irq_chip i8259a_irq_type; | 37 | extern struct irq_chip i8259a_irq_type; |
40 | extern void init_i8259a_irqs(void); | 38 | extern void init_i8259a_irqs(void); |
41 | 39 | ||
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 2863458c853e..b30227fa7f5f 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c | |||
@@ -29,21 +29,21 @@ pyxis_update_irq_hw(unsigned long mask) | |||
29 | } | 29 | } |
30 | 30 | ||
31 | static inline void | 31 | static inline void |
32 | pyxis_enable_irq(unsigned int irq) | 32 | pyxis_enable_irq(struct irq_data *d) |
33 | { | 33 | { |
34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
35 | } | 35 | } |
36 | 36 | ||
37 | static void | 37 | static void |
38 | pyxis_disable_irq(unsigned int irq) | 38 | pyxis_disable_irq(struct irq_data *d) |
39 | { | 39 | { |
40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
41 | } | 41 | } |
42 | 42 | ||
43 | static void | 43 | static void |
44 | pyxis_mask_and_ack_irq(unsigned int irq) | 44 | pyxis_mask_and_ack_irq(struct irq_data *d) |
45 | { | 45 | { |
46 | unsigned long bit = 1UL << (irq - 16); | 46 | unsigned long bit = 1UL << (d->irq - 16); |
47 | unsigned long mask = cached_irq_mask &= ~bit; | 47 | unsigned long mask = cached_irq_mask &= ~bit; |
48 | 48 | ||
49 | /* Disable the interrupt. */ | 49 | /* Disable the interrupt. */ |
@@ -58,9 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq) | |||
58 | 58 | ||
59 | static struct irq_chip pyxis_irq_type = { | 59 | static struct irq_chip pyxis_irq_type = { |
60 | .name = "PYXIS", | 60 | .name = "PYXIS", |
61 | .mask_ack = pyxis_mask_and_ack_irq, | 61 | .irq_mask_ack = pyxis_mask_and_ack_irq, |
62 | .mask = pyxis_disable_irq, | 62 | .irq_mask = pyxis_disable_irq, |
63 | .unmask = pyxis_enable_irq, | 63 | .irq_unmask = pyxis_enable_irq, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | void | 66 | void |
@@ -103,7 +103,7 @@ init_pyxis_irqs(unsigned long ignore_mask) | |||
103 | if ((ignore_mask >> i) & 1) | 103 | if ((ignore_mask >> i) & 1) |
104 | continue; | 104 | continue; |
105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); | 105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); |
106 | irq_to_desc(i)->status |= IRQ_LEVEL; | 106 | irq_set_status_flags(i, IRQ_LEVEL); |
107 | } | 107 | } |
108 | 108 | ||
109 | setup_irq(16+7, &isa_cascade_irqaction); | 109 | setup_irq(16+7, &isa_cascade_irqaction); |
diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index 0e57e828b413..82a47bba41c4 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c | |||
@@ -18,27 +18,27 @@ | |||
18 | DEFINE_SPINLOCK(srm_irq_lock); | 18 | DEFINE_SPINLOCK(srm_irq_lock); |
19 | 19 | ||
20 | static inline void | 20 | static inline void |
21 | srm_enable_irq(unsigned int irq) | 21 | srm_enable_irq(struct irq_data *d) |
22 | { | 22 | { |
23 | spin_lock(&srm_irq_lock); | 23 | spin_lock(&srm_irq_lock); |
24 | cserve_ena(irq - 16); | 24 | cserve_ena(d->irq - 16); |
25 | spin_unlock(&srm_irq_lock); | 25 | spin_unlock(&srm_irq_lock); |
26 | } | 26 | } |
27 | 27 | ||
28 | static void | 28 | static void |
29 | srm_disable_irq(unsigned int irq) | 29 | srm_disable_irq(struct irq_data *d) |
30 | { | 30 | { |
31 | spin_lock(&srm_irq_lock); | 31 | spin_lock(&srm_irq_lock); |
32 | cserve_dis(irq - 16); | 32 | cserve_dis(d->irq - 16); |
33 | spin_unlock(&srm_irq_lock); | 33 | spin_unlock(&srm_irq_lock); |
34 | } | 34 | } |
35 | 35 | ||
36 | /* Handle interrupts from the SRM, assuming no additional weirdness. */ | 36 | /* Handle interrupts from the SRM, assuming no additional weirdness. */ |
37 | static struct irq_chip srm_irq_type = { | 37 | static struct irq_chip srm_irq_type = { |
38 | .name = "SRM", | 38 | .name = "SRM", |
39 | .unmask = srm_enable_irq, | 39 | .irq_unmask = srm_enable_irq, |
40 | .mask = srm_disable_irq, | 40 | .irq_mask = srm_disable_irq, |
41 | .mask_ack = srm_disable_irq, | 41 | .irq_mask_ack = srm_disable_irq, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | void __init | 44 | void __init |
@@ -52,7 +52,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) | |||
52 | if (i < 64 && ((ignore_mask >> i) & 1)) | 52 | if (i < 64 && ((ignore_mask >> i) & 1)) |
53 | continue; | 53 | continue; |
54 | set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); | 54 | set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); |
55 | irq_to_desc(i)->status |= IRQ_LEVEL; | 55 | irq_set_status_flags(i, IRQ_LEVEL); |
56 | } | 56 | } |
57 | } | 57 | } |
58 | 58 | ||
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index 7bef61768236..88d95e872f55 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c | |||
@@ -44,31 +44,31 @@ alcor_update_irq_hw(unsigned long mask) | |||
44 | } | 44 | } |
45 | 45 | ||
46 | static inline void | 46 | static inline void |
47 | alcor_enable_irq(unsigned int irq) | 47 | alcor_enable_irq(struct irq_data *d) |
48 | { | 48 | { |
49 | alcor_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 49 | alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
50 | } | 50 | } |
51 | 51 | ||
52 | static void | 52 | static void |
53 | alcor_disable_irq(unsigned int irq) | 53 | alcor_disable_irq(struct irq_data *d) |
54 | { | 54 | { |
55 | alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 55 | alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
56 | } | 56 | } |
57 | 57 | ||
58 | static void | 58 | static void |
59 | alcor_mask_and_ack_irq(unsigned int irq) | 59 | alcor_mask_and_ack_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | alcor_disable_irq(irq); | 61 | alcor_disable_irq(d); |
62 | 62 | ||
63 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ | 63 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ |
64 | *(vuip)GRU_INT_CLEAR = 1 << (irq - 16); mb(); | 64 | *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); |
65 | *(vuip)GRU_INT_CLEAR = 0; mb(); | 65 | *(vuip)GRU_INT_CLEAR = 0; mb(); |
66 | } | 66 | } |
67 | 67 | ||
68 | static void | 68 | static void |
69 | alcor_isa_mask_and_ack_irq(unsigned int irq) | 69 | alcor_isa_mask_and_ack_irq(struct irq_data *d) |
70 | { | 70 | { |
71 | i8259a_mask_and_ack_irq(irq); | 71 | i8259a_mask_and_ack_irq(d); |
72 | 72 | ||
73 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ | 73 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ |
74 | *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); | 74 | *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); |
@@ -77,9 +77,9 @@ alcor_isa_mask_and_ack_irq(unsigned int irq) | |||
77 | 77 | ||
78 | static struct irq_chip alcor_irq_type = { | 78 | static struct irq_chip alcor_irq_type = { |
79 | .name = "ALCOR", | 79 | .name = "ALCOR", |
80 | .unmask = alcor_enable_irq, | 80 | .irq_unmask = alcor_enable_irq, |
81 | .mask = alcor_disable_irq, | 81 | .irq_mask = alcor_disable_irq, |
82 | .mask_ack = alcor_mask_and_ack_irq, | 82 | .irq_mask_ack = alcor_mask_and_ack_irq, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | static void | 85 | static void |
@@ -126,9 +126,9 @@ alcor_init_irq(void) | |||
126 | if (i >= 16+20 && i <= 16+30) | 126 | if (i >= 16+20 && i <= 16+30) |
127 | continue; | 127 | continue; |
128 | set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); | 128 | set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); |
129 | irq_to_desc(i)->status |= IRQ_LEVEL; | 129 | irq_set_status_flags(i, IRQ_LEVEL); |
130 | } | 130 | } |
131 | i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; | 131 | i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq; |
132 | 132 | ||
133 | init_i8259a_irqs(); | 133 | init_i8259a_irqs(); |
134 | common_init_isa_dma(); | 134 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index b0c916493aea..57eb6307bc27 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c | |||
@@ -46,22 +46,22 @@ cabriolet_update_irq_hw(unsigned int irq, unsigned long mask) | |||
46 | } | 46 | } |
47 | 47 | ||
48 | static inline void | 48 | static inline void |
49 | cabriolet_enable_irq(unsigned int irq) | 49 | cabriolet_enable_irq(struct irq_data *d) |
50 | { | 50 | { |
51 | cabriolet_update_irq_hw(irq, cached_irq_mask &= ~(1UL << irq)); | 51 | cabriolet_update_irq_hw(d->irq, cached_irq_mask &= ~(1UL << d->irq)); |
52 | } | 52 | } |
53 | 53 | ||
54 | static void | 54 | static void |
55 | cabriolet_disable_irq(unsigned int irq) | 55 | cabriolet_disable_irq(struct irq_data *d) |
56 | { | 56 | { |
57 | cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq); | 57 | cabriolet_update_irq_hw(d->irq, cached_irq_mask |= 1UL << d->irq); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct irq_chip cabriolet_irq_type = { | 60 | static struct irq_chip cabriolet_irq_type = { |
61 | .name = "CABRIOLET", | 61 | .name = "CABRIOLET", |
62 | .unmask = cabriolet_enable_irq, | 62 | .irq_unmask = cabriolet_enable_irq, |
63 | .mask = cabriolet_disable_irq, | 63 | .irq_mask = cabriolet_disable_irq, |
64 | .mask_ack = cabriolet_disable_irq, | 64 | .irq_mask_ack = cabriolet_disable_irq, |
65 | }; | 65 | }; |
66 | 66 | ||
67 | static void | 67 | static void |
@@ -107,7 +107,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) | |||
107 | for (i = 16; i < 35; ++i) { | 107 | for (i = 16; i < 35; ++i) { |
108 | set_irq_chip_and_handler(i, &cabriolet_irq_type, | 108 | set_irq_chip_and_handler(i, &cabriolet_irq_type, |
109 | handle_level_irq); | 109 | handle_level_irq); |
110 | irq_to_desc(i)->status |= IRQ_LEVEL; | 110 | irq_set_status_flags(i, IRQ_LEVEL); |
111 | } | 111 | } |
112 | } | 112 | } |
113 | 113 | ||
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index edad5f759ccd..481df4ecb651 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c | |||
@@ -98,37 +98,37 @@ tsunami_update_irq_hw(unsigned long mask) | |||
98 | } | 98 | } |
99 | 99 | ||
100 | static void | 100 | static void |
101 | dp264_enable_irq(unsigned int irq) | 101 | dp264_enable_irq(struct irq_data *d) |
102 | { | 102 | { |
103 | spin_lock(&dp264_irq_lock); | 103 | spin_lock(&dp264_irq_lock); |
104 | cached_irq_mask |= 1UL << irq; | 104 | cached_irq_mask |= 1UL << d->irq; |
105 | tsunami_update_irq_hw(cached_irq_mask); | 105 | tsunami_update_irq_hw(cached_irq_mask); |
106 | spin_unlock(&dp264_irq_lock); | 106 | spin_unlock(&dp264_irq_lock); |
107 | } | 107 | } |
108 | 108 | ||
109 | static void | 109 | static void |
110 | dp264_disable_irq(unsigned int irq) | 110 | dp264_disable_irq(struct irq_data *d) |
111 | { | 111 | { |
112 | spin_lock(&dp264_irq_lock); | 112 | spin_lock(&dp264_irq_lock); |
113 | cached_irq_mask &= ~(1UL << irq); | 113 | cached_irq_mask &= ~(1UL << d->irq); |
114 | tsunami_update_irq_hw(cached_irq_mask); | 114 | tsunami_update_irq_hw(cached_irq_mask); |
115 | spin_unlock(&dp264_irq_lock); | 115 | spin_unlock(&dp264_irq_lock); |
116 | } | 116 | } |
117 | 117 | ||
118 | static void | 118 | static void |
119 | clipper_enable_irq(unsigned int irq) | 119 | clipper_enable_irq(struct irq_data *d) |
120 | { | 120 | { |
121 | spin_lock(&dp264_irq_lock); | 121 | spin_lock(&dp264_irq_lock); |
122 | cached_irq_mask |= 1UL << (irq - 16); | 122 | cached_irq_mask |= 1UL << (d->irq - 16); |
123 | tsunami_update_irq_hw(cached_irq_mask); | 123 | tsunami_update_irq_hw(cached_irq_mask); |
124 | spin_unlock(&dp264_irq_lock); | 124 | spin_unlock(&dp264_irq_lock); |
125 | } | 125 | } |
126 | 126 | ||
127 | static void | 127 | static void |
128 | clipper_disable_irq(unsigned int irq) | 128 | clipper_disable_irq(struct irq_data *d) |
129 | { | 129 | { |
130 | spin_lock(&dp264_irq_lock); | 130 | spin_lock(&dp264_irq_lock); |
131 | cached_irq_mask &= ~(1UL << (irq - 16)); | 131 | cached_irq_mask &= ~(1UL << (d->irq - 16)); |
132 | tsunami_update_irq_hw(cached_irq_mask); | 132 | tsunami_update_irq_hw(cached_irq_mask); |
133 | spin_unlock(&dp264_irq_lock); | 133 | spin_unlock(&dp264_irq_lock); |
134 | } | 134 | } |
@@ -149,10 +149,11 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
149 | } | 149 | } |
150 | 150 | ||
151 | static int | 151 | static int |
152 | dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) | 152 | dp264_set_affinity(struct irq_data *d, const struct cpumask *affinity, |
153 | { | 153 | bool force) |
154 | { | ||
154 | spin_lock(&dp264_irq_lock); | 155 | spin_lock(&dp264_irq_lock); |
155 | cpu_set_irq_affinity(irq, *affinity); | 156 | cpu_set_irq_affinity(d->irq, *affinity); |
156 | tsunami_update_irq_hw(cached_irq_mask); | 157 | tsunami_update_irq_hw(cached_irq_mask); |
157 | spin_unlock(&dp264_irq_lock); | 158 | spin_unlock(&dp264_irq_lock); |
158 | 159 | ||
@@ -160,10 +161,11 @@ dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) | |||
160 | } | 161 | } |
161 | 162 | ||
162 | static int | 163 | static int |
163 | clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) | 164 | clipper_set_affinity(struct irq_data *d, const struct cpumask *affinity, |
164 | { | 165 | bool force) |
166 | { | ||
165 | spin_lock(&dp264_irq_lock); | 167 | spin_lock(&dp264_irq_lock); |
166 | cpu_set_irq_affinity(irq - 16, *affinity); | 168 | cpu_set_irq_affinity(d->irq - 16, *affinity); |
167 | tsunami_update_irq_hw(cached_irq_mask); | 169 | tsunami_update_irq_hw(cached_irq_mask); |
168 | spin_unlock(&dp264_irq_lock); | 170 | spin_unlock(&dp264_irq_lock); |
169 | 171 | ||
@@ -171,19 +173,19 @@ clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) | |||
171 | } | 173 | } |
172 | 174 | ||
173 | static struct irq_chip dp264_irq_type = { | 175 | static struct irq_chip dp264_irq_type = { |
174 | .name = "DP264", | 176 | .name = "DP264", |
175 | .unmask = dp264_enable_irq, | 177 | .irq_unmask = dp264_enable_irq, |
176 | .mask = dp264_disable_irq, | 178 | .irq_mask = dp264_disable_irq, |
177 | .mask_ack = dp264_disable_irq, | 179 | .irq_mask_ack = dp264_disable_irq, |
178 | .set_affinity = dp264_set_affinity, | 180 | .irq_set_affinity = dp264_set_affinity, |
179 | }; | 181 | }; |
180 | 182 | ||
181 | static struct irq_chip clipper_irq_type = { | 183 | static struct irq_chip clipper_irq_type = { |
182 | .name = "CLIPPER", | 184 | .name = "CLIPPER", |
183 | .unmask = clipper_enable_irq, | 185 | .irq_unmask = clipper_enable_irq, |
184 | .mask = clipper_disable_irq, | 186 | .irq_mask = clipper_disable_irq, |
185 | .mask_ack = clipper_disable_irq, | 187 | .irq_mask_ack = clipper_disable_irq, |
186 | .set_affinity = clipper_set_affinity, | 188 | .irq_set_affinity = clipper_set_affinity, |
187 | }; | 189 | }; |
188 | 190 | ||
189 | static void | 191 | static void |
@@ -268,8 +270,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax) | |||
268 | { | 270 | { |
269 | long i; | 271 | long i; |
270 | for (i = imin; i <= imax; ++i) { | 272 | for (i = imin; i <= imax; ++i) { |
271 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
272 | set_irq_chip_and_handler(i, ops, handle_level_irq); | 273 | set_irq_chip_and_handler(i, ops, handle_level_irq); |
274 | irq_set_status_flags(i, IRQ_LEVEL); | ||
273 | } | 275 | } |
274 | } | 276 | } |
275 | 277 | ||
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index ae5f29d127b0..402e908ffb3e 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c | |||
@@ -44,22 +44,22 @@ eb64p_update_irq_hw(unsigned int irq, unsigned long mask) | |||
44 | } | 44 | } |
45 | 45 | ||
46 | static inline void | 46 | static inline void |
47 | eb64p_enable_irq(unsigned int irq) | 47 | eb64p_enable_irq(struct irq_data *d) |
48 | { | 48 | { |
49 | eb64p_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq)); | 49 | eb64p_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); |
50 | } | 50 | } |
51 | 51 | ||
52 | static void | 52 | static void |
53 | eb64p_disable_irq(unsigned int irq) | 53 | eb64p_disable_irq(struct irq_data *d) |
54 | { | 54 | { |
55 | eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq); | 55 | eb64p_update_irq_hw(d->irq, cached_irq_mask |= 1 << d->irq); |
56 | } | 56 | } |
57 | 57 | ||
58 | static struct irq_chip eb64p_irq_type = { | 58 | static struct irq_chip eb64p_irq_type = { |
59 | .name = "EB64P", | 59 | .name = "EB64P", |
60 | .unmask = eb64p_enable_irq, | 60 | .irq_unmask = eb64p_enable_irq, |
61 | .mask = eb64p_disable_irq, | 61 | .irq_mask = eb64p_disable_irq, |
62 | .mask_ack = eb64p_disable_irq, | 62 | .irq_mask_ack = eb64p_disable_irq, |
63 | }; | 63 | }; |
64 | 64 | ||
65 | static void | 65 | static void |
@@ -118,9 +118,9 @@ eb64p_init_irq(void) | |||
118 | init_i8259a_irqs(); | 118 | init_i8259a_irqs(); |
119 | 119 | ||
120 | for (i = 16; i < 32; ++i) { | 120 | for (i = 16; i < 32; ++i) { |
121 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
122 | set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); | 121 | set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); |
123 | } | 122 | irq_set_status_flags(i, IRQ_LEVEL); |
123 | } | ||
124 | 124 | ||
125 | common_init_isa_dma(); | 125 | common_init_isa_dma(); |
126 | setup_irq(16+5, &isa_cascade_irqaction); | 126 | setup_irq(16+5, &isa_cascade_irqaction); |
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index 1121bc5c6c6c..0b44a54c1522 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c | |||
@@ -51,16 +51,18 @@ eiger_update_irq_hw(unsigned long irq, unsigned long mask) | |||
51 | } | 51 | } |
52 | 52 | ||
53 | static inline void | 53 | static inline void |
54 | eiger_enable_irq(unsigned int irq) | 54 | eiger_enable_irq(struct irq_data *d) |
55 | { | 55 | { |
56 | unsigned int irq = d->irq; | ||
56 | unsigned long mask; | 57 | unsigned long mask; |
57 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); | 58 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); |
58 | eiger_update_irq_hw(irq, mask); | 59 | eiger_update_irq_hw(irq, mask); |
59 | } | 60 | } |
60 | 61 | ||
61 | static void | 62 | static void |
62 | eiger_disable_irq(unsigned int irq) | 63 | eiger_disable_irq(struct irq_data *d) |
63 | { | 64 | { |
65 | unsigned int irq = d->irq; | ||
64 | unsigned long mask; | 66 | unsigned long mask; |
65 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); | 67 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); |
66 | eiger_update_irq_hw(irq, mask); | 68 | eiger_update_irq_hw(irq, mask); |
@@ -68,9 +70,9 @@ eiger_disable_irq(unsigned int irq) | |||
68 | 70 | ||
69 | static struct irq_chip eiger_irq_type = { | 71 | static struct irq_chip eiger_irq_type = { |
70 | .name = "EIGER", | 72 | .name = "EIGER", |
71 | .unmask = eiger_enable_irq, | 73 | .irq_unmask = eiger_enable_irq, |
72 | .mask = eiger_disable_irq, | 74 | .irq_mask = eiger_disable_irq, |
73 | .mask_ack = eiger_disable_irq, | 75 | .irq_mask_ack = eiger_disable_irq, |
74 | }; | 76 | }; |
75 | 77 | ||
76 | static void | 78 | static void |
@@ -136,8 +138,8 @@ eiger_init_irq(void) | |||
136 | init_i8259a_irqs(); | 138 | init_i8259a_irqs(); |
137 | 139 | ||
138 | for (i = 16; i < 128; ++i) { | 140 | for (i = 16; i < 128; ++i) { |
139 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
140 | set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); | 141 | set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); |
142 | irq_set_status_flags(i, IRQ_LEVEL); | ||
141 | } | 143 | } |
142 | } | 144 | } |
143 | 145 | ||
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index 34f55e03d331..00341b75c8b2 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c | |||
@@ -63,34 +63,34 @@ | |||
63 | */ | 63 | */ |
64 | 64 | ||
65 | static void | 65 | static void |
66 | jensen_local_enable(unsigned int irq) | 66 | jensen_local_enable(struct irq_data *d) |
67 | { | 67 | { |
68 | /* the parport is really hw IRQ 1, silly Jensen. */ | 68 | /* the parport is really hw IRQ 1, silly Jensen. */ |
69 | if (irq == 7) | 69 | if (d->irq == 7) |
70 | i8259a_enable_irq(1); | 70 | i8259a_enable_irq(d); |
71 | } | 71 | } |
72 | 72 | ||
73 | static void | 73 | static void |
74 | jensen_local_disable(unsigned int irq) | 74 | jensen_local_disable(struct irq_data *d) |
75 | { | 75 | { |
76 | /* the parport is really hw IRQ 1, silly Jensen. */ | 76 | /* the parport is really hw IRQ 1, silly Jensen. */ |
77 | if (irq == 7) | 77 | if (d->irq == 7) |
78 | i8259a_disable_irq(1); | 78 | i8259a_disable_irq(d); |
79 | } | 79 | } |
80 | 80 | ||
81 | static void | 81 | static void |
82 | jensen_local_mask_ack(unsigned int irq) | 82 | jensen_local_mask_ack(struct irq_data *d) |
83 | { | 83 | { |
84 | /* the parport is really hw IRQ 1, silly Jensen. */ | 84 | /* the parport is really hw IRQ 1, silly Jensen. */ |
85 | if (irq == 7) | 85 | if (d->irq == 7) |
86 | i8259a_mask_and_ack_irq(1); | 86 | i8259a_mask_and_ack_irq(d); |
87 | } | 87 | } |
88 | 88 | ||
89 | static struct irq_chip jensen_local_irq_type = { | 89 | static struct irq_chip jensen_local_irq_type = { |
90 | .name = "LOCAL", | 90 | .name = "LOCAL", |
91 | .unmask = jensen_local_enable, | 91 | .irq_unmask = jensen_local_enable, |
92 | .mask = jensen_local_disable, | 92 | .irq_mask = jensen_local_disable, |
93 | .mask_ack = jensen_local_mask_ack, | 93 | .irq_mask_ack = jensen_local_mask_ack, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static void | 96 | static void |
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 2bfc9f1b1ddc..e61910734e41 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c | |||
@@ -104,9 +104,10 @@ io7_get_irq_ctl(unsigned int irq, struct io7 **pio7) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | static void | 106 | static void |
107 | io7_enable_irq(unsigned int irq) | 107 | io7_enable_irq(struct irq_data *d) |
108 | { | 108 | { |
109 | volatile unsigned long *ctl; | 109 | volatile unsigned long *ctl; |
110 | unsigned int irq = d->irq; | ||
110 | struct io7 *io7; | 111 | struct io7 *io7; |
111 | 112 | ||
112 | ctl = io7_get_irq_ctl(irq, &io7); | 113 | ctl = io7_get_irq_ctl(irq, &io7); |
@@ -115,7 +116,7 @@ io7_enable_irq(unsigned int irq) | |||
115 | __func__, irq); | 116 | __func__, irq); |
116 | return; | 117 | return; |
117 | } | 118 | } |
118 | 119 | ||
119 | spin_lock(&io7->irq_lock); | 120 | spin_lock(&io7->irq_lock); |
120 | *ctl |= 1UL << 24; | 121 | *ctl |= 1UL << 24; |
121 | mb(); | 122 | mb(); |
@@ -124,9 +125,10 @@ io7_enable_irq(unsigned int irq) | |||
124 | } | 125 | } |
125 | 126 | ||
126 | static void | 127 | static void |
127 | io7_disable_irq(unsigned int irq) | 128 | io7_disable_irq(struct irq_data *d) |
128 | { | 129 | { |
129 | volatile unsigned long *ctl; | 130 | volatile unsigned long *ctl; |
131 | unsigned int irq = d->irq; | ||
130 | struct io7 *io7; | 132 | struct io7 *io7; |
131 | 133 | ||
132 | ctl = io7_get_irq_ctl(irq, &io7); | 134 | ctl = io7_get_irq_ctl(irq, &io7); |
@@ -135,7 +137,7 @@ io7_disable_irq(unsigned int irq) | |||
135 | __func__, irq); | 137 | __func__, irq); |
136 | return; | 138 | return; |
137 | } | 139 | } |
138 | 140 | ||
139 | spin_lock(&io7->irq_lock); | 141 | spin_lock(&io7->irq_lock); |
140 | *ctl &= ~(1UL << 24); | 142 | *ctl &= ~(1UL << 24); |
141 | mb(); | 143 | mb(); |
@@ -144,35 +146,29 @@ io7_disable_irq(unsigned int irq) | |||
144 | } | 146 | } |
145 | 147 | ||
146 | static void | 148 | static void |
147 | marvel_irq_noop(unsigned int irq) | 149 | marvel_irq_noop(struct irq_data *d) |
148 | { | 150 | { |
149 | return; | 151 | return; |
150 | } | ||
151 | |||
152 | static unsigned int | ||
153 | marvel_irq_noop_return(unsigned int irq) | ||
154 | { | ||
155 | return 0; | ||
156 | } | 152 | } |
157 | 153 | ||
158 | static struct irq_chip marvel_legacy_irq_type = { | 154 | static struct irq_chip marvel_legacy_irq_type = { |
159 | .name = "LEGACY", | 155 | .name = "LEGACY", |
160 | .mask = marvel_irq_noop, | 156 | .irq_mask = marvel_irq_noop, |
161 | .unmask = marvel_irq_noop, | 157 | .irq_unmask = marvel_irq_noop, |
162 | }; | 158 | }; |
163 | 159 | ||
164 | static struct irq_chip io7_lsi_irq_type = { | 160 | static struct irq_chip io7_lsi_irq_type = { |
165 | .name = "LSI", | 161 | .name = "LSI", |
166 | .unmask = io7_enable_irq, | 162 | .irq_unmask = io7_enable_irq, |
167 | .mask = io7_disable_irq, | 163 | .irq_mask = io7_disable_irq, |
168 | .mask_ack = io7_disable_irq, | 164 | .irq_mask_ack = io7_disable_irq, |
169 | }; | 165 | }; |
170 | 166 | ||
171 | static struct irq_chip io7_msi_irq_type = { | 167 | static struct irq_chip io7_msi_irq_type = { |
172 | .name = "MSI", | 168 | .name = "MSI", |
173 | .unmask = io7_enable_irq, | 169 | .irq_unmask = io7_enable_irq, |
174 | .mask = io7_disable_irq, | 170 | .irq_mask = io7_disable_irq, |
175 | .ack = marvel_irq_noop, | 171 | .irq_ack = marvel_irq_noop, |
176 | }; | 172 | }; |
177 | 173 | ||
178 | static void | 174 | static void |
@@ -280,8 +276,8 @@ init_io7_irqs(struct io7 *io7, | |||
280 | 276 | ||
281 | /* Set up the lsi irqs. */ | 277 | /* Set up the lsi irqs. */ |
282 | for (i = 0; i < 128; ++i) { | 278 | for (i = 0; i < 128; ++i) { |
283 | irq_to_desc(base + i)->status |= IRQ_LEVEL; | ||
284 | set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); | 279 | set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); |
280 | irq_set_status_flags(i, IRQ_LEVEL); | ||
285 | } | 281 | } |
286 | 282 | ||
287 | /* Disable the implemented irqs in hardware. */ | 283 | /* Disable the implemented irqs in hardware. */ |
@@ -294,8 +290,8 @@ init_io7_irqs(struct io7 *io7, | |||
294 | 290 | ||
295 | /* Set up the msi irqs. */ | 291 | /* Set up the msi irqs. */ |
296 | for (i = 128; i < (128 + 512); ++i) { | 292 | for (i = 128; i < (128 + 512); ++i) { |
297 | irq_to_desc(base + i)->status |= IRQ_LEVEL; | ||
298 | set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); | 293 | set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); |
294 | irq_set_status_flags(i, IRQ_LEVEL); | ||
299 | } | 295 | } |
300 | 296 | ||
301 | for (i = 0; i < 16; ++i) | 297 | for (i = 0; i < 16; ++i) |
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index bcc1639e8efb..cf7f43dd3147 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c | |||
@@ -43,22 +43,22 @@ mikasa_update_irq_hw(int mask) | |||
43 | } | 43 | } |
44 | 44 | ||
45 | static inline void | 45 | static inline void |
46 | mikasa_enable_irq(unsigned int irq) | 46 | mikasa_enable_irq(struct irq_data *d) |
47 | { | 47 | { |
48 | mikasa_update_irq_hw(cached_irq_mask |= 1 << (irq - 16)); | 48 | mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); |
49 | } | 49 | } |
50 | 50 | ||
51 | static void | 51 | static void |
52 | mikasa_disable_irq(unsigned int irq) | 52 | mikasa_disable_irq(struct irq_data *d) |
53 | { | 53 | { |
54 | mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16))); | 54 | mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); |
55 | } | 55 | } |
56 | 56 | ||
57 | static struct irq_chip mikasa_irq_type = { | 57 | static struct irq_chip mikasa_irq_type = { |
58 | .name = "MIKASA", | 58 | .name = "MIKASA", |
59 | .unmask = mikasa_enable_irq, | 59 | .irq_unmask = mikasa_enable_irq, |
60 | .mask = mikasa_disable_irq, | 60 | .irq_mask = mikasa_disable_irq, |
61 | .mask_ack = mikasa_disable_irq, | 61 | .irq_mask_ack = mikasa_disable_irq, |
62 | }; | 62 | }; |
63 | 63 | ||
64 | static void | 64 | static void |
@@ -98,8 +98,8 @@ mikasa_init_irq(void) | |||
98 | mikasa_update_irq_hw(0); | 98 | mikasa_update_irq_hw(0); |
99 | 99 | ||
100 | for (i = 16; i < 32; ++i) { | 100 | for (i = 16; i < 32; ++i) { |
101 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
102 | set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); | 101 | set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); |
102 | irq_set_status_flags(i, IRQ_LEVEL); | ||
103 | } | 103 | } |
104 | 104 | ||
105 | init_i8259a_irqs(); | 105 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index e88f4ae1260e..92bc188e94a9 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c | |||
@@ -48,22 +48,22 @@ noritake_update_irq_hw(int irq, int mask) | |||
48 | } | 48 | } |
49 | 49 | ||
50 | static void | 50 | static void |
51 | noritake_enable_irq(unsigned int irq) | 51 | noritake_enable_irq(struct irq_data *d) |
52 | { | 52 | { |
53 | noritake_update_irq_hw(irq, cached_irq_mask |= 1 << (irq - 16)); | 53 | noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); |
54 | } | 54 | } |
55 | 55 | ||
56 | static void | 56 | static void |
57 | noritake_disable_irq(unsigned int irq) | 57 | noritake_disable_irq(struct irq_data *d) |
58 | { | 58 | { |
59 | noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16))); | 59 | noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); |
60 | } | 60 | } |
61 | 61 | ||
62 | static struct irq_chip noritake_irq_type = { | 62 | static struct irq_chip noritake_irq_type = { |
63 | .name = "NORITAKE", | 63 | .name = "NORITAKE", |
64 | .unmask = noritake_enable_irq, | 64 | .irq_unmask = noritake_enable_irq, |
65 | .mask = noritake_disable_irq, | 65 | .irq_mask = noritake_disable_irq, |
66 | .mask_ack = noritake_disable_irq, | 66 | .irq_mask_ack = noritake_disable_irq, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static void | 69 | static void |
@@ -127,8 +127,8 @@ noritake_init_irq(void) | |||
127 | outw(0, 0x54c); | 127 | outw(0, 0x54c); |
128 | 128 | ||
129 | for (i = 16; i < 48; ++i) { | 129 | for (i = 16; i < 48; ++i) { |
130 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
131 | set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); | 130 | set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); |
131 | irq_set_status_flags(i, IRQ_LEVEL); | ||
132 | } | 132 | } |
133 | 133 | ||
134 | init_i8259a_irqs(); | 134 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 6a51364dd1cc..936d4140ed5f 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c | |||
@@ -56,9 +56,10 @@ rawhide_update_irq_hw(int hose, int mask) | |||
56 | (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0)) | 56 | (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0)) |
57 | 57 | ||
58 | static inline void | 58 | static inline void |
59 | rawhide_enable_irq(unsigned int irq) | 59 | rawhide_enable_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int mask, hose; | 61 | unsigned int mask, hose; |
62 | unsigned int irq = d->irq; | ||
62 | 63 | ||
63 | irq -= 16; | 64 | irq -= 16; |
64 | hose = irq / 24; | 65 | hose = irq / 24; |
@@ -76,9 +77,10 @@ rawhide_enable_irq(unsigned int irq) | |||
76 | } | 77 | } |
77 | 78 | ||
78 | static void | 79 | static void |
79 | rawhide_disable_irq(unsigned int irq) | 80 | rawhide_disable_irq(struct irq_data *d) |
80 | { | 81 | { |
81 | unsigned int mask, hose; | 82 | unsigned int mask, hose; |
83 | unsigned int irq = d->irq; | ||
82 | 84 | ||
83 | irq -= 16; | 85 | irq -= 16; |
84 | hose = irq / 24; | 86 | hose = irq / 24; |
@@ -96,9 +98,10 @@ rawhide_disable_irq(unsigned int irq) | |||
96 | } | 98 | } |
97 | 99 | ||
98 | static void | 100 | static void |
99 | rawhide_mask_and_ack_irq(unsigned int irq) | 101 | rawhide_mask_and_ack_irq(struct irq_data *d) |
100 | { | 102 | { |
101 | unsigned int mask, mask1, hose; | 103 | unsigned int mask, mask1, hose; |
104 | unsigned int irq = d->irq; | ||
102 | 105 | ||
103 | irq -= 16; | 106 | irq -= 16; |
104 | hose = irq / 24; | 107 | hose = irq / 24; |
@@ -123,9 +126,9 @@ rawhide_mask_and_ack_irq(unsigned int irq) | |||
123 | 126 | ||
124 | static struct irq_chip rawhide_irq_type = { | 127 | static struct irq_chip rawhide_irq_type = { |
125 | .name = "RAWHIDE", | 128 | .name = "RAWHIDE", |
126 | .unmask = rawhide_enable_irq, | 129 | .irq_unmask = rawhide_enable_irq, |
127 | .mask = rawhide_disable_irq, | 130 | .irq_mask = rawhide_disable_irq, |
128 | .mask_ack = rawhide_mask_and_ack_irq, | 131 | .irq_mask_ack = rawhide_mask_and_ack_irq, |
129 | }; | 132 | }; |
130 | 133 | ||
131 | static void | 134 | static void |
@@ -177,8 +180,8 @@ rawhide_init_irq(void) | |||
177 | } | 180 | } |
178 | 181 | ||
179 | for (i = 16; i < 128; ++i) { | 182 | for (i = 16; i < 128; ++i) { |
180 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
181 | set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); | 183 | set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); |
184 | irq_set_status_flags(i, IRQ_LEVEL); | ||
182 | } | 185 | } |
183 | 186 | ||
184 | init_i8259a_irqs(); | 187 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index 89e7e37ec84c..cea22a62913b 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c | |||
@@ -47,22 +47,22 @@ rx164_update_irq_hw(unsigned long mask) | |||
47 | } | 47 | } |
48 | 48 | ||
49 | static inline void | 49 | static inline void |
50 | rx164_enable_irq(unsigned int irq) | 50 | rx164_enable_irq(struct irq_data *d) |
51 | { | 51 | { |
52 | rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 52 | rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
53 | } | 53 | } |
54 | 54 | ||
55 | static void | 55 | static void |
56 | rx164_disable_irq(unsigned int irq) | 56 | rx164_disable_irq(struct irq_data *d) |
57 | { | 57 | { |
58 | rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 58 | rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
59 | } | 59 | } |
60 | 60 | ||
61 | static struct irq_chip rx164_irq_type = { | 61 | static struct irq_chip rx164_irq_type = { |
62 | .name = "RX164", | 62 | .name = "RX164", |
63 | .unmask = rx164_enable_irq, | 63 | .irq_unmask = rx164_enable_irq, |
64 | .mask = rx164_disable_irq, | 64 | .irq_mask = rx164_disable_irq, |
65 | .mask_ack = rx164_disable_irq, | 65 | .irq_mask_ack = rx164_disable_irq, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static void | 68 | static void |
@@ -99,8 +99,8 @@ rx164_init_irq(void) | |||
99 | 99 | ||
100 | rx164_update_irq_hw(0); | 100 | rx164_update_irq_hw(0); |
101 | for (i = 16; i < 40; ++i) { | 101 | for (i = 16; i < 40; ++i) { |
102 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
103 | set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); | 102 | set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); |
103 | irq_set_status_flags(i, IRQ_LEVEL); | ||
104 | } | 104 | } |
105 | 105 | ||
106 | init_i8259a_irqs(); | 106 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index 5c4423d1b06c..a349538aabc9 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c | |||
@@ -443,11 +443,11 @@ lynx_swizzle(struct pci_dev *dev, u8 *pinp) | |||
443 | /* GENERIC irq routines */ | 443 | /* GENERIC irq routines */ |
444 | 444 | ||
445 | static inline void | 445 | static inline void |
446 | sable_lynx_enable_irq(unsigned int irq) | 446 | sable_lynx_enable_irq(struct irq_data *d) |
447 | { | 447 | { |
448 | unsigned long bit, mask; | 448 | unsigned long bit, mask; |
449 | 449 | ||
450 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 450 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
451 | spin_lock(&sable_lynx_irq_lock); | 451 | spin_lock(&sable_lynx_irq_lock); |
452 | mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); | 452 | mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); |
453 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 453 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -459,11 +459,11 @@ sable_lynx_enable_irq(unsigned int irq) | |||
459 | } | 459 | } |
460 | 460 | ||
461 | static void | 461 | static void |
462 | sable_lynx_disable_irq(unsigned int irq) | 462 | sable_lynx_disable_irq(struct irq_data *d) |
463 | { | 463 | { |
464 | unsigned long bit, mask; | 464 | unsigned long bit, mask; |
465 | 465 | ||
466 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 466 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
467 | spin_lock(&sable_lynx_irq_lock); | 467 | spin_lock(&sable_lynx_irq_lock); |
468 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; | 468 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; |
469 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 469 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -475,11 +475,11 @@ sable_lynx_disable_irq(unsigned int irq) | |||
475 | } | 475 | } |
476 | 476 | ||
477 | static void | 477 | static void |
478 | sable_lynx_mask_and_ack_irq(unsigned int irq) | 478 | sable_lynx_mask_and_ack_irq(struct irq_data *d) |
479 | { | 479 | { |
480 | unsigned long bit, mask; | 480 | unsigned long bit, mask; |
481 | 481 | ||
482 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 482 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
483 | spin_lock(&sable_lynx_irq_lock); | 483 | spin_lock(&sable_lynx_irq_lock); |
484 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; | 484 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; |
485 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 485 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -489,9 +489,9 @@ sable_lynx_mask_and_ack_irq(unsigned int irq) | |||
489 | 489 | ||
490 | static struct irq_chip sable_lynx_irq_type = { | 490 | static struct irq_chip sable_lynx_irq_type = { |
491 | .name = "SABLE/LYNX", | 491 | .name = "SABLE/LYNX", |
492 | .unmask = sable_lynx_enable_irq, | 492 | .irq_unmask = sable_lynx_enable_irq, |
493 | .mask = sable_lynx_disable_irq, | 493 | .irq_mask = sable_lynx_disable_irq, |
494 | .mask_ack = sable_lynx_mask_and_ack_irq, | 494 | .irq_mask_ack = sable_lynx_mask_and_ack_irq, |
495 | }; | 495 | }; |
496 | 496 | ||
497 | static void | 497 | static void |
@@ -518,9 +518,9 @@ sable_lynx_init_irq(int nr_of_irqs) | |||
518 | long i; | 518 | long i; |
519 | 519 | ||
520 | for (i = 0; i < nr_of_irqs; ++i) { | 520 | for (i = 0; i < nr_of_irqs; ++i) { |
521 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
522 | set_irq_chip_and_handler(i, &sable_lynx_irq_type, | 521 | set_irq_chip_and_handler(i, &sable_lynx_irq_type, |
523 | handle_level_irq); | 522 | handle_level_irq); |
523 | irq_set_status_flags(i, IRQ_LEVEL); | ||
524 | } | 524 | } |
525 | 525 | ||
526 | common_init_isa_dma(); | 526 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index f8a1e8a862fb..42a5331f13c4 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c | |||
@@ -45,16 +45,18 @@ takara_update_irq_hw(unsigned long irq, unsigned long mask) | |||
45 | } | 45 | } |
46 | 46 | ||
47 | static inline void | 47 | static inline void |
48 | takara_enable_irq(unsigned int irq) | 48 | takara_enable_irq(struct irq_data *d) |
49 | { | 49 | { |
50 | unsigned int irq = d->irq; | ||
50 | unsigned long mask; | 51 | unsigned long mask; |
51 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); | 52 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); |
52 | takara_update_irq_hw(irq, mask); | 53 | takara_update_irq_hw(irq, mask); |
53 | } | 54 | } |
54 | 55 | ||
55 | static void | 56 | static void |
56 | takara_disable_irq(unsigned int irq) | 57 | takara_disable_irq(struct irq_data *d) |
57 | { | 58 | { |
59 | unsigned int irq = d->irq; | ||
58 | unsigned long mask; | 60 | unsigned long mask; |
59 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); | 61 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); |
60 | takara_update_irq_hw(irq, mask); | 62 | takara_update_irq_hw(irq, mask); |
@@ -62,9 +64,9 @@ takara_disable_irq(unsigned int irq) | |||
62 | 64 | ||
63 | static struct irq_chip takara_irq_type = { | 65 | static struct irq_chip takara_irq_type = { |
64 | .name = "TAKARA", | 66 | .name = "TAKARA", |
65 | .unmask = takara_enable_irq, | 67 | .irq_unmask = takara_enable_irq, |
66 | .mask = takara_disable_irq, | 68 | .irq_mask = takara_disable_irq, |
67 | .mask_ack = takara_disable_irq, | 69 | .irq_mask_ack = takara_disable_irq, |
68 | }; | 70 | }; |
69 | 71 | ||
70 | static void | 72 | static void |
@@ -136,8 +138,8 @@ takara_init_irq(void) | |||
136 | takara_update_irq_hw(i, -1); | 138 | takara_update_irq_hw(i, -1); |
137 | 139 | ||
138 | for (i = 16; i < 128; ++i) { | 140 | for (i = 16; i < 128; ++i) { |
139 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
140 | set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); | 141 | set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); |
142 | irq_set_status_flags(i, IRQ_LEVEL); | ||
141 | } | 143 | } |
142 | 144 | ||
143 | common_init_isa_dma(); | 145 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index e02494bf5ef3..f6c108a3d673 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c | |||
@@ -112,8 +112,9 @@ titan_update_irq_hw(unsigned long mask) | |||
112 | } | 112 | } |
113 | 113 | ||
114 | static inline void | 114 | static inline void |
115 | titan_enable_irq(unsigned int irq) | 115 | titan_enable_irq(struct irq_data *d) |
116 | { | 116 | { |
117 | unsigned int irq = d->irq; | ||
117 | spin_lock(&titan_irq_lock); | 118 | spin_lock(&titan_irq_lock); |
118 | titan_cached_irq_mask |= 1UL << (irq - 16); | 119 | titan_cached_irq_mask |= 1UL << (irq - 16); |
119 | titan_update_irq_hw(titan_cached_irq_mask); | 120 | titan_update_irq_hw(titan_cached_irq_mask); |
@@ -121,8 +122,9 @@ titan_enable_irq(unsigned int irq) | |||
121 | } | 122 | } |
122 | 123 | ||
123 | static inline void | 124 | static inline void |
124 | titan_disable_irq(unsigned int irq) | 125 | titan_disable_irq(struct irq_data *d) |
125 | { | 126 | { |
127 | unsigned int irq = d->irq; | ||
126 | spin_lock(&titan_irq_lock); | 128 | spin_lock(&titan_irq_lock); |
127 | titan_cached_irq_mask &= ~(1UL << (irq - 16)); | 129 | titan_cached_irq_mask &= ~(1UL << (irq - 16)); |
128 | titan_update_irq_hw(titan_cached_irq_mask); | 130 | titan_update_irq_hw(titan_cached_irq_mask); |
@@ -144,7 +146,8 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
144 | } | 146 | } |
145 | 147 | ||
146 | static int | 148 | static int |
147 | titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 149 | titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, |
150 | bool force) | ||
148 | { | 151 | { |
149 | spin_lock(&titan_irq_lock); | 152 | spin_lock(&titan_irq_lock); |
150 | titan_cpu_set_irq_affinity(irq - 16, *affinity); | 153 | titan_cpu_set_irq_affinity(irq - 16, *affinity); |
@@ -175,17 +178,17 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax) | |||
175 | { | 178 | { |
176 | long i; | 179 | long i; |
177 | for (i = imin; i <= imax; ++i) { | 180 | for (i = imin; i <= imax; ++i) { |
178 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
179 | set_irq_chip_and_handler(i, ops, handle_level_irq); | 181 | set_irq_chip_and_handler(i, ops, handle_level_irq); |
182 | irq_set_status_flags(i, IRQ_LEVEL); | ||
180 | } | 183 | } |
181 | } | 184 | } |
182 | 185 | ||
183 | static struct irq_chip titan_irq_type = { | 186 | static struct irq_chip titan_irq_type = { |
184 | .name = "TITAN", | 187 | .name = "TITAN", |
185 | .unmask = titan_enable_irq, | 188 | .irq_unmask = titan_enable_irq, |
186 | .mask = titan_disable_irq, | 189 | .irq_mask = titan_disable_irq, |
187 | .mask_ack = titan_disable_irq, | 190 | .irq_mask_ack = titan_disable_irq, |
188 | .set_affinity = titan_set_irq_affinity, | 191 | .irq_set_affinity = titan_set_irq_affinity, |
189 | }; | 192 | }; |
190 | 193 | ||
191 | static irqreturn_t | 194 | static irqreturn_t |
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index eec52594d410..ca60a387ef0a 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c | |||
@@ -104,10 +104,12 @@ wildfire_init_irq_hw(void) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | static void | 106 | static void |
107 | wildfire_enable_irq(unsigned int irq) | 107 | wildfire_enable_irq(struct irq_data *d) |
108 | { | 108 | { |
109 | unsigned int irq = d->irq; | ||
110 | |||
109 | if (irq < 16) | 111 | if (irq < 16) |
110 | i8259a_enable_irq(irq); | 112 | i8259a_enable_irq(d); |
111 | 113 | ||
112 | spin_lock(&wildfire_irq_lock); | 114 | spin_lock(&wildfire_irq_lock); |
113 | set_bit(irq, &cached_irq_mask); | 115 | set_bit(irq, &cached_irq_mask); |
@@ -116,10 +118,12 @@ wildfire_enable_irq(unsigned int irq) | |||
116 | } | 118 | } |
117 | 119 | ||
118 | static void | 120 | static void |
119 | wildfire_disable_irq(unsigned int irq) | 121 | wildfire_disable_irq(struct irq_data *d) |
120 | { | 122 | { |
123 | unsigned int irq = d->irq; | ||
124 | |||
121 | if (irq < 16) | 125 | if (irq < 16) |
122 | i8259a_disable_irq(irq); | 126 | i8259a_disable_irq(d); |
123 | 127 | ||
124 | spin_lock(&wildfire_irq_lock); | 128 | spin_lock(&wildfire_irq_lock); |
125 | clear_bit(irq, &cached_irq_mask); | 129 | clear_bit(irq, &cached_irq_mask); |
@@ -128,10 +132,12 @@ wildfire_disable_irq(unsigned int irq) | |||
128 | } | 132 | } |
129 | 133 | ||
130 | static void | 134 | static void |
131 | wildfire_mask_and_ack_irq(unsigned int irq) | 135 | wildfire_mask_and_ack_irq(struct irq_data *d) |
132 | { | 136 | { |
137 | unsigned int irq = d->irq; | ||
138 | |||
133 | if (irq < 16) | 139 | if (irq < 16) |
134 | i8259a_mask_and_ack_irq(irq); | 140 | i8259a_mask_and_ack_irq(d); |
135 | 141 | ||
136 | spin_lock(&wildfire_irq_lock); | 142 | spin_lock(&wildfire_irq_lock); |
137 | clear_bit(irq, &cached_irq_mask); | 143 | clear_bit(irq, &cached_irq_mask); |
@@ -141,9 +147,9 @@ wildfire_mask_and_ack_irq(unsigned int irq) | |||
141 | 147 | ||
142 | static struct irq_chip wildfire_irq_type = { | 148 | static struct irq_chip wildfire_irq_type = { |
143 | .name = "WILDFIRE", | 149 | .name = "WILDFIRE", |
144 | .unmask = wildfire_enable_irq, | 150 | .irq_unmask = wildfire_enable_irq, |
145 | .mask = wildfire_disable_irq, | 151 | .irq_mask = wildfire_disable_irq, |
146 | .mask_ack = wildfire_mask_and_ack_irq, | 152 | .irq_mask_ack = wildfire_mask_and_ack_irq, |
147 | }; | 153 | }; |
148 | 154 | ||
149 | static void __init | 155 | static void __init |
@@ -177,21 +183,21 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) | |||
177 | for (i = 0; i < 16; ++i) { | 183 | for (i = 0; i < 16; ++i) { |
178 | if (i == 2) | 184 | if (i == 2) |
179 | continue; | 185 | continue; |
180 | irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; | ||
181 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, | 186 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, |
182 | handle_level_irq); | 187 | handle_level_irq); |
188 | irq_set_status_flags(i + irq_bias, IRQ_LEVEL); | ||
183 | } | 189 | } |
184 | 190 | ||
185 | irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL; | ||
186 | set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, | 191 | set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, |
187 | handle_level_irq); | 192 | handle_level_irq); |
193 | irq_set_status_flags(36 + irq_bias, IRQ_LEVEL); | ||
188 | for (i = 40; i < 64; ++i) { | 194 | for (i = 40; i < 64; ++i) { |
189 | irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; | ||
190 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, | 195 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, |
191 | handle_level_irq); | 196 | handle_level_irq); |
197 | irq_set_status_flags(i + irq_bias, IRQ_LEVEL); | ||
192 | } | 198 | } |
193 | 199 | ||
194 | setup_irq(32+irq_bias, &isa_enable); | 200 | setup_irq(32+irq_bias, &isa_enable); |
195 | } | 201 | } |
196 | 202 | ||
197 | static void __init | 203 | static void __init |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 26d45e5b636b..38bf684448e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -346,7 +346,7 @@ config ARCH_FOOTBRIDGE | |||
346 | bool "FootBridge" | 346 | bool "FootBridge" |
347 | select CPU_SA110 | 347 | select CPU_SA110 |
348 | select FOOTBRIDGE | 348 | select FOOTBRIDGE |
349 | select ARCH_USES_GETTIMEOFFSET | 349 | select GENERIC_CLOCKEVENTS |
350 | help | 350 | help |
351 | Support for systems based on the DC21285 companion chip | 351 | Support for systems based on the DC21285 companion chip |
352 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | 352 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. |
@@ -875,6 +875,16 @@ config PLAT_SPEAR | |||
875 | help | 875 | help |
876 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | 876 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). |
877 | 877 | ||
878 | config ARCH_VT8500 | ||
879 | bool "VIA/WonderMedia 85xx" | ||
880 | select CPU_ARM926T | ||
881 | select GENERIC_GPIO | ||
882 | select ARCH_HAS_CPUFREQ | ||
883 | select GENERIC_CLOCKEVENTS | ||
884 | select ARCH_REQUIRE_GPIOLIB | ||
885 | select HAVE_PWM | ||
886 | help | ||
887 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. | ||
878 | endchoice | 888 | endchoice |
879 | 889 | ||
880 | # | 890 | # |
@@ -1007,6 +1017,8 @@ source "arch/arm/mach-versatile/Kconfig" | |||
1007 | 1017 | ||
1008 | source "arch/arm/mach-vexpress/Kconfig" | 1018 | source "arch/arm/mach-vexpress/Kconfig" |
1009 | 1019 | ||
1020 | source "arch/arm/mach-vt8500/Kconfig" | ||
1021 | |||
1010 | source "arch/arm/mach-w90x900/Kconfig" | 1022 | source "arch/arm/mach-w90x900/Kconfig" |
1011 | 1023 | ||
1012 | # Definitions to make life easier | 1024 | # Definitions to make life easier |
@@ -1177,6 +1189,53 @@ config ARM_ERRATA_743622 | |||
1177 | visible impact on the overall performance or power consumption of the | 1189 | visible impact on the overall performance or power consumption of the |
1178 | processor. | 1190 | processor. |
1179 | 1191 | ||
1192 | config ARM_ERRATA_751472 | ||
1193 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | ||
1194 | depends on CPU_V7 && SMP | ||
1195 | help | ||
1196 | This option enables the workaround for the 751472 Cortex-A9 (prior | ||
1197 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | ||
1198 | completion of a following broadcasted operation if the second | ||
1199 | operation is received by a CPU before the ICIALLUIS has completed, | ||
1200 | potentially leading to corrupted entries in the cache or TLB. | ||
1201 | |||
1202 | config ARM_ERRATA_753970 | ||
1203 | bool "ARM errata: cache sync operation may be faulty" | ||
1204 | depends on CACHE_PL310 | ||
1205 | help | ||
1206 | This option enables the workaround for the 753970 PL310 (r3p0) erratum. | ||
1207 | |||
1208 | Under some condition the effect of cache sync operation on | ||
1209 | the store buffer still remains when the operation completes. | ||
1210 | This means that the store buffer is always asked to drain and | ||
1211 | this prevents it from merging any further writes. The workaround | ||
1212 | is to replace the normal offset of cache sync operation (0x730) | ||
1213 | by another offset targeting an unmapped PL310 register 0x740. | ||
1214 | This has the same effect as the cache sync operation: store buffer | ||
1215 | drain and waiting for all buffers empty. | ||
1216 | |||
1217 | config ARM_ERRATA_754322 | ||
1218 | bool "ARM errata: possible faulty MMU translations following an ASID switch" | ||
1219 | depends on CPU_V7 | ||
1220 | help | ||
1221 | This option enables the workaround for the 754322 Cortex-A9 (r2p*, | ||
1222 | r3p*) erratum. A speculative memory access may cause a page table walk | ||
1223 | which starts prior to an ASID switch but completes afterwards. This | ||
1224 | can populate the micro-TLB with a stale entry which may be hit with | ||
1225 | the new ASID. This workaround places two dsb instructions in the mm | ||
1226 | switching code so that no page table walks can cross the ASID switch. | ||
1227 | |||
1228 | config ARM_ERRATA_754327 | ||
1229 | bool "ARM errata: no automatic Store Buffer drain" | ||
1230 | depends on CPU_V7 && SMP | ||
1231 | help | ||
1232 | This option enables the workaround for the 754327 Cortex-A9 (prior to | ||
1233 | r2p0) erratum. The Store Buffer does not have any automatic draining | ||
1234 | mechanism and therefore a livelock may occur if an external agent | ||
1235 | continuously polls a memory location waiting to observe an update. | ||
1236 | This workaround defines cpu_relax() as smp_mb(), preventing correctly | ||
1237 | written polling loops from denying visibility of updates to memory. | ||
1238 | |||
1180 | endmenu | 1239 | endmenu |
1181 | 1240 | ||
1182 | source "arch/arm/common/Kconfig" | 1241 | source "arch/arm/common/Kconfig" |
@@ -1619,6 +1678,18 @@ config ZBOOT_ROM | |||
1619 | Say Y here if you intend to execute your compressed kernel image | 1678 | Say Y here if you intend to execute your compressed kernel image |
1620 | (zImage) directly from ROM or flash. If unsure, say N. | 1679 | (zImage) directly from ROM or flash. If unsure, say N. |
1621 | 1680 | ||
1681 | config ZBOOT_ROM_MMCIF | ||
1682 | bool "Include MMCIF loader in zImage (EXPERIMENTAL)" | ||
1683 | depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL | ||
1684 | help | ||
1685 | Say Y here to include experimental MMCIF loading code in the | ||
1686 | ROM-able zImage. With this enabled it is possible to write the | ||
1687 | the ROM-able zImage kernel image to an MMC card and boot the | ||
1688 | kernel straight from the reset vector. At reset the processor | ||
1689 | Mask ROM will load the first part of the the ROM-able zImage | ||
1690 | which in turn loads the rest the kernel image to RAM using the | ||
1691 | MMCIF hardware block. | ||
1692 | |||
1622 | config CMDLINE | 1693 | config CMDLINE |
1623 | string "Default kernel command string" | 1694 | string "Default kernel command string" |
1624 | default "" | 1695 | default "" |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c22c1adfedd6..cd56c9129a1a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -15,7 +15,7 @@ ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) | |||
15 | LDFLAGS_vmlinux += --be8 | 15 | LDFLAGS_vmlinux += --be8 |
16 | endif | 16 | endif |
17 | 17 | ||
18 | OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S | 18 | OBJCOPYFLAGS :=-O binary -R .comment -S |
19 | GZFLAGS :=-9 | 19 | GZFLAGS :=-9 |
20 | #KBUILD_CFLAGS +=-pipe | 20 | #KBUILD_CFLAGS +=-pipe |
21 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: | 21 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: |
@@ -190,6 +190,7 @@ machine-$(CONFIG_ARCH_U300) := u300 | |||
190 | machine-$(CONFIG_ARCH_U8500) := ux500 | 190 | machine-$(CONFIG_ARCH_U8500) := ux500 |
191 | machine-$(CONFIG_ARCH_VERSATILE) := versatile | 191 | machine-$(CONFIG_ARCH_VERSATILE) := versatile |
192 | machine-$(CONFIG_ARCH_VEXPRESS) := vexpress | 192 | machine-$(CONFIG_ARCH_VEXPRESS) := vexpress |
193 | machine-$(CONFIG_ARCH_VT8500) := vt8500 | ||
193 | machine-$(CONFIG_ARCH_W90X900) := w90x900 | 194 | machine-$(CONFIG_ARCH_W90X900) := w90x900 |
194 | machine-$(CONFIG_ARCH_NUC93X) := nuc93x | 195 | machine-$(CONFIG_ARCH_NUC93X) := nuc93x |
195 | machine-$(CONFIG_FOOTBRIDGE) := footbridge | 196 | machine-$(CONFIG_FOOTBRIDGE) := footbridge |
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore index ab204db594d3..c6028967d336 100644 --- a/arch/arm/boot/compressed/.gitignore +++ b/arch/arm/boot/compressed/.gitignore | |||
@@ -1,3 +1,7 @@ | |||
1 | font.c | 1 | font.c |
2 | piggy.gz | 2 | lib1funcs.S |
3 | piggy.gzip | ||
4 | piggy.lzo | ||
5 | piggy.lzma | ||
6 | vmlinux | ||
3 | vmlinux.lds | 7 | vmlinux.lds |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 0a8f748e506a..5f3a1614dc63 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -4,9 +4,20 @@ | |||
4 | # create a compressed vmlinuz image from the original vmlinux | 4 | # create a compressed vmlinuz image from the original vmlinux |
5 | # | 5 | # |
6 | 6 | ||
7 | OBJS = | ||
8 | |||
9 | # Ensure that mmcif loader code appears early in the image | ||
10 | # to minimise that number of bocks that have to be read in | ||
11 | # order to load it. | ||
12 | ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y) | ||
13 | ifeq ($(CONFIG_ARCH_SH7372),y) | ||
14 | OBJS += mmcif-sh7372.o | ||
15 | endif | ||
16 | endif | ||
17 | |||
7 | AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET) | 18 | AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET) |
8 | HEAD = head.o | 19 | HEAD = head.o |
9 | OBJS = misc.o decompress.o | 20 | OBJS += misc.o decompress.o |
10 | FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c | 21 | FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c |
11 | 22 | ||
12 | # | 23 | # |
@@ -29,6 +40,10 @@ ifeq ($(CONFIG_ARCH_SA1100),y) | |||
29 | OBJS += head-sa1100.o | 40 | OBJS += head-sa1100.o |
30 | endif | 41 | endif |
31 | 42 | ||
43 | ifeq ($(CONFIG_ARCH_VT8500),y) | ||
44 | OBJS += head-vt8500.o | ||
45 | endif | ||
46 | |||
32 | ifeq ($(CONFIG_CPU_XSCALE),y) | 47 | ifeq ($(CONFIG_CPU_XSCALE),y) |
33 | OBJS += head-xscale.o | 48 | OBJS += head-xscale.o |
34 | endif | 49 | endif |
diff --git a/arch/arm/boot/compressed/head-shmobile.S b/arch/arm/boot/compressed/head-shmobile.S index 30973b76e6ae..c943d2e7da9d 100644 --- a/arch/arm/boot/compressed/head-shmobile.S +++ b/arch/arm/boot/compressed/head-shmobile.S | |||
@@ -25,6 +25,36 @@ | |||
25 | /* load board-specific initialization code */ | 25 | /* load board-specific initialization code */ |
26 | #include <mach/zboot.h> | 26 | #include <mach/zboot.h> |
27 | 27 | ||
28 | #ifdef CONFIG_ZBOOT_ROM_MMCIF | ||
29 | /* Load image from MMC */ | ||
30 | adr sp, __tmp_stack + 128 | ||
31 | ldr r0, __image_start | ||
32 | ldr r1, __image_end | ||
33 | subs r1, r1, r0 | ||
34 | ldr r0, __load_base | ||
35 | bl mmcif_loader | ||
36 | |||
37 | /* Jump to loaded code */ | ||
38 | ldr r0, __loaded | ||
39 | ldr r1, __image_start | ||
40 | sub r0, r0, r1 | ||
41 | ldr r1, __load_base | ||
42 | add pc, r0, r1 | ||
43 | |||
44 | __image_start: | ||
45 | .long _start | ||
46 | __image_end: | ||
47 | .long _got_end | ||
48 | __load_base: | ||
49 | .long CONFIG_MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM | ||
50 | __loaded: | ||
51 | .long __continue | ||
52 | .align | ||
53 | __tmp_stack: | ||
54 | .space 128 | ||
55 | __continue: | ||
56 | #endif /* CONFIG_ZBOOT_ROM_MMCIF */ | ||
57 | |||
28 | b 1f | 58 | b 1f |
29 | __atags:@ tag #1 | 59 | __atags:@ tag #1 |
30 | .long 12 @ tag->hdr.size = tag_size(tag_core); | 60 | .long 12 @ tag->hdr.size = tag_size(tag_core); |
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S new file mode 100644 index 000000000000..1dc1e21a3be3 --- /dev/null +++ b/arch/arm/boot/compressed/head-vt8500.S | |||
@@ -0,0 +1,46 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/boot/compressed/head-vt8500.S | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * VIA VT8500 specific tweaks. This is merged into head.S by the linker. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/mach-types.h> | ||
12 | |||
13 | .section ".start", "ax" | ||
14 | |||
15 | __VT8500_start: | ||
16 | @ Compare the SCC ID register against a list of known values | ||
17 | ldr r1, .SCCID | ||
18 | ldr r3, [r1] | ||
19 | |||
20 | @ VT8500 override | ||
21 | ldr r4, .VT8500SCC | ||
22 | cmp r3, r4 | ||
23 | ldreq r7, .ID_BV07 | ||
24 | beq .Lendvt8500 | ||
25 | |||
26 | @ WM8505 override | ||
27 | ldr r4, .WM8505SCC | ||
28 | cmp r3, r4 | ||
29 | ldreq r7, .ID_8505 | ||
30 | beq .Lendvt8500 | ||
31 | |||
32 | @ Otherwise, leave the bootloader's machine id untouched | ||
33 | |||
34 | .SCCID: | ||
35 | .word 0xd8120000 | ||
36 | .VT8500SCC: | ||
37 | .word 0x34000102 | ||
38 | .WM8505SCC: | ||
39 | .word 0x34260103 | ||
40 | |||
41 | .ID_BV07: | ||
42 | .word MACH_TYPE_BV07 | ||
43 | .ID_8505: | ||
44 | .word MACH_TYPE_WM8505_7IN_NETBOOK | ||
45 | |||
46 | .Lendvt8500: | ||
diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c new file mode 100644 index 000000000000..e6180af241f6 --- /dev/null +++ b/arch/arm/boot/compressed/mmcif-sh7372.c | |||
@@ -0,0 +1,87 @@ | |||
1 | /* | ||
2 | * sh7372 MMCIF loader | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2010 Simon Horman | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | |||
12 | #include <linux/mmc/sh_mmcif.h> | ||
13 | #include <mach/mmcif.h> | ||
14 | |||
15 | #define MMCIF_BASE (void __iomem *)0xe6bd0000 | ||
16 | |||
17 | #define PORT84CR (void __iomem *)0xe6050054 | ||
18 | #define PORT85CR (void __iomem *)0xe6050055 | ||
19 | #define PORT86CR (void __iomem *)0xe6050056 | ||
20 | #define PORT87CR (void __iomem *)0xe6050057 | ||
21 | #define PORT88CR (void __iomem *)0xe6050058 | ||
22 | #define PORT89CR (void __iomem *)0xe6050059 | ||
23 | #define PORT90CR (void __iomem *)0xe605005a | ||
24 | #define PORT91CR (void __iomem *)0xe605005b | ||
25 | #define PORT92CR (void __iomem *)0xe605005c | ||
26 | #define PORT99CR (void __iomem *)0xe6050063 | ||
27 | |||
28 | #define SMSTPCR3 (void __iomem *)0xe615013c | ||
29 | |||
30 | /* SH7372 specific MMCIF loader | ||
31 | * | ||
32 | * loads the zImage from an MMC card starting from block 1. | ||
33 | * | ||
34 | * The image must be start with a vrl4 header and | ||
35 | * the zImage must start at offset 512 of the image. That is, | ||
36 | * at block 2 (=byte 1024) on the media | ||
37 | * | ||
38 | * Use the following line to write the vrl4 formated zImage | ||
39 | * to an MMC card | ||
40 | * # dd if=vrl4.out of=/dev/sdx bs=512 seek=1 | ||
41 | */ | ||
42 | asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) | ||
43 | { | ||
44 | mmcif_init_progress(); | ||
45 | mmcif_update_progress(MMCIF_PROGRESS_ENTER); | ||
46 | |||
47 | /* Initialise MMC | ||
48 | * registers: PORT84CR-PORT92CR | ||
49 | * (MMCD0_0-MMCD0_7,MMCCMD0 Control) | ||
50 | * value: 0x04 - select function 4 | ||
51 | */ | ||
52 | __raw_writeb(0x04, PORT84CR); | ||
53 | __raw_writeb(0x04, PORT85CR); | ||
54 | __raw_writeb(0x04, PORT86CR); | ||
55 | __raw_writeb(0x04, PORT87CR); | ||
56 | __raw_writeb(0x04, PORT88CR); | ||
57 | __raw_writeb(0x04, PORT89CR); | ||
58 | __raw_writeb(0x04, PORT90CR); | ||
59 | __raw_writeb(0x04, PORT91CR); | ||
60 | __raw_writeb(0x04, PORT92CR); | ||
61 | |||
62 | /* Initialise MMC | ||
63 | * registers: PORT99CR (MMCCLK0 Control) | ||
64 | * value: 0x10 | 0x04 - enable output | select function 4 | ||
65 | */ | ||
66 | __raw_writeb(0x14, PORT99CR); | ||
67 | |||
68 | /* Enable clock to MMC hardware block */ | ||
69 | __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3); | ||
70 | |||
71 | mmcif_update_progress(MMCIF_PROGRESS_INIT); | ||
72 | |||
73 | /* setup MMCIF hardware */ | ||
74 | sh_mmcif_boot_init(MMCIF_BASE); | ||
75 | |||
76 | mmcif_update_progress(MMCIF_PROGRESS_LOAD); | ||
77 | |||
78 | /* load kernel via MMCIF interface */ | ||
79 | sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */ | ||
80 | (len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf); | ||
81 | |||
82 | |||
83 | /* Disable clock to MMC hardware block */ | ||
84 | __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3); | ||
85 | |||
86 | mmcif_update_progress(MMCIF_PROGRESS_DONE); | ||
87 | } | ||
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 778655f0257a..ea5ee4d067f3 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig | |||
@@ -6,6 +6,8 @@ config ARM_VIC | |||
6 | 6 | ||
7 | config ARM_VIC_NR | 7 | config ARM_VIC_NR |
8 | int | 8 | int |
9 | default 4 if ARCH_S5PV210 | ||
10 | default 3 if ARCH_S5P6442 || ARCH_S5PC100 | ||
9 | default 2 | 11 | default 2 |
10 | depends on ARM_VIC | 12 | depends on ARM_VIC |
11 | help | 13 | help |
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 3acd8fa25e34..18a56640d97d 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
14 | 14 | ||
15 | #include <asm/glue.h> | 15 | #include <asm/glue-cache.h> |
16 | #include <asm/shmparam.h> | 16 | #include <asm/shmparam.h> |
17 | #include <asm/cachetype.h> | 17 | #include <asm/cachetype.h> |
18 | #include <asm/outercache.h> | 18 | #include <asm/outercache.h> |
@@ -20,123 +20,6 @@ | |||
20 | #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) | 20 | #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) |
21 | 21 | ||
22 | /* | 22 | /* |
23 | * Cache Model | ||
24 | * =========== | ||
25 | */ | ||
26 | #undef _CACHE | ||
27 | #undef MULTI_CACHE | ||
28 | |||
29 | #if defined(CONFIG_CPU_CACHE_V3) | ||
30 | # ifdef _CACHE | ||
31 | # define MULTI_CACHE 1 | ||
32 | # else | ||
33 | # define _CACHE v3 | ||
34 | # endif | ||
35 | #endif | ||
36 | |||
37 | #if defined(CONFIG_CPU_CACHE_V4) | ||
38 | # ifdef _CACHE | ||
39 | # define MULTI_CACHE 1 | ||
40 | # else | ||
41 | # define _CACHE v4 | ||
42 | # endif | ||
43 | #endif | ||
44 | |||
45 | #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ | ||
46 | defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ | ||
47 | defined(CONFIG_CPU_ARM1026) | ||
48 | # define MULTI_CACHE 1 | ||
49 | #endif | ||
50 | |||
51 | #if defined(CONFIG_CPU_FA526) | ||
52 | # ifdef _CACHE | ||
53 | # define MULTI_CACHE 1 | ||
54 | # else | ||
55 | # define _CACHE fa | ||
56 | # endif | ||
57 | #endif | ||
58 | |||
59 | #if defined(CONFIG_CPU_ARM926T) | ||
60 | # ifdef _CACHE | ||
61 | # define MULTI_CACHE 1 | ||
62 | # else | ||
63 | # define _CACHE arm926 | ||
64 | # endif | ||
65 | #endif | ||
66 | |||
67 | #if defined(CONFIG_CPU_ARM940T) | ||
68 | # ifdef _CACHE | ||
69 | # define MULTI_CACHE 1 | ||
70 | # else | ||
71 | # define _CACHE arm940 | ||
72 | # endif | ||
73 | #endif | ||
74 | |||
75 | #if defined(CONFIG_CPU_ARM946E) | ||
76 | # ifdef _CACHE | ||
77 | # define MULTI_CACHE 1 | ||
78 | # else | ||
79 | # define _CACHE arm946 | ||
80 | # endif | ||
81 | #endif | ||
82 | |||
83 | #if defined(CONFIG_CPU_CACHE_V4WB) | ||
84 | # ifdef _CACHE | ||
85 | # define MULTI_CACHE 1 | ||
86 | # else | ||
87 | # define _CACHE v4wb | ||
88 | # endif | ||
89 | #endif | ||
90 | |||
91 | #if defined(CONFIG_CPU_XSCALE) | ||
92 | # ifdef _CACHE | ||
93 | # define MULTI_CACHE 1 | ||
94 | # else | ||
95 | # define _CACHE xscale | ||
96 | # endif | ||
97 | #endif | ||
98 | |||
99 | #if defined(CONFIG_CPU_XSC3) | ||
100 | # ifdef _CACHE | ||
101 | # define MULTI_CACHE 1 | ||
102 | # else | ||
103 | # define _CACHE xsc3 | ||
104 | # endif | ||
105 | #endif | ||
106 | |||
107 | #if defined(CONFIG_CPU_MOHAWK) | ||
108 | # ifdef _CACHE | ||
109 | # define MULTI_CACHE 1 | ||
110 | # else | ||
111 | # define _CACHE mohawk | ||
112 | # endif | ||
113 | #endif | ||
114 | |||
115 | #if defined(CONFIG_CPU_FEROCEON) | ||
116 | # define MULTI_CACHE 1 | ||
117 | #endif | ||
118 | |||
119 | #if defined(CONFIG_CPU_V6) | ||
120 | //# ifdef _CACHE | ||
121 | # define MULTI_CACHE 1 | ||
122 | //# else | ||
123 | //# define _CACHE v6 | ||
124 | //# endif | ||
125 | #endif | ||
126 | |||
127 | #if defined(CONFIG_CPU_V7) | ||
128 | //# ifdef _CACHE | ||
129 | # define MULTI_CACHE 1 | ||
130 | //# else | ||
131 | //# define _CACHE v7 | ||
132 | //# endif | ||
133 | #endif | ||
134 | |||
135 | #if !defined(_CACHE) && !defined(MULTI_CACHE) | ||
136 | #error Unknown cache maintainence model | ||
137 | #endif | ||
138 | |||
139 | /* | ||
140 | * This flag is used to indicate that the page pointed to by a pte is clean | 23 | * This flag is used to indicate that the page pointed to by a pte is clean |
141 | * and does not require cleaning before returning it to the user. | 24 | * and does not require cleaning before returning it to the user. |
142 | */ | 25 | */ |
@@ -249,19 +132,11 @@ extern struct cpu_cache_fns cpu_cache; | |||
249 | * visible to the CPU. | 132 | * visible to the CPU. |
250 | */ | 133 | */ |
251 | #define dmac_map_area cpu_cache.dma_map_area | 134 | #define dmac_map_area cpu_cache.dma_map_area |
252 | #define dmac_unmap_area cpu_cache.dma_unmap_area | 135 | #define dmac_unmap_area cpu_cache.dma_unmap_area |
253 | #define dmac_flush_range cpu_cache.dma_flush_range | 136 | #define dmac_flush_range cpu_cache.dma_flush_range |
254 | 137 | ||
255 | #else | 138 | #else |
256 | 139 | ||
257 | #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) | ||
258 | #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) | ||
259 | #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) | ||
260 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) | ||
261 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) | ||
262 | #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) | ||
263 | #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) | ||
264 | |||
265 | extern void __cpuc_flush_icache_all(void); | 140 | extern void __cpuc_flush_icache_all(void); |
266 | extern void __cpuc_flush_kern_all(void); | 141 | extern void __cpuc_flush_kern_all(void); |
267 | extern void __cpuc_flush_user_all(void); | 142 | extern void __cpuc_flush_user_all(void); |
@@ -276,10 +151,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t); | |||
276 | * is visible to DMA, or data written by DMA to system memory is | 151 | * is visible to DMA, or data written by DMA to system memory is |
277 | * visible to the CPU. | 152 | * visible to the CPU. |
278 | */ | 153 | */ |
279 | #define dmac_map_area __glue(_CACHE,_dma_map_area) | ||
280 | #define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) | ||
281 | #define dmac_flush_range __glue(_CACHE,_dma_flush_range) | ||
282 | |||
283 | extern void dmac_map_area(const void *, size_t, int); | 154 | extern void dmac_map_area(const void *, size_t, int); |
284 | extern void dmac_unmap_area(const void *, size_t, int); | 155 | extern void dmac_unmap_area(const void *, size_t, int); |
285 | extern void dmac_flush_range(const void *, const void *); | 156 | extern void dmac_flush_range(const void *, const void *); |
diff --git a/arch/arm/include/asm/cpu-multi32.h b/arch/arm/include/asm/cpu-multi32.h deleted file mode 100644 index e2b5b0b2116a..000000000000 --- a/arch/arm/include/asm/cpu-multi32.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/cpu-multi32.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/page.h> | ||
11 | |||
12 | struct mm_struct; | ||
13 | |||
14 | /* | ||
15 | * Don't change this structure - ASM code | ||
16 | * relies on it. | ||
17 | */ | ||
18 | extern struct processor { | ||
19 | /* MISC | ||
20 | * get data abort address/flags | ||
21 | */ | ||
22 | void (*_data_abort)(unsigned long pc); | ||
23 | /* | ||
24 | * Retrieve prefetch fault address | ||
25 | */ | ||
26 | unsigned long (*_prefetch_abort)(unsigned long lr); | ||
27 | /* | ||
28 | * Set up any processor specifics | ||
29 | */ | ||
30 | void (*_proc_init)(void); | ||
31 | /* | ||
32 | * Disable any processor specifics | ||
33 | */ | ||
34 | void (*_proc_fin)(void); | ||
35 | /* | ||
36 | * Special stuff for a reset | ||
37 | */ | ||
38 | void (*reset)(unsigned long addr) __attribute__((noreturn)); | ||
39 | /* | ||
40 | * Idle the processor | ||
41 | */ | ||
42 | int (*_do_idle)(void); | ||
43 | /* | ||
44 | * Processor architecture specific | ||
45 | */ | ||
46 | /* | ||
47 | * clean a virtual address range from the | ||
48 | * D-cache without flushing the cache. | ||
49 | */ | ||
50 | void (*dcache_clean_area)(void *addr, int size); | ||
51 | |||
52 | /* | ||
53 | * Set the page table | ||
54 | */ | ||
55 | void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm); | ||
56 | /* | ||
57 | * Set a possibly extended PTE. Non-extended PTEs should | ||
58 | * ignore 'ext'. | ||
59 | */ | ||
60 | void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); | ||
61 | } processor; | ||
62 | |||
63 | #define cpu_proc_init() processor._proc_init() | ||
64 | #define cpu_proc_fin() processor._proc_fin() | ||
65 | #define cpu_reset(addr) processor.reset(addr) | ||
66 | #define cpu_do_idle() processor._do_idle() | ||
67 | #define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) | ||
68 | #define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) | ||
69 | #define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) | ||
diff --git a/arch/arm/include/asm/cpu-single.h b/arch/arm/include/asm/cpu-single.h deleted file mode 100644 index f073a6d2a406..000000000000 --- a/arch/arm/include/asm/cpu-single.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/cpu-single.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | /* | ||
11 | * Single CPU | ||
12 | */ | ||
13 | #ifdef __STDC__ | ||
14 | #define __catify_fn(name,x) name##x | ||
15 | #else | ||
16 | #define __catify_fn(name,x) name/**/x | ||
17 | #endif | ||
18 | #define __cpu_fn(name,x) __catify_fn(name,x) | ||
19 | |||
20 | /* | ||
21 | * If we are supporting multiple CPUs, then we must use a table of | ||
22 | * function pointers for this lot. Otherwise, we can optimise the | ||
23 | * table away. | ||
24 | */ | ||
25 | #define cpu_proc_init __cpu_fn(CPU_NAME,_proc_init) | ||
26 | #define cpu_proc_fin __cpu_fn(CPU_NAME,_proc_fin) | ||
27 | #define cpu_reset __cpu_fn(CPU_NAME,_reset) | ||
28 | #define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle) | ||
29 | #define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area) | ||
30 | #define cpu_do_switch_mm __cpu_fn(CPU_NAME,_switch_mm) | ||
31 | #define cpu_set_pte_ext __cpu_fn(CPU_NAME,_set_pte_ext) | ||
32 | |||
33 | #include <asm/page.h> | ||
34 | |||
35 | struct mm_struct; | ||
36 | |||
37 | /* declare all the functions as extern */ | ||
38 | extern void cpu_proc_init(void); | ||
39 | extern void cpu_proc_fin(void); | ||
40 | extern int cpu_do_idle(void); | ||
41 | extern void cpu_dcache_clean_area(void *, int); | ||
42 | extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); | ||
43 | extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); | ||
44 | extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); | ||
diff --git a/arch/arm/include/asm/fncpy.h b/arch/arm/include/asm/fncpy.h new file mode 100644 index 000000000000..de5354746924 --- /dev/null +++ b/arch/arm/include/asm/fncpy.h | |||
@@ -0,0 +1,94 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/fncpy.h - helper macros for function body copying | ||
3 | * | ||
4 | * Copyright (C) 2011 Linaro Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | /* | ||
21 | * These macros are intended for use when there is a need to copy a low-level | ||
22 | * function body into special memory. | ||
23 | * | ||
24 | * For example, when reconfiguring the SDRAM controller, the code doing the | ||
25 | * reconfiguration may need to run from SRAM. | ||
26 | * | ||
27 | * NOTE: that the copied function body must be entirely self-contained and | ||
28 | * position-independent in order for this to work properly. | ||
29 | * | ||
30 | * NOTE: in order for embedded literals and data to get referenced correctly, | ||
31 | * the alignment of functions must be preserved when copying. To ensure this, | ||
32 | * the source and destination addresses for fncpy() must be aligned to a | ||
33 | * multiple of 8 bytes: you will be get a BUG() if this condition is not met. | ||
34 | * You will typically need a ".align 3" directive in the assembler where the | ||
35 | * function to be copied is defined, and ensure that your allocator for the | ||
36 | * destination buffer returns 8-byte-aligned pointers. | ||
37 | * | ||
38 | * Typical usage example: | ||
39 | * | ||
40 | * extern int f(args); | ||
41 | * extern uint32_t size_of_f; | ||
42 | * int (*copied_f)(args); | ||
43 | * void *sram_buffer; | ||
44 | * | ||
45 | * copied_f = fncpy(sram_buffer, &f, size_of_f); | ||
46 | * | ||
47 | * ... later, call the function: ... | ||
48 | * | ||
49 | * copied_f(args); | ||
50 | * | ||
51 | * The size of the function to be copied can't be determined from C: | ||
52 | * this must be determined by other means, such as adding assmbler directives | ||
53 | * in the file where f is defined. | ||
54 | */ | ||
55 | |||
56 | #ifndef __ASM_FNCPY_H | ||
57 | #define __ASM_FNCPY_H | ||
58 | |||
59 | #include <linux/types.h> | ||
60 | #include <linux/string.h> | ||
61 | |||
62 | #include <asm/bug.h> | ||
63 | #include <asm/cacheflush.h> | ||
64 | |||
65 | /* | ||
66 | * Minimum alignment requirement for the source and destination addresses | ||
67 | * for function copying. | ||
68 | */ | ||
69 | #define FNCPY_ALIGN 8 | ||
70 | |||
71 | #define fncpy(dest_buf, funcp, size) ({ \ | ||
72 | uintptr_t __funcp_address; \ | ||
73 | typeof(funcp) __result; \ | ||
74 | \ | ||
75 | asm("" : "=r" (__funcp_address) : "0" (funcp)); \ | ||
76 | \ | ||
77 | /* \ | ||
78 | * Ensure alignment of source and destination addresses, \ | ||
79 | * disregarding the function's Thumb bit: \ | ||
80 | */ \ | ||
81 | BUG_ON((uintptr_t)(dest_buf) & (FNCPY_ALIGN - 1) || \ | ||
82 | (__funcp_address & ~(uintptr_t)1 & (FNCPY_ALIGN - 1))); \ | ||
83 | \ | ||
84 | memcpy(dest_buf, (void const *)(__funcp_address & ~1), size); \ | ||
85 | flush_icache_range((unsigned long)(dest_buf), \ | ||
86 | (unsigned long)(dest_buf) + (size)); \ | ||
87 | \ | ||
88 | asm("" : "=r" (__result) \ | ||
89 | : "0" ((uintptr_t)(dest_buf) | (__funcp_address & 1))); \ | ||
90 | \ | ||
91 | __result; \ | ||
92 | }) | ||
93 | |||
94 | #endif /* !__ASM_FNCPY_H */ | ||
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h new file mode 100644 index 000000000000..0591d35001e5 --- /dev/null +++ b/arch/arm/include/asm/glue-cache.h | |||
@@ -0,0 +1,146 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/glue-cache.h | ||
3 | * | ||
4 | * Copyright (C) 1999-2002 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef ASM_GLUE_CACHE_H | ||
11 | #define ASM_GLUE_CACHE_H | ||
12 | |||
13 | #include <asm/glue.h> | ||
14 | |||
15 | /* | ||
16 | * Cache Model | ||
17 | * =========== | ||
18 | */ | ||
19 | #undef _CACHE | ||
20 | #undef MULTI_CACHE | ||
21 | |||
22 | #if defined(CONFIG_CPU_CACHE_V3) | ||
23 | # ifdef _CACHE | ||
24 | # define MULTI_CACHE 1 | ||
25 | # else | ||
26 | # define _CACHE v3 | ||
27 | # endif | ||
28 | #endif | ||
29 | |||
30 | #if defined(CONFIG_CPU_CACHE_V4) | ||
31 | # ifdef _CACHE | ||
32 | # define MULTI_CACHE 1 | ||
33 | # else | ||
34 | # define _CACHE v4 | ||
35 | # endif | ||
36 | #endif | ||
37 | |||
38 | #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ | ||
39 | defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ | ||
40 | defined(CONFIG_CPU_ARM1026) | ||
41 | # define MULTI_CACHE 1 | ||
42 | #endif | ||
43 | |||
44 | #if defined(CONFIG_CPU_FA526) | ||
45 | # ifdef _CACHE | ||
46 | # define MULTI_CACHE 1 | ||
47 | # else | ||
48 | # define _CACHE fa | ||
49 | # endif | ||
50 | #endif | ||
51 | |||
52 | #if defined(CONFIG_CPU_ARM926T) | ||
53 | # ifdef _CACHE | ||
54 | # define MULTI_CACHE 1 | ||
55 | # else | ||
56 | # define _CACHE arm926 | ||
57 | # endif | ||
58 | #endif | ||
59 | |||
60 | #if defined(CONFIG_CPU_ARM940T) | ||
61 | # ifdef _CACHE | ||
62 | # define MULTI_CACHE 1 | ||
63 | # else | ||
64 | # define _CACHE arm940 | ||
65 | # endif | ||
66 | #endif | ||
67 | |||
68 | #if defined(CONFIG_CPU_ARM946E) | ||
69 | # ifdef _CACHE | ||
70 | # define MULTI_CACHE 1 | ||
71 | # else | ||
72 | # define _CACHE arm946 | ||
73 | # endif | ||
74 | #endif | ||
75 | |||
76 | #if defined(CONFIG_CPU_CACHE_V4WB) | ||
77 | # ifdef _CACHE | ||
78 | # define MULTI_CACHE 1 | ||
79 | # else | ||
80 | # define _CACHE v4wb | ||
81 | # endif | ||
82 | #endif | ||
83 | |||
84 | #if defined(CONFIG_CPU_XSCALE) | ||
85 | # ifdef _CACHE | ||
86 | # define MULTI_CACHE 1 | ||
87 | # else | ||
88 | # define _CACHE xscale | ||
89 | # endif | ||
90 | #endif | ||
91 | |||
92 | #if defined(CONFIG_CPU_XSC3) | ||
93 | # ifdef _CACHE | ||
94 | # define MULTI_CACHE 1 | ||
95 | # else | ||
96 | # define _CACHE xsc3 | ||
97 | # endif | ||
98 | #endif | ||
99 | |||
100 | #if defined(CONFIG_CPU_MOHAWK) | ||
101 | # ifdef _CACHE | ||
102 | # define MULTI_CACHE 1 | ||
103 | # else | ||
104 | # define _CACHE mohawk | ||
105 | # endif | ||
106 | #endif | ||
107 | |||
108 | #if defined(CONFIG_CPU_FEROCEON) | ||
109 | # define MULTI_CACHE 1 | ||
110 | #endif | ||
111 | |||
112 | #if defined(CONFIG_CPU_V6) | ||
113 | //# ifdef _CACHE | ||
114 | # define MULTI_CACHE 1 | ||
115 | //# else | ||
116 | //# define _CACHE v6 | ||
117 | //# endif | ||
118 | #endif | ||
119 | |||
120 | #if defined(CONFIG_CPU_V7) | ||
121 | //# ifdef _CACHE | ||
122 | # define MULTI_CACHE 1 | ||
123 | //# else | ||
124 | //# define _CACHE v7 | ||
125 | //# endif | ||
126 | #endif | ||
127 | |||
128 | #if !defined(_CACHE) && !defined(MULTI_CACHE) | ||
129 | #error Unknown cache maintainence model | ||
130 | #endif | ||
131 | |||
132 | #ifndef MULTI_CACHE | ||
133 | #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) | ||
134 | #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) | ||
135 | #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) | ||
136 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) | ||
137 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) | ||
138 | #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) | ||
139 | #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) | ||
140 | |||
141 | #define dmac_map_area __glue(_CACHE,_dma_map_area) | ||
142 | #define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) | ||
143 | #define dmac_flush_range __glue(_CACHE,_dma_flush_range) | ||
144 | #endif | ||
145 | |||
146 | #endif | ||
diff --git a/arch/arm/include/asm/glue-df.h b/arch/arm/include/asm/glue-df.h new file mode 100644 index 000000000000..354d571e8bcc --- /dev/null +++ b/arch/arm/include/asm/glue-df.h | |||
@@ -0,0 +1,110 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/glue-df.h | ||
3 | * | ||
4 | * Copyright (C) 1997-1999 Russell King | ||
5 | * Copyright (C) 2000-2002 Deep Blue Solutions Ltd. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef ASM_GLUE_DF_H | ||
12 | #define ASM_GLUE_DF_H | ||
13 | |||
14 | #include <asm/glue.h> | ||
15 | |||
16 | /* | ||
17 | * Data Abort Model | ||
18 | * ================ | ||
19 | * | ||
20 | * We have the following to choose from: | ||
21 | * arm6 - ARM6 style | ||
22 | * arm7 - ARM7 style | ||
23 | * v4_early - ARMv4 without Thumb early abort handler | ||
24 | * v4t_late - ARMv4 with Thumb late abort handler | ||
25 | * v4t_early - ARMv4 with Thumb early abort handler | ||
26 | * v5tej_early - ARMv5 with Thumb and Java early abort handler | ||
27 | * xscale - ARMv5 with Thumb with Xscale extensions | ||
28 | * v6_early - ARMv6 generic early abort handler | ||
29 | * v7_early - ARMv7 generic early abort handler | ||
30 | */ | ||
31 | #undef CPU_DABORT_HANDLER | ||
32 | #undef MULTI_DABORT | ||
33 | |||
34 | #if defined(CONFIG_CPU_ARM610) | ||
35 | # ifdef CPU_DABORT_HANDLER | ||
36 | # define MULTI_DABORT 1 | ||
37 | # else | ||
38 | # define CPU_DABORT_HANDLER cpu_arm6_data_abort | ||
39 | # endif | ||
40 | #endif | ||
41 | |||
42 | #if defined(CONFIG_CPU_ARM710) | ||
43 | # ifdef CPU_DABORT_HANDLER | ||
44 | # define MULTI_DABORT 1 | ||
45 | # else | ||
46 | # define CPU_DABORT_HANDLER cpu_arm7_data_abort | ||
47 | # endif | ||
48 | #endif | ||
49 | |||
50 | #ifdef CONFIG_CPU_ABRT_LV4T | ||
51 | # ifdef CPU_DABORT_HANDLER | ||
52 | # define MULTI_DABORT 1 | ||
53 | # else | ||
54 | # define CPU_DABORT_HANDLER v4t_late_abort | ||
55 | # endif | ||
56 | #endif | ||
57 | |||
58 | #ifdef CONFIG_CPU_ABRT_EV4 | ||
59 | # ifdef CPU_DABORT_HANDLER | ||
60 | # define MULTI_DABORT 1 | ||
61 | # else | ||
62 | # define CPU_DABORT_HANDLER v4_early_abort | ||
63 | # endif | ||
64 | #endif | ||
65 | |||
66 | #ifdef CONFIG_CPU_ABRT_EV4T | ||
67 | # ifdef CPU_DABORT_HANDLER | ||
68 | # define MULTI_DABORT 1 | ||
69 | # else | ||
70 | # define CPU_DABORT_HANDLER v4t_early_abort | ||
71 | # endif | ||
72 | #endif | ||
73 | |||
74 | #ifdef CONFIG_CPU_ABRT_EV5TJ | ||
75 | # ifdef CPU_DABORT_HANDLER | ||
76 | # define MULTI_DABORT 1 | ||
77 | # else | ||
78 | # define CPU_DABORT_HANDLER v5tj_early_abort | ||
79 | # endif | ||
80 | #endif | ||
81 | |||
82 | #ifdef CONFIG_CPU_ABRT_EV5T | ||
83 | # ifdef CPU_DABORT_HANDLER | ||
84 | # define MULTI_DABORT 1 | ||
85 | # else | ||
86 | # define CPU_DABORT_HANDLER v5t_early_abort | ||
87 | # endif | ||
88 | #endif | ||
89 | |||
90 | #ifdef CONFIG_CPU_ABRT_EV6 | ||
91 | # ifdef CPU_DABORT_HANDLER | ||
92 | # define MULTI_DABORT 1 | ||
93 | # else | ||
94 | # define CPU_DABORT_HANDLER v6_early_abort | ||
95 | # endif | ||
96 | #endif | ||
97 | |||
98 | #ifdef CONFIG_CPU_ABRT_EV7 | ||
99 | # ifdef CPU_DABORT_HANDLER | ||
100 | # define MULTI_DABORT 1 | ||
101 | # else | ||
102 | # define CPU_DABORT_HANDLER v7_early_abort | ||
103 | # endif | ||
104 | #endif | ||
105 | |||
106 | #ifndef CPU_DABORT_HANDLER | ||
107 | #error Unknown data abort handler type | ||
108 | #endif | ||
109 | |||
110 | #endif | ||
diff --git a/arch/arm/include/asm/glue-pf.h b/arch/arm/include/asm/glue-pf.h new file mode 100644 index 000000000000..d385f37c13f0 --- /dev/null +++ b/arch/arm/include/asm/glue-pf.h | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/glue-pf.h | ||
3 | * | ||
4 | * Copyright (C) 1997-1999 Russell King | ||
5 | * Copyright (C) 2000-2002 Deep Blue Solutions Ltd. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef ASM_GLUE_PF_H | ||
12 | #define ASM_GLUE_PF_H | ||
13 | |||
14 | #include <asm/glue.h> | ||
15 | |||
16 | /* | ||
17 | * Prefetch Abort Model | ||
18 | * ================ | ||
19 | * | ||
20 | * We have the following to choose from: | ||
21 | * legacy - no IFSR, no IFAR | ||
22 | * v6 - ARMv6: IFSR, no IFAR | ||
23 | * v7 - ARMv7: IFSR and IFAR | ||
24 | */ | ||
25 | |||
26 | #undef CPU_PABORT_HANDLER | ||
27 | #undef MULTI_PABORT | ||
28 | |||
29 | #ifdef CONFIG_CPU_PABRT_LEGACY | ||
30 | # ifdef CPU_PABORT_HANDLER | ||
31 | # define MULTI_PABORT 1 | ||
32 | # else | ||
33 | # define CPU_PABORT_HANDLER legacy_pabort | ||
34 | # endif | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_CPU_PABRT_V6 | ||
38 | # ifdef CPU_PABORT_HANDLER | ||
39 | # define MULTI_PABORT 1 | ||
40 | # else | ||
41 | # define CPU_PABORT_HANDLER v6_pabort | ||
42 | # endif | ||
43 | #endif | ||
44 | |||
45 | #ifdef CONFIG_CPU_PABRT_V7 | ||
46 | # ifdef CPU_PABORT_HANDLER | ||
47 | # define MULTI_PABORT 1 | ||
48 | # else | ||
49 | # define CPU_PABORT_HANDLER v7_pabort | ||
50 | # endif | ||
51 | #endif | ||
52 | |||
53 | #ifndef CPU_PABORT_HANDLER | ||
54 | #error Unknown prefetch abort handler type | ||
55 | #endif | ||
56 | |||
57 | #endif | ||
diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h new file mode 100644 index 000000000000..6469521d092f --- /dev/null +++ b/arch/arm/include/asm/glue-proc.h | |||
@@ -0,0 +1,264 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/glue-proc.h | ||
3 | * | ||
4 | * Copyright (C) 1997-1999 Russell King | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef ASM_GLUE_PROC_H | ||
12 | #define ASM_GLUE_PROC_H | ||
13 | |||
14 | #include <asm/glue.h> | ||
15 | |||
16 | /* | ||
17 | * Work out if we need multiple CPU support | ||
18 | */ | ||
19 | #undef MULTI_CPU | ||
20 | #undef CPU_NAME | ||
21 | |||
22 | /* | ||
23 | * CPU_NAME - the prefix for CPU related functions | ||
24 | */ | ||
25 | |||
26 | #ifdef CONFIG_CPU_ARM610 | ||
27 | # ifdef CPU_NAME | ||
28 | # undef MULTI_CPU | ||
29 | # define MULTI_CPU | ||
30 | # else | ||
31 | # define CPU_NAME cpu_arm6 | ||
32 | # endif | ||
33 | #endif | ||
34 | |||
35 | #ifdef CONFIG_CPU_ARM7TDMI | ||
36 | # ifdef CPU_NAME | ||
37 | # undef MULTI_CPU | ||
38 | # define MULTI_CPU | ||
39 | # else | ||
40 | # define CPU_NAME cpu_arm7tdmi | ||
41 | # endif | ||
42 | #endif | ||
43 | |||
44 | #ifdef CONFIG_CPU_ARM710 | ||
45 | # ifdef CPU_NAME | ||
46 | # undef MULTI_CPU | ||
47 | # define MULTI_CPU | ||
48 | # else | ||
49 | # define CPU_NAME cpu_arm7 | ||
50 | # endif | ||
51 | #endif | ||
52 | |||
53 | #ifdef CONFIG_CPU_ARM720T | ||
54 | # ifdef CPU_NAME | ||
55 | # undef MULTI_CPU | ||
56 | # define MULTI_CPU | ||
57 | # else | ||
58 | # define CPU_NAME cpu_arm720 | ||
59 | # endif | ||
60 | #endif | ||
61 | |||
62 | #ifdef CONFIG_CPU_ARM740T | ||
63 | # ifdef CPU_NAME | ||
64 | # undef MULTI_CPU | ||
65 | # define MULTI_CPU | ||
66 | # else | ||
67 | # define CPU_NAME cpu_arm740 | ||
68 | # endif | ||
69 | #endif | ||
70 | |||
71 | #ifdef CONFIG_CPU_ARM9TDMI | ||
72 | # ifdef CPU_NAME | ||
73 | # undef MULTI_CPU | ||
74 | # define MULTI_CPU | ||
75 | # else | ||
76 | # define CPU_NAME cpu_arm9tdmi | ||
77 | # endif | ||
78 | #endif | ||
79 | |||
80 | #ifdef CONFIG_CPU_ARM920T | ||
81 | # ifdef CPU_NAME | ||
82 | # undef MULTI_CPU | ||
83 | # define MULTI_CPU | ||
84 | # else | ||
85 | # define CPU_NAME cpu_arm920 | ||
86 | # endif | ||
87 | #endif | ||
88 | |||
89 | #ifdef CONFIG_CPU_ARM922T | ||
90 | # ifdef CPU_NAME | ||
91 | # undef MULTI_CPU | ||
92 | # define MULTI_CPU | ||
93 | # else | ||
94 | # define CPU_NAME cpu_arm922 | ||
95 | # endif | ||
96 | #endif | ||
97 | |||
98 | #ifdef CONFIG_CPU_FA526 | ||
99 | # ifdef CPU_NAME | ||
100 | # undef MULTI_CPU | ||
101 | # define MULTI_CPU | ||
102 | # else | ||
103 | # define CPU_NAME cpu_fa526 | ||
104 | # endif | ||
105 | #endif | ||
106 | |||
107 | #ifdef CONFIG_CPU_ARM925T | ||
108 | # ifdef CPU_NAME | ||
109 | # undef MULTI_CPU | ||
110 | # define MULTI_CPU | ||
111 | # else | ||
112 | # define CPU_NAME cpu_arm925 | ||
113 | # endif | ||
114 | #endif | ||
115 | |||
116 | #ifdef CONFIG_CPU_ARM926T | ||
117 | # ifdef CPU_NAME | ||
118 | # undef MULTI_CPU | ||
119 | # define MULTI_CPU | ||
120 | # else | ||
121 | # define CPU_NAME cpu_arm926 | ||
122 | # endif | ||
123 | #endif | ||
124 | |||
125 | #ifdef CONFIG_CPU_ARM940T | ||
126 | # ifdef CPU_NAME | ||
127 | # undef MULTI_CPU | ||
128 | # define MULTI_CPU | ||
129 | # else | ||
130 | # define CPU_NAME cpu_arm940 | ||
131 | # endif | ||
132 | #endif | ||
133 | |||
134 | #ifdef CONFIG_CPU_ARM946E | ||
135 | # ifdef CPU_NAME | ||
136 | # undef MULTI_CPU | ||
137 | # define MULTI_CPU | ||
138 | # else | ||
139 | # define CPU_NAME cpu_arm946 | ||
140 | # endif | ||
141 | #endif | ||
142 | |||
143 | #ifdef CONFIG_CPU_SA110 | ||
144 | # ifdef CPU_NAME | ||
145 | # undef MULTI_CPU | ||
146 | # define MULTI_CPU | ||
147 | # else | ||
148 | # define CPU_NAME cpu_sa110 | ||
149 | # endif | ||
150 | #endif | ||
151 | |||
152 | #ifdef CONFIG_CPU_SA1100 | ||
153 | # ifdef CPU_NAME | ||
154 | # undef MULTI_CPU | ||
155 | # define MULTI_CPU | ||
156 | # else | ||
157 | # define CPU_NAME cpu_sa1100 | ||
158 | # endif | ||
159 | #endif | ||
160 | |||
161 | #ifdef CONFIG_CPU_ARM1020 | ||
162 | # ifdef CPU_NAME | ||
163 | # undef MULTI_CPU | ||
164 | # define MULTI_CPU | ||
165 | # else | ||
166 | # define CPU_NAME cpu_arm1020 | ||
167 | # endif | ||
168 | #endif | ||
169 | |||
170 | #ifdef CONFIG_CPU_ARM1020E | ||
171 | # ifdef CPU_NAME | ||
172 | # undef MULTI_CPU | ||
173 | # define MULTI_CPU | ||
174 | # else | ||
175 | # define CPU_NAME cpu_arm1020e | ||
176 | # endif | ||
177 | #endif | ||
178 | |||
179 | #ifdef CONFIG_CPU_ARM1022 | ||
180 | # ifdef CPU_NAME | ||
181 | # undef MULTI_CPU | ||
182 | # define MULTI_CPU | ||
183 | # else | ||
184 | # define CPU_NAME cpu_arm1022 | ||
185 | # endif | ||
186 | #endif | ||
187 | |||
188 | #ifdef CONFIG_CPU_ARM1026 | ||
189 | # ifdef CPU_NAME | ||
190 | # undef MULTI_CPU | ||
191 | # define MULTI_CPU | ||
192 | # else | ||
193 | # define CPU_NAME cpu_arm1026 | ||
194 | # endif | ||
195 | #endif | ||
196 | |||
197 | #ifdef CONFIG_CPU_XSCALE | ||
198 | # ifdef CPU_NAME | ||
199 | # undef MULTI_CPU | ||
200 | # define MULTI_CPU | ||
201 | # else | ||
202 | # define CPU_NAME cpu_xscale | ||
203 | # endif | ||
204 | #endif | ||
205 | |||
206 | #ifdef CONFIG_CPU_XSC3 | ||
207 | # ifdef CPU_NAME | ||
208 | # undef MULTI_CPU | ||
209 | # define MULTI_CPU | ||
210 | # else | ||
211 | # define CPU_NAME cpu_xsc3 | ||
212 | # endif | ||
213 | #endif | ||
214 | |||
215 | #ifdef CONFIG_CPU_MOHAWK | ||
216 | # ifdef CPU_NAME | ||
217 | # undef MULTI_CPU | ||
218 | # define MULTI_CPU | ||
219 | # else | ||
220 | # define CPU_NAME cpu_mohawk | ||
221 | # endif | ||
222 | #endif | ||
223 | |||
224 | #ifdef CONFIG_CPU_FEROCEON | ||
225 | # ifdef CPU_NAME | ||
226 | # undef MULTI_CPU | ||
227 | # define MULTI_CPU | ||
228 | # else | ||
229 | # define CPU_NAME cpu_feroceon | ||
230 | # endif | ||
231 | #endif | ||
232 | |||
233 | #ifdef CONFIG_CPU_V6 | ||
234 | # ifdef CPU_NAME | ||
235 | # undef MULTI_CPU | ||
236 | # define MULTI_CPU | ||
237 | # else | ||
238 | # define CPU_NAME cpu_v6 | ||
239 | # endif | ||
240 | #endif | ||
241 | |||
242 | #ifdef CONFIG_CPU_V7 | ||
243 | # ifdef CPU_NAME | ||
244 | # undef MULTI_CPU | ||
245 | # define MULTI_CPU | ||
246 | # else | ||
247 | # define CPU_NAME cpu_v7 | ||
248 | # endif | ||
249 | #endif | ||
250 | |||
251 | #ifndef MULTI_CPU | ||
252 | #define cpu_proc_init __glue(CPU_NAME,_proc_init) | ||
253 | #define cpu_proc_fin __glue(CPU_NAME,_proc_fin) | ||
254 | #define cpu_reset __glue(CPU_NAME,_reset) | ||
255 | #define cpu_do_idle __glue(CPU_NAME,_do_idle) | ||
256 | #define cpu_dcache_clean_area __glue(CPU_NAME,_dcache_clean_area) | ||
257 | #define cpu_do_switch_mm __glue(CPU_NAME,_switch_mm) | ||
258 | #define cpu_set_pte_ext __glue(CPU_NAME,_set_pte_ext) | ||
259 | #define cpu_suspend_size __glue(CPU_NAME,_suspend_size) | ||
260 | #define cpu_do_suspend __glue(CPU_NAME,_do_suspend) | ||
261 | #define cpu_do_resume __glue(CPU_NAME,_do_resume) | ||
262 | #endif | ||
263 | |||
264 | #endif | ||
diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h index 234a3fc1c78e..0ec35d1698aa 100644 --- a/arch/arm/include/asm/glue.h +++ b/arch/arm/include/asm/glue.h | |||
@@ -15,7 +15,6 @@ | |||
15 | */ | 15 | */ |
16 | #ifdef __KERNEL__ | 16 | #ifdef __KERNEL__ |
17 | 17 | ||
18 | |||
19 | #ifdef __STDC__ | 18 | #ifdef __STDC__ |
20 | #define ____glue(name,fn) name##fn | 19 | #define ____glue(name,fn) name##fn |
21 | #else | 20 | #else |
@@ -23,141 +22,4 @@ | |||
23 | #endif | 22 | #endif |
24 | #define __glue(name,fn) ____glue(name,fn) | 23 | #define __glue(name,fn) ____glue(name,fn) |
25 | 24 | ||
26 | |||
27 | |||
28 | /* | ||
29 | * Data Abort Model | ||
30 | * ================ | ||
31 | * | ||
32 | * We have the following to choose from: | ||
33 | * arm6 - ARM6 style | ||
34 | * arm7 - ARM7 style | ||
35 | * v4_early - ARMv4 without Thumb early abort handler | ||
36 | * v4t_late - ARMv4 with Thumb late abort handler | ||
37 | * v4t_early - ARMv4 with Thumb early abort handler | ||
38 | * v5tej_early - ARMv5 with Thumb and Java early abort handler | ||
39 | * xscale - ARMv5 with Thumb with Xscale extensions | ||
40 | * v6_early - ARMv6 generic early abort handler | ||
41 | * v7_early - ARMv7 generic early abort handler | ||
42 | */ | ||
43 | #undef CPU_DABORT_HANDLER | ||
44 | #undef MULTI_DABORT | ||
45 | |||
46 | #if defined(CONFIG_CPU_ARM610) | ||
47 | # ifdef CPU_DABORT_HANDLER | ||
48 | # define MULTI_DABORT 1 | ||
49 | # else | ||
50 | # define CPU_DABORT_HANDLER cpu_arm6_data_abort | ||
51 | # endif | ||
52 | #endif | ||
53 | |||
54 | #if defined(CONFIG_CPU_ARM710) | ||
55 | # ifdef CPU_DABORT_HANDLER | ||
56 | # define MULTI_DABORT 1 | ||
57 | # else | ||
58 | # define CPU_DABORT_HANDLER cpu_arm7_data_abort | ||
59 | # endif | ||
60 | #endif | ||
61 | |||
62 | #ifdef CONFIG_CPU_ABRT_LV4T | ||
63 | # ifdef CPU_DABORT_HANDLER | ||
64 | # define MULTI_DABORT 1 | ||
65 | # else | ||
66 | # define CPU_DABORT_HANDLER v4t_late_abort | ||
67 | # endif | ||
68 | #endif | ||
69 | |||
70 | #ifdef CONFIG_CPU_ABRT_EV4 | ||
71 | # ifdef CPU_DABORT_HANDLER | ||
72 | # define MULTI_DABORT 1 | ||
73 | # else | ||
74 | # define CPU_DABORT_HANDLER v4_early_abort | ||
75 | # endif | ||
76 | #endif | ||
77 | |||
78 | #ifdef CONFIG_CPU_ABRT_EV4T | ||
79 | # ifdef CPU_DABORT_HANDLER | ||
80 | # define MULTI_DABORT 1 | ||
81 | # else | ||
82 | # define CPU_DABORT_HANDLER v4t_early_abort | ||
83 | # endif | ||
84 | #endif | ||
85 | |||
86 | #ifdef CONFIG_CPU_ABRT_EV5TJ | ||
87 | # ifdef CPU_DABORT_HANDLER | ||
88 | # define MULTI_DABORT 1 | ||
89 | # else | ||
90 | # define CPU_DABORT_HANDLER v5tj_early_abort | ||
91 | # endif | ||
92 | #endif | ||
93 | |||
94 | #ifdef CONFIG_CPU_ABRT_EV5T | ||
95 | # ifdef CPU_DABORT_HANDLER | ||
96 | # define MULTI_DABORT 1 | ||
97 | # else | ||
98 | # define CPU_DABORT_HANDLER v5t_early_abort | ||
99 | # endif | ||
100 | #endif | ||
101 | |||
102 | #ifdef CONFIG_CPU_ABRT_EV6 | ||
103 | # ifdef CPU_DABORT_HANDLER | ||
104 | # define MULTI_DABORT 1 | ||
105 | # else | ||
106 | # define CPU_DABORT_HANDLER v6_early_abort | ||
107 | # endif | ||
108 | #endif | ||
109 | |||
110 | #ifdef CONFIG_CPU_ABRT_EV7 | ||
111 | # ifdef CPU_DABORT_HANDLER | ||
112 | # define MULTI_DABORT 1 | ||
113 | # else | ||
114 | # define CPU_DABORT_HANDLER v7_early_abort | ||
115 | # endif | ||
116 | #endif | ||
117 | |||
118 | #ifndef CPU_DABORT_HANDLER | ||
119 | #error Unknown data abort handler type | ||
120 | #endif | ||
121 | |||
122 | /* | ||
123 | * Prefetch Abort Model | ||
124 | * ================ | ||
125 | * | ||
126 | * We have the following to choose from: | ||
127 | * legacy - no IFSR, no IFAR | ||
128 | * v6 - ARMv6: IFSR, no IFAR | ||
129 | * v7 - ARMv7: IFSR and IFAR | ||
130 | */ | ||
131 | |||
132 | #undef CPU_PABORT_HANDLER | ||
133 | #undef MULTI_PABORT | ||
134 | |||
135 | #ifdef CONFIG_CPU_PABRT_LEGACY | ||
136 | # ifdef CPU_PABORT_HANDLER | ||
137 | # define MULTI_PABORT 1 | ||
138 | # else | ||
139 | # define CPU_PABORT_HANDLER legacy_pabort | ||
140 | # endif | ||
141 | #endif | ||
142 | |||
143 | #ifdef CONFIG_CPU_PABRT_V6 | ||
144 | # ifdef CPU_PABORT_HANDLER | ||
145 | # define MULTI_PABORT 1 | ||
146 | # else | ||
147 | # define CPU_PABORT_HANDLER v6_pabort | ||
148 | # endif | ||
149 | #endif | ||
150 | |||
151 | #ifdef CONFIG_CPU_PABRT_V7 | ||
152 | # ifdef CPU_PABORT_HANDLER | ||
153 | # define MULTI_PABORT 1 | ||
154 | # else | ||
155 | # define CPU_PABORT_HANDLER v7_pabort | ||
156 | # endif | ||
157 | #endif | ||
158 | |||
159 | #ifndef CPU_PABORT_HANDLER | ||
160 | #error Unknown prefetch abort handler type | ||
161 | #endif | ||
162 | |||
163 | #endif | 25 | #endif |
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 5aeec1e1735c..16bd48031583 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h | |||
@@ -36,6 +36,7 @@ | |||
36 | #define L2X0_RAW_INTR_STAT 0x21C | 36 | #define L2X0_RAW_INTR_STAT 0x21C |
37 | #define L2X0_INTR_CLEAR 0x220 | 37 | #define L2X0_INTR_CLEAR 0x220 |
38 | #define L2X0_CACHE_SYNC 0x730 | 38 | #define L2X0_CACHE_SYNC 0x730 |
39 | #define L2X0_DUMMY_REG 0x740 | ||
39 | #define L2X0_INV_LINE_PA 0x770 | 40 | #define L2X0_INV_LINE_PA 0x770 |
40 | #define L2X0_INV_WAY 0x77C | 41 | #define L2X0_INV_WAY 0x77C |
41 | #define L2X0_CLEAN_LINE_PA 0x7B0 | 42 | #define L2X0_CLEAN_LINE_PA 0x7B0 |
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h index 721847dc68ab..e0d1c0cfa548 100644 --- a/arch/arm/include/asm/hardware/sp810.h +++ b/arch/arm/include/asm/hardware/sp810.h | |||
@@ -58,6 +58,9 @@ | |||
58 | 58 | ||
59 | static inline void sysctl_soft_reset(void __iomem *base) | 59 | static inline void sysctl_soft_reset(void __iomem *base) |
60 | { | 60 | { |
61 | /* switch to slow mode */ | ||
62 | writel(0x2, base + SCCTRL); | ||
63 | |||
61 | /* writing any value to SCSYSSTAT reg will reset system */ | 64 | /* writing any value to SCSYSSTAT reg will reset system */ |
62 | writel(0, base + SCSYSSTAT); | 65 | writel(0, base + SCSYSSTAT); |
63 | } | 66 | } |
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 3a0893a76a3b..bf13b814c1b8 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h | |||
@@ -15,10 +15,6 @@ struct meminfo; | |||
15 | struct sys_timer; | 15 | struct sys_timer; |
16 | 16 | ||
17 | struct machine_desc { | 17 | struct machine_desc { |
18 | /* | ||
19 | * Note! The first two elements are used | ||
20 | * by assembler code in head.S, head-common.S | ||
21 | */ | ||
22 | unsigned int nr; /* architecture number */ | 18 | unsigned int nr; /* architecture number */ |
23 | const char *name; /* architecture name */ | 19 | const char *name; /* architecture name */ |
24 | unsigned long boot_params; /* tagged list */ | 20 | unsigned long boot_params; /* tagged list */ |
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 9763be04f77e..22de005f159c 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h | |||
@@ -10,6 +10,8 @@ | |||
10 | #ifndef _ASMARM_PGALLOC_H | 10 | #ifndef _ASMARM_PGALLOC_H |
11 | #define _ASMARM_PGALLOC_H | 11 | #define _ASMARM_PGALLOC_H |
12 | 12 | ||
13 | #include <linux/pagemap.h> | ||
14 | |||
13 | #include <asm/domain.h> | 15 | #include <asm/domain.h> |
14 | #include <asm/pgtable-hwdef.h> | 16 | #include <asm/pgtable-hwdef.h> |
15 | #include <asm/processor.h> | 17 | #include <asm/processor.h> |
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h index 8fdae9bc9abb..8ec535e11fd7 100644 --- a/arch/arm/include/asm/proc-fns.h +++ b/arch/arm/include/asm/proc-fns.h | |||
@@ -13,250 +13,86 @@ | |||
13 | 13 | ||
14 | #ifdef __KERNEL__ | 14 | #ifdef __KERNEL__ |
15 | 15 | ||
16 | #include <asm/glue-proc.h> | ||
17 | #include <asm/page.h> | ||
16 | 18 | ||
17 | /* | 19 | #ifndef __ASSEMBLY__ |
18 | * Work out if we need multiple CPU support | 20 | |
19 | */ | 21 | struct mm_struct; |
20 | #undef MULTI_CPU | ||
21 | #undef CPU_NAME | ||
22 | 22 | ||
23 | /* | 23 | /* |
24 | * CPU_NAME - the prefix for CPU related functions | 24 | * Don't change this structure - ASM code relies on it. |
25 | */ | 25 | */ |
26 | 26 | extern struct processor { | |
27 | #ifdef CONFIG_CPU_ARM610 | 27 | /* MISC |
28 | # ifdef CPU_NAME | 28 | * get data abort address/flags |
29 | # undef MULTI_CPU | 29 | */ |
30 | # define MULTI_CPU | 30 | void (*_data_abort)(unsigned long pc); |
31 | # else | 31 | /* |
32 | # define CPU_NAME cpu_arm6 | 32 | * Retrieve prefetch fault address |
33 | # endif | 33 | */ |
34 | #endif | 34 | unsigned long (*_prefetch_abort)(unsigned long lr); |
35 | 35 | /* | |
36 | #ifdef CONFIG_CPU_ARM7TDMI | 36 | * Set up any processor specifics |
37 | # ifdef CPU_NAME | 37 | */ |
38 | # undef MULTI_CPU | 38 | void (*_proc_init)(void); |
39 | # define MULTI_CPU | 39 | /* |
40 | # else | 40 | * Disable any processor specifics |
41 | # define CPU_NAME cpu_arm7tdmi | 41 | */ |
42 | # endif | 42 | void (*_proc_fin)(void); |
43 | #endif | 43 | /* |
44 | 44 | * Special stuff for a reset | |
45 | #ifdef CONFIG_CPU_ARM710 | 45 | */ |
46 | # ifdef CPU_NAME | 46 | void (*reset)(unsigned long addr) __attribute__((noreturn)); |
47 | # undef MULTI_CPU | 47 | /* |
48 | # define MULTI_CPU | 48 | * Idle the processor |
49 | # else | 49 | */ |
50 | # define CPU_NAME cpu_arm7 | 50 | int (*_do_idle)(void); |
51 | # endif | 51 | /* |
52 | #endif | 52 | * Processor architecture specific |
53 | 53 | */ | |
54 | #ifdef CONFIG_CPU_ARM720T | 54 | /* |
55 | # ifdef CPU_NAME | 55 | * clean a virtual address range from the |
56 | # undef MULTI_CPU | 56 | * D-cache without flushing the cache. |
57 | # define MULTI_CPU | 57 | */ |
58 | # else | 58 | void (*dcache_clean_area)(void *addr, int size); |
59 | # define CPU_NAME cpu_arm720 | 59 | |
60 | # endif | 60 | /* |
61 | #endif | 61 | * Set the page table |
62 | 62 | */ | |
63 | #ifdef CONFIG_CPU_ARM740T | 63 | void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm); |
64 | # ifdef CPU_NAME | 64 | /* |
65 | # undef MULTI_CPU | 65 | * Set a possibly extended PTE. Non-extended PTEs should |
66 | # define MULTI_CPU | 66 | * ignore 'ext'. |
67 | # else | 67 | */ |
68 | # define CPU_NAME cpu_arm740 | 68 | void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); |
69 | # endif | 69 | |
70 | #endif | 70 | /* Suspend/resume */ |
71 | 71 | unsigned int suspend_size; | |
72 | #ifdef CONFIG_CPU_ARM9TDMI | 72 | void (*do_suspend)(void *); |
73 | # ifdef CPU_NAME | 73 | void (*do_resume)(void *); |
74 | # undef MULTI_CPU | 74 | } processor; |
75 | # define MULTI_CPU | ||
76 | # else | ||
77 | # define CPU_NAME cpu_arm9tdmi | ||
78 | # endif | ||
79 | #endif | ||
80 | |||
81 | #ifdef CONFIG_CPU_ARM920T | ||
82 | # ifdef CPU_NAME | ||
83 | # undef MULTI_CPU | ||
84 | # define MULTI_CPU | ||
85 | # else | ||
86 | # define CPU_NAME cpu_arm920 | ||
87 | # endif | ||
88 | #endif | ||
89 | |||
90 | #ifdef CONFIG_CPU_ARM922T | ||
91 | # ifdef CPU_NAME | ||
92 | # undef MULTI_CPU | ||
93 | # define MULTI_CPU | ||
94 | # else | ||
95 | # define CPU_NAME cpu_arm922 | ||
96 | # endif | ||
97 | #endif | ||
98 | |||
99 | #ifdef CONFIG_CPU_FA526 | ||
100 | # ifdef CPU_NAME | ||
101 | # undef MULTI_CPU | ||
102 | # define MULTI_CPU | ||
103 | # else | ||
104 | # define CPU_NAME cpu_fa526 | ||
105 | # endif | ||
106 | #endif | ||
107 | |||
108 | #ifdef CONFIG_CPU_ARM925T | ||
109 | # ifdef CPU_NAME | ||
110 | # undef MULTI_CPU | ||
111 | # define MULTI_CPU | ||
112 | # else | ||
113 | # define CPU_NAME cpu_arm925 | ||
114 | # endif | ||
115 | #endif | ||
116 | |||
117 | #ifdef CONFIG_CPU_ARM926T | ||
118 | # ifdef CPU_NAME | ||
119 | # undef MULTI_CPU | ||
120 | # define MULTI_CPU | ||
121 | # else | ||
122 | # define CPU_NAME cpu_arm926 | ||
123 | # endif | ||
124 | #endif | ||
125 | |||
126 | #ifdef CONFIG_CPU_ARM940T | ||
127 | # ifdef CPU_NAME | ||
128 | # undef MULTI_CPU | ||
129 | # define MULTI_CPU | ||
130 | # else | ||
131 | # define CPU_NAME cpu_arm940 | ||
132 | # endif | ||
133 | #endif | ||
134 | |||
135 | #ifdef CONFIG_CPU_ARM946E | ||
136 | # ifdef CPU_NAME | ||
137 | # undef MULTI_CPU | ||
138 | # define MULTI_CPU | ||
139 | # else | ||
140 | # define CPU_NAME cpu_arm946 | ||
141 | # endif | ||
142 | #endif | ||
143 | |||
144 | #ifdef CONFIG_CPU_SA110 | ||
145 | # ifdef CPU_NAME | ||
146 | # undef MULTI_CPU | ||
147 | # define MULTI_CPU | ||
148 | # else | ||
149 | # define CPU_NAME cpu_sa110 | ||
150 | # endif | ||
151 | #endif | ||
152 | |||
153 | #ifdef CONFIG_CPU_SA1100 | ||
154 | # ifdef CPU_NAME | ||
155 | # undef MULTI_CPU | ||
156 | # define MULTI_CPU | ||
157 | # else | ||
158 | # define CPU_NAME cpu_sa1100 | ||
159 | # endif | ||
160 | #endif | ||
161 | |||
162 | #ifdef CONFIG_CPU_ARM1020 | ||
163 | # ifdef CPU_NAME | ||
164 | # undef MULTI_CPU | ||
165 | # define MULTI_CPU | ||
166 | # else | ||
167 | # define CPU_NAME cpu_arm1020 | ||
168 | # endif | ||
169 | #endif | ||
170 | |||
171 | #ifdef CONFIG_CPU_ARM1020E | ||
172 | # ifdef CPU_NAME | ||
173 | # undef MULTI_CPU | ||
174 | # define MULTI_CPU | ||
175 | # else | ||
176 | # define CPU_NAME cpu_arm1020e | ||
177 | # endif | ||
178 | #endif | ||
179 | |||
180 | #ifdef CONFIG_CPU_ARM1022 | ||
181 | # ifdef CPU_NAME | ||
182 | # undef MULTI_CPU | ||
183 | # define MULTI_CPU | ||
184 | # else | ||
185 | # define CPU_NAME cpu_arm1022 | ||
186 | # endif | ||
187 | #endif | ||
188 | |||
189 | #ifdef CONFIG_CPU_ARM1026 | ||
190 | # ifdef CPU_NAME | ||
191 | # undef MULTI_CPU | ||
192 | # define MULTI_CPU | ||
193 | # else | ||
194 | # define CPU_NAME cpu_arm1026 | ||
195 | # endif | ||
196 | #endif | ||
197 | |||
198 | #ifdef CONFIG_CPU_XSCALE | ||
199 | # ifdef CPU_NAME | ||
200 | # undef MULTI_CPU | ||
201 | # define MULTI_CPU | ||
202 | # else | ||
203 | # define CPU_NAME cpu_xscale | ||
204 | # endif | ||
205 | #endif | ||
206 | |||
207 | #ifdef CONFIG_CPU_XSC3 | ||
208 | # ifdef CPU_NAME | ||
209 | # undef MULTI_CPU | ||
210 | # define MULTI_CPU | ||
211 | # else | ||
212 | # define CPU_NAME cpu_xsc3 | ||
213 | # endif | ||
214 | #endif | ||
215 | |||
216 | #ifdef CONFIG_CPU_MOHAWK | ||
217 | # ifdef CPU_NAME | ||
218 | # undef MULTI_CPU | ||
219 | # define MULTI_CPU | ||
220 | # else | ||
221 | # define CPU_NAME cpu_mohawk | ||
222 | # endif | ||
223 | #endif | ||
224 | |||
225 | #ifdef CONFIG_CPU_FEROCEON | ||
226 | # ifdef CPU_NAME | ||
227 | # undef MULTI_CPU | ||
228 | # define MULTI_CPU | ||
229 | # else | ||
230 | # define CPU_NAME cpu_feroceon | ||
231 | # endif | ||
232 | #endif | ||
233 | |||
234 | #ifdef CONFIG_CPU_V6 | ||
235 | # ifdef CPU_NAME | ||
236 | # undef MULTI_CPU | ||
237 | # define MULTI_CPU | ||
238 | # else | ||
239 | # define CPU_NAME cpu_v6 | ||
240 | # endif | ||
241 | #endif | ||
242 | |||
243 | #ifdef CONFIG_CPU_V7 | ||
244 | # ifdef CPU_NAME | ||
245 | # undef MULTI_CPU | ||
246 | # define MULTI_CPU | ||
247 | # else | ||
248 | # define CPU_NAME cpu_v7 | ||
249 | # endif | ||
250 | #endif | ||
251 | |||
252 | #ifndef __ASSEMBLY__ | ||
253 | 75 | ||
254 | #ifndef MULTI_CPU | 76 | #ifndef MULTI_CPU |
255 | #include <asm/cpu-single.h> | 77 | extern void cpu_proc_init(void); |
78 | extern void cpu_proc_fin(void); | ||
79 | extern int cpu_do_idle(void); | ||
80 | extern void cpu_dcache_clean_area(void *, int); | ||
81 | extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); | ||
82 | extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); | ||
83 | extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); | ||
256 | #else | 84 | #else |
257 | #include <asm/cpu-multi32.h> | 85 | #define cpu_proc_init() processor._proc_init() |
86 | #define cpu_proc_fin() processor._proc_fin() | ||
87 | #define cpu_reset(addr) processor.reset(addr) | ||
88 | #define cpu_do_idle() processor._do_idle() | ||
89 | #define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) | ||
90 | #define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) | ||
91 | #define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) | ||
258 | #endif | 92 | #endif |
259 | 93 | ||
94 | extern void cpu_resume(void); | ||
95 | |||
260 | #include <asm/memory.h> | 96 | #include <asm/memory.h> |
261 | 97 | ||
262 | #ifdef CONFIG_MMU | 98 | #ifdef CONFIG_MMU |
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index 67357baaeeeb..7a1f03c10f1b 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h | |||
@@ -95,7 +95,7 @@ extern void release_thread(struct task_struct *); | |||
95 | 95 | ||
96 | unsigned long get_wchan(struct task_struct *p); | 96 | unsigned long get_wchan(struct task_struct *p); |
97 | 97 | ||
98 | #if __LINUX_ARM_ARCH__ == 6 | 98 | #if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327) |
99 | #define cpu_relax() smp_mb() | 99 | #define cpu_relax() smp_mb() |
100 | #else | 100 | #else |
101 | #define cpu_relax() barrier() | 101 | #define cpu_relax() barrier() |
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h index 2376835015d6..4eb6d005ffaa 100644 --- a/arch/arm/include/asm/smp_scu.h +++ b/arch/arm/include/asm/smp_scu.h | |||
@@ -1,7 +1,14 @@ | |||
1 | #ifndef __ASMARM_ARCH_SCU_H | 1 | #ifndef __ASMARM_ARCH_SCU_H |
2 | #define __ASMARM_ARCH_SCU_H | 2 | #define __ASMARM_ARCH_SCU_H |
3 | 3 | ||
4 | #define SCU_PM_NORMAL 0 | ||
5 | #define SCU_PM_DORMANT 2 | ||
6 | #define SCU_PM_POWEROFF 3 | ||
7 | |||
8 | #ifndef __ASSEMBLER__ | ||
4 | unsigned int scu_get_core_count(void __iomem *); | 9 | unsigned int scu_get_core_count(void __iomem *); |
5 | void scu_enable(void __iomem *); | 10 | void scu_enable(void __iomem *); |
11 | int scu_power_mode(void __iomem *, unsigned int); | ||
12 | #endif | ||
6 | 13 | ||
7 | #endif | 14 | #endif |
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index f41a6f57cd12..82dfe5d0c41e 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h | |||
@@ -18,16 +18,34 @@ | |||
18 | #define __ASMARM_TLB_H | 18 | #define __ASMARM_TLB_H |
19 | 19 | ||
20 | #include <asm/cacheflush.h> | 20 | #include <asm/cacheflush.h> |
21 | #include <asm/tlbflush.h> | ||
22 | 21 | ||
23 | #ifndef CONFIG_MMU | 22 | #ifndef CONFIG_MMU |
24 | 23 | ||
25 | #include <linux/pagemap.h> | 24 | #include <linux/pagemap.h> |
25 | |||
26 | #define tlb_flush(tlb) ((void) tlb) | ||
27 | |||
26 | #include <asm-generic/tlb.h> | 28 | #include <asm-generic/tlb.h> |
27 | 29 | ||
28 | #else /* !CONFIG_MMU */ | 30 | #else /* !CONFIG_MMU */ |
29 | 31 | ||
32 | #include <linux/swap.h> | ||
30 | #include <asm/pgalloc.h> | 33 | #include <asm/pgalloc.h> |
34 | #include <asm/tlbflush.h> | ||
35 | |||
36 | /* | ||
37 | * We need to delay page freeing for SMP as other CPUs can access pages | ||
38 | * which have been removed but not yet had their TLB entries invalidated. | ||
39 | * Also, as ARMv7 speculative prefetch can drag new entries into the TLB, | ||
40 | * we need to apply this same delaying tactic to ensure correct operation. | ||
41 | */ | ||
42 | #if defined(CONFIG_SMP) || defined(CONFIG_CPU_32v7) | ||
43 | #define tlb_fast_mode(tlb) 0 | ||
44 | #define FREE_PTE_NR 500 | ||
45 | #else | ||
46 | #define tlb_fast_mode(tlb) 1 | ||
47 | #define FREE_PTE_NR 0 | ||
48 | #endif | ||
31 | 49 | ||
32 | /* | 50 | /* |
33 | * TLB handling. This allows us to remove pages from the page | 51 | * TLB handling. This allows us to remove pages from the page |
@@ -36,12 +54,58 @@ | |||
36 | struct mmu_gather { | 54 | struct mmu_gather { |
37 | struct mm_struct *mm; | 55 | struct mm_struct *mm; |
38 | unsigned int fullmm; | 56 | unsigned int fullmm; |
57 | struct vm_area_struct *vma; | ||
39 | unsigned long range_start; | 58 | unsigned long range_start; |
40 | unsigned long range_end; | 59 | unsigned long range_end; |
60 | unsigned int nr; | ||
61 | struct page *pages[FREE_PTE_NR]; | ||
41 | }; | 62 | }; |
42 | 63 | ||
43 | DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); | 64 | DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); |
44 | 65 | ||
66 | /* | ||
67 | * This is unnecessarily complex. There's three ways the TLB shootdown | ||
68 | * code is used: | ||
69 | * 1. Unmapping a range of vmas. See zap_page_range(), unmap_region(). | ||
70 | * tlb->fullmm = 0, and tlb_start_vma/tlb_end_vma will be called. | ||
71 | * tlb->vma will be non-NULL. | ||
72 | * 2. Unmapping all vmas. See exit_mmap(). | ||
73 | * tlb->fullmm = 1, and tlb_start_vma/tlb_end_vma will be called. | ||
74 | * tlb->vma will be non-NULL. Additionally, page tables will be freed. | ||
75 | * 3. Unmapping argument pages. See shift_arg_pages(). | ||
76 | * tlb->fullmm = 0, but tlb_start_vma/tlb_end_vma will not be called. | ||
77 | * tlb->vma will be NULL. | ||
78 | */ | ||
79 | static inline void tlb_flush(struct mmu_gather *tlb) | ||
80 | { | ||
81 | if (tlb->fullmm || !tlb->vma) | ||
82 | flush_tlb_mm(tlb->mm); | ||
83 | else if (tlb->range_end > 0) { | ||
84 | flush_tlb_range(tlb->vma, tlb->range_start, tlb->range_end); | ||
85 | tlb->range_start = TASK_SIZE; | ||
86 | tlb->range_end = 0; | ||
87 | } | ||
88 | } | ||
89 | |||
90 | static inline void tlb_add_flush(struct mmu_gather *tlb, unsigned long addr) | ||
91 | { | ||
92 | if (!tlb->fullmm) { | ||
93 | if (addr < tlb->range_start) | ||
94 | tlb->range_start = addr; | ||
95 | if (addr + PAGE_SIZE > tlb->range_end) | ||
96 | tlb->range_end = addr + PAGE_SIZE; | ||
97 | } | ||
98 | } | ||
99 | |||
100 | static inline void tlb_flush_mmu(struct mmu_gather *tlb) | ||
101 | { | ||
102 | tlb_flush(tlb); | ||
103 | if (!tlb_fast_mode(tlb)) { | ||
104 | free_pages_and_swap_cache(tlb->pages, tlb->nr); | ||
105 | tlb->nr = 0; | ||
106 | } | ||
107 | } | ||
108 | |||
45 | static inline struct mmu_gather * | 109 | static inline struct mmu_gather * |
46 | tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | 110 | tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) |
47 | { | 111 | { |
@@ -49,6 +113,8 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | |||
49 | 113 | ||
50 | tlb->mm = mm; | 114 | tlb->mm = mm; |
51 | tlb->fullmm = full_mm_flush; | 115 | tlb->fullmm = full_mm_flush; |
116 | tlb->vma = NULL; | ||
117 | tlb->nr = 0; | ||
52 | 118 | ||
53 | return tlb; | 119 | return tlb; |
54 | } | 120 | } |
@@ -56,8 +122,7 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | |||
56 | static inline void | 122 | static inline void |
57 | tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) | 123 | tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) |
58 | { | 124 | { |
59 | if (tlb->fullmm) | 125 | tlb_flush_mmu(tlb); |
60 | flush_tlb_mm(tlb->mm); | ||
61 | 126 | ||
62 | /* keep the page table cache within bounds */ | 127 | /* keep the page table cache within bounds */ |
63 | check_pgt_cache(); | 128 | check_pgt_cache(); |
@@ -71,12 +136,7 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) | |||
71 | static inline void | 136 | static inline void |
72 | tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr) | 137 | tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr) |
73 | { | 138 | { |
74 | if (!tlb->fullmm) { | 139 | tlb_add_flush(tlb, addr); |
75 | if (addr < tlb->range_start) | ||
76 | tlb->range_start = addr; | ||
77 | if (addr + PAGE_SIZE > tlb->range_end) | ||
78 | tlb->range_end = addr + PAGE_SIZE; | ||
79 | } | ||
80 | } | 140 | } |
81 | 141 | ||
82 | /* | 142 | /* |
@@ -89,6 +149,7 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | |||
89 | { | 149 | { |
90 | if (!tlb->fullmm) { | 150 | if (!tlb->fullmm) { |
91 | flush_cache_range(vma, vma->vm_start, vma->vm_end); | 151 | flush_cache_range(vma, vma->vm_start, vma->vm_end); |
152 | tlb->vma = vma; | ||
92 | tlb->range_start = TASK_SIZE; | 153 | tlb->range_start = TASK_SIZE; |
93 | tlb->range_end = 0; | 154 | tlb->range_end = 0; |
94 | } | 155 | } |
@@ -97,12 +158,30 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | |||
97 | static inline void | 158 | static inline void |
98 | tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | 159 | tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) |
99 | { | 160 | { |
100 | if (!tlb->fullmm && tlb->range_end > 0) | 161 | if (!tlb->fullmm) |
101 | flush_tlb_range(vma, tlb->range_start, tlb->range_end); | 162 | tlb_flush(tlb); |
163 | } | ||
164 | |||
165 | static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) | ||
166 | { | ||
167 | if (tlb_fast_mode(tlb)) { | ||
168 | free_page_and_swap_cache(page); | ||
169 | } else { | ||
170 | tlb->pages[tlb->nr++] = page; | ||
171 | if (tlb->nr >= FREE_PTE_NR) | ||
172 | tlb_flush_mmu(tlb); | ||
173 | } | ||
174 | } | ||
175 | |||
176 | static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, | ||
177 | unsigned long addr) | ||
178 | { | ||
179 | pgtable_page_dtor(pte); | ||
180 | tlb_add_flush(tlb, addr); | ||
181 | tlb_remove_page(tlb, pte); | ||
102 | } | 182 | } |
103 | 183 | ||
104 | #define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) | 184 | #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) |
105 | #define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep) | ||
106 | #define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) | 185 | #define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) |
107 | 186 | ||
108 | #define tlb_migrate_finish(mm) do { } while (0) | 187 | #define tlb_migrate_finish(mm) do { } while (0) |
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index ce7378ea15a2..d2005de383b8 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h | |||
@@ -10,12 +10,7 @@ | |||
10 | #ifndef _ASMARM_TLBFLUSH_H | 10 | #ifndef _ASMARM_TLBFLUSH_H |
11 | #define _ASMARM_TLBFLUSH_H | 11 | #define _ASMARM_TLBFLUSH_H |
12 | 12 | ||
13 | 13 | #ifdef CONFIG_MMU | |
14 | #ifndef CONFIG_MMU | ||
15 | |||
16 | #define tlb_flush(tlb) ((void) tlb) | ||
17 | |||
18 | #else /* CONFIG_MMU */ | ||
19 | 14 | ||
20 | #include <asm/glue.h> | 15 | #include <asm/glue.h> |
21 | 16 | ||
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 185ee822c935..74554f1742d7 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -29,6 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o | |||
29 | obj-$(CONFIG_ARTHUR) += arthur.o | 29 | obj-$(CONFIG_ARTHUR) += arthur.o |
30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o | 30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
31 | obj-$(CONFIG_PCI) += bios32.o isa.o | 31 | obj-$(CONFIG_PCI) += bios32.o isa.o |
32 | obj-$(CONFIG_PM) += sleep.o | ||
32 | obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o | 33 | obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o |
33 | obj-$(CONFIG_SMP) += smp.o smp_tlb.o | 34 | obj-$(CONFIG_SMP) += smp.o smp_tlb.o |
34 | obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o | 35 | obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o |
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 82da66172132..927522cfc12e 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c | |||
@@ -13,6 +13,9 @@ | |||
13 | #include <linux/sched.h> | 13 | #include <linux/sched.h> |
14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
15 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
16 | #include <asm/cacheflush.h> | ||
17 | #include <asm/glue-df.h> | ||
18 | #include <asm/glue-pf.h> | ||
16 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
17 | #include <asm/thread_info.h> | 20 | #include <asm/thread_info.h> |
18 | #include <asm/memory.h> | 21 | #include <asm/memory.h> |
@@ -114,6 +117,14 @@ int main(void) | |||
114 | #ifdef MULTI_PABORT | 117 | #ifdef MULTI_PABORT |
115 | DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); | 118 | DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); |
116 | #endif | 119 | #endif |
120 | #ifdef MULTI_CPU | ||
121 | DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size)); | ||
122 | DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend)); | ||
123 | DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume)); | ||
124 | #endif | ||
125 | #ifdef MULTI_CACHE | ||
126 | DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all)); | ||
127 | #endif | ||
117 | BLANK(); | 128 | BLANK(); |
118 | DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); | 129 | DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); |
119 | DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); | 130 | DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 2b46fea36c9f..e8d885676807 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -16,7 +16,8 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <asm/memory.h> | 18 | #include <asm/memory.h> |
19 | #include <asm/glue.h> | 19 | #include <asm/glue-df.h> |
20 | #include <asm/glue-pf.h> | ||
20 | #include <asm/vfpmacros.h> | 21 | #include <asm/vfpmacros.h> |
21 | #include <mach/entry-macro.S> | 22 | #include <mach/entry-macro.S> |
22 | #include <asm/thread_notify.h> | 23 | #include <asm/thread_notify.h> |
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index d600bd350704..44b84fe6e1b0 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
@@ -836,9 +836,11 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, | |||
836 | /* | 836 | /* |
837 | * One-time initialisation. | 837 | * One-time initialisation. |
838 | */ | 838 | */ |
839 | static void reset_ctrl_regs(void *unused) | 839 | static void reset_ctrl_regs(void *info) |
840 | { | 840 | { |
841 | int i; | 841 | int i, cpu = smp_processor_id(); |
842 | u32 dbg_power; | ||
843 | cpumask_t *cpumask = info; | ||
842 | 844 | ||
843 | /* | 845 | /* |
844 | * v7 debug contains save and restore registers so that debug state | 846 | * v7 debug contains save and restore registers so that debug state |
@@ -850,6 +852,17 @@ static void reset_ctrl_regs(void *unused) | |||
850 | */ | 852 | */ |
851 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { | 853 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { |
852 | /* | 854 | /* |
855 | * Ensure sticky power-down is clear (i.e. debug logic is | ||
856 | * powered up). | ||
857 | */ | ||
858 | asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power)); | ||
859 | if ((dbg_power & 0x1) == 0) { | ||
860 | pr_warning("CPU %d debug is powered down!\n", cpu); | ||
861 | cpumask_or(cpumask, cpumask, cpumask_of(cpu)); | ||
862 | return; | ||
863 | } | ||
864 | |||
865 | /* | ||
853 | * Unconditionally clear the lock by writing a value | 866 | * Unconditionally clear the lock by writing a value |
854 | * other than 0xC5ACCE55 to the access register. | 867 | * other than 0xC5ACCE55 to the access register. |
855 | */ | 868 | */ |
@@ -887,6 +900,7 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = { | |||
887 | static int __init arch_hw_breakpoint_init(void) | 900 | static int __init arch_hw_breakpoint_init(void) |
888 | { | 901 | { |
889 | u32 dscr; | 902 | u32 dscr; |
903 | cpumask_t cpumask = { CPU_BITS_NONE }; | ||
890 | 904 | ||
891 | debug_arch = get_debug_arch(); | 905 | debug_arch = get_debug_arch(); |
892 | 906 | ||
@@ -911,7 +925,13 @@ static int __init arch_hw_breakpoint_init(void) | |||
911 | * Reset the breakpoint resources. We assume that a halting | 925 | * Reset the breakpoint resources. We assume that a halting |
912 | * debugger will leave the world in a nice state for us. | 926 | * debugger will leave the world in a nice state for us. |
913 | */ | 927 | */ |
914 | on_each_cpu(reset_ctrl_regs, NULL, 1); | 928 | on_each_cpu(reset_ctrl_regs, &cpumask, 1); |
929 | if (!cpumask_empty(&cpumask)) { | ||
930 | core_num_brps = 0; | ||
931 | core_num_reserved_brps = 0; | ||
932 | core_num_wrps = 0; | ||
933 | return 0; | ||
934 | } | ||
915 | 935 | ||
916 | ARM_DBG_READ(c1, 0, dscr); | 936 | ARM_DBG_READ(c1, 0, dscr); |
917 | if (dscr & ARM_DSCR_HDBGEN) { | 937 | if (dscr & ARM_DSCR_HDBGEN) { |
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c index 2c1f0050c9c4..8f6ed43861f1 100644 --- a/arch/arm/kernel/kprobes-decode.c +++ b/arch/arm/kernel/kprobes-decode.c | |||
@@ -1437,7 +1437,7 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
1437 | 1437 | ||
1438 | return space_cccc_1100_010x(insn, asi); | 1438 | return space_cccc_1100_010x(insn, asi); |
1439 | 1439 | ||
1440 | } else if ((insn & 0x0e000000) == 0x0c400000) { | 1440 | } else if ((insn & 0x0e000000) == 0x0c000000) { |
1441 | 1441 | ||
1442 | return space_cccc_110x(insn, asi); | 1442 | return space_cccc_110x(insn, asi); |
1443 | 1443 | ||
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c index b8af96ea62e6..2c79eec19262 100644 --- a/arch/arm/kernel/pmu.c +++ b/arch/arm/kernel/pmu.c | |||
@@ -97,28 +97,34 @@ set_irq_affinity(int irq, | |||
97 | irq, cpu); | 97 | irq, cpu); |
98 | return err; | 98 | return err; |
99 | #else | 99 | #else |
100 | return 0; | 100 | return -EINVAL; |
101 | #endif | 101 | #endif |
102 | } | 102 | } |
103 | 103 | ||
104 | static int | 104 | static int |
105 | init_cpu_pmu(void) | 105 | init_cpu_pmu(void) |
106 | { | 106 | { |
107 | int i, err = 0; | 107 | int i, irqs, err = 0; |
108 | struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU]; | 108 | struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU]; |
109 | 109 | ||
110 | if (!pdev) { | 110 | if (!pdev) |
111 | err = -ENODEV; | 111 | return -ENODEV; |
112 | goto out; | 112 | |
113 | } | 113 | irqs = pdev->num_resources; |
114 | |||
115 | /* | ||
116 | * If we have a single PMU interrupt that we can't shift, assume that | ||
117 | * we're running on a uniprocessor machine and continue. | ||
118 | */ | ||
119 | if (irqs == 1 && !irq_can_set_affinity(platform_get_irq(pdev, 0))) | ||
120 | return 0; | ||
114 | 121 | ||
115 | for (i = 0; i < pdev->num_resources; ++i) { | 122 | for (i = 0; i < irqs; ++i) { |
116 | err = set_irq_affinity(platform_get_irq(pdev, i), i); | 123 | err = set_irq_affinity(platform_get_irq(pdev, i), i); |
117 | if (err) | 124 | if (err) |
118 | break; | 125 | break; |
119 | } | 126 | } |
120 | 127 | ||
121 | out: | ||
122 | return err; | 128 | return err; |
123 | } | 129 | } |
124 | 130 | ||
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 19c6816db61e..b13e70f63d71 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -996,10 +996,10 @@ static int ptrace_gethbpregs(struct task_struct *tsk, long num, | |||
996 | while (!(arch_ctrl.len & 0x1)) | 996 | while (!(arch_ctrl.len & 0x1)) |
997 | arch_ctrl.len >>= 1; | 997 | arch_ctrl.len >>= 1; |
998 | 998 | ||
999 | if (idx & 0x1) | 999 | if (num & 0x1) |
1000 | reg = encode_ctrl_reg(arch_ctrl); | ||
1001 | else | ||
1002 | reg = bp->attr.bp_addr; | 1000 | reg = bp->attr.bp_addr; |
1001 | else | ||
1002 | reg = encode_ctrl_reg(arch_ctrl); | ||
1003 | } | 1003 | } |
1004 | 1004 | ||
1005 | put: | 1005 | put: |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 420b8d6485d6..5ea4fb718b97 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -226,8 +226,8 @@ int cpu_architecture(void) | |||
226 | * Register 0 and check for VMSAv7 or PMSAv7 */ | 226 | * Register 0 and check for VMSAv7 or PMSAv7 */ |
227 | asm("mrc p15, 0, %0, c0, c1, 4" | 227 | asm("mrc p15, 0, %0, c0, c1, 4" |
228 | : "=r" (mmfr0)); | 228 | : "=r" (mmfr0)); |
229 | if ((mmfr0 & 0x0000000f) == 0x00000003 || | 229 | if ((mmfr0 & 0x0000000f) >= 0x00000003 || |
230 | (mmfr0 & 0x000000f0) == 0x00000030) | 230 | (mmfr0 & 0x000000f0) >= 0x00000030) |
231 | cpu_arch = CPU_ARCH_ARMv7; | 231 | cpu_arch = CPU_ARCH_ARMv7; |
232 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || | 232 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || |
233 | (mmfr0 & 0x000000f0) == 0x00000020) | 233 | (mmfr0 & 0x000000f0) == 0x00000020) |
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 907d5a620bca..abaf8445ce25 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -474,7 +474,9 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka, | |||
474 | unsigned long handler = (unsigned long)ka->sa.sa_handler; | 474 | unsigned long handler = (unsigned long)ka->sa.sa_handler; |
475 | unsigned long retcode; | 475 | unsigned long retcode; |
476 | int thumb = 0; | 476 | int thumb = 0; |
477 | unsigned long cpsr = regs->ARM_cpsr & ~PSR_f; | 477 | unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); |
478 | |||
479 | cpsr |= PSR_ENDSTATE; | ||
478 | 480 | ||
479 | /* | 481 | /* |
480 | * Maybe we need to deliver a 32-bit signal to a 26-bit task. | 482 | * Maybe we need to deliver a 32-bit signal to a 26-bit task. |
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S new file mode 100644 index 000000000000..bfad698a02e7 --- /dev/null +++ b/arch/arm/kernel/sleep.S | |||
@@ -0,0 +1,134 @@ | |||
1 | #include <linux/linkage.h> | ||
2 | #include <linux/threads.h> | ||
3 | #include <asm/asm-offsets.h> | ||
4 | #include <asm/assembler.h> | ||
5 | #include <asm/glue-cache.h> | ||
6 | #include <asm/glue-proc.h> | ||
7 | #include <asm/system.h> | ||
8 | .text | ||
9 | |||
10 | /* | ||
11 | * Save CPU state for a suspend | ||
12 | * r1 = v:p offset | ||
13 | * r3 = virtual return function | ||
14 | * Note: sp is decremented to allocate space for CPU state on stack | ||
15 | * r0-r3,r9,r10,lr corrupted | ||
16 | */ | ||
17 | ENTRY(cpu_suspend) | ||
18 | mov r9, lr | ||
19 | #ifdef MULTI_CPU | ||
20 | ldr r10, =processor | ||
21 | mov r2, sp @ current virtual SP | ||
22 | ldr r0, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state | ||
23 | ldr ip, [r10, #CPU_DO_RESUME] @ virtual resume function | ||
24 | sub sp, sp, r0 @ allocate CPU state on stack | ||
25 | mov r0, sp @ save pointer | ||
26 | add ip, ip, r1 @ convert resume fn to phys | ||
27 | stmfd sp!, {r1, r2, r3, ip} @ save v:p, virt SP, retfn, phys resume fn | ||
28 | ldr r3, =sleep_save_sp | ||
29 | add r2, sp, r1 @ convert SP to phys | ||
30 | #ifdef CONFIG_SMP | ||
31 | ALT_SMP(mrc p15, 0, lr, c0, c0, 5) | ||
32 | ALT_UP(mov lr, #0) | ||
33 | and lr, lr, #15 | ||
34 | str r2, [r3, lr, lsl #2] @ save phys SP | ||
35 | #else | ||
36 | str r2, [r3] @ save phys SP | ||
37 | #endif | ||
38 | mov lr, pc | ||
39 | ldr pc, [r10, #CPU_DO_SUSPEND] @ save CPU state | ||
40 | #else | ||
41 | mov r2, sp @ current virtual SP | ||
42 | ldr r0, =cpu_suspend_size | ||
43 | sub sp, sp, r0 @ allocate CPU state on stack | ||
44 | mov r0, sp @ save pointer | ||
45 | stmfd sp!, {r1, r2, r3} @ save v:p, virt SP, return fn | ||
46 | ldr r3, =sleep_save_sp | ||
47 | add r2, sp, r1 @ convert SP to phys | ||
48 | #ifdef CONFIG_SMP | ||
49 | ALT_SMP(mrc p15, 0, lr, c0, c0, 5) | ||
50 | ALT_UP(mov lr, #0) | ||
51 | and lr, lr, #15 | ||
52 | str r2, [r3, lr, lsl #2] @ save phys SP | ||
53 | #else | ||
54 | str r2, [r3] @ save phys SP | ||
55 | #endif | ||
56 | bl cpu_do_suspend | ||
57 | #endif | ||
58 | |||
59 | @ flush data cache | ||
60 | #ifdef MULTI_CACHE | ||
61 | ldr r10, =cpu_cache | ||
62 | mov lr, r9 | ||
63 | ldr pc, [r10, #CACHE_FLUSH_KERN_ALL] | ||
64 | #else | ||
65 | mov lr, r9 | ||
66 | b __cpuc_flush_kern_all | ||
67 | #endif | ||
68 | ENDPROC(cpu_suspend) | ||
69 | .ltorg | ||
70 | |||
71 | /* | ||
72 | * r0 = control register value | ||
73 | * r1 = v:p offset (preserved by cpu_do_resume) | ||
74 | * r2 = phys page table base | ||
75 | * r3 = L1 section flags | ||
76 | */ | ||
77 | ENTRY(cpu_resume_mmu) | ||
78 | adr r4, cpu_resume_turn_mmu_on | ||
79 | mov r4, r4, lsr #20 | ||
80 | orr r3, r3, r4, lsl #20 | ||
81 | ldr r5, [r2, r4, lsl #2] @ save old mapping | ||
82 | str r3, [r2, r4, lsl #2] @ setup 1:1 mapping for mmu code | ||
83 | sub r2, r2, r1 | ||
84 | ldr r3, =cpu_resume_after_mmu | ||
85 | bic r1, r0, #CR_C @ ensure D-cache is disabled | ||
86 | b cpu_resume_turn_mmu_on | ||
87 | ENDPROC(cpu_resume_mmu) | ||
88 | .ltorg | ||
89 | .align 5 | ||
90 | cpu_resume_turn_mmu_on: | ||
91 | mcr p15, 0, r1, c1, c0, 0 @ turn on MMU, I-cache, etc | ||
92 | mrc p15, 0, r1, c0, c0, 0 @ read id reg | ||
93 | mov r1, r1 | ||
94 | mov r1, r1 | ||
95 | mov pc, r3 @ jump to virtual address | ||
96 | ENDPROC(cpu_resume_turn_mmu_on) | ||
97 | cpu_resume_after_mmu: | ||
98 | str r5, [r2, r4, lsl #2] @ restore old mapping | ||
99 | mcr p15, 0, r0, c1, c0, 0 @ turn on D-cache | ||
100 | mov pc, lr | ||
101 | ENDPROC(cpu_resume_after_mmu) | ||
102 | |||
103 | /* | ||
104 | * Note: Yes, part of the following code is located into the .data section. | ||
105 | * This is to allow sleep_save_sp to be accessed with a relative load | ||
106 | * while we can't rely on any MMU translation. We could have put | ||
107 | * sleep_save_sp in the .text section as well, but some setups might | ||
108 | * insist on it to be truly read-only. | ||
109 | */ | ||
110 | .data | ||
111 | .align | ||
112 | ENTRY(cpu_resume) | ||
113 | #ifdef CONFIG_SMP | ||
114 | adr r0, sleep_save_sp | ||
115 | ALT_SMP(mrc p15, 0, r1, c0, c0, 5) | ||
116 | ALT_UP(mov r1, #0) | ||
117 | and r1, r1, #15 | ||
118 | ldr r0, [r0, r1, lsl #2] @ stack phys addr | ||
119 | #else | ||
120 | ldr r0, sleep_save_sp @ stack phys addr | ||
121 | #endif | ||
122 | msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off | ||
123 | #ifdef MULTI_CPU | ||
124 | ldmia r0!, {r1, sp, lr, pc} @ load v:p, stack, return fn, resume fn | ||
125 | #else | ||
126 | ldmia r0!, {r1, sp, lr} @ load v:p, stack, return fn | ||
127 | b cpu_do_resume | ||
128 | #endif | ||
129 | ENDPROC(cpu_resume) | ||
130 | |||
131 | sleep_save_sp: | ||
132 | .rept CONFIG_NR_CPUS | ||
133 | .long 0 @ preserve stack phys ptr here | ||
134 | .endr | ||
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 9ab4149bd983..a1e757c3439b 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c | |||
@@ -50,3 +50,26 @@ void __init scu_enable(void __iomem *scu_base) | |||
50 | */ | 50 | */ |
51 | flush_cache_all(); | 51 | flush_cache_all(); |
52 | } | 52 | } |
53 | |||
54 | /* | ||
55 | * Set the executing CPUs power mode as defined. This will be in | ||
56 | * preparation for it executing a WFI instruction. | ||
57 | * | ||
58 | * This function must be called with preemption disabled, and as it | ||
59 | * has the side effect of disabling coherency, caches must have been | ||
60 | * flushed. Interrupts must also have been disabled. | ||
61 | */ | ||
62 | int scu_power_mode(void __iomem *scu_base, unsigned int mode) | ||
63 | { | ||
64 | unsigned int val; | ||
65 | int cpu = smp_processor_id(); | ||
66 | |||
67 | if (mode > 3 || mode == 1 || cpu > 3) | ||
68 | return -EINVAL; | ||
69 | |||
70 | val = __raw_readb(scu_base + SCU_CPU_STATUS + cpu) & ~0x03; | ||
71 | val |= mode; | ||
72 | __raw_writeb(val, scu_base + SCU_CPU_STATUS + cpu); | ||
73 | |||
74 | return 0; | ||
75 | } | ||
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 86b66f3f2031..61462790757f 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
@@ -21,6 +21,12 @@ | |||
21 | #define ARM_CPU_KEEP(x) | 21 | #define ARM_CPU_KEEP(x) |
22 | #endif | 22 | #endif |
23 | 23 | ||
24 | #if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK) | ||
25 | #define ARM_EXIT_KEEP(x) x | ||
26 | #else | ||
27 | #define ARM_EXIT_KEEP(x) | ||
28 | #endif | ||
29 | |||
24 | OUTPUT_ARCH(arm) | 30 | OUTPUT_ARCH(arm) |
25 | ENTRY(stext) | 31 | ENTRY(stext) |
26 | 32 | ||
@@ -43,6 +49,7 @@ SECTIONS | |||
43 | _sinittext = .; | 49 | _sinittext = .; |
44 | HEAD_TEXT | 50 | HEAD_TEXT |
45 | INIT_TEXT | 51 | INIT_TEXT |
52 | ARM_EXIT_KEEP(EXIT_TEXT) | ||
46 | _einittext = .; | 53 | _einittext = .; |
47 | ARM_CPU_DISCARD(PROC_INFO) | 54 | ARM_CPU_DISCARD(PROC_INFO) |
48 | __arch_info_begin = .; | 55 | __arch_info_begin = .; |
@@ -67,6 +74,7 @@ SECTIONS | |||
67 | #ifndef CONFIG_XIP_KERNEL | 74 | #ifndef CONFIG_XIP_KERNEL |
68 | __init_begin = _stext; | 75 | __init_begin = _stext; |
69 | INIT_DATA | 76 | INIT_DATA |
77 | ARM_EXIT_KEEP(EXIT_DATA) | ||
70 | #endif | 78 | #endif |
71 | } | 79 | } |
72 | 80 | ||
@@ -162,6 +170,7 @@ SECTIONS | |||
162 | . = ALIGN(PAGE_SIZE); | 170 | . = ALIGN(PAGE_SIZE); |
163 | __init_begin = .; | 171 | __init_begin = .; |
164 | INIT_DATA | 172 | INIT_DATA |
173 | ARM_EXIT_KEEP(EXIT_DATA) | ||
165 | . = ALIGN(PAGE_SIZE); | 174 | . = ALIGN(PAGE_SIZE); |
166 | __init_end = .; | 175 | __init_end = .; |
167 | #endif | 176 | #endif |
@@ -247,6 +256,8 @@ SECTIONS | |||
247 | } | 256 | } |
248 | #endif | 257 | #endif |
249 | 258 | ||
259 | NOTES | ||
260 | |||
250 | BSS_SECTION(0, 0, 0) | 261 | BSS_SECTION(0, 0, 0) |
251 | _end = .; | 262 | _end = .; |
252 | 263 | ||
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index 343de73161fa..4a68c2b1ec11 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c | |||
@@ -132,7 +132,7 @@ out: | |||
132 | return ret; | 132 | return ret; |
133 | } | 133 | } |
134 | 134 | ||
135 | static int __init davinci_cpu_init(struct cpufreq_policy *policy) | 135 | static int davinci_cpu_init(struct cpufreq_policy *policy) |
136 | { | 136 | { |
137 | int result = 0; | 137 | int result = 0; |
138 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; | 138 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 9eec63070e0c..beda8a4133a0 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -480,8 +480,15 @@ static struct platform_device da850_mcasp_device = { | |||
480 | .resource = da850_mcasp_resources, | 480 | .resource = da850_mcasp_resources, |
481 | }; | 481 | }; |
482 | 482 | ||
483 | struct platform_device davinci_pcm_device = { | ||
484 | .name = "davinci-pcm-audio", | ||
485 | .id = -1, | ||
486 | }; | ||
487 | |||
483 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) | 488 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) |
484 | { | 489 | { |
490 | platform_device_register(&davinci_pcm_device); | ||
491 | |||
485 | /* DA830/OMAP-L137 has 3 instances of McASP */ | 492 | /* DA830/OMAP-L137 has 3 instances of McASP */ |
486 | if (cpu_is_davinci_da830() && id == 1) { | 493 | if (cpu_is_davinci_da830() && id == 1) { |
487 | da830_mcasp1_device.dev.platform_data = pdata; | 494 | da830_mcasp1_device.dev.platform_data = pdata; |
diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c index d10298620e2c..3fa3e2867e19 100644 --- a/arch/arm/mach-davinci/gpio-tnetv107x.c +++ b/arch/arm/mach-davinci/gpio-tnetv107x.c | |||
@@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
58 | 58 | ||
59 | spin_lock_irqsave(&ctlr->lock, flags); | 59 | spin_lock_irqsave(&ctlr->lock, flags); |
60 | 60 | ||
61 | gpio_reg_set_bit(®s->enable, gpio); | 61 | gpio_reg_set_bit(regs->enable, gpio); |
62 | 62 | ||
63 | spin_unlock_irqrestore(&ctlr->lock, flags); | 63 | spin_unlock_irqrestore(&ctlr->lock, flags); |
64 | 64 | ||
@@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
74 | 74 | ||
75 | spin_lock_irqsave(&ctlr->lock, flags); | 75 | spin_lock_irqsave(&ctlr->lock, flags); |
76 | 76 | ||
77 | gpio_reg_clear_bit(®s->enable, gpio); | 77 | gpio_reg_clear_bit(regs->enable, gpio); |
78 | 78 | ||
79 | spin_unlock_irqrestore(&ctlr->lock, flags); | 79 | spin_unlock_irqrestore(&ctlr->lock, flags); |
80 | } | 80 | } |
@@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | |||
88 | 88 | ||
89 | spin_lock_irqsave(&ctlr->lock, flags); | 89 | spin_lock_irqsave(&ctlr->lock, flags); |
90 | 90 | ||
91 | gpio_reg_set_bit(®s->direction, gpio); | 91 | gpio_reg_set_bit(regs->direction, gpio); |
92 | 92 | ||
93 | spin_unlock_irqrestore(&ctlr->lock, flags); | 93 | spin_unlock_irqrestore(&ctlr->lock, flags); |
94 | 94 | ||
@@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip *chip, | |||
106 | spin_lock_irqsave(&ctlr->lock, flags); | 106 | spin_lock_irqsave(&ctlr->lock, flags); |
107 | 107 | ||
108 | if (value) | 108 | if (value) |
109 | gpio_reg_set_bit(®s->data_out, gpio); | 109 | gpio_reg_set_bit(regs->data_out, gpio); |
110 | else | 110 | else |
111 | gpio_reg_clear_bit(®s->data_out, gpio); | 111 | gpio_reg_clear_bit(regs->data_out, gpio); |
112 | 112 | ||
113 | gpio_reg_clear_bit(®s->direction, gpio); | 113 | gpio_reg_clear_bit(regs->direction, gpio); |
114 | 114 | ||
115 | spin_unlock_irqrestore(&ctlr->lock, flags); | 115 | spin_unlock_irqrestore(&ctlr->lock, flags); |
116 | 116 | ||
@@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
124 | unsigned gpio = chip->base + offset; | 124 | unsigned gpio = chip->base + offset; |
125 | int ret; | 125 | int ret; |
126 | 126 | ||
127 | ret = gpio_reg_get_bit(®s->data_in, gpio); | 127 | ret = gpio_reg_get_bit(regs->data_in, gpio); |
128 | 128 | ||
129 | return ret ? 1 : 0; | 129 | return ret ? 1 : 0; |
130 | } | 130 | } |
@@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip, | |||
140 | spin_lock_irqsave(&ctlr->lock, flags); | 140 | spin_lock_irqsave(&ctlr->lock, flags); |
141 | 141 | ||
142 | if (value) | 142 | if (value) |
143 | gpio_reg_set_bit(®s->data_out, gpio); | 143 | gpio_reg_set_bit(regs->data_out, gpio); |
144 | else | 144 | else |
145 | gpio_reg_clear_bit(®s->data_out, gpio); | 145 | gpio_reg_clear_bit(regs->data_out, gpio); |
146 | 146 | ||
147 | spin_unlock_irqrestore(&ctlr->lock, flags); | 147 | spin_unlock_irqrestore(&ctlr->lock, flags); |
148 | } | 148 | } |
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h index 730c49d1ebd8..14a504887189 100644 --- a/arch/arm/mach-davinci/include/mach/clkdev.h +++ b/arch/arm/mach-davinci/include/mach/clkdev.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef __MACH_CLKDEV_H | 1 | #ifndef __MACH_CLKDEV_H |
2 | #define __MACH_CLKDEV_H | 2 | #define __MACH_CLKDEV_H |
3 | 3 | ||
4 | struct clk; | ||
5 | |||
4 | static inline int __clk_get(struct clk *clk) | 6 | static inline int __clk_get(struct clk *clk) |
5 | { | 7 | { |
6 | return 1; | 8 | return 1; |
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index 4b0431652131..9969bb115f60 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c | |||
@@ -30,8 +30,13 @@ | |||
30 | #include <linux/gpio.h> | 30 | #include <linux/gpio.h> |
31 | #include <linux/i2c.h> | 31 | #include <linux/i2c.h> |
32 | #include <linux/i2c-gpio.h> | 32 | #include <linux/i2c-gpio.h> |
33 | #include <linux/spi/spi.h> | ||
34 | |||
35 | #include <sound/cs4271.h> | ||
33 | 36 | ||
34 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
38 | #include <mach/fb.h> | ||
39 | #include <mach/ep93xx_spi.h> | ||
35 | 40 | ||
36 | #include <asm/mach-types.h> | 41 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 42 | #include <asm/mach/arch.h> |
@@ -93,6 +98,83 @@ static void __init edb93xx_register_i2c(void) | |||
93 | 98 | ||
94 | 99 | ||
95 | /************************************************************************* | 100 | /************************************************************************* |
101 | * EDB93xx SPI peripheral handling | ||
102 | *************************************************************************/ | ||
103 | static struct cs4271_platform_data edb93xx_cs4271_data = { | ||
104 | .gpio_nreset = -EINVAL, /* filled in later */ | ||
105 | }; | ||
106 | |||
107 | static int edb93xx_cs4271_hw_setup(struct spi_device *spi) | ||
108 | { | ||
109 | return gpio_request_one(EP93XX_GPIO_LINE_EGPIO6, | ||
110 | GPIOF_OUT_INIT_HIGH, spi->modalias); | ||
111 | } | ||
112 | |||
113 | static void edb93xx_cs4271_hw_cleanup(struct spi_device *spi) | ||
114 | { | ||
115 | gpio_free(EP93XX_GPIO_LINE_EGPIO6); | ||
116 | } | ||
117 | |||
118 | static void edb93xx_cs4271_hw_cs_control(struct spi_device *spi, int value) | ||
119 | { | ||
120 | gpio_set_value(EP93XX_GPIO_LINE_EGPIO6, value); | ||
121 | } | ||
122 | |||
123 | static struct ep93xx_spi_chip_ops edb93xx_cs4271_hw = { | ||
124 | .setup = edb93xx_cs4271_hw_setup, | ||
125 | .cleanup = edb93xx_cs4271_hw_cleanup, | ||
126 | .cs_control = edb93xx_cs4271_hw_cs_control, | ||
127 | }; | ||
128 | |||
129 | static struct spi_board_info edb93xx_spi_board_info[] __initdata = { | ||
130 | { | ||
131 | .modalias = "cs4271", | ||
132 | .platform_data = &edb93xx_cs4271_data, | ||
133 | .controller_data = &edb93xx_cs4271_hw, | ||
134 | .max_speed_hz = 6000000, | ||
135 | .bus_num = 0, | ||
136 | .chip_select = 0, | ||
137 | .mode = SPI_MODE_3, | ||
138 | }, | ||
139 | }; | ||
140 | |||
141 | static struct ep93xx_spi_info edb93xx_spi_info __initdata = { | ||
142 | .num_chipselect = ARRAY_SIZE(edb93xx_spi_board_info), | ||
143 | }; | ||
144 | |||
145 | static void __init edb93xx_register_spi(void) | ||
146 | { | ||
147 | if (machine_is_edb9301() || machine_is_edb9302()) | ||
148 | edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_EGPIO1; | ||
149 | else if (machine_is_edb9302a() || machine_is_edb9307a()) | ||
150 | edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_H(2); | ||
151 | else if (machine_is_edb9315a()) | ||
152 | edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_EGPIO14; | ||
153 | |||
154 | ep93xx_register_spi(&edb93xx_spi_info, edb93xx_spi_board_info, | ||
155 | ARRAY_SIZE(edb93xx_spi_board_info)); | ||
156 | } | ||
157 | |||
158 | |||
159 | /************************************************************************* | ||
160 | * EDB93xx I2S | ||
161 | *************************************************************************/ | ||
162 | static int __init edb93xx_has_audio(void) | ||
163 | { | ||
164 | return (machine_is_edb9301() || machine_is_edb9302() || | ||
165 | machine_is_edb9302a() || machine_is_edb9307a() || | ||
166 | machine_is_edb9315a()); | ||
167 | } | ||
168 | |||
169 | static void __init edb93xx_register_i2s(void) | ||
170 | { | ||
171 | if (edb93xx_has_audio()) { | ||
172 | ep93xx_register_i2s(); | ||
173 | } | ||
174 | } | ||
175 | |||
176 | |||
177 | /************************************************************************* | ||
96 | * EDB93xx pwm | 178 | * EDB93xx pwm |
97 | *************************************************************************/ | 179 | *************************************************************************/ |
98 | static void __init edb93xx_register_pwm(void) | 180 | static void __init edb93xx_register_pwm(void) |
@@ -111,13 +193,47 @@ static void __init edb93xx_register_pwm(void) | |||
111 | } | 193 | } |
112 | 194 | ||
113 | 195 | ||
196 | /************************************************************************* | ||
197 | * EDB93xx framebuffer | ||
198 | *************************************************************************/ | ||
199 | static struct ep93xxfb_mach_info __initdata edb93xxfb_info = { | ||
200 | .num_modes = EP93XXFB_USE_MODEDB, | ||
201 | .bpp = 16, | ||
202 | .flags = 0, | ||
203 | }; | ||
204 | |||
205 | static int __init edb93xx_has_fb(void) | ||
206 | { | ||
207 | /* These platforms have an ep93xx with video capability */ | ||
208 | return machine_is_edb9307() || machine_is_edb9307a() || | ||
209 | machine_is_edb9312() || machine_is_edb9315() || | ||
210 | machine_is_edb9315a(); | ||
211 | } | ||
212 | |||
213 | static void __init edb93xx_register_fb(void) | ||
214 | { | ||
215 | if (!edb93xx_has_fb()) | ||
216 | return; | ||
217 | |||
218 | if (machine_is_edb9307a() || machine_is_edb9315a()) | ||
219 | edb93xxfb_info.flags |= EP93XXFB_USE_SDCSN0; | ||
220 | else | ||
221 | edb93xxfb_info.flags |= EP93XXFB_USE_SDCSN3; | ||
222 | |||
223 | ep93xx_register_fb(&edb93xxfb_info); | ||
224 | } | ||
225 | |||
226 | |||
114 | static void __init edb93xx_init_machine(void) | 227 | static void __init edb93xx_init_machine(void) |
115 | { | 228 | { |
116 | ep93xx_init_devices(); | 229 | ep93xx_init_devices(); |
117 | edb93xx_register_flash(); | 230 | edb93xx_register_flash(); |
118 | ep93xx_register_eth(&edb93xx_eth_data, 1); | 231 | ep93xx_register_eth(&edb93xx_eth_data, 1); |
119 | edb93xx_register_i2c(); | 232 | edb93xx_register_i2c(); |
233 | edb93xx_register_spi(); | ||
234 | edb93xx_register_i2s(); | ||
120 | edb93xx_register_pwm(); | 235 | edb93xx_register_pwm(); |
236 | edb93xx_register_fb(); | ||
121 | } | 237 | } |
122 | 238 | ||
123 | 239 | ||
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index bec34b834958..a889fa7c3ba1 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c | |||
@@ -61,7 +61,7 @@ static inline void ep93xx_gpio_int_mask(unsigned line) | |||
61 | gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); | 61 | gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); |
62 | } | 62 | } |
63 | 63 | ||
64 | void ep93xx_gpio_int_debounce(unsigned int irq, int enable) | 64 | static void ep93xx_gpio_int_debounce(unsigned int irq, bool enable) |
65 | { | 65 | { |
66 | int line = irq_to_gpio(irq); | 66 | int line = irq_to_gpio(irq); |
67 | int port = line >> 3; | 67 | int port = line >> 3; |
@@ -75,7 +75,6 @@ void ep93xx_gpio_int_debounce(unsigned int irq, int enable) | |||
75 | __raw_writeb(gpio_int_debounce[port], | 75 | __raw_writeb(gpio_int_debounce[port], |
76 | EP93XX_GPIO_REG(int_debounce_register_offset[port])); | 76 | EP93XX_GPIO_REG(int_debounce_register_offset[port])); |
77 | } | 77 | } |
78 | EXPORT_SYMBOL(ep93xx_gpio_int_debounce); | ||
79 | 78 | ||
80 | static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | 79 | static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) |
81 | { | 80 | { |
@@ -335,6 +334,20 @@ static void ep93xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
335 | local_irq_restore(flags); | 334 | local_irq_restore(flags); |
336 | } | 335 | } |
337 | 336 | ||
337 | static int ep93xx_gpio_set_debounce(struct gpio_chip *chip, | ||
338 | unsigned offset, unsigned debounce) | ||
339 | { | ||
340 | int gpio = chip->base + offset; | ||
341 | int irq = gpio_to_irq(gpio); | ||
342 | |||
343 | if (irq < 0) | ||
344 | return -EINVAL; | ||
345 | |||
346 | ep93xx_gpio_int_debounce(irq, debounce ? true : false); | ||
347 | |||
348 | return 0; | ||
349 | } | ||
350 | |||
338 | static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 351 | static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
339 | { | 352 | { |
340 | struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip); | 353 | struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip); |
@@ -434,6 +447,18 @@ void __init ep93xx_gpio_init(void) | |||
434 | EP93XX_SYSCON_DEVCFG_GONIDE | | 447 | EP93XX_SYSCON_DEVCFG_GONIDE | |
435 | EP93XX_SYSCON_DEVCFG_HONIDE); | 448 | EP93XX_SYSCON_DEVCFG_HONIDE); |
436 | 449 | ||
437 | for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) | 450 | for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) { |
438 | gpiochip_add(&ep93xx_gpio_banks[i].chip); | 451 | struct gpio_chip *chip = &ep93xx_gpio_banks[i].chip; |
452 | |||
453 | /* | ||
454 | * Ports A, B, and F support input debouncing when | ||
455 | * used as interrupts. | ||
456 | */ | ||
457 | if (!strcmp(chip->label, "A") || | ||
458 | !strcmp(chip->label, "B") || | ||
459 | !strcmp(chip->label, "F")) | ||
460 | chip->set_debounce = ep93xx_gpio_set_debounce; | ||
461 | |||
462 | gpiochip_add(chip); | ||
463 | } | ||
439 | } | 464 | } |
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h index c991b149bdf2..c57152c231f1 100644 --- a/arch/arm/mach-ep93xx/include/mach/gpio.h +++ b/arch/arm/mach-ep93xx/include/mach/gpio.h | |||
@@ -99,8 +99,6 @@ | |||
99 | /* maximum value for irq capable line identifiers */ | 99 | /* maximum value for irq capable line identifiers */ |
100 | #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) | 100 | #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) |
101 | 101 | ||
102 | extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable); | ||
103 | |||
104 | /* new generic GPIO API - see Documentation/gpio.txt */ | 102 | /* new generic GPIO API - see Documentation/gpio.txt */ |
105 | 103 | ||
106 | #include <asm-generic/gpio.h> | 104 | #include <asm-generic/gpio.h> |
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index bc5e83fb5819..a921fe92b858 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c | |||
@@ -4,10 +4,11 @@ | |||
4 | * Copyright (C) 1998 Russell King. | 4 | * Copyright (C) 1998 Russell King. |
5 | * Copyright (C) 1998 Phil Blundell | 5 | * Copyright (C) 1998 Phil Blundell |
6 | */ | 6 | */ |
7 | #include <linux/clockchips.h> | ||
8 | #include <linux/clocksource.h> | ||
7 | #include <linux/init.h> | 9 | #include <linux/init.h> |
8 | #include <linux/interrupt.h> | 10 | #include <linux/interrupt.h> |
9 | #include <linux/irq.h> | 11 | #include <linux/irq.h> |
10 | #include <linux/spinlock.h> | ||
11 | 12 | ||
12 | #include <asm/irq.h> | 13 | #include <asm/irq.h> |
13 | 14 | ||
@@ -16,32 +17,76 @@ | |||
16 | 17 | ||
17 | #include "common.h" | 18 | #include "common.h" |
18 | 19 | ||
19 | /* | 20 | static cycle_t cksrc_dc21285_read(struct clocksource *cs) |
20 | * Footbridge timer 1 support. | 21 | { |
21 | */ | 22 | return cs->mask - *CSR_TIMER2_VALUE; |
22 | static unsigned long timer1_latch; | 23 | } |
23 | 24 | ||
24 | static unsigned long timer1_gettimeoffset (void) | 25 | static int cksrc_dc21285_enable(struct clocksource *cs) |
25 | { | 26 | { |
26 | unsigned long value = timer1_latch - *CSR_TIMER1_VALUE; | 27 | *CSR_TIMER2_LOAD = cs->mask; |
28 | *CSR_TIMER2_CLR = 0; | ||
29 | *CSR_TIMER2_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16; | ||
30 | return 0; | ||
31 | } | ||
27 | 32 | ||
28 | return ((tick_nsec / 1000) * value) / timer1_latch; | 33 | static int cksrc_dc21285_disable(struct clocksource *cs) |
34 | { | ||
35 | *CSR_TIMER2_CNTL = 0; | ||
29 | } | 36 | } |
30 | 37 | ||
31 | static irqreturn_t | 38 | static struct clocksource cksrc_dc21285 = { |
32 | timer1_interrupt(int irq, void *dev_id) | 39 | .name = "dc21285_timer2", |
40 | .rating = 200, | ||
41 | .read = cksrc_dc21285_read, | ||
42 | .enable = cksrc_dc21285_enable, | ||
43 | .disable = cksrc_dc21285_disable, | ||
44 | .mask = CLOCKSOURCE_MASK(24), | ||
45 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
46 | }; | ||
47 | |||
48 | static void ckevt_dc21285_set_mode(enum clock_event_mode mode, | ||
49 | struct clock_event_device *c) | ||
33 | { | 50 | { |
51 | switch (mode) { | ||
52 | case CLOCK_EVT_MODE_RESUME: | ||
53 | case CLOCK_EVT_MODE_PERIODIC: | ||
54 | *CSR_TIMER1_CLR = 0; | ||
55 | *CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); | ||
56 | *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | | ||
57 | TIMER_CNTL_DIV16; | ||
58 | break; | ||
59 | |||
60 | default: | ||
61 | *CSR_TIMER1_CNTL = 0; | ||
62 | break; | ||
63 | } | ||
64 | } | ||
65 | |||
66 | static struct clock_event_device ckevt_dc21285 = { | ||
67 | .name = "dc21285_timer1", | ||
68 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
69 | .rating = 200, | ||
70 | .irq = IRQ_TIMER1, | ||
71 | .set_mode = ckevt_dc21285_set_mode, | ||
72 | }; | ||
73 | |||
74 | static irqreturn_t timer1_interrupt(int irq, void *dev_id) | ||
75 | { | ||
76 | struct clock_event_device *ce = dev_id; | ||
77 | |||
34 | *CSR_TIMER1_CLR = 0; | 78 | *CSR_TIMER1_CLR = 0; |
35 | 79 | ||
36 | timer_tick(); | 80 | ce->event_handler(ce); |
37 | 81 | ||
38 | return IRQ_HANDLED; | 82 | return IRQ_HANDLED; |
39 | } | 83 | } |
40 | 84 | ||
41 | static struct irqaction footbridge_timer_irq = { | 85 | static struct irqaction footbridge_timer_irq = { |
42 | .name = "Timer1 timer tick", | 86 | .name = "dc21285_timer1", |
43 | .handler = timer1_interrupt, | 87 | .handler = timer1_interrupt, |
44 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 88 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
89 | .dev_id = &ckevt_dc21285, | ||
45 | }; | 90 | }; |
46 | 91 | ||
47 | /* | 92 | /* |
@@ -49,16 +94,19 @@ static struct irqaction footbridge_timer_irq = { | |||
49 | */ | 94 | */ |
50 | static void __init footbridge_timer_init(void) | 95 | static void __init footbridge_timer_init(void) |
51 | { | 96 | { |
52 | timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); | 97 | struct clock_event_device *ce = &ckevt_dc21285; |
98 | |||
99 | clocksource_register_hz(&cksrc_dc21285, (mem_fclk_21285 + 8) / 16); | ||
100 | |||
101 | setup_irq(ce->irq, &footbridge_timer_irq); | ||
53 | 102 | ||
54 | *CSR_TIMER1_CLR = 0; | 103 | clockevents_calc_mult_shift(ce, mem_fclk_21285, 5); |
55 | *CSR_TIMER1_LOAD = timer1_latch; | 104 | ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce); |
56 | *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; | 105 | ce->min_delta_ns = clockevent_delta2ns(0x000004, ce); |
57 | 106 | ||
58 | setup_irq(IRQ_TIMER1, &footbridge_timer_irq); | 107 | clockevents_register_device(ce); |
59 | } | 108 | } |
60 | 109 | ||
61 | struct sys_timer footbridge_timer = { | 110 | struct sys_timer footbridge_timer = { |
62 | .init = footbridge_timer_init, | 111 | .init = footbridge_timer_init, |
63 | .offset = timer1_gettimeoffset, | ||
64 | }; | 112 | }; |
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index f488fa2082d7..441c6ce0d555 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c | |||
@@ -4,10 +4,13 @@ | |||
4 | * Copyright (C) 1998 Russell King. | 4 | * Copyright (C) 1998 Russell King. |
5 | * Copyright (C) 1998 Phil Blundell | 5 | * Copyright (C) 1998 Phil Blundell |
6 | */ | 6 | */ |
7 | #include <linux/clockchips.h> | ||
8 | #include <linux/clocksource.h> | ||
7 | #include <linux/init.h> | 9 | #include <linux/init.h> |
8 | #include <linux/interrupt.h> | 10 | #include <linux/interrupt.h> |
9 | #include <linux/irq.h> | 11 | #include <linux/irq.h> |
10 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <linux/timex.h> | ||
11 | 14 | ||
12 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
13 | 16 | ||
@@ -15,77 +18,115 @@ | |||
15 | 18 | ||
16 | #include "common.h" | 19 | #include "common.h" |
17 | 20 | ||
18 | /* | 21 | #define PIT_MODE 0x43 |
19 | * ISA timer tick support | 22 | #define PIT_CH0 0x40 |
20 | */ | 23 | |
21 | #define mSEC_10_from_14 ((14318180 + 100) / 200) | 24 | #define PIT_LATCH ((PIT_TICK_RATE + HZ / 2) / HZ) |
22 | 25 | ||
23 | static unsigned long isa_gettimeoffset(void) | 26 | static cycle_t pit_read(struct clocksource *cs) |
24 | { | 27 | { |
28 | unsigned long flags; | ||
29 | static int old_count; | ||
30 | static u32 old_jifs; | ||
25 | int count; | 31 | int count; |
32 | u32 jifs; | ||
26 | 33 | ||
27 | static int count_p = (mSEC_10_from_14/6); /* for the first call after boot */ | 34 | raw_local_irq_save(flags); |
28 | static unsigned long jiffies_p = 0; | ||
29 | 35 | ||
30 | /* | 36 | jifs = jiffies; |
31 | * cache volatile jiffies temporarily; we have IRQs turned off. | 37 | outb_p(0x00, PIT_MODE); /* latch the count */ |
32 | */ | 38 | count = inb_p(PIT_CH0); /* read the latched count */ |
33 | unsigned long jiffies_t; | 39 | count |= inb_p(PIT_CH0) << 8; |
34 | 40 | ||
35 | /* timer count may underflow right here */ | 41 | if (count > old_count && jifs == old_jifs) |
36 | outb_p(0x00, 0x43); /* latch the count ASAP */ | 42 | count = old_count; |
37 | 43 | ||
38 | count = inb_p(0x40); /* read the latched count */ | 44 | old_count = count; |
45 | old_jifs = jifs; | ||
39 | 46 | ||
40 | /* | 47 | raw_local_irq_restore(flags); |
41 | * We do this guaranteed double memory access instead of a _p | ||
42 | * postfix in the previous port access. Wheee, hackady hack | ||
43 | */ | ||
44 | jiffies_t = jiffies; | ||
45 | 48 | ||
46 | count |= inb_p(0x40) << 8; | 49 | count = (PIT_LATCH - 1) - count; |
47 | 50 | ||
48 | /* Detect timer underflows. If we haven't had a timer tick since | 51 | return (cycle_t)(jifs * PIT_LATCH) + count; |
49 | the last time we were called, and time is apparently going | 52 | } |
50 | backwards, the counter must have wrapped during this routine. */ | ||
51 | if ((jiffies_t == jiffies_p) && (count > count_p)) | ||
52 | count -= (mSEC_10_from_14/6); | ||
53 | else | ||
54 | jiffies_p = jiffies_t; | ||
55 | 53 | ||
56 | count_p = count; | 54 | static struct clocksource pit_cs = { |
55 | .name = "pit", | ||
56 | .rating = 110, | ||
57 | .read = pit_read, | ||
58 | .mask = CLOCKSOURCE_MASK(32), | ||
59 | }; | ||
57 | 60 | ||
58 | count = (((mSEC_10_from_14/6)-1) - count) * (tick_nsec / 1000); | 61 | static void pit_set_mode(enum clock_event_mode mode, |
59 | count = (count + (mSEC_10_from_14/6)/2) / (mSEC_10_from_14/6); | 62 | struct clock_event_device *evt) |
63 | { | ||
64 | unsigned long flags; | ||
65 | |||
66 | raw_local_irq_save(flags); | ||
67 | |||
68 | switch (mode) { | ||
69 | case CLOCK_EVT_MODE_PERIODIC: | ||
70 | outb_p(0x34, PIT_MODE); | ||
71 | outb_p(PIT_LATCH & 0xff, PIT_CH0); | ||
72 | outb_p(PIT_LATCH >> 8, PIT_CH0); | ||
73 | break; | ||
74 | |||
75 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
76 | case CLOCK_EVT_MODE_UNUSED: | ||
77 | outb_p(0x30, PIT_MODE); | ||
78 | outb_p(0, PIT_CH0); | ||
79 | outb_p(0, PIT_CH0); | ||
80 | break; | ||
81 | |||
82 | case CLOCK_EVT_MODE_ONESHOT: | ||
83 | case CLOCK_EVT_MODE_RESUME: | ||
84 | break; | ||
85 | } | ||
86 | local_irq_restore(flags); | ||
87 | } | ||
60 | 88 | ||
61 | return count; | 89 | static int pit_set_next_event(unsigned long delta, |
90 | struct clock_event_device *evt) | ||
91 | { | ||
92 | return 0; | ||
62 | } | 93 | } |
63 | 94 | ||
64 | static irqreturn_t | 95 | static struct clock_event_device pit_ce = { |
65 | isa_timer_interrupt(int irq, void *dev_id) | 96 | .name = "pit", |
97 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
98 | .set_mode = pit_set_mode, | ||
99 | .set_next_event = pit_set_next_event, | ||
100 | .shift = 32, | ||
101 | }; | ||
102 | |||
103 | static irqreturn_t pit_timer_interrupt(int irq, void *dev_id) | ||
66 | { | 104 | { |
67 | timer_tick(); | 105 | struct clock_event_device *ce = dev_id; |
106 | ce->event_handler(ce); | ||
68 | return IRQ_HANDLED; | 107 | return IRQ_HANDLED; |
69 | } | 108 | } |
70 | 109 | ||
71 | static struct irqaction isa_timer_irq = { | 110 | static struct irqaction pit_timer_irq = { |
72 | .name = "ISA timer tick", | 111 | .name = "pit", |
73 | .handler = isa_timer_interrupt, | 112 | .handler = pit_timer_interrupt, |
74 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 113 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
114 | .dev_id = &pit_ce, | ||
75 | }; | 115 | }; |
76 | 116 | ||
77 | static void __init isa_timer_init(void) | 117 | static void __init isa_timer_init(void) |
78 | { | 118 | { |
79 | /* enable PIT timer */ | 119 | pit_ce.cpumask = cpumask_of(smp_processor_id()); |
80 | /* set for periodic (4) and LSB/MSB write (0x30) */ | 120 | pit_ce.mult = div_sc(PIT_TICK_RATE, NSEC_PER_SEC, pit_ce.shift); |
81 | outb(0x34, 0x43); | 121 | pit_ce.max_delta_ns = clockevent_delta2ns(0x7fff, &pit_ce); |
82 | outb((mSEC_10_from_14/6) & 0xFF, 0x40); | 122 | pit_ce.min_delta_ns = clockevent_delta2ns(0x000f, &pit_ce); |
83 | outb((mSEC_10_from_14/6) >> 8, 0x40); | 123 | |
124 | clocksource_register_hz(&pit_cs, PIT_TICK_RATE); | ||
84 | 125 | ||
85 | setup_irq(IRQ_ISA_TIMER, &isa_timer_irq); | 126 | setup_irq(pit_ce.irq, &pit_timer_irq); |
127 | clockevents_register_device(&pit_ce); | ||
86 | } | 128 | } |
87 | 129 | ||
88 | struct sys_timer isa_timer = { | 130 | struct sys_timer isa_timer = { |
89 | .init = isa_timer_init, | 131 | .init = isa_timer_init, |
90 | .offset = isa_gettimeoffset, | ||
91 | }; | 132 | }; |
diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c index 2ba096de0034..0cf7a07c3f3f 100644 --- a/arch/arm/mach-gemini/board-nas4220b.c +++ b/arch/arm/mach-gemini/board-nas4220b.c | |||
@@ -98,6 +98,7 @@ static void __init ib4220b_init(void) | |||
98 | platform_register_pflash(SZ_16M, NULL, 0); | 98 | platform_register_pflash(SZ_16M, NULL, 0); |
99 | platform_device_register(&ib4220b_led_device); | 99 | platform_device_register(&ib4220b_led_device); |
100 | platform_device_register(&ib4220b_key_device); | 100 | platform_device_register(&ib4220b_key_device); |
101 | platform_register_rtc(); | ||
101 | } | 102 | } |
102 | 103 | ||
103 | MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") | 104 | MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") |
diff --git a/arch/arm/mach-gemini/board-rut1xx.c b/arch/arm/mach-gemini/board-rut1xx.c index a9a0d8b01942..4fa09af99495 100644 --- a/arch/arm/mach-gemini/board-rut1xx.c +++ b/arch/arm/mach-gemini/board-rut1xx.c | |||
@@ -82,6 +82,7 @@ static void __init rut1xx_init(void) | |||
82 | platform_register_pflash(SZ_8M, NULL, 0); | 82 | platform_register_pflash(SZ_8M, NULL, 0); |
83 | platform_device_register(&rut1xx_leds); | 83 | platform_device_register(&rut1xx_leds); |
84 | platform_device_register(&rut1xx_keys_device); | 84 | platform_device_register(&rut1xx_keys_device); |
85 | platform_register_rtc(); | ||
85 | } | 86 | } |
86 | 87 | ||
87 | MACHINE_START(RUT100, "Teltonika RUT100") | 88 | MACHINE_START(RUT100, "Teltonika RUT100") |
diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c index 8b88d50d4337..af7b68a6b258 100644 --- a/arch/arm/mach-gemini/board-wbd111.c +++ b/arch/arm/mach-gemini/board-wbd111.c | |||
@@ -130,6 +130,7 @@ static void __init wbd111_init(void) | |||
130 | wbd111_num_partitions); | 130 | wbd111_num_partitions); |
131 | platform_device_register(&wbd111_leds_device); | 131 | platform_device_register(&wbd111_leds_device); |
132 | platform_device_register(&wbd111_keys_device); | 132 | platform_device_register(&wbd111_keys_device); |
133 | platform_register_rtc(); | ||
133 | } | 134 | } |
134 | 135 | ||
135 | MACHINE_START(WBD111, "Wiliboard WBD-111") | 136 | MACHINE_START(WBD111, "Wiliboard WBD-111") |
diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c index 1eebcecd1c33..99e5bbecf923 100644 --- a/arch/arm/mach-gemini/board-wbd222.c +++ b/arch/arm/mach-gemini/board-wbd222.c | |||
@@ -130,6 +130,7 @@ static void __init wbd222_init(void) | |||
130 | wbd222_num_partitions); | 130 | wbd222_num_partitions); |
131 | platform_device_register(&wbd222_leds_device); | 131 | platform_device_register(&wbd222_leds_device); |
132 | platform_device_register(&wbd222_keys_device); | 132 | platform_device_register(&wbd222_keys_device); |
133 | platform_register_rtc(); | ||
133 | } | 134 | } |
134 | 135 | ||
135 | MACHINE_START(WBD222, "Wiliboard WBD-222") | 136 | MACHINE_START(WBD222, "Wiliboard WBD-222") |
diff --git a/arch/arm/mach-gemini/common.h b/arch/arm/mach-gemini/common.h index 9392834a214f..7670c39acb2f 100644 --- a/arch/arm/mach-gemini/common.h +++ b/arch/arm/mach-gemini/common.h | |||
@@ -18,6 +18,7 @@ extern void gemini_map_io(void); | |||
18 | extern void gemini_init_irq(void); | 18 | extern void gemini_init_irq(void); |
19 | extern void gemini_timer_init(void); | 19 | extern void gemini_timer_init(void); |
20 | extern void gemini_gpio_init(void); | 20 | extern void gemini_gpio_init(void); |
21 | extern void platform_register_rtc(void); | ||
21 | 22 | ||
22 | /* Common platform devices registration functions */ | 23 | /* Common platform devices registration functions */ |
23 | extern int platform_register_uart(void); | 24 | extern int platform_register_uart(void); |
diff --git a/arch/arm/mach-gemini/devices.c b/arch/arm/mach-gemini/devices.c index 6b525253d027..5cff29818b73 100644 --- a/arch/arm/mach-gemini/devices.c +++ b/arch/arm/mach-gemini/devices.c | |||
@@ -90,3 +90,29 @@ int platform_register_pflash(unsigned int size, struct mtd_partition *parts, | |||
90 | 90 | ||
91 | return platform_device_register(&pflash_device); | 91 | return platform_device_register(&pflash_device); |
92 | } | 92 | } |
93 | |||
94 | static struct resource gemini_rtc_resources[] = { | ||
95 | [0] = { | ||
96 | .start = GEMINI_RTC_BASE, | ||
97 | .end = GEMINI_RTC_BASE + 0x24, | ||
98 | .flags = IORESOURCE_MEM, | ||
99 | }, | ||
100 | [1] = { | ||
101 | .start = IRQ_RTC, | ||
102 | .end = IRQ_RTC, | ||
103 | .flags = IORESOURCE_IRQ, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static struct platform_device gemini_rtc_device = { | ||
108 | .name = "rtc-gemini", | ||
109 | .id = 0, | ||
110 | .num_resources = ARRAY_SIZE(gemini_rtc_resources), | ||
111 | .resource = gemini_rtc_resources, | ||
112 | }; | ||
113 | |||
114 | int __init platform_register_rtc(void) | ||
115 | { | ||
116 | return platform_device_register(&gemini_rtc_device); | ||
117 | } | ||
118 | |||
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c index cb0c0e83a527..61991e4dde44 100644 --- a/arch/arm/mach-mxs/gpio.c +++ b/arch/arm/mach-mxs/gpio.c | |||
@@ -68,29 +68,29 @@ static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, | |||
68 | } | 68 | } |
69 | } | 69 | } |
70 | 70 | ||
71 | static void mxs_gpio_ack_irq(u32 irq) | 71 | static void mxs_gpio_ack_irq(struct irq_data *d) |
72 | { | 72 | { |
73 | u32 gpio = irq_to_gpio(irq); | 73 | u32 gpio = irq_to_gpio(d->irq); |
74 | clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); | 74 | clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); |
75 | } | 75 | } |
76 | 76 | ||
77 | static void mxs_gpio_mask_irq(u32 irq) | 77 | static void mxs_gpio_mask_irq(struct irq_data *d) |
78 | { | 78 | { |
79 | u32 gpio = irq_to_gpio(irq); | 79 | u32 gpio = irq_to_gpio(d->irq); |
80 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); | 80 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); |
81 | } | 81 | } |
82 | 82 | ||
83 | static void mxs_gpio_unmask_irq(u32 irq) | 83 | static void mxs_gpio_unmask_irq(struct irq_data *d) |
84 | { | 84 | { |
85 | u32 gpio = irq_to_gpio(irq); | 85 | u32 gpio = irq_to_gpio(d->irq); |
86 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); | 86 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); |
87 | } | 87 | } |
88 | 88 | ||
89 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); | 89 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); |
90 | 90 | ||
91 | static int mxs_gpio_set_irq_type(u32 irq, u32 type) | 91 | static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) |
92 | { | 92 | { |
93 | u32 gpio = irq_to_gpio(irq); | 93 | u32 gpio = irq_to_gpio(d->irq); |
94 | u32 pin_mask = 1 << (gpio & 31); | 94 | u32 pin_mask = 1 << (gpio & 31); |
95 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | 95 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; |
96 | void __iomem *pin_addr; | 96 | void __iomem *pin_addr; |
@@ -160,9 +160,9 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) | |||
160 | * @param enable enable as wake-up if equal to non-zero | 160 | * @param enable enable as wake-up if equal to non-zero |
161 | * @return This function returns 0 on success. | 161 | * @return This function returns 0 on success. |
162 | */ | 162 | */ |
163 | static int mxs_gpio_set_wake_irq(u32 irq, u32 enable) | 163 | static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) |
164 | { | 164 | { |
165 | u32 gpio = irq_to_gpio(irq); | 165 | u32 gpio = irq_to_gpio(d->irq); |
166 | u32 gpio_idx = gpio & 0x1f; | 166 | u32 gpio_idx = gpio & 0x1f; |
167 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | 167 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; |
168 | 168 | ||
@@ -182,11 +182,11 @@ static int mxs_gpio_set_wake_irq(u32 irq, u32 enable) | |||
182 | } | 182 | } |
183 | 183 | ||
184 | static struct irq_chip gpio_irq_chip = { | 184 | static struct irq_chip gpio_irq_chip = { |
185 | .ack = mxs_gpio_ack_irq, | 185 | .irq_ack = mxs_gpio_ack_irq, |
186 | .mask = mxs_gpio_mask_irq, | 186 | .irq_mask = mxs_gpio_mask_irq, |
187 | .unmask = mxs_gpio_unmask_irq, | 187 | .irq_unmask = mxs_gpio_unmask_irq, |
188 | .set_type = mxs_gpio_set_irq_type, | 188 | .irq_set_type = mxs_gpio_set_irq_type, |
189 | .set_wake = mxs_gpio_set_wake_irq, | 189 | .irq_set_wake = mxs_gpio_set_wake_irq, |
190 | }; | 190 | }; |
191 | 191 | ||
192 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, | 192 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, |
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 5dd43ba70058..0f4c120fc169 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c | |||
@@ -34,7 +34,7 @@ | |||
34 | 34 | ||
35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); | 35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); |
36 | 36 | ||
37 | static void icoll_ack_irq(unsigned int irq) | 37 | static void icoll_ack_irq(struct irq_data *d) |
38 | { | 38 | { |
39 | /* | 39 | /* |
40 | * The Interrupt Collector is able to prioritize irqs. | 40 | * The Interrupt Collector is able to prioritize irqs. |
@@ -45,22 +45,22 @@ static void icoll_ack_irq(unsigned int irq) | |||
45 | icoll_base + HW_ICOLL_LEVELACK); | 45 | icoll_base + HW_ICOLL_LEVELACK); |
46 | } | 46 | } |
47 | 47 | ||
48 | static void icoll_mask_irq(unsigned int irq) | 48 | static void icoll_mask_irq(struct irq_data *d) |
49 | { | 49 | { |
50 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 50 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
51 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(irq)); | 51 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq)); |
52 | } | 52 | } |
53 | 53 | ||
54 | static void icoll_unmask_irq(unsigned int irq) | 54 | static void icoll_unmask_irq(struct irq_data *d) |
55 | { | 55 | { |
56 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 56 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
57 | icoll_base + HW_ICOLL_INTERRUPTn_SET(irq)); | 57 | icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq)); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct irq_chip mxs_icoll_chip = { | 60 | static struct irq_chip mxs_icoll_chip = { |
61 | .ack = icoll_ack_irq, | 61 | .irq_ack = icoll_ack_irq, |
62 | .mask = icoll_mask_irq, | 62 | .irq_mask = icoll_mask_irq, |
63 | .unmask = icoll_unmask_irq, | 63 | .irq_unmask = icoll_unmask_irq, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | void __init icoll_init_irq(void) | 66 | void __init icoll_init_irq(void) |
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index 56a647986ae9..cd926dcb5e7f 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h | |||
@@ -123,9 +123,9 @@ extern void allow_idle_sleep(void); | |||
123 | extern void omap1_pm_idle(void); | 123 | extern void omap1_pm_idle(void); |
124 | extern void omap1_pm_suspend(void); | 124 | extern void omap1_pm_suspend(void); |
125 | 125 | ||
126 | extern void omap7xx_cpu_suspend(unsigned short, unsigned short); | 126 | extern void omap7xx_cpu_suspend(unsigned long, unsigned long); |
127 | extern void omap1510_cpu_suspend(unsigned short, unsigned short); | 127 | extern void omap1510_cpu_suspend(unsigned long, unsigned long); |
128 | extern void omap1610_cpu_suspend(unsigned short, unsigned short); | 128 | extern void omap1610_cpu_suspend(unsigned long, unsigned long); |
129 | extern void omap7xx_idle_loop_suspend(void); | 129 | extern void omap7xx_idle_loop_suspend(void); |
130 | extern void omap1510_idle_loop_suspend(void); | 130 | extern void omap1510_idle_loop_suspend(void); |
131 | extern void omap1610_idle_loop_suspend(void); | 131 | extern void omap1610_idle_loop_suspend(void); |
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index ef771ce8b030..c875bdc902c5 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S | |||
@@ -58,6 +58,7 @@ | |||
58 | */ | 58 | */ |
59 | 59 | ||
60 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | 60 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
61 | .align 3 | ||
61 | ENTRY(omap7xx_cpu_suspend) | 62 | ENTRY(omap7xx_cpu_suspend) |
62 | 63 | ||
63 | @ save registers on stack | 64 | @ save registers on stack |
@@ -137,6 +138,7 @@ ENTRY(omap7xx_cpu_suspend_sz) | |||
137 | #endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ | 138 | #endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ |
138 | 139 | ||
139 | #ifdef CONFIG_ARCH_OMAP15XX | 140 | #ifdef CONFIG_ARCH_OMAP15XX |
141 | .align 3 | ||
140 | ENTRY(omap1510_cpu_suspend) | 142 | ENTRY(omap1510_cpu_suspend) |
141 | 143 | ||
142 | @ save registers on stack | 144 | @ save registers on stack |
@@ -211,6 +213,7 @@ ENTRY(omap1510_cpu_suspend_sz) | |||
211 | #endif /* CONFIG_ARCH_OMAP15XX */ | 213 | #endif /* CONFIG_ARCH_OMAP15XX */ |
212 | 214 | ||
213 | #if defined(CONFIG_ARCH_OMAP16XX) | 215 | #if defined(CONFIG_ARCH_OMAP16XX) |
216 | .align 3 | ||
214 | ENTRY(omap1610_cpu_suspend) | 217 | ENTRY(omap1610_cpu_suspend) |
215 | 218 | ||
216 | @ save registers on stack | 219 | @ save registers on stack |
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 7724e520d07c..692587d07ea5 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S | |||
@@ -18,6 +18,7 @@ | |||
18 | /* | 18 | /* |
19 | * Reprograms ULPD and CKCTL. | 19 | * Reprograms ULPD and CKCTL. |
20 | */ | 20 | */ |
21 | .align 3 | ||
21 | ENTRY(omap1_sram_reprogram_clock) | 22 | ENTRY(omap1_sram_reprogram_clock) |
22 | stmfd sp!, {r0 - r12, lr} @ save registers on stack | 23 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
23 | 24 | ||
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 337392c3f549..acb7ae5b0a25 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c | |||
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n) | |||
77 | dd = clk->dpll_data; | 77 | dd = clk->dpll_data; |
78 | 78 | ||
79 | /* DPLL divider must result in a valid jitter correction val */ | 79 | /* DPLL divider must result in a valid jitter correction val */ |
80 | fint = clk->parent->rate / (n + 1); | 80 | fint = clk->parent->rate / n; |
81 | if (fint < DPLL_FINT_BAND1_MIN) { | 81 | if (fint < DPLL_FINT_BAND1_MIN) { |
82 | 82 | ||
83 | pr_debug("rejecting n=%d due to Fint failure, " | 83 | pr_debug("rejecting n=%d due to Fint failure, " |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 394413dc7deb..24b88504df0f 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -193,10 +193,12 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox, | |||
193 | omap_mbox_type_t irq) | 193 | omap_mbox_type_t irq) |
194 | { | 194 | { |
195 | struct omap_mbox2_priv *p = mbox->priv; | 195 | struct omap_mbox2_priv *p = mbox->priv; |
196 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 196 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
197 | l = mbox_read_reg(p->irqdisable); | 197 | |
198 | l &= ~bit; | 198 | if (!cpu_is_omap44xx()) |
199 | mbox_write_reg(l, p->irqdisable); | 199 | bit = mbox_read_reg(p->irqdisable) & ~bit; |
200 | |||
201 | mbox_write_reg(bit, p->irqdisable); | ||
200 | } | 202 | } |
201 | 203 | ||
202 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, | 204 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, |
@@ -334,7 +336,7 @@ static struct omap_mbox mbox_iva_info = { | |||
334 | .priv = &omap2_mbox_iva_priv, | 336 | .priv = &omap2_mbox_iva_priv, |
335 | }; | 337 | }; |
336 | 338 | ||
337 | struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; | 339 | struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; |
338 | #endif | 340 | #endif |
339 | 341 | ||
340 | #if defined(CONFIG_ARCH_OMAP4) | 342 | #if defined(CONFIG_ARCH_OMAP4) |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 98148b6c36e9..6c84659cf846 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -605,7 +605,7 @@ static void __init omap_mux_dbg_create_entry( | |||
605 | list_for_each_entry(e, &partition->muxmodes, node) { | 605 | list_for_each_entry(e, &partition->muxmodes, node) { |
606 | struct omap_mux *m = &e->mux; | 606 | struct omap_mux *m = &e->mux; |
607 | 607 | ||
608 | (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir, | 608 | (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, |
609 | m, &omap_mux_dbg_signal_fops); | 609 | m, &omap_mux_dbg_signal_fops); |
610 | } | 610 | } |
611 | } | 611 | } |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 125f56591fb5..a5a83b358ddd 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -637,14 +637,14 @@ static int __init pm_dbg_init(void) | |||
637 | 637 | ||
638 | } | 638 | } |
639 | 639 | ||
640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, | 640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d, |
641 | &enable_off_mode, &pm_dbg_option_fops); | 641 | &enable_off_mode, &pm_dbg_option_fops); |
642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, | 642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, |
643 | &sleep_while_idle, &pm_dbg_option_fops); | 643 | &sleep_while_idle, &pm_dbg_option_fops); |
644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, | 644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, |
645 | &wakeup_timer_seconds, &pm_dbg_option_fops); | 645 | &wakeup_timer_seconds, &pm_dbg_option_fops); |
646 | (void) debugfs_create_file("wakeup_timer_milliseconds", | 646 | (void) debugfs_create_file("wakeup_timer_milliseconds", |
647 | S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds, | 647 | S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, |
648 | &pm_dbg_option_fops); | 648 | &pm_dbg_option_fops); |
649 | pm_dbg_init_done = 1; | 649 | pm_dbg_init_done = 1; |
650 | 650 | ||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 1c1b0ab5b978..39580e6060e8 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -92,7 +92,7 @@ extern void omap24xx_idle_loop_suspend(void); | |||
92 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | 92 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, |
93 | void __iomem *sdrc_power); | 93 | void __iomem *sdrc_power); |
94 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); | 94 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); |
95 | extern void save_secure_ram_context(u32 *addr); | 95 | extern int save_secure_ram_context(u32 *addr); |
96 | extern void omap3_save_scratchpad_contents(void); | 96 | extern void omap3_save_scratchpad_contents(void); |
97 | 97 | ||
98 | extern unsigned int omap24xx_idle_loop_suspend_sz; | 98 | extern unsigned int omap24xx_idle_loop_suspend_sz; |
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 729a644ce852..3300ff6e3cfe 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h | |||
@@ -38,8 +38,8 @@ | |||
38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 | 38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 |
39 | 39 | ||
40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ | 40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ |
41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000 | 41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018 |
42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000 | 42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018 |
43 | 43 | ||
44 | 44 | ||
45 | /* | 45 | /* |
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S index c7780cc8d919..b5071a47ec39 100644 --- a/arch/arm/mach-omap2/sleep24xx.S +++ b/arch/arm/mach-omap2/sleep24xx.S | |||
@@ -47,6 +47,7 @@ | |||
47 | * Note: This code get's copied to internal SRAM at boot. When the OMAP | 47 | * Note: This code get's copied to internal SRAM at boot. When the OMAP |
48 | * wakes up it continues execution at the point it went to sleep. | 48 | * wakes up it continues execution at the point it went to sleep. |
49 | */ | 49 | */ |
50 | .align 3 | ||
50 | ENTRY(omap24xx_idle_loop_suspend) | 51 | ENTRY(omap24xx_idle_loop_suspend) |
51 | stmfd sp!, {r0, lr} @ save registers on stack | 52 | stmfd sp!, {r0, lr} @ save registers on stack |
52 | mov r0, #0 @ clear for mcr setup | 53 | mov r0, #0 @ clear for mcr setup |
@@ -82,6 +83,7 @@ ENTRY(omap24xx_idle_loop_suspend_sz) | |||
82 | * The DLL load value is not kept in RETENTION or OFF. It needs to be restored | 83 | * The DLL load value is not kept in RETENTION or OFF. It needs to be restored |
83 | * at wake | 84 | * at wake |
84 | */ | 85 | */ |
86 | .align 3 | ||
85 | ENTRY(omap24xx_cpu_suspend) | 87 | ENTRY(omap24xx_cpu_suspend) |
86 | stmfd sp!, {r0 - r12, lr} @ save registers on stack | 88 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
87 | mov r3, #0x0 @ clear for mcr call | 89 | mov r3, #0x0 @ clear for mcr call |
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 98d8232808b8..951a0be66cf7 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S | |||
@@ -118,6 +118,7 @@ ENTRY(enable_omap3630_toggle_l2_on_restore) | |||
118 | 118 | ||
119 | .text | 119 | .text |
120 | /* Function to call rom code to save secure ram context */ | 120 | /* Function to call rom code to save secure ram context */ |
121 | .align 3 | ||
121 | ENTRY(save_secure_ram_context) | 122 | ENTRY(save_secure_ram_context) |
122 | stmfd sp!, {r1-r12, lr} @ save registers on stack | 123 | stmfd sp!, {r1-r12, lr} @ save registers on stack |
123 | adr r3, api_params @ r3 points to parameters | 124 | adr r3, api_params @ r3 points to parameters |
@@ -169,6 +170,7 @@ ENTRY(save_secure_ram_context_sz) | |||
169 | * depending on the low power mode (non-OFF vs OFF modes), | 170 | * depending on the low power mode (non-OFF vs OFF modes), |
170 | * cf. 'Resume path for xxx mode' comments. | 171 | * cf. 'Resume path for xxx mode' comments. |
171 | */ | 172 | */ |
173 | .align 3 | ||
172 | ENTRY(omap34xx_cpu_suspend) | 174 | ENTRY(omap34xx_cpu_suspend) |
173 | stmfd sp!, {r0-r12, lr} @ save registers on stack | 175 | stmfd sp!, {r0-r12, lr} @ save registers on stack |
174 | 176 | ||
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index c37e823266d3..1a777e34d0c2 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -282,6 +282,7 @@ error: | |||
282 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | 282 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" |
283 | "interrupt handler. Smartreflex will" | 283 | "interrupt handler. Smartreflex will" |
284 | "not function as desired\n", __func__); | 284 | "not function as desired\n", __func__); |
285 | kfree(name); | ||
285 | kfree(sr_info); | 286 | kfree(sr_info); |
286 | return ret; | 287 | return ret; |
287 | } | 288 | } |
@@ -879,7 +880,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
879 | ret = sr_late_init(sr_info); | 880 | ret = sr_late_init(sr_info); |
880 | if (ret) { | 881 | if (ret) { |
881 | pr_warning("%s: Error in SR late init\n", __func__); | 882 | pr_warning("%s: Error in SR late init\n", __func__); |
882 | return ret; | 883 | goto err_release_region; |
883 | } | 884 | } |
884 | } | 885 | } |
885 | 886 | ||
@@ -890,17 +891,20 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
890 | * not try to create rest of the debugfs entries. | 891 | * not try to create rest of the debugfs entries. |
891 | */ | 892 | */ |
892 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | 893 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); |
893 | if (!vdd_dbg_dir) | 894 | if (!vdd_dbg_dir) { |
894 | return -EINVAL; | 895 | ret = -EINVAL; |
896 | goto err_release_region; | ||
897 | } | ||
895 | 898 | ||
896 | dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | 899 | dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); |
897 | if (IS_ERR(dbg_dir)) { | 900 | if (IS_ERR(dbg_dir)) { |
898 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | 901 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", |
899 | __func__); | 902 | __func__); |
900 | return PTR_ERR(dbg_dir); | 903 | ret = PTR_ERR(dbg_dir); |
904 | goto err_release_region; | ||
901 | } | 905 | } |
902 | 906 | ||
903 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, | 907 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir, |
904 | (void *)sr_info, &pm_sr_fops); | 908 | (void *)sr_info, &pm_sr_fops); |
905 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, | 909 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, |
906 | &sr_info->err_weight); | 910 | &sr_info->err_weight); |
@@ -913,7 +917,8 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
913 | if (IS_ERR(nvalue_dir)) { | 917 | if (IS_ERR(nvalue_dir)) { |
914 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | 918 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" |
915 | "for n-values\n", __func__); | 919 | "for n-values\n", __func__); |
916 | return PTR_ERR(nvalue_dir); | 920 | ret = PTR_ERR(nvalue_dir); |
921 | goto err_release_region; | ||
917 | } | 922 | } |
918 | 923 | ||
919 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | 924 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); |
@@ -922,24 +927,16 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
922 | " corresponding vdd vdd_%s. Cannot create debugfs" | 927 | " corresponding vdd vdd_%s. Cannot create debugfs" |
923 | "entries for n-values\n", | 928 | "entries for n-values\n", |
924 | __func__, sr_info->voltdm->name); | 929 | __func__, sr_info->voltdm->name); |
925 | return -ENODATA; | 930 | ret = -ENODATA; |
931 | goto err_release_region; | ||
926 | } | 932 | } |
927 | 933 | ||
928 | for (i = 0; i < sr_info->nvalue_count; i++) { | 934 | for (i = 0; i < sr_info->nvalue_count; i++) { |
929 | char *name; | 935 | char name[NVALUE_NAME_LEN + 1]; |
930 | char volt_name[32]; | ||
931 | |||
932 | name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL); | ||
933 | if (!name) { | ||
934 | dev_err(&pdev->dev, "%s: Unable to allocate memory" | ||
935 | " for n-value directory name\n", __func__); | ||
936 | return -ENOMEM; | ||
937 | } | ||
938 | 936 | ||
939 | strcpy(name, "volt_"); | 937 | snprintf(name, sizeof(name), "volt_%d", |
940 | sprintf(volt_name, "%d", volt_data[i].volt_nominal); | 938 | volt_data[i].volt_nominal); |
941 | strcat(name, volt_name); | 939 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
942 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir, | ||
943 | &(sr_info->nvalue_table[i].nvalue)); | 940 | &(sr_info->nvalue_table[i].nvalue)); |
944 | } | 941 | } |
945 | 942 | ||
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index 055310cc77de..ff9b9dbcb30e 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S | |||
@@ -39,6 +39,7 @@ | |||
39 | 39 | ||
40 | .text | 40 | .text |
41 | 41 | ||
42 | .align 3 | ||
42 | ENTRY(omap242x_sram_ddr_init) | 43 | ENTRY(omap242x_sram_ddr_init) |
43 | stmfd sp!, {r0 - r12, lr} @ save registers on stack | 44 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
44 | 45 | ||
@@ -143,6 +144,7 @@ ENTRY(omap242x_sram_ddr_init_sz) | |||
143 | * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] | 144 | * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] |
144 | * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 | 145 | * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 |
145 | */ | 146 | */ |
147 | .align 3 | ||
146 | ENTRY(omap242x_sram_reprogram_sdrc) | 148 | ENTRY(omap242x_sram_reprogram_sdrc) |
147 | stmfd sp!, {r0 - r10, lr} @ save registers on stack | 149 | stmfd sp!, {r0 - r10, lr} @ save registers on stack |
148 | mov r3, #0x0 @ clear for mrc call | 150 | mov r3, #0x0 @ clear for mrc call |
@@ -238,6 +240,7 @@ ENTRY(omap242x_sram_reprogram_sdrc_sz) | |||
238 | /* | 240 | /* |
239 | * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. | 241 | * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. |
240 | */ | 242 | */ |
243 | .align 3 | ||
241 | ENTRY(omap242x_sram_set_prcm) | 244 | ENTRY(omap242x_sram_set_prcm) |
242 | stmfd sp!, {r0-r12, lr} @ regs to stack | 245 | stmfd sp!, {r0-r12, lr} @ regs to stack |
243 | adr r4, pbegin @ addr of preload start | 246 | adr r4, pbegin @ addr of preload start |
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index f9007580aea3..76730209fa0e 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S | |||
@@ -39,6 +39,7 @@ | |||
39 | 39 | ||
40 | .text | 40 | .text |
41 | 41 | ||
42 | .align 3 | ||
42 | ENTRY(omap243x_sram_ddr_init) | 43 | ENTRY(omap243x_sram_ddr_init) |
43 | stmfd sp!, {r0 - r12, lr} @ save registers on stack | 44 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
44 | 45 | ||
@@ -143,6 +144,7 @@ ENTRY(omap243x_sram_ddr_init_sz) | |||
143 | * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] | 144 | * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] |
144 | * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 | 145 | * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 |
145 | */ | 146 | */ |
147 | .align 3 | ||
146 | ENTRY(omap243x_sram_reprogram_sdrc) | 148 | ENTRY(omap243x_sram_reprogram_sdrc) |
147 | stmfd sp!, {r0 - r10, lr} @ save registers on stack | 149 | stmfd sp!, {r0 - r10, lr} @ save registers on stack |
148 | mov r3, #0x0 @ clear for mrc call | 150 | mov r3, #0x0 @ clear for mrc call |
@@ -238,6 +240,7 @@ ENTRY(omap243x_sram_reprogram_sdrc_sz) | |||
238 | /* | 240 | /* |
239 | * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. | 241 | * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. |
240 | */ | 242 | */ |
243 | .align 3 | ||
241 | ENTRY(omap243x_sram_set_prcm) | 244 | ENTRY(omap243x_sram_set_prcm) |
242 | stmfd sp!, {r0-r12, lr} @ regs to stack | 245 | stmfd sp!, {r0-r12, lr} @ regs to stack |
243 | adr r4, pbegin @ addr of preload start | 246 | adr r4, pbegin @ addr of preload start |
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 7f893a29d500..25011ca2145d 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S | |||
@@ -111,6 +111,7 @@ | |||
111 | * since it will cause the ARM MMU to attempt to walk the page tables. | 111 | * since it will cause the ARM MMU to attempt to walk the page tables. |
112 | * These crashes may be intermittent. | 112 | * These crashes may be intermittent. |
113 | */ | 113 | */ |
114 | .align 3 | ||
114 | ENTRY(omap3_sram_configure_core_dpll) | 115 | ENTRY(omap3_sram_configure_core_dpll) |
115 | stmfd sp!, {r1-r12, lr} @ store regs to stack | 116 | stmfd sp!, {r1-r12, lr} @ store regs to stack |
116 | 117 | ||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 7b7c2683ae7b..0fc550e7e482 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
40 | #include <plat/dmtimer.h> | 40 | #include <plat/dmtimer.h> |
41 | #include <asm/localtimer.h> | 41 | #include <asm/localtimer.h> |
42 | #include <asm/sched_clock.h> | ||
42 | 43 | ||
43 | #include "timer-gp.h" | 44 | #include "timer-gp.h" |
44 | 45 | ||
@@ -190,6 +191,7 @@ static void __init omap2_gp_clocksource_init(void) | |||
190 | /* | 191 | /* |
191 | * clocksource | 192 | * clocksource |
192 | */ | 193 | */ |
194 | static DEFINE_CLOCK_DATA(cd); | ||
193 | static struct omap_dm_timer *gpt_clocksource; | 195 | static struct omap_dm_timer *gpt_clocksource; |
194 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 196 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
195 | { | 197 | { |
@@ -204,6 +206,15 @@ static struct clocksource clocksource_gpt = { | |||
204 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 206 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
205 | }; | 207 | }; |
206 | 208 | ||
209 | static void notrace dmtimer_update_sched_clock(void) | ||
210 | { | ||
211 | u32 cyc; | ||
212 | |||
213 | cyc = omap_dm_timer_read_counter(gpt_clocksource); | ||
214 | |||
215 | update_sched_clock(&cd, cyc, (u32)~0); | ||
216 | } | ||
217 | |||
207 | /* Setup free-running counter for clocksource */ | 218 | /* Setup free-running counter for clocksource */ |
208 | static void __init omap2_gp_clocksource_init(void) | 219 | static void __init omap2_gp_clocksource_init(void) |
209 | { | 220 | { |
@@ -224,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void) | |||
224 | 235 | ||
225 | omap_dm_timer_set_load_start(gpt, 1, 0); | 236 | omap_dm_timer_set_load_start(gpt, 1, 0); |
226 | 237 | ||
238 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); | ||
239 | |||
227 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) | 240 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) |
228 | printk(err2, clocksource_gpt.name); | 241 | printk(err2, clocksource_gpt.name); |
229 | } | 242 | } |
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h index fd8360c6839d..f15afe012995 100644 --- a/arch/arm/mach-pxa/include/mach/pm.h +++ b/arch/arm/mach-pxa/include/mach/pm.h | |||
@@ -22,9 +22,8 @@ struct pxa_cpu_pm_fns { | |||
22 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; | 22 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; |
23 | 23 | ||
24 | /* sleep.S */ | 24 | /* sleep.S */ |
25 | extern void pxa25x_cpu_suspend(unsigned int); | 25 | extern void pxa25x_cpu_suspend(unsigned int, long); |
26 | extern void pxa27x_cpu_suspend(unsigned int); | 26 | extern void pxa27x_cpu_suspend(unsigned int, long); |
27 | extern void pxa_cpu_resume(void); | ||
28 | 27 | ||
29 | extern int pxa_pm_enter(suspend_state_t state); | 28 | extern int pxa_pm_enter(suspend_state_t state); |
30 | extern int pxa_pm_prepare(void); | 29 | extern int pxa_pm_prepare(void); |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 7bf4017326e3..3010193b081e 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
@@ -212,7 +212,7 @@ static unsigned long store_ptr; | |||
212 | static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg) | 212 | static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg) |
213 | { | 213 | { |
214 | /* setup the resume_info struct for the original bootloader */ | 214 | /* setup the resume_info struct for the original bootloader */ |
215 | palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume; | 215 | palmz72_resume_info.resume_addr = (u32) cpu_resume; |
216 | 216 | ||
217 | /* Storing memory touched by ROM */ | 217 | /* Storing memory touched by ROM */ |
218 | store_ptr = *PALMZ72_SAVE_DWORD; | 218 | store_ptr = *PALMZ72_SAVE_DWORD; |
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 1807c9abdde0..51e1583265b2 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c | |||
@@ -67,11 +67,6 @@ int pxa_pm_enter(suspend_state_t state) | |||
67 | 67 | ||
68 | EXPORT_SYMBOL_GPL(pxa_pm_enter); | 68 | EXPORT_SYMBOL_GPL(pxa_pm_enter); |
69 | 69 | ||
70 | unsigned long sleep_phys_sp(void *sp) | ||
71 | { | ||
72 | return virt_to_phys(sp); | ||
73 | } | ||
74 | |||
75 | static int pxa_pm_valid(suspend_state_t state) | 70 | static int pxa_pm_valid(suspend_state_t state) |
76 | { | 71 | { |
77 | if (pxa_cpu_pm_fns) | 72 | if (pxa_cpu_pm_fns) |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index fbc5b775f895..6bde5956358d 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -244,7 +244,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state) | |||
244 | 244 | ||
245 | switch (state) { | 245 | switch (state) { |
246 | case PM_SUSPEND_MEM: | 246 | case PM_SUSPEND_MEM: |
247 | pxa25x_cpu_suspend(PWRMODE_SLEEP); | 247 | pxa25x_cpu_suspend(PWRMODE_SLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); |
248 | break; | 248 | break; |
249 | } | 249 | } |
250 | } | 250 | } |
@@ -252,7 +252,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state) | |||
252 | static int pxa25x_cpu_pm_prepare(void) | 252 | static int pxa25x_cpu_pm_prepare(void) |
253 | { | 253 | { |
254 | /* set resume return address */ | 254 | /* set resume return address */ |
255 | PSPR = virt_to_phys(pxa_cpu_resume); | 255 | PSPR = virt_to_phys(cpu_resume); |
256 | return 0; | 256 | return 0; |
257 | } | 257 | } |
258 | 258 | ||
@@ -347,6 +347,7 @@ static struct platform_device *pxa25x_devices[] __initdata = { | |||
347 | &pxa25x_device_assp, | 347 | &pxa25x_device_assp, |
348 | &pxa25x_device_pwm0, | 348 | &pxa25x_device_pwm0, |
349 | &pxa25x_device_pwm1, | 349 | &pxa25x_device_pwm1, |
350 | &pxa_device_asoc_platform, | ||
350 | }; | 351 | }; |
351 | 352 | ||
352 | static struct sys_device pxa25x_sysdev[] = { | 353 | static struct sys_device pxa25x_sysdev[] = { |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 987301ff4c33..28b11be00b3f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -300,7 +300,7 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) | |||
300 | pxa_cpu_standby(); | 300 | pxa_cpu_standby(); |
301 | break; | 301 | break; |
302 | case PM_SUSPEND_MEM: | 302 | case PM_SUSPEND_MEM: |
303 | pxa27x_cpu_suspend(pwrmode); | 303 | pxa27x_cpu_suspend(pwrmode, PLAT_PHYS_OFFSET - PAGE_OFFSET); |
304 | break; | 304 | break; |
305 | } | 305 | } |
306 | } | 306 | } |
@@ -313,7 +313,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state) | |||
313 | static int pxa27x_cpu_pm_prepare(void) | 313 | static int pxa27x_cpu_pm_prepare(void) |
314 | { | 314 | { |
315 | /* set resume return address */ | 315 | /* set resume return address */ |
316 | PSPR = virt_to_phys(pxa_cpu_resume); | 316 | PSPR = virt_to_phys(cpu_resume); |
317 | return 0; | 317 | return 0; |
318 | } | 318 | } |
319 | 319 | ||
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index a7a19e1cd640..1230343d9c70 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -142,8 +142,7 @@ static void pxa3xx_cpu_pm_suspend(void) | |||
142 | volatile unsigned long *p = (volatile void *)0xc0000000; | 142 | volatile unsigned long *p = (volatile void *)0xc0000000; |
143 | unsigned long saved_data = *p; | 143 | unsigned long saved_data = *p; |
144 | 144 | ||
145 | extern void pxa3xx_cpu_suspend(void); | 145 | extern void pxa3xx_cpu_suspend(long); |
146 | extern void pxa3xx_cpu_resume(void); | ||
147 | 146 | ||
148 | /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ | 147 | /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ |
149 | CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM); | 148 | CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM); |
@@ -161,9 +160,9 @@ static void pxa3xx_cpu_pm_suspend(void) | |||
161 | PSPR = 0x5c014000; | 160 | PSPR = 0x5c014000; |
162 | 161 | ||
163 | /* overwrite with the resume address */ | 162 | /* overwrite with the resume address */ |
164 | *p = virt_to_phys(pxa3xx_cpu_resume); | 163 | *p = virt_to_phys(cpu_resume); |
165 | 164 | ||
166 | pxa3xx_cpu_suspend(); | 165 | pxa3xx_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET); |
167 | 166 | ||
168 | *p = saved_data; | 167 | *p = saved_data; |
169 | 168 | ||
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index c551da86baf6..6f5368899d84 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -22,133 +22,26 @@ | |||
22 | 22 | ||
23 | .text | 23 | .text |
24 | 24 | ||
25 | pxa_cpu_save_cp: | ||
26 | @ get coprocessor registers | ||
27 | mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode | ||
28 | mrc p15, 0, r4, c15, c1, 0 @ CP access reg | ||
29 | mrc p15, 0, r5, c13, c0, 0 @ PID | ||
30 | mrc p15, 0, r6, c3, c0, 0 @ domain ID | ||
31 | mrc p15, 0, r7, c2, c0, 0 @ translation table base addr | ||
32 | mrc p15, 0, r8, c1, c1, 0 @ auxiliary control reg | ||
33 | mrc p15, 0, r9, c1, c0, 0 @ control reg | ||
34 | |||
35 | bic r3, r3, #2 @ clear frequency change bit | ||
36 | |||
37 | @ store them plus current virtual stack ptr on stack | ||
38 | mov r10, sp | ||
39 | stmfd sp!, {r3 - r10} | ||
40 | |||
41 | mov pc, lr | ||
42 | |||
43 | pxa_cpu_save_sp: | ||
44 | @ preserve phys address of stack | ||
45 | mov r0, sp | ||
46 | str lr, [sp, #-4]! | ||
47 | bl sleep_phys_sp | ||
48 | ldr r1, =sleep_save_sp | ||
49 | str r0, [r1] | ||
50 | ldr pc, [sp], #4 | ||
51 | |||
52 | #ifdef CONFIG_PXA3xx | 25 | #ifdef CONFIG_PXA3xx |
53 | /* | 26 | /* |
54 | * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4) | 27 | * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4) |
55 | * | 28 | * |
56 | * NOTE: unfortunately, pxa_cpu_save_cp can not be reused here since | 29 | * r0 = v:p offset |
57 | * the auxiliary control register address is different between pxa3xx | ||
58 | * and pxa{25x,27x} | ||
59 | */ | 30 | */ |
60 | |||
61 | ENTRY(pxa3xx_cpu_suspend) | 31 | ENTRY(pxa3xx_cpu_suspend) |
62 | 32 | ||
63 | #ifndef CONFIG_IWMMXT | 33 | #ifndef CONFIG_IWMMXT |
64 | mra r2, r3, acc0 | 34 | mra r2, r3, acc0 |
65 | #endif | 35 | #endif |
66 | stmfd sp!, {r2 - r12, lr} @ save registers on stack | 36 | stmfd sp!, {r2 - r12, lr} @ save registers on stack |
67 | 37 | mov r1, r0 | |
68 | mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode | 38 | ldr r3, =pxa_cpu_resume @ resume function |
69 | mrc p15, 0, r4, c15, c1, 0 @ CP access reg | 39 | bl cpu_suspend |
70 | mrc p15, 0, r5, c13, c0, 0 @ PID | ||
71 | mrc p15, 0, r6, c3, c0, 0 @ domain ID | ||
72 | mrc p15, 0, r7, c2, c0, 0 @ translation table base addr | ||
73 | mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg | ||
74 | mrc p15, 0, r9, c1, c0, 0 @ control reg | ||
75 | |||
76 | bic r3, r3, #2 @ clear frequency change bit | ||
77 | |||
78 | @ store them plus current virtual stack ptr on stack | ||
79 | mov r10, sp | ||
80 | stmfd sp!, {r3 - r10} | ||
81 | |||
82 | @ store physical address of stack pointer | ||
83 | mov r0, sp | ||
84 | bl sleep_phys_sp | ||
85 | ldr r1, =sleep_save_sp | ||
86 | str r0, [r1] | ||
87 | |||
88 | @ clean data cache | ||
89 | bl xsc3_flush_kern_cache_all | ||
90 | 40 | ||
91 | mov r0, #0x06 @ S2D3C4 mode | 41 | mov r0, #0x06 @ S2D3C4 mode |
92 | mcr p14, 0, r0, c7, c0, 0 @ enter sleep | 42 | mcr p14, 0, r0, c7, c0, 0 @ enter sleep |
93 | 43 | ||
94 | 20: b 20b @ waiting for sleep | 44 | 20: b 20b @ waiting for sleep |
95 | |||
96 | .data | ||
97 | .align 5 | ||
98 | /* | ||
99 | * pxa3xx_cpu_resume | ||
100 | */ | ||
101 | |||
102 | ENTRY(pxa3xx_cpu_resume) | ||
103 | |||
104 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off | ||
105 | msr cpsr_c, r0 | ||
106 | |||
107 | ldr r0, sleep_save_sp @ stack phys addr | ||
108 | ldmfd r0, {r3 - r9, sp} @ CP regs + virt stack ptr | ||
109 | |||
110 | mov r1, #0 | ||
111 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB | ||
112 | mcr p15, 0, r1, c7, c10, 4 @ drain write (&fill) buffer | ||
113 | mcr p15, 0, r1, c7, c5, 4 @ flush prefetch buffer | ||
114 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | ||
115 | |||
116 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. | ||
117 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg | ||
118 | mcr p15, 0, r5, c13, c0, 0 @ PID | ||
119 | mcr p15, 0, r6, c3, c0, 0 @ domain ID | ||
120 | mcr p15, 0, r7, c2, c0, 0 @ translation table base addr | ||
121 | mcr p15, 0, r8, c1, c0, 1 @ auxiliary control reg | ||
122 | |||
123 | @ temporarily map resume_turn_on_mmu into the page table, | ||
124 | @ otherwise prefetch abort occurs after MMU is turned on | ||
125 | mov r1, r7 | ||
126 | bic r1, r1, #0x00ff | ||
127 | bic r1, r1, #0x3f00 | ||
128 | ldr r2, =0x542e | ||
129 | |||
130 | adr r3, resume_turn_on_mmu | ||
131 | mov r3, r3, lsr #20 | ||
132 | orr r4, r2, r3, lsl #20 | ||
133 | ldr r5, [r1, r3, lsl #2] | ||
134 | str r4, [r1, r3, lsl #2] | ||
135 | |||
136 | @ Mapping page table address in the page table | ||
137 | mov r6, r1, lsr #20 | ||
138 | orr r7, r2, r6, lsl #20 | ||
139 | ldr r8, [r1, r6, lsl #2] | ||
140 | str r7, [r1, r6, lsl #2] | ||
141 | |||
142 | ldr r2, =pxa3xx_resume_after_mmu @ absolute virtual address | ||
143 | b resume_turn_on_mmu @ cache align execution | ||
144 | |||
145 | .text | ||
146 | pxa3xx_resume_after_mmu: | ||
147 | /* restore the temporary mapping */ | ||
148 | str r5, [r1, r3, lsl #2] | ||
149 | str r8, [r1, r6, lsl #2] | ||
150 | b resume_after_mmu | ||
151 | |||
152 | #endif /* CONFIG_PXA3xx */ | 45 | #endif /* CONFIG_PXA3xx */ |
153 | 46 | ||
154 | #ifdef CONFIG_PXA27x | 47 | #ifdef CONFIG_PXA27x |
@@ -158,28 +51,23 @@ pxa3xx_resume_after_mmu: | |||
158 | * Forces CPU into sleep state. | 51 | * Forces CPU into sleep state. |
159 | * | 52 | * |
160 | * r0 = value for PWRMODE M field for desired sleep state | 53 | * r0 = value for PWRMODE M field for desired sleep state |
54 | * r1 = v:p offset | ||
161 | */ | 55 | */ |
162 | |||
163 | ENTRY(pxa27x_cpu_suspend) | 56 | ENTRY(pxa27x_cpu_suspend) |
164 | 57 | ||
165 | #ifndef CONFIG_IWMMXT | 58 | #ifndef CONFIG_IWMMXT |
166 | mra r2, r3, acc0 | 59 | mra r2, r3, acc0 |
167 | #endif | 60 | #endif |
168 | stmfd sp!, {r2 - r12, lr} @ save registers on stack | 61 | stmfd sp!, {r2 - r12, lr} @ save registers on stack |
169 | 62 | mov r4, r0 @ save sleep mode | |
170 | bl pxa_cpu_save_cp | 63 | ldr r3, =pxa_cpu_resume @ resume function |
171 | 64 | bl cpu_suspend | |
172 | mov r5, r0 @ save sleep mode | ||
173 | bl pxa_cpu_save_sp | ||
174 | |||
175 | @ clean data cache | ||
176 | bl xscale_flush_kern_cache_all | ||
177 | 65 | ||
178 | @ Put the processor to sleep | 66 | @ Put the processor to sleep |
179 | @ (also workaround for sighting 28071) | 67 | @ (also workaround for sighting 28071) |
180 | 68 | ||
181 | @ prepare value for sleep mode | 69 | @ prepare value for sleep mode |
182 | mov r1, r5 @ sleep mode | 70 | mov r1, r4 @ sleep mode |
183 | 71 | ||
184 | @ prepare pointer to physical address 0 (virtual mapping in generic.c) | 72 | @ prepare pointer to physical address 0 (virtual mapping in generic.c) |
185 | mov r2, #UNCACHED_PHYS_0 | 73 | mov r2, #UNCACHED_PHYS_0 |
@@ -216,21 +104,16 @@ ENTRY(pxa27x_cpu_suspend) | |||
216 | * Forces CPU into sleep state. | 104 | * Forces CPU into sleep state. |
217 | * | 105 | * |
218 | * r0 = value for PWRMODE M field for desired sleep state | 106 | * r0 = value for PWRMODE M field for desired sleep state |
107 | * r1 = v:p offset | ||
219 | */ | 108 | */ |
220 | 109 | ||
221 | ENTRY(pxa25x_cpu_suspend) | 110 | ENTRY(pxa25x_cpu_suspend) |
222 | stmfd sp!, {r2 - r12, lr} @ save registers on stack | 111 | stmfd sp!, {r2 - r12, lr} @ save registers on stack |
223 | 112 | mov r4, r0 @ save sleep mode | |
224 | bl pxa_cpu_save_cp | 113 | ldr r3, =pxa_cpu_resume @ resume function |
225 | 114 | bl cpu_suspend | |
226 | mov r5, r0 @ save sleep mode | ||
227 | bl pxa_cpu_save_sp | ||
228 | |||
229 | @ clean data cache | ||
230 | bl xscale_flush_kern_cache_all | ||
231 | |||
232 | @ prepare value for sleep mode | 115 | @ prepare value for sleep mode |
233 | mov r1, r5 @ sleep mode | 116 | mov r1, r4 @ sleep mode |
234 | 117 | ||
235 | @ prepare pointer to physical address 0 (virtual mapping in generic.c) | 118 | @ prepare pointer to physical address 0 (virtual mapping in generic.c) |
236 | mov r2, #UNCACHED_PHYS_0 | 119 | mov r2, #UNCACHED_PHYS_0 |
@@ -317,53 +200,9 @@ pxa_cpu_do_suspend: | |||
317 | * pxa_cpu_resume() | 200 | * pxa_cpu_resume() |
318 | * | 201 | * |
319 | * entry point from bootloader into kernel during resume | 202 | * entry point from bootloader into kernel during resume |
320 | * | ||
321 | * Note: Yes, part of the following code is located into the .data section. | ||
322 | * This is to allow sleep_save_sp to be accessed with a relative load | ||
323 | * while we can't rely on any MMU translation. We could have put | ||
324 | * sleep_save_sp in the .text section as well, but some setups might | ||
325 | * insist on it to be truly read-only. | ||
326 | */ | 203 | */ |
327 | |||
328 | .data | ||
329 | .align 5 | ||
330 | ENTRY(pxa_cpu_resume) | ||
331 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off | ||
332 | msr cpsr_c, r0 | ||
333 | |||
334 | ldr r0, sleep_save_sp @ stack phys addr | ||
335 | ldr r2, =resume_after_mmu @ its absolute virtual address | ||
336 | ldmfd r0, {r3 - r9, sp} @ CP regs + virt stack ptr | ||
337 | |||
338 | mov r1, #0 | ||
339 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | ||
340 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB | ||
341 | |||
342 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. | ||
343 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg | ||
344 | mcr p15, 0, r5, c13, c0, 0 @ PID | ||
345 | mcr p15, 0, r6, c3, c0, 0 @ domain ID | ||
346 | mcr p15, 0, r7, c2, c0, 0 @ translation table base addr | ||
347 | mcr p15, 0, r8, c1, c1, 0 @ auxiliary control reg | ||
348 | b resume_turn_on_mmu @ cache align execution | ||
349 | |||
350 | .align 5 | 204 | .align 5 |
351 | resume_turn_on_mmu: | 205 | pxa_cpu_resume: |
352 | mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, caches, etc. | ||
353 | |||
354 | @ Let us ensure we jump to resume_after_mmu only when the mcr above | ||
355 | @ actually took effect. They call it the "cpwait" operation. | ||
356 | mrc p15, 0, r0, c2, c0, 0 @ queue a dependency on CP15 | ||
357 | sub pc, r2, r0, lsr #32 @ jump to virtual addr | ||
358 | nop | ||
359 | nop | ||
360 | nop | ||
361 | |||
362 | sleep_save_sp: | ||
363 | .word 0 @ preserve stack phys ptr here | ||
364 | |||
365 | .text | ||
366 | resume_after_mmu: | ||
367 | ldmfd sp!, {r2, r3} | 206 | ldmfd sp!, {r2, r3} |
368 | #ifndef CONFIG_IWMMXT | 207 | #ifndef CONFIG_IWMMXT |
369 | mar acc0, r2, r3 | 208 | mar acc0, r2, r3 |
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c index c31e601eb49c..b9b1e5c2b290 100644 --- a/arch/arm/mach-pxa/tosa-bt.c +++ b/arch/arm/mach-pxa/tosa-bt.c | |||
@@ -81,8 +81,6 @@ static int tosa_bt_probe(struct platform_device *dev) | |||
81 | goto err_rfk_alloc; | 81 | goto err_rfk_alloc; |
82 | } | 82 | } |
83 | 83 | ||
84 | rfkill_set_led_trigger_name(rfk, "tosa-bt"); | ||
85 | |||
86 | rc = rfkill_register(rfk); | 84 | rc = rfkill_register(rfk); |
87 | if (rc) | 85 | if (rc) |
88 | goto err_rfkill; | 86 | goto err_rfkill; |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index af152e70cfcf..f2582ec300d9 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -875,6 +875,11 @@ static struct platform_device sharpsl_rom_device = { | |||
875 | .dev.platform_data = &sharpsl_rom_data, | 875 | .dev.platform_data = &sharpsl_rom_data, |
876 | }; | 876 | }; |
877 | 877 | ||
878 | static struct platform_device wm9712_device = { | ||
879 | .name = "wm9712-codec", | ||
880 | .id = -1, | ||
881 | }; | ||
882 | |||
878 | static struct platform_device *devices[] __initdata = { | 883 | static struct platform_device *devices[] __initdata = { |
879 | &tosascoop_device, | 884 | &tosascoop_device, |
880 | &tosascoop_jc_device, | 885 | &tosascoop_jc_device, |
@@ -885,6 +890,7 @@ static struct platform_device *devices[] __initdata = { | |||
885 | &tosaled_device, | 890 | &tosaled_device, |
886 | &tosa_bt_device, | 891 | &tosa_bt_device, |
887 | &sharpsl_rom_device, | 892 | &sharpsl_rom_device, |
893 | &wm9712_device, | ||
888 | }; | 894 | }; |
889 | 895 | ||
890 | static void tosa_poweroff(void) | 896 | static void tosa_poweroff(void) |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index f4b053b35815..b92aa3b8c4f7 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -676,7 +676,7 @@ static struct pxa2xx_udc_mach_info zeus_udc_info = { | |||
676 | static void zeus_power_off(void) | 676 | static void zeus_power_off(void) |
677 | { | 677 | { |
678 | local_irq_disable(); | 678 | local_irq_disable(); |
679 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); | 679 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); |
680 | } | 680 | } |
681 | #else | 681 | #else |
682 | #define zeus_power_off NULL | 682 | #define zeus_power_off NULL |
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index a0cb2581894f..50825a3f91cc 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -99,6 +99,7 @@ config MACH_NEO1973_GTA02 | |||
99 | select POWER_SUPPLY | 99 | select POWER_SUPPLY |
100 | select MACH_NEO1973 | 100 | select MACH_NEO1973 |
101 | select S3C2410_PWM | 101 | select S3C2410_PWM |
102 | select S3C_DEV_USB_HOST | ||
102 | help | 103 | help |
103 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone | 104 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone |
104 | 105 | ||
diff --git a/arch/arm/mach-s3c2440/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h index 953331d8d56a..3a56a229cac6 100644 --- a/arch/arm/mach-s3c2440/include/mach/gta02.h +++ b/arch/arm/mach-s3c2440/include/mach/gta02.h | |||
@@ -44,19 +44,19 @@ | |||
44 | #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ | 44 | #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ |
45 | #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ | 45 | #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ |
46 | 46 | ||
47 | #define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */ | 47 | #define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ |
48 | #define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2 | 48 | #define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2) |
49 | #define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */ | 49 | #define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ |
50 | #define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */ | 50 | #define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */ |
51 | #define GTA02_GPIO_nGSM_EN S3C2440_GPJ4 | 51 | #define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4) |
52 | #define GTA02_GPIO_3D_RESET S3C2440_GPJ5 | 52 | #define GTA02_GPIO_3D_RESET S3C2410_GPJ(5) |
53 | #define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */ | 53 | #define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */ |
54 | #define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7 | 54 | #define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7) |
55 | #define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8 | 55 | #define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8) |
56 | #define GTA02_GPIO_KEEPACT S3C2440_GPJ8 | 56 | #define GTA02_GPIO_KEEPACT S3C2410_GPJ(8) |
57 | #define GTA02v1_GPIO_HP_IN S3C2440_GPJ10 | 57 | #define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10) |
58 | #define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */ | 58 | #define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */ |
59 | #define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */ | 59 | #define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */ |
60 | 60 | ||
61 | #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 | 61 | #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 |
62 | #define GTA02_IRQ_MODEM IRQ_EINT1 | 62 | #define GTA02_IRQ_MODEM IRQ_EINT1 |
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index dd3782064508..fdfc4d5e37a1 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -151,6 +151,12 @@ static struct clk init_clocks_off[] = { | |||
151 | .enable = s3c64xx_pclk_ctrl, | 151 | .enable = s3c64xx_pclk_ctrl, |
152 | .ctrlbit = S3C_CLKCON_PCLK_IIC, | 152 | .ctrlbit = S3C_CLKCON_PCLK_IIC, |
153 | }, { | 153 | }, { |
154 | .name = "i2c", | ||
155 | .id = 1, | ||
156 | .parent = &clk_p, | ||
157 | .enable = s3c64xx_pclk_ctrl, | ||
158 | .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, | ||
159 | }, { | ||
154 | .name = "iis", | 160 | .name = "iis", |
155 | .id = 0, | 161 | .id = 0, |
156 | .parent = &clk_p, | 162 | .parent = &clk_p, |
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 135db1b41252..c35585cf8c4f 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c | |||
@@ -690,12 +690,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, | |||
690 | 690 | ||
691 | regptr = regs + PL080_Cx_BASE(0); | 691 | regptr = regs + PL080_Cx_BASE(0); |
692 | 692 | ||
693 | for (ch = 0; ch < 8; ch++, chno++, chptr++) { | 693 | for (ch = 0; ch < 8; ch++, chptr++) { |
694 | printk(KERN_INFO "%s: registering DMA %d (%p)\n", | 694 | pr_debug("%s: registering DMA %d (%p)\n", |
695 | __func__, chno, regptr); | 695 | __func__, chno + ch, regptr); |
696 | 696 | ||
697 | chptr->bit = 1 << ch; | 697 | chptr->bit = 1 << ch; |
698 | chptr->number = chno; | 698 | chptr->number = chno + ch; |
699 | chptr->dmac = dmac; | 699 | chptr->dmac = dmac; |
700 | chptr->regs = regptr; | 700 | chptr->regs = regptr; |
701 | regptr += PL080_Cx_STRIDE; | 701 | regptr += PL080_Cx_STRIDE; |
@@ -704,7 +704,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, | |||
704 | /* for the moment, permanently enable the controller */ | 704 | /* for the moment, permanently enable the controller */ |
705 | writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); | 705 | writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); |
706 | 706 | ||
707 | printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs); | 707 | printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n", |
708 | irq, regs, chno, chno+8); | ||
708 | 709 | ||
709 | return 0; | 710 | return 0; |
710 | 711 | ||
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index fd99a82e82c4..92b09085caaa 100644 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c | |||
@@ -72,7 +72,7 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { | |||
72 | .get_pull = s3c_gpio_getpull_updown, | 72 | .get_pull = s3c_gpio_getpull_updown, |
73 | }; | 73 | }; |
74 | 74 | ||
75 | int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) | 75 | static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) |
76 | { | 76 | { |
77 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; | 77 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; |
78 | } | 78 | } |
@@ -138,7 +138,7 @@ static struct s3c_gpio_chip gpio_4bit[] = { | |||
138 | }, | 138 | }, |
139 | }; | 139 | }; |
140 | 140 | ||
141 | int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) | 141 | static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) |
142 | { | 142 | { |
143 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; | 143 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; |
144 | } | 144 | } |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index e85192a86fbe..a80a3163dd30 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
29 | #include <linux/smsc911x.h> | 29 | #include <linux/smsc911x.h> |
30 | #include <linux/regulator/fixed.h> | 30 | #include <linux/regulator/fixed.h> |
31 | #include <linux/regulator/machine.h> | ||
31 | 32 | ||
32 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 33 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
33 | #include <linux/mfd/wm8350/core.h> | 34 | #include <linux/mfd/wm8350/core.h> |
@@ -351,7 +352,7 @@ static struct regulator_init_data smdk6410_vddpll = { | |||
351 | /* VDD_UH_MMC, LDO5 on J5 */ | 352 | /* VDD_UH_MMC, LDO5 on J5 */ |
352 | static struct regulator_init_data smdk6410_vdduh_mmc = { | 353 | static struct regulator_init_data smdk6410_vdduh_mmc = { |
353 | .constraints = { | 354 | .constraints = { |
354 | .name = "PVDD_UH/PVDD_MMC", | 355 | .name = "PVDD_UH+PVDD_MMC", |
355 | .always_on = 1, | 356 | .always_on = 1, |
356 | }, | 357 | }, |
357 | }; | 358 | }; |
@@ -417,7 +418,7 @@ static struct regulator_init_data smdk6410_vddaudio = { | |||
417 | /* S3C64xx internal logic & PLL */ | 418 | /* S3C64xx internal logic & PLL */ |
418 | static struct regulator_init_data wm8350_dcdc1_data = { | 419 | static struct regulator_init_data wm8350_dcdc1_data = { |
419 | .constraints = { | 420 | .constraints = { |
420 | .name = "PVDD_INT/PVDD_PLL", | 421 | .name = "PVDD_INT+PVDD_PLL", |
421 | .min_uV = 1200000, | 422 | .min_uV = 1200000, |
422 | .max_uV = 1200000, | 423 | .max_uV = 1200000, |
423 | .always_on = 1, | 424 | .always_on = 1, |
@@ -452,7 +453,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { | |||
452 | 453 | ||
453 | static struct regulator_init_data wm8350_dcdc4_data = { | 454 | static struct regulator_init_data wm8350_dcdc4_data = { |
454 | .constraints = { | 455 | .constraints = { |
455 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", | 456 | .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", |
456 | .min_uV = 3000000, | 457 | .min_uV = 3000000, |
457 | .max_uV = 3000000, | 458 | .max_uV = 3000000, |
458 | .always_on = 1, | 459 | .always_on = 1, |
@@ -464,7 +465,7 @@ static struct regulator_init_data wm8350_dcdc4_data = { | |||
464 | /* OTGi/1190-EV1 HPVDD & AVDD */ | 465 | /* OTGi/1190-EV1 HPVDD & AVDD */ |
465 | static struct regulator_init_data wm8350_ldo4_data = { | 466 | static struct regulator_init_data wm8350_ldo4_data = { |
466 | .constraints = { | 467 | .constraints = { |
467 | .name = "PVDD_OTGI/HPVDD/AVDD", | 468 | .name = "PVDD_OTGI+HPVDD+AVDD", |
468 | .min_uV = 1200000, | 469 | .min_uV = 1200000, |
469 | .max_uV = 1200000, | 470 | .max_uV = 1200000, |
470 | .apply_uV = 1, | 471 | .apply_uV = 1, |
@@ -552,7 +553,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = { | |||
552 | 553 | ||
553 | static struct regulator_init_data wm1192_dcdc3 = { | 554 | static struct regulator_init_data wm1192_dcdc3 = { |
554 | .constraints = { | 555 | .constraints = { |
555 | .name = "PVDD_MEM/PVDD_GPS", | 556 | .name = "PVDD_MEM+PVDD_GPS", |
556 | .always_on = 1, | 557 | .always_on = 1, |
557 | }, | 558 | }, |
558 | }; | 559 | }; |
@@ -563,7 +564,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { | |||
563 | 564 | ||
564 | static struct regulator_init_data wm1192_ldo1 = { | 565 | static struct regulator_init_data wm1192_ldo1 = { |
565 | .constraints = { | 566 | .constraints = { |
566 | .name = "PVDD_LCD/PVDD_EXT", | 567 | .name = "PVDD_LCD+PVDD_EXT", |
567 | .always_on = 1, | 568 | .always_on = 1, |
568 | }, | 569 | }, |
569 | .consumer_supplies = wm1192_ldo1_consumers, | 570 | .consumer_supplies = wm1192_ldo1_consumers, |
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index f8ed0d22db70..1d4d0ee9e870 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c | |||
@@ -17,7 +17,7 @@ | |||
17 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | 17 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) |
18 | { | 18 | { |
19 | /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ | 19 | /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ |
20 | s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); | 20 | s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3)); |
21 | 21 | ||
22 | /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ | 22 | /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ |
23 | s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); | 23 | s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); |
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c index 1a942037c4ef..f344a222bc84 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci.c | |||
@@ -56,7 +56,7 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | |||
56 | else | 56 | else |
57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | 57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); |
58 | 58 | ||
59 | printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); | 59 | pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); |
60 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | 60 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); |
61 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | 61 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); |
62 | } | 62 | } |
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S index b2ef44317368..afe5a762f46e 100644 --- a/arch/arm/mach-s3c64xx/sleep.S +++ b/arch/arm/mach-s3c64xx/sleep.S | |||
@@ -32,25 +32,13 @@ | |||
32 | * code after resume. | 32 | * code after resume. |
33 | * | 33 | * |
34 | * entry: | 34 | * entry: |
35 | * r0 = pointer to the save block | 35 | * r1 = v:p offset |
36 | */ | 36 | */ |
37 | 37 | ||
38 | ENTRY(s3c_cpu_save) | 38 | ENTRY(s3c_cpu_save) |
39 | stmfd sp!, { r4 - r12, lr } | 39 | stmfd sp!, { r4 - r12, lr } |
40 | 40 | ldr r3, =resume_with_mmu | |
41 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | 41 | bl cpu_suspend |
42 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID | ||
43 | mrc p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 | ||
44 | mrc p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 | ||
45 | mrc p15, 0, r8, c2, c0, 2 @ Translation Table Control | ||
46 | mrc p15, 0, r9, c1, c0, 0 @ Control register | ||
47 | mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register | ||
48 | mrc p15, 0, r11, c1, c0, 2 @ Co-processor access controls | ||
49 | |||
50 | stmia r0, { r4 - r13 } @ Save CP registers and SP | ||
51 | |||
52 | @@ save our state to ram | ||
53 | bl s3c_pm_cb_flushcache | ||
54 | 42 | ||
55 | @@ call final suspend code | 43 | @@ call final suspend code |
56 | ldr r0, =pm_cpu_sleep | 44 | ldr r0, =pm_cpu_sleep |
@@ -61,18 +49,6 @@ ENTRY(s3c_cpu_save) | |||
61 | resume_with_mmu: | 49 | resume_with_mmu: |
62 | ldmfd sp!, { r4 - r12, pc } @ return, from sp from s3c_cpu_save | 50 | ldmfd sp!, { r4 - r12, pc } @ return, from sp from s3c_cpu_save |
63 | 51 | ||
64 | .data | ||
65 | |||
66 | /* the next bit is code, but it requires easy access to the | ||
67 | * s3c_sleep_save_phys data before the MMU is switched on, so | ||
68 | * we store the code that needs this variable in the .data where | ||
69 | * the value can be written to (the .text segment is RO). | ||
70 | */ | ||
71 | |||
72 | .global s3c_sleep_save_phys | ||
73 | s3c_sleep_save_phys: | ||
74 | .word 0 | ||
75 | |||
76 | /* Sleep magic, the word before the resume entry point so that the | 52 | /* Sleep magic, the word before the resume entry point so that the |
77 | * bootloader can check for a resumeable image. */ | 53 | * bootloader can check for a resumeable image. */ |
78 | 54 | ||
@@ -110,35 +86,4 @@ ENTRY(s3c_cpu_resume) | |||
110 | orr r0, r0, #1 << 15 @ GPN15 | 86 | orr r0, r0, #1 << 15 @ GPN15 |
111 | str r0, [ r3, #S3C64XX_GPNDAT ] | 87 | str r0, [ r3, #S3C64XX_GPNDAT ] |
112 | #endif | 88 | #endif |
113 | 89 | b cpu_resume | |
114 | /* __v6_setup from arch/arm/mm/proc-v6.S, ensure that the caches | ||
115 | * are thoroughly cleaned just in case the bootloader didn't do it | ||
116 | * for us. */ | ||
117 | mov r0, #0 | ||
118 | mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache | ||
119 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | ||
120 | mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache | ||
121 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | ||
122 | @@mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs | ||
123 | @@mcr p15, 0, r0, c7, c7, 0 @ Invalidate I + D caches | ||
124 | |||
125 | ldr r0, s3c_sleep_save_phys | ||
126 | ldmia r0, { r4 - r13 } | ||
127 | |||
128 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
129 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID | ||
130 | mcr p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 | ||
131 | mcr p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 | ||
132 | mcr p15, 0, r8, c2, c0, 2 @ Translation Table Control | ||
133 | mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register | ||
134 | |||
135 | mov r0, #0 @ restore copro access controls | ||
136 | mcr p15, 0, r11, c1, c0, 2 @ Co-processor access controls | ||
137 | mcr p15, 0, r0, c7, c5, 4 | ||
138 | |||
139 | ldr r2, =resume_with_mmu | ||
140 | mcr p15, 0, r9, c1, c0, 0 /* turn mmu back on */ | ||
141 | nop | ||
142 | mov pc, r2 /* jump back */ | ||
143 | |||
144 | .end | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 203dd5a18bd5..058dab4482a1 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5P6442 - Memory map definitions | 6 | * S5P6442 - Memory map definitions |
@@ -16,56 +16,61 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5P6442_PA_CHIPID (0xE0000000) | 19 | #define S5P6442_PA_SDRAM 0x20000000 |
20 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
21 | 20 | ||
22 | #define S5P6442_PA_SYSCON (0xE0100000) | 21 | #define S5P6442_PA_I2S0 0xC0B00000 |
23 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | 22 | #define S5P6442_PA_I2S1 0xF2200000 |
24 | 23 | ||
25 | #define S5P6442_PA_GPIO (0xE0200000) | 24 | #define S5P6442_PA_CHIPID 0xE0000000 |
26 | 25 | ||
27 | #define S5P6442_PA_VIC0 (0xE4000000) | 26 | #define S5P6442_PA_SYSCON 0xE0100000 |
28 | #define S5P6442_PA_VIC1 (0xE4100000) | ||
29 | #define S5P6442_PA_VIC2 (0xE4200000) | ||
30 | 27 | ||
31 | #define S5P6442_PA_SROMC (0xE7000000) | 28 | #define S5P6442_PA_GPIO 0xE0200000 |
32 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
33 | 29 | ||
34 | #define S5P6442_PA_MDMA 0xE8000000 | 30 | #define S5P6442_PA_VIC0 0xE4000000 |
35 | #define S5P6442_PA_PDMA 0xE9000000 | 31 | #define S5P6442_PA_VIC1 0xE4100000 |
32 | #define S5P6442_PA_VIC2 0xE4200000 | ||
36 | 33 | ||
37 | #define S5P6442_PA_TIMER (0xEA000000) | 34 | #define S5P6442_PA_SROMC 0xE7000000 |
38 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
39 | 35 | ||
40 | #define S5P6442_PA_SYSTIMER (0xEA100000) | 36 | #define S5P6442_PA_MDMA 0xE8000000 |
37 | #define S5P6442_PA_PDMA 0xE9000000 | ||
41 | 38 | ||
42 | #define S5P6442_PA_WATCHDOG (0xEA200000) | 39 | #define S5P6442_PA_TIMER 0xEA000000 |
43 | 40 | ||
44 | #define S5P6442_PA_UART (0xEC000000) | 41 | #define S5P6442_PA_SYSTIMER 0xEA100000 |
45 | 42 | ||
46 | #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) | 43 | #define S5P6442_PA_WATCHDOG 0xEA200000 |
47 | #define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) | ||
48 | #define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) | ||
49 | #define S5P_SZ_UART SZ_256 | ||
50 | 44 | ||
51 | #define S5P6442_PA_IIC0 (0xEC100000) | 45 | #define S5P6442_PA_UART 0xEC000000 |
52 | 46 | ||
53 | #define S5P6442_PA_SDRAM (0x20000000) | 47 | #define S5P6442_PA_IIC0 0xEC100000 |
54 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
55 | 48 | ||
56 | #define S5P6442_PA_SPI 0xEC300000 | 49 | #define S5P6442_PA_SPI 0xEC300000 |
57 | 50 | ||
58 | /* I2S */ | ||
59 | #define S5P6442_PA_I2S0 0xC0B00000 | ||
60 | #define S5P6442_PA_I2S1 0xF2200000 | ||
61 | |||
62 | /* PCM */ | ||
63 | #define S5P6442_PA_PCM0 0xF2400000 | 51 | #define S5P6442_PA_PCM0 0xF2400000 |
64 | #define S5P6442_PA_PCM1 0xF2500000 | 52 | #define S5P6442_PA_PCM1 0xF2500000 |
65 | 53 | ||
66 | /* compatibiltiy defines. */ | 54 | /* Compatibiltiy Defines */ |
55 | |||
56 | #define S3C_PA_IIC S5P6442_PA_IIC0 | ||
67 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | 57 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG |
58 | |||
59 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
60 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
61 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
62 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | ||
63 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
64 | |||
65 | /* UART */ | ||
66 | |||
68 | #define S3C_PA_UART S5P6442_PA_UART | 67 | #define S3C_PA_UART S5P6442_PA_UART |
69 | #define S3C_PA_IIC S5P6442_PA_IIC0 | 68 | |
69 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
70 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
71 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
72 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
73 | |||
74 | #define S5P_SZ_UART SZ_256 | ||
70 | 75 | ||
71 | #endif /* __ASM_ARCH_MAP_H */ | 76 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h index 5486c8f01f1d..adb5f298ead8 100644 --- a/arch/arm/mach-s5p64x0/include/mach/gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #define S5P6440_GPIO_A_NR (6) | 23 | #define S5P6440_GPIO_A_NR (6) |
24 | #define S5P6440_GPIO_B_NR (7) | 24 | #define S5P6440_GPIO_B_NR (7) |
25 | #define S5P6440_GPIO_C_NR (8) | 25 | #define S5P6440_GPIO_C_NR (8) |
26 | #define S5P6440_GPIO_F_NR (2) | 26 | #define S5P6440_GPIO_F_NR (16) |
27 | #define S5P6440_GPIO_G_NR (7) | 27 | #define S5P6440_GPIO_G_NR (7) |
28 | #define S5P6440_GPIO_H_NR (10) | 28 | #define S5P6440_GPIO_H_NR (10) |
29 | #define S5P6440_GPIO_I_NR (16) | 29 | #define S5P6440_GPIO_I_NR (16) |
@@ -36,7 +36,7 @@ | |||
36 | #define S5P6450_GPIO_B_NR (7) | 36 | #define S5P6450_GPIO_B_NR (7) |
37 | #define S5P6450_GPIO_C_NR (8) | 37 | #define S5P6450_GPIO_C_NR (8) |
38 | #define S5P6450_GPIO_D_NR (8) | 38 | #define S5P6450_GPIO_D_NR (8) |
39 | #define S5P6450_GPIO_F_NR (2) | 39 | #define S5P6450_GPIO_F_NR (16) |
40 | #define S5P6450_GPIO_G_NR (14) | 40 | #define S5P6450_GPIO_G_NR (14) |
41 | #define S5P6450_GPIO_H_NR (10) | 41 | #define S5P6450_GPIO_H_NR (10) |
42 | #define S5P6450_GPIO_I_NR (16) | 42 | #define S5P6450_GPIO_I_NR (16) |
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index a9365e5ba614..95c91257c7ca 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P64X0 - Memory map definitions | 6 | * S5P64X0 - Memory map definitions |
@@ -16,64 +16,46 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5P64X0_PA_SDRAM (0x20000000) | 19 | #define S5P64X0_PA_SDRAM 0x20000000 |
20 | 20 | ||
21 | #define S5P64X0_PA_CHIPID (0xE0000000) | 21 | #define S5P64X0_PA_CHIPID 0xE0000000 |
22 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
23 | |||
24 | #define S5P64X0_PA_SYSCON (0xE0100000) | ||
25 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
26 | |||
27 | #define S5P64X0_PA_GPIO (0xE0308000) | ||
28 | |||
29 | #define S5P64X0_PA_VIC0 (0xE4000000) | ||
30 | #define S5P64X0_PA_VIC1 (0xE4100000) | ||
31 | 22 | ||
32 | #define S5P64X0_PA_SROMC (0xE7000000) | 23 | #define S5P64X0_PA_SYSCON 0xE0100000 |
33 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
34 | |||
35 | #define S5P64X0_PA_PDMA (0xE9000000) | ||
36 | |||
37 | #define S5P64X0_PA_TIMER (0xEA000000) | ||
38 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
39 | 24 | ||
40 | #define S5P64X0_PA_RTC (0xEA100000) | 25 | #define S5P64X0_PA_GPIO 0xE0308000 |
41 | 26 | ||
42 | #define S5P64X0_PA_WDT (0xEA200000) | 27 | #define S5P64X0_PA_VIC0 0xE4000000 |
28 | #define S5P64X0_PA_VIC1 0xE4100000 | ||
43 | 29 | ||
44 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | 30 | #define S5P64X0_PA_SROMC 0xE7000000 |
45 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
46 | 31 | ||
47 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | 32 | #define S5P64X0_PA_PDMA 0xE9000000 |
48 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
49 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
50 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
51 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
52 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
53 | 33 | ||
54 | #define S5P_SZ_UART SZ_256 | 34 | #define S5P64X0_PA_TIMER 0xEA000000 |
35 | #define S5P64X0_PA_RTC 0xEA100000 | ||
36 | #define S5P64X0_PA_WDT 0xEA200000 | ||
55 | 37 | ||
56 | #define S5P6440_PA_IIC0 (0xEC104000) | 38 | #define S5P6440_PA_IIC0 0xEC104000 |
57 | #define S5P6440_PA_IIC1 (0xEC20F000) | 39 | #define S5P6440_PA_IIC1 0xEC20F000 |
58 | #define S5P6450_PA_IIC0 (0xEC100000) | 40 | #define S5P6450_PA_IIC0 0xEC100000 |
59 | #define S5P6450_PA_IIC1 (0xEC200000) | 41 | #define S5P6450_PA_IIC1 0xEC200000 |
60 | 42 | ||
61 | #define S5P64X0_PA_SPI0 (0xEC400000) | 43 | #define S5P64X0_PA_SPI0 0xEC400000 |
62 | #define S5P64X0_PA_SPI1 (0xEC500000) | 44 | #define S5P64X0_PA_SPI1 0xEC500000 |
63 | 45 | ||
64 | #define S5P64X0_PA_HSOTG (0xED100000) | 46 | #define S5P64X0_PA_HSOTG 0xED100000 |
65 | 47 | ||
66 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
67 | 49 | ||
68 | #define S5P64X0_PA_I2S (0xF2000000) | 50 | #define S5P64X0_PA_I2S 0xF2000000 |
69 | #define S5P6450_PA_I2S1 0xF2800000 | 51 | #define S5P6450_PA_I2S1 0xF2800000 |
70 | #define S5P6450_PA_I2S2 0xF2900000 | 52 | #define S5P6450_PA_I2S2 0xF2900000 |
71 | 53 | ||
72 | #define S5P64X0_PA_PCM (0xF2100000) | 54 | #define S5P64X0_PA_PCM 0xF2100000 |
73 | 55 | ||
74 | #define S5P64X0_PA_ADC (0xF3000000) | 56 | #define S5P64X0_PA_ADC 0xF3000000 |
75 | 57 | ||
76 | /* compatibiltiy defines. */ | 58 | /* Compatibiltiy Defines */ |
77 | 59 | ||
78 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | 60 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) |
79 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | 61 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) |
@@ -83,6 +65,25 @@ | |||
83 | #define S3C_PA_RTC S5P64X0_PA_RTC | 65 | #define S3C_PA_RTC S5P64X0_PA_RTC |
84 | #define S3C_PA_WDT S5P64X0_PA_WDT | 66 | #define S3C_PA_WDT S5P64X0_PA_WDT |
85 | 67 | ||
68 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
69 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
70 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
71 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
72 | |||
86 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC | 73 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC |
87 | 74 | ||
75 | /* UART */ | ||
76 | |||
77 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | ||
78 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
79 | |||
80 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | ||
81 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
82 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
83 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
84 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
85 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
86 | |||
87 | #define S5P_SZ_UART SZ_256 | ||
88 | |||
88 | #endif /* __ASM_ARCH_MAP_H */ | 89 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 328467b346aa..ccbe6b767f7d 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -1,5 +1,8 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pc100/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | 6 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 7 | * Byungho Min <bhmin@samsung.com> |
5 | * | 8 | * |
@@ -16,145 +19,115 @@ | |||
16 | #include <plat/map-base.h> | 19 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 20 | #include <plat/map-s5p.h> |
18 | 21 | ||
19 | /* | 22 | #define S5PC100_PA_SDRAM 0x20000000 |
20 | * map-base.h has already defined virtual memory address | 23 | |
21 | * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) | 24 | #define S5PC100_PA_ONENAND 0xE7100000 |
22 | * S3C_VA_SYS S3C_ADDR(0x00100000) system control | 25 | #define S5PC100_PA_ONENAND_BUF 0xB0000000 |
23 | * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) | 26 | |
24 | * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block | 27 | #define S5PC100_PA_CHIPID 0xE0000000 |
25 | * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog | ||
26 | * S3C_VA_UART S3C_ADDR(0x01000000) UART | ||
27 | * | ||
28 | * S5PC100 specific virtual memory address can be defined here | ||
29 | * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO | ||
30 | * | ||
31 | */ | ||
32 | 28 | ||
33 | #define S5PC100_PA_ONENAND_BUF (0xB0000000) | 29 | #define S5PC100_PA_SYSCON 0xE0100000 |
34 | #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) | ||
35 | 30 | ||
36 | /* Chip ID */ | 31 | #define S5PC100_PA_OTHERS 0xE0200000 |
37 | 32 | ||
38 | #define S5PC100_PA_CHIPID (0xE0000000) | 33 | #define S5PC100_PA_GPIO 0xE0300000 |
39 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID | ||
40 | 34 | ||
41 | #define S5PC100_PA_SYSCON (0xE0100000) | 35 | #define S5PC100_PA_VIC0 0xE4000000 |
42 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON | 36 | #define S5PC100_PA_VIC1 0xE4100000 |
37 | #define S5PC100_PA_VIC2 0xE4200000 | ||
43 | 38 | ||
44 | #define S5PC100_PA_OTHERS (0xE0200000) | 39 | #define S5PC100_PA_SROMC 0xE7000000 |
45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) | ||
46 | 40 | ||
47 | #define S5PC100_PA_GPIO (0xE0300000) | 41 | #define S5PC100_PA_CFCON 0xE7800000 |
48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | ||
49 | 42 | ||
50 | /* Interrupt */ | 43 | #define S5PC100_PA_MDMA 0xE8100000 |
51 | #define S5PC100_PA_VIC0 (0xE4000000) | 44 | #define S5PC100_PA_PDMA0 0xE9000000 |
52 | #define S5PC100_PA_VIC1 (0xE4100000) | 45 | #define S5PC100_PA_PDMA1 0xE9200000 |
53 | #define S5PC100_PA_VIC2 (0xE4200000) | ||
54 | #define S5PC100_VA_VIC S3C_VA_IRQ | ||
55 | #define S5PC100_VA_VIC_OFFSET 0x10000 | ||
56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | ||
57 | 46 | ||
58 | #define S5PC100_PA_SROMC (0xE7000000) | 47 | #define S5PC100_PA_TIMER 0xEA000000 |
59 | #define S5P_PA_SROMC S5PC100_PA_SROMC | 48 | #define S5PC100_PA_SYSTIMER 0xEA100000 |
49 | #define S5PC100_PA_WATCHDOG 0xEA200000 | ||
50 | #define S5PC100_PA_RTC 0xEA300000 | ||
60 | 51 | ||
61 | #define S5PC100_PA_ONENAND (0xE7100000) | 52 | #define S5PC100_PA_UART 0xEC000000 |
62 | 53 | ||
63 | #define S5PC100_PA_CFCON (0xE7800000) | 54 | #define S5PC100_PA_IIC0 0xEC100000 |
55 | #define S5PC100_PA_IIC1 0xEC200000 | ||
64 | 56 | ||
65 | /* DMA */ | 57 | #define S5PC100_PA_SPI0 0xEC300000 |
66 | #define S5PC100_PA_MDMA (0xE8100000) | 58 | #define S5PC100_PA_SPI1 0xEC400000 |
67 | #define S5PC100_PA_PDMA0 (0xE9000000) | 59 | #define S5PC100_PA_SPI2 0xEC500000 |
68 | #define S5PC100_PA_PDMA1 (0xE9200000) | ||
69 | 60 | ||
70 | /* Timer */ | 61 | #define S5PC100_PA_USB_HSOTG 0xED200000 |
71 | #define S5PC100_PA_TIMER (0xEA000000) | 62 | #define S5PC100_PA_USB_HSPHY 0xED300000 |
72 | #define S5P_PA_TIMER S5PC100_PA_TIMER | ||
73 | 63 | ||
74 | #define S5PC100_PA_SYSTIMER (0xEA100000) | 64 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
75 | 65 | ||
76 | #define S5PC100_PA_WATCHDOG (0xEA200000) | 66 | #define S5PC100_PA_FB 0xEE000000 |
77 | #define S5PC100_PA_RTC (0xEA300000) | ||
78 | 67 | ||
79 | #define S5PC100_PA_UART (0xEC000000) | 68 | #define S5PC100_PA_FIMC0 0xEE200000 |
69 | #define S5PC100_PA_FIMC1 0xEE300000 | ||
70 | #define S5PC100_PA_FIMC2 0xEE400000 | ||
80 | 71 | ||
81 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) | 72 | #define S5PC100_PA_I2S0 0xF2000000 |
82 | #define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) | 73 | #define S5PC100_PA_I2S1 0xF2100000 |
83 | #define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) | 74 | #define S5PC100_PA_I2S2 0xF2200000 |
84 | #define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
85 | #define S5P_SZ_UART SZ_256 | ||
86 | 75 | ||
87 | #define S5PC100_PA_IIC0 (0xEC100000) | 76 | #define S5PC100_PA_AC97 0xF2300000 |
88 | #define S5PC100_PA_IIC1 (0xEC200000) | ||
89 | 77 | ||
90 | /* SPI */ | 78 | #define S5PC100_PA_PCM0 0xF2400000 |
91 | #define S5PC100_PA_SPI0 0xEC300000 | 79 | #define S5PC100_PA_PCM1 0xF2500000 |
92 | #define S5PC100_PA_SPI1 0xEC400000 | ||
93 | #define S5PC100_PA_SPI2 0xEC500000 | ||
94 | 80 | ||
95 | /* USB HS OTG */ | 81 | #define S5PC100_PA_SPDIF 0xF2600000 |
96 | #define S5PC100_PA_USB_HSOTG (0xED200000) | ||
97 | #define S5PC100_PA_USB_HSPHY (0xED300000) | ||
98 | 82 | ||
99 | #define S5PC100_PA_FB (0xEE000000) | 83 | #define S5PC100_PA_TSADC 0xF3000000 |
100 | 84 | ||
101 | #define S5PC100_PA_FIMC0 (0xEE200000) | 85 | #define S5PC100_PA_KEYPAD 0xF3100000 |
102 | #define S5PC100_PA_FIMC1 (0xEE300000) | ||
103 | #define S5PC100_PA_FIMC2 (0xEE400000) | ||
104 | 86 | ||
105 | #define S5PC100_PA_I2S0 (0xF2000000) | 87 | /* Compatibiltiy Defines */ |
106 | #define S5PC100_PA_I2S1 (0xF2100000) | ||
107 | #define S5PC100_PA_I2S2 (0xF2200000) | ||
108 | 88 | ||
109 | #define S5PC100_PA_AC97 0xF2300000 | 89 | #define S3C_PA_FB S5PC100_PA_FB |
90 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
91 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
92 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
93 | #define S3C_PA_IIC S5PC100_PA_IIC0 | ||
94 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 | ||
95 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
96 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
97 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
98 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
99 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
100 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
101 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
102 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | ||
110 | 103 | ||
111 | /* PCM */ | 104 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
112 | #define S5PC100_PA_PCM0 0xF2400000 | 105 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 |
113 | #define S5PC100_PA_PCM1 0xF2500000 | 106 | #define S5P_PA_FIMC1 S5PC100_PA_FIMC1 |
107 | #define S5P_PA_FIMC2 S5PC100_PA_FIMC2 | ||
108 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM | ||
109 | #define S5P_PA_SROMC S5PC100_PA_SROMC | ||
110 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON | ||
111 | #define S5P_PA_TIMER S5PC100_PA_TIMER | ||
114 | 112 | ||
115 | #define S5PC100_PA_SPDIF 0xF2600000 | 113 | #define SAMSUNG_PA_ADC S5PC100_PA_TSADC |
114 | #define SAMSUNG_PA_CFCON S5PC100_PA_CFCON | ||
115 | #define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD | ||
116 | 116 | ||
117 | #define S5PC100_PA_TSADC (0xF3000000) | 117 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
118 | 118 | ||
119 | /* KEYPAD */ | 119 | #define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M) |
120 | #define S5PC100_PA_KEYPAD (0xF3100000) | ||
121 | 120 | ||
122 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 121 | /* UART */ |
123 | 122 | ||
124 | #define S5PC100_PA_SDRAM (0x20000000) | 123 | #define S3C_PA_UART S5PC100_PA_UART |
125 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM | ||
126 | 124 | ||
127 | /* compatibiltiy defines. */ | 125 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
128 | #define S3C_PA_UART S5PC100_PA_UART | 126 | #define S5P_PA_UART0 S5P_PA_UART(0) |
129 | #define S3C_PA_IIC S5PC100_PA_IIC0 | 127 | #define S5P_PA_UART1 S5P_PA_UART(1) |
130 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 | 128 | #define S5P_PA_UART2 S5P_PA_UART(2) |
131 | #define S3C_PA_FB S5PC100_PA_FB | 129 | #define S5P_PA_UART3 S5P_PA_UART(3) |
132 | #define S3C_PA_G2D S5PC100_PA_G2D | ||
133 | #define S3C_PA_G3D S5PC100_PA_G3D | ||
134 | #define S3C_PA_JPEG S5PC100_PA_JPEG | ||
135 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | ||
136 | #define S5P_VA_VIC0 S5PC1XX_VA_VIC(0) | ||
137 | #define S5P_VA_VIC1 S5PC1XX_VA_VIC(1) | ||
138 | #define S5P_VA_VIC2 S5PC1XX_VA_VIC(2) | ||
139 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
140 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
141 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
142 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
143 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
144 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
145 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | ||
146 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
147 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
148 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
149 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | ||
150 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
151 | |||
152 | #define SAMSUNG_PA_ADC S5PC100_PA_TSADC | ||
153 | #define SAMSUNG_PA_CFCON S5PC100_PA_CFCON | ||
154 | #define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD | ||
155 | 130 | ||
156 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 | 131 | #define S5P_SZ_UART SZ_256 |
157 | #define S5P_PA_FIMC1 S5PC100_PA_FIMC1 | ||
158 | #define S5P_PA_FIMC2 S5PC100_PA_FIMC2 | ||
159 | 132 | ||
160 | #endif /* __ASM_ARCH_C100_MAP_H */ | 133 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 3611492ad681..1dd58836fd4f 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5PV210 - Memory map definitions | 6 | * S5PV210 - Memory map definitions |
@@ -16,122 +16,120 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5PV210_PA_SROM_BANK5 (0xA8000000) | 19 | #define S5PV210_PA_SDRAM 0x20000000 |
20 | 20 | ||
21 | #define S5PC110_PA_ONENAND (0xB0000000) | 21 | #define S5PV210_PA_SROM_BANK5 0xA8000000 |
22 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
23 | 22 | ||
24 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | 23 | #define S5PC110_PA_ONENAND 0xB0000000 |
25 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | 24 | #define S5PC110_PA_ONENAND_DMA 0xB0600000 |
26 | 25 | ||
27 | #define S5PV210_PA_CHIPID (0xE0000000) | 26 | #define S5PV210_PA_CHIPID 0xE0000000 |
28 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | ||
29 | 27 | ||
30 | #define S5PV210_PA_SYSCON (0xE0100000) | 28 | #define S5PV210_PA_SYSCON 0xE0100000 |
31 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
32 | 29 | ||
33 | #define S5PV210_PA_GPIO (0xE0200000) | 30 | #define S5PV210_PA_GPIO 0xE0200000 |
34 | 31 | ||
35 | /* SPI */ | 32 | #define S5PV210_PA_SPDIF 0xE1100000 |
36 | #define S5PV210_PA_SPI0 0xE1300000 | ||
37 | #define S5PV210_PA_SPI1 0xE1400000 | ||
38 | 33 | ||
39 | #define S5PV210_PA_KEYPAD (0xE1600000) | 34 | #define S5PV210_PA_SPI0 0xE1300000 |
35 | #define S5PV210_PA_SPI1 0xE1400000 | ||
40 | 36 | ||
41 | #define S5PV210_PA_IIC0 (0xE1800000) | 37 | #define S5PV210_PA_KEYPAD 0xE1600000 |
42 | #define S5PV210_PA_IIC1 (0xFAB00000) | ||
43 | #define S5PV210_PA_IIC2 (0xE1A00000) | ||
44 | 38 | ||
45 | #define S5PV210_PA_TIMER (0xE2500000) | 39 | #define S5PV210_PA_ADC 0xE1700000 |
46 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
47 | 40 | ||
48 | #define S5PV210_PA_SYSTIMER (0xE2600000) | 41 | #define S5PV210_PA_IIC0 0xE1800000 |
42 | #define S5PV210_PA_IIC1 0xFAB00000 | ||
43 | #define S5PV210_PA_IIC2 0xE1A00000 | ||
49 | 44 | ||
50 | #define S5PV210_PA_WATCHDOG (0xE2700000) | 45 | #define S5PV210_PA_AC97 0xE2200000 |
51 | 46 | ||
52 | #define S5PV210_PA_RTC (0xE2800000) | 47 | #define S5PV210_PA_PCM0 0xE2300000 |
53 | #define S5PV210_PA_UART (0xE2900000) | 48 | #define S5PV210_PA_PCM1 0xE1200000 |
49 | #define S5PV210_PA_PCM2 0xE2B00000 | ||
54 | 50 | ||
55 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 51 | #define S5PV210_PA_TIMER 0xE2500000 |
56 | #define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) | 52 | #define S5PV210_PA_SYSTIMER 0xE2600000 |
57 | #define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) | 53 | #define S5PV210_PA_WATCHDOG 0xE2700000 |
58 | #define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) | 54 | #define S5PV210_PA_RTC 0xE2800000 |
59 | 55 | ||
60 | #define S5P_SZ_UART SZ_256 | 56 | #define S5PV210_PA_UART 0xE2900000 |
61 | 57 | ||
62 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | 58 | #define S5PV210_PA_SROMC 0xE8000000 |
63 | 59 | ||
64 | #define S5PV210_PA_SROMC (0xE8000000) | 60 | #define S5PV210_PA_CFCON 0xE8200000 |
65 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
66 | 61 | ||
67 | #define S5PV210_PA_CFCON (0xE8200000) | 62 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
68 | 63 | ||
69 | #define S5PV210_PA_MDMA 0xFA200000 | 64 | #define S5PV210_PA_HSOTG 0xEC000000 |
70 | #define S5PV210_PA_PDMA0 0xE0900000 | 65 | #define S5PV210_PA_HSPHY 0xEC100000 |
71 | #define S5PV210_PA_PDMA1 0xE0A00000 | ||
72 | 66 | ||
73 | #define S5PV210_PA_FB (0xF8000000) | 67 | #define S5PV210_PA_IIS0 0xEEE30000 |
68 | #define S5PV210_PA_IIS1 0xE2100000 | ||
69 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
74 | 70 | ||
75 | #define S5PV210_PA_FIMC0 (0xFB200000) | 71 | #define S5PV210_PA_DMC0 0xF0000000 |
76 | #define S5PV210_PA_FIMC1 (0xFB300000) | 72 | #define S5PV210_PA_DMC1 0xF1400000 |
77 | #define S5PV210_PA_FIMC2 (0xFB400000) | ||
78 | 73 | ||
79 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | 74 | #define S5PV210_PA_VIC0 0xF2000000 |
75 | #define S5PV210_PA_VIC1 0xF2100000 | ||
76 | #define S5PV210_PA_VIC2 0xF2200000 | ||
77 | #define S5PV210_PA_VIC3 0xF2300000 | ||
80 | 78 | ||
81 | #define S5PV210_PA_HSOTG (0xEC000000) | 79 | #define S5PV210_PA_FB 0xF8000000 |
82 | #define S5PV210_PA_HSPHY (0xEC100000) | ||
83 | 80 | ||
84 | #define S5PV210_PA_VIC0 (0xF2000000) | 81 | #define S5PV210_PA_MDMA 0xFA200000 |
85 | #define S5PV210_PA_VIC1 (0xF2100000) | 82 | #define S5PV210_PA_PDMA0 0xE0900000 |
86 | #define S5PV210_PA_VIC2 (0xF2200000) | 83 | #define S5PV210_PA_PDMA1 0xE0A00000 |
87 | #define S5PV210_PA_VIC3 (0xF2300000) | ||
88 | 84 | ||
89 | #define S5PV210_PA_SDRAM (0x20000000) | 85 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 |
90 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
91 | 86 | ||
92 | /* S/PDIF */ | 87 | #define S5PV210_PA_FIMC0 0xFB200000 |
93 | #define S5PV210_PA_SPDIF 0xE1100000 | 88 | #define S5PV210_PA_FIMC1 0xFB300000 |
89 | #define S5PV210_PA_FIMC2 0xFB400000 | ||
94 | 90 | ||
95 | /* I2S */ | 91 | /* Compatibiltiy Defines */ |
96 | #define S5PV210_PA_IIS0 0xEEE30000 | ||
97 | #define S5PV210_PA_IIS1 0xE2100000 | ||
98 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
99 | 92 | ||
100 | /* PCM */ | 93 | #define S3C_PA_FB S5PV210_PA_FB |
101 | #define S5PV210_PA_PCM0 0xE2300000 | 94 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
102 | #define S5PV210_PA_PCM1 0xE1200000 | 95 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) |
103 | #define S5PV210_PA_PCM2 0xE2B00000 | 96 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) |
97 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
98 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
99 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
100 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
101 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
102 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
103 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
104 | 104 | ||
105 | /* AC97 */ | 105 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
106 | #define S5PV210_PA_AC97 0xE2200000 | 106 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
107 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
108 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
109 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
110 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
111 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | ||
112 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
113 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
114 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
115 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
107 | 116 | ||
108 | #define S5PV210_PA_ADC (0xE1700000) | 117 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
118 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | ||
119 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | ||
109 | 120 | ||
110 | #define S5PV210_PA_DMC0 (0xF0000000) | 121 | /* UART */ |
111 | #define S5PV210_PA_DMC1 (0xF1400000) | ||
112 | 122 | ||
113 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 | 123 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) |
114 | 124 | ||
115 | /* compatibiltiy defines. */ | 125 | #define S3C_PA_UART S5PV210_PA_UART |
116 | #define S3C_PA_UART S5PV210_PA_UART | ||
117 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | ||
118 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | ||
119 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | ||
120 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
121 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
122 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
123 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
124 | #define S3C_PA_FB S5PV210_PA_FB | ||
125 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
126 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
127 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
128 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | ||
129 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
130 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
131 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
132 | 126 | ||
133 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | 127 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
134 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | 128 | #define S5P_PA_UART0 S5P_PA_UART(0) |
135 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | 129 | #define S5P_PA_UART1 S5P_PA_UART(1) |
130 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
131 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
132 | |||
133 | #define S5P_SZ_UART SZ_256 | ||
136 | 134 | ||
137 | #endif /* __ASM_ARCH_MAP_H */ | 135 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 461aa035afc0..557add4fc56c 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -149,7 +149,7 @@ static struct regulator_init_data aquila_ldo2_data = { | |||
149 | 149 | ||
150 | static struct regulator_init_data aquila_ldo3_data = { | 150 | static struct regulator_init_data aquila_ldo3_data = { |
151 | .constraints = { | 151 | .constraints = { |
152 | .name = "VUSB/MIPI_1.1V", | 152 | .name = "VUSB+MIPI_1.1V", |
153 | .min_uV = 1100000, | 153 | .min_uV = 1100000, |
154 | .max_uV = 1100000, | 154 | .max_uV = 1100000, |
155 | .apply_uV = 1, | 155 | .apply_uV = 1, |
@@ -197,7 +197,7 @@ static struct regulator_init_data aquila_ldo7_data = { | |||
197 | 197 | ||
198 | static struct regulator_init_data aquila_ldo8_data = { | 198 | static struct regulator_init_data aquila_ldo8_data = { |
199 | .constraints = { | 199 | .constraints = { |
200 | .name = "VUSB/VADC_3.3V", | 200 | .name = "VUSB+VADC_3.3V", |
201 | .min_uV = 3300000, | 201 | .min_uV = 3300000, |
202 | .max_uV = 3300000, | 202 | .max_uV = 3300000, |
203 | .apply_uV = 1, | 203 | .apply_uV = 1, |
@@ -207,7 +207,7 @@ static struct regulator_init_data aquila_ldo8_data = { | |||
207 | 207 | ||
208 | static struct regulator_init_data aquila_ldo9_data = { | 208 | static struct regulator_init_data aquila_ldo9_data = { |
209 | .constraints = { | 209 | .constraints = { |
210 | .name = "VCC/VCAM_2.8V", | 210 | .name = "VCC+VCAM_2.8V", |
211 | .min_uV = 2800000, | 211 | .min_uV = 2800000, |
212 | .max_uV = 2800000, | 212 | .max_uV = 2800000, |
213 | .apply_uV = 1, | 213 | .apply_uV = 1, |
@@ -381,9 +381,12 @@ static struct max8998_platform_data aquila_max8998_pdata = { | |||
381 | .buck1_set1 = S5PV210_GPH0(3), | 381 | .buck1_set1 = S5PV210_GPH0(3), |
382 | .buck1_set2 = S5PV210_GPH0(4), | 382 | .buck1_set2 = S5PV210_GPH0(4), |
383 | .buck2_set3 = S5PV210_GPH0(5), | 383 | .buck2_set3 = S5PV210_GPH0(5), |
384 | .buck1_max_voltage1 = 1200000, | 384 | .buck1_voltage1 = 1200000, |
385 | .buck1_max_voltage2 = 1200000, | 385 | .buck1_voltage2 = 1200000, |
386 | .buck2_max_voltage = 1200000, | 386 | .buck1_voltage3 = 1200000, |
387 | .buck1_voltage4 = 1200000, | ||
388 | .buck2_voltage1 = 1200000, | ||
389 | .buck2_voltage2 = 1200000, | ||
387 | }; | 390 | }; |
388 | #endif | 391 | #endif |
389 | 392 | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index e22d5112fd44..056f5c769b0a 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -288,7 +288,7 @@ static struct regulator_init_data goni_ldo2_data = { | |||
288 | 288 | ||
289 | static struct regulator_init_data goni_ldo3_data = { | 289 | static struct regulator_init_data goni_ldo3_data = { |
290 | .constraints = { | 290 | .constraints = { |
291 | .name = "VUSB/MIPI_1.1V", | 291 | .name = "VUSB+MIPI_1.1V", |
292 | .min_uV = 1100000, | 292 | .min_uV = 1100000, |
293 | .max_uV = 1100000, | 293 | .max_uV = 1100000, |
294 | .apply_uV = 1, | 294 | .apply_uV = 1, |
@@ -337,7 +337,7 @@ static struct regulator_init_data goni_ldo7_data = { | |||
337 | 337 | ||
338 | static struct regulator_init_data goni_ldo8_data = { | 338 | static struct regulator_init_data goni_ldo8_data = { |
339 | .constraints = { | 339 | .constraints = { |
340 | .name = "VUSB/VADC_3.3V", | 340 | .name = "VUSB+VADC_3.3V", |
341 | .min_uV = 3300000, | 341 | .min_uV = 3300000, |
342 | .max_uV = 3300000, | 342 | .max_uV = 3300000, |
343 | .apply_uV = 1, | 343 | .apply_uV = 1, |
@@ -347,7 +347,7 @@ static struct regulator_init_data goni_ldo8_data = { | |||
347 | 347 | ||
348 | static struct regulator_init_data goni_ldo9_data = { | 348 | static struct regulator_init_data goni_ldo9_data = { |
349 | .constraints = { | 349 | .constraints = { |
350 | .name = "VCC/VCAM_2.8V", | 350 | .name = "VCC+VCAM_2.8V", |
351 | .min_uV = 2800000, | 351 | .min_uV = 2800000, |
352 | .max_uV = 2800000, | 352 | .max_uV = 2800000, |
353 | .apply_uV = 1, | 353 | .apply_uV = 1, |
@@ -521,9 +521,12 @@ static struct max8998_platform_data goni_max8998_pdata = { | |||
521 | .buck1_set1 = S5PV210_GPH0(3), | 521 | .buck1_set1 = S5PV210_GPH0(3), |
522 | .buck1_set2 = S5PV210_GPH0(4), | 522 | .buck1_set2 = S5PV210_GPH0(4), |
523 | .buck2_set3 = S5PV210_GPH0(5), | 523 | .buck2_set3 = S5PV210_GPH0(5), |
524 | .buck1_max_voltage1 = 1200000, | 524 | .buck1_voltage1 = 1200000, |
525 | .buck1_max_voltage2 = 1200000, | 525 | .buck1_voltage2 = 1200000, |
526 | .buck2_max_voltage = 1200000, | 526 | .buck1_voltage3 = 1200000, |
527 | .buck1_voltage4 = 1200000, | ||
528 | .buck2_voltage1 = 1200000, | ||
529 | .buck2_voltage2 = 1200000, | ||
527 | }; | 530 | }; |
528 | #endif | 531 | #endif |
529 | 532 | ||
diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S index d4d222b716b4..a3d649466fb1 100644 --- a/arch/arm/mach-s5pv210/sleep.S +++ b/arch/arm/mach-s5pv210/sleep.S | |||
@@ -35,50 +35,24 @@ | |||
35 | /* s3c_cpu_save | 35 | /* s3c_cpu_save |
36 | * | 36 | * |
37 | * entry: | 37 | * entry: |
38 | * r0 = save address (virtual addr of s3c_sleep_save_phys) | 38 | * r1 = v:p offset |
39 | */ | 39 | */ |
40 | 40 | ||
41 | ENTRY(s3c_cpu_save) | 41 | ENTRY(s3c_cpu_save) |
42 | 42 | ||
43 | stmfd sp!, { r3 - r12, lr } | 43 | stmfd sp!, { r3 - r12, lr } |
44 | 44 | ldr r3, =resume_with_mmu | |
45 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | 45 | bl cpu_suspend |
46 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID | ||
47 | mrc p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 | ||
48 | mrc p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 | ||
49 | mrc p15, 0, r8, c2, c0, 2 @ Translation Table Control | ||
50 | mrc p15, 0, r9, c1, c0, 0 @ Control register | ||
51 | mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register | ||
52 | mrc p15, 0, r11, c1, c0, 2 @ Co-processor access controls | ||
53 | mrc p15, 0, r12, c10, c2, 0 @ Read PRRR | ||
54 | mrc p15, 0, r3, c10, c2, 1 @ READ NMRR | ||
55 | |||
56 | stmia r0, { r3 - r13 } | ||
57 | |||
58 | bl s3c_pm_cb_flushcache | ||
59 | 46 | ||
60 | ldr r0, =pm_cpu_sleep | 47 | ldr r0, =pm_cpu_sleep |
61 | ldr r0, [ r0 ] | 48 | ldr r0, [ r0 ] |
62 | mov pc, r0 | 49 | mov pc, r0 |
63 | 50 | ||
64 | resume_with_mmu: | 51 | resume_with_mmu: |
65 | /* | ||
66 | * After MMU is turned on, restore the previous MMU table. | ||
67 | */ | ||
68 | ldr r9 , =(PAGE_OFFSET - PHYS_OFFSET) | ||
69 | add r4, r4, r9 | ||
70 | str r12, [r4] | ||
71 | |||
72 | ldmfd sp!, { r3 - r12, pc } | 52 | ldmfd sp!, { r3 - r12, pc } |
73 | 53 | ||
74 | .ltorg | 54 | .ltorg |
75 | 55 | ||
76 | .data | ||
77 | |||
78 | .global s3c_sleep_save_phys | ||
79 | s3c_sleep_save_phys: | ||
80 | .word 0 | ||
81 | |||
82 | /* sleep magic, to allow the bootloader to check for an valid | 56 | /* sleep magic, to allow the bootloader to check for an valid |
83 | * image to resume to. Must be the first word before the | 57 | * image to resume to. Must be the first word before the |
84 | * s3c_cpu_resume entry. | 58 | * s3c_cpu_resume entry. |
@@ -96,75 +70,4 @@ s3c_sleep_save_phys: | |||
96 | */ | 70 | */ |
97 | 71 | ||
98 | ENTRY(s3c_cpu_resume) | 72 | ENTRY(s3c_cpu_resume) |
99 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE | 73 | b cpu_resume |
100 | msr cpsr_c, r0 | ||
101 | |||
102 | mov r1, #0 | ||
103 | mcr p15, 0, r1, c8, c7, 0 @ invalidate TLBs | ||
104 | mcr p15, 0, r1, c7, c5, 0 @ invalidate I Cache | ||
105 | |||
106 | ldr r0, s3c_sleep_save_phys @ address of restore block | ||
107 | ldmia r0, { r3 - r13 } | ||
108 | |||
109 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
110 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID | ||
111 | |||
112 | mcr p15, 0, r8, c2, c0, 2 @ Translation Table Control | ||
113 | mcr p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 | ||
114 | mcr p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 | ||
115 | |||
116 | mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register | ||
117 | |||
118 | mov r0, #0 | ||
119 | mcr p15, 0, r0, c8, c7, 0 @ Invalidate I & D TLB | ||
120 | |||
121 | mov r0, #0 @ restore copro access | ||
122 | mcr p15, 0, r11, c1, c0, 2 @ Co-processor access | ||
123 | mcr p15, 0, r0, c7, c5, 4 | ||
124 | |||
125 | mcr p15, 0, r12, c10, c2, 0 @ write PRRR | ||
126 | mcr p15, 0, r3, c10, c2, 1 @ write NMRR | ||
127 | |||
128 | /* | ||
129 | * In Cortex-A8, when MMU is turned on, the pipeline is flushed. | ||
130 | * And there are no valid entries in the MMU table at this point. | ||
131 | * So before turning on the MMU, the MMU entry for the DRAM address | ||
132 | * range is added. After the MMU is turned on, the other entries | ||
133 | * in the MMU table will be restored. | ||
134 | */ | ||
135 | |||
136 | /* r6 = Translation Table BASE0 */ | ||
137 | mov r4, r6 | ||
138 | mov r4, r4, LSR #14 | ||
139 | mov r4, r4, LSL #14 | ||
140 | |||
141 | /* Load address for adding to MMU table list */ | ||
142 | ldr r11, =0xE010F000 @ INFORM0 reg. | ||
143 | ldr r10, [r11, #0] | ||
144 | mov r10, r10, LSR #18 | ||
145 | bic r10, r10, #0x3 | ||
146 | orr r4, r4, r10 | ||
147 | |||
148 | /* Calculate MMU table entry */ | ||
149 | mov r10, r10, LSL #18 | ||
150 | ldr r5, =0x40E | ||
151 | orr r10, r10, r5 | ||
152 | |||
153 | /* Back up originally data */ | ||
154 | ldr r12, [r4] | ||
155 | |||
156 | /* Add calculated MMU table entry into MMU table list */ | ||
157 | str r10, [r4] | ||
158 | |||
159 | ldr r2, =resume_with_mmu | ||
160 | mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc | ||
161 | |||
162 | nop | ||
163 | nop | ||
164 | nop | ||
165 | nop | ||
166 | nop @ second-to-last before mmu | ||
167 | |||
168 | mov pc, r2 @ go back to virtual address | ||
169 | |||
170 | .ltorg | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 3060f78e12ab..901657fa7a12 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5PV310 - Memory map definitions | 6 | * S5PV310 - Memory map definitions |
@@ -23,90 +23,43 @@ | |||
23 | 23 | ||
24 | #include <plat/map-s5p.h> | 24 | #include <plat/map-s5p.h> |
25 | 25 | ||
26 | #define S5PV310_PA_SYSRAM (0x02025000) | 26 | #define S5PV310_PA_SYSRAM 0x02025000 |
27 | 27 | ||
28 | #define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) | 28 | #define S5PV310_PA_I2S0 0x03830000 |
29 | 29 | #define S5PV310_PA_I2S1 0xE3100000 | |
30 | #define S5PC210_PA_ONENAND (0x0C000000) | 30 | #define S5PV310_PA_I2S2 0xE2A00000 |
31 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | ||
32 | |||
33 | #define S5PC210_PA_ONENAND_DMA (0x0C600000) | ||
34 | #define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA | ||
35 | |||
36 | #define S5PV310_PA_CHIPID (0x10000000) | ||
37 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | ||
38 | |||
39 | #define S5PV310_PA_SYSCON (0x10010000) | ||
40 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | ||
41 | 31 | ||
42 | #define S5PV310_PA_PMU (0x10020000) | 32 | #define S5PV310_PA_PCM0 0x03840000 |
33 | #define S5PV310_PA_PCM1 0x13980000 | ||
34 | #define S5PV310_PA_PCM2 0x13990000 | ||
43 | 35 | ||
44 | #define S5PV310_PA_CMU (0x10030000) | 36 | #define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) |
45 | |||
46 | #define S5PV310_PA_WATCHDOG (0x10060000) | ||
47 | #define S5PV310_PA_RTC (0x10070000) | ||
48 | |||
49 | #define S5PV310_PA_DMC0 (0x10400000) | ||
50 | |||
51 | #define S5PV310_PA_COMBINER (0x10448000) | ||
52 | |||
53 | #define S5PV310_PA_COREPERI (0x10500000) | ||
54 | #define S5PV310_PA_GIC_CPU (0x10500100) | ||
55 | #define S5PV310_PA_TWD (0x10500600) | ||
56 | #define S5PV310_PA_GIC_DIST (0x10501000) | ||
57 | #define S5PV310_PA_L2CC (0x10502000) | ||
58 | |||
59 | /* DMA */ | ||
60 | #define S5PV310_PA_MDMA 0x10810000 | ||
61 | #define S5PV310_PA_PDMA0 0x12680000 | ||
62 | #define S5PV310_PA_PDMA1 0x12690000 | ||
63 | |||
64 | #define S5PV310_PA_GPIO1 (0x11400000) | ||
65 | #define S5PV310_PA_GPIO2 (0x11000000) | ||
66 | #define S5PV310_PA_GPIO3 (0x03860000) | ||
67 | |||
68 | #define S5PV310_PA_MIPI_CSIS0 0x11880000 | ||
69 | #define S5PV310_PA_MIPI_CSIS1 0x11890000 | ||
70 | 37 | ||
71 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | 38 | #define S5PC210_PA_ONENAND 0x0C000000 |
39 | #define S5PC210_PA_ONENAND_DMA 0x0C600000 | ||
72 | 40 | ||
73 | #define S5PV310_PA_SROMC (0x12570000) | 41 | #define S5PV310_PA_CHIPID 0x10000000 |
74 | #define S5P_PA_SROMC S5PV310_PA_SROMC | ||
75 | 42 | ||
76 | /* S/PDIF */ | 43 | #define S5PV310_PA_SYSCON 0x10010000 |
77 | #define S5PV310_PA_SPDIF 0xE1100000 | 44 | #define S5PV310_PA_PMU 0x10020000 |
45 | #define S5PV310_PA_CMU 0x10030000 | ||
78 | 46 | ||
79 | /* I2S */ | 47 | #define S5PV310_PA_WATCHDOG 0x10060000 |
80 | #define S5PV310_PA_I2S0 0x03830000 | 48 | #define S5PV310_PA_RTC 0x10070000 |
81 | #define S5PV310_PA_I2S1 0xE3100000 | ||
82 | #define S5PV310_PA_I2S2 0xE2A00000 | ||
83 | 49 | ||
84 | /* PCM */ | 50 | #define S5PV310_PA_DMC0 0x10400000 |
85 | #define S5PV310_PA_PCM0 0x03840000 | ||
86 | #define S5PV310_PA_PCM1 0x13980000 | ||
87 | #define S5PV310_PA_PCM2 0x13990000 | ||
88 | 51 | ||
89 | /* AC97 */ | 52 | #define S5PV310_PA_COMBINER 0x10448000 |
90 | #define S5PV310_PA_AC97 0x139A0000 | ||
91 | 53 | ||
92 | #define S5PV310_PA_UART (0x13800000) | 54 | #define S5PV310_PA_COREPERI 0x10500000 |
55 | #define S5PV310_PA_GIC_CPU 0x10500100 | ||
56 | #define S5PV310_PA_TWD 0x10500600 | ||
57 | #define S5PV310_PA_GIC_DIST 0x10501000 | ||
58 | #define S5PV310_PA_L2CC 0x10502000 | ||
93 | 59 | ||
94 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) | 60 | #define S5PV310_PA_MDMA 0x10810000 |
95 | #define S5P_PA_UART0 S5P_PA_UART(0) | 61 | #define S5PV310_PA_PDMA0 0x12680000 |
96 | #define S5P_PA_UART1 S5P_PA_UART(1) | 62 | #define S5PV310_PA_PDMA1 0x12690000 |
97 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
98 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
99 | #define S5P_PA_UART4 S5P_PA_UART(4) | ||
100 | |||
101 | #define S5P_SZ_UART SZ_256 | ||
102 | |||
103 | #define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) | ||
104 | |||
105 | #define S5PV310_PA_TIMER (0x139D0000) | ||
106 | #define S5P_PA_TIMER S5PV310_PA_TIMER | ||
107 | |||
108 | #define S5PV310_PA_SDRAM (0x40000000) | ||
109 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | ||
110 | 63 | ||
111 | #define S5PV310_PA_SYSMMU_MDMA 0x10A40000 | 64 | #define S5PV310_PA_SYSMMU_MDMA 0x10A40000 |
112 | #define S5PV310_PA_SYSMMU_SSS 0x10A50000 | 65 | #define S5PV310_PA_SYSMMU_SSS 0x10A50000 |
@@ -125,8 +78,31 @@ | |||
125 | #define S5PV310_PA_SYSMMU_MFC_L 0x13620000 | 78 | #define S5PV310_PA_SYSMMU_MFC_L 0x13620000 |
126 | #define S5PV310_PA_SYSMMU_MFC_R 0x13630000 | 79 | #define S5PV310_PA_SYSMMU_MFC_R 0x13630000 |
127 | 80 | ||
128 | /* compatibiltiy defines. */ | 81 | #define S5PV310_PA_GPIO1 0x11400000 |
129 | #define S3C_PA_UART S5PV310_PA_UART | 82 | #define S5PV310_PA_GPIO2 0x11000000 |
83 | #define S5PV310_PA_GPIO3 0x03860000 | ||
84 | |||
85 | #define S5PV310_PA_MIPI_CSIS0 0x11880000 | ||
86 | #define S5PV310_PA_MIPI_CSIS1 0x11890000 | ||
87 | |||
88 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | ||
89 | |||
90 | #define S5PV310_PA_SROMC 0x12570000 | ||
91 | |||
92 | #define S5PV310_PA_UART 0x13800000 | ||
93 | |||
94 | #define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) | ||
95 | |||
96 | #define S5PV310_PA_AC97 0x139A0000 | ||
97 | |||
98 | #define S5PV310_PA_TIMER 0x139D0000 | ||
99 | |||
100 | #define S5PV310_PA_SDRAM 0x40000000 | ||
101 | |||
102 | #define S5PV310_PA_SPDIF 0xE1100000 | ||
103 | |||
104 | /* Compatibiltiy Defines */ | ||
105 | |||
130 | #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) | 106 | #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) |
131 | #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) | 107 | #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) |
132 | #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) | 108 | #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) |
@@ -141,7 +117,28 @@ | |||
141 | #define S3C_PA_IIC7 S5PV310_PA_IIC(7) | 117 | #define S3C_PA_IIC7 S5PV310_PA_IIC(7) |
142 | #define S3C_PA_RTC S5PV310_PA_RTC | 118 | #define S3C_PA_RTC S5PV310_PA_RTC |
143 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG | 119 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG |
120 | |||
121 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | ||
144 | #define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 | 122 | #define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 |
145 | #define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 | 123 | #define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 |
124 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | ||
125 | #define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA | ||
126 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | ||
127 | #define S5P_PA_SROMC S5PV310_PA_SROMC | ||
128 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | ||
129 | #define S5P_PA_TIMER S5PV310_PA_TIMER | ||
130 | |||
131 | /* UART */ | ||
132 | |||
133 | #define S3C_PA_UART S5PV310_PA_UART | ||
134 | |||
135 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
136 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
137 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
138 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
139 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
140 | #define S5P_PA_UART4 S5P_PA_UART(4) | ||
141 | |||
142 | #define S5P_SZ_UART SZ_256 | ||
146 | 143 | ||
147 | #endif /* __ASM_ARCH_MAP_H */ | 144 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c index ab9fc4470d36..c4661aab22fb 100644 --- a/arch/arm/mach-sa1100/pm.c +++ b/arch/arm/mach-sa1100/pm.c | |||
@@ -32,8 +32,7 @@ | |||
32 | #include <asm/system.h> | 32 | #include <asm/system.h> |
33 | #include <asm/mach/time.h> | 33 | #include <asm/mach/time.h> |
34 | 34 | ||
35 | extern void sa1100_cpu_suspend(void); | 35 | extern void sa1100_cpu_suspend(long); |
36 | extern void sa1100_cpu_resume(void); | ||
37 | 36 | ||
38 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x | 37 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x |
39 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] | 38 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] |
@@ -73,10 +72,10 @@ static int sa11x0_pm_enter(suspend_state_t state) | |||
73 | RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR; | 72 | RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR; |
74 | 73 | ||
75 | /* set resume return address */ | 74 | /* set resume return address */ |
76 | PSPR = virt_to_phys(sa1100_cpu_resume); | 75 | PSPR = virt_to_phys(cpu_resume); |
77 | 76 | ||
78 | /* go zzz */ | 77 | /* go zzz */ |
79 | sa1100_cpu_suspend(); | 78 | sa1100_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET); |
80 | 79 | ||
81 | cpu_init(); | 80 | cpu_init(); |
82 | 81 | ||
@@ -115,11 +114,6 @@ static int sa11x0_pm_enter(suspend_state_t state) | |||
115 | return 0; | 114 | return 0; |
116 | } | 115 | } |
117 | 116 | ||
118 | unsigned long sleep_phys_sp(void *sp) | ||
119 | { | ||
120 | return virt_to_phys(sp); | ||
121 | } | ||
122 | |||
123 | static const struct platform_suspend_ops sa11x0_pm_ops = { | 117 | static const struct platform_suspend_ops sa11x0_pm_ops = { |
124 | .enter = sa11x0_pm_enter, | 118 | .enter = sa11x0_pm_enter, |
125 | .valid = suspend_valid_only_mem, | 119 | .valid = suspend_valid_only_mem, |
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 80f31bad707c..04f2a618d4ef 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S | |||
@@ -20,12 +20,7 @@ | |||
20 | #include <asm/assembler.h> | 20 | #include <asm/assembler.h> |
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | 22 | ||
23 | |||
24 | |||
25 | .text | 23 | .text |
26 | |||
27 | |||
28 | |||
29 | /* | 24 | /* |
30 | * sa1100_cpu_suspend() | 25 | * sa1100_cpu_suspend() |
31 | * | 26 | * |
@@ -34,27 +29,10 @@ | |||
34 | */ | 29 | */ |
35 | 30 | ||
36 | ENTRY(sa1100_cpu_suspend) | 31 | ENTRY(sa1100_cpu_suspend) |
37 | |||
38 | stmfd sp!, {r4 - r12, lr} @ save registers on stack | 32 | stmfd sp!, {r4 - r12, lr} @ save registers on stack |
39 | 33 | mov r1, r0 | |
40 | @ get coprocessor registers | 34 | ldr r3, =sa1100_cpu_resume @ return function |
41 | mrc p15, 0, r4, c3, c0, 0 @ domain ID | 35 | bl cpu_suspend |
42 | mrc p15, 0, r5, c2, c0, 0 @ translation table base addr | ||
43 | mrc p15, 0, r6, c13, c0, 0 @ PID | ||
44 | mrc p15, 0, r7, c1, c0, 0 @ control reg | ||
45 | |||
46 | @ store them plus current virtual stack ptr on stack | ||
47 | mov r8, sp | ||
48 | stmfd sp!, {r4 - r8} | ||
49 | |||
50 | @ preserve phys address of stack | ||
51 | mov r0, sp | ||
52 | bl sleep_phys_sp | ||
53 | ldr r1, =sleep_save_sp | ||
54 | str r0, [r1] | ||
55 | |||
56 | @ clean data cache and invalidate WB | ||
57 | bl v4wb_flush_kern_cache_all | ||
58 | 36 | ||
59 | @ disable clock switching | 37 | @ disable clock switching |
60 | mcr p15, 0, r1, c15, c2, 2 | 38 | mcr p15, 0, r1, c15, c2, 2 |
@@ -166,50 +144,8 @@ sa1110_sdram_controller_fix: | |||
166 | * cpu_sa1100_resume() | 144 | * cpu_sa1100_resume() |
167 | * | 145 | * |
168 | * entry point from bootloader into kernel during resume | 146 | * entry point from bootloader into kernel during resume |
169 | * | ||
170 | * Note: Yes, part of the following code is located into the .data section. | ||
171 | * This is to allow sleep_save_sp to be accessed with a relative load | ||
172 | * while we can't rely on any MMU translation. We could have put | ||
173 | * sleep_save_sp in the .text section as well, but some setups might | ||
174 | * insist on it to be truly read-only. | ||
175 | */ | 147 | */ |
176 | |||
177 | .data | ||
178 | .align 5 | ||
179 | ENTRY(sa1100_cpu_resume) | ||
180 | mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE | ||
181 | msr cpsr_c, r0 @ set SVC, irqs off | ||
182 | |||
183 | ldr r0, sleep_save_sp @ stack phys addr | ||
184 | ldr r2, =resume_after_mmu @ its absolute virtual address | ||
185 | ldmfd r0, {r4 - r7, sp} @ CP regs + virt stack ptr | ||
186 | |||
187 | mov r1, #0 | ||
188 | mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs | ||
189 | mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache | ||
190 | mcr p15, 0, r1, c9, c0, 0 @ invalidate RB | ||
191 | mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB | ||
192 | |||
193 | mcr p15, 0, r4, c3, c0, 0 @ domain ID | ||
194 | mcr p15, 0, r5, c2, c0, 0 @ translation table base addr | ||
195 | mcr p15, 0, r6, c13, c0, 0 @ PID | ||
196 | b resume_turn_on_mmu @ cache align execution | ||
197 | |||
198 | .align 5 | 148 | .align 5 |
199 | resume_turn_on_mmu: | 149 | sa1100_cpu_resume: |
200 | mcr p15, 0, r7, c1, c0, 0 @ turn on MMU, caches, etc. | ||
201 | nop | ||
202 | mov pc, r2 @ jump to virtual addr | ||
203 | nop | ||
204 | nop | ||
205 | nop | ||
206 | |||
207 | sleep_save_sp: | ||
208 | .word 0 @ preserve stack phys ptr here | ||
209 | |||
210 | .text | ||
211 | resume_after_mmu: | ||
212 | mcr p15, 0, r1, c15, c1, 2 @ enable clock switching | 150 | mcr p15, 0, r1, c15, c1, 2 @ enable clock switching |
213 | ldmfd sp!, {r4 - r12, pc} @ return to caller | 151 | ldmfd sp!, {r4 - r12, pc} @ return to caller |
214 | |||
215 | |||
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 2123b96b5638..4303a86e6e38 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -454,6 +454,7 @@ static void __init ag5evm_init(void) | |||
454 | gpio_direction_output(GPIO_PORT217, 0); | 454 | gpio_direction_output(GPIO_PORT217, 0); |
455 | mdelay(1); | 455 | mdelay(1); |
456 | gpio_set_value(GPIO_PORT217, 1); | 456 | gpio_set_value(GPIO_PORT217, 1); |
457 | mdelay(100); | ||
457 | 458 | ||
458 | /* LCD backlight controller */ | 459 | /* LCD backlight controller */ |
459 | gpio_request(GPIO_PORT235, NULL); /* RESET */ | 460 | gpio_request(GPIO_PORT235, NULL); /* RESET */ |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 3cf0951caa2d..81d6536552a9 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void) | |||
1303 | 1303 | ||
1304 | lcdc_info.clock_source = LCDC_CLK_BUS; | 1304 | lcdc_info.clock_source = LCDC_CLK_BUS; |
1305 | lcdc_info.ch[0].interface_type = RGB18; | 1305 | lcdc_info.ch[0].interface_type = RGB18; |
1306 | lcdc_info.ch[0].clock_divider = 2; | 1306 | lcdc_info.ch[0].clock_divider = 3; |
1307 | lcdc_info.ch[0].flags = 0; | 1307 | lcdc_info.ch[0].flags = 0; |
1308 | lcdc_info.ch[0].lcd_size_cfg.width = 152; | 1308 | lcdc_info.ch[0].lcd_size_cfg.width = 152; |
1309 | lcdc_info.ch[0].lcd_size_cfg.height = 91; | 1309 | lcdc_info.ch[0].lcd_size_cfg.height = 91; |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index fb4213a4e15a..1657eac5dde2 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = { | |||
303 | .lcd_cfg = mackerel_lcdc_modes, | 303 | .lcd_cfg = mackerel_lcdc_modes, |
304 | .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), | 304 | .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), |
305 | .interface_type = RGB24, | 305 | .interface_type = RGB24, |
306 | .clock_divider = 2, | 306 | .clock_divider = 3, |
307 | .flags = 0, | 307 | .flags = 0, |
308 | .lcd_size_cfg.width = 152, | 308 | .lcd_size_cfg.width = 152, |
309 | .lcd_size_cfg.height = 91, | 309 | .lcd_size_cfg.height = 91, |
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index ddd4a1b775f0..7e58904c1c8c 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c | |||
@@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
263 | }; | 263 | }; |
264 | 264 | ||
265 | enum { MSTP001, | 265 | enum { MSTP001, |
266 | MSTP125, MSTP118, MSTP116, MSTP100, | 266 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, |
267 | MSTP219, | 267 | MSTP219, |
268 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | 268 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, |
269 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, | 269 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, |
@@ -275,6 +275,10 @@ enum { MSTP001, | |||
275 | 275 | ||
276 | static struct clk mstp_clks[MSTP_NR] = { | 276 | static struct clk mstp_clks[MSTP_NR] = { |
277 | [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ | 277 | [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ |
278 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */ | ||
279 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */ | ||
280 | [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */ | ||
281 | [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */ | ||
278 | [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ | 282 | [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ |
279 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ | 283 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ |
280 | [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ | 284 | [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ |
@@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = { | |||
306 | CLKDEV_CON_ID("r_clk", &r_clk), | 310 | CLKDEV_CON_ID("r_clk", &r_clk), |
307 | 311 | ||
308 | /* DIV6 clocks */ | 312 | /* DIV6 clocks */ |
313 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
314 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
315 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
309 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), | 316 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), |
310 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), | 317 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), |
311 | CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), | 318 | CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), |
@@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = { | |||
313 | 320 | ||
314 | /* MSTP32 clocks */ | 321 | /* MSTP32 clocks */ |
315 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ | 322 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ |
316 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | 323 | CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ |
324 | CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ | ||
325 | CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ | ||
326 | CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */ | ||
317 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ | 327 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ |
318 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ | 328 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ |
319 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ | ||
320 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ | 329 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ |
330 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ | ||
331 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | ||
321 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ | 332 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ |
322 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | 333 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ |
323 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ | 334 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ |
diff --git a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt index efd3687ba190..3029aba38688 100644 --- a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt +++ b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt | |||
@@ -6,13 +6,10 @@ LIST "RWT Setting" | |||
6 | EW 0xE6020004, 0xA500 | 6 | EW 0xE6020004, 0xA500 |
7 | EW 0xE6030004, 0xA500 | 7 | EW 0xE6030004, 0xA500 |
8 | 8 | ||
9 | DD 0x01001000, 0x01001000 | ||
10 | |||
11 | LIST "GPIO Setting" | 9 | LIST "GPIO Setting" |
12 | EB 0xE6051013, 0xA2 | 10 | EB 0xE6051013, 0xA2 |
13 | 11 | ||
14 | LIST "CPG" | 12 | LIST "CPG" |
15 | ED 0xE6150080, 0x00000180 | ||
16 | ED 0xE61500C0, 0x00000002 | 13 | ED 0xE61500C0, 0x00000002 |
17 | 14 | ||
18 | WAIT 1, 0xFE40009C | 15 | WAIT 1, 0xFE40009C |
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 | |||
37 | 34 | ||
38 | WAIT 1, 0xFE40009C | 35 | WAIT 1, 0xFE40009C |
39 | 36 | ||
37 | LIST "SUB/USBClk" | ||
38 | ED 0xE6150080, 0x00000180 | ||
39 | |||
40 | LIST "BSC" | 40 | LIST "BSC" |
41 | ED 0xFEC10000, 0x00E0001B | 41 | ED 0xFEC10000, 0x00E0001B |
42 | 42 | ||
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 | |||
53 | ED 0xFE40004C, 0x00110209 | 53 | ED 0xFE40004C, 0x00110209 |
54 | ED 0xFE400010, 0x00000087 | 54 | ED 0xFE400010, 0x00000087 |
55 | 55 | ||
56 | WAIT 10, 0xFE40009C | 56 | WAIT 30, 0xFE40009C |
57 | 57 | ||
58 | ED 0xFE400084, 0x0000003F | 58 | ED 0xFE400084, 0x0000003F |
59 | EB 0xFE500000, 0x00 | 59 | EB 0xFE500000, 0x00 |
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 | |||
84 | 84 | ||
85 | WAIT 1, 0xFE40009C | 85 | WAIT 1, 0xFE40009C |
86 | 86 | ||
87 | ED 0xE6150354, 0x00000002 | 87 | ED 0xFE400354, 0x01AD8002 |
88 | 88 | ||
89 | LIST "SCIF0 - Serial port for earlyprintk" | 89 | LIST "SCIF0 - Serial port for earlyprintk" |
90 | EB 0xE6053098, 0x11 | 90 | EB 0xE6053098, 0x11 |
diff --git a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt index efd3687ba190..3029aba38688 100644 --- a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt +++ b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt | |||
@@ -6,13 +6,10 @@ LIST "RWT Setting" | |||
6 | EW 0xE6020004, 0xA500 | 6 | EW 0xE6020004, 0xA500 |
7 | EW 0xE6030004, 0xA500 | 7 | EW 0xE6030004, 0xA500 |
8 | 8 | ||
9 | DD 0x01001000, 0x01001000 | ||
10 | |||
11 | LIST "GPIO Setting" | 9 | LIST "GPIO Setting" |
12 | EB 0xE6051013, 0xA2 | 10 | EB 0xE6051013, 0xA2 |
13 | 11 | ||
14 | LIST "CPG" | 12 | LIST "CPG" |
15 | ED 0xE6150080, 0x00000180 | ||
16 | ED 0xE61500C0, 0x00000002 | 13 | ED 0xE61500C0, 0x00000002 |
17 | 14 | ||
18 | WAIT 1, 0xFE40009C | 15 | WAIT 1, 0xFE40009C |
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 | |||
37 | 34 | ||
38 | WAIT 1, 0xFE40009C | 35 | WAIT 1, 0xFE40009C |
39 | 36 | ||
37 | LIST "SUB/USBClk" | ||
38 | ED 0xE6150080, 0x00000180 | ||
39 | |||
40 | LIST "BSC" | 40 | LIST "BSC" |
41 | ED 0xFEC10000, 0x00E0001B | 41 | ED 0xFEC10000, 0x00E0001B |
42 | 42 | ||
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 | |||
53 | ED 0xFE40004C, 0x00110209 | 53 | ED 0xFE40004C, 0x00110209 |
54 | ED 0xFE400010, 0x00000087 | 54 | ED 0xFE400010, 0x00000087 |
55 | 55 | ||
56 | WAIT 10, 0xFE40009C | 56 | WAIT 30, 0xFE40009C |
57 | 57 | ||
58 | ED 0xFE400084, 0x0000003F | 58 | ED 0xFE400084, 0x0000003F |
59 | EB 0xFE500000, 0x00 | 59 | EB 0xFE500000, 0x00 |
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 | |||
84 | 84 | ||
85 | WAIT 1, 0xFE40009C | 85 | WAIT 1, 0xFE40009C |
86 | 86 | ||
87 | ED 0xE6150354, 0x00000002 | 87 | ED 0xFE400354, 0x01AD8002 |
88 | 88 | ||
89 | LIST "SCIF0 - Serial port for earlyprintk" | 89 | LIST "SCIF0 - Serial port for earlyprintk" |
90 | EB 0xE6053098, 0x11 | 90 | EB 0xE6053098, 0x11 |
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h b/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h new file mode 100644 index 000000000000..a8d02be8d2b6 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h | |||
@@ -0,0 +1,29 @@ | |||
1 | #ifndef MMCIF_AP4EB_H | ||
2 | #define MMCIF_AP4EB_H | ||
3 | |||
4 | #define PORT185CR (void __iomem *)0xe60520b9 | ||
5 | #define PORT186CR (void __iomem *)0xe60520ba | ||
6 | #define PORT187CR (void __iomem *)0xe60520bb | ||
7 | #define PORT188CR (void __iomem *)0xe60520bc | ||
8 | |||
9 | #define PORTR191_160DR (void __iomem *)0xe6056014 | ||
10 | |||
11 | static inline void mmcif_init_progress(void) | ||
12 | { | ||
13 | /* Initialise LEDS1-4 | ||
14 | * registers: PORT185CR-PORT188CR (LED1-LED4 Control) | ||
15 | * value: 0x10 - enable output | ||
16 | */ | ||
17 | __raw_writeb(0x10, PORT185CR); | ||
18 | __raw_writeb(0x10, PORT186CR); | ||
19 | __raw_writeb(0x10, PORT187CR); | ||
20 | __raw_writeb(0x10, PORT188CR); | ||
21 | } | ||
22 | |||
23 | static inline void mmcif_update_progress(int n) | ||
24 | { | ||
25 | __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) | | ||
26 | (1 << (25 + n)), PORTR191_160DR); | ||
27 | } | ||
28 | |||
29 | #endif /* MMCIF_AP4EB_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h b/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h new file mode 100644 index 000000000000..4b4f6949a868 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h | |||
@@ -0,0 +1,39 @@ | |||
1 | #ifndef MMCIF_MACKEREL_H | ||
2 | #define MMCIF_MACKEREL_H | ||
3 | |||
4 | #define PORT0CR (void __iomem *)0xe6051000 | ||
5 | #define PORT1CR (void __iomem *)0xe6051001 | ||
6 | #define PORT2CR (void __iomem *)0xe6051002 | ||
7 | #define PORT159CR (void __iomem *)0xe605009f | ||
8 | |||
9 | #define PORTR031_000DR (void __iomem *)0xe6055000 | ||
10 | #define PORTL159_128DR (void __iomem *)0xe6054010 | ||
11 | |||
12 | static inline void mmcif_init_progress(void) | ||
13 | { | ||
14 | /* Initialise LEDS0-3 | ||
15 | * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control) | ||
16 | * value: 0x10 - enable output | ||
17 | */ | ||
18 | __raw_writeb(0x10, PORT0CR); | ||
19 | __raw_writeb(0x10, PORT1CR); | ||
20 | __raw_writeb(0x10, PORT2CR); | ||
21 | __raw_writeb(0x10, PORT159CR); | ||
22 | } | ||
23 | |||
24 | static inline void mmcif_update_progress(int n) | ||
25 | { | ||
26 | unsigned a = 0, b = 0; | ||
27 | |||
28 | if (n < 3) | ||
29 | a = 1 << n; | ||
30 | else | ||
31 | b = 1 << 31; | ||
32 | |||
33 | __raw_writel((__raw_readl(PORTR031_000DR) & ~0x7) | a, | ||
34 | PORTR031_000DR); | ||
35 | __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b, | ||
36 | PORTL159_128DR); | ||
37 | } | ||
38 | |||
39 | #endif /* MMCIF_MACKEREL_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif.h b/arch/arm/mach-shmobile/include/mach/mmcif.h new file mode 100644 index 000000000000..f4dc3279cf03 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/mmcif.h | |||
@@ -0,0 +1,18 @@ | |||
1 | #ifndef MMCIF_H | ||
2 | #define MMCIF_H | ||
3 | |||
4 | /************************************************** | ||
5 | * | ||
6 | * board specific settings | ||
7 | * | ||
8 | **************************************************/ | ||
9 | |||
10 | #ifdef CONFIG_MACH_AP4EVB | ||
11 | #include "mach/mmcif-ap4eb.h" | ||
12 | #elif CONFIG_MACH_MACKEREL | ||
13 | #include "mach/mmcif-mackerel.h" | ||
14 | #else | ||
15 | #error "unsupported board." | ||
16 | #endif | ||
17 | |||
18 | #endif /* MMCIF_H */ | ||
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index 18febf92f20a..98bc7edc95a6 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c | |||
@@ -13,8 +13,8 @@ | |||
13 | 13 | ||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <mach/misc_regs.h> | ||
17 | #include <plat/clock.h> | 16 | #include <plat/clock.h> |
17 | #include <mach/misc_regs.h> | ||
18 | 18 | ||
19 | /* root clks */ | 19 | /* root clks */ |
20 | /* 32 KHz oscillator clock */ | 20 | /* 32 KHz oscillator clock */ |
@@ -39,18 +39,43 @@ static struct clk rtc_clk = { | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* clock derived from 24 MHz osc clk */ | 41 | /* clock derived from 24 MHz osc clk */ |
42 | /* pll masks structure */ | ||
43 | static struct pll_clk_masks pll1_masks = { | ||
44 | .mode_mask = PLL_MODE_MASK, | ||
45 | .mode_shift = PLL_MODE_SHIFT, | ||
46 | .norm_fdbk_m_mask = PLL_NORM_FDBK_M_MASK, | ||
47 | .norm_fdbk_m_shift = PLL_NORM_FDBK_M_SHIFT, | ||
48 | .dith_fdbk_m_mask = PLL_DITH_FDBK_M_MASK, | ||
49 | .dith_fdbk_m_shift = PLL_DITH_FDBK_M_SHIFT, | ||
50 | .div_p_mask = PLL_DIV_P_MASK, | ||
51 | .div_p_shift = PLL_DIV_P_SHIFT, | ||
52 | .div_n_mask = PLL_DIV_N_MASK, | ||
53 | .div_n_shift = PLL_DIV_N_SHIFT, | ||
54 | }; | ||
55 | |||
42 | /* pll1 configuration structure */ | 56 | /* pll1 configuration structure */ |
43 | static struct pll_clk_config pll1_config = { | 57 | static struct pll_clk_config pll1_config = { |
44 | .mode_reg = PLL1_CTR, | 58 | .mode_reg = PLL1_CTR, |
45 | .cfg_reg = PLL1_FRQ, | 59 | .cfg_reg = PLL1_FRQ, |
60 | .masks = &pll1_masks, | ||
61 | }; | ||
62 | |||
63 | /* pll rate configuration table, in ascending order of rates */ | ||
64 | struct pll_rate_tbl pll_rtbl[] = { | ||
65 | {.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */ | ||
66 | {.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */ | ||
46 | }; | 67 | }; |
47 | 68 | ||
48 | /* PLL1 clock */ | 69 | /* PLL1 clock */ |
49 | static struct clk pll1_clk = { | 70 | static struct clk pll1_clk = { |
71 | .flags = ENABLED_ON_INIT, | ||
50 | .pclk = &osc_24m_clk, | 72 | .pclk = &osc_24m_clk, |
51 | .en_reg = PLL1_CTR, | 73 | .en_reg = PLL1_CTR, |
52 | .en_reg_bit = PLL_ENABLE, | 74 | .en_reg_bit = PLL_ENABLE, |
53 | .recalc = &pll1_clk_recalc, | 75 | .calc_rate = &pll_calc_rate, |
76 | .recalc = &pll_clk_recalc, | ||
77 | .set_rate = &pll_clk_set_rate, | ||
78 | .rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1}, | ||
54 | .private_data = &pll1_config, | 79 | .private_data = &pll1_config, |
55 | }; | 80 | }; |
56 | 81 | ||
@@ -76,36 +101,83 @@ static struct clk cpu_clk = { | |||
76 | .recalc = &follow_parent, | 101 | .recalc = &follow_parent, |
77 | }; | 102 | }; |
78 | 103 | ||
104 | /* ahb masks structure */ | ||
105 | static struct bus_clk_masks ahb_masks = { | ||
106 | .mask = PLL_HCLK_RATIO_MASK, | ||
107 | .shift = PLL_HCLK_RATIO_SHIFT, | ||
108 | }; | ||
109 | |||
79 | /* ahb configuration structure */ | 110 | /* ahb configuration structure */ |
80 | static struct bus_clk_config ahb_config = { | 111 | static struct bus_clk_config ahb_config = { |
81 | .reg = CORE_CLK_CFG, | 112 | .reg = CORE_CLK_CFG, |
82 | .mask = PLL_HCLK_RATIO_MASK, | 113 | .masks = &ahb_masks, |
83 | .shift = PLL_HCLK_RATIO_SHIFT, | 114 | }; |
115 | |||
116 | /* ahb rate configuration table, in ascending order of rates */ | ||
117 | struct bus_rate_tbl bus_rtbl[] = { | ||
118 | {.div = 3}, /* == parent divided by 4 */ | ||
119 | {.div = 2}, /* == parent divided by 3 */ | ||
120 | {.div = 1}, /* == parent divided by 2 */ | ||
121 | {.div = 0}, /* == parent divided by 1 */ | ||
84 | }; | 122 | }; |
85 | 123 | ||
86 | /* ahb clock */ | 124 | /* ahb clock */ |
87 | static struct clk ahb_clk = { | 125 | static struct clk ahb_clk = { |
88 | .flags = ALWAYS_ENABLED, | 126 | .flags = ALWAYS_ENABLED, |
89 | .pclk = &pll1_clk, | 127 | .pclk = &pll1_clk, |
128 | .calc_rate = &bus_calc_rate, | ||
90 | .recalc = &bus_clk_recalc, | 129 | .recalc = &bus_clk_recalc, |
130 | .set_rate = &bus_clk_set_rate, | ||
131 | .rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2}, | ||
91 | .private_data = &ahb_config, | 132 | .private_data = &ahb_config, |
92 | }; | 133 | }; |
93 | 134 | ||
94 | /* uart configurations */ | 135 | /* auxiliary synthesizers masks */ |
95 | static struct aux_clk_config uart_config = { | 136 | static struct aux_clk_masks aux_masks = { |
137 | .eq_sel_mask = AUX_EQ_SEL_MASK, | ||
138 | .eq_sel_shift = AUX_EQ_SEL_SHIFT, | ||
139 | .eq1_mask = AUX_EQ1_SEL, | ||
140 | .eq2_mask = AUX_EQ2_SEL, | ||
141 | .xscale_sel_mask = AUX_XSCALE_MASK, | ||
142 | .xscale_sel_shift = AUX_XSCALE_SHIFT, | ||
143 | .yscale_sel_mask = AUX_YSCALE_MASK, | ||
144 | .yscale_sel_shift = AUX_YSCALE_SHIFT, | ||
145 | }; | ||
146 | |||
147 | /* uart synth configurations */ | ||
148 | static struct aux_clk_config uart_synth_config = { | ||
96 | .synth_reg = UART_CLK_SYNT, | 149 | .synth_reg = UART_CLK_SYNT, |
150 | .masks = &aux_masks, | ||
151 | }; | ||
152 | |||
153 | /* aux rate configuration table, in ascending order of rates */ | ||
154 | struct aux_rate_tbl aux_rtbl[] = { | ||
155 | /* For PLL1 = 332 MHz */ | ||
156 | {.xscale = 1, .yscale = 8, .eq = 1}, /* 41.5 MHz */ | ||
157 | {.xscale = 1, .yscale = 4, .eq = 1}, /* 83 MHz */ | ||
158 | {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ | ||
159 | }; | ||
160 | |||
161 | /* uart synth clock */ | ||
162 | static struct clk uart_synth_clk = { | ||
163 | .en_reg = UART_CLK_SYNT, | ||
164 | .en_reg_bit = AUX_SYNT_ENB, | ||
165 | .pclk = &pll1_clk, | ||
166 | .calc_rate = &aux_calc_rate, | ||
167 | .recalc = &aux_clk_recalc, | ||
168 | .set_rate = &aux_clk_set_rate, | ||
169 | .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1}, | ||
170 | .private_data = &uart_synth_config, | ||
97 | }; | 171 | }; |
98 | 172 | ||
99 | /* uart parents */ | 173 | /* uart parents */ |
100 | static struct pclk_info uart_pclk_info[] = { | 174 | static struct pclk_info uart_pclk_info[] = { |
101 | { | 175 | { |
102 | .pclk = &pll1_clk, | 176 | .pclk = &uart_synth_clk, |
103 | .pclk_mask = AUX_CLK_PLL1_MASK, | 177 | .pclk_val = AUX_CLK_PLL1_VAL, |
104 | .scalable = 1, | ||
105 | }, { | 178 | }, { |
106 | .pclk = &pll3_48m_clk, | 179 | .pclk = &pll3_48m_clk, |
107 | .pclk_mask = AUX_CLK_PLL3_MASK, | 180 | .pclk_val = AUX_CLK_PLL3_VAL, |
108 | .scalable = 0, | ||
109 | }, | 181 | }, |
110 | }; | 182 | }; |
111 | 183 | ||
@@ -123,25 +195,35 @@ static struct clk uart_clk = { | |||
123 | .en_reg_bit = UART_CLK_ENB, | 195 | .en_reg_bit = UART_CLK_ENB, |
124 | .pclk_sel = &uart_pclk_sel, | 196 | .pclk_sel = &uart_pclk_sel, |
125 | .pclk_sel_shift = UART_CLK_SHIFT, | 197 | .pclk_sel_shift = UART_CLK_SHIFT, |
126 | .recalc = &aux_clk_recalc, | 198 | .recalc = &follow_parent, |
127 | .private_data = &uart_config, | ||
128 | }; | 199 | }; |
129 | 200 | ||
130 | /* firda configurations */ | 201 | /* firda configurations */ |
131 | static struct aux_clk_config firda_config = { | 202 | static struct aux_clk_config firda_synth_config = { |
132 | .synth_reg = FIRDA_CLK_SYNT, | 203 | .synth_reg = FIRDA_CLK_SYNT, |
204 | .masks = &aux_masks, | ||
205 | }; | ||
206 | |||
207 | /* firda synth clock */ | ||
208 | static struct clk firda_synth_clk = { | ||
209 | .en_reg = FIRDA_CLK_SYNT, | ||
210 | .en_reg_bit = AUX_SYNT_ENB, | ||
211 | .pclk = &pll1_clk, | ||
212 | .calc_rate = &aux_calc_rate, | ||
213 | .recalc = &aux_clk_recalc, | ||
214 | .set_rate = &aux_clk_set_rate, | ||
215 | .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1}, | ||
216 | .private_data = &firda_synth_config, | ||
133 | }; | 217 | }; |
134 | 218 | ||
135 | /* firda parents */ | 219 | /* firda parents */ |
136 | static struct pclk_info firda_pclk_info[] = { | 220 | static struct pclk_info firda_pclk_info[] = { |
137 | { | 221 | { |
138 | .pclk = &pll1_clk, | 222 | .pclk = &firda_synth_clk, |
139 | .pclk_mask = AUX_CLK_PLL1_MASK, | 223 | .pclk_val = AUX_CLK_PLL1_VAL, |
140 | .scalable = 1, | ||
141 | }, { | 224 | }, { |
142 | .pclk = &pll3_48m_clk, | 225 | .pclk = &pll3_48m_clk, |
143 | .pclk_mask = AUX_CLK_PLL3_MASK, | 226 | .pclk_val = AUX_CLK_PLL3_VAL, |
144 | .scalable = 0, | ||
145 | }, | 227 | }, |
146 | }; | 228 | }; |
147 | 229 | ||
@@ -159,73 +241,155 @@ static struct clk firda_clk = { | |||
159 | .en_reg_bit = FIRDA_CLK_ENB, | 241 | .en_reg_bit = FIRDA_CLK_ENB, |
160 | .pclk_sel = &firda_pclk_sel, | 242 | .pclk_sel = &firda_pclk_sel, |
161 | .pclk_sel_shift = FIRDA_CLK_SHIFT, | 243 | .pclk_sel_shift = FIRDA_CLK_SHIFT, |
162 | .recalc = &aux_clk_recalc, | 244 | .recalc = &follow_parent, |
163 | .private_data = &firda_config, | 245 | }; |
246 | |||
247 | /* gpt synthesizer masks */ | ||
248 | static struct gpt_clk_masks gpt_masks = { | ||
249 | .mscale_sel_mask = GPT_MSCALE_MASK, | ||
250 | .mscale_sel_shift = GPT_MSCALE_SHIFT, | ||
251 | .nscale_sel_mask = GPT_NSCALE_MASK, | ||
252 | .nscale_sel_shift = GPT_NSCALE_SHIFT, | ||
253 | }; | ||
254 | |||
255 | /* gpt rate configuration table, in ascending order of rates */ | ||
256 | struct gpt_rate_tbl gpt_rtbl[] = { | ||
257 | /* For pll1 = 332 MHz */ | ||
258 | {.mscale = 4, .nscale = 0}, /* 41.5 MHz */ | ||
259 | {.mscale = 2, .nscale = 0}, /* 55.3 MHz */ | ||
260 | {.mscale = 1, .nscale = 0}, /* 83 MHz */ | ||
261 | }; | ||
262 | |||
263 | /* gpt0 synth clk config*/ | ||
264 | static struct gpt_clk_config gpt0_synth_config = { | ||
265 | .synth_reg = PRSC1_CLK_CFG, | ||
266 | .masks = &gpt_masks, | ||
267 | }; | ||
268 | |||
269 | /* gpt synth clock */ | ||
270 | static struct clk gpt0_synth_clk = { | ||
271 | .flags = ALWAYS_ENABLED, | ||
272 | .pclk = &pll1_clk, | ||
273 | .calc_rate = &gpt_calc_rate, | ||
274 | .recalc = &gpt_clk_recalc, | ||
275 | .set_rate = &gpt_clk_set_rate, | ||
276 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
277 | .private_data = &gpt0_synth_config, | ||
164 | }; | 278 | }; |
165 | 279 | ||
166 | /* gpt parents */ | 280 | /* gpt parents */ |
167 | static struct pclk_info gpt_pclk_info[] = { | 281 | static struct pclk_info gpt0_pclk_info[] = { |
168 | { | 282 | { |
169 | .pclk = &pll1_clk, | 283 | .pclk = &gpt0_synth_clk, |
170 | .pclk_mask = AUX_CLK_PLL1_MASK, | 284 | .pclk_val = AUX_CLK_PLL1_VAL, |
171 | .scalable = 1, | ||
172 | }, { | 285 | }, { |
173 | .pclk = &pll3_48m_clk, | 286 | .pclk = &pll3_48m_clk, |
174 | .pclk_mask = AUX_CLK_PLL3_MASK, | 287 | .pclk_val = AUX_CLK_PLL3_VAL, |
175 | .scalable = 0, | ||
176 | }, | 288 | }, |
177 | }; | 289 | }; |
178 | 290 | ||
179 | /* gpt parent select structure */ | 291 | /* gpt parent select structure */ |
180 | static struct pclk_sel gpt_pclk_sel = { | 292 | static struct pclk_sel gpt0_pclk_sel = { |
181 | .pclk_info = gpt_pclk_info, | 293 | .pclk_info = gpt0_pclk_info, |
182 | .pclk_count = ARRAY_SIZE(gpt_pclk_info), | 294 | .pclk_count = ARRAY_SIZE(gpt0_pclk_info), |
183 | .pclk_sel_reg = PERIP_CLK_CFG, | 295 | .pclk_sel_reg = PERIP_CLK_CFG, |
184 | .pclk_sel_mask = GPT_CLK_MASK, | 296 | .pclk_sel_mask = GPT_CLK_MASK, |
185 | }; | 297 | }; |
186 | 298 | ||
187 | /* gpt0 configurations */ | ||
188 | static struct aux_clk_config gpt0_config = { | ||
189 | .synth_reg = PRSC1_CLK_CFG, | ||
190 | }; | ||
191 | |||
192 | /* gpt0 timer clock */ | 299 | /* gpt0 timer clock */ |
193 | static struct clk gpt0_clk = { | 300 | static struct clk gpt0_clk = { |
194 | .flags = ALWAYS_ENABLED, | 301 | .flags = ALWAYS_ENABLED, |
195 | .pclk_sel = &gpt_pclk_sel, | 302 | .pclk_sel = &gpt0_pclk_sel, |
196 | .pclk_sel_shift = GPT0_CLK_SHIFT, | 303 | .pclk_sel_shift = GPT0_CLK_SHIFT, |
197 | .recalc = &gpt_clk_recalc, | 304 | .recalc = &follow_parent, |
198 | .private_data = &gpt0_config, | ||
199 | }; | 305 | }; |
200 | 306 | ||
201 | /* gpt1 configurations */ | 307 | /* gpt1 synth clk configurations */ |
202 | static struct aux_clk_config gpt1_config = { | 308 | static struct gpt_clk_config gpt1_synth_config = { |
203 | .synth_reg = PRSC2_CLK_CFG, | 309 | .synth_reg = PRSC2_CLK_CFG, |
310 | .masks = &gpt_masks, | ||
311 | }; | ||
312 | |||
313 | /* gpt1 synth clock */ | ||
314 | static struct clk gpt1_synth_clk = { | ||
315 | .flags = ALWAYS_ENABLED, | ||
316 | .pclk = &pll1_clk, | ||
317 | .calc_rate = &gpt_calc_rate, | ||
318 | .recalc = &gpt_clk_recalc, | ||
319 | .set_rate = &gpt_clk_set_rate, | ||
320 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
321 | .private_data = &gpt1_synth_config, | ||
322 | }; | ||
323 | |||
324 | static struct pclk_info gpt1_pclk_info[] = { | ||
325 | { | ||
326 | .pclk = &gpt1_synth_clk, | ||
327 | .pclk_val = AUX_CLK_PLL1_VAL, | ||
328 | }, { | ||
329 | .pclk = &pll3_48m_clk, | ||
330 | .pclk_val = AUX_CLK_PLL3_VAL, | ||
331 | }, | ||
332 | }; | ||
333 | |||
334 | /* gpt parent select structure */ | ||
335 | static struct pclk_sel gpt1_pclk_sel = { | ||
336 | .pclk_info = gpt1_pclk_info, | ||
337 | .pclk_count = ARRAY_SIZE(gpt1_pclk_info), | ||
338 | .pclk_sel_reg = PERIP_CLK_CFG, | ||
339 | .pclk_sel_mask = GPT_CLK_MASK, | ||
204 | }; | 340 | }; |
205 | 341 | ||
206 | /* gpt1 timer clock */ | 342 | /* gpt1 timer clock */ |
207 | static struct clk gpt1_clk = { | 343 | static struct clk gpt1_clk = { |
208 | .en_reg = PERIP1_CLK_ENB, | 344 | .en_reg = PERIP1_CLK_ENB, |
209 | .en_reg_bit = GPT1_CLK_ENB, | 345 | .en_reg_bit = GPT1_CLK_ENB, |
210 | .pclk_sel = &gpt_pclk_sel, | 346 | .pclk_sel = &gpt1_pclk_sel, |
211 | .pclk_sel_shift = GPT1_CLK_SHIFT, | 347 | .pclk_sel_shift = GPT1_CLK_SHIFT, |
212 | .recalc = &gpt_clk_recalc, | 348 | .recalc = &follow_parent, |
213 | .private_data = &gpt1_config, | ||
214 | }; | 349 | }; |
215 | 350 | ||
216 | /* gpt2 configurations */ | 351 | /* gpt2 synth clk configurations */ |
217 | static struct aux_clk_config gpt2_config = { | 352 | static struct gpt_clk_config gpt2_synth_config = { |
218 | .synth_reg = PRSC3_CLK_CFG, | 353 | .synth_reg = PRSC3_CLK_CFG, |
354 | .masks = &gpt_masks, | ||
355 | }; | ||
356 | |||
357 | /* gpt1 synth clock */ | ||
358 | static struct clk gpt2_synth_clk = { | ||
359 | .flags = ALWAYS_ENABLED, | ||
360 | .pclk = &pll1_clk, | ||
361 | .calc_rate = &gpt_calc_rate, | ||
362 | .recalc = &gpt_clk_recalc, | ||
363 | .set_rate = &gpt_clk_set_rate, | ||
364 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
365 | .private_data = &gpt2_synth_config, | ||
366 | }; | ||
367 | |||
368 | static struct pclk_info gpt2_pclk_info[] = { | ||
369 | { | ||
370 | .pclk = &gpt2_synth_clk, | ||
371 | .pclk_val = AUX_CLK_PLL1_VAL, | ||
372 | }, { | ||
373 | .pclk = &pll3_48m_clk, | ||
374 | .pclk_val = AUX_CLK_PLL3_VAL, | ||
375 | }, | ||
376 | }; | ||
377 | |||
378 | /* gpt parent select structure */ | ||
379 | static struct pclk_sel gpt2_pclk_sel = { | ||
380 | .pclk_info = gpt2_pclk_info, | ||
381 | .pclk_count = ARRAY_SIZE(gpt2_pclk_info), | ||
382 | .pclk_sel_reg = PERIP_CLK_CFG, | ||
383 | .pclk_sel_mask = GPT_CLK_MASK, | ||
219 | }; | 384 | }; |
220 | 385 | ||
221 | /* gpt2 timer clock */ | 386 | /* gpt2 timer clock */ |
222 | static struct clk gpt2_clk = { | 387 | static struct clk gpt2_clk = { |
223 | .en_reg = PERIP1_CLK_ENB, | 388 | .en_reg = PERIP1_CLK_ENB, |
224 | .en_reg_bit = GPT2_CLK_ENB, | 389 | .en_reg_bit = GPT2_CLK_ENB, |
225 | .pclk_sel = &gpt_pclk_sel, | 390 | .pclk_sel = &gpt2_pclk_sel, |
226 | .pclk_sel_shift = GPT2_CLK_SHIFT, | 391 | .pclk_sel_shift = GPT2_CLK_SHIFT, |
227 | .recalc = &gpt_clk_recalc, | 392 | .recalc = &follow_parent, |
228 | .private_data = &gpt2_config, | ||
229 | }; | 393 | }; |
230 | 394 | ||
231 | /* clock derived from pll3 clk */ | 395 | /* clock derived from pll3 clk */ |
@@ -245,26 +409,27 @@ static struct clk usbd_clk = { | |||
245 | .recalc = &follow_parent, | 409 | .recalc = &follow_parent, |
246 | }; | 410 | }; |
247 | 411 | ||
248 | /* clcd clock */ | 412 | /* clock derived from ahb clk */ |
249 | static struct clk clcd_clk = { | 413 | /* apb masks structure */ |
250 | .flags = ALWAYS_ENABLED, | 414 | static struct bus_clk_masks apb_masks = { |
251 | .pclk = &pll3_48m_clk, | 415 | .mask = HCLK_PCLK_RATIO_MASK, |
252 | .recalc = &follow_parent, | 416 | .shift = HCLK_PCLK_RATIO_SHIFT, |
253 | }; | 417 | }; |
254 | 418 | ||
255 | /* clock derived from ahb clk */ | ||
256 | /* apb configuration structure */ | 419 | /* apb configuration structure */ |
257 | static struct bus_clk_config apb_config = { | 420 | static struct bus_clk_config apb_config = { |
258 | .reg = CORE_CLK_CFG, | 421 | .reg = CORE_CLK_CFG, |
259 | .mask = HCLK_PCLK_RATIO_MASK, | 422 | .masks = &apb_masks, |
260 | .shift = HCLK_PCLK_RATIO_SHIFT, | ||
261 | }; | 423 | }; |
262 | 424 | ||
263 | /* apb clock */ | 425 | /* apb clock */ |
264 | static struct clk apb_clk = { | 426 | static struct clk apb_clk = { |
265 | .flags = ALWAYS_ENABLED, | 427 | .flags = ALWAYS_ENABLED, |
266 | .pclk = &ahb_clk, | 428 | .pclk = &ahb_clk, |
429 | .calc_rate = &bus_calc_rate, | ||
267 | .recalc = &bus_clk_recalc, | 430 | .recalc = &bus_clk_recalc, |
431 | .set_rate = &bus_clk_set_rate, | ||
432 | .rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2}, | ||
268 | .private_data = &apb_config, | 433 | .private_data = &apb_config, |
269 | }; | 434 | }; |
270 | 435 | ||
@@ -325,8 +490,17 @@ static struct clk adc_clk = { | |||
325 | .recalc = &follow_parent, | 490 | .recalc = &follow_parent, |
326 | }; | 491 | }; |
327 | 492 | ||
493 | #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) | ||
494 | /* emi clock */ | ||
495 | static struct clk emi_clk = { | ||
496 | .flags = ALWAYS_ENABLED, | ||
497 | .pclk = &ahb_clk, | ||
498 | .recalc = &follow_parent, | ||
499 | }; | ||
500 | #endif | ||
501 | |||
328 | /* ssp clock */ | 502 | /* ssp clock */ |
329 | static struct clk ssp_clk = { | 503 | static struct clk ssp0_clk = { |
330 | .pclk = &apb_clk, | 504 | .pclk = &apb_clk, |
331 | .en_reg = PERIP1_CLK_ENB, | 505 | .en_reg = PERIP1_CLK_ENB, |
332 | .en_reg_bit = SSP_CLK_ENB, | 506 | .en_reg_bit = SSP_CLK_ENB, |
@@ -343,14 +517,145 @@ static struct clk gpio_clk = { | |||
343 | 517 | ||
344 | static struct clk dummy_apb_pclk; | 518 | static struct clk dummy_apb_pclk; |
345 | 519 | ||
520 | #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \ | ||
521 | defined(CONFIG_MACH_SPEAR320) | ||
522 | /* fsmc clock */ | ||
523 | static struct clk fsmc_clk = { | ||
524 | .flags = ALWAYS_ENABLED, | ||
525 | .pclk = &ahb_clk, | ||
526 | .recalc = &follow_parent, | ||
527 | }; | ||
528 | #endif | ||
529 | |||
530 | /* common clocks to spear310 and spear320 */ | ||
531 | #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) | ||
532 | /* uart1 clock */ | ||
533 | static struct clk uart1_clk = { | ||
534 | .flags = ALWAYS_ENABLED, | ||
535 | .pclk = &apb_clk, | ||
536 | .recalc = &follow_parent, | ||
537 | }; | ||
538 | |||
539 | /* uart2 clock */ | ||
540 | static struct clk uart2_clk = { | ||
541 | .flags = ALWAYS_ENABLED, | ||
542 | .pclk = &apb_clk, | ||
543 | .recalc = &follow_parent, | ||
544 | }; | ||
545 | #endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */ | ||
546 | |||
547 | /* common clocks to spear300 and spear320 */ | ||
548 | #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) | ||
549 | /* clcd clock */ | ||
550 | static struct clk clcd_clk = { | ||
551 | .flags = ALWAYS_ENABLED, | ||
552 | .pclk = &pll3_48m_clk, | ||
553 | .recalc = &follow_parent, | ||
554 | }; | ||
555 | |||
556 | /* sdhci clock */ | ||
557 | static struct clk sdhci_clk = { | ||
558 | .flags = ALWAYS_ENABLED, | ||
559 | .pclk = &ahb_clk, | ||
560 | .recalc = &follow_parent, | ||
561 | }; | ||
562 | #endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ | ||
563 | |||
564 | /* spear300 machine specific clock structures */ | ||
565 | #ifdef CONFIG_MACH_SPEAR300 | ||
566 | /* gpio1 clock */ | ||
567 | static struct clk gpio1_clk = { | ||
568 | .flags = ALWAYS_ENABLED, | ||
569 | .pclk = &apb_clk, | ||
570 | .recalc = &follow_parent, | ||
571 | }; | ||
572 | |||
573 | /* keyboard clock */ | ||
574 | static struct clk kbd_clk = { | ||
575 | .flags = ALWAYS_ENABLED, | ||
576 | .pclk = &apb_clk, | ||
577 | .recalc = &follow_parent, | ||
578 | }; | ||
579 | |||
580 | #endif | ||
581 | |||
582 | /* spear310 machine specific clock structures */ | ||
583 | #ifdef CONFIG_MACH_SPEAR310 | ||
584 | /* uart3 clock */ | ||
585 | static struct clk uart3_clk = { | ||
586 | .flags = ALWAYS_ENABLED, | ||
587 | .pclk = &apb_clk, | ||
588 | .recalc = &follow_parent, | ||
589 | }; | ||
590 | |||
591 | /* uart4 clock */ | ||
592 | static struct clk uart4_clk = { | ||
593 | .flags = ALWAYS_ENABLED, | ||
594 | .pclk = &apb_clk, | ||
595 | .recalc = &follow_parent, | ||
596 | }; | ||
597 | |||
598 | /* uart5 clock */ | ||
599 | static struct clk uart5_clk = { | ||
600 | .flags = ALWAYS_ENABLED, | ||
601 | .pclk = &apb_clk, | ||
602 | .recalc = &follow_parent, | ||
603 | }; | ||
604 | #endif | ||
605 | |||
606 | /* spear320 machine specific clock structures */ | ||
607 | #ifdef CONFIG_MACH_SPEAR320 | ||
608 | /* can0 clock */ | ||
609 | static struct clk can0_clk = { | ||
610 | .flags = ALWAYS_ENABLED, | ||
611 | .pclk = &apb_clk, | ||
612 | .recalc = &follow_parent, | ||
613 | }; | ||
614 | |||
615 | /* can1 clock */ | ||
616 | static struct clk can1_clk = { | ||
617 | .flags = ALWAYS_ENABLED, | ||
618 | .pclk = &apb_clk, | ||
619 | .recalc = &follow_parent, | ||
620 | }; | ||
621 | |||
622 | /* i2c1 clock */ | ||
623 | static struct clk i2c1_clk = { | ||
624 | .flags = ALWAYS_ENABLED, | ||
625 | .pclk = &ahb_clk, | ||
626 | .recalc = &follow_parent, | ||
627 | }; | ||
628 | |||
629 | /* ssp1 clock */ | ||
630 | static struct clk ssp1_clk = { | ||
631 | .flags = ALWAYS_ENABLED, | ||
632 | .pclk = &apb_clk, | ||
633 | .recalc = &follow_parent, | ||
634 | }; | ||
635 | |||
636 | /* ssp2 clock */ | ||
637 | static struct clk ssp2_clk = { | ||
638 | .flags = ALWAYS_ENABLED, | ||
639 | .pclk = &apb_clk, | ||
640 | .recalc = &follow_parent, | ||
641 | }; | ||
642 | |||
643 | /* pwm clock */ | ||
644 | static struct clk pwm_clk = { | ||
645 | .flags = ALWAYS_ENABLED, | ||
646 | .pclk = &apb_clk, | ||
647 | .recalc = &follow_parent, | ||
648 | }; | ||
649 | #endif | ||
650 | |||
346 | /* array of all spear 3xx clock lookups */ | 651 | /* array of all spear 3xx clock lookups */ |
347 | static struct clk_lookup spear_clk_lookups[] = { | 652 | static struct clk_lookup spear_clk_lookups[] = { |
348 | { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, | 653 | { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, |
349 | /* root clks */ | 654 | /* root clks */ |
350 | { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, | 655 | { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, |
351 | { .con_id = "osc_24m_clk", .clk = &osc_24m_clk}, | 656 | { .con_id = "osc_24m_clk", .clk = &osc_24m_clk}, |
352 | /* clock derived from 32 KHz osc clk */ | 657 | /* clock derived from 32 KHz osc clk */ |
353 | { .dev_id = "rtc", .clk = &rtc_clk}, | 658 | { .dev_id = "rtc-spear", .clk = &rtc_clk}, |
354 | /* clock derived from 24 MHz osc clk */ | 659 | /* clock derived from 24 MHz osc clk */ |
355 | { .con_id = "pll1_clk", .clk = &pll1_clk}, | 660 | { .con_id = "pll1_clk", .clk = &pll1_clk}, |
356 | { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, | 661 | { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, |
@@ -358,18 +663,22 @@ static struct clk_lookup spear_clk_lookups[] = { | |||
358 | /* clock derived from pll1 clk */ | 663 | /* clock derived from pll1 clk */ |
359 | { .con_id = "cpu_clk", .clk = &cpu_clk}, | 664 | { .con_id = "cpu_clk", .clk = &cpu_clk}, |
360 | { .con_id = "ahb_clk", .clk = &ahb_clk}, | 665 | { .con_id = "ahb_clk", .clk = &ahb_clk}, |
666 | { .con_id = "uart_synth_clk", .clk = &uart_synth_clk}, | ||
667 | { .con_id = "firda_synth_clk", .clk = &firda_synth_clk}, | ||
668 | { .con_id = "gpt0_synth_clk", .clk = &gpt0_synth_clk}, | ||
669 | { .con_id = "gpt1_synth_clk", .clk = &gpt1_synth_clk}, | ||
670 | { .con_id = "gpt2_synth_clk", .clk = &gpt2_synth_clk}, | ||
361 | { .dev_id = "uart", .clk = &uart_clk}, | 671 | { .dev_id = "uart", .clk = &uart_clk}, |
362 | { .dev_id = "firda", .clk = &firda_clk}, | 672 | { .dev_id = "firda", .clk = &firda_clk}, |
363 | { .dev_id = "gpt0", .clk = &gpt0_clk}, | 673 | { .dev_id = "gpt0", .clk = &gpt0_clk}, |
364 | { .dev_id = "gpt1", .clk = &gpt1_clk}, | 674 | { .dev_id = "gpt1", .clk = &gpt1_clk}, |
365 | { .dev_id = "gpt2", .clk = &gpt2_clk}, | 675 | { .dev_id = "gpt2", .clk = &gpt2_clk}, |
366 | /* clock derived from pll3 clk */ | 676 | /* clock derived from pll3 clk */ |
367 | { .dev_id = "usbh", .clk = &usbh_clk}, | 677 | { .dev_id = "designware_udc", .clk = &usbd_clk}, |
368 | { .dev_id = "usbd", .clk = &usbd_clk}, | 678 | { .con_id = "usbh_clk", .clk = &usbh_clk}, |
369 | { .dev_id = "clcd", .clk = &clcd_clk}, | ||
370 | /* clock derived from ahb clk */ | 679 | /* clock derived from ahb clk */ |
371 | { .con_id = "apb_clk", .clk = &apb_clk}, | 680 | { .con_id = "apb_clk", .clk = &apb_clk}, |
372 | { .dev_id = "i2c", .clk = &i2c_clk}, | 681 | { .dev_id = "i2c_designware.0", .clk = &i2c_clk}, |
373 | { .dev_id = "dma", .clk = &dma_clk}, | 682 | { .dev_id = "dma", .clk = &dma_clk}, |
374 | { .dev_id = "jpeg", .clk = &jpeg_clk}, | 683 | { .dev_id = "jpeg", .clk = &jpeg_clk}, |
375 | { .dev_id = "gmac", .clk = &gmac_clk}, | 684 | { .dev_id = "gmac", .clk = &gmac_clk}, |
@@ -377,8 +686,50 @@ static struct clk_lookup spear_clk_lookups[] = { | |||
377 | { .dev_id = "c3", .clk = &c3_clk}, | 686 | { .dev_id = "c3", .clk = &c3_clk}, |
378 | /* clock derived from apb clk */ | 687 | /* clock derived from apb clk */ |
379 | { .dev_id = "adc", .clk = &adc_clk}, | 688 | { .dev_id = "adc", .clk = &adc_clk}, |
380 | { .dev_id = "ssp", .clk = &ssp_clk}, | 689 | { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, |
381 | { .dev_id = "gpio", .clk = &gpio_clk}, | 690 | { .dev_id = "gpio", .clk = &gpio_clk}, |
691 | #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) | ||
692 | { .dev_id = "physmap-flash", .clk = &emi_clk}, | ||
693 | #endif | ||
694 | #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \ | ||
695 | defined(CONFIG_MACH_SPEAR320) | ||
696 | { .con_id = "fsmc", .clk = &fsmc_clk}, | ||
697 | #endif | ||
698 | |||
699 | /* common clocks to spear310 and spear320 */ | ||
700 | #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) | ||
701 | { .dev_id = "uart1", .clk = &uart1_clk}, | ||
702 | { .dev_id = "uart2", .clk = &uart2_clk}, | ||
703 | #endif | ||
704 | |||
705 | /* common clock to spear300 and spear320 */ | ||
706 | #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) | ||
707 | { .dev_id = "clcd", .clk = &clcd_clk}, | ||
708 | { .dev_id = "sdhci", .clk = &sdhci_clk}, | ||
709 | #endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ | ||
710 | |||
711 | /* spear300 machine specific clock structures */ | ||
712 | #ifdef CONFIG_MACH_SPEAR300 | ||
713 | { .dev_id = "gpio1", .clk = &gpio1_clk}, | ||
714 | { .dev_id = "keyboard", .clk = &kbd_clk}, | ||
715 | #endif | ||
716 | |||
717 | /* spear310 machine specific clock structures */ | ||
718 | #ifdef CONFIG_MACH_SPEAR310 | ||
719 | { .dev_id = "uart3", .clk = &uart3_clk}, | ||
720 | { .dev_id = "uart4", .clk = &uart4_clk}, | ||
721 | { .dev_id = "uart5", .clk = &uart5_clk}, | ||
722 | |||
723 | #endif | ||
724 | /* spear320 machine specific clock structures */ | ||
725 | #ifdef CONFIG_MACH_SPEAR320 | ||
726 | { .dev_id = "c_can_platform.0", .clk = &can0_clk}, | ||
727 | { .dev_id = "c_can_platform.1", .clk = &can1_clk}, | ||
728 | { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, | ||
729 | { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, | ||
730 | { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, | ||
731 | { .dev_id = "pwm", .clk = &pwm_clk}, | ||
732 | #endif | ||
382 | }; | 733 | }; |
383 | 734 | ||
384 | void __init clk_init(void) | 735 | void __init clk_init(void) |
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S index 947625d6b48d..53da4224ba3d 100644 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S | |||
@@ -11,9 +11,8 @@ | |||
11 | * warranty of any kind, whether express or implied. | 11 | * warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/spear.h> | ||
16 | #include <asm/hardware/vic.h> | 14 | #include <asm/hardware/vic.h> |
15 | #include <mach/hardware.h> | ||
17 | 16 | ||
18 | .macro disable_fiq | 17 | .macro disable_fiq |
19 | .endm | 18 | .endm |
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index af7e02c909a3..8e30636909ef 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h | |||
@@ -14,11 +14,11 @@ | |||
14 | #ifndef __MACH_GENERIC_H | 14 | #ifndef __MACH_GENERIC_H |
15 | #define __MACH_GENERIC_H | 15 | #define __MACH_GENERIC_H |
16 | 16 | ||
17 | #include <asm/mach/time.h> | ||
18 | #include <asm/mach/map.h> | ||
19 | #include <linux/init.h> | 17 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
21 | #include <linux/amba/bus.h> | 19 | #include <linux/amba/bus.h> |
20 | #include <asm/mach/time.h> | ||
21 | #include <asm/mach/map.h> | ||
22 | #include <plat/padmux.h> | 22 | #include <plat/padmux.h> |
23 | 23 | ||
24 | /* spear3xx declarations */ | 24 | /* spear3xx declarations */ |
@@ -33,14 +33,14 @@ | |||
33 | /* Add spear3xx family device structure declarations here */ | 33 | /* Add spear3xx family device structure declarations here */ |
34 | extern struct amba_device gpio_device; | 34 | extern struct amba_device gpio_device; |
35 | extern struct amba_device uart_device; | 35 | extern struct amba_device uart_device; |
36 | extern struct sys_timer spear_sys_timer; | 36 | extern struct sys_timer spear3xx_timer; |
37 | 37 | ||
38 | /* Add spear3xx family function declarations here */ | 38 | /* Add spear3xx family function declarations here */ |
39 | void __init clk_init(void); | 39 | void __init clk_init(void); |
40 | void __init spear_setup_timer(void); | ||
40 | void __init spear3xx_map_io(void); | 41 | void __init spear3xx_map_io(void); |
41 | void __init spear3xx_init_irq(void); | 42 | void __init spear3xx_init_irq(void); |
42 | void __init spear3xx_init(void); | 43 | void __init spear3xx_init(void); |
43 | void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size); | ||
44 | 44 | ||
45 | /* pad mux declarations */ | 45 | /* pad mux declarations */ |
46 | #define PMX_FIRDA_MASK (1 << 14) | 46 | #define PMX_FIRDA_MASK (1 << 14) |
@@ -129,12 +129,10 @@ extern struct pmx_dev pmx_telecom_camera; | |||
129 | extern struct pmx_dev pmx_telecom_dac; | 129 | extern struct pmx_dev pmx_telecom_dac; |
130 | extern struct pmx_dev pmx_telecom_i2s; | 130 | extern struct pmx_dev pmx_telecom_i2s; |
131 | extern struct pmx_dev pmx_telecom_boot_pins; | 131 | extern struct pmx_dev pmx_telecom_boot_pins; |
132 | extern struct pmx_dev pmx_telecom_sdio_4bit; | 132 | extern struct pmx_dev pmx_telecom_sdhci_4bit; |
133 | extern struct pmx_dev pmx_telecom_sdio_8bit; | 133 | extern struct pmx_dev pmx_telecom_sdhci_8bit; |
134 | extern struct pmx_dev pmx_gpio1; | 134 | extern struct pmx_dev pmx_gpio1; |
135 | 135 | ||
136 | void spear300_pmx_init(void); | ||
137 | |||
138 | /* Add spear300 machine function declarations here */ | 136 | /* Add spear300 machine function declarations here */ |
139 | void __init spear300_init(void); | 137 | void __init spear300_init(void); |
140 | 138 | ||
@@ -154,8 +152,6 @@ extern struct pmx_dev pmx_fsmc; | |||
154 | extern struct pmx_dev pmx_rs485_0_1; | 152 | extern struct pmx_dev pmx_rs485_0_1; |
155 | extern struct pmx_dev pmx_tdm0; | 153 | extern struct pmx_dev pmx_tdm0; |
156 | 154 | ||
157 | void spear310_pmx_init(void); | ||
158 | |||
159 | /* Add spear310 machine function declarations here */ | 155 | /* Add spear310 machine function declarations here */ |
160 | void __init spear310_init(void); | 156 | void __init spear310_init(void); |
161 | 157 | ||
@@ -176,14 +172,14 @@ extern struct pmx_dev pmx_clcd; | |||
176 | extern struct pmx_dev pmx_emi; | 172 | extern struct pmx_dev pmx_emi; |
177 | extern struct pmx_dev pmx_fsmc; | 173 | extern struct pmx_dev pmx_fsmc; |
178 | extern struct pmx_dev pmx_spp; | 174 | extern struct pmx_dev pmx_spp; |
179 | extern struct pmx_dev pmx_sdio; | 175 | extern struct pmx_dev pmx_sdhci; |
180 | extern struct pmx_dev pmx_i2s; | 176 | extern struct pmx_dev pmx_i2s; |
181 | extern struct pmx_dev pmx_uart1; | 177 | extern struct pmx_dev pmx_uart1; |
182 | extern struct pmx_dev pmx_uart1_modem; | 178 | extern struct pmx_dev pmx_uart1_modem; |
183 | extern struct pmx_dev pmx_uart2; | 179 | extern struct pmx_dev pmx_uart2; |
184 | extern struct pmx_dev pmx_touchscreen; | 180 | extern struct pmx_dev pmx_touchscreen; |
185 | extern struct pmx_dev pmx_can; | 181 | extern struct pmx_dev pmx_can; |
186 | extern struct pmx_dev pmx_sdio_led; | 182 | extern struct pmx_dev pmx_sdhci_led; |
187 | extern struct pmx_dev pmx_pwm0; | 183 | extern struct pmx_dev pmx_pwm0; |
188 | extern struct pmx_dev pmx_pwm1; | 184 | extern struct pmx_dev pmx_pwm1; |
189 | extern struct pmx_dev pmx_pwm2; | 185 | extern struct pmx_dev pmx_pwm2; |
@@ -195,8 +191,6 @@ extern struct pmx_dev pmx_smii0; | |||
195 | extern struct pmx_dev pmx_smii1; | 191 | extern struct pmx_dev pmx_smii1; |
196 | extern struct pmx_dev pmx_i2c1; | 192 | extern struct pmx_dev pmx_i2c1; |
197 | 193 | ||
198 | void spear320_pmx_init(void); | ||
199 | |||
200 | /* Add spear320 machine function declarations here */ | 194 | /* Add spear320 machine function declarations here */ |
201 | void __init spear320_init(void); | 195 | void __init spear320_init(void); |
202 | 196 | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h index 4a86e6a3c444..4660c0d8ec0d 100644 --- a/arch/arm/mach-spear3xx/include/mach/hardware.h +++ b/arch/arm/mach-spear3xx/include/mach/hardware.h | |||
@@ -14,6 +14,9 @@ | |||
14 | #ifndef __MACH_HARDWARE_H | 14 | #ifndef __MACH_HARDWARE_H |
15 | #define __MACH_HARDWARE_H | 15 | #define __MACH_HARDWARE_H |
16 | 16 | ||
17 | #include <plat/hardware.h> | ||
18 | #include <mach/spear.h> | ||
19 | |||
17 | /* Vitual to physical translation of statically mapped space */ | 20 | /* Vitual to physical translation of statically mapped space */ |
18 | #define IO_ADDRESS(x) (x | 0xF0000000) | 21 | #define IO_ADDRESS(x) (x | 0xF0000000) |
19 | 22 | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h index 7f940b818473..a1a7f481866d 100644 --- a/arch/arm/mach-spear3xx/include/mach/irqs.h +++ b/arch/arm/mach-spear3xx/include/mach/irqs.h | |||
@@ -69,7 +69,7 @@ | |||
69 | #define IRQ_CLCD IRQ_GEN_RAS_3 | 69 | #define IRQ_CLCD IRQ_GEN_RAS_3 |
70 | 70 | ||
71 | /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ | 71 | /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ |
72 | #define IRQ_SDIO IRQ_INTRCOMM_RAS_ARM | 72 | #define IRQ_SDHCI IRQ_INTRCOMM_RAS_ARM |
73 | 73 | ||
74 | /* GPIO pins virtual irqs */ | 74 | /* GPIO pins virtual irqs */ |
75 | #define SPEAR_GPIO_INT_BASE (VIRQ_START + 9) | 75 | #define SPEAR_GPIO_INT_BASE (VIRQ_START + 9) |
@@ -115,7 +115,7 @@ | |||
115 | #define VIRQ_SPP (VIRQ_START + 2) | 115 | #define VIRQ_SPP (VIRQ_START + 2) |
116 | 116 | ||
117 | /* IRQs sharing IRQ_GEN_RAS_2 */ | 117 | /* IRQs sharing IRQ_GEN_RAS_2 */ |
118 | #define IRQ_SDIO IRQ_GEN_RAS_2 | 118 | #define IRQ_SDHCI IRQ_GEN_RAS_2 |
119 | 119 | ||
120 | /* IRQs sharing IRQ_GEN_RAS_3 */ | 120 | /* IRQs sharing IRQ_GEN_RAS_3 */ |
121 | #define VIRQ_PLGPIO (VIRQ_START + 3) | 121 | #define VIRQ_PLGPIO (VIRQ_START + 3) |
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h index 38d767a1aba0..5bd8cd8d4852 100644 --- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h +++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h | |||
@@ -14,16 +14,16 @@ | |||
14 | #ifndef __MACH_MISC_REGS_H | 14 | #ifndef __MACH_MISC_REGS_H |
15 | #define __MACH_MISC_REGS_H | 15 | #define __MACH_MISC_REGS_H |
16 | 16 | ||
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | #define MISC_BASE VA_SPEAR3XX_ICM3_MISC_REG_BASE | 19 | #define MISC_BASE IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE) |
20 | 20 | ||
21 | #define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000)) | 21 | #define SOC_CFG_CTR (MISC_BASE + 0x000) |
22 | #define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004)) | 22 | #define DIAG_CFG_CTR (MISC_BASE + 0x004) |
23 | #define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008)) | 23 | #define PLL1_CTR (MISC_BASE + 0x008) |
24 | #define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C)) | 24 | #define PLL1_FRQ (MISC_BASE + 0x00C) |
25 | #define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010)) | 25 | #define PLL1_MOD (MISC_BASE + 0x010) |
26 | #define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014)) | 26 | #define PLL2_CTR (MISC_BASE + 0x014) |
27 | /* PLL_CTR register masks */ | 27 | /* PLL_CTR register masks */ |
28 | #define PLL_ENABLE 2 | 28 | #define PLL_ENABLE 2 |
29 | #define PLL_MODE_SHIFT 4 | 29 | #define PLL_MODE_SHIFT 4 |
@@ -33,7 +33,7 @@ | |||
33 | #define PLL_MODE_DITH_DSB 2 | 33 | #define PLL_MODE_DITH_DSB 2 |
34 | #define PLL_MODE_DITH_SSB 3 | 34 | #define PLL_MODE_DITH_SSB 3 |
35 | 35 | ||
36 | #define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018)) | 36 | #define PLL2_FRQ (MISC_BASE + 0x018) |
37 | /* PLL FRQ register masks */ | 37 | /* PLL FRQ register masks */ |
38 | #define PLL_DIV_N_SHIFT 0 | 38 | #define PLL_DIV_N_SHIFT 0 |
39 | #define PLL_DIV_N_MASK 0xFF | 39 | #define PLL_DIV_N_MASK 0xFF |
@@ -44,16 +44,16 @@ | |||
44 | #define PLL_DITH_FDBK_M_SHIFT 16 | 44 | #define PLL_DITH_FDBK_M_SHIFT 16 |
45 | #define PLL_DITH_FDBK_M_MASK 0xFFFF | 45 | #define PLL_DITH_FDBK_M_MASK 0xFFFF |
46 | 46 | ||
47 | #define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C)) | 47 | #define PLL2_MOD (MISC_BASE + 0x01C) |
48 | #define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020)) | 48 | #define PLL_CLK_CFG (MISC_BASE + 0x020) |
49 | #define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024)) | 49 | #define CORE_CLK_CFG (MISC_BASE + 0x024) |
50 | /* CORE CLK CFG register masks */ | 50 | /* CORE CLK CFG register masks */ |
51 | #define PLL_HCLK_RATIO_SHIFT 10 | 51 | #define PLL_HCLK_RATIO_SHIFT 10 |
52 | #define PLL_HCLK_RATIO_MASK 0x3 | 52 | #define PLL_HCLK_RATIO_MASK 0x3 |
53 | #define HCLK_PCLK_RATIO_SHIFT 8 | 53 | #define HCLK_PCLK_RATIO_SHIFT 8 |
54 | #define HCLK_PCLK_RATIO_MASK 0x3 | 54 | #define HCLK_PCLK_RATIO_MASK 0x3 |
55 | 55 | ||
56 | #define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028)) | 56 | #define PERIP_CLK_CFG (MISC_BASE + 0x028) |
57 | /* PERIP_CLK_CFG register masks */ | 57 | /* PERIP_CLK_CFG register masks */ |
58 | #define UART_CLK_SHIFT 4 | 58 | #define UART_CLK_SHIFT 4 |
59 | #define UART_CLK_MASK 0x1 | 59 | #define UART_CLK_MASK 0x1 |
@@ -63,10 +63,10 @@ | |||
63 | #define GPT1_CLK_SHIFT 11 | 63 | #define GPT1_CLK_SHIFT 11 |
64 | #define GPT2_CLK_SHIFT 12 | 64 | #define GPT2_CLK_SHIFT 12 |
65 | #define GPT_CLK_MASK 0x1 | 65 | #define GPT_CLK_MASK 0x1 |
66 | #define AUX_CLK_PLL3_MASK 0 | 66 | #define AUX_CLK_PLL3_VAL 0 |
67 | #define AUX_CLK_PLL1_MASK 1 | 67 | #define AUX_CLK_PLL1_VAL 1 |
68 | 68 | ||
69 | #define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C)) | 69 | #define PERIP1_CLK_ENB (MISC_BASE + 0x02C) |
70 | /* PERIP1_CLK_ENB register masks */ | 70 | /* PERIP1_CLK_ENB register masks */ |
71 | #define UART_CLK_ENB 3 | 71 | #define UART_CLK_ENB 3 |
72 | #define SSP_CLK_ENB 5 | 72 | #define SSP_CLK_ENB 5 |
@@ -85,34 +85,35 @@ | |||
85 | #define USBH_CLK_ENB 25 | 85 | #define USBH_CLK_ENB 25 |
86 | #define C3_CLK_ENB 31 | 86 | #define C3_CLK_ENB 31 |
87 | 87 | ||
88 | #define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030)) | 88 | #define SOC_CORE_ID (MISC_BASE + 0x030) |
89 | #define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034)) | 89 | #define RAS_CLK_ENB (MISC_BASE + 0x034) |
90 | #define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038)) | 90 | #define PERIP1_SOF_RST (MISC_BASE + 0x038) |
91 | /* PERIP1_SOF_RST register masks */ | 91 | /* PERIP1_SOF_RST register masks */ |
92 | #define JPEG_SOF_RST 8 | 92 | #define JPEG_SOF_RST 8 |
93 | 93 | ||
94 | #define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C)) | 94 | #define SOC_USER_ID (MISC_BASE + 0x03C) |
95 | #define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040)) | 95 | #define RAS_SOF_RST (MISC_BASE + 0x040) |
96 | #define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044)) | 96 | #define PRSC1_CLK_CFG (MISC_BASE + 0x044) |
97 | #define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048)) | 97 | #define PRSC2_CLK_CFG (MISC_BASE + 0x048) |
98 | #define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C)) | 98 | #define PRSC3_CLK_CFG (MISC_BASE + 0x04C) |
99 | /* gpt synthesizer register masks */ | 99 | /* gpt synthesizer register masks */ |
100 | #define GPT_MSCALE_SHIFT 0 | 100 | #define GPT_MSCALE_SHIFT 0 |
101 | #define GPT_MSCALE_MASK 0xFFF | 101 | #define GPT_MSCALE_MASK 0xFFF |
102 | #define GPT_NSCALE_SHIFT 12 | 102 | #define GPT_NSCALE_SHIFT 12 |
103 | #define GPT_NSCALE_MASK 0xF | 103 | #define GPT_NSCALE_MASK 0xF |
104 | 104 | ||
105 | #define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050)) | 105 | #define AMEM_CLK_CFG (MISC_BASE + 0x050) |
106 | #define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054)) | 106 | #define EXPI_CLK_CFG (MISC_BASE + 0x054) |
107 | #define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C)) | 107 | #define CLCD_CLK_SYNT (MISC_BASE + 0x05C) |
108 | #define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060)) | 108 | #define FIRDA_CLK_SYNT (MISC_BASE + 0x060) |
109 | #define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064)) | 109 | #define UART_CLK_SYNT (MISC_BASE + 0x064) |
110 | #define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068)) | 110 | #define GMAC_CLK_SYNT (MISC_BASE + 0x068) |
111 | #define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C)) | 111 | #define RAS1_CLK_SYNT (MISC_BASE + 0x06C) |
112 | #define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070)) | 112 | #define RAS2_CLK_SYNT (MISC_BASE + 0x070) |
113 | #define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074)) | 113 | #define RAS3_CLK_SYNT (MISC_BASE + 0x074) |
114 | #define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078)) | 114 | #define RAS4_CLK_SYNT (MISC_BASE + 0x078) |
115 | /* aux clk synthesiser register masks for irda to ras4 */ | 115 | /* aux clk synthesiser register masks for irda to ras4 */ |
116 | #define AUX_SYNT_ENB 31 | ||
116 | #define AUX_EQ_SEL_SHIFT 30 | 117 | #define AUX_EQ_SEL_SHIFT 30 |
117 | #define AUX_EQ_SEL_MASK 1 | 118 | #define AUX_EQ_SEL_MASK 1 |
118 | #define AUX_EQ1_SEL 0 | 119 | #define AUX_EQ1_SEL 0 |
@@ -122,42 +123,42 @@ | |||
122 | #define AUX_YSCALE_SHIFT 0 | 123 | #define AUX_YSCALE_SHIFT 0 |
123 | #define AUX_YSCALE_MASK 0xFFF | 124 | #define AUX_YSCALE_MASK 0xFFF |
124 | 125 | ||
125 | #define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C)) | 126 | #define ICM1_ARB_CFG (MISC_BASE + 0x07C) |
126 | #define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080)) | 127 | #define ICM2_ARB_CFG (MISC_BASE + 0x080) |
127 | #define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084)) | 128 | #define ICM3_ARB_CFG (MISC_BASE + 0x084) |
128 | #define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088)) | 129 | #define ICM4_ARB_CFG (MISC_BASE + 0x088) |
129 | #define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C)) | 130 | #define ICM5_ARB_CFG (MISC_BASE + 0x08C) |
130 | #define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090)) | 131 | #define ICM6_ARB_CFG (MISC_BASE + 0x090) |
131 | #define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094)) | 132 | #define ICM7_ARB_CFG (MISC_BASE + 0x094) |
132 | #define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098)) | 133 | #define ICM8_ARB_CFG (MISC_BASE + 0x098) |
133 | #define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C)) | 134 | #define ICM9_ARB_CFG (MISC_BASE + 0x09C) |
134 | #define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0)) | 135 | #define DMA_CHN_CFG (MISC_BASE + 0x0A0) |
135 | #define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4)) | 136 | #define USB2_PHY_CFG (MISC_BASE + 0x0A4) |
136 | #define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8)) | 137 | #define GMAC_CFG_CTR (MISC_BASE + 0x0A8) |
137 | #define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC)) | 138 | #define EXPI_CFG_CTR (MISC_BASE + 0x0AC) |
138 | #define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0)) | 139 | #define PRC1_LOCK_CTR (MISC_BASE + 0x0C0) |
139 | #define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4)) | 140 | #define PRC2_LOCK_CTR (MISC_BASE + 0x0C4) |
140 | #define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8)) | 141 | #define PRC3_LOCK_CTR (MISC_BASE + 0x0C8) |
141 | #define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC)) | 142 | #define PRC4_LOCK_CTR (MISC_BASE + 0x0CC) |
142 | #define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0)) | 143 | #define PRC1_IRQ_CTR (MISC_BASE + 0x0D0) |
143 | #define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4)) | 144 | #define PRC2_IRQ_CTR (MISC_BASE + 0x0D4) |
144 | #define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8)) | 145 | #define PRC3_IRQ_CTR (MISC_BASE + 0x0D8) |
145 | #define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC)) | 146 | #define PRC4_IRQ_CTR (MISC_BASE + 0x0DC) |
146 | #define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0)) | 147 | #define PWRDOWN_CFG_CTR (MISC_BASE + 0x0E0) |
147 | #define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4)) | 148 | #define COMPSSTL_1V8_CFG (MISC_BASE + 0x0E4) |
148 | #define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8)) | 149 | #define COMPSSTL_2V5_CFG (MISC_BASE + 0x0E8) |
149 | #define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC)) | 150 | #define COMPCOR_3V3_CFG (MISC_BASE + 0x0EC) |
150 | #define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0)) | 151 | #define SSTLPAD_CFG_CTR (MISC_BASE + 0x0F0) |
151 | #define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4)) | 152 | #define BIST1_CFG_CTR (MISC_BASE + 0x0F4) |
152 | #define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8)) | 153 | #define BIST2_CFG_CTR (MISC_BASE + 0x0F8) |
153 | #define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC)) | 154 | #define BIST3_CFG_CTR (MISC_BASE + 0x0FC) |
154 | #define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100)) | 155 | #define BIST4_CFG_CTR (MISC_BASE + 0x100) |
155 | #define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104)) | 156 | #define BIST5_CFG_CTR (MISC_BASE + 0x104) |
156 | #define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108)) | 157 | #define BIST1_STS_RES (MISC_BASE + 0x108) |
157 | #define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C)) | 158 | #define BIST2_STS_RES (MISC_BASE + 0x10C) |
158 | #define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110)) | 159 | #define BIST3_STS_RES (MISC_BASE + 0x110) |
159 | #define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114)) | 160 | #define BIST4_STS_RES (MISC_BASE + 0x114) |
160 | #define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118)) | 161 | #define BIST5_STS_RES (MISC_BASE + 0x118) |
161 | #define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C)) | 162 | #define SYSERR_CFG_CTR (MISC_BASE + 0x11C) |
162 | 163 | ||
163 | #endif /* __MACH_MISC_REGS_H */ | 164 | #endif /* __MACH_MISC_REGS_H */ |
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h index dcca8568a486..63fd98356919 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ b/arch/arm/mach-spear3xx/include/mach/spear.h | |||
@@ -14,124 +14,61 @@ | |||
14 | #ifndef __MACH_SPEAR3XX_H | 14 | #ifndef __MACH_SPEAR3XX_H |
15 | #define __MACH_SPEAR3XX_H | 15 | #define __MACH_SPEAR3XX_H |
16 | 16 | ||
17 | #include <mach/hardware.h> | 17 | #include <asm/memory.h> |
18 | #include <mach/spear300.h> | 18 | #include <mach/spear300.h> |
19 | #include <mach/spear310.h> | 19 | #include <mach/spear310.h> |
20 | #include <mach/spear320.h> | 20 | #include <mach/spear320.h> |
21 | 21 | ||
22 | #define SPEAR3XX_ML_SDRAM_BASE 0x00000000 | 22 | #define SPEAR3XX_ML_SDRAM_BASE UL(0x00000000) |
23 | #define SPEAR3XX_ML_SDRAM_SIZE 0x40000000 | ||
24 | 23 | ||
25 | #define SPEAR3XX_ICM9_BASE 0xC0000000 | 24 | #define SPEAR3XX_ICM9_BASE UL(0xC0000000) |
26 | #define SPEAR3XX_ICM9_SIZE 0x10000000 | ||
27 | 25 | ||
28 | /* ICM1 - Low speed connection */ | 26 | /* ICM1 - Low speed connection */ |
29 | #define SPEAR3XX_ICM1_2_BASE 0xD0000000 | 27 | #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000) |
30 | #define SPEAR3XX_ICM1_2_SIZE 0x10000000 | 28 | #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000) |
31 | |||
32 | #define SPEAR3XX_ICM1_UART_BASE 0xD0000000 | ||
33 | #define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE) | 29 | #define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE) |
34 | #define SPEAR3XX_ICM1_UART_SIZE 0x00080000 | 30 | #define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000) |
35 | 31 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) | |
36 | #define SPEAR3XX_ICM1_ADC_BASE 0xD0080000 | 32 | #define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000) |
37 | #define SPEAR3XX_ICM1_ADC_SIZE 0x00080000 | 33 | #define SPEAR3XX_ICM1_JPEG_BASE UL(0xD0800000) |
38 | 34 | #define SPEAR3XX_ICM1_IRDA_BASE UL(0xD1000000) | |
39 | #define SPEAR3XX_ICM1_SSP_BASE 0xD0100000 | 35 | #define SPEAR3XX_ICM1_SRAM_BASE UL(0xD2800000) |
40 | #define SPEAR3XX_ICM1_SSP_SIZE 0x00080000 | ||
41 | |||
42 | #define SPEAR3XX_ICM1_I2C_BASE 0xD0180000 | ||
43 | #define SPEAR3XX_ICM1_I2C_SIZE 0x00080000 | ||
44 | |||
45 | #define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000 | ||
46 | #define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000 | ||
47 | |||
48 | #define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000 | ||
49 | #define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000 | ||
50 | |||
51 | #define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000 | ||
52 | #define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000 | ||
53 | 36 | ||
54 | /* ICM2 - Application Subsystem */ | 37 | /* ICM2 - Application Subsystem */ |
55 | #define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000 | 38 | #define SPEAR3XX_ICM2_HWACCEL0_BASE UL(0xD8800000) |
56 | #define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000 | 39 | #define SPEAR3XX_ICM2_HWACCEL1_BASE UL(0xD9000000) |
57 | |||
58 | #define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000 | ||
59 | #define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000 | ||
60 | 40 | ||
61 | /* ICM4 - High Speed Connection */ | 41 | /* ICM4 - High Speed Connection */ |
62 | #define SPEAR3XX_ICM4_BASE 0xE0000000 | 42 | #define SPEAR3XX_ICM4_BASE UL(0xE0000000) |
63 | #define SPEAR3XX_ICM4_SIZE 0x08000000 | 43 | #define SPEAR3XX_ICM4_MII_BASE UL(0xE0800000) |
64 | 44 | #define SPEAR3XX_ICM4_USBD_FIFO_BASE UL(0xE1000000) | |
65 | #define SPEAR3XX_ICM4_MII_BASE 0xE0800000 | 45 | #define SPEAR3XX_ICM4_USBD_CSR_BASE UL(0xE1100000) |
66 | #define SPEAR3XX_ICM4_MII_SIZE 0x00800000 | 46 | #define SPEAR3XX_ICM4_USBD_PLDT_BASE UL(0xE1200000) |
67 | 47 | #define SPEAR3XX_ICM4_USB_EHCI0_1_BASE UL(0xE1800000) | |
68 | #define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000 | 48 | #define SPEAR3XX_ICM4_USB_OHCI0_BASE UL(0xE1900000) |
69 | #define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000 | 49 | #define SPEAR3XX_ICM4_USB_OHCI1_BASE UL(0xE2100000) |
70 | 50 | #define SPEAR3XX_ICM4_USB_ARB_BASE UL(0xE2800000) | |
71 | #define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000 | ||
72 | #define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000 | ||
73 | |||
74 | #define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000 | ||
75 | #define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000 | ||
76 | |||
77 | #define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000 | ||
78 | #define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000 | ||
79 | |||
80 | #define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000 | ||
81 | #define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000 | ||
82 | |||
83 | #define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000 | ||
84 | #define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000 | ||
85 | |||
86 | #define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000 | ||
87 | #define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000 | ||
88 | 51 | ||
89 | /* ML1 - Multi Layer CPU Subsystem */ | 52 | /* ML1 - Multi Layer CPU Subsystem */ |
90 | #define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000 | 53 | #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) |
91 | #define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000 | 54 | #define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000) |
92 | 55 | #define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000) | |
93 | #define SPEAR3XX_ML1_TMR_BASE 0xF0000000 | ||
94 | #define SPEAR3XX_ML1_TMR_SIZE 0x00100000 | ||
95 | |||
96 | #define SPEAR3XX_ML1_VIC_BASE 0xF1100000 | ||
97 | #define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE) | 56 | #define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE) |
98 | #define SPEAR3XX_ML1_VIC_SIZE 0x00100000 | ||
99 | 57 | ||
100 | /* ICM3 - Basic Subsystem */ | 58 | /* ICM3 - Basic Subsystem */ |
101 | #define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000 | 59 | #define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000) |
102 | #define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000 | 60 | #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
103 | 61 | #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000) | |
104 | #define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000 | 62 | #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) |
105 | #define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000 | 63 | #define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000) |
106 | 64 | #define SPEAR3XX_ICM3_WDT_BASE UL(0xFC880000) | |
107 | #define SPEAR3XX_ICM3_DMA_BASE 0xFC400000 | 65 | #define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000) |
108 | #define SPEAR3XX_ICM3_DMA_SIZE 0x00200000 | 66 | #define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000) |
109 | 67 | #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) | |
110 | #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000 | ||
111 | #define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000 | ||
112 | |||
113 | #define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000 | ||
114 | #define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000 | ||
115 | |||
116 | #define SPEAR3XX_ICM3_WDT_BASE 0xFC880000 | ||
117 | #define SPEAR3XX_ICM3_WDT_SIZE 0x00080000 | ||
118 | |||
119 | #define SPEAR3XX_ICM3_RTC_BASE 0xFC900000 | ||
120 | #define SPEAR3XX_ICM3_RTC_SIZE 0x00080000 | ||
121 | |||
122 | #define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000 | ||
123 | #define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000 | ||
124 | |||
125 | #define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000 | ||
126 | #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE) | 68 | #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE) |
127 | #define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000 | 69 | #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000) |
128 | |||
129 | #define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000 | ||
130 | #define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE) | 70 | #define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE) |
131 | #define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000 | 71 | #define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000) |
132 | |||
133 | #define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000 | ||
134 | #define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000 | ||
135 | 72 | ||
136 | /* Debug uart for linux, will be used for debug and uncompress messages */ | 73 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
137 | #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE | 74 | #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE |
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h index ccaa76522ee2..c723515f8853 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear300.h +++ b/arch/arm/mach-spear3xx/include/mach/spear300.h | |||
@@ -17,11 +17,9 @@ | |||
17 | #define __MACH_SPEAR300_H | 17 | #define __MACH_SPEAR300_H |
18 | 18 | ||
19 | /* Base address of various IPs */ | 19 | /* Base address of various IPs */ |
20 | #define SPEAR300_TELECOM_BASE 0x50000000 | 20 | #define SPEAR300_TELECOM_BASE UL(0x50000000) |
21 | #define SPEAR300_TELECOM_SIZE 0x10000000 | ||
22 | 21 | ||
23 | /* Interrupt registers offsets and masks */ | 22 | /* Interrupt registers offsets and masks */ |
24 | #define SPEAR300_TELECOM_REG_SIZE 0x00010000 | ||
25 | #define INT_ENB_MASK_REG 0x54 | 23 | #define INT_ENB_MASK_REG 0x54 |
26 | #define INT_STS_MASK_REG 0x58 | 24 | #define INT_STS_MASK_REG 0x58 |
27 | #define IT_PERS_S_IRQ_MASK (1 << 0) | 25 | #define IT_PERS_S_IRQ_MASK (1 << 0) |
@@ -36,47 +34,20 @@ | |||
36 | 34 | ||
37 | #define SHIRQ_RAS1_MASK 0x1FF | 35 | #define SHIRQ_RAS1_MASK 0x1FF |
38 | 36 | ||
39 | #define SPEAR300_CLCD_BASE 0x60000000 | 37 | #define SPEAR300_CLCD_BASE UL(0x60000000) |
40 | #define SPEAR300_CLCD_SIZE 0x10000000 | 38 | #define SPEAR300_SDHCI_BASE UL(0x70000000) |
41 | 39 | #define SPEAR300_NAND_0_BASE UL(0x80000000) | |
42 | #define SPEAR300_SDIO_BASE 0x70000000 | 40 | #define SPEAR300_NAND_1_BASE UL(0x84000000) |
43 | #define SPEAR300_SDIO_SIZE 0x10000000 | 41 | #define SPEAR300_NAND_2_BASE UL(0x88000000) |
44 | 42 | #define SPEAR300_NAND_3_BASE UL(0x8c000000) | |
45 | #define SPEAR300_NAND_0_BASE 0x80000000 | 43 | #define SPEAR300_NOR_0_BASE UL(0x90000000) |
46 | #define SPEAR300_NAND_0_SIZE 0x04000000 | 44 | #define SPEAR300_NOR_1_BASE UL(0x91000000) |
47 | 45 | #define SPEAR300_NOR_2_BASE UL(0x92000000) | |
48 | #define SPEAR300_NAND_1_BASE 0x84000000 | 46 | #define SPEAR300_NOR_3_BASE UL(0x93000000) |
49 | #define SPEAR300_NAND_1_SIZE 0x04000000 | 47 | #define SPEAR300_FSMC_BASE UL(0x94000000) |
50 | 48 | #define SPEAR300_SOC_CONFIG_BASE UL(0x99000000) | |
51 | #define SPEAR300_NAND_2_BASE 0x88000000 | 49 | #define SPEAR300_KEYBOARD_BASE UL(0xA0000000) |
52 | #define SPEAR300_NAND_2_SIZE 0x04000000 | 50 | #define SPEAR300_GPIO_BASE UL(0xA9000000) |
53 | |||
54 | #define SPEAR300_NAND_3_BASE 0x8c000000 | ||
55 | #define SPEAR300_NAND_3_SIZE 0x04000000 | ||
56 | |||
57 | #define SPEAR300_NOR_0_BASE 0x90000000 | ||
58 | #define SPEAR300_NOR_0_SIZE 0x01000000 | ||
59 | |||
60 | #define SPEAR300_NOR_1_BASE 0x91000000 | ||
61 | #define SPEAR300_NOR_1_SIZE 0x01000000 | ||
62 | |||
63 | #define SPEAR300_NOR_2_BASE 0x92000000 | ||
64 | #define SPEAR300_NOR_2_SIZE 0x01000000 | ||
65 | |||
66 | #define SPEAR300_NOR_3_BASE 0x93000000 | ||
67 | #define SPEAR300_NOR_3_SIZE 0x01000000 | ||
68 | |||
69 | #define SPEAR300_FSMC_BASE 0x94000000 | ||
70 | #define SPEAR300_FSMC_SIZE 0x05000000 | ||
71 | |||
72 | #define SPEAR300_SOC_CONFIG_BASE 0x99000000 | ||
73 | #define SPEAR300_SOC_CONFIG_SIZE 0x00000008 | ||
74 | |||
75 | #define SPEAR300_KEYBOARD_BASE 0xA0000000 | ||
76 | #define SPEAR300_KEYBOARD_SIZE 0x09000000 | ||
77 | |||
78 | #define SPEAR300_GPIO_BASE 0xA9000000 | ||
79 | #define SPEAR300_GPIO_SIZE 0x07000000 | ||
80 | 51 | ||
81 | #endif /* __MACH_SPEAR300_H */ | 52 | #endif /* __MACH_SPEAR300_H */ |
82 | 53 | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h index b27bb8af3309..1e853479b8cd 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear310.h +++ b/arch/arm/mach-spear3xx/include/mach/spear310.h | |||
@@ -16,30 +16,18 @@ | |||
16 | #ifndef __MACH_SPEAR310_H | 16 | #ifndef __MACH_SPEAR310_H |
17 | #define __MACH_SPEAR310_H | 17 | #define __MACH_SPEAR310_H |
18 | 18 | ||
19 | #define SPEAR310_NAND_BASE 0x40000000 | 19 | #define SPEAR310_NAND_BASE UL(0x40000000) |
20 | #define SPEAR310_NAND_SIZE 0x04000000 | 20 | #define SPEAR310_FSMC_BASE UL(0x44000000) |
21 | #define SPEAR310_UART1_BASE UL(0xB2000000) | ||
22 | #define SPEAR310_UART2_BASE UL(0xB2080000) | ||
23 | #define SPEAR310_UART3_BASE UL(0xB2100000) | ||
24 | #define SPEAR310_UART4_BASE UL(0xB2180000) | ||
25 | #define SPEAR310_UART5_BASE UL(0xB2200000) | ||
26 | #define SPEAR310_HDLC_BASE UL(0xB2800000) | ||
27 | #define SPEAR310_RS485_0_BASE UL(0xB3000000) | ||
28 | #define SPEAR310_RS485_1_BASE UL(0xB3800000) | ||
29 | #define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) | ||
21 | 30 | ||
22 | #define SPEAR310_FSMC_BASE 0x44000000 | ||
23 | #define SPEAR310_FSMC_SIZE 0x01000000 | ||
24 | |||
25 | #define SPEAR310_UART1_BASE 0xB2000000 | ||
26 | #define SPEAR310_UART2_BASE 0xB2080000 | ||
27 | #define SPEAR310_UART3_BASE 0xB2100000 | ||
28 | #define SPEAR310_UART4_BASE 0xB2180000 | ||
29 | #define SPEAR310_UART5_BASE 0xB2200000 | ||
30 | #define SPEAR310_UART_SIZE 0x00080000 | ||
31 | |||
32 | #define SPEAR310_HDLC_BASE 0xB2800000 | ||
33 | #define SPEAR310_HDLC_SIZE 0x00800000 | ||
34 | |||
35 | #define SPEAR310_RS485_0_BASE 0xB3000000 | ||
36 | #define SPEAR310_RS485_0_SIZE 0x00800000 | ||
37 | |||
38 | #define SPEAR310_RS485_1_BASE 0xB3800000 | ||
39 | #define SPEAR310_RS485_1_SIZE 0x00800000 | ||
40 | |||
41 | #define SPEAR310_SOC_CONFIG_BASE 0xB4000000 | ||
42 | #define SPEAR310_SOC_CONFIG_SIZE 0x00000070 | ||
43 | /* Interrupt registers offsets and masks */ | 31 | /* Interrupt registers offsets and masks */ |
44 | #define INT_STS_MASK_REG 0x04 | 32 | #define INT_STS_MASK_REG 0x04 |
45 | #define SMII0_IRQ_MASK (1 << 0) | 33 | #define SMII0_IRQ_MASK (1 << 0) |
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h index cacf17a958cd..940f0d85d959 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear320.h +++ b/arch/arm/mach-spear3xx/include/mach/spear320.h | |||
@@ -16,54 +16,25 @@ | |||
16 | #ifndef __MACH_SPEAR320_H | 16 | #ifndef __MACH_SPEAR320_H |
17 | #define __MACH_SPEAR320_H | 17 | #define __MACH_SPEAR320_H |
18 | 18 | ||
19 | #define SPEAR320_EMI_CTRL_BASE 0x40000000 | 19 | #define SPEAR320_EMI_CTRL_BASE UL(0x40000000) |
20 | #define SPEAR320_EMI_CTRL_SIZE 0x08000000 | 20 | #define SPEAR320_FSMC_BASE UL(0x4C000000) |
21 | #define SPEAR320_NAND_BASE UL(0x50000000) | ||
22 | #define SPEAR320_I2S_BASE UL(0x60000000) | ||
23 | #define SPEAR320_SDHCI_BASE UL(0x70000000) | ||
24 | #define SPEAR320_CLCD_BASE UL(0x90000000) | ||
25 | #define SPEAR320_PAR_PORT_BASE UL(0xA0000000) | ||
26 | #define SPEAR320_CAN0_BASE UL(0xA1000000) | ||
27 | #define SPEAR320_CAN1_BASE UL(0xA2000000) | ||
28 | #define SPEAR320_UART1_BASE UL(0xA3000000) | ||
29 | #define SPEAR320_UART2_BASE UL(0xA4000000) | ||
30 | #define SPEAR320_SSP0_BASE UL(0xA5000000) | ||
31 | #define SPEAR320_SSP1_BASE UL(0xA6000000) | ||
32 | #define SPEAR320_I2C_BASE UL(0xA7000000) | ||
33 | #define SPEAR320_PWM_BASE UL(0xA8000000) | ||
34 | #define SPEAR320_SMII0_BASE UL(0xAA000000) | ||
35 | #define SPEAR320_SMII1_BASE UL(0xAB000000) | ||
36 | #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) | ||
21 | 37 | ||
22 | #define SPEAR320_FSMC_BASE 0x4C000000 | ||
23 | #define SPEAR320_FSMC_SIZE 0x01000000 | ||
24 | |||
25 | #define SPEAR320_I2S_BASE 0x60000000 | ||
26 | #define SPEAR320_I2S_SIZE 0x10000000 | ||
27 | |||
28 | #define SPEAR320_SDIO_BASE 0x70000000 | ||
29 | #define SPEAR320_SDIO_SIZE 0x10000000 | ||
30 | |||
31 | #define SPEAR320_CLCD_BASE 0x90000000 | ||
32 | #define SPEAR320_CLCD_SIZE 0x10000000 | ||
33 | |||
34 | #define SPEAR320_PAR_PORT_BASE 0xA0000000 | ||
35 | #define SPEAR320_PAR_PORT_SIZE 0x01000000 | ||
36 | |||
37 | #define SPEAR320_CAN0_BASE 0xA1000000 | ||
38 | #define SPEAR320_CAN0_SIZE 0x01000000 | ||
39 | |||
40 | #define SPEAR320_CAN1_BASE 0xA2000000 | ||
41 | #define SPEAR320_CAN1_SIZE 0x01000000 | ||
42 | |||
43 | #define SPEAR320_UART1_BASE 0xA3000000 | ||
44 | #define SPEAR320_UART2_BASE 0xA4000000 | ||
45 | #define SPEAR320_UART_SIZE 0x01000000 | ||
46 | |||
47 | #define SPEAR320_SSP0_BASE 0xA5000000 | ||
48 | #define SPEAR320_SSP0_SIZE 0x01000000 | ||
49 | |||
50 | #define SPEAR320_SSP1_BASE 0xA6000000 | ||
51 | #define SPEAR320_SSP1_SIZE 0x01000000 | ||
52 | |||
53 | #define SPEAR320_I2C_BASE 0xA7000000 | ||
54 | #define SPEAR320_I2C_SIZE 0x01000000 | ||
55 | |||
56 | #define SPEAR320_PWM_BASE 0xA8000000 | ||
57 | #define SPEAR320_PWM_SIZE 0x01000000 | ||
58 | |||
59 | #define SPEAR320_SMII0_BASE 0xAA000000 | ||
60 | #define SPEAR320_SMII0_SIZE 0x01000000 | ||
61 | |||
62 | #define SPEAR320_SMII1_BASE 0xAB000000 | ||
63 | #define SPEAR320_SMII1_SIZE 0x01000000 | ||
64 | |||
65 | #define SPEAR320_SOC_CONFIG_BASE 0xB4000000 | ||
66 | #define SPEAR320_SOC_CONFIG_SIZE 0x00000070 | ||
67 | /* Interrupt registers offsets and masks */ | 38 | /* Interrupt registers offsets and masks */ |
68 | #define INT_STS_MASK_REG 0x04 | 39 | #define INT_STS_MASK_REG 0x04 |
69 | #define INT_CLR_MASK_REG 0x04 | 40 | #define INT_CLR_MASK_REG 0x04 |
@@ -74,7 +45,7 @@ | |||
74 | #define EMI_IRQ_MASK (1 << 7) | 45 | #define EMI_IRQ_MASK (1 << 7) |
75 | #define CLCD_IRQ_MASK (1 << 8) | 46 | #define CLCD_IRQ_MASK (1 << 8) |
76 | #define SPP_IRQ_MASK (1 << 9) | 47 | #define SPP_IRQ_MASK (1 << 9) |
77 | #define SDIO_IRQ_MASK (1 << 10) | 48 | #define SDHCI_IRQ_MASK (1 << 10) |
78 | #define CAN_U_IRQ_MASK (1 << 11) | 49 | #define CAN_U_IRQ_MASK (1 << 11) |
79 | #define CAN_L_IRQ_MASK (1 << 12) | 50 | #define CAN_L_IRQ_MASK (1 << 12) |
80 | #define UART1_IRQ_MASK (1 << 13) | 51 | #define UART1_IRQ_MASK (1 << 13) |
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index 5aa2d54ebfaa..2697e65adf86 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -15,9 +15,9 @@ | |||
15 | #include <linux/amba/pl061.h> | 15 | #include <linux/amba/pl061.h> |
16 | #include <linux/ptrace.h> | 16 | #include <linux/ptrace.h> |
17 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
18 | #include <mach/generic.h> | ||
19 | #include <mach/spear.h> | ||
20 | #include <plat/shirq.h> | 18 | #include <plat/shirq.h> |
19 | #include <mach/generic.h> | ||
20 | #include <mach/hardware.h> | ||
21 | 21 | ||
22 | /* pad multiplexing support */ | 22 | /* pad multiplexing support */ |
23 | /* muxing registers */ | 23 | /* muxing registers */ |
@@ -310,7 +310,7 @@ struct pmx_dev pmx_telecom_boot_pins = { | |||
310 | .enb_on_reset = 1, | 310 | .enb_on_reset = 1, |
311 | }; | 311 | }; |
312 | 312 | ||
313 | struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = { | 313 | struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = { |
314 | { | 314 | { |
315 | .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | | 315 | .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | |
316 | HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | | 316 | HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | |
@@ -323,14 +323,14 @@ struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = { | |||
323 | }, | 323 | }, |
324 | }; | 324 | }; |
325 | 325 | ||
326 | struct pmx_dev pmx_telecom_sdio_4bit = { | 326 | struct pmx_dev pmx_telecom_sdhci_4bit = { |
327 | .name = "telecom_sdio_4bit", | 327 | .name = "telecom_sdhci_4bit", |
328 | .modes = pmx_telecom_sdio_4bit_modes, | 328 | .modes = pmx_telecom_sdhci_4bit_modes, |
329 | .mode_count = ARRAY_SIZE(pmx_telecom_sdio_4bit_modes), | 329 | .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes), |
330 | .enb_on_reset = 1, | 330 | .enb_on_reset = 1, |
331 | }; | 331 | }; |
332 | 332 | ||
333 | struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = { | 333 | struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = { |
334 | { | 334 | { |
335 | .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | | 335 | .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | |
336 | HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | | 336 | HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | |
@@ -342,10 +342,10 @@ struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = { | |||
342 | }, | 342 | }, |
343 | }; | 343 | }; |
344 | 344 | ||
345 | struct pmx_dev pmx_telecom_sdio_8bit = { | 345 | struct pmx_dev pmx_telecom_sdhci_8bit = { |
346 | .name = "telecom_sdio_8bit", | 346 | .name = "telecom_sdhci_8bit", |
347 | .modes = pmx_telecom_sdio_8bit_modes, | 347 | .modes = pmx_telecom_sdhci_8bit_modes, |
348 | .mode_count = ARRAY_SIZE(pmx_telecom_sdio_8bit_modes), | 348 | .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes), |
349 | .enb_on_reset = 1, | 349 | .enb_on_reset = 1, |
350 | }; | 350 | }; |
351 | 351 | ||
@@ -370,26 +370,6 @@ struct pmx_driver pmx_driver = { | |||
370 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, | 370 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, |
371 | }; | 371 | }; |
372 | 372 | ||
373 | /* Add spear300 specific devices here */ | ||
374 | /* arm gpio1 device registration */ | ||
375 | static struct pl061_platform_data gpio1_plat_data = { | ||
376 | .gpio_base = 8, | ||
377 | .irq_base = SPEAR_GPIO1_INT_BASE, | ||
378 | }; | ||
379 | |||
380 | struct amba_device gpio1_device = { | ||
381 | .dev = { | ||
382 | .init_name = "gpio1", | ||
383 | .platform_data = &gpio1_plat_data, | ||
384 | }, | ||
385 | .res = { | ||
386 | .start = SPEAR300_GPIO_BASE, | ||
387 | .end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1, | ||
388 | .flags = IORESOURCE_MEM, | ||
389 | }, | ||
390 | .irq = {VIRQ_GPIO1, NO_IRQ}, | ||
391 | }; | ||
392 | |||
393 | /* spear3xx shared irq */ | 373 | /* spear3xx shared irq */ |
394 | struct shirq_dev_config shirq_ras1_config[] = { | 374 | struct shirq_dev_config shirq_ras1_config[] = { |
395 | { | 375 | { |
@@ -443,6 +423,26 @@ struct spear_shirq shirq_ras1 = { | |||
443 | }, | 423 | }, |
444 | }; | 424 | }; |
445 | 425 | ||
426 | /* Add spear300 specific devices here */ | ||
427 | /* arm gpio1 device registration */ | ||
428 | static struct pl061_platform_data gpio1_plat_data = { | ||
429 | .gpio_base = 8, | ||
430 | .irq_base = SPEAR_GPIO1_INT_BASE, | ||
431 | }; | ||
432 | |||
433 | struct amba_device gpio1_device = { | ||
434 | .dev = { | ||
435 | .init_name = "gpio1", | ||
436 | .platform_data = &gpio1_plat_data, | ||
437 | }, | ||
438 | .res = { | ||
439 | .start = SPEAR300_GPIO_BASE, | ||
440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, | ||
441 | .flags = IORESOURCE_MEM, | ||
442 | }, | ||
443 | .irq = {VIRQ_GPIO1, NO_IRQ}, | ||
444 | }; | ||
445 | |||
446 | /* spear300 routines */ | 446 | /* spear300 routines */ |
447 | void __init spear300_init(void) | 447 | void __init spear300_init(void) |
448 | { | 448 | { |
@@ -452,17 +452,21 @@ void __init spear300_init(void) | |||
452 | spear3xx_init(); | 452 | spear3xx_init(); |
453 | 453 | ||
454 | /* shared irq registration */ | 454 | /* shared irq registration */ |
455 | shirq_ras1.regs.base = | 455 | shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K); |
456 | ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); | ||
457 | if (shirq_ras1.regs.base) { | 456 | if (shirq_ras1.regs.base) { |
458 | ret = spear_shirq_register(&shirq_ras1); | 457 | ret = spear_shirq_register(&shirq_ras1); |
459 | if (ret) | 458 | if (ret) |
460 | printk(KERN_ERR "Error registering Shared IRQ\n"); | 459 | printk(KERN_ERR "Error registering Shared IRQ\n"); |
461 | } | 460 | } |
462 | } | ||
463 | 461 | ||
464 | void spear300_pmx_init(void) | 462 | /* pmx initialization */ |
465 | { | 463 | pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K); |
466 | spear_pmx_init(&pmx_driver, SPEAR300_SOC_CONFIG_BASE, | 464 | if (pmx_driver.base) { |
467 | SPEAR300_SOC_CONFIG_SIZE); | 465 | ret = pmx_register(&pmx_driver); |
466 | if (ret) | ||
467 | printk(KERN_ERR "padmux: registeration failed. err no" | ||
468 | ": %d\n", ret); | ||
469 | /* Free Mapping, device selection already done */ | ||
470 | iounmap(pmx_driver.base); | ||
471 | } | ||
468 | } | 472 | } |
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c index bb21db152a23..42d2253ef540 100644 --- a/arch/arm/mach-spear3xx/spear300_evb.c +++ b/arch/arm/mach-spear3xx/spear300_evb.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <asm/mach/arch.h> | 14 | #include <asm/mach/arch.h> |
15 | #include <asm/mach-types.h> | 15 | #include <asm/mach-types.h> |
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | /* padmux devices to enable */ | 19 | /* padmux devices to enable */ |
20 | static struct pmx_dev *pmx_devs[] = { | 20 | static struct pmx_dev *pmx_devs[] = { |
@@ -28,7 +28,7 @@ static struct pmx_dev *pmx_devs[] = { | |||
28 | /* spear300 specific devices */ | 28 | /* spear300 specific devices */ |
29 | &pmx_fsmc_2_chips, | 29 | &pmx_fsmc_2_chips, |
30 | &pmx_clcd, | 30 | &pmx_clcd, |
31 | &pmx_telecom_sdio_4bit, | 31 | &pmx_telecom_sdhci_4bit, |
32 | &pmx_gpio1, | 32 | &pmx_gpio1, |
33 | }; | 33 | }; |
34 | 34 | ||
@@ -51,14 +51,13 @@ static void __init spear300_evb_init(void) | |||
51 | { | 51 | { |
52 | unsigned int i; | 52 | unsigned int i; |
53 | 53 | ||
54 | /* call spear300 machine init function */ | 54 | /* padmux initialization, must be done before spear300_init */ |
55 | spear300_init(); | ||
56 | |||
57 | /* padmux initialization */ | ||
58 | pmx_driver.mode = &photo_frame_mode; | 55 | pmx_driver.mode = &photo_frame_mode; |
59 | pmx_driver.devs = pmx_devs; | 56 | pmx_driver.devs = pmx_devs; |
60 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); | 57 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); |
61 | spear300_pmx_init(); | 58 | |
59 | /* call spear300 machine init function */ | ||
60 | spear300_init(); | ||
62 | 61 | ||
63 | /* Add Platform Devices */ | 62 | /* Add Platform Devices */ |
64 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); | 63 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); |
@@ -72,6 +71,6 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB") | |||
72 | .boot_params = 0x00000100, | 71 | .boot_params = 0x00000100, |
73 | .map_io = spear3xx_map_io, | 72 | .map_io = spear3xx_map_io, |
74 | .init_irq = spear3xx_init_irq, | 73 | .init_irq = spear3xx_init_irq, |
75 | .timer = &spear_sys_timer, | 74 | .timer = &spear3xx_timer, |
76 | .init_machine = spear300_evb_init, | 75 | .init_machine = spear300_evb_init, |
77 | MACHINE_END | 76 | MACHINE_END |
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 53b41b52d7ee..5c0a67b60c2a 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c | |||
@@ -13,9 +13,9 @@ | |||
13 | 13 | ||
14 | #include <linux/ptrace.h> | 14 | #include <linux/ptrace.h> |
15 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
16 | #include <mach/generic.h> | ||
17 | #include <mach/spear.h> | ||
18 | #include <plat/shirq.h> | 16 | #include <plat/shirq.h> |
17 | #include <mach/generic.h> | ||
18 | #include <mach/hardware.h> | ||
19 | 19 | ||
20 | /* pad multiplexing support */ | 20 | /* pad multiplexing support */ |
21 | /* muxing registers */ | 21 | /* muxing registers */ |
@@ -139,8 +139,6 @@ struct pmx_driver pmx_driver = { | |||
139 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, | 139 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* Add spear310 specific devices here */ | ||
143 | |||
144 | /* spear3xx shared irq */ | 142 | /* spear3xx shared irq */ |
145 | struct shirq_dev_config shirq_ras1_config[] = { | 143 | struct shirq_dev_config shirq_ras1_config[] = { |
146 | { | 144 | { |
@@ -257,6 +255,8 @@ struct spear_shirq shirq_intrcomm_ras = { | |||
257 | }, | 255 | }, |
258 | }; | 256 | }; |
259 | 257 | ||
258 | /* Add spear310 specific devices here */ | ||
259 | |||
260 | /* spear310 routines */ | 260 | /* spear310 routines */ |
261 | void __init spear310_init(void) | 261 | void __init spear310_init(void) |
262 | { | 262 | { |
@@ -267,7 +267,7 @@ void __init spear310_init(void) | |||
267 | spear3xx_init(); | 267 | spear3xx_init(); |
268 | 268 | ||
269 | /* shared irq registration */ | 269 | /* shared irq registration */ |
270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); | 270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K); |
271 | if (base) { | 271 | if (base) { |
272 | /* shirq 1 */ | 272 | /* shirq 1 */ |
273 | shirq_ras1.regs.base = base; | 273 | shirq_ras1.regs.base = base; |
@@ -293,10 +293,11 @@ void __init spear310_init(void) | |||
293 | if (ret) | 293 | if (ret) |
294 | printk(KERN_ERR "Error registering Shared IRQ 4\n"); | 294 | printk(KERN_ERR "Error registering Shared IRQ 4\n"); |
295 | } | 295 | } |
296 | } | ||
297 | 296 | ||
298 | void spear310_pmx_init(void) | 297 | /* pmx initialization */ |
299 | { | 298 | pmx_driver.base = base; |
300 | spear_pmx_init(&pmx_driver, SPEAR310_SOC_CONFIG_BASE, | 299 | ret = pmx_register(&pmx_driver); |
301 | SPEAR310_SOC_CONFIG_SIZE); | 300 | if (ret) |
301 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | ||
302 | ret); | ||
302 | } | 303 | } |
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c index 7facf6643199..2d7f333bd67b 100644 --- a/arch/arm/mach-spear3xx/spear310_evb.c +++ b/arch/arm/mach-spear3xx/spear310_evb.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <asm/mach/arch.h> | 14 | #include <asm/mach/arch.h> |
15 | #include <asm/mach-types.h> | 15 | #include <asm/mach-types.h> |
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | /* padmux devices to enable */ | 19 | /* padmux devices to enable */ |
20 | static struct pmx_dev *pmx_devs[] = { | 20 | static struct pmx_dev *pmx_devs[] = { |
@@ -58,14 +58,13 @@ static void __init spear310_evb_init(void) | |||
58 | { | 58 | { |
59 | unsigned int i; | 59 | unsigned int i; |
60 | 60 | ||
61 | /* call spear310 machine init function */ | 61 | /* padmux initialization, must be done before spear310_init */ |
62 | spear310_init(); | ||
63 | |||
64 | /* padmux initialization */ | ||
65 | pmx_driver.mode = NULL; | 62 | pmx_driver.mode = NULL; |
66 | pmx_driver.devs = pmx_devs; | 63 | pmx_driver.devs = pmx_devs; |
67 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); | 64 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); |
68 | spear310_pmx_init(); | 65 | |
66 | /* call spear310 machine init function */ | ||
67 | spear310_init(); | ||
69 | 68 | ||
70 | /* Add Platform Devices */ | 69 | /* Add Platform Devices */ |
71 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); | 70 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); |
@@ -79,6 +78,6 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB") | |||
79 | .boot_params = 0x00000100, | 78 | .boot_params = 0x00000100, |
80 | .map_io = spear3xx_map_io, | 79 | .map_io = spear3xx_map_io, |
81 | .init_irq = spear3xx_init_irq, | 80 | .init_irq = spear3xx_init_irq, |
82 | .timer = &spear_sys_timer, | 81 | .timer = &spear3xx_timer, |
83 | .init_machine = spear310_evb_init, | 82 | .init_machine = spear310_evb_init, |
84 | MACHINE_END | 83 | MACHINE_END |
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 88b465284c36..741c1f414cbd 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -13,9 +13,9 @@ | |||
13 | 13 | ||
14 | #include <linux/ptrace.h> | 14 | #include <linux/ptrace.h> |
15 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
16 | #include <mach/generic.h> | ||
17 | #include <mach/spear.h> | ||
18 | #include <plat/shirq.h> | 16 | #include <plat/shirq.h> |
17 | #include <mach/generic.h> | ||
18 | #include <mach/hardware.h> | ||
19 | 19 | ||
20 | /* pad multiplexing support */ | 20 | /* pad multiplexing support */ |
21 | /* muxing registers */ | 21 | /* muxing registers */ |
@@ -110,7 +110,7 @@ struct pmx_dev pmx_spp = { | |||
110 | .enb_on_reset = 1, | 110 | .enb_on_reset = 1, |
111 | }; | 111 | }; |
112 | 112 | ||
113 | struct pmx_dev_mode pmx_sdio_modes[] = { | 113 | struct pmx_dev_mode pmx_sdhci_modes[] = { |
114 | { | 114 | { |
115 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | | 115 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | |
116 | SMALL_PRINTERS_MODE, | 116 | SMALL_PRINTERS_MODE, |
@@ -118,10 +118,10 @@ struct pmx_dev_mode pmx_sdio_modes[] = { | |||
118 | }, | 118 | }, |
119 | }; | 119 | }; |
120 | 120 | ||
121 | struct pmx_dev pmx_sdio = { | 121 | struct pmx_dev pmx_sdhci = { |
122 | .name = "sdio", | 122 | .name = "sdhci", |
123 | .modes = pmx_sdio_modes, | 123 | .modes = pmx_sdhci_modes, |
124 | .mode_count = ARRAY_SIZE(pmx_sdio_modes), | 124 | .mode_count = ARRAY_SIZE(pmx_sdhci_modes), |
125 | .enb_on_reset = 1, | 125 | .enb_on_reset = 1, |
126 | }; | 126 | }; |
127 | 127 | ||
@@ -215,17 +215,17 @@ struct pmx_dev pmx_can = { | |||
215 | .enb_on_reset = 1, | 215 | .enb_on_reset = 1, |
216 | }; | 216 | }; |
217 | 217 | ||
218 | struct pmx_dev_mode pmx_sdio_led_modes[] = { | 218 | struct pmx_dev_mode pmx_sdhci_led_modes[] = { |
219 | { | 219 | { |
220 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | 220 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, |
221 | .mask = PMX_SSP_CS_MASK, | 221 | .mask = PMX_SSP_CS_MASK, |
222 | }, | 222 | }, |
223 | }; | 223 | }; |
224 | 224 | ||
225 | struct pmx_dev pmx_sdio_led = { | 225 | struct pmx_dev pmx_sdhci_led = { |
226 | .name = "sdio_led", | 226 | .name = "sdhci_led", |
227 | .modes = pmx_sdio_led_modes, | 227 | .modes = pmx_sdhci_led_modes, |
228 | .mode_count = ARRAY_SIZE(pmx_sdio_led_modes), | 228 | .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes), |
229 | .enb_on_reset = 1, | 229 | .enb_on_reset = 1, |
230 | }; | 230 | }; |
231 | 231 | ||
@@ -384,8 +384,6 @@ struct pmx_driver pmx_driver = { | |||
384 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, | 384 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | /* Add spear320 specific devices here */ | ||
388 | |||
389 | /* spear3xx shared irq */ | 387 | /* spear3xx shared irq */ |
390 | struct shirq_dev_config shirq_ras1_config[] = { | 388 | struct shirq_dev_config shirq_ras1_config[] = { |
391 | { | 389 | { |
@@ -510,6 +508,8 @@ struct spear_shirq shirq_intrcomm_ras = { | |||
510 | }, | 508 | }, |
511 | }; | 509 | }; |
512 | 510 | ||
511 | /* Add spear320 specific devices here */ | ||
512 | |||
513 | /* spear320 routines */ | 513 | /* spear320 routines */ |
514 | void __init spear320_init(void) | 514 | void __init spear320_init(void) |
515 | { | 515 | { |
@@ -520,7 +520,7 @@ void __init spear320_init(void) | |||
520 | spear3xx_init(); | 520 | spear3xx_init(); |
521 | 521 | ||
522 | /* shared irq registration */ | 522 | /* shared irq registration */ |
523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); | 523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SZ_4K); |
524 | if (base) { | 524 | if (base) { |
525 | /* shirq 1 */ | 525 | /* shirq 1 */ |
526 | shirq_ras1.regs.base = base; | 526 | shirq_ras1.regs.base = base; |
@@ -540,10 +540,11 @@ void __init spear320_init(void) | |||
540 | if (ret) | 540 | if (ret) |
541 | printk(KERN_ERR "Error registering Shared IRQ 4\n"); | 541 | printk(KERN_ERR "Error registering Shared IRQ 4\n"); |
542 | } | 542 | } |
543 | } | ||
544 | 543 | ||
545 | void spear320_pmx_init(void) | 544 | /* pmx initialization */ |
546 | { | 545 | pmx_driver.base = base; |
547 | spear_pmx_init(&pmx_driver, SPEAR320_SOC_CONFIG_BASE, | 546 | ret = pmx_register(&pmx_driver); |
548 | SPEAR320_SOC_CONFIG_SIZE); | 547 | if (ret) |
548 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | ||
549 | ret); | ||
549 | } | 550 | } |
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c index 62ac685a4135..8213e4b66c14 100644 --- a/arch/arm/mach-spear3xx/spear320_evb.c +++ b/arch/arm/mach-spear3xx/spear320_evb.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <asm/mach/arch.h> | 14 | #include <asm/mach/arch.h> |
15 | #include <asm/mach-types.h> | 15 | #include <asm/mach-types.h> |
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | /* padmux devices to enable */ | 19 | /* padmux devices to enable */ |
20 | static struct pmx_dev *pmx_devs[] = { | 20 | static struct pmx_dev *pmx_devs[] = { |
@@ -26,7 +26,7 @@ static struct pmx_dev *pmx_devs[] = { | |||
26 | 26 | ||
27 | /* spear320 specific devices */ | 27 | /* spear320 specific devices */ |
28 | &pmx_fsmc, | 28 | &pmx_fsmc, |
29 | &pmx_sdio, | 29 | &pmx_sdhci, |
30 | &pmx_i2s, | 30 | &pmx_i2s, |
31 | &pmx_uart1, | 31 | &pmx_uart1, |
32 | &pmx_uart2, | 32 | &pmx_uart2, |
@@ -55,14 +55,13 @@ static void __init spear320_evb_init(void) | |||
55 | { | 55 | { |
56 | unsigned int i; | 56 | unsigned int i; |
57 | 57 | ||
58 | /* call spear320 machine init function */ | 58 | /* padmux initialization, must be done before spear320_init */ |
59 | spear320_init(); | ||
60 | |||
61 | /* padmux initialization */ | ||
62 | pmx_driver.mode = &auto_net_mii_mode; | 59 | pmx_driver.mode = &auto_net_mii_mode; |
63 | pmx_driver.devs = pmx_devs; | 60 | pmx_driver.devs = pmx_devs; |
64 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); | 61 | pmx_driver.devs_count = ARRAY_SIZE(pmx_devs); |
65 | spear320_pmx_init(); | 62 | |
63 | /* call spear320 machine init function */ | ||
64 | spear320_init(); | ||
66 | 65 | ||
67 | /* Add Platform Devices */ | 66 | /* Add Platform Devices */ |
68 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); | 67 | platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); |
@@ -76,6 +75,6 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB") | |||
76 | .boot_params = 0x00000100, | 75 | .boot_params = 0x00000100, |
77 | .map_io = spear3xx_map_io, | 76 | .map_io = spear3xx_map_io, |
78 | .init_irq = spear3xx_init_irq, | 77 | .init_irq = spear3xx_init_irq, |
79 | .timer = &spear_sys_timer, | 78 | .timer = &spear3xx_timer, |
80 | .init_machine = spear320_evb_init, | 79 | .init_machine = spear320_evb_init, |
81 | MACHINE_END | 80 | MACHINE_END |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 52f553c8c46d..d3ba8ca1bc59 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <asm/irq.h> | 19 | #include <asm/irq.h> |
20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
21 | #include <mach/generic.h> | 21 | #include <mach/generic.h> |
22 | #include <mach/spear.h> | 22 | #include <mach/hardware.h> |
23 | 23 | ||
24 | /* Add spear3xx machines common devices here */ | 24 | /* Add spear3xx machines common devices here */ |
25 | /* gpio device registration */ | 25 | /* gpio device registration */ |
@@ -35,7 +35,7 @@ struct amba_device gpio_device = { | |||
35 | }, | 35 | }, |
36 | .res = { | 36 | .res = { |
37 | .start = SPEAR3XX_ICM3_GPIO_BASE, | 37 | .start = SPEAR3XX_ICM3_GPIO_BASE, |
38 | .end = SPEAR3XX_ICM3_GPIO_BASE + SPEAR3XX_ICM3_GPIO_SIZE - 1, | 38 | .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, |
39 | .flags = IORESOURCE_MEM, | 39 | .flags = IORESOURCE_MEM, |
40 | }, | 40 | }, |
41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, |
@@ -48,7 +48,7 @@ struct amba_device uart_device = { | |||
48 | }, | 48 | }, |
49 | .res = { | 49 | .res = { |
50 | .start = SPEAR3XX_ICM1_UART_BASE, | 50 | .start = SPEAR3XX_ICM1_UART_BASE, |
51 | .end = SPEAR3XX_ICM1_UART_BASE + SPEAR3XX_ICM1_UART_SIZE - 1, | 51 | .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, |
52 | .flags = IORESOURCE_MEM, | 52 | .flags = IORESOURCE_MEM, |
53 | }, | 53 | }, |
54 | .irq = {IRQ_UART, NO_IRQ}, | 54 | .irq = {IRQ_UART, NO_IRQ}, |
@@ -71,22 +71,22 @@ struct map_desc spear3xx_io_desc[] __initdata = { | |||
71 | { | 71 | { |
72 | .virtual = VA_SPEAR3XX_ICM1_UART_BASE, | 72 | .virtual = VA_SPEAR3XX_ICM1_UART_BASE, |
73 | .pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE), | 73 | .pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE), |
74 | .length = SPEAR3XX_ICM1_UART_SIZE, | 74 | .length = SZ_4K, |
75 | .type = MT_DEVICE | 75 | .type = MT_DEVICE |
76 | }, { | 76 | }, { |
77 | .virtual = VA_SPEAR3XX_ML1_VIC_BASE, | 77 | .virtual = VA_SPEAR3XX_ML1_VIC_BASE, |
78 | .pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE), | 78 | .pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE), |
79 | .length = SPEAR3XX_ML1_VIC_SIZE, | 79 | .length = SZ_4K, |
80 | .type = MT_DEVICE | 80 | .type = MT_DEVICE |
81 | }, { | 81 | }, { |
82 | .virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE, | 82 | .virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE, |
83 | .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE), | 83 | .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE), |
84 | .length = SPEAR3XX_ICM3_SYS_CTRL_SIZE, | 84 | .length = SZ_4K, |
85 | .type = MT_DEVICE | 85 | .type = MT_DEVICE |
86 | }, { | 86 | }, { |
87 | .virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE, | 87 | .virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE, |
88 | .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE), | 88 | .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE), |
89 | .length = SPEAR3XX_ICM3_MISC_REG_SIZE, | 89 | .length = SZ_4K, |
90 | .type = MT_DEVICE | 90 | .type = MT_DEVICE |
91 | }, | 91 | }, |
92 | }; | 92 | }; |
@@ -523,26 +523,35 @@ struct pmx_dev pmx_plgpio_45_46_49_50 = { | |||
523 | .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes), | 523 | .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes), |
524 | .enb_on_reset = 1, | 524 | .enb_on_reset = 1, |
525 | }; | 525 | }; |
526 | #endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */ | ||
526 | 527 | ||
527 | #endif | 528 | static void __init spear3xx_timer_init(void) |
528 | |||
529 | /* spear padmux initialization function */ | ||
530 | void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size) | ||
531 | { | 529 | { |
532 | int ret = 0; | 530 | char pclk_name[] = "pll3_48m_clk"; |
531 | struct clk *gpt_clk, *pclk; | ||
532 | |||
533 | /* get the system timer clock */ | ||
534 | gpt_clk = clk_get_sys("gpt0", NULL); | ||
535 | if (IS_ERR(gpt_clk)) { | ||
536 | pr_err("%s:couldn't get clk for gpt\n", __func__); | ||
537 | BUG(); | ||
538 | } | ||
533 | 539 | ||
534 | /* pad mux initialization */ | 540 | /* get the suitable parent clock for timer*/ |
535 | pmx_driver->base = ioremap(base, size); | 541 | pclk = clk_get(NULL, pclk_name); |
536 | if (!pmx_driver->base) { | 542 | if (IS_ERR(pclk)) { |
537 | ret = -ENOMEM; | 543 | pr_err("%s:couldn't get %s as parent for gpt\n", |
538 | goto pmx_fail; | 544 | __func__, pclk_name); |
545 | BUG(); | ||
539 | } | 546 | } |
540 | 547 | ||
541 | ret = pmx_register(pmx_driver); | 548 | clk_set_parent(gpt_clk, pclk); |
542 | iounmap(pmx_driver->base); | 549 | clk_put(gpt_clk); |
550 | clk_put(pclk); | ||
543 | 551 | ||
544 | pmx_fail: | 552 | spear_setup_timer(); |
545 | if (ret) | ||
546 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", | ||
547 | ret); | ||
548 | } | 553 | } |
554 | |||
555 | struct sys_timer spear3xx_timer = { | ||
556 | .init = spear3xx_timer_init, | ||
557 | }; | ||
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index 36ff056b7321..88b748b5be80 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c | |||
@@ -13,8 +13,8 @@ | |||
13 | 13 | ||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <mach/misc_regs.h> | ||
17 | #include <plat/clock.h> | 16 | #include <plat/clock.h> |
17 | #include <mach/misc_regs.h> | ||
18 | 18 | ||
19 | /* root clks */ | 19 | /* root clks */ |
20 | /* 32 KHz oscillator clock */ | 20 | /* 32 KHz oscillator clock */ |
@@ -39,18 +39,43 @@ static struct clk rtc_clk = { | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* clock derived from 30 MHz osc clk */ | 41 | /* clock derived from 30 MHz osc clk */ |
42 | /* pll masks structure */ | ||
43 | static struct pll_clk_masks pll1_masks = { | ||
44 | .mode_mask = PLL_MODE_MASK, | ||
45 | .mode_shift = PLL_MODE_SHIFT, | ||
46 | .norm_fdbk_m_mask = PLL_NORM_FDBK_M_MASK, | ||
47 | .norm_fdbk_m_shift = PLL_NORM_FDBK_M_SHIFT, | ||
48 | .dith_fdbk_m_mask = PLL_DITH_FDBK_M_MASK, | ||
49 | .dith_fdbk_m_shift = PLL_DITH_FDBK_M_SHIFT, | ||
50 | .div_p_mask = PLL_DIV_P_MASK, | ||
51 | .div_p_shift = PLL_DIV_P_SHIFT, | ||
52 | .div_n_mask = PLL_DIV_N_MASK, | ||
53 | .div_n_shift = PLL_DIV_N_SHIFT, | ||
54 | }; | ||
55 | |||
42 | /* pll1 configuration structure */ | 56 | /* pll1 configuration structure */ |
43 | static struct pll_clk_config pll1_config = { | 57 | static struct pll_clk_config pll1_config = { |
44 | .mode_reg = PLL1_CTR, | 58 | .mode_reg = PLL1_CTR, |
45 | .cfg_reg = PLL1_FRQ, | 59 | .cfg_reg = PLL1_FRQ, |
60 | .masks = &pll1_masks, | ||
61 | }; | ||
62 | |||
63 | /* pll rate configuration table, in ascending order of rates */ | ||
64 | struct pll_rate_tbl pll_rtbl[] = { | ||
65 | {.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */ | ||
66 | {.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */ | ||
46 | }; | 67 | }; |
47 | 68 | ||
48 | /* PLL1 clock */ | 69 | /* PLL1 clock */ |
49 | static struct clk pll1_clk = { | 70 | static struct clk pll1_clk = { |
71 | .flags = ENABLED_ON_INIT, | ||
50 | .pclk = &osc_30m_clk, | 72 | .pclk = &osc_30m_clk, |
51 | .en_reg = PLL1_CTR, | 73 | .en_reg = PLL1_CTR, |
52 | .en_reg_bit = PLL_ENABLE, | 74 | .en_reg_bit = PLL_ENABLE, |
53 | .recalc = &pll1_clk_recalc, | 75 | .calc_rate = &pll_calc_rate, |
76 | .recalc = &pll_clk_recalc, | ||
77 | .set_rate = &pll_clk_set_rate, | ||
78 | .rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1}, | ||
54 | .private_data = &pll1_config, | 79 | .private_data = &pll1_config, |
55 | }; | 80 | }; |
56 | 81 | ||
@@ -76,31 +101,83 @@ static struct clk cpu_clk = { | |||
76 | .recalc = &follow_parent, | 101 | .recalc = &follow_parent, |
77 | }; | 102 | }; |
78 | 103 | ||
104 | /* ahb masks structure */ | ||
105 | static struct bus_clk_masks ahb_masks = { | ||
106 | .mask = PLL_HCLK_RATIO_MASK, | ||
107 | .shift = PLL_HCLK_RATIO_SHIFT, | ||
108 | }; | ||
109 | |||
79 | /* ahb configuration structure */ | 110 | /* ahb configuration structure */ |
80 | static struct bus_clk_config ahb_config = { | 111 | static struct bus_clk_config ahb_config = { |
81 | .reg = CORE_CLK_CFG, | 112 | .reg = CORE_CLK_CFG, |
82 | .mask = PLL_HCLK_RATIO_MASK, | 113 | .masks = &ahb_masks, |
83 | .shift = PLL_HCLK_RATIO_SHIFT, | 114 | }; |
115 | |||
116 | /* ahb rate configuration table, in ascending order of rates */ | ||
117 | struct bus_rate_tbl bus_rtbl[] = { | ||
118 | {.div = 3}, /* == parent divided by 4 */ | ||
119 | {.div = 2}, /* == parent divided by 3 */ | ||
120 | {.div = 1}, /* == parent divided by 2 */ | ||
121 | {.div = 0}, /* == parent divided by 1 */ | ||
84 | }; | 122 | }; |
85 | 123 | ||
86 | /* ahb clock */ | 124 | /* ahb clock */ |
87 | static struct clk ahb_clk = { | 125 | static struct clk ahb_clk = { |
88 | .flags = ALWAYS_ENABLED, | 126 | .flags = ALWAYS_ENABLED, |
89 | .pclk = &pll1_clk, | 127 | .pclk = &pll1_clk, |
128 | .calc_rate = &bus_calc_rate, | ||
90 | .recalc = &bus_clk_recalc, | 129 | .recalc = &bus_clk_recalc, |
130 | .set_rate = &bus_clk_set_rate, | ||
131 | .rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2}, | ||
91 | .private_data = &ahb_config, | 132 | .private_data = &ahb_config, |
92 | }; | 133 | }; |
93 | 134 | ||
135 | /* auxiliary synthesizers masks */ | ||
136 | static struct aux_clk_masks aux_masks = { | ||
137 | .eq_sel_mask = AUX_EQ_SEL_MASK, | ||
138 | .eq_sel_shift = AUX_EQ_SEL_SHIFT, | ||
139 | .eq1_mask = AUX_EQ1_SEL, | ||
140 | .eq2_mask = AUX_EQ2_SEL, | ||
141 | .xscale_sel_mask = AUX_XSCALE_MASK, | ||
142 | .xscale_sel_shift = AUX_XSCALE_SHIFT, | ||
143 | .yscale_sel_mask = AUX_YSCALE_MASK, | ||
144 | .yscale_sel_shift = AUX_YSCALE_SHIFT, | ||
145 | }; | ||
146 | |||
147 | /* uart configurations */ | ||
148 | static struct aux_clk_config uart_synth_config = { | ||
149 | .synth_reg = UART_CLK_SYNT, | ||
150 | .masks = &aux_masks, | ||
151 | }; | ||
152 | |||
153 | /* aux rate configuration table, in ascending order of rates */ | ||
154 | struct aux_rate_tbl aux_rtbl[] = { | ||
155 | /* For PLL1 = 332 MHz */ | ||
156 | {.xscale = 1, .yscale = 8, .eq = 1}, /* 41.5 MHz */ | ||
157 | {.xscale = 1, .yscale = 4, .eq = 1}, /* 83 MHz */ | ||
158 | {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */ | ||
159 | }; | ||
160 | |||
161 | /* uart synth clock */ | ||
162 | static struct clk uart_synth_clk = { | ||
163 | .en_reg = UART_CLK_SYNT, | ||
164 | .en_reg_bit = AUX_SYNT_ENB, | ||
165 | .pclk = &pll1_clk, | ||
166 | .calc_rate = &aux_calc_rate, | ||
167 | .recalc = &aux_clk_recalc, | ||
168 | .set_rate = &aux_clk_set_rate, | ||
169 | .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, | ||
170 | .private_data = &uart_synth_config, | ||
171 | }; | ||
172 | |||
94 | /* uart parents */ | 173 | /* uart parents */ |
95 | static struct pclk_info uart_pclk_info[] = { | 174 | static struct pclk_info uart_pclk_info[] = { |
96 | { | 175 | { |
97 | .pclk = &pll1_clk, | 176 | .pclk = &uart_synth_clk, |
98 | .pclk_mask = AUX_CLK_PLL1_MASK, | 177 | .pclk_val = AUX_CLK_PLL1_VAL, |
99 | .scalable = 1, | ||
100 | }, { | 178 | }, { |
101 | .pclk = &pll3_48m_clk, | 179 | .pclk = &pll3_48m_clk, |
102 | .pclk_mask = AUX_CLK_PLL3_MASK, | 180 | .pclk_val = AUX_CLK_PLL3_VAL, |
103 | .scalable = 0, | ||
104 | }, | 181 | }, |
105 | }; | 182 | }; |
106 | 183 | ||
@@ -112,19 +189,13 @@ static struct pclk_sel uart_pclk_sel = { | |||
112 | .pclk_sel_mask = UART_CLK_MASK, | 189 | .pclk_sel_mask = UART_CLK_MASK, |
113 | }; | 190 | }; |
114 | 191 | ||
115 | /* uart configurations */ | ||
116 | static struct aux_clk_config uart_config = { | ||
117 | .synth_reg = UART_CLK_SYNT, | ||
118 | }; | ||
119 | |||
120 | /* uart0 clock */ | 192 | /* uart0 clock */ |
121 | static struct clk uart0_clk = { | 193 | static struct clk uart0_clk = { |
122 | .en_reg = PERIP1_CLK_ENB, | 194 | .en_reg = PERIP1_CLK_ENB, |
123 | .en_reg_bit = UART0_CLK_ENB, | 195 | .en_reg_bit = UART0_CLK_ENB, |
124 | .pclk_sel = &uart_pclk_sel, | 196 | .pclk_sel = &uart_pclk_sel, |
125 | .pclk_sel_shift = UART_CLK_SHIFT, | 197 | .pclk_sel_shift = UART_CLK_SHIFT, |
126 | .recalc = &aux_clk_recalc, | 198 | .recalc = &follow_parent, |
127 | .private_data = &uart_config, | ||
128 | }; | 199 | }; |
129 | 200 | ||
130 | /* uart1 clock */ | 201 | /* uart1 clock */ |
@@ -133,25 +204,35 @@ static struct clk uart1_clk = { | |||
133 | .en_reg_bit = UART1_CLK_ENB, | 204 | .en_reg_bit = UART1_CLK_ENB, |
134 | .pclk_sel = &uart_pclk_sel, | 205 | .pclk_sel = &uart_pclk_sel, |
135 | .pclk_sel_shift = UART_CLK_SHIFT, | 206 | .pclk_sel_shift = UART_CLK_SHIFT, |
136 | .recalc = &aux_clk_recalc, | 207 | .recalc = &follow_parent, |
137 | .private_data = &uart_config, | ||
138 | }; | 208 | }; |
139 | 209 | ||
140 | /* firda configurations */ | 210 | /* firda configurations */ |
141 | static struct aux_clk_config firda_config = { | 211 | static struct aux_clk_config firda_synth_config = { |
142 | .synth_reg = FIRDA_CLK_SYNT, | 212 | .synth_reg = FIRDA_CLK_SYNT, |
213 | .masks = &aux_masks, | ||
214 | }; | ||
215 | |||
216 | /* firda synth clock */ | ||
217 | static struct clk firda_synth_clk = { | ||
218 | .en_reg = FIRDA_CLK_SYNT, | ||
219 | .en_reg_bit = AUX_SYNT_ENB, | ||
220 | .pclk = &pll1_clk, | ||
221 | .calc_rate = &aux_calc_rate, | ||
222 | .recalc = &aux_clk_recalc, | ||
223 | .set_rate = &aux_clk_set_rate, | ||
224 | .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, | ||
225 | .private_data = &firda_synth_config, | ||
143 | }; | 226 | }; |
144 | 227 | ||
145 | /* firda parents */ | 228 | /* firda parents */ |
146 | static struct pclk_info firda_pclk_info[] = { | 229 | static struct pclk_info firda_pclk_info[] = { |
147 | { | 230 | { |
148 | .pclk = &pll1_clk, | 231 | .pclk = &firda_synth_clk, |
149 | .pclk_mask = AUX_CLK_PLL1_MASK, | 232 | .pclk_val = AUX_CLK_PLL1_VAL, |
150 | .scalable = 1, | ||
151 | }, { | 233 | }, { |
152 | .pclk = &pll3_48m_clk, | 234 | .pclk = &pll3_48m_clk, |
153 | .pclk_mask = AUX_CLK_PLL3_MASK, | 235 | .pclk_val = AUX_CLK_PLL3_VAL, |
154 | .scalable = 0, | ||
155 | }, | 236 | }, |
156 | }; | 237 | }; |
157 | 238 | ||
@@ -169,25 +250,35 @@ static struct clk firda_clk = { | |||
169 | .en_reg_bit = FIRDA_CLK_ENB, | 250 | .en_reg_bit = FIRDA_CLK_ENB, |
170 | .pclk_sel = &firda_pclk_sel, | 251 | .pclk_sel = &firda_pclk_sel, |
171 | .pclk_sel_shift = FIRDA_CLK_SHIFT, | 252 | .pclk_sel_shift = FIRDA_CLK_SHIFT, |
172 | .recalc = &aux_clk_recalc, | 253 | .recalc = &follow_parent, |
173 | .private_data = &firda_config, | ||
174 | }; | 254 | }; |
175 | 255 | ||
176 | /* clcd configurations */ | 256 | /* clcd configurations */ |
177 | static struct aux_clk_config clcd_config = { | 257 | static struct aux_clk_config clcd_synth_config = { |
178 | .synth_reg = CLCD_CLK_SYNT, | 258 | .synth_reg = CLCD_CLK_SYNT, |
259 | .masks = &aux_masks, | ||
260 | }; | ||
261 | |||
262 | /* firda synth clock */ | ||
263 | static struct clk clcd_synth_clk = { | ||
264 | .en_reg = CLCD_CLK_SYNT, | ||
265 | .en_reg_bit = AUX_SYNT_ENB, | ||
266 | .pclk = &pll1_clk, | ||
267 | .calc_rate = &aux_calc_rate, | ||
268 | .recalc = &aux_clk_recalc, | ||
269 | .set_rate = &aux_clk_set_rate, | ||
270 | .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, | ||
271 | .private_data = &clcd_synth_config, | ||
179 | }; | 272 | }; |
180 | 273 | ||
181 | /* clcd parents */ | 274 | /* clcd parents */ |
182 | static struct pclk_info clcd_pclk_info[] = { | 275 | static struct pclk_info clcd_pclk_info[] = { |
183 | { | 276 | { |
184 | .pclk = &pll1_clk, | 277 | .pclk = &clcd_synth_clk, |
185 | .pclk_mask = AUX_CLK_PLL1_MASK, | 278 | .pclk_val = AUX_CLK_PLL1_VAL, |
186 | .scalable = 1, | ||
187 | }, { | 279 | }, { |
188 | .pclk = &pll3_48m_clk, | 280 | .pclk = &pll3_48m_clk, |
189 | .pclk_mask = AUX_CLK_PLL3_MASK, | 281 | .pclk_val = AUX_CLK_PLL3_VAL, |
190 | .scalable = 0, | ||
191 | }, | 282 | }, |
192 | }; | 283 | }; |
193 | 284 | ||
@@ -205,82 +296,173 @@ static struct clk clcd_clk = { | |||
205 | .en_reg_bit = CLCD_CLK_ENB, | 296 | .en_reg_bit = CLCD_CLK_ENB, |
206 | .pclk_sel = &clcd_pclk_sel, | 297 | .pclk_sel = &clcd_pclk_sel, |
207 | .pclk_sel_shift = CLCD_CLK_SHIFT, | 298 | .pclk_sel_shift = CLCD_CLK_SHIFT, |
208 | .recalc = &aux_clk_recalc, | 299 | .recalc = &follow_parent, |
209 | .private_data = &clcd_config, | 300 | }; |
301 | |||
302 | /* gpt synthesizer masks */ | ||
303 | static struct gpt_clk_masks gpt_masks = { | ||
304 | .mscale_sel_mask = GPT_MSCALE_MASK, | ||
305 | .mscale_sel_shift = GPT_MSCALE_SHIFT, | ||
306 | .nscale_sel_mask = GPT_NSCALE_MASK, | ||
307 | .nscale_sel_shift = GPT_NSCALE_SHIFT, | ||
308 | }; | ||
309 | |||
310 | /* gpt rate configuration table, in ascending order of rates */ | ||
311 | struct gpt_rate_tbl gpt_rtbl[] = { | ||
312 | /* For pll1 = 332 MHz */ | ||
313 | {.mscale = 4, .nscale = 0}, /* 41.5 MHz */ | ||
314 | {.mscale = 2, .nscale = 0}, /* 55.3 MHz */ | ||
315 | {.mscale = 1, .nscale = 0}, /* 83 MHz */ | ||
316 | }; | ||
317 | |||
318 | /* gpt0 synth clk config*/ | ||
319 | static struct gpt_clk_config gpt0_synth_config = { | ||
320 | .synth_reg = PRSC1_CLK_CFG, | ||
321 | .masks = &gpt_masks, | ||
322 | }; | ||
323 | |||
324 | /* gpt synth clock */ | ||
325 | static struct clk gpt0_synth_clk = { | ||
326 | .flags = ALWAYS_ENABLED, | ||
327 | .pclk = &pll1_clk, | ||
328 | .calc_rate = &gpt_calc_rate, | ||
329 | .recalc = &gpt_clk_recalc, | ||
330 | .set_rate = &gpt_clk_set_rate, | ||
331 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
332 | .private_data = &gpt0_synth_config, | ||
210 | }; | 333 | }; |
211 | 334 | ||
212 | /* gpt parents */ | 335 | /* gpt parents */ |
213 | static struct pclk_info gpt_pclk_info[] = { | 336 | static struct pclk_info gpt0_pclk_info[] = { |
214 | { | 337 | { |
215 | .pclk = &pll1_clk, | 338 | .pclk = &gpt0_synth_clk, |
216 | .pclk_mask = AUX_CLK_PLL1_MASK, | 339 | .pclk_val = AUX_CLK_PLL1_VAL, |
217 | .scalable = 1, | ||
218 | }, { | 340 | }, { |
219 | .pclk = &pll3_48m_clk, | 341 | .pclk = &pll3_48m_clk, |
220 | .pclk_mask = AUX_CLK_PLL3_MASK, | 342 | .pclk_val = AUX_CLK_PLL3_VAL, |
221 | .scalable = 0, | ||
222 | }, | 343 | }, |
223 | }; | 344 | }; |
224 | 345 | ||
225 | /* gpt parent select structure */ | 346 | /* gpt parent select structure */ |
226 | static struct pclk_sel gpt_pclk_sel = { | 347 | static struct pclk_sel gpt0_pclk_sel = { |
227 | .pclk_info = gpt_pclk_info, | 348 | .pclk_info = gpt0_pclk_info, |
228 | .pclk_count = ARRAY_SIZE(gpt_pclk_info), | 349 | .pclk_count = ARRAY_SIZE(gpt0_pclk_info), |
229 | .pclk_sel_reg = PERIP_CLK_CFG, | 350 | .pclk_sel_reg = PERIP_CLK_CFG, |
230 | .pclk_sel_mask = GPT_CLK_MASK, | 351 | .pclk_sel_mask = GPT_CLK_MASK, |
231 | }; | 352 | }; |
232 | 353 | ||
233 | /* gpt0_1 configurations */ | ||
234 | static struct aux_clk_config gpt0_1_config = { | ||
235 | .synth_reg = PRSC1_CLK_CFG, | ||
236 | }; | ||
237 | |||
238 | /* gpt0 ARM1 subsystem timer clock */ | 354 | /* gpt0 ARM1 subsystem timer clock */ |
239 | static struct clk gpt0_clk = { | 355 | static struct clk gpt0_clk = { |
240 | .flags = ALWAYS_ENABLED, | 356 | .flags = ALWAYS_ENABLED, |
241 | .pclk_sel = &gpt_pclk_sel, | 357 | .pclk_sel = &gpt0_pclk_sel, |
242 | .pclk_sel_shift = GPT0_CLK_SHIFT, | 358 | .pclk_sel_shift = GPT0_CLK_SHIFT, |
243 | .recalc = &gpt_clk_recalc, | 359 | .recalc = &follow_parent, |
244 | .private_data = &gpt0_1_config, | 360 | }; |
361 | |||
362 | |||
363 | /* Note: gpt0 and gpt1 share same parent clocks */ | ||
364 | /* gpt parent select structure */ | ||
365 | static struct pclk_sel gpt1_pclk_sel = { | ||
366 | .pclk_info = gpt0_pclk_info, | ||
367 | .pclk_count = ARRAY_SIZE(gpt0_pclk_info), | ||
368 | .pclk_sel_reg = PERIP_CLK_CFG, | ||
369 | .pclk_sel_mask = GPT_CLK_MASK, | ||
245 | }; | 370 | }; |
246 | 371 | ||
247 | /* gpt1 timer clock */ | 372 | /* gpt1 timer clock */ |
248 | static struct clk gpt1_clk = { | 373 | static struct clk gpt1_clk = { |
249 | .flags = ALWAYS_ENABLED, | 374 | .flags = ALWAYS_ENABLED, |
250 | .pclk_sel = &gpt_pclk_sel, | 375 | .pclk_sel = &gpt1_pclk_sel, |
251 | .pclk_sel_shift = GPT1_CLK_SHIFT, | 376 | .pclk_sel_shift = GPT1_CLK_SHIFT, |
252 | .recalc = &gpt_clk_recalc, | 377 | .recalc = &follow_parent, |
253 | .private_data = &gpt0_1_config, | ||
254 | }; | 378 | }; |
255 | 379 | ||
256 | /* gpt2 configurations */ | 380 | /* gpt2 synth clk config*/ |
257 | static struct aux_clk_config gpt2_config = { | 381 | static struct gpt_clk_config gpt2_synth_config = { |
258 | .synth_reg = PRSC2_CLK_CFG, | 382 | .synth_reg = PRSC2_CLK_CFG, |
383 | .masks = &gpt_masks, | ||
384 | }; | ||
385 | |||
386 | /* gpt synth clock */ | ||
387 | static struct clk gpt2_synth_clk = { | ||
388 | .flags = ALWAYS_ENABLED, | ||
389 | .pclk = &pll1_clk, | ||
390 | .calc_rate = &gpt_calc_rate, | ||
391 | .recalc = &gpt_clk_recalc, | ||
392 | .set_rate = &gpt_clk_set_rate, | ||
393 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
394 | .private_data = &gpt2_synth_config, | ||
395 | }; | ||
396 | |||
397 | /* gpt parents */ | ||
398 | static struct pclk_info gpt2_pclk_info[] = { | ||
399 | { | ||
400 | .pclk = &gpt2_synth_clk, | ||
401 | .pclk_val = AUX_CLK_PLL1_VAL, | ||
402 | }, { | ||
403 | .pclk = &pll3_48m_clk, | ||
404 | .pclk_val = AUX_CLK_PLL3_VAL, | ||
405 | }, | ||
406 | }; | ||
407 | |||
408 | /* gpt parent select structure */ | ||
409 | static struct pclk_sel gpt2_pclk_sel = { | ||
410 | .pclk_info = gpt2_pclk_info, | ||
411 | .pclk_count = ARRAY_SIZE(gpt2_pclk_info), | ||
412 | .pclk_sel_reg = PERIP_CLK_CFG, | ||
413 | .pclk_sel_mask = GPT_CLK_MASK, | ||
259 | }; | 414 | }; |
260 | 415 | ||
261 | /* gpt2 timer clock */ | 416 | /* gpt2 timer clock */ |
262 | static struct clk gpt2_clk = { | 417 | static struct clk gpt2_clk = { |
263 | .en_reg = PERIP1_CLK_ENB, | 418 | .flags = ALWAYS_ENABLED, |
264 | .en_reg_bit = GPT2_CLK_ENB, | 419 | .pclk_sel = &gpt2_pclk_sel, |
265 | .pclk_sel = &gpt_pclk_sel, | ||
266 | .pclk_sel_shift = GPT2_CLK_SHIFT, | 420 | .pclk_sel_shift = GPT2_CLK_SHIFT, |
267 | .recalc = &gpt_clk_recalc, | 421 | .recalc = &follow_parent, |
268 | .private_data = &gpt2_config, | ||
269 | }; | 422 | }; |
270 | 423 | ||
271 | /* gpt3 configurations */ | 424 | /* gpt3 synth clk config*/ |
272 | static struct aux_clk_config gpt3_config = { | 425 | static struct gpt_clk_config gpt3_synth_config = { |
273 | .synth_reg = PRSC3_CLK_CFG, | 426 | .synth_reg = PRSC3_CLK_CFG, |
427 | .masks = &gpt_masks, | ||
428 | }; | ||
429 | |||
430 | /* gpt synth clock */ | ||
431 | static struct clk gpt3_synth_clk = { | ||
432 | .flags = ALWAYS_ENABLED, | ||
433 | .pclk = &pll1_clk, | ||
434 | .calc_rate = &gpt_calc_rate, | ||
435 | .recalc = &gpt_clk_recalc, | ||
436 | .set_rate = &gpt_clk_set_rate, | ||
437 | .rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2}, | ||
438 | .private_data = &gpt3_synth_config, | ||
439 | }; | ||
440 | |||
441 | /* gpt parents */ | ||
442 | static struct pclk_info gpt3_pclk_info[] = { | ||
443 | { | ||
444 | .pclk = &gpt3_synth_clk, | ||
445 | .pclk_val = AUX_CLK_PLL1_VAL, | ||
446 | }, { | ||
447 | .pclk = &pll3_48m_clk, | ||
448 | .pclk_val = AUX_CLK_PLL3_VAL, | ||
449 | }, | ||
450 | }; | ||
451 | |||
452 | /* gpt parent select structure */ | ||
453 | static struct pclk_sel gpt3_pclk_sel = { | ||
454 | .pclk_info = gpt3_pclk_info, | ||
455 | .pclk_count = ARRAY_SIZE(gpt3_pclk_info), | ||
456 | .pclk_sel_reg = PERIP_CLK_CFG, | ||
457 | .pclk_sel_mask = GPT_CLK_MASK, | ||
274 | }; | 458 | }; |
275 | 459 | ||
276 | /* gpt3 timer clock */ | 460 | /* gpt3 timer clock */ |
277 | static struct clk gpt3_clk = { | 461 | static struct clk gpt3_clk = { |
278 | .en_reg = PERIP1_CLK_ENB, | 462 | .flags = ALWAYS_ENABLED, |
279 | .en_reg_bit = GPT3_CLK_ENB, | 463 | .pclk_sel = &gpt3_pclk_sel, |
280 | .pclk_sel = &gpt_pclk_sel, | ||
281 | .pclk_sel_shift = GPT3_CLK_SHIFT, | 464 | .pclk_sel_shift = GPT3_CLK_SHIFT, |
282 | .recalc = &gpt_clk_recalc, | 465 | .recalc = &follow_parent, |
283 | .private_data = &gpt3_config, | ||
284 | }; | 466 | }; |
285 | 467 | ||
286 | /* clock derived from pll3 clk */ | 468 | /* clock derived from pll3 clk */ |
@@ -309,18 +491,26 @@ static struct clk usbd_clk = { | |||
309 | }; | 491 | }; |
310 | 492 | ||
311 | /* clock derived from ahb clk */ | 493 | /* clock derived from ahb clk */ |
494 | /* apb masks structure */ | ||
495 | static struct bus_clk_masks apb_masks = { | ||
496 | .mask = HCLK_PCLK_RATIO_MASK, | ||
497 | .shift = HCLK_PCLK_RATIO_SHIFT, | ||
498 | }; | ||
499 | |||
312 | /* apb configuration structure */ | 500 | /* apb configuration structure */ |
313 | static struct bus_clk_config apb_config = { | 501 | static struct bus_clk_config apb_config = { |
314 | .reg = CORE_CLK_CFG, | 502 | .reg = CORE_CLK_CFG, |
315 | .mask = HCLK_PCLK_RATIO_MASK, | 503 | .masks = &apb_masks, |
316 | .shift = HCLK_PCLK_RATIO_SHIFT, | ||
317 | }; | 504 | }; |
318 | 505 | ||
319 | /* apb clock */ | 506 | /* apb clock */ |
320 | static struct clk apb_clk = { | 507 | static struct clk apb_clk = { |
321 | .flags = ALWAYS_ENABLED, | 508 | .flags = ALWAYS_ENABLED, |
322 | .pclk = &ahb_clk, | 509 | .pclk = &ahb_clk, |
510 | .calc_rate = &bus_calc_rate, | ||
323 | .recalc = &bus_clk_recalc, | 511 | .recalc = &bus_clk_recalc, |
512 | .set_rate = &bus_clk_set_rate, | ||
513 | .rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2}, | ||
324 | .private_data = &apb_config, | 514 | .private_data = &apb_config, |
325 | }; | 515 | }; |
326 | 516 | ||
@@ -432,12 +622,12 @@ static struct clk dummy_apb_pclk; | |||
432 | 622 | ||
433 | /* array of all spear 6xx clock lookups */ | 623 | /* array of all spear 6xx clock lookups */ |
434 | static struct clk_lookup spear_clk_lookups[] = { | 624 | static struct clk_lookup spear_clk_lookups[] = { |
435 | { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, | 625 | { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, |
436 | /* root clks */ | 626 | /* root clks */ |
437 | { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, | 627 | { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, |
438 | { .con_id = "osc_30m_clk", .clk = &osc_30m_clk}, | 628 | { .con_id = "osc_30m_clk", .clk = &osc_30m_clk}, |
439 | /* clock derived from 32 KHz os clk */ | 629 | /* clock derived from 32 KHz os clk */ |
440 | { .dev_id = "rtc", .clk = &rtc_clk}, | 630 | { .dev_id = "rtc-spear", .clk = &rtc_clk}, |
441 | /* clock derived from 30 MHz os clk */ | 631 | /* clock derived from 30 MHz os clk */ |
442 | { .con_id = "pll1_clk", .clk = &pll1_clk}, | 632 | { .con_id = "pll1_clk", .clk = &pll1_clk}, |
443 | { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, | 633 | { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, |
@@ -445,6 +635,12 @@ static struct clk_lookup spear_clk_lookups[] = { | |||
445 | /* clock derived from pll1 clk */ | 635 | /* clock derived from pll1 clk */ |
446 | { .con_id = "cpu_clk", .clk = &cpu_clk}, | 636 | { .con_id = "cpu_clk", .clk = &cpu_clk}, |
447 | { .con_id = "ahb_clk", .clk = &ahb_clk}, | 637 | { .con_id = "ahb_clk", .clk = &ahb_clk}, |
638 | { .con_id = "uart_synth_clk", .clk = &uart_synth_clk}, | ||
639 | { .con_id = "firda_synth_clk", .clk = &firda_synth_clk}, | ||
640 | { .con_id = "clcd_synth_clk", .clk = &clcd_synth_clk}, | ||
641 | { .con_id = "gpt0_synth_clk", .clk = &gpt0_synth_clk}, | ||
642 | { .con_id = "gpt2_synth_clk", .clk = &gpt2_synth_clk}, | ||
643 | { .con_id = "gpt3_synth_clk", .clk = &gpt3_synth_clk}, | ||
448 | { .dev_id = "uart0", .clk = &uart0_clk}, | 644 | { .dev_id = "uart0", .clk = &uart0_clk}, |
449 | { .dev_id = "uart1", .clk = &uart1_clk}, | 645 | { .dev_id = "uart1", .clk = &uart1_clk}, |
450 | { .dev_id = "firda", .clk = &firda_clk}, | 646 | { .dev_id = "firda", .clk = &firda_clk}, |
@@ -454,22 +650,22 @@ static struct clk_lookup spear_clk_lookups[] = { | |||
454 | { .dev_id = "gpt2", .clk = &gpt2_clk}, | 650 | { .dev_id = "gpt2", .clk = &gpt2_clk}, |
455 | { .dev_id = "gpt3", .clk = &gpt3_clk}, | 651 | { .dev_id = "gpt3", .clk = &gpt3_clk}, |
456 | /* clock derived from pll3 clk */ | 652 | /* clock derived from pll3 clk */ |
457 | { .dev_id = "usbh0", .clk = &usbh0_clk}, | 653 | { .dev_id = "designware_udc", .clk = &usbd_clk}, |
458 | { .dev_id = "usbh1", .clk = &usbh1_clk}, | 654 | { .con_id = "usbh.0_clk", .clk = &usbh0_clk}, |
459 | { .dev_id = "usbd", .clk = &usbd_clk}, | 655 | { .con_id = "usbh.1_clk", .clk = &usbh1_clk}, |
460 | /* clock derived from ahb clk */ | 656 | /* clock derived from ahb clk */ |
461 | { .con_id = "apb_clk", .clk = &apb_clk}, | 657 | { .con_id = "apb_clk", .clk = &apb_clk}, |
462 | { .dev_id = "i2c", .clk = &i2c_clk}, | 658 | { .dev_id = "i2c_designware.0", .clk = &i2c_clk}, |
463 | { .dev_id = "dma", .clk = &dma_clk}, | 659 | { .dev_id = "dma", .clk = &dma_clk}, |
464 | { .dev_id = "jpeg", .clk = &jpeg_clk}, | 660 | { .dev_id = "jpeg", .clk = &jpeg_clk}, |
465 | { .dev_id = "gmac", .clk = &gmac_clk}, | 661 | { .dev_id = "gmac", .clk = &gmac_clk}, |
466 | { .dev_id = "smi", .clk = &smi_clk}, | 662 | { .dev_id = "smi", .clk = &smi_clk}, |
467 | { .dev_id = "fsmc", .clk = &fsmc_clk}, | 663 | { .con_id = "fsmc", .clk = &fsmc_clk}, |
468 | /* clock derived from apb clk */ | 664 | /* clock derived from apb clk */ |
469 | { .dev_id = "adc", .clk = &adc_clk}, | 665 | { .dev_id = "adc", .clk = &adc_clk}, |
470 | { .dev_id = "ssp0", .clk = &ssp0_clk}, | 666 | { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, |
471 | { .dev_id = "ssp1", .clk = &ssp1_clk}, | 667 | { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, |
472 | { .dev_id = "ssp2", .clk = &ssp2_clk}, | 668 | { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, |
473 | { .dev_id = "gpio0", .clk = &gpio0_clk}, | 669 | { .dev_id = "gpio0", .clk = &gpio0_clk}, |
474 | { .dev_id = "gpio1", .clk = &gpio1_clk}, | 670 | { .dev_id = "gpio1", .clk = &gpio1_clk}, |
475 | { .dev_id = "gpio2", .clk = &gpio2_clk}, | 671 | { .dev_id = "gpio2", .clk = &gpio2_clk}, |
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S index 9eaecaeafcf0..8a0b0ed7b203 100644 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S | |||
@@ -11,9 +11,8 @@ | |||
11 | * warranty of any kind, whether express or implied. | 11 | * warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/spear.h> | ||
16 | #include <asm/hardware/vic.h> | 14 | #include <asm/hardware/vic.h> |
15 | #include <mach/hardware.h> | ||
17 | 16 | ||
18 | .macro disable_fiq | 17 | .macro disable_fiq |
19 | .endm | 18 | .endm |
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h index 16205a538756..94cf4a648b57 100644 --- a/arch/arm/mach-spear6xx/include/mach/generic.h +++ b/arch/arm/mach-spear6xx/include/mach/generic.h | |||
@@ -14,11 +14,11 @@ | |||
14 | #ifndef __MACH_GENERIC_H | 14 | #ifndef __MACH_GENERIC_H |
15 | #define __MACH_GENERIC_H | 15 | #define __MACH_GENERIC_H |
16 | 16 | ||
17 | #include <asm/mach/time.h> | ||
18 | #include <asm/mach/map.h> | ||
19 | #include <linux/init.h> | 17 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
21 | #include <linux/amba/bus.h> | 19 | #include <linux/amba/bus.h> |
20 | #include <asm/mach/time.h> | ||
21 | #include <asm/mach/map.h> | ||
22 | 22 | ||
23 | /* | 23 | /* |
24 | * Each GPT has 2 timer channels | 24 | * Each GPT has 2 timer channels |
@@ -31,9 +31,10 @@ | |||
31 | /* Add spear6xx family device structure declarations here */ | 31 | /* Add spear6xx family device structure declarations here */ |
32 | extern struct amba_device gpio_device[]; | 32 | extern struct amba_device gpio_device[]; |
33 | extern struct amba_device uart_device[]; | 33 | extern struct amba_device uart_device[]; |
34 | extern struct sys_timer spear_sys_timer; | 34 | extern struct sys_timer spear6xx_timer; |
35 | 35 | ||
36 | /* Add spear6xx family function declarations here */ | 36 | /* Add spear6xx family function declarations here */ |
37 | void __init spear_setup_timer(void); | ||
37 | void __init spear6xx_map_io(void); | 38 | void __init spear6xx_map_io(void); |
38 | void __init spear6xx_init_irq(void); | 39 | void __init spear6xx_init_irq(void); |
39 | void __init spear6xx_init(void); | 40 | void __init spear6xx_init(void); |
diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h index 7545116deca9..0b3f96ae2848 100644 --- a/arch/arm/mach-spear6xx/include/mach/hardware.h +++ b/arch/arm/mach-spear6xx/include/mach/hardware.h | |||
@@ -14,8 +14,10 @@ | |||
14 | #ifndef __MACH_HARDWARE_H | 14 | #ifndef __MACH_HARDWARE_H |
15 | #define __MACH_HARDWARE_H | 15 | #define __MACH_HARDWARE_H |
16 | 16 | ||
17 | #include <plat/hardware.h> | ||
18 | #include <mach/spear.h> | ||
19 | |||
17 | /* Vitual to physical translation of statically mapped space */ | 20 | /* Vitual to physical translation of statically mapped space */ |
18 | #define IO_ADDRESS(x) (x | 0xF0000000) | 21 | #define IO_ADDRESS(x) (x | 0xF0000000) |
19 | 22 | ||
20 | #endif /* __MACH_HARDWARE_H */ | 23 | #endif /* __MACH_HARDWARE_H */ |
21 | |||
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h index 03908036b0d0..68c20a007b0d 100644 --- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h +++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h | |||
@@ -14,16 +14,16 @@ | |||
14 | #ifndef __MACH_MISC_REGS_H | 14 | #ifndef __MACH_MISC_REGS_H |
15 | #define __MACH_MISC_REGS_H | 15 | #define __MACH_MISC_REGS_H |
16 | 16 | ||
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | #define MISC_BASE VA_SPEAR6XX_ICM3_MISC_REG_BASE | 19 | #define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE) |
20 | 20 | ||
21 | #define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000)) | 21 | #define SOC_CFG_CTR (MISC_BASE + 0x000) |
22 | #define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004)) | 22 | #define DIAG_CFG_CTR (MISC_BASE + 0x004) |
23 | #define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008)) | 23 | #define PLL1_CTR (MISC_BASE + 0x008) |
24 | #define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C)) | 24 | #define PLL1_FRQ (MISC_BASE + 0x00C) |
25 | #define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010)) | 25 | #define PLL1_MOD (MISC_BASE + 0x010) |
26 | #define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014)) | 26 | #define PLL2_CTR (MISC_BASE + 0x014) |
27 | /* PLL_CTR register masks */ | 27 | /* PLL_CTR register masks */ |
28 | #define PLL_ENABLE 2 | 28 | #define PLL_ENABLE 2 |
29 | #define PLL_MODE_SHIFT 4 | 29 | #define PLL_MODE_SHIFT 4 |
@@ -33,7 +33,7 @@ | |||
33 | #define PLL_MODE_DITH_DSB 2 | 33 | #define PLL_MODE_DITH_DSB 2 |
34 | #define PLL_MODE_DITH_SSB 3 | 34 | #define PLL_MODE_DITH_SSB 3 |
35 | 35 | ||
36 | #define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018)) | 36 | #define PLL2_FRQ (MISC_BASE + 0x018) |
37 | /* PLL FRQ register masks */ | 37 | /* PLL FRQ register masks */ |
38 | #define PLL_DIV_N_SHIFT 0 | 38 | #define PLL_DIV_N_SHIFT 0 |
39 | #define PLL_DIV_N_MASK 0xFF | 39 | #define PLL_DIV_N_MASK 0xFF |
@@ -44,16 +44,16 @@ | |||
44 | #define PLL_DITH_FDBK_M_SHIFT 16 | 44 | #define PLL_DITH_FDBK_M_SHIFT 16 |
45 | #define PLL_DITH_FDBK_M_MASK 0xFFFF | 45 | #define PLL_DITH_FDBK_M_MASK 0xFFFF |
46 | 46 | ||
47 | #define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C)) | 47 | #define PLL2_MOD (MISC_BASE + 0x01C) |
48 | #define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020)) | 48 | #define PLL_CLK_CFG (MISC_BASE + 0x020) |
49 | #define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024)) | 49 | #define CORE_CLK_CFG (MISC_BASE + 0x024) |
50 | /* CORE CLK CFG register masks */ | 50 | /* CORE CLK CFG register masks */ |
51 | #define PLL_HCLK_RATIO_SHIFT 10 | 51 | #define PLL_HCLK_RATIO_SHIFT 10 |
52 | #define PLL_HCLK_RATIO_MASK 0x3 | 52 | #define PLL_HCLK_RATIO_MASK 0x3 |
53 | #define HCLK_PCLK_RATIO_SHIFT 8 | 53 | #define HCLK_PCLK_RATIO_SHIFT 8 |
54 | #define HCLK_PCLK_RATIO_MASK 0x3 | 54 | #define HCLK_PCLK_RATIO_MASK 0x3 |
55 | 55 | ||
56 | #define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028)) | 56 | #define PERIP_CLK_CFG (MISC_BASE + 0x028) |
57 | /* PERIP_CLK_CFG register masks */ | 57 | /* PERIP_CLK_CFG register masks */ |
58 | #define CLCD_CLK_SHIFT 2 | 58 | #define CLCD_CLK_SHIFT 2 |
59 | #define CLCD_CLK_MASK 0x3 | 59 | #define CLCD_CLK_MASK 0x3 |
@@ -66,10 +66,10 @@ | |||
66 | #define GPT2_CLK_SHIFT 11 | 66 | #define GPT2_CLK_SHIFT 11 |
67 | #define GPT3_CLK_SHIFT 12 | 67 | #define GPT3_CLK_SHIFT 12 |
68 | #define GPT_CLK_MASK 0x1 | 68 | #define GPT_CLK_MASK 0x1 |
69 | #define AUX_CLK_PLL3_MASK 0 | 69 | #define AUX_CLK_PLL3_VAL 0 |
70 | #define AUX_CLK_PLL1_MASK 1 | 70 | #define AUX_CLK_PLL1_VAL 1 |
71 | 71 | ||
72 | #define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C)) | 72 | #define PERIP1_CLK_ENB (MISC_BASE + 0x02C) |
73 | /* PERIP1_CLK_ENB register masks */ | 73 | /* PERIP1_CLK_ENB register masks */ |
74 | #define UART0_CLK_ENB 3 | 74 | #define UART0_CLK_ENB 3 |
75 | #define UART1_CLK_ENB 4 | 75 | #define UART1_CLK_ENB 4 |
@@ -95,34 +95,35 @@ | |||
95 | #define USBH0_CLK_ENB 25 | 95 | #define USBH0_CLK_ENB 25 |
96 | #define USBH1_CLK_ENB 26 | 96 | #define USBH1_CLK_ENB 26 |
97 | 97 | ||
98 | #define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030)) | 98 | #define SOC_CORE_ID (MISC_BASE + 0x030) |
99 | #define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034)) | 99 | #define RAS_CLK_ENB (MISC_BASE + 0x034) |
100 | #define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038)) | 100 | #define PERIP1_SOF_RST (MISC_BASE + 0x038) |
101 | /* PERIP1_SOF_RST register masks */ | 101 | /* PERIP1_SOF_RST register masks */ |
102 | #define JPEG_SOF_RST 8 | 102 | #define JPEG_SOF_RST 8 |
103 | 103 | ||
104 | #define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C)) | 104 | #define SOC_USER_ID (MISC_BASE + 0x03C) |
105 | #define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040)) | 105 | #define RAS_SOF_RST (MISC_BASE + 0x040) |
106 | #define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044)) | 106 | #define PRSC1_CLK_CFG (MISC_BASE + 0x044) |
107 | #define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048)) | 107 | #define PRSC2_CLK_CFG (MISC_BASE + 0x048) |
108 | #define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C)) | 108 | #define PRSC3_CLK_CFG (MISC_BASE + 0x04C) |
109 | /* gpt synthesizer register masks */ | 109 | /* gpt synthesizer register masks */ |
110 | #define GPT_MSCALE_SHIFT 0 | 110 | #define GPT_MSCALE_SHIFT 0 |
111 | #define GPT_MSCALE_MASK 0xFFF | 111 | #define GPT_MSCALE_MASK 0xFFF |
112 | #define GPT_NSCALE_SHIFT 12 | 112 | #define GPT_NSCALE_SHIFT 12 |
113 | #define GPT_NSCALE_MASK 0xF | 113 | #define GPT_NSCALE_MASK 0xF |
114 | 114 | ||
115 | #define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050)) | 115 | #define AMEM_CLK_CFG (MISC_BASE + 0x050) |
116 | #define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054)) | 116 | #define EXPI_CLK_CFG (MISC_BASE + 0x054) |
117 | #define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C)) | 117 | #define CLCD_CLK_SYNT (MISC_BASE + 0x05C) |
118 | #define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060)) | 118 | #define FIRDA_CLK_SYNT (MISC_BASE + 0x060) |
119 | #define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064)) | 119 | #define UART_CLK_SYNT (MISC_BASE + 0x064) |
120 | #define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068)) | 120 | #define GMAC_CLK_SYNT (MISC_BASE + 0x068) |
121 | #define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C)) | 121 | #define RAS1_CLK_SYNT (MISC_BASE + 0x06C) |
122 | #define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070)) | 122 | #define RAS2_CLK_SYNT (MISC_BASE + 0x070) |
123 | #define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074)) | 123 | #define RAS3_CLK_SYNT (MISC_BASE + 0x074) |
124 | #define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078)) | 124 | #define RAS4_CLK_SYNT (MISC_BASE + 0x078) |
125 | /* aux clk synthesiser register masks for irda to ras4 */ | 125 | /* aux clk synthesiser register masks for irda to ras4 */ |
126 | #define AUX_SYNT_ENB 31 | ||
126 | #define AUX_EQ_SEL_SHIFT 30 | 127 | #define AUX_EQ_SEL_SHIFT 30 |
127 | #define AUX_EQ_SEL_MASK 1 | 128 | #define AUX_EQ_SEL_MASK 1 |
128 | #define AUX_EQ1_SEL 0 | 129 | #define AUX_EQ1_SEL 0 |
@@ -132,42 +133,42 @@ | |||
132 | #define AUX_YSCALE_SHIFT 0 | 133 | #define AUX_YSCALE_SHIFT 0 |
133 | #define AUX_YSCALE_MASK 0xFFF | 134 | #define AUX_YSCALE_MASK 0xFFF |
134 | 135 | ||
135 | #define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C)) | 136 | #define ICM1_ARB_CFG (MISC_BASE + 0x07C) |
136 | #define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080)) | 137 | #define ICM2_ARB_CFG (MISC_BASE + 0x080) |
137 | #define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084)) | 138 | #define ICM3_ARB_CFG (MISC_BASE + 0x084) |
138 | #define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088)) | 139 | #define ICM4_ARB_CFG (MISC_BASE + 0x088) |
139 | #define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C)) | 140 | #define ICM5_ARB_CFG (MISC_BASE + 0x08C) |
140 | #define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090)) | 141 | #define ICM6_ARB_CFG (MISC_BASE + 0x090) |
141 | #define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094)) | 142 | #define ICM7_ARB_CFG (MISC_BASE + 0x094) |
142 | #define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098)) | 143 | #define ICM8_ARB_CFG (MISC_BASE + 0x098) |
143 | #define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C)) | 144 | #define ICM9_ARB_CFG (MISC_BASE + 0x09C) |
144 | #define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0)) | 145 | #define DMA_CHN_CFG (MISC_BASE + 0x0A0) |
145 | #define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4)) | 146 | #define USB2_PHY_CFG (MISC_BASE + 0x0A4) |
146 | #define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8)) | 147 | #define GMAC_CFG_CTR (MISC_BASE + 0x0A8) |
147 | #define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC)) | 148 | #define EXPI_CFG_CTR (MISC_BASE + 0x0AC) |
148 | #define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0)) | 149 | #define PRC1_LOCK_CTR (MISC_BASE + 0x0C0) |
149 | #define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4)) | 150 | #define PRC2_LOCK_CTR (MISC_BASE + 0x0C4) |
150 | #define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8)) | 151 | #define PRC3_LOCK_CTR (MISC_BASE + 0x0C8) |
151 | #define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC)) | 152 | #define PRC4_LOCK_CTR (MISC_BASE + 0x0CC) |
152 | #define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0)) | 153 | #define PRC1_IRQ_CTR (MISC_BASE + 0x0D0) |
153 | #define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4)) | 154 | #define PRC2_IRQ_CTR (MISC_BASE + 0x0D4) |
154 | #define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8)) | 155 | #define PRC3_IRQ_CTR (MISC_BASE + 0x0D8) |
155 | #define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC)) | 156 | #define PRC4_IRQ_CTR (MISC_BASE + 0x0DC) |
156 | #define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0)) | 157 | #define PWRDOWN_CFG_CTR (MISC_BASE + 0x0E0) |
157 | #define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4)) | 158 | #define COMPSSTL_1V8_CFG (MISC_BASE + 0x0E4) |
158 | #define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8)) | 159 | #define COMPSSTL_2V5_CFG (MISC_BASE + 0x0E8) |
159 | #define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC)) | 160 | #define COMPCOR_3V3_CFG (MISC_BASE + 0x0EC) |
160 | #define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0)) | 161 | #define SSTLPAD_CFG_CTR (MISC_BASE + 0x0F0) |
161 | #define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4)) | 162 | #define BIST1_CFG_CTR (MISC_BASE + 0x0F4) |
162 | #define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8)) | 163 | #define BIST2_CFG_CTR (MISC_BASE + 0x0F8) |
163 | #define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC)) | 164 | #define BIST3_CFG_CTR (MISC_BASE + 0x0FC) |
164 | #define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100)) | 165 | #define BIST4_CFG_CTR (MISC_BASE + 0x100) |
165 | #define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104)) | 166 | #define BIST5_CFG_CTR (MISC_BASE + 0x104) |
166 | #define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108)) | 167 | #define BIST1_STS_RES (MISC_BASE + 0x108) |
167 | #define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C)) | 168 | #define BIST2_STS_RES (MISC_BASE + 0x10C) |
168 | #define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110)) | 169 | #define BIST3_STS_RES (MISC_BASE + 0x110) |
169 | #define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114)) | 170 | #define BIST4_STS_RES (MISC_BASE + 0x114) |
170 | #define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118)) | 171 | #define BIST5_STS_RES (MISC_BASE + 0x118) |
171 | #define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C)) | 172 | #define SYSERR_CFG_CTR (MISC_BASE + 0x11C) |
172 | 173 | ||
173 | #endif /* __MACH_MISC_REGS_H */ | 174 | #endif /* __MACH_MISC_REGS_H */ |
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h index a835f5b6b182..7fd621532def 100644 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ b/arch/arm/mach-spear6xx/include/mach/spear.h | |||
@@ -14,153 +14,70 @@ | |||
14 | #ifndef __MACH_SPEAR6XX_H | 14 | #ifndef __MACH_SPEAR6XX_H |
15 | #define __MACH_SPEAR6XX_H | 15 | #define __MACH_SPEAR6XX_H |
16 | 16 | ||
17 | #include <mach/hardware.h> | 17 | #include <asm/memory.h> |
18 | #include <mach/spear600.h> | 18 | #include <mach/spear600.h> |
19 | 19 | ||
20 | #define SPEAR6XX_ML_SDRAM_BASE 0x00000000 | 20 | #define SPEAR6XX_ML_SDRAM_BASE UL(0x00000000) |
21 | #define SPEAR6XX_ML_SDRAM_SIZE 0x40000000 | ||
22 | |||
23 | /* ICM1 - Low speed connection */ | 21 | /* ICM1 - Low speed connection */ |
24 | #define SPEAR6XX_ICM1_BASE 0xD0000000 | 22 | #define SPEAR6XX_ICM1_BASE UL(0xD0000000) |
25 | #define SPEAR6XX_ICM1_SIZE 0x08000000 | ||
26 | 23 | ||
27 | #define SPEAR6XX_ICM1_UART0_BASE 0xD0000000 | 24 | #define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) |
28 | #define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE) | 25 | #define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE) |
29 | #define SPEAR6XX_ICM1_UART0_SIZE 0x00080000 | ||
30 | |||
31 | #define SPEAR6XX_ICM1_UART1_BASE 0xD0080000 | ||
32 | #define SPEAR6XX_ICM1_UART1_SIZE 0x00080000 | ||
33 | |||
34 | #define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000 | ||
35 | #define SPEAR6XX_ICM1_SSP0_SIZE 0x00080000 | ||
36 | |||
37 | #define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000 | ||
38 | #define SPEAR6XX_ICM1_SSP1_SIZE 0x00080000 | ||
39 | |||
40 | #define SPEAR6XX_ICM1_I2C_BASE 0xD0200000 | ||
41 | #define SPEAR6XX_ICM1_I2C_SIZE 0x00080000 | ||
42 | 26 | ||
43 | #define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000 | 27 | #define SPEAR6XX_ICM1_UART1_BASE UL(0xD0080000) |
44 | #define SPEAR6XX_ICM1_JPEG_SIZE 0x00800000 | 28 | #define SPEAR6XX_ICM1_SSP0_BASE UL(0xD0100000) |
45 | 29 | #define SPEAR6XX_ICM1_SSP1_BASE UL(0xD0180000) | |
46 | #define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000 | 30 | #define SPEAR6XX_ICM1_I2C_BASE UL(0xD0200000) |
47 | #define SPEAR6XX_ICM1_IRDA_SIZE 0x00800000 | 31 | #define SPEAR6XX_ICM1_JPEG_BASE UL(0xD0800000) |
48 | 32 | #define SPEAR6XX_ICM1_IRDA_BASE UL(0xD1000000) | |
49 | #define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000 | 33 | #define SPEAR6XX_ICM1_FSMC_BASE UL(0xD1800000) |
50 | #define SPEAR6XX_ICM1_FSMC_SIZE 0x00800000 | 34 | #define SPEAR6XX_ICM1_NAND_BASE UL(0xD2000000) |
51 | 35 | #define SPEAR6XX_ICM1_SRAM_BASE UL(0xD2800000) | |
52 | #define SPEAR6XX_ICM1_NAND_BASE 0xD2000000 | ||
53 | #define SPEAR6XX_ICM1_NAND_SIZE 0x00800000 | ||
54 | |||
55 | #define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000 | ||
56 | #define SPEAR6XX_ICM1_SRAM_SIZE 0x00800000 | ||
57 | 36 | ||
58 | /* ICM2 - Application Subsystem */ | 37 | /* ICM2 - Application Subsystem */ |
59 | #define SPEAR6XX_ICM2_BASE 0xD8000000 | 38 | #define SPEAR6XX_ICM2_BASE UL(0xD8000000) |
60 | #define SPEAR6XX_ICM2_SIZE 0x08000000 | 39 | #define SPEAR6XX_ICM2_TMR0_BASE UL(0xD8000000) |
61 | 40 | #define SPEAR6XX_ICM2_TMR1_BASE UL(0xD8080000) | |
62 | #define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000 | 41 | #define SPEAR6XX_ICM2_GPIO_BASE UL(0xD8100000) |
63 | #define SPEAR6XX_ICM2_TMR0_SIZE 0x00080000 | 42 | #define SPEAR6XX_ICM2_SSP2_BASE UL(0xD8180000) |
64 | 43 | #define SPEAR6XX_ICM2_ADC_BASE UL(0xD8200000) | |
65 | #define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000 | ||
66 | #define SPEAR6XX_ICM2_TMR1_SIZE 0x00080000 | ||
67 | |||
68 | #define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000 | ||
69 | #define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000 | ||
70 | |||
71 | #define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000 | ||
72 | #define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000 | ||
73 | |||
74 | #define SPEAR6XX_ICM2_ADC_BASE 0xD8200000 | ||
75 | #define SPEAR6XX_ICM2_ADC_SIZE 0x00080000 | ||
76 | 44 | ||
77 | /* ML-1, 2 - Multi Layer CPU Subsystem */ | 45 | /* ML-1, 2 - Multi Layer CPU Subsystem */ |
78 | #define SPEAR6XX_ML_CPU_BASE 0xF0000000 | 46 | #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) |
79 | #define SPEAR6XX_ML_CPU_SIZE 0x08000000 | 47 | #define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000) |
80 | 48 | #define SPEAR6XX_CPU_GPIO_BASE UL(0xF0100000) | |
81 | #define SPEAR6XX_CPU_TMR_BASE 0xF0000000 | 49 | #define SPEAR6XX_CPU_VIC_SEC_BASE UL(0xF1000000) |
82 | #define SPEAR6XX_CPU_TMR_SIZE 0x00100000 | ||
83 | |||
84 | #define SPEAR6XX_CPU_GPIO_BASE 0xF0100000 | ||
85 | #define SPEAR6XX_CPU_GPIO_SIZE 0x00100000 | ||
86 | |||
87 | #define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000 | ||
88 | #define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE) | 50 | #define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE) |
89 | #define SPEAR6XX_CPU_VIC_SEC_SIZE 0x00100000 | 51 | #define SPEAR6XX_CPU_VIC_PRI_BASE UL(0xF1100000) |
90 | |||
91 | #define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000 | ||
92 | #define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE) | 52 | #define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE) |
93 | #define SPEAR6XX_CPU_VIC_PRI_SIZE 0x00100000 | ||
94 | 53 | ||
95 | /* ICM3 - Basic Subsystem */ | 54 | /* ICM3 - Basic Subsystem */ |
96 | #define SPEAR6XX_ICM3_BASE 0xF8000000 | 55 | #define SPEAR6XX_ICM3_BASE UL(0xF8000000) |
97 | #define SPEAR6XX_ICM3_SIZE 0x08000000 | 56 | #define SPEAR6XX_ICM3_SMEM_BASE UL(0xF8000000) |
98 | 57 | #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) | |
99 | #define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000 | 58 | #define SPEAR6XX_ICM3_CLCD_BASE UL(0xFC200000) |
100 | #define SPEAR6XX_ICM3_SMEM_SIZE 0x04000000 | 59 | #define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) |
101 | 60 | #define SPEAR6XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) | |
102 | #define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000 | 61 | #define SPEAR6XX_ICM3_TMR_BASE UL(0xFC800000) |
103 | #define SPEAR6XX_ICM3_SMI_CTRL_SIZE 0x00200000 | 62 | #define SPEAR6XX_ICM3_WDT_BASE UL(0xFC880000) |
104 | 63 | #define SPEAR6XX_ICM3_RTC_BASE UL(0xFC900000) | |
105 | #define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000 | 64 | #define SPEAR6XX_ICM3_GPIO_BASE UL(0xFC980000) |
106 | #define SPEAR6XX_ICM3_CLCD_SIZE 0x00200000 | 65 | #define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
107 | |||
108 | #define SPEAR6XX_ICM3_DMA_BASE 0xFC400000 | ||
109 | #define SPEAR6XX_ICM3_DMA_SIZE 0x00200000 | ||
110 | |||
111 | #define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000 | ||
112 | #define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE 0x00200000 | ||
113 | |||
114 | #define SPEAR6XX_ICM3_TMR_BASE 0xFC800000 | ||
115 | #define SPEAR6XX_ICM3_TMR_SIZE 0x00080000 | ||
116 | |||
117 | #define SPEAR6XX_ICM3_WDT_BASE 0xFC880000 | ||
118 | #define SPEAR6XX_ICM3_WDT_SIZE 0x00080000 | ||
119 | |||
120 | #define SPEAR6XX_ICM3_RTC_BASE 0xFC900000 | ||
121 | #define SPEAR6XX_ICM3_RTC_SIZE 0x00080000 | ||
122 | |||
123 | #define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000 | ||
124 | #define SPEAR6XX_ICM3_GPIO_SIZE 0x00080000 | ||
125 | |||
126 | #define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000 | ||
127 | #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE) | 66 | #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE) |
128 | #define SPEAR6XX_ICM3_SYS_CTRL_SIZE 0x00080000 | 67 | #define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) |
129 | |||
130 | #define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000 | ||
131 | #define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE) | 68 | #define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE) |
132 | #define SPEAR6XX_ICM3_MISC_REG_SIZE 0x00080000 | ||
133 | 69 | ||
134 | /* ICM4 - High Speed Connection */ | 70 | /* ICM4 - High Speed Connection */ |
135 | #define SPEAR6XX_ICM4_BASE 0xE0000000 | 71 | #define SPEAR6XX_ICM4_BASE UL(0xE0000000) |
136 | #define SPEAR6XX_ICM4_SIZE 0x08000000 | 72 | #define SPEAR6XX_ICM4_GMAC_BASE UL(0xE0800000) |
137 | 73 | #define SPEAR6XX_ICM4_USBD_FIFO_BASE UL(0xE1000000) | |
138 | #define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000 | 74 | #define SPEAR6XX_ICM4_USBD_CSR_BASE UL(0xE1100000) |
139 | #define SPEAR6XX_ICM4_GMAC_SIZE 0x00800000 | 75 | #define SPEAR6XX_ICM4_USBD_PLDT_BASE UL(0xE1200000) |
140 | 76 | #define SPEAR6XX_ICM4_USB_EHCI0_BASE UL(0xE1800000) | |
141 | #define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000 | 77 | #define SPEAR6XX_ICM4_USB_OHCI0_BASE UL(0xE1900000) |
142 | #define SPEAR6XX_ICM4_USBD_FIFO_SIZE 0x00100000 | 78 | #define SPEAR6XX_ICM4_USB_EHCI1_BASE UL(0xE2000000) |
143 | 79 | #define SPEAR6XX_ICM4_USB_OHCI1_BASE UL(0xE2100000) | |
144 | #define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000 | 80 | #define SPEAR6XX_ICM4_USB_ARB_BASE UL(0xE2800000) |
145 | #define SPEAR6XX_ICM4_USBD_CSR_SIZE 0x00100000 | ||
146 | |||
147 | #define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000 | ||
148 | #define SPEAR6XX_ICM4_USBD_PLDT_SIZE 0x00100000 | ||
149 | |||
150 | #define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000 | ||
151 | #define SPEAR6XX_ICM4_USB_EHCI0_SIZE 0x00100000 | ||
152 | |||
153 | #define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000 | ||
154 | #define SPEAR6XX_ICM4_USB_OHCI0_SIZE 0x00100000 | ||
155 | |||
156 | #define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000 | ||
157 | #define SPEAR6XX_ICM4_USB_EHCI1_SIZE 0x00100000 | ||
158 | |||
159 | #define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000 | ||
160 | #define SPEAR6XX_ICM4_USB_OHCI1_SIZE 0x00100000 | ||
161 | |||
162 | #define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000 | ||
163 | #define SPEAR6XX_ICM4_USB_ARB_SIZE 0x00010000 | ||
164 | 81 | ||
165 | /* Debug uart for linux, will be used for debug and uncompress messages */ | 82 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
166 | #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE | 83 | #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE |
diff --git a/arch/arm/mach-spear6xx/spear600.c b/arch/arm/mach-spear6xx/spear600.c index 5c484c433dc1..d0e6eeae9b04 100644 --- a/arch/arm/mach-spear6xx/spear600.c +++ b/arch/arm/mach-spear6xx/spear600.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/ptrace.h> | 14 | #include <linux/ptrace.h> |
15 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | /* Add spear600 specific devices here */ | 19 | /* Add spear600 specific devices here */ |
20 | 20 | ||
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c index daff8d04f7b6..f19cefe91a2b 100644 --- a/arch/arm/mach-spear6xx/spear600_evb.c +++ b/arch/arm/mach-spear6xx/spear600_evb.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <asm/mach/arch.h> | 14 | #include <asm/mach/arch.h> |
15 | #include <asm/mach-types.h> | 15 | #include <asm/mach-types.h> |
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | static struct amba_device *amba_devs[] __initdata = { | 19 | static struct amba_device *amba_devs[] __initdata = { |
20 | &gpio_device[0], | 20 | &gpio_device[0], |
@@ -46,6 +46,6 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB") | |||
46 | .boot_params = 0x00000100, | 46 | .boot_params = 0x00000100, |
47 | .map_io = spear6xx_map_io, | 47 | .map_io = spear6xx_map_io, |
48 | .init_irq = spear6xx_init_irq, | 48 | .init_irq = spear6xx_init_irq, |
49 | .timer = &spear_sys_timer, | 49 | .timer = &spear6xx_timer, |
50 | .init_machine = spear600_evb_init, | 50 | .init_machine = spear600_evb_init, |
51 | MACHINE_END | 51 | MACHINE_END |
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index f2fe14e8471d..981812961ac7 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -18,9 +18,9 @@ | |||
18 | #include <asm/hardware/vic.h> | 18 | #include <asm/hardware/vic.h> |
19 | #include <asm/irq.h> | 19 | #include <asm/irq.h> |
20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
21 | #include <mach/irqs.h> | ||
22 | #include <mach/generic.h> | 21 | #include <mach/generic.h> |
23 | #include <mach/spear.h> | 22 | #include <mach/hardware.h> |
23 | #include <mach/irqs.h> | ||
24 | 24 | ||
25 | /* Add spear6xx machines common devices here */ | 25 | /* Add spear6xx machines common devices here */ |
26 | /* uart device registration */ | 26 | /* uart device registration */ |
@@ -31,8 +31,7 @@ struct amba_device uart_device[] = { | |||
31 | }, | 31 | }, |
32 | .res = { | 32 | .res = { |
33 | .start = SPEAR6XX_ICM1_UART0_BASE, | 33 | .start = SPEAR6XX_ICM1_UART0_BASE, |
34 | .end = SPEAR6XX_ICM1_UART0_BASE + | 34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, |
35 | SPEAR6XX_ICM1_UART0_SIZE - 1, | ||
36 | .flags = IORESOURCE_MEM, | 35 | .flags = IORESOURCE_MEM, |
37 | }, | 36 | }, |
38 | .irq = {IRQ_UART_0, NO_IRQ}, | 37 | .irq = {IRQ_UART_0, NO_IRQ}, |
@@ -42,8 +41,7 @@ struct amba_device uart_device[] = { | |||
42 | }, | 41 | }, |
43 | .res = { | 42 | .res = { |
44 | .start = SPEAR6XX_ICM1_UART1_BASE, | 43 | .start = SPEAR6XX_ICM1_UART1_BASE, |
45 | .end = SPEAR6XX_ICM1_UART1_BASE + | 44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, |
46 | SPEAR6XX_ICM1_UART1_SIZE - 1, | ||
47 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
48 | }, | 46 | }, |
49 | .irq = {IRQ_UART_1, NO_IRQ}, | 47 | .irq = {IRQ_UART_1, NO_IRQ}, |
@@ -72,8 +70,7 @@ struct amba_device gpio_device[] = { | |||
72 | }, | 70 | }, |
73 | .res = { | 71 | .res = { |
74 | .start = SPEAR6XX_CPU_GPIO_BASE, | 72 | .start = SPEAR6XX_CPU_GPIO_BASE, |
75 | .end = SPEAR6XX_CPU_GPIO_BASE + | 73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, |
76 | SPEAR6XX_CPU_GPIO_SIZE - 1, | ||
77 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
78 | }, | 75 | }, |
79 | .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, | 76 | .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, |
@@ -84,8 +81,7 @@ struct amba_device gpio_device[] = { | |||
84 | }, | 81 | }, |
85 | .res = { | 82 | .res = { |
86 | .start = SPEAR6XX_ICM3_GPIO_BASE, | 83 | .start = SPEAR6XX_ICM3_GPIO_BASE, |
87 | .end = SPEAR6XX_ICM3_GPIO_BASE + | 84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, |
88 | SPEAR6XX_ICM3_GPIO_SIZE - 1, | ||
89 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
90 | }, | 86 | }, |
91 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 87 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, |
@@ -96,8 +92,7 @@ struct amba_device gpio_device[] = { | |||
96 | }, | 92 | }, |
97 | .res = { | 93 | .res = { |
98 | .start = SPEAR6XX_ICM2_GPIO_BASE, | 94 | .start = SPEAR6XX_ICM2_GPIO_BASE, |
99 | .end = SPEAR6XX_ICM2_GPIO_BASE + | 95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, |
100 | SPEAR6XX_ICM2_GPIO_SIZE - 1, | ||
101 | .flags = IORESOURCE_MEM, | 96 | .flags = IORESOURCE_MEM, |
102 | }, | 97 | }, |
103 | .irq = {IRQ_APPL_GPIO, NO_IRQ}, | 98 | .irq = {IRQ_APPL_GPIO, NO_IRQ}, |
@@ -122,27 +117,27 @@ static struct map_desc spear6xx_io_desc[] __initdata = { | |||
122 | { | 117 | { |
123 | .virtual = VA_SPEAR6XX_ICM1_UART0_BASE, | 118 | .virtual = VA_SPEAR6XX_ICM1_UART0_BASE, |
124 | .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE), | 119 | .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE), |
125 | .length = SPEAR6XX_ICM1_UART0_SIZE, | 120 | .length = SZ_4K, |
126 | .type = MT_DEVICE | 121 | .type = MT_DEVICE |
127 | }, { | 122 | }, { |
128 | .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE, | 123 | .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE, |
129 | .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE), | 124 | .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE), |
130 | .length = SPEAR6XX_CPU_VIC_PRI_SIZE, | 125 | .length = SZ_4K, |
131 | .type = MT_DEVICE | 126 | .type = MT_DEVICE |
132 | }, { | 127 | }, { |
133 | .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE, | 128 | .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE, |
134 | .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE), | 129 | .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE), |
135 | .length = SPEAR6XX_CPU_VIC_SEC_SIZE, | 130 | .length = SZ_4K, |
136 | .type = MT_DEVICE | 131 | .type = MT_DEVICE |
137 | }, { | 132 | }, { |
138 | .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE, | 133 | .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE, |
139 | .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE), | 134 | .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE), |
140 | .length = SPEAR6XX_ICM3_MISC_REG_BASE, | 135 | .length = SZ_4K, |
141 | .type = MT_DEVICE | 136 | .type = MT_DEVICE |
142 | }, { | 137 | }, { |
143 | .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE, | 138 | .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE, |
144 | .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), | 139 | .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), |
145 | .length = SPEAR6XX_ICM3_MISC_REG_SIZE, | 140 | .length = SZ_4K, |
146 | .type = MT_DEVICE | 141 | .type = MT_DEVICE |
147 | }, | 142 | }, |
148 | }; | 143 | }; |
@@ -155,3 +150,34 @@ void __init spear6xx_map_io(void) | |||
155 | /* This will initialize clock framework */ | 150 | /* This will initialize clock framework */ |
156 | clk_init(); | 151 | clk_init(); |
157 | } | 152 | } |
153 | |||
154 | static void __init spear6xx_timer_init(void) | ||
155 | { | ||
156 | char pclk_name[] = "pll3_48m_clk"; | ||
157 | struct clk *gpt_clk, *pclk; | ||
158 | |||
159 | /* get the system timer clock */ | ||
160 | gpt_clk = clk_get_sys("gpt0", NULL); | ||
161 | if (IS_ERR(gpt_clk)) { | ||
162 | pr_err("%s:couldn't get clk for gpt\n", __func__); | ||
163 | BUG(); | ||
164 | } | ||
165 | |||
166 | /* get the suitable parent clock for timer*/ | ||
167 | pclk = clk_get(NULL, pclk_name); | ||
168 | if (IS_ERR(pclk)) { | ||
169 | pr_err("%s:couldn't get %s as parent for gpt\n", | ||
170 | __func__, pclk_name); | ||
171 | BUG(); | ||
172 | } | ||
173 | |||
174 | clk_set_parent(gpt_clk, pclk); | ||
175 | clk_put(gpt_clk); | ||
176 | clk_put(pclk); | ||
177 | |||
178 | spear_setup_timer(); | ||
179 | } | ||
180 | |||
181 | struct sys_timer spear6xx_timer = { | ||
182 | .init = spear6xx_timer_init, | ||
183 | }; | ||
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h index 66ad2760c621..04c779832c78 100644 --- a/arch/arm/mach-tegra/include/mach/kbc.h +++ b/arch/arm/mach-tegra/include/mach/kbc.h | |||
@@ -57,5 +57,6 @@ struct tegra_kbc_platform_data { | |||
57 | const struct matrix_keymap_data *keymap_data; | 57 | const struct matrix_keymap_data *keymap_data; |
58 | 58 | ||
59 | bool wakeup; | 59 | bool wakeup; |
60 | bool use_fn_map; | ||
60 | }; | 61 | }; |
61 | #endif | 62 | #endif |
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 247caa3400d0..203b986280f5 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig | |||
@@ -6,6 +6,7 @@ config UX500_SOC_COMMON | |||
6 | select ARM_GIC | 6 | select ARM_GIC |
7 | select HAS_MTU | 7 | select HAS_MTU |
8 | select NOMADIK_GPIO | 8 | select NOMADIK_GPIO |
9 | select ARM_ERRATA_753970 | ||
9 | 10 | ||
10 | menu "Ux500 SoC" | 11 | menu "Ux500 SoC" |
11 | 12 | ||
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig new file mode 100644 index 000000000000..2c20a341c11a --- /dev/null +++ b/arch/arm/mach-vt8500/Kconfig | |||
@@ -0,0 +1,73 @@ | |||
1 | if ARCH_VT8500 | ||
2 | |||
3 | config VTWM_VERSION_VT8500 | ||
4 | bool | ||
5 | |||
6 | config VTWM_VERSION_WM8505 | ||
7 | bool | ||
8 | |||
9 | config MACH_BV07 | ||
10 | bool "Benign BV07-8500 Mini Netbook" | ||
11 | depends on ARCH_VT8500 | ||
12 | select VTWM_VERSION_VT8500 | ||
13 | help | ||
14 | Add support for the inexpensive 7-inch netbooks sold by many | ||
15 | Chinese distributors under various names. Note that there are | ||
16 | many hardware implementations in identical exterior, make sure | ||
17 | that yours is indeed based on a VIA VT8500 chip. | ||
18 | |||
19 | config MACH_WM8505_7IN_NETBOOK | ||
20 | bool "WM8505 7-inch generic netbook" | ||
21 | depends on ARCH_VT8500 | ||
22 | select VTWM_VERSION_WM8505 | ||
23 | help | ||
24 | Add support for the inexpensive 7-inch netbooks sold by many | ||
25 | Chinese distributors under various names. Note that there are | ||
26 | many hardware implementations in identical exterior, make sure | ||
27 | that yours is indeed based on a WonderMedia WM8505 chip. | ||
28 | |||
29 | comment "LCD panel size" | ||
30 | |||
31 | config WMT_PANEL_800X480 | ||
32 | bool "7-inch with 800x480 resolution" | ||
33 | depends on (FB_VT8500 || FB_WM8505) | ||
34 | default y | ||
35 | help | ||
36 | These are found in most of the netbooks in generic cases, as | ||
37 | well as in Eken M001 tablets and possibly elsewhere. | ||
38 | |||
39 | To select this panel at runtime, say y here and append | ||
40 | 'panel=800x480' to your kernel command line. Otherwise, the | ||
41 | largest one available will be used. | ||
42 | |||
43 | config WMT_PANEL_800X600 | ||
44 | bool "8-inch with 800x600 resolution" | ||
45 | depends on (FB_VT8500 || FB_WM8505) | ||
46 | help | ||
47 | These are found in Eken M003 tablets and possibly elsewhere. | ||
48 | |||
49 | To select this panel at runtime, say y here and append | ||
50 | 'panel=800x600' to your kernel command line. Otherwise, the | ||
51 | largest one available will be used. | ||
52 | |||
53 | config WMT_PANEL_1024X576 | ||
54 | bool "10-inch with 1024x576 resolution" | ||
55 | depends on (FB_VT8500 || FB_WM8505) | ||
56 | help | ||
57 | These are found in CherryPal netbooks and possibly elsewhere. | ||
58 | |||
59 | To select this panel at runtime, say y here and append | ||
60 | 'panel=1024x576' to your kernel command line. Otherwise, the | ||
61 | largest one available will be used. | ||
62 | |||
63 | config WMT_PANEL_1024X600 | ||
64 | bool "10-inch with 1024x600 resolution" | ||
65 | depends on (FB_VT8500 || FB_WM8505) | ||
66 | help | ||
67 | These are found in Eken M006 tablets and possibly elsewhere. | ||
68 | |||
69 | To select this panel at runtime, say y here and append | ||
70 | 'panel=1024x600' to your kernel command line. Otherwise, the | ||
71 | largest one available will be used. | ||
72 | |||
73 | endif | ||
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile new file mode 100644 index 000000000000..81aedb7c893c --- /dev/null +++ b/arch/arm/mach-vt8500/Makefile | |||
@@ -0,0 +1,9 @@ | |||
1 | obj-y += devices.o gpio.o irq.o timer.o | ||
2 | |||
3 | obj-$(CONFIG_VTWM_VERSION_VT8500) += devices-vt8500.o | ||
4 | obj-$(CONFIG_VTWM_VERSION_WM8505) += devices-wm8505.o | ||
5 | |||
6 | obj-$(CONFIG_MACH_BV07) += bv07.o | ||
7 | obj-$(CONFIG_MACH_WM8505_7IN_NETBOOK) += wm8505_7in.o | ||
8 | |||
9 | obj-$(CONFIG_HAVE_PWM) += pwm.o | ||
diff --git a/arch/arm/mach-vt8500/Makefile.boot b/arch/arm/mach-vt8500/Makefile.boot new file mode 100644 index 000000000000..a8acc4e24902 --- /dev/null +++ b/arch/arm/mach-vt8500/Makefile.boot | |||
@@ -0,0 +1,3 @@ | |||
1 | zreladdr-y := 0x00008000 | ||
2 | params_phys-y := 0x00000100 | ||
3 | initrd_phys-y := 0x01000000 | ||
diff --git a/arch/arm/mach-vt8500/bv07.c b/arch/arm/mach-vt8500/bv07.c new file mode 100644 index 000000000000..94a261d86bf0 --- /dev/null +++ b/arch/arm/mach-vt8500/bv07.c | |||
@@ -0,0 +1,77 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/bv07.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/io.h> | ||
22 | #include <linux/pm.h> | ||
23 | |||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/mach/arch.h> | ||
26 | |||
27 | #include "devices.h" | ||
28 | |||
29 | static void __iomem *pmc_hiber; | ||
30 | |||
31 | static struct platform_device *devices[] __initdata = { | ||
32 | &vt8500_device_uart0, | ||
33 | &vt8500_device_lcdc, | ||
34 | &vt8500_device_ehci, | ||
35 | &vt8500_device_ge_rops, | ||
36 | &vt8500_device_pwm, | ||
37 | &vt8500_device_pwmbl, | ||
38 | &vt8500_device_rtc, | ||
39 | }; | ||
40 | |||
41 | static void vt8500_power_off(void) | ||
42 | { | ||
43 | local_irq_disable(); | ||
44 | writew(5, pmc_hiber); | ||
45 | asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0)); | ||
46 | } | ||
47 | |||
48 | void __init bv07_init(void) | ||
49 | { | ||
50 | #ifdef CONFIG_FB_VT8500 | ||
51 | void __iomem *gpio_mux_reg = ioremap(wmt_gpio_base + 0x200, 4); | ||
52 | if (gpio_mux_reg) { | ||
53 | writel(readl(gpio_mux_reg) | 1, gpio_mux_reg); | ||
54 | iounmap(gpio_mux_reg); | ||
55 | } else { | ||
56 | printk(KERN_ERR "Could not remap the GPIO mux register, display may not work properly!\n"); | ||
57 | } | ||
58 | #endif | ||
59 | pmc_hiber = ioremap(wmt_pmc_base + 0x12, 2); | ||
60 | if (pmc_hiber) | ||
61 | pm_power_off = &vt8500_power_off; | ||
62 | else | ||
63 | printk(KERN_ERR "PMC Hibernation register could not be remapped, not enabling power off!\n"); | ||
64 | |||
65 | vt8500_set_resources(); | ||
66 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
67 | vt8500_gpio_init(); | ||
68 | } | ||
69 | |||
70 | MACHINE_START(BV07, "Benign BV07 Mini Netbook") | ||
71 | .boot_params = 0x00000100, | ||
72 | .reserve = vt8500_reserve_mem, | ||
73 | .map_io = vt8500_map_io, | ||
74 | .init_irq = vt8500_init_irq, | ||
75 | .timer = &vt8500_timer, | ||
76 | .init_machine = bv07_init, | ||
77 | MACHINE_END | ||
diff --git a/arch/arm/mach-vt8500/devices-vt8500.c b/arch/arm/mach-vt8500/devices-vt8500.c new file mode 100644 index 000000000000..19519aeecf37 --- /dev/null +++ b/arch/arm/mach-vt8500/devices-vt8500.c | |||
@@ -0,0 +1,91 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/devices-vt8500.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/vt8500_regs.h> | ||
19 | #include <mach/vt8500_irqs.h> | ||
20 | #include <mach/i8042.h> | ||
21 | #include "devices.h" | ||
22 | |||
23 | void __init vt8500_set_resources(void) | ||
24 | { | ||
25 | struct resource tmp[3]; | ||
26 | |||
27 | tmp[0] = wmt_mmio_res(VT8500_LCDC_BASE, SZ_1K); | ||
28 | tmp[1] = wmt_irq_res(IRQ_LCDC); | ||
29 | wmt_res_add(&vt8500_device_lcdc, tmp, 2); | ||
30 | |||
31 | tmp[0] = wmt_mmio_res(VT8500_UART0_BASE, 0x1040); | ||
32 | tmp[1] = wmt_irq_res(IRQ_UART0); | ||
33 | wmt_res_add(&vt8500_device_uart0, tmp, 2); | ||
34 | |||
35 | tmp[0] = wmt_mmio_res(VT8500_UART1_BASE, 0x1040); | ||
36 | tmp[1] = wmt_irq_res(IRQ_UART1); | ||
37 | wmt_res_add(&vt8500_device_uart1, tmp, 2); | ||
38 | |||
39 | tmp[0] = wmt_mmio_res(VT8500_UART2_BASE, 0x1040); | ||
40 | tmp[1] = wmt_irq_res(IRQ_UART2); | ||
41 | wmt_res_add(&vt8500_device_uart2, tmp, 2); | ||
42 | |||
43 | tmp[0] = wmt_mmio_res(VT8500_UART3_BASE, 0x1040); | ||
44 | tmp[1] = wmt_irq_res(IRQ_UART3); | ||
45 | wmt_res_add(&vt8500_device_uart3, tmp, 2); | ||
46 | |||
47 | tmp[0] = wmt_mmio_res(VT8500_EHCI_BASE, SZ_512); | ||
48 | tmp[1] = wmt_irq_res(IRQ_EHCI); | ||
49 | wmt_res_add(&vt8500_device_ehci, tmp, 2); | ||
50 | |||
51 | tmp[0] = wmt_mmio_res(VT8500_GEGEA_BASE, SZ_256); | ||
52 | wmt_res_add(&vt8500_device_ge_rops, tmp, 1); | ||
53 | |||
54 | tmp[0] = wmt_mmio_res(VT8500_PWM_BASE, 0x44); | ||
55 | wmt_res_add(&vt8500_device_pwm, tmp, 1); | ||
56 | |||
57 | tmp[0] = wmt_mmio_res(VT8500_RTC_BASE, 0x2c); | ||
58 | tmp[1] = wmt_irq_res(IRQ_RTC); | ||
59 | tmp[2] = wmt_irq_res(IRQ_RTCSM); | ||
60 | wmt_res_add(&vt8500_device_rtc, tmp, 3); | ||
61 | } | ||
62 | |||
63 | static void __init vt8500_set_externs(void) | ||
64 | { | ||
65 | /* Non-resource-aware stuff */ | ||
66 | wmt_ic_base = VT8500_IC_BASE; | ||
67 | wmt_gpio_base = VT8500_GPIO_BASE; | ||
68 | wmt_pmc_base = VT8500_PMC_BASE; | ||
69 | wmt_i8042_base = VT8500_PS2_BASE; | ||
70 | |||
71 | wmt_nr_irqs = VT8500_NR_IRQS; | ||
72 | wmt_timer_irq = IRQ_PMCOS0; | ||
73 | wmt_gpio_ext_irq[0] = IRQ_EXT0; | ||
74 | wmt_gpio_ext_irq[1] = IRQ_EXT1; | ||
75 | wmt_gpio_ext_irq[2] = IRQ_EXT2; | ||
76 | wmt_gpio_ext_irq[3] = IRQ_EXT3; | ||
77 | wmt_gpio_ext_irq[4] = IRQ_EXT4; | ||
78 | wmt_gpio_ext_irq[5] = IRQ_EXT5; | ||
79 | wmt_gpio_ext_irq[6] = IRQ_EXT6; | ||
80 | wmt_gpio_ext_irq[7] = IRQ_EXT7; | ||
81 | wmt_i8042_kbd_irq = IRQ_PS2KBD; | ||
82 | wmt_i8042_aux_irq = IRQ_PS2MOUSE; | ||
83 | } | ||
84 | |||
85 | void __init vt8500_map_io(void) | ||
86 | { | ||
87 | iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc)); | ||
88 | |||
89 | /* Should be done before interrupts and timers are initialized */ | ||
90 | vt8500_set_externs(); | ||
91 | } | ||
diff --git a/arch/arm/mach-vt8500/devices-wm8505.c b/arch/arm/mach-vt8500/devices-wm8505.c new file mode 100644 index 000000000000..db4594e029f4 --- /dev/null +++ b/arch/arm/mach-vt8500/devices-wm8505.c | |||
@@ -0,0 +1,99 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/devices-wm8505.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/wm8505_regs.h> | ||
19 | #include <mach/wm8505_irqs.h> | ||
20 | #include <mach/i8042.h> | ||
21 | #include "devices.h" | ||
22 | |||
23 | void __init wm8505_set_resources(void) | ||
24 | { | ||
25 | struct resource tmp[3]; | ||
26 | |||
27 | tmp[0] = wmt_mmio_res(WM8505_GOVR_BASE, SZ_512); | ||
28 | wmt_res_add(&vt8500_device_wm8505_fb, tmp, 1); | ||
29 | |||
30 | tmp[0] = wmt_mmio_res(WM8505_UART0_BASE, 0x1040); | ||
31 | tmp[1] = wmt_irq_res(IRQ_UART0); | ||
32 | wmt_res_add(&vt8500_device_uart0, tmp, 2); | ||
33 | |||
34 | tmp[0] = wmt_mmio_res(WM8505_UART1_BASE, 0x1040); | ||
35 | tmp[1] = wmt_irq_res(IRQ_UART1); | ||
36 | wmt_res_add(&vt8500_device_uart1, tmp, 2); | ||
37 | |||
38 | tmp[0] = wmt_mmio_res(WM8505_UART2_BASE, 0x1040); | ||
39 | tmp[1] = wmt_irq_res(IRQ_UART2); | ||
40 | wmt_res_add(&vt8500_device_uart2, tmp, 2); | ||
41 | |||
42 | tmp[0] = wmt_mmio_res(WM8505_UART3_BASE, 0x1040); | ||
43 | tmp[1] = wmt_irq_res(IRQ_UART3); | ||
44 | wmt_res_add(&vt8500_device_uart3, tmp, 2); | ||
45 | |||
46 | tmp[0] = wmt_mmio_res(WM8505_UART4_BASE, 0x1040); | ||
47 | tmp[1] = wmt_irq_res(IRQ_UART4); | ||
48 | wmt_res_add(&vt8500_device_uart4, tmp, 2); | ||
49 | |||
50 | tmp[0] = wmt_mmio_res(WM8505_UART5_BASE, 0x1040); | ||
51 | tmp[1] = wmt_irq_res(IRQ_UART5); | ||
52 | wmt_res_add(&vt8500_device_uart5, tmp, 2); | ||
53 | |||
54 | tmp[0] = wmt_mmio_res(WM8505_EHCI_BASE, SZ_512); | ||
55 | tmp[1] = wmt_irq_res(IRQ_EHCI); | ||
56 | wmt_res_add(&vt8500_device_ehci, tmp, 2); | ||
57 | |||
58 | tmp[0] = wmt_mmio_res(WM8505_GEGEA_BASE, SZ_256); | ||
59 | wmt_res_add(&vt8500_device_ge_rops, tmp, 1); | ||
60 | |||
61 | tmp[0] = wmt_mmio_res(WM8505_PWM_BASE, 0x44); | ||
62 | wmt_res_add(&vt8500_device_pwm, tmp, 1); | ||
63 | |||
64 | tmp[0] = wmt_mmio_res(WM8505_RTC_BASE, 0x2c); | ||
65 | tmp[1] = wmt_irq_res(IRQ_RTC); | ||
66 | tmp[2] = wmt_irq_res(IRQ_RTCSM); | ||
67 | wmt_res_add(&vt8500_device_rtc, tmp, 3); | ||
68 | } | ||
69 | |||
70 | static void __init wm8505_set_externs(void) | ||
71 | { | ||
72 | /* Non-resource-aware stuff */ | ||
73 | wmt_ic_base = WM8505_IC_BASE; | ||
74 | wmt_sic_base = WM8505_SIC_BASE; | ||
75 | wmt_gpio_base = WM8505_GPIO_BASE; | ||
76 | wmt_pmc_base = WM8505_PMC_BASE; | ||
77 | wmt_i8042_base = WM8505_PS2_BASE; | ||
78 | |||
79 | wmt_nr_irqs = WM8505_NR_IRQS; | ||
80 | wmt_timer_irq = IRQ_PMCOS0; | ||
81 | wmt_gpio_ext_irq[0] = IRQ_EXT0; | ||
82 | wmt_gpio_ext_irq[1] = IRQ_EXT1; | ||
83 | wmt_gpio_ext_irq[2] = IRQ_EXT2; | ||
84 | wmt_gpio_ext_irq[3] = IRQ_EXT3; | ||
85 | wmt_gpio_ext_irq[4] = IRQ_EXT4; | ||
86 | wmt_gpio_ext_irq[5] = IRQ_EXT5; | ||
87 | wmt_gpio_ext_irq[6] = IRQ_EXT6; | ||
88 | wmt_gpio_ext_irq[7] = IRQ_EXT7; | ||
89 | wmt_i8042_kbd_irq = IRQ_PS2KBD; | ||
90 | wmt_i8042_aux_irq = IRQ_PS2MOUSE; | ||
91 | } | ||
92 | |||
93 | void __init wm8505_map_io(void) | ||
94 | { | ||
95 | iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc)); | ||
96 | |||
97 | /* Should be done before interrupts and timers are initialized */ | ||
98 | wm8505_set_externs(); | ||
99 | } | ||
diff --git a/arch/arm/mach-vt8500/devices.c b/arch/arm/mach-vt8500/devices.c new file mode 100644 index 000000000000..1fcdc36b358d --- /dev/null +++ b/arch/arm/mach-vt8500/devices.c | |||
@@ -0,0 +1,270 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/devices.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/device.h> | ||
19 | #include <linux/dma-mapping.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/pwm_backlight.h> | ||
22 | #include <linux/memblock.h> | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | |||
26 | #include <mach/vt8500fb.h> | ||
27 | #include <mach/i8042.h> | ||
28 | #include "devices.h" | ||
29 | |||
30 | /* These can't use resources currently */ | ||
31 | unsigned long wmt_ic_base __initdata; | ||
32 | unsigned long wmt_sic_base __initdata; | ||
33 | unsigned long wmt_gpio_base __initdata; | ||
34 | unsigned long wmt_pmc_base __initdata; | ||
35 | unsigned long wmt_i8042_base __initdata; | ||
36 | |||
37 | int wmt_nr_irqs __initdata; | ||
38 | int wmt_timer_irq __initdata; | ||
39 | int wmt_gpio_ext_irq[8] __initdata; | ||
40 | |||
41 | /* Should remain accessible after init. | ||
42 | * i8042 driver desperately calls for attention... | ||
43 | */ | ||
44 | int wmt_i8042_kbd_irq; | ||
45 | int wmt_i8042_aux_irq; | ||
46 | |||
47 | static u64 fb_dma_mask = DMA_BIT_MASK(32); | ||
48 | |||
49 | struct platform_device vt8500_device_lcdc = { | ||
50 | .name = "vt8500-lcd", | ||
51 | .id = 0, | ||
52 | .dev = { | ||
53 | .dma_mask = &fb_dma_mask, | ||
54 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
55 | }, | ||
56 | }; | ||
57 | |||
58 | struct platform_device vt8500_device_wm8505_fb = { | ||
59 | .name = "wm8505-fb", | ||
60 | .id = 0, | ||
61 | }; | ||
62 | |||
63 | /* Smallest to largest */ | ||
64 | static struct vt8500fb_platform_data panels[] = { | ||
65 | #ifdef CONFIG_WMT_PANEL_800X480 | ||
66 | { | ||
67 | .xres_virtual = 800, | ||
68 | .yres_virtual = 480 * 2, | ||
69 | .mode = { | ||
70 | .name = "800x480", | ||
71 | .xres = 800, | ||
72 | .yres = 480, | ||
73 | .left_margin = 88, | ||
74 | .right_margin = 40, | ||
75 | .upper_margin = 32, | ||
76 | .lower_margin = 11, | ||
77 | .hsync_len = 0, | ||
78 | .vsync_len = 1, | ||
79 | .vmode = FB_VMODE_NONINTERLACED, | ||
80 | }, | ||
81 | }, | ||
82 | #endif | ||
83 | #ifdef CONFIG_WMT_PANEL_800X600 | ||
84 | { | ||
85 | .xres_virtual = 800, | ||
86 | .yres_virtual = 600 * 2, | ||
87 | .mode = { | ||
88 | .name = "800x600", | ||
89 | .xres = 800, | ||
90 | .yres = 600, | ||
91 | .left_margin = 88, | ||
92 | .right_margin = 40, | ||
93 | .upper_margin = 32, | ||
94 | .lower_margin = 11, | ||
95 | .hsync_len = 0, | ||
96 | .vsync_len = 1, | ||
97 | .vmode = FB_VMODE_NONINTERLACED, | ||
98 | }, | ||
99 | }, | ||
100 | #endif | ||
101 | #ifdef CONFIG_WMT_PANEL_1024X576 | ||
102 | { | ||
103 | .xres_virtual = 1024, | ||
104 | .yres_virtual = 576 * 2, | ||
105 | .mode = { | ||
106 | .name = "1024x576", | ||
107 | .xres = 1024, | ||
108 | .yres = 576, | ||
109 | .left_margin = 40, | ||
110 | .right_margin = 24, | ||
111 | .upper_margin = 32, | ||
112 | .lower_margin = 11, | ||
113 | .hsync_len = 96, | ||
114 | .vsync_len = 2, | ||
115 | .vmode = FB_VMODE_NONINTERLACED, | ||
116 | }, | ||
117 | }, | ||
118 | #endif | ||
119 | #ifdef CONFIG_WMT_PANEL_1024X600 | ||
120 | { | ||
121 | .xres_virtual = 1024, | ||
122 | .yres_virtual = 600 * 2, | ||
123 | .mode = { | ||
124 | .name = "1024x600", | ||
125 | .xres = 1024, | ||
126 | .yres = 600, | ||
127 | .left_margin = 66, | ||
128 | .right_margin = 2, | ||
129 | .upper_margin = 19, | ||
130 | .lower_margin = 1, | ||
131 | .hsync_len = 23, | ||
132 | .vsync_len = 8, | ||
133 | .vmode = FB_VMODE_NONINTERLACED, | ||
134 | }, | ||
135 | }, | ||
136 | #endif | ||
137 | }; | ||
138 | |||
139 | static int current_panel_idx __initdata = ARRAY_SIZE(panels) - 1; | ||
140 | |||
141 | static int __init panel_setup(char *str) | ||
142 | { | ||
143 | int i; | ||
144 | |||
145 | for (i = 0; i < ARRAY_SIZE(panels); i++) { | ||
146 | if (strcmp(panels[i].mode.name, str) == 0) { | ||
147 | current_panel_idx = i; | ||
148 | break; | ||
149 | } | ||
150 | } | ||
151 | return 0; | ||
152 | } | ||
153 | |||
154 | early_param("panel", panel_setup); | ||
155 | |||
156 | static inline void preallocate_fb(struct vt8500fb_platform_data *p, | ||
157 | unsigned long align) { | ||
158 | p->video_mem_len = (p->xres_virtual * p->yres_virtual * 4) >> | ||
159 | (p->bpp > 16 ? 0 : (p->bpp > 8 ? 1 : | ||
160 | (8 / p->bpp) + 1)); | ||
161 | p->video_mem_phys = (unsigned long)memblock_alloc(p->video_mem_len, | ||
162 | align); | ||
163 | p->video_mem_virt = phys_to_virt(p->video_mem_phys); | ||
164 | } | ||
165 | |||
166 | struct platform_device vt8500_device_uart0 = { | ||
167 | .name = "vt8500_serial", | ||
168 | .id = 0, | ||
169 | }; | ||
170 | |||
171 | struct platform_device vt8500_device_uart1 = { | ||
172 | .name = "vt8500_serial", | ||
173 | .id = 1, | ||
174 | }; | ||
175 | |||
176 | struct platform_device vt8500_device_uart2 = { | ||
177 | .name = "vt8500_serial", | ||
178 | .id = 2, | ||
179 | }; | ||
180 | |||
181 | struct platform_device vt8500_device_uart3 = { | ||
182 | .name = "vt8500_serial", | ||
183 | .id = 3, | ||
184 | }; | ||
185 | |||
186 | struct platform_device vt8500_device_uart4 = { | ||
187 | .name = "vt8500_serial", | ||
188 | .id = 4, | ||
189 | }; | ||
190 | |||
191 | struct platform_device vt8500_device_uart5 = { | ||
192 | .name = "vt8500_serial", | ||
193 | .id = 5, | ||
194 | }; | ||
195 | |||
196 | static u64 ehci_dma_mask = DMA_BIT_MASK(32); | ||
197 | |||
198 | struct platform_device vt8500_device_ehci = { | ||
199 | .name = "vt8500-ehci", | ||
200 | .id = 0, | ||
201 | .dev = { | ||
202 | .dma_mask = &ehci_dma_mask, | ||
203 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
204 | }, | ||
205 | }; | ||
206 | |||
207 | struct platform_device vt8500_device_ge_rops = { | ||
208 | .name = "wmt_ge_rops", | ||
209 | .id = -1, | ||
210 | }; | ||
211 | |||
212 | struct platform_device vt8500_device_pwm = { | ||
213 | .name = "vt8500-pwm", | ||
214 | .id = 0, | ||
215 | }; | ||
216 | |||
217 | static struct platform_pwm_backlight_data vt8500_pwmbl_data = { | ||
218 | .pwm_id = 0, | ||
219 | .max_brightness = 128, | ||
220 | .dft_brightness = 70, | ||
221 | .pwm_period_ns = 250000, /* revisit when clocks are implemented */ | ||
222 | }; | ||
223 | |||
224 | struct platform_device vt8500_device_pwmbl = { | ||
225 | .name = "pwm-backlight", | ||
226 | .id = 0, | ||
227 | .dev = { | ||
228 | .platform_data = &vt8500_pwmbl_data, | ||
229 | }, | ||
230 | }; | ||
231 | |||
232 | struct platform_device vt8500_device_rtc = { | ||
233 | .name = "vt8500-rtc", | ||
234 | .id = 0, | ||
235 | }; | ||
236 | |||
237 | struct map_desc wmt_io_desc[] __initdata = { | ||
238 | /* SoC MMIO registers */ | ||
239 | [0] = { | ||
240 | .virtual = 0xf8000000, | ||
241 | .pfn = __phys_to_pfn(0xd8000000), | ||
242 | .length = 0x00390000, /* max of all chip variants */ | ||
243 | .type = MT_DEVICE | ||
244 | }, | ||
245 | /* PCI I/O space, numbers tied to those in <mach/io.h> */ | ||
246 | [1] = { | ||
247 | .virtual = 0xf0000000, | ||
248 | .pfn = __phys_to_pfn(0xc0000000), | ||
249 | .length = SZ_64K, | ||
250 | .type = MT_DEVICE | ||
251 | }, | ||
252 | }; | ||
253 | |||
254 | void __init vt8500_reserve_mem(void) | ||
255 | { | ||
256 | #ifdef CONFIG_FB_VT8500 | ||
257 | panels[current_panel_idx].bpp = 16; /* Always use RGB565 */ | ||
258 | preallocate_fb(&panels[current_panel_idx], SZ_4M); | ||
259 | vt8500_device_lcdc.dev.platform_data = &panels[current_panel_idx]; | ||
260 | #endif | ||
261 | } | ||
262 | |||
263 | void __init wm8505_reserve_mem(void) | ||
264 | { | ||
265 | #if defined CONFIG_FB_WM8505 | ||
266 | panels[current_panel_idx].bpp = 32; /* Always use RGB888 */ | ||
267 | preallocate_fb(&panels[current_panel_idx], 32); | ||
268 | vt8500_device_wm8505_fb.dev.platform_data = &panels[current_panel_idx]; | ||
269 | #endif | ||
270 | } | ||
diff --git a/arch/arm/mach-vt8500/devices.h b/arch/arm/mach-vt8500/devices.h new file mode 100644 index 000000000000..188d4e17f35c --- /dev/null +++ b/arch/arm/mach-vt8500/devices.h | |||
@@ -0,0 +1,88 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/devices.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __ARCH_ARM_MACH_VT8500_DEVICES_H | ||
17 | #define __ARCH_ARM_MACH_VT8500_DEVICES_H | ||
18 | |||
19 | #include <linux/platform_device.h> | ||
20 | #include <asm/mach/map.h> | ||
21 | |||
22 | void __init vt8500_init_irq(void); | ||
23 | void __init wm8505_init_irq(void); | ||
24 | void __init vt8500_map_io(void); | ||
25 | void __init wm8505_map_io(void); | ||
26 | void __init vt8500_reserve_mem(void); | ||
27 | void __init wm8505_reserve_mem(void); | ||
28 | void __init vt8500_gpio_init(void); | ||
29 | void __init vt8500_set_resources(void); | ||
30 | void __init wm8505_set_resources(void); | ||
31 | |||
32 | extern unsigned long wmt_ic_base __initdata; | ||
33 | extern unsigned long wmt_sic_base __initdata; | ||
34 | extern unsigned long wmt_gpio_base __initdata; | ||
35 | extern unsigned long wmt_pmc_base __initdata; | ||
36 | |||
37 | extern int wmt_nr_irqs __initdata; | ||
38 | extern int wmt_timer_irq __initdata; | ||
39 | extern int wmt_gpio_ext_irq[8] __initdata; | ||
40 | |||
41 | extern struct map_desc wmt_io_desc[2] __initdata; | ||
42 | |||
43 | static inline struct resource wmt_mmio_res(u32 start, u32 size) | ||
44 | { | ||
45 | struct resource tmp = { | ||
46 | .flags = IORESOURCE_MEM, | ||
47 | .start = start, | ||
48 | .end = start + size - 1, | ||
49 | }; | ||
50 | |||
51 | return tmp; | ||
52 | } | ||
53 | |||
54 | static inline struct resource wmt_irq_res(int irq) | ||
55 | { | ||
56 | struct resource tmp = { | ||
57 | .flags = IORESOURCE_IRQ, | ||
58 | .start = irq, | ||
59 | .end = irq, | ||
60 | }; | ||
61 | |||
62 | return tmp; | ||
63 | } | ||
64 | |||
65 | static inline void wmt_res_add(struct platform_device *pdev, | ||
66 | const struct resource *res, unsigned int num) | ||
67 | { | ||
68 | if (unlikely(platform_device_add_resources(pdev, res, num))) | ||
69 | pr_err("Failed to assign resources\n"); | ||
70 | } | ||
71 | |||
72 | extern struct sys_timer vt8500_timer; | ||
73 | |||
74 | extern struct platform_device vt8500_device_uart0; | ||
75 | extern struct platform_device vt8500_device_uart1; | ||
76 | extern struct platform_device vt8500_device_uart2; | ||
77 | extern struct platform_device vt8500_device_uart3; | ||
78 | extern struct platform_device vt8500_device_uart4; | ||
79 | extern struct platform_device vt8500_device_uart5; | ||
80 | |||
81 | extern struct platform_device vt8500_device_lcdc; | ||
82 | extern struct platform_device vt8500_device_wm8505_fb; | ||
83 | extern struct platform_device vt8500_device_ehci; | ||
84 | extern struct platform_device vt8500_device_ge_rops; | ||
85 | extern struct platform_device vt8500_device_pwm; | ||
86 | extern struct platform_device vt8500_device_pwmbl; | ||
87 | extern struct platform_device vt8500_device_rtc; | ||
88 | #endif | ||
diff --git a/arch/arm/mach-vt8500/gpio.c b/arch/arm/mach-vt8500/gpio.c new file mode 100644 index 000000000000..2bcc0ec783df --- /dev/null +++ b/arch/arm/mach-vt8500/gpio.c | |||
@@ -0,0 +1,240 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/gpio.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/irq.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include "devices.h" | ||
22 | |||
23 | #define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip) | ||
24 | |||
25 | #define ENABLE_REGS 0x0 | ||
26 | #define DIRECTION_REGS 0x20 | ||
27 | #define OUTVALUE_REGS 0x40 | ||
28 | #define INVALUE_REGS 0x60 | ||
29 | |||
30 | #define EXT_REGOFF 0x1c | ||
31 | |||
32 | static void __iomem *regbase; | ||
33 | |||
34 | struct vt8500_gpio_chip { | ||
35 | struct gpio_chip chip; | ||
36 | unsigned int shift; | ||
37 | unsigned int regoff; | ||
38 | }; | ||
39 | |||
40 | static int gpio_to_irq_map[8]; | ||
41 | |||
42 | static int vt8500_muxed_gpio_request(struct gpio_chip *chip, | ||
43 | unsigned offset) | ||
44 | { | ||
45 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
46 | unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff); | ||
47 | |||
48 | val |= (1 << vt8500_chip->shift << offset); | ||
49 | writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff); | ||
50 | |||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | static void vt8500_muxed_gpio_free(struct gpio_chip *chip, | ||
55 | unsigned offset) | ||
56 | { | ||
57 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
58 | unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff); | ||
59 | |||
60 | val &= ~(1 << vt8500_chip->shift << offset); | ||
61 | writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff); | ||
62 | } | ||
63 | |||
64 | static int vt8500_muxed_gpio_direction_input(struct gpio_chip *chip, | ||
65 | unsigned offset) | ||
66 | { | ||
67 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
68 | unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff); | ||
69 | |||
70 | val &= ~(1 << vt8500_chip->shift << offset); | ||
71 | writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff); | ||
72 | |||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | static int vt8500_muxed_gpio_direction_output(struct gpio_chip *chip, | ||
77 | unsigned offset, int value) | ||
78 | { | ||
79 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
80 | unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff); | ||
81 | |||
82 | val |= (1 << vt8500_chip->shift << offset); | ||
83 | writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff); | ||
84 | |||
85 | if (value) { | ||
86 | val = readl(regbase + OUTVALUE_REGS + vt8500_chip->regoff); | ||
87 | val |= (1 << vt8500_chip->shift << offset); | ||
88 | writel(val, regbase + OUTVALUE_REGS + vt8500_chip->regoff); | ||
89 | } | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | static int vt8500_muxed_gpio_get_value(struct gpio_chip *chip, | ||
94 | unsigned offset) | ||
95 | { | ||
96 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
97 | |||
98 | return (readl(regbase + INVALUE_REGS + vt8500_chip->regoff) | ||
99 | >> vt8500_chip->shift >> offset) & 1; | ||
100 | } | ||
101 | |||
102 | static void vt8500_muxed_gpio_set_value(struct gpio_chip *chip, | ||
103 | unsigned offset, int value) | ||
104 | { | ||
105 | struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip); | ||
106 | unsigned val = readl(regbase + INVALUE_REGS + vt8500_chip->regoff); | ||
107 | |||
108 | if (value) | ||
109 | val |= (1 << vt8500_chip->shift << offset); | ||
110 | else | ||
111 | val &= ~(1 << vt8500_chip->shift << offset); | ||
112 | |||
113 | writel(val, regbase + INVALUE_REGS + vt8500_chip->regoff); | ||
114 | } | ||
115 | |||
116 | #define VT8500_GPIO_BANK(__name, __shift, __off, __base, __num) \ | ||
117 | { \ | ||
118 | .chip = { \ | ||
119 | .label = __name, \ | ||
120 | .request = vt8500_muxed_gpio_request, \ | ||
121 | .free = vt8500_muxed_gpio_free, \ | ||
122 | .direction_input = vt8500_muxed_gpio_direction_input, \ | ||
123 | .direction_output = vt8500_muxed_gpio_direction_output, \ | ||
124 | .get = vt8500_muxed_gpio_get_value, \ | ||
125 | .set = vt8500_muxed_gpio_set_value, \ | ||
126 | .can_sleep = 0, \ | ||
127 | .base = __base, \ | ||
128 | .ngpio = __num, \ | ||
129 | }, \ | ||
130 | .shift = __shift, \ | ||
131 | .regoff = __off, \ | ||
132 | } | ||
133 | |||
134 | static struct vt8500_gpio_chip vt8500_muxed_gpios[] = { | ||
135 | VT8500_GPIO_BANK("uart0", 0, 0x0, 8, 4), | ||
136 | VT8500_GPIO_BANK("uart1", 4, 0x0, 12, 4), | ||
137 | VT8500_GPIO_BANK("spi0", 8, 0x0, 16, 4), | ||
138 | VT8500_GPIO_BANK("spi1", 12, 0x0, 20, 4), | ||
139 | VT8500_GPIO_BANK("spi2", 16, 0x0, 24, 4), | ||
140 | VT8500_GPIO_BANK("pwmout", 24, 0x0, 28, 2), | ||
141 | |||
142 | VT8500_GPIO_BANK("sdmmc", 0, 0x4, 30, 11), | ||
143 | VT8500_GPIO_BANK("ms", 16, 0x4, 41, 7), | ||
144 | VT8500_GPIO_BANK("i2c0", 24, 0x4, 48, 2), | ||
145 | VT8500_GPIO_BANK("i2c1", 26, 0x4, 50, 2), | ||
146 | |||
147 | VT8500_GPIO_BANK("mii", 0, 0x8, 52, 20), | ||
148 | VT8500_GPIO_BANK("see", 20, 0x8, 72, 4), | ||
149 | VT8500_GPIO_BANK("ide", 24, 0x8, 76, 7), | ||
150 | |||
151 | VT8500_GPIO_BANK("ccir", 0, 0xc, 83, 19), | ||
152 | |||
153 | VT8500_GPIO_BANK("ts", 8, 0x10, 102, 11), | ||
154 | |||
155 | VT8500_GPIO_BANK("lcd", 0, 0x14, 113, 23), | ||
156 | }; | ||
157 | |||
158 | static int vt8500_gpio_direction_input(struct gpio_chip *chip, | ||
159 | unsigned offset) | ||
160 | { | ||
161 | unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF); | ||
162 | |||
163 | val &= ~(1 << offset); | ||
164 | writel(val, regbase + DIRECTION_REGS + EXT_REGOFF); | ||
165 | return 0; | ||
166 | } | ||
167 | |||
168 | static int vt8500_gpio_direction_output(struct gpio_chip *chip, | ||
169 | unsigned offset, int value) | ||
170 | { | ||
171 | unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF); | ||
172 | |||
173 | val |= (1 << offset); | ||
174 | writel(val, regbase + DIRECTION_REGS + EXT_REGOFF); | ||
175 | |||
176 | if (value) { | ||
177 | val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF); | ||
178 | val |= (1 << offset); | ||
179 | writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF); | ||
180 | } | ||
181 | return 0; | ||
182 | } | ||
183 | |||
184 | static int vt8500_gpio_get_value(struct gpio_chip *chip, | ||
185 | unsigned offset) | ||
186 | { | ||
187 | return (readl(regbase + INVALUE_REGS + EXT_REGOFF) >> offset) & 1; | ||
188 | } | ||
189 | |||
190 | static void vt8500_gpio_set_value(struct gpio_chip *chip, | ||
191 | unsigned offset, int value) | ||
192 | { | ||
193 | unsigned val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF); | ||
194 | |||
195 | if (value) | ||
196 | val |= (1 << offset); | ||
197 | else | ||
198 | val &= ~(1 << offset); | ||
199 | |||
200 | writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF); | ||
201 | } | ||
202 | |||
203 | static int vt8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
204 | { | ||
205 | if (offset > 7) | ||
206 | return -EINVAL; | ||
207 | |||
208 | return gpio_to_irq_map[offset]; | ||
209 | } | ||
210 | |||
211 | static struct gpio_chip vt8500_external_gpios = { | ||
212 | .label = "extgpio", | ||
213 | .direction_input = vt8500_gpio_direction_input, | ||
214 | .direction_output = vt8500_gpio_direction_output, | ||
215 | .get = vt8500_gpio_get_value, | ||
216 | .set = vt8500_gpio_set_value, | ||
217 | .to_irq = vt8500_gpio_to_irq, | ||
218 | .can_sleep = 0, | ||
219 | .base = 0, | ||
220 | .ngpio = 8, | ||
221 | }; | ||
222 | |||
223 | void __init vt8500_gpio_init(void) | ||
224 | { | ||
225 | int i; | ||
226 | |||
227 | for (i = 0; i < 8; i++) | ||
228 | gpio_to_irq_map[i] = wmt_gpio_ext_irq[i]; | ||
229 | |||
230 | regbase = ioremap(wmt_gpio_base, SZ_64K); | ||
231 | if (!regbase) { | ||
232 | printk(KERN_ERR "Failed to map MMIO registers for GPIO\n"); | ||
233 | return; | ||
234 | } | ||
235 | |||
236 | gpiochip_add(&vt8500_external_gpios); | ||
237 | |||
238 | for (i = 0; i < ARRAY_SIZE(vt8500_muxed_gpios); i++) | ||
239 | gpiochip_add(&vt8500_muxed_gpios[i].chip); | ||
240 | } | ||
diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/mach-vt8500/include/mach/debug-macro.S new file mode 100644 index 000000000000..f1191626ad51 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/debug-macro.S | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/debug-macro.S | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * Debugging macro include header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | .macro addruart, rp, rv | ||
15 | mov \rp, #0x00200000 | ||
16 | orr \rv, \rp, #0xf8000000 | ||
17 | orr \rp, \rp, #0xd8000000 | ||
18 | .endm | ||
19 | |||
20 | .macro senduart,rd,rx | ||
21 | strb \rd, [\rx, #0] | ||
22 | .endm | ||
23 | |||
24 | .macro busyuart,rd,rx | ||
25 | 1001: ldr \rd, [\rx, #0x1c] | ||
26 | ands \rd, \rd, #0x2 | ||
27 | bne 1001b | ||
28 | .endm | ||
29 | |||
30 | .macro waituart,rd,rx | ||
31 | .endm | ||
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S new file mode 100644 index 000000000000..92684c7eaed3 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for VIA VT8500 | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | ||
15 | @ physical 0xd8140000 is virtual 0xf8140000 | ||
16 | mov \base, #0xf8000000 | ||
17 | orr \base, \base, #0x00140000 | ||
18 | .endm | ||
19 | |||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
24 | ldr \irqnr, [\base] | ||
25 | cmp \irqnr, #63 @ may be false positive, check interrupt status | ||
26 | bne 1001f | ||
27 | ldr \irqstat, [\base, #0x84] | ||
28 | ands \irqstat, #0x80000000 | ||
29 | moveq \irqnr, #0 | ||
30 | 1001: | ||
31 | .endm | ||
32 | |||
diff --git a/arch/arm/mach-vt8500/include/mach/gpio.h b/arch/arm/mach-vt8500/include/mach/gpio.h new file mode 100644 index 000000000000..94ff27678a46 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/gpio.h | |||
@@ -0,0 +1,6 @@ | |||
1 | #include <asm-generic/gpio.h> | ||
2 | |||
3 | #define gpio_get_value __gpio_get_value | ||
4 | #define gpio_set_value __gpio_set_value | ||
5 | #define gpio_cansleep __gpio_cansleep | ||
6 | #define gpio_to_irq __gpio_to_irq | ||
diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h new file mode 100644 index 000000000000..db4163f72c39 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/hardware.h | |||
@@ -0,0 +1,12 @@ | |||
1 | /* arch/arm/mach-vt8500/include/mach/hardware.h | ||
2 | * | ||
3 | * This software is licensed under the terms of the GNU General Public | ||
4 | * License version 2, as published by the Free Software Foundation, and | ||
5 | * may be copied, distributed, and modified under those terms. | ||
6 | * | ||
7 | * This program is distributed in the hope that it will be useful, | ||
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
10 | * GNU General Public License for more details. | ||
11 | * | ||
12 | */ | ||
diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h new file mode 100644 index 000000000000..cd7143cad6f3 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/i8042.h | |||
@@ -0,0 +1,18 @@ | |||
1 | /* arch/arm/mach-vt8500/include/mach/i8042.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | extern unsigned long wmt_i8042_base __initdata; | ||
17 | extern int wmt_i8042_kbd_irq; | ||
18 | extern int wmt_i8042_aux_irq; | ||
diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h new file mode 100644 index 000000000000..9077239f78c9 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/io.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/io.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARM_ARCH_IO_H | ||
21 | #define __ASM_ARM_ARCH_IO_H | ||
22 | |||
23 | #define IO_SPACE_LIMIT 0xffff | ||
24 | |||
25 | #define __io(a) __typesafe_io((a) + 0xf0000000) | ||
26 | #define __mem_pci(a) (a) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-vt8500/include/mach/irqs.h b/arch/arm/mach-vt8500/include/mach/irqs.h new file mode 100644 index 000000000000..a129fd1222fb --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/irqs.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/irqs.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | /* This value is just to make the core happy, never used otherwise */ | ||
22 | #define NR_IRQS 128 | ||
diff --git a/arch/arm/mach-vt8500/include/mach/memory.h b/arch/arm/mach-vt8500/include/mach/memory.h new file mode 100644 index 000000000000..175f914eff93 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/memory.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | /* | ||
24 | * Physical DRAM offset. | ||
25 | */ | ||
26 | #define PHYS_OFFSET UL(0x00000000) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h new file mode 100644 index 000000000000..d6c757eaf26b --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/system.h | |||
@@ -0,0 +1,18 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/system.h | ||
3 | * | ||
4 | */ | ||
5 | #include <asm/io.h> | ||
6 | |||
7 | /* PM Software Reset request register */ | ||
8 | #define VT8500_PMSR_VIRT 0xf8130060 | ||
9 | |||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | static inline void arch_reset(char mode, const char *cmd) | ||
16 | { | ||
17 | writel(1, VT8500_PMSR_VIRT); | ||
18 | } | ||
diff --git a/arch/arm/mach-vt8500/include/mach/timex.h b/arch/arm/mach-vt8500/include/mach/timex.h new file mode 100644 index 000000000000..8487e4c690b7 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/timex.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/timex.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef MACH_TIMEX_H | ||
22 | #define MACH_TIMEX_H | ||
23 | |||
24 | #define CLOCK_TICK_RATE (3000000) | ||
25 | |||
26 | #endif /* MACH_TIMEX_H */ | ||
diff --git a/arch/arm/mach-vt8500/include/mach/uncompress.h b/arch/arm/mach-vt8500/include/mach/uncompress.h new file mode 100644 index 000000000000..bb9e2d23fee3 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/uncompress.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* arch/arm/mach-vt8500/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * Based on arch/arm/mach-dove/include/mach/uncompress.h | ||
6 | * | ||
7 | * This software is licensed under the terms of the GNU General Public | ||
8 | * License version 2, as published by the Free Software Foundation, and | ||
9 | * may be copied, distributed, and modified under those terms. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #define UART0_PHYS 0xd8200000 | ||
19 | #include <asm/io.h> | ||
20 | |||
21 | static void putc(const char c) | ||
22 | { | ||
23 | while (readb(UART0_PHYS + 0x1c) & 0x2) | ||
24 | /* Tx busy, wait and poll */; | ||
25 | |||
26 | writeb(c, UART0_PHYS); | ||
27 | } | ||
28 | |||
29 | static void flush(void) | ||
30 | { | ||
31 | } | ||
32 | |||
33 | /* | ||
34 | * nothing to do | ||
35 | */ | ||
36 | #define arch_decomp_setup() | ||
37 | #define arch_decomp_wdog() | ||
diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h new file mode 100644 index 000000000000..4642290ce416 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/vmalloc.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/vmalloc.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #define VMALLOC_END 0xd0000000UL | ||
diff --git a/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h b/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h new file mode 100644 index 000000000000..ecfee9124711 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h | |||
@@ -0,0 +1,88 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/vt8500_irqs.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | /* VT8500 Interrupt Sources */ | ||
22 | |||
23 | #define IRQ_JPEGENC 0 /* JPEG Encoder */ | ||
24 | #define IRQ_JPEGDEC 1 /* JPEG Decoder */ | ||
25 | /* Reserved */ | ||
26 | #define IRQ_PATA 3 /* PATA Controller */ | ||
27 | /* Reserved */ | ||
28 | #define IRQ_DMA 5 /* DMA Controller */ | ||
29 | #define IRQ_EXT0 6 /* External Interrupt 0 */ | ||
30 | #define IRQ_EXT1 7 /* External Interrupt 1 */ | ||
31 | #define IRQ_GE 8 /* Graphic Engine */ | ||
32 | #define IRQ_GOV 9 /* Graphic Overlay Engine */ | ||
33 | #define IRQ_ETHER 10 /* Ethernet MAC */ | ||
34 | #define IRQ_MPEGTS 11 /* Transport Stream Interface */ | ||
35 | #define IRQ_LCDC 12 /* LCD Controller */ | ||
36 | #define IRQ_EXT2 13 /* External Interrupt 2 */ | ||
37 | #define IRQ_EXT3 14 /* External Interrupt 3 */ | ||
38 | #define IRQ_EXT4 15 /* External Interrupt 4 */ | ||
39 | #define IRQ_CIPHER 16 /* Cipher */ | ||
40 | #define IRQ_VPP 17 /* Video Post-Processor */ | ||
41 | #define IRQ_I2C1 18 /* I2C 1 */ | ||
42 | #define IRQ_I2C0 19 /* I2C 0 */ | ||
43 | #define IRQ_SDMMC 20 /* SD/MMC Controller */ | ||
44 | #define IRQ_SDMMC_DMA 21 /* SD/MMC Controller DMA */ | ||
45 | #define IRQ_PMC_WU 22 /* Power Management Controller Wakeup */ | ||
46 | /* Reserved */ | ||
47 | #define IRQ_SPI0 24 /* SPI 0 */ | ||
48 | #define IRQ_SPI1 25 /* SPI 1 */ | ||
49 | #define IRQ_SPI2 26 /* SPI 2 */ | ||
50 | #define IRQ_LCDDF 27 /* LCD Data Formatter */ | ||
51 | #define IRQ_NAND 28 /* NAND Flash Controller */ | ||
52 | #define IRQ_NAND_DMA 29 /* NAND Flash Controller DMA */ | ||
53 | #define IRQ_MS 30 /* MemoryStick Controller */ | ||
54 | #define IRQ_MS_DMA 31 /* MemoryStick Controller DMA */ | ||
55 | #define IRQ_UART0 32 /* UART 0 */ | ||
56 | #define IRQ_UART1 33 /* UART 1 */ | ||
57 | #define IRQ_I2S 34 /* I2S */ | ||
58 | #define IRQ_PCM 35 /* PCM */ | ||
59 | #define IRQ_PMCOS0 36 /* PMC OS Timer 0 */ | ||
60 | #define IRQ_PMCOS1 37 /* PMC OS Timer 1 */ | ||
61 | #define IRQ_PMCOS2 38 /* PMC OS Timer 2 */ | ||
62 | #define IRQ_PMCOS3 39 /* PMC OS Timer 3 */ | ||
63 | #define IRQ_VPU 40 /* Video Processing Unit */ | ||
64 | #define IRQ_VID 41 /* Video Digital Input Interface */ | ||
65 | #define IRQ_AC97 42 /* AC97 Interface */ | ||
66 | #define IRQ_EHCI 43 /* USB */ | ||
67 | #define IRQ_NOR 44 /* NOR Flash Controller */ | ||
68 | #define IRQ_PS2MOUSE 45 /* PS/2 Mouse */ | ||
69 | #define IRQ_PS2KBD 46 /* PS/2 Keyboard */ | ||
70 | #define IRQ_UART2 47 /* UART 2 */ | ||
71 | #define IRQ_RTC 48 /* RTC Interrupt */ | ||
72 | #define IRQ_RTCSM 49 /* RTC Second/Minute Update Interrupt */ | ||
73 | #define IRQ_UART3 50 /* UART 3 */ | ||
74 | #define IRQ_ADC 51 /* ADC */ | ||
75 | #define IRQ_EXT5 52 /* External Interrupt 5 */ | ||
76 | #define IRQ_EXT6 53 /* External Interrupt 6 */ | ||
77 | #define IRQ_EXT7 54 /* External Interrupt 7 */ | ||
78 | #define IRQ_CIR 55 /* CIR */ | ||
79 | #define IRQ_DMA0 56 /* DMA Channel 0 */ | ||
80 | #define IRQ_DMA1 57 /* DMA Channel 1 */ | ||
81 | #define IRQ_DMA2 58 /* DMA Channel 2 */ | ||
82 | #define IRQ_DMA3 59 /* DMA Channel 3 */ | ||
83 | #define IRQ_DMA4 60 /* DMA Channel 4 */ | ||
84 | #define IRQ_DMA5 61 /* DMA Channel 5 */ | ||
85 | #define IRQ_DMA6 62 /* DMA Channel 6 */ | ||
86 | #define IRQ_DMA7 63 /* DMA Channel 7 */ | ||
87 | |||
88 | #define VT8500_NR_IRQS 64 | ||
diff --git a/arch/arm/mach-vt8500/include/mach/vt8500_regs.h b/arch/arm/mach-vt8500/include/mach/vt8500_regs.h new file mode 100644 index 000000000000..29c63ecb2383 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/vt8500_regs.h | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/vt8500_regs.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARM_ARCH_VT8500_REGS_H | ||
21 | #define __ASM_ARM_ARCH_VT8500_REGS_H | ||
22 | |||
23 | /* VT8500 Registers Map */ | ||
24 | |||
25 | #define VT8500_REGS_START_PHYS 0xd8000000 /* Start of MMIO registers */ | ||
26 | #define VT8500_REGS_START_VIRT 0xf8000000 /* Virtual mapping start */ | ||
27 | |||
28 | #define VT8500_DDR_BASE 0xd8000000 /* 1k DDR/DDR2 Memory | ||
29 | Controller */ | ||
30 | #define VT8500_DMA_BASE 0xd8001000 /* 1k DMA Controller */ | ||
31 | #define VT8500_SFLASH_BASE 0xd8002000 /* 1k Serial Flash Memory | ||
32 | Controller */ | ||
33 | #define VT8500_ETHER_BASE 0xd8004000 /* 1k Ethernet MAC 0 */ | ||
34 | #define VT8500_CIPHER_BASE 0xd8006000 /* 4k Cipher */ | ||
35 | #define VT8500_USB_BASE 0xd8007800 /* 2k USB OTG */ | ||
36 | # define VT8500_EHCI_BASE 0xd8007900 /* EHCI */ | ||
37 | # define VT8500_UHCI_BASE 0xd8007b01 /* UHCI */ | ||
38 | #define VT8500_PATA_BASE 0xd8008000 /* 512 PATA */ | ||
39 | #define VT8500_PS2_BASE 0xd8008800 /* 1k PS/2 */ | ||
40 | #define VT8500_NAND_BASE 0xd8009000 /* 1k NAND Controller */ | ||
41 | #define VT8500_NOR_BASE 0xd8009400 /* 1k NOR Controller */ | ||
42 | #define VT8500_SDMMC_BASE 0xd800a000 /* 1k SD/MMC Controller */ | ||
43 | #define VT8500_MS_BASE 0xd800b000 /* 1k MS/MSPRO Controller */ | ||
44 | #define VT8500_LCDC_BASE 0xd800e400 /* 1k LCD Controller */ | ||
45 | #define VT8500_VPU_BASE 0xd8050000 /* 256 VPU */ | ||
46 | #define VT8500_GOV_BASE 0xd8050300 /* 256 GOV */ | ||
47 | #define VT8500_GEGEA_BASE 0xd8050400 /* 768 GE/GE Alpha Mixing */ | ||
48 | #define VT8500_LCDF_BASE 0xd8050900 /* 256 LCD Formatter */ | ||
49 | #define VT8500_VID_BASE 0xd8050a00 /* 256 VID */ | ||
50 | #define VT8500_VPP_BASE 0xd8050b00 /* 256 VPP */ | ||
51 | #define VT8500_TSBK_BASE 0xd80f4000 /* 4k TSBK */ | ||
52 | #define VT8500_JPEGDEC_BASE 0xd80fe000 /* 4k JPEG Decoder */ | ||
53 | #define VT8500_JPEGENC_BASE 0xd80ff000 /* 4k JPEG Encoder */ | ||
54 | #define VT8500_RTC_BASE 0xd8100000 /* 64k RTC */ | ||
55 | #define VT8500_GPIO_BASE 0xd8110000 /* 64k GPIO Configuration */ | ||
56 | #define VT8500_SCC_BASE 0xd8120000 /* 64k System Configuration*/ | ||
57 | #define VT8500_PMC_BASE 0xd8130000 /* 64k PMC Configuration */ | ||
58 | #define VT8500_IC_BASE 0xd8140000 /* 64k Interrupt Controller*/ | ||
59 | #define VT8500_UART0_BASE 0xd8200000 /* 64k UART 0 */ | ||
60 | #define VT8500_UART2_BASE 0xd8210000 /* 64k UART 2 */ | ||
61 | #define VT8500_PWM_BASE 0xd8220000 /* 64k PWM Configuration */ | ||
62 | #define VT8500_SPI0_BASE 0xd8240000 /* 64k SPI 0 */ | ||
63 | #define VT8500_SPI1_BASE 0xd8250000 /* 64k SPI 1 */ | ||
64 | #define VT8500_CIR_BASE 0xd8270000 /* 64k CIR */ | ||
65 | #define VT8500_I2C0_BASE 0xd8280000 /* 64k I2C 0 */ | ||
66 | #define VT8500_AC97_BASE 0xd8290000 /* 64k AC97 */ | ||
67 | #define VT8500_SPI2_BASE 0xd82a0000 /* 64k SPI 2 */ | ||
68 | #define VT8500_UART1_BASE 0xd82b0000 /* 64k UART 1 */ | ||
69 | #define VT8500_UART3_BASE 0xd82c0000 /* 64k UART 3 */ | ||
70 | #define VT8500_PCM_BASE 0xd82d0000 /* 64k PCM */ | ||
71 | #define VT8500_I2C1_BASE 0xd8320000 /* 64k I2C 1 */ | ||
72 | #define VT8500_I2S_BASE 0xd8330000 /* 64k I2S */ | ||
73 | #define VT8500_ADC_BASE 0xd8340000 /* 64k ADC */ | ||
74 | |||
75 | #define VT8500_REGS_END_PHYS 0xd834ffff /* End of MMIO registers */ | ||
76 | #define VT8500_REGS_LENGTH (VT8500_REGS_END_PHYS \ | ||
77 | - VT8500_REGS_START_PHYS + 1) | ||
78 | |||
79 | #endif | ||
diff --git a/arch/arm/mach-vt8500/include/mach/vt8500fb.h b/arch/arm/mach-vt8500/include/mach/vt8500fb.h new file mode 100644 index 000000000000..7f399c370fe0 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/vt8500fb.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * VT8500/WM8505 Frame Buffer platform data definitions | ||
3 | * | ||
4 | * Copyright (C) 2010 Ed Spiridonov <edo.rus@gmail.com> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef _VT8500FB_H | ||
17 | #define _VT8500FB_H | ||
18 | |||
19 | #include <linux/fb.h> | ||
20 | |||
21 | struct vt8500fb_platform_data { | ||
22 | struct fb_videomode mode; | ||
23 | u32 xres_virtual; | ||
24 | u32 yres_virtual; | ||
25 | u32 bpp; | ||
26 | unsigned long video_mem_phys; | ||
27 | void *video_mem_virt; | ||
28 | unsigned long video_mem_len; | ||
29 | }; | ||
30 | |||
31 | #endif /* _VT8500FB_H */ | ||
diff --git a/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h b/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h new file mode 100644 index 000000000000..6128627ac753 --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h | |||
@@ -0,0 +1,115 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/wm8505_irqs.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | /* WM8505 Interrupt Sources */ | ||
22 | |||
23 | #define IRQ_UHCI 0 /* UHC FS (UHCI?) */ | ||
24 | #define IRQ_EHCI 1 /* UHC HS */ | ||
25 | #define IRQ_UDCDMA 2 /* UDC DMA */ | ||
26 | /* Reserved */ | ||
27 | #define IRQ_PS2MOUSE 4 /* PS/2 Mouse */ | ||
28 | #define IRQ_UDC 5 /* UDC */ | ||
29 | #define IRQ_EXT0 6 /* External Interrupt 0 */ | ||
30 | #define IRQ_EXT1 7 /* External Interrupt 1 */ | ||
31 | #define IRQ_KEYPAD 8 /* Keypad */ | ||
32 | #define IRQ_DMA 9 /* DMA Controller */ | ||
33 | #define IRQ_ETHER 10 /* Ethernet MAC */ | ||
34 | /* Reserved */ | ||
35 | /* Reserved */ | ||
36 | #define IRQ_EXT2 13 /* External Interrupt 2 */ | ||
37 | #define IRQ_EXT3 14 /* External Interrupt 3 */ | ||
38 | #define IRQ_EXT4 15 /* External Interrupt 4 */ | ||
39 | #define IRQ_APB 16 /* APB Bridge */ | ||
40 | #define IRQ_DMA0 17 /* DMA Channel 0 */ | ||
41 | #define IRQ_I2C1 18 /* I2C 1 */ | ||
42 | #define IRQ_I2C0 19 /* I2C 0 */ | ||
43 | #define IRQ_SDMMC 20 /* SD/MMC Controller */ | ||
44 | #define IRQ_SDMMC_DMA 21 /* SD/MMC Controller DMA */ | ||
45 | #define IRQ_PMC_WU 22 /* Power Management Controller Wakeup */ | ||
46 | #define IRQ_PS2KBD 23 /* PS/2 Keyboard */ | ||
47 | #define IRQ_SPI0 24 /* SPI 0 */ | ||
48 | #define IRQ_SPI1 25 /* SPI 1 */ | ||
49 | #define IRQ_SPI2 26 /* SPI 2 */ | ||
50 | #define IRQ_DMA1 27 /* DMA Channel 1 */ | ||
51 | #define IRQ_NAND 28 /* NAND Flash Controller */ | ||
52 | #define IRQ_NAND_DMA 29 /* NAND Flash Controller DMA */ | ||
53 | #define IRQ_UART5 30 /* UART 5 */ | ||
54 | #define IRQ_UART4 31 /* UART 4 */ | ||
55 | #define IRQ_UART0 32 /* UART 0 */ | ||
56 | #define IRQ_UART1 33 /* UART 1 */ | ||
57 | #define IRQ_DMA2 34 /* DMA Channel 2 */ | ||
58 | #define IRQ_I2S 35 /* I2S */ | ||
59 | #define IRQ_PMCOS0 36 /* PMC OS Timer 0 */ | ||
60 | #define IRQ_PMCOS1 37 /* PMC OS Timer 1 */ | ||
61 | #define IRQ_PMCOS2 38 /* PMC OS Timer 2 */ | ||
62 | #define IRQ_PMCOS3 39 /* PMC OS Timer 3 */ | ||
63 | #define IRQ_DMA3 40 /* DMA Channel 3 */ | ||
64 | #define IRQ_DMA4 41 /* DMA Channel 4 */ | ||
65 | #define IRQ_AC97 42 /* AC97 Interface */ | ||
66 | /* Reserved */ | ||
67 | #define IRQ_NOR 44 /* NOR Flash Controller */ | ||
68 | #define IRQ_DMA5 45 /* DMA Channel 5 */ | ||
69 | #define IRQ_DMA6 46 /* DMA Channel 6 */ | ||
70 | #define IRQ_UART2 47 /* UART 2 */ | ||
71 | #define IRQ_RTC 48 /* RTC Interrupt */ | ||
72 | #define IRQ_RTCSM 49 /* RTC Second/Minute Update Interrupt */ | ||
73 | #define IRQ_UART3 50 /* UART 3 */ | ||
74 | #define IRQ_DMA7 51 /* DMA Channel 7 */ | ||
75 | #define IRQ_EXT5 52 /* External Interrupt 5 */ | ||
76 | #define IRQ_EXT6 53 /* External Interrupt 6 */ | ||
77 | #define IRQ_EXT7 54 /* External Interrupt 7 */ | ||
78 | #define IRQ_CIR 55 /* CIR */ | ||
79 | #define IRQ_SIC0 56 /* SIC IRQ0 */ | ||
80 | #define IRQ_SIC1 57 /* SIC IRQ1 */ | ||
81 | #define IRQ_SIC2 58 /* SIC IRQ2 */ | ||
82 | #define IRQ_SIC3 59 /* SIC IRQ3 */ | ||
83 | #define IRQ_SIC4 60 /* SIC IRQ4 */ | ||
84 | #define IRQ_SIC5 61 /* SIC IRQ5 */ | ||
85 | #define IRQ_SIC6 62 /* SIC IRQ6 */ | ||
86 | #define IRQ_SIC7 63 /* SIC IRQ7 */ | ||
87 | /* Reserved */ | ||
88 | #define IRQ_JPEGDEC 65 /* JPEG Decoder */ | ||
89 | #define IRQ_SAE 66 /* SAE (?) */ | ||
90 | /* Reserved */ | ||
91 | #define IRQ_VPU 79 /* Video Processing Unit */ | ||
92 | #define IRQ_VPP 80 /* Video Post-Processor */ | ||
93 | #define IRQ_VID 81 /* Video Digital Input Interface */ | ||
94 | #define IRQ_SPU 82 /* SPU (?) */ | ||
95 | #define IRQ_PIP 83 /* PIP Error */ | ||
96 | #define IRQ_GE 84 /* Graphic Engine */ | ||
97 | #define IRQ_GOV 85 /* Graphic Overlay Engine */ | ||
98 | #define IRQ_DVO 86 /* Digital Video Output */ | ||
99 | /* Reserved */ | ||
100 | #define IRQ_DMA8 92 /* DMA Channel 8 */ | ||
101 | #define IRQ_DMA9 93 /* DMA Channel 9 */ | ||
102 | #define IRQ_DMA10 94 /* DMA Channel 10 */ | ||
103 | #define IRQ_DMA11 95 /* DMA Channel 11 */ | ||
104 | #define IRQ_DMA12 96 /* DMA Channel 12 */ | ||
105 | #define IRQ_DMA13 97 /* DMA Channel 13 */ | ||
106 | #define IRQ_DMA14 98 /* DMA Channel 14 */ | ||
107 | #define IRQ_DMA15 99 /* DMA Channel 15 */ | ||
108 | /* Reserved */ | ||
109 | #define IRQ_GOVW 111 /* GOVW (?) */ | ||
110 | #define IRQ_GOVRSDSCD 112 /* GOVR SDSCD (?) */ | ||
111 | #define IRQ_GOVRSDMIF 113 /* GOVR SDMIF (?) */ | ||
112 | #define IRQ_GOVRHDSCD 114 /* GOVR HDSCD (?) */ | ||
113 | #define IRQ_GOVRHDMIF 115 /* GOVR HDMIF (?) */ | ||
114 | |||
115 | #define WM8505_NR_IRQS 116 | ||
diff --git a/arch/arm/mach-vt8500/include/mach/wm8505_regs.h b/arch/arm/mach-vt8500/include/mach/wm8505_regs.h new file mode 100644 index 000000000000..df1550941efb --- /dev/null +++ b/arch/arm/mach-vt8500/include/mach/wm8505_regs.h | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/wm8505_regs.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARM_ARCH_WM8505_REGS_H | ||
21 | #define __ASM_ARM_ARCH_WM8505_REGS_H | ||
22 | |||
23 | /* WM8505 Registers Map */ | ||
24 | |||
25 | #define WM8505_REGS_START_PHYS 0xd8000000 /* Start of MMIO registers */ | ||
26 | #define WM8505_REGS_START_VIRT 0xf8000000 /* Virtual mapping start */ | ||
27 | |||
28 | #define WM8505_DDR_BASE 0xd8000400 /* 1k DDR/DDR2 Memory | ||
29 | Controller */ | ||
30 | #define WM8505_DMA_BASE 0xd8001800 /* 1k DMA Controller */ | ||
31 | #define WM8505_VDMA_BASE 0xd8001c00 /* 1k VDMA */ | ||
32 | #define WM8505_SFLASH_BASE 0xd8002000 /* 1k Serial Flash Memory | ||
33 | Controller */ | ||
34 | #define WM8505_ETHER_BASE 0xd8004000 /* 1k Ethernet MAC 0 */ | ||
35 | #define WM8505_CIPHER_BASE 0xd8006000 /* 4k Cipher */ | ||
36 | #define WM8505_USB_BASE 0xd8007000 /* 2k USB 2.0 Host */ | ||
37 | # define WM8505_EHCI_BASE 0xd8007100 /* EHCI */ | ||
38 | # define WM8505_UHCI_BASE 0xd8007301 /* UHCI */ | ||
39 | #define WM8505_PS2_BASE 0xd8008800 /* 1k PS/2 */ | ||
40 | #define WM8505_NAND_BASE 0xd8009000 /* 1k NAND Controller */ | ||
41 | #define WM8505_NOR_BASE 0xd8009400 /* 1k NOR Controller */ | ||
42 | #define WM8505_SDMMC_BASE 0xd800a000 /* 1k SD/MMC Controller */ | ||
43 | #define WM8505_VPU_BASE 0xd8050000 /* 256 VPU */ | ||
44 | #define WM8505_GOV_BASE 0xd8050300 /* 256 GOV */ | ||
45 | #define WM8505_GEGEA_BASE 0xd8050400 /* 768 GE/GE Alpha Mixing */ | ||
46 | #define WM8505_GOVR_BASE 0xd8050800 /* 512 GOVR (frambuffer) */ | ||
47 | #define WM8505_VID_BASE 0xd8050a00 /* 256 VID */ | ||
48 | #define WM8505_SCL_BASE 0xd8050d00 /* 256 SCL */ | ||
49 | #define WM8505_VPP_BASE 0xd8050f00 /* 256 VPP */ | ||
50 | #define WM8505_JPEGDEC_BASE 0xd80fe000 /* 4k JPEG Decoder */ | ||
51 | #define WM8505_RTC_BASE 0xd8100000 /* 64k RTC */ | ||
52 | #define WM8505_GPIO_BASE 0xd8110000 /* 64k GPIO Configuration */ | ||
53 | #define WM8505_SCC_BASE 0xd8120000 /* 64k System Configuration*/ | ||
54 | #define WM8505_PMC_BASE 0xd8130000 /* 64k PMC Configuration */ | ||
55 | #define WM8505_IC_BASE 0xd8140000 /* 64k Interrupt Controller*/ | ||
56 | #define WM8505_SIC_BASE 0xd8150000 /* 64k Secondary IC */ | ||
57 | #define WM8505_UART0_BASE 0xd8200000 /* 64k UART 0 */ | ||
58 | #define WM8505_UART2_BASE 0xd8210000 /* 64k UART 2 */ | ||
59 | #define WM8505_PWM_BASE 0xd8220000 /* 64k PWM Configuration */ | ||
60 | #define WM8505_SPI0_BASE 0xd8240000 /* 64k SPI 0 */ | ||
61 | #define WM8505_SPI1_BASE 0xd8250000 /* 64k SPI 1 */ | ||
62 | #define WM8505_KEYPAD_BASE 0xd8260000 /* 64k Keypad control */ | ||
63 | #define WM8505_CIR_BASE 0xd8270000 /* 64k CIR */ | ||
64 | #define WM8505_I2C0_BASE 0xd8280000 /* 64k I2C 0 */ | ||
65 | #define WM8505_AC97_BASE 0xd8290000 /* 64k AC97 */ | ||
66 | #define WM8505_SPI2_BASE 0xd82a0000 /* 64k SPI 2 */ | ||
67 | #define WM8505_UART1_BASE 0xd82b0000 /* 64k UART 1 */ | ||
68 | #define WM8505_UART3_BASE 0xd82c0000 /* 64k UART 3 */ | ||
69 | #define WM8505_I2C1_BASE 0xd8320000 /* 64k I2C 1 */ | ||
70 | #define WM8505_I2S_BASE 0xd8330000 /* 64k I2S */ | ||
71 | #define WM8505_UART4_BASE 0xd8370000 /* 64k UART 4 */ | ||
72 | #define WM8505_UART5_BASE 0xd8380000 /* 64k UART 5 */ | ||
73 | |||
74 | #define WM8505_REGS_END_PHYS 0xd838ffff /* End of MMIO registers */ | ||
75 | #define WM8505_REGS_LENGTH (WM8505_REGS_END_PHYS \ | ||
76 | - WM8505_REGS_START_PHYS + 1) | ||
77 | |||
78 | #endif | ||
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c new file mode 100644 index 000000000000..5f4ddde4f02a --- /dev/null +++ b/arch/arm/mach-vt8500/irq.c | |||
@@ -0,0 +1,177 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/irq.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/io.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | |||
25 | #include <asm/irq.h> | ||
26 | |||
27 | #include "devices.h" | ||
28 | |||
29 | #define VT8500_IC_DCTR 0x40 /* Destination control | ||
30 | register, 64*u8 */ | ||
31 | #define VT8500_INT_ENABLE (1 << 3) | ||
32 | #define VT8500_TRIGGER_HIGH (0 << 4) | ||
33 | #define VT8500_TRIGGER_RISING (1 << 4) | ||
34 | #define VT8500_TRIGGER_FALLING (2 << 4) | ||
35 | #define VT8500_EDGE ( VT8500_TRIGGER_RISING \ | ||
36 | | VT8500_TRIGGER_FALLING) | ||
37 | #define VT8500_IC_STATUS 0x80 /* Interrupt status, 2*u32 */ | ||
38 | |||
39 | static void __iomem *ic_regbase; | ||
40 | static void __iomem *sic_regbase; | ||
41 | |||
42 | static void vt8500_irq_mask(unsigned int irq) | ||
43 | { | ||
44 | void __iomem *base = ic_regbase; | ||
45 | u8 edge; | ||
46 | |||
47 | if (irq >= 64) { | ||
48 | base = sic_regbase; | ||
49 | irq -= 64; | ||
50 | } | ||
51 | edge = readb(base + VT8500_IC_DCTR + irq) & VT8500_EDGE; | ||
52 | if (edge) { | ||
53 | void __iomem *stat_reg = base + VT8500_IC_STATUS | ||
54 | + (irq < 32 ? 0 : 4); | ||
55 | unsigned status = readl(stat_reg); | ||
56 | |||
57 | status |= (1 << (irq & 0x1f)); | ||
58 | writel(status, stat_reg); | ||
59 | } else { | ||
60 | u8 dctr = readb(base + VT8500_IC_DCTR + irq); | ||
61 | |||
62 | dctr &= ~VT8500_INT_ENABLE; | ||
63 | writeb(dctr, base + VT8500_IC_DCTR + irq); | ||
64 | } | ||
65 | } | ||
66 | |||
67 | static void vt8500_irq_unmask(unsigned int irq) | ||
68 | { | ||
69 | void __iomem *base = ic_regbase; | ||
70 | u8 dctr; | ||
71 | |||
72 | if (irq >= 64) { | ||
73 | base = sic_regbase; | ||
74 | irq -= 64; | ||
75 | } | ||
76 | dctr = readb(base + VT8500_IC_DCTR + irq); | ||
77 | dctr |= VT8500_INT_ENABLE; | ||
78 | writeb(dctr, base + VT8500_IC_DCTR + irq); | ||
79 | } | ||
80 | |||
81 | static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) | ||
82 | { | ||
83 | void __iomem *base = ic_regbase; | ||
84 | unsigned int orig_irq = irq; | ||
85 | u8 dctr; | ||
86 | |||
87 | if (irq >= 64) { | ||
88 | base = sic_regbase; | ||
89 | irq -= 64; | ||
90 | } | ||
91 | |||
92 | dctr = readb(base + VT8500_IC_DCTR + irq); | ||
93 | dctr &= ~VT8500_EDGE; | ||
94 | |||
95 | switch (flow_type) { | ||
96 | case IRQF_TRIGGER_LOW: | ||
97 | return -EINVAL; | ||
98 | case IRQF_TRIGGER_HIGH: | ||
99 | dctr |= VT8500_TRIGGER_HIGH; | ||
100 | irq_desc[orig_irq].handle_irq = handle_level_irq; | ||
101 | break; | ||
102 | case IRQF_TRIGGER_FALLING: | ||
103 | dctr |= VT8500_TRIGGER_FALLING; | ||
104 | irq_desc[orig_irq].handle_irq = handle_edge_irq; | ||
105 | break; | ||
106 | case IRQF_TRIGGER_RISING: | ||
107 | dctr |= VT8500_TRIGGER_RISING; | ||
108 | irq_desc[orig_irq].handle_irq = handle_edge_irq; | ||
109 | break; | ||
110 | } | ||
111 | writeb(dctr, base + VT8500_IC_DCTR + irq); | ||
112 | |||
113 | return 0; | ||
114 | } | ||
115 | |||
116 | static struct irq_chip vt8500_irq_chip = { | ||
117 | .name = "vt8500", | ||
118 | .ack = vt8500_irq_mask, | ||
119 | .mask = vt8500_irq_mask, | ||
120 | .unmask = vt8500_irq_unmask, | ||
121 | .set_type = vt8500_irq_set_type, | ||
122 | }; | ||
123 | |||
124 | void __init vt8500_init_irq(void) | ||
125 | { | ||
126 | unsigned int i; | ||
127 | |||
128 | ic_regbase = ioremap(wmt_ic_base, SZ_64K); | ||
129 | |||
130 | if (ic_regbase) { | ||
131 | /* Enable rotating priority for IRQ */ | ||
132 | writel((1 << 6), ic_regbase + 0x20); | ||
133 | writel(0, ic_regbase + 0x24); | ||
134 | |||
135 | for (i = 0; i < wmt_nr_irqs; i++) { | ||
136 | /* Disable all interrupts and route them to IRQ */ | ||
137 | writeb(0x00, ic_regbase + VT8500_IC_DCTR + i); | ||
138 | |||
139 | set_irq_chip(i, &vt8500_irq_chip); | ||
140 | set_irq_handler(i, handle_level_irq); | ||
141 | set_irq_flags(i, IRQF_VALID); | ||
142 | } | ||
143 | } else { | ||
144 | printk(KERN_ERR "Unable to remap the Interrupt Controller registers, not enabling IRQs!\n"); | ||
145 | } | ||
146 | } | ||
147 | |||
148 | void __init wm8505_init_irq(void) | ||
149 | { | ||
150 | unsigned int i; | ||
151 | |||
152 | ic_regbase = ioremap(wmt_ic_base, SZ_64K); | ||
153 | sic_regbase = ioremap(wmt_sic_base, SZ_64K); | ||
154 | |||
155 | if (ic_regbase && sic_regbase) { | ||
156 | /* Enable rotating priority for IRQ */ | ||
157 | writel((1 << 6), ic_regbase + 0x20); | ||
158 | writel(0, ic_regbase + 0x24); | ||
159 | writel((1 << 6), sic_regbase + 0x20); | ||
160 | writel(0, sic_regbase + 0x24); | ||
161 | |||
162 | for (i = 0; i < wmt_nr_irqs; i++) { | ||
163 | /* Disable all interrupts and route them to IRQ */ | ||
164 | if (i < 64) | ||
165 | writeb(0x00, ic_regbase + VT8500_IC_DCTR + i); | ||
166 | else | ||
167 | writeb(0x00, sic_regbase + VT8500_IC_DCTR | ||
168 | + i - 64); | ||
169 | |||
170 | set_irq_chip(i, &vt8500_irq_chip); | ||
171 | set_irq_handler(i, handle_level_irq); | ||
172 | set_irq_flags(i, IRQF_VALID); | ||
173 | } | ||
174 | } else { | ||
175 | printk(KERN_ERR "Unable to remap the Interrupt Controller registers, not enabling IRQs!\n"); | ||
176 | } | ||
177 | } | ||
diff --git a/arch/arm/mach-vt8500/pwm.c b/arch/arm/mach-vt8500/pwm.c new file mode 100644 index 000000000000..8ad825e93592 --- /dev/null +++ b/arch/arm/mach-vt8500/pwm.c | |||
@@ -0,0 +1,265 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/pwm.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #include <linux/module.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/err.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/pwm.h> | ||
23 | #include <linux/delay.h> | ||
24 | |||
25 | #include <asm/div64.h> | ||
26 | |||
27 | #define VT8500_NR_PWMS 4 | ||
28 | |||
29 | static DEFINE_MUTEX(pwm_lock); | ||
30 | static LIST_HEAD(pwm_list); | ||
31 | |||
32 | struct pwm_device { | ||
33 | struct list_head node; | ||
34 | struct platform_device *pdev; | ||
35 | |||
36 | const char *label; | ||
37 | |||
38 | void __iomem *regbase; | ||
39 | |||
40 | unsigned int use_count; | ||
41 | unsigned int pwm_id; | ||
42 | }; | ||
43 | |||
44 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | ||
45 | static inline void pwm_busy_wait(void __iomem *reg, u8 bitmask) | ||
46 | { | ||
47 | int loops = msecs_to_loops(10); | ||
48 | while ((readb(reg) & bitmask) && --loops) | ||
49 | cpu_relax(); | ||
50 | |||
51 | if (unlikely(!loops)) | ||
52 | pr_warning("Waiting for status bits 0x%x to clear timed out\n", | ||
53 | bitmask); | ||
54 | } | ||
55 | |||
56 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
57 | { | ||
58 | unsigned long long c; | ||
59 | unsigned long period_cycles, prescale, pv, dc; | ||
60 | |||
61 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
62 | return -EINVAL; | ||
63 | |||
64 | c = 25000000/2; /* wild guess --- need to implement clocks */ | ||
65 | c = c * period_ns; | ||
66 | do_div(c, 1000000000); | ||
67 | period_cycles = c; | ||
68 | |||
69 | if (period_cycles < 1) | ||
70 | period_cycles = 1; | ||
71 | prescale = (period_cycles - 1) / 4096; | ||
72 | pv = period_cycles / (prescale + 1) - 1; | ||
73 | if (pv > 4095) | ||
74 | pv = 4095; | ||
75 | |||
76 | if (prescale > 1023) | ||
77 | return -EINVAL; | ||
78 | |||
79 | c = (unsigned long long)pv * duty_ns; | ||
80 | do_div(c, period_ns); | ||
81 | dc = c; | ||
82 | |||
83 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 1)); | ||
84 | writel(prescale, pwm->regbase + 0x4 + (pwm->pwm_id << 4)); | ||
85 | |||
86 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 2)); | ||
87 | writel(pv, pwm->regbase + 0x8 + (pwm->pwm_id << 4)); | ||
88 | |||
89 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 3)); | ||
90 | writel(dc, pwm->regbase + 0xc + (pwm->pwm_id << 4)); | ||
91 | |||
92 | return 0; | ||
93 | } | ||
94 | EXPORT_SYMBOL(pwm_config); | ||
95 | |||
96 | int pwm_enable(struct pwm_device *pwm) | ||
97 | { | ||
98 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 0)); | ||
99 | writel(5, pwm->regbase + (pwm->pwm_id << 4)); | ||
100 | return 0; | ||
101 | } | ||
102 | EXPORT_SYMBOL(pwm_enable); | ||
103 | |||
104 | void pwm_disable(struct pwm_device *pwm) | ||
105 | { | ||
106 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 0)); | ||
107 | writel(0, pwm->regbase + (pwm->pwm_id << 4)); | ||
108 | } | ||
109 | EXPORT_SYMBOL(pwm_disable); | ||
110 | |||
111 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
112 | { | ||
113 | struct pwm_device *pwm; | ||
114 | int found = 0; | ||
115 | |||
116 | mutex_lock(&pwm_lock); | ||
117 | |||
118 | list_for_each_entry(pwm, &pwm_list, node) { | ||
119 | if (pwm->pwm_id == pwm_id) { | ||
120 | found = 1; | ||
121 | break; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | if (found) { | ||
126 | if (pwm->use_count == 0) { | ||
127 | pwm->use_count++; | ||
128 | pwm->label = label; | ||
129 | } else { | ||
130 | pwm = ERR_PTR(-EBUSY); | ||
131 | } | ||
132 | } else { | ||
133 | pwm = ERR_PTR(-ENOENT); | ||
134 | } | ||
135 | |||
136 | mutex_unlock(&pwm_lock); | ||
137 | return pwm; | ||
138 | } | ||
139 | EXPORT_SYMBOL(pwm_request); | ||
140 | |||
141 | void pwm_free(struct pwm_device *pwm) | ||
142 | { | ||
143 | mutex_lock(&pwm_lock); | ||
144 | |||
145 | if (pwm->use_count) { | ||
146 | pwm->use_count--; | ||
147 | pwm->label = NULL; | ||
148 | } else { | ||
149 | pr_warning("PWM device already freed\n"); | ||
150 | } | ||
151 | |||
152 | mutex_unlock(&pwm_lock); | ||
153 | } | ||
154 | EXPORT_SYMBOL(pwm_free); | ||
155 | |||
156 | static inline void __add_pwm(struct pwm_device *pwm) | ||
157 | { | ||
158 | mutex_lock(&pwm_lock); | ||
159 | list_add_tail(&pwm->node, &pwm_list); | ||
160 | mutex_unlock(&pwm_lock); | ||
161 | } | ||
162 | |||
163 | static int __devinit pwm_probe(struct platform_device *pdev) | ||
164 | { | ||
165 | struct pwm_device *pwms; | ||
166 | struct resource *r; | ||
167 | int ret = 0; | ||
168 | int i; | ||
169 | |||
170 | pwms = kzalloc(sizeof(struct pwm_device) * VT8500_NR_PWMS, GFP_KERNEL); | ||
171 | if (pwms == NULL) { | ||
172 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
173 | return -ENOMEM; | ||
174 | } | ||
175 | |||
176 | for (i = 0; i < VT8500_NR_PWMS; i++) { | ||
177 | pwms[i].use_count = 0; | ||
178 | pwms[i].pwm_id = i; | ||
179 | pwms[i].pdev = pdev; | ||
180 | } | ||
181 | |||
182 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
183 | if (r == NULL) { | ||
184 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
185 | ret = -ENODEV; | ||
186 | goto err_free; | ||
187 | } | ||
188 | |||
189 | r = request_mem_region(r->start, resource_size(r), pdev->name); | ||
190 | if (r == NULL) { | ||
191 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
192 | ret = -EBUSY; | ||
193 | goto err_free; | ||
194 | } | ||
195 | |||
196 | pwms[0].regbase = ioremap(r->start, resource_size(r)); | ||
197 | if (pwms[0].regbase == NULL) { | ||
198 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
199 | ret = -ENODEV; | ||
200 | goto err_free_mem; | ||
201 | } | ||
202 | |||
203 | for (i = 1; i < VT8500_NR_PWMS; i++) | ||
204 | pwms[i].regbase = pwms[0].regbase; | ||
205 | |||
206 | for (i = 0; i < VT8500_NR_PWMS; i++) | ||
207 | __add_pwm(&pwms[i]); | ||
208 | |||
209 | platform_set_drvdata(pdev, pwms); | ||
210 | return 0; | ||
211 | |||
212 | err_free_mem: | ||
213 | release_mem_region(r->start, resource_size(r)); | ||
214 | err_free: | ||
215 | kfree(pwms); | ||
216 | return ret; | ||
217 | } | ||
218 | |||
219 | static int __devexit pwm_remove(struct platform_device *pdev) | ||
220 | { | ||
221 | struct pwm_device *pwms; | ||
222 | struct resource *r; | ||
223 | int i; | ||
224 | |||
225 | pwms = platform_get_drvdata(pdev); | ||
226 | if (pwms == NULL) | ||
227 | return -ENODEV; | ||
228 | |||
229 | mutex_lock(&pwm_lock); | ||
230 | |||
231 | for (i = 0; i < VT8500_NR_PWMS; i++) | ||
232 | list_del(&pwms[i].node); | ||
233 | mutex_unlock(&pwm_lock); | ||
234 | |||
235 | iounmap(pwms[0].regbase); | ||
236 | |||
237 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
238 | release_mem_region(r->start, resource_size(r)); | ||
239 | |||
240 | kfree(pwms); | ||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static struct platform_driver pwm_driver = { | ||
245 | .driver = { | ||
246 | .name = "vt8500-pwm", | ||
247 | .owner = THIS_MODULE, | ||
248 | }, | ||
249 | .probe = pwm_probe, | ||
250 | .remove = __devexit_p(pwm_remove), | ||
251 | }; | ||
252 | |||
253 | static int __init pwm_init(void) | ||
254 | { | ||
255 | return platform_driver_register(&pwm_driver); | ||
256 | } | ||
257 | arch_initcall(pwm_init); | ||
258 | |||
259 | static void __exit pwm_exit(void) | ||
260 | { | ||
261 | platform_driver_unregister(&pwm_driver); | ||
262 | } | ||
263 | module_exit(pwm_exit); | ||
264 | |||
265 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c new file mode 100644 index 000000000000..d5376c592ab6 --- /dev/null +++ b/arch/arm/mach-vt8500/timer.c | |||
@@ -0,0 +1,155 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/timer.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/io.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/clocksource.h> | ||
25 | #include <linux/clockchips.h> | ||
26 | #include <linux/delay.h> | ||
27 | |||
28 | #include <asm/mach/time.h> | ||
29 | |||
30 | #include "devices.h" | ||
31 | |||
32 | #define VT8500_TIMER_OFFSET 0x0100 | ||
33 | #define TIMER_MATCH_VAL 0x0000 | ||
34 | #define TIMER_COUNT_VAL 0x0010 | ||
35 | #define TIMER_STATUS_VAL 0x0014 | ||
36 | #define TIMER_IER_VAL 0x001c /* interrupt enable */ | ||
37 | #define TIMER_CTRL_VAL 0x0020 | ||
38 | #define TIMER_AS_VAL 0x0024 /* access status */ | ||
39 | #define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */ | ||
40 | #define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */ | ||
41 | #define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */ | ||
42 | #define VT8500_TIMER_HZ 3000000 | ||
43 | |||
44 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | ||
45 | |||
46 | static void __iomem *regbase; | ||
47 | |||
48 | static cycle_t vt8500_timer_read(struct clocksource *cs) | ||
49 | { | ||
50 | int loops = msecs_to_loops(10); | ||
51 | writel(3, regbase + TIMER_CTRL_VAL); | ||
52 | while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE) | ||
53 | && --loops) | ||
54 | cpu_relax(); | ||
55 | return readl(regbase + TIMER_COUNT_VAL); | ||
56 | } | ||
57 | |||
58 | struct clocksource clocksource = { | ||
59 | .name = "vt8500_timer", | ||
60 | .rating = 200, | ||
61 | .read = vt8500_timer_read, | ||
62 | .mask = CLOCKSOURCE_MASK(32), | ||
63 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
64 | }; | ||
65 | |||
66 | static int vt8500_timer_set_next_event(unsigned long cycles, | ||
67 | struct clock_event_device *evt) | ||
68 | { | ||
69 | int loops = msecs_to_loops(10); | ||
70 | cycle_t alarm = clocksource.read(&clocksource) + cycles; | ||
71 | while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) | ||
72 | && --loops) | ||
73 | cpu_relax(); | ||
74 | writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL); | ||
75 | |||
76 | if ((signed)(alarm - clocksource.read(&clocksource)) <= 16) | ||
77 | return -ETIME; | ||
78 | |||
79 | writel(1, regbase + TIMER_IER_VAL); | ||
80 | |||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | static void vt8500_timer_set_mode(enum clock_event_mode mode, | ||
85 | struct clock_event_device *evt) | ||
86 | { | ||
87 | switch (mode) { | ||
88 | case CLOCK_EVT_MODE_RESUME: | ||
89 | case CLOCK_EVT_MODE_PERIODIC: | ||
90 | break; | ||
91 | case CLOCK_EVT_MODE_ONESHOT: | ||
92 | case CLOCK_EVT_MODE_UNUSED: | ||
93 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
94 | writel(readl(regbase + TIMER_CTRL_VAL) | 1, | ||
95 | regbase + TIMER_CTRL_VAL); | ||
96 | writel(0, regbase + TIMER_IER_VAL); | ||
97 | break; | ||
98 | } | ||
99 | } | ||
100 | |||
101 | struct clock_event_device clockevent = { | ||
102 | .name = "vt8500_timer", | ||
103 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
104 | .rating = 200, | ||
105 | .set_next_event = vt8500_timer_set_next_event, | ||
106 | .set_mode = vt8500_timer_set_mode, | ||
107 | }; | ||
108 | |||
109 | static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id) | ||
110 | { | ||
111 | struct clock_event_device *evt = dev_id; | ||
112 | writel(0xf, regbase + TIMER_STATUS_VAL); | ||
113 | evt->event_handler(evt); | ||
114 | |||
115 | return IRQ_HANDLED; | ||
116 | } | ||
117 | |||
118 | struct irqaction irq = { | ||
119 | .name = "vt8500_timer", | ||
120 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
121 | .handler = vt8500_timer_interrupt, | ||
122 | .dev_id = &clockevent, | ||
123 | }; | ||
124 | |||
125 | static void __init vt8500_timer_init(void) | ||
126 | { | ||
127 | regbase = ioremap(wmt_pmc_base + VT8500_TIMER_OFFSET, 0x28); | ||
128 | if (!regbase) | ||
129 | printk(KERN_ERR "vt8500_timer_init: failed to map MMIO registers\n"); | ||
130 | |||
131 | writel(1, regbase + TIMER_CTRL_VAL); | ||
132 | writel(0xf, regbase + TIMER_STATUS_VAL); | ||
133 | writel(~0, regbase + TIMER_MATCH_VAL); | ||
134 | |||
135 | if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ)) | ||
136 | printk(KERN_ERR "vt8500_timer_init: clocksource_register failed for %s\n", | ||
137 | clocksource.name); | ||
138 | |||
139 | clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4); | ||
140 | |||
141 | /* copy-pasted from mach-msm; no idea */ | ||
142 | clockevent.max_delta_ns = | ||
143 | clockevent_delta2ns(0xf0000000, &clockevent); | ||
144 | clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent); | ||
145 | clockevent.cpumask = cpumask_of(0); | ||
146 | |||
147 | if (setup_irq(wmt_timer_irq, &irq)) | ||
148 | printk(KERN_ERR "vt8500_timer_init: setup_irq failed for %s\n", | ||
149 | clockevent.name); | ||
150 | clockevents_register_device(&clockevent); | ||
151 | } | ||
152 | |||
153 | struct sys_timer vt8500_timer = { | ||
154 | .init = vt8500_timer_init | ||
155 | }; | ||
diff --git a/arch/arm/mach-vt8500/wm8505_7in.c b/arch/arm/mach-vt8500/wm8505_7in.c new file mode 100644 index 000000000000..e73aadbcafd6 --- /dev/null +++ b/arch/arm/mach-vt8500/wm8505_7in.c | |||
@@ -0,0 +1,77 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/wm8505_7in.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/io.h> | ||
22 | #include <linux/pm.h> | ||
23 | |||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/mach/arch.h> | ||
26 | |||
27 | #include "devices.h" | ||
28 | |||
29 | static void __iomem *pmc_hiber; | ||
30 | |||
31 | static struct platform_device *devices[] __initdata = { | ||
32 | &vt8500_device_uart0, | ||
33 | &vt8500_device_ehci, | ||
34 | &vt8500_device_wm8505_fb, | ||
35 | &vt8500_device_ge_rops, | ||
36 | &vt8500_device_pwm, | ||
37 | &vt8500_device_pwmbl, | ||
38 | &vt8500_device_rtc, | ||
39 | }; | ||
40 | |||
41 | static void vt8500_power_off(void) | ||
42 | { | ||
43 | local_irq_disable(); | ||
44 | writew(5, pmc_hiber); | ||
45 | asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0)); | ||
46 | } | ||
47 | |||
48 | void __init wm8505_7in_init(void) | ||
49 | { | ||
50 | #ifdef CONFIG_FB_WM8505 | ||
51 | void __iomem *gpio_mux_reg = ioremap(wmt_gpio_base + 0x200, 4); | ||
52 | if (gpio_mux_reg) { | ||
53 | writel(readl(gpio_mux_reg) | 0x80000000, gpio_mux_reg); | ||
54 | iounmap(gpio_mux_reg); | ||
55 | } else { | ||
56 | printk(KERN_ERR "Could not remap the GPIO mux register, display may not work properly!\n"); | ||
57 | } | ||
58 | #endif | ||
59 | pmc_hiber = ioremap(wmt_pmc_base + 0x12, 2); | ||
60 | if (pmc_hiber) | ||
61 | pm_power_off = &vt8500_power_off; | ||
62 | else | ||
63 | printk(KERN_ERR "PMC Hibernation register could not be remapped, not enabling power off!\n"); | ||
64 | |||
65 | wm8505_set_resources(); | ||
66 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
67 | vt8500_gpio_init(); | ||
68 | } | ||
69 | |||
70 | MACHINE_START(WM8505_7IN_NETBOOK, "WM8505 7-inch generic netbook") | ||
71 | .boot_params = 0x00000100, | ||
72 | .reserve = wm8505_reserve_mem, | ||
73 | .map_io = wm8505_map_io, | ||
74 | .init_irq = wm8505_init_irq, | ||
75 | .timer = &vt8500_timer, | ||
76 | .init_machine = wm8505_7in_init, | ||
77 | MACHINE_END | ||
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 170c9bb95866..f2ce38e085d2 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -49,7 +49,13 @@ static inline void cache_wait(void __iomem *reg, unsigned long mask) | |||
49 | static inline void cache_sync(void) | 49 | static inline void cache_sync(void) |
50 | { | 50 | { |
51 | void __iomem *base = l2x0_base; | 51 | void __iomem *base = l2x0_base; |
52 | |||
53 | #ifdef CONFIG_ARM_ERRATA_753970 | ||
54 | /* write to an unmmapped register */ | ||
55 | writel_relaxed(0, base + L2X0_DUMMY_REG); | ||
56 | #else | ||
52 | writel_relaxed(0, base + L2X0_CACHE_SYNC); | 57 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
58 | #endif | ||
53 | cache_wait(base + L2X0_CACHE_SYNC, 1); | 59 | cache_wait(base + L2X0_CACHE_SYNC, 1); |
54 | } | 60 | } |
55 | 61 | ||
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index bcf748d9f4e2..226e3d8351c2 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -493,6 +493,9 @@ arm1020_processor_functions: | |||
493 | .word cpu_arm1020_dcache_clean_area | 493 | .word cpu_arm1020_dcache_clean_area |
494 | .word cpu_arm1020_switch_mm | 494 | .word cpu_arm1020_switch_mm |
495 | .word cpu_arm1020_set_pte_ext | 495 | .word cpu_arm1020_set_pte_ext |
496 | .word 0 | ||
497 | .word 0 | ||
498 | .word 0 | ||
496 | .size arm1020_processor_functions, . - arm1020_processor_functions | 499 | .size arm1020_processor_functions, . - arm1020_processor_functions |
497 | 500 | ||
498 | .section ".rodata" | 501 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index ab7ec26657ea..86d9c2cf0bce 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -474,6 +474,9 @@ arm1020e_processor_functions: | |||
474 | .word cpu_arm1020e_dcache_clean_area | 474 | .word cpu_arm1020e_dcache_clean_area |
475 | .word cpu_arm1020e_switch_mm | 475 | .word cpu_arm1020e_switch_mm |
476 | .word cpu_arm1020e_set_pte_ext | 476 | .word cpu_arm1020e_set_pte_ext |
477 | .word 0 | ||
478 | .word 0 | ||
479 | .word 0 | ||
477 | .size arm1020e_processor_functions, . - arm1020e_processor_functions | 480 | .size arm1020e_processor_functions, . - arm1020e_processor_functions |
478 | 481 | ||
479 | .section ".rodata" | 482 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 831c5e54e22f..83d3dd34f846 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
@@ -457,6 +457,9 @@ arm1022_processor_functions: | |||
457 | .word cpu_arm1022_dcache_clean_area | 457 | .word cpu_arm1022_dcache_clean_area |
458 | .word cpu_arm1022_switch_mm | 458 | .word cpu_arm1022_switch_mm |
459 | .word cpu_arm1022_set_pte_ext | 459 | .word cpu_arm1022_set_pte_ext |
460 | .word 0 | ||
461 | .word 0 | ||
462 | .word 0 | ||
460 | .size arm1022_processor_functions, . - arm1022_processor_functions | 463 | .size arm1022_processor_functions, . - arm1022_processor_functions |
461 | 464 | ||
462 | .section ".rodata" | 465 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index e3f7e9a166bf..686043ee7281 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
@@ -452,6 +452,9 @@ arm1026_processor_functions: | |||
452 | .word cpu_arm1026_dcache_clean_area | 452 | .word cpu_arm1026_dcache_clean_area |
453 | .word cpu_arm1026_switch_mm | 453 | .word cpu_arm1026_switch_mm |
454 | .word cpu_arm1026_set_pte_ext | 454 | .word cpu_arm1026_set_pte_ext |
455 | .word 0 | ||
456 | .word 0 | ||
457 | .word 0 | ||
455 | .size arm1026_processor_functions, . - arm1026_processor_functions | 458 | .size arm1026_processor_functions, . - arm1026_processor_functions |
456 | 459 | ||
457 | .section .rodata | 460 | .section .rodata |
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index 6a7be1863edd..5f79dc4ce3fb 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S | |||
@@ -284,6 +284,9 @@ ENTRY(arm6_processor_functions) | |||
284 | .word cpu_arm6_dcache_clean_area | 284 | .word cpu_arm6_dcache_clean_area |
285 | .word cpu_arm6_switch_mm | 285 | .word cpu_arm6_switch_mm |
286 | .word cpu_arm6_set_pte_ext | 286 | .word cpu_arm6_set_pte_ext |
287 | .word 0 | ||
288 | .word 0 | ||
289 | .word 0 | ||
287 | .size arm6_processor_functions, . - arm6_processor_functions | 290 | .size arm6_processor_functions, . - arm6_processor_functions |
288 | 291 | ||
289 | /* | 292 | /* |
@@ -301,6 +304,9 @@ ENTRY(arm7_processor_functions) | |||
301 | .word cpu_arm7_dcache_clean_area | 304 | .word cpu_arm7_dcache_clean_area |
302 | .word cpu_arm7_switch_mm | 305 | .word cpu_arm7_switch_mm |
303 | .word cpu_arm7_set_pte_ext | 306 | .word cpu_arm7_set_pte_ext |
307 | .word 0 | ||
308 | .word 0 | ||
309 | .word 0 | ||
304 | .size arm7_processor_functions, . - arm7_processor_functions | 310 | .size arm7_processor_functions, . - arm7_processor_functions |
305 | 311 | ||
306 | .section ".rodata" | 312 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index c285395f44b2..665266da143c 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S | |||
@@ -185,6 +185,9 @@ ENTRY(arm720_processor_functions) | |||
185 | .word cpu_arm720_dcache_clean_area | 185 | .word cpu_arm720_dcache_clean_area |
186 | .word cpu_arm720_switch_mm | 186 | .word cpu_arm720_switch_mm |
187 | .word cpu_arm720_set_pte_ext | 187 | .word cpu_arm720_set_pte_ext |
188 | .word 0 | ||
189 | .word 0 | ||
190 | .word 0 | ||
188 | .size arm720_processor_functions, . - arm720_processor_functions | 191 | .size arm720_processor_functions, . - arm720_processor_functions |
189 | 192 | ||
190 | .section ".rodata" | 193 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index 38b27dcba727..6f9d12effee1 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S | |||
@@ -130,6 +130,9 @@ ENTRY(arm740_processor_functions) | |||
130 | .word cpu_arm740_dcache_clean_area | 130 | .word cpu_arm740_dcache_clean_area |
131 | .word cpu_arm740_switch_mm | 131 | .word cpu_arm740_switch_mm |
132 | .word 0 @ cpu_*_set_pte | 132 | .word 0 @ cpu_*_set_pte |
133 | .word 0 | ||
134 | .word 0 | ||
135 | .word 0 | ||
133 | .size arm740_processor_functions, . - arm740_processor_functions | 136 | .size arm740_processor_functions, . - arm740_processor_functions |
134 | 137 | ||
135 | .section ".rodata" | 138 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S index 0c9786de20af..e4c165ca6696 100644 --- a/arch/arm/mm/proc-arm7tdmi.S +++ b/arch/arm/mm/proc-arm7tdmi.S | |||
@@ -70,6 +70,9 @@ ENTRY(arm7tdmi_processor_functions) | |||
70 | .word cpu_arm7tdmi_dcache_clean_area | 70 | .word cpu_arm7tdmi_dcache_clean_area |
71 | .word cpu_arm7tdmi_switch_mm | 71 | .word cpu_arm7tdmi_switch_mm |
72 | .word 0 @ cpu_*_set_pte | 72 | .word 0 @ cpu_*_set_pte |
73 | .word 0 | ||
74 | .word 0 | ||
75 | .word 0 | ||
73 | .size arm7tdmi_processor_functions, . - arm7tdmi_processor_functions | 76 | .size arm7tdmi_processor_functions, . - arm7tdmi_processor_functions |
74 | 77 | ||
75 | .section ".rodata" | 78 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 6109f278a904..219980ec8b6e 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -387,6 +387,40 @@ ENTRY(cpu_arm920_set_pte_ext) | |||
387 | #endif | 387 | #endif |
388 | mov pc, lr | 388 | mov pc, lr |
389 | 389 | ||
390 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ | ||
391 | .globl cpu_arm920_suspend_size | ||
392 | .equ cpu_arm920_suspend_size, 4 * 3 | ||
393 | #ifdef CONFIG_PM | ||
394 | ENTRY(cpu_arm920_do_suspend) | ||
395 | stmfd sp!, {r4 - r7, lr} | ||
396 | mrc p15, 0, r4, c13, c0, 0 @ PID | ||
397 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID | ||
398 | mrc p15, 0, r6, c2, c0, 0 @ TTB address | ||
399 | mrc p15, 0, r7, c1, c0, 0 @ Control register | ||
400 | stmia r0, {r4 - r7} | ||
401 | ldmfd sp!, {r4 - r7, pc} | ||
402 | ENDPROC(cpu_arm920_do_suspend) | ||
403 | |||
404 | ENTRY(cpu_arm920_do_resume) | ||
405 | mov ip, #0 | ||
406 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs | ||
407 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches | ||
408 | ldmia r0, {r4 - r7} | ||
409 | mcr p15, 0, r4, c13, c0, 0 @ PID | ||
410 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID | ||
411 | mcr p15, 0, r6, c2, c0, 0 @ TTB address | ||
412 | mov r0, r7 @ control register | ||
413 | mov r2, r6, lsr #14 @ get TTB0 base | ||
414 | mov r2, r2, lsl #14 | ||
415 | ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ | ||
416 | PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE | ||
417 | b cpu_resume_mmu | ||
418 | ENDPROC(cpu_arm920_do_resume) | ||
419 | #else | ||
420 | #define cpu_arm920_do_suspend 0 | ||
421 | #define cpu_arm920_do_resume 0 | ||
422 | #endif | ||
423 | |||
390 | __CPUINIT | 424 | __CPUINIT |
391 | 425 | ||
392 | .type __arm920_setup, #function | 426 | .type __arm920_setup, #function |
@@ -432,6 +466,9 @@ arm920_processor_functions: | |||
432 | .word cpu_arm920_dcache_clean_area | 466 | .word cpu_arm920_dcache_clean_area |
433 | .word cpu_arm920_switch_mm | 467 | .word cpu_arm920_switch_mm |
434 | .word cpu_arm920_set_pte_ext | 468 | .word cpu_arm920_set_pte_ext |
469 | .word cpu_arm920_suspend_size | ||
470 | .word cpu_arm920_do_suspend | ||
471 | .word cpu_arm920_do_resume | ||
435 | .size arm920_processor_functions, . - arm920_processor_functions | 472 | .size arm920_processor_functions, . - arm920_processor_functions |
436 | 473 | ||
437 | .section ".rodata" | 474 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index bb2f0f46a5e6..36154b1e792a 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
@@ -436,6 +436,9 @@ arm922_processor_functions: | |||
436 | .word cpu_arm922_dcache_clean_area | 436 | .word cpu_arm922_dcache_clean_area |
437 | .word cpu_arm922_switch_mm | 437 | .word cpu_arm922_switch_mm |
438 | .word cpu_arm922_set_pte_ext | 438 | .word cpu_arm922_set_pte_ext |
439 | .word 0 | ||
440 | .word 0 | ||
441 | .word 0 | ||
439 | .size arm922_processor_functions, . - arm922_processor_functions | 442 | .size arm922_processor_functions, . - arm922_processor_functions |
440 | 443 | ||
441 | .section ".rodata" | 444 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index c13e01accfe2..89c5e0009c4c 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -503,6 +503,9 @@ arm925_processor_functions: | |||
503 | .word cpu_arm925_dcache_clean_area | 503 | .word cpu_arm925_dcache_clean_area |
504 | .word cpu_arm925_switch_mm | 504 | .word cpu_arm925_switch_mm |
505 | .word cpu_arm925_set_pte_ext | 505 | .word cpu_arm925_set_pte_ext |
506 | .word 0 | ||
507 | .word 0 | ||
508 | .word 0 | ||
506 | .size arm925_processor_functions, . - arm925_processor_functions | 509 | .size arm925_processor_functions, . - arm925_processor_functions |
507 | 510 | ||
508 | .section ".rodata" | 511 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 42eb4315740b..6a4bdb2c94a7 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -401,6 +401,40 @@ ENTRY(cpu_arm926_set_pte_ext) | |||
401 | #endif | 401 | #endif |
402 | mov pc, lr | 402 | mov pc, lr |
403 | 403 | ||
404 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ | ||
405 | .globl cpu_arm926_suspend_size | ||
406 | .equ cpu_arm926_suspend_size, 4 * 3 | ||
407 | #ifdef CONFIG_PM | ||
408 | ENTRY(cpu_arm926_do_suspend) | ||
409 | stmfd sp!, {r4 - r7, lr} | ||
410 | mrc p15, 0, r4, c13, c0, 0 @ PID | ||
411 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID | ||
412 | mrc p15, 0, r6, c2, c0, 0 @ TTB address | ||
413 | mrc p15, 0, r7, c1, c0, 0 @ Control register | ||
414 | stmia r0, {r4 - r7} | ||
415 | ldmfd sp!, {r4 - r7, pc} | ||
416 | ENDPROC(cpu_arm926_do_suspend) | ||
417 | |||
418 | ENTRY(cpu_arm926_do_resume) | ||
419 | mov ip, #0 | ||
420 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs | ||
421 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches | ||
422 | ldmia r0, {r4 - r7} | ||
423 | mcr p15, 0, r4, c13, c0, 0 @ PID | ||
424 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID | ||
425 | mcr p15, 0, r6, c2, c0, 0 @ TTB address | ||
426 | mov r0, r7 @ control register | ||
427 | mov r2, r6, lsr #14 @ get TTB0 base | ||
428 | mov r2, r2, lsl #14 | ||
429 | ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ | ||
430 | PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE | ||
431 | b cpu_resume_mmu | ||
432 | ENDPROC(cpu_arm926_do_resume) | ||
433 | #else | ||
434 | #define cpu_arm926_do_suspend 0 | ||
435 | #define cpu_arm926_do_resume 0 | ||
436 | #endif | ||
437 | |||
404 | __CPUINIT | 438 | __CPUINIT |
405 | 439 | ||
406 | .type __arm926_setup, #function | 440 | .type __arm926_setup, #function |
@@ -456,6 +490,9 @@ arm926_processor_functions: | |||
456 | .word cpu_arm926_dcache_clean_area | 490 | .word cpu_arm926_dcache_clean_area |
457 | .word cpu_arm926_switch_mm | 491 | .word cpu_arm926_switch_mm |
458 | .word cpu_arm926_set_pte_ext | 492 | .word cpu_arm926_set_pte_ext |
493 | .word cpu_arm926_suspend_size | ||
494 | .word cpu_arm926_do_suspend | ||
495 | .word cpu_arm926_do_resume | ||
459 | .size arm926_processor_functions, . - arm926_processor_functions | 496 | .size arm926_processor_functions, . - arm926_processor_functions |
460 | 497 | ||
461 | .section ".rodata" | 498 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 7b11cdb9935f..26aea3f71c26 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S | |||
@@ -363,6 +363,9 @@ ENTRY(arm940_processor_functions) | |||
363 | .word cpu_arm940_dcache_clean_area | 363 | .word cpu_arm940_dcache_clean_area |
364 | .word cpu_arm940_switch_mm | 364 | .word cpu_arm940_switch_mm |
365 | .word 0 @ cpu_*_set_pte | 365 | .word 0 @ cpu_*_set_pte |
366 | .word 0 | ||
367 | .word 0 | ||
368 | .word 0 | ||
366 | .size arm940_processor_functions, . - arm940_processor_functions | 369 | .size arm940_processor_functions, . - arm940_processor_functions |
367 | 370 | ||
368 | .section ".rodata" | 371 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 1a5bbf080342..8063345406fe 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S | |||
@@ -419,6 +419,9 @@ ENTRY(arm946_processor_functions) | |||
419 | .word cpu_arm946_dcache_clean_area | 419 | .word cpu_arm946_dcache_clean_area |
420 | .word cpu_arm946_switch_mm | 420 | .word cpu_arm946_switch_mm |
421 | .word 0 @ cpu_*_set_pte | 421 | .word 0 @ cpu_*_set_pte |
422 | .word 0 | ||
423 | .word 0 | ||
424 | .word 0 | ||
422 | .size arm946_processor_functions, . - arm946_processor_functions | 425 | .size arm946_processor_functions, . - arm946_processor_functions |
423 | 426 | ||
424 | .section ".rodata" | 427 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S index db67e3134d7a..7b7ebd4d096d 100644 --- a/arch/arm/mm/proc-arm9tdmi.S +++ b/arch/arm/mm/proc-arm9tdmi.S | |||
@@ -70,6 +70,9 @@ ENTRY(arm9tdmi_processor_functions) | |||
70 | .word cpu_arm9tdmi_dcache_clean_area | 70 | .word cpu_arm9tdmi_dcache_clean_area |
71 | .word cpu_arm9tdmi_switch_mm | 71 | .word cpu_arm9tdmi_switch_mm |
72 | .word 0 @ cpu_*_set_pte | 72 | .word 0 @ cpu_*_set_pte |
73 | .word 0 | ||
74 | .word 0 | ||
75 | .word 0 | ||
73 | .size arm9tdmi_processor_functions, . - arm9tdmi_processor_functions | 76 | .size arm9tdmi_processor_functions, . - arm9tdmi_processor_functions |
74 | 77 | ||
75 | .section ".rodata" | 78 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S index 7c9ad621f0e6..fc2a4ae15cf4 100644 --- a/arch/arm/mm/proc-fa526.S +++ b/arch/arm/mm/proc-fa526.S | |||
@@ -195,6 +195,9 @@ fa526_processor_functions: | |||
195 | .word cpu_fa526_dcache_clean_area | 195 | .word cpu_fa526_dcache_clean_area |
196 | .word cpu_fa526_switch_mm | 196 | .word cpu_fa526_switch_mm |
197 | .word cpu_fa526_set_pte_ext | 197 | .word cpu_fa526_set_pte_ext |
198 | .word 0 | ||
199 | .word 0 | ||
200 | .word 0 | ||
198 | .size fa526_processor_functions, . - fa526_processor_functions | 201 | .size fa526_processor_functions, . - fa526_processor_functions |
199 | 202 | ||
200 | .section ".rodata" | 203 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index b4597edbff97..d3883eed7a4a 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -554,6 +554,9 @@ feroceon_processor_functions: | |||
554 | .word cpu_feroceon_dcache_clean_area | 554 | .word cpu_feroceon_dcache_clean_area |
555 | .word cpu_feroceon_switch_mm | 555 | .word cpu_feroceon_switch_mm |
556 | .word cpu_feroceon_set_pte_ext | 556 | .word cpu_feroceon_set_pte_ext |
557 | .word 0 | ||
558 | .word 0 | ||
559 | .word 0 | ||
557 | .size feroceon_processor_functions, . - feroceon_processor_functions | 560 | .size feroceon_processor_functions, . - feroceon_processor_functions |
558 | 561 | ||
559 | .section ".rodata" | 562 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index 4458ee6aa713..9d4f2ae63370 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S | |||
@@ -388,6 +388,9 @@ mohawk_processor_functions: | |||
388 | .word cpu_mohawk_dcache_clean_area | 388 | .word cpu_mohawk_dcache_clean_area |
389 | .word cpu_mohawk_switch_mm | 389 | .word cpu_mohawk_switch_mm |
390 | .word cpu_mohawk_set_pte_ext | 390 | .word cpu_mohawk_set_pte_ext |
391 | .word 0 | ||
392 | .word 0 | ||
393 | .word 0 | ||
391 | .size mohawk_processor_functions, . - mohawk_processor_functions | 394 | .size mohawk_processor_functions, . - mohawk_processor_functions |
392 | 395 | ||
393 | .section ".rodata" | 396 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index 5aa8d59c2e85..46f09ed16b98 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S | |||
@@ -203,6 +203,9 @@ ENTRY(sa110_processor_functions) | |||
203 | .word cpu_sa110_dcache_clean_area | 203 | .word cpu_sa110_dcache_clean_area |
204 | .word cpu_sa110_switch_mm | 204 | .word cpu_sa110_switch_mm |
205 | .word cpu_sa110_set_pte_ext | 205 | .word cpu_sa110_set_pte_ext |
206 | .word 0 | ||
207 | .word 0 | ||
208 | .word 0 | ||
206 | .size sa110_processor_functions, . - sa110_processor_functions | 209 | .size sa110_processor_functions, . - sa110_processor_functions |
207 | 210 | ||
208 | .section ".rodata" | 211 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 2ac4e6f10713..74483d1977fe 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S | |||
@@ -169,6 +169,42 @@ ENTRY(cpu_sa1100_set_pte_ext) | |||
169 | #endif | 169 | #endif |
170 | mov pc, lr | 170 | mov pc, lr |
171 | 171 | ||
172 | .globl cpu_sa1100_suspend_size | ||
173 | .equ cpu_sa1100_suspend_size, 4*4 | ||
174 | #ifdef CONFIG_PM | ||
175 | ENTRY(cpu_sa1100_do_suspend) | ||
176 | stmfd sp!, {r4 - r7, lr} | ||
177 | mrc p15, 0, r4, c3, c0, 0 @ domain ID | ||
178 | mrc p15, 0, r5, c2, c0, 0 @ translation table base addr | ||
179 | mrc p15, 0, r6, c13, c0, 0 @ PID | ||
180 | mrc p15, 0, r7, c1, c0, 0 @ control reg | ||
181 | stmia r0, {r4 - r7} @ store cp regs | ||
182 | ldmfd sp!, {r4 - r7, pc} | ||
183 | ENDPROC(cpu_sa1100_do_suspend) | ||
184 | |||
185 | ENTRY(cpu_sa1100_do_resume) | ||
186 | ldmia r0, {r4 - r7} @ load cp regs | ||
187 | mov r1, #0 | ||
188 | mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs | ||
189 | mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache | ||
190 | mcr p15, 0, r1, c9, c0, 0 @ invalidate RB | ||
191 | mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB | ||
192 | |||
193 | mcr p15, 0, r4, c3, c0, 0 @ domain ID | ||
194 | mcr p15, 0, r5, c2, c0, 0 @ translation table base addr | ||
195 | mcr p15, 0, r6, c13, c0, 0 @ PID | ||
196 | mov r0, r7 @ control register | ||
197 | mov r2, r5, lsr #14 @ get TTB0 base | ||
198 | mov r2, r2, lsl #14 | ||
199 | ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ | ||
200 | PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE | ||
201 | b cpu_resume_mmu | ||
202 | ENDPROC(cpu_sa1100_do_resume) | ||
203 | #else | ||
204 | #define cpu_sa1100_do_suspend 0 | ||
205 | #define cpu_sa1100_do_resume 0 | ||
206 | #endif | ||
207 | |||
172 | __CPUINIT | 208 | __CPUINIT |
173 | 209 | ||
174 | .type __sa1100_setup, #function | 210 | .type __sa1100_setup, #function |
@@ -218,6 +254,9 @@ ENTRY(sa1100_processor_functions) | |||
218 | .word cpu_sa1100_dcache_clean_area | 254 | .word cpu_sa1100_dcache_clean_area |
219 | .word cpu_sa1100_switch_mm | 255 | .word cpu_sa1100_switch_mm |
220 | .word cpu_sa1100_set_pte_ext | 256 | .word cpu_sa1100_set_pte_ext |
257 | .word cpu_sa1100_suspend_size | ||
258 | .word cpu_sa1100_do_suspend | ||
259 | .word cpu_sa1100_do_resume | ||
221 | .size sa1100_processor_functions, . - sa1100_processor_functions | 260 | .size sa1100_processor_functions, . - sa1100_processor_functions |
222 | 261 | ||
223 | .section ".rodata" | 262 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 59a7e1ffe7bc..832b6bdc192c 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -121,6 +121,53 @@ ENTRY(cpu_v6_set_pte_ext) | |||
121 | #endif | 121 | #endif |
122 | mov pc, lr | 122 | mov pc, lr |
123 | 123 | ||
124 | /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ | ||
125 | .globl cpu_v6_suspend_size | ||
126 | .equ cpu_v6_suspend_size, 4 * 8 | ||
127 | #ifdef CONFIG_PM | ||
128 | ENTRY(cpu_v6_do_suspend) | ||
129 | stmfd sp!, {r4 - r11, lr} | ||
130 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
131 | mrc p15, 0, r5, c13, c0, 1 @ Context ID | ||
132 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID | ||
133 | mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 | ||
134 | mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 | ||
135 | mrc p15, 0, r9, c1, c0, 1 @ auxillary control register | ||
136 | mrc p15, 0, r10, c1, c0, 2 @ co-processor access control | ||
137 | mrc p15, 0, r11, c1, c0, 0 @ control register | ||
138 | stmia r0, {r4 - r11} | ||
139 | ldmfd sp!, {r4- r11, pc} | ||
140 | ENDPROC(cpu_v6_do_suspend) | ||
141 | |||
142 | ENTRY(cpu_v6_do_resume) | ||
143 | mov ip, #0 | ||
144 | mcr p15, 0, ip, c7, c14, 0 @ clean+invalidate D cache | ||
145 | mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache | ||
146 | mcr p15, 0, ip, c7, c15, 0 @ clean+invalidate cache | ||
147 | mcr p15, 0, ip, c7, c10, 4 @ drain write buffer | ||
148 | ldmia r0, {r4 - r11} | ||
149 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
150 | mcr p15, 0, r5, c13, c0, 1 @ Context ID | ||
151 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID | ||
152 | mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 | ||
153 | mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 | ||
154 | mcr p15, 0, r9, c1, c0, 1 @ auxillary control register | ||
155 | mcr p15, 0, r10, c1, c0, 2 @ co-processor access control | ||
156 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register | ||
157 | mcr p15, 0, ip, c7, c5, 4 @ ISB | ||
158 | mov r0, r11 @ control register | ||
159 | mov r2, r7, lsr #14 @ get TTB0 base | ||
160 | mov r2, r2, lsl #14 | ||
161 | ldr r3, cpu_resume_l1_flags | ||
162 | b cpu_resume_mmu | ||
163 | ENDPROC(cpu_v6_do_resume) | ||
164 | cpu_resume_l1_flags: | ||
165 | ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP) | ||
166 | ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP) | ||
167 | #else | ||
168 | #define cpu_v6_do_suspend 0 | ||
169 | #define cpu_v6_do_resume 0 | ||
170 | #endif | ||
124 | 171 | ||
125 | 172 | ||
126 | .type cpu_v6_name, #object | 173 | .type cpu_v6_name, #object |
@@ -206,6 +253,9 @@ ENTRY(v6_processor_functions) | |||
206 | .word cpu_v6_dcache_clean_area | 253 | .word cpu_v6_dcache_clean_area |
207 | .word cpu_v6_switch_mm | 254 | .word cpu_v6_switch_mm |
208 | .word cpu_v6_set_pte_ext | 255 | .word cpu_v6_set_pte_ext |
256 | .word cpu_v6_suspend_size | ||
257 | .word cpu_v6_do_suspend | ||
258 | .word cpu_v6_do_resume | ||
209 | .size v6_processor_functions, . - v6_processor_functions | 259 | .size v6_processor_functions, . - v6_processor_functions |
210 | 260 | ||
211 | .section ".rodata" | 261 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0c1172b56b4e..262fa88a7439 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -108,10 +108,16 @@ ENTRY(cpu_v7_switch_mm) | |||
108 | #ifdef CONFIG_ARM_ERRATA_430973 | 108 | #ifdef CONFIG_ARM_ERRATA_430973 |
109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
110 | #endif | 110 | #endif |
111 | #ifdef CONFIG_ARM_ERRATA_754322 | ||
112 | dsb | ||
113 | #endif | ||
111 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID | 114 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID |
112 | isb | 115 | isb |
113 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | 116 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 |
114 | isb | 117 | isb |
118 | #ifdef CONFIG_ARM_ERRATA_754322 | ||
119 | dsb | ||
120 | #endif | ||
115 | mcr p15, 0, r1, c13, c0, 1 @ set context ID | 121 | mcr p15, 0, r1, c13, c0, 1 @ set context ID |
116 | isb | 122 | isb |
117 | #endif | 123 | #endif |
@@ -171,6 +177,87 @@ cpu_v7_name: | |||
171 | .ascii "ARMv7 Processor" | 177 | .ascii "ARMv7 Processor" |
172 | .align | 178 | .align |
173 | 179 | ||
180 | /* | ||
181 | * Memory region attributes with SCTLR.TRE=1 | ||
182 | * | ||
183 | * n = TEX[0],C,B | ||
184 | * TR = PRRR[2n+1:2n] - memory type | ||
185 | * IR = NMRR[2n+1:2n] - inner cacheable property | ||
186 | * OR = NMRR[2n+17:2n+16] - outer cacheable property | ||
187 | * | ||
188 | * n TR IR OR | ||
189 | * UNCACHED 000 00 | ||
190 | * BUFFERABLE 001 10 00 00 | ||
191 | * WRITETHROUGH 010 10 10 10 | ||
192 | * WRITEBACK 011 10 11 11 | ||
193 | * reserved 110 | ||
194 | * WRITEALLOC 111 10 01 01 | ||
195 | * DEV_SHARED 100 01 | ||
196 | * DEV_NONSHARED 100 01 | ||
197 | * DEV_WC 001 10 | ||
198 | * DEV_CACHED 011 10 | ||
199 | * | ||
200 | * Other attributes: | ||
201 | * | ||
202 | * DS0 = PRRR[16] = 0 - device shareable property | ||
203 | * DS1 = PRRR[17] = 1 - device shareable property | ||
204 | * NS0 = PRRR[18] = 0 - normal shareable property | ||
205 | * NS1 = PRRR[19] = 1 - normal shareable property | ||
206 | * NOS = PRRR[24+n] = 1 - not outer shareable | ||
207 | */ | ||
208 | .equ PRRR, 0xff0a81a8 | ||
209 | .equ NMRR, 0x40e040e0 | ||
210 | |||
211 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ | ||
212 | .globl cpu_v7_suspend_size | ||
213 | .equ cpu_v7_suspend_size, 4 * 8 | ||
214 | #ifdef CONFIG_PM | ||
215 | ENTRY(cpu_v7_do_suspend) | ||
216 | stmfd sp!, {r4 - r11, lr} | ||
217 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
218 | mrc p15, 0, r5, c13, c0, 1 @ Context ID | ||
219 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID | ||
220 | mrc p15, 0, r7, c2, c0, 0 @ TTB 0 | ||
221 | mrc p15, 0, r8, c2, c0, 1 @ TTB 1 | ||
222 | mrc p15, 0, r9, c1, c0, 0 @ Control register | ||
223 | mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register | ||
224 | mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control | ||
225 | stmia r0, {r4 - r11} | ||
226 | ldmfd sp!, {r4 - r11, pc} | ||
227 | ENDPROC(cpu_v7_do_suspend) | ||
228 | |||
229 | ENTRY(cpu_v7_do_resume) | ||
230 | mov ip, #0 | ||
231 | mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs | ||
232 | mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache | ||
233 | ldmia r0, {r4 - r11} | ||
234 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID | ||
235 | mcr p15, 0, r5, c13, c0, 1 @ Context ID | ||
236 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID | ||
237 | mcr p15, 0, r7, c2, c0, 0 @ TTB 0 | ||
238 | mcr p15, 0, r8, c2, c0, 1 @ TTB 1 | ||
239 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register | ||
240 | mcr p15, 0, r10, c1, c0, 1 @ Auxillary control register | ||
241 | mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control | ||
242 | ldr r4, =PRRR @ PRRR | ||
243 | ldr r5, =NMRR @ NMRR | ||
244 | mcr p15, 0, r4, c10, c2, 0 @ write PRRR | ||
245 | mcr p15, 0, r5, c10, c2, 1 @ write NMRR | ||
246 | isb | ||
247 | mov r0, r9 @ control register | ||
248 | mov r2, r7, lsr #14 @ get TTB0 base | ||
249 | mov r2, r2, lsl #14 | ||
250 | ldr r3, cpu_resume_l1_flags | ||
251 | b cpu_resume_mmu | ||
252 | ENDPROC(cpu_v7_do_resume) | ||
253 | cpu_resume_l1_flags: | ||
254 | ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP) | ||
255 | ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP) | ||
256 | #else | ||
257 | #define cpu_v7_do_suspend 0 | ||
258 | #define cpu_v7_do_resume 0 | ||
259 | #endif | ||
260 | |||
174 | __CPUINIT | 261 | __CPUINIT |
175 | 262 | ||
176 | /* | 263 | /* |
@@ -264,6 +351,12 @@ __v7_setup: | |||
264 | orreq r10, r10, #1 << 6 @ set bit #6 | 351 | orreq r10, r10, #1 << 6 @ set bit #6 |
265 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 352 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
266 | #endif | 353 | #endif |
354 | #ifdef CONFIG_ARM_ERRATA_751472 | ||
355 | cmp r6, #0x30 @ present prior to r3p0 | ||
356 | mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register | ||
357 | orrlt r10, r10, #1 << 11 @ set bit #11 | ||
358 | mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register | ||
359 | #endif | ||
267 | 360 | ||
268 | 3: mov r10, #0 | 361 | 3: mov r10, #0 |
269 | #ifdef HARVARD_CACHE | 362 | #ifdef HARVARD_CACHE |
@@ -276,36 +369,8 @@ __v7_setup: | |||
276 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) | 369 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) |
277 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) | 370 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) |
278 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 371 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 |
279 | /* | 372 | ldr r5, =PRRR @ PRRR |
280 | * Memory region attributes with SCTLR.TRE=1 | 373 | ldr r6, =NMRR @ NMRR |
281 | * | ||
282 | * n = TEX[0],C,B | ||
283 | * TR = PRRR[2n+1:2n] - memory type | ||
284 | * IR = NMRR[2n+1:2n] - inner cacheable property | ||
285 | * OR = NMRR[2n+17:2n+16] - outer cacheable property | ||
286 | * | ||
287 | * n TR IR OR | ||
288 | * UNCACHED 000 00 | ||
289 | * BUFFERABLE 001 10 00 00 | ||
290 | * WRITETHROUGH 010 10 10 10 | ||
291 | * WRITEBACK 011 10 11 11 | ||
292 | * reserved 110 | ||
293 | * WRITEALLOC 111 10 01 01 | ||
294 | * DEV_SHARED 100 01 | ||
295 | * DEV_NONSHARED 100 01 | ||
296 | * DEV_WC 001 10 | ||
297 | * DEV_CACHED 011 10 | ||
298 | * | ||
299 | * Other attributes: | ||
300 | * | ||
301 | * DS0 = PRRR[16] = 0 - device shareable property | ||
302 | * DS1 = PRRR[17] = 1 - device shareable property | ||
303 | * NS0 = PRRR[18] = 0 - normal shareable property | ||
304 | * NS1 = PRRR[19] = 1 - normal shareable property | ||
305 | * NOS = PRRR[24+n] = 1 - not outer shareable | ||
306 | */ | ||
307 | ldr r5, =0xff0a81a8 @ PRRR | ||
308 | ldr r6, =0x40e040e0 @ NMRR | ||
309 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR | 374 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR |
310 | mcr p15, 0, r6, c10, c2, 1 @ write NMRR | 375 | mcr p15, 0, r6, c10, c2, 1 @ write NMRR |
311 | #endif | 376 | #endif |
@@ -351,6 +416,9 @@ ENTRY(v7_processor_functions) | |||
351 | .word cpu_v7_dcache_clean_area | 416 | .word cpu_v7_dcache_clean_area |
352 | .word cpu_v7_switch_mm | 417 | .word cpu_v7_switch_mm |
353 | .word cpu_v7_set_pte_ext | 418 | .word cpu_v7_set_pte_ext |
419 | .word 0 | ||
420 | .word 0 | ||
421 | .word 0 | ||
354 | .size v7_processor_functions, . - v7_processor_functions | 422 | .size v7_processor_functions, . - v7_processor_functions |
355 | 423 | ||
356 | .section ".rodata" | 424 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index ec26355cb7c2..63d8b2044e84 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -413,9 +413,52 @@ ENTRY(cpu_xsc3_set_pte_ext) | |||
413 | mov pc, lr | 413 | mov pc, lr |
414 | 414 | ||
415 | .ltorg | 415 | .ltorg |
416 | |||
417 | .align | 416 | .align |
418 | 417 | ||
418 | .globl cpu_xsc3_suspend_size | ||
419 | .equ cpu_xsc3_suspend_size, 4 * 8 | ||
420 | #ifdef CONFIG_PM | ||
421 | ENTRY(cpu_xsc3_do_suspend) | ||
422 | stmfd sp!, {r4 - r10, lr} | ||
423 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode | ||
424 | mrc p15, 0, r5, c15, c1, 0 @ CP access reg | ||
425 | mrc p15, 0, r6, c13, c0, 0 @ PID | ||
426 | mrc p15, 0, r7, c3, c0, 0 @ domain ID | ||
427 | mrc p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
428 | mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg | ||
429 | mrc p15, 0, r10, c1, c0, 0 @ control reg | ||
430 | bic r4, r4, #2 @ clear frequency change bit | ||
431 | stmia r0, {r1, r4 - r10} @ store v:p offset + cp regs | ||
432 | ldmia sp!, {r4 - r10, pc} | ||
433 | ENDPROC(cpu_xsc3_do_suspend) | ||
434 | |||
435 | ENTRY(cpu_xsc3_do_resume) | ||
436 | ldmia r0, {r1, r4 - r10} @ load v:p offset + cp regs | ||
437 | mov ip, #0 | ||
438 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB | ||
439 | mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer | ||
440 | mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer | ||
441 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | ||
442 | mcr p14, 0, r4, c6, c0, 0 @ clock configuration, turbo mode. | ||
443 | mcr p15, 0, r5, c15, c1, 0 @ CP access reg | ||
444 | mcr p15, 0, r6, c13, c0, 0 @ PID | ||
445 | mcr p15, 0, r7, c3, c0, 0 @ domain ID | ||
446 | mcr p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
447 | mcr p15, 0, r9, c1, c0, 1 @ auxiliary control reg | ||
448 | |||
449 | @ temporarily map resume_turn_on_mmu into the page table, | ||
450 | @ otherwise prefetch abort occurs after MMU is turned on | ||
451 | mov r0, r10 @ control register | ||
452 | mov r2, r8, lsr #14 @ get TTB0 base | ||
453 | mov r2, r2, lsl #14 | ||
454 | ldr r3, =0x542e @ section flags | ||
455 | b cpu_resume_mmu | ||
456 | ENDPROC(cpu_xsc3_do_resume) | ||
457 | #else | ||
458 | #define cpu_xsc3_do_suspend 0 | ||
459 | #define cpu_xsc3_do_resume 0 | ||
460 | #endif | ||
461 | |||
419 | __CPUINIT | 462 | __CPUINIT |
420 | 463 | ||
421 | .type __xsc3_setup, #function | 464 | .type __xsc3_setup, #function |
@@ -476,6 +519,9 @@ ENTRY(xsc3_processor_functions) | |||
476 | .word cpu_xsc3_dcache_clean_area | 519 | .word cpu_xsc3_dcache_clean_area |
477 | .word cpu_xsc3_switch_mm | 520 | .word cpu_xsc3_switch_mm |
478 | .word cpu_xsc3_set_pte_ext | 521 | .word cpu_xsc3_set_pte_ext |
522 | .word cpu_xsc3_suspend_size | ||
523 | .word cpu_xsc3_do_suspend | ||
524 | .word cpu_xsc3_do_resume | ||
479 | .size xsc3_processor_functions, . - xsc3_processor_functions | 525 | .size xsc3_processor_functions, . - xsc3_processor_functions |
480 | 526 | ||
481 | .section ".rodata" | 527 | .section ".rodata" |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 5a37c5e45c41..086038cd86ab 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -513,11 +513,49 @@ ENTRY(cpu_xscale_set_pte_ext) | |||
513 | xscale_set_pte_ext_epilogue | 513 | xscale_set_pte_ext_epilogue |
514 | mov pc, lr | 514 | mov pc, lr |
515 | 515 | ||
516 | |||
517 | .ltorg | 516 | .ltorg |
518 | |||
519 | .align | 517 | .align |
520 | 518 | ||
519 | .globl cpu_xscale_suspend_size | ||
520 | .equ cpu_xscale_suspend_size, 4 * 7 | ||
521 | #ifdef CONFIG_PM | ||
522 | ENTRY(cpu_xscale_do_suspend) | ||
523 | stmfd sp!, {r4 - r10, lr} | ||
524 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode | ||
525 | mrc p15, 0, r5, c15, c1, 0 @ CP access reg | ||
526 | mrc p15, 0, r6, c13, c0, 0 @ PID | ||
527 | mrc p15, 0, r7, c3, c0, 0 @ domain ID | ||
528 | mrc p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
529 | mrc p15, 0, r9, c1, c1, 0 @ auxiliary control reg | ||
530 | mrc p15, 0, r10, c1, c0, 0 @ control reg | ||
531 | bic r4, r4, #2 @ clear frequency change bit | ||
532 | stmia r0, {r4 - r10} @ store cp regs | ||
533 | ldmfd sp!, {r4 - r10, pc} | ||
534 | ENDPROC(cpu_xscale_do_suspend) | ||
535 | |||
536 | ENTRY(cpu_xscale_do_resume) | ||
537 | ldmia r0, {r4 - r10} @ load cp regs | ||
538 | mov ip, #0 | ||
539 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | ||
540 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB | ||
541 | mcr p14, 0, r4, c6, c0, 0 @ clock configuration, turbo mode. | ||
542 | mcr p15, 0, r5, c15, c1, 0 @ CP access reg | ||
543 | mcr p15, 0, r6, c13, c0, 0 @ PID | ||
544 | mcr p15, 0, r7, c3, c0, 0 @ domain ID | ||
545 | mcr p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
546 | mcr p15, 0, r9, c1, c1, 0 @ auxiliary control reg | ||
547 | mov r0, r10 @ control register | ||
548 | mov r2, r8, lsr #14 @ get TTB0 base | ||
549 | mov r2, r2, lsl #14 | ||
550 | ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ | ||
551 | PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE | ||
552 | b cpu_resume_mmu | ||
553 | ENDPROC(cpu_xscale_do_resume) | ||
554 | #else | ||
555 | #define cpu_xscale_do_suspend 0 | ||
556 | #define cpu_xscale_do_resume 0 | ||
557 | #endif | ||
558 | |||
521 | __CPUINIT | 559 | __CPUINIT |
522 | 560 | ||
523 | .type __xscale_setup, #function | 561 | .type __xscale_setup, #function |
@@ -565,6 +603,9 @@ ENTRY(xscale_processor_functions) | |||
565 | .word cpu_xscale_dcache_clean_area | 603 | .word cpu_xscale_dcache_clean_area |
566 | .word cpu_xscale_switch_mm | 604 | .word cpu_xscale_switch_mm |
567 | .word cpu_xscale_set_pte_ext | 605 | .word cpu_xscale_set_pte_ext |
606 | .word cpu_xscale_suspend_size | ||
607 | .word cpu_xscale_do_suspend | ||
608 | .word cpu_xscale_do_resume | ||
568 | .size xscale_processor_functions, . - xscale_processor_functions | 609 | .size xscale_processor_functions, . - xscale_processor_functions |
569 | 610 | ||
570 | .section ".rodata" | 611 | .section ".rodata" |
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 9967d5e855c7..f500fc34d065 100644 --- a/arch/arm/plat-omap/include/plat/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h | |||
@@ -12,7 +12,19 @@ | |||
12 | #define __ARCH_ARM_OMAP_SRAM_H | 12 | #define __ARCH_ARM_OMAP_SRAM_H |
13 | 13 | ||
14 | #ifndef __ASSEMBLY__ | 14 | #ifndef __ASSEMBLY__ |
15 | extern void * omap_sram_push(void * start, unsigned long size); | 15 | #include <asm/fncpy.h> |
16 | |||
17 | extern void *omap_sram_push_address(unsigned long size); | ||
18 | |||
19 | /* Macro to push a function to the internal SRAM, using the fncpy API */ | ||
20 | #define omap_sram_push(funcp, size) ({ \ | ||
21 | typeof(&(funcp)) _res = NULL; \ | ||
22 | void *_sram_address = omap_sram_push_address(size); \ | ||
23 | if (_sram_address) \ | ||
24 | _res = fncpy(_sram_address, &(funcp), size); \ | ||
25 | _res; \ | ||
26 | }) | ||
27 | |||
16 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); | 28 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); |
17 | 29 | ||
18 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | 30 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 459b319a9fad..49d3208793e5 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
@@ -322,15 +322,18 @@ static void omap_mbox_fini(struct omap_mbox *mbox) | |||
322 | 322 | ||
323 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) | 323 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) |
324 | { | 324 | { |
325 | struct omap_mbox *mbox; | 325 | struct omap_mbox *_mbox, *mbox = NULL; |
326 | int ret; | 326 | int i, ret; |
327 | 327 | ||
328 | if (!mboxes) | 328 | if (!mboxes) |
329 | return ERR_PTR(-EINVAL); | 329 | return ERR_PTR(-EINVAL); |
330 | 330 | ||
331 | for (mbox = *mboxes; mbox; mbox++) | 331 | for (i = 0; (_mbox = mboxes[i]); i++) { |
332 | if (!strcmp(mbox->name, name)) | 332 | if (!strcmp(_mbox->name, name)) { |
333 | mbox = _mbox; | ||
333 | break; | 334 | break; |
335 | } | ||
336 | } | ||
334 | 337 | ||
335 | if (!mbox) | 338 | if (!mbox) |
336 | return ERR_PTR(-ENOENT); | 339 | return ERR_PTR(-ENOENT); |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index e26e50487d60..68fcc7dc56e7 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -242,7 +242,14 @@ static void __init omap_map_sram(void) | |||
242 | omap_sram_size - SRAM_BOOTLOADER_SZ); | 242 | omap_sram_size - SRAM_BOOTLOADER_SZ); |
243 | } | 243 | } |
244 | 244 | ||
245 | void * omap_sram_push(void * start, unsigned long size) | 245 | /* |
246 | * Memory allocator for SRAM: calculates the new ceiling address | ||
247 | * for pushing a function using the fncpy API. | ||
248 | * | ||
249 | * Note that fncpy requires the returned address to be aligned | ||
250 | * to an 8-byte boundary. | ||
251 | */ | ||
252 | void *omap_sram_push_address(unsigned long size) | ||
246 | { | 253 | { |
247 | if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) { | 254 | if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) { |
248 | printk(KERN_ERR "Not enough space in SRAM\n"); | 255 | printk(KERN_ERR "Not enough space in SRAM\n"); |
@@ -250,10 +257,7 @@ void * omap_sram_push(void * start, unsigned long size) | |||
250 | } | 257 | } |
251 | 258 | ||
252 | omap_sram_ceil -= size; | 259 | omap_sram_ceil -= size; |
253 | omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *)); | 260 | omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, FNCPY_ALIGN); |
254 | memcpy((void *)omap_sram_ceil, start, size); | ||
255 | flush_icache_range((unsigned long)omap_sram_ceil, | ||
256 | (unsigned long)(omap_sram_ceil + size)); | ||
257 | 261 | ||
258 | return (void *)omap_sram_ceil; | 262 | return (void *)omap_sram_ceil; |
259 | } | 263 | } |
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index e73e3b6e88d2..fd7032f84ae7 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S | |||
@@ -44,23 +44,13 @@ | |||
44 | /* s3c_cpu_save | 44 | /* s3c_cpu_save |
45 | * | 45 | * |
46 | * entry: | 46 | * entry: |
47 | * r0 = save address (virtual addr of s3c_sleep_save_phys) | 47 | * r1 = v:p offset |
48 | */ | 48 | */ |
49 | 49 | ||
50 | ENTRY(s3c_cpu_save) | 50 | ENTRY(s3c_cpu_save) |
51 | stmfd sp!, { r4 - r12, lr } | 51 | stmfd sp!, { r4 - r12, lr } |
52 | 52 | ldr r3, =resume_with_mmu | |
53 | @@ store co-processor registers | 53 | bl cpu_suspend |
54 | |||
55 | mrc p15, 0, r4, c13, c0, 0 @ PID | ||
56 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID | ||
57 | mrc p15, 0, r6, c2, c0, 0 @ translation table base address | ||
58 | mrc p15, 0, r7, c1, c0, 0 @ control register | ||
59 | |||
60 | stmia r0, { r4 - r13 } | ||
61 | |||
62 | @@ write our state back to RAM | ||
63 | bl s3c_pm_cb_flushcache | ||
64 | 54 | ||
65 | @@ jump to final code to send system to sleep | 55 | @@ jump to final code to send system to sleep |
66 | ldr r0, =pm_cpu_sleep | 56 | ldr r0, =pm_cpu_sleep |
@@ -76,20 +66,6 @@ resume_with_mmu: | |||
76 | 66 | ||
77 | .ltorg | 67 | .ltorg |
78 | 68 | ||
79 | @@ the next bits sit in the .data segment, even though they | ||
80 | @@ happen to be code... the s3c_sleep_save_phys needs to be | ||
81 | @@ accessed by the resume code before it can restore the MMU. | ||
82 | @@ This means that the variable has to be close enough for the | ||
83 | @@ code to read it... since the .text segment needs to be RO, | ||
84 | @@ the data segment can be the only place to put this code. | ||
85 | |||
86 | .data | ||
87 | |||
88 | .global s3c_sleep_save_phys | ||
89 | s3c_sleep_save_phys: | ||
90 | .word 0 | ||
91 | |||
92 | |||
93 | /* sleep magic, to allow the bootloader to check for an valid | 69 | /* sleep magic, to allow the bootloader to check for an valid |
94 | * image to resume to. Must be the first word before the | 70 | * image to resume to. Must be the first word before the |
95 | * s3c_cpu_resume entry. | 71 | * s3c_cpu_resume entry. |
@@ -100,10 +76,6 @@ s3c_sleep_save_phys: | |||
100 | /* s3c_cpu_resume | 76 | /* s3c_cpu_resume |
101 | * | 77 | * |
102 | * resume code entry for bootloader to call | 78 | * resume code entry for bootloader to call |
103 | * | ||
104 | * we must put this code here in the data segment as we have no | ||
105 | * other way of restoring the stack pointer after sleep, and we | ||
106 | * must not write to the code segment (code is read-only) | ||
107 | */ | 79 | */ |
108 | 80 | ||
109 | ENTRY(s3c_cpu_resume) | 81 | ENTRY(s3c_cpu_resume) |
@@ -134,25 +106,4 @@ ENTRY(s3c_cpu_resume) | |||
134 | beq 1001b | 106 | beq 1001b |
135 | #endif /* CONFIG_DEBUG_RESUME */ | 107 | #endif /* CONFIG_DEBUG_RESUME */ |
136 | 108 | ||
137 | mov r1, #0 | 109 | b cpu_resume |
138 | mcr p15, 0, r1, c8, c7, 0 @@ invalidate I & D TLBs | ||
139 | mcr p15, 0, r1, c7, c7, 0 @@ invalidate I & D caches | ||
140 | |||
141 | ldr r0, s3c_sleep_save_phys @ address of restore block | ||
142 | ldmia r0, { r4 - r13 } | ||
143 | |||
144 | mcr p15, 0, r4, c13, c0, 0 @ PID | ||
145 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID | ||
146 | mcr p15, 0, r6, c2, c0, 0 @ translation table base | ||
147 | |||
148 | #ifdef CONFIG_DEBUG_RESUME | ||
149 | mov r3, #'R' | ||
150 | strb r3, [ r2, #S3C2410_UTXH ] | ||
151 | #endif | ||
152 | |||
153 | ldr r2, =resume_with_mmu | ||
154 | mcr p15, 0, r7, c1, c0, 0 @ turn on MMU, etc | ||
155 | nop @ second-to-last before mmu | ||
156 | mov pc, r2 @ go back to virtual address | ||
157 | |||
158 | .ltorg | ||
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c index 6a7342886171..afaf87fdb93e 100644 --- a/arch/arm/plat-s5p/dev-uart.c +++ b/arch/arm/plat-s5p/dev-uart.c | |||
@@ -28,7 +28,7 @@ | |||
28 | static struct resource s5p_uart0_resource[] = { | 28 | static struct resource s5p_uart0_resource[] = { |
29 | [0] = { | 29 | [0] = { |
30 | .start = S5P_PA_UART0, | 30 | .start = S5P_PA_UART0, |
31 | .end = S5P_PA_UART0 + S5P_SZ_UART, | 31 | .end = S5P_PA_UART0 + S5P_SZ_UART - 1, |
32 | .flags = IORESOURCE_MEM, | 32 | .flags = IORESOURCE_MEM, |
33 | }, | 33 | }, |
34 | [1] = { | 34 | [1] = { |
@@ -51,7 +51,7 @@ static struct resource s5p_uart0_resource[] = { | |||
51 | static struct resource s5p_uart1_resource[] = { | 51 | static struct resource s5p_uart1_resource[] = { |
52 | [0] = { | 52 | [0] = { |
53 | .start = S5P_PA_UART1, | 53 | .start = S5P_PA_UART1, |
54 | .end = S5P_PA_UART1 + S5P_SZ_UART, | 54 | .end = S5P_PA_UART1 + S5P_SZ_UART - 1, |
55 | .flags = IORESOURCE_MEM, | 55 | .flags = IORESOURCE_MEM, |
56 | }, | 56 | }, |
57 | [1] = { | 57 | [1] = { |
@@ -74,7 +74,7 @@ static struct resource s5p_uart1_resource[] = { | |||
74 | static struct resource s5p_uart2_resource[] = { | 74 | static struct resource s5p_uart2_resource[] = { |
75 | [0] = { | 75 | [0] = { |
76 | .start = S5P_PA_UART2, | 76 | .start = S5P_PA_UART2, |
77 | .end = S5P_PA_UART2 + S5P_SZ_UART, | 77 | .end = S5P_PA_UART2 + S5P_SZ_UART - 1, |
78 | .flags = IORESOURCE_MEM, | 78 | .flags = IORESOURCE_MEM, |
79 | }, | 79 | }, |
80 | [1] = { | 80 | [1] = { |
@@ -98,7 +98,7 @@ static struct resource s5p_uart3_resource[] = { | |||
98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 | 98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 |
99 | [0] = { | 99 | [0] = { |
100 | .start = S5P_PA_UART3, | 100 | .start = S5P_PA_UART3, |
101 | .end = S5P_PA_UART3 + S5P_SZ_UART, | 101 | .end = S5P_PA_UART3 + S5P_SZ_UART - 1, |
102 | .flags = IORESOURCE_MEM, | 102 | .flags = IORESOURCE_MEM, |
103 | }, | 103 | }, |
104 | [1] = { | 104 | [1] = { |
@@ -123,7 +123,7 @@ static struct resource s5p_uart4_resource[] = { | |||
123 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | 123 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 |
124 | [0] = { | 124 | [0] = { |
125 | .start = S5P_PA_UART4, | 125 | .start = S5P_PA_UART4, |
126 | .end = S5P_PA_UART4 + S5P_SZ_UART, | 126 | .end = S5P_PA_UART4 + S5P_SZ_UART - 1, |
127 | .flags = IORESOURCE_MEM, | 127 | .flags = IORESOURCE_MEM, |
128 | }, | 128 | }, |
129 | [1] = { | 129 | [1] = { |
@@ -148,7 +148,7 @@ static struct resource s5p_uart5_resource[] = { | |||
148 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | 148 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 |
149 | [0] = { | 149 | [0] = { |
150 | .start = S5P_PA_UART5, | 150 | .start = S5P_PA_UART5, |
151 | .end = S5P_PA_UART5 + S5P_SZ_UART, | 151 | .end = S5P_PA_UART5 + S5P_SZ_UART - 1, |
152 | .flags = IORESOURCE_MEM, | 152 | .flags = IORESOURCE_MEM, |
153 | }, | 153 | }, |
154 | [1] = { | 154 | [1] = { |
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c index 236ef8427d7d..3e4bd8147bf4 100644 --- a/arch/arm/plat-samsung/dev-ts.c +++ b/arch/arm/plat-samsung/dev-ts.c | |||
@@ -58,4 +58,3 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |||
58 | 58 | ||
59 | s3c_device_ts.dev.platform_data = npd; | 59 | s3c_device_ts.dev.platform_data = npd; |
60 | } | 60 | } |
61 | EXPORT_SYMBOL(s3c24xx_ts_set_platdata); | ||
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c index 3776cd952450..5928105490fa 100644 --- a/arch/arm/plat-samsung/dev-uart.c +++ b/arch/arm/plat-samsung/dev-uart.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | 17 | ||
18 | #include <plat/devs.h> | ||
19 | |||
18 | /* uart devices */ | 20 | /* uart devices */ |
19 | 21 | ||
20 | static struct platform_device s3c24xx_uart_device0 = { | 22 | static struct platform_device s3c24xx_uart_device0 = { |
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 30518cc9a67c..937cc2ace517 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h | |||
@@ -52,13 +52,11 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ | |||
52 | 52 | ||
53 | /* from sleep.S */ | 53 | /* from sleep.S */ |
54 | 54 | ||
55 | extern int s3c_cpu_save(unsigned long *saveblk); | 55 | extern int s3c_cpu_save(unsigned long *saveblk, long); |
56 | extern void s3c_cpu_resume(void); | 56 | extern void s3c_cpu_resume(void); |
57 | 57 | ||
58 | extern void s3c2410_cpu_suspend(void); | 58 | extern void s3c2410_cpu_suspend(void); |
59 | 59 | ||
60 | extern unsigned long s3c_sleep_save_phys; | ||
61 | |||
62 | /* sleep save info */ | 60 | /* sleep save info */ |
63 | 61 | ||
64 | /** | 62 | /** |
@@ -181,13 +179,5 @@ extern void s3c_pm_restore_gpios(void); | |||
181 | */ | 179 | */ |
182 | extern void s3c_pm_save_gpios(void); | 180 | extern void s3c_pm_save_gpios(void); |
183 | 181 | ||
184 | /** | ||
185 | * s3c_pm_cb_flushcache - callback for assembly code | ||
186 | * | ||
187 | * Callback to issue flush_cache_all() as this call is | ||
188 | * not a directly callable object. | ||
189 | */ | ||
190 | extern void s3c_pm_cb_flushcache(void); | ||
191 | |||
192 | extern void s3c_pm_save_core(void); | 182 | extern void s3c_pm_save_core(void); |
193 | extern void s3c_pm_restore_core(void); | 183 | extern void s3c_pm_restore_core(void); |
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index 02d531fb3f81..d5b58d31903c 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c | |||
@@ -241,8 +241,6 @@ void (*pm_cpu_sleep)(void); | |||
241 | 241 | ||
242 | static int s3c_pm_enter(suspend_state_t state) | 242 | static int s3c_pm_enter(suspend_state_t state) |
243 | { | 243 | { |
244 | static unsigned long regs_save[16]; | ||
245 | |||
246 | /* ensure the debug is initialised (if enabled) */ | 244 | /* ensure the debug is initialised (if enabled) */ |
247 | 245 | ||
248 | s3c_pm_debug_init(); | 246 | s3c_pm_debug_init(); |
@@ -266,12 +264,6 @@ static int s3c_pm_enter(suspend_state_t state) | |||
266 | return -EINVAL; | 264 | return -EINVAL; |
267 | } | 265 | } |
268 | 266 | ||
269 | /* store the physical address of the register recovery block */ | ||
270 | |||
271 | s3c_sleep_save_phys = virt_to_phys(regs_save); | ||
272 | |||
273 | S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); | ||
274 | |||
275 | /* save all necessary core registers not covered by the drivers */ | 267 | /* save all necessary core registers not covered by the drivers */ |
276 | 268 | ||
277 | s3c_pm_save_gpios(); | 269 | s3c_pm_save_gpios(); |
@@ -305,7 +297,7 @@ static int s3c_pm_enter(suspend_state_t state) | |||
305 | * we resume as it saves its own register state and restores it | 297 | * we resume as it saves its own register state and restores it |
306 | * during the resume. */ | 298 | * during the resume. */ |
307 | 299 | ||
308 | s3c_cpu_save(regs_save); | 300 | s3c_cpu_save(0, PLAT_PHYS_OFFSET - PAGE_OFFSET); |
309 | 301 | ||
310 | /* restore the cpu state using the kernel's cpu init code. */ | 302 | /* restore the cpu state using the kernel's cpu init code. */ |
311 | 303 | ||
@@ -336,12 +328,6 @@ static int s3c_pm_enter(suspend_state_t state) | |||
336 | return 0; | 328 | return 0; |
337 | } | 329 | } |
338 | 330 | ||
339 | /* callback from assembly code */ | ||
340 | void s3c_pm_cb_flushcache(void) | ||
341 | { | ||
342 | flush_cache_all(); | ||
343 | } | ||
344 | |||
345 | static int s3c_pm_prepare(void) | 331 | static int s3c_pm_prepare(void) |
346 | { | 332 | { |
347 | /* prepare check area if configured */ | 333 | /* prepare check area if configured */ |
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile index eb89540aeda9..b4f340b8f1f1 100644 --- a/arch/arm/plat-spear/Makefile +++ b/arch/arm/plat-spear/Makefile | |||
@@ -3,6 +3,6 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := clock.o padmux.o time.o | 6 | obj-y := clock.o time.o |
7 | 7 | ||
8 | obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o | 8 | obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o |
diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c index ee4f90e534d8..bdbd7ec9cb6b 100644 --- a/arch/arm/plat-spear/clock.c +++ b/arch/arm/plat-spear/clock.c | |||
@@ -12,18 +12,25 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/bug.h> | 14 | #include <linux/bug.h> |
15 | #include <linux/clk.h> | ||
16 | #include <linux/debugfs.h> | ||
15 | #include <linux/err.h> | 17 | #include <linux/err.h> |
16 | #include <linux/io.h> | 18 | #include <linux/io.h> |
17 | #include <linux/list.h> | 19 | #include <linux/list.h> |
18 | #include <linux/module.h> | 20 | #include <linux/module.h> |
19 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
20 | #include <mach/misc_regs.h> | ||
21 | #include <plat/clock.h> | 22 | #include <plat/clock.h> |
22 | 23 | ||
23 | static DEFINE_SPINLOCK(clocks_lock); | 24 | static DEFINE_SPINLOCK(clocks_lock); |
24 | static LIST_HEAD(root_clks); | 25 | static LIST_HEAD(root_clks); |
26 | #ifdef CONFIG_DEBUG_FS | ||
27 | static LIST_HEAD(clocks); | ||
28 | #endif | ||
25 | 29 | ||
26 | static void propagate_rate(struct list_head *); | 30 | static void propagate_rate(struct clk *, int on_init); |
31 | #ifdef CONFIG_DEBUG_FS | ||
32 | static int clk_debugfs_reparent(struct clk *); | ||
33 | #endif | ||
27 | 34 | ||
28 | static int generic_clk_enable(struct clk *clk) | 35 | static int generic_clk_enable(struct clk *clk) |
29 | { | 36 | { |
@@ -65,6 +72,104 @@ static struct clkops generic_clkops = { | |||
65 | .disable = generic_clk_disable, | 72 | .disable = generic_clk_disable, |
66 | }; | 73 | }; |
67 | 74 | ||
75 | /* returns current programmed clocks clock info structure */ | ||
76 | static struct pclk_info *pclk_info_get(struct clk *clk) | ||
77 | { | ||
78 | unsigned int val, i; | ||
79 | struct pclk_info *info = NULL; | ||
80 | |||
81 | val = (readl(clk->pclk_sel->pclk_sel_reg) >> clk->pclk_sel_shift) | ||
82 | & clk->pclk_sel->pclk_sel_mask; | ||
83 | |||
84 | for (i = 0; i < clk->pclk_sel->pclk_count; i++) { | ||
85 | if (clk->pclk_sel->pclk_info[i].pclk_val == val) | ||
86 | info = &clk->pclk_sel->pclk_info[i]; | ||
87 | } | ||
88 | |||
89 | return info; | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * Set Update pclk, and pclk_info of clk and add clock sibling node to current | ||
94 | * parents children list | ||
95 | */ | ||
96 | static void clk_reparent(struct clk *clk, struct pclk_info *pclk_info) | ||
97 | { | ||
98 | unsigned long flags; | ||
99 | |||
100 | spin_lock_irqsave(&clocks_lock, flags); | ||
101 | list_del(&clk->sibling); | ||
102 | list_add(&clk->sibling, &pclk_info->pclk->children); | ||
103 | |||
104 | clk->pclk = pclk_info->pclk; | ||
105 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
106 | |||
107 | #ifdef CONFIG_DEBUG_FS | ||
108 | clk_debugfs_reparent(clk); | ||
109 | #endif | ||
110 | } | ||
111 | |||
112 | static void do_clk_disable(struct clk *clk) | ||
113 | { | ||
114 | if (!clk) | ||
115 | return; | ||
116 | |||
117 | if (!clk->usage_count) { | ||
118 | WARN_ON(1); | ||
119 | return; | ||
120 | } | ||
121 | |||
122 | clk->usage_count--; | ||
123 | |||
124 | if (clk->usage_count == 0) { | ||
125 | /* | ||
126 | * Surely, there are no active childrens or direct users | ||
127 | * of this clock | ||
128 | */ | ||
129 | if (clk->pclk) | ||
130 | do_clk_disable(clk->pclk); | ||
131 | |||
132 | if (clk->ops && clk->ops->disable) | ||
133 | clk->ops->disable(clk); | ||
134 | } | ||
135 | } | ||
136 | |||
137 | static int do_clk_enable(struct clk *clk) | ||
138 | { | ||
139 | int ret = 0; | ||
140 | |||
141 | if (!clk) | ||
142 | return -EFAULT; | ||
143 | |||
144 | if (clk->usage_count == 0) { | ||
145 | if (clk->pclk) { | ||
146 | ret = do_clk_enable(clk->pclk); | ||
147 | if (ret) | ||
148 | goto err; | ||
149 | } | ||
150 | if (clk->ops && clk->ops->enable) { | ||
151 | ret = clk->ops->enable(clk); | ||
152 | if (ret) { | ||
153 | if (clk->pclk) | ||
154 | do_clk_disable(clk->pclk); | ||
155 | goto err; | ||
156 | } | ||
157 | } | ||
158 | /* | ||
159 | * Since the clock is going to be used for the first | ||
160 | * time please reclac | ||
161 | */ | ||
162 | if (clk->recalc) { | ||
163 | ret = clk->recalc(clk); | ||
164 | if (ret) | ||
165 | goto err; | ||
166 | } | ||
167 | } | ||
168 | clk->usage_count++; | ||
169 | err: | ||
170 | return ret; | ||
171 | } | ||
172 | |||
68 | /* | 173 | /* |
69 | * clk_enable - inform the system when the clock source should be running. | 174 | * clk_enable - inform the system when the clock source should be running. |
70 | * @clk: clock source | 175 | * @clk: clock source |
@@ -78,17 +183,9 @@ int clk_enable(struct clk *clk) | |||
78 | unsigned long flags; | 183 | unsigned long flags; |
79 | int ret = 0; | 184 | int ret = 0; |
80 | 185 | ||
81 | if (!clk || IS_ERR(clk)) | ||
82 | return -EFAULT; | ||
83 | |||
84 | spin_lock_irqsave(&clocks_lock, flags); | 186 | spin_lock_irqsave(&clocks_lock, flags); |
85 | if (clk->usage_count == 0) { | 187 | ret = do_clk_enable(clk); |
86 | if (clk->ops && clk->ops->enable) | ||
87 | ret = clk->ops->enable(clk); | ||
88 | } | ||
89 | clk->usage_count++; | ||
90 | spin_unlock_irqrestore(&clocks_lock, flags); | 188 | spin_unlock_irqrestore(&clocks_lock, flags); |
91 | |||
92 | return ret; | 189 | return ret; |
93 | } | 190 | } |
94 | EXPORT_SYMBOL(clk_enable); | 191 | EXPORT_SYMBOL(clk_enable); |
@@ -109,17 +206,8 @@ void clk_disable(struct clk *clk) | |||
109 | { | 206 | { |
110 | unsigned long flags; | 207 | unsigned long flags; |
111 | 208 | ||
112 | if (!clk || IS_ERR(clk)) | ||
113 | return; | ||
114 | |||
115 | WARN_ON(clk->usage_count == 0); | ||
116 | |||
117 | spin_lock_irqsave(&clocks_lock, flags); | 209 | spin_lock_irqsave(&clocks_lock, flags); |
118 | clk->usage_count--; | 210 | do_clk_disable(clk); |
119 | if (clk->usage_count == 0) { | ||
120 | if (clk->ops && clk->ops->disable) | ||
121 | clk->ops->disable(clk); | ||
122 | } | ||
123 | spin_unlock_irqrestore(&clocks_lock, flags); | 211 | spin_unlock_irqrestore(&clocks_lock, flags); |
124 | } | 212 | } |
125 | EXPORT_SYMBOL(clk_disable); | 213 | EXPORT_SYMBOL(clk_disable); |
@@ -153,15 +241,14 @@ int clk_set_parent(struct clk *clk, struct clk *parent) | |||
153 | int i, found = 0, val = 0; | 241 | int i, found = 0, val = 0; |
154 | unsigned long flags; | 242 | unsigned long flags; |
155 | 243 | ||
156 | if (!clk || IS_ERR(clk) || !parent || IS_ERR(parent)) | 244 | if (!clk || !parent) |
157 | return -EFAULT; | 245 | return -EFAULT; |
158 | if (clk->usage_count) | ||
159 | return -EBUSY; | ||
160 | if (!clk->pclk_sel) | ||
161 | return -EPERM; | ||
162 | if (clk->pclk == parent) | 246 | if (clk->pclk == parent) |
163 | return 0; | 247 | return 0; |
248 | if (!clk->pclk_sel) | ||
249 | return -EPERM; | ||
164 | 250 | ||
251 | /* check if requested parent is in clk parent list */ | ||
165 | for (i = 0; i < clk->pclk_sel->pclk_count; i++) { | 252 | for (i = 0; i < clk->pclk_sel->pclk_count; i++) { |
166 | if (clk->pclk_sel->pclk_info[i].pclk == parent) { | 253 | if (clk->pclk_sel->pclk_info[i].pclk == parent) { |
167 | found = 1; | 254 | found = 1; |
@@ -176,25 +263,58 @@ int clk_set_parent(struct clk *clk, struct clk *parent) | |||
176 | /* reflect parent change in hardware */ | 263 | /* reflect parent change in hardware */ |
177 | val = readl(clk->pclk_sel->pclk_sel_reg); | 264 | val = readl(clk->pclk_sel->pclk_sel_reg); |
178 | val &= ~(clk->pclk_sel->pclk_sel_mask << clk->pclk_sel_shift); | 265 | val &= ~(clk->pclk_sel->pclk_sel_mask << clk->pclk_sel_shift); |
179 | val |= clk->pclk_sel->pclk_info[i].pclk_mask << clk->pclk_sel_shift; | 266 | val |= clk->pclk_sel->pclk_info[i].pclk_val << clk->pclk_sel_shift; |
180 | writel(val, clk->pclk_sel->pclk_sel_reg); | 267 | writel(val, clk->pclk_sel->pclk_sel_reg); |
181 | spin_unlock_irqrestore(&clocks_lock, flags); | 268 | spin_unlock_irqrestore(&clocks_lock, flags); |
182 | 269 | ||
183 | /* reflect parent change in software */ | 270 | /* reflect parent change in software */ |
184 | clk->recalc(clk); | 271 | clk_reparent(clk, &clk->pclk_sel->pclk_info[i]); |
185 | propagate_rate(&clk->children); | 272 | |
273 | propagate_rate(clk, 0); | ||
186 | return 0; | 274 | return 0; |
187 | } | 275 | } |
188 | EXPORT_SYMBOL(clk_set_parent); | 276 | EXPORT_SYMBOL(clk_set_parent); |
189 | 277 | ||
278 | /** | ||
279 | * clk_set_rate - set the clock rate for a clock source | ||
280 | * @clk: clock source | ||
281 | * @rate: desired clock rate in Hz | ||
282 | * | ||
283 | * Returns success (0) or negative errno. | ||
284 | */ | ||
285 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
286 | { | ||
287 | unsigned long flags; | ||
288 | int ret = -EINVAL; | ||
289 | |||
290 | if (!clk || !rate) | ||
291 | return -EFAULT; | ||
292 | |||
293 | if (clk->set_rate) { | ||
294 | spin_lock_irqsave(&clocks_lock, flags); | ||
295 | ret = clk->set_rate(clk, rate); | ||
296 | if (!ret) | ||
297 | /* if successful -> propagate */ | ||
298 | propagate_rate(clk, 0); | ||
299 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
300 | } else if (clk->pclk) { | ||
301 | u32 mult = clk->div_factor ? clk->div_factor : 1; | ||
302 | ret = clk_set_rate(clk->pclk, mult * rate); | ||
303 | } | ||
304 | |||
305 | return ret; | ||
306 | } | ||
307 | EXPORT_SYMBOL(clk_set_rate); | ||
308 | |||
190 | /* registers clock in platform clock framework */ | 309 | /* registers clock in platform clock framework */ |
191 | void clk_register(struct clk_lookup *cl) | 310 | void clk_register(struct clk_lookup *cl) |
192 | { | 311 | { |
193 | struct clk *clk = cl->clk; | 312 | struct clk *clk; |
194 | unsigned long flags; | 313 | unsigned long flags; |
195 | 314 | ||
196 | if (!clk || IS_ERR(clk)) | 315 | if (!cl || !cl->clk) |
197 | return; | 316 | return; |
317 | clk = cl->clk; | ||
198 | 318 | ||
199 | spin_lock_irqsave(&clocks_lock, flags); | 319 | spin_lock_irqsave(&clocks_lock, flags); |
200 | 320 | ||
@@ -207,71 +327,173 @@ void clk_register(struct clk_lookup *cl) | |||
207 | /* root clock don't have any parents */ | 327 | /* root clock don't have any parents */ |
208 | if (!clk->pclk && !clk->pclk_sel) { | 328 | if (!clk->pclk && !clk->pclk_sel) { |
209 | list_add(&clk->sibling, &root_clks); | 329 | list_add(&clk->sibling, &root_clks); |
210 | /* add clocks with only one parent to parent's children list */ | ||
211 | } else if (clk->pclk && !clk->pclk_sel) { | 330 | } else if (clk->pclk && !clk->pclk_sel) { |
331 | /* add clocks with only one parent to parent's children list */ | ||
212 | list_add(&clk->sibling, &clk->pclk->children); | 332 | list_add(&clk->sibling, &clk->pclk->children); |
213 | } else { | 333 | } else { |
214 | /* add clocks with > 1 parent to 1st parent's children list */ | 334 | /* clocks with more than one parent */ |
215 | list_add(&clk->sibling, | 335 | struct pclk_info *pclk_info; |
216 | &clk->pclk_sel->pclk_info[0].pclk->children); | 336 | |
337 | pclk_info = pclk_info_get(clk); | ||
338 | if (!pclk_info) { | ||
339 | pr_err("CLKDEV: invalid pclk info of clk with" | ||
340 | " %s dev_id and %s con_id\n", | ||
341 | cl->dev_id, cl->con_id); | ||
342 | } else { | ||
343 | clk->pclk = pclk_info->pclk; | ||
344 | list_add(&clk->sibling, &pclk_info->pclk->children); | ||
345 | } | ||
217 | } | 346 | } |
347 | |||
218 | spin_unlock_irqrestore(&clocks_lock, flags); | 348 | spin_unlock_irqrestore(&clocks_lock, flags); |
219 | 349 | ||
350 | /* debugfs specific */ | ||
351 | #ifdef CONFIG_DEBUG_FS | ||
352 | list_add(&clk->node, &clocks); | ||
353 | clk->cl = cl; | ||
354 | #endif | ||
355 | |||
220 | /* add clock to arm clockdev framework */ | 356 | /* add clock to arm clockdev framework */ |
221 | clkdev_add(cl); | 357 | clkdev_add(cl); |
222 | } | 358 | } |
223 | 359 | ||
224 | /** | 360 | /** |
225 | * propagate_rate - recalculate and propagate all clocks in list head | 361 | * propagate_rate - recalculate and propagate all clocks to children |
362 | * @pclk: parent clock required to be propogated | ||
363 | * @on_init: flag for enabling clocks which are ENABLED_ON_INIT. | ||
226 | * | 364 | * |
227 | * Recalculates all root clocks in list head, which if the clock's .recalc is | 365 | * Recalculates all children clocks |
228 | * set correctly, should also propagate their rates. | ||
229 | */ | 366 | */ |
230 | static void propagate_rate(struct list_head *lhead) | 367 | void propagate_rate(struct clk *pclk, int on_init) |
231 | { | 368 | { |
232 | struct clk *clkp, *_temp; | 369 | struct clk *clk, *_temp; |
370 | int ret = 0; | ||
233 | 371 | ||
234 | list_for_each_entry_safe(clkp, _temp, lhead, sibling) { | 372 | list_for_each_entry_safe(clk, _temp, &pclk->children, sibling) { |
235 | if (clkp->recalc) | 373 | if (clk->recalc) { |
236 | clkp->recalc(clkp); | 374 | ret = clk->recalc(clk); |
237 | propagate_rate(&clkp->children); | 375 | /* |
376 | * recalc will return error if clk out is not programmed | ||
377 | * In this case configure default rate. | ||
378 | */ | ||
379 | if (ret && clk->set_rate) | ||
380 | clk->set_rate(clk, 0); | ||
381 | } | ||
382 | propagate_rate(clk, on_init); | ||
383 | |||
384 | if (!on_init) | ||
385 | continue; | ||
386 | |||
387 | /* Enable clks enabled on init, in software view */ | ||
388 | if (clk->flags & ENABLED_ON_INIT) | ||
389 | do_clk_enable(clk); | ||
238 | } | 390 | } |
239 | } | 391 | } |
240 | 392 | ||
241 | /* returns current programmed clocks clock info structure */ | 393 | /** |
242 | static struct pclk_info *pclk_info_get(struct clk *clk) | 394 | * round_rate_index - return closest programmable rate index in rate_config tbl |
395 | * @clk: ptr to clock structure | ||
396 | * @drate: desired rate | ||
397 | * @rate: final rate will be returned in this variable only. | ||
398 | * | ||
399 | * Finds index in rate_config for highest clk rate which is less than | ||
400 | * requested rate. If there is no clk rate lesser than requested rate then | ||
401 | * -EINVAL is returned. This routine assumes that rate_config is written | ||
402 | * in incrementing order of clk rates. | ||
403 | * If drate passed is zero then default rate is programmed. | ||
404 | */ | ||
405 | static int | ||
406 | round_rate_index(struct clk *clk, unsigned long drate, unsigned long *rate) | ||
243 | { | 407 | { |
244 | unsigned int mask, i; | 408 | unsigned long tmp = 0, prev_rate = 0; |
245 | unsigned long flags; | 409 | int index; |
246 | struct pclk_info *info = NULL; | ||
247 | 410 | ||
248 | spin_lock_irqsave(&clocks_lock, flags); | 411 | if (!clk->calc_rate) |
249 | mask = (readl(clk->pclk_sel->pclk_sel_reg) >> clk->pclk_sel_shift) | 412 | return -EFAULT; |
250 | & clk->pclk_sel->pclk_sel_mask; | ||
251 | 413 | ||
252 | for (i = 0; i < clk->pclk_sel->pclk_count; i++) { | 414 | if (!drate) |
253 | if (clk->pclk_sel->pclk_info[i].pclk_mask == mask) | 415 | return -EINVAL; |
254 | info = &clk->pclk_sel->pclk_info[i]; | 416 | |
417 | /* | ||
418 | * This loops ends on two conditions: | ||
419 | * - as soon as clk is found with rate greater than requested rate. | ||
420 | * - if all clks in rate_config are smaller than requested rate. | ||
421 | */ | ||
422 | for (index = 0; index < clk->rate_config.count; index++) { | ||
423 | prev_rate = tmp; | ||
424 | tmp = clk->calc_rate(clk, index); | ||
425 | if (drate < tmp) { | ||
426 | index--; | ||
427 | break; | ||
428 | } | ||
255 | } | 429 | } |
256 | spin_unlock_irqrestore(&clocks_lock, flags); | 430 | /* return if can't find suitable clock */ |
431 | if (index < 0) { | ||
432 | index = -EINVAL; | ||
433 | *rate = 0; | ||
434 | } else if (index == clk->rate_config.count) { | ||
435 | /* program with highest clk rate possible */ | ||
436 | index = clk->rate_config.count - 1; | ||
437 | *rate = tmp; | ||
438 | } else | ||
439 | *rate = prev_rate; | ||
257 | 440 | ||
258 | return info; | 441 | return index; |
259 | } | 442 | } |
260 | 443 | ||
261 | /* | 444 | /** |
262 | * Set pclk as cclk's parent and add clock sibling node to current parents | 445 | * clk_round_rate - adjust a rate to the exact rate a clock can provide |
263 | * children list | 446 | * @clk: clock source |
447 | * @rate: desired clock rate in Hz | ||
448 | * | ||
449 | * Returns rounded clock rate in Hz, or negative errno. | ||
264 | */ | 450 | */ |
265 | static void change_parent(struct clk *cclk, struct clk *pclk) | 451 | long clk_round_rate(struct clk *clk, unsigned long drate) |
266 | { | 452 | { |
267 | unsigned long flags; | 453 | long rate = 0; |
454 | int index; | ||
455 | |||
456 | /* | ||
457 | * propagate call to parent who supports calc_rate. Similar approach is | ||
458 | * used in clk_set_rate. | ||
459 | */ | ||
460 | if (!clk->calc_rate) { | ||
461 | u32 mult; | ||
462 | if (!clk->pclk) | ||
463 | return clk->rate; | ||
464 | |||
465 | mult = clk->div_factor ? clk->div_factor : 1; | ||
466 | return clk_round_rate(clk->pclk, mult * drate) / mult; | ||
467 | } | ||
268 | 468 | ||
269 | spin_lock_irqsave(&clocks_lock, flags); | 469 | index = round_rate_index(clk, drate, &rate); |
270 | list_del(&cclk->sibling); | 470 | if (index >= 0) |
271 | list_add(&cclk->sibling, &pclk->children); | 471 | return rate; |
472 | else | ||
473 | return index; | ||
474 | } | ||
475 | EXPORT_SYMBOL(clk_round_rate); | ||
272 | 476 | ||
273 | cclk->pclk = pclk; | 477 | /*All below functions are called with lock held */ |
274 | spin_unlock_irqrestore(&clocks_lock, flags); | 478 | |
479 | /* | ||
480 | * Calculates pll clk rate for specific value of mode, m, n and p | ||
481 | * | ||
482 | * In normal mode | ||
483 | * rate = (2 * M[15:8] * Fin)/(N * 2^P) | ||
484 | * | ||
485 | * In Dithered mode | ||
486 | * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P) | ||
487 | */ | ||
488 | unsigned long pll_calc_rate(struct clk *clk, int index) | ||
489 | { | ||
490 | unsigned long rate = clk->pclk->rate; | ||
491 | struct pll_rate_tbl *tbls = clk->rate_config.tbls; | ||
492 | unsigned int mode; | ||
493 | |||
494 | mode = tbls[index].mode ? 256 : 1; | ||
495 | return (((2 * rate / 10000) * tbls[index].m) / | ||
496 | (mode * tbls[index].n * (1 << tbls[index].p))) * 10000; | ||
275 | } | 497 | } |
276 | 498 | ||
277 | /* | 499 | /* |
@@ -283,47 +505,146 @@ static void change_parent(struct clk *cclk, struct clk *pclk) | |||
283 | * In Dithered mode | 505 | * In Dithered mode |
284 | * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P) | 506 | * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P) |
285 | */ | 507 | */ |
286 | void pll1_clk_recalc(struct clk *clk) | 508 | int pll_clk_recalc(struct clk *clk) |
287 | { | 509 | { |
288 | struct pll_clk_config *config = clk->private_data; | 510 | struct pll_clk_config *config = clk->private_data; |
289 | unsigned int num = 2, den = 0, val, mode = 0; | 511 | unsigned int num = 2, den = 0, val, mode = 0; |
290 | unsigned long flags; | ||
291 | 512 | ||
292 | spin_lock_irqsave(&clocks_lock, flags); | 513 | mode = (readl(config->mode_reg) >> config->masks->mode_shift) & |
293 | mode = (readl(config->mode_reg) >> PLL_MODE_SHIFT) & | 514 | config->masks->mode_mask; |
294 | PLL_MODE_MASK; | ||
295 | 515 | ||
296 | val = readl(config->cfg_reg); | 516 | val = readl(config->cfg_reg); |
297 | /* calculate denominator */ | 517 | /* calculate denominator */ |
298 | den = (val >> PLL_DIV_P_SHIFT) & PLL_DIV_P_MASK; | 518 | den = (val >> config->masks->div_p_shift) & config->masks->div_p_mask; |
299 | den = 1 << den; | 519 | den = 1 << den; |
300 | den *= (val >> PLL_DIV_N_SHIFT) & PLL_DIV_N_MASK; | 520 | den *= (val >> config->masks->div_n_shift) & config->masks->div_n_mask; |
301 | 521 | ||
302 | /* calculate numerator & denominator */ | 522 | /* calculate numerator & denominator */ |
303 | if (!mode) { | 523 | if (!mode) { |
304 | /* Normal mode */ | 524 | /* Normal mode */ |
305 | num *= (val >> PLL_NORM_FDBK_M_SHIFT) & PLL_NORM_FDBK_M_MASK; | 525 | num *= (val >> config->masks->norm_fdbk_m_shift) & |
526 | config->masks->norm_fdbk_m_mask; | ||
306 | } else { | 527 | } else { |
307 | /* Dithered mode */ | 528 | /* Dithered mode */ |
308 | num *= (val >> PLL_DITH_FDBK_M_SHIFT) & PLL_DITH_FDBK_M_MASK; | 529 | num *= (val >> config->masks->dith_fdbk_m_shift) & |
530 | config->masks->dith_fdbk_m_mask; | ||
309 | den *= 256; | 531 | den *= 256; |
310 | } | 532 | } |
311 | 533 | ||
534 | if (!den) | ||
535 | return -EINVAL; | ||
536 | |||
312 | clk->rate = (((clk->pclk->rate/10000) * num) / den) * 10000; | 537 | clk->rate = (((clk->pclk->rate/10000) * num) / den) * 10000; |
313 | spin_unlock_irqrestore(&clocks_lock, flags); | 538 | return 0; |
539 | } | ||
540 | |||
541 | /* | ||
542 | * Configures new clock rate of pll | ||
543 | */ | ||
544 | int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate) | ||
545 | { | ||
546 | struct pll_rate_tbl *tbls = clk->rate_config.tbls; | ||
547 | struct pll_clk_config *config = clk->private_data; | ||
548 | unsigned long val, rate; | ||
549 | int i; | ||
550 | |||
551 | i = round_rate_index(clk, desired_rate, &rate); | ||
552 | if (i < 0) | ||
553 | return i; | ||
554 | |||
555 | val = readl(config->mode_reg) & | ||
556 | ~(config->masks->mode_mask << config->masks->mode_shift); | ||
557 | val |= (tbls[i].mode & config->masks->mode_mask) << | ||
558 | config->masks->mode_shift; | ||
559 | writel(val, config->mode_reg); | ||
560 | |||
561 | val = readl(config->cfg_reg) & | ||
562 | ~(config->masks->div_p_mask << config->masks->div_p_shift); | ||
563 | val |= (tbls[i].p & config->masks->div_p_mask) << | ||
564 | config->masks->div_p_shift; | ||
565 | val &= ~(config->masks->div_n_mask << config->masks->div_n_shift); | ||
566 | val |= (tbls[i].n & config->masks->div_n_mask) << | ||
567 | config->masks->div_n_shift; | ||
568 | val &= ~(config->masks->dith_fdbk_m_mask << | ||
569 | config->masks->dith_fdbk_m_shift); | ||
570 | if (tbls[i].mode) | ||
571 | val |= (tbls[i].m & config->masks->dith_fdbk_m_mask) << | ||
572 | config->masks->dith_fdbk_m_shift; | ||
573 | else | ||
574 | val |= (tbls[i].m & config->masks->norm_fdbk_m_mask) << | ||
575 | config->masks->norm_fdbk_m_shift; | ||
576 | |||
577 | writel(val, config->cfg_reg); | ||
578 | |||
579 | clk->rate = rate; | ||
580 | |||
581 | return 0; | ||
582 | } | ||
583 | |||
584 | /* | ||
585 | * Calculates ahb, apb clk rate for specific value of div | ||
586 | */ | ||
587 | unsigned long bus_calc_rate(struct clk *clk, int index) | ||
588 | { | ||
589 | unsigned long rate = clk->pclk->rate; | ||
590 | struct bus_rate_tbl *tbls = clk->rate_config.tbls; | ||
591 | |||
592 | return rate / (tbls[index].div + 1); | ||
314 | } | 593 | } |
315 | 594 | ||
316 | /* calculates current programmed rate of ahb or apb bus */ | 595 | /* calculates current programmed rate of ahb or apb bus */ |
317 | void bus_clk_recalc(struct clk *clk) | 596 | int bus_clk_recalc(struct clk *clk) |
318 | { | 597 | { |
319 | struct bus_clk_config *config = clk->private_data; | 598 | struct bus_clk_config *config = clk->private_data; |
320 | unsigned int div; | 599 | unsigned int div; |
321 | unsigned long flags; | ||
322 | 600 | ||
323 | spin_lock_irqsave(&clocks_lock, flags); | 601 | div = ((readl(config->reg) >> config->masks->shift) & |
324 | div = ((readl(config->reg) >> config->shift) & config->mask) + 1; | 602 | config->masks->mask) + 1; |
603 | |||
604 | if (!div) | ||
605 | return -EINVAL; | ||
606 | |||
325 | clk->rate = (unsigned long)clk->pclk->rate / div; | 607 | clk->rate = (unsigned long)clk->pclk->rate / div; |
326 | spin_unlock_irqrestore(&clocks_lock, flags); | 608 | return 0; |
609 | } | ||
610 | |||
611 | /* Configures new clock rate of AHB OR APB bus */ | ||
612 | int bus_clk_set_rate(struct clk *clk, unsigned long desired_rate) | ||
613 | { | ||
614 | struct bus_rate_tbl *tbls = clk->rate_config.tbls; | ||
615 | struct bus_clk_config *config = clk->private_data; | ||
616 | unsigned long val, rate; | ||
617 | int i; | ||
618 | |||
619 | i = round_rate_index(clk, desired_rate, &rate); | ||
620 | if (i < 0) | ||
621 | return i; | ||
622 | |||
623 | val = readl(config->reg) & | ||
624 | ~(config->masks->mask << config->masks->shift); | ||
625 | val |= (tbls[i].div & config->masks->mask) << config->masks->shift; | ||
626 | writel(val, config->reg); | ||
627 | |||
628 | clk->rate = rate; | ||
629 | |||
630 | return 0; | ||
631 | } | ||
632 | |||
633 | /* | ||
634 | * gives rate for different values of eq, x and y | ||
635 | * | ||
636 | * Fout from synthesizer can be given from two equations: | ||
637 | * Fout1 = (Fin * X/Y)/2 EQ1 | ||
638 | * Fout2 = Fin * X/Y EQ2 | ||
639 | */ | ||
640 | unsigned long aux_calc_rate(struct clk *clk, int index) | ||
641 | { | ||
642 | unsigned long rate = clk->pclk->rate; | ||
643 | struct aux_rate_tbl *tbls = clk->rate_config.tbls; | ||
644 | u8 eq = tbls[index].eq ? 1 : 2; | ||
645 | |||
646 | return (((rate/10000) * tbls[index].xscale) / | ||
647 | (tbls[index].yscale * eq)) * 10000; | ||
327 | } | 648 | } |
328 | 649 | ||
329 | /* | 650 | /* |
@@ -336,44 +657,76 @@ void bus_clk_recalc(struct clk *clk) | |||
336 | * | 657 | * |
337 | * Selection of eqn 1 or 2 is programmed in register | 658 | * Selection of eqn 1 or 2 is programmed in register |
338 | */ | 659 | */ |
339 | void aux_clk_recalc(struct clk *clk) | 660 | int aux_clk_recalc(struct clk *clk) |
340 | { | 661 | { |
341 | struct aux_clk_config *config = clk->private_data; | 662 | struct aux_clk_config *config = clk->private_data; |
342 | struct pclk_info *pclk_info = NULL; | ||
343 | unsigned int num = 1, den = 1, val, eqn; | 663 | unsigned int num = 1, den = 1, val, eqn; |
344 | unsigned long flags; | ||
345 | 664 | ||
346 | /* get current programmed parent */ | 665 | val = readl(config->synth_reg); |
347 | pclk_info = pclk_info_get(clk); | ||
348 | if (!pclk_info) { | ||
349 | spin_lock_irqsave(&clocks_lock, flags); | ||
350 | clk->pclk = NULL; | ||
351 | clk->rate = 0; | ||
352 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
353 | return; | ||
354 | } | ||
355 | 666 | ||
356 | change_parent(clk, pclk_info->pclk); | 667 | eqn = (val >> config->masks->eq_sel_shift) & |
668 | config->masks->eq_sel_mask; | ||
669 | if (eqn == config->masks->eq1_mask) | ||
670 | den *= 2; | ||
357 | 671 | ||
358 | spin_lock_irqsave(&clocks_lock, flags); | 672 | /* calculate numerator */ |
359 | if (pclk_info->scalable) { | 673 | num = (val >> config->masks->xscale_sel_shift) & |
360 | val = readl(config->synth_reg); | 674 | config->masks->xscale_sel_mask; |
361 | 675 | ||
362 | eqn = (val >> AUX_EQ_SEL_SHIFT) & AUX_EQ_SEL_MASK; | 676 | /* calculate denominator */ |
363 | if (eqn == AUX_EQ1_SEL) | 677 | den *= (val >> config->masks->yscale_sel_shift) & |
364 | den *= 2; | 678 | config->masks->yscale_sel_mask; |
365 | 679 | ||
366 | /* calculate numerator */ | 680 | if (!den) |
367 | num = (val >> AUX_XSCALE_SHIFT) & AUX_XSCALE_MASK; | 681 | return -EINVAL; |
368 | 682 | ||
369 | /* calculate denominator */ | 683 | clk->rate = (((clk->pclk->rate/10000) * num) / den) * 10000; |
370 | den *= (val >> AUX_YSCALE_SHIFT) & AUX_YSCALE_MASK; | 684 | return 0; |
371 | val = (((clk->pclk->rate/10000) * num) / den) * 10000; | 685 | } |
372 | } else | ||
373 | val = clk->pclk->rate; | ||
374 | 686 | ||
375 | clk->rate = val; | 687 | /* Configures new clock rate of auxiliary synthesizers used by: UART, FIRDA*/ |
376 | spin_unlock_irqrestore(&clocks_lock, flags); | 688 | int aux_clk_set_rate(struct clk *clk, unsigned long desired_rate) |
689 | { | ||
690 | struct aux_rate_tbl *tbls = clk->rate_config.tbls; | ||
691 | struct aux_clk_config *config = clk->private_data; | ||
692 | unsigned long val, rate; | ||
693 | int i; | ||
694 | |||
695 | i = round_rate_index(clk, desired_rate, &rate); | ||
696 | if (i < 0) | ||
697 | return i; | ||
698 | |||
699 | val = readl(config->synth_reg) & | ||
700 | ~(config->masks->eq_sel_mask << config->masks->eq_sel_shift); | ||
701 | val |= (tbls[i].eq & config->masks->eq_sel_mask) << | ||
702 | config->masks->eq_sel_shift; | ||
703 | val &= ~(config->masks->xscale_sel_mask << | ||
704 | config->masks->xscale_sel_shift); | ||
705 | val |= (tbls[i].xscale & config->masks->xscale_sel_mask) << | ||
706 | config->masks->xscale_sel_shift; | ||
707 | val &= ~(config->masks->yscale_sel_mask << | ||
708 | config->masks->yscale_sel_shift); | ||
709 | val |= (tbls[i].yscale & config->masks->yscale_sel_mask) << | ||
710 | config->masks->yscale_sel_shift; | ||
711 | writel(val, config->synth_reg); | ||
712 | |||
713 | clk->rate = rate; | ||
714 | |||
715 | return 0; | ||
716 | } | ||
717 | |||
718 | /* | ||
719 | * Calculates gpt clk rate for different values of mscale and nscale | ||
720 | * | ||
721 | * Fout= Fin/((2 ^ (N+1)) * (M+1)) | ||
722 | */ | ||
723 | unsigned long gpt_calc_rate(struct clk *clk, int index) | ||
724 | { | ||
725 | unsigned long rate = clk->pclk->rate; | ||
726 | struct gpt_rate_tbl *tbls = clk->rate_config.tbls; | ||
727 | |||
728 | return rate / ((1 << (tbls[index].nscale + 1)) * | ||
729 | (tbls[index].mscale + 1)); | ||
377 | } | 730 | } |
378 | 731 | ||
379 | /* | 732 | /* |
@@ -381,46 +734,142 @@ void aux_clk_recalc(struct clk *clk) | |||
381 | * Fout from synthesizer can be given from below equations: | 734 | * Fout from synthesizer can be given from below equations: |
382 | * Fout= Fin/((2 ^ (N+1)) * (M+1)) | 735 | * Fout= Fin/((2 ^ (N+1)) * (M+1)) |
383 | */ | 736 | */ |
384 | void gpt_clk_recalc(struct clk *clk) | 737 | int gpt_clk_recalc(struct clk *clk) |
385 | { | 738 | { |
386 | struct aux_clk_config *config = clk->private_data; | 739 | struct gpt_clk_config *config = clk->private_data; |
387 | struct pclk_info *pclk_info = NULL; | ||
388 | unsigned int div = 1, val; | 740 | unsigned int div = 1, val; |
389 | unsigned long flags; | ||
390 | 741 | ||
391 | pclk_info = pclk_info_get(clk); | 742 | val = readl(config->synth_reg); |
392 | if (!pclk_info) { | 743 | div += (val >> config->masks->mscale_sel_shift) & |
393 | spin_lock_irqsave(&clocks_lock, flags); | 744 | config->masks->mscale_sel_mask; |
394 | clk->pclk = NULL; | 745 | div *= 1 << (((val >> config->masks->nscale_sel_shift) & |
395 | clk->rate = 0; | 746 | config->masks->nscale_sel_mask) + 1); |
396 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
397 | return; | ||
398 | } | ||
399 | |||
400 | change_parent(clk, pclk_info->pclk); | ||
401 | 747 | ||
402 | spin_lock_irqsave(&clocks_lock, flags); | 748 | if (!div) |
403 | if (pclk_info->scalable) { | 749 | return -EINVAL; |
404 | val = readl(config->synth_reg); | ||
405 | div += (val >> GPT_MSCALE_SHIFT) & GPT_MSCALE_MASK; | ||
406 | div *= 1 << (((val >> GPT_NSCALE_SHIFT) & GPT_NSCALE_MASK) + 1); | ||
407 | } | ||
408 | 750 | ||
409 | clk->rate = (unsigned long)clk->pclk->rate / div; | 751 | clk->rate = (unsigned long)clk->pclk->rate / div; |
410 | spin_unlock_irqrestore(&clocks_lock, flags); | 752 | return 0; |
753 | } | ||
754 | |||
755 | /* Configures new clock rate of gptiliary synthesizers used by: UART, FIRDA*/ | ||
756 | int gpt_clk_set_rate(struct clk *clk, unsigned long desired_rate) | ||
757 | { | ||
758 | struct gpt_rate_tbl *tbls = clk->rate_config.tbls; | ||
759 | struct gpt_clk_config *config = clk->private_data; | ||
760 | unsigned long val, rate; | ||
761 | int i; | ||
762 | |||
763 | i = round_rate_index(clk, desired_rate, &rate); | ||
764 | if (i < 0) | ||
765 | return i; | ||
766 | |||
767 | val = readl(config->synth_reg) & ~(config->masks->mscale_sel_mask << | ||
768 | config->masks->mscale_sel_shift); | ||
769 | val |= (tbls[i].mscale & config->masks->mscale_sel_mask) << | ||
770 | config->masks->mscale_sel_shift; | ||
771 | val &= ~(config->masks->nscale_sel_mask << | ||
772 | config->masks->nscale_sel_shift); | ||
773 | val |= (tbls[i].nscale & config->masks->nscale_sel_mask) << | ||
774 | config->masks->nscale_sel_shift; | ||
775 | writel(val, config->synth_reg); | ||
776 | |||
777 | clk->rate = rate; | ||
778 | |||
779 | return 0; | ||
411 | } | 780 | } |
412 | 781 | ||
413 | /* | 782 | /* |
414 | * Used for clocks that always have same value as the parent clock divided by a | 783 | * Calculates clcd clk rate for different values of div |
784 | * | ||
785 | * Fout from synthesizer can be given from below equation: | ||
786 | * Fout= Fin/2*div (division factor) | ||
787 | * div is 17 bits:- | ||
788 | * 0-13 (fractional part) | ||
789 | * 14-16 (integer part) | ||
790 | * To calculate Fout we left shift val by 14 bits and divide Fin by | ||
791 | * complete div (including fractional part) and then right shift the | ||
792 | * result by 14 places. | ||
793 | */ | ||
794 | unsigned long clcd_calc_rate(struct clk *clk, int index) | ||
795 | { | ||
796 | unsigned long rate = clk->pclk->rate; | ||
797 | struct clcd_rate_tbl *tbls = clk->rate_config.tbls; | ||
798 | |||
799 | rate /= 1000; | ||
800 | rate <<= 12; | ||
801 | rate /= (2 * tbls[index].div); | ||
802 | rate >>= 12; | ||
803 | rate *= 1000; | ||
804 | |||
805 | return rate; | ||
806 | } | ||
807 | |||
808 | /* | ||
809 | * calculates current programmed rate of clcd synthesizer | ||
810 | * Fout from synthesizer can be given from below equation: | ||
811 | * Fout= Fin/2*div (division factor) | ||
812 | * div is 17 bits:- | ||
813 | * 0-13 (fractional part) | ||
814 | * 14-16 (integer part) | ||
815 | * To calculate Fout we left shift val by 14 bits and divide Fin by | ||
816 | * complete div (including fractional part) and then right shift the | ||
817 | * result by 14 places. | ||
818 | */ | ||
819 | int clcd_clk_recalc(struct clk *clk) | ||
820 | { | ||
821 | struct clcd_clk_config *config = clk->private_data; | ||
822 | unsigned int div = 1; | ||
823 | unsigned long prate; | ||
824 | unsigned int val; | ||
825 | |||
826 | val = readl(config->synth_reg); | ||
827 | div = (val >> config->masks->div_factor_shift) & | ||
828 | config->masks->div_factor_mask; | ||
829 | |||
830 | if (!div) | ||
831 | return -EINVAL; | ||
832 | |||
833 | prate = clk->pclk->rate / 1000; /* first level division, make it KHz */ | ||
834 | |||
835 | clk->rate = (((unsigned long)prate << 12) / (2 * div)) >> 12; | ||
836 | clk->rate *= 1000; | ||
837 | return 0; | ||
838 | } | ||
839 | |||
840 | /* Configures new clock rate of auxiliary synthesizers used by: UART, FIRDA*/ | ||
841 | int clcd_clk_set_rate(struct clk *clk, unsigned long desired_rate) | ||
842 | { | ||
843 | struct clcd_rate_tbl *tbls = clk->rate_config.tbls; | ||
844 | struct clcd_clk_config *config = clk->private_data; | ||
845 | unsigned long val, rate; | ||
846 | int i; | ||
847 | |||
848 | i = round_rate_index(clk, desired_rate, &rate); | ||
849 | if (i < 0) | ||
850 | return i; | ||
851 | |||
852 | val = readl(config->synth_reg) & ~(config->masks->div_factor_mask << | ||
853 | config->masks->div_factor_shift); | ||
854 | val |= (tbls[i].div & config->masks->div_factor_mask) << | ||
855 | config->masks->div_factor_shift; | ||
856 | writel(val, config->synth_reg); | ||
857 | |||
858 | clk->rate = rate; | ||
859 | |||
860 | return 0; | ||
861 | } | ||
862 | |||
863 | /* | ||
864 | * Used for clocks that always have value as the parent clock divided by a | ||
415 | * fixed divisor | 865 | * fixed divisor |
416 | */ | 866 | */ |
417 | void follow_parent(struct clk *clk) | 867 | int follow_parent(struct clk *clk) |
418 | { | 868 | { |
419 | unsigned long flags; | 869 | unsigned int div_factor = (clk->div_factor < 1) ? 1 : clk->div_factor; |
420 | 870 | ||
421 | spin_lock_irqsave(&clocks_lock, flags); | 871 | clk->rate = clk->pclk->rate/div_factor; |
422 | clk->rate = clk->pclk->rate; | 872 | return 0; |
423 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
424 | } | 873 | } |
425 | 874 | ||
426 | /** | 875 | /** |
@@ -431,5 +880,124 @@ void follow_parent(struct clk *clk) | |||
431 | */ | 880 | */ |
432 | void recalc_root_clocks(void) | 881 | void recalc_root_clocks(void) |
433 | { | 882 | { |
434 | propagate_rate(&root_clks); | 883 | struct clk *pclk; |
884 | unsigned long flags; | ||
885 | int ret = 0; | ||
886 | |||
887 | spin_lock_irqsave(&clocks_lock, flags); | ||
888 | list_for_each_entry(pclk, &root_clks, sibling) { | ||
889 | if (pclk->recalc) { | ||
890 | ret = pclk->recalc(pclk); | ||
891 | /* | ||
892 | * recalc will return error if clk out is not programmed | ||
893 | * In this case configure default clock. | ||
894 | */ | ||
895 | if (ret && pclk->set_rate) | ||
896 | pclk->set_rate(pclk, 0); | ||
897 | } | ||
898 | propagate_rate(pclk, 1); | ||
899 | /* Enable clks enabled on init, in software view */ | ||
900 | if (pclk->flags & ENABLED_ON_INIT) | ||
901 | do_clk_enable(pclk); | ||
902 | } | ||
903 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
904 | } | ||
905 | |||
906 | #ifdef CONFIG_DEBUG_FS | ||
907 | /* | ||
908 | * debugfs support to trace clock tree hierarchy and attributes | ||
909 | */ | ||
910 | static struct dentry *clk_debugfs_root; | ||
911 | static int clk_debugfs_register_one(struct clk *c) | ||
912 | { | ||
913 | int err; | ||
914 | struct dentry *d, *child; | ||
915 | struct clk *pa = c->pclk; | ||
916 | char s[255]; | ||
917 | char *p = s; | ||
918 | |||
919 | if (c) { | ||
920 | if (c->cl->con_id) | ||
921 | p += sprintf(p, "%s", c->cl->con_id); | ||
922 | if (c->cl->dev_id) | ||
923 | p += sprintf(p, "%s", c->cl->dev_id); | ||
924 | } | ||
925 | d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); | ||
926 | if (!d) | ||
927 | return -ENOMEM; | ||
928 | c->dent = d; | ||
929 | |||
930 | d = debugfs_create_u32("usage_count", S_IRUGO, c->dent, | ||
931 | (u32 *)&c->usage_count); | ||
932 | if (!d) { | ||
933 | err = -ENOMEM; | ||
934 | goto err_out; | ||
935 | } | ||
936 | d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); | ||
937 | if (!d) { | ||
938 | err = -ENOMEM; | ||
939 | goto err_out; | ||
940 | } | ||
941 | d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); | ||
942 | if (!d) { | ||
943 | err = -ENOMEM; | ||
944 | goto err_out; | ||
945 | } | ||
946 | return 0; | ||
947 | |||
948 | err_out: | ||
949 | d = c->dent; | ||
950 | list_for_each_entry(child, &d->d_subdirs, d_u.d_child) | ||
951 | debugfs_remove(child); | ||
952 | debugfs_remove(c->dent); | ||
953 | return err; | ||
954 | } | ||
955 | |||
956 | static int clk_debugfs_register(struct clk *c) | ||
957 | { | ||
958 | int err; | ||
959 | struct clk *pa = c->pclk; | ||
960 | |||
961 | if (pa && !pa->dent) { | ||
962 | err = clk_debugfs_register(pa); | ||
963 | if (err) | ||
964 | return err; | ||
965 | } | ||
966 | |||
967 | if (!c->dent) { | ||
968 | err = clk_debugfs_register_one(c); | ||
969 | if (err) | ||
970 | return err; | ||
971 | } | ||
972 | return 0; | ||
973 | } | ||
974 | |||
975 | static int __init clk_debugfs_init(void) | ||
976 | { | ||
977 | struct clk *c; | ||
978 | struct dentry *d; | ||
979 | int err; | ||
980 | |||
981 | d = debugfs_create_dir("clock", NULL); | ||
982 | if (!d) | ||
983 | return -ENOMEM; | ||
984 | clk_debugfs_root = d; | ||
985 | |||
986 | list_for_each_entry(c, &clocks, node) { | ||
987 | err = clk_debugfs_register(c); | ||
988 | if (err) | ||
989 | goto err_out; | ||
990 | } | ||
991 | return 0; | ||
992 | err_out: | ||
993 | debugfs_remove_recursive(clk_debugfs_root); | ||
994 | return err; | ||
995 | } | ||
996 | late_initcall(clk_debugfs_init); | ||
997 | |||
998 | static int clk_debugfs_reparent(struct clk *c) | ||
999 | { | ||
1000 | debugfs_remove(c->dent); | ||
1001 | return clk_debugfs_register_one(c); | ||
435 | } | 1002 | } |
1003 | #endif /* CONFIG_DEBUG_FS */ | ||
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h index 2572260f990f..2ae6606930a6 100644 --- a/arch/arm/plat-spear/include/plat/clock.h +++ b/arch/arm/plat-spear/include/plat/clock.h | |||
@@ -21,6 +21,7 @@ | |||
21 | /* clk structure flags */ | 21 | /* clk structure flags */ |
22 | #define ALWAYS_ENABLED (1 << 0) /* clock always enabled */ | 22 | #define ALWAYS_ENABLED (1 << 0) /* clock always enabled */ |
23 | #define RESET_TO_ENABLE (1 << 1) /* reset register bit to enable clk */ | 23 | #define RESET_TO_ENABLE (1 << 1) /* reset register bit to enable clk */ |
24 | #define ENABLED_ON_INIT (1 << 2) /* clocks enabled at init */ | ||
24 | 25 | ||
25 | /** | 26 | /** |
26 | * struct clkops - clock operations | 27 | * struct clkops - clock operations |
@@ -35,13 +36,11 @@ struct clkops { | |||
35 | /** | 36 | /** |
36 | * struct pclk_info - parents info | 37 | * struct pclk_info - parents info |
37 | * @pclk: pointer to parent clk | 38 | * @pclk: pointer to parent clk |
38 | * @pclk_mask: value to be written for selecting this parent | 39 | * @pclk_val: value to be written for selecting this parent |
39 | * @scalable: Is parent scalable (1 - YES, 0 - NO) | ||
40 | */ | 40 | */ |
41 | struct pclk_info { | 41 | struct pclk_info { |
42 | struct clk *pclk; | 42 | struct clk *pclk; |
43 | u8 pclk_mask; | 43 | u8 pclk_val; |
44 | u8 scalable; | ||
45 | }; | 44 | }; |
46 | 45 | ||
47 | /** | 46 | /** |
@@ -54,11 +53,23 @@ struct pclk_info { | |||
54 | struct pclk_sel { | 53 | struct pclk_sel { |
55 | struct pclk_info *pclk_info; | 54 | struct pclk_info *pclk_info; |
56 | u8 pclk_count; | 55 | u8 pclk_count; |
57 | unsigned int *pclk_sel_reg; | 56 | void __iomem *pclk_sel_reg; |
58 | unsigned int pclk_sel_mask; | 57 | unsigned int pclk_sel_mask; |
59 | }; | 58 | }; |
60 | 59 | ||
61 | /** | 60 | /** |
61 | * struct rate_config - clk rate configurations | ||
62 | * @tbls: array of device specific clk rate tables, in ascending order of rates | ||
63 | * @count: size of tbls array | ||
64 | * @default_index: default setting when originally disabled | ||
65 | */ | ||
66 | struct rate_config { | ||
67 | void *tbls; | ||
68 | u8 count; | ||
69 | u8 default_index; | ||
70 | }; | ||
71 | |||
72 | /** | ||
62 | * struct clk - clock structure | 73 | * struct clk - clock structure |
63 | * @usage_count: num of users who enabled this clock | 74 | * @usage_count: num of users who enabled this clock |
64 | * @flags: flags for clock properties | 75 | * @flags: flags for clock properties |
@@ -67,21 +78,32 @@ struct pclk_sel { | |||
67 | * @en_reg_bit: clk enable/disable bit | 78 | * @en_reg_bit: clk enable/disable bit |
68 | * @ops: clk enable/disable ops - generic_clkops selected if NULL | 79 | * @ops: clk enable/disable ops - generic_clkops selected if NULL |
69 | * @recalc: pointer to clock rate recalculate function | 80 | * @recalc: pointer to clock rate recalculate function |
81 | * @set_rate: pointer to clock set rate function | ||
82 | * @calc_rate: pointer to clock get rate function for index | ||
83 | * @rate_config: rate configuration information, used by set_rate | ||
84 | * @div_factor: division factor to parent clock. | ||
70 | * @pclk: current parent clk | 85 | * @pclk: current parent clk |
71 | * @pclk_sel: pointer to parent selection structure | 86 | * @pclk_sel: pointer to parent selection structure |
72 | * @pclk_sel_shift: register shift for selecting parent of this clock | 87 | * @pclk_sel_shift: register shift for selecting parent of this clock |
73 | * @children: list for childrens or this clock | 88 | * @children: list for childrens or this clock |
74 | * @sibling: node for list of clocks having same parents | 89 | * @sibling: node for list of clocks having same parents |
75 | * @private_data: clock specific private data | 90 | * @private_data: clock specific private data |
91 | * @node: list to maintain clocks linearly | ||
92 | * @cl: clocklook up assoicated with this clock | ||
93 | * @dent: object for debugfs | ||
76 | */ | 94 | */ |
77 | struct clk { | 95 | struct clk { |
78 | unsigned int usage_count; | 96 | unsigned int usage_count; |
79 | unsigned int flags; | 97 | unsigned int flags; |
80 | unsigned long rate; | 98 | unsigned long rate; |
81 | unsigned int *en_reg; | 99 | void __iomem *en_reg; |
82 | u8 en_reg_bit; | 100 | u8 en_reg_bit; |
83 | const struct clkops *ops; | 101 | const struct clkops *ops; |
84 | void (*recalc) (struct clk *); | 102 | int (*recalc) (struct clk *); |
103 | int (*set_rate) (struct clk *, unsigned long rate); | ||
104 | unsigned long (*calc_rate)(struct clk *, int index); | ||
105 | struct rate_config rate_config; | ||
106 | unsigned int div_factor; | ||
85 | 107 | ||
86 | struct clk *pclk; | 108 | struct clk *pclk; |
87 | struct pclk_sel *pclk_sel; | 109 | struct pclk_sel *pclk_sel; |
@@ -90,37 +112,137 @@ struct clk { | |||
90 | struct list_head children; | 112 | struct list_head children; |
91 | struct list_head sibling; | 113 | struct list_head sibling; |
92 | void *private_data; | 114 | void *private_data; |
115 | #ifdef CONFIG_DEBUG_FS | ||
116 | struct list_head node; | ||
117 | struct clk_lookup *cl; | ||
118 | struct dentry *dent; | ||
119 | #endif | ||
93 | }; | 120 | }; |
94 | 121 | ||
95 | /* pll configuration structure */ | 122 | /* pll configuration structure */ |
123 | struct pll_clk_masks { | ||
124 | u32 mode_mask; | ||
125 | u32 mode_shift; | ||
126 | |||
127 | u32 norm_fdbk_m_mask; | ||
128 | u32 norm_fdbk_m_shift; | ||
129 | u32 dith_fdbk_m_mask; | ||
130 | u32 dith_fdbk_m_shift; | ||
131 | u32 div_p_mask; | ||
132 | u32 div_p_shift; | ||
133 | u32 div_n_mask; | ||
134 | u32 div_n_shift; | ||
135 | }; | ||
136 | |||
96 | struct pll_clk_config { | 137 | struct pll_clk_config { |
97 | unsigned int *mode_reg; | 138 | void __iomem *mode_reg; |
98 | unsigned int *cfg_reg; | 139 | void __iomem *cfg_reg; |
140 | struct pll_clk_masks *masks; | ||
141 | }; | ||
142 | |||
143 | /* pll clk rate config structure */ | ||
144 | struct pll_rate_tbl { | ||
145 | u8 mode; | ||
146 | u16 m; | ||
147 | u8 n; | ||
148 | u8 p; | ||
99 | }; | 149 | }; |
100 | 150 | ||
101 | /* ahb and apb bus configuration structure */ | 151 | /* ahb and apb bus configuration structure */ |
152 | struct bus_clk_masks { | ||
153 | u32 mask; | ||
154 | u32 shift; | ||
155 | }; | ||
156 | |||
102 | struct bus_clk_config { | 157 | struct bus_clk_config { |
103 | unsigned int *reg; | 158 | void __iomem *reg; |
104 | unsigned int mask; | 159 | struct bus_clk_masks *masks; |
105 | unsigned int shift; | 160 | }; |
161 | |||
162 | /* ahb and apb clk bus rate config structure */ | ||
163 | struct bus_rate_tbl { | ||
164 | u8 div; | ||
165 | }; | ||
166 | |||
167 | /* Aux clk configuration structure: applicable to UART and FIRDA */ | ||
168 | struct aux_clk_masks { | ||
169 | u32 eq_sel_mask; | ||
170 | u32 eq_sel_shift; | ||
171 | u32 eq1_mask; | ||
172 | u32 eq2_mask; | ||
173 | u32 xscale_sel_mask; | ||
174 | u32 xscale_sel_shift; | ||
175 | u32 yscale_sel_mask; | ||
176 | u32 yscale_sel_shift; | ||
106 | }; | 177 | }; |
107 | 178 | ||
108 | /* | ||
109 | * Aux clk configuration structure: applicable to GPT, UART and FIRDA | ||
110 | */ | ||
111 | struct aux_clk_config { | 179 | struct aux_clk_config { |
112 | unsigned int *synth_reg; | 180 | void __iomem *synth_reg; |
181 | struct aux_clk_masks *masks; | ||
182 | }; | ||
183 | |||
184 | /* aux clk rate config structure */ | ||
185 | struct aux_rate_tbl { | ||
186 | u16 xscale; | ||
187 | u16 yscale; | ||
188 | u8 eq; | ||
189 | }; | ||
190 | |||
191 | /* GPT clk configuration structure */ | ||
192 | struct gpt_clk_masks { | ||
193 | u32 mscale_sel_mask; | ||
194 | u32 mscale_sel_shift; | ||
195 | u32 nscale_sel_mask; | ||
196 | u32 nscale_sel_shift; | ||
197 | }; | ||
198 | |||
199 | struct gpt_clk_config { | ||
200 | void __iomem *synth_reg; | ||
201 | struct gpt_clk_masks *masks; | ||
202 | }; | ||
203 | |||
204 | /* gpt clk rate config structure */ | ||
205 | struct gpt_rate_tbl { | ||
206 | u16 mscale; | ||
207 | u16 nscale; | ||
208 | }; | ||
209 | |||
210 | /* clcd clk configuration structure */ | ||
211 | struct clcd_synth_masks { | ||
212 | u32 div_factor_mask; | ||
213 | u32 div_factor_shift; | ||
214 | }; | ||
215 | |||
216 | struct clcd_clk_config { | ||
217 | void __iomem *synth_reg; | ||
218 | struct clcd_synth_masks *masks; | ||
219 | }; | ||
220 | |||
221 | /* clcd clk rate config structure */ | ||
222 | struct clcd_rate_tbl { | ||
223 | u16 div; | ||
113 | }; | 224 | }; |
114 | 225 | ||
115 | /* platform specific clock functions */ | 226 | /* platform specific clock functions */ |
116 | void clk_register(struct clk_lookup *cl); | 227 | void clk_register(struct clk_lookup *cl); |
117 | void recalc_root_clocks(void); | 228 | void recalc_root_clocks(void); |
118 | 229 | ||
119 | /* clock recalc functions */ | 230 | /* clock recalc & set rate functions */ |
120 | void follow_parent(struct clk *clk); | 231 | int follow_parent(struct clk *clk); |
121 | void pll1_clk_recalc(struct clk *clk); | 232 | unsigned long pll_calc_rate(struct clk *clk, int index); |
122 | void bus_clk_recalc(struct clk *clk); | 233 | int pll_clk_recalc(struct clk *clk); |
123 | void gpt_clk_recalc(struct clk *clk); | 234 | int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate); |
124 | void aux_clk_recalc(struct clk *clk); | 235 | unsigned long bus_calc_rate(struct clk *clk, int index); |
236 | int bus_clk_recalc(struct clk *clk); | ||
237 | int bus_clk_set_rate(struct clk *clk, unsigned long desired_rate); | ||
238 | unsigned long gpt_calc_rate(struct clk *clk, int index); | ||
239 | int gpt_clk_recalc(struct clk *clk); | ||
240 | int gpt_clk_set_rate(struct clk *clk, unsigned long desired_rate); | ||
241 | unsigned long aux_calc_rate(struct clk *clk, int index); | ||
242 | int aux_clk_recalc(struct clk *clk); | ||
243 | int aux_clk_set_rate(struct clk *clk, unsigned long desired_rate); | ||
244 | unsigned long clcd_calc_rate(struct clk *clk, int index); | ||
245 | int clcd_clk_recalc(struct clk *clk); | ||
246 | int clcd_clk_set_rate(struct clk *clk, unsigned long desired_rate); | ||
125 | 247 | ||
126 | #endif /* __PLAT_CLOCK_H */ | 248 | #endif /* __PLAT_CLOCK_H */ |
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index e91270e4f640..8501bbf2c092 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S | |||
@@ -12,7 +12,7 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/amba/serial.h> | 14 | #include <linux/amba/serial.h> |
15 | #include <mach/spear.h> | 15 | #include <mach/hardware.h> |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv |
18 | mov \rp, #SPEAR_DBG_UART_BASE @ Physical base | 18 | mov \rp, #SPEAR_DBG_UART_BASE @ Physical base |
diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h new file mode 100644 index 000000000000..66d677225d15 --- /dev/null +++ b/arch/arm/plat-spear/include/plat/hardware.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/include/plat/hardware.h | ||
3 | * | ||
4 | * Hardware definitions for SPEAr | ||
5 | * | ||
6 | * Copyright (C) 2010 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __PLAT_HARDWARE_H | ||
15 | #define __PLAT_HARDWARE_H | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | #define IOMEM(x) ((void __iomem __force *)(x)) | ||
19 | #else | ||
20 | #define IOMEM(x) (x) | ||
21 | #endif | ||
22 | |||
23 | #endif /* __PLAT_HARDWARE_H */ | ||
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h index 55a4e405d578..a235fa0ca777 100644 --- a/arch/arm/plat-spear/include/plat/system.h +++ b/arch/arm/plat-spear/include/plat/system.h | |||
@@ -14,9 +14,9 @@ | |||
14 | #ifndef __PLAT_SYSTEM_H | 14 | #ifndef __PLAT_SYSTEM_H |
15 | #define __PLAT_SYSTEM_H | 15 | #define __PLAT_SYSTEM_H |
16 | 16 | ||
17 | #include <asm/hardware/sp810.h> | ||
18 | #include <linux/io.h> | 17 | #include <linux/io.h> |
19 | #include <mach/spear.h> | 18 | #include <asm/hardware/sp810.h> |
19 | #include <mach/hardware.h> | ||
20 | 20 | ||
21 | static inline void arch_idle(void) | 21 | static inline void arch_idle(void) |
22 | { | 22 | { |
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h index 99ba6789cc97..1bf84527aee4 100644 --- a/arch/arm/plat-spear/include/plat/uncompress.h +++ b/arch/arm/plat-spear/include/plat/uncompress.h | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/amba/serial.h> | 15 | #include <linux/amba/serial.h> |
16 | #include <mach/spear.h> | 16 | #include <mach/hardware.h> |
17 | 17 | ||
18 | #ifndef __PLAT_UNCOMPRESS_H | 18 | #ifndef __PLAT_UNCOMPRESS_H |
19 | #define __PLAT_UNCOMPRESS_H | 19 | #define __PLAT_UNCOMPRESS_H |
@@ -24,10 +24,10 @@ static inline void putc(int c) | |||
24 | { | 24 | { |
25 | void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; | 25 | void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; |
26 | 26 | ||
27 | while (readl(base + UART01x_FR) & UART01x_FR_TXFF) | 27 | while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF) |
28 | barrier(); | 28 | barrier(); |
29 | 29 | ||
30 | writel(c, base + UART01x_DR); | 30 | writel_relaxed(c, base + UART01x_DR); |
31 | } | 31 | } |
32 | 32 | ||
33 | static inline void flush(void) | 33 | static inline void flush(void) |
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h index 09e9372aea21..8c8b24d07046 100644 --- a/arch/arm/plat-spear/include/plat/vmalloc.h +++ b/arch/arm/plat-spear/include/plat/vmalloc.h | |||
@@ -14,6 +14,6 @@ | |||
14 | #ifndef __PLAT_VMALLOC_H | 14 | #ifndef __PLAT_VMALLOC_H |
15 | #define __PLAT_VMALLOC_H | 15 | #define __PLAT_VMALLOC_H |
16 | 16 | ||
17 | #define VMALLOC_END 0xF0000000 | 17 | #define VMALLOC_END 0xF0000000UL |
18 | 18 | ||
19 | #endif /* __PLAT_VMALLOC_H */ | 19 | #endif /* __PLAT_VMALLOC_H */ |
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index 839c88df9994..dbb6e4fff79d 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-spear/time.c | 2 | * arch/arm/plat-spear/time.c |
3 | * | 3 | * |
4 | * Copyright (C) 2009 ST Microelectronics | 4 | * Copyright (C) 2010 ST Microelectronics |
5 | * Shiraz Hashim<shiraz.hashim@st.com> | 5 | * Shiraz Hashim<shiraz.hashim@st.com> |
6 | * | 6 | * |
7 | * This file is licensed under the terms of the GNU General Public | 7 | * This file is licensed under the terms of the GNU General Public |
@@ -20,10 +20,9 @@ | |||
20 | #include <linux/time.h> | 20 | #include <linux/time.h> |
21 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
22 | #include <asm/mach/time.h> | 22 | #include <asm/mach/time.h> |
23 | #include <mach/irqs.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/spear.h> | ||
26 | #include <mach/generic.h> | 23 | #include <mach/generic.h> |
24 | #include <mach/hardware.h> | ||
25 | #include <mach/irqs.h> | ||
27 | 26 | ||
28 | /* | 27 | /* |
29 | * We would use TIMER0 and TIMER1 as clockevent and clocksource. | 28 | * We would use TIMER0 and TIMER1 as clockevent and clocksource. |
@@ -211,7 +210,7 @@ static void __init spear_clockevent_init(void) | |||
211 | 210 | ||
212 | void __init spear_setup_timer(void) | 211 | void __init spear_setup_timer(void) |
213 | { | 212 | { |
214 | struct clk *pll3_clk; | 213 | int ret; |
215 | 214 | ||
216 | if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) { | 215 | if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) { |
217 | pr_err("%s:cannot get IO addr\n", __func__); | 216 | pr_err("%s:cannot get IO addr\n", __func__); |
@@ -230,26 +229,21 @@ void __init spear_setup_timer(void) | |||
230 | goto err_iomap; | 229 | goto err_iomap; |
231 | } | 230 | } |
232 | 231 | ||
233 | pll3_clk = clk_get(NULL, "pll3_48m_clk"); | 232 | ret = clk_enable(gpt_clk); |
234 | if (!pll3_clk) { | 233 | if (ret < 0) { |
235 | pr_err("%s:couldn't get PLL3 as parent for gpt\n", __func__); | 234 | pr_err("%s:couldn't enable gpt clock\n", __func__); |
236 | goto err_iomap; | 235 | goto err_clk; |
237 | } | 236 | } |
238 | 237 | ||
239 | clk_set_parent(gpt_clk, pll3_clk); | ||
240 | |||
241 | spear_clockevent_init(); | 238 | spear_clockevent_init(); |
242 | spear_clocksource_init(); | 239 | spear_clocksource_init(); |
243 | 240 | ||
244 | return; | 241 | return; |
245 | 242 | ||
243 | err_clk: | ||
244 | clk_put(gpt_clk); | ||
246 | err_iomap: | 245 | err_iomap: |
247 | iounmap(gpt_base); | 246 | iounmap(gpt_base); |
248 | |||
249 | err_mem: | 247 | err_mem: |
250 | release_mem_region(SPEAR_GPT0_BASE, SZ_1K); | 248 | release_mem_region(SPEAR_GPT0_BASE, SZ_1K); |
251 | } | 249 | } |
252 | |||
253 | struct sys_timer spear_sys_timer = { | ||
254 | .init = spear_setup_timer, | ||
255 | }; | ||
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S index 250f4d4b9436..06a5e674401f 100644 --- a/arch/blackfin/lib/outs.S +++ b/arch/blackfin/lib/outs.S | |||
@@ -13,6 +13,8 @@ | |||
13 | .align 2 | 13 | .align 2 |
14 | 14 | ||
15 | ENTRY(_outsl) | 15 | ENTRY(_outsl) |
16 | CC = R2 == 0; | ||
17 | IF CC JUMP 1f; | ||
16 | P0 = R0; /* P0 = port */ | 18 | P0 = R0; /* P0 = port */ |
17 | P1 = R1; /* P1 = address */ | 19 | P1 = R1; /* P1 = address */ |
18 | P2 = R2; /* P2 = count */ | 20 | P2 = R2; /* P2 = count */ |
@@ -20,10 +22,12 @@ ENTRY(_outsl) | |||
20 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; | 22 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; |
21 | .Llong_loop_s: R0 = [P1++]; | 23 | .Llong_loop_s: R0 = [P1++]; |
22 | .Llong_loop_e: [P0] = R0; | 24 | .Llong_loop_e: [P0] = R0; |
23 | RTS; | 25 | 1: RTS; |
24 | ENDPROC(_outsl) | 26 | ENDPROC(_outsl) |
25 | 27 | ||
26 | ENTRY(_outsw) | 28 | ENTRY(_outsw) |
29 | CC = R2 == 0; | ||
30 | IF CC JUMP 1f; | ||
27 | P0 = R0; /* P0 = port */ | 31 | P0 = R0; /* P0 = port */ |
28 | P1 = R1; /* P1 = address */ | 32 | P1 = R1; /* P1 = address */ |
29 | P2 = R2; /* P2 = count */ | 33 | P2 = R2; /* P2 = count */ |
@@ -31,10 +35,12 @@ ENTRY(_outsw) | |||
31 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; | 35 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; |
32 | .Lword_loop_s: R0 = W[P1++]; | 36 | .Lword_loop_s: R0 = W[P1++]; |
33 | .Lword_loop_e: W[P0] = R0; | 37 | .Lword_loop_e: W[P0] = R0; |
34 | RTS; | 38 | 1: RTS; |
35 | ENDPROC(_outsw) | 39 | ENDPROC(_outsw) |
36 | 40 | ||
37 | ENTRY(_outsb) | 41 | ENTRY(_outsb) |
42 | CC = R2 == 0; | ||
43 | IF CC JUMP 1f; | ||
38 | P0 = R0; /* P0 = port */ | 44 | P0 = R0; /* P0 = port */ |
39 | P1 = R1; /* P1 = address */ | 45 | P1 = R1; /* P1 = address */ |
40 | P2 = R2; /* P2 = count */ | 46 | P2 = R2; /* P2 = count */ |
@@ -42,10 +48,12 @@ ENTRY(_outsb) | |||
42 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; | 48 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; |
43 | .Lbyte_loop_s: R0 = B[P1++]; | 49 | .Lbyte_loop_s: R0 = B[P1++]; |
44 | .Lbyte_loop_e: B[P0] = R0; | 50 | .Lbyte_loop_e: B[P0] = R0; |
45 | RTS; | 51 | 1: RTS; |
46 | ENDPROC(_outsb) | 52 | ENDPROC(_outsb) |
47 | 53 | ||
48 | ENTRY(_outsw_8) | 54 | ENTRY(_outsw_8) |
55 | CC = R2 == 0; | ||
56 | IF CC JUMP 1f; | ||
49 | P0 = R0; /* P0 = port */ | 57 | P0 = R0; /* P0 = port */ |
50 | P1 = R1; /* P1 = address */ | 58 | P1 = R1; /* P1 = address */ |
51 | P2 = R2; /* P2 = count */ | 59 | P2 = R2; /* P2 = count */ |
@@ -56,5 +64,5 @@ ENTRY(_outsw_8) | |||
56 | R0 = R0 << 8; | 64 | R0 = R0 << 8; |
57 | R0 = R0 + R1; | 65 | R0 = R0 + R1; |
58 | .Lword8_loop_e: W[P0] = R0; | 66 | .Lword8_loop_e: W[P0] = R0; |
59 | RTS; | 67 | 1: RTS; |
60 | ENDPROC(_outsw_8) | 68 | ENDPROC(_outsw_8) |
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 790c767ca95a..ab4a925a443e 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
@@ -58,6 +58,8 @@ | |||
58 | 1: | 58 | 1: |
59 | .ifeqs "\flushins", BROK_FLUSH_INST | 59 | .ifeqs "\flushins", BROK_FLUSH_INST |
60 | \flushins [P0++]; | 60 | \flushins [P0++]; |
61 | nop; | ||
62 | nop; | ||
61 | 2: nop; | 63 | 2: nop; |
62 | .else | 64 | .else |
63 | 2: \flushins [P0++]; | 65 | 2: \flushins [P0++]; |
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S index 442218980db0..c49be845f96a 100644 --- a/arch/cris/kernel/vmlinux.lds.S +++ b/arch/cris/kernel/vmlinux.lds.S | |||
@@ -72,11 +72,6 @@ SECTIONS | |||
72 | INIT_TEXT_SECTION(PAGE_SIZE) | 72 | INIT_TEXT_SECTION(PAGE_SIZE) |
73 | .init.data : { INIT_DATA } | 73 | .init.data : { INIT_DATA } |
74 | .init.setup : { INIT_SETUP(16) } | 74 | .init.setup : { INIT_SETUP(16) } |
75 | #ifdef CONFIG_ETRAX_ARCH_V32 | ||
76 | __start___param = .; | ||
77 | __param : { *(__param) } | ||
78 | __stop___param = .; | ||
79 | #endif | ||
80 | .initcall.init : { | 75 | .initcall.init : { |
81 | INIT_CALLS | 76 | INIT_CALLS |
82 | } | 77 | } |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 991d5998d6be..fe56a23e1ff0 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
@@ -240,6 +240,12 @@ struct machdep_calls { | |||
240 | * claims to support kexec. | 240 | * claims to support kexec. |
241 | */ | 241 | */ |
242 | int (*machine_kexec_prepare)(struct kimage *image); | 242 | int (*machine_kexec_prepare)(struct kimage *image); |
243 | |||
244 | /* Called to perform the _real_ kexec. | ||
245 | * Do NOT allocate memory or fail here. We are past the point of | ||
246 | * no return. | ||
247 | */ | ||
248 | void (*machine_kexec)(struct kimage *image); | ||
243 | #endif /* CONFIG_KEXEC */ | 249 | #endif /* CONFIG_KEXEC */ |
244 | 250 | ||
245 | #ifdef CONFIG_SUSPEND | 251 | #ifdef CONFIG_SUSPEND |
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index 49a170af8145..a5f8672eeff3 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c | |||
@@ -87,7 +87,10 @@ void machine_kexec(struct kimage *image) | |||
87 | 87 | ||
88 | save_ftrace_enabled = __ftrace_enabled_save(); | 88 | save_ftrace_enabled = __ftrace_enabled_save(); |
89 | 89 | ||
90 | default_machine_kexec(image); | 90 | if (ppc_md.machine_kexec) |
91 | ppc_md.machine_kexec(image); | ||
92 | else | ||
93 | default_machine_kexec(image); | ||
91 | 94 | ||
92 | __ftrace_enabled_restore(save_ftrace_enabled); | 95 | __ftrace_enabled_restore(save_ftrace_enabled); |
93 | 96 | ||
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 7a1d5cb76932..8303a6c65ef7 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -353,6 +353,7 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread) | |||
353 | prime_debug_regs(new_thread); | 353 | prime_debug_regs(new_thread); |
354 | } | 354 | } |
355 | #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ | 355 | #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ |
356 | #ifndef CONFIG_HAVE_HW_BREAKPOINT | ||
356 | static void set_debug_reg_defaults(struct thread_struct *thread) | 357 | static void set_debug_reg_defaults(struct thread_struct *thread) |
357 | { | 358 | { |
358 | if (thread->dabr) { | 359 | if (thread->dabr) { |
@@ -360,6 +361,7 @@ static void set_debug_reg_defaults(struct thread_struct *thread) | |||
360 | set_dabr(0); | 361 | set_dabr(0); |
361 | } | 362 | } |
362 | } | 363 | } |
364 | #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ | ||
363 | #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ | 365 | #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ |
364 | 366 | ||
365 | int set_dabr(unsigned long dabr) | 367 | int set_dabr(unsigned long dabr) |
@@ -670,11 +672,11 @@ void flush_thread(void) | |||
670 | { | 672 | { |
671 | discard_lazy_cpu_state(); | 673 | discard_lazy_cpu_state(); |
672 | 674 | ||
673 | #ifdef CONFIG_HAVE_HW_BREAKPOINTS | 675 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
674 | flush_ptrace_hw_breakpoint(current); | 676 | flush_ptrace_hw_breakpoint(current); |
675 | #else /* CONFIG_HAVE_HW_BREAKPOINTS */ | 677 | #else /* CONFIG_HAVE_HW_BREAKPOINT */ |
676 | set_debug_reg_defaults(¤t->thread); | 678 | set_debug_reg_defaults(¤t->thread); |
677 | #endif /* CONFIG_HAVE_HW_BREAKPOINTS */ | 679 | #endif /* CONFIG_HAVE_HW_BREAKPOINT */ |
678 | } | 680 | } |
679 | 681 | ||
680 | void | 682 | void |
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c index 1ec06576f619..c14d09f614f3 100644 --- a/arch/powerpc/mm/tlb_hash64.c +++ b/arch/powerpc/mm/tlb_hash64.c | |||
@@ -38,13 +38,11 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | |||
38 | * neesd to be flushed. This function will either perform the flush | 38 | * neesd to be flushed. This function will either perform the flush |
39 | * immediately or will batch it up if the current CPU has an active | 39 | * immediately or will batch it up if the current CPU has an active |
40 | * batch on it. | 40 | * batch on it. |
41 | * | ||
42 | * Must be called from within some kind of spinlock/non-preempt region... | ||
43 | */ | 41 | */ |
44 | void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | 42 | void hpte_need_flush(struct mm_struct *mm, unsigned long addr, |
45 | pte_t *ptep, unsigned long pte, int huge) | 43 | pte_t *ptep, unsigned long pte, int huge) |
46 | { | 44 | { |
47 | struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); | 45 | struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); |
48 | unsigned long vsid, vaddr; | 46 | unsigned long vsid, vaddr; |
49 | unsigned int psize; | 47 | unsigned int psize; |
50 | int ssize; | 48 | int ssize; |
@@ -99,6 +97,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
99 | */ | 97 | */ |
100 | if (!batch->active) { | 98 | if (!batch->active) { |
101 | flush_hash_page(vaddr, rpte, psize, ssize, 0); | 99 | flush_hash_page(vaddr, rpte, psize, ssize, 0); |
100 | put_cpu_var(ppc64_tlb_batch); | ||
102 | return; | 101 | return; |
103 | } | 102 | } |
104 | 103 | ||
@@ -127,6 +126,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
127 | batch->index = ++i; | 126 | batch->index = ++i; |
128 | if (i >= PPC64_TLB_BATCH_NR) | 127 | if (i >= PPC64_TLB_BATCH_NR) |
129 | __flush_tlb_pending(batch); | 128 | __flush_tlb_pending(batch); |
129 | put_cpu_var(ppc64_tlb_batch); | ||
130 | } | 130 | } |
131 | 131 | ||
132 | /* | 132 | /* |
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c index 0851eb1e919e..2751b3a8a66f 100644 --- a/arch/s390/boot/compressed/misc.c +++ b/arch/s390/boot/compressed/misc.c | |||
@@ -133,11 +133,12 @@ unsigned long decompress_kernel(void) | |||
133 | unsigned long output_addr; | 133 | unsigned long output_addr; |
134 | unsigned char *output; | 134 | unsigned char *output; |
135 | 135 | ||
136 | check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start); | 136 | output_addr = ((unsigned long) &_end + HEAP_SIZE + 4095UL) & -4096UL; |
137 | check_ipl_parmblock((void *) 0, output_addr + SZ__bss_start); | ||
137 | memset(&_bss, 0, &_ebss - &_bss); | 138 | memset(&_bss, 0, &_ebss - &_bss); |
138 | free_mem_ptr = (unsigned long)&_end; | 139 | free_mem_ptr = (unsigned long)&_end; |
139 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; | 140 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; |
140 | output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL); | 141 | output = (unsigned char *) output_addr; |
141 | 142 | ||
142 | #ifdef CONFIG_BLK_DEV_INITRD | 143 | #ifdef CONFIG_BLK_DEV_INITRD |
143 | /* | 144 | /* |
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c index f42dbabc0d30..48884f89ab92 100644 --- a/arch/s390/crypto/sha_common.c +++ b/arch/s390/crypto/sha_common.c | |||
@@ -38,6 +38,7 @@ int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len) | |||
38 | BUG_ON(ret != bsize); | 38 | BUG_ON(ret != bsize); |
39 | data += bsize - index; | 39 | data += bsize - index; |
40 | len -= bsize - index; | 40 | len -= bsize - index; |
41 | index = 0; | ||
41 | } | 42 | } |
42 | 43 | ||
43 | /* process as many blocks as possible */ | 44 | /* process as many blocks as possible */ |
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 76daea117181..5c5ba10384c2 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h | |||
@@ -36,14 +36,19 @@ | |||
36 | 36 | ||
37 | static inline int atomic_read(const atomic_t *v) | 37 | static inline int atomic_read(const atomic_t *v) |
38 | { | 38 | { |
39 | barrier(); | 39 | int c; |
40 | return v->counter; | 40 | |
41 | asm volatile( | ||
42 | " l %0,%1\n" | ||
43 | : "=d" (c) : "Q" (v->counter)); | ||
44 | return c; | ||
41 | } | 45 | } |
42 | 46 | ||
43 | static inline void atomic_set(atomic_t *v, int i) | 47 | static inline void atomic_set(atomic_t *v, int i) |
44 | { | 48 | { |
45 | v->counter = i; | 49 | asm volatile( |
46 | barrier(); | 50 | " st %1,%0\n" |
51 | : "=Q" (v->counter) : "d" (i)); | ||
47 | } | 52 | } |
48 | 53 | ||
49 | static inline int atomic_add_return(int i, atomic_t *v) | 54 | static inline int atomic_add_return(int i, atomic_t *v) |
@@ -128,14 +133,19 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) | |||
128 | 133 | ||
129 | static inline long long atomic64_read(const atomic64_t *v) | 134 | static inline long long atomic64_read(const atomic64_t *v) |
130 | { | 135 | { |
131 | barrier(); | 136 | long long c; |
132 | return v->counter; | 137 | |
138 | asm volatile( | ||
139 | " lg %0,%1\n" | ||
140 | : "=d" (c) : "Q" (v->counter)); | ||
141 | return c; | ||
133 | } | 142 | } |
134 | 143 | ||
135 | static inline void atomic64_set(atomic64_t *v, long long i) | 144 | static inline void atomic64_set(atomic64_t *v, long long i) |
136 | { | 145 | { |
137 | v->counter = i; | 146 | asm volatile( |
138 | barrier(); | 147 | " stg %1,%0\n" |
148 | : "=Q" (v->counter) : "d" (i)); | ||
139 | } | 149 | } |
140 | 150 | ||
141 | static inline long long atomic64_add_return(long long i, atomic64_t *v) | 151 | static inline long long atomic64_add_return(long long i, atomic64_t *v) |
diff --git a/arch/s390/include/asm/cache.h b/arch/s390/include/asm/cache.h index 24aafa68b643..2a30d5ac0667 100644 --- a/arch/s390/include/asm/cache.h +++ b/arch/s390/include/asm/cache.h | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #define L1_CACHE_BYTES 256 | 14 | #define L1_CACHE_BYTES 256 |
15 | #define L1_CACHE_SHIFT 8 | 15 | #define L1_CACHE_SHIFT 8 |
16 | #define NET_SKB_PAD 32 | ||
16 | 17 | ||
17 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) | 18 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
18 | 19 | ||
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h index a78701da775b..4a5350037c8f 100644 --- a/arch/sh/include/asm/sections.h +++ b/arch/sh/include/asm/sections.h | |||
@@ -3,7 +3,7 @@ | |||
3 | 3 | ||
4 | #include <asm-generic/sections.h> | 4 | #include <asm-generic/sections.h> |
5 | 5 | ||
6 | extern void __nosave_begin, __nosave_end; | 6 | extern long __nosave_begin, __nosave_end; |
7 | extern long __machvec_start, __machvec_end; | 7 | extern long __machvec_start, __machvec_end; |
8 | extern char __uncached_start, __uncached_end; | 8 | extern char __uncached_start, __uncached_end; |
9 | extern char _ebss[]; | 9 | extern char _ebss[]; |
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 672944f5b19c..e53b4b38bd11 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/sh_timer.h> | 15 | #include <linux/sh_timer.h> |
16 | #include <linux/serial_sci.h> | 16 | #include <linux/serial_sci.h> |
17 | #include <asm/machtypes.h> | 17 | #include <generated/machtypes.h> |
18 | 18 | ||
19 | static struct resource rtc_resources[] = { | 19 | static struct resource rtc_resources[] = { |
20 | [0] = { | 20 | [0] = { |
@@ -255,12 +255,17 @@ static struct platform_device *sh7750_early_devices[] __initdata = { | |||
255 | 255 | ||
256 | void __init plat_early_device_setup(void) | 256 | void __init plat_early_device_setup(void) |
257 | { | 257 | { |
258 | struct platform_device *dev[1]; | ||
259 | |||
258 | if (mach_is_rts7751r2d()) { | 260 | if (mach_is_rts7751r2d()) { |
259 | scif_platform_data.scscr |= SCSCR_CKE1; | 261 | scif_platform_data.scscr |= SCSCR_CKE1; |
260 | early_platform_add_devices(&scif_device, 1); | 262 | dev[0] = &scif_device; |
263 | early_platform_add_devices(dev, 1); | ||
261 | } else { | 264 | } else { |
262 | early_platform_add_devices(&sci_device, 1); | 265 | dev[0] = &sci_device; |
263 | early_platform_add_devices(&scif_device, 1); | 266 | early_platform_add_devices(dev, 1); |
267 | dev[0] = &scif_device; | ||
268 | early_platform_add_devices(dev, 1); | ||
264 | } | 269 | } |
265 | 270 | ||
266 | early_platform_add_devices(sh7750_early_devices, | 271 | early_platform_add_devices(sh7750_early_devices, |
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c index faa8f86c0db4..0901b2f14e15 100644 --- a/arch/sh/lib/delay.c +++ b/arch/sh/lib/delay.c | |||
@@ -10,6 +10,16 @@ | |||
10 | void __delay(unsigned long loops) | 10 | void __delay(unsigned long loops) |
11 | { | 11 | { |
12 | __asm__ __volatile__( | 12 | __asm__ __volatile__( |
13 | /* | ||
14 | * ST40-300 appears to have an issue with this code, | ||
15 | * normally taking two cycles each loop, as with all | ||
16 | * other SH variants. If however the branch and the | ||
17 | * delay slot straddle an 8 byte boundary, this increases | ||
18 | * to 3 cycles. | ||
19 | * This align directive ensures this doesn't occur. | ||
20 | */ | ||
21 | ".balign 8\n\t" | ||
22 | |||
13 | "tst %0, %0\n\t" | 23 | "tst %0, %0\n\t" |
14 | "1:\t" | 24 | "1:\t" |
15 | "bf/s 1b\n\t" | 25 | "bf/s 1b\n\t" |
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c index 88d3dc3d30d5..5a580ea04429 100644 --- a/arch/sh/mm/cache.c +++ b/arch/sh/mm/cache.c | |||
@@ -108,7 +108,8 @@ void copy_user_highpage(struct page *to, struct page *from, | |||
108 | kunmap_atomic(vfrom, KM_USER0); | 108 | kunmap_atomic(vfrom, KM_USER0); |
109 | } | 109 | } |
110 | 110 | ||
111 | if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) | 111 | if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) || |
112 | (vma->vm_flags & VM_EXEC)) | ||
112 | __flush_purge_region(vto, PAGE_SIZE); | 113 | __flush_purge_region(vto, PAGE_SIZE); |
113 | 114 | ||
114 | kunmap_atomic(vto, KM_USER1); | 115 | kunmap_atomic(vto, KM_USER1); |
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h index a2f5c61f924e..843e4faf6a50 100644 --- a/arch/sparc/include/asm/pcr.h +++ b/arch/sparc/include/asm/pcr.h | |||
@@ -43,4 +43,6 @@ static inline u64 picl_value(unsigned int nmi_hz) | |||
43 | 43 | ||
44 | extern u64 pcr_enable; | 44 | extern u64 pcr_enable; |
45 | 45 | ||
46 | extern int pcr_arch_init(void); | ||
47 | |||
46 | #endif /* __PCR_H */ | 48 | #endif /* __PCR_H */ |
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c index 47977a77f6c6..72509d0e34be 100644 --- a/arch/sparc/kernel/iommu.c +++ b/arch/sparc/kernel/iommu.c | |||
@@ -255,10 +255,9 @@ static inline iopte_t *alloc_npages(struct device *dev, struct iommu *iommu, | |||
255 | static int iommu_alloc_ctx(struct iommu *iommu) | 255 | static int iommu_alloc_ctx(struct iommu *iommu) |
256 | { | 256 | { |
257 | int lowest = iommu->ctx_lowest_free; | 257 | int lowest = iommu->ctx_lowest_free; |
258 | int sz = IOMMU_NUM_CTXS - lowest; | 258 | int n = find_next_zero_bit(iommu->ctx_bitmap, IOMMU_NUM_CTXS, lowest); |
259 | int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest); | ||
260 | 259 | ||
261 | if (unlikely(n == sz)) { | 260 | if (unlikely(n == IOMMU_NUM_CTXS)) { |
262 | n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); | 261 | n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); |
263 | if (unlikely(n == lowest)) { | 262 | if (unlikely(n == lowest)) { |
264 | printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); | 263 | printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); |
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c index ae96cf52a955..7c2ced612b8f 100644 --- a/arch/sparc/kernel/pcr.c +++ b/arch/sparc/kernel/pcr.c | |||
@@ -167,5 +167,3 @@ out_unregister: | |||
167 | unregister_perf_hsvc(); | 167 | unregister_perf_hsvc(); |
168 | return err; | 168 | return err; |
169 | } | 169 | } |
170 | |||
171 | early_initcall(pcr_arch_init); | ||
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c index b6a2b8f47040..555a76d1f4a1 100644 --- a/arch/sparc/kernel/smp_64.c +++ b/arch/sparc/kernel/smp_64.c | |||
@@ -49,6 +49,7 @@ | |||
49 | #include <asm/mdesc.h> | 49 | #include <asm/mdesc.h> |
50 | #include <asm/ldc.h> | 50 | #include <asm/ldc.h> |
51 | #include <asm/hypervisor.h> | 51 | #include <asm/hypervisor.h> |
52 | #include <asm/pcr.h> | ||
52 | 53 | ||
53 | #include "cpumap.h" | 54 | #include "cpumap.h" |
54 | 55 | ||
@@ -1358,6 +1359,7 @@ void __cpu_die(unsigned int cpu) | |||
1358 | 1359 | ||
1359 | void __init smp_cpus_done(unsigned int max_cpus) | 1360 | void __init smp_cpus_done(unsigned int max_cpus) |
1360 | { | 1361 | { |
1362 | pcr_arch_init(); | ||
1361 | } | 1363 | } |
1362 | 1364 | ||
1363 | void smp_send_reschedule(int cpu) | 1365 | void smp_send_reschedule(int cpu) |
diff --git a/arch/sparc/kernel/una_asm_32.S b/arch/sparc/kernel/una_asm_32.S index 8cc03458eb7e..8f096e84a937 100644 --- a/arch/sparc/kernel/una_asm_32.S +++ b/arch/sparc/kernel/una_asm_32.S | |||
@@ -24,9 +24,9 @@ retl_efault: | |||
24 | .globl __do_int_store | 24 | .globl __do_int_store |
25 | __do_int_store: | 25 | __do_int_store: |
26 | ld [%o2], %g1 | 26 | ld [%o2], %g1 |
27 | cmp %1, 2 | 27 | cmp %o1, 2 |
28 | be 2f | 28 | be 2f |
29 | cmp %1, 4 | 29 | cmp %o1, 4 |
30 | be 1f | 30 | be 1f |
31 | srl %g1, 24, %g2 | 31 | srl %g1, 24, %g2 |
32 | srl %g1, 16, %g7 | 32 | srl %g1, 16, %g7 |
diff --git a/arch/sparc/lib/bitext.c b/arch/sparc/lib/bitext.c index 764b3eb7b604..48d00e72ce15 100644 --- a/arch/sparc/lib/bitext.c +++ b/arch/sparc/lib/bitext.c | |||
@@ -10,7 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
13 | #include <linux/bitops.h> | 13 | #include <linux/bitmap.h> |
14 | 14 | ||
15 | #include <asm/bitext.h> | 15 | #include <asm/bitext.h> |
16 | 16 | ||
@@ -80,8 +80,7 @@ int bit_map_string_get(struct bit_map *t, int len, int align) | |||
80 | while (test_bit(offset + i, t->map) == 0) { | 80 | while (test_bit(offset + i, t->map) == 0) { |
81 | i++; | 81 | i++; |
82 | if (i == len) { | 82 | if (i == len) { |
83 | for (i = 0; i < len; i++) | 83 | bitmap_set(t->map, offset, len); |
84 | __set_bit(offset + i, t->map); | ||
85 | if (offset == t->first_free) | 84 | if (offset == t->first_free) |
86 | t->first_free = find_next_zero_bit | 85 | t->first_free = find_next_zero_bit |
87 | (t->map, t->size, | 86 | (t->map, t->size, |
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 211ca3f7fd16..4ea15ca89b2b 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h | |||
@@ -88,6 +88,7 @@ extern int acpi_disabled; | |||
88 | extern int acpi_pci_disabled; | 88 | extern int acpi_pci_disabled; |
89 | extern int acpi_skip_timer_override; | 89 | extern int acpi_skip_timer_override; |
90 | extern int acpi_use_timer_override; | 90 | extern int acpi_use_timer_override; |
91 | extern int acpi_fix_pin2_polarity; | ||
91 | 92 | ||
92 | extern u8 acpi_sci_flags; | 93 | extern u8 acpi_sci_flags; |
93 | extern int acpi_sci_override_gsi; | 94 | extern int acpi_sci_override_gsi; |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 4d0dfa0d998e..43a18c77676d 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -36,6 +36,11 @@ | |||
36 | #define MSR_IA32_PERFCTR1 0x000000c2 | 36 | #define MSR_IA32_PERFCTR1 0x000000c2 |
37 | #define MSR_FSB_FREQ 0x000000cd | 37 | #define MSR_FSB_FREQ 0x000000cd |
38 | 38 | ||
39 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 | ||
40 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) | ||
41 | #define NHM_C1_AUTO_DEMOTE (1UL << 26) | ||
42 | #define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) | ||
43 | |||
39 | #define MSR_MTRRcap 0x000000fe | 44 | #define MSR_MTRRcap 0x000000fe |
40 | #define MSR_IA32_BBL_CR_CTL 0x00000119 | 45 | #define MSR_IA32_BBL_CR_CTL 0x00000119 |
41 | 46 | ||
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index e2f6a99f14ab..cc29086e30cd 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #define ARCH_P4_CNTRVAL_BITS (40) | 23 | #define ARCH_P4_CNTRVAL_BITS (40) |
24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) | 24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) |
25 | #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1)) | ||
25 | 26 | ||
26 | #define P4_ESCR_EVENT_MASK 0x7e000000U | 27 | #define P4_ESCR_EVENT_MASK 0x7e000000U |
27 | #define P4_ESCR_EVENT_SHIFT 25 | 28 | #define P4_ESCR_EVENT_SHIFT 25 |
diff --git a/arch/x86/include/asm/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h index 6c22bf353f26..725b77831993 100644 --- a/arch/x86/include/asm/smpboot_hooks.h +++ b/arch/x86/include/asm/smpboot_hooks.h | |||
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void) | |||
34 | */ | 34 | */ |
35 | CMOS_WRITE(0, 0xf); | 35 | CMOS_WRITE(0, 0xf); |
36 | 36 | ||
37 | *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0; | 37 | *((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0; |
38 | } | 38 | } |
39 | 39 | ||
40 | static inline void __init smpboot_setup_io_apic(void) | 40 | static inline void __init smpboot_setup_io_apic(void) |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index b3a71137983a..3e6e2d68f761 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -72,6 +72,7 @@ u8 acpi_sci_flags __initdata; | |||
72 | int acpi_sci_override_gsi __initdata; | 72 | int acpi_sci_override_gsi __initdata; |
73 | int acpi_skip_timer_override __initdata; | 73 | int acpi_skip_timer_override __initdata; |
74 | int acpi_use_timer_override __initdata; | 74 | int acpi_use_timer_override __initdata; |
75 | int acpi_fix_pin2_polarity __initdata; | ||
75 | 76 | ||
76 | #ifdef CONFIG_X86_LOCAL_APIC | 77 | #ifdef CONFIG_X86_LOCAL_APIC |
77 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | 78 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; |
@@ -415,10 +416,15 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header, | |||
415 | return 0; | 416 | return 0; |
416 | } | 417 | } |
417 | 418 | ||
418 | if (acpi_skip_timer_override && | 419 | if (intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
419 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { | 420 | if (acpi_skip_timer_override) { |
420 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); | 421 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
421 | return 0; | 422 | return 0; |
423 | } | ||
424 | if (acpi_fix_pin2_polarity && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { | ||
425 | intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; | ||
426 | printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); | ||
427 | } | ||
422 | } | 428 | } |
423 | 429 | ||
424 | mp_override_legacy_irq(intsrc->source_irq, | 430 | mp_override_legacy_irq(intsrc->source_irq, |
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c index 51ef31a89be9..51d4e1663066 100644 --- a/arch/x86/kernel/apb_timer.c +++ b/arch/x86/kernel/apb_timer.c | |||
@@ -284,7 +284,7 @@ static int __init apbt_clockevent_register(void) | |||
284 | memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device)); | 284 | memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device)); |
285 | 285 | ||
286 | if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { | 286 | if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { |
287 | apbt_clockevent.rating = APBT_CLOCKEVENT_RATING - 100; | 287 | adev->evt.rating = APBT_CLOCKEVENT_RATING - 100; |
288 | global_clock_event = &adev->evt; | 288 | global_clock_event = &adev->evt; |
289 | printk(KERN_DEBUG "%s clockevent registered as global\n", | 289 | printk(KERN_DEBUG "%s clockevent registered as global\n", |
290 | global_clock_event->name); | 290 | global_clock_event->name); |
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c index bd1cac747f67..52c93648e492 100644 --- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c +++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c | |||
@@ -158,9 +158,9 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c) | |||
158 | { | 158 | { |
159 | if (c->x86 == 0x06) { | 159 | if (c->x86 == 0x06) { |
160 | if (cpu_has(c, X86_FEATURE_EST)) | 160 | if (cpu_has(c, X86_FEATURE_EST)) |
161 | printk(KERN_WARNING PFX "Warning: EST-capable CPU " | 161 | printk_once(KERN_WARNING PFX "Warning: EST-capable " |
162 | "detected. The acpi-cpufreq module offers " | 162 | "CPU detected. The acpi-cpufreq module offers " |
163 | "voltage scaling in addition of frequency " | 163 | "voltage scaling in addition to frequency " |
164 | "scaling. You should use that instead of " | 164 | "scaling. You should use that instead of " |
165 | "p4-clockmod, if possible.\n"); | 165 | "p4-clockmod, if possible.\n"); |
166 | switch (c->x86_model) { | 166 | switch (c->x86_model) { |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 35c7e65e59be..c567dec854f6 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
@@ -1537,6 +1537,7 @@ static struct notifier_block cpb_nb = { | |||
1537 | static int __cpuinit powernowk8_init(void) | 1537 | static int __cpuinit powernowk8_init(void) |
1538 | { | 1538 | { |
1539 | unsigned int i, supported_cpus = 0, cpu; | 1539 | unsigned int i, supported_cpus = 0, cpu; |
1540 | int rv; | ||
1540 | 1541 | ||
1541 | for_each_online_cpu(i) { | 1542 | for_each_online_cpu(i) { |
1542 | int rc; | 1543 | int rc; |
@@ -1555,14 +1556,14 @@ static int __cpuinit powernowk8_init(void) | |||
1555 | 1556 | ||
1556 | cpb_capable = true; | 1557 | cpb_capable = true; |
1557 | 1558 | ||
1558 | register_cpu_notifier(&cpb_nb); | ||
1559 | |||
1560 | msrs = msrs_alloc(); | 1559 | msrs = msrs_alloc(); |
1561 | if (!msrs) { | 1560 | if (!msrs) { |
1562 | printk(KERN_ERR "%s: Error allocating msrs!\n", __func__); | 1561 | printk(KERN_ERR "%s: Error allocating msrs!\n", __func__); |
1563 | return -ENOMEM; | 1562 | return -ENOMEM; |
1564 | } | 1563 | } |
1565 | 1564 | ||
1565 | register_cpu_notifier(&cpb_nb); | ||
1566 | |||
1566 | rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); | 1567 | rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); |
1567 | 1568 | ||
1568 | for_each_cpu(cpu, cpu_online_mask) { | 1569 | for_each_cpu(cpu, cpu_online_mask) { |
@@ -1574,7 +1575,13 @@ static int __cpuinit powernowk8_init(void) | |||
1574 | (cpb_enabled ? "on" : "off")); | 1575 | (cpb_enabled ? "on" : "off")); |
1575 | } | 1576 | } |
1576 | 1577 | ||
1577 | return cpufreq_register_driver(&cpufreq_amd64_driver); | 1578 | rv = cpufreq_register_driver(&cpufreq_amd64_driver); |
1579 | if (rv < 0 && boot_cpu_has(X86_FEATURE_CPB)) { | ||
1580 | unregister_cpu_notifier(&cpb_nb); | ||
1581 | msrs_free(msrs); | ||
1582 | msrs = NULL; | ||
1583 | } | ||
1584 | return rv; | ||
1578 | } | 1585 | } |
1579 | 1586 | ||
1580 | /* driver entry point for term */ | 1587 | /* driver entry point for term */ |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index f7a0993c1e7c..ff751a9f182b 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | |||
770 | return 1; | 770 | return 1; |
771 | } | 771 | } |
772 | 772 | ||
773 | /* it might be unflagged overflow */ | 773 | /* |
774 | rdmsrl(hwc->event_base + hwc->idx, v); | 774 | * In some circumstances the overflow might issue an NMI but did |
775 | if (!(v & ARCH_P4_CNTRVAL_MASK)) | 775 | * not set P4_CCCR_OVF bit. Because a counter holds a negative value |
776 | * we simply check for high bit being set, if it's cleared it means | ||
777 | * the counter has reached zero value and continued counting before | ||
778 | * real NMI signal was received: | ||
779 | */ | ||
780 | if (!(v & ARCH_P4_UNFLAGGED_BIT)) | ||
776 | return 1; | 781 | return 1; |
777 | 782 | ||
778 | return 0; | 783 | return 0; |
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 76b8cd953dee..9efbdcc56425 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
@@ -143,15 +143,10 @@ static void __init ati_bugs(int num, int slot, int func) | |||
143 | 143 | ||
144 | static u32 __init ati_sbx00_rev(int num, int slot, int func) | 144 | static u32 __init ati_sbx00_rev(int num, int slot, int func) |
145 | { | 145 | { |
146 | u32 old, d; | 146 | u32 d; |
147 | 147 | ||
148 | d = read_pci_config(num, slot, func, 0x70); | ||
149 | old = d; | ||
150 | d &= ~(1<<8); | ||
151 | write_pci_config(num, slot, func, 0x70, d); | ||
152 | d = read_pci_config(num, slot, func, 0x8); | 148 | d = read_pci_config(num, slot, func, 0x8); |
153 | d &= 0xff; | 149 | d &= 0xff; |
154 | write_pci_config(num, slot, func, 0x70, old); | ||
155 | 150 | ||
156 | return d; | 151 | return d; |
157 | } | 152 | } |
@@ -160,13 +155,16 @@ static void __init ati_bugs_contd(int num, int slot, int func) | |||
160 | { | 155 | { |
161 | u32 d, rev; | 156 | u32 d, rev; |
162 | 157 | ||
163 | if (acpi_use_timer_override) | ||
164 | return; | ||
165 | |||
166 | rev = ati_sbx00_rev(num, slot, func); | 158 | rev = ati_sbx00_rev(num, slot, func); |
159 | if (rev >= 0x40) | ||
160 | acpi_fix_pin2_polarity = 1; | ||
161 | |||
167 | if (rev > 0x13) | 162 | if (rev > 0x13) |
168 | return; | 163 | return; |
169 | 164 | ||
165 | if (acpi_use_timer_override) | ||
166 | return; | ||
167 | |||
170 | /* check for IRQ0 interrupt swap */ | 168 | /* check for IRQ0 interrupt swap */ |
171 | d = read_pci_config(num, slot, func, 0x64); | 169 | d = read_pci_config(num, slot, func, 0x64); |
172 | if (!(d & (1<<14))) | 170 | if (!(d & (1<<14))) |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index fc7aae1e2bc7..715037caeb43 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -285,6 +285,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { | |||
285 | DMI_MATCH(DMI_BOARD_NAME, "P4S800"), | 285 | DMI_MATCH(DMI_BOARD_NAME, "P4S800"), |
286 | }, | 286 | }, |
287 | }, | 287 | }, |
288 | { /* Handle problems with rebooting on VersaLogic Menlow boards */ | ||
289 | .callback = set_bios_reboot, | ||
290 | .ident = "VersaLogic Menlow based board", | ||
291 | .matches = { | ||
292 | DMI_MATCH(DMI_BOARD_VENDOR, "VersaLogic Corporation"), | ||
293 | DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"), | ||
294 | }, | ||
295 | }, | ||
288 | { } | 296 | { } |
289 | }; | 297 | }; |
290 | 298 | ||
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 54ce246a383e..63fec1531e89 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
@@ -2777,6 +2777,8 @@ static int dr_interception(struct vcpu_svm *svm) | |||
2777 | kvm_register_write(&svm->vcpu, reg, val); | 2777 | kvm_register_write(&svm->vcpu, reg, val); |
2778 | } | 2778 | } |
2779 | 2779 | ||
2780 | skip_emulated_instruction(&svm->vcpu); | ||
2781 | |||
2780 | return 1; | 2782 | return 1; |
2781 | } | 2783 | } |
2782 | 2784 | ||
diff --git a/arch/x86/platform/olpc/olpc_dt.c b/arch/x86/platform/olpc/olpc_dt.c index dab874647530..044bda5b3174 100644 --- a/arch/x86/platform/olpc/olpc_dt.c +++ b/arch/x86/platform/olpc/olpc_dt.c | |||
@@ -140,8 +140,7 @@ void * __init prom_early_alloc(unsigned long size) | |||
140 | * wasted bootmem) and hand off chunks of it to callers. | 140 | * wasted bootmem) and hand off chunks of it to callers. |
141 | */ | 141 | */ |
142 | res = alloc_bootmem(chunk_size); | 142 | res = alloc_bootmem(chunk_size); |
143 | if (!res) | 143 | BUG_ON(!res); |
144 | return NULL; | ||
145 | prom_early_allocated += chunk_size; | 144 | prom_early_allocated += chunk_size; |
146 | memset(res, 0, chunk_size); | 145 | memset(res, 0, chunk_size); |
147 | free_mem = chunk_size; | 146 | free_mem = chunk_size; |
diff --git a/block/blk-core.c b/block/blk-core.c index 2f4002f79a24..518dd423a5fe 100644 --- a/block/blk-core.c +++ b/block/blk-core.c | |||
@@ -352,7 +352,7 @@ void blk_start_queue(struct request_queue *q) | |||
352 | WARN_ON(!irqs_disabled()); | 352 | WARN_ON(!irqs_disabled()); |
353 | 353 | ||
354 | queue_flag_clear(QUEUE_FLAG_STOPPED, q); | 354 | queue_flag_clear(QUEUE_FLAG_STOPPED, q); |
355 | __blk_run_queue(q); | 355 | __blk_run_queue(q, false); |
356 | } | 356 | } |
357 | EXPORT_SYMBOL(blk_start_queue); | 357 | EXPORT_SYMBOL(blk_start_queue); |
358 | 358 | ||
@@ -403,13 +403,14 @@ EXPORT_SYMBOL(blk_sync_queue); | |||
403 | /** | 403 | /** |
404 | * __blk_run_queue - run a single device queue | 404 | * __blk_run_queue - run a single device queue |
405 | * @q: The queue to run | 405 | * @q: The queue to run |
406 | * @force_kblockd: Don't run @q->request_fn directly. Use kblockd. | ||
406 | * | 407 | * |
407 | * Description: | 408 | * Description: |
408 | * See @blk_run_queue. This variant must be called with the queue lock | 409 | * See @blk_run_queue. This variant must be called with the queue lock |
409 | * held and interrupts disabled. | 410 | * held and interrupts disabled. |
410 | * | 411 | * |
411 | */ | 412 | */ |
412 | void __blk_run_queue(struct request_queue *q) | 413 | void __blk_run_queue(struct request_queue *q, bool force_kblockd) |
413 | { | 414 | { |
414 | blk_remove_plug(q); | 415 | blk_remove_plug(q); |
415 | 416 | ||
@@ -423,7 +424,7 @@ void __blk_run_queue(struct request_queue *q) | |||
423 | * Only recurse once to avoid overrunning the stack, let the unplug | 424 | * Only recurse once to avoid overrunning the stack, let the unplug |
424 | * handling reinvoke the handler shortly if we already got there. | 425 | * handling reinvoke the handler shortly if we already got there. |
425 | */ | 426 | */ |
426 | if (!queue_flag_test_and_set(QUEUE_FLAG_REENTER, q)) { | 427 | if (!force_kblockd && !queue_flag_test_and_set(QUEUE_FLAG_REENTER, q)) { |
427 | q->request_fn(q); | 428 | q->request_fn(q); |
428 | queue_flag_clear(QUEUE_FLAG_REENTER, q); | 429 | queue_flag_clear(QUEUE_FLAG_REENTER, q); |
429 | } else { | 430 | } else { |
@@ -446,7 +447,7 @@ void blk_run_queue(struct request_queue *q) | |||
446 | unsigned long flags; | 447 | unsigned long flags; |
447 | 448 | ||
448 | spin_lock_irqsave(q->queue_lock, flags); | 449 | spin_lock_irqsave(q->queue_lock, flags); |
449 | __blk_run_queue(q); | 450 | __blk_run_queue(q, false); |
450 | spin_unlock_irqrestore(q->queue_lock, flags); | 451 | spin_unlock_irqrestore(q->queue_lock, flags); |
451 | } | 452 | } |
452 | EXPORT_SYMBOL(blk_run_queue); | 453 | EXPORT_SYMBOL(blk_run_queue); |
@@ -1053,7 +1054,7 @@ void blk_insert_request(struct request_queue *q, struct request *rq, | |||
1053 | 1054 | ||
1054 | drive_stat_acct(rq, 1); | 1055 | drive_stat_acct(rq, 1); |
1055 | __elv_add_request(q, rq, where, 0); | 1056 | __elv_add_request(q, rq, where, 0); |
1056 | __blk_run_queue(q); | 1057 | __blk_run_queue(q, false); |
1057 | spin_unlock_irqrestore(q->queue_lock, flags); | 1058 | spin_unlock_irqrestore(q->queue_lock, flags); |
1058 | } | 1059 | } |
1059 | EXPORT_SYMBOL(blk_insert_request); | 1060 | EXPORT_SYMBOL(blk_insert_request); |
@@ -2610,13 +2611,6 @@ int kblockd_schedule_work(struct request_queue *q, struct work_struct *work) | |||
2610 | } | 2611 | } |
2611 | EXPORT_SYMBOL(kblockd_schedule_work); | 2612 | EXPORT_SYMBOL(kblockd_schedule_work); |
2612 | 2613 | ||
2613 | int kblockd_schedule_delayed_work(struct request_queue *q, | ||
2614 | struct delayed_work *dwork, unsigned long delay) | ||
2615 | { | ||
2616 | return queue_delayed_work(kblockd_workqueue, dwork, delay); | ||
2617 | } | ||
2618 | EXPORT_SYMBOL(kblockd_schedule_delayed_work); | ||
2619 | |||
2620 | int __init blk_dev_init(void) | 2614 | int __init blk_dev_init(void) |
2621 | { | 2615 | { |
2622 | BUILD_BUG_ON(__REQ_NR_BITS > 8 * | 2616 | BUILD_BUG_ON(__REQ_NR_BITS > 8 * |
diff --git a/block/blk-flush.c b/block/blk-flush.c index 54b123d6563e..b27d0208611b 100644 --- a/block/blk-flush.c +++ b/block/blk-flush.c | |||
@@ -66,10 +66,12 @@ static void blk_flush_complete_seq_end_io(struct request_queue *q, | |||
66 | 66 | ||
67 | /* | 67 | /* |
68 | * Moving a request silently to empty queue_head may stall the | 68 | * Moving a request silently to empty queue_head may stall the |
69 | * queue. Kick the queue in those cases. | 69 | * queue. Kick the queue in those cases. This function is called |
70 | * from request completion path and calling directly into | ||
71 | * request_fn may confuse the driver. Always use kblockd. | ||
70 | */ | 72 | */ |
71 | if (was_empty && next_rq) | 73 | if (was_empty && next_rq) |
72 | __blk_run_queue(q); | 74 | __blk_run_queue(q, true); |
73 | } | 75 | } |
74 | 76 | ||
75 | static void pre_flush_end_io(struct request *rq, int error) | 77 | static void pre_flush_end_io(struct request *rq, int error) |
@@ -130,7 +132,7 @@ static struct request *queue_next_fseq(struct request_queue *q) | |||
130 | BUG(); | 132 | BUG(); |
131 | } | 133 | } |
132 | 134 | ||
133 | elv_insert(q, rq, ELEVATOR_INSERT_FRONT); | 135 | elv_insert(q, rq, ELEVATOR_INSERT_REQUEUE); |
134 | return rq; | 136 | return rq; |
135 | } | 137 | } |
136 | 138 | ||
diff --git a/block/blk-lib.c b/block/blk-lib.c index 1a320d2406b0..eec78becb355 100644 --- a/block/blk-lib.c +++ b/block/blk-lib.c | |||
@@ -132,7 +132,7 @@ static void bio_batch_end_io(struct bio *bio, int err) | |||
132 | } | 132 | } |
133 | 133 | ||
134 | /** | 134 | /** |
135 | * blkdev_issue_zeroout generate number of zero filed write bios | 135 | * blkdev_issue_zeroout - generate number of zero filed write bios |
136 | * @bdev: blockdev to issue | 136 | * @bdev: blockdev to issue |
137 | * @sector: start sector | 137 | * @sector: start sector |
138 | * @nr_sects: number of sectors to write | 138 | * @nr_sects: number of sectors to write |
diff --git a/block/blk-throttle.c b/block/blk-throttle.c index a89043a3caa4..e36cc10a346c 100644 --- a/block/blk-throttle.c +++ b/block/blk-throttle.c | |||
@@ -20,6 +20,11 @@ static int throtl_quantum = 32; | |||
20 | /* Throttling is performed over 100ms slice and after that slice is renewed */ | 20 | /* Throttling is performed over 100ms slice and after that slice is renewed */ |
21 | static unsigned long throtl_slice = HZ/10; /* 100 ms */ | 21 | static unsigned long throtl_slice = HZ/10; /* 100 ms */ |
22 | 22 | ||
23 | /* A workqueue to queue throttle related work */ | ||
24 | static struct workqueue_struct *kthrotld_workqueue; | ||
25 | static void throtl_schedule_delayed_work(struct throtl_data *td, | ||
26 | unsigned long delay); | ||
27 | |||
23 | struct throtl_rb_root { | 28 | struct throtl_rb_root { |
24 | struct rb_root rb; | 29 | struct rb_root rb; |
25 | struct rb_node *left; | 30 | struct rb_node *left; |
@@ -345,10 +350,9 @@ static void throtl_schedule_next_dispatch(struct throtl_data *td) | |||
345 | update_min_dispatch_time(st); | 350 | update_min_dispatch_time(st); |
346 | 351 | ||
347 | if (time_before_eq(st->min_disptime, jiffies)) | 352 | if (time_before_eq(st->min_disptime, jiffies)) |
348 | throtl_schedule_delayed_work(td->queue, 0); | 353 | throtl_schedule_delayed_work(td, 0); |
349 | else | 354 | else |
350 | throtl_schedule_delayed_work(td->queue, | 355 | throtl_schedule_delayed_work(td, (st->min_disptime - jiffies)); |
351 | (st->min_disptime - jiffies)); | ||
352 | } | 356 | } |
353 | 357 | ||
354 | static inline void | 358 | static inline void |
@@ -815,10 +819,10 @@ void blk_throtl_work(struct work_struct *work) | |||
815 | } | 819 | } |
816 | 820 | ||
817 | /* Call with queue lock held */ | 821 | /* Call with queue lock held */ |
818 | void throtl_schedule_delayed_work(struct request_queue *q, unsigned long delay) | 822 | static void |
823 | throtl_schedule_delayed_work(struct throtl_data *td, unsigned long delay) | ||
819 | { | 824 | { |
820 | 825 | ||
821 | struct throtl_data *td = q->td; | ||
822 | struct delayed_work *dwork = &td->throtl_work; | 826 | struct delayed_work *dwork = &td->throtl_work; |
823 | 827 | ||
824 | if (total_nr_queued(td) > 0) { | 828 | if (total_nr_queued(td) > 0) { |
@@ -827,12 +831,11 @@ void throtl_schedule_delayed_work(struct request_queue *q, unsigned long delay) | |||
827 | * Cancel that and schedule a new one. | 831 | * Cancel that and schedule a new one. |
828 | */ | 832 | */ |
829 | __cancel_delayed_work(dwork); | 833 | __cancel_delayed_work(dwork); |
830 | kblockd_schedule_delayed_work(q, dwork, delay); | 834 | queue_delayed_work(kthrotld_workqueue, dwork, delay); |
831 | throtl_log(td, "schedule work. delay=%lu jiffies=%lu", | 835 | throtl_log(td, "schedule work. delay=%lu jiffies=%lu", |
832 | delay, jiffies); | 836 | delay, jiffies); |
833 | } | 837 | } |
834 | } | 838 | } |
835 | EXPORT_SYMBOL(throtl_schedule_delayed_work); | ||
836 | 839 | ||
837 | static void | 840 | static void |
838 | throtl_destroy_tg(struct throtl_data *td, struct throtl_grp *tg) | 841 | throtl_destroy_tg(struct throtl_data *td, struct throtl_grp *tg) |
@@ -920,7 +923,7 @@ static void throtl_update_blkio_group_read_bps(void *key, | |||
920 | smp_mb__after_atomic_inc(); | 923 | smp_mb__after_atomic_inc(); |
921 | 924 | ||
922 | /* Schedule a work now to process the limit change */ | 925 | /* Schedule a work now to process the limit change */ |
923 | throtl_schedule_delayed_work(td->queue, 0); | 926 | throtl_schedule_delayed_work(td, 0); |
924 | } | 927 | } |
925 | 928 | ||
926 | static void throtl_update_blkio_group_write_bps(void *key, | 929 | static void throtl_update_blkio_group_write_bps(void *key, |
@@ -934,7 +937,7 @@ static void throtl_update_blkio_group_write_bps(void *key, | |||
934 | smp_mb__before_atomic_inc(); | 937 | smp_mb__before_atomic_inc(); |
935 | atomic_inc(&td->limits_changed); | 938 | atomic_inc(&td->limits_changed); |
936 | smp_mb__after_atomic_inc(); | 939 | smp_mb__after_atomic_inc(); |
937 | throtl_schedule_delayed_work(td->queue, 0); | 940 | throtl_schedule_delayed_work(td, 0); |
938 | } | 941 | } |
939 | 942 | ||
940 | static void throtl_update_blkio_group_read_iops(void *key, | 943 | static void throtl_update_blkio_group_read_iops(void *key, |
@@ -948,7 +951,7 @@ static void throtl_update_blkio_group_read_iops(void *key, | |||
948 | smp_mb__before_atomic_inc(); | 951 | smp_mb__before_atomic_inc(); |
949 | atomic_inc(&td->limits_changed); | 952 | atomic_inc(&td->limits_changed); |
950 | smp_mb__after_atomic_inc(); | 953 | smp_mb__after_atomic_inc(); |
951 | throtl_schedule_delayed_work(td->queue, 0); | 954 | throtl_schedule_delayed_work(td, 0); |
952 | } | 955 | } |
953 | 956 | ||
954 | static void throtl_update_blkio_group_write_iops(void *key, | 957 | static void throtl_update_blkio_group_write_iops(void *key, |
@@ -962,7 +965,7 @@ static void throtl_update_blkio_group_write_iops(void *key, | |||
962 | smp_mb__before_atomic_inc(); | 965 | smp_mb__before_atomic_inc(); |
963 | atomic_inc(&td->limits_changed); | 966 | atomic_inc(&td->limits_changed); |
964 | smp_mb__after_atomic_inc(); | 967 | smp_mb__after_atomic_inc(); |
965 | throtl_schedule_delayed_work(td->queue, 0); | 968 | throtl_schedule_delayed_work(td, 0); |
966 | } | 969 | } |
967 | 970 | ||
968 | void throtl_shutdown_timer_wq(struct request_queue *q) | 971 | void throtl_shutdown_timer_wq(struct request_queue *q) |
@@ -1135,6 +1138,10 @@ void blk_throtl_exit(struct request_queue *q) | |||
1135 | 1138 | ||
1136 | static int __init throtl_init(void) | 1139 | static int __init throtl_init(void) |
1137 | { | 1140 | { |
1141 | kthrotld_workqueue = alloc_workqueue("kthrotld", WQ_MEM_RECLAIM, 0); | ||
1142 | if (!kthrotld_workqueue) | ||
1143 | panic("Failed to create kthrotld\n"); | ||
1144 | |||
1138 | blkio_policy_register(&blkio_policy_throtl); | 1145 | blkio_policy_register(&blkio_policy_throtl); |
1139 | return 0; | 1146 | return 0; |
1140 | } | 1147 | } |
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 7be4c7959625..ea83a4f0c27d 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c | |||
@@ -3355,7 +3355,7 @@ cfq_rq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq, | |||
3355 | cfqd->busy_queues > 1) { | 3355 | cfqd->busy_queues > 1) { |
3356 | cfq_del_timer(cfqd, cfqq); | 3356 | cfq_del_timer(cfqd, cfqq); |
3357 | cfq_clear_cfqq_wait_request(cfqq); | 3357 | cfq_clear_cfqq_wait_request(cfqq); |
3358 | __blk_run_queue(cfqd->queue); | 3358 | __blk_run_queue(cfqd->queue, false); |
3359 | } else { | 3359 | } else { |
3360 | cfq_blkiocg_update_idle_time_stats( | 3360 | cfq_blkiocg_update_idle_time_stats( |
3361 | &cfqq->cfqg->blkg); | 3361 | &cfqq->cfqg->blkg); |
@@ -3370,7 +3370,7 @@ cfq_rq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq, | |||
3370 | * this new queue is RT and the current one is BE | 3370 | * this new queue is RT and the current one is BE |
3371 | */ | 3371 | */ |
3372 | cfq_preempt_queue(cfqd, cfqq); | 3372 | cfq_preempt_queue(cfqd, cfqq); |
3373 | __blk_run_queue(cfqd->queue); | 3373 | __blk_run_queue(cfqd->queue, false); |
3374 | } | 3374 | } |
3375 | } | 3375 | } |
3376 | 3376 | ||
@@ -3731,7 +3731,7 @@ static void cfq_kick_queue(struct work_struct *work) | |||
3731 | struct request_queue *q = cfqd->queue; | 3731 | struct request_queue *q = cfqd->queue; |
3732 | 3732 | ||
3733 | spin_lock_irq(q->queue_lock); | 3733 | spin_lock_irq(q->queue_lock); |
3734 | __blk_run_queue(cfqd->queue); | 3734 | __blk_run_queue(cfqd->queue, false); |
3735 | spin_unlock_irq(q->queue_lock); | 3735 | spin_unlock_irq(q->queue_lock); |
3736 | } | 3736 | } |
3737 | 3737 | ||
diff --git a/block/elevator.c b/block/elevator.c index 2569512830d3..236e93c1f46c 100644 --- a/block/elevator.c +++ b/block/elevator.c | |||
@@ -602,7 +602,7 @@ void elv_quiesce_start(struct request_queue *q) | |||
602 | */ | 602 | */ |
603 | elv_drain_elevator(q); | 603 | elv_drain_elevator(q); |
604 | while (q->rq.elvpriv) { | 604 | while (q->rq.elvpriv) { |
605 | __blk_run_queue(q); | 605 | __blk_run_queue(q, false); |
606 | spin_unlock_irq(q->queue_lock); | 606 | spin_unlock_irq(q->queue_lock); |
607 | msleep(10); | 607 | msleep(10); |
608 | spin_lock_irq(q->queue_lock); | 608 | spin_lock_irq(q->queue_lock); |
@@ -651,7 +651,7 @@ void elv_insert(struct request_queue *q, struct request *rq, int where) | |||
651 | * with anything. There's no point in delaying queue | 651 | * with anything. There's no point in delaying queue |
652 | * processing. | 652 | * processing. |
653 | */ | 653 | */ |
654 | __blk_run_queue(q); | 654 | __blk_run_queue(q, false); |
655 | break; | 655 | break; |
656 | 656 | ||
657 | case ELEVATOR_INSERT_SORT: | 657 | case ELEVATOR_INSERT_SORT: |
diff --git a/block/genhd.c b/block/genhd.c index 6a5b772aa201..cbf1112a885c 100644 --- a/block/genhd.c +++ b/block/genhd.c | |||
@@ -1355,7 +1355,7 @@ int invalidate_partition(struct gendisk *disk, int partno) | |||
1355 | struct block_device *bdev = bdget_disk(disk, partno); | 1355 | struct block_device *bdev = bdget_disk(disk, partno); |
1356 | if (bdev) { | 1356 | if (bdev) { |
1357 | fsync_bdev(bdev); | 1357 | fsync_bdev(bdev); |
1358 | res = __invalidate_device(bdev); | 1358 | res = __invalidate_device(bdev, true); |
1359 | bdput(bdev); | 1359 | bdput(bdev); |
1360 | } | 1360 | } |
1361 | return res; | 1361 | return res; |
diff --git a/block/ioctl.c b/block/ioctl.c index 9049d460fa89..1124cd297263 100644 --- a/block/ioctl.c +++ b/block/ioctl.c | |||
@@ -294,9 +294,11 @@ int blkdev_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd, | |||
294 | return -EINVAL; | 294 | return -EINVAL; |
295 | if (get_user(n, (int __user *) arg)) | 295 | if (get_user(n, (int __user *) arg)) |
296 | return -EFAULT; | 296 | return -EFAULT; |
297 | if (!(mode & FMODE_EXCL) && | 297 | if (!(mode & FMODE_EXCL)) { |
298 | blkdev_get(bdev, mode | FMODE_EXCL, &bdev) < 0) | 298 | bdgrab(bdev); |
299 | return -EBUSY; | 299 | if (blkdev_get(bdev, mode | FMODE_EXCL, &bdev) < 0) |
300 | return -EBUSY; | ||
301 | } | ||
300 | ret = set_blocksize(bdev, n); | 302 | ret = set_blocksize(bdev, n); |
301 | if (!(mode & FMODE_EXCL)) | 303 | if (!(mode & FMODE_EXCL)) |
302 | blkdev_put(bdev, mode | FMODE_EXCL); | 304 | blkdev_put(bdev, mode | FMODE_EXCL); |
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h index 54784bb42cec..edc25867ad9d 100644 --- a/drivers/acpi/acpica/aclocal.h +++ b/drivers/acpi/acpica/aclocal.h | |||
@@ -416,10 +416,15 @@ struct acpi_gpe_handler_info { | |||
416 | u8 originally_enabled; /* True if GPE was originally enabled */ | 416 | u8 originally_enabled; /* True if GPE was originally enabled */ |
417 | }; | 417 | }; |
418 | 418 | ||
419 | struct acpi_gpe_notify_object { | ||
420 | struct acpi_namespace_node *node; | ||
421 | struct acpi_gpe_notify_object *next; | ||
422 | }; | ||
423 | |||
419 | union acpi_gpe_dispatch_info { | 424 | union acpi_gpe_dispatch_info { |
420 | struct acpi_namespace_node *method_node; /* Method node for this GPE level */ | 425 | struct acpi_namespace_node *method_node; /* Method node for this GPE level */ |
421 | struct acpi_gpe_handler_info *handler; /* Installed GPE handler */ | 426 | struct acpi_gpe_handler_info *handler; /* Installed GPE handler */ |
422 | struct acpi_namespace_node *device_node; /* Parent _PRW device for implicit notify */ | 427 | struct acpi_gpe_notify_object device; /* List of _PRW devices for implicit notify */ |
423 | }; | 428 | }; |
424 | 429 | ||
425 | /* | 430 | /* |
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c index 14988a86066f..f4725212eb48 100644 --- a/drivers/acpi/acpica/evgpe.c +++ b/drivers/acpi/acpica/evgpe.c | |||
@@ -457,6 +457,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context) | |||
457 | acpi_status status; | 457 | acpi_status status; |
458 | struct acpi_gpe_event_info *local_gpe_event_info; | 458 | struct acpi_gpe_event_info *local_gpe_event_info; |
459 | struct acpi_evaluate_info *info; | 459 | struct acpi_evaluate_info *info; |
460 | struct acpi_gpe_notify_object *notify_object; | ||
460 | 461 | ||
461 | ACPI_FUNCTION_TRACE(ev_asynch_execute_gpe_method); | 462 | ACPI_FUNCTION_TRACE(ev_asynch_execute_gpe_method); |
462 | 463 | ||
@@ -508,10 +509,18 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context) | |||
508 | * from this thread -- because handlers may in turn run other | 509 | * from this thread -- because handlers may in turn run other |
509 | * control methods. | 510 | * control methods. |
510 | */ | 511 | */ |
511 | status = | 512 | status = acpi_ev_queue_notify_request( |
512 | acpi_ev_queue_notify_request(local_gpe_event_info->dispatch. | 513 | local_gpe_event_info->dispatch.device.node, |
513 | device_node, | 514 | ACPI_NOTIFY_DEVICE_WAKE); |
514 | ACPI_NOTIFY_DEVICE_WAKE); | 515 | |
516 | notify_object = local_gpe_event_info->dispatch.device.next; | ||
517 | while (ACPI_SUCCESS(status) && notify_object) { | ||
518 | status = acpi_ev_queue_notify_request( | ||
519 | notify_object->node, | ||
520 | ACPI_NOTIFY_DEVICE_WAKE); | ||
521 | notify_object = notify_object->next; | ||
522 | } | ||
523 | |||
515 | break; | 524 | break; |
516 | 525 | ||
517 | case ACPI_GPE_DISPATCH_METHOD: | 526 | case ACPI_GPE_DISPATCH_METHOD: |
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c index 3b20a3401b64..52aaff3df562 100644 --- a/drivers/acpi/acpica/evxfgpe.c +++ b/drivers/acpi/acpica/evxfgpe.c | |||
@@ -198,7 +198,9 @@ acpi_setup_gpe_for_wake(acpi_handle wake_device, | |||
198 | acpi_status status = AE_BAD_PARAMETER; | 198 | acpi_status status = AE_BAD_PARAMETER; |
199 | struct acpi_gpe_event_info *gpe_event_info; | 199 | struct acpi_gpe_event_info *gpe_event_info; |
200 | struct acpi_namespace_node *device_node; | 200 | struct acpi_namespace_node *device_node; |
201 | struct acpi_gpe_notify_object *notify_object; | ||
201 | acpi_cpu_flags flags; | 202 | acpi_cpu_flags flags; |
203 | u8 gpe_dispatch_mask; | ||
202 | 204 | ||
203 | ACPI_FUNCTION_TRACE(acpi_setup_gpe_for_wake); | 205 | ACPI_FUNCTION_TRACE(acpi_setup_gpe_for_wake); |
204 | 206 | ||
@@ -221,27 +223,49 @@ acpi_setup_gpe_for_wake(acpi_handle wake_device, | |||
221 | goto unlock_and_exit; | 223 | goto unlock_and_exit; |
222 | } | 224 | } |
223 | 225 | ||
226 | if (wake_device == ACPI_ROOT_OBJECT) { | ||
227 | goto out; | ||
228 | } | ||
229 | |||
224 | /* | 230 | /* |
225 | * If there is no method or handler for this GPE, then the | 231 | * If there is no method or handler for this GPE, then the |
226 | * wake_device will be notified whenever this GPE fires (aka | 232 | * wake_device will be notified whenever this GPE fires (aka |
227 | * "implicit notify") Note: The GPE is assumed to be | 233 | * "implicit notify") Note: The GPE is assumed to be |
228 | * level-triggered (for windows compatibility). | 234 | * level-triggered (for windows compatibility). |
229 | */ | 235 | */ |
230 | if (((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) == | 236 | gpe_dispatch_mask = gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK; |
231 | ACPI_GPE_DISPATCH_NONE) && (wake_device != ACPI_ROOT_OBJECT)) { | 237 | if (gpe_dispatch_mask != ACPI_GPE_DISPATCH_NONE |
238 | && gpe_dispatch_mask != ACPI_GPE_DISPATCH_NOTIFY) { | ||
239 | goto out; | ||
240 | } | ||
232 | 241 | ||
233 | /* Validate wake_device is of type Device */ | 242 | /* Validate wake_device is of type Device */ |
234 | 243 | ||
235 | device_node = ACPI_CAST_PTR(struct acpi_namespace_node, | 244 | device_node = ACPI_CAST_PTR(struct acpi_namespace_node, wake_device); |
236 | wake_device); | 245 | if (device_node->type != ACPI_TYPE_DEVICE) { |
237 | if (device_node->type != ACPI_TYPE_DEVICE) { | 246 | goto unlock_and_exit; |
238 | goto unlock_and_exit; | 247 | } |
239 | } | 248 | |
249 | if (gpe_dispatch_mask == ACPI_GPE_DISPATCH_NONE) { | ||
240 | gpe_event_info->flags = (ACPI_GPE_DISPATCH_NOTIFY | | 250 | gpe_event_info->flags = (ACPI_GPE_DISPATCH_NOTIFY | |
241 | ACPI_GPE_LEVEL_TRIGGERED); | 251 | ACPI_GPE_LEVEL_TRIGGERED); |
242 | gpe_event_info->dispatch.device_node = device_node; | 252 | gpe_event_info->dispatch.device.node = device_node; |
253 | gpe_event_info->dispatch.device.next = NULL; | ||
254 | } else { | ||
255 | /* There are multiple devices to notify implicitly. */ | ||
256 | |||
257 | notify_object = ACPI_ALLOCATE_ZEROED(sizeof(*notify_object)); | ||
258 | if (!notify_object) { | ||
259 | status = AE_NO_MEMORY; | ||
260 | goto unlock_and_exit; | ||
261 | } | ||
262 | |||
263 | notify_object->node = device_node; | ||
264 | notify_object->next = gpe_event_info->dispatch.device.next; | ||
265 | gpe_event_info->dispatch.device.next = notify_object; | ||
243 | } | 266 | } |
244 | 267 | ||
268 | out: | ||
245 | gpe_event_info->flags |= ACPI_GPE_CAN_WAKE; | 269 | gpe_event_info->flags |= ACPI_GPE_CAN_WAKE; |
246 | status = AE_OK; | 270 | status = AE_OK; |
247 | 271 | ||
diff --git a/drivers/acpi/debugfs.c b/drivers/acpi/debugfs.c index 5df67f1d6c61..384f7abcff77 100644 --- a/drivers/acpi/debugfs.c +++ b/drivers/acpi/debugfs.c | |||
@@ -26,7 +26,9 @@ static ssize_t cm_write(struct file *file, const char __user * user_buf, | |||
26 | size_t count, loff_t *ppos) | 26 | size_t count, loff_t *ppos) |
27 | { | 27 | { |
28 | static char *buf; | 28 | static char *buf; |
29 | static int uncopied_bytes; | 29 | static u32 max_size; |
30 | static u32 uncopied_bytes; | ||
31 | |||
30 | struct acpi_table_header table; | 32 | struct acpi_table_header table; |
31 | acpi_status status; | 33 | acpi_status status; |
32 | 34 | ||
@@ -37,19 +39,24 @@ static ssize_t cm_write(struct file *file, const char __user * user_buf, | |||
37 | if (copy_from_user(&table, user_buf, | 39 | if (copy_from_user(&table, user_buf, |
38 | sizeof(struct acpi_table_header))) | 40 | sizeof(struct acpi_table_header))) |
39 | return -EFAULT; | 41 | return -EFAULT; |
40 | uncopied_bytes = table.length; | 42 | uncopied_bytes = max_size = table.length; |
41 | buf = kzalloc(uncopied_bytes, GFP_KERNEL); | 43 | buf = kzalloc(max_size, GFP_KERNEL); |
42 | if (!buf) | 44 | if (!buf) |
43 | return -ENOMEM; | 45 | return -ENOMEM; |
44 | } | 46 | } |
45 | 47 | ||
46 | if (uncopied_bytes < count) { | 48 | if (buf == NULL) |
47 | kfree(buf); | 49 | return -EINVAL; |
50 | |||
51 | if ((*ppos > max_size) || | ||
52 | (*ppos + count > max_size) || | ||
53 | (*ppos + count < count) || | ||
54 | (count > uncopied_bytes)) | ||
48 | return -EINVAL; | 55 | return -EINVAL; |
49 | } | ||
50 | 56 | ||
51 | if (copy_from_user(buf + (*ppos), user_buf, count)) { | 57 | if (copy_from_user(buf + (*ppos), user_buf, count)) { |
52 | kfree(buf); | 58 | kfree(buf); |
59 | buf = NULL; | ||
53 | return -EFAULT; | 60 | return -EFAULT; |
54 | } | 61 | } |
55 | 62 | ||
@@ -59,6 +66,7 @@ static ssize_t cm_write(struct file *file, const char __user * user_buf, | |||
59 | if (!uncopied_bytes) { | 66 | if (!uncopied_bytes) { |
60 | status = acpi_install_method(buf); | 67 | status = acpi_install_method(buf); |
61 | kfree(buf); | 68 | kfree(buf); |
69 | buf = NULL; | ||
62 | if (ACPI_FAILURE(status)) | 70 | if (ACPI_FAILURE(status)) |
63 | return -EINVAL; | 71 | return -EINVAL; |
64 | add_taint(TAINT_OVERRIDDEN_ACPI_TABLE); | 72 | add_taint(TAINT_OVERRIDDEN_ACPI_TABLE); |
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c index 73fb1c4f4cd4..25ef1a4556e6 100644 --- a/drivers/atm/solos-pci.c +++ b/drivers/atm/solos-pci.c | |||
@@ -866,8 +866,9 @@ static int popen(struct atm_vcc *vcc) | |||
866 | } | 866 | } |
867 | 867 | ||
868 | skb = alloc_skb(sizeof(*header), GFP_ATOMIC); | 868 | skb = alloc_skb(sizeof(*header), GFP_ATOMIC); |
869 | if (!skb && net_ratelimit()) { | 869 | if (!skb) { |
870 | dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); | 870 | if (net_ratelimit()) |
871 | dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); | ||
871 | return -ENOMEM; | 872 | return -ENOMEM; |
872 | } | 873 | } |
873 | header = (void *)skb_put(skb, sizeof(*header)); | 874 | header = (void *)skb_put(skb, sizeof(*header)); |
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c index b9ba04fc2b34..77fc76f8aea9 100644 --- a/drivers/block/floppy.c +++ b/drivers/block/floppy.c | |||
@@ -3281,7 +3281,7 @@ static int set_geometry(unsigned int cmd, struct floppy_struct *g, | |||
3281 | struct block_device *bdev = opened_bdev[cnt]; | 3281 | struct block_device *bdev = opened_bdev[cnt]; |
3282 | if (!bdev || ITYPE(drive_state[cnt].fd_device) != type) | 3282 | if (!bdev || ITYPE(drive_state[cnt].fd_device) != type) |
3283 | continue; | 3283 | continue; |
3284 | __invalidate_device(bdev); | 3284 | __invalidate_device(bdev, true); |
3285 | } | 3285 | } |
3286 | mutex_unlock(&open_lock); | 3286 | mutex_unlock(&open_lock); |
3287 | } else { | 3287 | } else { |
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index 49e6a545eb63..dbf31ec9114d 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
@@ -78,7 +78,6 @@ | |||
78 | 78 | ||
79 | #include <asm/uaccess.h> | 79 | #include <asm/uaccess.h> |
80 | 80 | ||
81 | static DEFINE_MUTEX(loop_mutex); | ||
82 | static LIST_HEAD(loop_devices); | 81 | static LIST_HEAD(loop_devices); |
83 | static DEFINE_MUTEX(loop_devices_mutex); | 82 | static DEFINE_MUTEX(loop_devices_mutex); |
84 | 83 | ||
@@ -1501,11 +1500,9 @@ static int lo_open(struct block_device *bdev, fmode_t mode) | |||
1501 | { | 1500 | { |
1502 | struct loop_device *lo = bdev->bd_disk->private_data; | 1501 | struct loop_device *lo = bdev->bd_disk->private_data; |
1503 | 1502 | ||
1504 | mutex_lock(&loop_mutex); | ||
1505 | mutex_lock(&lo->lo_ctl_mutex); | 1503 | mutex_lock(&lo->lo_ctl_mutex); |
1506 | lo->lo_refcnt++; | 1504 | lo->lo_refcnt++; |
1507 | mutex_unlock(&lo->lo_ctl_mutex); | 1505 | mutex_unlock(&lo->lo_ctl_mutex); |
1508 | mutex_unlock(&loop_mutex); | ||
1509 | 1506 | ||
1510 | return 0; | 1507 | return 0; |
1511 | } | 1508 | } |
@@ -1515,7 +1512,6 @@ static int lo_release(struct gendisk *disk, fmode_t mode) | |||
1515 | struct loop_device *lo = disk->private_data; | 1512 | struct loop_device *lo = disk->private_data; |
1516 | int err; | 1513 | int err; |
1517 | 1514 | ||
1518 | mutex_lock(&loop_mutex); | ||
1519 | mutex_lock(&lo->lo_ctl_mutex); | 1515 | mutex_lock(&lo->lo_ctl_mutex); |
1520 | 1516 | ||
1521 | if (--lo->lo_refcnt) | 1517 | if (--lo->lo_refcnt) |
@@ -1540,7 +1536,6 @@ static int lo_release(struct gendisk *disk, fmode_t mode) | |||
1540 | out: | 1536 | out: |
1541 | mutex_unlock(&lo->lo_ctl_mutex); | 1537 | mutex_unlock(&lo->lo_ctl_mutex); |
1542 | out_unlocked: | 1538 | out_unlocked: |
1543 | mutex_unlock(&loop_mutex); | ||
1544 | return 0; | 1539 | return 0; |
1545 | } | 1540 | } |
1546 | 1541 | ||
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c index a126e614601f..6dcd55a74c0a 100644 --- a/drivers/bluetooth/ath3k.c +++ b/drivers/bluetooth/ath3k.c | |||
@@ -39,6 +39,11 @@ static struct usb_device_id ath3k_table[] = { | |||
39 | /* Atheros AR3011 with sflash firmware*/ | 39 | /* Atheros AR3011 with sflash firmware*/ |
40 | { USB_DEVICE(0x0CF3, 0x3002) }, | 40 | { USB_DEVICE(0x0CF3, 0x3002) }, |
41 | 41 | ||
42 | /* Atheros AR9285 Malbec with sflash firmware */ | ||
43 | { USB_DEVICE(0x03F0, 0x311D) }, | ||
44 | |||
45 | /* Atheros AR5BBU12 with sflash firmware */ | ||
46 | { USB_DEVICE(0x0489, 0xE02C) }, | ||
42 | { } /* Terminating entry */ | 47 | { } /* Terminating entry */ |
43 | }; | 48 | }; |
44 | 49 | ||
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index 1da773f899a2..700a3840fddc 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c | |||
@@ -102,6 +102,12 @@ static struct usb_device_id blacklist_table[] = { | |||
102 | /* Atheros 3011 with sflash firmware */ | 102 | /* Atheros 3011 with sflash firmware */ |
103 | { USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE }, | 103 | { USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE }, |
104 | 104 | ||
105 | /* Atheros AR9285 Malbec with sflash firmware */ | ||
106 | { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE }, | ||
107 | |||
108 | /* Atheros AR5BBU12 with sflash firmware */ | ||
109 | { USB_DEVICE(0x0489, 0xe02c), .driver_info = BTUSB_IGNORE }, | ||
110 | |||
105 | /* Broadcom BCM2035 */ | 111 | /* Broadcom BCM2035 */ |
106 | { USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_WRONG_SCO_MTU }, | 112 | { USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_WRONG_SCO_MTU }, |
107 | { USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_WRONG_SCO_MTU }, | 113 | { USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_WRONG_SCO_MTU }, |
@@ -826,7 +832,7 @@ static void btusb_work(struct work_struct *work) | |||
826 | 832 | ||
827 | if (hdev->conn_hash.sco_num > 0) { | 833 | if (hdev->conn_hash.sco_num > 0) { |
828 | if (!test_bit(BTUSB_DID_ISO_RESUME, &data->flags)) { | 834 | if (!test_bit(BTUSB_DID_ISO_RESUME, &data->flags)) { |
829 | err = usb_autopm_get_interface(data->isoc); | 835 | err = usb_autopm_get_interface(data->isoc ? data->isoc : data->intf); |
830 | if (err < 0) { | 836 | if (err < 0) { |
831 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); | 837 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); |
832 | usb_kill_anchored_urbs(&data->isoc_anchor); | 838 | usb_kill_anchored_urbs(&data->isoc_anchor); |
@@ -855,7 +861,7 @@ static void btusb_work(struct work_struct *work) | |||
855 | 861 | ||
856 | __set_isoc_interface(hdev, 0); | 862 | __set_isoc_interface(hdev, 0); |
857 | if (test_and_clear_bit(BTUSB_DID_ISO_RESUME, &data->flags)) | 863 | if (test_and_clear_bit(BTUSB_DID_ISO_RESUME, &data->flags)) |
858 | usb_autopm_put_interface(data->isoc); | 864 | usb_autopm_put_interface(data->isoc ? data->isoc : data->intf); |
859 | } | 865 | } |
860 | } | 866 | } |
861 | 867 | ||
@@ -1038,8 +1044,6 @@ static int btusb_probe(struct usb_interface *intf, | |||
1038 | 1044 | ||
1039 | usb_set_intfdata(intf, data); | 1045 | usb_set_intfdata(intf, data); |
1040 | 1046 | ||
1041 | usb_enable_autosuspend(interface_to_usbdev(intf)); | ||
1042 | |||
1043 | return 0; | 1047 | return 0; |
1044 | } | 1048 | } |
1045 | 1049 | ||
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c index 9252e85706ef..780498d76581 100644 --- a/drivers/char/agp/amd64-agp.c +++ b/drivers/char/agp/amd64-agp.c | |||
@@ -773,18 +773,23 @@ int __init agp_amd64_init(void) | |||
773 | #else | 773 | #else |
774 | printk(KERN_INFO PFX "You can boot with agp=try_unsupported\n"); | 774 | printk(KERN_INFO PFX "You can boot with agp=try_unsupported\n"); |
775 | #endif | 775 | #endif |
776 | pci_unregister_driver(&agp_amd64_pci_driver); | ||
776 | return -ENODEV; | 777 | return -ENODEV; |
777 | } | 778 | } |
778 | 779 | ||
779 | /* First check that we have at least one AMD64 NB */ | 780 | /* First check that we have at least one AMD64 NB */ |
780 | if (!pci_dev_present(amd_nb_misc_ids)) | 781 | if (!pci_dev_present(amd_nb_misc_ids)) { |
782 | pci_unregister_driver(&agp_amd64_pci_driver); | ||
781 | return -ENODEV; | 783 | return -ENODEV; |
784 | } | ||
782 | 785 | ||
783 | /* Look for any AGP bridge */ | 786 | /* Look for any AGP bridge */ |
784 | agp_amd64_pci_driver.id_table = agp_amd64_pci_promisc_table; | 787 | agp_amd64_pci_driver.id_table = agp_amd64_pci_promisc_table; |
785 | err = driver_attach(&agp_amd64_pci_driver.driver); | 788 | err = driver_attach(&agp_amd64_pci_driver.driver); |
786 | if (err == 0 && agp_bridges_found == 0) | 789 | if (err == 0 && agp_bridges_found == 0) { |
790 | pci_unregister_driver(&agp_amd64_pci_driver); | ||
787 | err = -ENODEV; | 791 | err = -ENODEV; |
792 | } | ||
788 | } | 793 | } |
789 | return err; | 794 | return err; |
790 | } | 795 | } |
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index c195bfeade11..5feebe2800e9 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h | |||
@@ -130,6 +130,7 @@ | |||
130 | #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) | 130 | #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) |
131 | 131 | ||
132 | #define I915_IFPADDR 0x60 | 132 | #define I915_IFPADDR 0x60 |
133 | #define I830_HIC 0x70 | ||
133 | 134 | ||
134 | /* Intel 965G registers */ | 135 | /* Intel 965G registers */ |
135 | #define I965_MSAC 0x62 | 136 | #define I965_MSAC 0x62 |
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index fab3d3265adb..0d09b537bb9a 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/pagemap.h> | 22 | #include <linux/pagemap.h> |
23 | #include <linux/agp_backend.h> | 23 | #include <linux/agp_backend.h> |
24 | #include <linux/delay.h> | ||
24 | #include <asm/smp.h> | 25 | #include <asm/smp.h> |
25 | #include "agp.h" | 26 | #include "agp.h" |
26 | #include "intel-agp.h" | 27 | #include "intel-agp.h" |
@@ -70,12 +71,8 @@ static struct _intel_private { | |||
70 | u32 __iomem *gtt; /* I915G */ | 71 | u32 __iomem *gtt; /* I915G */ |
71 | bool clear_fake_agp; /* on first access via agp, fill with scratch */ | 72 | bool clear_fake_agp; /* on first access via agp, fill with scratch */ |
72 | int num_dcache_entries; | 73 | int num_dcache_entries; |
73 | union { | 74 | void __iomem *i9xx_flush_page; |
74 | void __iomem *i9xx_flush_page; | ||
75 | void *i8xx_flush_page; | ||
76 | }; | ||
77 | char *i81x_gtt_table; | 75 | char *i81x_gtt_table; |
78 | struct page *i8xx_page; | ||
79 | struct resource ifp_resource; | 76 | struct resource ifp_resource; |
80 | int resource_valid; | 77 | int resource_valid; |
81 | struct page *scratch_page; | 78 | struct page *scratch_page; |
@@ -722,28 +719,6 @@ static int intel_fake_agp_fetch_size(void) | |||
722 | 719 | ||
723 | static void i830_cleanup(void) | 720 | static void i830_cleanup(void) |
724 | { | 721 | { |
725 | if (intel_private.i8xx_flush_page) { | ||
726 | kunmap(intel_private.i8xx_flush_page); | ||
727 | intel_private.i8xx_flush_page = NULL; | ||
728 | } | ||
729 | |||
730 | __free_page(intel_private.i8xx_page); | ||
731 | intel_private.i8xx_page = NULL; | ||
732 | } | ||
733 | |||
734 | static void intel_i830_setup_flush(void) | ||
735 | { | ||
736 | /* return if we've already set the flush mechanism up */ | ||
737 | if (intel_private.i8xx_page) | ||
738 | return; | ||
739 | |||
740 | intel_private.i8xx_page = alloc_page(GFP_KERNEL); | ||
741 | if (!intel_private.i8xx_page) | ||
742 | return; | ||
743 | |||
744 | intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page); | ||
745 | if (!intel_private.i8xx_flush_page) | ||
746 | i830_cleanup(); | ||
747 | } | 722 | } |
748 | 723 | ||
749 | /* The chipset_flush interface needs to get data that has already been | 724 | /* The chipset_flush interface needs to get data that has already been |
@@ -758,14 +733,27 @@ static void intel_i830_setup_flush(void) | |||
758 | */ | 733 | */ |
759 | static void i830_chipset_flush(void) | 734 | static void i830_chipset_flush(void) |
760 | { | 735 | { |
761 | unsigned int *pg = intel_private.i8xx_flush_page; | 736 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); |
737 | |||
738 | /* Forcibly evict everything from the CPU write buffers. | ||
739 | * clflush appears to be insufficient. | ||
740 | */ | ||
741 | wbinvd_on_all_cpus(); | ||
742 | |||
743 | /* Now we've only seen documents for this magic bit on 855GM, | ||
744 | * we hope it exists for the other gen2 chipsets... | ||
745 | * | ||
746 | * Also works as advertised on my 845G. | ||
747 | */ | ||
748 | writel(readl(intel_private.registers+I830_HIC) | (1<<31), | ||
749 | intel_private.registers+I830_HIC); | ||
762 | 750 | ||
763 | memset(pg, 0, 1024); | 751 | while (readl(intel_private.registers+I830_HIC) & (1<<31)) { |
752 | if (time_after(jiffies, timeout)) | ||
753 | break; | ||
764 | 754 | ||
765 | if (cpu_has_clflush) | 755 | udelay(50); |
766 | clflush_cache_range(pg, 1024); | 756 | } |
767 | else if (wbinvd_on_all_cpus() != 0) | ||
768 | printk(KERN_ERR "Timed out waiting for cache flush.\n"); | ||
769 | } | 757 | } |
770 | 758 | ||
771 | static void i830_write_entry(dma_addr_t addr, unsigned int entry, | 759 | static void i830_write_entry(dma_addr_t addr, unsigned int entry, |
@@ -849,8 +837,6 @@ static int i830_setup(void) | |||
849 | 837 | ||
850 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; | 838 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; |
851 | 839 | ||
852 | intel_i830_setup_flush(); | ||
853 | |||
854 | return 0; | 840 | return 0; |
855 | } | 841 | } |
856 | 842 | ||
diff --git a/drivers/char/pcmcia/cm4000_cs.c b/drivers/char/pcmcia/cm4000_cs.c index 777181a2e603..bcbbc71febb7 100644 --- a/drivers/char/pcmcia/cm4000_cs.c +++ b/drivers/char/pcmcia/cm4000_cs.c | |||
@@ -830,8 +830,7 @@ static void monitor_card(unsigned long p) | |||
830 | test_bit(IS_ANY_T1, &dev->flags))) { | 830 | test_bit(IS_ANY_T1, &dev->flags))) { |
831 | DEBUGP(4, dev, "Perform AUTOPPS\n"); | 831 | DEBUGP(4, dev, "Perform AUTOPPS\n"); |
832 | set_bit(IS_AUTOPPS_ACT, &dev->flags); | 832 | set_bit(IS_AUTOPPS_ACT, &dev->flags); |
833 | ptsreq.protocol = ptsreq.protocol = | 833 | ptsreq.protocol = (0x01 << dev->proto); |
834 | (0x01 << dev->proto); | ||
835 | ptsreq.flags = 0x01; | 834 | ptsreq.flags = 0x01; |
836 | ptsreq.pts1 = 0x00; | 835 | ptsreq.pts1 = 0x00; |
837 | ptsreq.pts2 = 0x00; | 836 | ptsreq.pts2 = 0x00; |
diff --git a/drivers/char/pcmcia/ipwireless/main.c b/drivers/char/pcmcia/ipwireless/main.c index 94b8eb4d691d..444155a305ae 100644 --- a/drivers/char/pcmcia/ipwireless/main.c +++ b/drivers/char/pcmcia/ipwireless/main.c | |||
@@ -78,7 +78,6 @@ static void signalled_reboot_callback(void *callback_data) | |||
78 | static int ipwireless_probe(struct pcmcia_device *p_dev, void *priv_data) | 78 | static int ipwireless_probe(struct pcmcia_device *p_dev, void *priv_data) |
79 | { | 79 | { |
80 | struct ipw_dev *ipw = priv_data; | 80 | struct ipw_dev *ipw = priv_data; |
81 | struct resource *io_resource; | ||
82 | int ret; | 81 | int ret; |
83 | 82 | ||
84 | p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; | 83 | p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; |
@@ -92,9 +91,12 @@ static int ipwireless_probe(struct pcmcia_device *p_dev, void *priv_data) | |||
92 | if (ret) | 91 | if (ret) |
93 | return ret; | 92 | return ret; |
94 | 93 | ||
95 | io_resource = request_region(p_dev->resource[0]->start, | 94 | if (!request_region(p_dev->resource[0]->start, |
96 | resource_size(p_dev->resource[0]), | 95 | resource_size(p_dev->resource[0]), |
97 | IPWIRELESS_PCCARD_NAME); | 96 | IPWIRELESS_PCCARD_NAME)) { |
97 | ret = -EBUSY; | ||
98 | goto exit; | ||
99 | } | ||
98 | 100 | ||
99 | p_dev->resource[2]->flags |= | 101 | p_dev->resource[2]->flags |= |
100 | WIN_DATA_WIDTH_16 | WIN_MEMORY_TYPE_CM | WIN_ENABLE; | 102 | WIN_DATA_WIDTH_16 | WIN_MEMORY_TYPE_CM | WIN_ENABLE; |
@@ -105,22 +107,25 @@ static int ipwireless_probe(struct pcmcia_device *p_dev, void *priv_data) | |||
105 | 107 | ||
106 | ret = pcmcia_map_mem_page(p_dev, p_dev->resource[2], p_dev->card_addr); | 108 | ret = pcmcia_map_mem_page(p_dev, p_dev->resource[2], p_dev->card_addr); |
107 | if (ret != 0) | 109 | if (ret != 0) |
108 | goto exit2; | 110 | goto exit1; |
109 | 111 | ||
110 | ipw->is_v2_card = resource_size(p_dev->resource[2]) == 0x100; | 112 | ipw->is_v2_card = resource_size(p_dev->resource[2]) == 0x100; |
111 | 113 | ||
112 | ipw->attr_memory = ioremap(p_dev->resource[2]->start, | 114 | ipw->common_memory = ioremap(p_dev->resource[2]->start, |
113 | resource_size(p_dev->resource[2])); | 115 | resource_size(p_dev->resource[2])); |
114 | request_mem_region(p_dev->resource[2]->start, | 116 | if (!request_mem_region(p_dev->resource[2]->start, |
115 | resource_size(p_dev->resource[2]), | 117 | resource_size(p_dev->resource[2]), |
116 | IPWIRELESS_PCCARD_NAME); | 118 | IPWIRELESS_PCCARD_NAME)) { |
119 | ret = -EBUSY; | ||
120 | goto exit2; | ||
121 | } | ||
117 | 122 | ||
118 | p_dev->resource[3]->flags |= WIN_DATA_WIDTH_16 | WIN_MEMORY_TYPE_AM | | 123 | p_dev->resource[3]->flags |= WIN_DATA_WIDTH_16 | WIN_MEMORY_TYPE_AM | |
119 | WIN_ENABLE; | 124 | WIN_ENABLE; |
120 | p_dev->resource[3]->end = 0; /* this used to be 0x1000 */ | 125 | p_dev->resource[3]->end = 0; /* this used to be 0x1000 */ |
121 | ret = pcmcia_request_window(p_dev, p_dev->resource[3], 0); | 126 | ret = pcmcia_request_window(p_dev, p_dev->resource[3], 0); |
122 | if (ret != 0) | 127 | if (ret != 0) |
123 | goto exit2; | 128 | goto exit3; |
124 | 129 | ||
125 | ret = pcmcia_map_mem_page(p_dev, p_dev->resource[3], 0); | 130 | ret = pcmcia_map_mem_page(p_dev, p_dev->resource[3], 0); |
126 | if (ret != 0) | 131 | if (ret != 0) |
@@ -128,23 +133,28 @@ static int ipwireless_probe(struct pcmcia_device *p_dev, void *priv_data) | |||
128 | 133 | ||
129 | ipw->attr_memory = ioremap(p_dev->resource[3]->start, | 134 | ipw->attr_memory = ioremap(p_dev->resource[3]->start, |
130 | resource_size(p_dev->resource[3])); | 135 | resource_size(p_dev->resource[3])); |
131 | request_mem_region(p_dev->resource[3]->start, | 136 | if (!request_mem_region(p_dev->resource[3]->start, |
132 | resource_size(p_dev->resource[3]), | 137 | resource_size(p_dev->resource[3]), |
133 | IPWIRELESS_PCCARD_NAME); | 138 | IPWIRELESS_PCCARD_NAME)) { |
139 | ret = -EBUSY; | ||
140 | goto exit4; | ||
141 | } | ||
134 | 142 | ||
135 | return 0; | 143 | return 0; |
136 | 144 | ||
145 | exit4: | ||
146 | iounmap(ipw->attr_memory); | ||
137 | exit3: | 147 | exit3: |
148 | release_mem_region(p_dev->resource[2]->start, | ||
149 | resource_size(p_dev->resource[2])); | ||
138 | exit2: | 150 | exit2: |
139 | if (ipw->common_memory) { | 151 | iounmap(ipw->common_memory); |
140 | release_mem_region(p_dev->resource[2]->start, | ||
141 | resource_size(p_dev->resource[2])); | ||
142 | iounmap(ipw->common_memory); | ||
143 | } | ||
144 | exit1: | 152 | exit1: |
145 | release_resource(io_resource); | 153 | release_region(p_dev->resource[0]->start, |
154 | resource_size(p_dev->resource[0])); | ||
155 | exit: | ||
146 | pcmcia_disable_device(p_dev); | 156 | pcmcia_disable_device(p_dev); |
147 | return -1; | 157 | return ret; |
148 | } | 158 | } |
149 | 159 | ||
150 | static int config_ipwireless(struct ipw_dev *ipw) | 160 | static int config_ipwireless(struct ipw_dev *ipw) |
@@ -219,6 +229,8 @@ exit: | |||
219 | 229 | ||
220 | static void release_ipwireless(struct ipw_dev *ipw) | 230 | static void release_ipwireless(struct ipw_dev *ipw) |
221 | { | 231 | { |
232 | release_region(ipw->link->resource[0]->start, | ||
233 | resource_size(ipw->link->resource[0])); | ||
222 | if (ipw->common_memory) { | 234 | if (ipw->common_memory) { |
223 | release_mem_region(ipw->link->resource[2]->start, | 235 | release_mem_region(ipw->link->resource[2]->start, |
224 | resource_size(ipw->link->resource[2])); | 236 | resource_size(ipw->link->resource[2])); |
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index faf5a2c65926..1f46f1cd9225 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c | |||
@@ -364,14 +364,12 @@ unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, | |||
364 | tpm_protected_ordinal_duration[ordinal & | 364 | tpm_protected_ordinal_duration[ordinal & |
365 | TPM_PROTECTED_ORDINAL_MASK]; | 365 | TPM_PROTECTED_ORDINAL_MASK]; |
366 | 366 | ||
367 | if (duration_idx != TPM_UNDEFINED) { | 367 | if (duration_idx != TPM_UNDEFINED) |
368 | duration = chip->vendor.duration[duration_idx]; | 368 | duration = chip->vendor.duration[duration_idx]; |
369 | /* if duration is 0, it's because chip->vendor.duration wasn't */ | 369 | if (duration <= 0) |
370 | /* filled yet, so we set the lowest timeout just to give enough */ | ||
371 | /* time for tpm_get_timeouts() to succeed */ | ||
372 | return (duration <= 0 ? HZ : duration); | ||
373 | } else | ||
374 | return 2 * 60 * HZ; | 370 | return 2 * 60 * HZ; |
371 | else | ||
372 | return duration; | ||
375 | } | 373 | } |
376 | EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration); | 374 | EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration); |
377 | 375 | ||
@@ -577,11 +575,9 @@ duration: | |||
577 | if (rc) | 575 | if (rc) |
578 | return; | 576 | return; |
579 | 577 | ||
580 | if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 || | 578 | if (be32_to_cpu(tpm_cmd.header.out.return_code) |
581 | be32_to_cpu(tpm_cmd.header.out.length) | 579 | != 3 * sizeof(u32)) |
582 | != sizeof(tpm_cmd.header.out) + sizeof(u32) + 3 * sizeof(u32)) | ||
583 | return; | 580 | return; |
584 | |||
585 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; | 581 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; |
586 | chip->vendor.duration[TPM_SHORT] = | 582 | chip->vendor.duration[TPM_SHORT] = |
587 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); | 583 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); |
@@ -941,18 +937,6 @@ ssize_t tpm_show_caps_1_2(struct device * dev, | |||
941 | } | 937 | } |
942 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); | 938 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); |
943 | 939 | ||
944 | ssize_t tpm_show_timeouts(struct device *dev, struct device_attribute *attr, | ||
945 | char *buf) | ||
946 | { | ||
947 | struct tpm_chip *chip = dev_get_drvdata(dev); | ||
948 | |||
949 | return sprintf(buf, "%d %d %d\n", | ||
950 | jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]), | ||
951 | jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]), | ||
952 | jiffies_to_usecs(chip->vendor.duration[TPM_LONG])); | ||
953 | } | ||
954 | EXPORT_SYMBOL_GPL(tpm_show_timeouts); | ||
955 | |||
956 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, | 940 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, |
957 | const char *buf, size_t count) | 941 | const char *buf, size_t count) |
958 | { | 942 | { |
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index d84ff772c26f..72ddb031b69a 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h | |||
@@ -56,8 +56,6 @@ extern ssize_t tpm_show_owned(struct device *, struct device_attribute *attr, | |||
56 | char *); | 56 | char *); |
57 | extern ssize_t tpm_show_temp_deactivated(struct device *, | 57 | extern ssize_t tpm_show_temp_deactivated(struct device *, |
58 | struct device_attribute *attr, char *); | 58 | struct device_attribute *attr, char *); |
59 | extern ssize_t tpm_show_timeouts(struct device *, | ||
60 | struct device_attribute *attr, char *); | ||
61 | 59 | ||
62 | struct tpm_chip; | 60 | struct tpm_chip; |
63 | 61 | ||
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index 0d1d38e5f266..dd21df55689d 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c | |||
@@ -376,7 +376,6 @@ static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, | |||
376 | NULL); | 376 | NULL); |
377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); | 377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); |
378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); | 378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); |
379 | static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); | ||
380 | 379 | ||
381 | static struct attribute *tis_attrs[] = { | 380 | static struct attribute *tis_attrs[] = { |
382 | &dev_attr_pubek.attr, | 381 | &dev_attr_pubek.attr, |
@@ -386,8 +385,7 @@ static struct attribute *tis_attrs[] = { | |||
386 | &dev_attr_owned.attr, | 385 | &dev_attr_owned.attr, |
387 | &dev_attr_temp_deactivated.attr, | 386 | &dev_attr_temp_deactivated.attr, |
388 | &dev_attr_caps.attr, | 387 | &dev_attr_caps.attr, |
389 | &dev_attr_cancel.attr, | 388 | &dev_attr_cancel.attr, NULL, |
390 | &dev_attr_timeouts.attr, NULL, | ||
391 | }; | 389 | }; |
392 | 390 | ||
393 | static struct attribute_group tis_attr_grp = { | 391 | static struct attribute_group tis_attr_grp = { |
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c index 490393186338..84b164d1eb2b 100644 --- a/drivers/char/virtio_console.c +++ b/drivers/char/virtio_console.c | |||
@@ -388,6 +388,10 @@ static void discard_port_data(struct port *port) | |||
388 | unsigned int len; | 388 | unsigned int len; |
389 | int ret; | 389 | int ret; |
390 | 390 | ||
391 | if (!port->portdev) { | ||
392 | /* Device has been unplugged. vqs are already gone. */ | ||
393 | return; | ||
394 | } | ||
391 | vq = port->in_vq; | 395 | vq = port->in_vq; |
392 | if (port->inbuf) | 396 | if (port->inbuf) |
393 | buf = port->inbuf; | 397 | buf = port->inbuf; |
@@ -470,6 +474,10 @@ static void reclaim_consumed_buffers(struct port *port) | |||
470 | void *buf; | 474 | void *buf; |
471 | unsigned int len; | 475 | unsigned int len; |
472 | 476 | ||
477 | if (!port->portdev) { | ||
478 | /* Device has been unplugged. vqs are already gone. */ | ||
479 | return; | ||
480 | } | ||
473 | while ((buf = virtqueue_get_buf(port->out_vq, &len))) { | 481 | while ((buf = virtqueue_get_buf(port->out_vq, &len))) { |
474 | kfree(buf); | 482 | kfree(buf); |
475 | port->outvq_full = false; | 483 | port->outvq_full = false; |
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index 1109f6848a43..5cb4d09919d6 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c | |||
@@ -1919,8 +1919,10 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data) | |||
1919 | 1919 | ||
1920 | ret = sysdev_driver_register(&cpu_sysdev_class, | 1920 | ret = sysdev_driver_register(&cpu_sysdev_class, |
1921 | &cpufreq_sysdev_driver); | 1921 | &cpufreq_sysdev_driver); |
1922 | if (ret) | ||
1923 | goto err_null_driver; | ||
1922 | 1924 | ||
1923 | if ((!ret) && !(cpufreq_driver->flags & CPUFREQ_STICKY)) { | 1925 | if (!(cpufreq_driver->flags & CPUFREQ_STICKY)) { |
1924 | int i; | 1926 | int i; |
1925 | ret = -ENODEV; | 1927 | ret = -ENODEV; |
1926 | 1928 | ||
@@ -1935,21 +1937,22 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data) | |||
1935 | if (ret) { | 1937 | if (ret) { |
1936 | dprintk("no CPU initialized for driver %s\n", | 1938 | dprintk("no CPU initialized for driver %s\n", |
1937 | driver_data->name); | 1939 | driver_data->name); |
1938 | sysdev_driver_unregister(&cpu_sysdev_class, | 1940 | goto err_sysdev_unreg; |
1939 | &cpufreq_sysdev_driver); | ||
1940 | |||
1941 | spin_lock_irqsave(&cpufreq_driver_lock, flags); | ||
1942 | cpufreq_driver = NULL; | ||
1943 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); | ||
1944 | } | 1941 | } |
1945 | } | 1942 | } |
1946 | 1943 | ||
1947 | if (!ret) { | 1944 | register_hotcpu_notifier(&cpufreq_cpu_notifier); |
1948 | register_hotcpu_notifier(&cpufreq_cpu_notifier); | 1945 | dprintk("driver %s up and running\n", driver_data->name); |
1949 | dprintk("driver %s up and running\n", driver_data->name); | 1946 | cpufreq_debug_enable_ratelimit(); |
1950 | cpufreq_debug_enable_ratelimit(); | ||
1951 | } | ||
1952 | 1947 | ||
1948 | return 0; | ||
1949 | err_sysdev_unreg: | ||
1950 | sysdev_driver_unregister(&cpu_sysdev_class, | ||
1951 | &cpufreq_sysdev_driver); | ||
1952 | err_null_driver: | ||
1953 | spin_lock_irqsave(&cpufreq_driver_lock, flags); | ||
1954 | cpufreq_driver = NULL; | ||
1955 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); | ||
1953 | return ret; | 1956 | return ret; |
1954 | } | 1957 | } |
1955 | EXPORT_SYMBOL_GPL(cpufreq_register_driver); | 1958 | EXPORT_SYMBOL_GPL(cpufreq_register_driver); |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 6977a1ce9d98..f73ef4390db6 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -672,7 +672,7 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) | |||
672 | struct drm_crtc_helper_funcs *crtc_funcs; | 672 | struct drm_crtc_helper_funcs *crtc_funcs; |
673 | u16 *red, *green, *blue, *transp; | 673 | u16 *red, *green, *blue, *transp; |
674 | struct drm_crtc *crtc; | 674 | struct drm_crtc *crtc; |
675 | int i, rc = 0; | 675 | int i, j, rc = 0; |
676 | int start; | 676 | int start; |
677 | 677 | ||
678 | for (i = 0; i < fb_helper->crtc_count; i++) { | 678 | for (i = 0; i < fb_helper->crtc_count; i++) { |
@@ -685,7 +685,7 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) | |||
685 | transp = cmap->transp; | 685 | transp = cmap->transp; |
686 | start = cmap->start; | 686 | start = cmap->start; |
687 | 687 | ||
688 | for (i = 0; i < cmap->len; i++) { | 688 | for (j = 0; j < cmap->len; j++) { |
689 | u16 hred, hgreen, hblue, htransp = 0xffff; | 689 | u16 hred, hgreen, hblue, htransp = 0xffff; |
690 | 690 | ||
691 | hred = *red++; | 691 | hred = *red++; |
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index 3dadfa2a8528..28d1d3c24d65 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c | |||
@@ -164,8 +164,10 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc) | |||
164 | * available. In that case we can't account for this and just | 164 | * available. In that case we can't account for this and just |
165 | * hope for the best. | 165 | * hope for the best. |
166 | */ | 166 | */ |
167 | if ((vblrc > 0) && (abs(diff_ns) > 1000000)) | 167 | if ((vblrc > 0) && (abs64(diff_ns) > 1000000)) { |
168 | atomic_inc(&dev->_vblank_count[crtc]); | 168 | atomic_inc(&dev->_vblank_count[crtc]); |
169 | smp_mb__after_atomic_inc(); | ||
170 | } | ||
169 | 171 | ||
170 | /* Invalidate all timestamps while vblank irq's are off. */ | 172 | /* Invalidate all timestamps while vblank irq's are off. */ |
171 | clear_vblank_timestamps(dev, crtc); | 173 | clear_vblank_timestamps(dev, crtc); |
@@ -491,6 +493,12 @@ void drm_calc_timestamping_constants(struct drm_crtc *crtc) | |||
491 | /* Dot clock in Hz: */ | 493 | /* Dot clock in Hz: */ |
492 | dotclock = (u64) crtc->hwmode.clock * 1000; | 494 | dotclock = (u64) crtc->hwmode.clock * 1000; |
493 | 495 | ||
496 | /* Fields of interlaced scanout modes are only halve a frame duration. | ||
497 | * Double the dotclock to get halve the frame-/line-/pixelduration. | ||
498 | */ | ||
499 | if (crtc->hwmode.flags & DRM_MODE_FLAG_INTERLACE) | ||
500 | dotclock *= 2; | ||
501 | |||
494 | /* Valid dotclock? */ | 502 | /* Valid dotclock? */ |
495 | if (dotclock > 0) { | 503 | if (dotclock > 0) { |
496 | /* Convert scanline length in pixels and video dot clock to | 504 | /* Convert scanline length in pixels and video dot clock to |
@@ -603,14 +611,6 @@ int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev, int crtc, | |||
603 | return -EAGAIN; | 611 | return -EAGAIN; |
604 | } | 612 | } |
605 | 613 | ||
606 | /* Don't know yet how to handle interlaced or | ||
607 | * double scan modes. Just no-op for now. | ||
608 | */ | ||
609 | if (mode->flags & (DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN)) { | ||
610 | DRM_DEBUG("crtc %d: Noop due to unsupported mode.\n", crtc); | ||
611 | return -ENOTSUPP; | ||
612 | } | ||
613 | |||
614 | /* Get current scanout position with system timestamp. | 614 | /* Get current scanout position with system timestamp. |
615 | * Repeat query up to DRM_TIMESTAMP_MAXRETRIES times | 615 | * Repeat query up to DRM_TIMESTAMP_MAXRETRIES times |
616 | * if single query takes longer than max_error nanoseconds. | 616 | * if single query takes longer than max_error nanoseconds. |
@@ -858,10 +858,11 @@ static void drm_update_vblank_count(struct drm_device *dev, int crtc) | |||
858 | if (rc) { | 858 | if (rc) { |
859 | tslot = atomic_read(&dev->_vblank_count[crtc]) + diff; | 859 | tslot = atomic_read(&dev->_vblank_count[crtc]) + diff; |
860 | vblanktimestamp(dev, crtc, tslot) = t_vblank; | 860 | vblanktimestamp(dev, crtc, tslot) = t_vblank; |
861 | smp_wmb(); | ||
862 | } | 861 | } |
863 | 862 | ||
863 | smp_mb__before_atomic_inc(); | ||
864 | atomic_add(diff, &dev->_vblank_count[crtc]); | 864 | atomic_add(diff, &dev->_vblank_count[crtc]); |
865 | smp_mb__after_atomic_inc(); | ||
865 | } | 866 | } |
866 | 867 | ||
867 | /** | 868 | /** |
@@ -1011,7 +1012,8 @@ int drm_modeset_ctl(struct drm_device *dev, void *data, | |||
1011 | struct drm_file *file_priv) | 1012 | struct drm_file *file_priv) |
1012 | { | 1013 | { |
1013 | struct drm_modeset_ctl *modeset = data; | 1014 | struct drm_modeset_ctl *modeset = data; |
1014 | int crtc, ret = 0; | 1015 | int ret = 0; |
1016 | unsigned int crtc; | ||
1015 | 1017 | ||
1016 | /* If drm_vblank_init() hasn't been called yet, just no-op */ | 1018 | /* If drm_vblank_init() hasn't been called yet, just no-op */ |
1017 | if (!dev->num_crtcs) | 1019 | if (!dev->num_crtcs) |
@@ -1293,15 +1295,16 @@ bool drm_handle_vblank(struct drm_device *dev, int crtc) | |||
1293 | * e.g., due to spurious vblank interrupts. We need to | 1295 | * e.g., due to spurious vblank interrupts. We need to |
1294 | * ignore those for accounting. | 1296 | * ignore those for accounting. |
1295 | */ | 1297 | */ |
1296 | if (abs(diff_ns) > DRM_REDUNDANT_VBLIRQ_THRESH_NS) { | 1298 | if (abs64(diff_ns) > DRM_REDUNDANT_VBLIRQ_THRESH_NS) { |
1297 | /* Store new timestamp in ringbuffer. */ | 1299 | /* Store new timestamp in ringbuffer. */ |
1298 | vblanktimestamp(dev, crtc, vblcount + 1) = tvblank; | 1300 | vblanktimestamp(dev, crtc, vblcount + 1) = tvblank; |
1299 | smp_wmb(); | ||
1300 | 1301 | ||
1301 | /* Increment cooked vblank count. This also atomically commits | 1302 | /* Increment cooked vblank count. This also atomically commits |
1302 | * the timestamp computed above. | 1303 | * the timestamp computed above. |
1303 | */ | 1304 | */ |
1305 | smp_mb__before_atomic_inc(); | ||
1304 | atomic_inc(&dev->_vblank_count[crtc]); | 1306 | atomic_inc(&dev->_vblank_count[crtc]); |
1307 | smp_mb__after_atomic_inc(); | ||
1305 | } else { | 1308 | } else { |
1306 | DRM_DEBUG("crtc %d: Redundant vblirq ignored. diff_ns = %d\n", | 1309 | DRM_DEBUG("crtc %d: Redundant vblirq ignored. diff_ns = %d\n", |
1307 | crtc, (int) diff_ns); | 1310 | crtc, (int) diff_ns); |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 3601466c5502..4ff9b6cc973f 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
865 | int max_freq; | 865 | int max_freq; |
866 | 866 | ||
867 | /* RPSTAT1 is in the GT power well */ | 867 | /* RPSTAT1 is in the GT power well */ |
868 | __gen6_force_wake_get(dev_priv); | 868 | __gen6_gt_force_wake_get(dev_priv); |
869 | 869 | ||
870 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); | 870 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); |
871 | seq_printf(m, "RPSTAT1: 0x%08x\n", I915_READ(GEN6_RPSTAT1)); | 871 | seq_printf(m, "RPSTAT1: 0x%08x\n", I915_READ(GEN6_RPSTAT1)); |
@@ -888,7 +888,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
888 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", | 888 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", |
889 | max_freq * 100); | 889 | max_freq * 100); |
890 | 890 | ||
891 | __gen6_force_wake_put(dev_priv); | 891 | __gen6_gt_force_wake_put(dev_priv); |
892 | } else { | 892 | } else { |
893 | seq_printf(m, "no P-state info available\n"); | 893 | seq_printf(m, "no P-state info available\n"); |
894 | } | 894 | } |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 17bd766f2081..e33d9be7df3b 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1895,6 +1895,17 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1895 | if (IS_GEN2(dev)) | 1895 | if (IS_GEN2(dev)) |
1896 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30)); | 1896 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30)); |
1897 | 1897 | ||
1898 | /* 965GM sometimes incorrectly writes to hardware status page (HWS) | ||
1899 | * using 32bit addressing, overwriting memory if HWS is located | ||
1900 | * above 4GB. | ||
1901 | * | ||
1902 | * The documentation also mentions an issue with undefined | ||
1903 | * behaviour if any general state is accessed within a page above 4GB, | ||
1904 | * which also needs to be handled carefully. | ||
1905 | */ | ||
1906 | if (IS_BROADWATER(dev) || IS_CRESTLINE(dev)) | ||
1907 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32)); | ||
1908 | |||
1898 | mmio_bar = IS_GEN2(dev) ? 1 : 0; | 1909 | mmio_bar = IS_GEN2(dev) ? 1 : 0; |
1899 | dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, 0); | 1910 | dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, 0); |
1900 | if (!dev_priv->regs) { | 1911 | if (!dev_priv->regs) { |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0ad533f06af9..22ec066adae6 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -46,6 +46,9 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); | |||
46 | unsigned int i915_powersave = 1; | 46 | unsigned int i915_powersave = 1; |
47 | module_param_named(powersave, i915_powersave, int, 0600); | 47 | module_param_named(powersave, i915_powersave, int, 0600); |
48 | 48 | ||
49 | unsigned int i915_semaphores = 0; | ||
50 | module_param_named(semaphores, i915_semaphores, int, 0600); | ||
51 | |||
49 | unsigned int i915_enable_rc6 = 0; | 52 | unsigned int i915_enable_rc6 = 0; |
50 | module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); | 53 | module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); |
51 | 54 | ||
@@ -254,7 +257,7 @@ void intel_detect_pch (struct drm_device *dev) | |||
254 | } | 257 | } |
255 | } | 258 | } |
256 | 259 | ||
257 | void __gen6_force_wake_get(struct drm_i915_private *dev_priv) | 260 | void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
258 | { | 261 | { |
259 | int count; | 262 | int count; |
260 | 263 | ||
@@ -270,12 +273,22 @@ void __gen6_force_wake_get(struct drm_i915_private *dev_priv) | |||
270 | udelay(10); | 273 | udelay(10); |
271 | } | 274 | } |
272 | 275 | ||
273 | void __gen6_force_wake_put(struct drm_i915_private *dev_priv) | 276 | void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
274 | { | 277 | { |
275 | I915_WRITE_NOTRACE(FORCEWAKE, 0); | 278 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
276 | POSTING_READ(FORCEWAKE); | 279 | POSTING_READ(FORCEWAKE); |
277 | } | 280 | } |
278 | 281 | ||
282 | void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) | ||
283 | { | ||
284 | int loop = 500; | ||
285 | u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); | ||
286 | while (fifo < 20 && loop--) { | ||
287 | udelay(10); | ||
288 | fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); | ||
289 | } | ||
290 | } | ||
291 | |||
279 | static int i915_drm_freeze(struct drm_device *dev) | 292 | static int i915_drm_freeze(struct drm_device *dev) |
280 | { | 293 | { |
281 | struct drm_i915_private *dev_priv = dev->dev_private; | 294 | struct drm_i915_private *dev_priv = dev->dev_private; |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 65dfe81d0035..456f40484838 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -956,6 +956,7 @@ extern struct drm_ioctl_desc i915_ioctls[]; | |||
956 | extern int i915_max_ioctl; | 956 | extern int i915_max_ioctl; |
957 | extern unsigned int i915_fbpercrtc; | 957 | extern unsigned int i915_fbpercrtc; |
958 | extern unsigned int i915_powersave; | 958 | extern unsigned int i915_powersave; |
959 | extern unsigned int i915_semaphores; | ||
959 | extern unsigned int i915_lvds_downclock; | 960 | extern unsigned int i915_lvds_downclock; |
960 | extern unsigned int i915_panel_use_ssc; | 961 | extern unsigned int i915_panel_use_ssc; |
961 | extern unsigned int i915_enable_rc6; | 962 | extern unsigned int i915_enable_rc6; |
@@ -1177,6 +1178,9 @@ void i915_gem_detach_phys_object(struct drm_device *dev, | |||
1177 | void i915_gem_free_all_phys_object(struct drm_device *dev); | 1178 | void i915_gem_free_all_phys_object(struct drm_device *dev); |
1178 | void i915_gem_release(struct drm_device *dev, struct drm_file *file); | 1179 | void i915_gem_release(struct drm_device *dev, struct drm_file *file); |
1179 | 1180 | ||
1181 | uint32_t | ||
1182 | i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj); | ||
1183 | |||
1180 | /* i915_gem_gtt.c */ | 1184 | /* i915_gem_gtt.c */ |
1181 | void i915_gem_restore_gtt_mappings(struct drm_device *dev); | 1185 | void i915_gem_restore_gtt_mappings(struct drm_device *dev); |
1182 | int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj); | 1186 | int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj); |
@@ -1353,22 +1357,32 @@ __i915_write(64, q) | |||
1353 | * must be set to prevent GT core from power down and stale values being | 1357 | * must be set to prevent GT core from power down and stale values being |
1354 | * returned. | 1358 | * returned. |
1355 | */ | 1359 | */ |
1356 | void __gen6_force_wake_get(struct drm_i915_private *dev_priv); | 1360 | void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv); |
1357 | void __gen6_force_wake_put (struct drm_i915_private *dev_priv); | 1361 | void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv); |
1358 | static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg) | 1362 | void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv); |
1363 | |||
1364 | static inline u32 i915_gt_read(struct drm_i915_private *dev_priv, u32 reg) | ||
1359 | { | 1365 | { |
1360 | u32 val; | 1366 | u32 val; |
1361 | 1367 | ||
1362 | if (dev_priv->info->gen >= 6) { | 1368 | if (dev_priv->info->gen >= 6) { |
1363 | __gen6_force_wake_get(dev_priv); | 1369 | __gen6_gt_force_wake_get(dev_priv); |
1364 | val = I915_READ(reg); | 1370 | val = I915_READ(reg); |
1365 | __gen6_force_wake_put(dev_priv); | 1371 | __gen6_gt_force_wake_put(dev_priv); |
1366 | } else | 1372 | } else |
1367 | val = I915_READ(reg); | 1373 | val = I915_READ(reg); |
1368 | 1374 | ||
1369 | return val; | 1375 | return val; |
1370 | } | 1376 | } |
1371 | 1377 | ||
1378 | static inline void i915_gt_write(struct drm_i915_private *dev_priv, | ||
1379 | u32 reg, u32 val) | ||
1380 | { | ||
1381 | if (dev_priv->info->gen >= 6) | ||
1382 | __gen6_gt_wait_for_fifo(dev_priv); | ||
1383 | I915_WRITE(reg, val); | ||
1384 | } | ||
1385 | |||
1372 | static inline void | 1386 | static inline void |
1373 | i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len) | 1387 | i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len) |
1374 | { | 1388 | { |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index cf4f74c7c6fb..36e66cc5225e 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1398,7 +1398,7 @@ i915_gem_get_gtt_alignment(struct drm_i915_gem_object *obj) | |||
1398 | * Return the required GTT alignment for an object, only taking into account | 1398 | * Return the required GTT alignment for an object, only taking into account |
1399 | * unfenced tiled surface requirements. | 1399 | * unfenced tiled surface requirements. |
1400 | */ | 1400 | */ |
1401 | static uint32_t | 1401 | uint32_t |
1402 | i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj) | 1402 | i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj) |
1403 | { | 1403 | { |
1404 | struct drm_device *dev = obj->base.dev; | 1404 | struct drm_device *dev = obj->base.dev; |
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index d2f445e825f2..50ab1614571c 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -772,8 +772,8 @@ i915_gem_execbuffer_sync_rings(struct drm_i915_gem_object *obj, | |||
772 | if (from == NULL || to == from) | 772 | if (from == NULL || to == from) |
773 | return 0; | 773 | return 0; |
774 | 774 | ||
775 | /* XXX gpu semaphores are currently causing hard hangs on SNB mobile */ | 775 | /* XXX gpu semaphores are implicated in various hard hangs on SNB */ |
776 | if (INTEL_INFO(obj->base.dev)->gen < 6 || IS_MOBILE(obj->base.dev)) | 776 | if (INTEL_INFO(obj->base.dev)->gen < 6 || !i915_semaphores) |
777 | return i915_gem_object_wait_rendering(obj, true); | 777 | return i915_gem_object_wait_rendering(obj, true); |
778 | 778 | ||
779 | idx = intel_ring_sync_index(from, to); | 779 | idx = intel_ring_sync_index(from, to); |
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 22a32b9932c5..d64843e18df2 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c | |||
@@ -349,14 +349,27 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
349 | (obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end && | 349 | (obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end && |
350 | i915_gem_object_fence_ok(obj, args->tiling_mode)); | 350 | i915_gem_object_fence_ok(obj, args->tiling_mode)); |
351 | 351 | ||
352 | obj->tiling_changed = true; | 352 | /* Rebind if we need a change of alignment */ |
353 | obj->tiling_mode = args->tiling_mode; | 353 | if (!obj->map_and_fenceable) { |
354 | obj->stride = args->stride; | 354 | u32 unfenced_alignment = |
355 | i915_gem_get_unfenced_gtt_alignment(obj); | ||
356 | if (obj->gtt_offset & (unfenced_alignment - 1)) | ||
357 | ret = i915_gem_object_unbind(obj); | ||
358 | } | ||
359 | |||
360 | if (ret == 0) { | ||
361 | obj->tiling_changed = true; | ||
362 | obj->tiling_mode = args->tiling_mode; | ||
363 | obj->stride = args->stride; | ||
364 | } | ||
355 | } | 365 | } |
366 | /* we have to maintain this existing ABI... */ | ||
367 | args->stride = obj->stride; | ||
368 | args->tiling_mode = obj->tiling_mode; | ||
356 | drm_gem_object_unreference(&obj->base); | 369 | drm_gem_object_unreference(&obj->base); |
357 | mutex_unlock(&dev->struct_mutex); | 370 | mutex_unlock(&dev->struct_mutex); |
358 | 371 | ||
359 | return 0; | 372 | return ret; |
360 | } | 373 | } |
361 | 374 | ||
362 | /** | 375 | /** |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 97f946dcc1aa..8a9e08bf1cf7 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -316,6 +316,8 @@ static void i915_hotplug_work_func(struct work_struct *work) | |||
316 | struct drm_mode_config *mode_config = &dev->mode_config; | 316 | struct drm_mode_config *mode_config = &dev->mode_config; |
317 | struct intel_encoder *encoder; | 317 | struct intel_encoder *encoder; |
318 | 318 | ||
319 | DRM_DEBUG_KMS("running encoder hotplug functions\n"); | ||
320 | |||
319 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) | 321 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) |
320 | if (encoder->hot_plug) | 322 | if (encoder->hot_plug) |
321 | encoder->hot_plug(encoder); | 323 | encoder->hot_plug(encoder); |
@@ -1649,9 +1651,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) | |||
1649 | } else { | 1651 | } else { |
1650 | hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | | 1652 | hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | |
1651 | SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; | 1653 | SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; |
1652 | hotplug_mask |= SDE_AUX_MASK | SDE_FDI_MASK | SDE_TRANS_MASK; | 1654 | hotplug_mask |= SDE_AUX_MASK; |
1653 | I915_WRITE(FDI_RXA_IMR, 0); | ||
1654 | I915_WRITE(FDI_RXB_IMR, 0); | ||
1655 | } | 1655 | } |
1656 | 1656 | ||
1657 | dev_priv->pch_irq_mask = ~hotplug_mask; | 1657 | dev_priv->pch_irq_mask = ~hotplug_mask; |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 15d94c63918c..3e6f486f4605 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -1553,17 +1553,7 @@ | |||
1553 | 1553 | ||
1554 | /* Backlight control */ | 1554 | /* Backlight control */ |
1555 | #define BLC_PWM_CTL 0x61254 | 1555 | #define BLC_PWM_CTL 0x61254 |
1556 | #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) | ||
1557 | #define BLC_PWM_CTL2 0x61250 /* 965+ only */ | 1556 | #define BLC_PWM_CTL2 0x61250 /* 965+ only */ |
1558 | #define BLM_COMBINATION_MODE (1 << 30) | ||
1559 | /* | ||
1560 | * This is the most significant 15 bits of the number of backlight cycles in a | ||
1561 | * complete cycle of the modulated backlight control. | ||
1562 | * | ||
1563 | * The actual value is this field multiplied by two. | ||
1564 | */ | ||
1565 | #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) | ||
1566 | #define BLM_LEGACY_MODE (1 << 16) | ||
1567 | /* | 1557 | /* |
1568 | * This is the number of cycles out of the backlight modulation cycle for which | 1558 | * This is the number of cycles out of the backlight modulation cycle for which |
1569 | * the backlight is on. | 1559 | * the backlight is on. |
@@ -3271,6 +3261,8 @@ | |||
3271 | #define FORCEWAKE 0xA18C | 3261 | #define FORCEWAKE 0xA18C |
3272 | #define FORCEWAKE_ACK 0x130090 | 3262 | #define FORCEWAKE_ACK 0x130090 |
3273 | 3263 | ||
3264 | #define GT_FIFO_FREE_ENTRIES 0x120008 | ||
3265 | |||
3274 | #define GEN6_RPNSWREQ 0xA008 | 3266 | #define GEN6_RPNSWREQ 0xA008 |
3275 | #define GEN6_TURBO_DISABLE (1<<31) | 3267 | #define GEN6_TURBO_DISABLE (1<<31) |
3276 | #define GEN6_FREQUENCY(x) ((x)<<25) | 3268 | #define GEN6_FREQUENCY(x) ((x)<<25) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3b006536b3d2..49fb54fd9a18 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1219,7 +1219,7 @@ static void sandybridge_blit_fbc_update(struct drm_device *dev) | |||
1219 | u32 blt_ecoskpd; | 1219 | u32 blt_ecoskpd; |
1220 | 1220 | ||
1221 | /* Make sure blitter notifies FBC of writes */ | 1221 | /* Make sure blitter notifies FBC of writes */ |
1222 | __gen6_force_wake_get(dev_priv); | 1222 | __gen6_gt_force_wake_get(dev_priv); |
1223 | blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD); | 1223 | blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD); |
1224 | blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY << | 1224 | blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY << |
1225 | GEN6_BLITTER_LOCK_SHIFT; | 1225 | GEN6_BLITTER_LOCK_SHIFT; |
@@ -1230,7 +1230,7 @@ static void sandybridge_blit_fbc_update(struct drm_device *dev) | |||
1230 | GEN6_BLITTER_LOCK_SHIFT); | 1230 | GEN6_BLITTER_LOCK_SHIFT); |
1231 | I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); | 1231 | I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); |
1232 | POSTING_READ(GEN6_BLITTER_ECOSKPD); | 1232 | POSTING_READ(GEN6_BLITTER_ECOSKPD); |
1233 | __gen6_force_wake_put(dev_priv); | 1233 | __gen6_gt_force_wake_put(dev_priv); |
1234 | } | 1234 | } |
1235 | 1235 | ||
1236 | static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | 1236 | static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) |
@@ -1630,19 +1630,19 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1630 | struct drm_i915_gem_object *obj = to_intel_framebuffer(old_fb)->obj; | 1630 | struct drm_i915_gem_object *obj = to_intel_framebuffer(old_fb)->obj; |
1631 | 1631 | ||
1632 | wait_event(dev_priv->pending_flip_queue, | 1632 | wait_event(dev_priv->pending_flip_queue, |
1633 | atomic_read(&dev_priv->mm.wedged) || | ||
1633 | atomic_read(&obj->pending_flip) == 0); | 1634 | atomic_read(&obj->pending_flip) == 0); |
1634 | 1635 | ||
1635 | /* Big Hammer, we also need to ensure that any pending | 1636 | /* Big Hammer, we also need to ensure that any pending |
1636 | * MI_WAIT_FOR_EVENT inside a user batch buffer on the | 1637 | * MI_WAIT_FOR_EVENT inside a user batch buffer on the |
1637 | * current scanout is retired before unpinning the old | 1638 | * current scanout is retired before unpinning the old |
1638 | * framebuffer. | 1639 | * framebuffer. |
1640 | * | ||
1641 | * This should only fail upon a hung GPU, in which case we | ||
1642 | * can safely continue. | ||
1639 | */ | 1643 | */ |
1640 | ret = i915_gem_object_flush_gpu(obj, false); | 1644 | ret = i915_gem_object_flush_gpu(obj, false); |
1641 | if (ret) { | 1645 | (void) ret; |
1642 | i915_gem_object_unpin(to_intel_framebuffer(crtc->fb)->obj); | ||
1643 | mutex_unlock(&dev->struct_mutex); | ||
1644 | return ret; | ||
1645 | } | ||
1646 | } | 1646 | } |
1647 | 1647 | ||
1648 | ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y, | 1648 | ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y, |
@@ -2045,6 +2045,31 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc) | |||
2045 | atomic_read(&obj->pending_flip) == 0); | 2045 | atomic_read(&obj->pending_flip) == 0); |
2046 | } | 2046 | } |
2047 | 2047 | ||
2048 | static bool intel_crtc_driving_pch(struct drm_crtc *crtc) | ||
2049 | { | ||
2050 | struct drm_device *dev = crtc->dev; | ||
2051 | struct drm_mode_config *mode_config = &dev->mode_config; | ||
2052 | struct intel_encoder *encoder; | ||
2053 | |||
2054 | /* | ||
2055 | * If there's a non-PCH eDP on this crtc, it must be DP_A, and that | ||
2056 | * must be driven by its own crtc; no sharing is possible. | ||
2057 | */ | ||
2058 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { | ||
2059 | if (encoder->base.crtc != crtc) | ||
2060 | continue; | ||
2061 | |||
2062 | switch (encoder->type) { | ||
2063 | case INTEL_OUTPUT_EDP: | ||
2064 | if (!intel_encoder_is_pch_edp(&encoder->base)) | ||
2065 | return false; | ||
2066 | continue; | ||
2067 | } | ||
2068 | } | ||
2069 | |||
2070 | return true; | ||
2071 | } | ||
2072 | |||
2048 | static void ironlake_crtc_enable(struct drm_crtc *crtc) | 2073 | static void ironlake_crtc_enable(struct drm_crtc *crtc) |
2049 | { | 2074 | { |
2050 | struct drm_device *dev = crtc->dev; | 2075 | struct drm_device *dev = crtc->dev; |
@@ -2053,6 +2078,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) | |||
2053 | int pipe = intel_crtc->pipe; | 2078 | int pipe = intel_crtc->pipe; |
2054 | int plane = intel_crtc->plane; | 2079 | int plane = intel_crtc->plane; |
2055 | u32 reg, temp; | 2080 | u32 reg, temp; |
2081 | bool is_pch_port = false; | ||
2056 | 2082 | ||
2057 | if (intel_crtc->active) | 2083 | if (intel_crtc->active) |
2058 | return; | 2084 | return; |
@@ -2066,7 +2092,56 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) | |||
2066 | I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); | 2092 | I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); |
2067 | } | 2093 | } |
2068 | 2094 | ||
2069 | ironlake_fdi_enable(crtc); | 2095 | is_pch_port = intel_crtc_driving_pch(crtc); |
2096 | |||
2097 | if (is_pch_port) | ||
2098 | ironlake_fdi_enable(crtc); | ||
2099 | else { | ||
2100 | /* disable CPU FDI tx and PCH FDI rx */ | ||
2101 | reg = FDI_TX_CTL(pipe); | ||
2102 | temp = I915_READ(reg); | ||
2103 | I915_WRITE(reg, temp & ~FDI_TX_ENABLE); | ||
2104 | POSTING_READ(reg); | ||
2105 | |||
2106 | reg = FDI_RX_CTL(pipe); | ||
2107 | temp = I915_READ(reg); | ||
2108 | temp &= ~(0x7 << 16); | ||
2109 | temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11; | ||
2110 | I915_WRITE(reg, temp & ~FDI_RX_ENABLE); | ||
2111 | |||
2112 | POSTING_READ(reg); | ||
2113 | udelay(100); | ||
2114 | |||
2115 | /* Ironlake workaround, disable clock pointer after downing FDI */ | ||
2116 | if (HAS_PCH_IBX(dev)) | ||
2117 | I915_WRITE(FDI_RX_CHICKEN(pipe), | ||
2118 | I915_READ(FDI_RX_CHICKEN(pipe) & | ||
2119 | ~FDI_RX_PHASE_SYNC_POINTER_ENABLE)); | ||
2120 | |||
2121 | /* still set train pattern 1 */ | ||
2122 | reg = FDI_TX_CTL(pipe); | ||
2123 | temp = I915_READ(reg); | ||
2124 | temp &= ~FDI_LINK_TRAIN_NONE; | ||
2125 | temp |= FDI_LINK_TRAIN_PATTERN_1; | ||
2126 | I915_WRITE(reg, temp); | ||
2127 | |||
2128 | reg = FDI_RX_CTL(pipe); | ||
2129 | temp = I915_READ(reg); | ||
2130 | if (HAS_PCH_CPT(dev)) { | ||
2131 | temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; | ||
2132 | temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; | ||
2133 | } else { | ||
2134 | temp &= ~FDI_LINK_TRAIN_NONE; | ||
2135 | temp |= FDI_LINK_TRAIN_PATTERN_1; | ||
2136 | } | ||
2137 | /* BPC in FDI rx is consistent with that in PIPECONF */ | ||
2138 | temp &= ~(0x07 << 16); | ||
2139 | temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11; | ||
2140 | I915_WRITE(reg, temp); | ||
2141 | |||
2142 | POSTING_READ(reg); | ||
2143 | udelay(100); | ||
2144 | } | ||
2070 | 2145 | ||
2071 | /* Enable panel fitting for LVDS */ | 2146 | /* Enable panel fitting for LVDS */ |
2072 | if (dev_priv->pch_pf_size && | 2147 | if (dev_priv->pch_pf_size && |
@@ -2100,6 +2175,10 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) | |||
2100 | intel_flush_display_plane(dev, plane); | 2175 | intel_flush_display_plane(dev, plane); |
2101 | } | 2176 | } |
2102 | 2177 | ||
2178 | /* Skip the PCH stuff if possible */ | ||
2179 | if (!is_pch_port) | ||
2180 | goto done; | ||
2181 | |||
2103 | /* For PCH output, training FDI link */ | 2182 | /* For PCH output, training FDI link */ |
2104 | if (IS_GEN6(dev)) | 2183 | if (IS_GEN6(dev)) |
2105 | gen6_fdi_link_train(crtc); | 2184 | gen6_fdi_link_train(crtc); |
@@ -2184,7 +2263,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) | |||
2184 | I915_WRITE(reg, temp | TRANS_ENABLE); | 2263 | I915_WRITE(reg, temp | TRANS_ENABLE); |
2185 | if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100)) | 2264 | if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100)) |
2186 | DRM_ERROR("failed to enable transcoder %d\n", pipe); | 2265 | DRM_ERROR("failed to enable transcoder %d\n", pipe); |
2187 | 2266 | done: | |
2188 | intel_crtc_load_lut(crtc); | 2267 | intel_crtc_load_lut(crtc); |
2189 | intel_update_fbc(dev); | 2268 | intel_update_fbc(dev); |
2190 | intel_crtc_update_cursor(crtc, true); | 2269 | intel_crtc_update_cursor(crtc, true); |
@@ -6203,7 +6282,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) | |||
6203 | * userspace... | 6282 | * userspace... |
6204 | */ | 6283 | */ |
6205 | I915_WRITE(GEN6_RC_STATE, 0); | 6284 | I915_WRITE(GEN6_RC_STATE, 0); |
6206 | __gen6_force_wake_get(dev_priv); | 6285 | __gen6_gt_force_wake_get(dev_priv); |
6207 | 6286 | ||
6208 | /* disable the counters and set deterministic thresholds */ | 6287 | /* disable the counters and set deterministic thresholds */ |
6209 | I915_WRITE(GEN6_RC_CONTROL, 0); | 6288 | I915_WRITE(GEN6_RC_CONTROL, 0); |
@@ -6301,7 +6380,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) | |||
6301 | /* enable all PM interrupts */ | 6380 | /* enable all PM interrupts */ |
6302 | I915_WRITE(GEN6_PMINTRMSK, 0); | 6381 | I915_WRITE(GEN6_PMINTRMSK, 0); |
6303 | 6382 | ||
6304 | __gen6_force_wake_put(dev_priv); | 6383 | __gen6_gt_force_wake_put(dev_priv); |
6305 | } | 6384 | } |
6306 | 6385 | ||
6307 | void intel_enable_clock_gating(struct drm_device *dev) | 6386 | void intel_enable_clock_gating(struct drm_device *dev) |
@@ -6496,7 +6575,7 @@ static void ironlake_disable_rc6(struct drm_device *dev) | |||
6496 | POSTING_READ(RSTDBYCTL); | 6575 | POSTING_READ(RSTDBYCTL); |
6497 | } | 6576 | } |
6498 | 6577 | ||
6499 | ironlake_disable_rc6(dev); | 6578 | ironlake_teardown_rc6(dev); |
6500 | } | 6579 | } |
6501 | 6580 | ||
6502 | static int ironlake_setup_rc6(struct drm_device *dev) | 6581 | static int ironlake_setup_rc6(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index c65992df458d..d860abeda70f 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -30,8 +30,6 @@ | |||
30 | 30 | ||
31 | #include "intel_drv.h" | 31 | #include "intel_drv.h" |
32 | 32 | ||
33 | #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ | ||
34 | |||
35 | void | 33 | void |
36 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, | 34 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
37 | struct drm_display_mode *adjusted_mode) | 35 | struct drm_display_mode *adjusted_mode) |
@@ -112,19 +110,6 @@ done: | |||
112 | dev_priv->pch_pf_size = (width << 16) | height; | 110 | dev_priv->pch_pf_size = (width << 16) | height; |
113 | } | 111 | } |
114 | 112 | ||
115 | static int is_backlight_combination_mode(struct drm_device *dev) | ||
116 | { | ||
117 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
118 | |||
119 | if (INTEL_INFO(dev)->gen >= 4) | ||
120 | return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; | ||
121 | |||
122 | if (IS_GEN2(dev)) | ||
123 | return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; | ||
124 | |||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) | 113 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) |
129 | { | 114 | { |
130 | u32 val; | 115 | u32 val; |
@@ -181,9 +166,6 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev) | |||
181 | if (INTEL_INFO(dev)->gen < 4) | 166 | if (INTEL_INFO(dev)->gen < 4) |
182 | max &= ~1; | 167 | max &= ~1; |
183 | } | 168 | } |
184 | |||
185 | if (is_backlight_combination_mode(dev)) | ||
186 | max *= 0xff; | ||
187 | } | 169 | } |
188 | 170 | ||
189 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); | 171 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); |
@@ -201,15 +183,6 @@ u32 intel_panel_get_backlight(struct drm_device *dev) | |||
201 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | 183 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
202 | if (IS_PINEVIEW(dev)) | 184 | if (IS_PINEVIEW(dev)) |
203 | val >>= 1; | 185 | val >>= 1; |
204 | |||
205 | if (is_backlight_combination_mode(dev)){ | ||
206 | u8 lbpc; | ||
207 | |||
208 | val &= ~1; | ||
209 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); | ||
210 | val *= lbpc; | ||
211 | val >>= 1; | ||
212 | } | ||
213 | } | 186 | } |
214 | 187 | ||
215 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); | 188 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
@@ -232,16 +205,6 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level) | |||
232 | 205 | ||
233 | if (HAS_PCH_SPLIT(dev)) | 206 | if (HAS_PCH_SPLIT(dev)) |
234 | return intel_pch_panel_set_backlight(dev, level); | 207 | return intel_pch_panel_set_backlight(dev, level); |
235 | |||
236 | if (is_backlight_combination_mode(dev)){ | ||
237 | u32 max = intel_panel_get_max_backlight(dev); | ||
238 | u8 lpbc; | ||
239 | |||
240 | lpbc = level * 0xfe / max + 1; | ||
241 | level /= lpbc; | ||
242 | pci_write_config_byte(dev->pdev, PCI_LBPC, lpbc); | ||
243 | } | ||
244 | |||
245 | tmp = I915_READ(BLC_PWM_CTL); | 208 | tmp = I915_READ(BLC_PWM_CTL); |
246 | if (IS_PINEVIEW(dev)) { | 209 | if (IS_PINEVIEW(dev)) { |
247 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); | 210 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 6d6fde85a636..34306865a5df 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h | |||
@@ -14,22 +14,23 @@ struct intel_hw_status_page { | |||
14 | struct drm_i915_gem_object *obj; | 14 | struct drm_i915_gem_object *obj; |
15 | }; | 15 | }; |
16 | 16 | ||
17 | #define I915_RING_READ(reg) i915_safe_read(dev_priv, reg) | 17 | #define I915_RING_READ(reg) i915_gt_read(dev_priv, reg) |
18 | #define I915_RING_WRITE(reg, val) i915_gt_write(dev_priv, reg, val) | ||
18 | 19 | ||
19 | #define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base)) | 20 | #define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base)) |
20 | #define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val) | 21 | #define I915_WRITE_TAIL(ring, val) I915_RING_WRITE(RING_TAIL((ring)->mmio_base), val) |
21 | 22 | ||
22 | #define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base)) | 23 | #define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base)) |
23 | #define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val) | 24 | #define I915_WRITE_START(ring, val) I915_RING_WRITE(RING_START((ring)->mmio_base), val) |
24 | 25 | ||
25 | #define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base)) | 26 | #define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base)) |
26 | #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val) | 27 | #define I915_WRITE_HEAD(ring, val) I915_RING_WRITE(RING_HEAD((ring)->mmio_base), val) |
27 | 28 | ||
28 | #define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base)) | 29 | #define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base)) |
29 | #define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val) | 30 | #define I915_WRITE_CTL(ring, val) I915_RING_WRITE(RING_CTL((ring)->mmio_base), val) |
30 | 31 | ||
31 | #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) | ||
32 | #define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base)) | 32 | #define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base)) |
33 | #define I915_WRITE_IMR(ring, val) I915_RING_WRITE(RING_IMR((ring)->mmio_base), val) | ||
33 | 34 | ||
34 | #define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base)) | 35 | #define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base)) |
35 | #define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base)) | 36 | #define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base)) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 49e5e99917e2..6bdab891c64e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -6228,7 +6228,7 @@ parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, | |||
6228 | entry->tvconf.has_component_output = false; | 6228 | entry->tvconf.has_component_output = false; |
6229 | break; | 6229 | break; |
6230 | case OUTPUT_LVDS: | 6230 | case OUTPUT_LVDS: |
6231 | if ((conn & 0x00003f00) != 0x10) | 6231 | if ((conn & 0x00003f00) >> 8 != 0x10) |
6232 | entry->lvdsconf.use_straps_for_mode = true; | 6232 | entry->lvdsconf.use_straps_for_mode = true; |
6233 | entry->lvdsconf.use_power_scripts = true; | 6233 | entry->lvdsconf.use_power_scripts = true; |
6234 | break; | 6234 | break; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index a7fae26f4654..a52184007f5f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -49,7 +49,10 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo) | |||
49 | DRM_ERROR("bo %p still attached to GEM object\n", bo); | 49 | DRM_ERROR("bo %p still attached to GEM object\n", bo); |
50 | 50 | ||
51 | nv10_mem_put_tile_region(dev, nvbo->tile, NULL); | 51 | nv10_mem_put_tile_region(dev, nvbo->tile, NULL); |
52 | nouveau_vm_put(&nvbo->vma); | 52 | if (nvbo->vma.node) { |
53 | nouveau_vm_unmap(&nvbo->vma); | ||
54 | nouveau_vm_put(&nvbo->vma); | ||
55 | } | ||
53 | kfree(nvbo); | 56 | kfree(nvbo); |
54 | } | 57 | } |
55 | 58 | ||
@@ -128,6 +131,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, | |||
128 | } | 131 | } |
129 | } | 132 | } |
130 | 133 | ||
134 | nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; | ||
131 | nouveau_bo_placement_set(nvbo, flags, 0); | 135 | nouveau_bo_placement_set(nvbo, flags, 0); |
132 | 136 | ||
133 | nvbo->channel = chan; | 137 | nvbo->channel = chan; |
@@ -166,17 +170,17 @@ static void | |||
166 | set_placement_range(struct nouveau_bo *nvbo, uint32_t type) | 170 | set_placement_range(struct nouveau_bo *nvbo, uint32_t type) |
167 | { | 171 | { |
168 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); | 172 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
173 | int vram_pages = dev_priv->vram_size >> PAGE_SHIFT; | ||
169 | 174 | ||
170 | if (dev_priv->card_type == NV_10 && | 175 | if (dev_priv->card_type == NV_10 && |
171 | nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM)) { | 176 | nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && |
177 | nvbo->bo.mem.num_pages < vram_pages / 2) { | ||
172 | /* | 178 | /* |
173 | * Make sure that the color and depth buffers are handled | 179 | * Make sure that the color and depth buffers are handled |
174 | * by independent memory controller units. Up to a 9x | 180 | * by independent memory controller units. Up to a 9x |
175 | * speed up when alpha-blending and depth-test are enabled | 181 | * speed up when alpha-blending and depth-test are enabled |
176 | * at the same time. | 182 | * at the same time. |
177 | */ | 183 | */ |
178 | int vram_pages = dev_priv->vram_size >> PAGE_SHIFT; | ||
179 | |||
180 | if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) { | 184 | if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) { |
181 | nvbo->placement.fpfn = vram_pages / 2; | 185 | nvbo->placement.fpfn = vram_pages / 2; |
182 | nvbo->placement.lpfn = ~0; | 186 | nvbo->placement.lpfn = ~0; |
@@ -785,7 +789,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr, | |||
785 | if (ret) | 789 | if (ret) |
786 | goto out; | 790 | goto out; |
787 | 791 | ||
788 | ret = ttm_bo_move_ttm(bo, evict, no_wait_reserve, no_wait_gpu, new_mem); | 792 | ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem); |
789 | out: | 793 | out: |
790 | ttm_bo_mem_put(bo, &tmp_mem); | 794 | ttm_bo_mem_put(bo, &tmp_mem); |
791 | return ret; | 795 | return ret; |
@@ -811,11 +815,11 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr, | |||
811 | if (ret) | 815 | if (ret) |
812 | return ret; | 816 | return ret; |
813 | 817 | ||
814 | ret = ttm_bo_move_ttm(bo, evict, no_wait_reserve, no_wait_gpu, &tmp_mem); | 818 | ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem); |
815 | if (ret) | 819 | if (ret) |
816 | goto out; | 820 | goto out; |
817 | 821 | ||
818 | ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem); | 822 | ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, new_mem); |
819 | if (ret) | 823 | if (ret) |
820 | goto out; | 824 | goto out; |
821 | 825 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index a21e00076839..390d82c3c4b0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -507,6 +507,7 @@ nouveau_connector_native_mode(struct drm_connector *connector) | |||
507 | int high_w = 0, high_h = 0, high_v = 0; | 507 | int high_w = 0, high_h = 0, high_v = 0; |
508 | 508 | ||
509 | list_for_each_entry(mode, &nv_connector->base.probed_modes, head) { | 509 | list_for_each_entry(mode, &nv_connector->base.probed_modes, head) { |
510 | mode->vrefresh = drm_mode_vrefresh(mode); | ||
510 | if (helper->mode_valid(connector, mode) != MODE_OK || | 511 | if (helper->mode_valid(connector, mode) != MODE_OK || |
511 | (mode->flags & DRM_MODE_FLAG_INTERLACE)) | 512 | (mode->flags & DRM_MODE_FLAG_INTERLACE)) |
512 | continue; | 513 | continue; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c index 65699bfaaaea..b368ed74aad7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c | |||
@@ -83,7 +83,8 @@ nouveau_dma_init(struct nouveau_channel *chan) | |||
83 | return ret; | 83 | return ret; |
84 | 84 | ||
85 | /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */ | 85 | /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */ |
86 | ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy); | 86 | ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfd0, 0x1000, |
87 | &chan->m2mf_ntfy); | ||
87 | if (ret) | 88 | if (ret) |
88 | return ret; | 89 | return ret; |
89 | 90 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 9821fcacc3d2..982d70b12722 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -852,7 +852,8 @@ extern const struct ttm_mem_type_manager_func nouveau_vram_manager; | |||
852 | extern int nouveau_notifier_init_channel(struct nouveau_channel *); | 852 | extern int nouveau_notifier_init_channel(struct nouveau_channel *); |
853 | extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); | 853 | extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); |
854 | extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, | 854 | extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, |
855 | int cout, uint32_t *offset); | 855 | int cout, uint32_t start, uint32_t end, |
856 | uint32_t *offset); | ||
856 | extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *); | 857 | extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *); |
857 | extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data, | 858 | extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data, |
858 | struct drm_file *); | 859 | struct drm_file *); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 26347b7cd872..b0fb9bdcddb7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -725,8 +725,10 @@ nouveau_vram_manager_new(struct ttm_mem_type_manager *man, | |||
725 | ret = vram->get(dev, mem->num_pages << PAGE_SHIFT, | 725 | ret = vram->get(dev, mem->num_pages << PAGE_SHIFT, |
726 | mem->page_alignment << PAGE_SHIFT, size_nc, | 726 | mem->page_alignment << PAGE_SHIFT, size_nc, |
727 | (nvbo->tile_flags >> 8) & 0xff, &node); | 727 | (nvbo->tile_flags >> 8) & 0xff, &node); |
728 | if (ret) | 728 | if (ret) { |
729 | return ret; | 729 | mem->mm_node = NULL; |
730 | return (ret == -ENOSPC) ? 0 : ret; | ||
731 | } | ||
730 | 732 | ||
731 | node->page_shift = 12; | 733 | node->page_shift = 12; |
732 | if (nvbo->vma.node) | 734 | if (nvbo->vma.node) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mm.c b/drivers/gpu/drm/nouveau/nouveau_mm.c index 8844b50c3e54..7609756b6faf 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mm.c +++ b/drivers/gpu/drm/nouveau/nouveau_mm.c | |||
@@ -123,7 +123,7 @@ nouveau_mm_get(struct nouveau_mm *rmm, int type, u32 size, u32 size_nc, | |||
123 | return 0; | 123 | return 0; |
124 | } | 124 | } |
125 | 125 | ||
126 | return -ENOMEM; | 126 | return -ENOSPC; |
127 | } | 127 | } |
128 | 128 | ||
129 | int | 129 | int |
diff --git a/drivers/gpu/drm/nouveau/nouveau_notifier.c b/drivers/gpu/drm/nouveau/nouveau_notifier.c index fe29d604b820..5ea167623a82 100644 --- a/drivers/gpu/drm/nouveau/nouveau_notifier.c +++ b/drivers/gpu/drm/nouveau/nouveau_notifier.c | |||
@@ -96,7 +96,8 @@ nouveau_notifier_gpuobj_dtor(struct drm_device *dev, | |||
96 | 96 | ||
97 | int | 97 | int |
98 | nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, | 98 | nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, |
99 | int size, uint32_t *b_offset) | 99 | int size, uint32_t start, uint32_t end, |
100 | uint32_t *b_offset) | ||
100 | { | 101 | { |
101 | struct drm_device *dev = chan->dev; | 102 | struct drm_device *dev = chan->dev; |
102 | struct nouveau_gpuobj *nobj = NULL; | 103 | struct nouveau_gpuobj *nobj = NULL; |
@@ -104,9 +105,10 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, | |||
104 | uint32_t offset; | 105 | uint32_t offset; |
105 | int target, ret; | 106 | int target, ret; |
106 | 107 | ||
107 | mem = drm_mm_search_free(&chan->notifier_heap, size, 0, 0); | 108 | mem = drm_mm_search_free_in_range(&chan->notifier_heap, size, 0, |
109 | start, end, 0); | ||
108 | if (mem) | 110 | if (mem) |
109 | mem = drm_mm_get_block(mem, size, 0); | 111 | mem = drm_mm_get_block_range(mem, size, 0, start, end); |
110 | if (!mem) { | 112 | if (!mem) { |
111 | NV_ERROR(dev, "Channel %d notifier block full\n", chan->id); | 113 | NV_ERROR(dev, "Channel %d notifier block full\n", chan->id); |
112 | return -ENOMEM; | 114 | return -ENOMEM; |
@@ -177,7 +179,8 @@ nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data, | |||
177 | if (IS_ERR(chan)) | 179 | if (IS_ERR(chan)) |
178 | return PTR_ERR(chan); | 180 | return PTR_ERR(chan); |
179 | 181 | ||
180 | ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset); | 182 | ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000, |
183 | &na->offset); | ||
181 | nouveau_channel_put(&chan); | 184 | nouveau_channel_put(&chan); |
182 | return ret; | 185 | return ret; |
183 | } | 186 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c index f05c0cddfeca..4399e2f34db4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.c +++ b/drivers/gpu/drm/nouveau/nouveau_pm.c | |||
@@ -543,7 +543,7 @@ nouveau_pm_resume(struct drm_device *dev) | |||
543 | struct nouveau_pm_engine *pm = &dev_priv->engine.pm; | 543 | struct nouveau_pm_engine *pm = &dev_priv->engine.pm; |
544 | struct nouveau_pm_level *perflvl; | 544 | struct nouveau_pm_level *perflvl; |
545 | 545 | ||
546 | if (pm->cur == &pm->boot) | 546 | if (!pm->cur || pm->cur == &pm->boot) |
547 | return; | 547 | return; |
548 | 548 | ||
549 | perflvl = pm->cur; | 549 | perflvl = pm->cur; |
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c index ef23550407b5..c82db37d9f41 100644 --- a/drivers/gpu/drm/nouveau/nv04_dfp.c +++ b/drivers/gpu/drm/nouveau/nv04_dfp.c | |||
@@ -342,8 +342,8 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder, | |||
342 | if (nv_encoder->dcb->type == OUTPUT_LVDS) { | 342 | if (nv_encoder->dcb->type == OUTPUT_LVDS) { |
343 | bool duallink, dummy; | 343 | bool duallink, dummy; |
344 | 344 | ||
345 | nouveau_bios_parse_lvds_table(dev, nv_connector->native_mode-> | 345 | nouveau_bios_parse_lvds_table(dev, output_mode->clock, |
346 | clock, &duallink, &dummy); | 346 | &duallink, &dummy); |
347 | if (duallink) | 347 | if (duallink) |
348 | regp->fp_control |= (8 << 28); | 348 | regp->fp_control |= (8 << 28); |
349 | } else | 349 | } else |
@@ -518,8 +518,6 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
518 | return; | 518 | return; |
519 | 519 | ||
520 | if (nv_encoder->dcb->lvdsconf.use_power_scripts) { | 520 | if (nv_encoder->dcb->lvdsconf.use_power_scripts) { |
521 | struct nouveau_connector *nv_connector = nouveau_encoder_connector_get(nv_encoder); | ||
522 | |||
523 | /* when removing an output, crtc may not be set, but PANEL_OFF | 521 | /* when removing an output, crtc may not be set, but PANEL_OFF |
524 | * must still be run | 522 | * must still be run |
525 | */ | 523 | */ |
@@ -527,12 +525,8 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
527 | nv04_dfp_get_bound_head(dev, nv_encoder->dcb); | 525 | nv04_dfp_get_bound_head(dev, nv_encoder->dcb); |
528 | 526 | ||
529 | if (mode == DRM_MODE_DPMS_ON) { | 527 | if (mode == DRM_MODE_DPMS_ON) { |
530 | if (!nv_connector->native_mode) { | ||
531 | NV_ERROR(dev, "Not turning on LVDS without native mode\n"); | ||
532 | return; | ||
533 | } | ||
534 | call_lvds_script(dev, nv_encoder->dcb, head, | 528 | call_lvds_script(dev, nv_encoder->dcb, head, |
535 | LVDS_PANEL_ON, nv_connector->native_mode->clock); | 529 | LVDS_PANEL_ON, nv_encoder->mode.clock); |
536 | } else | 530 | } else |
537 | /* pxclk of 0 is fine for PANEL_OFF, and for a | 531 | /* pxclk of 0 is fine for PANEL_OFF, and for a |
538 | * disconnected LVDS encoder there is no native_mode | 532 | * disconnected LVDS encoder there is no native_mode |
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 8870d72388c8..18d30c2c1aa6 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c | |||
@@ -211,18 +211,32 @@ nv40_graph_set_tile_region(struct drm_device *dev, int i) | |||
211 | struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i]; | 211 | struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i]; |
212 | 212 | ||
213 | switch (dev_priv->chipset) { | 213 | switch (dev_priv->chipset) { |
214 | case 0x40: | ||
215 | case 0x41: /* guess */ | ||
216 | case 0x42: | ||
217 | case 0x43: | ||
218 | case 0x45: /* guess */ | ||
219 | case 0x4e: | ||
220 | nv_wr32(dev, NV20_PGRAPH_TSIZE(i), tile->pitch); | ||
221 | nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), tile->limit); | ||
222 | nv_wr32(dev, NV20_PGRAPH_TILE(i), tile->addr); | ||
223 | nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tile->pitch); | ||
224 | nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tile->limit); | ||
225 | nv_wr32(dev, NV40_PGRAPH_TILE1(i), tile->addr); | ||
226 | break; | ||
214 | case 0x44: | 227 | case 0x44: |
215 | case 0x4a: | 228 | case 0x4a: |
216 | case 0x4e: | ||
217 | nv_wr32(dev, NV20_PGRAPH_TSIZE(i), tile->pitch); | 229 | nv_wr32(dev, NV20_PGRAPH_TSIZE(i), tile->pitch); |
218 | nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), tile->limit); | 230 | nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), tile->limit); |
219 | nv_wr32(dev, NV20_PGRAPH_TILE(i), tile->addr); | 231 | nv_wr32(dev, NV20_PGRAPH_TILE(i), tile->addr); |
220 | break; | 232 | break; |
221 | |||
222 | case 0x46: | 233 | case 0x46: |
223 | case 0x47: | 234 | case 0x47: |
224 | case 0x49: | 235 | case 0x49: |
225 | case 0x4b: | 236 | case 0x4b: |
237 | case 0x4c: | ||
238 | case 0x67: | ||
239 | default: | ||
226 | nv_wr32(dev, NV47_PGRAPH_TSIZE(i), tile->pitch); | 240 | nv_wr32(dev, NV47_PGRAPH_TSIZE(i), tile->pitch); |
227 | nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), tile->limit); | 241 | nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), tile->limit); |
228 | nv_wr32(dev, NV47_PGRAPH_TILE(i), tile->addr); | 242 | nv_wr32(dev, NV47_PGRAPH_TILE(i), tile->addr); |
@@ -230,15 +244,6 @@ nv40_graph_set_tile_region(struct drm_device *dev, int i) | |||
230 | nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tile->limit); | 244 | nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tile->limit); |
231 | nv_wr32(dev, NV40_PGRAPH_TILE1(i), tile->addr); | 245 | nv_wr32(dev, NV40_PGRAPH_TILE1(i), tile->addr); |
232 | break; | 246 | break; |
233 | |||
234 | default: | ||
235 | nv_wr32(dev, NV20_PGRAPH_TSIZE(i), tile->pitch); | ||
236 | nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), tile->limit); | ||
237 | nv_wr32(dev, NV20_PGRAPH_TILE(i), tile->addr); | ||
238 | nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tile->pitch); | ||
239 | nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tile->limit); | ||
240 | nv_wr32(dev, NV40_PGRAPH_TILE1(i), tile->addr); | ||
241 | break; | ||
242 | } | 247 | } |
243 | } | 248 | } |
244 | 249 | ||
@@ -396,17 +401,20 @@ nv40_graph_init(struct drm_device *dev) | |||
396 | break; | 401 | break; |
397 | default: | 402 | default: |
398 | switch (dev_priv->chipset) { | 403 | switch (dev_priv->chipset) { |
399 | case 0x46: | 404 | case 0x41: |
400 | case 0x47: | 405 | case 0x42: |
401 | case 0x49: | 406 | case 0x43: |
402 | case 0x4b: | 407 | case 0x45: |
403 | nv_wr32(dev, 0x400DF0, nv_rd32(dev, NV04_PFB_CFG0)); | 408 | case 0x4e: |
404 | nv_wr32(dev, 0x400DF4, nv_rd32(dev, NV04_PFB_CFG1)); | 409 | case 0x44: |
405 | break; | 410 | case 0x4a: |
406 | default: | ||
407 | nv_wr32(dev, 0x4009F0, nv_rd32(dev, NV04_PFB_CFG0)); | 411 | nv_wr32(dev, 0x4009F0, nv_rd32(dev, NV04_PFB_CFG0)); |
408 | nv_wr32(dev, 0x4009F4, nv_rd32(dev, NV04_PFB_CFG1)); | 412 | nv_wr32(dev, 0x4009F4, nv_rd32(dev, NV04_PFB_CFG1)); |
409 | break; | 413 | break; |
414 | default: | ||
415 | nv_wr32(dev, 0x400DF0, nv_rd32(dev, NV04_PFB_CFG0)); | ||
416 | nv_wr32(dev, 0x400DF4, nv_rd32(dev, NV04_PFB_CFG1)); | ||
417 | break; | ||
410 | } | 418 | } |
411 | nv_wr32(dev, 0x4069F0, nv_rd32(dev, NV04_PFB_CFG0)); | 419 | nv_wr32(dev, 0x4069F0, nv_rd32(dev, NV04_PFB_CFG0)); |
412 | nv_wr32(dev, 0x4069F4, nv_rd32(dev, NV04_PFB_CFG1)); | 420 | nv_wr32(dev, 0x4069F4, nv_rd32(dev, NV04_PFB_CFG1)); |
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index ea0041810ae3..e57caa2a00e3 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
@@ -403,16 +403,24 @@ nv50_instmem_unmap(struct nouveau_gpuobj *gpuobj) | |||
403 | void | 403 | void |
404 | nv50_instmem_flush(struct drm_device *dev) | 404 | nv50_instmem_flush(struct drm_device *dev) |
405 | { | 405 | { |
406 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
407 | |||
408 | spin_lock(&dev_priv->ramin_lock); | ||
406 | nv_wr32(dev, 0x00330c, 0x00000001); | 409 | nv_wr32(dev, 0x00330c, 0x00000001); |
407 | if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000)) | 410 | if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000)) |
408 | NV_ERROR(dev, "PRAMIN flush timeout\n"); | 411 | NV_ERROR(dev, "PRAMIN flush timeout\n"); |
412 | spin_unlock(&dev_priv->ramin_lock); | ||
409 | } | 413 | } |
410 | 414 | ||
411 | void | 415 | void |
412 | nv84_instmem_flush(struct drm_device *dev) | 416 | nv84_instmem_flush(struct drm_device *dev) |
413 | { | 417 | { |
418 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
419 | |||
420 | spin_lock(&dev_priv->ramin_lock); | ||
414 | nv_wr32(dev, 0x070000, 0x00000001); | 421 | nv_wr32(dev, 0x070000, 0x00000001); |
415 | if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000)) | 422 | if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000)) |
416 | NV_ERROR(dev, "PRAMIN flush timeout\n"); | 423 | NV_ERROR(dev, "PRAMIN flush timeout\n"); |
424 | spin_unlock(&dev_priv->ramin_lock); | ||
417 | } | 425 | } |
418 | 426 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_vm.c b/drivers/gpu/drm/nouveau/nv50_vm.c index 459ff08241e5..6144156f255a 100644 --- a/drivers/gpu/drm/nouveau/nv50_vm.c +++ b/drivers/gpu/drm/nouveau/nv50_vm.c | |||
@@ -169,7 +169,11 @@ nv50_vm_flush(struct nouveau_vm *vm) | |||
169 | void | 169 | void |
170 | nv50_vm_flush_engine(struct drm_device *dev, int engine) | 170 | nv50_vm_flush_engine(struct drm_device *dev, int engine) |
171 | { | 171 | { |
172 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
173 | |||
174 | spin_lock(&dev_priv->ramin_lock); | ||
172 | nv_wr32(dev, 0x100c80, (engine << 16) | 1); | 175 | nv_wr32(dev, 0x100c80, (engine << 16) | 1); |
173 | if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000)) | 176 | if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000)) |
174 | NV_ERROR(dev, "vm flush timeout: engine %d\n", engine); | 177 | NV_ERROR(dev, "vm flush timeout: engine %d\n", engine); |
178 | spin_unlock(&dev_priv->ramin_lock); | ||
175 | } | 179 | } |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 095bc507fb16..a4e5e53e0a62 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -557,9 +557,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
557 | 557 | ||
558 | /* use recommended ref_div for ss */ | 558 | /* use recommended ref_div for ss */ |
559 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 559 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
560 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; | ||
561 | if (ss_enabled) { | 560 | if (ss_enabled) { |
562 | if (ss->refdiv) { | 561 | if (ss->refdiv) { |
562 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; | ||
563 | pll->flags |= RADEON_PLL_USE_REF_DIV; | 563 | pll->flags |= RADEON_PLL_USE_REF_DIV; |
564 | pll->reference_div = ss->refdiv; | 564 | pll->reference_div = ss->refdiv; |
565 | if (ASIC_IS_AVIVO(rdev)) | 565 | if (ASIC_IS_AVIVO(rdev)) |
@@ -662,10 +662,12 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
662 | index, (uint32_t *)&args); | 662 | index, (uint32_t *)&args); |
663 | adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; | 663 | adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; |
664 | if (args.v3.sOutput.ucRefDiv) { | 664 | if (args.v3.sOutput.ucRefDiv) { |
665 | pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; | ||
665 | pll->flags |= RADEON_PLL_USE_REF_DIV; | 666 | pll->flags |= RADEON_PLL_USE_REF_DIV; |
666 | pll->reference_div = args.v3.sOutput.ucRefDiv; | 667 | pll->reference_div = args.v3.sOutput.ucRefDiv; |
667 | } | 668 | } |
668 | if (args.v3.sOutput.ucPostDiv) { | 669 | if (args.v3.sOutput.ucPostDiv) { |
670 | pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; | ||
669 | pll->flags |= RADEON_PLL_USE_POST_DIV; | 671 | pll->flags |= RADEON_PLL_USE_POST_DIV; |
670 | pll->post_div = args.v3.sOutput.ucPostDiv; | 672 | pll->post_div = args.v3.sOutput.ucPostDiv; |
671 | } | 673 | } |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 56deae5bf02e..93fa735c8c1a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -3490,7 +3490,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track | |||
3490 | track->num_texture = 16; | 3490 | track->num_texture = 16; |
3491 | track->maxy = 4096; | 3491 | track->maxy = 4096; |
3492 | track->separate_cube = 0; | 3492 | track->separate_cube = 0; |
3493 | track->aaresolve = true; | 3493 | track->aaresolve = false; |
3494 | track->aa.robj = NULL; | 3494 | track->aa.robj = NULL; |
3495 | } | 3495 | } |
3496 | 3496 | ||
@@ -3801,8 +3801,6 @@ static int r100_startup(struct radeon_device *rdev) | |||
3801 | r100_mc_program(rdev); | 3801 | r100_mc_program(rdev); |
3802 | /* Resume clock */ | 3802 | /* Resume clock */ |
3803 | r100_clock_startup(rdev); | 3803 | r100_clock_startup(rdev); |
3804 | /* Initialize GPU configuration (# pipes, ...) */ | ||
3805 | // r100_gpu_init(rdev); | ||
3806 | /* Initialize GART (initialize after TTM so we can allocate | 3804 | /* Initialize GART (initialize after TTM so we can allocate |
3807 | * memory through TTM but finalize after TTM) */ | 3805 | * memory through TTM but finalize after TTM) */ |
3808 | r100_enable_bm(rdev); | 3806 | r100_enable_bm(rdev); |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 768c60ee4ab6..069efa8c8ecf 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -910,6 +910,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
910 | track->textures[i].compress_format = R100_TRACK_COMP_NONE; | 910 | track->textures[i].compress_format = R100_TRACK_COMP_NONE; |
911 | break; | 911 | break; |
912 | case R300_TX_FORMAT_X16: | 912 | case R300_TX_FORMAT_X16: |
913 | case R300_TX_FORMAT_FL_I16: | ||
913 | case R300_TX_FORMAT_Y8X8: | 914 | case R300_TX_FORMAT_Y8X8: |
914 | case R300_TX_FORMAT_Z5Y6X5: | 915 | case R300_TX_FORMAT_Z5Y6X5: |
915 | case R300_TX_FORMAT_Z6Y5X5: | 916 | case R300_TX_FORMAT_Z6Y5X5: |
@@ -922,6 +923,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
922 | track->textures[i].compress_format = R100_TRACK_COMP_NONE; | 923 | track->textures[i].compress_format = R100_TRACK_COMP_NONE; |
923 | break; | 924 | break; |
924 | case R300_TX_FORMAT_Y16X16: | 925 | case R300_TX_FORMAT_Y16X16: |
926 | case R300_TX_FORMAT_FL_I16A16: | ||
925 | case R300_TX_FORMAT_Z11Y11X10: | 927 | case R300_TX_FORMAT_Z11Y11X10: |
926 | case R300_TX_FORMAT_Z10Y11X11: | 928 | case R300_TX_FORMAT_Z10Y11X11: |
927 | case R300_TX_FORMAT_W8Z8Y8X8: | 929 | case R300_TX_FORMAT_W8Z8Y8X8: |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 0e657095de7c..3e7e7f9eb781 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -971,7 +971,7 @@ void radeon_compute_pll_legacy(struct radeon_pll *pll, | |||
971 | max_fractional_feed_div = pll->max_frac_feedback_div; | 971 | max_fractional_feed_div = pll->max_frac_feedback_div; |
972 | } | 972 | } |
973 | 973 | ||
974 | for (post_div = min_post_div; post_div <= max_post_div; ++post_div) { | 974 | for (post_div = max_post_div; post_div >= min_post_div; --post_div) { |
975 | uint32_t ref_div; | 975 | uint32_t ref_div; |
976 | 976 | ||
977 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) | 977 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) |
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index 66324b5bb5ba..cc44bdfec80f 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c | |||
@@ -113,11 +113,14 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, | |||
113 | u32 tiling_flags = 0; | 113 | u32 tiling_flags = 0; |
114 | int ret; | 114 | int ret; |
115 | int aligned_size, size; | 115 | int aligned_size, size; |
116 | int height = mode_cmd->height; | ||
116 | 117 | ||
117 | /* need to align pitch with crtc limits */ | 118 | /* need to align pitch with crtc limits */ |
118 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); | 119 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); |
119 | 120 | ||
120 | size = mode_cmd->pitch * mode_cmd->height; | 121 | if (rdev->family >= CHIP_R600) |
122 | height = ALIGN(mode_cmd->height, 8); | ||
123 | size = mode_cmd->pitch * height; | ||
121 | aligned_size = ALIGN(size, PAGE_SIZE); | 124 | aligned_size = ALIGN(size, PAGE_SIZE); |
122 | ret = radeon_gem_object_create(rdev, aligned_size, 0, | 125 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
123 | RADEON_GEM_DOMAIN_VRAM, | 126 | RADEON_GEM_DOMAIN_VRAM, |
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 773e484f1646..297bc9a7d6e6 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
@@ -238,13 +238,13 @@ config SENSORS_K8TEMP | |||
238 | will be called k8temp. | 238 | will be called k8temp. |
239 | 239 | ||
240 | config SENSORS_K10TEMP | 240 | config SENSORS_K10TEMP |
241 | tristate "AMD Phenom/Sempron/Turion/Opteron temperature sensor" | 241 | tristate "AMD Family 10h/11h/12h/14h temperature sensor" |
242 | depends on X86 && PCI | 242 | depends on X86 && PCI |
243 | help | 243 | help |
244 | If you say yes here you get support for the temperature | 244 | If you say yes here you get support for the temperature |
245 | sensor(s) inside your CPU. Supported are later revisions of | 245 | sensor(s) inside your CPU. Supported are later revisions of |
246 | the AMD Family 10h and all revisions of the AMD Family 11h | 246 | the AMD Family 10h and all revisions of the AMD Family 11h, |
247 | microarchitectures. | 247 | 12h (Llano), and 14h (Brazos) microarchitectures. |
248 | 248 | ||
249 | This driver can also be built as a module. If so, the module | 249 | This driver can also be built as a module. If so, the module |
250 | will be called k10temp. | 250 | will be called k10temp. |
@@ -455,13 +455,14 @@ config SENSORS_JZ4740 | |||
455 | called jz4740-hwmon. | 455 | called jz4740-hwmon. |
456 | 456 | ||
457 | config SENSORS_JC42 | 457 | config SENSORS_JC42 |
458 | tristate "JEDEC JC42.4 compliant temperature sensors" | 458 | tristate "JEDEC JC42.4 compliant memory module temperature sensors" |
459 | depends on I2C | 459 | depends on I2C |
460 | help | 460 | help |
461 | If you say yes here you get support for Jedec JC42.4 compliant | 461 | If you say yes here, you get support for JEDEC JC42.4 compliant |
462 | temperature sensors. Support will include, but not be limited to, | 462 | temperature sensors, which are used on many DDR3 memory modules for |
463 | ADT7408, CAT34TS02,, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243, | 463 | mobile devices and servers. Support will include, but not be limited |
464 | MCP9843, SE97, SE98, STTS424, TSE2002B3, and TS3000B3. | 464 | to, ADT7408, CAT34TS02, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243, |
465 | MCP9843, SE97, SE98, STTS424(E), TSE2002B3, and TS3000B3. | ||
465 | 466 | ||
466 | This driver can also be built as a module. If so, the module | 467 | This driver can also be built as a module. If so, the module |
467 | will be called jc42. | 468 | will be called jc42. |
@@ -574,7 +575,7 @@ config SENSORS_LM85 | |||
574 | help | 575 | help |
575 | If you say yes here you get support for National Semiconductor LM85 | 576 | If you say yes here you get support for National Semiconductor LM85 |
576 | sensor chips and clones: ADM1027, ADT7463, ADT7468, EMC6D100, | 577 | sensor chips and clones: ADM1027, ADT7463, ADT7468, EMC6D100, |
577 | EMC6D101 and EMC6D102. | 578 | EMC6D101, EMC6D102, and EMC6D103. |
578 | 579 | ||
579 | This driver can also be built as a module. If so, the module | 580 | This driver can also be built as a module. If so, the module |
580 | will be called lm85. | 581 | will be called lm85. |
diff --git a/drivers/hwmon/ad7414.c b/drivers/hwmon/ad7414.c index 86d822aa9bbf..d46c0c758ddf 100644 --- a/drivers/hwmon/ad7414.c +++ b/drivers/hwmon/ad7414.c | |||
@@ -242,6 +242,7 @@ static const struct i2c_device_id ad7414_id[] = { | |||
242 | { "ad7414", 0 }, | 242 | { "ad7414", 0 }, |
243 | {} | 243 | {} |
244 | }; | 244 | }; |
245 | MODULE_DEVICE_TABLE(i2c, ad7414_id); | ||
245 | 246 | ||
246 | static struct i2c_driver ad7414_driver = { | 247 | static struct i2c_driver ad7414_driver = { |
247 | .driver = { | 248 | .driver = { |
diff --git a/drivers/hwmon/adt7411.c b/drivers/hwmon/adt7411.c index f13c843a2964..5cc3e3784b42 100644 --- a/drivers/hwmon/adt7411.c +++ b/drivers/hwmon/adt7411.c | |||
@@ -334,6 +334,7 @@ static const struct i2c_device_id adt7411_id[] = { | |||
334 | { "adt7411", 0 }, | 334 | { "adt7411", 0 }, |
335 | { } | 335 | { } |
336 | }; | 336 | }; |
337 | MODULE_DEVICE_TABLE(i2c, adt7411_id); | ||
337 | 338 | ||
338 | static struct i2c_driver adt7411_driver = { | 339 | static struct i2c_driver adt7411_driver = { |
339 | .driver = { | 340 | .driver = { |
diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 340fc78c8dde..934991237061 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c | |||
@@ -53,6 +53,8 @@ static const unsigned short normal_i2c[] = { | |||
53 | 53 | ||
54 | /* Configuration register defines */ | 54 | /* Configuration register defines */ |
55 | #define JC42_CFG_CRIT_ONLY (1 << 2) | 55 | #define JC42_CFG_CRIT_ONLY (1 << 2) |
56 | #define JC42_CFG_TCRIT_LOCK (1 << 6) | ||
57 | #define JC42_CFG_EVENT_LOCK (1 << 7) | ||
56 | #define JC42_CFG_SHUTDOWN (1 << 8) | 58 | #define JC42_CFG_SHUTDOWN (1 << 8) |
57 | #define JC42_CFG_HYST_SHIFT 9 | 59 | #define JC42_CFG_HYST_SHIFT 9 |
58 | #define JC42_CFG_HYST_MASK 0x03 | 60 | #define JC42_CFG_HYST_MASK 0x03 |
@@ -332,7 +334,7 @@ static ssize_t set_temp_crit_hyst(struct device *dev, | |||
332 | { | 334 | { |
333 | struct i2c_client *client = to_i2c_client(dev); | 335 | struct i2c_client *client = to_i2c_client(dev); |
334 | struct jc42_data *data = i2c_get_clientdata(client); | 336 | struct jc42_data *data = i2c_get_clientdata(client); |
335 | long val; | 337 | unsigned long val; |
336 | int diff, hyst; | 338 | int diff, hyst; |
337 | int err; | 339 | int err; |
338 | int ret = count; | 340 | int ret = count; |
@@ -380,14 +382,14 @@ static ssize_t show_alarm(struct device *dev, | |||
380 | 382 | ||
381 | static DEVICE_ATTR(temp1_input, S_IRUGO, | 383 | static DEVICE_ATTR(temp1_input, S_IRUGO, |
382 | show_temp_input, NULL); | 384 | show_temp_input, NULL); |
383 | static DEVICE_ATTR(temp1_crit, S_IWUSR | S_IRUGO, | 385 | static DEVICE_ATTR(temp1_crit, S_IRUGO, |
384 | show_temp_crit, set_temp_crit); | 386 | show_temp_crit, set_temp_crit); |
385 | static DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO, | 387 | static DEVICE_ATTR(temp1_min, S_IRUGO, |
386 | show_temp_min, set_temp_min); | 388 | show_temp_min, set_temp_min); |
387 | static DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, | 389 | static DEVICE_ATTR(temp1_max, S_IRUGO, |
388 | show_temp_max, set_temp_max); | 390 | show_temp_max, set_temp_max); |
389 | 391 | ||
390 | static DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, | 392 | static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, |
391 | show_temp_crit_hyst, set_temp_crit_hyst); | 393 | show_temp_crit_hyst, set_temp_crit_hyst); |
392 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, | 394 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, |
393 | show_temp_max_hyst, NULL); | 395 | show_temp_max_hyst, NULL); |
@@ -412,8 +414,31 @@ static struct attribute *jc42_attributes[] = { | |||
412 | NULL | 414 | NULL |
413 | }; | 415 | }; |
414 | 416 | ||
417 | static mode_t jc42_attribute_mode(struct kobject *kobj, | ||
418 | struct attribute *attr, int index) | ||
419 | { | ||
420 | struct device *dev = container_of(kobj, struct device, kobj); | ||
421 | struct i2c_client *client = to_i2c_client(dev); | ||
422 | struct jc42_data *data = i2c_get_clientdata(client); | ||
423 | unsigned int config = data->config; | ||
424 | bool readonly; | ||
425 | |||
426 | if (attr == &dev_attr_temp1_crit.attr) | ||
427 | readonly = config & JC42_CFG_TCRIT_LOCK; | ||
428 | else if (attr == &dev_attr_temp1_min.attr || | ||
429 | attr == &dev_attr_temp1_max.attr) | ||
430 | readonly = config & JC42_CFG_EVENT_LOCK; | ||
431 | else if (attr == &dev_attr_temp1_crit_hyst.attr) | ||
432 | readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK); | ||
433 | else | ||
434 | readonly = true; | ||
435 | |||
436 | return S_IRUGO | (readonly ? 0 : S_IWUSR); | ||
437 | } | ||
438 | |||
415 | static const struct attribute_group jc42_group = { | 439 | static const struct attribute_group jc42_group = { |
416 | .attrs = jc42_attributes, | 440 | .attrs = jc42_attributes, |
441 | .is_visible = jc42_attribute_mode, | ||
417 | }; | 442 | }; |
418 | 443 | ||
419 | /* Return 0 if detection is successful, -ENODEV otherwise */ | 444 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index da5a2404cd3e..82bf65aa2968 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * k10temp.c - AMD Family 10h/11h processor hardware monitoring | 2 | * k10temp.c - AMD Family 10h/11h/12h/14h processor hardware monitoring |
3 | * | 3 | * |
4 | * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> | 4 | * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> |
5 | * | 5 | * |
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <asm/processor.h> | 26 | #include <asm/processor.h> |
27 | 27 | ||
28 | MODULE_DESCRIPTION("AMD Family 10h/11h CPU core temperature monitor"); | 28 | MODULE_DESCRIPTION("AMD Family 10h/11h/12h/14h CPU core temperature monitor"); |
29 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | 29 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); |
30 | MODULE_LICENSE("GPL"); | 30 | MODULE_LICENSE("GPL"); |
31 | 31 | ||
@@ -208,6 +208,7 @@ static void __devexit k10temp_remove(struct pci_dev *pdev) | |||
208 | static const struct pci_device_id k10temp_id_table[] = { | 208 | static const struct pci_device_id k10temp_id_table[] = { |
209 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, | 209 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, |
210 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, | 210 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, |
211 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, | ||
211 | {} | 212 | {} |
212 | }; | 213 | }; |
213 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); | 214 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); |
diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c index 1e229847f37a..d2cc28660816 100644 --- a/drivers/hwmon/lm85.c +++ b/drivers/hwmon/lm85.c | |||
@@ -41,7 +41,7 @@ static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END }; | |||
41 | enum chips { | 41 | enum chips { |
42 | any_chip, lm85b, lm85c, | 42 | any_chip, lm85b, lm85c, |
43 | adm1027, adt7463, adt7468, | 43 | adm1027, adt7463, adt7468, |
44 | emc6d100, emc6d102 | 44 | emc6d100, emc6d102, emc6d103 |
45 | }; | 45 | }; |
46 | 46 | ||
47 | /* The LM85 registers */ | 47 | /* The LM85 registers */ |
@@ -90,6 +90,9 @@ enum chips { | |||
90 | #define LM85_VERSTEP_EMC6D100_A0 0x60 | 90 | #define LM85_VERSTEP_EMC6D100_A0 0x60 |
91 | #define LM85_VERSTEP_EMC6D100_A1 0x61 | 91 | #define LM85_VERSTEP_EMC6D100_A1 0x61 |
92 | #define LM85_VERSTEP_EMC6D102 0x65 | 92 | #define LM85_VERSTEP_EMC6D102 0x65 |
93 | #define LM85_VERSTEP_EMC6D103_A0 0x68 | ||
94 | #define LM85_VERSTEP_EMC6D103_A1 0x69 | ||
95 | #define LM85_VERSTEP_EMC6D103S 0x6A /* Also known as EMC6D103:A2 */ | ||
93 | 96 | ||
94 | #define LM85_REG_CONFIG 0x40 | 97 | #define LM85_REG_CONFIG 0x40 |
95 | 98 | ||
@@ -348,6 +351,7 @@ static const struct i2c_device_id lm85_id[] = { | |||
348 | { "emc6d100", emc6d100 }, | 351 | { "emc6d100", emc6d100 }, |
349 | { "emc6d101", emc6d100 }, | 352 | { "emc6d101", emc6d100 }, |
350 | { "emc6d102", emc6d102 }, | 353 | { "emc6d102", emc6d102 }, |
354 | { "emc6d103", emc6d103 }, | ||
351 | { } | 355 | { } |
352 | }; | 356 | }; |
353 | MODULE_DEVICE_TABLE(i2c, lm85_id); | 357 | MODULE_DEVICE_TABLE(i2c, lm85_id); |
@@ -1250,6 +1254,20 @@ static int lm85_detect(struct i2c_client *client, struct i2c_board_info *info) | |||
1250 | case LM85_VERSTEP_EMC6D102: | 1254 | case LM85_VERSTEP_EMC6D102: |
1251 | type_name = "emc6d102"; | 1255 | type_name = "emc6d102"; |
1252 | break; | 1256 | break; |
1257 | case LM85_VERSTEP_EMC6D103_A0: | ||
1258 | case LM85_VERSTEP_EMC6D103_A1: | ||
1259 | type_name = "emc6d103"; | ||
1260 | break; | ||
1261 | /* | ||
1262 | * Registers apparently missing in EMC6D103S/EMC6D103:A2 | ||
1263 | * compared to EMC6D103:A0, EMC6D103:A1, and EMC6D102 | ||
1264 | * (according to the data sheets), but used unconditionally | ||
1265 | * in the driver: 62[5:7], 6D[0:7], and 6E[0:7]. | ||
1266 | * So skip EMC6D103S for now. | ||
1267 | case LM85_VERSTEP_EMC6D103S: | ||
1268 | type_name = "emc6d103s"; | ||
1269 | break; | ||
1270 | */ | ||
1253 | } | 1271 | } |
1254 | } else { | 1272 | } else { |
1255 | dev_dbg(&adapter->dev, | 1273 | dev_dbg(&adapter->dev, |
@@ -1283,6 +1301,7 @@ static int lm85_probe(struct i2c_client *client, | |||
1283 | case adt7468: | 1301 | case adt7468: |
1284 | case emc6d100: | 1302 | case emc6d100: |
1285 | case emc6d102: | 1303 | case emc6d102: |
1304 | case emc6d103: | ||
1286 | data->freq_map = adm1027_freq_map; | 1305 | data->freq_map = adm1027_freq_map; |
1287 | break; | 1306 | break; |
1288 | default: | 1307 | default: |
@@ -1468,7 +1487,7 @@ static struct lm85_data *lm85_update_device(struct device *dev) | |||
1468 | /* More alarm bits */ | 1487 | /* More alarm bits */ |
1469 | data->alarms |= lm85_read_value(client, | 1488 | data->alarms |= lm85_read_value(client, |
1470 | EMC6D100_REG_ALARM3) << 16; | 1489 | EMC6D100_REG_ALARM3) << 16; |
1471 | } else if (data->type == emc6d102) { | 1490 | } else if (data->type == emc6d102 || data->type == emc6d103) { |
1472 | /* Have to read LSB bits after the MSB ones because | 1491 | /* Have to read LSB bits after the MSB ones because |
1473 | the reading of the MSB bits has frozen the | 1492 | the reading of the MSB bits has frozen the |
1474 | LSBs (backward from the ADM1027). | 1493 | LSBs (backward from the ADM1027). |
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index b605ff3a1fa0..829a2a1029f7 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c | |||
@@ -847,11 +847,15 @@ complete: | |||
847 | dev_err(dev->dev, "Arbitration lost\n"); | 847 | dev_err(dev->dev, "Arbitration lost\n"); |
848 | err |= OMAP_I2C_STAT_AL; | 848 | err |= OMAP_I2C_STAT_AL; |
849 | } | 849 | } |
850 | /* | ||
851 | * ProDB0017052: Clear ARDY bit twice | ||
852 | */ | ||
850 | if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | | 853 | if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | |
851 | OMAP_I2C_STAT_AL)) { | 854 | OMAP_I2C_STAT_AL)) { |
852 | omap_i2c_ack_stat(dev, stat & | 855 | omap_i2c_ack_stat(dev, stat & |
853 | (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR | | 856 | (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR | |
854 | OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)); | 857 | OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR | |
858 | OMAP_I2C_STAT_ARDY)); | ||
855 | omap_i2c_complete_cmd(dev, err); | 859 | omap_i2c_complete_cmd(dev, err); |
856 | return IRQ_HANDLED; | 860 | return IRQ_HANDLED; |
857 | } | 861 | } |
@@ -1137,12 +1141,41 @@ omap_i2c_remove(struct platform_device *pdev) | |||
1137 | return 0; | 1141 | return 0; |
1138 | } | 1142 | } |
1139 | 1143 | ||
1144 | #ifdef CONFIG_SUSPEND | ||
1145 | static int omap_i2c_suspend(struct device *dev) | ||
1146 | { | ||
1147 | if (!pm_runtime_suspended(dev)) | ||
1148 | if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_suspend) | ||
1149 | dev->bus->pm->runtime_suspend(dev); | ||
1150 | |||
1151 | return 0; | ||
1152 | } | ||
1153 | |||
1154 | static int omap_i2c_resume(struct device *dev) | ||
1155 | { | ||
1156 | if (!pm_runtime_suspended(dev)) | ||
1157 | if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_resume) | ||
1158 | dev->bus->pm->runtime_resume(dev); | ||
1159 | |||
1160 | return 0; | ||
1161 | } | ||
1162 | |||
1163 | static struct dev_pm_ops omap_i2c_pm_ops = { | ||
1164 | .suspend = omap_i2c_suspend, | ||
1165 | .resume = omap_i2c_resume, | ||
1166 | }; | ||
1167 | #define OMAP_I2C_PM_OPS (&omap_i2c_pm_ops) | ||
1168 | #else | ||
1169 | #define OMAP_I2C_PM_OPS NULL | ||
1170 | #endif | ||
1171 | |||
1140 | static struct platform_driver omap_i2c_driver = { | 1172 | static struct platform_driver omap_i2c_driver = { |
1141 | .probe = omap_i2c_probe, | 1173 | .probe = omap_i2c_probe, |
1142 | .remove = omap_i2c_remove, | 1174 | .remove = omap_i2c_remove, |
1143 | .driver = { | 1175 | .driver = { |
1144 | .name = "omap_i2c", | 1176 | .name = "omap_i2c", |
1145 | .owner = THIS_MODULE, | 1177 | .owner = THIS_MODULE, |
1178 | .pm = OMAP_I2C_PM_OPS, | ||
1146 | }, | 1179 | }, |
1147 | }; | 1180 | }; |
1148 | 1181 | ||
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c index 495be451d326..266135ddf7fa 100644 --- a/drivers/i2c/busses/i2c-stu300.c +++ b/drivers/i2c/busses/i2c-stu300.c | |||
@@ -942,7 +942,7 @@ stu300_probe(struct platform_device *pdev) | |||
942 | adap->owner = THIS_MODULE; | 942 | adap->owner = THIS_MODULE; |
943 | /* DDC class but actually often used for more generic I2C */ | 943 | /* DDC class but actually often used for more generic I2C */ |
944 | adap->class = I2C_CLASS_DDC; | 944 | adap->class = I2C_CLASS_DDC; |
945 | strncpy(adap->name, "ST Microelectronics DDC I2C adapter", | 945 | strlcpy(adap->name, "ST Microelectronics DDC I2C adapter", |
946 | sizeof(adap->name)); | 946 | sizeof(adap->name)); |
947 | adap->nr = bus_nr; | 947 | adap->nr = bus_nr; |
948 | adap->algo = &stu300_algo; | 948 | adap->algo = &stu300_algo; |
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 1fa091e05690..4a5c4a44ffb1 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c | |||
@@ -62,6 +62,7 @@ | |||
62 | #include <linux/notifier.h> | 62 | #include <linux/notifier.h> |
63 | #include <linux/cpu.h> | 63 | #include <linux/cpu.h> |
64 | #include <asm/mwait.h> | 64 | #include <asm/mwait.h> |
65 | #include <asm/msr.h> | ||
65 | 66 | ||
66 | #define INTEL_IDLE_VERSION "0.4" | 67 | #define INTEL_IDLE_VERSION "0.4" |
67 | #define PREFIX "intel_idle: " | 68 | #define PREFIX "intel_idle: " |
@@ -85,6 +86,12 @@ static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state); | |||
85 | static struct cpuidle_state *cpuidle_state_table; | 86 | static struct cpuidle_state *cpuidle_state_table; |
86 | 87 | ||
87 | /* | 88 | /* |
89 | * Hardware C-state auto-demotion may not always be optimal. | ||
90 | * Indicate which enable bits to clear here. | ||
91 | */ | ||
92 | static unsigned long long auto_demotion_disable_flags; | ||
93 | |||
94 | /* | ||
88 | * Set this flag for states where the HW flushes the TLB for us | 95 | * Set this flag for states where the HW flushes the TLB for us |
89 | * and so we don't need cross-calls to keep it consistent. | 96 | * and so we don't need cross-calls to keep it consistent. |
90 | * If this flag is set, SW flushes the TLB, so even if the | 97 | * If this flag is set, SW flushes the TLB, so even if the |
@@ -281,6 +288,15 @@ static struct notifier_block setup_broadcast_notifier = { | |||
281 | .notifier_call = setup_broadcast_cpuhp_notify, | 288 | .notifier_call = setup_broadcast_cpuhp_notify, |
282 | }; | 289 | }; |
283 | 290 | ||
291 | static void auto_demotion_disable(void *dummy) | ||
292 | { | ||
293 | unsigned long long msr_bits; | ||
294 | |||
295 | rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); | ||
296 | msr_bits &= ~auto_demotion_disable_flags; | ||
297 | wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); | ||
298 | } | ||
299 | |||
284 | /* | 300 | /* |
285 | * intel_idle_probe() | 301 | * intel_idle_probe() |
286 | */ | 302 | */ |
@@ -324,11 +340,17 @@ static int intel_idle_probe(void) | |||
324 | case 0x25: /* Westmere */ | 340 | case 0x25: /* Westmere */ |
325 | case 0x2C: /* Westmere */ | 341 | case 0x2C: /* Westmere */ |
326 | cpuidle_state_table = nehalem_cstates; | 342 | cpuidle_state_table = nehalem_cstates; |
343 | auto_demotion_disable_flags = | ||
344 | (NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE); | ||
327 | break; | 345 | break; |
328 | 346 | ||
329 | case 0x1C: /* 28 - Atom Processor */ | 347 | case 0x1C: /* 28 - Atom Processor */ |
348 | cpuidle_state_table = atom_cstates; | ||
349 | break; | ||
350 | |||
330 | case 0x26: /* 38 - Lincroft Atom Processor */ | 351 | case 0x26: /* 38 - Lincroft Atom Processor */ |
331 | cpuidle_state_table = atom_cstates; | 352 | cpuidle_state_table = atom_cstates; |
353 | auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE; | ||
332 | break; | 354 | break; |
333 | 355 | ||
334 | case 0x2A: /* SNB */ | 356 | case 0x2A: /* SNB */ |
@@ -436,6 +458,8 @@ static int intel_idle_cpuidle_devices_init(void) | |||
436 | return -EIO; | 458 | return -EIO; |
437 | } | 459 | } |
438 | } | 460 | } |
461 | if (auto_demotion_disable_flags) | ||
462 | smp_call_function(auto_demotion_disable, NULL, 1); | ||
439 | 463 | ||
440 | return 0; | 464 | return 0; |
441 | } | 465 | } |
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index 8b606fd64022..08c194861af5 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c | |||
@@ -2610,9 +2610,11 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
2610 | netif_carrier_on(nesvnic->netdev); | 2610 | netif_carrier_on(nesvnic->netdev); |
2611 | 2611 | ||
2612 | spin_lock(&nesvnic->port_ibevent_lock); | 2612 | spin_lock(&nesvnic->port_ibevent_lock); |
2613 | if (nesdev->iw_status == 0) { | 2613 | if (nesvnic->of_device_registered) { |
2614 | nesdev->iw_status = 1; | 2614 | if (nesdev->iw_status == 0) { |
2615 | nes_port_ibevent(nesvnic); | 2615 | nesdev->iw_status = 1; |
2616 | nes_port_ibevent(nesvnic); | ||
2617 | } | ||
2616 | } | 2618 | } |
2617 | spin_unlock(&nesvnic->port_ibevent_lock); | 2619 | spin_unlock(&nesvnic->port_ibevent_lock); |
2618 | } | 2620 | } |
@@ -2642,9 +2644,11 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
2642 | netif_carrier_off(nesvnic->netdev); | 2644 | netif_carrier_off(nesvnic->netdev); |
2643 | 2645 | ||
2644 | spin_lock(&nesvnic->port_ibevent_lock); | 2646 | spin_lock(&nesvnic->port_ibevent_lock); |
2645 | if (nesdev->iw_status == 1) { | 2647 | if (nesvnic->of_device_registered) { |
2646 | nesdev->iw_status = 0; | 2648 | if (nesdev->iw_status == 1) { |
2647 | nes_port_ibevent(nesvnic); | 2649 | nesdev->iw_status = 0; |
2650 | nes_port_ibevent(nesvnic); | ||
2651 | } | ||
2648 | } | 2652 | } |
2649 | spin_unlock(&nesvnic->port_ibevent_lock); | 2653 | spin_unlock(&nesvnic->port_ibevent_lock); |
2650 | } | 2654 | } |
@@ -2703,9 +2707,11 @@ void nes_recheck_link_status(struct work_struct *work) | |||
2703 | netif_carrier_on(nesvnic->netdev); | 2707 | netif_carrier_on(nesvnic->netdev); |
2704 | 2708 | ||
2705 | spin_lock(&nesvnic->port_ibevent_lock); | 2709 | spin_lock(&nesvnic->port_ibevent_lock); |
2706 | if (nesdev->iw_status == 0) { | 2710 | if (nesvnic->of_device_registered) { |
2707 | nesdev->iw_status = 1; | 2711 | if (nesdev->iw_status == 0) { |
2708 | nes_port_ibevent(nesvnic); | 2712 | nesdev->iw_status = 1; |
2713 | nes_port_ibevent(nesvnic); | ||
2714 | } | ||
2709 | } | 2715 | } |
2710 | spin_unlock(&nesvnic->port_ibevent_lock); | 2716 | spin_unlock(&nesvnic->port_ibevent_lock); |
2711 | } | 2717 | } |
@@ -2723,9 +2729,11 @@ void nes_recheck_link_status(struct work_struct *work) | |||
2723 | netif_carrier_off(nesvnic->netdev); | 2729 | netif_carrier_off(nesvnic->netdev); |
2724 | 2730 | ||
2725 | spin_lock(&nesvnic->port_ibevent_lock); | 2731 | spin_lock(&nesvnic->port_ibevent_lock); |
2726 | if (nesdev->iw_status == 1) { | 2732 | if (nesvnic->of_device_registered) { |
2727 | nesdev->iw_status = 0; | 2733 | if (nesdev->iw_status == 1) { |
2728 | nes_port_ibevent(nesvnic); | 2734 | nesdev->iw_status = 0; |
2735 | nes_port_ibevent(nesvnic); | ||
2736 | } | ||
2729 | } | 2737 | } |
2730 | spin_unlock(&nesvnic->port_ibevent_lock); | 2738 | spin_unlock(&nesvnic->port_ibevent_lock); |
2731 | } | 2739 | } |
diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c index 8245237b67ce..eca0c41f1226 100644 --- a/drivers/infiniband/hw/qib/qib_rc.c +++ b/drivers/infiniband/hw/qib/qib_rc.c | |||
@@ -1005,7 +1005,8 @@ void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr) | |||
1005 | * there are still requests that haven't been acked. | 1005 | * there are still requests that haven't been acked. |
1006 | */ | 1006 | */ |
1007 | if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && | 1007 | if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && |
1008 | !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN))) | 1008 | !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN)) && |
1009 | (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) | ||
1009 | start_timer(qp); | 1010 | start_timer(qp); |
1010 | 1011 | ||
1011 | while (qp->s_last != qp->s_acked) { | 1012 | while (qp->s_last != qp->s_acked) { |
@@ -1439,6 +1440,8 @@ static void qib_rc_rcv_resp(struct qib_ibport *ibp, | |||
1439 | } | 1440 | } |
1440 | 1441 | ||
1441 | spin_lock_irqsave(&qp->s_lock, flags); | 1442 | spin_lock_irqsave(&qp->s_lock, flags); |
1443 | if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) | ||
1444 | goto ack_done; | ||
1442 | 1445 | ||
1443 | /* Ignore invalid responses. */ | 1446 | /* Ignore invalid responses. */ |
1444 | if (qib_cmp24(psn, qp->s_next_psn) >= 0) | 1447 | if (qib_cmp24(psn, qp->s_next_psn) >= 0) |
diff --git a/drivers/input/gameport/gameport.c b/drivers/input/gameport/gameport.c index 23cf8fc933ec..5b8f59d6c3e8 100644 --- a/drivers/input/gameport/gameport.c +++ b/drivers/input/gameport/gameport.c | |||
@@ -360,7 +360,7 @@ static int gameport_queue_event(void *object, struct module *owner, | |||
360 | event->owner = owner; | 360 | event->owner = owner; |
361 | 361 | ||
362 | list_add_tail(&event->node, &gameport_event_list); | 362 | list_add_tail(&event->node, &gameport_event_list); |
363 | schedule_work(&gameport_event_work); | 363 | queue_work(system_long_wq, &gameport_event_work); |
364 | 364 | ||
365 | out: | 365 | out: |
366 | spin_unlock_irqrestore(&gameport_event_lock, flags); | 366 | spin_unlock_irqrestore(&gameport_event_lock, flags); |
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c index ac471b77c18e..99ce9032d08c 100644 --- a/drivers/input/keyboard/tegra-kbc.c +++ b/drivers/input/keyboard/tegra-kbc.c | |||
@@ -71,8 +71,9 @@ struct tegra_kbc { | |||
71 | spinlock_t lock; | 71 | spinlock_t lock; |
72 | unsigned int repoll_dly; | 72 | unsigned int repoll_dly; |
73 | unsigned long cp_dly_jiffies; | 73 | unsigned long cp_dly_jiffies; |
74 | bool use_fn_map; | ||
74 | const struct tegra_kbc_platform_data *pdata; | 75 | const struct tegra_kbc_platform_data *pdata; |
75 | unsigned short keycode[KBC_MAX_KEY]; | 76 | unsigned short keycode[KBC_MAX_KEY * 2]; |
76 | unsigned short current_keys[KBC_MAX_KPENT]; | 77 | unsigned short current_keys[KBC_MAX_KPENT]; |
77 | unsigned int num_pressed_keys; | 78 | unsigned int num_pressed_keys; |
78 | struct timer_list timer; | 79 | struct timer_list timer; |
@@ -178,6 +179,40 @@ static const u32 tegra_kbc_default_keymap[] = { | |||
178 | KEY(15, 5, KEY_F2), | 179 | KEY(15, 5, KEY_F2), |
179 | KEY(15, 6, KEY_CAPSLOCK), | 180 | KEY(15, 6, KEY_CAPSLOCK), |
180 | KEY(15, 7, KEY_F6), | 181 | KEY(15, 7, KEY_F6), |
182 | |||
183 | /* Software Handled Function Keys */ | ||
184 | KEY(20, 0, KEY_KP7), | ||
185 | |||
186 | KEY(21, 0, KEY_KP9), | ||
187 | KEY(21, 1, KEY_KP8), | ||
188 | KEY(21, 2, KEY_KP4), | ||
189 | KEY(21, 4, KEY_KP1), | ||
190 | |||
191 | KEY(22, 1, KEY_KPSLASH), | ||
192 | KEY(22, 2, KEY_KP6), | ||
193 | KEY(22, 3, KEY_KP5), | ||
194 | KEY(22, 4, KEY_KP3), | ||
195 | KEY(22, 5, KEY_KP2), | ||
196 | KEY(22, 7, KEY_KP0), | ||
197 | |||
198 | KEY(27, 1, KEY_KPASTERISK), | ||
199 | KEY(27, 3, KEY_KPMINUS), | ||
200 | KEY(27, 4, KEY_KPPLUS), | ||
201 | KEY(27, 5, KEY_KPDOT), | ||
202 | |||
203 | KEY(28, 5, KEY_VOLUMEUP), | ||
204 | |||
205 | KEY(29, 3, KEY_HOME), | ||
206 | KEY(29, 4, KEY_END), | ||
207 | KEY(29, 5, KEY_BRIGHTNESSDOWN), | ||
208 | KEY(29, 6, KEY_VOLUMEDOWN), | ||
209 | KEY(29, 7, KEY_BRIGHTNESSUP), | ||
210 | |||
211 | KEY(30, 0, KEY_NUMLOCK), | ||
212 | KEY(30, 1, KEY_SCROLLLOCK), | ||
213 | KEY(30, 2, KEY_MUTE), | ||
214 | |||
215 | KEY(31, 4, KEY_HELP), | ||
181 | }; | 216 | }; |
182 | 217 | ||
183 | static const struct matrix_keymap_data tegra_kbc_default_keymap_data = { | 218 | static const struct matrix_keymap_data tegra_kbc_default_keymap_data = { |
@@ -224,6 +259,7 @@ static void tegra_kbc_report_keys(struct tegra_kbc *kbc) | |||
224 | unsigned int i; | 259 | unsigned int i; |
225 | unsigned int num_down = 0; | 260 | unsigned int num_down = 0; |
226 | unsigned long flags; | 261 | unsigned long flags; |
262 | bool fn_keypress = false; | ||
227 | 263 | ||
228 | spin_lock_irqsave(&kbc->lock, flags); | 264 | spin_lock_irqsave(&kbc->lock, flags); |
229 | for (i = 0; i < KBC_MAX_KPENT; i++) { | 265 | for (i = 0; i < KBC_MAX_KPENT; i++) { |
@@ -237,11 +273,28 @@ static void tegra_kbc_report_keys(struct tegra_kbc *kbc) | |||
237 | MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT); | 273 | MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT); |
238 | 274 | ||
239 | scancodes[num_down] = scancode; | 275 | scancodes[num_down] = scancode; |
240 | keycodes[num_down++] = kbc->keycode[scancode]; | 276 | keycodes[num_down] = kbc->keycode[scancode]; |
277 | /* If driver uses Fn map, do not report the Fn key. */ | ||
278 | if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) | ||
279 | fn_keypress = true; | ||
280 | else | ||
281 | num_down++; | ||
241 | } | 282 | } |
242 | 283 | ||
243 | val >>= 8; | 284 | val >>= 8; |
244 | } | 285 | } |
286 | |||
287 | /* | ||
288 | * If the platform uses Fn keymaps, translate keys on a Fn keypress. | ||
289 | * Function keycodes are KBC_MAX_KEY apart from the plain keycodes. | ||
290 | */ | ||
291 | if (fn_keypress) { | ||
292 | for (i = 0; i < num_down; i++) { | ||
293 | scancodes[i] += KBC_MAX_KEY; | ||
294 | keycodes[i] = kbc->keycode[scancodes[i]]; | ||
295 | } | ||
296 | } | ||
297 | |||
245 | spin_unlock_irqrestore(&kbc->lock, flags); | 298 | spin_unlock_irqrestore(&kbc->lock, flags); |
246 | 299 | ||
247 | tegra_kbc_report_released_keys(kbc->idev, | 300 | tegra_kbc_report_released_keys(kbc->idev, |
@@ -594,8 +647,11 @@ static int __devinit tegra_kbc_probe(struct platform_device *pdev) | |||
594 | 647 | ||
595 | input_dev->keycode = kbc->keycode; | 648 | input_dev->keycode = kbc->keycode; |
596 | input_dev->keycodesize = sizeof(kbc->keycode[0]); | 649 | input_dev->keycodesize = sizeof(kbc->keycode[0]); |
597 | input_dev->keycodemax = ARRAY_SIZE(kbc->keycode); | 650 | input_dev->keycodemax = KBC_MAX_KEY; |
651 | if (pdata->use_fn_map) | ||
652 | input_dev->keycodemax *= 2; | ||
598 | 653 | ||
654 | kbc->use_fn_map = pdata->use_fn_map; | ||
599 | keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data; | 655 | keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data; |
600 | matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT, | 656 | matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT, |
601 | input_dev->keycode, input_dev->keybit); | 657 | input_dev->keycode, input_dev->keybit); |
diff --git a/drivers/input/mouse/synaptics.h b/drivers/input/mouse/synaptics.h index 25e5d042a72c..7453938bf5ef 100644 --- a/drivers/input/mouse/synaptics.h +++ b/drivers/input/mouse/synaptics.h | |||
@@ -51,6 +51,29 @@ | |||
51 | #define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20) | 51 | #define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20) |
52 | #define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12) | 52 | #define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12) |
53 | #define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16) | 53 | #define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16) |
54 | |||
55 | /* | ||
56 | * The following describes response for the 0x0c query. | ||
57 | * | ||
58 | * byte mask name meaning | ||
59 | * ---- ---- ------- ------------ | ||
60 | * 1 0x01 adjustable threshold capacitive button sensitivity | ||
61 | * can be adjusted | ||
62 | * 1 0x02 report max query 0x0d gives max coord reported | ||
63 | * 1 0x04 clearpad sensor is ClearPad product | ||
64 | * 1 0x08 advanced gesture not particularly meaningful | ||
65 | * 1 0x10 clickpad bit 0 1-button ClickPad | ||
66 | * 1 0x60 multifinger mode identifies firmware finger counting | ||
67 | * (not reporting!) algorithm. | ||
68 | * Not particularly meaningful | ||
69 | * 1 0x80 covered pad W clipped to 14, 15 == pad mostly covered | ||
70 | * 2 0x01 clickpad bit 1 2-button ClickPad | ||
71 | * 2 0x02 deluxe LED controls touchpad support LED commands | ||
72 | * ala multimedia control bar | ||
73 | * 2 0x04 reduced filtering firmware does less filtering on | ||
74 | * position data, driver should watch | ||
75 | * for noise. | ||
76 | */ | ||
54 | #define SYN_CAP_CLICKPAD(ex0c) ((ex0c) & 0x100000) /* 1-button ClickPad */ | 77 | #define SYN_CAP_CLICKPAD(ex0c) ((ex0c) & 0x100000) /* 1-button ClickPad */ |
55 | #define SYN_CAP_CLICKPAD2BTN(ex0c) ((ex0c) & 0x000100) /* 2-button ClickPad */ | 78 | #define SYN_CAP_CLICKPAD2BTN(ex0c) ((ex0c) & 0x000100) /* 2-button ClickPad */ |
56 | #define SYN_CAP_MAX_DIMENSIONS(ex0c) ((ex0c) & 0x020000) | 79 | #define SYN_CAP_MAX_DIMENSIONS(ex0c) ((ex0c) & 0x020000) |
diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c index 7c38d1fbabf2..ba70058e2be3 100644 --- a/drivers/input/serio/serio.c +++ b/drivers/input/serio/serio.c | |||
@@ -299,7 +299,7 @@ static int serio_queue_event(void *object, struct module *owner, | |||
299 | event->owner = owner; | 299 | event->owner = owner; |
300 | 300 | ||
301 | list_add_tail(&event->node, &serio_event_list); | 301 | list_add_tail(&event->node, &serio_event_list); |
302 | schedule_work(&serio_event_work); | 302 | queue_work(system_long_wq, &serio_event_work); |
303 | 303 | ||
304 | out: | 304 | out: |
305 | spin_unlock_irqrestore(&serio_event_lock, flags); | 305 | spin_unlock_irqrestore(&serio_event_lock, flags); |
diff --git a/drivers/isdn/hardware/eicon/istream.c b/drivers/isdn/hardware/eicon/istream.c index 18f8798442fa..7bd5baa547be 100644 --- a/drivers/isdn/hardware/eicon/istream.c +++ b/drivers/isdn/hardware/eicon/istream.c | |||
@@ -62,7 +62,7 @@ void diva_xdi_provide_istream_info (ADAPTER* a, | |||
62 | stream interface. | 62 | stream interface. |
63 | If synchronous service was requested, then function | 63 | If synchronous service was requested, then function |
64 | does return amount of data written to stream. | 64 | does return amount of data written to stream. |
65 | 'final' does indicate that pice of data to be written is | 65 | 'final' does indicate that piece of data to be written is |
66 | final part of frame (necessary only by structured datatransfer) | 66 | final part of frame (necessary only by structured datatransfer) |
67 | return 0 if zero lengh packet was written | 67 | return 0 if zero lengh packet was written |
68 | return -1 if stream is full | 68 | return -1 if stream is full |
diff --git a/drivers/isdn/hisax/isdnl2.c b/drivers/isdn/hisax/isdnl2.c index 0858791978d8..cfff0c41d298 100644 --- a/drivers/isdn/hisax/isdnl2.c +++ b/drivers/isdn/hisax/isdnl2.c | |||
@@ -1247,10 +1247,10 @@ static void | |||
1247 | l2_pull_iqueue(struct FsmInst *fi, int event, void *arg) | 1247 | l2_pull_iqueue(struct FsmInst *fi, int event, void *arg) |
1248 | { | 1248 | { |
1249 | struct PStack *st = fi->userdata; | 1249 | struct PStack *st = fi->userdata; |
1250 | struct sk_buff *skb, *oskb; | 1250 | struct sk_buff *skb; |
1251 | struct Layer2 *l2 = &st->l2; | 1251 | struct Layer2 *l2 = &st->l2; |
1252 | u_char header[MAX_HEADER_LEN]; | 1252 | u_char header[MAX_HEADER_LEN]; |
1253 | int i; | 1253 | int i, hdr_space_needed; |
1254 | int unsigned p1; | 1254 | int unsigned p1; |
1255 | u_long flags; | 1255 | u_long flags; |
1256 | 1256 | ||
@@ -1261,6 +1261,16 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg) | |||
1261 | if (!skb) | 1261 | if (!skb) |
1262 | return; | 1262 | return; |
1263 | 1263 | ||
1264 | hdr_space_needed = l2headersize(l2, 0); | ||
1265 | if (hdr_space_needed > skb_headroom(skb)) { | ||
1266 | struct sk_buff *orig_skb = skb; | ||
1267 | |||
1268 | skb = skb_realloc_headroom(skb, hdr_space_needed); | ||
1269 | if (!skb) { | ||
1270 | dev_kfree_skb(orig_skb); | ||
1271 | return; | ||
1272 | } | ||
1273 | } | ||
1264 | spin_lock_irqsave(&l2->lock, flags); | 1274 | spin_lock_irqsave(&l2->lock, flags); |
1265 | if(test_bit(FLG_MOD128, &l2->flag)) | 1275 | if(test_bit(FLG_MOD128, &l2->flag)) |
1266 | p1 = (l2->vs - l2->va) % 128; | 1276 | p1 = (l2->vs - l2->va) % 128; |
@@ -1285,19 +1295,7 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg) | |||
1285 | l2->vs = (l2->vs + 1) % 8; | 1295 | l2->vs = (l2->vs + 1) % 8; |
1286 | } | 1296 | } |
1287 | spin_unlock_irqrestore(&l2->lock, flags); | 1297 | spin_unlock_irqrestore(&l2->lock, flags); |
1288 | p1 = skb->data - skb->head; | 1298 | memcpy(skb_push(skb, i), header, i); |
1289 | if (p1 >= i) | ||
1290 | memcpy(skb_push(skb, i), header, i); | ||
1291 | else { | ||
1292 | printk(KERN_WARNING | ||
1293 | "isdl2 pull_iqueue skb header(%d/%d) too short\n", i, p1); | ||
1294 | oskb = skb; | ||
1295 | skb = alloc_skb(oskb->len + i, GFP_ATOMIC); | ||
1296 | memcpy(skb_put(skb, i), header, i); | ||
1297 | skb_copy_from_linear_data(oskb, | ||
1298 | skb_put(skb, oskb->len), oskb->len); | ||
1299 | dev_kfree_skb(oskb); | ||
1300 | } | ||
1301 | st->l2.l2l1(st, PH_PULL | INDICATION, skb); | 1299 | st->l2.l2l1(st, PH_PULL | INDICATION, skb); |
1302 | test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag); | 1300 | test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag); |
1303 | if (!test_and_set_bit(FLG_T200_RUN, &st->l2.flag)) { | 1301 | if (!test_and_set_bit(FLG_T200_RUN, &st->l2.flag)) { |
diff --git a/drivers/md/linear.c b/drivers/md/linear.c index 8a2f767f26d8..0ed7f6bc2a7f 100644 --- a/drivers/md/linear.c +++ b/drivers/md/linear.c | |||
@@ -216,7 +216,6 @@ static int linear_run (mddev_t *mddev) | |||
216 | 216 | ||
217 | if (md_check_no_bitmap(mddev)) | 217 | if (md_check_no_bitmap(mddev)) |
218 | return -EINVAL; | 218 | return -EINVAL; |
219 | mddev->queue->queue_lock = &mddev->queue->__queue_lock; | ||
220 | conf = linear_conf(mddev, mddev->raid_disks); | 219 | conf = linear_conf(mddev, mddev->raid_disks); |
221 | 220 | ||
222 | if (!conf) | 221 | if (!conf) |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 0cc30ecda4c1..818313e277e7 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -553,6 +553,9 @@ static mddev_t * mddev_find(dev_t unit) | |||
553 | { | 553 | { |
554 | mddev_t *mddev, *new = NULL; | 554 | mddev_t *mddev, *new = NULL; |
555 | 555 | ||
556 | if (unit && MAJOR(unit) != MD_MAJOR) | ||
557 | unit &= ~((1<<MdpMinorShift)-1); | ||
558 | |||
556 | retry: | 559 | retry: |
557 | spin_lock(&all_mddevs_lock); | 560 | spin_lock(&all_mddevs_lock); |
558 | 561 | ||
@@ -4138,10 +4141,10 @@ array_size_store(mddev_t *mddev, const char *buf, size_t len) | |||
4138 | } | 4141 | } |
4139 | 4142 | ||
4140 | mddev->array_sectors = sectors; | 4143 | mddev->array_sectors = sectors; |
4141 | set_capacity(mddev->gendisk, mddev->array_sectors); | 4144 | if (mddev->pers) { |
4142 | if (mddev->pers) | 4145 | set_capacity(mddev->gendisk, mddev->array_sectors); |
4143 | revalidate_disk(mddev->gendisk); | 4146 | revalidate_disk(mddev->gendisk); |
4144 | 4147 | } | |
4145 | return len; | 4148 | return len; |
4146 | } | 4149 | } |
4147 | 4150 | ||
@@ -4624,6 +4627,7 @@ static int do_md_run(mddev_t *mddev) | |||
4624 | } | 4627 | } |
4625 | set_capacity(mddev->gendisk, mddev->array_sectors); | 4628 | set_capacity(mddev->gendisk, mddev->array_sectors); |
4626 | revalidate_disk(mddev->gendisk); | 4629 | revalidate_disk(mddev->gendisk); |
4630 | mddev->changed = 1; | ||
4627 | kobject_uevent(&disk_to_dev(mddev->gendisk)->kobj, KOBJ_CHANGE); | 4631 | kobject_uevent(&disk_to_dev(mddev->gendisk)->kobj, KOBJ_CHANGE); |
4628 | out: | 4632 | out: |
4629 | return err; | 4633 | return err; |
@@ -4712,6 +4716,7 @@ static void md_clean(mddev_t *mddev) | |||
4712 | mddev->sync_speed_min = mddev->sync_speed_max = 0; | 4716 | mddev->sync_speed_min = mddev->sync_speed_max = 0; |
4713 | mddev->recovery = 0; | 4717 | mddev->recovery = 0; |
4714 | mddev->in_sync = 0; | 4718 | mddev->in_sync = 0; |
4719 | mddev->changed = 0; | ||
4715 | mddev->degraded = 0; | 4720 | mddev->degraded = 0; |
4716 | mddev->safemode = 0; | 4721 | mddev->safemode = 0; |
4717 | mddev->bitmap_info.offset = 0; | 4722 | mddev->bitmap_info.offset = 0; |
@@ -4827,6 +4832,7 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open) | |||
4827 | 4832 | ||
4828 | set_capacity(disk, 0); | 4833 | set_capacity(disk, 0); |
4829 | mutex_unlock(&mddev->open_mutex); | 4834 | mutex_unlock(&mddev->open_mutex); |
4835 | mddev->changed = 1; | ||
4830 | revalidate_disk(disk); | 4836 | revalidate_disk(disk); |
4831 | 4837 | ||
4832 | if (mddev->ro) | 4838 | if (mddev->ro) |
@@ -6011,7 +6017,7 @@ static int md_open(struct block_device *bdev, fmode_t mode) | |||
6011 | atomic_inc(&mddev->openers); | 6017 | atomic_inc(&mddev->openers); |
6012 | mutex_unlock(&mddev->open_mutex); | 6018 | mutex_unlock(&mddev->open_mutex); |
6013 | 6019 | ||
6014 | check_disk_size_change(mddev->gendisk, bdev); | 6020 | check_disk_change(bdev); |
6015 | out: | 6021 | out: |
6016 | return err; | 6022 | return err; |
6017 | } | 6023 | } |
@@ -6026,6 +6032,21 @@ static int md_release(struct gendisk *disk, fmode_t mode) | |||
6026 | 6032 | ||
6027 | return 0; | 6033 | return 0; |
6028 | } | 6034 | } |
6035 | |||
6036 | static int md_media_changed(struct gendisk *disk) | ||
6037 | { | ||
6038 | mddev_t *mddev = disk->private_data; | ||
6039 | |||
6040 | return mddev->changed; | ||
6041 | } | ||
6042 | |||
6043 | static int md_revalidate(struct gendisk *disk) | ||
6044 | { | ||
6045 | mddev_t *mddev = disk->private_data; | ||
6046 | |||
6047 | mddev->changed = 0; | ||
6048 | return 0; | ||
6049 | } | ||
6029 | static const struct block_device_operations md_fops = | 6050 | static const struct block_device_operations md_fops = |
6030 | { | 6051 | { |
6031 | .owner = THIS_MODULE, | 6052 | .owner = THIS_MODULE, |
@@ -6036,6 +6057,8 @@ static const struct block_device_operations md_fops = | |||
6036 | .compat_ioctl = md_compat_ioctl, | 6057 | .compat_ioctl = md_compat_ioctl, |
6037 | #endif | 6058 | #endif |
6038 | .getgeo = md_getgeo, | 6059 | .getgeo = md_getgeo, |
6060 | .media_changed = md_media_changed, | ||
6061 | .revalidate_disk= md_revalidate, | ||
6039 | }; | 6062 | }; |
6040 | 6063 | ||
6041 | static int md_thread(void * arg) | 6064 | static int md_thread(void * arg) |
diff --git a/drivers/md/md.h b/drivers/md/md.h index 7e90b8593b2a..12215d437fcc 100644 --- a/drivers/md/md.h +++ b/drivers/md/md.h | |||
@@ -274,6 +274,8 @@ struct mddev_s | |||
274 | atomic_t active; /* general refcount */ | 274 | atomic_t active; /* general refcount */ |
275 | atomic_t openers; /* number of active opens */ | 275 | atomic_t openers; /* number of active opens */ |
276 | 276 | ||
277 | int changed; /* True if we might need to | ||
278 | * reread partition info */ | ||
277 | int degraded; /* whether md should consider | 279 | int degraded; /* whether md should consider |
278 | * adding a spare | 280 | * adding a spare |
279 | */ | 281 | */ |
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c index 6d7ddf32ef2e..3a62d440e27b 100644 --- a/drivers/md/multipath.c +++ b/drivers/md/multipath.c | |||
@@ -435,7 +435,6 @@ static int multipath_run (mddev_t *mddev) | |||
435 | * bookkeeping area. [whatever we allocate in multipath_run(), | 435 | * bookkeeping area. [whatever we allocate in multipath_run(), |
436 | * should be freed in multipath_stop()] | 436 | * should be freed in multipath_stop()] |
437 | */ | 437 | */ |
438 | mddev->queue->queue_lock = &mddev->queue->__queue_lock; | ||
439 | 438 | ||
440 | conf = kzalloc(sizeof(multipath_conf_t), GFP_KERNEL); | 439 | conf = kzalloc(sizeof(multipath_conf_t), GFP_KERNEL); |
441 | mddev->private = conf; | 440 | mddev->private = conf; |
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c index 637a96855edb..c0ac457f1218 100644 --- a/drivers/md/raid0.c +++ b/drivers/md/raid0.c | |||
@@ -361,7 +361,6 @@ static int raid0_run(mddev_t *mddev) | |||
361 | if (md_check_no_bitmap(mddev)) | 361 | if (md_check_no_bitmap(mddev)) |
362 | return -EINVAL; | 362 | return -EINVAL; |
363 | blk_queue_max_hw_sectors(mddev->queue, mddev->chunk_sectors); | 363 | blk_queue_max_hw_sectors(mddev->queue, mddev->chunk_sectors); |
364 | mddev->queue->queue_lock = &mddev->queue->__queue_lock; | ||
365 | 364 | ||
366 | /* if private is not null, we are here after takeover */ | 365 | /* if private is not null, we are here after takeover */ |
367 | if (mddev->private == NULL) { | 366 | if (mddev->private == NULL) { |
@@ -670,6 +669,7 @@ static void *raid0_takeover_raid1(mddev_t *mddev) | |||
670 | mddev->new_layout = 0; | 669 | mddev->new_layout = 0; |
671 | mddev->new_chunk_sectors = 128; /* by default set chunk size to 64k */ | 670 | mddev->new_chunk_sectors = 128; /* by default set chunk size to 64k */ |
672 | mddev->delta_disks = 1 - mddev->raid_disks; | 671 | mddev->delta_disks = 1 - mddev->raid_disks; |
672 | mddev->raid_disks = 1; | ||
673 | /* make sure it will be not marked as dirty */ | 673 | /* make sure it will be not marked as dirty */ |
674 | mddev->recovery_cp = MaxSector; | 674 | mddev->recovery_cp = MaxSector; |
675 | 675 | ||
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index a23ffa397ba9..06cd712807d0 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -593,7 +593,10 @@ static int flush_pending_writes(conf_t *conf) | |||
593 | if (conf->pending_bio_list.head) { | 593 | if (conf->pending_bio_list.head) { |
594 | struct bio *bio; | 594 | struct bio *bio; |
595 | bio = bio_list_get(&conf->pending_bio_list); | 595 | bio = bio_list_get(&conf->pending_bio_list); |
596 | /* Only take the spinlock to quiet a warning */ | ||
597 | spin_lock(conf->mddev->queue->queue_lock); | ||
596 | blk_remove_plug(conf->mddev->queue); | 598 | blk_remove_plug(conf->mddev->queue); |
599 | spin_unlock(conf->mddev->queue->queue_lock); | ||
597 | spin_unlock_irq(&conf->device_lock); | 600 | spin_unlock_irq(&conf->device_lock); |
598 | /* flush any pending bitmap writes to | 601 | /* flush any pending bitmap writes to |
599 | * disk before proceeding w/ I/O */ | 602 | * disk before proceeding w/ I/O */ |
@@ -959,7 +962,7 @@ static int make_request(mddev_t *mddev, struct bio * bio) | |||
959 | atomic_inc(&r1_bio->remaining); | 962 | atomic_inc(&r1_bio->remaining); |
960 | spin_lock_irqsave(&conf->device_lock, flags); | 963 | spin_lock_irqsave(&conf->device_lock, flags); |
961 | bio_list_add(&conf->pending_bio_list, mbio); | 964 | bio_list_add(&conf->pending_bio_list, mbio); |
962 | blk_plug_device(mddev->queue); | 965 | blk_plug_device_unlocked(mddev->queue); |
963 | spin_unlock_irqrestore(&conf->device_lock, flags); | 966 | spin_unlock_irqrestore(&conf->device_lock, flags); |
964 | } | 967 | } |
965 | r1_bio_write_done(r1_bio, bio->bi_vcnt, behind_pages, behind_pages != NULL); | 968 | r1_bio_write_done(r1_bio, bio->bi_vcnt, behind_pages, behind_pages != NULL); |
@@ -2021,7 +2024,6 @@ static int run(mddev_t *mddev) | |||
2021 | if (IS_ERR(conf)) | 2024 | if (IS_ERR(conf)) |
2022 | return PTR_ERR(conf); | 2025 | return PTR_ERR(conf); |
2023 | 2026 | ||
2024 | mddev->queue->queue_lock = &conf->device_lock; | ||
2025 | list_for_each_entry(rdev, &mddev->disks, same_set) { | 2027 | list_for_each_entry(rdev, &mddev->disks, same_set) { |
2026 | disk_stack_limits(mddev->gendisk, rdev->bdev, | 2028 | disk_stack_limits(mddev->gendisk, rdev->bdev, |
2027 | rdev->data_offset << 9); | 2029 | rdev->data_offset << 9); |
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 3b607b28741b..747d061d8e05 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -662,7 +662,10 @@ static int flush_pending_writes(conf_t *conf) | |||
662 | if (conf->pending_bio_list.head) { | 662 | if (conf->pending_bio_list.head) { |
663 | struct bio *bio; | 663 | struct bio *bio; |
664 | bio = bio_list_get(&conf->pending_bio_list); | 664 | bio = bio_list_get(&conf->pending_bio_list); |
665 | /* Spinlock only taken to quiet a warning */ | ||
666 | spin_lock(conf->mddev->queue->queue_lock); | ||
665 | blk_remove_plug(conf->mddev->queue); | 667 | blk_remove_plug(conf->mddev->queue); |
668 | spin_unlock(conf->mddev->queue->queue_lock); | ||
666 | spin_unlock_irq(&conf->device_lock); | 669 | spin_unlock_irq(&conf->device_lock); |
667 | /* flush any pending bitmap writes to disk | 670 | /* flush any pending bitmap writes to disk |
668 | * before proceeding w/ I/O */ | 671 | * before proceeding w/ I/O */ |
@@ -971,7 +974,7 @@ static int make_request(mddev_t *mddev, struct bio * bio) | |||
971 | atomic_inc(&r10_bio->remaining); | 974 | atomic_inc(&r10_bio->remaining); |
972 | spin_lock_irqsave(&conf->device_lock, flags); | 975 | spin_lock_irqsave(&conf->device_lock, flags); |
973 | bio_list_add(&conf->pending_bio_list, mbio); | 976 | bio_list_add(&conf->pending_bio_list, mbio); |
974 | blk_plug_device(mddev->queue); | 977 | blk_plug_device_unlocked(mddev->queue); |
975 | spin_unlock_irqrestore(&conf->device_lock, flags); | 978 | spin_unlock_irqrestore(&conf->device_lock, flags); |
976 | } | 979 | } |
977 | 980 | ||
@@ -2304,8 +2307,6 @@ static int run(mddev_t *mddev) | |||
2304 | if (!conf) | 2307 | if (!conf) |
2305 | goto out; | 2308 | goto out; |
2306 | 2309 | ||
2307 | mddev->queue->queue_lock = &conf->device_lock; | ||
2308 | |||
2309 | mddev->thread = conf->thread; | 2310 | mddev->thread = conf->thread; |
2310 | conf->thread = NULL; | 2311 | conf->thread = NULL; |
2311 | 2312 | ||
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 702812824195..78536fdbd87f 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -5204,7 +5204,6 @@ static int run(mddev_t *mddev) | |||
5204 | 5204 | ||
5205 | mddev->queue->backing_dev_info.congested_data = mddev; | 5205 | mddev->queue->backing_dev_info.congested_data = mddev; |
5206 | mddev->queue->backing_dev_info.congested_fn = raid5_congested; | 5206 | mddev->queue->backing_dev_info.congested_fn = raid5_congested; |
5207 | mddev->queue->queue_lock = &conf->device_lock; | ||
5208 | mddev->queue->unplug_fn = raid5_unplug_queue; | 5207 | mddev->queue->unplug_fn = raid5_unplug_queue; |
5209 | 5208 | ||
5210 | chunk_size = mddev->chunk_sectors << 9; | 5209 | chunk_size = mddev->chunk_sectors << 9; |
diff --git a/drivers/memstick/core/memstick.c b/drivers/memstick/core/memstick.c index e9a3eab7b0cf..8c1d85e27be4 100644 --- a/drivers/memstick/core/memstick.c +++ b/drivers/memstick/core/memstick.c | |||
@@ -621,7 +621,7 @@ static int __init memstick_init(void) | |||
621 | { | 621 | { |
622 | int rc; | 622 | int rc; |
623 | 623 | ||
624 | workqueue = create_freezeable_workqueue("kmemstick"); | 624 | workqueue = create_freezable_workqueue("kmemstick"); |
625 | if (!workqueue) | 625 | if (!workqueue) |
626 | return -ENOMEM; | 626 | return -ENOMEM; |
627 | 627 | ||
diff --git a/drivers/message/fusion/mptbase.h b/drivers/message/fusion/mptbase.h index f71f22948477..1735c84ff757 100644 --- a/drivers/message/fusion/mptbase.h +++ b/drivers/message/fusion/mptbase.h | |||
@@ -76,8 +76,8 @@ | |||
76 | #define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR | 76 | #define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR |
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | #define MPT_LINUX_VERSION_COMMON "3.04.17" | 79 | #define MPT_LINUX_VERSION_COMMON "3.04.18" |
80 | #define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.17" | 80 | #define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.18" |
81 | #define WHAT_MAGIC_STRING "@" "(" "#" ")" | 81 | #define WHAT_MAGIC_STRING "@" "(" "#" ")" |
82 | 82 | ||
83 | #define show_mptmod_ver(s,ver) \ | 83 | #define show_mptmod_ver(s,ver) \ |
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c index a3856ed90aef..e8deb8ed0499 100644 --- a/drivers/message/fusion/mptctl.c +++ b/drivers/message/fusion/mptctl.c | |||
@@ -597,6 +597,13 @@ mptctl_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
597 | } | 597 | } |
598 | 598 | ||
599 | static int | 599 | static int |
600 | mptctl_release(struct inode *inode, struct file *filep) | ||
601 | { | ||
602 | fasync_helper(-1, filep, 0, &async_queue); | ||
603 | return 0; | ||
604 | } | ||
605 | |||
606 | static int | ||
600 | mptctl_fasync(int fd, struct file *filep, int mode) | 607 | mptctl_fasync(int fd, struct file *filep, int mode) |
601 | { | 608 | { |
602 | MPT_ADAPTER *ioc; | 609 | MPT_ADAPTER *ioc; |
@@ -2815,6 +2822,7 @@ static const struct file_operations mptctl_fops = { | |||
2815 | .llseek = no_llseek, | 2822 | .llseek = no_llseek, |
2816 | .fasync = mptctl_fasync, | 2823 | .fasync = mptctl_fasync, |
2817 | .unlocked_ioctl = mptctl_ioctl, | 2824 | .unlocked_ioctl = mptctl_ioctl, |
2825 | .release = mptctl_release, | ||
2818 | #ifdef CONFIG_COMPAT | 2826 | #ifdef CONFIG_COMPAT |
2819 | .compat_ioctl = compat_mpctl_ioctl, | 2827 | .compat_ioctl = compat_mpctl_ioctl, |
2820 | #endif | 2828 | #endif |
diff --git a/drivers/message/fusion/mptscsih.c b/drivers/message/fusion/mptscsih.c index 59b8f53d1ece..0d9b82a44540 100644 --- a/drivers/message/fusion/mptscsih.c +++ b/drivers/message/fusion/mptscsih.c | |||
@@ -1873,8 +1873,9 @@ mptscsih_abort(struct scsi_cmnd * SCpnt) | |||
1873 | } | 1873 | } |
1874 | 1874 | ||
1875 | out: | 1875 | out: |
1876 | printk(MYIOC_s_INFO_FMT "task abort: %s (sc=%p)\n", | 1876 | printk(MYIOC_s_INFO_FMT "task abort: %s (rv=%04x) (sc=%p) (sn=%ld)\n", |
1877 | ioc->name, ((retval == SUCCESS) ? "SUCCESS" : "FAILED"), SCpnt); | 1877 | ioc->name, ((retval == SUCCESS) ? "SUCCESS" : "FAILED"), retval, |
1878 | SCpnt, SCpnt->serial_number); | ||
1878 | 1879 | ||
1879 | return retval; | 1880 | return retval; |
1880 | } | 1881 | } |
@@ -1911,7 +1912,7 @@ mptscsih_dev_reset(struct scsi_cmnd * SCpnt) | |||
1911 | 1912 | ||
1912 | vdevice = SCpnt->device->hostdata; | 1913 | vdevice = SCpnt->device->hostdata; |
1913 | if (!vdevice || !vdevice->vtarget) { | 1914 | if (!vdevice || !vdevice->vtarget) { |
1914 | retval = SUCCESS; | 1915 | retval = 0; |
1915 | goto out; | 1916 | goto out; |
1916 | } | 1917 | } |
1917 | 1918 | ||
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 6a1f94042612..c45e6305b26f 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c | |||
@@ -143,9 +143,9 @@ static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) | |||
143 | unsigned long flags; | 143 | unsigned long flags; |
144 | struct asic3 *asic; | 144 | struct asic3 *asic; |
145 | 145 | ||
146 | desc->chip->ack(irq); | 146 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
147 | 147 | ||
148 | asic = desc->handler_data; | 148 | asic = get_irq_data(irq); |
149 | 149 | ||
150 | for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { | 150 | for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { |
151 | u32 status; | 151 | u32 status; |
diff --git a/drivers/mfd/davinci_voicecodec.c b/drivers/mfd/davinci_voicecodec.c index 33c923d215c7..fdd8a1b8bc67 100644 --- a/drivers/mfd/davinci_voicecodec.c +++ b/drivers/mfd/davinci_voicecodec.c | |||
@@ -118,12 +118,12 @@ static int __init davinci_vc_probe(struct platform_device *pdev) | |||
118 | 118 | ||
119 | /* Voice codec interface client */ | 119 | /* Voice codec interface client */ |
120 | cell = &davinci_vc->cells[DAVINCI_VC_VCIF_CELL]; | 120 | cell = &davinci_vc->cells[DAVINCI_VC_VCIF_CELL]; |
121 | cell->name = "davinci_vcif"; | 121 | cell->name = "davinci-vcif"; |
122 | cell->driver_data = davinci_vc; | 122 | cell->driver_data = davinci_vc; |
123 | 123 | ||
124 | /* Voice codec CQ93VC client */ | 124 | /* Voice codec CQ93VC client */ |
125 | cell = &davinci_vc->cells[DAVINCI_VC_CQ93VC_CELL]; | 125 | cell = &davinci_vc->cells[DAVINCI_VC_CQ93VC_CELL]; |
126 | cell->name = "cq93vc"; | 126 | cell->name = "cq93vc-codec"; |
127 | cell->driver_data = davinci_vc; | 127 | cell->driver_data = davinci_vc; |
128 | 128 | ||
129 | ret = mfd_add_devices(&pdev->dev, pdev->id, davinci_vc->cells, | 129 | ret = mfd_add_devices(&pdev->dev, pdev->id, davinci_vc->cells, |
diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c index 627cf577b16d..e9018d1394ee 100644 --- a/drivers/mfd/tps6586x.c +++ b/drivers/mfd/tps6586x.c | |||
@@ -150,12 +150,12 @@ static inline int __tps6586x_write(struct i2c_client *client, | |||
150 | static inline int __tps6586x_writes(struct i2c_client *client, int reg, | 150 | static inline int __tps6586x_writes(struct i2c_client *client, int reg, |
151 | int len, uint8_t *val) | 151 | int len, uint8_t *val) |
152 | { | 152 | { |
153 | int ret; | 153 | int ret, i; |
154 | 154 | ||
155 | ret = i2c_smbus_write_i2c_block_data(client, reg, len, val); | 155 | for (i = 0; i < len; i++) { |
156 | if (ret < 0) { | 156 | ret = __tps6586x_write(client, reg + i, *(val + i)); |
157 | dev_err(&client->dev, "failed writings to 0x%02x\n", reg); | 157 | if (ret < 0) |
158 | return ret; | 158 | return ret; |
159 | } | 159 | } |
160 | 160 | ||
161 | return 0; | 161 | return 0; |
diff --git a/drivers/mfd/ucb1x00-ts.c b/drivers/mfd/ucb1x00-ts.c index 000cb414a78a..92b85e28a15e 100644 --- a/drivers/mfd/ucb1x00-ts.c +++ b/drivers/mfd/ucb1x00-ts.c | |||
@@ -385,12 +385,18 @@ static int ucb1x00_ts_add(struct ucb1x00_dev *dev) | |||
385 | idev->close = ucb1x00_ts_close; | 385 | idev->close = ucb1x00_ts_close; |
386 | 386 | ||
387 | __set_bit(EV_ABS, idev->evbit); | 387 | __set_bit(EV_ABS, idev->evbit); |
388 | __set_bit(ABS_X, idev->absbit); | ||
389 | __set_bit(ABS_Y, idev->absbit); | ||
390 | __set_bit(ABS_PRESSURE, idev->absbit); | ||
391 | 388 | ||
392 | input_set_drvdata(idev, ts); | 389 | input_set_drvdata(idev, ts); |
393 | 390 | ||
391 | ucb1x00_adc_enable(ts->ucb); | ||
392 | ts->x_res = ucb1x00_ts_read_xres(ts); | ||
393 | ts->y_res = ucb1x00_ts_read_yres(ts); | ||
394 | ucb1x00_adc_disable(ts->ucb); | ||
395 | |||
396 | input_set_abs_params(idev, ABS_X, 0, ts->x_res, 0, 0); | ||
397 | input_set_abs_params(idev, ABS_Y, 0, ts->y_res, 0, 0); | ||
398 | input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0); | ||
399 | |||
394 | err = input_register_device(idev); | 400 | err = input_register_device(idev); |
395 | if (err) | 401 | if (err) |
396 | goto fail; | 402 | goto fail; |
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 41233c7fa581..f4016a075fd6 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c | |||
@@ -246,6 +246,16 @@ static int wm8994_suspend(struct device *dev) | |||
246 | struct wm8994 *wm8994 = dev_get_drvdata(dev); | 246 | struct wm8994 *wm8994 = dev_get_drvdata(dev); |
247 | int ret; | 247 | int ret; |
248 | 248 | ||
249 | /* Don't actually go through with the suspend if the CODEC is | ||
250 | * still active (eg, for audio passthrough from CP. */ | ||
251 | ret = wm8994_reg_read(wm8994, WM8994_POWER_MANAGEMENT_1); | ||
252 | if (ret < 0) { | ||
253 | dev_err(dev, "Failed to read power status: %d\n", ret); | ||
254 | } else if (ret & WM8994_VMID_SEL_MASK) { | ||
255 | dev_dbg(dev, "CODEC still active, ignoring suspend\n"); | ||
256 | return 0; | ||
257 | } | ||
258 | |||
249 | /* GPIO configuration state is saved here since we may be configuring | 259 | /* GPIO configuration state is saved here since we may be configuring |
250 | * the GPIO alternate functions even if we're not using the gpiolib | 260 | * the GPIO alternate functions even if we're not using the gpiolib |
251 | * driver for them. | 261 | * driver for them. |
@@ -261,6 +271,8 @@ static int wm8994_suspend(struct device *dev) | |||
261 | if (ret < 0) | 271 | if (ret < 0) |
262 | dev_err(dev, "Failed to save LDO registers: %d\n", ret); | 272 | dev_err(dev, "Failed to save LDO registers: %d\n", ret); |
263 | 273 | ||
274 | wm8994->suspended = true; | ||
275 | |||
264 | ret = regulator_bulk_disable(wm8994->num_supplies, | 276 | ret = regulator_bulk_disable(wm8994->num_supplies, |
265 | wm8994->supplies); | 277 | wm8994->supplies); |
266 | if (ret != 0) { | 278 | if (ret != 0) { |
@@ -276,6 +288,10 @@ static int wm8994_resume(struct device *dev) | |||
276 | struct wm8994 *wm8994 = dev_get_drvdata(dev); | 288 | struct wm8994 *wm8994 = dev_get_drvdata(dev); |
277 | int ret; | 289 | int ret; |
278 | 290 | ||
291 | /* We may have lied to the PM core about suspending */ | ||
292 | if (!wm8994->suspended) | ||
293 | return 0; | ||
294 | |||
279 | ret = regulator_bulk_enable(wm8994->num_supplies, | 295 | ret = regulator_bulk_enable(wm8994->num_supplies, |
280 | wm8994->supplies); | 296 | wm8994->supplies); |
281 | if (ret != 0) { | 297 | if (ret != 0) { |
@@ -298,6 +314,8 @@ static int wm8994_resume(struct device *dev) | |||
298 | if (ret < 0) | 314 | if (ret < 0) |
299 | dev_err(dev, "Failed to restore GPIO registers: %d\n", ret); | 315 | dev_err(dev, "Failed to restore GPIO registers: %d\n", ret); |
300 | 316 | ||
317 | wm8994->suspended = false; | ||
318 | |||
301 | return 0; | 319 | return 0; |
302 | } | 320 | } |
303 | #endif | 321 | #endif |
diff --git a/drivers/misc/bmp085.c b/drivers/misc/bmp085.c index 63ee4c1a5315..b6e1c9a6679e 100644 --- a/drivers/misc/bmp085.c +++ b/drivers/misc/bmp085.c | |||
@@ -449,6 +449,7 @@ static const struct i2c_device_id bmp085_id[] = { | |||
449 | { "bmp085", 0 }, | 449 | { "bmp085", 0 }, |
450 | { } | 450 | { } |
451 | }; | 451 | }; |
452 | MODULE_DEVICE_TABLE(i2c, bmp085_id); | ||
452 | 453 | ||
453 | static struct i2c_driver bmp085_driver = { | 454 | static struct i2c_driver bmp085_driver = { |
454 | .driver = { | 455 | .driver = { |
diff --git a/drivers/misc/tifm_core.c b/drivers/misc/tifm_core.c index 5f6852dff40b..44d4475a09dd 100644 --- a/drivers/misc/tifm_core.c +++ b/drivers/misc/tifm_core.c | |||
@@ -329,7 +329,7 @@ static int __init tifm_init(void) | |||
329 | { | 329 | { |
330 | int rc; | 330 | int rc; |
331 | 331 | ||
332 | workqueue = create_freezeable_workqueue("tifm"); | 332 | workqueue = create_freezable_workqueue("tifm"); |
333 | if (!workqueue) | 333 | if (!workqueue) |
334 | return -ENOMEM; | 334 | return -ENOMEM; |
335 | 335 | ||
diff --git a/drivers/misc/vmw_balloon.c b/drivers/misc/vmw_balloon.c index 4d2ea8e80140..6df5a55da110 100644 --- a/drivers/misc/vmw_balloon.c +++ b/drivers/misc/vmw_balloon.c | |||
@@ -785,7 +785,7 @@ static int __init vmballoon_init(void) | |||
785 | if (x86_hyper != &x86_hyper_vmware) | 785 | if (x86_hyper != &x86_hyper_vmware) |
786 | return -ENODEV; | 786 | return -ENODEV; |
787 | 787 | ||
788 | vmballoon_wq = create_freezeable_workqueue("vmmemctl"); | 788 | vmballoon_wq = create_freezable_workqueue("vmmemctl"); |
789 | if (!vmballoon_wq) { | 789 | if (!vmballoon_wq) { |
790 | pr_err("failed to create workqueue\n"); | 790 | pr_err("failed to create workqueue\n"); |
791 | return -ENOMEM; | 791 | return -ENOMEM; |
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 5c4a54d9b6a4..ebc62ad4cc56 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c | |||
@@ -792,7 +792,6 @@ int mmc_attach_sdio(struct mmc_host *host) | |||
792 | */ | 792 | */ |
793 | mmc_release_host(host); | 793 | mmc_release_host(host); |
794 | err = mmc_add_card(host->card); | 794 | err = mmc_add_card(host->card); |
795 | mmc_claim_host(host); | ||
796 | if (err) | 795 | if (err) |
797 | goto remove_added; | 796 | goto remove_added; |
798 | 797 | ||
@@ -805,12 +804,12 @@ int mmc_attach_sdio(struct mmc_host *host) | |||
805 | goto remove_added; | 804 | goto remove_added; |
806 | } | 805 | } |
807 | 806 | ||
807 | mmc_claim_host(host); | ||
808 | return 0; | 808 | return 0; |
809 | 809 | ||
810 | 810 | ||
811 | remove_added: | 811 | remove_added: |
812 | /* Remove without lock if the device has been added. */ | 812 | /* Remove without lock if the device has been added. */ |
813 | mmc_release_host(host); | ||
814 | mmc_sdio_remove(host); | 813 | mmc_sdio_remove(host); |
815 | mmc_claim_host(host); | 814 | mmc_claim_host(host); |
816 | remove: | 815 | remove: |
diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c index d9d7efbc77cc..6322d1fb5d62 100644 --- a/drivers/mtd/nand/r852.c +++ b/drivers/mtd/nand/r852.c | |||
@@ -930,7 +930,7 @@ int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |||
930 | 930 | ||
931 | init_completion(&dev->dma_done); | 931 | init_completion(&dev->dma_done); |
932 | 932 | ||
933 | dev->card_workqueue = create_freezeable_workqueue(DRV_NAME); | 933 | dev->card_workqueue = create_freezable_workqueue(DRV_NAME); |
934 | 934 | ||
935 | if (!dev->card_workqueue) | 935 | if (!dev->card_workqueue) |
936 | goto error9; | 936 | goto error9; |
diff --git a/drivers/mtd/sm_ftl.c b/drivers/mtd/sm_ftl.c index 67822cf6c025..ac0d6a8613b5 100644 --- a/drivers/mtd/sm_ftl.c +++ b/drivers/mtd/sm_ftl.c | |||
@@ -1258,7 +1258,7 @@ static struct mtd_blktrans_ops sm_ftl_ops = { | |||
1258 | static __init int sm_module_init(void) | 1258 | static __init int sm_module_init(void) |
1259 | { | 1259 | { |
1260 | int error = 0; | 1260 | int error = 0; |
1261 | cache_flush_workqueue = create_freezeable_workqueue("smflush"); | 1261 | cache_flush_workqueue = create_freezable_workqueue("smflush"); |
1262 | 1262 | ||
1263 | if (IS_ERR(cache_flush_workqueue)) | 1263 | if (IS_ERR(cache_flush_workqueue)) |
1264 | return PTR_ERR(cache_flush_workqueue); | 1264 | return PTR_ERR(cache_flush_workqueue); |
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 653c62475cb6..7897d114b290 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -22,7 +22,7 @@ | |||
22 | * (you will need to reboot afterwards) */ | 22 | * (you will need to reboot afterwards) */ |
23 | /* #define BNX2X_STOP_ON_ERROR */ | 23 | /* #define BNX2X_STOP_ON_ERROR */ |
24 | 24 | ||
25 | #define DRV_MODULE_VERSION "1.62.00-5" | 25 | #define DRV_MODULE_VERSION "1.62.00-6" |
26 | #define DRV_MODULE_RELDATE "2011/01/30" | 26 | #define DRV_MODULE_RELDATE "2011/01/30" |
27 | #define BNX2X_BC_VER 0x040200 | 27 | #define BNX2X_BC_VER 0x040200 |
28 | 28 | ||
@@ -1613,19 +1613,23 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1613 | #define BNX2X_BTR 4 | 1613 | #define BNX2X_BTR 4 |
1614 | #define MAX_SPQ_PENDING 8 | 1614 | #define MAX_SPQ_PENDING 8 |
1615 | 1615 | ||
1616 | 1616 | /* CMNG constants, as derived from system spec calculations */ | |
1617 | /* CMNG constants | 1617 | /* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */ |
1618 | derived from lab experiments, and not from system spec calculations !!! */ | 1618 | #define DEF_MIN_RATE 100 |
1619 | #define DEF_MIN_RATE 100 | ||
1620 | /* resolution of the rate shaping timer - 100 usec */ | 1619 | /* resolution of the rate shaping timer - 100 usec */ |
1621 | #define RS_PERIODIC_TIMEOUT_USEC 100 | 1620 | #define RS_PERIODIC_TIMEOUT_USEC 100 |
1622 | /* resolution of fairness algorithm in usecs - | ||
1623 | coefficient for calculating the actual t fair */ | ||
1624 | #define T_FAIR_COEF 10000000 | ||
1625 | /* number of bytes in single QM arbitration cycle - | 1621 | /* number of bytes in single QM arbitration cycle - |
1626 | coefficient for calculating the fairness timer */ | 1622 | * coefficient for calculating the fairness timer */ |
1627 | #define QM_ARB_BYTES 40000 | 1623 | #define QM_ARB_BYTES 160000 |
1628 | #define FAIR_MEM 2 | 1624 | /* resolution of Min algorithm 1:100 */ |
1625 | #define MIN_RES 100 | ||
1626 | /* how many bytes above threshold for the minimal credit of Min algorithm*/ | ||
1627 | #define MIN_ABOVE_THRESH 32768 | ||
1628 | /* Fairness algorithm integration time coefficient - | ||
1629 | * for calculating the actual Tfair */ | ||
1630 | #define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES) | ||
1631 | /* Memory of fairness algorithm . 2 cycles */ | ||
1632 | #define FAIR_MEM 2 | ||
1629 | 1633 | ||
1630 | 1634 | ||
1631 | #define ATTN_NIG_FOR_FUNC (1L << 8) | 1635 | #define ATTN_NIG_FOR_FUNC (1L << 8) |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c index 710ce5d04c53..93798129061b 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.c +++ b/drivers/net/bnx2x/bnx2x_cmn.c | |||
@@ -259,10 +259,44 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, | |||
259 | #endif | 259 | #endif |
260 | } | 260 | } |
261 | 261 | ||
262 | /* Timestamp option length allowed for TPA aggregation: | ||
263 | * | ||
264 | * nop nop kind length echo val | ||
265 | */ | ||
266 | #define TPA_TSTAMP_OPT_LEN 12 | ||
267 | /** | ||
268 | * Calculate the approximate value of the MSS for this | ||
269 | * aggregation using the first packet of it. | ||
270 | * | ||
271 | * @param bp | ||
272 | * @param parsing_flags Parsing flags from the START CQE | ||
273 | * @param len_on_bd Total length of the first packet for the | ||
274 | * aggregation. | ||
275 | */ | ||
276 | static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags, | ||
277 | u16 len_on_bd) | ||
278 | { | ||
279 | /* TPA arrgregation won't have an IP options and TCP options | ||
280 | * other than timestamp. | ||
281 | */ | ||
282 | u16 hdrs_len = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct tcphdr); | ||
283 | |||
284 | |||
285 | /* Check if there was a TCP timestamp, if there is it's will | ||
286 | * always be 12 bytes length: nop nop kind length echo val. | ||
287 | * | ||
288 | * Otherwise FW would close the aggregation. | ||
289 | */ | ||
290 | if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG) | ||
291 | hdrs_len += TPA_TSTAMP_OPT_LEN; | ||
292 | |||
293 | return len_on_bd - hdrs_len; | ||
294 | } | ||
295 | |||
262 | static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, | 296 | static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, |
263 | struct sk_buff *skb, | 297 | struct sk_buff *skb, |
264 | struct eth_fast_path_rx_cqe *fp_cqe, | 298 | struct eth_fast_path_rx_cqe *fp_cqe, |
265 | u16 cqe_idx) | 299 | u16 cqe_idx, u16 parsing_flags) |
266 | { | 300 | { |
267 | struct sw_rx_page *rx_pg, old_rx_pg; | 301 | struct sw_rx_page *rx_pg, old_rx_pg; |
268 | u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); | 302 | u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); |
@@ -275,8 +309,8 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
275 | 309 | ||
276 | /* This is needed in order to enable forwarding support */ | 310 | /* This is needed in order to enable forwarding support */ |
277 | if (frag_size) | 311 | if (frag_size) |
278 | skb_shinfo(skb)->gso_size = min((u32)SGE_PAGE_SIZE, | 312 | skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, parsing_flags, |
279 | max(frag_size, (u32)len_on_bd)); | 313 | len_on_bd); |
280 | 314 | ||
281 | #ifdef BNX2X_STOP_ON_ERROR | 315 | #ifdef BNX2X_STOP_ON_ERROR |
282 | if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { | 316 | if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { |
@@ -344,6 +378,8 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
344 | if (likely(new_skb)) { | 378 | if (likely(new_skb)) { |
345 | /* fix ip xsum and give it to the stack */ | 379 | /* fix ip xsum and give it to the stack */ |
346 | /* (no need to map the new skb) */ | 380 | /* (no need to map the new skb) */ |
381 | u16 parsing_flags = | ||
382 | le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags); | ||
347 | 383 | ||
348 | prefetch(skb); | 384 | prefetch(skb); |
349 | prefetch(((char *)(skb)) + L1_CACHE_BYTES); | 385 | prefetch(((char *)(skb)) + L1_CACHE_BYTES); |
@@ -373,9 +409,9 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
373 | } | 409 | } |
374 | 410 | ||
375 | if (!bnx2x_fill_frag_skb(bp, fp, skb, | 411 | if (!bnx2x_fill_frag_skb(bp, fp, skb, |
376 | &cqe->fast_path_cqe, cqe_idx)) { | 412 | &cqe->fast_path_cqe, cqe_idx, |
377 | if ((le16_to_cpu(cqe->fast_path_cqe. | 413 | parsing_flags)) { |
378 | pars_flags.flags) & PARSING_FLAGS_VLAN)) | 414 | if (parsing_flags & PARSING_FLAGS_VLAN) |
379 | __vlan_hwaccel_put_tag(skb, | 415 | __vlan_hwaccel_put_tag(skb, |
380 | le16_to_cpu(cqe->fast_path_cqe. | 416 | le16_to_cpu(cqe->fast_path_cqe. |
381 | vlan_tag)); | 417 | vlan_tag)); |
@@ -703,19 +739,20 @@ u16 bnx2x_get_mf_speed(struct bnx2x *bp) | |||
703 | { | 739 | { |
704 | u16 line_speed = bp->link_vars.line_speed; | 740 | u16 line_speed = bp->link_vars.line_speed; |
705 | if (IS_MF(bp)) { | 741 | if (IS_MF(bp)) { |
706 | u16 maxCfg = (bp->mf_config[BP_VN(bp)] & | 742 | u16 maxCfg = bnx2x_extract_max_cfg(bp, |
707 | FUNC_MF_CFG_MAX_BW_MASK) >> | 743 | bp->mf_config[BP_VN(bp)]); |
708 | FUNC_MF_CFG_MAX_BW_SHIFT; | 744 | |
709 | /* Calculate the current MAX line speed limit for the DCC | 745 | /* Calculate the current MAX line speed limit for the MF |
710 | * capable devices | 746 | * devices |
711 | */ | 747 | */ |
712 | if (IS_MF_SD(bp)) { | 748 | if (IS_MF_SI(bp)) |
749 | line_speed = (line_speed * maxCfg) / 100; | ||
750 | else { /* SD mode */ | ||
713 | u16 vn_max_rate = maxCfg * 100; | 751 | u16 vn_max_rate = maxCfg * 100; |
714 | 752 | ||
715 | if (vn_max_rate < line_speed) | 753 | if (vn_max_rate < line_speed) |
716 | line_speed = vn_max_rate; | 754 | line_speed = vn_max_rate; |
717 | } else /* IS_MF_SI(bp)) */ | 755 | } |
718 | line_speed = (line_speed * maxCfg) / 100; | ||
719 | } | 756 | } |
720 | 757 | ||
721 | return line_speed; | 758 | return line_speed; |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.h b/drivers/net/bnx2x/bnx2x_cmn.h index 03eb4d68e6bb..326ba44b3ded 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.h +++ b/drivers/net/bnx2x/bnx2x_cmn.h | |||
@@ -1044,4 +1044,24 @@ static inline void storm_memset_cmng(struct bnx2x *bp, | |||
1044 | void bnx2x_acquire_phy_lock(struct bnx2x *bp); | 1044 | void bnx2x_acquire_phy_lock(struct bnx2x *bp); |
1045 | void bnx2x_release_phy_lock(struct bnx2x *bp); | 1045 | void bnx2x_release_phy_lock(struct bnx2x *bp); |
1046 | 1046 | ||
1047 | /** | ||
1048 | * Extracts MAX BW part from MF configuration. | ||
1049 | * | ||
1050 | * @param bp | ||
1051 | * @param mf_cfg | ||
1052 | * | ||
1053 | * @return u16 | ||
1054 | */ | ||
1055 | static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) | ||
1056 | { | ||
1057 | u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> | ||
1058 | FUNC_MF_CFG_MAX_BW_SHIFT; | ||
1059 | if (!max_cfg) { | ||
1060 | BNX2X_ERR("Illegal configuration detected for Max BW - " | ||
1061 | "using 100 instead\n"); | ||
1062 | max_cfg = 100; | ||
1063 | } | ||
1064 | return max_cfg; | ||
1065 | } | ||
1066 | |||
1047 | #endif /* BNX2X_CMN_H */ | 1067 | #endif /* BNX2X_CMN_H */ |
diff --git a/drivers/net/bnx2x/bnx2x_ethtool.c b/drivers/net/bnx2x/bnx2x_ethtool.c index 5b44a8b48509..ef2919987a10 100644 --- a/drivers/net/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/bnx2x/bnx2x_ethtool.c | |||
@@ -238,7 +238,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
238 | speed |= (cmd->speed_hi << 16); | 238 | speed |= (cmd->speed_hi << 16); |
239 | 239 | ||
240 | if (IS_MF_SI(bp)) { | 240 | if (IS_MF_SI(bp)) { |
241 | u32 param = 0; | 241 | u32 param = 0, part; |
242 | u32 line_speed = bp->link_vars.line_speed; | 242 | u32 line_speed = bp->link_vars.line_speed; |
243 | 243 | ||
244 | /* use 10G if no link detected */ | 244 | /* use 10G if no link detected */ |
@@ -251,9 +251,11 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
251 | REQ_BC_VER_4_SET_MF_BW); | 251 | REQ_BC_VER_4_SET_MF_BW); |
252 | return -EINVAL; | 252 | return -EINVAL; |
253 | } | 253 | } |
254 | if (line_speed < speed) { | 254 | part = (speed * 100) / line_speed; |
255 | BNX2X_DEV_INFO("New speed should be less or equal " | 255 | if (line_speed < speed || !part) { |
256 | "to actual line speed\n"); | 256 | BNX2X_DEV_INFO("Speed setting should be in a range " |
257 | "from 1%% to 100%% " | ||
258 | "of actual line speed\n"); | ||
257 | return -EINVAL; | 259 | return -EINVAL; |
258 | } | 260 | } |
259 | /* load old values */ | 261 | /* load old values */ |
@@ -263,8 +265,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
263 | param &= FUNC_MF_CFG_MIN_BW_MASK; | 265 | param &= FUNC_MF_CFG_MIN_BW_MASK; |
264 | 266 | ||
265 | /* set new MAX value */ | 267 | /* set new MAX value */ |
266 | param |= (((speed * 100) / line_speed) | 268 | param |= (part << FUNC_MF_CFG_MAX_BW_SHIFT) |
267 | << FUNC_MF_CFG_MAX_BW_SHIFT) | ||
268 | & FUNC_MF_CFG_MAX_BW_MASK; | 269 | & FUNC_MF_CFG_MAX_BW_MASK; |
269 | 270 | ||
270 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param); | 271 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param); |
@@ -1781,9 +1782,7 @@ static int bnx2x_test_nvram(struct bnx2x *bp) | |||
1781 | { 0x100, 0x350 }, /* manuf_info */ | 1782 | { 0x100, 0x350 }, /* manuf_info */ |
1782 | { 0x450, 0xf0 }, /* feature_info */ | 1783 | { 0x450, 0xf0 }, /* feature_info */ |
1783 | { 0x640, 0x64 }, /* upgrade_key_info */ | 1784 | { 0x640, 0x64 }, /* upgrade_key_info */ |
1784 | { 0x6a4, 0x64 }, | ||
1785 | { 0x708, 0x70 }, /* manuf_key_info */ | 1785 | { 0x708, 0x70 }, /* manuf_key_info */ |
1786 | { 0x778, 0x70 }, | ||
1787 | { 0, 0 } | 1786 | { 0, 0 } |
1788 | }; | 1787 | }; |
1789 | __be32 buf[0x350 / 4]; | 1788 | __be32 buf[0x350 / 4]; |
@@ -1933,11 +1932,11 @@ static void bnx2x_self_test(struct net_device *dev, | |||
1933 | buf[4] = 1; | 1932 | buf[4] = 1; |
1934 | etest->flags |= ETH_TEST_FL_FAILED; | 1933 | etest->flags |= ETH_TEST_FL_FAILED; |
1935 | } | 1934 | } |
1936 | if (bp->port.pmf) | 1935 | |
1937 | if (bnx2x_link_test(bp, is_serdes) != 0) { | 1936 | if (bnx2x_link_test(bp, is_serdes) != 0) { |
1938 | buf[5] = 1; | 1937 | buf[5] = 1; |
1939 | etest->flags |= ETH_TEST_FL_FAILED; | 1938 | etest->flags |= ETH_TEST_FL_FAILED; |
1940 | } | 1939 | } |
1941 | 1940 | ||
1942 | #ifdef BNX2X_EXTRA_DEBUG | 1941 | #ifdef BNX2X_EXTRA_DEBUG |
1943 | bnx2x_panic_dump(bp); | 1942 | bnx2x_panic_dump(bp); |
diff --git a/drivers/net/bnx2x/bnx2x_init.h b/drivers/net/bnx2x/bnx2x_init.h index 5a268e9a0895..fa6dbe3f2058 100644 --- a/drivers/net/bnx2x/bnx2x_init.h +++ b/drivers/net/bnx2x/bnx2x_init.h | |||
@@ -241,7 +241,7 @@ static const struct { | |||
241 | /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't | 241 | /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't |
242 | * want to handle "system kill" flow at the moment. | 242 | * want to handle "system kill" flow at the moment. |
243 | */ | 243 | */ |
244 | BLOCK_PRTY_INFO(PXP, 0x3ffffff, 0x3ffffff, 0x3ffffff, 0x3ffffff), | 244 | BLOCK_PRTY_INFO(PXP, 0x7ffffff, 0x3ffffff, 0x3ffffff, 0x7ffffff), |
245 | BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), | 245 | BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), |
246 | BLOCK_PRTY_INFO_1(PXP2, 0x7ff, 0x7f, 0x7f, 0x7ff), | 246 | BLOCK_PRTY_INFO_1(PXP2, 0x7ff, 0x7f, 0x7f, 0x7ff), |
247 | BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0), | 247 | BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0), |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index d584d32c747d..032ae184b605 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -1974,13 +1974,22 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) | |||
1974 | vn_max_rate = 0; | 1974 | vn_max_rate = 0; |
1975 | 1975 | ||
1976 | } else { | 1976 | } else { |
1977 | u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg); | ||
1978 | |||
1977 | vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> | 1979 | vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> |
1978 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; | 1980 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; |
1979 | /* If min rate is zero - set it to 1 */ | 1981 | /* If fairness is enabled (not all min rates are zeroes) and |
1982 | if current min rate is zero - set it to 1. | ||
1983 | This is a requirement of the algorithm. */ | ||
1980 | if (bp->vn_weight_sum && (vn_min_rate == 0)) | 1984 | if (bp->vn_weight_sum && (vn_min_rate == 0)) |
1981 | vn_min_rate = DEF_MIN_RATE; | 1985 | vn_min_rate = DEF_MIN_RATE; |
1982 | vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> | 1986 | |
1983 | FUNC_MF_CFG_MAX_BW_SHIFT) * 100; | 1987 | if (IS_MF_SI(bp)) |
1988 | /* maxCfg in percents of linkspeed */ | ||
1989 | vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100; | ||
1990 | else | ||
1991 | /* maxCfg is absolute in 100Mb units */ | ||
1992 | vn_max_rate = maxCfg * 100; | ||
1984 | } | 1993 | } |
1985 | 1994 | ||
1986 | DP(NETIF_MSG_IFUP, | 1995 | DP(NETIF_MSG_IFUP, |
@@ -2006,7 +2015,8 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) | |||
2006 | m_fair_vn.vn_credit_delta = | 2015 | m_fair_vn.vn_credit_delta = |
2007 | max_t(u32, (vn_min_rate * (T_FAIR_COEF / | 2016 | max_t(u32, (vn_min_rate * (T_FAIR_COEF / |
2008 | (8 * bp->vn_weight_sum))), | 2017 | (8 * bp->vn_weight_sum))), |
2009 | (bp->cmng.fair_vars.fair_threshold * 2)); | 2018 | (bp->cmng.fair_vars.fair_threshold + |
2019 | MIN_ABOVE_THRESH)); | ||
2010 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", | 2020 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", |
2011 | m_fair_vn.vn_credit_delta); | 2021 | m_fair_vn.vn_credit_delta); |
2012 | } | 2022 | } |
diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_stats.c index bda60d590fa8..3445ded6674f 100644 --- a/drivers/net/bnx2x/bnx2x_stats.c +++ b/drivers/net/bnx2x/bnx2x_stats.c | |||
@@ -1239,14 +1239,14 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) | |||
1239 | if (unlikely(bp->panic)) | 1239 | if (unlikely(bp->panic)) |
1240 | return; | 1240 | return; |
1241 | 1241 | ||
1242 | bnx2x_stats_stm[bp->stats_state][event].action(bp); | ||
1243 | |||
1242 | /* Protect a state change flow */ | 1244 | /* Protect a state change flow */ |
1243 | spin_lock_bh(&bp->stats_lock); | 1245 | spin_lock_bh(&bp->stats_lock); |
1244 | state = bp->stats_state; | 1246 | state = bp->stats_state; |
1245 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; | 1247 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; |
1246 | spin_unlock_bh(&bp->stats_lock); | 1248 | spin_unlock_bh(&bp->stats_lock); |
1247 | 1249 | ||
1248 | bnx2x_stats_stm[state][event].action(bp); | ||
1249 | |||
1250 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) | 1250 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) |
1251 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", | 1251 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", |
1252 | state, event, bp->stats_state); | 1252 | state, event, bp->stats_state); |
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c index 7ab534aee452..7513c4523ac4 100644 --- a/drivers/net/can/mcp251x.c +++ b/drivers/net/can/mcp251x.c | |||
@@ -940,7 +940,7 @@ static int mcp251x_open(struct net_device *net) | |||
940 | goto open_unlock; | 940 | goto open_unlock; |
941 | } | 941 | } |
942 | 942 | ||
943 | priv->wq = create_freezeable_workqueue("mcp251x_wq"); | 943 | priv->wq = create_freezable_workqueue("mcp251x_wq"); |
944 | INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler); | 944 | INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler); |
945 | INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler); | 945 | INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler); |
946 | 946 | ||
diff --git a/drivers/net/can/softing/Kconfig b/drivers/net/can/softing/Kconfig index 8ba81b3ddd90..5de46a9a77bb 100644 --- a/drivers/net/can/softing/Kconfig +++ b/drivers/net/can/softing/Kconfig | |||
@@ -18,7 +18,7 @@ config CAN_SOFTING | |||
18 | config CAN_SOFTING_CS | 18 | config CAN_SOFTING_CS |
19 | tristate "Softing Gmbh CAN pcmcia cards" | 19 | tristate "Softing Gmbh CAN pcmcia cards" |
20 | depends on PCMCIA | 20 | depends on PCMCIA |
21 | select CAN_SOFTING | 21 | depends on CAN_SOFTING |
22 | ---help--- | 22 | ---help--- |
23 | Support for PCMCIA cards from Softing Gmbh & some cards | 23 | Support for PCMCIA cards from Softing Gmbh & some cards |
24 | from Vector Gmbh. | 24 | from Vector Gmbh. |
diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c index 5157e15e96eb..aeea9f9ff6e8 100644 --- a/drivers/net/can/softing/softing_main.c +++ b/drivers/net/can/softing/softing_main.c | |||
@@ -633,6 +633,7 @@ static const struct net_device_ops softing_netdev_ops = { | |||
633 | }; | 633 | }; |
634 | 634 | ||
635 | static const struct can_bittiming_const softing_btr_const = { | 635 | static const struct can_bittiming_const softing_btr_const = { |
636 | .name = "softing", | ||
636 | .tseg1_min = 1, | 637 | .tseg1_min = 1, |
637 | .tseg1_max = 16, | 638 | .tseg1_max = 16, |
638 | .tseg2_min = 1, | 639 | .tseg2_min = 1, |
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index 7ff170cbc7dc..302be4aa69d6 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -2760,6 +2760,8 @@ static u32 cnic_service_bnx2_queues(struct cnic_dev *dev) | |||
2760 | u32 status_idx = (u16) *cp->kcq1.status_idx_ptr; | 2760 | u32 status_idx = (u16) *cp->kcq1.status_idx_ptr; |
2761 | int kcqe_cnt; | 2761 | int kcqe_cnt; |
2762 | 2762 | ||
2763 | /* status block index must be read before reading other fields */ | ||
2764 | rmb(); | ||
2763 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; | 2765 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; |
2764 | 2766 | ||
2765 | while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) { | 2767 | while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) { |
@@ -2770,6 +2772,8 @@ static u32 cnic_service_bnx2_queues(struct cnic_dev *dev) | |||
2770 | barrier(); | 2772 | barrier(); |
2771 | if (status_idx != *cp->kcq1.status_idx_ptr) { | 2773 | if (status_idx != *cp->kcq1.status_idx_ptr) { |
2772 | status_idx = (u16) *cp->kcq1.status_idx_ptr; | 2774 | status_idx = (u16) *cp->kcq1.status_idx_ptr; |
2775 | /* status block index must be read first */ | ||
2776 | rmb(); | ||
2773 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; | 2777 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; |
2774 | } else | 2778 | } else |
2775 | break; | 2779 | break; |
@@ -2888,6 +2892,8 @@ static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info) | |||
2888 | u32 last_status = *info->status_idx_ptr; | 2892 | u32 last_status = *info->status_idx_ptr; |
2889 | int kcqe_cnt; | 2893 | int kcqe_cnt; |
2890 | 2894 | ||
2895 | /* status block index must be read before reading the KCQ */ | ||
2896 | rmb(); | ||
2891 | while ((kcqe_cnt = cnic_get_kcqes(dev, info))) { | 2897 | while ((kcqe_cnt = cnic_get_kcqes(dev, info))) { |
2892 | 2898 | ||
2893 | service_kcqes(dev, kcqe_cnt); | 2899 | service_kcqes(dev, kcqe_cnt); |
@@ -2898,6 +2904,8 @@ static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info) | |||
2898 | break; | 2904 | break; |
2899 | 2905 | ||
2900 | last_status = *info->status_idx_ptr; | 2906 | last_status = *info->status_idx_ptr; |
2907 | /* status block index must be read before reading the KCQ */ | ||
2908 | rmb(); | ||
2901 | } | 2909 | } |
2902 | return last_status; | 2910 | return last_status; |
2903 | } | 2911 | } |
@@ -2906,26 +2914,35 @@ static void cnic_service_bnx2x_bh(unsigned long data) | |||
2906 | { | 2914 | { |
2907 | struct cnic_dev *dev = (struct cnic_dev *) data; | 2915 | struct cnic_dev *dev = (struct cnic_dev *) data; |
2908 | struct cnic_local *cp = dev->cnic_priv; | 2916 | struct cnic_local *cp = dev->cnic_priv; |
2909 | u32 status_idx; | 2917 | u32 status_idx, new_status_idx; |
2910 | 2918 | ||
2911 | if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) | 2919 | if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) |
2912 | return; | 2920 | return; |
2913 | 2921 | ||
2914 | status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1); | 2922 | while (1) { |
2923 | status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1); | ||
2915 | 2924 | ||
2916 | CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); | 2925 | CNIC_WR16(dev, cp->kcq1.io_addr, |
2926 | cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); | ||
2917 | 2927 | ||
2918 | if (BNX2X_CHIP_IS_E2(cp->chip_id)) { | 2928 | if (!BNX2X_CHIP_IS_E2(cp->chip_id)) { |
2919 | status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2); | 2929 | cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID, |
2930 | status_idx, IGU_INT_ENABLE, 1); | ||
2931 | break; | ||
2932 | } | ||
2933 | |||
2934 | new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2); | ||
2935 | |||
2936 | if (new_status_idx != status_idx) | ||
2937 | continue; | ||
2920 | 2938 | ||
2921 | CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx + | 2939 | CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx + |
2922 | MAX_KCQ_IDX); | 2940 | MAX_KCQ_IDX); |
2923 | 2941 | ||
2924 | cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, | 2942 | cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, |
2925 | status_idx, IGU_INT_ENABLE, 1); | 2943 | status_idx, IGU_INT_ENABLE, 1); |
2926 | } else { | 2944 | |
2927 | cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID, | 2945 | break; |
2928 | status_idx, IGU_INT_ENABLE, 1); | ||
2929 | } | 2946 | } |
2930 | } | 2947 | } |
2931 | 2948 | ||
diff --git a/drivers/net/cxgb4vf/cxgb4vf_main.c b/drivers/net/cxgb4vf/cxgb4vf_main.c index 56166ae2059f..6aad64df4dcb 100644 --- a/drivers/net/cxgb4vf/cxgb4vf_main.c +++ b/drivers/net/cxgb4vf/cxgb4vf_main.c | |||
@@ -2040,7 +2040,7 @@ static int __devinit setup_debugfs(struct adapter *adapter) | |||
2040 | { | 2040 | { |
2041 | int i; | 2041 | int i; |
2042 | 2042 | ||
2043 | BUG_ON(adapter->debugfs_root == NULL); | 2043 | BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root)); |
2044 | 2044 | ||
2045 | /* | 2045 | /* |
2046 | * Debugfs support is best effort. | 2046 | * Debugfs support is best effort. |
@@ -2061,7 +2061,7 @@ static int __devinit setup_debugfs(struct adapter *adapter) | |||
2061 | */ | 2061 | */ |
2062 | static void cleanup_debugfs(struct adapter *adapter) | 2062 | static void cleanup_debugfs(struct adapter *adapter) |
2063 | { | 2063 | { |
2064 | BUG_ON(adapter->debugfs_root == NULL); | 2064 | BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root)); |
2065 | 2065 | ||
2066 | /* | 2066 | /* |
2067 | * Unlike our sister routine cleanup_proc(), we don't need to remove | 2067 | * Unlike our sister routine cleanup_proc(), we don't need to remove |
@@ -2489,17 +2489,6 @@ static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev, | |||
2489 | struct net_device *netdev; | 2489 | struct net_device *netdev; |
2490 | 2490 | ||
2491 | /* | 2491 | /* |
2492 | * Vet our module parameters. | ||
2493 | */ | ||
2494 | if (msi != MSI_MSIX && msi != MSI_MSI) { | ||
2495 | dev_err(&pdev->dev, "bad module parameter msi=%d; must be %d" | ||
2496 | " (MSI-X or MSI) or %d (MSI)\n", msi, MSI_MSIX, | ||
2497 | MSI_MSI); | ||
2498 | err = -EINVAL; | ||
2499 | goto err_out; | ||
2500 | } | ||
2501 | |||
2502 | /* | ||
2503 | * Print our driver banner the first time we're called to initialize a | 2492 | * Print our driver banner the first time we're called to initialize a |
2504 | * device. | 2493 | * device. |
2505 | */ | 2494 | */ |
@@ -2711,11 +2700,11 @@ static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev, | |||
2711 | /* | 2700 | /* |
2712 | * Set up our debugfs entries. | 2701 | * Set up our debugfs entries. |
2713 | */ | 2702 | */ |
2714 | if (cxgb4vf_debugfs_root) { | 2703 | if (!IS_ERR_OR_NULL(cxgb4vf_debugfs_root)) { |
2715 | adapter->debugfs_root = | 2704 | adapter->debugfs_root = |
2716 | debugfs_create_dir(pci_name(pdev), | 2705 | debugfs_create_dir(pci_name(pdev), |
2717 | cxgb4vf_debugfs_root); | 2706 | cxgb4vf_debugfs_root); |
2718 | if (adapter->debugfs_root == NULL) | 2707 | if (IS_ERR_OR_NULL(adapter->debugfs_root)) |
2719 | dev_warn(&pdev->dev, "could not create debugfs" | 2708 | dev_warn(&pdev->dev, "could not create debugfs" |
2720 | " directory"); | 2709 | " directory"); |
2721 | else | 2710 | else |
@@ -2770,7 +2759,7 @@ static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev, | |||
2770 | */ | 2759 | */ |
2771 | 2760 | ||
2772 | err_free_debugfs: | 2761 | err_free_debugfs: |
2773 | if (adapter->debugfs_root) { | 2762 | if (!IS_ERR_OR_NULL(adapter->debugfs_root)) { |
2774 | cleanup_debugfs(adapter); | 2763 | cleanup_debugfs(adapter); |
2775 | debugfs_remove_recursive(adapter->debugfs_root); | 2764 | debugfs_remove_recursive(adapter->debugfs_root); |
2776 | } | 2765 | } |
@@ -2802,7 +2791,6 @@ err_release_regions: | |||
2802 | err_disable_device: | 2791 | err_disable_device: |
2803 | pci_disable_device(pdev); | 2792 | pci_disable_device(pdev); |
2804 | 2793 | ||
2805 | err_out: | ||
2806 | return err; | 2794 | return err; |
2807 | } | 2795 | } |
2808 | 2796 | ||
@@ -2840,7 +2828,7 @@ static void __devexit cxgb4vf_pci_remove(struct pci_dev *pdev) | |||
2840 | /* | 2828 | /* |
2841 | * Tear down our debugfs entries. | 2829 | * Tear down our debugfs entries. |
2842 | */ | 2830 | */ |
2843 | if (adapter->debugfs_root) { | 2831 | if (!IS_ERR_OR_NULL(adapter->debugfs_root)) { |
2844 | cleanup_debugfs(adapter); | 2832 | cleanup_debugfs(adapter); |
2845 | debugfs_remove_recursive(adapter->debugfs_root); | 2833 | debugfs_remove_recursive(adapter->debugfs_root); |
2846 | } | 2834 | } |
@@ -2874,6 +2862,46 @@ static void __devexit cxgb4vf_pci_remove(struct pci_dev *pdev) | |||
2874 | } | 2862 | } |
2875 | 2863 | ||
2876 | /* | 2864 | /* |
2865 | * "Shutdown" quiesce the device, stopping Ingress Packet and Interrupt | ||
2866 | * delivery. | ||
2867 | */ | ||
2868 | static void __devexit cxgb4vf_pci_shutdown(struct pci_dev *pdev) | ||
2869 | { | ||
2870 | struct adapter *adapter; | ||
2871 | int pidx; | ||
2872 | |||
2873 | adapter = pci_get_drvdata(pdev); | ||
2874 | if (!adapter) | ||
2875 | return; | ||
2876 | |||
2877 | /* | ||
2878 | * Disable all Virtual Interfaces. This will shut down the | ||
2879 | * delivery of all ingress packets into the chip for these | ||
2880 | * Virtual Interfaces. | ||
2881 | */ | ||
2882 | for_each_port(adapter, pidx) { | ||
2883 | struct net_device *netdev; | ||
2884 | struct port_info *pi; | ||
2885 | |||
2886 | if (!test_bit(pidx, &adapter->registered_device_map)) | ||
2887 | continue; | ||
2888 | |||
2889 | netdev = adapter->port[pidx]; | ||
2890 | if (!netdev) | ||
2891 | continue; | ||
2892 | |||
2893 | pi = netdev_priv(netdev); | ||
2894 | t4vf_enable_vi(adapter, pi->viid, false, false); | ||
2895 | } | ||
2896 | |||
2897 | /* | ||
2898 | * Free up all Queues which will prevent further DMA and | ||
2899 | * Interrupts allowing various internal pathways to drain. | ||
2900 | */ | ||
2901 | t4vf_free_sge_resources(adapter); | ||
2902 | } | ||
2903 | |||
2904 | /* | ||
2877 | * PCI Device registration data structures. | 2905 | * PCI Device registration data structures. |
2878 | */ | 2906 | */ |
2879 | #define CH_DEVICE(devid, idx) \ | 2907 | #define CH_DEVICE(devid, idx) \ |
@@ -2906,6 +2934,7 @@ static struct pci_driver cxgb4vf_driver = { | |||
2906 | .id_table = cxgb4vf_pci_tbl, | 2934 | .id_table = cxgb4vf_pci_tbl, |
2907 | .probe = cxgb4vf_pci_probe, | 2935 | .probe = cxgb4vf_pci_probe, |
2908 | .remove = __devexit_p(cxgb4vf_pci_remove), | 2936 | .remove = __devexit_p(cxgb4vf_pci_remove), |
2937 | .shutdown = __devexit_p(cxgb4vf_pci_shutdown), | ||
2909 | }; | 2938 | }; |
2910 | 2939 | ||
2911 | /* | 2940 | /* |
@@ -2915,14 +2944,25 @@ static int __init cxgb4vf_module_init(void) | |||
2915 | { | 2944 | { |
2916 | int ret; | 2945 | int ret; |
2917 | 2946 | ||
2947 | /* | ||
2948 | * Vet our module parameters. | ||
2949 | */ | ||
2950 | if (msi != MSI_MSIX && msi != MSI_MSI) { | ||
2951 | printk(KERN_WARNING KBUILD_MODNAME | ||
2952 | ": bad module parameter msi=%d; must be %d" | ||
2953 | " (MSI-X or MSI) or %d (MSI)\n", | ||
2954 | msi, MSI_MSIX, MSI_MSI); | ||
2955 | return -EINVAL; | ||
2956 | } | ||
2957 | |||
2918 | /* Debugfs support is optional, just warn if this fails */ | 2958 | /* Debugfs support is optional, just warn if this fails */ |
2919 | cxgb4vf_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); | 2959 | cxgb4vf_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); |
2920 | if (!cxgb4vf_debugfs_root) | 2960 | if (IS_ERR_OR_NULL(cxgb4vf_debugfs_root)) |
2921 | printk(KERN_WARNING KBUILD_MODNAME ": could not create" | 2961 | printk(KERN_WARNING KBUILD_MODNAME ": could not create" |
2922 | " debugfs entry, continuing\n"); | 2962 | " debugfs entry, continuing\n"); |
2923 | 2963 | ||
2924 | ret = pci_register_driver(&cxgb4vf_driver); | 2964 | ret = pci_register_driver(&cxgb4vf_driver); |
2925 | if (ret < 0) | 2965 | if (ret < 0 && !IS_ERR_OR_NULL(cxgb4vf_debugfs_root)) |
2926 | debugfs_remove(cxgb4vf_debugfs_root); | 2966 | debugfs_remove(cxgb4vf_debugfs_root); |
2927 | return ret; | 2967 | return ret; |
2928 | } | 2968 | } |
diff --git a/drivers/net/cxgb4vf/t4vf_hw.c b/drivers/net/cxgb4vf/t4vf_hw.c index 0f51c80475ce..192db226ec7f 100644 --- a/drivers/net/cxgb4vf/t4vf_hw.c +++ b/drivers/net/cxgb4vf/t4vf_hw.c | |||
@@ -171,7 +171,7 @@ int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, | |||
171 | delay_idx = 0; | 171 | delay_idx = 0; |
172 | ms = delay[0]; | 172 | ms = delay[0]; |
173 | 173 | ||
174 | for (i = 0; i < 500; i += ms) { | 174 | for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { |
175 | if (sleep_ok) { | 175 | if (sleep_ok) { |
176 | ms = delay[delay_idx]; | 176 | ms = delay[delay_idx]; |
177 | if (delay_idx < ARRAY_SIZE(delay) - 1) | 177 | if (delay_idx < ARRAY_SIZE(delay) - 1) |
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 2a628d17d178..7018bfe408a4 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c | |||
@@ -1008,7 +1008,7 @@ static void emac_rx_handler(void *token, int len, int status) | |||
1008 | int ret; | 1008 | int ret; |
1009 | 1009 | ||
1010 | /* free and bail if we are shutting down */ | 1010 | /* free and bail if we are shutting down */ |
1011 | if (unlikely(!netif_running(ndev))) { | 1011 | if (unlikely(!netif_running(ndev) || !netif_carrier_ok(ndev))) { |
1012 | dev_kfree_skb_any(skb); | 1012 | dev_kfree_skb_any(skb); |
1013 | return; | 1013 | return; |
1014 | } | 1014 | } |
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index 2d4c4fc1d900..461dd6f905f7 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c | |||
@@ -802,10 +802,7 @@ dm9000_init_dm9000(struct net_device *dev) | |||
802 | /* Checksum mode */ | 802 | /* Checksum mode */ |
803 | dm9000_set_rx_csum_unlocked(dev, db->rx_csum); | 803 | dm9000_set_rx_csum_unlocked(dev, db->rx_csum); |
804 | 804 | ||
805 | /* GPIO0 on pre-activate PHY */ | ||
806 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | ||
807 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | 805 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ |
808 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | ||
809 | 806 | ||
810 | ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0; | 807 | ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0; |
811 | 808 | ||
@@ -852,8 +849,8 @@ static void dm9000_timeout(struct net_device *dev) | |||
852 | unsigned long flags; | 849 | unsigned long flags; |
853 | 850 | ||
854 | /* Save previous register address */ | 851 | /* Save previous register address */ |
855 | reg_save = readb(db->io_addr); | ||
856 | spin_lock_irqsave(&db->lock, flags); | 852 | spin_lock_irqsave(&db->lock, flags); |
853 | reg_save = readb(db->io_addr); | ||
857 | 854 | ||
858 | netif_stop_queue(dev); | 855 | netif_stop_queue(dev); |
859 | dm9000_reset(db); | 856 | dm9000_reset(db); |
@@ -1194,6 +1191,10 @@ dm9000_open(struct net_device *dev) | |||
1194 | if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev)) | 1191 | if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev)) |
1195 | return -EAGAIN; | 1192 | return -EAGAIN; |
1196 | 1193 | ||
1194 | /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */ | ||
1195 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | ||
1196 | mdelay(1); /* delay needs by DM9000B */ | ||
1197 | |||
1197 | /* Initialize DM9000 board */ | 1198 | /* Initialize DM9000 board */ |
1198 | dm9000_reset(db); | 1199 | dm9000_reset(db); |
1199 | dm9000_init_dm9000(dev); | 1200 | dm9000_init_dm9000(dev); |
diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c index 9d8a20b72fa9..8318ea06cb6d 100644 --- a/drivers/net/dnet.c +++ b/drivers/net/dnet.c | |||
@@ -337,8 +337,6 @@ static int dnet_mii_init(struct dnet *bp) | |||
337 | for (i = 0; i < PHY_MAX_ADDR; i++) | 337 | for (i = 0; i < PHY_MAX_ADDR; i++) |
338 | bp->mii_bus->irq[i] = PHY_POLL; | 338 | bp->mii_bus->irq[i] = PHY_POLL; |
339 | 339 | ||
340 | platform_set_drvdata(bp->dev, bp->mii_bus); | ||
341 | |||
342 | if (mdiobus_register(bp->mii_bus)) { | 340 | if (mdiobus_register(bp->mii_bus)) { |
343 | err = -ENXIO; | 341 | err = -ENXIO; |
344 | goto err_out_free_mdio_irq; | 342 | goto err_out_free_mdio_irq; |
@@ -863,6 +861,7 @@ static int __devinit dnet_probe(struct platform_device *pdev) | |||
863 | bp = netdev_priv(dev); | 861 | bp = netdev_priv(dev); |
864 | bp->dev = dev; | 862 | bp->dev = dev; |
865 | 863 | ||
864 | platform_set_drvdata(pdev, dev); | ||
866 | SET_NETDEV_DEV(dev, &pdev->dev); | 865 | SET_NETDEV_DEV(dev, &pdev->dev); |
867 | 866 | ||
868 | spin_lock_init(&bp->lock); | 867 | spin_lock_init(&bp->lock); |
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h index 55c1711f1688..33e7c45a4fe4 100644 --- a/drivers/net/e1000/e1000_osdep.h +++ b/drivers/net/e1000/e1000_osdep.h | |||
@@ -42,7 +42,8 @@ | |||
42 | #define GBE_CONFIG_RAM_BASE \ | 42 | #define GBE_CONFIG_RAM_BASE \ |
43 | ((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET)) | 43 | ((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET)) |
44 | 44 | ||
45 | #define GBE_CONFIG_BASE_VIRT phys_to_virt(GBE_CONFIG_RAM_BASE) | 45 | #define GBE_CONFIG_BASE_VIRT \ |
46 | ((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE)) | ||
46 | 47 | ||
47 | #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \ | 48 | #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \ |
48 | (iowrite16_rep(base + offset, data, count)) | 49 | (iowrite16_rep(base + offset, data, count)) |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index 3065870cf2a7..2e5022849f18 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -937,6 +937,9 @@ static void e1000_print_hw_hang(struct work_struct *work) | |||
937 | u16 phy_status, phy_1000t_status, phy_ext_status; | 937 | u16 phy_status, phy_1000t_status, phy_ext_status; |
938 | u16 pci_status; | 938 | u16 pci_status; |
939 | 939 | ||
940 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
941 | return; | ||
942 | |||
940 | e1e_rphy(hw, PHY_STATUS, &phy_status); | 943 | e1e_rphy(hw, PHY_STATUS, &phy_status); |
941 | e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); | 944 | e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); |
942 | e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); | 945 | e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); |
@@ -1506,6 +1509,9 @@ static void e1000e_downshift_workaround(struct work_struct *work) | |||
1506 | struct e1000_adapter *adapter = container_of(work, | 1509 | struct e1000_adapter *adapter = container_of(work, |
1507 | struct e1000_adapter, downshift_task); | 1510 | struct e1000_adapter, downshift_task); |
1508 | 1511 | ||
1512 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
1513 | return; | ||
1514 | |||
1509 | e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); | 1515 | e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); |
1510 | } | 1516 | } |
1511 | 1517 | ||
@@ -3338,6 +3344,21 @@ int e1000e_up(struct e1000_adapter *adapter) | |||
3338 | return 0; | 3344 | return 0; |
3339 | } | 3345 | } |
3340 | 3346 | ||
3347 | static void e1000e_flush_descriptors(struct e1000_adapter *adapter) | ||
3348 | { | ||
3349 | struct e1000_hw *hw = &adapter->hw; | ||
3350 | |||
3351 | if (!(adapter->flags2 & FLAG2_DMA_BURST)) | ||
3352 | return; | ||
3353 | |||
3354 | /* flush pending descriptor writebacks to memory */ | ||
3355 | ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); | ||
3356 | ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); | ||
3357 | |||
3358 | /* execute the writes immediately */ | ||
3359 | e1e_flush(); | ||
3360 | } | ||
3361 | |||
3341 | void e1000e_down(struct e1000_adapter *adapter) | 3362 | void e1000e_down(struct e1000_adapter *adapter) |
3342 | { | 3363 | { |
3343 | struct net_device *netdev = adapter->netdev; | 3364 | struct net_device *netdev = adapter->netdev; |
@@ -3377,6 +3398,9 @@ void e1000e_down(struct e1000_adapter *adapter) | |||
3377 | 3398 | ||
3378 | if (!pci_channel_offline(adapter->pdev)) | 3399 | if (!pci_channel_offline(adapter->pdev)) |
3379 | e1000e_reset(adapter); | 3400 | e1000e_reset(adapter); |
3401 | |||
3402 | e1000e_flush_descriptors(adapter); | ||
3403 | |||
3380 | e1000_clean_tx_ring(adapter); | 3404 | e1000_clean_tx_ring(adapter); |
3381 | e1000_clean_rx_ring(adapter); | 3405 | e1000_clean_rx_ring(adapter); |
3382 | 3406 | ||
@@ -3765,6 +3789,10 @@ static void e1000e_update_phy_task(struct work_struct *work) | |||
3765 | { | 3789 | { |
3766 | struct e1000_adapter *adapter = container_of(work, | 3790 | struct e1000_adapter *adapter = container_of(work, |
3767 | struct e1000_adapter, update_phy_task); | 3791 | struct e1000_adapter, update_phy_task); |
3792 | |||
3793 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
3794 | return; | ||
3795 | |||
3768 | e1000_get_phy_info(&adapter->hw); | 3796 | e1000_get_phy_info(&adapter->hw); |
3769 | } | 3797 | } |
3770 | 3798 | ||
@@ -3775,6 +3803,10 @@ static void e1000e_update_phy_task(struct work_struct *work) | |||
3775 | static void e1000_update_phy_info(unsigned long data) | 3803 | static void e1000_update_phy_info(unsigned long data) |
3776 | { | 3804 | { |
3777 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | 3805 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; |
3806 | |||
3807 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
3808 | return; | ||
3809 | |||
3778 | schedule_work(&adapter->update_phy_task); | 3810 | schedule_work(&adapter->update_phy_task); |
3779 | } | 3811 | } |
3780 | 3812 | ||
@@ -4149,6 +4181,9 @@ static void e1000_watchdog_task(struct work_struct *work) | |||
4149 | u32 link, tctl; | 4181 | u32 link, tctl; |
4150 | int tx_pending = 0; | 4182 | int tx_pending = 0; |
4151 | 4183 | ||
4184 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
4185 | return; | ||
4186 | |||
4152 | link = e1000e_has_link(adapter); | 4187 | link = e1000e_has_link(adapter); |
4153 | if ((netif_carrier_ok(netdev)) && link) { | 4188 | if ((netif_carrier_ok(netdev)) && link) { |
4154 | /* Cancel scheduled suspend requests. */ | 4189 | /* Cancel scheduled suspend requests. */ |
@@ -4337,19 +4372,12 @@ link_up: | |||
4337 | else | 4372 | else |
4338 | ew32(ICS, E1000_ICS_RXDMT0); | 4373 | ew32(ICS, E1000_ICS_RXDMT0); |
4339 | 4374 | ||
4375 | /* flush pending descriptors to memory before detecting Tx hang */ | ||
4376 | e1000e_flush_descriptors(adapter); | ||
4377 | |||
4340 | /* Force detection of hung controller every watchdog period */ | 4378 | /* Force detection of hung controller every watchdog period */ |
4341 | adapter->detect_tx_hung = 1; | 4379 | adapter->detect_tx_hung = 1; |
4342 | 4380 | ||
4343 | /* flush partial descriptors to memory before detecting Tx hang */ | ||
4344 | if (adapter->flags2 & FLAG2_DMA_BURST) { | ||
4345 | ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); | ||
4346 | ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); | ||
4347 | /* | ||
4348 | * no need to flush the writes because the timeout code does | ||
4349 | * an er32 first thing | ||
4350 | */ | ||
4351 | } | ||
4352 | |||
4353 | /* | 4381 | /* |
4354 | * With 82571 controllers, LAA may be overwritten due to controller | 4382 | * With 82571 controllers, LAA may be overwritten due to controller |
4355 | * reset from the other port. Set the appropriate LAA in RAR[0] | 4383 | * reset from the other port. Set the appropriate LAA in RAR[0] |
@@ -4887,6 +4915,10 @@ static void e1000_reset_task(struct work_struct *work) | |||
4887 | struct e1000_adapter *adapter; | 4915 | struct e1000_adapter *adapter; |
4888 | adapter = container_of(work, struct e1000_adapter, reset_task); | 4916 | adapter = container_of(work, struct e1000_adapter, reset_task); |
4889 | 4917 | ||
4918 | /* don't run the task if already down */ | ||
4919 | if (test_bit(__E1000_DOWN, &adapter->state)) | ||
4920 | return; | ||
4921 | |||
4890 | if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && | 4922 | if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && |
4891 | (adapter->flags & FLAG_RX_RESTART_NOW))) { | 4923 | (adapter->flags & FLAG_RX_RESTART_NOW))) { |
4892 | e1000e_dump(adapter); | 4924 | e1000e_dump(adapter); |
@@ -5935,7 +5967,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev, | |||
5935 | /* APME bit in EEPROM is mapped to WUC.APME */ | 5967 | /* APME bit in EEPROM is mapped to WUC.APME */ |
5936 | eeprom_data = er32(WUC); | 5968 | eeprom_data = er32(WUC); |
5937 | eeprom_apme_mask = E1000_WUC_APME; | 5969 | eeprom_apme_mask = E1000_WUC_APME; |
5938 | if (eeprom_data & E1000_WUC_PHY_WAKE) | 5970 | if ((hw->mac.type > e1000_ich10lan) && |
5971 | (eeprom_data & E1000_WUC_PHY_WAKE)) | ||
5939 | adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; | 5972 | adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; |
5940 | } else if (adapter->flags & FLAG_APME_IN_CTRL3) { | 5973 | } else if (adapter->flags & FLAG_APME_IN_CTRL3) { |
5941 | if (adapter->flags & FLAG_APME_CHECK_PORT_B && | 5974 | if (adapter->flags & FLAG_APME_CHECK_PORT_B && |
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index 2a71373719ae..cd0282d5d40f 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c | |||
@@ -74,7 +74,8 @@ static struct platform_device_id fec_devtype[] = { | |||
74 | }, { | 74 | }, { |
75 | .name = "imx28-fec", | 75 | .name = "imx28-fec", |
76 | .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME, | 76 | .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME, |
77 | } | 77 | }, |
78 | { } | ||
78 | }; | 79 | }; |
79 | 80 | ||
80 | static unsigned char macaddr[ETH_ALEN]; | 81 | static unsigned char macaddr[ETH_ALEN]; |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index af09296ef0dd..9c0b1bac6af6 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -5645,6 +5645,8 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5645 | goto out_error; | 5645 | goto out_error; |
5646 | } | 5646 | } |
5647 | 5647 | ||
5648 | netif_carrier_off(dev); | ||
5649 | |||
5648 | dev_info(&pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, addr %pM\n", | 5650 | dev_info(&pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, addr %pM\n", |
5649 | dev->name, np->phy_oui, np->phyaddr, dev->dev_addr); | 5651 | dev->name, np->phy_oui, np->phyaddr, dev->dev_addr); |
5650 | 5652 | ||
diff --git a/drivers/net/igbvf/vf.c b/drivers/net/igbvf/vf.c index 74486a8b009a..af3822f9ea9a 100644 --- a/drivers/net/igbvf/vf.c +++ b/drivers/net/igbvf/vf.c | |||
@@ -220,7 +220,7 @@ static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr) | |||
220 | * The parameter rar_count will usually be hw->mac.rar_entry_count | 220 | * The parameter rar_count will usually be hw->mac.rar_entry_count |
221 | * unless there are workarounds that change this. | 221 | * unless there are workarounds that change this. |
222 | **/ | 222 | **/ |
223 | void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, | 223 | static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, |
224 | u8 *mc_addr_list, u32 mc_addr_count, | 224 | u8 *mc_addr_list, u32 mc_addr_count, |
225 | u32 rar_used_count, u32 rar_count) | 225 | u32 rar_used_count, u32 rar_count) |
226 | { | 226 | { |
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c index 8753980668c7..c54a88274d51 100644 --- a/drivers/net/ixgbe/ixgbe_fcoe.c +++ b/drivers/net/ixgbe/ixgbe_fcoe.c | |||
@@ -159,7 +159,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
159 | struct scatterlist *sg; | 159 | struct scatterlist *sg; |
160 | unsigned int i, j, dmacount; | 160 | unsigned int i, j, dmacount; |
161 | unsigned int len; | 161 | unsigned int len; |
162 | static const unsigned int bufflen = 4096; | 162 | static const unsigned int bufflen = IXGBE_FCBUFF_MIN; |
163 | unsigned int firstoff = 0; | 163 | unsigned int firstoff = 0; |
164 | unsigned int lastsize; | 164 | unsigned int lastsize; |
165 | unsigned int thisoff = 0; | 165 | unsigned int thisoff = 0; |
@@ -254,6 +254,24 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
254 | /* only the last buffer may have non-full bufflen */ | 254 | /* only the last buffer may have non-full bufflen */ |
255 | lastsize = thisoff + thislen; | 255 | lastsize = thisoff + thislen; |
256 | 256 | ||
257 | /* | ||
258 | * lastsize can not be buffer len. | ||
259 | * If it is then adding another buffer with lastsize = 1. | ||
260 | */ | ||
261 | if (lastsize == bufflen) { | ||
262 | if (j >= IXGBE_BUFFCNT_MAX) { | ||
263 | e_err(drv, "xid=%x:%d,%d,%d:addr=%llx " | ||
264 | "not enough user buffers. We need an extra " | ||
265 | "buffer because lastsize is bufflen.\n", | ||
266 | xid, i, j, dmacount, (u64)addr); | ||
267 | goto out_noddp_free; | ||
268 | } | ||
269 | |||
270 | ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma); | ||
271 | j++; | ||
272 | lastsize = 1; | ||
273 | } | ||
274 | |||
257 | fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT); | 275 | fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT); |
258 | fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT); | 276 | fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT); |
259 | fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT); | 277 | fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT); |
@@ -532,6 +550,24 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) | |||
532 | e_err(drv, "failed to allocated FCoE DDP pool\n"); | 550 | e_err(drv, "failed to allocated FCoE DDP pool\n"); |
533 | 551 | ||
534 | spin_lock_init(&fcoe->lock); | 552 | spin_lock_init(&fcoe->lock); |
553 | |||
554 | /* Extra buffer to be shared by all DDPs for HW work around */ | ||
555 | fcoe->extra_ddp_buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_ATOMIC); | ||
556 | if (fcoe->extra_ddp_buffer == NULL) { | ||
557 | e_err(drv, "failed to allocated extra DDP buffer\n"); | ||
558 | goto out_extra_ddp_buffer_alloc; | ||
559 | } | ||
560 | |||
561 | fcoe->extra_ddp_buffer_dma = | ||
562 | dma_map_single(&adapter->pdev->dev, | ||
563 | fcoe->extra_ddp_buffer, | ||
564 | IXGBE_FCBUFF_MIN, | ||
565 | DMA_FROM_DEVICE); | ||
566 | if (dma_mapping_error(&adapter->pdev->dev, | ||
567 | fcoe->extra_ddp_buffer_dma)) { | ||
568 | e_err(drv, "failed to map extra DDP buffer\n"); | ||
569 | goto out_extra_ddp_buffer_dma; | ||
570 | } | ||
535 | } | 571 | } |
536 | 572 | ||
537 | /* Enable L2 eth type filter for FCoE */ | 573 | /* Enable L2 eth type filter for FCoE */ |
@@ -581,6 +617,14 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) | |||
581 | } | 617 | } |
582 | } | 618 | } |
583 | #endif | 619 | #endif |
620 | |||
621 | return; | ||
622 | |||
623 | out_extra_ddp_buffer_dma: | ||
624 | kfree(fcoe->extra_ddp_buffer); | ||
625 | out_extra_ddp_buffer_alloc: | ||
626 | pci_pool_destroy(fcoe->pool); | ||
627 | fcoe->pool = NULL; | ||
584 | } | 628 | } |
585 | 629 | ||
586 | /** | 630 | /** |
@@ -600,6 +644,11 @@ void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter) | |||
600 | if (fcoe->pool) { | 644 | if (fcoe->pool) { |
601 | for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++) | 645 | for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++) |
602 | ixgbe_fcoe_ddp_put(adapter->netdev, i); | 646 | ixgbe_fcoe_ddp_put(adapter->netdev, i); |
647 | dma_unmap_single(&adapter->pdev->dev, | ||
648 | fcoe->extra_ddp_buffer_dma, | ||
649 | IXGBE_FCBUFF_MIN, | ||
650 | DMA_FROM_DEVICE); | ||
651 | kfree(fcoe->extra_ddp_buffer); | ||
603 | pci_pool_destroy(fcoe->pool); | 652 | pci_pool_destroy(fcoe->pool); |
604 | fcoe->pool = NULL; | 653 | fcoe->pool = NULL; |
605 | } | 654 | } |
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.h b/drivers/net/ixgbe/ixgbe_fcoe.h index 4bc2c551c8db..65cc8fb14fe7 100644 --- a/drivers/net/ixgbe/ixgbe_fcoe.h +++ b/drivers/net/ixgbe/ixgbe_fcoe.h | |||
@@ -70,6 +70,8 @@ struct ixgbe_fcoe { | |||
70 | spinlock_t lock; | 70 | spinlock_t lock; |
71 | struct pci_pool *pool; | 71 | struct pci_pool *pool; |
72 | struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX]; | 72 | struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX]; |
73 | unsigned char *extra_ddp_buffer; | ||
74 | dma_addr_t extra_ddp_buffer_dma; | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | #endif /* _IXGBE_FCOE_H */ | 77 | #endif /* _IXGBE_FCOE_H */ |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index fbae703b46d7..30f9ccfb4f87 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -3728,7 +3728,8 @@ static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter) | |||
3728 | * We need to try and force an autonegotiation | 3728 | * We need to try and force an autonegotiation |
3729 | * session, then bring up link. | 3729 | * session, then bring up link. |
3730 | */ | 3730 | */ |
3731 | hw->mac.ops.setup_sfp(hw); | 3731 | if (hw->mac.ops.setup_sfp) |
3732 | hw->mac.ops.setup_sfp(hw); | ||
3732 | if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)) | 3733 | if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)) |
3733 | schedule_work(&adapter->multispeed_fiber_task); | 3734 | schedule_work(&adapter->multispeed_fiber_task); |
3734 | } else { | 3735 | } else { |
@@ -5968,7 +5969,8 @@ static void ixgbe_sfp_config_module_task(struct work_struct *work) | |||
5968 | unregister_netdev(adapter->netdev); | 5969 | unregister_netdev(adapter->netdev); |
5969 | return; | 5970 | return; |
5970 | } | 5971 | } |
5971 | hw->mac.ops.setup_sfp(hw); | 5972 | if (hw->mac.ops.setup_sfp) |
5973 | hw->mac.ops.setup_sfp(hw); | ||
5972 | 5974 | ||
5973 | if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)) | 5975 | if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)) |
5974 | /* This will also work for DA Twinax connections */ | 5976 | /* This will also work for DA Twinax connections */ |
diff --git a/drivers/net/macb.c b/drivers/net/macb.c index f69e73e2191e..79ccb54ab00c 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c | |||
@@ -260,7 +260,7 @@ static int macb_mii_init(struct macb *bp) | |||
260 | for (i = 0; i < PHY_MAX_ADDR; i++) | 260 | for (i = 0; i < PHY_MAX_ADDR; i++) |
261 | bp->mii_bus->irq[i] = PHY_POLL; | 261 | bp->mii_bus->irq[i] = PHY_POLL; |
262 | 262 | ||
263 | platform_set_drvdata(bp->dev, bp->mii_bus); | 263 | dev_set_drvdata(&bp->dev->dev, bp->mii_bus); |
264 | 264 | ||
265 | if (mdiobus_register(bp->mii_bus)) | 265 | if (mdiobus_register(bp->mii_bus)) |
266 | goto err_out_free_mdio_irq; | 266 | goto err_out_free_mdio_irq; |
diff --git a/drivers/net/pch_gbe/pch_gbe.h b/drivers/net/pch_gbe/pch_gbe.h index a0c26a99520f..e1e33c80fb25 100644 --- a/drivers/net/pch_gbe/pch_gbe.h +++ b/drivers/net/pch_gbe/pch_gbe.h | |||
@@ -73,7 +73,7 @@ struct pch_gbe_regs { | |||
73 | struct pch_gbe_regs_mac_adr mac_adr[16]; | 73 | struct pch_gbe_regs_mac_adr mac_adr[16]; |
74 | u32 ADDR_MASK; | 74 | u32 ADDR_MASK; |
75 | u32 MIIM; | 75 | u32 MIIM; |
76 | u32 reserve2; | 76 | u32 MAC_ADDR_LOAD; |
77 | u32 RGMII_ST; | 77 | u32 RGMII_ST; |
78 | u32 RGMII_CTRL; | 78 | u32 RGMII_CTRL; |
79 | u32 reserve3[3]; | 79 | u32 reserve3[3]; |
diff --git a/drivers/net/pch_gbe/pch_gbe_main.c b/drivers/net/pch_gbe/pch_gbe_main.c index 4c9a7d4f3fca..b99e90aca37d 100644 --- a/drivers/net/pch_gbe/pch_gbe_main.c +++ b/drivers/net/pch_gbe/pch_gbe_main.c | |||
@@ -29,6 +29,7 @@ const char pch_driver_version[] = DRV_VERSION; | |||
29 | #define PCH_GBE_SHORT_PKT 64 | 29 | #define PCH_GBE_SHORT_PKT 64 |
30 | #define DSC_INIT16 0xC000 | 30 | #define DSC_INIT16 0xC000 |
31 | #define PCH_GBE_DMA_ALIGN 0 | 31 | #define PCH_GBE_DMA_ALIGN 0 |
32 | #define PCH_GBE_DMA_PADDING 2 | ||
32 | #define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */ | 33 | #define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */ |
33 | #define PCH_GBE_COPYBREAK_DEFAULT 256 | 34 | #define PCH_GBE_COPYBREAK_DEFAULT 256 |
34 | #define PCH_GBE_PCI_BAR 1 | 35 | #define PCH_GBE_PCI_BAR 1 |
@@ -88,6 +89,12 @@ static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT; | |||
88 | static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg); | 89 | static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg); |
89 | static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg, | 90 | static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg, |
90 | int data); | 91 | int data); |
92 | |||
93 | inline void pch_gbe_mac_load_mac_addr(struct pch_gbe_hw *hw) | ||
94 | { | ||
95 | iowrite32(0x01, &hw->reg->MAC_ADDR_LOAD); | ||
96 | } | ||
97 | |||
91 | /** | 98 | /** |
92 | * pch_gbe_mac_read_mac_addr - Read MAC address | 99 | * pch_gbe_mac_read_mac_addr - Read MAC address |
93 | * @hw: Pointer to the HW structure | 100 | * @hw: Pointer to the HW structure |
@@ -1365,16 +1372,13 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
1365 | struct pch_gbe_buffer *buffer_info; | 1372 | struct pch_gbe_buffer *buffer_info; |
1366 | struct pch_gbe_rx_desc *rx_desc; | 1373 | struct pch_gbe_rx_desc *rx_desc; |
1367 | u32 length; | 1374 | u32 length; |
1368 | unsigned char tmp_packet[ETH_HLEN]; | ||
1369 | unsigned int i; | 1375 | unsigned int i; |
1370 | unsigned int cleaned_count = 0; | 1376 | unsigned int cleaned_count = 0; |
1371 | bool cleaned = false; | 1377 | bool cleaned = false; |
1372 | struct sk_buff *skb; | 1378 | struct sk_buff *skb, *new_skb; |
1373 | u8 dma_status; | 1379 | u8 dma_status; |
1374 | u16 gbec_status; | 1380 | u16 gbec_status; |
1375 | u32 tcp_ip_status; | 1381 | u32 tcp_ip_status; |
1376 | u8 skb_copy_flag = 0; | ||
1377 | u8 skb_padding_flag = 0; | ||
1378 | 1382 | ||
1379 | i = rx_ring->next_to_clean; | 1383 | i = rx_ring->next_to_clean; |
1380 | 1384 | ||
@@ -1418,55 +1422,70 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
1418 | pr_err("Receive CRC Error\n"); | 1422 | pr_err("Receive CRC Error\n"); |
1419 | } else { | 1423 | } else { |
1420 | /* get receive length */ | 1424 | /* get receive length */ |
1421 | /* length convert[-3], padding[-2] */ | 1425 | /* length convert[-3] */ |
1422 | length = (rx_desc->rx_words_eob) - 3 - 2; | 1426 | length = (rx_desc->rx_words_eob) - 3; |
1423 | 1427 | ||
1424 | /* Decide the data conversion method */ | 1428 | /* Decide the data conversion method */ |
1425 | if (!adapter->rx_csum) { | 1429 | if (!adapter->rx_csum) { |
1426 | /* [Header:14][payload] */ | 1430 | /* [Header:14][payload] */ |
1427 | skb_padding_flag = 0; | 1431 | if (NET_IP_ALIGN) { |
1428 | skb_copy_flag = 1; | 1432 | /* Because alignment differs, |
1433 | * the new_skb is newly allocated, | ||
1434 | * and data is copied to new_skb.*/ | ||
1435 | new_skb = netdev_alloc_skb(netdev, | ||
1436 | length + NET_IP_ALIGN); | ||
1437 | if (!new_skb) { | ||
1438 | /* dorrop error */ | ||
1439 | pr_err("New skb allocation " | ||
1440 | "Error\n"); | ||
1441 | goto dorrop; | ||
1442 | } | ||
1443 | skb_reserve(new_skb, NET_IP_ALIGN); | ||
1444 | memcpy(new_skb->data, skb->data, | ||
1445 | length); | ||
1446 | skb = new_skb; | ||
1447 | } else { | ||
1448 | /* DMA buffer is used as SKB as it is.*/ | ||
1449 | buffer_info->skb = NULL; | ||
1450 | } | ||
1429 | } else { | 1451 | } else { |
1430 | /* [Header:14][padding:2][payload] */ | 1452 | /* [Header:14][padding:2][payload] */ |
1431 | skb_padding_flag = 1; | 1453 | /* The length includes padding length */ |
1432 | if (length < copybreak) | 1454 | length = length - PCH_GBE_DMA_PADDING; |
1433 | skb_copy_flag = 1; | 1455 | if ((length < copybreak) || |
1434 | else | 1456 | (NET_IP_ALIGN != PCH_GBE_DMA_PADDING)) { |
1435 | skb_copy_flag = 0; | 1457 | /* Because alignment differs, |
1436 | } | 1458 | * the new_skb is newly allocated, |
1437 | 1459 | * and data is copied to new_skb. | |
1438 | /* Data conversion */ | 1460 | * Padding data is deleted |
1439 | if (skb_copy_flag) { /* recycle skb */ | 1461 | * at the time of a copy.*/ |
1440 | struct sk_buff *new_skb; | 1462 | new_skb = netdev_alloc_skb(netdev, |
1441 | new_skb = | 1463 | length + NET_IP_ALIGN); |
1442 | netdev_alloc_skb(netdev, | 1464 | if (!new_skb) { |
1443 | length + NET_IP_ALIGN); | 1465 | /* dorrop error */ |
1444 | if (new_skb) { | 1466 | pr_err("New skb allocation " |
1445 | if (!skb_padding_flag) { | 1467 | "Error\n"); |
1446 | skb_reserve(new_skb, | 1468 | goto dorrop; |
1447 | NET_IP_ALIGN); | ||
1448 | } | 1469 | } |
1470 | skb_reserve(new_skb, NET_IP_ALIGN); | ||
1449 | memcpy(new_skb->data, skb->data, | 1471 | memcpy(new_skb->data, skb->data, |
1450 | length); | 1472 | ETH_HLEN); |
1451 | /* save the skb | 1473 | memcpy(&new_skb->data[ETH_HLEN], |
1452 | * in buffer_info as good */ | 1474 | &skb->data[ETH_HLEN + |
1475 | PCH_GBE_DMA_PADDING], | ||
1476 | length - ETH_HLEN); | ||
1453 | skb = new_skb; | 1477 | skb = new_skb; |
1454 | } else if (!skb_padding_flag) { | 1478 | } else { |
1455 | /* dorrop error */ | 1479 | /* Padding data is deleted |
1456 | pr_err("New skb allocation Error\n"); | 1480 | * by moving header data.*/ |
1457 | goto dorrop; | 1481 | memmove(&skb->data[PCH_GBE_DMA_PADDING], |
1482 | &skb->data[0], ETH_HLEN); | ||
1483 | skb_reserve(skb, NET_IP_ALIGN); | ||
1484 | buffer_info->skb = NULL; | ||
1458 | } | 1485 | } |
1459 | } else { | ||
1460 | buffer_info->skb = NULL; | ||
1461 | } | 1486 | } |
1462 | if (skb_padding_flag) { | 1487 | /* The length includes FCS length */ |
1463 | memcpy(&tmp_packet[0], &skb->data[0], ETH_HLEN); | 1488 | length = length - ETH_FCS_LEN; |
1464 | memcpy(&skb->data[NET_IP_ALIGN], &tmp_packet[0], | ||
1465 | ETH_HLEN); | ||
1466 | skb_reserve(skb, NET_IP_ALIGN); | ||
1467 | |||
1468 | } | ||
1469 | |||
1470 | /* update status of driver */ | 1489 | /* update status of driver */ |
1471 | adapter->stats.rx_bytes += length; | 1490 | adapter->stats.rx_bytes += length; |
1472 | adapter->stats.rx_packets++; | 1491 | adapter->stats.rx_packets++; |
@@ -2318,6 +2337,7 @@ static int pch_gbe_probe(struct pci_dev *pdev, | |||
2318 | netdev->features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_GRO; | 2337 | netdev->features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_GRO; |
2319 | pch_gbe_set_ethtool_ops(netdev); | 2338 | pch_gbe_set_ethtool_ops(netdev); |
2320 | 2339 | ||
2340 | pch_gbe_mac_load_mac_addr(&adapter->hw); | ||
2321 | pch_gbe_mac_reset_hw(&adapter->hw); | 2341 | pch_gbe_mac_reset_hw(&adapter->hw); |
2322 | 2342 | ||
2323 | /* setup the private structure */ | 2343 | /* setup the private structure */ |
diff --git a/drivers/net/pcmcia/fmvj18x_cs.c b/drivers/net/pcmcia/fmvj18x_cs.c index 9226cda4d054..530ab5a10bd3 100644 --- a/drivers/net/pcmcia/fmvj18x_cs.c +++ b/drivers/net/pcmcia/fmvj18x_cs.c | |||
@@ -691,6 +691,7 @@ static struct pcmcia_device_id fmvj18x_ids[] = { | |||
691 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a), | 691 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a), |
692 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0e01), | 692 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0e01), |
693 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0a05), | 693 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0a05), |
694 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0b05), | ||
694 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x1101), | 695 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x1101), |
695 | PCMCIA_DEVICE_NULL, | 696 | PCMCIA_DEVICE_NULL, |
696 | }; | 697 | }; |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 59ccf0c5c610..7ffdb80adf40 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
26 | #include <linux/pm_runtime.h> | 26 | #include <linux/pm_runtime.h> |
27 | #include <linux/firmware.h> | 27 | #include <linux/firmware.h> |
28 | #include <linux/pci-aspm.h> | ||
28 | 29 | ||
29 | #include <asm/system.h> | 30 | #include <asm/system.h> |
30 | #include <asm/io.h> | 31 | #include <asm/io.h> |
@@ -617,8 +618,9 @@ static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data) | |||
617 | } | 618 | } |
618 | } | 619 | } |
619 | 620 | ||
620 | static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd) | 621 | static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd) |
621 | { | 622 | { |
623 | void __iomem *ioaddr = tp->mmio_addr; | ||
622 | int i; | 624 | int i; |
623 | 625 | ||
624 | RTL_W8(ERIDR, cmd); | 626 | RTL_W8(ERIDR, cmd); |
@@ -630,7 +632,7 @@ static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd) | |||
630 | break; | 632 | break; |
631 | } | 633 | } |
632 | 634 | ||
633 | ocp_write(ioaddr, 0x1, 0x30, 0x00000001); | 635 | ocp_write(tp, 0x1, 0x30, 0x00000001); |
634 | } | 636 | } |
635 | 637 | ||
636 | #define OOB_CMD_RESET 0x00 | 638 | #define OOB_CMD_RESET 0x00 |
@@ -2868,8 +2870,11 @@ static void r8168_pll_power_down(struct rtl8169_private *tp) | |||
2868 | { | 2870 | { |
2869 | void __iomem *ioaddr = tp->mmio_addr; | 2871 | void __iomem *ioaddr = tp->mmio_addr; |
2870 | 2872 | ||
2871 | if (tp->mac_version == RTL_GIGA_MAC_VER_27) | 2873 | if (((tp->mac_version == RTL_GIGA_MAC_VER_27) || |
2874 | (tp->mac_version == RTL_GIGA_MAC_VER_28)) && | ||
2875 | (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) { | ||
2872 | return; | 2876 | return; |
2877 | } | ||
2873 | 2878 | ||
2874 | if (((tp->mac_version == RTL_GIGA_MAC_VER_23) || | 2879 | if (((tp->mac_version == RTL_GIGA_MAC_VER_23) || |
2875 | (tp->mac_version == RTL_GIGA_MAC_VER_24)) && | 2880 | (tp->mac_version == RTL_GIGA_MAC_VER_24)) && |
@@ -2891,6 +2896,8 @@ static void r8168_pll_power_down(struct rtl8169_private *tp) | |||
2891 | switch (tp->mac_version) { | 2896 | switch (tp->mac_version) { |
2892 | case RTL_GIGA_MAC_VER_25: | 2897 | case RTL_GIGA_MAC_VER_25: |
2893 | case RTL_GIGA_MAC_VER_26: | 2898 | case RTL_GIGA_MAC_VER_26: |
2899 | case RTL_GIGA_MAC_VER_27: | ||
2900 | case RTL_GIGA_MAC_VER_28: | ||
2894 | RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80); | 2901 | RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80); |
2895 | break; | 2902 | break; |
2896 | } | 2903 | } |
@@ -2900,12 +2907,17 @@ static void r8168_pll_power_up(struct rtl8169_private *tp) | |||
2900 | { | 2907 | { |
2901 | void __iomem *ioaddr = tp->mmio_addr; | 2908 | void __iomem *ioaddr = tp->mmio_addr; |
2902 | 2909 | ||
2903 | if (tp->mac_version == RTL_GIGA_MAC_VER_27) | 2910 | if (((tp->mac_version == RTL_GIGA_MAC_VER_27) || |
2911 | (tp->mac_version == RTL_GIGA_MAC_VER_28)) && | ||
2912 | (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) { | ||
2904 | return; | 2913 | return; |
2914 | } | ||
2905 | 2915 | ||
2906 | switch (tp->mac_version) { | 2916 | switch (tp->mac_version) { |
2907 | case RTL_GIGA_MAC_VER_25: | 2917 | case RTL_GIGA_MAC_VER_25: |
2908 | case RTL_GIGA_MAC_VER_26: | 2918 | case RTL_GIGA_MAC_VER_26: |
2919 | case RTL_GIGA_MAC_VER_27: | ||
2920 | case RTL_GIGA_MAC_VER_28: | ||
2909 | RTL_W8(PMCH, RTL_R8(PMCH) | 0x80); | 2921 | RTL_W8(PMCH, RTL_R8(PMCH) | 0x80); |
2910 | break; | 2922 | break; |
2911 | } | 2923 | } |
@@ -3009,6 +3021,11 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3009 | mii->reg_num_mask = 0x1f; | 3021 | mii->reg_num_mask = 0x1f; |
3010 | mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); | 3022 | mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); |
3011 | 3023 | ||
3024 | /* disable ASPM completely as that cause random device stop working | ||
3025 | * problems as well as full system hangs for some PCIe devices users */ | ||
3026 | pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | | ||
3027 | PCIE_LINK_STATE_CLKPM); | ||
3028 | |||
3012 | /* enable device (incl. PCI PM wakeup and hotplug setup) */ | 3029 | /* enable device (incl. PCI PM wakeup and hotplug setup) */ |
3013 | rc = pci_enable_device(pdev); | 3030 | rc = pci_enable_device(pdev); |
3014 | if (rc < 0) { | 3031 | if (rc < 0) { |
@@ -3042,7 +3059,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3042 | goto err_out_mwi_2; | 3059 | goto err_out_mwi_2; |
3043 | } | 3060 | } |
3044 | 3061 | ||
3045 | tp->cp_cmd = PCIMulRW | RxChkSum; | 3062 | tp->cp_cmd = RxChkSum; |
3046 | 3063 | ||
3047 | if ((sizeof(dma_addr_t) > 4) && | 3064 | if ((sizeof(dma_addr_t) > 4) && |
3048 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { | 3065 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { |
@@ -3190,6 +3207,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3190 | if (pci_dev_run_wake(pdev)) | 3207 | if (pci_dev_run_wake(pdev)) |
3191 | pm_runtime_put_noidle(&pdev->dev); | 3208 | pm_runtime_put_noidle(&pdev->dev); |
3192 | 3209 | ||
3210 | netif_carrier_off(dev); | ||
3211 | |||
3193 | out: | 3212 | out: |
3194 | return rc; | 3213 | return rc; |
3195 | 3214 | ||
@@ -3316,7 +3335,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp) | |||
3316 | /* Disable interrupts */ | 3335 | /* Disable interrupts */ |
3317 | rtl8169_irq_mask_and_ack(ioaddr); | 3336 | rtl8169_irq_mask_and_ack(ioaddr); |
3318 | 3337 | ||
3319 | if (tp->mac_version == RTL_GIGA_MAC_VER_28) { | 3338 | if (tp->mac_version == RTL_GIGA_MAC_VER_27 || |
3339 | tp->mac_version == RTL_GIGA_MAC_VER_28) { | ||
3320 | while (RTL_R8(TxPoll) & NPQ) | 3340 | while (RTL_R8(TxPoll) & NPQ) |
3321 | udelay(20); | 3341 | udelay(20); |
3322 | 3342 | ||
@@ -3845,8 +3865,7 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
3845 | Cxpl_dbg_sel | \ | 3865 | Cxpl_dbg_sel | \ |
3846 | ASF | \ | 3866 | ASF | \ |
3847 | PktCntrDisable | \ | 3867 | PktCntrDisable | \ |
3848 | PCIDAC | \ | 3868 | Mac_dbgo_sel) |
3849 | PCIMulRW) | ||
3850 | 3869 | ||
3851 | static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) | 3870 | static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) |
3852 | { | 3871 | { |
@@ -3876,8 +3895,6 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) | |||
3876 | if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) | 3895 | if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) |
3877 | RTL_W8(Config1, cfg1 & ~LEDS0); | 3896 | RTL_W8(Config1, cfg1 & ~LEDS0); |
3878 | 3897 | ||
3879 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
3880 | |||
3881 | rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); | 3898 | rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); |
3882 | } | 3899 | } |
3883 | 3900 | ||
@@ -3889,8 +3906,6 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) | |||
3889 | 3906 | ||
3890 | RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); | 3907 | RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); |
3891 | RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); | 3908 | RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); |
3892 | |||
3893 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
3894 | } | 3909 | } |
3895 | 3910 | ||
3896 | static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) | 3911 | static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) |
@@ -3916,6 +3931,8 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3916 | } | 3931 | } |
3917 | } | 3932 | } |
3918 | 3933 | ||
3934 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
3935 | |||
3919 | switch (tp->mac_version) { | 3936 | switch (tp->mac_version) { |
3920 | case RTL_GIGA_MAC_VER_07: | 3937 | case RTL_GIGA_MAC_VER_07: |
3921 | rtl_hw_start_8102e_1(ioaddr, pdev); | 3938 | rtl_hw_start_8102e_1(ioaddr, pdev); |
@@ -3930,14 +3947,13 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3930 | break; | 3947 | break; |
3931 | } | 3948 | } |
3932 | 3949 | ||
3933 | RTL_W8(Cfg9346, Cfg9346_Unlock); | 3950 | RTL_W8(Cfg9346, Cfg9346_Lock); |
3934 | 3951 | ||
3935 | RTL_W8(MaxTxPacketSize, TxPacketMax); | 3952 | RTL_W8(MaxTxPacketSize, TxPacketMax); |
3936 | 3953 | ||
3937 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); | 3954 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); |
3938 | 3955 | ||
3939 | tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; | 3956 | tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; |
3940 | |||
3941 | RTL_W16(CPlusCmd, tp->cp_cmd); | 3957 | RTL_W16(CPlusCmd, tp->cp_cmd); |
3942 | 3958 | ||
3943 | RTL_W16(IntrMitigate, 0x0000); | 3959 | RTL_W16(IntrMitigate, 0x0000); |
@@ -3947,14 +3963,10 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3947 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | 3963 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
3948 | rtl_set_rx_tx_config_registers(tp); | 3964 | rtl_set_rx_tx_config_registers(tp); |
3949 | 3965 | ||
3950 | RTL_W8(Cfg9346, Cfg9346_Lock); | ||
3951 | |||
3952 | RTL_R8(IntrMask); | 3966 | RTL_R8(IntrMask); |
3953 | 3967 | ||
3954 | rtl_set_rx_mode(dev); | 3968 | rtl_set_rx_mode(dev); |
3955 | 3969 | ||
3956 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | ||
3957 | |||
3958 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); | 3970 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); |
3959 | 3971 | ||
3960 | RTL_W16(IntrMask, tp->intr_event); | 3972 | RTL_W16(IntrMask, tp->intr_event); |
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c index 0e8bb19ed60d..ca886d98bdc7 100644 --- a/drivers/net/sfc/ethtool.c +++ b/drivers/net/sfc/ethtool.c | |||
@@ -569,9 +569,14 @@ static void efx_ethtool_self_test(struct net_device *net_dev, | |||
569 | struct ethtool_test *test, u64 *data) | 569 | struct ethtool_test *test, u64 *data) |
570 | { | 570 | { |
571 | struct efx_nic *efx = netdev_priv(net_dev); | 571 | struct efx_nic *efx = netdev_priv(net_dev); |
572 | struct efx_self_tests efx_tests; | 572 | struct efx_self_tests *efx_tests; |
573 | int already_up; | 573 | int already_up; |
574 | int rc; | 574 | int rc = -ENOMEM; |
575 | |||
576 | efx_tests = kzalloc(sizeof(*efx_tests), GFP_KERNEL); | ||
577 | if (!efx_tests) | ||
578 | goto fail; | ||
579 | |||
575 | 580 | ||
576 | ASSERT_RTNL(); | 581 | ASSERT_RTNL(); |
577 | if (efx->state != STATE_RUNNING) { | 582 | if (efx->state != STATE_RUNNING) { |
@@ -589,13 +594,11 @@ static void efx_ethtool_self_test(struct net_device *net_dev, | |||
589 | if (rc) { | 594 | if (rc) { |
590 | netif_err(efx, drv, efx->net_dev, | 595 | netif_err(efx, drv, efx->net_dev, |
591 | "failed opening device.\n"); | 596 | "failed opening device.\n"); |
592 | goto fail2; | 597 | goto fail1; |
593 | } | 598 | } |
594 | } | 599 | } |
595 | 600 | ||
596 | memset(&efx_tests, 0, sizeof(efx_tests)); | 601 | rc = efx_selftest(efx, efx_tests, test->flags); |
597 | |||
598 | rc = efx_selftest(efx, &efx_tests, test->flags); | ||
599 | 602 | ||
600 | if (!already_up) | 603 | if (!already_up) |
601 | dev_close(efx->net_dev); | 604 | dev_close(efx->net_dev); |
@@ -604,10 +607,11 @@ static void efx_ethtool_self_test(struct net_device *net_dev, | |||
604 | rc == 0 ? "passed" : "failed", | 607 | rc == 0 ? "passed" : "failed", |
605 | (test->flags & ETH_TEST_FL_OFFLINE) ? "off" : "on"); | 608 | (test->flags & ETH_TEST_FL_OFFLINE) ? "off" : "on"); |
606 | 609 | ||
607 | fail2: | 610 | fail1: |
608 | fail1: | ||
609 | /* Fill ethtool results structures */ | 611 | /* Fill ethtool results structures */ |
610 | efx_ethtool_fill_self_tests(efx, &efx_tests, NULL, data); | 612 | efx_ethtool_fill_self_tests(efx, efx_tests, NULL, data); |
613 | kfree(efx_tests); | ||
614 | fail: | ||
611 | if (rc) | 615 | if (rc) |
612 | test->flags |= ETH_TEST_FL_FAILED; | 616 | test->flags |= ETH_TEST_FL_FAILED; |
613 | } | 617 | } |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 42daf98ba736..35b28f42d208 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -3856,9 +3856,6 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3856 | memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port*8, ETH_ALEN); | 3856 | memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port*8, ETH_ALEN); |
3857 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); | 3857 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
3858 | 3858 | ||
3859 | /* device is off until link detection */ | ||
3860 | netif_carrier_off(dev); | ||
3861 | |||
3862 | return dev; | 3859 | return dev; |
3863 | } | 3860 | } |
3864 | 3861 | ||
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c index 34a0af3837f9..0e5f03135b50 100644 --- a/drivers/net/stmmac/stmmac_main.c +++ b/drivers/net/stmmac/stmmac_main.c | |||
@@ -1560,8 +1560,10 @@ static int stmmac_mac_device_setup(struct net_device *dev) | |||
1560 | 1560 | ||
1561 | priv->hw = device; | 1561 | priv->hw = device; |
1562 | 1562 | ||
1563 | if (device_can_wakeup(priv->device)) | 1563 | if (device_can_wakeup(priv->device)) { |
1564 | priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */ | 1564 | priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */ |
1565 | enable_irq_wake(dev->irq); | ||
1566 | } | ||
1565 | 1567 | ||
1566 | return 0; | 1568 | return 0; |
1567 | } | 1569 | } |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 93b32d366611..06c0e5033656 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -11158,7 +11158,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
11158 | if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) | 11158 | if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) |
11159 | break; /* We have no PHY */ | 11159 | break; /* We have no PHY */ |
11160 | 11160 | ||
11161 | if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) | 11161 | if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) || |
11162 | ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) && | ||
11163 | !netif_running(dev))) | ||
11162 | return -EAGAIN; | 11164 | return -EAGAIN; |
11163 | 11165 | ||
11164 | spin_lock_bh(&tp->lock); | 11166 | spin_lock_bh(&tp->lock); |
@@ -11174,7 +11176,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
11174 | if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) | 11176 | if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) |
11175 | break; /* We have no PHY */ | 11177 | break; /* We have no PHY */ |
11176 | 11178 | ||
11177 | if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) | 11179 | if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) || |
11180 | ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) && | ||
11181 | !netif_running(dev))) | ||
11178 | return -EAGAIN; | 11182 | return -EAGAIN; |
11179 | 11183 | ||
11180 | spin_lock_bh(&tp->lock); | 11184 | spin_lock_bh(&tp->lock); |
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c index 02b622e3b9fb..5002f5be47be 100644 --- a/drivers/net/usb/dm9601.c +++ b/drivers/net/usb/dm9601.c | |||
@@ -651,6 +651,10 @@ static const struct usb_device_id products[] = { | |||
651 | .driver_info = (unsigned long)&dm9601_info, | 651 | .driver_info = (unsigned long)&dm9601_info, |
652 | }, | 652 | }, |
653 | { | 653 | { |
654 | USB_DEVICE(0x0fe6, 0x9700), /* DM9601 USB to Fast Ethernet Adapter */ | ||
655 | .driver_info = (unsigned long)&dm9601_info, | ||
656 | }, | ||
657 | { | ||
654 | USB_DEVICE(0x0a46, 0x9000), /* DM9000E */ | 658 | USB_DEVICE(0x0a46, 0x9000), /* DM9000E */ |
655 | .driver_info = (unsigned long)&dm9601_info, | 659 | .driver_info = (unsigned long)&dm9601_info, |
656 | }, | 660 | }, |
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c index bed8fcedff49..6d83812603b6 100644 --- a/drivers/net/usb/hso.c +++ b/drivers/net/usb/hso.c | |||
@@ -2628,15 +2628,15 @@ exit: | |||
2628 | 2628 | ||
2629 | static void hso_free_tiomget(struct hso_serial *serial) | 2629 | static void hso_free_tiomget(struct hso_serial *serial) |
2630 | { | 2630 | { |
2631 | struct hso_tiocmget *tiocmget = serial->tiocmget; | 2631 | struct hso_tiocmget *tiocmget; |
2632 | if (!serial) | ||
2633 | return; | ||
2634 | tiocmget = serial->tiocmget; | ||
2632 | if (tiocmget) { | 2635 | if (tiocmget) { |
2633 | if (tiocmget->urb) { | 2636 | usb_free_urb(tiocmget->urb); |
2634 | usb_free_urb(tiocmget->urb); | 2637 | tiocmget->urb = NULL; |
2635 | tiocmget->urb = NULL; | ||
2636 | } | ||
2637 | serial->tiocmget = NULL; | 2638 | serial->tiocmget = NULL; |
2638 | kfree(tiocmget); | 2639 | kfree(tiocmget); |
2639 | |||
2640 | } | 2640 | } |
2641 | } | 2641 | } |
2642 | 2642 | ||
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index ed9a41643ff4..95c41d56631c 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c | |||
@@ -931,8 +931,10 @@ fail_halt: | |||
931 | if (urb != NULL) { | 931 | if (urb != NULL) { |
932 | clear_bit (EVENT_RX_MEMORY, &dev->flags); | 932 | clear_bit (EVENT_RX_MEMORY, &dev->flags); |
933 | status = usb_autopm_get_interface(dev->intf); | 933 | status = usb_autopm_get_interface(dev->intf); |
934 | if (status < 0) | 934 | if (status < 0) { |
935 | usb_free_urb(urb); | ||
935 | goto fail_lowmem; | 936 | goto fail_lowmem; |
937 | } | ||
936 | if (rx_submit (dev, urb, GFP_KERNEL) == -ENOLINK) | 938 | if (rx_submit (dev, urb, GFP_KERNEL) == -ENOLINK) |
937 | resched = 0; | 939 | resched = 0; |
938 | usb_autopm_put_interface(dev->intf); | 940 | usb_autopm_put_interface(dev->intf); |
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index 78c26fdccad1..62ce2f4e8605 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c | |||
@@ -282,6 +282,34 @@ int ath5k_hw_phy_disable(struct ath5k_hw *ah) | |||
282 | return 0; | 282 | return 0; |
283 | } | 283 | } |
284 | 284 | ||
285 | /* | ||
286 | * Wait for synth to settle | ||
287 | */ | ||
288 | static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah, | ||
289 | struct ieee80211_channel *channel) | ||
290 | { | ||
291 | /* | ||
292 | * On 5211+ read activation -> rx delay | ||
293 | * and use it (100ns steps). | ||
294 | */ | ||
295 | if (ah->ah_version != AR5K_AR5210) { | ||
296 | u32 delay; | ||
297 | delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & | ||
298 | AR5K_PHY_RX_DELAY_M; | ||
299 | delay = (channel->hw_value & CHANNEL_CCK) ? | ||
300 | ((delay << 2) / 22) : (delay / 10); | ||
301 | if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) | ||
302 | delay = delay << 1; | ||
303 | if (ah->ah_bwmode == AR5K_BWMODE_5MHZ) | ||
304 | delay = delay << 2; | ||
305 | /* XXX: /2 on turbo ? Let's be safe | ||
306 | * for now */ | ||
307 | udelay(100 + delay); | ||
308 | } else { | ||
309 | mdelay(1); | ||
310 | } | ||
311 | } | ||
312 | |||
285 | 313 | ||
286 | /**********************\ | 314 | /**********************\ |
287 | * RF Gain optimization * | 315 | * RF Gain optimization * |
@@ -1253,6 +1281,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah, | |||
1253 | case AR5K_RF5111: | 1281 | case AR5K_RF5111: |
1254 | ret = ath5k_hw_rf5111_channel(ah, channel); | 1282 | ret = ath5k_hw_rf5111_channel(ah, channel); |
1255 | break; | 1283 | break; |
1284 | case AR5K_RF2317: | ||
1256 | case AR5K_RF2425: | 1285 | case AR5K_RF2425: |
1257 | ret = ath5k_hw_rf2425_channel(ah, channel); | 1286 | ret = ath5k_hw_rf2425_channel(ah, channel); |
1258 | break; | 1287 | break; |
@@ -3237,6 +3266,13 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3237 | /* Failed */ | 3266 | /* Failed */ |
3238 | if (i >= 100) | 3267 | if (i >= 100) |
3239 | return -EIO; | 3268 | return -EIO; |
3269 | |||
3270 | /* Set channel and wait for synth */ | ||
3271 | ret = ath5k_hw_channel(ah, channel); | ||
3272 | if (ret) | ||
3273 | return ret; | ||
3274 | |||
3275 | ath5k_hw_wait_for_synth(ah, channel); | ||
3240 | } | 3276 | } |
3241 | 3277 | ||
3242 | /* | 3278 | /* |
@@ -3251,13 +3287,53 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3251 | if (ret) | 3287 | if (ret) |
3252 | return ret; | 3288 | return ret; |
3253 | 3289 | ||
3290 | /* Write OFDM timings on 5212*/ | ||
3291 | if (ah->ah_version == AR5K_AR5212 && | ||
3292 | channel->hw_value & CHANNEL_OFDM) { | ||
3293 | |||
3294 | ret = ath5k_hw_write_ofdm_timings(ah, channel); | ||
3295 | if (ret) | ||
3296 | return ret; | ||
3297 | |||
3298 | /* Spur info is available only from EEPROM versions | ||
3299 | * greater than 5.3, but the EEPROM routines will use | ||
3300 | * static values for older versions */ | ||
3301 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424) | ||
3302 | ath5k_hw_set_spur_mitigation_filter(ah, | ||
3303 | channel); | ||
3304 | } | ||
3305 | |||
3306 | /* If we used fast channel switching | ||
3307 | * we are done, release RF bus and | ||
3308 | * fire up NF calibration. | ||
3309 | * | ||
3310 | * Note: Only NF calibration due to | ||
3311 | * channel change, not AGC calibration | ||
3312 | * since AGC is still running ! | ||
3313 | */ | ||
3314 | if (fast) { | ||
3315 | /* | ||
3316 | * Release RF Bus grant | ||
3317 | */ | ||
3318 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ, | ||
3319 | AR5K_PHY_RFBUS_REQ_REQUEST); | ||
3320 | |||
3321 | /* | ||
3322 | * Start NF calibration | ||
3323 | */ | ||
3324 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, | ||
3325 | AR5K_PHY_AGCCTL_NF); | ||
3326 | |||
3327 | return ret; | ||
3328 | } | ||
3329 | |||
3254 | /* | 3330 | /* |
3255 | * For 5210 we do all initialization using | 3331 | * For 5210 we do all initialization using |
3256 | * initvals, so we don't have to modify | 3332 | * initvals, so we don't have to modify |
3257 | * any settings (5210 also only supports | 3333 | * any settings (5210 also only supports |
3258 | * a/aturbo modes) | 3334 | * a/aturbo modes) |
3259 | */ | 3335 | */ |
3260 | if ((ah->ah_version != AR5K_AR5210) && !fast) { | 3336 | if (ah->ah_version != AR5K_AR5210) { |
3261 | 3337 | ||
3262 | /* | 3338 | /* |
3263 | * Write initial RF gain settings | 3339 | * Write initial RF gain settings |
@@ -3276,22 +3352,6 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3276 | if (ret) | 3352 | if (ret) |
3277 | return ret; | 3353 | return ret; |
3278 | 3354 | ||
3279 | /* Write OFDM timings on 5212*/ | ||
3280 | if (ah->ah_version == AR5K_AR5212 && | ||
3281 | channel->hw_value & CHANNEL_OFDM) { | ||
3282 | |||
3283 | ret = ath5k_hw_write_ofdm_timings(ah, channel); | ||
3284 | if (ret) | ||
3285 | return ret; | ||
3286 | |||
3287 | /* Spur info is available only from EEPROM versions | ||
3288 | * greater than 5.3, but the EEPROM routines will use | ||
3289 | * static values for older versions */ | ||
3290 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424) | ||
3291 | ath5k_hw_set_spur_mitigation_filter(ah, | ||
3292 | channel); | ||
3293 | } | ||
3294 | |||
3295 | /*Enable/disable 802.11b mode on 5111 | 3355 | /*Enable/disable 802.11b mode on 5111 |
3296 | (enable 2111 frequency converter + CCK)*/ | 3356 | (enable 2111 frequency converter + CCK)*/ |
3297 | if (ah->ah_radio == AR5K_RF5111) { | 3357 | if (ah->ah_radio == AR5K_RF5111) { |
@@ -3322,47 +3382,20 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3322 | */ | 3382 | */ |
3323 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); | 3383 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); |
3324 | 3384 | ||
3385 | ath5k_hw_wait_for_synth(ah, channel); | ||
3386 | |||
3325 | /* | 3387 | /* |
3326 | * On 5211+ read activation -> rx delay | 3388 | * Perform ADC test to see if baseband is ready |
3327 | * and use it. | 3389 | * Set tx hold and check adc test register |
3328 | */ | 3390 | */ |
3329 | if (ah->ah_version != AR5K_AR5210) { | 3391 | phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1); |
3330 | u32 delay; | 3392 | ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1); |
3331 | delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & | 3393 | for (i = 0; i <= 20; i++) { |
3332 | AR5K_PHY_RX_DELAY_M; | 3394 | if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10)) |
3333 | delay = (channel->hw_value & CHANNEL_CCK) ? | 3395 | break; |
3334 | ((delay << 2) / 22) : (delay / 10); | 3396 | udelay(200); |
3335 | if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) | ||
3336 | delay = delay << 1; | ||
3337 | if (ah->ah_bwmode == AR5K_BWMODE_5MHZ) | ||
3338 | delay = delay << 2; | ||
3339 | /* XXX: /2 on turbo ? Let's be safe | ||
3340 | * for now */ | ||
3341 | udelay(100 + delay); | ||
3342 | } else { | ||
3343 | mdelay(1); | ||
3344 | } | ||
3345 | |||
3346 | if (fast) | ||
3347 | /* | ||
3348 | * Release RF Bus grant | ||
3349 | */ | ||
3350 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ, | ||
3351 | AR5K_PHY_RFBUS_REQ_REQUEST); | ||
3352 | else { | ||
3353 | /* | ||
3354 | * Perform ADC test to see if baseband is ready | ||
3355 | * Set tx hold and check adc test register | ||
3356 | */ | ||
3357 | phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1); | ||
3358 | ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1); | ||
3359 | for (i = 0; i <= 20; i++) { | ||
3360 | if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10)) | ||
3361 | break; | ||
3362 | udelay(200); | ||
3363 | } | ||
3364 | ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1); | ||
3365 | } | 3397 | } |
3398 | ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1); | ||
3366 | 3399 | ||
3367 | /* | 3400 | /* |
3368 | * Start automatic gain control calibration | 3401 | * Start automatic gain control calibration |
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index 23838e37d45f..1a7fa6ea4cf5 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/device.h> | 21 | #include <linux/device.h> |
22 | #include <linux/leds.h> | 22 | #include <linux/leds.h> |
23 | #include <linux/completion.h> | 23 | #include <linux/completion.h> |
24 | #include <linux/pm_qos_params.h> | ||
25 | 24 | ||
26 | #include "debug.h" | 25 | #include "debug.h" |
27 | #include "common.h" | 26 | #include "common.h" |
@@ -57,8 +56,6 @@ struct ath_node; | |||
57 | 56 | ||
58 | #define A_MAX(a, b) ((a) > (b) ? (a) : (b)) | 57 | #define A_MAX(a, b) ((a) > (b) ? (a) : (b)) |
59 | 58 | ||
60 | #define ATH9K_PM_QOS_DEFAULT_VALUE 55 | ||
61 | |||
62 | #define TSF_TO_TU(_h,_l) \ | 59 | #define TSF_TO_TU(_h,_l) \ |
63 | ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) | 60 | ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) |
64 | 61 | ||
@@ -633,8 +630,6 @@ struct ath_softc { | |||
633 | struct ath_descdma txsdma; | 630 | struct ath_descdma txsdma; |
634 | 631 | ||
635 | struct ath_ant_comb ant_comb; | 632 | struct ath_ant_comb ant_comb; |
636 | |||
637 | struct pm_qos_request_list pm_qos_req; | ||
638 | }; | 633 | }; |
639 | 634 | ||
640 | struct ath_wiphy { | 635 | struct ath_wiphy { |
@@ -666,7 +661,6 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz) | |||
666 | extern struct ieee80211_ops ath9k_ops; | 661 | extern struct ieee80211_ops ath9k_ops; |
667 | extern int ath9k_modparam_nohwcrypt; | 662 | extern int ath9k_modparam_nohwcrypt; |
668 | extern int led_blink; | 663 | extern int led_blink; |
669 | extern int ath9k_pm_qos_value; | ||
670 | extern bool is_ath9k_unloaded; | 664 | extern bool is_ath9k_unloaded; |
671 | 665 | ||
672 | irqreturn_t ath_isr(int irq, void *dev); | 666 | irqreturn_t ath_isr(int irq, void *dev); |
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c index 5ab3084eb9cb..07b1633b7f3f 100644 --- a/drivers/net/wireless/ath/ath9k/hif_usb.c +++ b/drivers/net/wireless/ath/ath9k/hif_usb.c | |||
@@ -219,8 +219,9 @@ static int __hif_usb_tx(struct hif_device_usb *hif_dev) | |||
219 | struct tx_buf *tx_buf = NULL; | 219 | struct tx_buf *tx_buf = NULL; |
220 | struct sk_buff *nskb = NULL; | 220 | struct sk_buff *nskb = NULL; |
221 | int ret = 0, i; | 221 | int ret = 0, i; |
222 | u16 *hdr, tx_skb_cnt = 0; | 222 | u16 tx_skb_cnt = 0; |
223 | u8 *buf; | 223 | u8 *buf; |
224 | __le16 *hdr; | ||
224 | 225 | ||
225 | if (hif_dev->tx.tx_skb_cnt == 0) | 226 | if (hif_dev->tx.tx_skb_cnt == 0) |
226 | return 0; | 227 | return 0; |
@@ -245,9 +246,9 @@ static int __hif_usb_tx(struct hif_device_usb *hif_dev) | |||
245 | 246 | ||
246 | buf = tx_buf->buf; | 247 | buf = tx_buf->buf; |
247 | buf += tx_buf->offset; | 248 | buf += tx_buf->offset; |
248 | hdr = (u16 *)buf; | 249 | hdr = (__le16 *)buf; |
249 | *hdr++ = nskb->len; | 250 | *hdr++ = cpu_to_le16(nskb->len); |
250 | *hdr++ = ATH_USB_TX_STREAM_MODE_TAG; | 251 | *hdr++ = cpu_to_le16(ATH_USB_TX_STREAM_MODE_TAG); |
251 | buf += 4; | 252 | buf += 4; |
252 | memcpy(buf, nskb->data, nskb->len); | 253 | memcpy(buf, nskb->data, nskb->len); |
253 | tx_buf->len = nskb->len + 4; | 254 | tx_buf->len = nskb->len + 4; |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index 087a6a95edd5..a033d01bf8a0 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -41,10 +41,6 @@ static int ath9k_btcoex_enable; | |||
41 | module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444); | 41 | module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444); |
42 | MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); | 42 | MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); |
43 | 43 | ||
44 | int ath9k_pm_qos_value = ATH9K_PM_QOS_DEFAULT_VALUE; | ||
45 | module_param_named(pmqos, ath9k_pm_qos_value, int, S_IRUSR | S_IRGRP | S_IROTH); | ||
46 | MODULE_PARM_DESC(pmqos, "User specified PM-QOS value"); | ||
47 | |||
48 | bool is_ath9k_unloaded; | 44 | bool is_ath9k_unloaded; |
49 | /* We use the hw_value as an index into our private channel structure */ | 45 | /* We use the hw_value as an index into our private channel structure */ |
50 | 46 | ||
@@ -762,9 +758,6 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid, | |||
762 | ath_init_leds(sc); | 758 | ath_init_leds(sc); |
763 | ath_start_rfkill_poll(sc); | 759 | ath_start_rfkill_poll(sc); |
764 | 760 | ||
765 | pm_qos_add_request(&sc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, | ||
766 | PM_QOS_DEFAULT_VALUE); | ||
767 | |||
768 | return 0; | 761 | return 0; |
769 | 762 | ||
770 | error_world: | 763 | error_world: |
@@ -831,7 +824,6 @@ void ath9k_deinit_device(struct ath_softc *sc) | |||
831 | } | 824 | } |
832 | 825 | ||
833 | ieee80211_unregister_hw(hw); | 826 | ieee80211_unregister_hw(hw); |
834 | pm_qos_remove_request(&sc->pm_qos_req); | ||
835 | ath_rx_cleanup(sc); | 827 | ath_rx_cleanup(sc); |
836 | ath_tx_cleanup(sc); | 828 | ath_tx_cleanup(sc); |
837 | ath9k_deinit_softc(sc); | 829 | ath9k_deinit_softc(sc); |
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index 180170d3ce25..2915b11edefb 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c | |||
@@ -885,7 +885,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) | |||
885 | struct ath_common *common = ath9k_hw_common(ah); | 885 | struct ath_common *common = ath9k_hw_common(ah); |
886 | 886 | ||
887 | if (!(ints & ATH9K_INT_GLOBAL)) | 887 | if (!(ints & ATH9K_INT_GLOBAL)) |
888 | ath9k_hw_enable_interrupts(ah); | 888 | ath9k_hw_disable_interrupts(ah); |
889 | 889 | ||
890 | ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints); | 890 | ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints); |
891 | 891 | ||
@@ -963,7 +963,8 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) | |||
963 | REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER); | 963 | REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER); |
964 | } | 964 | } |
965 | 965 | ||
966 | ath9k_hw_enable_interrupts(ah); | 966 | if (ints & ATH9K_INT_GLOBAL) |
967 | ath9k_hw_enable_interrupts(ah); | ||
967 | 968 | ||
968 | return; | 969 | return; |
969 | } | 970 | } |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index da5c64597c1f..a09d15f7aa6e 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -1173,12 +1173,6 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1173 | ath9k_btcoex_timer_resume(sc); | 1173 | ath9k_btcoex_timer_resume(sc); |
1174 | } | 1174 | } |
1175 | 1175 | ||
1176 | /* User has the option to provide pm-qos value as a module | ||
1177 | * parameter rather than using the default value of | ||
1178 | * 'ATH9K_PM_QOS_DEFAULT_VALUE'. | ||
1179 | */ | ||
1180 | pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value); | ||
1181 | |||
1182 | if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en) | 1176 | if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en) |
1183 | common->bus_ops->extn_synch_en(common); | 1177 | common->bus_ops->extn_synch_en(common); |
1184 | 1178 | ||
@@ -1345,8 +1339,6 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
1345 | 1339 | ||
1346 | sc->sc_flags |= SC_OP_INVALID; | 1340 | sc->sc_flags |= SC_OP_INVALID; |
1347 | 1341 | ||
1348 | pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE); | ||
1349 | |||
1350 | mutex_unlock(&sc->mutex); | 1342 | mutex_unlock(&sc->mutex); |
1351 | 1343 | ||
1352 | ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n"); | 1344 | ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n"); |
diff --git a/drivers/net/wireless/ath/carl9170/usb.c b/drivers/net/wireless/ath/carl9170/usb.c index 537732e5964f..f82c400be288 100644 --- a/drivers/net/wireless/ath/carl9170/usb.c +++ b/drivers/net/wireless/ath/carl9170/usb.c | |||
@@ -118,6 +118,8 @@ static struct usb_device_id carl9170_usb_ids[] = { | |||
118 | { USB_DEVICE(0x057c, 0x8402) }, | 118 | { USB_DEVICE(0x057c, 0x8402) }, |
119 | /* Qwest/Actiontec 802AIN Wireless N USB Network Adapter */ | 119 | /* Qwest/Actiontec 802AIN Wireless N USB Network Adapter */ |
120 | { USB_DEVICE(0x1668, 0x1200) }, | 120 | { USB_DEVICE(0x1668, 0x1200) }, |
121 | /* Airlive X.USB a/b/g/n */ | ||
122 | { USB_DEVICE(0x1b75, 0x9170) }, | ||
121 | 123 | ||
122 | /* terminate */ | 124 | /* terminate */ |
123 | {} | 125 | {} |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index a9b852be4509..39b6f16c87fa 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -402,72 +402,6 @@ static void iwl3945_accumulative_statistics(struct iwl_priv *priv, | |||
402 | } | 402 | } |
403 | #endif | 403 | #endif |
404 | 404 | ||
405 | /** | ||
406 | * iwl3945_good_plcp_health - checks for plcp error. | ||
407 | * | ||
408 | * When the plcp error is exceeding the thresholds, reset the radio | ||
409 | * to improve the throughput. | ||
410 | */ | ||
411 | static bool iwl3945_good_plcp_health(struct iwl_priv *priv, | ||
412 | struct iwl_rx_packet *pkt) | ||
413 | { | ||
414 | bool rc = true; | ||
415 | struct iwl3945_notif_statistics current_stat; | ||
416 | int combined_plcp_delta; | ||
417 | unsigned int plcp_msec; | ||
418 | unsigned long plcp_received_jiffies; | ||
419 | |||
420 | if (priv->cfg->base_params->plcp_delta_threshold == | ||
421 | IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE) { | ||
422 | IWL_DEBUG_RADIO(priv, "plcp_err check disabled\n"); | ||
423 | return rc; | ||
424 | } | ||
425 | memcpy(¤t_stat, pkt->u.raw, sizeof(struct | ||
426 | iwl3945_notif_statistics)); | ||
427 | /* | ||
428 | * check for plcp_err and trigger radio reset if it exceeds | ||
429 | * the plcp error threshold plcp_delta. | ||
430 | */ | ||
431 | plcp_received_jiffies = jiffies; | ||
432 | plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies - | ||
433 | (long) priv->plcp_jiffies); | ||
434 | priv->plcp_jiffies = plcp_received_jiffies; | ||
435 | /* | ||
436 | * check to make sure plcp_msec is not 0 to prevent division | ||
437 | * by zero. | ||
438 | */ | ||
439 | if (plcp_msec) { | ||
440 | combined_plcp_delta = | ||
441 | (le32_to_cpu(current_stat.rx.ofdm.plcp_err) - | ||
442 | le32_to_cpu(priv->_3945.statistics.rx.ofdm.plcp_err)); | ||
443 | |||
444 | if ((combined_plcp_delta > 0) && | ||
445 | ((combined_plcp_delta * 100) / plcp_msec) > | ||
446 | priv->cfg->base_params->plcp_delta_threshold) { | ||
447 | /* | ||
448 | * if plcp_err exceed the threshold, the following | ||
449 | * data is printed in csv format: | ||
450 | * Text: plcp_err exceeded %d, | ||
451 | * Received ofdm.plcp_err, | ||
452 | * Current ofdm.plcp_err, | ||
453 | * combined_plcp_delta, | ||
454 | * plcp_msec | ||
455 | */ | ||
456 | IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, " | ||
457 | "%u, %d, %u mSecs\n", | ||
458 | priv->cfg->base_params->plcp_delta_threshold, | ||
459 | le32_to_cpu(current_stat.rx.ofdm.plcp_err), | ||
460 | combined_plcp_delta, plcp_msec); | ||
461 | /* | ||
462 | * Reset the RF radio due to the high plcp | ||
463 | * error rate | ||
464 | */ | ||
465 | rc = false; | ||
466 | } | ||
467 | } | ||
468 | return rc; | ||
469 | } | ||
470 | |||
471 | void iwl3945_hw_rx_statistics(struct iwl_priv *priv, | 405 | void iwl3945_hw_rx_statistics(struct iwl_priv *priv, |
472 | struct iwl_rx_mem_buffer *rxb) | 406 | struct iwl_rx_mem_buffer *rxb) |
473 | { | 407 | { |
@@ -2734,7 +2668,6 @@ static struct iwl_lib_ops iwl3945_lib = { | |||
2734 | .isr_ops = { | 2668 | .isr_ops = { |
2735 | .isr = iwl_isr_legacy, | 2669 | .isr = iwl_isr_legacy, |
2736 | }, | 2670 | }, |
2737 | .check_plcp_health = iwl3945_good_plcp_health, | ||
2738 | 2671 | ||
2739 | .debugfs_ops = { | 2672 | .debugfs_ops = { |
2740 | .rx_stats_read = iwl3945_ucode_rx_stats_read, | 2673 | .rx_stats_read = iwl3945_ucode_rx_stats_read, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index 79ab0a6b1386..537fb8c84e3a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -51,7 +51,7 @@ | |||
51 | #include "iwl-agn-debugfs.h" | 51 | #include "iwl-agn-debugfs.h" |
52 | 52 | ||
53 | /* Highest firmware API version supported */ | 53 | /* Highest firmware API version supported */ |
54 | #define IWL5000_UCODE_API_MAX 2 | 54 | #define IWL5000_UCODE_API_MAX 5 |
55 | #define IWL5150_UCODE_API_MAX 2 | 55 | #define IWL5150_UCODE_API_MAX 2 |
56 | 56 | ||
57 | /* Lowest firmware API version supported */ | 57 | /* Lowest firmware API version supported */ |
diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c index 1eacba4daa5b..0494d7b102d4 100644 --- a/drivers/net/wireless/p54/p54pci.c +++ b/drivers/net/wireless/p54/p54pci.c | |||
@@ -199,6 +199,7 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index, | |||
199 | while (i != idx) { | 199 | while (i != idx) { |
200 | u16 len; | 200 | u16 len; |
201 | struct sk_buff *skb; | 201 | struct sk_buff *skb; |
202 | dma_addr_t dma_addr; | ||
202 | desc = &ring[i]; | 203 | desc = &ring[i]; |
203 | len = le16_to_cpu(desc->len); | 204 | len = le16_to_cpu(desc->len); |
204 | skb = rx_buf[i]; | 205 | skb = rx_buf[i]; |
@@ -216,17 +217,20 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index, | |||
216 | 217 | ||
217 | len = priv->common.rx_mtu; | 218 | len = priv->common.rx_mtu; |
218 | } | 219 | } |
220 | dma_addr = le32_to_cpu(desc->host_addr); | ||
221 | pci_dma_sync_single_for_cpu(priv->pdev, dma_addr, | ||
222 | priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); | ||
219 | skb_put(skb, len); | 223 | skb_put(skb, len); |
220 | 224 | ||
221 | if (p54_rx(dev, skb)) { | 225 | if (p54_rx(dev, skb)) { |
222 | pci_unmap_single(priv->pdev, | 226 | pci_unmap_single(priv->pdev, dma_addr, |
223 | le32_to_cpu(desc->host_addr), | 227 | priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); |
224 | priv->common.rx_mtu + 32, | ||
225 | PCI_DMA_FROMDEVICE); | ||
226 | rx_buf[i] = NULL; | 228 | rx_buf[i] = NULL; |
227 | desc->host_addr = 0; | 229 | desc->host_addr = cpu_to_le32(0); |
228 | } else { | 230 | } else { |
229 | skb_trim(skb, 0); | 231 | skb_trim(skb, 0); |
232 | pci_dma_sync_single_for_device(priv->pdev, dma_addr, | ||
233 | priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); | ||
230 | desc->len = cpu_to_le16(priv->common.rx_mtu + 32); | 234 | desc->len = cpu_to_le16(priv->common.rx_mtu + 32); |
231 | } | 235 | } |
232 | 236 | ||
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c index 21713a7638c4..9b344a921e74 100644 --- a/drivers/net/wireless/p54/p54usb.c +++ b/drivers/net/wireless/p54/p54usb.c | |||
@@ -98,6 +98,7 @@ static struct usb_device_id p54u_table[] __devinitdata = { | |||
98 | {USB_DEVICE(0x1413, 0x5400)}, /* Telsey 802.11g USB2.0 Adapter */ | 98 | {USB_DEVICE(0x1413, 0x5400)}, /* Telsey 802.11g USB2.0 Adapter */ |
99 | {USB_DEVICE(0x1435, 0x0427)}, /* Inventel UR054G */ | 99 | {USB_DEVICE(0x1435, 0x0427)}, /* Inventel UR054G */ |
100 | {USB_DEVICE(0x1668, 0x1050)}, /* Actiontec 802UIG-1 */ | 100 | {USB_DEVICE(0x1668, 0x1050)}, /* Actiontec 802UIG-1 */ |
101 | {USB_DEVICE(0x1740, 0x1000)}, /* Senao NUB-350 */ | ||
101 | {USB_DEVICE(0x2001, 0x3704)}, /* DLink DWL-G122 rev A2 */ | 102 | {USB_DEVICE(0x2001, 0x3704)}, /* DLink DWL-G122 rev A2 */ |
102 | {USB_DEVICE(0x2001, 0x3705)}, /* D-Link DWL-G120 rev C1 */ | 103 | {USB_DEVICE(0x2001, 0x3705)}, /* D-Link DWL-G120 rev C1 */ |
103 | {USB_DEVICE(0x413c, 0x5513)}, /* Dell WLA3310 USB Wireless Adapter */ | 104 | {USB_DEVICE(0x413c, 0x5513)}, /* Dell WLA3310 USB Wireless Adapter */ |
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c index 848cc2cce247..518542b4bf9e 100644 --- a/drivers/net/wireless/rndis_wlan.c +++ b/drivers/net/wireless/rndis_wlan.c | |||
@@ -2597,6 +2597,9 @@ static int rndis_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, | |||
2597 | __le32 mode; | 2597 | __le32 mode; |
2598 | int ret; | 2598 | int ret; |
2599 | 2599 | ||
2600 | if (priv->device_type != RNDIS_BCM4320B) | ||
2601 | return -ENOTSUPP; | ||
2602 | |||
2600 | netdev_dbg(usbdev->net, "%s(): %s, %d\n", __func__, | 2603 | netdev_dbg(usbdev->net, "%s(): %s, %d\n", __func__, |
2601 | enabled ? "enabled" : "disabled", | 2604 | enabled ? "enabled" : "disabled", |
2602 | timeout); | 2605 | timeout); |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index aa97971a38af..3b3f1e45ab3e 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -652,6 +652,12 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry, | |||
652 | */ | 652 | */ |
653 | rxdesc->flags |= RX_FLAG_IV_STRIPPED; | 653 | rxdesc->flags |= RX_FLAG_IV_STRIPPED; |
654 | 654 | ||
655 | /* | ||
656 | * The hardware has already checked the Michael Mic and has | ||
657 | * stripped it from the frame. Signal this to mac80211. | ||
658 | */ | ||
659 | rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; | ||
660 | |||
655 | if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) | 661 | if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) |
656 | rxdesc->flags |= RX_FLAG_DECRYPTED; | 662 | rxdesc->flags |= RX_FLAG_DECRYPTED; |
657 | else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) | 663 | else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) |
@@ -1065,6 +1071,8 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { | |||
1065 | { PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1071 | { PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1066 | #endif | 1072 | #endif |
1067 | #ifdef CONFIG_RT2800PCI_RT35XX | 1073 | #ifdef CONFIG_RT2800PCI_RT35XX |
1074 | { PCI_DEVICE(0x1432, 0x7711), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1075 | { PCI_DEVICE(0x1432, 0x7722), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1068 | { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1076 | { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1069 | { PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1077 | { PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1070 | { PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1078 | { PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index b97a4a54ff4c..197a36c05fda 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -486,6 +486,12 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry, | |||
486 | */ | 486 | */ |
487 | rxdesc->flags |= RX_FLAG_IV_STRIPPED; | 487 | rxdesc->flags |= RX_FLAG_IV_STRIPPED; |
488 | 488 | ||
489 | /* | ||
490 | * The hardware has already checked the Michael Mic and has | ||
491 | * stripped it from the frame. Signal this to mac80211. | ||
492 | */ | ||
493 | rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; | ||
494 | |||
489 | if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) | 495 | if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) |
490 | rxdesc->flags |= RX_FLAG_DECRYPTED; | 496 | rxdesc->flags |= RX_FLAG_DECRYPTED; |
491 | else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) | 497 | else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) |
diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig index ffedfd492754..ea1580085347 100644 --- a/drivers/nfc/Kconfig +++ b/drivers/nfc/Kconfig | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | menuconfig NFC_DEVICES | 5 | menuconfig NFC_DEVICES |
6 | bool "NFC devices" | 6 | bool "Near Field Communication (NFC) devices" |
7 | default n | 7 | default n |
8 | ---help--- | 8 | ---help--- |
9 | You'll have to say Y if your computer contains an NFC device that | 9 | You'll have to say Y if your computer contains an NFC device that |
diff --git a/drivers/nfc/pn544.c b/drivers/nfc/pn544.c index bae647264dd6..724f65d8f9e4 100644 --- a/drivers/nfc/pn544.c +++ b/drivers/nfc/pn544.c | |||
@@ -60,7 +60,7 @@ enum pn544_irq { | |||
60 | struct pn544_info { | 60 | struct pn544_info { |
61 | struct miscdevice miscdev; | 61 | struct miscdevice miscdev; |
62 | struct i2c_client *i2c_dev; | 62 | struct i2c_client *i2c_dev; |
63 | struct regulator_bulk_data regs[2]; | 63 | struct regulator_bulk_data regs[3]; |
64 | 64 | ||
65 | enum pn544_state state; | 65 | enum pn544_state state; |
66 | wait_queue_head_t read_wait; | 66 | wait_queue_head_t read_wait; |
@@ -74,6 +74,7 @@ struct pn544_info { | |||
74 | 74 | ||
75 | static const char reg_vdd_io[] = "Vdd_IO"; | 75 | static const char reg_vdd_io[] = "Vdd_IO"; |
76 | static const char reg_vbat[] = "VBat"; | 76 | static const char reg_vbat[] = "VBat"; |
77 | static const char reg_vsim[] = "VSim"; | ||
77 | 78 | ||
78 | /* sysfs interface */ | 79 | /* sysfs interface */ |
79 | static ssize_t pn544_test(struct device *dev, | 80 | static ssize_t pn544_test(struct device *dev, |
@@ -740,6 +741,7 @@ static int __devinit pn544_probe(struct i2c_client *client, | |||
740 | 741 | ||
741 | info->regs[0].supply = reg_vdd_io; | 742 | info->regs[0].supply = reg_vdd_io; |
742 | info->regs[1].supply = reg_vbat; | 743 | info->regs[1].supply = reg_vbat; |
744 | info->regs[2].supply = reg_vsim; | ||
743 | r = regulator_bulk_get(&client->dev, ARRAY_SIZE(info->regs), | 745 | r = regulator_bulk_get(&client->dev, ARRAY_SIZE(info->regs), |
744 | info->regs); | 746 | info->regs); |
745 | if (r < 0) | 747 | if (r < 0) |
diff --git a/drivers/of/pdt.c b/drivers/of/pdt.c index 28295d0a50f6..4d87b5dc9284 100644 --- a/drivers/of/pdt.c +++ b/drivers/of/pdt.c | |||
@@ -36,19 +36,55 @@ unsigned int of_pdt_unique_id __initdata; | |||
36 | (p)->unique_id = of_pdt_unique_id++; \ | 36 | (p)->unique_id = of_pdt_unique_id++; \ |
37 | } while (0) | 37 | } while (0) |
38 | 38 | ||
39 | static inline const char *of_pdt_node_name(struct device_node *dp) | 39 | static char * __init of_pdt_build_full_name(struct device_node *dp) |
40 | { | 40 | { |
41 | return dp->path_component_name; | 41 | int len, ourlen, plen; |
42 | char *n; | ||
43 | |||
44 | dp->path_component_name = build_path_component(dp); | ||
45 | |||
46 | plen = strlen(dp->parent->full_name); | ||
47 | ourlen = strlen(dp->path_component_name); | ||
48 | len = ourlen + plen + 2; | ||
49 | |||
50 | n = prom_early_alloc(len); | ||
51 | strcpy(n, dp->parent->full_name); | ||
52 | if (!of_node_is_root(dp->parent)) { | ||
53 | strcpy(n + plen, "/"); | ||
54 | plen++; | ||
55 | } | ||
56 | strcpy(n + plen, dp->path_component_name); | ||
57 | |||
58 | return n; | ||
42 | } | 59 | } |
43 | 60 | ||
44 | #else | 61 | #else /* CONFIG_SPARC */ |
45 | 62 | ||
46 | static inline void of_pdt_incr_unique_id(void *p) { } | 63 | static inline void of_pdt_incr_unique_id(void *p) { } |
47 | static inline void irq_trans_init(struct device_node *dp) { } | 64 | static inline void irq_trans_init(struct device_node *dp) { } |
48 | 65 | ||
49 | static inline const char *of_pdt_node_name(struct device_node *dp) | 66 | static char * __init of_pdt_build_full_name(struct device_node *dp) |
50 | { | 67 | { |
51 | return dp->name; | 68 | static int failsafe_id = 0; /* for generating unique names on failure */ |
69 | char *buf; | ||
70 | int len; | ||
71 | |||
72 | if (of_pdt_prom_ops->pkg2path(dp->phandle, NULL, 0, &len)) | ||
73 | goto failsafe; | ||
74 | |||
75 | buf = prom_early_alloc(len + 1); | ||
76 | if (of_pdt_prom_ops->pkg2path(dp->phandle, buf, len, &len)) | ||
77 | goto failsafe; | ||
78 | return buf; | ||
79 | |||
80 | failsafe: | ||
81 | buf = prom_early_alloc(strlen(dp->parent->full_name) + | ||
82 | strlen(dp->name) + 16); | ||
83 | sprintf(buf, "%s/%s@unknown%i", | ||
84 | of_node_is_root(dp->parent) ? "" : dp->parent->full_name, | ||
85 | dp->name, failsafe_id++); | ||
86 | pr_err("%s: pkg2path failed; assigning %s\n", __func__, buf); | ||
87 | return buf; | ||
52 | } | 88 | } |
53 | 89 | ||
54 | #endif /* !CONFIG_SPARC */ | 90 | #endif /* !CONFIG_SPARC */ |
@@ -132,47 +168,6 @@ static char * __init of_pdt_get_one_property(phandle node, const char *name) | |||
132 | return buf; | 168 | return buf; |
133 | } | 169 | } |
134 | 170 | ||
135 | static char * __init of_pdt_try_pkg2path(phandle node) | ||
136 | { | ||
137 | char *res, *buf = NULL; | ||
138 | int len; | ||
139 | |||
140 | if (!of_pdt_prom_ops->pkg2path) | ||
141 | return NULL; | ||
142 | |||
143 | if (of_pdt_prom_ops->pkg2path(node, buf, 0, &len)) | ||
144 | return NULL; | ||
145 | buf = prom_early_alloc(len + 1); | ||
146 | if (of_pdt_prom_ops->pkg2path(node, buf, len, &len)) { | ||
147 | pr_err("%s: package-to-path failed\n", __func__); | ||
148 | return NULL; | ||
149 | } | ||
150 | |||
151 | res = strrchr(buf, '/'); | ||
152 | if (!res) { | ||
153 | pr_err("%s: couldn't find / in %s\n", __func__, buf); | ||
154 | return NULL; | ||
155 | } | ||
156 | return res+1; | ||
157 | } | ||
158 | |||
159 | /* | ||
160 | * When fetching the node's name, first try using package-to-path; if | ||
161 | * that fails (either because the arch hasn't supplied a PROM callback, | ||
162 | * or some other random failure), fall back to just looking at the node's | ||
163 | * 'name' property. | ||
164 | */ | ||
165 | static char * __init of_pdt_build_name(phandle node) | ||
166 | { | ||
167 | char *buf; | ||
168 | |||
169 | buf = of_pdt_try_pkg2path(node); | ||
170 | if (!buf) | ||
171 | buf = of_pdt_get_one_property(node, "name"); | ||
172 | |||
173 | return buf; | ||
174 | } | ||
175 | |||
176 | static struct device_node * __init of_pdt_create_node(phandle node, | 171 | static struct device_node * __init of_pdt_create_node(phandle node, |
177 | struct device_node *parent) | 172 | struct device_node *parent) |
178 | { | 173 | { |
@@ -187,7 +182,7 @@ static struct device_node * __init of_pdt_create_node(phandle node, | |||
187 | 182 | ||
188 | kref_init(&dp->kref); | 183 | kref_init(&dp->kref); |
189 | 184 | ||
190 | dp->name = of_pdt_build_name(node); | 185 | dp->name = of_pdt_get_one_property(node, "name"); |
191 | dp->type = of_pdt_get_one_property(node, "device_type"); | 186 | dp->type = of_pdt_get_one_property(node, "device_type"); |
192 | dp->phandle = node; | 187 | dp->phandle = node; |
193 | 188 | ||
@@ -198,26 +193,6 @@ static struct device_node * __init of_pdt_create_node(phandle node, | |||
198 | return dp; | 193 | return dp; |
199 | } | 194 | } |
200 | 195 | ||
201 | static char * __init of_pdt_build_full_name(struct device_node *dp) | ||
202 | { | ||
203 | int len, ourlen, plen; | ||
204 | char *n; | ||
205 | |||
206 | plen = strlen(dp->parent->full_name); | ||
207 | ourlen = strlen(of_pdt_node_name(dp)); | ||
208 | len = ourlen + plen + 2; | ||
209 | |||
210 | n = prom_early_alloc(len); | ||
211 | strcpy(n, dp->parent->full_name); | ||
212 | if (!of_node_is_root(dp->parent)) { | ||
213 | strcpy(n + plen, "/"); | ||
214 | plen++; | ||
215 | } | ||
216 | strcpy(n + plen, of_pdt_node_name(dp)); | ||
217 | |||
218 | return n; | ||
219 | } | ||
220 | |||
221 | static struct device_node * __init of_pdt_build_tree(struct device_node *parent, | 196 | static struct device_node * __init of_pdt_build_tree(struct device_node *parent, |
222 | phandle node, | 197 | phandle node, |
223 | struct device_node ***nextp) | 198 | struct device_node ***nextp) |
@@ -240,9 +215,6 @@ static struct device_node * __init of_pdt_build_tree(struct device_node *parent, | |||
240 | *(*nextp) = dp; | 215 | *(*nextp) = dp; |
241 | *nextp = &dp->allnext; | 216 | *nextp = &dp->allnext; |
242 | 217 | ||
243 | #if defined(CONFIG_SPARC) | ||
244 | dp->path_component_name = build_path_component(dp); | ||
245 | #endif | ||
246 | dp->full_name = of_pdt_build_full_name(dp); | 218 | dp->full_name = of_pdt_build_full_name(dp); |
247 | 219 | ||
248 | dp->child = of_pdt_build_tree(dp, | 220 | dp->child = of_pdt_build_tree(dp, |
diff --git a/drivers/pcmcia/pcmcia_resource.c b/drivers/pcmcia/pcmcia_resource.c index 0bdda5b3ed55..42fbf1a75576 100644 --- a/drivers/pcmcia/pcmcia_resource.c +++ b/drivers/pcmcia/pcmcia_resource.c | |||
@@ -518,6 +518,8 @@ int pcmcia_enable_device(struct pcmcia_device *p_dev) | |||
518 | flags |= CONF_ENABLE_IOCARD; | 518 | flags |= CONF_ENABLE_IOCARD; |
519 | if (flags & CONF_ENABLE_IOCARD) | 519 | if (flags & CONF_ENABLE_IOCARD) |
520 | s->socket.flags |= SS_IOCARD; | 520 | s->socket.flags |= SS_IOCARD; |
521 | if (flags & CONF_ENABLE_ZVCARD) | ||
522 | s->socket.flags |= SS_ZVCARD | SS_IOCARD; | ||
521 | if (flags & CONF_ENABLE_SPKR) { | 523 | if (flags & CONF_ENABLE_SPKR) { |
522 | s->socket.flags |= SS_SPKR_ENA; | 524 | s->socket.flags |= SS_SPKR_ENA; |
523 | status = CCSR_AUDIO_ENA; | 525 | status = CCSR_AUDIO_ENA; |
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index 3755e7c8c715..2c540542b5af 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c | |||
@@ -215,7 +215,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |||
215 | } | 215 | } |
216 | #endif | 216 | #endif |
217 | 217 | ||
218 | static void pxa2xx_configure_sockets(struct device *dev) | 218 | void pxa2xx_configure_sockets(struct device *dev) |
219 | { | 219 | { |
220 | struct pcmcia_low_level *ops = dev->platform_data; | 220 | struct pcmcia_low_level *ops = dev->platform_data; |
221 | /* | 221 | /* |
diff --git a/drivers/pcmcia/pxa2xx_base.h b/drivers/pcmcia/pxa2xx_base.h index bb62ea87b8f9..b609b45469ed 100644 --- a/drivers/pcmcia/pxa2xx_base.h +++ b/drivers/pcmcia/pxa2xx_base.h | |||
@@ -1,3 +1,4 @@ | |||
1 | int pxa2xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt); | 1 | int pxa2xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt); |
2 | void pxa2xx_drv_pcmcia_ops(struct pcmcia_low_level *ops); | 2 | void pxa2xx_drv_pcmcia_ops(struct pcmcia_low_level *ops); |
3 | void pxa2xx_configure_sockets(struct device *dev); | ||
3 | 4 | ||
diff --git a/drivers/pcmcia/pxa2xx_colibri.c b/drivers/pcmcia/pxa2xx_colibri.c index c3f72192af66..a52039564e74 100644 --- a/drivers/pcmcia/pxa2xx_colibri.c +++ b/drivers/pcmcia/pxa2xx_colibri.c | |||
@@ -181,6 +181,9 @@ static int __init colibri_pcmcia_init(void) | |||
181 | { | 181 | { |
182 | int ret; | 182 | int ret; |
183 | 183 | ||
184 | if (!machine_is_colibri() && !machine_is_colibri320()) | ||
185 | return -ENODEV; | ||
186 | |||
184 | colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); | 187 | colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); |
185 | if (!colibri_pcmcia_device) | 188 | if (!colibri_pcmcia_device) |
186 | return -ENOMEM; | 189 | return -ENOMEM; |
diff --git a/drivers/pcmcia/pxa2xx_lubbock.c b/drivers/pcmcia/pxa2xx_lubbock.c index b9f8c8fb42bd..25afe637c657 100644 --- a/drivers/pcmcia/pxa2xx_lubbock.c +++ b/drivers/pcmcia/pxa2xx_lubbock.c | |||
@@ -226,6 +226,7 @@ int pcmcia_lubbock_init(struct sa1111_dev *sadev) | |||
226 | lubbock_set_misc_wr((1 << 15) | (1 << 14), 0); | 226 | lubbock_set_misc_wr((1 << 15) | (1 << 14), 0); |
227 | 227 | ||
228 | pxa2xx_drv_pcmcia_ops(&lubbock_pcmcia_ops); | 228 | pxa2xx_drv_pcmcia_ops(&lubbock_pcmcia_ops); |
229 | pxa2xx_configure_sockets(&sadev->dev); | ||
229 | ret = sa1111_pcmcia_add(sadev, &lubbock_pcmcia_ops, | 230 | ret = sa1111_pcmcia_add(sadev, &lubbock_pcmcia_ops, |
230 | pxa2xx_drv_pcmcia_add_one); | 231 | pxa2xx_drv_pcmcia_add_one); |
231 | } | 232 | } |
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index d163bc2e2b9e..a59af5b24f0a 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig | |||
@@ -227,7 +227,7 @@ config SONYPI_COMPAT | |||
227 | config IDEAPAD_LAPTOP | 227 | config IDEAPAD_LAPTOP |
228 | tristate "Lenovo IdeaPad Laptop Extras" | 228 | tristate "Lenovo IdeaPad Laptop Extras" |
229 | depends on ACPI | 229 | depends on ACPI |
230 | depends on RFKILL | 230 | depends on RFKILL && INPUT |
231 | select INPUT_SPARSEKMAP | 231 | select INPUT_SPARSEKMAP |
232 | help | 232 | help |
233 | This is a driver for the rfkill switches on Lenovo IdeaPad netbooks. | 233 | This is a driver for the rfkill switches on Lenovo IdeaPad netbooks. |
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c index c5c4b8c32eb8..38b34a73866a 100644 --- a/drivers/platform/x86/acer-wmi.c +++ b/drivers/platform/x86/acer-wmi.c | |||
@@ -84,7 +84,7 @@ MODULE_LICENSE("GPL"); | |||
84 | */ | 84 | */ |
85 | #define AMW0_GUID1 "67C3371D-95A3-4C37-BB61-DD47B491DAAB" | 85 | #define AMW0_GUID1 "67C3371D-95A3-4C37-BB61-DD47B491DAAB" |
86 | #define AMW0_GUID2 "431F16ED-0C2B-444C-B267-27DEB140CF9C" | 86 | #define AMW0_GUID2 "431F16ED-0C2B-444C-B267-27DEB140CF9C" |
87 | #define WMID_GUID1 "6AF4F258-B401-42fd-BE91-3D4AC2D7C0D3" | 87 | #define WMID_GUID1 "6AF4F258-B401-42FD-BE91-3D4AC2D7C0D3" |
88 | #define WMID_GUID2 "95764E09-FB56-4e83-B31A-37761F60994A" | 88 | #define WMID_GUID2 "95764E09-FB56-4e83-B31A-37761F60994A" |
89 | #define WMID_GUID3 "61EF69EA-865C-4BC3-A502-A0DEBA0CB531" | 89 | #define WMID_GUID3 "61EF69EA-865C-4BC3-A502-A0DEBA0CB531" |
90 | 90 | ||
@@ -1280,7 +1280,7 @@ static ssize_t set_bool_threeg(struct device *dev, | |||
1280 | return -EINVAL; | 1280 | return -EINVAL; |
1281 | return count; | 1281 | return count; |
1282 | } | 1282 | } |
1283 | static DEVICE_ATTR(threeg, S_IWUGO | S_IRUGO | S_IWUSR, show_bool_threeg, | 1283 | static DEVICE_ATTR(threeg, S_IRUGO | S_IWUSR, show_bool_threeg, |
1284 | set_bool_threeg); | 1284 | set_bool_threeg); |
1285 | 1285 | ||
1286 | static ssize_t show_interface(struct device *dev, struct device_attribute *attr, | 1286 | static ssize_t show_interface(struct device *dev, struct device_attribute *attr, |
diff --git a/drivers/platform/x86/asus_acpi.c b/drivers/platform/x86/asus_acpi.c index 4633fd8532cc..fe495939c307 100644 --- a/drivers/platform/x86/asus_acpi.c +++ b/drivers/platform/x86/asus_acpi.c | |||
@@ -1081,14 +1081,8 @@ static int asus_hotk_add_fs(struct acpi_device *device) | |||
1081 | struct proc_dir_entry *proc; | 1081 | struct proc_dir_entry *proc; |
1082 | mode_t mode; | 1082 | mode_t mode; |
1083 | 1083 | ||
1084 | /* | ||
1085 | * If parameter uid or gid is not changed, keep the default setting for | ||
1086 | * our proc entries (-rw-rw-rw-) else, it means we care about security, | ||
1087 | * and then set to -rw-rw---- | ||
1088 | */ | ||
1089 | |||
1090 | if ((asus_uid == 0) && (asus_gid == 0)) { | 1084 | if ((asus_uid == 0) && (asus_gid == 0)) { |
1091 | mode = S_IFREG | S_IRUGO | S_IWUGO; | 1085 | mode = S_IFREG | S_IRUGO | S_IWUSR | S_IWGRP; |
1092 | } else { | 1086 | } else { |
1093 | mode = S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP; | 1087 | mode = S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP; |
1094 | printk(KERN_WARNING " asus_uid and asus_gid parameters are " | 1088 | printk(KERN_WARNING " asus_uid and asus_gid parameters are " |
diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c index 34657f96b5a5..ad24ef36f9f7 100644 --- a/drivers/platform/x86/dell-laptop.c +++ b/drivers/platform/x86/dell-laptop.c | |||
@@ -290,9 +290,12 @@ static int dell_rfkill_set(void *data, bool blocked) | |||
290 | dell_send_request(buffer, 17, 11); | 290 | dell_send_request(buffer, 17, 11); |
291 | 291 | ||
292 | /* If the hardware switch controls this radio, and the hardware | 292 | /* If the hardware switch controls this radio, and the hardware |
293 | switch is disabled, don't allow changing the software state */ | 293 | switch is disabled, don't allow changing the software state. |
294 | If the hardware switch is reported as not supported, always | ||
295 | fire the SMI to toggle the killswitch. */ | ||
294 | if ((hwswitch_state & BIT(hwswitch_bit)) && | 296 | if ((hwswitch_state & BIT(hwswitch_bit)) && |
295 | !(buffer->output[1] & BIT(16))) { | 297 | !(buffer->output[1] & BIT(16)) && |
298 | (buffer->output[1] & BIT(0))) { | ||
296 | ret = -EINVAL; | 299 | ret = -EINVAL; |
297 | goto out; | 300 | goto out; |
298 | } | 301 | } |
@@ -398,6 +401,23 @@ static const struct file_operations dell_debugfs_fops = { | |||
398 | 401 | ||
399 | static void dell_update_rfkill(struct work_struct *ignored) | 402 | static void dell_update_rfkill(struct work_struct *ignored) |
400 | { | 403 | { |
404 | int status; | ||
405 | |||
406 | get_buffer(); | ||
407 | dell_send_request(buffer, 17, 11); | ||
408 | status = buffer->output[1]; | ||
409 | release_buffer(); | ||
410 | |||
411 | /* if hardware rfkill is not supported, set it explicitly */ | ||
412 | if (!(status & BIT(0))) { | ||
413 | if (wifi_rfkill) | ||
414 | dell_rfkill_set((void *)1, !((status & BIT(17)) >> 17)); | ||
415 | if (bluetooth_rfkill) | ||
416 | dell_rfkill_set((void *)2, !((status & BIT(18)) >> 18)); | ||
417 | if (wwan_rfkill) | ||
418 | dell_rfkill_set((void *)3, !((status & BIT(19)) >> 19)); | ||
419 | } | ||
420 | |||
401 | if (wifi_rfkill) | 421 | if (wifi_rfkill) |
402 | dell_rfkill_query(wifi_rfkill, (void *)1); | 422 | dell_rfkill_query(wifi_rfkill, (void *)1); |
403 | if (bluetooth_rfkill) | 423 | if (bluetooth_rfkill) |
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 930e62762365..61433d492862 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c | |||
@@ -60,69 +60,20 @@ enum pmic_gpio_register { | |||
60 | #define GPOSW_DOU 0x08 | 60 | #define GPOSW_DOU 0x08 |
61 | #define GPOSW_RDRV 0x30 | 61 | #define GPOSW_RDRV 0x30 |
62 | 62 | ||
63 | #define GPIO_UPDATE_TYPE 0x80000000 | ||
63 | 64 | ||
64 | #define NUM_GPIO 24 | 65 | #define NUM_GPIO 24 |
65 | 66 | ||
66 | struct pmic_gpio_irq { | ||
67 | spinlock_t lock; | ||
68 | u32 trigger[NUM_GPIO]; | ||
69 | u32 dirty; | ||
70 | struct work_struct work; | ||
71 | }; | ||
72 | |||
73 | |||
74 | struct pmic_gpio { | 67 | struct pmic_gpio { |
68 | struct mutex buslock; | ||
75 | struct gpio_chip chip; | 69 | struct gpio_chip chip; |
76 | struct pmic_gpio_irq irqtypes; | ||
77 | void *gpiointr; | 70 | void *gpiointr; |
78 | int irq; | 71 | int irq; |
79 | unsigned irq_base; | 72 | unsigned irq_base; |
73 | unsigned int update_type; | ||
74 | u32 trigger_type; | ||
80 | }; | 75 | }; |
81 | 76 | ||
82 | static void pmic_program_irqtype(int gpio, int type) | ||
83 | { | ||
84 | if (type & IRQ_TYPE_EDGE_RISING) | ||
85 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x20, 0x20); | ||
86 | else | ||
87 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x20); | ||
88 | |||
89 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
90 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x10, 0x10); | ||
91 | else | ||
92 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x10); | ||
93 | }; | ||
94 | |||
95 | static void pmic_irqtype_work(struct work_struct *work) | ||
96 | { | ||
97 | struct pmic_gpio_irq *t = | ||
98 | container_of(work, struct pmic_gpio_irq, work); | ||
99 | unsigned long flags; | ||
100 | int i; | ||
101 | u16 type; | ||
102 | |||
103 | spin_lock_irqsave(&t->lock, flags); | ||
104 | /* As we drop the lock, we may need multiple scans if we race the | ||
105 | pmic_irq_type function */ | ||
106 | while (t->dirty) { | ||
107 | /* | ||
108 | * For each pin that has the dirty bit set send an IPC | ||
109 | * message to configure the hardware via the PMIC | ||
110 | */ | ||
111 | for (i = 0; i < NUM_GPIO; i++) { | ||
112 | if (!(t->dirty & (1 << i))) | ||
113 | continue; | ||
114 | t->dirty &= ~(1 << i); | ||
115 | /* We can't trust the array entry or dirty | ||
116 | once the lock is dropped */ | ||
117 | type = t->trigger[i]; | ||
118 | spin_unlock_irqrestore(&t->lock, flags); | ||
119 | pmic_program_irqtype(i, type); | ||
120 | spin_lock_irqsave(&t->lock, flags); | ||
121 | } | ||
122 | } | ||
123 | spin_unlock_irqrestore(&t->lock, flags); | ||
124 | } | ||
125 | |||
126 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 77 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
127 | { | 78 | { |
128 | if (offset > 8) { | 79 | if (offset > 8) { |
@@ -190,25 +141,24 @@ static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
190 | 1 << (offset - 16)); | 141 | 1 << (offset - 16)); |
191 | } | 142 | } |
192 | 143 | ||
193 | static int pmic_irq_type(unsigned irq, unsigned type) | 144 | /* |
145 | * This is called from genirq with pg->buslock locked and | ||
146 | * irq_desc->lock held. We can not access the scu bus here, so we | ||
147 | * store the change and update in the bus_sync_unlock() function below | ||
148 | */ | ||
149 | static int pmic_irq_type(struct irq_data *data, unsigned type) | ||
194 | { | 150 | { |
195 | struct pmic_gpio *pg = get_irq_chip_data(irq); | 151 | struct pmic_gpio *pg = irq_data_get_irq_chip_data(data); |
196 | u32 gpio = irq - pg->irq_base; | 152 | u32 gpio = data->irq - pg->irq_base; |
197 | unsigned long flags; | ||
198 | 153 | ||
199 | if (gpio >= pg->chip.ngpio) | 154 | if (gpio >= pg->chip.ngpio) |
200 | return -EINVAL; | 155 | return -EINVAL; |
201 | 156 | ||
202 | spin_lock_irqsave(&pg->irqtypes.lock, flags); | 157 | pg->trigger_type = type; |
203 | pg->irqtypes.trigger[gpio] = type; | 158 | pg->update_type = gpio | GPIO_UPDATE_TYPE; |
204 | pg->irqtypes.dirty |= (1 << gpio); | ||
205 | spin_unlock_irqrestore(&pg->irqtypes.lock, flags); | ||
206 | schedule_work(&pg->irqtypes.work); | ||
207 | return 0; | 159 | return 0; |
208 | } | 160 | } |
209 | 161 | ||
210 | |||
211 | |||
212 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 162 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
213 | { | 163 | { |
214 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); | 164 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); |
@@ -217,38 +167,32 @@ static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
217 | } | 167 | } |
218 | 168 | ||
219 | /* the gpiointr register is read-clear, so just do nothing. */ | 169 | /* the gpiointr register is read-clear, so just do nothing. */ |
220 | static void pmic_irq_unmask(unsigned irq) | 170 | static void pmic_irq_unmask(struct irq_data *data) { } |
221 | { | ||
222 | }; | ||
223 | 171 | ||
224 | static void pmic_irq_mask(unsigned irq) | 172 | static void pmic_irq_mask(struct irq_data *data) { } |
225 | { | ||
226 | }; | ||
227 | 173 | ||
228 | static struct irq_chip pmic_irqchip = { | 174 | static struct irq_chip pmic_irqchip = { |
229 | .name = "PMIC-GPIO", | 175 | .name = "PMIC-GPIO", |
230 | .mask = pmic_irq_mask, | 176 | .irq_mask = pmic_irq_mask, |
231 | .unmask = pmic_irq_unmask, | 177 | .irq_unmask = pmic_irq_unmask, |
232 | .set_type = pmic_irq_type, | 178 | .irq_set_type = pmic_irq_type, |
233 | }; | 179 | }; |
234 | 180 | ||
235 | static void pmic_irq_handler(unsigned irq, struct irq_desc *desc) | 181 | static irqreturn_t pmic_irq_handler(int irq, void *data) |
236 | { | 182 | { |
237 | struct pmic_gpio *pg = (struct pmic_gpio *)get_irq_data(irq); | 183 | struct pmic_gpio *pg = data; |
238 | u8 intsts = *((u8 *)pg->gpiointr + 4); | 184 | u8 intsts = *((u8 *)pg->gpiointr + 4); |
239 | int gpio; | 185 | int gpio; |
186 | irqreturn_t ret = IRQ_NONE; | ||
240 | 187 | ||
241 | for (gpio = 0; gpio < 8; gpio++) { | 188 | for (gpio = 0; gpio < 8; gpio++) { |
242 | if (intsts & (1 << gpio)) { | 189 | if (intsts & (1 << gpio)) { |
243 | pr_debug("pmic pin %d triggered\n", gpio); | 190 | pr_debug("pmic pin %d triggered\n", gpio); |
244 | generic_handle_irq(pg->irq_base + gpio); | 191 | generic_handle_irq(pg->irq_base + gpio); |
192 | ret = IRQ_HANDLED; | ||
245 | } | 193 | } |
246 | } | 194 | } |
247 | 195 | return ret; | |
248 | if (desc->chip->irq_eoi) | ||
249 | desc->chip->irq_eoi(irq_get_irq_data(irq)); | ||
250 | else | ||
251 | dev_warn(pg->chip.dev, "missing EOI handler for irq %d\n", irq); | ||
252 | } | 196 | } |
253 | 197 | ||
254 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | 198 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) |
@@ -297,8 +241,7 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
297 | pg->chip.can_sleep = 1; | 241 | pg->chip.can_sleep = 1; |
298 | pg->chip.dev = dev; | 242 | pg->chip.dev = dev; |
299 | 243 | ||
300 | INIT_WORK(&pg->irqtypes.work, pmic_irqtype_work); | 244 | mutex_init(&pg->buslock); |
301 | spin_lock_init(&pg->irqtypes.lock); | ||
302 | 245 | ||
303 | pg->chip.dev = dev; | 246 | pg->chip.dev = dev; |
304 | retval = gpiochip_add(&pg->chip); | 247 | retval = gpiochip_add(&pg->chip); |
@@ -306,8 +249,13 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
306 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); | 249 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); |
307 | goto err; | 250 | goto err; |
308 | } | 251 | } |
309 | set_irq_data(pg->irq, pg); | 252 | |
310 | set_irq_chained_handler(pg->irq, pmic_irq_handler); | 253 | retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg); |
254 | if (retval) { | ||
255 | printk(KERN_WARNING "pmic: Interrupt request failed\n"); | ||
256 | goto err; | ||
257 | } | ||
258 | |||
311 | for (i = 0; i < 8; i++) { | 259 | for (i = 0; i < 8; i++) { |
312 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, | 260 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, |
313 | handle_simple_irq, "demux"); | 261 | handle_simple_irq, "demux"); |
diff --git a/drivers/platform/x86/tc1100-wmi.c b/drivers/platform/x86/tc1100-wmi.c index 1fe0f1feff71..865ef78d6f1a 100644 --- a/drivers/platform/x86/tc1100-wmi.c +++ b/drivers/platform/x86/tc1100-wmi.c | |||
@@ -162,7 +162,7 @@ set_bool_##value(struct device *dev, struct device_attribute *attr, \ | |||
162 | return -EINVAL; \ | 162 | return -EINVAL; \ |
163 | return count; \ | 163 | return count; \ |
164 | } \ | 164 | } \ |
165 | static DEVICE_ATTR(value, S_IWUGO | S_IRUGO | S_IWUSR, \ | 165 | static DEVICE_ATTR(value, S_IRUGO | S_IWUSR, \ |
166 | show_bool_##value, set_bool_##value); | 166 | show_bool_##value, set_bool_##value); |
167 | 167 | ||
168 | show_set_bool(wireless, TC1100_INSTANCE_WIRELESS); | 168 | show_set_bool(wireless, TC1100_INSTANCE_WIRELESS); |
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c index dd599585c6a9..eb9922385ef8 100644 --- a/drivers/platform/x86/thinkpad_acpi.c +++ b/drivers/platform/x86/thinkpad_acpi.c | |||
@@ -2275,16 +2275,12 @@ static void tpacpi_input_send_key(const unsigned int scancode) | |||
2275 | if (keycode != KEY_RESERVED) { | 2275 | if (keycode != KEY_RESERVED) { |
2276 | mutex_lock(&tpacpi_inputdev_send_mutex); | 2276 | mutex_lock(&tpacpi_inputdev_send_mutex); |
2277 | 2277 | ||
2278 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, scancode); | ||
2278 | input_report_key(tpacpi_inputdev, keycode, 1); | 2279 | input_report_key(tpacpi_inputdev, keycode, 1); |
2279 | if (keycode == KEY_UNKNOWN) | ||
2280 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, | ||
2281 | scancode); | ||
2282 | input_sync(tpacpi_inputdev); | 2280 | input_sync(tpacpi_inputdev); |
2283 | 2281 | ||
2282 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, scancode); | ||
2284 | input_report_key(tpacpi_inputdev, keycode, 0); | 2283 | input_report_key(tpacpi_inputdev, keycode, 0); |
2285 | if (keycode == KEY_UNKNOWN) | ||
2286 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, | ||
2287 | scancode); | ||
2288 | input_sync(tpacpi_inputdev); | 2284 | input_sync(tpacpi_inputdev); |
2289 | 2285 | ||
2290 | mutex_unlock(&tpacpi_inputdev_send_mutex); | 2286 | mutex_unlock(&tpacpi_inputdev_send_mutex); |
diff --git a/drivers/pps/generators/Kconfig b/drivers/pps/generators/Kconfig index f3a73dd77660..e4c4f3dc0728 100644 --- a/drivers/pps/generators/Kconfig +++ b/drivers/pps/generators/Kconfig | |||
@@ -6,7 +6,7 @@ comment "PPS generators support" | |||
6 | 6 | ||
7 | config PPS_GENERATOR_PARPORT | 7 | config PPS_GENERATOR_PARPORT |
8 | tristate "Parallel port PPS signal generator" | 8 | tristate "Parallel port PPS signal generator" |
9 | depends on PARPORT | 9 | depends on PARPORT && BROKEN |
10 | help | 10 | help |
11 | If you say yes here you get support for a PPS signal generator which | 11 | If you say yes here you get support for a PPS signal generator which |
12 | utilizes STROBE pin of a parallel port to send PPS signals. It uses | 12 | utilizes STROBE pin of a parallel port to send PPS signals. It uses |
diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c index cba1b43f7519..a4e8eb9fece6 100644 --- a/drivers/pps/kapi.c +++ b/drivers/pps/kapi.c | |||
@@ -168,7 +168,7 @@ void pps_event(struct pps_device *pps, struct pps_event_time *ts, int event, | |||
168 | { | 168 | { |
169 | unsigned long flags; | 169 | unsigned long flags; |
170 | int captured = 0; | 170 | int captured = 0; |
171 | struct pps_ktime ts_real; | 171 | struct pps_ktime ts_real = { .sec = 0, .nsec = 0, .flags = 0 }; |
172 | 172 | ||
173 | /* check event type */ | 173 | /* check event type */ |
174 | BUG_ON((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0); | 174 | BUG_ON((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0); |
diff --git a/drivers/rapidio/rio-sysfs.c b/drivers/rapidio/rio-sysfs.c index 76b41853a877..1269fbd2deca 100644 --- a/drivers/rapidio/rio-sysfs.c +++ b/drivers/rapidio/rio-sysfs.c | |||
@@ -77,9 +77,9 @@ rio_read_config(struct file *filp, struct kobject *kobj, | |||
77 | 77 | ||
78 | /* Several chips lock up trying to read undefined config space */ | 78 | /* Several chips lock up trying to read undefined config space */ |
79 | if (capable(CAP_SYS_ADMIN)) | 79 | if (capable(CAP_SYS_ADMIN)) |
80 | size = 0x200000; | 80 | size = RIO_MAINT_SPACE_SZ; |
81 | 81 | ||
82 | if (off > size) | 82 | if (off >= size) |
83 | return 0; | 83 | return 0; |
84 | if (off + count > size) { | 84 | if (off + count > size) { |
85 | size -= off; | 85 | size -= off; |
@@ -147,10 +147,10 @@ rio_write_config(struct file *filp, struct kobject *kobj, | |||
147 | loff_t init_off = off; | 147 | loff_t init_off = off; |
148 | u8 *data = (u8 *) buf; | 148 | u8 *data = (u8 *) buf; |
149 | 149 | ||
150 | if (off > 0x200000) | 150 | if (off >= RIO_MAINT_SPACE_SZ) |
151 | return 0; | 151 | return 0; |
152 | if (off + count > 0x200000) { | 152 | if (off + count > RIO_MAINT_SPACE_SZ) { |
153 | size = 0x200000 - off; | 153 | size = RIO_MAINT_SPACE_SZ - off; |
154 | count = size; | 154 | count = size; |
155 | } | 155 | } |
156 | 156 | ||
@@ -200,7 +200,7 @@ static struct bin_attribute rio_config_attr = { | |||
200 | .name = "config", | 200 | .name = "config", |
201 | .mode = S_IRUGO | S_IWUSR, | 201 | .mode = S_IRUGO | S_IWUSR, |
202 | }, | 202 | }, |
203 | .size = 0x200000, | 203 | .size = RIO_MAINT_SPACE_SZ, |
204 | .read = rio_read_config, | 204 | .read = rio_read_config, |
205 | .write = rio_write_config, | 205 | .write = rio_write_config, |
206 | }; | 206 | }; |
diff --git a/drivers/regulator/mc13xxx-regulator-core.c b/drivers/regulator/mc13xxx-regulator-core.c index f53d31b950d4..2bb5de1f2421 100644 --- a/drivers/regulator/mc13xxx-regulator-core.c +++ b/drivers/regulator/mc13xxx-regulator-core.c | |||
@@ -174,7 +174,7 @@ static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev) | |||
174 | 174 | ||
175 | dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val); | 175 | dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val); |
176 | 176 | ||
177 | BUG_ON(val < 0 || val > mc13xxx_regulators[id].desc.n_voltages); | 177 | BUG_ON(val > mc13xxx_regulators[id].desc.n_voltages); |
178 | 178 | ||
179 | return mc13xxx_regulators[id].voltages[val]; | 179 | return mc13xxx_regulators[id].voltages[val]; |
180 | } | 180 | } |
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c index 8b0d2c4bde91..06df898842c0 100644 --- a/drivers/regulator/wm831x-dcdc.c +++ b/drivers/regulator/wm831x-dcdc.c | |||
@@ -120,6 +120,7 @@ static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) | |||
120 | return REGULATOR_MODE_IDLE; | 120 | return REGULATOR_MODE_IDLE; |
121 | default: | 121 | default: |
122 | BUG(); | 122 | BUG(); |
123 | return -EINVAL; | ||
123 | } | 124 | } |
124 | } | 125 | } |
125 | 126 | ||
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index cdd97192dc69..4941cade319f 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -97,6 +97,18 @@ config RTC_INTF_DEV | |||
97 | 97 | ||
98 | If unsure, say Y. | 98 | If unsure, say Y. |
99 | 99 | ||
100 | config RTC_INTF_DEV_UIE_EMUL | ||
101 | bool "RTC UIE emulation on dev interface" | ||
102 | depends on RTC_INTF_DEV | ||
103 | help | ||
104 | Provides an emulation for RTC_UIE if the underlying rtc chip | ||
105 | driver does not expose RTC_UIE ioctls. Those requests generate | ||
106 | once-per-second update interrupts, used for synchronization. | ||
107 | |||
108 | The emulation code will read the time from the hardware | ||
109 | clock several times per second, please enable this option | ||
110 | only if you know that you really need it. | ||
111 | |||
100 | config RTC_DRV_TEST | 112 | config RTC_DRV_TEST |
101 | tristate "Test driver/device" | 113 | tristate "Test driver/device" |
102 | help | 114 | help |
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c index a0c01967244d..cb2f0728fd70 100644 --- a/drivers/rtc/interface.c +++ b/drivers/rtc/interface.c | |||
@@ -209,9 +209,8 @@ int rtc_alarm_irq_enable(struct rtc_device *rtc, unsigned int enabled) | |||
209 | } | 209 | } |
210 | 210 | ||
211 | if (err) | 211 | if (err) |
212 | return err; | 212 | /* nothing */; |
213 | 213 | else if (!rtc->ops) | |
214 | if (!rtc->ops) | ||
215 | err = -ENODEV; | 214 | err = -ENODEV; |
216 | else if (!rtc->ops->alarm_irq_enable) | 215 | else if (!rtc->ops->alarm_irq_enable) |
217 | err = -EINVAL; | 216 | err = -EINVAL; |
@@ -229,6 +228,12 @@ int rtc_update_irq_enable(struct rtc_device *rtc, unsigned int enabled) | |||
229 | if (err) | 228 | if (err) |
230 | return err; | 229 | return err; |
231 | 230 | ||
231 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | ||
232 | if (enabled == 0 && rtc->uie_irq_active) { | ||
233 | mutex_unlock(&rtc->ops_lock); | ||
234 | return rtc_dev_update_irq_enable_emul(rtc, 0); | ||
235 | } | ||
236 | #endif | ||
232 | /* make sure we're changing state */ | 237 | /* make sure we're changing state */ |
233 | if (rtc->uie_rtctimer.enabled == enabled) | 238 | if (rtc->uie_rtctimer.enabled == enabled) |
234 | goto out; | 239 | goto out; |
@@ -248,6 +253,16 @@ int rtc_update_irq_enable(struct rtc_device *rtc, unsigned int enabled) | |||
248 | 253 | ||
249 | out: | 254 | out: |
250 | mutex_unlock(&rtc->ops_lock); | 255 | mutex_unlock(&rtc->ops_lock); |
256 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | ||
257 | /* | ||
258 | * Enable emulation if the driver did not provide | ||
259 | * the update_irq_enable function pointer or if returned | ||
260 | * -EINVAL to signal that it has been configured without | ||
261 | * interrupts or that are not available at the moment. | ||
262 | */ | ||
263 | if (err == -EINVAL) | ||
264 | err = rtc_dev_update_irq_enable_emul(rtc, enabled); | ||
265 | #endif | ||
251 | return err; | 266 | return err; |
252 | 267 | ||
253 | } | 268 | } |
@@ -263,7 +278,7 @@ EXPORT_SYMBOL_GPL(rtc_update_irq_enable); | |||
263 | * | 278 | * |
264 | * Triggers the registered irq_task function callback. | 279 | * Triggers the registered irq_task function callback. |
265 | */ | 280 | */ |
266 | static void rtc_handle_legacy_irq(struct rtc_device *rtc, int num, int mode) | 281 | void rtc_handle_legacy_irq(struct rtc_device *rtc, int num, int mode) |
267 | { | 282 | { |
268 | unsigned long flags; | 283 | unsigned long flags; |
269 | 284 | ||
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index c36749e4c926..5469c52cba3d 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c | |||
@@ -309,7 +309,7 @@ static const struct rtc_class_ops at91_rtc_ops = { | |||
309 | .read_alarm = at91_rtc_readalarm, | 309 | .read_alarm = at91_rtc_readalarm, |
310 | .set_alarm = at91_rtc_setalarm, | 310 | .set_alarm = at91_rtc_setalarm, |
311 | .proc = at91_rtc_proc, | 311 | .proc = at91_rtc_proc, |
312 | .alarm_irq_enabled = at91_rtc_alarm_irq_enable, | 312 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
313 | }; | 313 | }; |
314 | 314 | ||
315 | /* | 315 | /* |
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 37c3cc1b3dd5..d0e06edb14c5 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -46,6 +46,105 @@ static int rtc_dev_open(struct inode *inode, struct file *file) | |||
46 | return err; | 46 | return err; |
47 | } | 47 | } |
48 | 48 | ||
49 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | ||
50 | /* | ||
51 | * Routine to poll RTC seconds field for change as often as possible, | ||
52 | * after first RTC_UIE use timer to reduce polling | ||
53 | */ | ||
54 | static void rtc_uie_task(struct work_struct *work) | ||
55 | { | ||
56 | struct rtc_device *rtc = | ||
57 | container_of(work, struct rtc_device, uie_task); | ||
58 | struct rtc_time tm; | ||
59 | int num = 0; | ||
60 | int err; | ||
61 | |||
62 | err = rtc_read_time(rtc, &tm); | ||
63 | |||
64 | spin_lock_irq(&rtc->irq_lock); | ||
65 | if (rtc->stop_uie_polling || err) { | ||
66 | rtc->uie_task_active = 0; | ||
67 | } else if (rtc->oldsecs != tm.tm_sec) { | ||
68 | num = (tm.tm_sec + 60 - rtc->oldsecs) % 60; | ||
69 | rtc->oldsecs = tm.tm_sec; | ||
70 | rtc->uie_timer.expires = jiffies + HZ - (HZ/10); | ||
71 | rtc->uie_timer_active = 1; | ||
72 | rtc->uie_task_active = 0; | ||
73 | add_timer(&rtc->uie_timer); | ||
74 | } else if (schedule_work(&rtc->uie_task) == 0) { | ||
75 | rtc->uie_task_active = 0; | ||
76 | } | ||
77 | spin_unlock_irq(&rtc->irq_lock); | ||
78 | if (num) | ||
79 | rtc_handle_legacy_irq(rtc, num, RTC_UF); | ||
80 | } | ||
81 | static void rtc_uie_timer(unsigned long data) | ||
82 | { | ||
83 | struct rtc_device *rtc = (struct rtc_device *)data; | ||
84 | unsigned long flags; | ||
85 | |||
86 | spin_lock_irqsave(&rtc->irq_lock, flags); | ||
87 | rtc->uie_timer_active = 0; | ||
88 | rtc->uie_task_active = 1; | ||
89 | if ((schedule_work(&rtc->uie_task) == 0)) | ||
90 | rtc->uie_task_active = 0; | ||
91 | spin_unlock_irqrestore(&rtc->irq_lock, flags); | ||
92 | } | ||
93 | |||
94 | static int clear_uie(struct rtc_device *rtc) | ||
95 | { | ||
96 | spin_lock_irq(&rtc->irq_lock); | ||
97 | if (rtc->uie_irq_active) { | ||
98 | rtc->stop_uie_polling = 1; | ||
99 | if (rtc->uie_timer_active) { | ||
100 | spin_unlock_irq(&rtc->irq_lock); | ||
101 | del_timer_sync(&rtc->uie_timer); | ||
102 | spin_lock_irq(&rtc->irq_lock); | ||
103 | rtc->uie_timer_active = 0; | ||
104 | } | ||
105 | if (rtc->uie_task_active) { | ||
106 | spin_unlock_irq(&rtc->irq_lock); | ||
107 | flush_scheduled_work(); | ||
108 | spin_lock_irq(&rtc->irq_lock); | ||
109 | } | ||
110 | rtc->uie_irq_active = 0; | ||
111 | } | ||
112 | spin_unlock_irq(&rtc->irq_lock); | ||
113 | return 0; | ||
114 | } | ||
115 | |||
116 | static int set_uie(struct rtc_device *rtc) | ||
117 | { | ||
118 | struct rtc_time tm; | ||
119 | int err; | ||
120 | |||
121 | err = rtc_read_time(rtc, &tm); | ||
122 | if (err) | ||
123 | return err; | ||
124 | spin_lock_irq(&rtc->irq_lock); | ||
125 | if (!rtc->uie_irq_active) { | ||
126 | rtc->uie_irq_active = 1; | ||
127 | rtc->stop_uie_polling = 0; | ||
128 | rtc->oldsecs = tm.tm_sec; | ||
129 | rtc->uie_task_active = 1; | ||
130 | if (schedule_work(&rtc->uie_task) == 0) | ||
131 | rtc->uie_task_active = 0; | ||
132 | } | ||
133 | rtc->irq_data = 0; | ||
134 | spin_unlock_irq(&rtc->irq_lock); | ||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | int rtc_dev_update_irq_enable_emul(struct rtc_device *rtc, unsigned int enabled) | ||
139 | { | ||
140 | if (enabled) | ||
141 | return set_uie(rtc); | ||
142 | else | ||
143 | return clear_uie(rtc); | ||
144 | } | ||
145 | EXPORT_SYMBOL(rtc_dev_update_irq_enable_emul); | ||
146 | |||
147 | #endif /* CONFIG_RTC_INTF_DEV_UIE_EMUL */ | ||
49 | 148 | ||
50 | static ssize_t | 149 | static ssize_t |
51 | rtc_dev_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | 150 | rtc_dev_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) |
@@ -387,6 +486,11 @@ void rtc_dev_prepare(struct rtc_device *rtc) | |||
387 | 486 | ||
388 | rtc->dev.devt = MKDEV(MAJOR(rtc_devt), rtc->id); | 487 | rtc->dev.devt = MKDEV(MAJOR(rtc_devt), rtc->id); |
389 | 488 | ||
489 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | ||
490 | INIT_WORK(&rtc->uie_task, rtc_uie_task); | ||
491 | setup_timer(&rtc->uie_timer, rtc_uie_timer, (unsigned long)rtc); | ||
492 | #endif | ||
493 | |||
390 | cdev_init(&rtc->char_dev, &rtc_dev_fops); | 494 | cdev_init(&rtc->char_dev, &rtc_dev_fops); |
391 | rtc->char_dev.owner = rtc->owner; | 495 | rtc->char_dev.owner = rtc->owner; |
392 | } | 496 | } |
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c index 23a9ee19764c..950735415a7c 100644 --- a/drivers/rtc/rtc-ds3232.c +++ b/drivers/rtc/rtc-ds3232.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * RTC client/driver for the Maxim/Dallas DS3232 Real-Time Clock over I2C | 2 | * RTC client/driver for the Maxim/Dallas DS3232 Real-Time Clock over I2C |
3 | * | 3 | * |
4 | * Copyright (C) 2009-2010 Freescale Semiconductor. | 4 | * Copyright (C) 2009-2011 Freescale Semiconductor. |
5 | * Author: Jack Lan <jack.lan@freescale.com> | 5 | * Author: Jack Lan <jack.lan@freescale.com> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -141,9 +141,11 @@ static int ds3232_read_time(struct device *dev, struct rtc_time *time) | |||
141 | time->tm_hour = bcd2bin(hour); | 141 | time->tm_hour = bcd2bin(hour); |
142 | } | 142 | } |
143 | 143 | ||
144 | time->tm_wday = bcd2bin(week); | 144 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
145 | time->tm_wday = bcd2bin(week) - 1; | ||
145 | time->tm_mday = bcd2bin(day); | 146 | time->tm_mday = bcd2bin(day); |
146 | time->tm_mon = bcd2bin(month & 0x7F); | 147 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
148 | time->tm_mon = bcd2bin(month & 0x7F) - 1; | ||
147 | if (century) | 149 | if (century) |
148 | add_century = 100; | 150 | add_century = 100; |
149 | 151 | ||
@@ -162,9 +164,11 @@ static int ds3232_set_time(struct device *dev, struct rtc_time *time) | |||
162 | buf[0] = bin2bcd(time->tm_sec); | 164 | buf[0] = bin2bcd(time->tm_sec); |
163 | buf[1] = bin2bcd(time->tm_min); | 165 | buf[1] = bin2bcd(time->tm_min); |
164 | buf[2] = bin2bcd(time->tm_hour); | 166 | buf[2] = bin2bcd(time->tm_hour); |
165 | buf[3] = bin2bcd(time->tm_wday); /* Day of the week */ | 167 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
168 | buf[3] = bin2bcd(time->tm_wday + 1); | ||
166 | buf[4] = bin2bcd(time->tm_mday); /* Date */ | 169 | buf[4] = bin2bcd(time->tm_mday); /* Date */ |
167 | buf[5] = bin2bcd(time->tm_mon); | 170 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
171 | buf[5] = bin2bcd(time->tm_mon + 1); | ||
168 | if (time->tm_year >= 100) { | 172 | if (time->tm_year >= 100) { |
169 | buf[5] |= 0x80; | 173 | buf[5] |= 0x80; |
170 | buf[6] = bin2bcd(time->tm_year - 100); | 174 | buf[6] = bin2bcd(time->tm_year - 100); |
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index cf953ecbfca9..b80fa2882408 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c | |||
@@ -77,18 +77,20 @@ static irqreturn_t s3c_rtc_tickirq(int irq, void *id) | |||
77 | } | 77 | } |
78 | 78 | ||
79 | /* Update control registers */ | 79 | /* Update control registers */ |
80 | static void s3c_rtc_setaie(int to) | 80 | static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) |
81 | { | 81 | { |
82 | unsigned int tmp; | 82 | unsigned int tmp; |
83 | 83 | ||
84 | pr_debug("%s: aie=%d\n", __func__, to); | 84 | pr_debug("%s: aie=%d\n", __func__, enabled); |
85 | 85 | ||
86 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; | 86 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
87 | 87 | ||
88 | if (to) | 88 | if (enabled) |
89 | tmp |= S3C2410_RTCALM_ALMEN; | 89 | tmp |= S3C2410_RTCALM_ALMEN; |
90 | 90 | ||
91 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); | 91 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
92 | |||
93 | return 0; | ||
92 | } | 94 | } |
93 | 95 | ||
94 | static int s3c_rtc_setpie(struct device *dev, int enabled) | 96 | static int s3c_rtc_setpie(struct device *dev, int enabled) |
@@ -308,7 +310,7 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
308 | 310 | ||
309 | writeb(alrm_en, base + S3C2410_RTCALM); | 311 | writeb(alrm_en, base + S3C2410_RTCALM); |
310 | 312 | ||
311 | s3c_rtc_setaie(alrm->enabled); | 313 | s3c_rtc_setaie(dev, alrm->enabled); |
312 | 314 | ||
313 | return 0; | 315 | return 0; |
314 | } | 316 | } |
@@ -440,7 +442,7 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev) | |||
440 | rtc_device_unregister(rtc); | 442 | rtc_device_unregister(rtc); |
441 | 443 | ||
442 | s3c_rtc_setpie(&dev->dev, 0); | 444 | s3c_rtc_setpie(&dev->dev, 0); |
443 | s3c_rtc_setaie(0); | 445 | s3c_rtc_setaie(&dev->dev, 0); |
444 | 446 | ||
445 | clk_disable(rtc_clk); | 447 | clk_disable(rtc_clk); |
446 | clk_put(rtc_clk); | 448 | clk_put(rtc_clk); |
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c index 318672d05563..a9fe23d5bd0f 100644 --- a/drivers/s390/block/dasd_eckd.c +++ b/drivers/s390/block/dasd_eckd.c | |||
@@ -72,7 +72,7 @@ static struct dasd_discipline dasd_eckd_discipline; | |||
72 | static struct ccw_device_id dasd_eckd_ids[] = { | 72 | static struct ccw_device_id dasd_eckd_ids[] = { |
73 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3390, 0), .driver_info = 0x1}, | 73 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3390, 0), .driver_info = 0x1}, |
74 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3390, 0), .driver_info = 0x2}, | 74 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3390, 0), .driver_info = 0x2}, |
75 | { CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3390, 0), .driver_info = 0x3}, | 75 | { CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3380, 0), .driver_info = 0x3}, |
76 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3380, 0), .driver_info = 0x4}, | 76 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3380, 0), .driver_info = 0x4}, |
77 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3380, 0), .driver_info = 0x5}, | 77 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3380, 0), .driver_info = 0x5}, |
78 | { CCW_DEVICE_DEVTYPE (0x9343, 0, 0x9345, 0), .driver_info = 0x6}, | 78 | { CCW_DEVICE_DEVTYPE (0x9343, 0, 0x9345, 0), .driver_info = 0x6}, |
diff --git a/drivers/s390/block/xpram.c b/drivers/s390/block/xpram.c index c881a14fa5dd..1f6a4d894e73 100644 --- a/drivers/s390/block/xpram.c +++ b/drivers/s390/block/xpram.c | |||
@@ -62,8 +62,8 @@ static int xpram_devs; | |||
62 | /* | 62 | /* |
63 | * Parameter parsing functions. | 63 | * Parameter parsing functions. |
64 | */ | 64 | */ |
65 | static int __initdata devs = XPRAM_DEVS; | 65 | static int devs = XPRAM_DEVS; |
66 | static char __initdata *sizes[XPRAM_MAX_DEVS]; | 66 | static char *sizes[XPRAM_MAX_DEVS]; |
67 | 67 | ||
68 | module_param(devs, int, 0); | 68 | module_param(devs, int, 0); |
69 | module_param_array(sizes, charp, NULL, 0); | 69 | module_param_array(sizes, charp, NULL, 0); |
diff --git a/drivers/s390/char/keyboard.c b/drivers/s390/char/keyboard.c index 8cd58e412b5e..5ad44daef73b 100644 --- a/drivers/s390/char/keyboard.c +++ b/drivers/s390/char/keyboard.c | |||
@@ -460,7 +460,8 @@ kbd_ioctl(struct kbd_data *kbd, struct file *file, | |||
460 | unsigned int cmd, unsigned long arg) | 460 | unsigned int cmd, unsigned long arg) |
461 | { | 461 | { |
462 | void __user *argp; | 462 | void __user *argp; |
463 | int ct, perm; | 463 | unsigned int ct; |
464 | int perm; | ||
464 | 465 | ||
465 | argp = (void __user *)arg; | 466 | argp = (void __user *)arg; |
466 | 467 | ||
diff --git a/drivers/s390/char/tape.h b/drivers/s390/char/tape.h index 7a242f073632..267b54e8ff5a 100644 --- a/drivers/s390/char/tape.h +++ b/drivers/s390/char/tape.h | |||
@@ -280,6 +280,14 @@ tape_do_io_free(struct tape_device *device, struct tape_request *request) | |||
280 | return rc; | 280 | return rc; |
281 | } | 281 | } |
282 | 282 | ||
283 | static inline void | ||
284 | tape_do_io_async_free(struct tape_device *device, struct tape_request *request) | ||
285 | { | ||
286 | request->callback = (void *) tape_free_request; | ||
287 | request->callback_data = NULL; | ||
288 | tape_do_io_async(device, request); | ||
289 | } | ||
290 | |||
283 | extern int tape_oper_handler(int irq, int status); | 291 | extern int tape_oper_handler(int irq, int status); |
284 | extern void tape_noper_handler(int irq, int status); | 292 | extern void tape_noper_handler(int irq, int status); |
285 | extern int tape_open(struct tape_device *); | 293 | extern int tape_open(struct tape_device *); |
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c index c17f35b6136a..c26511171ffe 100644 --- a/drivers/s390/char/tape_34xx.c +++ b/drivers/s390/char/tape_34xx.c | |||
@@ -53,23 +53,11 @@ static void tape_34xx_delete_sbid_from(struct tape_device *, int); | |||
53 | * Medium sense for 34xx tapes. There is no 'real' medium sense call. | 53 | * Medium sense for 34xx tapes. There is no 'real' medium sense call. |
54 | * So we just do a normal sense. | 54 | * So we just do a normal sense. |
55 | */ | 55 | */ |
56 | static int | 56 | static void __tape_34xx_medium_sense(struct tape_request *request) |
57 | tape_34xx_medium_sense(struct tape_device *device) | ||
58 | { | 57 | { |
59 | struct tape_request *request; | 58 | struct tape_device *device = request->device; |
60 | unsigned char *sense; | 59 | unsigned char *sense; |
61 | int rc; | ||
62 | |||
63 | request = tape_alloc_request(1, 32); | ||
64 | if (IS_ERR(request)) { | ||
65 | DBF_EXCEPTION(6, "MSEN fail\n"); | ||
66 | return PTR_ERR(request); | ||
67 | } | ||
68 | |||
69 | request->op = TO_MSEN; | ||
70 | tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); | ||
71 | 60 | ||
72 | rc = tape_do_io_interruptible(device, request); | ||
73 | if (request->rc == 0) { | 61 | if (request->rc == 0) { |
74 | sense = request->cpdata; | 62 | sense = request->cpdata; |
75 | 63 | ||
@@ -88,15 +76,47 @@ tape_34xx_medium_sense(struct tape_device *device) | |||
88 | device->tape_generic_status |= GMT_WR_PROT(~0); | 76 | device->tape_generic_status |= GMT_WR_PROT(~0); |
89 | else | 77 | else |
90 | device->tape_generic_status &= ~GMT_WR_PROT(~0); | 78 | device->tape_generic_status &= ~GMT_WR_PROT(~0); |
91 | } else { | 79 | } else |
92 | DBF_EVENT(4, "tape_34xx: medium sense failed with rc=%d\n", | 80 | DBF_EVENT(4, "tape_34xx: medium sense failed with rc=%d\n", |
93 | request->rc); | 81 | request->rc); |
94 | } | ||
95 | tape_free_request(request); | 82 | tape_free_request(request); |
83 | } | ||
84 | |||
85 | static int tape_34xx_medium_sense(struct tape_device *device) | ||
86 | { | ||
87 | struct tape_request *request; | ||
88 | int rc; | ||
89 | |||
90 | request = tape_alloc_request(1, 32); | ||
91 | if (IS_ERR(request)) { | ||
92 | DBF_EXCEPTION(6, "MSEN fail\n"); | ||
93 | return PTR_ERR(request); | ||
94 | } | ||
96 | 95 | ||
96 | request->op = TO_MSEN; | ||
97 | tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); | ||
98 | rc = tape_do_io_interruptible(device, request); | ||
99 | __tape_34xx_medium_sense(request); | ||
97 | return rc; | 100 | return rc; |
98 | } | 101 | } |
99 | 102 | ||
103 | static void tape_34xx_medium_sense_async(struct tape_device *device) | ||
104 | { | ||
105 | struct tape_request *request; | ||
106 | |||
107 | request = tape_alloc_request(1, 32); | ||
108 | if (IS_ERR(request)) { | ||
109 | DBF_EXCEPTION(6, "MSEN fail\n"); | ||
110 | return; | ||
111 | } | ||
112 | |||
113 | request->op = TO_MSEN; | ||
114 | tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); | ||
115 | request->callback = (void *) __tape_34xx_medium_sense; | ||
116 | request->callback_data = NULL; | ||
117 | tape_do_io_async(device, request); | ||
118 | } | ||
119 | |||
100 | struct tape_34xx_work { | 120 | struct tape_34xx_work { |
101 | struct tape_device *device; | 121 | struct tape_device *device; |
102 | enum tape_op op; | 122 | enum tape_op op; |
@@ -109,6 +129,9 @@ struct tape_34xx_work { | |||
109 | * is inserted but cannot call tape_do_io* from an interrupt context. | 129 | * is inserted but cannot call tape_do_io* from an interrupt context. |
110 | * Maybe that's useful for other actions we want to start from the | 130 | * Maybe that's useful for other actions we want to start from the |
111 | * interrupt handler. | 131 | * interrupt handler. |
132 | * Note: the work handler is called by the system work queue. The tape | ||
133 | * commands started by the handler need to be asynchrounous, otherwise | ||
134 | * a deadlock can occur e.g. in case of a deferred cc=1 (see __tape_do_irq). | ||
112 | */ | 135 | */ |
113 | static void | 136 | static void |
114 | tape_34xx_work_handler(struct work_struct *work) | 137 | tape_34xx_work_handler(struct work_struct *work) |
@@ -119,7 +142,7 @@ tape_34xx_work_handler(struct work_struct *work) | |||
119 | 142 | ||
120 | switch(p->op) { | 143 | switch(p->op) { |
121 | case TO_MSEN: | 144 | case TO_MSEN: |
122 | tape_34xx_medium_sense(device); | 145 | tape_34xx_medium_sense_async(device); |
123 | break; | 146 | break; |
124 | default: | 147 | default: |
125 | DBF_EVENT(3, "T34XX: internal error: unknown work\n"); | 148 | DBF_EVENT(3, "T34XX: internal error: unknown work\n"); |
diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c index fbe361fcd2c0..de2e99e0a71b 100644 --- a/drivers/s390/char/tape_3590.c +++ b/drivers/s390/char/tape_3590.c | |||
@@ -329,17 +329,17 @@ out: | |||
329 | /* | 329 | /* |
330 | * Enable encryption | 330 | * Enable encryption |
331 | */ | 331 | */ |
332 | static int tape_3592_enable_crypt(struct tape_device *device) | 332 | static struct tape_request *__tape_3592_enable_crypt(struct tape_device *device) |
333 | { | 333 | { |
334 | struct tape_request *request; | 334 | struct tape_request *request; |
335 | char *data; | 335 | char *data; |
336 | 336 | ||
337 | DBF_EVENT(6, "tape_3592_enable_crypt\n"); | 337 | DBF_EVENT(6, "tape_3592_enable_crypt\n"); |
338 | if (!crypt_supported(device)) | 338 | if (!crypt_supported(device)) |
339 | return -ENOSYS; | 339 | return ERR_PTR(-ENOSYS); |
340 | request = tape_alloc_request(2, 72); | 340 | request = tape_alloc_request(2, 72); |
341 | if (IS_ERR(request)) | 341 | if (IS_ERR(request)) |
342 | return PTR_ERR(request); | 342 | return request; |
343 | data = request->cpdata; | 343 | data = request->cpdata; |
344 | memset(data,0,72); | 344 | memset(data,0,72); |
345 | 345 | ||
@@ -354,23 +354,42 @@ static int tape_3592_enable_crypt(struct tape_device *device) | |||
354 | request->op = TO_CRYPT_ON; | 354 | request->op = TO_CRYPT_ON; |
355 | tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); | 355 | tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); |
356 | tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); | 356 | tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); |
357 | return request; | ||
358 | } | ||
359 | |||
360 | static int tape_3592_enable_crypt(struct tape_device *device) | ||
361 | { | ||
362 | struct tape_request *request; | ||
363 | |||
364 | request = __tape_3592_enable_crypt(device); | ||
365 | if (IS_ERR(request)) | ||
366 | return PTR_ERR(request); | ||
357 | return tape_do_io_free(device, request); | 367 | return tape_do_io_free(device, request); |
358 | } | 368 | } |
359 | 369 | ||
370 | static void tape_3592_enable_crypt_async(struct tape_device *device) | ||
371 | { | ||
372 | struct tape_request *request; | ||
373 | |||
374 | request = __tape_3592_enable_crypt(device); | ||
375 | if (!IS_ERR(request)) | ||
376 | tape_do_io_async_free(device, request); | ||
377 | } | ||
378 | |||
360 | /* | 379 | /* |
361 | * Disable encryption | 380 | * Disable encryption |
362 | */ | 381 | */ |
363 | static int tape_3592_disable_crypt(struct tape_device *device) | 382 | static struct tape_request *__tape_3592_disable_crypt(struct tape_device *device) |
364 | { | 383 | { |
365 | struct tape_request *request; | 384 | struct tape_request *request; |
366 | char *data; | 385 | char *data; |
367 | 386 | ||
368 | DBF_EVENT(6, "tape_3592_disable_crypt\n"); | 387 | DBF_EVENT(6, "tape_3592_disable_crypt\n"); |
369 | if (!crypt_supported(device)) | 388 | if (!crypt_supported(device)) |
370 | return -ENOSYS; | 389 | return ERR_PTR(-ENOSYS); |
371 | request = tape_alloc_request(2, 72); | 390 | request = tape_alloc_request(2, 72); |
372 | if (IS_ERR(request)) | 391 | if (IS_ERR(request)) |
373 | return PTR_ERR(request); | 392 | return request; |
374 | data = request->cpdata; | 393 | data = request->cpdata; |
375 | memset(data,0,72); | 394 | memset(data,0,72); |
376 | 395 | ||
@@ -383,9 +402,28 @@ static int tape_3592_disable_crypt(struct tape_device *device) | |||
383 | tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); | 402 | tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); |
384 | tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); | 403 | tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); |
385 | 404 | ||
405 | return request; | ||
406 | } | ||
407 | |||
408 | static int tape_3592_disable_crypt(struct tape_device *device) | ||
409 | { | ||
410 | struct tape_request *request; | ||
411 | |||
412 | request = __tape_3592_disable_crypt(device); | ||
413 | if (IS_ERR(request)) | ||
414 | return PTR_ERR(request); | ||
386 | return tape_do_io_free(device, request); | 415 | return tape_do_io_free(device, request); |
387 | } | 416 | } |
388 | 417 | ||
418 | static void tape_3592_disable_crypt_async(struct tape_device *device) | ||
419 | { | ||
420 | struct tape_request *request; | ||
421 | |||
422 | request = __tape_3592_disable_crypt(device); | ||
423 | if (!IS_ERR(request)) | ||
424 | tape_do_io_async_free(device, request); | ||
425 | } | ||
426 | |||
389 | /* | 427 | /* |
390 | * IOCTL: Set encryption status | 428 | * IOCTL: Set encryption status |
391 | */ | 429 | */ |
@@ -457,8 +495,7 @@ tape_3590_ioctl(struct tape_device *device, unsigned int cmd, unsigned long arg) | |||
457 | /* | 495 | /* |
458 | * SENSE Medium: Get Sense data about medium state | 496 | * SENSE Medium: Get Sense data about medium state |
459 | */ | 497 | */ |
460 | static int | 498 | static int tape_3590_sense_medium(struct tape_device *device) |
461 | tape_3590_sense_medium(struct tape_device *device) | ||
462 | { | 499 | { |
463 | struct tape_request *request; | 500 | struct tape_request *request; |
464 | 501 | ||
@@ -470,6 +507,18 @@ tape_3590_sense_medium(struct tape_device *device) | |||
470 | return tape_do_io_free(device, request); | 507 | return tape_do_io_free(device, request); |
471 | } | 508 | } |
472 | 509 | ||
510 | static void tape_3590_sense_medium_async(struct tape_device *device) | ||
511 | { | ||
512 | struct tape_request *request; | ||
513 | |||
514 | request = tape_alloc_request(1, 128); | ||
515 | if (IS_ERR(request)) | ||
516 | return; | ||
517 | request->op = TO_MSEN; | ||
518 | tape_ccw_end(request->cpaddr, MEDIUM_SENSE, 128, request->cpdata); | ||
519 | tape_do_io_async_free(device, request); | ||
520 | } | ||
521 | |||
473 | /* | 522 | /* |
474 | * MTTELL: Tell block. Return the number of block relative to current file. | 523 | * MTTELL: Tell block. Return the number of block relative to current file. |
475 | */ | 524 | */ |
@@ -546,15 +595,14 @@ tape_3590_read_opposite(struct tape_device *device, | |||
546 | * 2. The attention msg is written to the "read subsystem data" buffer. | 595 | * 2. The attention msg is written to the "read subsystem data" buffer. |
547 | * In this case we probably should print it to the console. | 596 | * In this case we probably should print it to the console. |
548 | */ | 597 | */ |
549 | static int | 598 | static void tape_3590_read_attmsg_async(struct tape_device *device) |
550 | tape_3590_read_attmsg(struct tape_device *device) | ||
551 | { | 599 | { |
552 | struct tape_request *request; | 600 | struct tape_request *request; |
553 | char *buf; | 601 | char *buf; |
554 | 602 | ||
555 | request = tape_alloc_request(3, 4096); | 603 | request = tape_alloc_request(3, 4096); |
556 | if (IS_ERR(request)) | 604 | if (IS_ERR(request)) |
557 | return PTR_ERR(request); | 605 | return; |
558 | request->op = TO_READ_ATTMSG; | 606 | request->op = TO_READ_ATTMSG; |
559 | buf = request->cpdata; | 607 | buf = request->cpdata; |
560 | buf[0] = PREP_RD_SS_DATA; | 608 | buf[0] = PREP_RD_SS_DATA; |
@@ -562,12 +610,15 @@ tape_3590_read_attmsg(struct tape_device *device) | |||
562 | tape_ccw_cc(request->cpaddr, PERFORM_SS_FUNC, 12, buf); | 610 | tape_ccw_cc(request->cpaddr, PERFORM_SS_FUNC, 12, buf); |
563 | tape_ccw_cc(request->cpaddr + 1, READ_SS_DATA, 4096 - 12, buf + 12); | 611 | tape_ccw_cc(request->cpaddr + 1, READ_SS_DATA, 4096 - 12, buf + 12); |
564 | tape_ccw_end(request->cpaddr + 2, NOP, 0, NULL); | 612 | tape_ccw_end(request->cpaddr + 2, NOP, 0, NULL); |
565 | return tape_do_io_free(device, request); | 613 | tape_do_io_async_free(device, request); |
566 | } | 614 | } |
567 | 615 | ||
568 | /* | 616 | /* |
569 | * These functions are used to schedule follow-up actions from within an | 617 | * These functions are used to schedule follow-up actions from within an |
570 | * interrupt context (like unsolicited interrupts). | 618 | * interrupt context (like unsolicited interrupts). |
619 | * Note: the work handler is called by the system work queue. The tape | ||
620 | * commands started by the handler need to be asynchrounous, otherwise | ||
621 | * a deadlock can occur e.g. in case of a deferred cc=1 (see __tape_do_irq). | ||
571 | */ | 622 | */ |
572 | struct work_handler_data { | 623 | struct work_handler_data { |
573 | struct tape_device *device; | 624 | struct tape_device *device; |
@@ -583,16 +634,16 @@ tape_3590_work_handler(struct work_struct *work) | |||
583 | 634 | ||
584 | switch (p->op) { | 635 | switch (p->op) { |
585 | case TO_MSEN: | 636 | case TO_MSEN: |
586 | tape_3590_sense_medium(p->device); | 637 | tape_3590_sense_medium_async(p->device); |
587 | break; | 638 | break; |
588 | case TO_READ_ATTMSG: | 639 | case TO_READ_ATTMSG: |
589 | tape_3590_read_attmsg(p->device); | 640 | tape_3590_read_attmsg_async(p->device); |
590 | break; | 641 | break; |
591 | case TO_CRYPT_ON: | 642 | case TO_CRYPT_ON: |
592 | tape_3592_enable_crypt(p->device); | 643 | tape_3592_enable_crypt_async(p->device); |
593 | break; | 644 | break; |
594 | case TO_CRYPT_OFF: | 645 | case TO_CRYPT_OFF: |
595 | tape_3592_disable_crypt(p->device); | 646 | tape_3592_disable_crypt_async(p->device); |
596 | break; | 647 | break; |
597 | default: | 648 | default: |
598 | DBF_EVENT(3, "T3590: work handler undefined for " | 649 | DBF_EVENT(3, "T3590: work handler undefined for " |
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index 44578b56ad0a..d3e58d763b43 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
@@ -1561,6 +1561,7 @@ qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport) | |||
1561 | { | 1561 | { |
1562 | struct Scsi_Host *host = rport_to_shost(rport); | 1562 | struct Scsi_Host *host = rport_to_shost(rport); |
1563 | fc_port_t *fcport = *(fc_port_t **)rport->dd_data; | 1563 | fc_port_t *fcport = *(fc_port_t **)rport->dd_data; |
1564 | unsigned long flags; | ||
1564 | 1565 | ||
1565 | if (!fcport) | 1566 | if (!fcport) |
1566 | return; | 1567 | return; |
@@ -1573,10 +1574,10 @@ qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport) | |||
1573 | * Transport has effectively 'deleted' the rport, clear | 1574 | * Transport has effectively 'deleted' the rport, clear |
1574 | * all local references. | 1575 | * all local references. |
1575 | */ | 1576 | */ |
1576 | spin_lock_irq(host->host_lock); | 1577 | spin_lock_irqsave(host->host_lock, flags); |
1577 | fcport->rport = fcport->drport = NULL; | 1578 | fcport->rport = fcport->drport = NULL; |
1578 | *((fc_port_t **)rport->dd_data) = NULL; | 1579 | *((fc_port_t **)rport->dd_data) = NULL; |
1579 | spin_unlock_irq(host->host_lock); | 1580 | spin_unlock_irqrestore(host->host_lock, flags); |
1580 | 1581 | ||
1581 | if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags)) | 1582 | if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags)) |
1582 | return; | 1583 | return; |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index f948e1a73aec..d9479c3fe5f8 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -2505,11 +2505,12 @@ qla2x00_rport_del(void *data) | |||
2505 | { | 2505 | { |
2506 | fc_port_t *fcport = data; | 2506 | fc_port_t *fcport = data; |
2507 | struct fc_rport *rport; | 2507 | struct fc_rport *rport; |
2508 | unsigned long flags; | ||
2508 | 2509 | ||
2509 | spin_lock_irq(fcport->vha->host->host_lock); | 2510 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
2510 | rport = fcport->drport ? fcport->drport: fcport->rport; | 2511 | rport = fcport->drport ? fcport->drport: fcport->rport; |
2511 | fcport->drport = NULL; | 2512 | fcport->drport = NULL; |
2512 | spin_unlock_irq(fcport->vha->host->host_lock); | 2513 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
2513 | if (rport) | 2514 | if (rport) |
2514 | fc_remote_port_delete(rport); | 2515 | fc_remote_port_delete(rport); |
2515 | } | 2516 | } |
@@ -2879,6 +2880,7 @@ qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) | |||
2879 | struct fc_rport_identifiers rport_ids; | 2880 | struct fc_rport_identifiers rport_ids; |
2880 | struct fc_rport *rport; | 2881 | struct fc_rport *rport; |
2881 | struct qla_hw_data *ha = vha->hw; | 2882 | struct qla_hw_data *ha = vha->hw; |
2883 | unsigned long flags; | ||
2882 | 2884 | ||
2883 | qla2x00_rport_del(fcport); | 2885 | qla2x00_rport_del(fcport); |
2884 | 2886 | ||
@@ -2893,9 +2895,9 @@ qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) | |||
2893 | "Unable to allocate fc remote port!\n"); | 2895 | "Unable to allocate fc remote port!\n"); |
2894 | return; | 2896 | return; |
2895 | } | 2897 | } |
2896 | spin_lock_irq(fcport->vha->host->host_lock); | 2898 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
2897 | *((fc_port_t **)rport->dd_data) = fcport; | 2899 | *((fc_port_t **)rport->dd_data) = fcport; |
2898 | spin_unlock_irq(fcport->vha->host->host_lock); | 2900 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
2899 | 2901 | ||
2900 | rport->supported_classes = fcport->supported_classes; | 2902 | rport->supported_classes = fcport->supported_classes; |
2901 | 2903 | ||
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index c194c23ca1fb..f27724d76cf6 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -562,7 +562,6 @@ qla2xxx_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *) | |||
562 | } | 562 | } |
563 | if (atomic_read(&fcport->state) != FCS_ONLINE) { | 563 | if (atomic_read(&fcport->state) != FCS_ONLINE) { |
564 | if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || | 564 | if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || |
565 | atomic_read(&fcport->state) == FCS_DEVICE_LOST || | ||
566 | atomic_read(&base_vha->loop_state) == LOOP_DEAD) { | 565 | atomic_read(&base_vha->loop_state) == LOOP_DEAD) { |
567 | cmd->result = DID_NO_CONNECT << 16; | 566 | cmd->result = DID_NO_CONNECT << 16; |
568 | goto qc24_fail_command; | 567 | goto qc24_fail_command; |
@@ -2513,6 +2512,7 @@ qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport, | |||
2513 | { | 2512 | { |
2514 | struct fc_rport *rport; | 2513 | struct fc_rport *rport; |
2515 | scsi_qla_host_t *base_vha; | 2514 | scsi_qla_host_t *base_vha; |
2515 | unsigned long flags; | ||
2516 | 2516 | ||
2517 | if (!fcport->rport) | 2517 | if (!fcport->rport) |
2518 | return; | 2518 | return; |
@@ -2520,9 +2520,9 @@ qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport, | |||
2520 | rport = fcport->rport; | 2520 | rport = fcport->rport; |
2521 | if (defer) { | 2521 | if (defer) { |
2522 | base_vha = pci_get_drvdata(vha->hw->pdev); | 2522 | base_vha = pci_get_drvdata(vha->hw->pdev); |
2523 | spin_lock_irq(vha->host->host_lock); | 2523 | spin_lock_irqsave(vha->host->host_lock, flags); |
2524 | fcport->drport = rport; | 2524 | fcport->drport = rport; |
2525 | spin_unlock_irq(vha->host->host_lock); | 2525 | spin_unlock_irqrestore(vha->host->host_lock, flags); |
2526 | set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); | 2526 | set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); |
2527 | qla2xxx_wake_dpc(base_vha); | 2527 | qla2xxx_wake_dpc(base_vha); |
2528 | } else | 2528 | } else |
@@ -3282,10 +3282,10 @@ qla2x00_do_dpc(void *data) | |||
3282 | 3282 | ||
3283 | set_user_nice(current, -20); | 3283 | set_user_nice(current, -20); |
3284 | 3284 | ||
3285 | set_current_state(TASK_INTERRUPTIBLE); | ||
3285 | while (!kthread_should_stop()) { | 3286 | while (!kthread_should_stop()) { |
3286 | DEBUG3(printk("qla2x00: DPC handler sleeping\n")); | 3287 | DEBUG3(printk("qla2x00: DPC handler sleeping\n")); |
3287 | 3288 | ||
3288 | set_current_state(TASK_INTERRUPTIBLE); | ||
3289 | schedule(); | 3289 | schedule(); |
3290 | __set_current_state(TASK_RUNNING); | 3290 | __set_current_state(TASK_RUNNING); |
3291 | 3291 | ||
@@ -3454,7 +3454,9 @@ qla2x00_do_dpc(void *data) | |||
3454 | qla2x00_do_dpc_all_vps(base_vha); | 3454 | qla2x00_do_dpc_all_vps(base_vha); |
3455 | 3455 | ||
3456 | ha->dpc_active = 0; | 3456 | ha->dpc_active = 0; |
3457 | set_current_state(TASK_INTERRUPTIBLE); | ||
3457 | } /* End of while(1) */ | 3458 | } /* End of while(1) */ |
3459 | __set_current_state(TASK_RUNNING); | ||
3458 | 3460 | ||
3459 | DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no)); | 3461 | DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no)); |
3460 | 3462 | ||
diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c index 7b310934efed..a6b2d72022fc 100644 --- a/drivers/scsi/scsi_debug.c +++ b/drivers/scsi/scsi_debug.c | |||
@@ -1671,7 +1671,7 @@ static int do_device_access(struct scsi_cmnd *scmd, | |||
1671 | unsigned long long lba, unsigned int num, int write) | 1671 | unsigned long long lba, unsigned int num, int write) |
1672 | { | 1672 | { |
1673 | int ret; | 1673 | int ret; |
1674 | unsigned int block, rest = 0; | 1674 | unsigned long long block, rest = 0; |
1675 | int (*func)(struct scsi_cmnd *, unsigned char *, int); | 1675 | int (*func)(struct scsi_cmnd *, unsigned char *, int); |
1676 | 1676 | ||
1677 | func = write ? fetch_to_dev_buffer : fill_from_dev_buffer; | 1677 | func = write ? fetch_to_dev_buffer : fill_from_dev_buffer; |
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 9045c52abd25..fb2bb35c62cb 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c | |||
@@ -443,7 +443,7 @@ static void scsi_run_queue(struct request_queue *q) | |||
443 | &sdev->request_queue->queue_flags); | 443 | &sdev->request_queue->queue_flags); |
444 | if (flagset) | 444 | if (flagset) |
445 | queue_flag_set(QUEUE_FLAG_REENTER, sdev->request_queue); | 445 | queue_flag_set(QUEUE_FLAG_REENTER, sdev->request_queue); |
446 | __blk_run_queue(sdev->request_queue); | 446 | __blk_run_queue(sdev->request_queue, false); |
447 | if (flagset) | 447 | if (flagset) |
448 | queue_flag_clear(QUEUE_FLAG_REENTER, sdev->request_queue); | 448 | queue_flag_clear(QUEUE_FLAG_REENTER, sdev->request_queue); |
449 | spin_unlock(sdev->request_queue->queue_lock); | 449 | spin_unlock(sdev->request_queue->queue_lock); |
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c index 998c01be3234..5c3ccfc6b622 100644 --- a/drivers/scsi/scsi_transport_fc.c +++ b/drivers/scsi/scsi_transport_fc.c | |||
@@ -3829,7 +3829,7 @@ fc_bsg_goose_queue(struct fc_rport *rport) | |||
3829 | !test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags); | 3829 | !test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags); |
3830 | if (flagset) | 3830 | if (flagset) |
3831 | queue_flag_set(QUEUE_FLAG_REENTER, rport->rqst_q); | 3831 | queue_flag_set(QUEUE_FLAG_REENTER, rport->rqst_q); |
3832 | __blk_run_queue(rport->rqst_q); | 3832 | __blk_run_queue(rport->rqst_q, false); |
3833 | if (flagset) | 3833 | if (flagset) |
3834 | queue_flag_clear(QUEUE_FLAG_REENTER, rport->rqst_q); | 3834 | queue_flag_clear(QUEUE_FLAG_REENTER, rport->rqst_q); |
3835 | spin_unlock_irqrestore(rport->rqst_q->queue_lock, flags); | 3835 | spin_unlock_irqrestore(rport->rqst_q->queue_lock, flags); |
diff --git a/drivers/spi/pxa2xx_spi_pci.c b/drivers/spi/pxa2xx_spi_pci.c index 351d8a375b57..19752b09e155 100644 --- a/drivers/spi/pxa2xx_spi_pci.c +++ b/drivers/spi/pxa2xx_spi_pci.c | |||
@@ -7,10 +7,9 @@ | |||
7 | #include <linux/of_device.h> | 7 | #include <linux/of_device.h> |
8 | #include <linux/spi/pxa2xx_spi.h> | 8 | #include <linux/spi/pxa2xx_spi.h> |
9 | 9 | ||
10 | struct awesome_struct { | 10 | struct ce4100_info { |
11 | struct ssp_device ssp; | 11 | struct ssp_device ssp; |
12 | struct platform_device spi_pdev; | 12 | struct platform_device *spi_pdev; |
13 | struct pxa2xx_spi_master spi_pdata; | ||
14 | }; | 13 | }; |
15 | 14 | ||
16 | static DEFINE_MUTEX(ssp_lock); | 15 | static DEFINE_MUTEX(ssp_lock); |
@@ -51,23 +50,15 @@ void pxa_ssp_free(struct ssp_device *ssp) | |||
51 | } | 50 | } |
52 | EXPORT_SYMBOL_GPL(pxa_ssp_free); | 51 | EXPORT_SYMBOL_GPL(pxa_ssp_free); |
53 | 52 | ||
54 | static void plat_dev_release(struct device *dev) | ||
55 | { | ||
56 | struct awesome_struct *as = container_of(dev, | ||
57 | struct awesome_struct, spi_pdev.dev); | ||
58 | |||
59 | of_device_node_put(&as->spi_pdev.dev); | ||
60 | } | ||
61 | |||
62 | static int __devinit ce4100_spi_probe(struct pci_dev *dev, | 53 | static int __devinit ce4100_spi_probe(struct pci_dev *dev, |
63 | const struct pci_device_id *ent) | 54 | const struct pci_device_id *ent) |
64 | { | 55 | { |
65 | int ret; | 56 | int ret; |
66 | resource_size_t phys_beg; | 57 | resource_size_t phys_beg; |
67 | resource_size_t phys_len; | 58 | resource_size_t phys_len; |
68 | struct awesome_struct *spi_info; | 59 | struct ce4100_info *spi_info; |
69 | struct platform_device *pdev; | 60 | struct platform_device *pdev; |
70 | struct pxa2xx_spi_master *spi_pdata; | 61 | struct pxa2xx_spi_master spi_pdata; |
71 | struct ssp_device *ssp; | 62 | struct ssp_device *ssp; |
72 | 63 | ||
73 | ret = pci_enable_device(dev); | 64 | ret = pci_enable_device(dev); |
@@ -84,33 +75,30 @@ static int __devinit ce4100_spi_probe(struct pci_dev *dev, | |||
84 | return ret; | 75 | return ret; |
85 | } | 76 | } |
86 | 77 | ||
78 | pdev = platform_device_alloc("pxa2xx-spi", dev->devfn); | ||
87 | spi_info = kzalloc(sizeof(*spi_info), GFP_KERNEL); | 79 | spi_info = kzalloc(sizeof(*spi_info), GFP_KERNEL); |
88 | if (!spi_info) { | 80 | if (!pdev || !spi_info ) { |
89 | ret = -ENOMEM; | 81 | ret = -ENOMEM; |
90 | goto err_kz; | 82 | goto err_nomem; |
91 | } | 83 | } |
92 | ssp = &spi_info->ssp; | 84 | memset(&spi_pdata, 0, sizeof(spi_pdata)); |
93 | pdev = &spi_info->spi_pdev; | 85 | spi_pdata.num_chipselect = dev->devfn; |
94 | spi_pdata = &spi_info->spi_pdata; | ||
95 | 86 | ||
96 | pdev->name = "pxa2xx-spi"; | 87 | ret = platform_device_add_data(pdev, &spi_pdata, sizeof(spi_pdata)); |
97 | pdev->id = dev->devfn; | 88 | if (ret) |
98 | pdev->dev.parent = &dev->dev; | 89 | goto err_nomem; |
99 | pdev->dev.platform_data = &spi_info->spi_pdata; | ||
100 | 90 | ||
91 | pdev->dev.parent = &dev->dev; | ||
101 | #ifdef CONFIG_OF | 92 | #ifdef CONFIG_OF |
102 | pdev->dev.of_node = dev->dev.of_node; | 93 | pdev->dev.of_node = dev->dev.of_node; |
103 | #endif | 94 | #endif |
104 | pdev->dev.release = plat_dev_release; | 95 | ssp = &spi_info->ssp; |
105 | |||
106 | spi_pdata->num_chipselect = dev->devfn; | ||
107 | |||
108 | ssp->phys_base = pci_resource_start(dev, 0); | 96 | ssp->phys_base = pci_resource_start(dev, 0); |
109 | ssp->mmio_base = ioremap(phys_beg, phys_len); | 97 | ssp->mmio_base = ioremap(phys_beg, phys_len); |
110 | if (!ssp->mmio_base) { | 98 | if (!ssp->mmio_base) { |
111 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | 99 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); |
112 | ret = -EIO; | 100 | ret = -EIO; |
113 | goto err_remap; | 101 | goto err_nomem; |
114 | } | 102 | } |
115 | ssp->irq = dev->irq; | 103 | ssp->irq = dev->irq; |
116 | ssp->port_id = pdev->id; | 104 | ssp->port_id = pdev->id; |
@@ -122,7 +110,7 @@ static int __devinit ce4100_spi_probe(struct pci_dev *dev, | |||
122 | 110 | ||
123 | pci_set_drvdata(dev, spi_info); | 111 | pci_set_drvdata(dev, spi_info); |
124 | 112 | ||
125 | ret = platform_device_register(pdev); | 113 | ret = platform_device_add(pdev); |
126 | if (ret) | 114 | if (ret) |
127 | goto err_dev_add; | 115 | goto err_dev_add; |
128 | 116 | ||
@@ -135,27 +123,21 @@ err_dev_add: | |||
135 | mutex_unlock(&ssp_lock); | 123 | mutex_unlock(&ssp_lock); |
136 | iounmap(ssp->mmio_base); | 124 | iounmap(ssp->mmio_base); |
137 | 125 | ||
138 | err_remap: | 126 | err_nomem: |
139 | kfree(spi_info); | ||
140 | |||
141 | err_kz: | ||
142 | release_mem_region(phys_beg, phys_len); | 127 | release_mem_region(phys_beg, phys_len); |
143 | 128 | platform_device_put(pdev); | |
129 | kfree(spi_info); | ||
144 | return ret; | 130 | return ret; |
145 | } | 131 | } |
146 | 132 | ||
147 | static void __devexit ce4100_spi_remove(struct pci_dev *dev) | 133 | static void __devexit ce4100_spi_remove(struct pci_dev *dev) |
148 | { | 134 | { |
149 | struct awesome_struct *spi_info; | 135 | struct ce4100_info *spi_info; |
150 | struct platform_device *pdev; | ||
151 | struct ssp_device *ssp; | 136 | struct ssp_device *ssp; |
152 | 137 | ||
153 | spi_info = pci_get_drvdata(dev); | 138 | spi_info = pci_get_drvdata(dev); |
154 | |||
155 | ssp = &spi_info->ssp; | 139 | ssp = &spi_info->ssp; |
156 | pdev = &spi_info->spi_pdev; | 140 | platform_device_unregister(spi_info->spi_pdev); |
157 | |||
158 | platform_device_unregister(pdev); | ||
159 | 141 | ||
160 | iounmap(ssp->mmio_base); | 142 | iounmap(ssp->mmio_base); |
161 | release_mem_region(pci_resource_start(dev, 0), | 143 | release_mem_region(pci_resource_start(dev, 0), |
@@ -171,7 +153,6 @@ static void __devexit ce4100_spi_remove(struct pci_dev *dev) | |||
171 | } | 153 | } |
172 | 154 | ||
173 | static struct pci_device_id ce4100_spi_devices[] __devinitdata = { | 155 | static struct pci_device_id ce4100_spi_devices[] __devinitdata = { |
174 | |||
175 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) }, | 156 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) }, |
176 | { }, | 157 | { }, |
177 | }; | 158 | }; |
diff --git a/drivers/target/Makefile b/drivers/target/Makefile index 5cfd70819f08..973bb190ef57 100644 --- a/drivers/target/Makefile +++ b/drivers/target/Makefile | |||
@@ -13,8 +13,7 @@ target_core_mod-y := target_core_configfs.o \ | |||
13 | target_core_transport.o \ | 13 | target_core_transport.o \ |
14 | target_core_cdb.o \ | 14 | target_core_cdb.o \ |
15 | target_core_ua.o \ | 15 | target_core_ua.o \ |
16 | target_core_rd.o \ | 16 | target_core_rd.o |
17 | target_core_mib.o | ||
18 | 17 | ||
19 | obj-$(CONFIG_TARGET_CORE) += target_core_mod.o | 18 | obj-$(CONFIG_TARGET_CORE) += target_core_mod.o |
20 | 19 | ||
diff --git a/drivers/target/target_core_configfs.c b/drivers/target/target_core_configfs.c index 2764510798b0..caf8dc18ee0a 100644 --- a/drivers/target/target_core_configfs.c +++ b/drivers/target/target_core_configfs.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <linux/parser.h> | 37 | #include <linux/parser.h> |
38 | #include <linux/syscalls.h> | 38 | #include <linux/syscalls.h> |
39 | #include <linux/configfs.h> | 39 | #include <linux/configfs.h> |
40 | #include <linux/proc_fs.h> | ||
41 | 40 | ||
42 | #include <target/target_core_base.h> | 41 | #include <target/target_core_base.h> |
43 | #include <target/target_core_device.h> | 42 | #include <target/target_core_device.h> |
@@ -1971,13 +1970,35 @@ static void target_core_dev_release(struct config_item *item) | |||
1971 | { | 1970 | { |
1972 | struct se_subsystem_dev *se_dev = container_of(to_config_group(item), | 1971 | struct se_subsystem_dev *se_dev = container_of(to_config_group(item), |
1973 | struct se_subsystem_dev, se_dev_group); | 1972 | struct se_subsystem_dev, se_dev_group); |
1974 | struct config_group *dev_cg; | 1973 | struct se_hba *hba = item_to_hba(&se_dev->se_dev_hba->hba_group.cg_item); |
1975 | 1974 | struct se_subsystem_api *t = hba->transport; | |
1976 | if (!(se_dev)) | 1975 | struct config_group *dev_cg = &se_dev->se_dev_group; |
1977 | return; | ||
1978 | 1976 | ||
1979 | dev_cg = &se_dev->se_dev_group; | ||
1980 | kfree(dev_cg->default_groups); | 1977 | kfree(dev_cg->default_groups); |
1978 | /* | ||
1979 | * This pointer will set when the storage is enabled with: | ||
1980 | *`echo 1 > $CONFIGFS/core/$HBA/$DEV/dev_enable` | ||
1981 | */ | ||
1982 | if (se_dev->se_dev_ptr) { | ||
1983 | printk(KERN_INFO "Target_Core_ConfigFS: Calling se_free_" | ||
1984 | "virtual_device() for se_dev_ptr: %p\n", | ||
1985 | se_dev->se_dev_ptr); | ||
1986 | |||
1987 | se_free_virtual_device(se_dev->se_dev_ptr, hba); | ||
1988 | } else { | ||
1989 | /* | ||
1990 | * Release struct se_subsystem_dev->se_dev_su_ptr.. | ||
1991 | */ | ||
1992 | printk(KERN_INFO "Target_Core_ConfigFS: Calling t->free_" | ||
1993 | "device() for se_dev_su_ptr: %p\n", | ||
1994 | se_dev->se_dev_su_ptr); | ||
1995 | |||
1996 | t->free_device(se_dev->se_dev_su_ptr); | ||
1997 | } | ||
1998 | |||
1999 | printk(KERN_INFO "Target_Core_ConfigFS: Deallocating se_subsystem" | ||
2000 | "_dev_t: %p\n", se_dev); | ||
2001 | kfree(se_dev); | ||
1981 | } | 2002 | } |
1982 | 2003 | ||
1983 | static ssize_t target_core_dev_show(struct config_item *item, | 2004 | static ssize_t target_core_dev_show(struct config_item *item, |
@@ -2140,7 +2161,16 @@ static struct configfs_attribute *target_core_alua_lu_gp_attrs[] = { | |||
2140 | NULL, | 2161 | NULL, |
2141 | }; | 2162 | }; |
2142 | 2163 | ||
2164 | static void target_core_alua_lu_gp_release(struct config_item *item) | ||
2165 | { | ||
2166 | struct t10_alua_lu_gp *lu_gp = container_of(to_config_group(item), | ||
2167 | struct t10_alua_lu_gp, lu_gp_group); | ||
2168 | |||
2169 | core_alua_free_lu_gp(lu_gp); | ||
2170 | } | ||
2171 | |||
2143 | static struct configfs_item_operations target_core_alua_lu_gp_ops = { | 2172 | static struct configfs_item_operations target_core_alua_lu_gp_ops = { |
2173 | .release = target_core_alua_lu_gp_release, | ||
2144 | .show_attribute = target_core_alua_lu_gp_attr_show, | 2174 | .show_attribute = target_core_alua_lu_gp_attr_show, |
2145 | .store_attribute = target_core_alua_lu_gp_attr_store, | 2175 | .store_attribute = target_core_alua_lu_gp_attr_store, |
2146 | }; | 2176 | }; |
@@ -2191,9 +2221,11 @@ static void target_core_alua_drop_lu_gp( | |||
2191 | printk(KERN_INFO "Target_Core_ConfigFS: Releasing ALUA Logical Unit" | 2221 | printk(KERN_INFO "Target_Core_ConfigFS: Releasing ALUA Logical Unit" |
2192 | " Group: core/alua/lu_gps/%s, ID: %hu\n", | 2222 | " Group: core/alua/lu_gps/%s, ID: %hu\n", |
2193 | config_item_name(item), lu_gp->lu_gp_id); | 2223 | config_item_name(item), lu_gp->lu_gp_id); |
2194 | 2224 | /* | |
2225 | * core_alua_free_lu_gp() is called from target_core_alua_lu_gp_ops->release() | ||
2226 | * -> target_core_alua_lu_gp_release() | ||
2227 | */ | ||
2195 | config_item_put(item); | 2228 | config_item_put(item); |
2196 | core_alua_free_lu_gp(lu_gp); | ||
2197 | } | 2229 | } |
2198 | 2230 | ||
2199 | static struct configfs_group_operations target_core_alua_lu_gps_group_ops = { | 2231 | static struct configfs_group_operations target_core_alua_lu_gps_group_ops = { |
@@ -2549,7 +2581,16 @@ static struct configfs_attribute *target_core_alua_tg_pt_gp_attrs[] = { | |||
2549 | NULL, | 2581 | NULL, |
2550 | }; | 2582 | }; |
2551 | 2583 | ||
2584 | static void target_core_alua_tg_pt_gp_release(struct config_item *item) | ||
2585 | { | ||
2586 | struct t10_alua_tg_pt_gp *tg_pt_gp = container_of(to_config_group(item), | ||
2587 | struct t10_alua_tg_pt_gp, tg_pt_gp_group); | ||
2588 | |||
2589 | core_alua_free_tg_pt_gp(tg_pt_gp); | ||
2590 | } | ||
2591 | |||
2552 | static struct configfs_item_operations target_core_alua_tg_pt_gp_ops = { | 2592 | static struct configfs_item_operations target_core_alua_tg_pt_gp_ops = { |
2593 | .release = target_core_alua_tg_pt_gp_release, | ||
2553 | .show_attribute = target_core_alua_tg_pt_gp_attr_show, | 2594 | .show_attribute = target_core_alua_tg_pt_gp_attr_show, |
2554 | .store_attribute = target_core_alua_tg_pt_gp_attr_store, | 2595 | .store_attribute = target_core_alua_tg_pt_gp_attr_store, |
2555 | }; | 2596 | }; |
@@ -2602,9 +2643,11 @@ static void target_core_alua_drop_tg_pt_gp( | |||
2602 | printk(KERN_INFO "Target_Core_ConfigFS: Releasing ALUA Target Port" | 2643 | printk(KERN_INFO "Target_Core_ConfigFS: Releasing ALUA Target Port" |
2603 | " Group: alua/tg_pt_gps/%s, ID: %hu\n", | 2644 | " Group: alua/tg_pt_gps/%s, ID: %hu\n", |
2604 | config_item_name(item), tg_pt_gp->tg_pt_gp_id); | 2645 | config_item_name(item), tg_pt_gp->tg_pt_gp_id); |
2605 | 2646 | /* | |
2647 | * core_alua_free_tg_pt_gp() is called from target_core_alua_tg_pt_gp_ops->release() | ||
2648 | * -> target_core_alua_tg_pt_gp_release(). | ||
2649 | */ | ||
2606 | config_item_put(item); | 2650 | config_item_put(item); |
2607 | core_alua_free_tg_pt_gp(tg_pt_gp); | ||
2608 | } | 2651 | } |
2609 | 2652 | ||
2610 | static struct configfs_group_operations target_core_alua_tg_pt_gps_group_ops = { | 2653 | static struct configfs_group_operations target_core_alua_tg_pt_gps_group_ops = { |
@@ -2771,13 +2814,11 @@ static void target_core_drop_subdev( | |||
2771 | struct se_subsystem_api *t; | 2814 | struct se_subsystem_api *t; |
2772 | struct config_item *df_item; | 2815 | struct config_item *df_item; |
2773 | struct config_group *dev_cg, *tg_pt_gp_cg; | 2816 | struct config_group *dev_cg, *tg_pt_gp_cg; |
2774 | int i, ret; | 2817 | int i; |
2775 | 2818 | ||
2776 | hba = item_to_hba(&se_dev->se_dev_hba->hba_group.cg_item); | 2819 | hba = item_to_hba(&se_dev->se_dev_hba->hba_group.cg_item); |
2777 | 2820 | ||
2778 | if (mutex_lock_interruptible(&hba->hba_access_mutex)) | 2821 | mutex_lock(&hba->hba_access_mutex); |
2779 | goto out; | ||
2780 | |||
2781 | t = hba->transport; | 2822 | t = hba->transport; |
2782 | 2823 | ||
2783 | spin_lock(&se_global->g_device_lock); | 2824 | spin_lock(&se_global->g_device_lock); |
@@ -2791,7 +2832,10 @@ static void target_core_drop_subdev( | |||
2791 | config_item_put(df_item); | 2832 | config_item_put(df_item); |
2792 | } | 2833 | } |
2793 | kfree(tg_pt_gp_cg->default_groups); | 2834 | kfree(tg_pt_gp_cg->default_groups); |
2794 | core_alua_free_tg_pt_gp(T10_ALUA(se_dev)->default_tg_pt_gp); | 2835 | /* |
2836 | * core_alua_free_tg_pt_gp() is called from ->default_tg_pt_gp | ||
2837 | * directly from target_core_alua_tg_pt_gp_release(). | ||
2838 | */ | ||
2795 | T10_ALUA(se_dev)->default_tg_pt_gp = NULL; | 2839 | T10_ALUA(se_dev)->default_tg_pt_gp = NULL; |
2796 | 2840 | ||
2797 | dev_cg = &se_dev->se_dev_group; | 2841 | dev_cg = &se_dev->se_dev_group; |
@@ -2800,38 +2844,12 @@ static void target_core_drop_subdev( | |||
2800 | dev_cg->default_groups[i] = NULL; | 2844 | dev_cg->default_groups[i] = NULL; |
2801 | config_item_put(df_item); | 2845 | config_item_put(df_item); |
2802 | } | 2846 | } |
2803 | |||
2804 | config_item_put(item); | ||
2805 | /* | 2847 | /* |
2806 | * This pointer will set when the storage is enabled with: | 2848 | * The releasing of se_dev and associated se_dev->se_dev_ptr is done |
2807 | * `echo 1 > $CONFIGFS/core/$HBA/$DEV/dev_enable` | 2849 | * from target_core_dev_item_ops->release() ->target_core_dev_release(). |
2808 | */ | 2850 | */ |
2809 | if (se_dev->se_dev_ptr) { | 2851 | config_item_put(item); |
2810 | printk(KERN_INFO "Target_Core_ConfigFS: Calling se_free_" | ||
2811 | "virtual_device() for se_dev_ptr: %p\n", | ||
2812 | se_dev->se_dev_ptr); | ||
2813 | |||
2814 | ret = se_free_virtual_device(se_dev->se_dev_ptr, hba); | ||
2815 | if (ret < 0) | ||
2816 | goto hba_out; | ||
2817 | } else { | ||
2818 | /* | ||
2819 | * Release struct se_subsystem_dev->se_dev_su_ptr.. | ||
2820 | */ | ||
2821 | printk(KERN_INFO "Target_Core_ConfigFS: Calling t->free_" | ||
2822 | "device() for se_dev_su_ptr: %p\n", | ||
2823 | se_dev->se_dev_su_ptr); | ||
2824 | |||
2825 | t->free_device(se_dev->se_dev_su_ptr); | ||
2826 | } | ||
2827 | |||
2828 | printk(KERN_INFO "Target_Core_ConfigFS: Deallocating se_subsystem" | ||
2829 | "_dev_t: %p\n", se_dev); | ||
2830 | |||
2831 | hba_out: | ||
2832 | mutex_unlock(&hba->hba_access_mutex); | 2852 | mutex_unlock(&hba->hba_access_mutex); |
2833 | out: | ||
2834 | kfree(se_dev); | ||
2835 | } | 2853 | } |
2836 | 2854 | ||
2837 | static struct configfs_group_operations target_core_hba_group_ops = { | 2855 | static struct configfs_group_operations target_core_hba_group_ops = { |
@@ -2914,6 +2932,13 @@ SE_HBA_ATTR(hba_mode, S_IRUGO | S_IWUSR); | |||
2914 | 2932 | ||
2915 | CONFIGFS_EATTR_OPS(target_core_hba, se_hba, hba_group); | 2933 | CONFIGFS_EATTR_OPS(target_core_hba, se_hba, hba_group); |
2916 | 2934 | ||
2935 | static void target_core_hba_release(struct config_item *item) | ||
2936 | { | ||
2937 | struct se_hba *hba = container_of(to_config_group(item), | ||
2938 | struct se_hba, hba_group); | ||
2939 | core_delete_hba(hba); | ||
2940 | } | ||
2941 | |||
2917 | static struct configfs_attribute *target_core_hba_attrs[] = { | 2942 | static struct configfs_attribute *target_core_hba_attrs[] = { |
2918 | &target_core_hba_hba_info.attr, | 2943 | &target_core_hba_hba_info.attr, |
2919 | &target_core_hba_hba_mode.attr, | 2944 | &target_core_hba_hba_mode.attr, |
@@ -2921,6 +2946,7 @@ static struct configfs_attribute *target_core_hba_attrs[] = { | |||
2921 | }; | 2946 | }; |
2922 | 2947 | ||
2923 | static struct configfs_item_operations target_core_hba_item_ops = { | 2948 | static struct configfs_item_operations target_core_hba_item_ops = { |
2949 | .release = target_core_hba_release, | ||
2924 | .show_attribute = target_core_hba_attr_show, | 2950 | .show_attribute = target_core_hba_attr_show, |
2925 | .store_attribute = target_core_hba_attr_store, | 2951 | .store_attribute = target_core_hba_attr_store, |
2926 | }; | 2952 | }; |
@@ -2997,10 +3023,11 @@ static void target_core_call_delhbafromtarget( | |||
2997 | struct config_group *group, | 3023 | struct config_group *group, |
2998 | struct config_item *item) | 3024 | struct config_item *item) |
2999 | { | 3025 | { |
3000 | struct se_hba *hba = item_to_hba(item); | 3026 | /* |
3001 | 3027 | * core_delete_hba() is called from target_core_hba_item_ops->release() | |
3028 | * -> target_core_hba_release() | ||
3029 | */ | ||
3002 | config_item_put(item); | 3030 | config_item_put(item); |
3003 | core_delete_hba(hba); | ||
3004 | } | 3031 | } |
3005 | 3032 | ||
3006 | static struct configfs_group_operations target_core_group_ops = { | 3033 | static struct configfs_group_operations target_core_group_ops = { |
@@ -3022,7 +3049,6 @@ static int target_core_init_configfs(void) | |||
3022 | struct config_group *target_cg, *hba_cg = NULL, *alua_cg = NULL; | 3049 | struct config_group *target_cg, *hba_cg = NULL, *alua_cg = NULL; |
3023 | struct config_group *lu_gp_cg = NULL; | 3050 | struct config_group *lu_gp_cg = NULL; |
3024 | struct configfs_subsystem *subsys; | 3051 | struct configfs_subsystem *subsys; |
3025 | struct proc_dir_entry *scsi_target_proc = NULL; | ||
3026 | struct t10_alua_lu_gp *lu_gp; | 3052 | struct t10_alua_lu_gp *lu_gp; |
3027 | int ret; | 3053 | int ret; |
3028 | 3054 | ||
@@ -3128,21 +3154,10 @@ static int target_core_init_configfs(void) | |||
3128 | if (core_dev_setup_virtual_lun0() < 0) | 3154 | if (core_dev_setup_virtual_lun0() < 0) |
3129 | goto out; | 3155 | goto out; |
3130 | 3156 | ||
3131 | scsi_target_proc = proc_mkdir("scsi_target", 0); | ||
3132 | if (!(scsi_target_proc)) { | ||
3133 | printk(KERN_ERR "proc_mkdir(scsi_target, 0) failed\n"); | ||
3134 | goto out; | ||
3135 | } | ||
3136 | ret = init_scsi_target_mib(); | ||
3137 | if (ret < 0) | ||
3138 | goto out; | ||
3139 | |||
3140 | return 0; | 3157 | return 0; |
3141 | 3158 | ||
3142 | out: | 3159 | out: |
3143 | configfs_unregister_subsystem(subsys); | 3160 | configfs_unregister_subsystem(subsys); |
3144 | if (scsi_target_proc) | ||
3145 | remove_proc_entry("scsi_target", 0); | ||
3146 | core_dev_release_virtual_lun0(); | 3161 | core_dev_release_virtual_lun0(); |
3147 | rd_module_exit(); | 3162 | rd_module_exit(); |
3148 | out_global: | 3163 | out_global: |
@@ -3178,8 +3193,7 @@ static void target_core_exit_configfs(void) | |||
3178 | config_item_put(item); | 3193 | config_item_put(item); |
3179 | } | 3194 | } |
3180 | kfree(lu_gp_cg->default_groups); | 3195 | kfree(lu_gp_cg->default_groups); |
3181 | core_alua_free_lu_gp(se_global->default_lu_gp); | 3196 | lu_gp_cg->default_groups = NULL; |
3182 | se_global->default_lu_gp = NULL; | ||
3183 | 3197 | ||
3184 | alua_cg = &se_global->alua_group; | 3198 | alua_cg = &se_global->alua_group; |
3185 | for (i = 0; alua_cg->default_groups[i]; i++) { | 3199 | for (i = 0; alua_cg->default_groups[i]; i++) { |
@@ -3188,6 +3202,7 @@ static void target_core_exit_configfs(void) | |||
3188 | config_item_put(item); | 3202 | config_item_put(item); |
3189 | } | 3203 | } |
3190 | kfree(alua_cg->default_groups); | 3204 | kfree(alua_cg->default_groups); |
3205 | alua_cg->default_groups = NULL; | ||
3191 | 3206 | ||
3192 | hba_cg = &se_global->target_core_hbagroup; | 3207 | hba_cg = &se_global->target_core_hbagroup; |
3193 | for (i = 0; hba_cg->default_groups[i]; i++) { | 3208 | for (i = 0; hba_cg->default_groups[i]; i++) { |
@@ -3196,20 +3211,20 @@ static void target_core_exit_configfs(void) | |||
3196 | config_item_put(item); | 3211 | config_item_put(item); |
3197 | } | 3212 | } |
3198 | kfree(hba_cg->default_groups); | 3213 | kfree(hba_cg->default_groups); |
3199 | 3214 | hba_cg->default_groups = NULL; | |
3200 | for (i = 0; subsys->su_group.default_groups[i]; i++) { | 3215 | /* |
3201 | item = &subsys->su_group.default_groups[i]->cg_item; | 3216 | * We expect subsys->su_group.default_groups to be released |
3202 | subsys->su_group.default_groups[i] = NULL; | 3217 | * by configfs subsystem provider logic.. |
3203 | config_item_put(item); | 3218 | */ |
3204 | } | 3219 | configfs_unregister_subsystem(subsys); |
3205 | kfree(subsys->su_group.default_groups); | 3220 | kfree(subsys->su_group.default_groups); |
3206 | 3221 | ||
3207 | configfs_unregister_subsystem(subsys); | 3222 | core_alua_free_lu_gp(se_global->default_lu_gp); |
3223 | se_global->default_lu_gp = NULL; | ||
3224 | |||
3208 | printk(KERN_INFO "TARGET_CORE[0]: Released ConfigFS Fabric" | 3225 | printk(KERN_INFO "TARGET_CORE[0]: Released ConfigFS Fabric" |
3209 | " Infrastructure\n"); | 3226 | " Infrastructure\n"); |
3210 | 3227 | ||
3211 | remove_scsi_target_mib(); | ||
3212 | remove_proc_entry("scsi_target", 0); | ||
3213 | core_dev_release_virtual_lun0(); | 3228 | core_dev_release_virtual_lun0(); |
3214 | rd_module_exit(); | 3229 | rd_module_exit(); |
3215 | release_se_global(); | 3230 | release_se_global(); |
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c index 317ce58d426d..5da051a07fa3 100644 --- a/drivers/target/target_core_device.c +++ b/drivers/target/target_core_device.c | |||
@@ -373,11 +373,11 @@ int core_update_device_list_for_node( | |||
373 | /* | 373 | /* |
374 | * deve->se_lun_acl will be NULL for demo-mode created LUNs | 374 | * deve->se_lun_acl will be NULL for demo-mode created LUNs |
375 | * that have not been explictly concerted to MappedLUNs -> | 375 | * that have not been explictly concerted to MappedLUNs -> |
376 | * struct se_lun_acl. | 376 | * struct se_lun_acl, but we remove deve->alua_port_list from |
377 | * port->sep_alua_list. This also means that active UAs and | ||
378 | * NodeACL context specific PR metadata for demo-mode | ||
379 | * MappedLUN *deve will be released below.. | ||
377 | */ | 380 | */ |
378 | if (!(deve->se_lun_acl)) | ||
379 | return 0; | ||
380 | |||
381 | spin_lock_bh(&port->sep_alua_lock); | 381 | spin_lock_bh(&port->sep_alua_lock); |
382 | list_del(&deve->alua_port_list); | 382 | list_del(&deve->alua_port_list); |
383 | spin_unlock_bh(&port->sep_alua_lock); | 383 | spin_unlock_bh(&port->sep_alua_lock); |
@@ -395,12 +395,14 @@ int core_update_device_list_for_node( | |||
395 | printk(KERN_ERR "struct se_dev_entry->se_lun_acl" | 395 | printk(KERN_ERR "struct se_dev_entry->se_lun_acl" |
396 | " already set for demo mode -> explict" | 396 | " already set for demo mode -> explict" |
397 | " LUN ACL transition\n"); | 397 | " LUN ACL transition\n"); |
398 | spin_unlock_irq(&nacl->device_list_lock); | ||
398 | return -1; | 399 | return -1; |
399 | } | 400 | } |
400 | if (deve->se_lun != lun) { | 401 | if (deve->se_lun != lun) { |
401 | printk(KERN_ERR "struct se_dev_entry->se_lun does" | 402 | printk(KERN_ERR "struct se_dev_entry->se_lun does" |
402 | " match passed struct se_lun for demo mode" | 403 | " match passed struct se_lun for demo mode" |
403 | " -> explict LUN ACL transition\n"); | 404 | " -> explict LUN ACL transition\n"); |
405 | spin_unlock_irq(&nacl->device_list_lock); | ||
404 | return -1; | 406 | return -1; |
405 | } | 407 | } |
406 | deve->se_lun_acl = lun_acl; | 408 | deve->se_lun_acl = lun_acl; |
@@ -865,9 +867,6 @@ static void se_dev_stop(struct se_device *dev) | |||
865 | } | 867 | } |
866 | } | 868 | } |
867 | spin_unlock(&hba->device_lock); | 869 | spin_unlock(&hba->device_lock); |
868 | |||
869 | while (atomic_read(&hba->dev_mib_access_count)) | ||
870 | cpu_relax(); | ||
871 | } | 870 | } |
872 | 871 | ||
873 | int se_dev_check_online(struct se_device *dev) | 872 | int se_dev_check_online(struct se_device *dev) |
diff --git a/drivers/target/target_core_fabric_configfs.c b/drivers/target/target_core_fabric_configfs.c index 32b148d7e261..b65d1c8e7740 100644 --- a/drivers/target/target_core_fabric_configfs.c +++ b/drivers/target/target_core_fabric_configfs.c | |||
@@ -214,12 +214,22 @@ TCM_MAPPEDLUN_ATTR(write_protect, S_IRUGO | S_IWUSR); | |||
214 | 214 | ||
215 | CONFIGFS_EATTR_OPS(target_fabric_mappedlun, se_lun_acl, se_lun_group); | 215 | CONFIGFS_EATTR_OPS(target_fabric_mappedlun, se_lun_acl, se_lun_group); |
216 | 216 | ||
217 | static void target_fabric_mappedlun_release(struct config_item *item) | ||
218 | { | ||
219 | struct se_lun_acl *lacl = container_of(to_config_group(item), | ||
220 | struct se_lun_acl, se_lun_group); | ||
221 | struct se_portal_group *se_tpg = lacl->se_lun_nacl->se_tpg; | ||
222 | |||
223 | core_dev_free_initiator_node_lun_acl(se_tpg, lacl); | ||
224 | } | ||
225 | |||
217 | static struct configfs_attribute *target_fabric_mappedlun_attrs[] = { | 226 | static struct configfs_attribute *target_fabric_mappedlun_attrs[] = { |
218 | &target_fabric_mappedlun_write_protect.attr, | 227 | &target_fabric_mappedlun_write_protect.attr, |
219 | NULL, | 228 | NULL, |
220 | }; | 229 | }; |
221 | 230 | ||
222 | static struct configfs_item_operations target_fabric_mappedlun_item_ops = { | 231 | static struct configfs_item_operations target_fabric_mappedlun_item_ops = { |
232 | .release = target_fabric_mappedlun_release, | ||
223 | .show_attribute = target_fabric_mappedlun_attr_show, | 233 | .show_attribute = target_fabric_mappedlun_attr_show, |
224 | .store_attribute = target_fabric_mappedlun_attr_store, | 234 | .store_attribute = target_fabric_mappedlun_attr_store, |
225 | .allow_link = target_fabric_mappedlun_link, | 235 | .allow_link = target_fabric_mappedlun_link, |
@@ -337,15 +347,21 @@ static void target_fabric_drop_mappedlun( | |||
337 | struct config_group *group, | 347 | struct config_group *group, |
338 | struct config_item *item) | 348 | struct config_item *item) |
339 | { | 349 | { |
340 | struct se_lun_acl *lacl = container_of(to_config_group(item), | ||
341 | struct se_lun_acl, se_lun_group); | ||
342 | struct se_portal_group *se_tpg = lacl->se_lun_nacl->se_tpg; | ||
343 | |||
344 | config_item_put(item); | 350 | config_item_put(item); |
345 | core_dev_free_initiator_node_lun_acl(se_tpg, lacl); | 351 | } |
352 | |||
353 | static void target_fabric_nacl_base_release(struct config_item *item) | ||
354 | { | ||
355 | struct se_node_acl *se_nacl = container_of(to_config_group(item), | ||
356 | struct se_node_acl, acl_group); | ||
357 | struct se_portal_group *se_tpg = se_nacl->se_tpg; | ||
358 | struct target_fabric_configfs *tf = se_tpg->se_tpg_wwn->wwn_tf; | ||
359 | |||
360 | tf->tf_ops.fabric_drop_nodeacl(se_nacl); | ||
346 | } | 361 | } |
347 | 362 | ||
348 | static struct configfs_item_operations target_fabric_nacl_base_item_ops = { | 363 | static struct configfs_item_operations target_fabric_nacl_base_item_ops = { |
364 | .release = target_fabric_nacl_base_release, | ||
349 | .show_attribute = target_fabric_nacl_base_attr_show, | 365 | .show_attribute = target_fabric_nacl_base_attr_show, |
350 | .store_attribute = target_fabric_nacl_base_attr_store, | 366 | .store_attribute = target_fabric_nacl_base_attr_store, |
351 | }; | 367 | }; |
@@ -404,9 +420,6 @@ static void target_fabric_drop_nodeacl( | |||
404 | struct config_group *group, | 420 | struct config_group *group, |
405 | struct config_item *item) | 421 | struct config_item *item) |
406 | { | 422 | { |
407 | struct se_portal_group *se_tpg = container_of(group, | ||
408 | struct se_portal_group, tpg_acl_group); | ||
409 | struct target_fabric_configfs *tf = se_tpg->se_tpg_wwn->wwn_tf; | ||
410 | struct se_node_acl *se_nacl = container_of(to_config_group(item), | 423 | struct se_node_acl *se_nacl = container_of(to_config_group(item), |
411 | struct se_node_acl, acl_group); | 424 | struct se_node_acl, acl_group); |
412 | struct config_item *df_item; | 425 | struct config_item *df_item; |
@@ -419,9 +432,10 @@ static void target_fabric_drop_nodeacl( | |||
419 | nacl_cg->default_groups[i] = NULL; | 432 | nacl_cg->default_groups[i] = NULL; |
420 | config_item_put(df_item); | 433 | config_item_put(df_item); |
421 | } | 434 | } |
422 | 435 | /* | |
436 | * struct se_node_acl free is done in target_fabric_nacl_base_release() | ||
437 | */ | ||
423 | config_item_put(item); | 438 | config_item_put(item); |
424 | tf->tf_ops.fabric_drop_nodeacl(se_nacl); | ||
425 | } | 439 | } |
426 | 440 | ||
427 | static struct configfs_group_operations target_fabric_nacl_group_ops = { | 441 | static struct configfs_group_operations target_fabric_nacl_group_ops = { |
@@ -437,7 +451,18 @@ TF_CIT_SETUP(tpg_nacl, NULL, &target_fabric_nacl_group_ops, NULL); | |||
437 | 451 | ||
438 | CONFIGFS_EATTR_OPS(target_fabric_np_base, se_tpg_np, tpg_np_group); | 452 | CONFIGFS_EATTR_OPS(target_fabric_np_base, se_tpg_np, tpg_np_group); |
439 | 453 | ||
454 | static void target_fabric_np_base_release(struct config_item *item) | ||
455 | { | ||
456 | struct se_tpg_np *se_tpg_np = container_of(to_config_group(item), | ||
457 | struct se_tpg_np, tpg_np_group); | ||
458 | struct se_portal_group *se_tpg = se_tpg_np->tpg_np_parent; | ||
459 | struct target_fabric_configfs *tf = se_tpg->se_tpg_wwn->wwn_tf; | ||
460 | |||
461 | tf->tf_ops.fabric_drop_np(se_tpg_np); | ||
462 | } | ||
463 | |||
440 | static struct configfs_item_operations target_fabric_np_base_item_ops = { | 464 | static struct configfs_item_operations target_fabric_np_base_item_ops = { |
465 | .release = target_fabric_np_base_release, | ||
441 | .show_attribute = target_fabric_np_base_attr_show, | 466 | .show_attribute = target_fabric_np_base_attr_show, |
442 | .store_attribute = target_fabric_np_base_attr_store, | 467 | .store_attribute = target_fabric_np_base_attr_store, |
443 | }; | 468 | }; |
@@ -466,6 +491,7 @@ static struct config_group *target_fabric_make_np( | |||
466 | if (!(se_tpg_np) || IS_ERR(se_tpg_np)) | 491 | if (!(se_tpg_np) || IS_ERR(se_tpg_np)) |
467 | return ERR_PTR(-EINVAL); | 492 | return ERR_PTR(-EINVAL); |
468 | 493 | ||
494 | se_tpg_np->tpg_np_parent = se_tpg; | ||
469 | config_group_init_type_name(&se_tpg_np->tpg_np_group, name, | 495 | config_group_init_type_name(&se_tpg_np->tpg_np_group, name, |
470 | &TF_CIT_TMPL(tf)->tfc_tpg_np_base_cit); | 496 | &TF_CIT_TMPL(tf)->tfc_tpg_np_base_cit); |
471 | 497 | ||
@@ -476,14 +502,10 @@ static void target_fabric_drop_np( | |||
476 | struct config_group *group, | 502 | struct config_group *group, |
477 | struct config_item *item) | 503 | struct config_item *item) |
478 | { | 504 | { |
479 | struct se_portal_group *se_tpg = container_of(group, | 505 | /* |
480 | struct se_portal_group, tpg_np_group); | 506 | * struct se_tpg_np is released via target_fabric_np_base_release() |
481 | struct target_fabric_configfs *tf = se_tpg->se_tpg_wwn->wwn_tf; | 507 | */ |
482 | struct se_tpg_np *se_tpg_np = container_of(to_config_group(item), | ||
483 | struct se_tpg_np, tpg_np_group); | ||
484 | |||
485 | config_item_put(item); | 508 | config_item_put(item); |
486 | tf->tf_ops.fabric_drop_np(se_tpg_np); | ||
487 | } | 509 | } |
488 | 510 | ||
489 | static struct configfs_group_operations target_fabric_np_group_ops = { | 511 | static struct configfs_group_operations target_fabric_np_group_ops = { |
@@ -814,7 +836,18 @@ TF_CIT_SETUP(tpg_param, &target_fabric_tpg_param_item_ops, NULL, NULL); | |||
814 | */ | 836 | */ |
815 | CONFIGFS_EATTR_OPS(target_fabric_tpg, se_portal_group, tpg_group); | 837 | CONFIGFS_EATTR_OPS(target_fabric_tpg, se_portal_group, tpg_group); |
816 | 838 | ||
839 | static void target_fabric_tpg_release(struct config_item *item) | ||
840 | { | ||
841 | struct se_portal_group *se_tpg = container_of(to_config_group(item), | ||
842 | struct se_portal_group, tpg_group); | ||
843 | struct se_wwn *wwn = se_tpg->se_tpg_wwn; | ||
844 | struct target_fabric_configfs *tf = wwn->wwn_tf; | ||
845 | |||
846 | tf->tf_ops.fabric_drop_tpg(se_tpg); | ||
847 | } | ||
848 | |||
817 | static struct configfs_item_operations target_fabric_tpg_base_item_ops = { | 849 | static struct configfs_item_operations target_fabric_tpg_base_item_ops = { |
850 | .release = target_fabric_tpg_release, | ||
818 | .show_attribute = target_fabric_tpg_attr_show, | 851 | .show_attribute = target_fabric_tpg_attr_show, |
819 | .store_attribute = target_fabric_tpg_attr_store, | 852 | .store_attribute = target_fabric_tpg_attr_store, |
820 | }; | 853 | }; |
@@ -872,8 +905,6 @@ static void target_fabric_drop_tpg( | |||
872 | struct config_group *group, | 905 | struct config_group *group, |
873 | struct config_item *item) | 906 | struct config_item *item) |
874 | { | 907 | { |
875 | struct se_wwn *wwn = container_of(group, struct se_wwn, wwn_group); | ||
876 | struct target_fabric_configfs *tf = wwn->wwn_tf; | ||
877 | struct se_portal_group *se_tpg = container_of(to_config_group(item), | 908 | struct se_portal_group *se_tpg = container_of(to_config_group(item), |
878 | struct se_portal_group, tpg_group); | 909 | struct se_portal_group, tpg_group); |
879 | struct config_group *tpg_cg = &se_tpg->tpg_group; | 910 | struct config_group *tpg_cg = &se_tpg->tpg_group; |
@@ -890,15 +921,28 @@ static void target_fabric_drop_tpg( | |||
890 | } | 921 | } |
891 | 922 | ||
892 | config_item_put(item); | 923 | config_item_put(item); |
893 | tf->tf_ops.fabric_drop_tpg(se_tpg); | ||
894 | } | 924 | } |
895 | 925 | ||
926 | static void target_fabric_release_wwn(struct config_item *item) | ||
927 | { | ||
928 | struct se_wwn *wwn = container_of(to_config_group(item), | ||
929 | struct se_wwn, wwn_group); | ||
930 | struct target_fabric_configfs *tf = wwn->wwn_tf; | ||
931 | |||
932 | tf->tf_ops.fabric_drop_wwn(wwn); | ||
933 | } | ||
934 | |||
935 | static struct configfs_item_operations target_fabric_tpg_item_ops = { | ||
936 | .release = target_fabric_release_wwn, | ||
937 | }; | ||
938 | |||
896 | static struct configfs_group_operations target_fabric_tpg_group_ops = { | 939 | static struct configfs_group_operations target_fabric_tpg_group_ops = { |
897 | .make_group = target_fabric_make_tpg, | 940 | .make_group = target_fabric_make_tpg, |
898 | .drop_item = target_fabric_drop_tpg, | 941 | .drop_item = target_fabric_drop_tpg, |
899 | }; | 942 | }; |
900 | 943 | ||
901 | TF_CIT_SETUP(tpg, NULL, &target_fabric_tpg_group_ops, NULL); | 944 | TF_CIT_SETUP(tpg, &target_fabric_tpg_item_ops, &target_fabric_tpg_group_ops, |
945 | NULL); | ||
902 | 946 | ||
903 | /* End of tfc_tpg_cit */ | 947 | /* End of tfc_tpg_cit */ |
904 | 948 | ||
@@ -932,13 +976,7 @@ static void target_fabric_drop_wwn( | |||
932 | struct config_group *group, | 976 | struct config_group *group, |
933 | struct config_item *item) | 977 | struct config_item *item) |
934 | { | 978 | { |
935 | struct target_fabric_configfs *tf = container_of(group, | ||
936 | struct target_fabric_configfs, tf_group); | ||
937 | struct se_wwn *wwn = container_of(to_config_group(item), | ||
938 | struct se_wwn, wwn_group); | ||
939 | |||
940 | config_item_put(item); | 979 | config_item_put(item); |
941 | tf->tf_ops.fabric_drop_wwn(wwn); | ||
942 | } | 980 | } |
943 | 981 | ||
944 | static struct configfs_group_operations target_fabric_wwn_group_ops = { | 982 | static struct configfs_group_operations target_fabric_wwn_group_ops = { |
diff --git a/drivers/target/target_core_iblock.c b/drivers/target/target_core_iblock.c index c6e0d757e76e..67f0c09983c8 100644 --- a/drivers/target/target_core_iblock.c +++ b/drivers/target/target_core_iblock.c | |||
@@ -154,7 +154,7 @@ static struct se_device *iblock_create_virtdevice( | |||
154 | 154 | ||
155 | bd = blkdev_get_by_path(ib_dev->ibd_udev_path, | 155 | bd = blkdev_get_by_path(ib_dev->ibd_udev_path, |
156 | FMODE_WRITE|FMODE_READ|FMODE_EXCL, ib_dev); | 156 | FMODE_WRITE|FMODE_READ|FMODE_EXCL, ib_dev); |
157 | if (!(bd)) | 157 | if (IS_ERR(bd)) |
158 | goto failed; | 158 | goto failed; |
159 | /* | 159 | /* |
160 | * Setup the local scope queue_limits from struct request_queue->limits | 160 | * Setup the local scope queue_limits from struct request_queue->limits |
@@ -220,8 +220,10 @@ static void iblock_free_device(void *p) | |||
220 | { | 220 | { |
221 | struct iblock_dev *ib_dev = p; | 221 | struct iblock_dev *ib_dev = p; |
222 | 222 | ||
223 | blkdev_put(ib_dev->ibd_bd, FMODE_WRITE|FMODE_READ|FMODE_EXCL); | 223 | if (ib_dev->ibd_bd != NULL) |
224 | bioset_free(ib_dev->ibd_bio_set); | 224 | blkdev_put(ib_dev->ibd_bd, FMODE_WRITE|FMODE_READ|FMODE_EXCL); |
225 | if (ib_dev->ibd_bio_set != NULL) | ||
226 | bioset_free(ib_dev->ibd_bio_set); | ||
225 | kfree(ib_dev); | 227 | kfree(ib_dev); |
226 | } | 228 | } |
227 | 229 | ||
diff --git a/drivers/target/target_core_mib.c b/drivers/target/target_core_mib.c deleted file mode 100644 index d5a48aa0d2d1..000000000000 --- a/drivers/target/target_core_mib.c +++ /dev/null | |||
@@ -1,1078 +0,0 @@ | |||
1 | /******************************************************************************* | ||
2 | * Filename: target_core_mib.c | ||
3 | * | ||
4 | * Copyright (c) 2006-2007 SBE, Inc. All Rights Reserved. | ||
5 | * Copyright (c) 2007-2010 Rising Tide Systems | ||
6 | * Copyright (c) 2008-2010 Linux-iSCSI.org | ||
7 | * | ||
8 | * Nicholas A. Bellinger <nab@linux-iscsi.org> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
23 | * | ||
24 | ******************************************************************************/ | ||
25 | |||
26 | |||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/delay.h> | ||
30 | #include <linux/timer.h> | ||
31 | #include <linux/string.h> | ||
32 | #include <linux/version.h> | ||
33 | #include <generated/utsrelease.h> | ||
34 | #include <linux/utsname.h> | ||
35 | #include <linux/proc_fs.h> | ||
36 | #include <linux/seq_file.h> | ||
37 | #include <linux/blkdev.h> | ||
38 | #include <scsi/scsi.h> | ||
39 | #include <scsi/scsi_device.h> | ||
40 | #include <scsi/scsi_host.h> | ||
41 | |||
42 | #include <target/target_core_base.h> | ||
43 | #include <target/target_core_transport.h> | ||
44 | #include <target/target_core_fabric_ops.h> | ||
45 | #include <target/target_core_configfs.h> | ||
46 | |||
47 | #include "target_core_hba.h" | ||
48 | #include "target_core_mib.h" | ||
49 | |||
50 | /* SCSI mib table index */ | ||
51 | static struct scsi_index_table scsi_index_table; | ||
52 | |||
53 | #ifndef INITIAL_JIFFIES | ||
54 | #define INITIAL_JIFFIES ((unsigned long)(unsigned int) (-300*HZ)) | ||
55 | #endif | ||
56 | |||
57 | /* SCSI Instance Table */ | ||
58 | #define SCSI_INST_SW_INDEX 1 | ||
59 | #define SCSI_TRANSPORT_INDEX 1 | ||
60 | |||
61 | #define NONE "None" | ||
62 | #define ISPRINT(a) ((a >= ' ') && (a <= '~')) | ||
63 | |||
64 | static inline int list_is_first(const struct list_head *list, | ||
65 | const struct list_head *head) | ||
66 | { | ||
67 | return list->prev == head; | ||
68 | } | ||
69 | |||
70 | static void *locate_hba_start( | ||
71 | struct seq_file *seq, | ||
72 | loff_t *pos) | ||
73 | { | ||
74 | spin_lock(&se_global->g_device_lock); | ||
75 | return seq_list_start(&se_global->g_se_dev_list, *pos); | ||
76 | } | ||
77 | |||
78 | static void *locate_hba_next( | ||
79 | struct seq_file *seq, | ||
80 | void *v, | ||
81 | loff_t *pos) | ||
82 | { | ||
83 | return seq_list_next(v, &se_global->g_se_dev_list, pos); | ||
84 | } | ||
85 | |||
86 | static void locate_hba_stop(struct seq_file *seq, void *v) | ||
87 | { | ||
88 | spin_unlock(&se_global->g_device_lock); | ||
89 | } | ||
90 | |||
91 | /**************************************************************************** | ||
92 | * SCSI MIB Tables | ||
93 | ****************************************************************************/ | ||
94 | |||
95 | /* | ||
96 | * SCSI Instance Table | ||
97 | */ | ||
98 | static void *scsi_inst_seq_start( | ||
99 | struct seq_file *seq, | ||
100 | loff_t *pos) | ||
101 | { | ||
102 | spin_lock(&se_global->hba_lock); | ||
103 | return seq_list_start(&se_global->g_hba_list, *pos); | ||
104 | } | ||
105 | |||
106 | static void *scsi_inst_seq_next( | ||
107 | struct seq_file *seq, | ||
108 | void *v, | ||
109 | loff_t *pos) | ||
110 | { | ||
111 | return seq_list_next(v, &se_global->g_hba_list, pos); | ||
112 | } | ||
113 | |||
114 | static void scsi_inst_seq_stop(struct seq_file *seq, void *v) | ||
115 | { | ||
116 | spin_unlock(&se_global->hba_lock); | ||
117 | } | ||
118 | |||
119 | static int scsi_inst_seq_show(struct seq_file *seq, void *v) | ||
120 | { | ||
121 | struct se_hba *hba = list_entry(v, struct se_hba, hba_list); | ||
122 | |||
123 | if (list_is_first(&hba->hba_list, &se_global->g_hba_list)) | ||
124 | seq_puts(seq, "inst sw_indx\n"); | ||
125 | |||
126 | seq_printf(seq, "%u %u\n", hba->hba_index, SCSI_INST_SW_INDEX); | ||
127 | seq_printf(seq, "plugin: %s version: %s\n", | ||
128 | hba->transport->name, TARGET_CORE_VERSION); | ||
129 | |||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | static const struct seq_operations scsi_inst_seq_ops = { | ||
134 | .start = scsi_inst_seq_start, | ||
135 | .next = scsi_inst_seq_next, | ||
136 | .stop = scsi_inst_seq_stop, | ||
137 | .show = scsi_inst_seq_show | ||
138 | }; | ||
139 | |||
140 | static int scsi_inst_seq_open(struct inode *inode, struct file *file) | ||
141 | { | ||
142 | return seq_open(file, &scsi_inst_seq_ops); | ||
143 | } | ||
144 | |||
145 | static const struct file_operations scsi_inst_seq_fops = { | ||
146 | .owner = THIS_MODULE, | ||
147 | .open = scsi_inst_seq_open, | ||
148 | .read = seq_read, | ||
149 | .llseek = seq_lseek, | ||
150 | .release = seq_release, | ||
151 | }; | ||
152 | |||
153 | /* | ||
154 | * SCSI Device Table | ||
155 | */ | ||
156 | static void *scsi_dev_seq_start(struct seq_file *seq, loff_t *pos) | ||
157 | { | ||
158 | return locate_hba_start(seq, pos); | ||
159 | } | ||
160 | |||
161 | static void *scsi_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
162 | { | ||
163 | return locate_hba_next(seq, v, pos); | ||
164 | } | ||
165 | |||
166 | static void scsi_dev_seq_stop(struct seq_file *seq, void *v) | ||
167 | { | ||
168 | locate_hba_stop(seq, v); | ||
169 | } | ||
170 | |||
171 | static int scsi_dev_seq_show(struct seq_file *seq, void *v) | ||
172 | { | ||
173 | struct se_hba *hba; | ||
174 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
175 | g_se_dev_list); | ||
176 | struct se_device *dev = se_dev->se_dev_ptr; | ||
177 | char str[28]; | ||
178 | int k; | ||
179 | |||
180 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
181 | seq_puts(seq, "inst indx role ports\n"); | ||
182 | |||
183 | if (!(dev)) | ||
184 | return 0; | ||
185 | |||
186 | hba = dev->se_hba; | ||
187 | if (!(hba)) { | ||
188 | /* Log error ? */ | ||
189 | return 0; | ||
190 | } | ||
191 | |||
192 | seq_printf(seq, "%u %u %s %u\n", hba->hba_index, | ||
193 | dev->dev_index, "Target", dev->dev_port_count); | ||
194 | |||
195 | memcpy(&str[0], (void *)DEV_T10_WWN(dev), 28); | ||
196 | |||
197 | /* vendor */ | ||
198 | for (k = 0; k < 8; k++) | ||
199 | str[k] = ISPRINT(DEV_T10_WWN(dev)->vendor[k]) ? | ||
200 | DEV_T10_WWN(dev)->vendor[k] : 0x20; | ||
201 | str[k] = 0x20; | ||
202 | |||
203 | /* model */ | ||
204 | for (k = 0; k < 16; k++) | ||
205 | str[k+9] = ISPRINT(DEV_T10_WWN(dev)->model[k]) ? | ||
206 | DEV_T10_WWN(dev)->model[k] : 0x20; | ||
207 | str[k + 9] = 0; | ||
208 | |||
209 | seq_printf(seq, "dev_alias: %s\n", str); | ||
210 | |||
211 | return 0; | ||
212 | } | ||
213 | |||
214 | static const struct seq_operations scsi_dev_seq_ops = { | ||
215 | .start = scsi_dev_seq_start, | ||
216 | .next = scsi_dev_seq_next, | ||
217 | .stop = scsi_dev_seq_stop, | ||
218 | .show = scsi_dev_seq_show | ||
219 | }; | ||
220 | |||
221 | static int scsi_dev_seq_open(struct inode *inode, struct file *file) | ||
222 | { | ||
223 | return seq_open(file, &scsi_dev_seq_ops); | ||
224 | } | ||
225 | |||
226 | static const struct file_operations scsi_dev_seq_fops = { | ||
227 | .owner = THIS_MODULE, | ||
228 | .open = scsi_dev_seq_open, | ||
229 | .read = seq_read, | ||
230 | .llseek = seq_lseek, | ||
231 | .release = seq_release, | ||
232 | }; | ||
233 | |||
234 | /* | ||
235 | * SCSI Port Table | ||
236 | */ | ||
237 | static void *scsi_port_seq_start(struct seq_file *seq, loff_t *pos) | ||
238 | { | ||
239 | return locate_hba_start(seq, pos); | ||
240 | } | ||
241 | |||
242 | static void *scsi_port_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
243 | { | ||
244 | return locate_hba_next(seq, v, pos); | ||
245 | } | ||
246 | |||
247 | static void scsi_port_seq_stop(struct seq_file *seq, void *v) | ||
248 | { | ||
249 | locate_hba_stop(seq, v); | ||
250 | } | ||
251 | |||
252 | static int scsi_port_seq_show(struct seq_file *seq, void *v) | ||
253 | { | ||
254 | struct se_hba *hba; | ||
255 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
256 | g_se_dev_list); | ||
257 | struct se_device *dev = se_dev->se_dev_ptr; | ||
258 | struct se_port *sep, *sep_tmp; | ||
259 | |||
260 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
261 | seq_puts(seq, "inst device indx role busy_count\n"); | ||
262 | |||
263 | if (!(dev)) | ||
264 | return 0; | ||
265 | |||
266 | hba = dev->se_hba; | ||
267 | if (!(hba)) { | ||
268 | /* Log error ? */ | ||
269 | return 0; | ||
270 | } | ||
271 | |||
272 | /* FIXME: scsiPortBusyStatuses count */ | ||
273 | spin_lock(&dev->se_port_lock); | ||
274 | list_for_each_entry_safe(sep, sep_tmp, &dev->dev_sep_list, sep_list) { | ||
275 | seq_printf(seq, "%u %u %u %s%u %u\n", hba->hba_index, | ||
276 | dev->dev_index, sep->sep_index, "Device", | ||
277 | dev->dev_index, 0); | ||
278 | } | ||
279 | spin_unlock(&dev->se_port_lock); | ||
280 | |||
281 | return 0; | ||
282 | } | ||
283 | |||
284 | static const struct seq_operations scsi_port_seq_ops = { | ||
285 | .start = scsi_port_seq_start, | ||
286 | .next = scsi_port_seq_next, | ||
287 | .stop = scsi_port_seq_stop, | ||
288 | .show = scsi_port_seq_show | ||
289 | }; | ||
290 | |||
291 | static int scsi_port_seq_open(struct inode *inode, struct file *file) | ||
292 | { | ||
293 | return seq_open(file, &scsi_port_seq_ops); | ||
294 | } | ||
295 | |||
296 | static const struct file_operations scsi_port_seq_fops = { | ||
297 | .owner = THIS_MODULE, | ||
298 | .open = scsi_port_seq_open, | ||
299 | .read = seq_read, | ||
300 | .llseek = seq_lseek, | ||
301 | .release = seq_release, | ||
302 | }; | ||
303 | |||
304 | /* | ||
305 | * SCSI Transport Table | ||
306 | */ | ||
307 | static void *scsi_transport_seq_start(struct seq_file *seq, loff_t *pos) | ||
308 | { | ||
309 | return locate_hba_start(seq, pos); | ||
310 | } | ||
311 | |||
312 | static void *scsi_transport_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
313 | { | ||
314 | return locate_hba_next(seq, v, pos); | ||
315 | } | ||
316 | |||
317 | static void scsi_transport_seq_stop(struct seq_file *seq, void *v) | ||
318 | { | ||
319 | locate_hba_stop(seq, v); | ||
320 | } | ||
321 | |||
322 | static int scsi_transport_seq_show(struct seq_file *seq, void *v) | ||
323 | { | ||
324 | struct se_hba *hba; | ||
325 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
326 | g_se_dev_list); | ||
327 | struct se_device *dev = se_dev->se_dev_ptr; | ||
328 | struct se_port *se, *se_tmp; | ||
329 | struct se_portal_group *tpg; | ||
330 | struct t10_wwn *wwn; | ||
331 | char buf[64]; | ||
332 | |||
333 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
334 | seq_puts(seq, "inst device indx dev_name\n"); | ||
335 | |||
336 | if (!(dev)) | ||
337 | return 0; | ||
338 | |||
339 | hba = dev->se_hba; | ||
340 | if (!(hba)) { | ||
341 | /* Log error ? */ | ||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | wwn = DEV_T10_WWN(dev); | ||
346 | |||
347 | spin_lock(&dev->se_port_lock); | ||
348 | list_for_each_entry_safe(se, se_tmp, &dev->dev_sep_list, sep_list) { | ||
349 | tpg = se->sep_tpg; | ||
350 | sprintf(buf, "scsiTransport%s", | ||
351 | TPG_TFO(tpg)->get_fabric_name()); | ||
352 | |||
353 | seq_printf(seq, "%u %s %u %s+%s\n", | ||
354 | hba->hba_index, /* scsiTransportIndex */ | ||
355 | buf, /* scsiTransportType */ | ||
356 | (TPG_TFO(tpg)->tpg_get_inst_index != NULL) ? | ||
357 | TPG_TFO(tpg)->tpg_get_inst_index(tpg) : | ||
358 | 0, | ||
359 | TPG_TFO(tpg)->tpg_get_wwn(tpg), | ||
360 | (strlen(wwn->unit_serial)) ? | ||
361 | /* scsiTransportDevName */ | ||
362 | wwn->unit_serial : wwn->vendor); | ||
363 | } | ||
364 | spin_unlock(&dev->se_port_lock); | ||
365 | |||
366 | return 0; | ||
367 | } | ||
368 | |||
369 | static const struct seq_operations scsi_transport_seq_ops = { | ||
370 | .start = scsi_transport_seq_start, | ||
371 | .next = scsi_transport_seq_next, | ||
372 | .stop = scsi_transport_seq_stop, | ||
373 | .show = scsi_transport_seq_show | ||
374 | }; | ||
375 | |||
376 | static int scsi_transport_seq_open(struct inode *inode, struct file *file) | ||
377 | { | ||
378 | return seq_open(file, &scsi_transport_seq_ops); | ||
379 | } | ||
380 | |||
381 | static const struct file_operations scsi_transport_seq_fops = { | ||
382 | .owner = THIS_MODULE, | ||
383 | .open = scsi_transport_seq_open, | ||
384 | .read = seq_read, | ||
385 | .llseek = seq_lseek, | ||
386 | .release = seq_release, | ||
387 | }; | ||
388 | |||
389 | /* | ||
390 | * SCSI Target Device Table | ||
391 | */ | ||
392 | static void *scsi_tgt_dev_seq_start(struct seq_file *seq, loff_t *pos) | ||
393 | { | ||
394 | return locate_hba_start(seq, pos); | ||
395 | } | ||
396 | |||
397 | static void *scsi_tgt_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
398 | { | ||
399 | return locate_hba_next(seq, v, pos); | ||
400 | } | ||
401 | |||
402 | static void scsi_tgt_dev_seq_stop(struct seq_file *seq, void *v) | ||
403 | { | ||
404 | locate_hba_stop(seq, v); | ||
405 | } | ||
406 | |||
407 | |||
408 | #define LU_COUNT 1 /* for now */ | ||
409 | static int scsi_tgt_dev_seq_show(struct seq_file *seq, void *v) | ||
410 | { | ||
411 | struct se_hba *hba; | ||
412 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
413 | g_se_dev_list); | ||
414 | struct se_device *dev = se_dev->se_dev_ptr; | ||
415 | int non_accessible_lus = 0; | ||
416 | char status[16]; | ||
417 | |||
418 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
419 | seq_puts(seq, "inst indx num_LUs status non_access_LUs" | ||
420 | " resets\n"); | ||
421 | |||
422 | if (!(dev)) | ||
423 | return 0; | ||
424 | |||
425 | hba = dev->se_hba; | ||
426 | if (!(hba)) { | ||
427 | /* Log error ? */ | ||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | switch (dev->dev_status) { | ||
432 | case TRANSPORT_DEVICE_ACTIVATED: | ||
433 | strcpy(status, "activated"); | ||
434 | break; | ||
435 | case TRANSPORT_DEVICE_DEACTIVATED: | ||
436 | strcpy(status, "deactivated"); | ||
437 | non_accessible_lus = 1; | ||
438 | break; | ||
439 | case TRANSPORT_DEVICE_SHUTDOWN: | ||
440 | strcpy(status, "shutdown"); | ||
441 | non_accessible_lus = 1; | ||
442 | break; | ||
443 | case TRANSPORT_DEVICE_OFFLINE_ACTIVATED: | ||
444 | case TRANSPORT_DEVICE_OFFLINE_DEACTIVATED: | ||
445 | strcpy(status, "offline"); | ||
446 | non_accessible_lus = 1; | ||
447 | break; | ||
448 | default: | ||
449 | sprintf(status, "unknown(%d)", dev->dev_status); | ||
450 | non_accessible_lus = 1; | ||
451 | } | ||
452 | |||
453 | seq_printf(seq, "%u %u %u %s %u %u\n", | ||
454 | hba->hba_index, dev->dev_index, LU_COUNT, | ||
455 | status, non_accessible_lus, dev->num_resets); | ||
456 | |||
457 | return 0; | ||
458 | } | ||
459 | |||
460 | static const struct seq_operations scsi_tgt_dev_seq_ops = { | ||
461 | .start = scsi_tgt_dev_seq_start, | ||
462 | .next = scsi_tgt_dev_seq_next, | ||
463 | .stop = scsi_tgt_dev_seq_stop, | ||
464 | .show = scsi_tgt_dev_seq_show | ||
465 | }; | ||
466 | |||
467 | static int scsi_tgt_dev_seq_open(struct inode *inode, struct file *file) | ||
468 | { | ||
469 | return seq_open(file, &scsi_tgt_dev_seq_ops); | ||
470 | } | ||
471 | |||
472 | static const struct file_operations scsi_tgt_dev_seq_fops = { | ||
473 | .owner = THIS_MODULE, | ||
474 | .open = scsi_tgt_dev_seq_open, | ||
475 | .read = seq_read, | ||
476 | .llseek = seq_lseek, | ||
477 | .release = seq_release, | ||
478 | }; | ||
479 | |||
480 | /* | ||
481 | * SCSI Target Port Table | ||
482 | */ | ||
483 | static void *scsi_tgt_port_seq_start(struct seq_file *seq, loff_t *pos) | ||
484 | { | ||
485 | return locate_hba_start(seq, pos); | ||
486 | } | ||
487 | |||
488 | static void *scsi_tgt_port_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
489 | { | ||
490 | return locate_hba_next(seq, v, pos); | ||
491 | } | ||
492 | |||
493 | static void scsi_tgt_port_seq_stop(struct seq_file *seq, void *v) | ||
494 | { | ||
495 | locate_hba_stop(seq, v); | ||
496 | } | ||
497 | |||
498 | static int scsi_tgt_port_seq_show(struct seq_file *seq, void *v) | ||
499 | { | ||
500 | struct se_hba *hba; | ||
501 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
502 | g_se_dev_list); | ||
503 | struct se_device *dev = se_dev->se_dev_ptr; | ||
504 | struct se_port *sep, *sep_tmp; | ||
505 | struct se_portal_group *tpg; | ||
506 | u32 rx_mbytes, tx_mbytes; | ||
507 | unsigned long long num_cmds; | ||
508 | char buf[64]; | ||
509 | |||
510 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
511 | seq_puts(seq, "inst device indx name port_index in_cmds" | ||
512 | " write_mbytes read_mbytes hs_in_cmds\n"); | ||
513 | |||
514 | if (!(dev)) | ||
515 | return 0; | ||
516 | |||
517 | hba = dev->se_hba; | ||
518 | if (!(hba)) { | ||
519 | /* Log error ? */ | ||
520 | return 0; | ||
521 | } | ||
522 | |||
523 | spin_lock(&dev->se_port_lock); | ||
524 | list_for_each_entry_safe(sep, sep_tmp, &dev->dev_sep_list, sep_list) { | ||
525 | tpg = sep->sep_tpg; | ||
526 | sprintf(buf, "%sPort#", | ||
527 | TPG_TFO(tpg)->get_fabric_name()); | ||
528 | |||
529 | seq_printf(seq, "%u %u %u %s%d %s%s%d ", | ||
530 | hba->hba_index, | ||
531 | dev->dev_index, | ||
532 | sep->sep_index, | ||
533 | buf, sep->sep_index, | ||
534 | TPG_TFO(tpg)->tpg_get_wwn(tpg), "+t+", | ||
535 | TPG_TFO(tpg)->tpg_get_tag(tpg)); | ||
536 | |||
537 | spin_lock(&sep->sep_lun->lun_sep_lock); | ||
538 | num_cmds = sep->sep_stats.cmd_pdus; | ||
539 | rx_mbytes = (sep->sep_stats.rx_data_octets >> 20); | ||
540 | tx_mbytes = (sep->sep_stats.tx_data_octets >> 20); | ||
541 | spin_unlock(&sep->sep_lun->lun_sep_lock); | ||
542 | |||
543 | seq_printf(seq, "%llu %u %u %u\n", num_cmds, | ||
544 | rx_mbytes, tx_mbytes, 0); | ||
545 | } | ||
546 | spin_unlock(&dev->se_port_lock); | ||
547 | |||
548 | return 0; | ||
549 | } | ||
550 | |||
551 | static const struct seq_operations scsi_tgt_port_seq_ops = { | ||
552 | .start = scsi_tgt_port_seq_start, | ||
553 | .next = scsi_tgt_port_seq_next, | ||
554 | .stop = scsi_tgt_port_seq_stop, | ||
555 | .show = scsi_tgt_port_seq_show | ||
556 | }; | ||
557 | |||
558 | static int scsi_tgt_port_seq_open(struct inode *inode, struct file *file) | ||
559 | { | ||
560 | return seq_open(file, &scsi_tgt_port_seq_ops); | ||
561 | } | ||
562 | |||
563 | static const struct file_operations scsi_tgt_port_seq_fops = { | ||
564 | .owner = THIS_MODULE, | ||
565 | .open = scsi_tgt_port_seq_open, | ||
566 | .read = seq_read, | ||
567 | .llseek = seq_lseek, | ||
568 | .release = seq_release, | ||
569 | }; | ||
570 | |||
571 | /* | ||
572 | * SCSI Authorized Initiator Table: | ||
573 | * It contains the SCSI Initiators authorized to be attached to one of the | ||
574 | * local Target ports. | ||
575 | * Iterates through all active TPGs and extracts the info from the ACLs | ||
576 | */ | ||
577 | static void *scsi_auth_intr_seq_start(struct seq_file *seq, loff_t *pos) | ||
578 | { | ||
579 | spin_lock_bh(&se_global->se_tpg_lock); | ||
580 | return seq_list_start(&se_global->g_se_tpg_list, *pos); | ||
581 | } | ||
582 | |||
583 | static void *scsi_auth_intr_seq_next(struct seq_file *seq, void *v, | ||
584 | loff_t *pos) | ||
585 | { | ||
586 | return seq_list_next(v, &se_global->g_se_tpg_list, pos); | ||
587 | } | ||
588 | |||
589 | static void scsi_auth_intr_seq_stop(struct seq_file *seq, void *v) | ||
590 | { | ||
591 | spin_unlock_bh(&se_global->se_tpg_lock); | ||
592 | } | ||
593 | |||
594 | static int scsi_auth_intr_seq_show(struct seq_file *seq, void *v) | ||
595 | { | ||
596 | struct se_portal_group *se_tpg = list_entry(v, struct se_portal_group, | ||
597 | se_tpg_list); | ||
598 | struct se_dev_entry *deve; | ||
599 | struct se_lun *lun; | ||
600 | struct se_node_acl *se_nacl; | ||
601 | int j; | ||
602 | |||
603 | if (list_is_first(&se_tpg->se_tpg_list, | ||
604 | &se_global->g_se_tpg_list)) | ||
605 | seq_puts(seq, "inst dev port indx dev_or_port intr_name " | ||
606 | "map_indx att_count num_cmds read_mbytes " | ||
607 | "write_mbytes hs_num_cmds creation_time row_status\n"); | ||
608 | |||
609 | if (!(se_tpg)) | ||
610 | return 0; | ||
611 | |||
612 | spin_lock(&se_tpg->acl_node_lock); | ||
613 | list_for_each_entry(se_nacl, &se_tpg->acl_node_list, acl_list) { | ||
614 | |||
615 | atomic_inc(&se_nacl->mib_ref_count); | ||
616 | smp_mb__after_atomic_inc(); | ||
617 | spin_unlock(&se_tpg->acl_node_lock); | ||
618 | |||
619 | spin_lock_irq(&se_nacl->device_list_lock); | ||
620 | for (j = 0; j < TRANSPORT_MAX_LUNS_PER_TPG; j++) { | ||
621 | deve = &se_nacl->device_list[j]; | ||
622 | if (!(deve->lun_flags & | ||
623 | TRANSPORT_LUNFLAGS_INITIATOR_ACCESS) || | ||
624 | (!deve->se_lun)) | ||
625 | continue; | ||
626 | lun = deve->se_lun; | ||
627 | if (!lun->lun_se_dev) | ||
628 | continue; | ||
629 | |||
630 | seq_printf(seq, "%u %u %u %u %u %s %u %u %u %u %u %u" | ||
631 | " %u %s\n", | ||
632 | /* scsiInstIndex */ | ||
633 | (TPG_TFO(se_tpg)->tpg_get_inst_index != NULL) ? | ||
634 | TPG_TFO(se_tpg)->tpg_get_inst_index(se_tpg) : | ||
635 | 0, | ||
636 | /* scsiDeviceIndex */ | ||
637 | lun->lun_se_dev->dev_index, | ||
638 | /* scsiAuthIntrTgtPortIndex */ | ||
639 | TPG_TFO(se_tpg)->tpg_get_tag(se_tpg), | ||
640 | /* scsiAuthIntrIndex */ | ||
641 | se_nacl->acl_index, | ||
642 | /* scsiAuthIntrDevOrPort */ | ||
643 | 1, | ||
644 | /* scsiAuthIntrName */ | ||
645 | se_nacl->initiatorname[0] ? | ||
646 | se_nacl->initiatorname : NONE, | ||
647 | /* FIXME: scsiAuthIntrLunMapIndex */ | ||
648 | 0, | ||
649 | /* scsiAuthIntrAttachedTimes */ | ||
650 | deve->attach_count, | ||
651 | /* scsiAuthIntrOutCommands */ | ||
652 | deve->total_cmds, | ||
653 | /* scsiAuthIntrReadMegaBytes */ | ||
654 | (u32)(deve->read_bytes >> 20), | ||
655 | /* scsiAuthIntrWrittenMegaBytes */ | ||
656 | (u32)(deve->write_bytes >> 20), | ||
657 | /* FIXME: scsiAuthIntrHSOutCommands */ | ||
658 | 0, | ||
659 | /* scsiAuthIntrLastCreation */ | ||
660 | (u32)(((u32)deve->creation_time - | ||
661 | INITIAL_JIFFIES) * 100 / HZ), | ||
662 | /* FIXME: scsiAuthIntrRowStatus */ | ||
663 | "Ready"); | ||
664 | } | ||
665 | spin_unlock_irq(&se_nacl->device_list_lock); | ||
666 | |||
667 | spin_lock(&se_tpg->acl_node_lock); | ||
668 | atomic_dec(&se_nacl->mib_ref_count); | ||
669 | smp_mb__after_atomic_dec(); | ||
670 | } | ||
671 | spin_unlock(&se_tpg->acl_node_lock); | ||
672 | |||
673 | return 0; | ||
674 | } | ||
675 | |||
676 | static const struct seq_operations scsi_auth_intr_seq_ops = { | ||
677 | .start = scsi_auth_intr_seq_start, | ||
678 | .next = scsi_auth_intr_seq_next, | ||
679 | .stop = scsi_auth_intr_seq_stop, | ||
680 | .show = scsi_auth_intr_seq_show | ||
681 | }; | ||
682 | |||
683 | static int scsi_auth_intr_seq_open(struct inode *inode, struct file *file) | ||
684 | { | ||
685 | return seq_open(file, &scsi_auth_intr_seq_ops); | ||
686 | } | ||
687 | |||
688 | static const struct file_operations scsi_auth_intr_seq_fops = { | ||
689 | .owner = THIS_MODULE, | ||
690 | .open = scsi_auth_intr_seq_open, | ||
691 | .read = seq_read, | ||
692 | .llseek = seq_lseek, | ||
693 | .release = seq_release, | ||
694 | }; | ||
695 | |||
696 | /* | ||
697 | * SCSI Attached Initiator Port Table: | ||
698 | * It lists the SCSI Initiators attached to one of the local Target ports. | ||
699 | * Iterates through all active TPGs and use active sessions from each TPG | ||
700 | * to list the info fo this table. | ||
701 | */ | ||
702 | static void *scsi_att_intr_port_seq_start(struct seq_file *seq, loff_t *pos) | ||
703 | { | ||
704 | spin_lock_bh(&se_global->se_tpg_lock); | ||
705 | return seq_list_start(&se_global->g_se_tpg_list, *pos); | ||
706 | } | ||
707 | |||
708 | static void *scsi_att_intr_port_seq_next(struct seq_file *seq, void *v, | ||
709 | loff_t *pos) | ||
710 | { | ||
711 | return seq_list_next(v, &se_global->g_se_tpg_list, pos); | ||
712 | } | ||
713 | |||
714 | static void scsi_att_intr_port_seq_stop(struct seq_file *seq, void *v) | ||
715 | { | ||
716 | spin_unlock_bh(&se_global->se_tpg_lock); | ||
717 | } | ||
718 | |||
719 | static int scsi_att_intr_port_seq_show(struct seq_file *seq, void *v) | ||
720 | { | ||
721 | struct se_portal_group *se_tpg = list_entry(v, struct se_portal_group, | ||
722 | se_tpg_list); | ||
723 | struct se_dev_entry *deve; | ||
724 | struct se_lun *lun; | ||
725 | struct se_node_acl *se_nacl; | ||
726 | struct se_session *se_sess; | ||
727 | unsigned char buf[64]; | ||
728 | int j; | ||
729 | |||
730 | if (list_is_first(&se_tpg->se_tpg_list, | ||
731 | &se_global->g_se_tpg_list)) | ||
732 | seq_puts(seq, "inst dev port indx port_auth_indx port_name" | ||
733 | " port_ident\n"); | ||
734 | |||
735 | if (!(se_tpg)) | ||
736 | return 0; | ||
737 | |||
738 | spin_lock(&se_tpg->session_lock); | ||
739 | list_for_each_entry(se_sess, &se_tpg->tpg_sess_list, sess_list) { | ||
740 | if ((TPG_TFO(se_tpg)->sess_logged_in(se_sess)) || | ||
741 | (!se_sess->se_node_acl) || | ||
742 | (!se_sess->se_node_acl->device_list)) | ||
743 | continue; | ||
744 | |||
745 | atomic_inc(&se_sess->mib_ref_count); | ||
746 | smp_mb__after_atomic_inc(); | ||
747 | se_nacl = se_sess->se_node_acl; | ||
748 | atomic_inc(&se_nacl->mib_ref_count); | ||
749 | smp_mb__after_atomic_inc(); | ||
750 | spin_unlock(&se_tpg->session_lock); | ||
751 | |||
752 | spin_lock_irq(&se_nacl->device_list_lock); | ||
753 | for (j = 0; j < TRANSPORT_MAX_LUNS_PER_TPG; j++) { | ||
754 | deve = &se_nacl->device_list[j]; | ||
755 | if (!(deve->lun_flags & | ||
756 | TRANSPORT_LUNFLAGS_INITIATOR_ACCESS) || | ||
757 | (!deve->se_lun)) | ||
758 | continue; | ||
759 | |||
760 | lun = deve->se_lun; | ||
761 | if (!lun->lun_se_dev) | ||
762 | continue; | ||
763 | |||
764 | memset(buf, 0, 64); | ||
765 | if (TPG_TFO(se_tpg)->sess_get_initiator_sid != NULL) | ||
766 | TPG_TFO(se_tpg)->sess_get_initiator_sid( | ||
767 | se_sess, (unsigned char *)&buf[0], 64); | ||
768 | |||
769 | seq_printf(seq, "%u %u %u %u %u %s+i+%s\n", | ||
770 | /* scsiInstIndex */ | ||
771 | (TPG_TFO(se_tpg)->tpg_get_inst_index != NULL) ? | ||
772 | TPG_TFO(se_tpg)->tpg_get_inst_index(se_tpg) : | ||
773 | 0, | ||
774 | /* scsiDeviceIndex */ | ||
775 | lun->lun_se_dev->dev_index, | ||
776 | /* scsiPortIndex */ | ||
777 | TPG_TFO(se_tpg)->tpg_get_tag(se_tpg), | ||
778 | /* scsiAttIntrPortIndex */ | ||
779 | (TPG_TFO(se_tpg)->sess_get_index != NULL) ? | ||
780 | TPG_TFO(se_tpg)->sess_get_index(se_sess) : | ||
781 | 0, | ||
782 | /* scsiAttIntrPortAuthIntrIdx */ | ||
783 | se_nacl->acl_index, | ||
784 | /* scsiAttIntrPortName */ | ||
785 | se_nacl->initiatorname[0] ? | ||
786 | se_nacl->initiatorname : NONE, | ||
787 | /* scsiAttIntrPortIdentifier */ | ||
788 | buf); | ||
789 | } | ||
790 | spin_unlock_irq(&se_nacl->device_list_lock); | ||
791 | |||
792 | spin_lock(&se_tpg->session_lock); | ||
793 | atomic_dec(&se_nacl->mib_ref_count); | ||
794 | smp_mb__after_atomic_dec(); | ||
795 | atomic_dec(&se_sess->mib_ref_count); | ||
796 | smp_mb__after_atomic_dec(); | ||
797 | } | ||
798 | spin_unlock(&se_tpg->session_lock); | ||
799 | |||
800 | return 0; | ||
801 | } | ||
802 | |||
803 | static const struct seq_operations scsi_att_intr_port_seq_ops = { | ||
804 | .start = scsi_att_intr_port_seq_start, | ||
805 | .next = scsi_att_intr_port_seq_next, | ||
806 | .stop = scsi_att_intr_port_seq_stop, | ||
807 | .show = scsi_att_intr_port_seq_show | ||
808 | }; | ||
809 | |||
810 | static int scsi_att_intr_port_seq_open(struct inode *inode, struct file *file) | ||
811 | { | ||
812 | return seq_open(file, &scsi_att_intr_port_seq_ops); | ||
813 | } | ||
814 | |||
815 | static const struct file_operations scsi_att_intr_port_seq_fops = { | ||
816 | .owner = THIS_MODULE, | ||
817 | .open = scsi_att_intr_port_seq_open, | ||
818 | .read = seq_read, | ||
819 | .llseek = seq_lseek, | ||
820 | .release = seq_release, | ||
821 | }; | ||
822 | |||
823 | /* | ||
824 | * SCSI Logical Unit Table | ||
825 | */ | ||
826 | static void *scsi_lu_seq_start(struct seq_file *seq, loff_t *pos) | ||
827 | { | ||
828 | return locate_hba_start(seq, pos); | ||
829 | } | ||
830 | |||
831 | static void *scsi_lu_seq_next(struct seq_file *seq, void *v, loff_t *pos) | ||
832 | { | ||
833 | return locate_hba_next(seq, v, pos); | ||
834 | } | ||
835 | |||
836 | static void scsi_lu_seq_stop(struct seq_file *seq, void *v) | ||
837 | { | ||
838 | locate_hba_stop(seq, v); | ||
839 | } | ||
840 | |||
841 | #define SCSI_LU_INDEX 1 | ||
842 | static int scsi_lu_seq_show(struct seq_file *seq, void *v) | ||
843 | { | ||
844 | struct se_hba *hba; | ||
845 | struct se_subsystem_dev *se_dev = list_entry(v, struct se_subsystem_dev, | ||
846 | g_se_dev_list); | ||
847 | struct se_device *dev = se_dev->se_dev_ptr; | ||
848 | int j; | ||
849 | char str[28]; | ||
850 | |||
851 | if (list_is_first(&se_dev->g_se_dev_list, &se_global->g_se_dev_list)) | ||
852 | seq_puts(seq, "inst dev indx LUN lu_name vend prod rev" | ||
853 | " dev_type status state-bit num_cmds read_mbytes" | ||
854 | " write_mbytes resets full_stat hs_num_cmds creation_time\n"); | ||
855 | |||
856 | if (!(dev)) | ||
857 | return 0; | ||
858 | |||
859 | hba = dev->se_hba; | ||
860 | if (!(hba)) { | ||
861 | /* Log error ? */ | ||
862 | return 0; | ||
863 | } | ||
864 | |||
865 | /* Fix LU state, if we can read it from the device */ | ||
866 | seq_printf(seq, "%u %u %u %llu %s", hba->hba_index, | ||
867 | dev->dev_index, SCSI_LU_INDEX, | ||
868 | (unsigned long long)0, /* FIXME: scsiLuDefaultLun */ | ||
869 | (strlen(DEV_T10_WWN(dev)->unit_serial)) ? | ||
870 | /* scsiLuWwnName */ | ||
871 | (char *)&DEV_T10_WWN(dev)->unit_serial[0] : | ||
872 | "None"); | ||
873 | |||
874 | memcpy(&str[0], (void *)DEV_T10_WWN(dev), 28); | ||
875 | /* scsiLuVendorId */ | ||
876 | for (j = 0; j < 8; j++) | ||
877 | str[j] = ISPRINT(DEV_T10_WWN(dev)->vendor[j]) ? | ||
878 | DEV_T10_WWN(dev)->vendor[j] : 0x20; | ||
879 | str[8] = 0; | ||
880 | seq_printf(seq, " %s", str); | ||
881 | |||
882 | /* scsiLuProductId */ | ||
883 | for (j = 0; j < 16; j++) | ||
884 | str[j] = ISPRINT(DEV_T10_WWN(dev)->model[j]) ? | ||
885 | DEV_T10_WWN(dev)->model[j] : 0x20; | ||
886 | str[16] = 0; | ||
887 | seq_printf(seq, " %s", str); | ||
888 | |||
889 | /* scsiLuRevisionId */ | ||
890 | for (j = 0; j < 4; j++) | ||
891 | str[j] = ISPRINT(DEV_T10_WWN(dev)->revision[j]) ? | ||
892 | DEV_T10_WWN(dev)->revision[j] : 0x20; | ||
893 | str[4] = 0; | ||
894 | seq_printf(seq, " %s", str); | ||
895 | |||
896 | seq_printf(seq, " %u %s %s %llu %u %u %u %u %u %u\n", | ||
897 | /* scsiLuPeripheralType */ | ||
898 | TRANSPORT(dev)->get_device_type(dev), | ||
899 | (dev->dev_status == TRANSPORT_DEVICE_ACTIVATED) ? | ||
900 | "available" : "notavailable", /* scsiLuStatus */ | ||
901 | "exposed", /* scsiLuState */ | ||
902 | (unsigned long long)dev->num_cmds, | ||
903 | /* scsiLuReadMegaBytes */ | ||
904 | (u32)(dev->read_bytes >> 20), | ||
905 | /* scsiLuWrittenMegaBytes */ | ||
906 | (u32)(dev->write_bytes >> 20), | ||
907 | dev->num_resets, /* scsiLuInResets */ | ||
908 | 0, /* scsiLuOutTaskSetFullStatus */ | ||
909 | 0, /* scsiLuHSInCommands */ | ||
910 | (u32)(((u32)dev->creation_time - INITIAL_JIFFIES) * | ||
911 | 100 / HZ)); | ||
912 | |||
913 | return 0; | ||
914 | } | ||
915 | |||
916 | static const struct seq_operations scsi_lu_seq_ops = { | ||
917 | .start = scsi_lu_seq_start, | ||
918 | .next = scsi_lu_seq_next, | ||
919 | .stop = scsi_lu_seq_stop, | ||
920 | .show = scsi_lu_seq_show | ||
921 | }; | ||
922 | |||
923 | static int scsi_lu_seq_open(struct inode *inode, struct file *file) | ||
924 | { | ||
925 | return seq_open(file, &scsi_lu_seq_ops); | ||
926 | } | ||
927 | |||
928 | static const struct file_operations scsi_lu_seq_fops = { | ||
929 | .owner = THIS_MODULE, | ||
930 | .open = scsi_lu_seq_open, | ||
931 | .read = seq_read, | ||
932 | .llseek = seq_lseek, | ||
933 | .release = seq_release, | ||
934 | }; | ||
935 | |||
936 | /****************************************************************************/ | ||
937 | |||
938 | /* | ||
939 | * Remove proc fs entries | ||
940 | */ | ||
941 | void remove_scsi_target_mib(void) | ||
942 | { | ||
943 | remove_proc_entry("scsi_target/mib/scsi_inst", NULL); | ||
944 | remove_proc_entry("scsi_target/mib/scsi_dev", NULL); | ||
945 | remove_proc_entry("scsi_target/mib/scsi_port", NULL); | ||
946 | remove_proc_entry("scsi_target/mib/scsi_transport", NULL); | ||
947 | remove_proc_entry("scsi_target/mib/scsi_tgt_dev", NULL); | ||
948 | remove_proc_entry("scsi_target/mib/scsi_tgt_port", NULL); | ||
949 | remove_proc_entry("scsi_target/mib/scsi_auth_intr", NULL); | ||
950 | remove_proc_entry("scsi_target/mib/scsi_att_intr_port", NULL); | ||
951 | remove_proc_entry("scsi_target/mib/scsi_lu", NULL); | ||
952 | remove_proc_entry("scsi_target/mib", NULL); | ||
953 | } | ||
954 | |||
955 | /* | ||
956 | * Create proc fs entries for the mib tables | ||
957 | */ | ||
958 | int init_scsi_target_mib(void) | ||
959 | { | ||
960 | struct proc_dir_entry *dir_entry; | ||
961 | struct proc_dir_entry *scsi_inst_entry; | ||
962 | struct proc_dir_entry *scsi_dev_entry; | ||
963 | struct proc_dir_entry *scsi_port_entry; | ||
964 | struct proc_dir_entry *scsi_transport_entry; | ||
965 | struct proc_dir_entry *scsi_tgt_dev_entry; | ||
966 | struct proc_dir_entry *scsi_tgt_port_entry; | ||
967 | struct proc_dir_entry *scsi_auth_intr_entry; | ||
968 | struct proc_dir_entry *scsi_att_intr_port_entry; | ||
969 | struct proc_dir_entry *scsi_lu_entry; | ||
970 | |||
971 | dir_entry = proc_mkdir("scsi_target/mib", NULL); | ||
972 | if (!(dir_entry)) { | ||
973 | printk(KERN_ERR "proc_mkdir() failed.\n"); | ||
974 | return -1; | ||
975 | } | ||
976 | |||
977 | scsi_inst_entry = | ||
978 | create_proc_entry("scsi_target/mib/scsi_inst", 0, NULL); | ||
979 | if (scsi_inst_entry) | ||
980 | scsi_inst_entry->proc_fops = &scsi_inst_seq_fops; | ||
981 | else | ||
982 | goto error; | ||
983 | |||
984 | scsi_dev_entry = | ||
985 | create_proc_entry("scsi_target/mib/scsi_dev", 0, NULL); | ||
986 | if (scsi_dev_entry) | ||
987 | scsi_dev_entry->proc_fops = &scsi_dev_seq_fops; | ||
988 | else | ||
989 | goto error; | ||
990 | |||
991 | scsi_port_entry = | ||
992 | create_proc_entry("scsi_target/mib/scsi_port", 0, NULL); | ||
993 | if (scsi_port_entry) | ||
994 | scsi_port_entry->proc_fops = &scsi_port_seq_fops; | ||
995 | else | ||
996 | goto error; | ||
997 | |||
998 | scsi_transport_entry = | ||
999 | create_proc_entry("scsi_target/mib/scsi_transport", 0, NULL); | ||
1000 | if (scsi_transport_entry) | ||
1001 | scsi_transport_entry->proc_fops = &scsi_transport_seq_fops; | ||
1002 | else | ||
1003 | goto error; | ||
1004 | |||
1005 | scsi_tgt_dev_entry = | ||
1006 | create_proc_entry("scsi_target/mib/scsi_tgt_dev", 0, NULL); | ||
1007 | if (scsi_tgt_dev_entry) | ||
1008 | scsi_tgt_dev_entry->proc_fops = &scsi_tgt_dev_seq_fops; | ||
1009 | else | ||
1010 | goto error; | ||
1011 | |||
1012 | scsi_tgt_port_entry = | ||
1013 | create_proc_entry("scsi_target/mib/scsi_tgt_port", 0, NULL); | ||
1014 | if (scsi_tgt_port_entry) | ||
1015 | scsi_tgt_port_entry->proc_fops = &scsi_tgt_port_seq_fops; | ||
1016 | else | ||
1017 | goto error; | ||
1018 | |||
1019 | scsi_auth_intr_entry = | ||
1020 | create_proc_entry("scsi_target/mib/scsi_auth_intr", 0, NULL); | ||
1021 | if (scsi_auth_intr_entry) | ||
1022 | scsi_auth_intr_entry->proc_fops = &scsi_auth_intr_seq_fops; | ||
1023 | else | ||
1024 | goto error; | ||
1025 | |||
1026 | scsi_att_intr_port_entry = | ||
1027 | create_proc_entry("scsi_target/mib/scsi_att_intr_port", 0, NULL); | ||
1028 | if (scsi_att_intr_port_entry) | ||
1029 | scsi_att_intr_port_entry->proc_fops = | ||
1030 | &scsi_att_intr_port_seq_fops; | ||
1031 | else | ||
1032 | goto error; | ||
1033 | |||
1034 | scsi_lu_entry = create_proc_entry("scsi_target/mib/scsi_lu", 0, NULL); | ||
1035 | if (scsi_lu_entry) | ||
1036 | scsi_lu_entry->proc_fops = &scsi_lu_seq_fops; | ||
1037 | else | ||
1038 | goto error; | ||
1039 | |||
1040 | return 0; | ||
1041 | |||
1042 | error: | ||
1043 | printk(KERN_ERR "create_proc_entry() failed.\n"); | ||
1044 | remove_scsi_target_mib(); | ||
1045 | return -1; | ||
1046 | } | ||
1047 | |||
1048 | /* | ||
1049 | * Initialize the index table for allocating unique row indexes to various mib | ||
1050 | * tables | ||
1051 | */ | ||
1052 | void init_scsi_index_table(void) | ||
1053 | { | ||
1054 | memset(&scsi_index_table, 0, sizeof(struct scsi_index_table)); | ||
1055 | spin_lock_init(&scsi_index_table.lock); | ||
1056 | } | ||
1057 | |||
1058 | /* | ||
1059 | * Allocate a new row index for the entry type specified | ||
1060 | */ | ||
1061 | u32 scsi_get_new_index(scsi_index_t type) | ||
1062 | { | ||
1063 | u32 new_index; | ||
1064 | |||
1065 | if ((type < 0) || (type >= SCSI_INDEX_TYPE_MAX)) { | ||
1066 | printk(KERN_ERR "Invalid index type %d\n", type); | ||
1067 | return -1; | ||
1068 | } | ||
1069 | |||
1070 | spin_lock(&scsi_index_table.lock); | ||
1071 | new_index = ++scsi_index_table.scsi_mib_index[type]; | ||
1072 | if (new_index == 0) | ||
1073 | new_index = ++scsi_index_table.scsi_mib_index[type]; | ||
1074 | spin_unlock(&scsi_index_table.lock); | ||
1075 | |||
1076 | return new_index; | ||
1077 | } | ||
1078 | EXPORT_SYMBOL(scsi_get_new_index); | ||
diff --git a/drivers/target/target_core_mib.h b/drivers/target/target_core_mib.h deleted file mode 100644 index 277204633850..000000000000 --- a/drivers/target/target_core_mib.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | #ifndef TARGET_CORE_MIB_H | ||
2 | #define TARGET_CORE_MIB_H | ||
3 | |||
4 | typedef enum { | ||
5 | SCSI_INST_INDEX, | ||
6 | SCSI_DEVICE_INDEX, | ||
7 | SCSI_AUTH_INTR_INDEX, | ||
8 | SCSI_INDEX_TYPE_MAX | ||
9 | } scsi_index_t; | ||
10 | |||
11 | struct scsi_index_table { | ||
12 | spinlock_t lock; | ||
13 | u32 scsi_mib_index[SCSI_INDEX_TYPE_MAX]; | ||
14 | } ____cacheline_aligned; | ||
15 | |||
16 | /* SCSI Port stats */ | ||
17 | struct scsi_port_stats { | ||
18 | u64 cmd_pdus; | ||
19 | u64 tx_data_octets; | ||
20 | u64 rx_data_octets; | ||
21 | } ____cacheline_aligned; | ||
22 | |||
23 | extern int init_scsi_target_mib(void); | ||
24 | extern void remove_scsi_target_mib(void); | ||
25 | extern void init_scsi_index_table(void); | ||
26 | extern u32 scsi_get_new_index(scsi_index_t); | ||
27 | |||
28 | #endif /*** TARGET_CORE_MIB_H ***/ | ||
diff --git a/drivers/target/target_core_pscsi.c b/drivers/target/target_core_pscsi.c index 742d24609a9b..f2a08477a68c 100644 --- a/drivers/target/target_core_pscsi.c +++ b/drivers/target/target_core_pscsi.c | |||
@@ -462,8 +462,8 @@ static struct se_device *pscsi_create_type_disk( | |||
462 | */ | 462 | */ |
463 | bd = blkdev_get_by_path(se_dev->se_dev_udev_path, | 463 | bd = blkdev_get_by_path(se_dev->se_dev_udev_path, |
464 | FMODE_WRITE|FMODE_READ|FMODE_EXCL, pdv); | 464 | FMODE_WRITE|FMODE_READ|FMODE_EXCL, pdv); |
465 | if (!(bd)) { | 465 | if (IS_ERR(bd)) { |
466 | printk("pSCSI: blkdev_get_by_path() failed\n"); | 466 | printk(KERN_ERR "pSCSI: blkdev_get_by_path() failed\n"); |
467 | scsi_device_put(sd); | 467 | scsi_device_put(sd); |
468 | return NULL; | 468 | return NULL; |
469 | } | 469 | } |
diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c index abfa81a57115..c26f67467623 100644 --- a/drivers/target/target_core_tpg.c +++ b/drivers/target/target_core_tpg.c | |||
@@ -275,7 +275,6 @@ struct se_node_acl *core_tpg_check_initiator_node_acl( | |||
275 | spin_lock_init(&acl->device_list_lock); | 275 | spin_lock_init(&acl->device_list_lock); |
276 | spin_lock_init(&acl->nacl_sess_lock); | 276 | spin_lock_init(&acl->nacl_sess_lock); |
277 | atomic_set(&acl->acl_pr_ref_count, 0); | 277 | atomic_set(&acl->acl_pr_ref_count, 0); |
278 | atomic_set(&acl->mib_ref_count, 0); | ||
279 | acl->queue_depth = TPG_TFO(tpg)->tpg_get_default_depth(tpg); | 278 | acl->queue_depth = TPG_TFO(tpg)->tpg_get_default_depth(tpg); |
280 | snprintf(acl->initiatorname, TRANSPORT_IQN_LEN, "%s", initiatorname); | 279 | snprintf(acl->initiatorname, TRANSPORT_IQN_LEN, "%s", initiatorname); |
281 | acl->se_tpg = tpg; | 280 | acl->se_tpg = tpg; |
@@ -318,12 +317,6 @@ void core_tpg_wait_for_nacl_pr_ref(struct se_node_acl *nacl) | |||
318 | cpu_relax(); | 317 | cpu_relax(); |
319 | } | 318 | } |
320 | 319 | ||
321 | void core_tpg_wait_for_mib_ref(struct se_node_acl *nacl) | ||
322 | { | ||
323 | while (atomic_read(&nacl->mib_ref_count) != 0) | ||
324 | cpu_relax(); | ||
325 | } | ||
326 | |||
327 | void core_tpg_clear_object_luns(struct se_portal_group *tpg) | 320 | void core_tpg_clear_object_luns(struct se_portal_group *tpg) |
328 | { | 321 | { |
329 | int i, ret; | 322 | int i, ret; |
@@ -480,7 +473,6 @@ int core_tpg_del_initiator_node_acl( | |||
480 | spin_unlock_bh(&tpg->session_lock); | 473 | spin_unlock_bh(&tpg->session_lock); |
481 | 474 | ||
482 | core_tpg_wait_for_nacl_pr_ref(acl); | 475 | core_tpg_wait_for_nacl_pr_ref(acl); |
483 | core_tpg_wait_for_mib_ref(acl); | ||
484 | core_clear_initiator_node_from_tpg(acl, tpg); | 476 | core_clear_initiator_node_from_tpg(acl, tpg); |
485 | core_free_device_list_for_node(acl, tpg); | 477 | core_free_device_list_for_node(acl, tpg); |
486 | 478 | ||
@@ -701,6 +693,8 @@ EXPORT_SYMBOL(core_tpg_register); | |||
701 | 693 | ||
702 | int core_tpg_deregister(struct se_portal_group *se_tpg) | 694 | int core_tpg_deregister(struct se_portal_group *se_tpg) |
703 | { | 695 | { |
696 | struct se_node_acl *nacl, *nacl_tmp; | ||
697 | |||
704 | printk(KERN_INFO "TARGET_CORE[%s]: Deallocating %s struct se_portal_group" | 698 | printk(KERN_INFO "TARGET_CORE[%s]: Deallocating %s struct se_portal_group" |
705 | " for endpoint: %s Portal Tag %u\n", | 699 | " for endpoint: %s Portal Tag %u\n", |
706 | (se_tpg->se_tpg_type == TRANSPORT_TPG_TYPE_NORMAL) ? | 700 | (se_tpg->se_tpg_type == TRANSPORT_TPG_TYPE_NORMAL) ? |
@@ -714,6 +708,25 @@ int core_tpg_deregister(struct se_portal_group *se_tpg) | |||
714 | 708 | ||
715 | while (atomic_read(&se_tpg->tpg_pr_ref_count) != 0) | 709 | while (atomic_read(&se_tpg->tpg_pr_ref_count) != 0) |
716 | cpu_relax(); | 710 | cpu_relax(); |
711 | /* | ||
712 | * Release any remaining demo-mode generated se_node_acl that have | ||
713 | * not been released because of TFO->tpg_check_demo_mode_cache() == 1 | ||
714 | * in transport_deregister_session(). | ||
715 | */ | ||
716 | spin_lock_bh(&se_tpg->acl_node_lock); | ||
717 | list_for_each_entry_safe(nacl, nacl_tmp, &se_tpg->acl_node_list, | ||
718 | acl_list) { | ||
719 | list_del(&nacl->acl_list); | ||
720 | se_tpg->num_node_acls--; | ||
721 | spin_unlock_bh(&se_tpg->acl_node_lock); | ||
722 | |||
723 | core_tpg_wait_for_nacl_pr_ref(nacl); | ||
724 | core_free_device_list_for_node(nacl, se_tpg); | ||
725 | TPG_TFO(se_tpg)->tpg_release_fabric_acl(se_tpg, nacl); | ||
726 | |||
727 | spin_lock_bh(&se_tpg->acl_node_lock); | ||
728 | } | ||
729 | spin_unlock_bh(&se_tpg->acl_node_lock); | ||
717 | 730 | ||
718 | if (se_tpg->se_tpg_type == TRANSPORT_TPG_TYPE_NORMAL) | 731 | if (se_tpg->se_tpg_type == TRANSPORT_TPG_TYPE_NORMAL) |
719 | core_tpg_release_virtual_lun0(se_tpg); | 732 | core_tpg_release_virtual_lun0(se_tpg); |
diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index 28b6292ff298..236e22d8cfae 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c | |||
@@ -379,6 +379,40 @@ void release_se_global(void) | |||
379 | se_global = NULL; | 379 | se_global = NULL; |
380 | } | 380 | } |
381 | 381 | ||
382 | /* SCSI statistics table index */ | ||
383 | static struct scsi_index_table scsi_index_table; | ||
384 | |||
385 | /* | ||
386 | * Initialize the index table for allocating unique row indexes to various mib | ||
387 | * tables. | ||
388 | */ | ||
389 | void init_scsi_index_table(void) | ||
390 | { | ||
391 | memset(&scsi_index_table, 0, sizeof(struct scsi_index_table)); | ||
392 | spin_lock_init(&scsi_index_table.lock); | ||
393 | } | ||
394 | |||
395 | /* | ||
396 | * Allocate a new row index for the entry type specified | ||
397 | */ | ||
398 | u32 scsi_get_new_index(scsi_index_t type) | ||
399 | { | ||
400 | u32 new_index; | ||
401 | |||
402 | if ((type < 0) || (type >= SCSI_INDEX_TYPE_MAX)) { | ||
403 | printk(KERN_ERR "Invalid index type %d\n", type); | ||
404 | return -EINVAL; | ||
405 | } | ||
406 | |||
407 | spin_lock(&scsi_index_table.lock); | ||
408 | new_index = ++scsi_index_table.scsi_mib_index[type]; | ||
409 | if (new_index == 0) | ||
410 | new_index = ++scsi_index_table.scsi_mib_index[type]; | ||
411 | spin_unlock(&scsi_index_table.lock); | ||
412 | |||
413 | return new_index; | ||
414 | } | ||
415 | |||
382 | void transport_init_queue_obj(struct se_queue_obj *qobj) | 416 | void transport_init_queue_obj(struct se_queue_obj *qobj) |
383 | { | 417 | { |
384 | atomic_set(&qobj->queue_cnt, 0); | 418 | atomic_set(&qobj->queue_cnt, 0); |
@@ -437,7 +471,6 @@ struct se_session *transport_init_session(void) | |||
437 | } | 471 | } |
438 | INIT_LIST_HEAD(&se_sess->sess_list); | 472 | INIT_LIST_HEAD(&se_sess->sess_list); |
439 | INIT_LIST_HEAD(&se_sess->sess_acl_list); | 473 | INIT_LIST_HEAD(&se_sess->sess_acl_list); |
440 | atomic_set(&se_sess->mib_ref_count, 0); | ||
441 | 474 | ||
442 | return se_sess; | 475 | return se_sess; |
443 | } | 476 | } |
@@ -546,12 +579,6 @@ void transport_deregister_session(struct se_session *se_sess) | |||
546 | transport_free_session(se_sess); | 579 | transport_free_session(se_sess); |
547 | return; | 580 | return; |
548 | } | 581 | } |
549 | /* | ||
550 | * Wait for possible reference in drivers/target/target_core_mib.c: | ||
551 | * scsi_att_intr_port_seq_show() | ||
552 | */ | ||
553 | while (atomic_read(&se_sess->mib_ref_count) != 0) | ||
554 | cpu_relax(); | ||
555 | 582 | ||
556 | spin_lock_bh(&se_tpg->session_lock); | 583 | spin_lock_bh(&se_tpg->session_lock); |
557 | list_del(&se_sess->sess_list); | 584 | list_del(&se_sess->sess_list); |
@@ -574,7 +601,6 @@ void transport_deregister_session(struct se_session *se_sess) | |||
574 | spin_unlock_bh(&se_tpg->acl_node_lock); | 601 | spin_unlock_bh(&se_tpg->acl_node_lock); |
575 | 602 | ||
576 | core_tpg_wait_for_nacl_pr_ref(se_nacl); | 603 | core_tpg_wait_for_nacl_pr_ref(se_nacl); |
577 | core_tpg_wait_for_mib_ref(se_nacl); | ||
578 | core_free_device_list_for_node(se_nacl, se_tpg); | 604 | core_free_device_list_for_node(se_nacl, se_tpg); |
579 | TPG_TFO(se_tpg)->tpg_release_fabric_acl(se_tpg, | 605 | TPG_TFO(se_tpg)->tpg_release_fabric_acl(se_tpg, |
580 | se_nacl); | 606 | se_nacl); |
@@ -4827,6 +4853,8 @@ static int transport_do_se_mem_map( | |||
4827 | 4853 | ||
4828 | return ret; | 4854 | return ret; |
4829 | } | 4855 | } |
4856 | |||
4857 | BUG_ON(list_empty(se_mem_list)); | ||
4830 | /* | 4858 | /* |
4831 | * This is the normal path for all normal non BIDI and BIDI-COMMAND | 4859 | * This is the normal path for all normal non BIDI and BIDI-COMMAND |
4832 | * WRITE payloads.. If we need to do BIDI READ passthrough for | 4860 | * WRITE payloads.. If we need to do BIDI READ passthrough for |
@@ -5008,7 +5036,9 @@ transport_map_control_cmd_to_task(struct se_cmd *cmd) | |||
5008 | struct se_mem *se_mem = NULL, *se_mem_lout = NULL; | 5036 | struct se_mem *se_mem = NULL, *se_mem_lout = NULL; |
5009 | u32 se_mem_cnt = 0, task_offset = 0; | 5037 | u32 se_mem_cnt = 0, task_offset = 0; |
5010 | 5038 | ||
5011 | BUG_ON(list_empty(cmd->t_task->t_mem_list)); | 5039 | if (!list_empty(T_TASK(cmd)->t_mem_list)) |
5040 | se_mem = list_entry(T_TASK(cmd)->t_mem_list->next, | ||
5041 | struct se_mem, se_list); | ||
5012 | 5042 | ||
5013 | ret = transport_do_se_mem_map(dev, task, | 5043 | ret = transport_do_se_mem_map(dev, task, |
5014 | cmd->t_task->t_mem_list, NULL, se_mem, | 5044 | cmd->t_task->t_mem_list, NULL, se_mem, |
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index f7a5dba3ca23..bf7c687519ef 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig | |||
@@ -4,7 +4,6 @@ | |||
4 | 4 | ||
5 | menuconfig THERMAL | 5 | menuconfig THERMAL |
6 | tristate "Generic Thermal sysfs driver" | 6 | tristate "Generic Thermal sysfs driver" |
7 | depends on NET | ||
8 | help | 7 | help |
9 | Generic Thermal Sysfs driver offers a generic mechanism for | 8 | Generic Thermal Sysfs driver offers a generic mechanism for |
10 | thermal management. Usually it's made up of one or more thermal | 9 | thermal management. Usually it's made up of one or more thermal |
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c index 7d0e63c79280..713b7ea4a607 100644 --- a/drivers/thermal/thermal_sys.c +++ b/drivers/thermal/thermal_sys.c | |||
@@ -62,20 +62,6 @@ static DEFINE_MUTEX(thermal_list_lock); | |||
62 | 62 | ||
63 | static unsigned int thermal_event_seqnum; | 63 | static unsigned int thermal_event_seqnum; |
64 | 64 | ||
65 | static struct genl_family thermal_event_genl_family = { | ||
66 | .id = GENL_ID_GENERATE, | ||
67 | .name = THERMAL_GENL_FAMILY_NAME, | ||
68 | .version = THERMAL_GENL_VERSION, | ||
69 | .maxattr = THERMAL_GENL_ATTR_MAX, | ||
70 | }; | ||
71 | |||
72 | static struct genl_multicast_group thermal_event_mcgrp = { | ||
73 | .name = THERMAL_GENL_MCAST_GROUP_NAME, | ||
74 | }; | ||
75 | |||
76 | static int genetlink_init(void); | ||
77 | static void genetlink_exit(void); | ||
78 | |||
79 | static int get_idr(struct idr *idr, struct mutex *lock, int *id) | 65 | static int get_idr(struct idr *idr, struct mutex *lock, int *id) |
80 | { | 66 | { |
81 | int err; | 67 | int err; |
@@ -1225,6 +1211,18 @@ void thermal_zone_device_unregister(struct thermal_zone_device *tz) | |||
1225 | 1211 | ||
1226 | EXPORT_SYMBOL(thermal_zone_device_unregister); | 1212 | EXPORT_SYMBOL(thermal_zone_device_unregister); |
1227 | 1213 | ||
1214 | #ifdef CONFIG_NET | ||
1215 | static struct genl_family thermal_event_genl_family = { | ||
1216 | .id = GENL_ID_GENERATE, | ||
1217 | .name = THERMAL_GENL_FAMILY_NAME, | ||
1218 | .version = THERMAL_GENL_VERSION, | ||
1219 | .maxattr = THERMAL_GENL_ATTR_MAX, | ||
1220 | }; | ||
1221 | |||
1222 | static struct genl_multicast_group thermal_event_mcgrp = { | ||
1223 | .name = THERMAL_GENL_MCAST_GROUP_NAME, | ||
1224 | }; | ||
1225 | |||
1228 | int generate_netlink_event(u32 orig, enum events event) | 1226 | int generate_netlink_event(u32 orig, enum events event) |
1229 | { | 1227 | { |
1230 | struct sk_buff *skb; | 1228 | struct sk_buff *skb; |
@@ -1301,6 +1299,15 @@ static int genetlink_init(void) | |||
1301 | return result; | 1299 | return result; |
1302 | } | 1300 | } |
1303 | 1301 | ||
1302 | static void genetlink_exit(void) | ||
1303 | { | ||
1304 | genl_unregister_family(&thermal_event_genl_family); | ||
1305 | } | ||
1306 | #else /* !CONFIG_NET */ | ||
1307 | static inline int genetlink_init(void) { return 0; } | ||
1308 | static inline void genetlink_exit(void) {} | ||
1309 | #endif /* !CONFIG_NET */ | ||
1310 | |||
1304 | static int __init thermal_init(void) | 1311 | static int __init thermal_init(void) |
1305 | { | 1312 | { |
1306 | int result = 0; | 1313 | int result = 0; |
@@ -1316,11 +1323,6 @@ static int __init thermal_init(void) | |||
1316 | return result; | 1323 | return result; |
1317 | } | 1324 | } |
1318 | 1325 | ||
1319 | static void genetlink_exit(void) | ||
1320 | { | ||
1321 | genl_unregister_family(&thermal_event_genl_family); | ||
1322 | } | ||
1323 | |||
1324 | static void __exit thermal_exit(void) | 1326 | static void __exit thermal_exit(void) |
1325 | { | 1327 | { |
1326 | class_unregister(&thermal_class); | 1328 | class_unregister(&thermal_class); |
diff --git a/drivers/tty/serial/max3100.c b/drivers/tty/serial/max3100.c index beb1afa27d8d..7b951adac54b 100644 --- a/drivers/tty/serial/max3100.c +++ b/drivers/tty/serial/max3100.c | |||
@@ -601,7 +601,7 @@ static int max3100_startup(struct uart_port *port) | |||
601 | s->rts = 0; | 601 | s->rts = 0; |
602 | 602 | ||
603 | sprintf(b, "max3100-%d", s->minor); | 603 | sprintf(b, "max3100-%d", s->minor); |
604 | s->workqueue = create_freezeable_workqueue(b); | 604 | s->workqueue = create_freezable_workqueue(b); |
605 | if (!s->workqueue) { | 605 | if (!s->workqueue) { |
606 | dev_warn(&s->spi->dev, "cannot create workqueue\n"); | 606 | dev_warn(&s->spi->dev, "cannot create workqueue\n"); |
607 | return -EBUSY; | 607 | return -EBUSY; |
diff --git a/drivers/tty/serial/max3107.c b/drivers/tty/serial/max3107.c index 910870edf708..750b4f627315 100644 --- a/drivers/tty/serial/max3107.c +++ b/drivers/tty/serial/max3107.c | |||
@@ -833,7 +833,7 @@ static int max3107_startup(struct uart_port *port) | |||
833 | struct max3107_port *s = container_of(port, struct max3107_port, port); | 833 | struct max3107_port *s = container_of(port, struct max3107_port, port); |
834 | 834 | ||
835 | /* Initialize work queue */ | 835 | /* Initialize work queue */ |
836 | s->workqueue = create_freezeable_workqueue("max3107"); | 836 | s->workqueue = create_freezable_workqueue("max3107"); |
837 | if (!s->workqueue) { | 837 | if (!s->workqueue) { |
838 | dev_err(&s->spi->dev, "Workqueue creation failed\n"); | 838 | dev_err(&s->spi->dev, "Workqueue creation failed\n"); |
839 | return -EBUSY; | 839 | return -EBUSY; |
diff --git a/drivers/tty/serial/serial_cs.c b/drivers/tty/serial/serial_cs.c index 93760b2ea172..1ef4df9bf7e4 100644 --- a/drivers/tty/serial/serial_cs.c +++ b/drivers/tty/serial/serial_cs.c | |||
@@ -712,6 +712,7 @@ static struct pcmcia_device_id serial_ids[] = { | |||
712 | PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf), | 712 | PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf), |
713 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0e01), | 713 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0e01), |
714 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05), | 714 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05), |
715 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0b05), | ||
715 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101), | 716 | PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101), |
716 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070), | 717 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070), |
717 | PCMCIA_MFC_DEVICE_MANF_CARD(1, 0x0101, 0x0562), | 718 | PCMCIA_MFC_DEVICE_MANF_CARD(1, 0x0101, 0x0562), |
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index d041c6826e43..0f299b7aad60 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c | |||
@@ -2681,17 +2681,13 @@ hub_port_init (struct usb_hub *hub, struct usb_device *udev, int port1, | |||
2681 | 2681 | ||
2682 | mutex_lock(&usb_address0_mutex); | 2682 | mutex_lock(&usb_address0_mutex); |
2683 | 2683 | ||
2684 | if (!udev->config && oldspeed == USB_SPEED_SUPER) { | 2684 | /* Reset the device; full speed may morph to high speed */ |
2685 | /* Don't reset USB 3.0 devices during an initial setup */ | 2685 | /* FIXME a USB 2.0 device may morph into SuperSpeed on reset. */ |
2686 | usb_set_device_state(udev, USB_STATE_DEFAULT); | 2686 | retval = hub_port_reset(hub, port1, udev, delay); |
2687 | } else { | 2687 | if (retval < 0) /* error or disconnect */ |
2688 | /* Reset the device; full speed may morph to high speed */ | 2688 | goto fail; |
2689 | /* FIXME a USB 2.0 device may morph into SuperSpeed on reset. */ | 2689 | /* success, speed is known */ |
2690 | retval = hub_port_reset(hub, port1, udev, delay); | 2690 | |
2691 | if (retval < 0) /* error or disconnect */ | ||
2692 | goto fail; | ||
2693 | /* success, speed is known */ | ||
2694 | } | ||
2695 | retval = -ENODEV; | 2691 | retval = -ENODEV; |
2696 | 2692 | ||
2697 | if (oldspeed != USB_SPEED_UNKNOWN && oldspeed != udev->speed) { | 2693 | if (oldspeed != USB_SPEED_UNKNOWN && oldspeed != udev->speed) { |
diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c index 44c595432d6f..81ce6a8e1d94 100644 --- a/drivers/usb/core/quirks.c +++ b/drivers/usb/core/quirks.c | |||
@@ -48,6 +48,10 @@ static const struct usb_device_id usb_quirk_list[] = { | |||
48 | { USB_DEVICE(0x04b4, 0x0526), .driver_info = | 48 | { USB_DEVICE(0x04b4, 0x0526), .driver_info = |
49 | USB_QUIRK_CONFIG_INTF_STRINGS }, | 49 | USB_QUIRK_CONFIG_INTF_STRINGS }, |
50 | 50 | ||
51 | /* Samsung Android phone modem - ID conflict with SPH-I500 */ | ||
52 | { USB_DEVICE(0x04e8, 0x6601), .driver_info = | ||
53 | USB_QUIRK_CONFIG_INTF_STRINGS }, | ||
54 | |||
51 | /* Roland SC-8820 */ | 55 | /* Roland SC-8820 */ |
52 | { USB_DEVICE(0x0582, 0x0007), .driver_info = USB_QUIRK_RESET_RESUME }, | 56 | { USB_DEVICE(0x0582, 0x0007), .driver_info = USB_QUIRK_RESET_RESUME }, |
53 | 57 | ||
@@ -68,6 +72,10 @@ static const struct usb_device_id usb_quirk_list[] = { | |||
68 | /* M-Systems Flash Disk Pioneers */ | 72 | /* M-Systems Flash Disk Pioneers */ |
69 | { USB_DEVICE(0x08ec, 0x1000), .driver_info = USB_QUIRK_RESET_RESUME }, | 73 | { USB_DEVICE(0x08ec, 0x1000), .driver_info = USB_QUIRK_RESET_RESUME }, |
70 | 74 | ||
75 | /* Keytouch QWERTY Panel keyboard */ | ||
76 | { USB_DEVICE(0x0926, 0x3333), .driver_info = | ||
77 | USB_QUIRK_CONFIG_INTF_STRINGS }, | ||
78 | |||
71 | /* X-Rite/Gretag-Macbeth Eye-One Pro display colorimeter */ | 79 | /* X-Rite/Gretag-Macbeth Eye-One Pro display colorimeter */ |
72 | { USB_DEVICE(0x0971, 0x2000), .driver_info = USB_QUIRK_NO_SET_INTF }, | 80 | { USB_DEVICE(0x0971, 0x2000), .driver_info = USB_QUIRK_NO_SET_INTF }, |
73 | 81 | ||
diff --git a/drivers/usb/gadget/f_phonet.c b/drivers/usb/gadget/f_phonet.c index 3c6e1a058745..5e1495097ec3 100644 --- a/drivers/usb/gadget/f_phonet.c +++ b/drivers/usb/gadget/f_phonet.c | |||
@@ -346,14 +346,19 @@ static void pn_rx_complete(struct usb_ep *ep, struct usb_request *req) | |||
346 | 346 | ||
347 | if (unlikely(!skb)) | 347 | if (unlikely(!skb)) |
348 | break; | 348 | break; |
349 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, 0, | ||
350 | req->actual); | ||
351 | page = NULL; | ||
352 | 349 | ||
353 | if (req->actual < req->length) { /* Last fragment */ | 350 | if (skb->len == 0) { /* First fragment */ |
354 | skb->protocol = htons(ETH_P_PHONET); | 351 | skb->protocol = htons(ETH_P_PHONET); |
355 | skb_reset_mac_header(skb); | 352 | skb_reset_mac_header(skb); |
356 | pskb_pull(skb, 1); | 353 | /* Can't use pskb_pull() on page in IRQ */ |
354 | memcpy(skb_put(skb, 1), page_address(page), 1); | ||
355 | } | ||
356 | |||
357 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, | ||
358 | skb->len == 0, req->actual); | ||
359 | page = NULL; | ||
360 | |||
361 | if (req->actual < req->length) { /* Last fragment */ | ||
357 | skb->dev = dev; | 362 | skb->dev = dev; |
358 | dev->stats.rx_packets++; | 363 | dev->stats.rx_packets++; |
359 | dev->stats.rx_bytes += skb->len; | 364 | dev->stats.rx_bytes += skb->len; |
diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c index e8f4f36fdf0b..a6f21b891f68 100644 --- a/drivers/usb/host/ehci-xilinx-of.c +++ b/drivers/usb/host/ehci-xilinx-of.c | |||
@@ -29,6 +29,7 @@ | |||
29 | 29 | ||
30 | #include <linux/of.h> | 30 | #include <linux/of.h> |
31 | #include <linux/of_platform.h> | 31 | #include <linux/of_platform.h> |
32 | #include <linux/of_address.h> | ||
32 | 33 | ||
33 | /** | 34 | /** |
34 | * ehci_xilinx_of_setup - Initialize the device for ehci_reset() | 35 | * ehci_xilinx_of_setup - Initialize the device for ehci_reset() |
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index fcbf4abbf381..0231814a97a5 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c | |||
@@ -169,9 +169,10 @@ static void xhci_print_ports(struct xhci_hcd *xhci) | |||
169 | } | 169 | } |
170 | } | 170 | } |
171 | 171 | ||
172 | void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num) | 172 | void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num) |
173 | { | 173 | { |
174 | void *addr; | 174 | struct xhci_intr_reg __iomem *ir_set = &xhci->run_regs->ir_set[set_num]; |
175 | void __iomem *addr; | ||
175 | u32 temp; | 176 | u32 temp; |
176 | u64 temp_64; | 177 | u64 temp_64; |
177 | 178 | ||
@@ -449,7 +450,7 @@ char *xhci_get_slot_state(struct xhci_hcd *xhci, | |||
449 | } | 450 | } |
450 | } | 451 | } |
451 | 452 | ||
452 | void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) | 453 | static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) |
453 | { | 454 | { |
454 | /* Fields are 32 bits wide, DMA addresses are in bytes */ | 455 | /* Fields are 32 bits wide, DMA addresses are in bytes */ |
455 | int field_size = 32 / 8; | 456 | int field_size = 32 / 8; |
@@ -488,7 +489,7 @@ void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) | |||
488 | dbg_rsvd64(xhci, (u64 *)slot_ctx, dma); | 489 | dbg_rsvd64(xhci, (u64 *)slot_ctx, dma); |
489 | } | 490 | } |
490 | 491 | ||
491 | void xhci_dbg_ep_ctx(struct xhci_hcd *xhci, | 492 | static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci, |
492 | struct xhci_container_ctx *ctx, | 493 | struct xhci_container_ctx *ctx, |
493 | unsigned int last_ep) | 494 | unsigned int last_ep) |
494 | { | 495 | { |
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 1d0f45f0e7a6..a9534396e85b 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -307,7 +307,7 @@ struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci, | |||
307 | 307 | ||
308 | /***************** Streams structures manipulation *************************/ | 308 | /***************** Streams structures manipulation *************************/ |
309 | 309 | ||
310 | void xhci_free_stream_ctx(struct xhci_hcd *xhci, | 310 | static void xhci_free_stream_ctx(struct xhci_hcd *xhci, |
311 | unsigned int num_stream_ctxs, | 311 | unsigned int num_stream_ctxs, |
312 | struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) | 312 | struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) |
313 | { | 313 | { |
@@ -335,7 +335,7 @@ void xhci_free_stream_ctx(struct xhci_hcd *xhci, | |||
335 | * The stream context array must be a power of 2, and can be as small as | 335 | * The stream context array must be a power of 2, and can be as small as |
336 | * 64 bytes or as large as 1MB. | 336 | * 64 bytes or as large as 1MB. |
337 | */ | 337 | */ |
338 | struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, | 338 | static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, |
339 | unsigned int num_stream_ctxs, dma_addr_t *dma, | 339 | unsigned int num_stream_ctxs, dma_addr_t *dma, |
340 | gfp_t mem_flags) | 340 | gfp_t mem_flags) |
341 | { | 341 | { |
@@ -1900,11 +1900,11 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
1900 | val &= DBOFF_MASK; | 1900 | val &= DBOFF_MASK; |
1901 | xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x" | 1901 | xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x" |
1902 | " from cap regs base addr\n", val); | 1902 | " from cap regs base addr\n", val); |
1903 | xhci->dba = (void *) xhci->cap_regs + val; | 1903 | xhci->dba = (void __iomem *) xhci->cap_regs + val; |
1904 | xhci_dbg_regs(xhci); | 1904 | xhci_dbg_regs(xhci); |
1905 | xhci_print_run_regs(xhci); | 1905 | xhci_print_run_regs(xhci); |
1906 | /* Set ir_set to interrupt register set 0 */ | 1906 | /* Set ir_set to interrupt register set 0 */ |
1907 | xhci->ir_set = (void *) xhci->run_regs->ir_set; | 1907 | xhci->ir_set = &xhci->run_regs->ir_set[0]; |
1908 | 1908 | ||
1909 | /* | 1909 | /* |
1910 | * Event ring setup: Allocate a normal ring, but also setup | 1910 | * Event ring setup: Allocate a normal ring, but also setup |
@@ -1961,7 +1961,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
1961 | /* Set the event ring dequeue address */ | 1961 | /* Set the event ring dequeue address */ |
1962 | xhci_set_hc_event_deq(xhci); | 1962 | xhci_set_hc_event_deq(xhci); |
1963 | xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n"); | 1963 | xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n"); |
1964 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | 1964 | xhci_print_ir_set(xhci, 0); |
1965 | 1965 | ||
1966 | /* | 1966 | /* |
1967 | * XXX: Might need to set the Interrupter Moderation Register to | 1967 | * XXX: Might need to set the Interrupter Moderation Register to |
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 3e8211c1ce5a..3289bf4832c9 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -474,8 +474,11 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
474 | state->new_deq_seg = find_trb_seg(cur_td->start_seg, | 474 | state->new_deq_seg = find_trb_seg(cur_td->start_seg, |
475 | dev->eps[ep_index].stopped_trb, | 475 | dev->eps[ep_index].stopped_trb, |
476 | &state->new_cycle_state); | 476 | &state->new_cycle_state); |
477 | if (!state->new_deq_seg) | 477 | if (!state->new_deq_seg) { |
478 | BUG(); | 478 | WARN_ON(1); |
479 | return; | ||
480 | } | ||
481 | |||
479 | /* Dig out the cycle state saved by the xHC during the stop ep cmd */ | 482 | /* Dig out the cycle state saved by the xHC during the stop ep cmd */ |
480 | xhci_dbg(xhci, "Finding endpoint context\n"); | 483 | xhci_dbg(xhci, "Finding endpoint context\n"); |
481 | ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); | 484 | ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); |
@@ -486,8 +489,10 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
486 | state->new_deq_seg = find_trb_seg(state->new_deq_seg, | 489 | state->new_deq_seg = find_trb_seg(state->new_deq_seg, |
487 | state->new_deq_ptr, | 490 | state->new_deq_ptr, |
488 | &state->new_cycle_state); | 491 | &state->new_cycle_state); |
489 | if (!state->new_deq_seg) | 492 | if (!state->new_deq_seg) { |
490 | BUG(); | 493 | WARN_ON(1); |
494 | return; | ||
495 | } | ||
491 | 496 | ||
492 | trb = &state->new_deq_ptr->generic; | 497 | trb = &state->new_deq_ptr->generic; |
493 | if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) && | 498 | if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) && |
@@ -2363,12 +2368,13 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2363 | 2368 | ||
2364 | /* Scatter gather list entries may cross 64KB boundaries */ | 2369 | /* Scatter gather list entries may cross 64KB boundaries */ |
2365 | running_total = TRB_MAX_BUFF_SIZE - | 2370 | running_total = TRB_MAX_BUFF_SIZE - |
2366 | (sg_dma_address(sg) & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2371 | (sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1)); |
2372 | running_total &= TRB_MAX_BUFF_SIZE - 1; | ||
2367 | if (running_total != 0) | 2373 | if (running_total != 0) |
2368 | num_trbs++; | 2374 | num_trbs++; |
2369 | 2375 | ||
2370 | /* How many more 64KB chunks to transfer, how many more TRBs? */ | 2376 | /* How many more 64KB chunks to transfer, how many more TRBs? */ |
2371 | while (running_total < sg_dma_len(sg)) { | 2377 | while (running_total < sg_dma_len(sg) && running_total < temp) { |
2372 | num_trbs++; | 2378 | num_trbs++; |
2373 | running_total += TRB_MAX_BUFF_SIZE; | 2379 | running_total += TRB_MAX_BUFF_SIZE; |
2374 | } | 2380 | } |
@@ -2394,11 +2400,11 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2394 | static void check_trb_math(struct urb *urb, int num_trbs, int running_total) | 2400 | static void check_trb_math(struct urb *urb, int num_trbs, int running_total) |
2395 | { | 2401 | { |
2396 | if (num_trbs != 0) | 2402 | if (num_trbs != 0) |
2397 | dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated number of " | 2403 | dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of " |
2398 | "TRBs, %d left\n", __func__, | 2404 | "TRBs, %d left\n", __func__, |
2399 | urb->ep->desc.bEndpointAddress, num_trbs); | 2405 | urb->ep->desc.bEndpointAddress, num_trbs); |
2400 | if (running_total != urb->transfer_buffer_length) | 2406 | if (running_total != urb->transfer_buffer_length) |
2401 | dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, " | 2407 | dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, " |
2402 | "queued %#x (%d), asked for %#x (%d)\n", | 2408 | "queued %#x (%d), asked for %#x (%d)\n", |
2403 | __func__, | 2409 | __func__, |
2404 | urb->ep->desc.bEndpointAddress, | 2410 | urb->ep->desc.bEndpointAddress, |
@@ -2533,8 +2539,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2533 | sg = urb->sg; | 2539 | sg = urb->sg; |
2534 | addr = (u64) sg_dma_address(sg); | 2540 | addr = (u64) sg_dma_address(sg); |
2535 | this_sg_len = sg_dma_len(sg); | 2541 | this_sg_len = sg_dma_len(sg); |
2536 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2542 | trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2537 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | ||
2538 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); | 2543 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); |
2539 | if (trb_buff_len > urb->transfer_buffer_length) | 2544 | if (trb_buff_len > urb->transfer_buffer_length) |
2540 | trb_buff_len = urb->transfer_buffer_length; | 2545 | trb_buff_len = urb->transfer_buffer_length; |
@@ -2572,7 +2577,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2572 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), | 2577 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), |
2573 | (unsigned int) addr + trb_buff_len); | 2578 | (unsigned int) addr + trb_buff_len); |
2574 | if (TRB_MAX_BUFF_SIZE - | 2579 | if (TRB_MAX_BUFF_SIZE - |
2575 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)) < trb_buff_len) { | 2580 | (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) { |
2576 | xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n"); | 2581 | xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n"); |
2577 | xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n", | 2582 | xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n", |
2578 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), | 2583 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), |
@@ -2616,7 +2621,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2616 | } | 2621 | } |
2617 | 2622 | ||
2618 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2623 | trb_buff_len = TRB_MAX_BUFF_SIZE - |
2619 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2624 | (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2620 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); | 2625 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); |
2621 | if (running_total + trb_buff_len > urb->transfer_buffer_length) | 2626 | if (running_total + trb_buff_len > urb->transfer_buffer_length) |
2622 | trb_buff_len = | 2627 | trb_buff_len = |
@@ -2656,7 +2661,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2656 | num_trbs = 0; | 2661 | num_trbs = 0; |
2657 | /* How much data is (potentially) left before the 64KB boundary? */ | 2662 | /* How much data is (potentially) left before the 64KB boundary? */ |
2658 | running_total = TRB_MAX_BUFF_SIZE - | 2663 | running_total = TRB_MAX_BUFF_SIZE - |
2659 | (urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2664 | (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1)); |
2665 | running_total &= TRB_MAX_BUFF_SIZE - 1; | ||
2660 | 2666 | ||
2661 | /* If there's some data on this 64KB chunk, or we have to send a | 2667 | /* If there's some data on this 64KB chunk, or we have to send a |
2662 | * zero-length transfer, we need at least one TRB | 2668 | * zero-length transfer, we need at least one TRB |
@@ -2700,8 +2706,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2700 | /* How much data is in the first TRB? */ | 2706 | /* How much data is in the first TRB? */ |
2701 | addr = (u64) urb->transfer_dma; | 2707 | addr = (u64) urb->transfer_dma; |
2702 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2708 | trb_buff_len = TRB_MAX_BUFF_SIZE - |
2703 | (urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2709 | (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1)); |
2704 | if (urb->transfer_buffer_length < trb_buff_len) | 2710 | if (trb_buff_len > urb->transfer_buffer_length) |
2705 | trb_buff_len = urb->transfer_buffer_length; | 2711 | trb_buff_len = urb->transfer_buffer_length; |
2706 | 2712 | ||
2707 | first_trb = true; | 2713 | first_trb = true; |
@@ -2879,8 +2885,8 @@ static int count_isoc_trbs_needed(struct xhci_hcd *xhci, | |||
2879 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); | 2885 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); |
2880 | td_len = urb->iso_frame_desc[i].length; | 2886 | td_len = urb->iso_frame_desc[i].length; |
2881 | 2887 | ||
2882 | running_total = TRB_MAX_BUFF_SIZE - | 2888 | running_total = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2883 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2889 | running_total &= TRB_MAX_BUFF_SIZE - 1; |
2884 | if (running_total != 0) | 2890 | if (running_total != 0) |
2885 | num_trbs++; | 2891 | num_trbs++; |
2886 | 2892 | ||
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 34cf4e165877..2083fc2179b2 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c | |||
@@ -109,7 +109,7 @@ int xhci_halt(struct xhci_hcd *xhci) | |||
109 | /* | 109 | /* |
110 | * Set the run bit and wait for the host to be running. | 110 | * Set the run bit and wait for the host to be running. |
111 | */ | 111 | */ |
112 | int xhci_start(struct xhci_hcd *xhci) | 112 | static int xhci_start(struct xhci_hcd *xhci) |
113 | { | 113 | { |
114 | u32 temp; | 114 | u32 temp; |
115 | int ret; | 115 | int ret; |
@@ -329,7 +329,7 @@ int xhci_init(struct usb_hcd *hcd) | |||
329 | 329 | ||
330 | 330 | ||
331 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING | 331 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
332 | void xhci_event_ring_work(unsigned long arg) | 332 | static void xhci_event_ring_work(unsigned long arg) |
333 | { | 333 | { |
334 | unsigned long flags; | 334 | unsigned long flags; |
335 | int temp; | 335 | int temp; |
@@ -473,7 +473,7 @@ int xhci_run(struct usb_hcd *hcd) | |||
473 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); | 473 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); |
474 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), | 474 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), |
475 | &xhci->ir_set->irq_pending); | 475 | &xhci->ir_set->irq_pending); |
476 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | 476 | xhci_print_ir_set(xhci, 0); |
477 | 477 | ||
478 | if (NUM_TEST_NOOPS > 0) | 478 | if (NUM_TEST_NOOPS > 0) |
479 | doorbell = xhci_setup_one_noop(xhci); | 479 | doorbell = xhci_setup_one_noop(xhci); |
@@ -528,7 +528,7 @@ void xhci_stop(struct usb_hcd *hcd) | |||
528 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | 528 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
529 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), | 529 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), |
530 | &xhci->ir_set->irq_pending); | 530 | &xhci->ir_set->irq_pending); |
531 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | 531 | xhci_print_ir_set(xhci, 0); |
532 | 532 | ||
533 | xhci_dbg(xhci, "cleaning up memory\n"); | 533 | xhci_dbg(xhci, "cleaning up memory\n"); |
534 | xhci_mem_cleanup(xhci); | 534 | xhci_mem_cleanup(xhci); |
@@ -755,7 +755,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated) | |||
755 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | 755 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
756 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), | 756 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), |
757 | &xhci->ir_set->irq_pending); | 757 | &xhci->ir_set->irq_pending); |
758 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | 758 | xhci_print_ir_set(xhci, 0); |
759 | 759 | ||
760 | xhci_dbg(xhci, "cleaning up memory\n"); | 760 | xhci_dbg(xhci, "cleaning up memory\n"); |
761 | xhci_mem_cleanup(xhci); | 761 | xhci_mem_cleanup(xhci); |
@@ -857,7 +857,7 @@ unsigned int xhci_last_valid_endpoint(u32 added_ctxs) | |||
857 | /* Returns 1 if the arguments are OK; | 857 | /* Returns 1 if the arguments are OK; |
858 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. | 858 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. |
859 | */ | 859 | */ |
860 | int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, | 860 | static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, |
861 | struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev, | 861 | struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev, |
862 | const char *func) { | 862 | const char *func) { |
863 | struct xhci_hcd *xhci; | 863 | struct xhci_hcd *xhci; |
@@ -1693,7 +1693,7 @@ static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci, | |||
1693 | xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); | 1693 | xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); |
1694 | } | 1694 | } |
1695 | 1695 | ||
1696 | void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, | 1696 | static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, |
1697 | unsigned int slot_id, unsigned int ep_index, | 1697 | unsigned int slot_id, unsigned int ep_index, |
1698 | struct xhci_dequeue_state *deq_state) | 1698 | struct xhci_dequeue_state *deq_state) |
1699 | { | 1699 | { |
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 7f236fd22015..7f127df6dd55 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h | |||
@@ -1348,7 +1348,7 @@ static inline int xhci_link_trb_quirk(struct xhci_hcd *xhci) | |||
1348 | } | 1348 | } |
1349 | 1349 | ||
1350 | /* xHCI debugging */ | 1350 | /* xHCI debugging */ |
1351 | void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num); | 1351 | void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num); |
1352 | void xhci_print_registers(struct xhci_hcd *xhci); | 1352 | void xhci_print_registers(struct xhci_hcd *xhci); |
1353 | void xhci_dbg_regs(struct xhci_hcd *xhci); | 1353 | void xhci_dbg_regs(struct xhci_hcd *xhci); |
1354 | void xhci_print_run_regs(struct xhci_hcd *xhci); | 1354 | void xhci_print_run_regs(struct xhci_hcd *xhci); |
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 54a8bd1047d6..c292d5c499e7 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c | |||
@@ -1864,6 +1864,7 @@ allocate_instance(struct device *dev, | |||
1864 | INIT_LIST_HEAD(&musb->out_bulk); | 1864 | INIT_LIST_HEAD(&musb->out_bulk); |
1865 | 1865 | ||
1866 | hcd->uses_new_polling = 1; | 1866 | hcd->uses_new_polling = 1; |
1867 | hcd->has_tt = 1; | ||
1867 | 1868 | ||
1868 | musb->vbuserr_retry = VBUSERR_RETRY_COUNT; | 1869 | musb->vbuserr_retry = VBUSERR_RETRY_COUNT; |
1869 | musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; | 1870 | musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; |
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index d74a8113ae74..e6400be8a0f8 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h | |||
@@ -488,6 +488,15 @@ struct musb { | |||
488 | unsigned set_address:1; | 488 | unsigned set_address:1; |
489 | unsigned test_mode:1; | 489 | unsigned test_mode:1; |
490 | unsigned softconnect:1; | 490 | unsigned softconnect:1; |
491 | |||
492 | u8 address; | ||
493 | u8 test_mode_nr; | ||
494 | u16 ackpend; /* ep0 */ | ||
495 | enum musb_g_ep0_state ep0_state; | ||
496 | struct usb_gadget g; /* the gadget */ | ||
497 | struct usb_gadget_driver *gadget_driver; /* its driver */ | ||
498 | #endif | ||
499 | |||
491 | /* | 500 | /* |
492 | * FIXME: Remove this flag. | 501 | * FIXME: Remove this flag. |
493 | * | 502 | * |
@@ -501,14 +510,6 @@ struct musb { | |||
501 | */ | 510 | */ |
502 | unsigned double_buffer_not_ok:1 __deprecated; | 511 | unsigned double_buffer_not_ok:1 __deprecated; |
503 | 512 | ||
504 | u8 address; | ||
505 | u8 test_mode_nr; | ||
506 | u16 ackpend; /* ep0 */ | ||
507 | enum musb_g_ep0_state ep0_state; | ||
508 | struct usb_gadget g; /* the gadget */ | ||
509 | struct usb_gadget_driver *gadget_driver; /* its driver */ | ||
510 | #endif | ||
511 | |||
512 | struct musb_hdrc_config *config; | 513 | struct musb_hdrc_config *config; |
513 | 514 | ||
514 | #ifdef MUSB_CONFIG_PROC_FS | 515 | #ifdef MUSB_CONFIG_PROC_FS |
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c index a3f12333fc41..bc8badd16897 100644 --- a/drivers/usb/musb/omap2430.c +++ b/drivers/usb/musb/omap2430.c | |||
@@ -362,6 +362,7 @@ static int omap2430_musb_init(struct musb *musb) | |||
362 | 362 | ||
363 | static int omap2430_musb_exit(struct musb *musb) | 363 | static int omap2430_musb_exit(struct musb *musb) |
364 | { | 364 | { |
365 | del_timer_sync(&musb_idle_timer); | ||
365 | 366 | ||
366 | omap2430_low_level_exit(musb); | 367 | omap2430_low_level_exit(musb); |
367 | otg_put_transceiver(musb->xceiv); | 368 | otg_put_transceiver(musb->xceiv); |
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c index 7481ff8a49e4..0457813eebee 100644 --- a/drivers/usb/serial/sierra.c +++ b/drivers/usb/serial/sierra.c | |||
@@ -301,6 +301,9 @@ static const struct usb_device_id id_table[] = { | |||
301 | { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */ | 301 | { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */ |
302 | .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist | 302 | .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist |
303 | }, | 303 | }, |
304 | { USB_DEVICE(0x0f3d, 0x68A3), /* Airprime/Sierra Wireless Direct IP modems */ | ||
305 | .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist | ||
306 | }, | ||
304 | { USB_DEVICE(0x413C, 0x08133) }, /* Dell Computer Corp. Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port */ | 307 | { USB_DEVICE(0x413C, 0x08133) }, /* Dell Computer Corp. Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port */ |
305 | 308 | ||
306 | { } | 309 | { } |
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c index b004b2a485c3..9c014e2ecd68 100644 --- a/drivers/usb/serial/usb_wwan.c +++ b/drivers/usb/serial/usb_wwan.c | |||
@@ -295,12 +295,15 @@ static void usb_wwan_indat_callback(struct urb *urb) | |||
295 | __func__, status, endpoint); | 295 | __func__, status, endpoint); |
296 | } else { | 296 | } else { |
297 | tty = tty_port_tty_get(&port->port); | 297 | tty = tty_port_tty_get(&port->port); |
298 | if (urb->actual_length) { | 298 | if (tty) { |
299 | tty_insert_flip_string(tty, data, urb->actual_length); | 299 | if (urb->actual_length) { |
300 | tty_flip_buffer_push(tty); | 300 | tty_insert_flip_string(tty, data, |
301 | } else | 301 | urb->actual_length); |
302 | dbg("%s: empty read urb received", __func__); | 302 | tty_flip_buffer_push(tty); |
303 | tty_kref_put(tty); | 303 | } else |
304 | dbg("%s: empty read urb received", __func__); | ||
305 | tty_kref_put(tty); | ||
306 | } | ||
304 | 307 | ||
305 | /* Resubmit urb so we continue receiving */ | 308 | /* Resubmit urb so we continue receiving */ |
306 | if (status != -ESHUTDOWN) { | 309 | if (status != -ESHUTDOWN) { |
diff --git a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c index 15a5d89b7f39..1c11959a7d58 100644 --- a/drivers/usb/serial/visor.c +++ b/drivers/usb/serial/visor.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/uaccess.h> | 27 | #include <linux/uaccess.h> |
28 | #include <linux/usb.h> | 28 | #include <linux/usb.h> |
29 | #include <linux/usb/serial.h> | 29 | #include <linux/usb/serial.h> |
30 | #include <linux/usb/cdc.h> | ||
30 | #include "visor.h" | 31 | #include "visor.h" |
31 | 32 | ||
32 | /* | 33 | /* |
@@ -479,6 +480,17 @@ static int visor_probe(struct usb_serial *serial, | |||
479 | 480 | ||
480 | dbg("%s", __func__); | 481 | dbg("%s", __func__); |
481 | 482 | ||
483 | /* | ||
484 | * some Samsung Android phones in modem mode have the same ID | ||
485 | * as SPH-I500, but they are ACM devices, so dont bind to them | ||
486 | */ | ||
487 | if (id->idVendor == SAMSUNG_VENDOR_ID && | ||
488 | id->idProduct == SAMSUNG_SPH_I500_ID && | ||
489 | serial->dev->descriptor.bDeviceClass == USB_CLASS_COMM && | ||
490 | serial->dev->descriptor.bDeviceSubClass == | ||
491 | USB_CDC_SUBCLASS_ACM) | ||
492 | return -ENODEV; | ||
493 | |||
482 | if (serial->dev->actconfig->desc.bConfigurationValue != 1) { | 494 | if (serial->dev->actconfig->desc.bConfigurationValue != 1) { |
483 | dev_err(&serial->dev->dev, "active config #%d != 1 ??\n", | 495 | dev_err(&serial->dev->dev, "active config #%d != 1 ??\n", |
484 | serial->dev->actconfig->desc.bConfigurationValue); | 496 | serial->dev->actconfig->desc.bConfigurationValue); |
diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c index 8010aaeb5adb..dd0e84a9bd2f 100644 --- a/drivers/video/backlight/ltv350qv.c +++ b/drivers/video/backlight/ltv350qv.c | |||
@@ -239,11 +239,15 @@ static int __devinit ltv350qv_probe(struct spi_device *spi) | |||
239 | lcd->spi = spi; | 239 | lcd->spi = spi; |
240 | lcd->power = FB_BLANK_POWERDOWN; | 240 | lcd->power = FB_BLANK_POWERDOWN; |
241 | lcd->buffer = kzalloc(8, GFP_KERNEL); | 241 | lcd->buffer = kzalloc(8, GFP_KERNEL); |
242 | if (!lcd->buffer) { | ||
243 | ret = -ENOMEM; | ||
244 | goto out_free_lcd; | ||
245 | } | ||
242 | 246 | ||
243 | ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); | 247 | ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); |
244 | if (IS_ERR(ld)) { | 248 | if (IS_ERR(ld)) { |
245 | ret = PTR_ERR(ld); | 249 | ret = PTR_ERR(ld); |
246 | goto out_free_lcd; | 250 | goto out_free_buffer; |
247 | } | 251 | } |
248 | lcd->ld = ld; | 252 | lcd->ld = ld; |
249 | 253 | ||
@@ -257,6 +261,8 @@ static int __devinit ltv350qv_probe(struct spi_device *spi) | |||
257 | 261 | ||
258 | out_unregister: | 262 | out_unregister: |
259 | lcd_device_unregister(ld); | 263 | lcd_device_unregister(ld); |
264 | out_free_buffer: | ||
265 | kfree(lcd->buffer); | ||
260 | out_free_lcd: | 266 | out_free_lcd: |
261 | kfree(lcd); | 267 | kfree(lcd); |
262 | return ret; | 268 | return ret; |
@@ -268,6 +274,7 @@ static int __devexit ltv350qv_remove(struct spi_device *spi) | |||
268 | 274 | ||
269 | ltv350qv_power(lcd, FB_BLANK_POWERDOWN); | 275 | ltv350qv_power(lcd, FB_BLANK_POWERDOWN); |
270 | lcd_device_unregister(lcd->ld); | 276 | lcd_device_unregister(lcd->ld); |
277 | kfree(lcd->buffer); | ||
271 | kfree(lcd); | 278 | kfree(lcd); |
272 | 279 | ||
273 | return 0; | 280 | return 0; |
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c index db8c4c4ac880..24177272bcb8 100644 --- a/drivers/xen/manage.c +++ b/drivers/xen/manage.c | |||
@@ -37,11 +37,19 @@ static enum shutdown_state shutting_down = SHUTDOWN_INVALID; | |||
37 | #ifdef CONFIG_PM_SLEEP | 37 | #ifdef CONFIG_PM_SLEEP |
38 | static int xen_hvm_suspend(void *data) | 38 | static int xen_hvm_suspend(void *data) |
39 | { | 39 | { |
40 | int err; | ||
40 | struct sched_shutdown r = { .reason = SHUTDOWN_suspend }; | 41 | struct sched_shutdown r = { .reason = SHUTDOWN_suspend }; |
41 | int *cancelled = data; | 42 | int *cancelled = data; |
42 | 43 | ||
43 | BUG_ON(!irqs_disabled()); | 44 | BUG_ON(!irqs_disabled()); |
44 | 45 | ||
46 | err = sysdev_suspend(PMSG_SUSPEND); | ||
47 | if (err) { | ||
48 | printk(KERN_ERR "xen_hvm_suspend: sysdev_suspend failed: %d\n", | ||
49 | err); | ||
50 | return err; | ||
51 | } | ||
52 | |||
45 | *cancelled = HYPERVISOR_sched_op(SCHEDOP_shutdown, &r); | 53 | *cancelled = HYPERVISOR_sched_op(SCHEDOP_shutdown, &r); |
46 | 54 | ||
47 | xen_hvm_post_suspend(*cancelled); | 55 | xen_hvm_post_suspend(*cancelled); |
@@ -53,6 +61,8 @@ static int xen_hvm_suspend(void *data) | |||
53 | xen_timer_resume(); | 61 | xen_timer_resume(); |
54 | } | 62 | } |
55 | 63 | ||
64 | sysdev_resume(); | ||
65 | |||
56 | return 0; | 66 | return 0; |
57 | } | 67 | } |
58 | 68 | ||
diff --git a/fs/afs/write.c b/fs/afs/write.c index 15690bb1d3b5..789b3afb3423 100644 --- a/fs/afs/write.c +++ b/fs/afs/write.c | |||
@@ -140,6 +140,7 @@ int afs_write_begin(struct file *file, struct address_space *mapping, | |||
140 | candidate->first = candidate->last = index; | 140 | candidate->first = candidate->last = index; |
141 | candidate->offset_first = from; | 141 | candidate->offset_first = from; |
142 | candidate->to_last = to; | 142 | candidate->to_last = to; |
143 | INIT_LIST_HEAD(&candidate->link); | ||
143 | candidate->usage = 1; | 144 | candidate->usage = 1; |
144 | candidate->state = AFS_WBACK_PENDING; | 145 | candidate->state = AFS_WBACK_PENDING; |
145 | init_waitqueue_head(&candidate->waitq); | 146 | init_waitqueue_head(&candidate->waitq); |
@@ -239,15 +239,23 @@ static void __put_ioctx(struct kioctx *ctx) | |||
239 | call_rcu(&ctx->rcu_head, ctx_rcu_free); | 239 | call_rcu(&ctx->rcu_head, ctx_rcu_free); |
240 | } | 240 | } |
241 | 241 | ||
242 | #define get_ioctx(kioctx) do { \ | 242 | static inline void get_ioctx(struct kioctx *kioctx) |
243 | BUG_ON(atomic_read(&(kioctx)->users) <= 0); \ | 243 | { |
244 | atomic_inc(&(kioctx)->users); \ | 244 | BUG_ON(atomic_read(&kioctx->users) <= 0); |
245 | } while (0) | 245 | atomic_inc(&kioctx->users); |
246 | #define put_ioctx(kioctx) do { \ | 246 | } |
247 | BUG_ON(atomic_read(&(kioctx)->users) <= 0); \ | 247 | |
248 | if (unlikely(atomic_dec_and_test(&(kioctx)->users))) \ | 248 | static inline int try_get_ioctx(struct kioctx *kioctx) |
249 | __put_ioctx(kioctx); \ | 249 | { |
250 | } while (0) | 250 | return atomic_inc_not_zero(&kioctx->users); |
251 | } | ||
252 | |||
253 | static inline void put_ioctx(struct kioctx *kioctx) | ||
254 | { | ||
255 | BUG_ON(atomic_read(&kioctx->users) <= 0); | ||
256 | if (unlikely(atomic_dec_and_test(&kioctx->users))) | ||
257 | __put_ioctx(kioctx); | ||
258 | } | ||
251 | 259 | ||
252 | /* ioctx_alloc | 260 | /* ioctx_alloc |
253 | * Allocates and initializes an ioctx. Returns an ERR_PTR if it failed. | 261 | * Allocates and initializes an ioctx. Returns an ERR_PTR if it failed. |
@@ -601,8 +609,13 @@ static struct kioctx *lookup_ioctx(unsigned long ctx_id) | |||
601 | rcu_read_lock(); | 609 | rcu_read_lock(); |
602 | 610 | ||
603 | hlist_for_each_entry_rcu(ctx, n, &mm->ioctx_list, list) { | 611 | hlist_for_each_entry_rcu(ctx, n, &mm->ioctx_list, list) { |
604 | if (ctx->user_id == ctx_id && !ctx->dead) { | 612 | /* |
605 | get_ioctx(ctx); | 613 | * RCU protects us against accessing freed memory but |
614 | * we have to be careful not to get a reference when the | ||
615 | * reference count already dropped to 0 (ctx->dead test | ||
616 | * is unreliable because of races). | ||
617 | */ | ||
618 | if (ctx->user_id == ctx_id && !ctx->dead && try_get_ioctx(ctx)){ | ||
606 | ret = ctx; | 619 | ret = ctx; |
607 | break; | 620 | break; |
608 | } | 621 | } |
@@ -1629,6 +1642,23 @@ static int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb, | |||
1629 | goto out_put_req; | 1642 | goto out_put_req; |
1630 | 1643 | ||
1631 | spin_lock_irq(&ctx->ctx_lock); | 1644 | spin_lock_irq(&ctx->ctx_lock); |
1645 | /* | ||
1646 | * We could have raced with io_destroy() and are currently holding a | ||
1647 | * reference to ctx which should be destroyed. We cannot submit IO | ||
1648 | * since ctx gets freed as soon as io_submit() puts its reference. The | ||
1649 | * check here is reliable: io_destroy() sets ctx->dead before waiting | ||
1650 | * for outstanding IO and the barrier between these two is realized by | ||
1651 | * unlock of mm->ioctx_lock and lock of ctx->ctx_lock. Analogously we | ||
1652 | * increment ctx->reqs_active before checking for ctx->dead and the | ||
1653 | * barrier is realized by unlock and lock of ctx->ctx_lock. Thus if we | ||
1654 | * don't see ctx->dead set here, io_destroy() waits for our IO to | ||
1655 | * finish. | ||
1656 | */ | ||
1657 | if (ctx->dead) { | ||
1658 | spin_unlock_irq(&ctx->ctx_lock); | ||
1659 | ret = -EINVAL; | ||
1660 | goto out_put_req; | ||
1661 | } | ||
1632 | aio_run_iocb(req); | 1662 | aio_run_iocb(req); |
1633 | if (!list_empty(&ctx->run_list)) { | 1663 | if (!list_empty(&ctx->run_list)) { |
1634 | /* drain the run list */ | 1664 | /* drain the run list */ |
diff --git a/fs/block_dev.c b/fs/block_dev.c index 333a7bb4cb9c..889287019599 100644 --- a/fs/block_dev.c +++ b/fs/block_dev.c | |||
@@ -873,6 +873,11 @@ int bd_link_disk_holder(struct block_device *bdev, struct gendisk *disk) | |||
873 | ret = add_symlink(bdev->bd_part->holder_dir, &disk_to_dev(disk)->kobj); | 873 | ret = add_symlink(bdev->bd_part->holder_dir, &disk_to_dev(disk)->kobj); |
874 | if (ret) | 874 | if (ret) |
875 | goto out_del; | 875 | goto out_del; |
876 | /* | ||
877 | * bdev could be deleted beneath us which would implicitly destroy | ||
878 | * the holder directory. Hold on to it. | ||
879 | */ | ||
880 | kobject_get(bdev->bd_part->holder_dir); | ||
876 | 881 | ||
877 | list_add(&holder->list, &bdev->bd_holder_disks); | 882 | list_add(&holder->list, &bdev->bd_holder_disks); |
878 | goto out_unlock; | 883 | goto out_unlock; |
@@ -909,6 +914,7 @@ void bd_unlink_disk_holder(struct block_device *bdev, struct gendisk *disk) | |||
909 | del_symlink(disk->slave_dir, &part_to_dev(bdev->bd_part)->kobj); | 914 | del_symlink(disk->slave_dir, &part_to_dev(bdev->bd_part)->kobj); |
910 | del_symlink(bdev->bd_part->holder_dir, | 915 | del_symlink(bdev->bd_part->holder_dir, |
911 | &disk_to_dev(disk)->kobj); | 916 | &disk_to_dev(disk)->kobj); |
917 | kobject_put(bdev->bd_part->holder_dir); | ||
912 | list_del_init(&holder->list); | 918 | list_del_init(&holder->list); |
913 | kfree(holder); | 919 | kfree(holder); |
914 | } | 920 | } |
@@ -922,14 +928,15 @@ EXPORT_SYMBOL_GPL(bd_unlink_disk_holder); | |||
922 | * flush_disk - invalidates all buffer-cache entries on a disk | 928 | * flush_disk - invalidates all buffer-cache entries on a disk |
923 | * | 929 | * |
924 | * @bdev: struct block device to be flushed | 930 | * @bdev: struct block device to be flushed |
931 | * @kill_dirty: flag to guide handling of dirty inodes | ||
925 | * | 932 | * |
926 | * Invalidates all buffer-cache entries on a disk. It should be called | 933 | * Invalidates all buffer-cache entries on a disk. It should be called |
927 | * when a disk has been changed -- either by a media change or online | 934 | * when a disk has been changed -- either by a media change or online |
928 | * resize. | 935 | * resize. |
929 | */ | 936 | */ |
930 | static void flush_disk(struct block_device *bdev) | 937 | static void flush_disk(struct block_device *bdev, bool kill_dirty) |
931 | { | 938 | { |
932 | if (__invalidate_device(bdev)) { | 939 | if (__invalidate_device(bdev, kill_dirty)) { |
933 | char name[BDEVNAME_SIZE] = ""; | 940 | char name[BDEVNAME_SIZE] = ""; |
934 | 941 | ||
935 | if (bdev->bd_disk) | 942 | if (bdev->bd_disk) |
@@ -966,7 +973,7 @@ void check_disk_size_change(struct gendisk *disk, struct block_device *bdev) | |||
966 | "%s: detected capacity change from %lld to %lld\n", | 973 | "%s: detected capacity change from %lld to %lld\n", |
967 | name, bdev_size, disk_size); | 974 | name, bdev_size, disk_size); |
968 | i_size_write(bdev->bd_inode, disk_size); | 975 | i_size_write(bdev->bd_inode, disk_size); |
969 | flush_disk(bdev); | 976 | flush_disk(bdev, false); |
970 | } | 977 | } |
971 | } | 978 | } |
972 | EXPORT_SYMBOL(check_disk_size_change); | 979 | EXPORT_SYMBOL(check_disk_size_change); |
@@ -1019,7 +1026,7 @@ int check_disk_change(struct block_device *bdev) | |||
1019 | if (!(events & DISK_EVENT_MEDIA_CHANGE)) | 1026 | if (!(events & DISK_EVENT_MEDIA_CHANGE)) |
1020 | return 0; | 1027 | return 0; |
1021 | 1028 | ||
1022 | flush_disk(bdev); | 1029 | flush_disk(bdev, true); |
1023 | if (bdops->revalidate_disk) | 1030 | if (bdops->revalidate_disk) |
1024 | bdops->revalidate_disk(bdev->bd_disk); | 1031 | bdops->revalidate_disk(bdev->bd_disk); |
1025 | return 1; | 1032 | return 1; |
@@ -1215,12 +1222,6 @@ int blkdev_get(struct block_device *bdev, fmode_t mode, void *holder) | |||
1215 | 1222 | ||
1216 | res = __blkdev_get(bdev, mode, 0); | 1223 | res = __blkdev_get(bdev, mode, 0); |
1217 | 1224 | ||
1218 | /* __blkdev_get() may alter read only status, check it afterwards */ | ||
1219 | if (!res && (mode & FMODE_WRITE) && bdev_read_only(bdev)) { | ||
1220 | __blkdev_put(bdev, mode, 0); | ||
1221 | res = -EACCES; | ||
1222 | } | ||
1223 | |||
1224 | if (whole) { | 1225 | if (whole) { |
1225 | /* finish claiming */ | 1226 | /* finish claiming */ |
1226 | mutex_lock(&bdev->bd_mutex); | 1227 | mutex_lock(&bdev->bd_mutex); |
@@ -1298,6 +1299,11 @@ struct block_device *blkdev_get_by_path(const char *path, fmode_t mode, | |||
1298 | if (err) | 1299 | if (err) |
1299 | return ERR_PTR(err); | 1300 | return ERR_PTR(err); |
1300 | 1301 | ||
1302 | if ((mode & FMODE_WRITE) && bdev_read_only(bdev)) { | ||
1303 | blkdev_put(bdev, mode); | ||
1304 | return ERR_PTR(-EACCES); | ||
1305 | } | ||
1306 | |||
1301 | return bdev; | 1307 | return bdev; |
1302 | } | 1308 | } |
1303 | EXPORT_SYMBOL(blkdev_get_by_path); | 1309 | EXPORT_SYMBOL(blkdev_get_by_path); |
@@ -1601,7 +1607,7 @@ fail: | |||
1601 | } | 1607 | } |
1602 | EXPORT_SYMBOL(lookup_bdev); | 1608 | EXPORT_SYMBOL(lookup_bdev); |
1603 | 1609 | ||
1604 | int __invalidate_device(struct block_device *bdev) | 1610 | int __invalidate_device(struct block_device *bdev, bool kill_dirty) |
1605 | { | 1611 | { |
1606 | struct super_block *sb = get_super(bdev); | 1612 | struct super_block *sb = get_super(bdev); |
1607 | int res = 0; | 1613 | int res = 0; |
@@ -1614,7 +1620,7 @@ int __invalidate_device(struct block_device *bdev) | |||
1614 | * hold). | 1620 | * hold). |
1615 | */ | 1621 | */ |
1616 | shrink_dcache_sb(sb); | 1622 | shrink_dcache_sb(sb); |
1617 | res = invalidate_inodes(sb); | 1623 | res = invalidate_inodes(sb, kill_dirty); |
1618 | drop_super(sb); | 1624 | drop_super(sb); |
1619 | } | 1625 | } |
1620 | invalidate_bdev(bdev); | 1626 | invalidate_bdev(bdev); |
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index 2c98b3af6052..6f820fa23df4 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h | |||
@@ -1254,6 +1254,7 @@ struct btrfs_root { | |||
1254 | #define BTRFS_MOUNT_SPACE_CACHE (1 << 12) | 1254 | #define BTRFS_MOUNT_SPACE_CACHE (1 << 12) |
1255 | #define BTRFS_MOUNT_CLEAR_CACHE (1 << 13) | 1255 | #define BTRFS_MOUNT_CLEAR_CACHE (1 << 13) |
1256 | #define BTRFS_MOUNT_USER_SUBVOL_RM_ALLOWED (1 << 14) | 1256 | #define BTRFS_MOUNT_USER_SUBVOL_RM_ALLOWED (1 << 14) |
1257 | #define BTRFS_MOUNT_ENOSPC_DEBUG (1 << 15) | ||
1257 | 1258 | ||
1258 | #define btrfs_clear_opt(o, opt) ((o) &= ~BTRFS_MOUNT_##opt) | 1259 | #define btrfs_clear_opt(o, opt) ((o) &= ~BTRFS_MOUNT_##opt) |
1259 | #define btrfs_set_opt(o, opt) ((o) |= BTRFS_MOUNT_##opt) | 1260 | #define btrfs_set_opt(o, opt) ((o) |= BTRFS_MOUNT_##opt) |
@@ -2218,6 +2219,8 @@ int btrfs_error_unpin_extent_range(struct btrfs_root *root, | |||
2218 | u64 start, u64 end); | 2219 | u64 start, u64 end); |
2219 | int btrfs_error_discard_extent(struct btrfs_root *root, u64 bytenr, | 2220 | int btrfs_error_discard_extent(struct btrfs_root *root, u64 bytenr, |
2220 | u64 num_bytes); | 2221 | u64 num_bytes); |
2222 | int btrfs_force_chunk_alloc(struct btrfs_trans_handle *trans, | ||
2223 | struct btrfs_root *root, u64 type); | ||
2221 | 2224 | ||
2222 | /* ctree.c */ | 2225 | /* ctree.c */ |
2223 | int btrfs_bin_search(struct extent_buffer *eb, struct btrfs_key *key, | 2226 | int btrfs_bin_search(struct extent_buffer *eb, struct btrfs_key *key, |
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index f3c96fc01439..588ff9849873 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c | |||
@@ -5376,7 +5376,7 @@ again: | |||
5376 | num_bytes, data, 1); | 5376 | num_bytes, data, 1); |
5377 | goto again; | 5377 | goto again; |
5378 | } | 5378 | } |
5379 | if (ret == -ENOSPC) { | 5379 | if (ret == -ENOSPC && btrfs_test_opt(root, ENOSPC_DEBUG)) { |
5380 | struct btrfs_space_info *sinfo; | 5380 | struct btrfs_space_info *sinfo; |
5381 | 5381 | ||
5382 | sinfo = __find_space_info(root->fs_info, data); | 5382 | sinfo = __find_space_info(root->fs_info, data); |
@@ -8065,6 +8065,13 @@ out: | |||
8065 | return ret; | 8065 | return ret; |
8066 | } | 8066 | } |
8067 | 8067 | ||
8068 | int btrfs_force_chunk_alloc(struct btrfs_trans_handle *trans, | ||
8069 | struct btrfs_root *root, u64 type) | ||
8070 | { | ||
8071 | u64 alloc_flags = get_alloc_profile(root, type); | ||
8072 | return do_chunk_alloc(trans, root, 2 * 1024 * 1024, alloc_flags, 1); | ||
8073 | } | ||
8074 | |||
8068 | /* | 8075 | /* |
8069 | * helper to account the unused space of all the readonly block group in the | 8076 | * helper to account the unused space of all the readonly block group in the |
8070 | * list. takes mirrors into account. | 8077 | * list. takes mirrors into account. |
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c index 92ac5192c518..fd3f172e94e6 100644 --- a/fs/btrfs/extent_io.c +++ b/fs/btrfs/extent_io.c | |||
@@ -1433,12 +1433,13 @@ int extent_clear_unlock_delalloc(struct inode *inode, | |||
1433 | */ | 1433 | */ |
1434 | u64 count_range_bits(struct extent_io_tree *tree, | 1434 | u64 count_range_bits(struct extent_io_tree *tree, |
1435 | u64 *start, u64 search_end, u64 max_bytes, | 1435 | u64 *start, u64 search_end, u64 max_bytes, |
1436 | unsigned long bits) | 1436 | unsigned long bits, int contig) |
1437 | { | 1437 | { |
1438 | struct rb_node *node; | 1438 | struct rb_node *node; |
1439 | struct extent_state *state; | 1439 | struct extent_state *state; |
1440 | u64 cur_start = *start; | 1440 | u64 cur_start = *start; |
1441 | u64 total_bytes = 0; | 1441 | u64 total_bytes = 0; |
1442 | u64 last = 0; | ||
1442 | int found = 0; | 1443 | int found = 0; |
1443 | 1444 | ||
1444 | if (search_end <= cur_start) { | 1445 | if (search_end <= cur_start) { |
@@ -1463,7 +1464,9 @@ u64 count_range_bits(struct extent_io_tree *tree, | |||
1463 | state = rb_entry(node, struct extent_state, rb_node); | 1464 | state = rb_entry(node, struct extent_state, rb_node); |
1464 | if (state->start > search_end) | 1465 | if (state->start > search_end) |
1465 | break; | 1466 | break; |
1466 | if (state->end >= cur_start && (state->state & bits)) { | 1467 | if (contig && found && state->start > last + 1) |
1468 | break; | ||
1469 | if (state->end >= cur_start && (state->state & bits) == bits) { | ||
1467 | total_bytes += min(search_end, state->end) + 1 - | 1470 | total_bytes += min(search_end, state->end) + 1 - |
1468 | max(cur_start, state->start); | 1471 | max(cur_start, state->start); |
1469 | if (total_bytes >= max_bytes) | 1472 | if (total_bytes >= max_bytes) |
@@ -1472,6 +1475,9 @@ u64 count_range_bits(struct extent_io_tree *tree, | |||
1472 | *start = state->start; | 1475 | *start = state->start; |
1473 | found = 1; | 1476 | found = 1; |
1474 | } | 1477 | } |
1478 | last = state->end; | ||
1479 | } else if (contig && found) { | ||
1480 | break; | ||
1475 | } | 1481 | } |
1476 | node = rb_next(node); | 1482 | node = rb_next(node); |
1477 | if (!node) | 1483 | if (!node) |
@@ -2912,6 +2918,46 @@ out: | |||
2912 | return sector; | 2918 | return sector; |
2913 | } | 2919 | } |
2914 | 2920 | ||
2921 | /* | ||
2922 | * helper function for fiemap, which doesn't want to see any holes. | ||
2923 | * This maps until we find something past 'last' | ||
2924 | */ | ||
2925 | static struct extent_map *get_extent_skip_holes(struct inode *inode, | ||
2926 | u64 offset, | ||
2927 | u64 last, | ||
2928 | get_extent_t *get_extent) | ||
2929 | { | ||
2930 | u64 sectorsize = BTRFS_I(inode)->root->sectorsize; | ||
2931 | struct extent_map *em; | ||
2932 | u64 len; | ||
2933 | |||
2934 | if (offset >= last) | ||
2935 | return NULL; | ||
2936 | |||
2937 | while(1) { | ||
2938 | len = last - offset; | ||
2939 | if (len == 0) | ||
2940 | break; | ||
2941 | len = (len + sectorsize - 1) & ~(sectorsize - 1); | ||
2942 | em = get_extent(inode, NULL, 0, offset, len, 0); | ||
2943 | if (!em || IS_ERR(em)) | ||
2944 | return em; | ||
2945 | |||
2946 | /* if this isn't a hole return it */ | ||
2947 | if (!test_bit(EXTENT_FLAG_VACANCY, &em->flags) && | ||
2948 | em->block_start != EXTENT_MAP_HOLE) { | ||
2949 | return em; | ||
2950 | } | ||
2951 | |||
2952 | /* this is a hole, advance to the next extent */ | ||
2953 | offset = extent_map_end(em); | ||
2954 | free_extent_map(em); | ||
2955 | if (offset >= last) | ||
2956 | break; | ||
2957 | } | ||
2958 | return NULL; | ||
2959 | } | ||
2960 | |||
2915 | int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | 2961 | int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, |
2916 | __u64 start, __u64 len, get_extent_t *get_extent) | 2962 | __u64 start, __u64 len, get_extent_t *get_extent) |
2917 | { | 2963 | { |
@@ -2921,16 +2967,19 @@ int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | |||
2921 | u32 flags = 0; | 2967 | u32 flags = 0; |
2922 | u32 found_type; | 2968 | u32 found_type; |
2923 | u64 last; | 2969 | u64 last; |
2970 | u64 last_for_get_extent = 0; | ||
2924 | u64 disko = 0; | 2971 | u64 disko = 0; |
2972 | u64 isize = i_size_read(inode); | ||
2925 | struct btrfs_key found_key; | 2973 | struct btrfs_key found_key; |
2926 | struct extent_map *em = NULL; | 2974 | struct extent_map *em = NULL; |
2927 | struct extent_state *cached_state = NULL; | 2975 | struct extent_state *cached_state = NULL; |
2928 | struct btrfs_path *path; | 2976 | struct btrfs_path *path; |
2929 | struct btrfs_file_extent_item *item; | 2977 | struct btrfs_file_extent_item *item; |
2930 | int end = 0; | 2978 | int end = 0; |
2931 | u64 em_start = 0, em_len = 0; | 2979 | u64 em_start = 0; |
2980 | u64 em_len = 0; | ||
2981 | u64 em_end = 0; | ||
2932 | unsigned long emflags; | 2982 | unsigned long emflags; |
2933 | int hole = 0; | ||
2934 | 2983 | ||
2935 | if (len == 0) | 2984 | if (len == 0) |
2936 | return -EINVAL; | 2985 | return -EINVAL; |
@@ -2940,6 +2989,10 @@ int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | |||
2940 | return -ENOMEM; | 2989 | return -ENOMEM; |
2941 | path->leave_spinning = 1; | 2990 | path->leave_spinning = 1; |
2942 | 2991 | ||
2992 | /* | ||
2993 | * lookup the last file extent. We're not using i_size here | ||
2994 | * because there might be preallocation past i_size | ||
2995 | */ | ||
2943 | ret = btrfs_lookup_file_extent(NULL, BTRFS_I(inode)->root, | 2996 | ret = btrfs_lookup_file_extent(NULL, BTRFS_I(inode)->root, |
2944 | path, inode->i_ino, -1, 0); | 2997 | path, inode->i_ino, -1, 0); |
2945 | if (ret < 0) { | 2998 | if (ret < 0) { |
@@ -2953,18 +3006,38 @@ int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | |||
2953 | btrfs_item_key_to_cpu(path->nodes[0], &found_key, path->slots[0]); | 3006 | btrfs_item_key_to_cpu(path->nodes[0], &found_key, path->slots[0]); |
2954 | found_type = btrfs_key_type(&found_key); | 3007 | found_type = btrfs_key_type(&found_key); |
2955 | 3008 | ||
2956 | /* No extents, just return */ | 3009 | /* No extents, but there might be delalloc bits */ |
2957 | if (found_key.objectid != inode->i_ino || | 3010 | if (found_key.objectid != inode->i_ino || |
2958 | found_type != BTRFS_EXTENT_DATA_KEY) { | 3011 | found_type != BTRFS_EXTENT_DATA_KEY) { |
2959 | btrfs_free_path(path); | 3012 | /* have to trust i_size as the end */ |
2960 | return 0; | 3013 | last = (u64)-1; |
3014 | last_for_get_extent = isize; | ||
3015 | } else { | ||
3016 | /* | ||
3017 | * remember the start of the last extent. There are a | ||
3018 | * bunch of different factors that go into the length of the | ||
3019 | * extent, so its much less complex to remember where it started | ||
3020 | */ | ||
3021 | last = found_key.offset; | ||
3022 | last_for_get_extent = last + 1; | ||
2961 | } | 3023 | } |
2962 | last = found_key.offset; | ||
2963 | btrfs_free_path(path); | 3024 | btrfs_free_path(path); |
2964 | 3025 | ||
3026 | /* | ||
3027 | * we might have some extents allocated but more delalloc past those | ||
3028 | * extents. so, we trust isize unless the start of the last extent is | ||
3029 | * beyond isize | ||
3030 | */ | ||
3031 | if (last < isize) { | ||
3032 | last = (u64)-1; | ||
3033 | last_for_get_extent = isize; | ||
3034 | } | ||
3035 | |||
2965 | lock_extent_bits(&BTRFS_I(inode)->io_tree, start, start + len, 0, | 3036 | lock_extent_bits(&BTRFS_I(inode)->io_tree, start, start + len, 0, |
2966 | &cached_state, GFP_NOFS); | 3037 | &cached_state, GFP_NOFS); |
2967 | em = get_extent(inode, NULL, 0, off, max - off, 0); | 3038 | |
3039 | em = get_extent_skip_holes(inode, off, last_for_get_extent, | ||
3040 | get_extent); | ||
2968 | if (!em) | 3041 | if (!em) |
2969 | goto out; | 3042 | goto out; |
2970 | if (IS_ERR(em)) { | 3043 | if (IS_ERR(em)) { |
@@ -2973,19 +3046,14 @@ int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | |||
2973 | } | 3046 | } |
2974 | 3047 | ||
2975 | while (!end) { | 3048 | while (!end) { |
2976 | hole = 0; | 3049 | off = extent_map_end(em); |
2977 | off = em->start + em->len; | ||
2978 | if (off >= max) | 3050 | if (off >= max) |
2979 | end = 1; | 3051 | end = 1; |
2980 | 3052 | ||
2981 | if (em->block_start == EXTENT_MAP_HOLE) { | ||
2982 | hole = 1; | ||
2983 | goto next; | ||
2984 | } | ||
2985 | |||
2986 | em_start = em->start; | 3053 | em_start = em->start; |
2987 | em_len = em->len; | 3054 | em_len = em->len; |
2988 | 3055 | em_end = extent_map_end(em); | |
3056 | emflags = em->flags; | ||
2989 | disko = 0; | 3057 | disko = 0; |
2990 | flags = 0; | 3058 | flags = 0; |
2991 | 3059 | ||
@@ -3004,37 +3072,29 @@ int extent_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | |||
3004 | if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags)) | 3072 | if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags)) |
3005 | flags |= FIEMAP_EXTENT_ENCODED; | 3073 | flags |= FIEMAP_EXTENT_ENCODED; |
3006 | 3074 | ||
3007 | next: | ||
3008 | emflags = em->flags; | ||
3009 | free_extent_map(em); | 3075 | free_extent_map(em); |
3010 | em = NULL; | 3076 | em = NULL; |
3011 | if (!end) { | 3077 | if ((em_start >= last) || em_len == (u64)-1 || |
3012 | em = get_extent(inode, NULL, 0, off, max - off, 0); | 3078 | (last == (u64)-1 && isize <= em_end)) { |
3013 | if (!em) | ||
3014 | goto out; | ||
3015 | if (IS_ERR(em)) { | ||
3016 | ret = PTR_ERR(em); | ||
3017 | goto out; | ||
3018 | } | ||
3019 | emflags = em->flags; | ||
3020 | } | ||
3021 | |||
3022 | if (test_bit(EXTENT_FLAG_VACANCY, &emflags)) { | ||
3023 | flags |= FIEMAP_EXTENT_LAST; | 3079 | flags |= FIEMAP_EXTENT_LAST; |
3024 | end = 1; | 3080 | end = 1; |
3025 | } | 3081 | } |
3026 | 3082 | ||
3027 | if (em_start == last) { | 3083 | /* now scan forward to see if this is really the last extent. */ |
3084 | em = get_extent_skip_holes(inode, off, last_for_get_extent, | ||
3085 | get_extent); | ||
3086 | if (IS_ERR(em)) { | ||
3087 | ret = PTR_ERR(em); | ||
3088 | goto out; | ||
3089 | } | ||
3090 | if (!em) { | ||
3028 | flags |= FIEMAP_EXTENT_LAST; | 3091 | flags |= FIEMAP_EXTENT_LAST; |
3029 | end = 1; | 3092 | end = 1; |
3030 | } | 3093 | } |
3031 | 3094 | ret = fiemap_fill_next_extent(fieinfo, em_start, disko, | |
3032 | if (!hole) { | 3095 | em_len, flags); |
3033 | ret = fiemap_fill_next_extent(fieinfo, em_start, disko, | 3096 | if (ret) |
3034 | em_len, flags); | 3097 | goto out_free; |
3035 | if (ret) | ||
3036 | goto out_free; | ||
3037 | } | ||
3038 | } | 3098 | } |
3039 | out_free: | 3099 | out_free: |
3040 | free_extent_map(em); | 3100 | free_extent_map(em); |
diff --git a/fs/btrfs/extent_io.h b/fs/btrfs/extent_io.h index 7083cfafd061..9318dfefd59c 100644 --- a/fs/btrfs/extent_io.h +++ b/fs/btrfs/extent_io.h | |||
@@ -191,7 +191,7 @@ void extent_io_exit(void); | |||
191 | 191 | ||
192 | u64 count_range_bits(struct extent_io_tree *tree, | 192 | u64 count_range_bits(struct extent_io_tree *tree, |
193 | u64 *start, u64 search_end, | 193 | u64 *start, u64 search_end, |
194 | u64 max_bytes, unsigned long bits); | 194 | u64 max_bytes, unsigned long bits, int contig); |
195 | 195 | ||
196 | void free_extent_state(struct extent_state *state); | 196 | void free_extent_state(struct extent_state *state); |
197 | int test_range_bit(struct extent_io_tree *tree, u64 start, u64 end, | 197 | int test_range_bit(struct extent_io_tree *tree, u64 start, u64 end, |
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index fb9bd7832b6d..0efdb65953c5 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c | |||
@@ -1913,7 +1913,7 @@ static int btrfs_clean_io_failures(struct inode *inode, u64 start) | |||
1913 | 1913 | ||
1914 | private = 0; | 1914 | private = 0; |
1915 | if (count_range_bits(&BTRFS_I(inode)->io_failure_tree, &private, | 1915 | if (count_range_bits(&BTRFS_I(inode)->io_failure_tree, &private, |
1916 | (u64)-1, 1, EXTENT_DIRTY)) { | 1916 | (u64)-1, 1, EXTENT_DIRTY, 0)) { |
1917 | ret = get_state_private(&BTRFS_I(inode)->io_failure_tree, | 1917 | ret = get_state_private(&BTRFS_I(inode)->io_failure_tree, |
1918 | start, &private_failure); | 1918 | start, &private_failure); |
1919 | if (ret == 0) { | 1919 | if (ret == 0) { |
@@ -5280,6 +5280,128 @@ out: | |||
5280 | return em; | 5280 | return em; |
5281 | } | 5281 | } |
5282 | 5282 | ||
5283 | struct extent_map *btrfs_get_extent_fiemap(struct inode *inode, struct page *page, | ||
5284 | size_t pg_offset, u64 start, u64 len, | ||
5285 | int create) | ||
5286 | { | ||
5287 | struct extent_map *em; | ||
5288 | struct extent_map *hole_em = NULL; | ||
5289 | u64 range_start = start; | ||
5290 | u64 end; | ||
5291 | u64 found; | ||
5292 | u64 found_end; | ||
5293 | int err = 0; | ||
5294 | |||
5295 | em = btrfs_get_extent(inode, page, pg_offset, start, len, create); | ||
5296 | if (IS_ERR(em)) | ||
5297 | return em; | ||
5298 | if (em) { | ||
5299 | /* | ||
5300 | * if our em maps to a hole, there might | ||
5301 | * actually be delalloc bytes behind it | ||
5302 | */ | ||
5303 | if (em->block_start != EXTENT_MAP_HOLE) | ||
5304 | return em; | ||
5305 | else | ||
5306 | hole_em = em; | ||
5307 | } | ||
5308 | |||
5309 | /* check to see if we've wrapped (len == -1 or similar) */ | ||
5310 | end = start + len; | ||
5311 | if (end < start) | ||
5312 | end = (u64)-1; | ||
5313 | else | ||
5314 | end -= 1; | ||
5315 | |||
5316 | em = NULL; | ||
5317 | |||
5318 | /* ok, we didn't find anything, lets look for delalloc */ | ||
5319 | found = count_range_bits(&BTRFS_I(inode)->io_tree, &range_start, | ||
5320 | end, len, EXTENT_DELALLOC, 1); | ||
5321 | found_end = range_start + found; | ||
5322 | if (found_end < range_start) | ||
5323 | found_end = (u64)-1; | ||
5324 | |||
5325 | /* | ||
5326 | * we didn't find anything useful, return | ||
5327 | * the original results from get_extent() | ||
5328 | */ | ||
5329 | if (range_start > end || found_end <= start) { | ||
5330 | em = hole_em; | ||
5331 | hole_em = NULL; | ||
5332 | goto out; | ||
5333 | } | ||
5334 | |||
5335 | /* adjust the range_start to make sure it doesn't | ||
5336 | * go backwards from the start they passed in | ||
5337 | */ | ||
5338 | range_start = max(start,range_start); | ||
5339 | found = found_end - range_start; | ||
5340 | |||
5341 | if (found > 0) { | ||
5342 | u64 hole_start = start; | ||
5343 | u64 hole_len = len; | ||
5344 | |||
5345 | em = alloc_extent_map(GFP_NOFS); | ||
5346 | if (!em) { | ||
5347 | err = -ENOMEM; | ||
5348 | goto out; | ||
5349 | } | ||
5350 | /* | ||
5351 | * when btrfs_get_extent can't find anything it | ||
5352 | * returns one huge hole | ||
5353 | * | ||
5354 | * make sure what it found really fits our range, and | ||
5355 | * adjust to make sure it is based on the start from | ||
5356 | * the caller | ||
5357 | */ | ||
5358 | if (hole_em) { | ||
5359 | u64 calc_end = extent_map_end(hole_em); | ||
5360 | |||
5361 | if (calc_end <= start || (hole_em->start > end)) { | ||
5362 | free_extent_map(hole_em); | ||
5363 | hole_em = NULL; | ||
5364 | } else { | ||
5365 | hole_start = max(hole_em->start, start); | ||
5366 | hole_len = calc_end - hole_start; | ||
5367 | } | ||
5368 | } | ||
5369 | em->bdev = NULL; | ||
5370 | if (hole_em && range_start > hole_start) { | ||
5371 | /* our hole starts before our delalloc, so we | ||
5372 | * have to return just the parts of the hole | ||
5373 | * that go until the delalloc starts | ||
5374 | */ | ||
5375 | em->len = min(hole_len, | ||
5376 | range_start - hole_start); | ||
5377 | em->start = hole_start; | ||
5378 | em->orig_start = hole_start; | ||
5379 | /* | ||
5380 | * don't adjust block start at all, | ||
5381 | * it is fixed at EXTENT_MAP_HOLE | ||
5382 | */ | ||
5383 | em->block_start = hole_em->block_start; | ||
5384 | em->block_len = hole_len; | ||
5385 | } else { | ||
5386 | em->start = range_start; | ||
5387 | em->len = found; | ||
5388 | em->orig_start = range_start; | ||
5389 | em->block_start = EXTENT_MAP_DELALLOC; | ||
5390 | em->block_len = found; | ||
5391 | } | ||
5392 | } else if (hole_em) { | ||
5393 | return hole_em; | ||
5394 | } | ||
5395 | out: | ||
5396 | |||
5397 | free_extent_map(hole_em); | ||
5398 | if (err) { | ||
5399 | free_extent_map(em); | ||
5400 | return ERR_PTR(err); | ||
5401 | } | ||
5402 | return em; | ||
5403 | } | ||
5404 | |||
5283 | static struct extent_map *btrfs_new_extent_direct(struct inode *inode, | 5405 | static struct extent_map *btrfs_new_extent_direct(struct inode *inode, |
5284 | u64 start, u64 len) | 5406 | u64 start, u64 len) |
5285 | { | 5407 | { |
@@ -6102,7 +6224,7 @@ out: | |||
6102 | static int btrfs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, | 6224 | static int btrfs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, |
6103 | __u64 start, __u64 len) | 6225 | __u64 start, __u64 len) |
6104 | { | 6226 | { |
6105 | return extent_fiemap(inode, fieinfo, start, len, btrfs_get_extent); | 6227 | return extent_fiemap(inode, fieinfo, start, len, btrfs_get_extent_fiemap); |
6106 | } | 6228 | } |
6107 | 6229 | ||
6108 | int btrfs_readpage(struct file *file, struct page *page) | 6230 | int btrfs_readpage(struct file *file, struct page *page) |
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index be2d4f6aaa5e..5fdb2abc4fa7 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c | |||
@@ -1071,12 +1071,15 @@ static noinline int btrfs_ioctl_subvol_setflags(struct file *file, | |||
1071 | if (copy_from_user(&flags, arg, sizeof(flags))) | 1071 | if (copy_from_user(&flags, arg, sizeof(flags))) |
1072 | return -EFAULT; | 1072 | return -EFAULT; |
1073 | 1073 | ||
1074 | if (flags & ~BTRFS_SUBVOL_CREATE_ASYNC) | 1074 | if (flags & BTRFS_SUBVOL_CREATE_ASYNC) |
1075 | return -EINVAL; | 1075 | return -EINVAL; |
1076 | 1076 | ||
1077 | if (flags & ~BTRFS_SUBVOL_RDONLY) | 1077 | if (flags & ~BTRFS_SUBVOL_RDONLY) |
1078 | return -EOPNOTSUPP; | 1078 | return -EOPNOTSUPP; |
1079 | 1079 | ||
1080 | if (!is_owner_or_cap(inode)) | ||
1081 | return -EACCES; | ||
1082 | |||
1080 | down_write(&root->fs_info->subvol_sem); | 1083 | down_write(&root->fs_info->subvol_sem); |
1081 | 1084 | ||
1082 | /* nothing to do */ | 1085 | /* nothing to do */ |
@@ -1097,7 +1100,7 @@ static noinline int btrfs_ioctl_subvol_setflags(struct file *file, | |||
1097 | goto out_reset; | 1100 | goto out_reset; |
1098 | } | 1101 | } |
1099 | 1102 | ||
1100 | ret = btrfs_update_root(trans, root, | 1103 | ret = btrfs_update_root(trans, root->fs_info->tree_root, |
1101 | &root->root_key, &root->root_item); | 1104 | &root->root_key, &root->root_item); |
1102 | 1105 | ||
1103 | btrfs_commit_transaction(trans, root); | 1106 | btrfs_commit_transaction(trans, root); |
diff --git a/fs/btrfs/lzo.c b/fs/btrfs/lzo.c index cc9b450399df..a178f5ebea78 100644 --- a/fs/btrfs/lzo.c +++ b/fs/btrfs/lzo.c | |||
@@ -280,6 +280,7 @@ static int lzo_decompress_biovec(struct list_head *ws, | |||
280 | unsigned long tot_out; | 280 | unsigned long tot_out; |
281 | unsigned long tot_len; | 281 | unsigned long tot_len; |
282 | char *buf; | 282 | char *buf; |
283 | bool may_late_unmap, need_unmap; | ||
283 | 284 | ||
284 | data_in = kmap(pages_in[0]); | 285 | data_in = kmap(pages_in[0]); |
285 | tot_len = read_compress_length(data_in); | 286 | tot_len = read_compress_length(data_in); |
@@ -300,11 +301,13 @@ static int lzo_decompress_biovec(struct list_head *ws, | |||
300 | 301 | ||
301 | tot_in += in_len; | 302 | tot_in += in_len; |
302 | working_bytes = in_len; | 303 | working_bytes = in_len; |
304 | may_late_unmap = need_unmap = false; | ||
303 | 305 | ||
304 | /* fast path: avoid using the working buffer */ | 306 | /* fast path: avoid using the working buffer */ |
305 | if (in_page_bytes_left >= in_len) { | 307 | if (in_page_bytes_left >= in_len) { |
306 | buf = data_in + in_offset; | 308 | buf = data_in + in_offset; |
307 | bytes = in_len; | 309 | bytes = in_len; |
310 | may_late_unmap = true; | ||
308 | goto cont; | 311 | goto cont; |
309 | } | 312 | } |
310 | 313 | ||
@@ -329,14 +332,17 @@ cont: | |||
329 | if (working_bytes == 0 && tot_in >= tot_len) | 332 | if (working_bytes == 0 && tot_in >= tot_len) |
330 | break; | 333 | break; |
331 | 334 | ||
332 | kunmap(pages_in[page_in_index]); | 335 | if (page_in_index + 1 >= total_pages_in) { |
333 | page_in_index++; | ||
334 | if (page_in_index >= total_pages_in) { | ||
335 | ret = -1; | 336 | ret = -1; |
336 | data_in = NULL; | ||
337 | goto done; | 337 | goto done; |
338 | } | 338 | } |
339 | data_in = kmap(pages_in[page_in_index]); | 339 | |
340 | if (may_late_unmap) | ||
341 | need_unmap = true; | ||
342 | else | ||
343 | kunmap(pages_in[page_in_index]); | ||
344 | |||
345 | data_in = kmap(pages_in[++page_in_index]); | ||
340 | 346 | ||
341 | in_page_bytes_left = PAGE_CACHE_SIZE; | 347 | in_page_bytes_left = PAGE_CACHE_SIZE; |
342 | in_offset = 0; | 348 | in_offset = 0; |
@@ -346,6 +352,8 @@ cont: | |||
346 | out_len = lzo1x_worst_compress(PAGE_CACHE_SIZE); | 352 | out_len = lzo1x_worst_compress(PAGE_CACHE_SIZE); |
347 | ret = lzo1x_decompress_safe(buf, in_len, workspace->buf, | 353 | ret = lzo1x_decompress_safe(buf, in_len, workspace->buf, |
348 | &out_len); | 354 | &out_len); |
355 | if (need_unmap) | ||
356 | kunmap(pages_in[page_in_index - 1]); | ||
349 | if (ret != LZO_E_OK) { | 357 | if (ret != LZO_E_OK) { |
350 | printk(KERN_WARNING "btrfs decompress failed\n"); | 358 | printk(KERN_WARNING "btrfs decompress failed\n"); |
351 | ret = -1; | 359 | ret = -1; |
@@ -363,8 +371,7 @@ cont: | |||
363 | break; | 371 | break; |
364 | } | 372 | } |
365 | done: | 373 | done: |
366 | if (data_in) | 374 | kunmap(pages_in[page_in_index]); |
367 | kunmap(pages_in[page_in_index]); | ||
368 | return ret; | 375 | return ret; |
369 | } | 376 | } |
370 | 377 | ||
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c index 0825e4ed9447..31ade5802ae8 100644 --- a/fs/btrfs/relocation.c +++ b/fs/btrfs/relocation.c | |||
@@ -3654,6 +3654,7 @@ static noinline_for_stack int relocate_block_group(struct reloc_control *rc) | |||
3654 | u32 item_size; | 3654 | u32 item_size; |
3655 | int ret; | 3655 | int ret; |
3656 | int err = 0; | 3656 | int err = 0; |
3657 | int progress = 0; | ||
3657 | 3658 | ||
3658 | path = btrfs_alloc_path(); | 3659 | path = btrfs_alloc_path(); |
3659 | if (!path) | 3660 | if (!path) |
@@ -3666,9 +3667,10 @@ static noinline_for_stack int relocate_block_group(struct reloc_control *rc) | |||
3666 | } | 3667 | } |
3667 | 3668 | ||
3668 | while (1) { | 3669 | while (1) { |
3670 | progress++; | ||
3669 | trans = btrfs_start_transaction(rc->extent_root, 0); | 3671 | trans = btrfs_start_transaction(rc->extent_root, 0); |
3670 | BUG_ON(IS_ERR(trans)); | 3672 | BUG_ON(IS_ERR(trans)); |
3671 | 3673 | restart: | |
3672 | if (update_backref_cache(trans, &rc->backref_cache)) { | 3674 | if (update_backref_cache(trans, &rc->backref_cache)) { |
3673 | btrfs_end_transaction(trans, rc->extent_root); | 3675 | btrfs_end_transaction(trans, rc->extent_root); |
3674 | continue; | 3676 | continue; |
@@ -3781,6 +3783,15 @@ static noinline_for_stack int relocate_block_group(struct reloc_control *rc) | |||
3781 | } | 3783 | } |
3782 | } | 3784 | } |
3783 | } | 3785 | } |
3786 | if (trans && progress && err == -ENOSPC) { | ||
3787 | ret = btrfs_force_chunk_alloc(trans, rc->extent_root, | ||
3788 | rc->block_group->flags); | ||
3789 | if (ret == 0) { | ||
3790 | err = 0; | ||
3791 | progress = 0; | ||
3792 | goto restart; | ||
3793 | } | ||
3794 | } | ||
3784 | 3795 | ||
3785 | btrfs_release_path(rc->extent_root, path); | 3796 | btrfs_release_path(rc->extent_root, path); |
3786 | clear_extent_bits(&rc->processed_blocks, 0, (u64)-1, EXTENT_DIRTY, | 3797 | clear_extent_bits(&rc->processed_blocks, 0, (u64)-1, EXTENT_DIRTY, |
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c index a004008f7d28..d39a9895d932 100644 --- a/fs/btrfs/super.c +++ b/fs/btrfs/super.c | |||
@@ -155,7 +155,8 @@ enum { | |||
155 | Opt_nossd, Opt_ssd_spread, Opt_thread_pool, Opt_noacl, Opt_compress, | 155 | Opt_nossd, Opt_ssd_spread, Opt_thread_pool, Opt_noacl, Opt_compress, |
156 | Opt_compress_type, Opt_compress_force, Opt_compress_force_type, | 156 | Opt_compress_type, Opt_compress_force, Opt_compress_force_type, |
157 | Opt_notreelog, Opt_ratio, Opt_flushoncommit, Opt_discard, | 157 | Opt_notreelog, Opt_ratio, Opt_flushoncommit, Opt_discard, |
158 | Opt_space_cache, Opt_clear_cache, Opt_user_subvol_rm_allowed, Opt_err, | 158 | Opt_space_cache, Opt_clear_cache, Opt_user_subvol_rm_allowed, |
159 | Opt_enospc_debug, Opt_err, | ||
159 | }; | 160 | }; |
160 | 161 | ||
161 | static match_table_t tokens = { | 162 | static match_table_t tokens = { |
@@ -184,6 +185,7 @@ static match_table_t tokens = { | |||
184 | {Opt_space_cache, "space_cache"}, | 185 | {Opt_space_cache, "space_cache"}, |
185 | {Opt_clear_cache, "clear_cache"}, | 186 | {Opt_clear_cache, "clear_cache"}, |
186 | {Opt_user_subvol_rm_allowed, "user_subvol_rm_allowed"}, | 187 | {Opt_user_subvol_rm_allowed, "user_subvol_rm_allowed"}, |
188 | {Opt_enospc_debug, "enospc_debug"}, | ||
187 | {Opt_err, NULL}, | 189 | {Opt_err, NULL}, |
188 | }; | 190 | }; |
189 | 191 | ||
@@ -358,6 +360,9 @@ int btrfs_parse_options(struct btrfs_root *root, char *options) | |||
358 | case Opt_user_subvol_rm_allowed: | 360 | case Opt_user_subvol_rm_allowed: |
359 | btrfs_set_opt(info->mount_opt, USER_SUBVOL_RM_ALLOWED); | 361 | btrfs_set_opt(info->mount_opt, USER_SUBVOL_RM_ALLOWED); |
360 | break; | 362 | break; |
363 | case Opt_enospc_debug: | ||
364 | btrfs_set_opt(info->mount_opt, ENOSPC_DEBUG); | ||
365 | break; | ||
361 | case Opt_err: | 366 | case Opt_err: |
362 | printk(KERN_INFO "btrfs: unrecognized mount option " | 367 | printk(KERN_INFO "btrfs: unrecognized mount option " |
363 | "'%s'\n", p); | 368 | "'%s'\n", p); |
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index af7dbca15276..dd13eb81ee40 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c | |||
@@ -1338,11 +1338,11 @@ int btrfs_rm_device(struct btrfs_root *root, char *device_path) | |||
1338 | 1338 | ||
1339 | ret = btrfs_shrink_device(device, 0); | 1339 | ret = btrfs_shrink_device(device, 0); |
1340 | if (ret) | 1340 | if (ret) |
1341 | goto error_brelse; | 1341 | goto error_undo; |
1342 | 1342 | ||
1343 | ret = btrfs_rm_dev_item(root->fs_info->chunk_root, device); | 1343 | ret = btrfs_rm_dev_item(root->fs_info->chunk_root, device); |
1344 | if (ret) | 1344 | if (ret) |
1345 | goto error_brelse; | 1345 | goto error_undo; |
1346 | 1346 | ||
1347 | device->in_fs_metadata = 0; | 1347 | device->in_fs_metadata = 0; |
1348 | 1348 | ||
@@ -1416,6 +1416,13 @@ out: | |||
1416 | mutex_unlock(&root->fs_info->volume_mutex); | 1416 | mutex_unlock(&root->fs_info->volume_mutex); |
1417 | mutex_unlock(&uuid_mutex); | 1417 | mutex_unlock(&uuid_mutex); |
1418 | return ret; | 1418 | return ret; |
1419 | error_undo: | ||
1420 | if (device->writeable) { | ||
1421 | list_add(&device->dev_alloc_list, | ||
1422 | &root->fs_info->fs_devices->alloc_list); | ||
1423 | root->fs_info->fs_devices->rw_devices++; | ||
1424 | } | ||
1425 | goto error_brelse; | ||
1419 | } | 1426 | } |
1420 | 1427 | ||
1421 | /* | 1428 | /* |
@@ -1633,7 +1640,7 @@ int btrfs_init_new_device(struct btrfs_root *root, char *device_path) | |||
1633 | device->dev_root = root->fs_info->dev_root; | 1640 | device->dev_root = root->fs_info->dev_root; |
1634 | device->bdev = bdev; | 1641 | device->bdev = bdev; |
1635 | device->in_fs_metadata = 1; | 1642 | device->in_fs_metadata = 1; |
1636 | device->mode = 0; | 1643 | device->mode = FMODE_EXCL; |
1637 | set_blocksize(device->bdev, 4096); | 1644 | set_blocksize(device->bdev, 4096); |
1638 | 1645 | ||
1639 | if (seeding_dev) { | 1646 | if (seeding_dev) { |
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 0bc68de8edd7..099a58615b90 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c | |||
@@ -409,7 +409,7 @@ more: | |||
409 | spin_lock(&inode->i_lock); | 409 | spin_lock(&inode->i_lock); |
410 | if (ci->i_release_count == fi->dir_release_count) { | 410 | if (ci->i_release_count == fi->dir_release_count) { |
411 | dout(" marking %p complete\n", inode); | 411 | dout(" marking %p complete\n", inode); |
412 | ci->i_ceph_flags |= CEPH_I_COMPLETE; | 412 | /* ci->i_ceph_flags |= CEPH_I_COMPLETE; */ |
413 | ci->i_max_offset = filp->f_pos; | 413 | ci->i_max_offset = filp->f_pos; |
414 | } | 414 | } |
415 | spin_unlock(&inode->i_lock); | 415 | spin_unlock(&inode->i_lock); |
@@ -496,6 +496,7 @@ struct dentry *ceph_finish_lookup(struct ceph_mds_request *req, | |||
496 | 496 | ||
497 | /* .snap dir? */ | 497 | /* .snap dir? */ |
498 | if (err == -ENOENT && | 498 | if (err == -ENOENT && |
499 | ceph_snap(parent) == CEPH_NOSNAP && | ||
499 | strcmp(dentry->d_name.name, | 500 | strcmp(dentry->d_name.name, |
500 | fsc->mount_options->snapdir_name) == 0) { | 501 | fsc->mount_options->snapdir_name) == 0) { |
501 | struct inode *inode = ceph_get_snapdir(parent); | 502 | struct inode *inode = ceph_get_snapdir(parent); |
@@ -1029,28 +1030,8 @@ out_touch: | |||
1029 | static void ceph_dentry_release(struct dentry *dentry) | 1030 | static void ceph_dentry_release(struct dentry *dentry) |
1030 | { | 1031 | { |
1031 | struct ceph_dentry_info *di = ceph_dentry(dentry); | 1032 | struct ceph_dentry_info *di = ceph_dentry(dentry); |
1032 | struct inode *parent_inode = NULL; | ||
1033 | u64 snapid = CEPH_NOSNAP; | ||
1034 | 1033 | ||
1035 | if (!IS_ROOT(dentry)) { | 1034 | dout("dentry_release %p\n", dentry); |
1036 | parent_inode = dentry->d_parent->d_inode; | ||
1037 | if (parent_inode) | ||
1038 | snapid = ceph_snap(parent_inode); | ||
1039 | } | ||
1040 | dout("dentry_release %p parent %p\n", dentry, parent_inode); | ||
1041 | if (parent_inode && snapid != CEPH_SNAPDIR) { | ||
1042 | struct ceph_inode_info *ci = ceph_inode(parent_inode); | ||
1043 | |||
1044 | spin_lock(&parent_inode->i_lock); | ||
1045 | if (ci->i_shared_gen == di->lease_shared_gen || | ||
1046 | snapid <= CEPH_MAXSNAP) { | ||
1047 | dout(" clearing %p complete (d_release)\n", | ||
1048 | parent_inode); | ||
1049 | ci->i_ceph_flags &= ~CEPH_I_COMPLETE; | ||
1050 | ci->i_release_count++; | ||
1051 | } | ||
1052 | spin_unlock(&parent_inode->i_lock); | ||
1053 | } | ||
1054 | if (di) { | 1035 | if (di) { |
1055 | ceph_dentry_lru_del(dentry); | 1036 | ceph_dentry_lru_del(dentry); |
1056 | if (di->lease_session) | 1037 | if (di->lease_session) |
diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c index 5625463aa479..193bfa5e9cbd 100644 --- a/fs/ceph/inode.c +++ b/fs/ceph/inode.c | |||
@@ -707,7 +707,7 @@ static int fill_inode(struct inode *inode, | |||
707 | (issued & CEPH_CAP_FILE_EXCL) == 0 && | 707 | (issued & CEPH_CAP_FILE_EXCL) == 0 && |
708 | (ci->i_ceph_flags & CEPH_I_COMPLETE) == 0) { | 708 | (ci->i_ceph_flags & CEPH_I_COMPLETE) == 0) { |
709 | dout(" marking %p complete (empty)\n", inode); | 709 | dout(" marking %p complete (empty)\n", inode); |
710 | ci->i_ceph_flags |= CEPH_I_COMPLETE; | 710 | /* ci->i_ceph_flags |= CEPH_I_COMPLETE; */ |
711 | ci->i_max_offset = 2; | 711 | ci->i_max_offset = 2; |
712 | } | 712 | } |
713 | break; | 713 | break; |
diff --git a/fs/ceph/snap.c b/fs/ceph/snap.c index 39c243acd062..f40b9139e437 100644 --- a/fs/ceph/snap.c +++ b/fs/ceph/snap.c | |||
@@ -584,10 +584,14 @@ static void queue_realm_cap_snaps(struct ceph_snap_realm *realm) | |||
584 | if (lastinode) | 584 | if (lastinode) |
585 | iput(lastinode); | 585 | iput(lastinode); |
586 | 586 | ||
587 | dout("queue_realm_cap_snaps %p %llx children\n", realm, realm->ino); | 587 | list_for_each_entry(child, &realm->children, child_item) { |
588 | list_for_each_entry(child, &realm->children, child_item) | 588 | dout("queue_realm_cap_snaps %p %llx queue child %p %llx\n", |
589 | queue_realm_cap_snaps(child); | 589 | realm, realm->ino, child, child->ino); |
590 | list_del_init(&child->dirty_item); | ||
591 | list_add(&child->dirty_item, &realm->dirty_item); | ||
592 | } | ||
590 | 593 | ||
594 | list_del_init(&realm->dirty_item); | ||
591 | dout("queue_realm_cap_snaps %p %llx done\n", realm, realm->ino); | 595 | dout("queue_realm_cap_snaps %p %llx done\n", realm, realm->ino); |
592 | } | 596 | } |
593 | 597 | ||
@@ -683,7 +687,9 @@ more: | |||
683 | * queue cap snaps _after_ we've built the new snap contexts, | 687 | * queue cap snaps _after_ we've built the new snap contexts, |
684 | * so that i_head_snapc can be set appropriately. | 688 | * so that i_head_snapc can be set appropriately. |
685 | */ | 689 | */ |
686 | list_for_each_entry(realm, &dirty_realms, dirty_item) { | 690 | while (!list_empty(&dirty_realms)) { |
691 | realm = list_first_entry(&dirty_realms, struct ceph_snap_realm, | ||
692 | dirty_item); | ||
687 | queue_realm_cap_snaps(realm); | 693 | queue_realm_cap_snaps(realm); |
688 | } | 694 | } |
689 | 695 | ||
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h index 4a3330235d55..a9371b6578c0 100644 --- a/fs/cifs/cifsfs.h +++ b/fs/cifs/cifsfs.h | |||
@@ -127,5 +127,5 @@ extern long cifs_ioctl(struct file *filep, unsigned int cmd, unsigned long arg); | |||
127 | extern const struct export_operations cifs_export_ops; | 127 | extern const struct export_operations cifs_export_ops; |
128 | #endif /* EXPERIMENTAL */ | 128 | #endif /* EXPERIMENTAL */ |
129 | 129 | ||
130 | #define CIFS_VERSION "1.70" | 130 | #define CIFS_VERSION "1.71" |
131 | #endif /* _CIFSFS_H */ | 131 | #endif /* _CIFSFS_H */ |
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c index 8d9189f64477..79f641eeda30 100644 --- a/fs/cifs/netmisc.c +++ b/fs/cifs/netmisc.c | |||
@@ -170,7 +170,7 @@ cifs_convert_address(struct sockaddr *dst, const char *src, int len) | |||
170 | { | 170 | { |
171 | int rc, alen, slen; | 171 | int rc, alen, slen; |
172 | const char *pct; | 172 | const char *pct; |
173 | char *endp, scope_id[13]; | 173 | char scope_id[13]; |
174 | struct sockaddr_in *s4 = (struct sockaddr_in *) dst; | 174 | struct sockaddr_in *s4 = (struct sockaddr_in *) dst; |
175 | struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst; | 175 | struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst; |
176 | 176 | ||
@@ -197,9 +197,9 @@ cifs_convert_address(struct sockaddr *dst, const char *src, int len) | |||
197 | memcpy(scope_id, pct + 1, slen); | 197 | memcpy(scope_id, pct + 1, slen); |
198 | scope_id[slen] = '\0'; | 198 | scope_id[slen] = '\0'; |
199 | 199 | ||
200 | s6->sin6_scope_id = (u32) simple_strtoul(pct, &endp, 0); | 200 | rc = strict_strtoul(scope_id, 0, |
201 | if (endp != scope_id + slen) | 201 | (unsigned long *)&s6->sin6_scope_id); |
202 | return 0; | 202 | rc = (rc == 0) ? 1 : 0; |
203 | } | 203 | } |
204 | 204 | ||
205 | return rc; | 205 | return rc; |
diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c index 1adc9625a344..16765703131b 100644 --- a/fs/cifs/sess.c +++ b/fs/cifs/sess.c | |||
@@ -656,13 +656,13 @@ ssetup_ntlmssp_authenticate: | |||
656 | 656 | ||
657 | if (type == LANMAN) { | 657 | if (type == LANMAN) { |
658 | #ifdef CONFIG_CIFS_WEAK_PW_HASH | 658 | #ifdef CONFIG_CIFS_WEAK_PW_HASH |
659 | char lnm_session_key[CIFS_SESS_KEY_SIZE]; | 659 | char lnm_session_key[CIFS_AUTH_RESP_SIZE]; |
660 | 660 | ||
661 | pSMB->req.hdr.Flags2 &= ~SMBFLG2_UNICODE; | 661 | pSMB->req.hdr.Flags2 &= ~SMBFLG2_UNICODE; |
662 | 662 | ||
663 | /* no capabilities flags in old lanman negotiation */ | 663 | /* no capabilities flags in old lanman negotiation */ |
664 | 664 | ||
665 | pSMB->old_req.PasswordLength = cpu_to_le16(CIFS_SESS_KEY_SIZE); | 665 | pSMB->old_req.PasswordLength = cpu_to_le16(CIFS_AUTH_RESP_SIZE); |
666 | 666 | ||
667 | /* Calculate hash with password and copy into bcc_ptr. | 667 | /* Calculate hash with password and copy into bcc_ptr. |
668 | * Encryption Key (stored as in cryptkey) gets used if the | 668 | * Encryption Key (stored as in cryptkey) gets used if the |
@@ -675,8 +675,8 @@ ssetup_ntlmssp_authenticate: | |||
675 | true : false, lnm_session_key); | 675 | true : false, lnm_session_key); |
676 | 676 | ||
677 | ses->flags |= CIFS_SES_LANMAN; | 677 | ses->flags |= CIFS_SES_LANMAN; |
678 | memcpy(bcc_ptr, (char *)lnm_session_key, CIFS_SESS_KEY_SIZE); | 678 | memcpy(bcc_ptr, (char *)lnm_session_key, CIFS_AUTH_RESP_SIZE); |
679 | bcc_ptr += CIFS_SESS_KEY_SIZE; | 679 | bcc_ptr += CIFS_AUTH_RESP_SIZE; |
680 | 680 | ||
681 | /* can not sign if LANMAN negotiated so no need | 681 | /* can not sign if LANMAN negotiated so no need |
682 | to calculate signing key? but what if server | 682 | to calculate signing key? but what if server |
diff --git a/fs/ecryptfs/dentry.c b/fs/ecryptfs/dentry.c index 6fc4f319b550..534c1d46e69e 100644 --- a/fs/ecryptfs/dentry.c +++ b/fs/ecryptfs/dentry.c | |||
@@ -46,24 +46,28 @@ static int ecryptfs_d_revalidate(struct dentry *dentry, struct nameidata *nd) | |||
46 | { | 46 | { |
47 | struct dentry *lower_dentry; | 47 | struct dentry *lower_dentry; |
48 | struct vfsmount *lower_mnt; | 48 | struct vfsmount *lower_mnt; |
49 | struct dentry *dentry_save; | 49 | struct dentry *dentry_save = NULL; |
50 | struct vfsmount *vfsmount_save; | 50 | struct vfsmount *vfsmount_save = NULL; |
51 | int rc = 1; | 51 | int rc = 1; |
52 | 52 | ||
53 | if (nd->flags & LOOKUP_RCU) | 53 | if (nd && nd->flags & LOOKUP_RCU) |
54 | return -ECHILD; | 54 | return -ECHILD; |
55 | 55 | ||
56 | lower_dentry = ecryptfs_dentry_to_lower(dentry); | 56 | lower_dentry = ecryptfs_dentry_to_lower(dentry); |
57 | lower_mnt = ecryptfs_dentry_to_lower_mnt(dentry); | 57 | lower_mnt = ecryptfs_dentry_to_lower_mnt(dentry); |
58 | if (!lower_dentry->d_op || !lower_dentry->d_op->d_revalidate) | 58 | if (!lower_dentry->d_op || !lower_dentry->d_op->d_revalidate) |
59 | goto out; | 59 | goto out; |
60 | dentry_save = nd->path.dentry; | 60 | if (nd) { |
61 | vfsmount_save = nd->path.mnt; | 61 | dentry_save = nd->path.dentry; |
62 | nd->path.dentry = lower_dentry; | 62 | vfsmount_save = nd->path.mnt; |
63 | nd->path.mnt = lower_mnt; | 63 | nd->path.dentry = lower_dentry; |
64 | nd->path.mnt = lower_mnt; | ||
65 | } | ||
64 | rc = lower_dentry->d_op->d_revalidate(lower_dentry, nd); | 66 | rc = lower_dentry->d_op->d_revalidate(lower_dentry, nd); |
65 | nd->path.dentry = dentry_save; | 67 | if (nd) { |
66 | nd->path.mnt = vfsmount_save; | 68 | nd->path.dentry = dentry_save; |
69 | nd->path.mnt = vfsmount_save; | ||
70 | } | ||
67 | if (dentry->d_inode) { | 71 | if (dentry->d_inode) { |
68 | struct inode *lower_inode = | 72 | struct inode *lower_inode = |
69 | ecryptfs_inode_to_lower(dentry->d_inode); | 73 | ecryptfs_inode_to_lower(dentry->d_inode); |
diff --git a/fs/ecryptfs/ecryptfs_kernel.h b/fs/ecryptfs/ecryptfs_kernel.h index dbc84ed96336..e00753496e3e 100644 --- a/fs/ecryptfs/ecryptfs_kernel.h +++ b/fs/ecryptfs/ecryptfs_kernel.h | |||
@@ -632,8 +632,7 @@ int ecryptfs_interpose(struct dentry *hidden_dentry, | |||
632 | u32 flags); | 632 | u32 flags); |
633 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | 633 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, |
634 | struct dentry *lower_dentry, | 634 | struct dentry *lower_dentry, |
635 | struct inode *ecryptfs_dir_inode, | 635 | struct inode *ecryptfs_dir_inode); |
636 | struct nameidata *ecryptfs_nd); | ||
637 | int ecryptfs_decode_and_decrypt_filename(char **decrypted_name, | 636 | int ecryptfs_decode_and_decrypt_filename(char **decrypted_name, |
638 | size_t *decrypted_name_size, | 637 | size_t *decrypted_name_size, |
639 | struct dentry *ecryptfs_dentry, | 638 | struct dentry *ecryptfs_dentry, |
diff --git a/fs/ecryptfs/file.c b/fs/ecryptfs/file.c index 81e10e6a9443..7d1050e254f9 100644 --- a/fs/ecryptfs/file.c +++ b/fs/ecryptfs/file.c | |||
@@ -317,6 +317,7 @@ ecryptfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
317 | 317 | ||
318 | const struct file_operations ecryptfs_dir_fops = { | 318 | const struct file_operations ecryptfs_dir_fops = { |
319 | .readdir = ecryptfs_readdir, | 319 | .readdir = ecryptfs_readdir, |
320 | .read = generic_read_dir, | ||
320 | .unlocked_ioctl = ecryptfs_unlocked_ioctl, | 321 | .unlocked_ioctl = ecryptfs_unlocked_ioctl, |
321 | #ifdef CONFIG_COMPAT | 322 | #ifdef CONFIG_COMPAT |
322 | .compat_ioctl = ecryptfs_compat_ioctl, | 323 | .compat_ioctl = ecryptfs_compat_ioctl, |
diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c index bd33f87a1907..b592938a84bc 100644 --- a/fs/ecryptfs/inode.c +++ b/fs/ecryptfs/inode.c | |||
@@ -74,16 +74,20 @@ ecryptfs_create_underlying_file(struct inode *lower_dir_inode, | |||
74 | unsigned int flags_save; | 74 | unsigned int flags_save; |
75 | int rc; | 75 | int rc; |
76 | 76 | ||
77 | dentry_save = nd->path.dentry; | 77 | if (nd) { |
78 | vfsmount_save = nd->path.mnt; | 78 | dentry_save = nd->path.dentry; |
79 | flags_save = nd->flags; | 79 | vfsmount_save = nd->path.mnt; |
80 | nd->path.dentry = lower_dentry; | 80 | flags_save = nd->flags; |
81 | nd->path.mnt = lower_mnt; | 81 | nd->path.dentry = lower_dentry; |
82 | nd->flags &= ~LOOKUP_OPEN; | 82 | nd->path.mnt = lower_mnt; |
83 | nd->flags &= ~LOOKUP_OPEN; | ||
84 | } | ||
83 | rc = vfs_create(lower_dir_inode, lower_dentry, mode, nd); | 85 | rc = vfs_create(lower_dir_inode, lower_dentry, mode, nd); |
84 | nd->path.dentry = dentry_save; | 86 | if (nd) { |
85 | nd->path.mnt = vfsmount_save; | 87 | nd->path.dentry = dentry_save; |
86 | nd->flags = flags_save; | 88 | nd->path.mnt = vfsmount_save; |
89 | nd->flags = flags_save; | ||
90 | } | ||
87 | return rc; | 91 | return rc; |
88 | } | 92 | } |
89 | 93 | ||
@@ -241,8 +245,7 @@ out: | |||
241 | */ | 245 | */ |
242 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | 246 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, |
243 | struct dentry *lower_dentry, | 247 | struct dentry *lower_dentry, |
244 | struct inode *ecryptfs_dir_inode, | 248 | struct inode *ecryptfs_dir_inode) |
245 | struct nameidata *ecryptfs_nd) | ||
246 | { | 249 | { |
247 | struct dentry *lower_dir_dentry; | 250 | struct dentry *lower_dir_dentry; |
248 | struct vfsmount *lower_mnt; | 251 | struct vfsmount *lower_mnt; |
@@ -290,8 +293,6 @@ int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | |||
290 | goto out; | 293 | goto out; |
291 | if (special_file(lower_inode->i_mode)) | 294 | if (special_file(lower_inode->i_mode)) |
292 | goto out; | 295 | goto out; |
293 | if (!ecryptfs_nd) | ||
294 | goto out; | ||
295 | /* Released in this function */ | 296 | /* Released in this function */ |
296 | page_virt = kmem_cache_zalloc(ecryptfs_header_cache_2, GFP_USER); | 297 | page_virt = kmem_cache_zalloc(ecryptfs_header_cache_2, GFP_USER); |
297 | if (!page_virt) { | 298 | if (!page_virt) { |
@@ -349,75 +350,6 @@ out: | |||
349 | } | 350 | } |
350 | 351 | ||
351 | /** | 352 | /** |
352 | * ecryptfs_new_lower_dentry | ||
353 | * @name: The name of the new dentry. | ||
354 | * @lower_dir_dentry: Parent directory of the new dentry. | ||
355 | * @nd: nameidata from last lookup. | ||
356 | * | ||
357 | * Create a new dentry or get it from lower parent dir. | ||
358 | */ | ||
359 | static struct dentry * | ||
360 | ecryptfs_new_lower_dentry(struct qstr *name, struct dentry *lower_dir_dentry, | ||
361 | struct nameidata *nd) | ||
362 | { | ||
363 | struct dentry *new_dentry; | ||
364 | struct dentry *tmp; | ||
365 | struct inode *lower_dir_inode; | ||
366 | |||
367 | lower_dir_inode = lower_dir_dentry->d_inode; | ||
368 | |||
369 | tmp = d_alloc(lower_dir_dentry, name); | ||
370 | if (!tmp) | ||
371 | return ERR_PTR(-ENOMEM); | ||
372 | |||
373 | mutex_lock(&lower_dir_inode->i_mutex); | ||
374 | new_dentry = lower_dir_inode->i_op->lookup(lower_dir_inode, tmp, nd); | ||
375 | mutex_unlock(&lower_dir_inode->i_mutex); | ||
376 | |||
377 | if (!new_dentry) | ||
378 | new_dentry = tmp; | ||
379 | else | ||
380 | dput(tmp); | ||
381 | |||
382 | return new_dentry; | ||
383 | } | ||
384 | |||
385 | |||
386 | /** | ||
387 | * ecryptfs_lookup_one_lower | ||
388 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up | ||
389 | * @lower_dir_dentry: lower parent directory | ||
390 | * @name: lower file name | ||
391 | * | ||
392 | * Get the lower dentry from vfs. If lower dentry does not exist yet, | ||
393 | * create it. | ||
394 | */ | ||
395 | static struct dentry * | ||
396 | ecryptfs_lookup_one_lower(struct dentry *ecryptfs_dentry, | ||
397 | struct dentry *lower_dir_dentry, struct qstr *name) | ||
398 | { | ||
399 | struct nameidata nd; | ||
400 | struct vfsmount *lower_mnt; | ||
401 | int err; | ||
402 | |||
403 | lower_mnt = mntget(ecryptfs_dentry_to_lower_mnt( | ||
404 | ecryptfs_dentry->d_parent)); | ||
405 | err = vfs_path_lookup(lower_dir_dentry, lower_mnt, name->name , 0, &nd); | ||
406 | mntput(lower_mnt); | ||
407 | |||
408 | if (!err) { | ||
409 | /* we dont need the mount */ | ||
410 | mntput(nd.path.mnt); | ||
411 | return nd.path.dentry; | ||
412 | } | ||
413 | if (err != -ENOENT) | ||
414 | return ERR_PTR(err); | ||
415 | |||
416 | /* create a new lower dentry */ | ||
417 | return ecryptfs_new_lower_dentry(name, lower_dir_dentry, &nd); | ||
418 | } | ||
419 | |||
420 | /** | ||
421 | * ecryptfs_lookup | 353 | * ecryptfs_lookup |
422 | * @ecryptfs_dir_inode: The eCryptfs directory inode | 354 | * @ecryptfs_dir_inode: The eCryptfs directory inode |
423 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up | 355 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up |
@@ -434,7 +366,6 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
434 | size_t encrypted_and_encoded_name_size; | 366 | size_t encrypted_and_encoded_name_size; |
435 | struct ecryptfs_mount_crypt_stat *mount_crypt_stat = NULL; | 367 | struct ecryptfs_mount_crypt_stat *mount_crypt_stat = NULL; |
436 | struct dentry *lower_dir_dentry, *lower_dentry; | 368 | struct dentry *lower_dir_dentry, *lower_dentry; |
437 | struct qstr lower_name; | ||
438 | int rc = 0; | 369 | int rc = 0; |
439 | 370 | ||
440 | if ((ecryptfs_dentry->d_name.len == 1 | 371 | if ((ecryptfs_dentry->d_name.len == 1 |
@@ -444,20 +375,14 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
444 | goto out_d_drop; | 375 | goto out_d_drop; |
445 | } | 376 | } |
446 | lower_dir_dentry = ecryptfs_dentry_to_lower(ecryptfs_dentry->d_parent); | 377 | lower_dir_dentry = ecryptfs_dentry_to_lower(ecryptfs_dentry->d_parent); |
447 | lower_name.name = ecryptfs_dentry->d_name.name; | 378 | mutex_lock(&lower_dir_dentry->d_inode->i_mutex); |
448 | lower_name.len = ecryptfs_dentry->d_name.len; | 379 | lower_dentry = lookup_one_len(ecryptfs_dentry->d_name.name, |
449 | lower_name.hash = ecryptfs_dentry->d_name.hash; | 380 | lower_dir_dentry, |
450 | if (lower_dir_dentry->d_op && lower_dir_dentry->d_op->d_hash) { | 381 | ecryptfs_dentry->d_name.len); |
451 | rc = lower_dir_dentry->d_op->d_hash(lower_dir_dentry, | 382 | mutex_unlock(&lower_dir_dentry->d_inode->i_mutex); |
452 | lower_dir_dentry->d_inode, &lower_name); | ||
453 | if (rc < 0) | ||
454 | goto out_d_drop; | ||
455 | } | ||
456 | lower_dentry = ecryptfs_lookup_one_lower(ecryptfs_dentry, | ||
457 | lower_dir_dentry, &lower_name); | ||
458 | if (IS_ERR(lower_dentry)) { | 383 | if (IS_ERR(lower_dentry)) { |
459 | rc = PTR_ERR(lower_dentry); | 384 | rc = PTR_ERR(lower_dentry); |
460 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_lower() returned " | 385 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_len() returned " |
461 | "[%d] on lower_dentry = [%s]\n", __func__, rc, | 386 | "[%d] on lower_dentry = [%s]\n", __func__, rc, |
462 | encrypted_and_encoded_name); | 387 | encrypted_and_encoded_name); |
463 | goto out_d_drop; | 388 | goto out_d_drop; |
@@ -479,28 +404,21 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
479 | "filename; rc = [%d]\n", __func__, rc); | 404 | "filename; rc = [%d]\n", __func__, rc); |
480 | goto out_d_drop; | 405 | goto out_d_drop; |
481 | } | 406 | } |
482 | lower_name.name = encrypted_and_encoded_name; | 407 | mutex_lock(&lower_dir_dentry->d_inode->i_mutex); |
483 | lower_name.len = encrypted_and_encoded_name_size; | 408 | lower_dentry = lookup_one_len(encrypted_and_encoded_name, |
484 | lower_name.hash = full_name_hash(lower_name.name, lower_name.len); | 409 | lower_dir_dentry, |
485 | if (lower_dir_dentry->d_op && lower_dir_dentry->d_op->d_hash) { | 410 | encrypted_and_encoded_name_size); |
486 | rc = lower_dir_dentry->d_op->d_hash(lower_dir_dentry, | 411 | mutex_unlock(&lower_dir_dentry->d_inode->i_mutex); |
487 | lower_dir_dentry->d_inode, &lower_name); | ||
488 | if (rc < 0) | ||
489 | goto out_d_drop; | ||
490 | } | ||
491 | lower_dentry = ecryptfs_lookup_one_lower(ecryptfs_dentry, | ||
492 | lower_dir_dentry, &lower_name); | ||
493 | if (IS_ERR(lower_dentry)) { | 412 | if (IS_ERR(lower_dentry)) { |
494 | rc = PTR_ERR(lower_dentry); | 413 | rc = PTR_ERR(lower_dentry); |
495 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_lower() returned " | 414 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_len() returned " |
496 | "[%d] on lower_dentry = [%s]\n", __func__, rc, | 415 | "[%d] on lower_dentry = [%s]\n", __func__, rc, |
497 | encrypted_and_encoded_name); | 416 | encrypted_and_encoded_name); |
498 | goto out_d_drop; | 417 | goto out_d_drop; |
499 | } | 418 | } |
500 | lookup_and_interpose: | 419 | lookup_and_interpose: |
501 | rc = ecryptfs_lookup_and_interpose_lower(ecryptfs_dentry, lower_dentry, | 420 | rc = ecryptfs_lookup_and_interpose_lower(ecryptfs_dentry, lower_dentry, |
502 | ecryptfs_dir_inode, | 421 | ecryptfs_dir_inode); |
503 | ecryptfs_nd); | ||
504 | goto out; | 422 | goto out; |
505 | out_d_drop: | 423 | out_d_drop: |
506 | d_drop(ecryptfs_dentry); | 424 | d_drop(ecryptfs_dentry); |
@@ -1092,6 +1010,8 @@ int ecryptfs_getattr(struct vfsmount *mnt, struct dentry *dentry, | |||
1092 | rc = vfs_getattr(ecryptfs_dentry_to_lower_mnt(dentry), | 1010 | rc = vfs_getattr(ecryptfs_dentry_to_lower_mnt(dentry), |
1093 | ecryptfs_dentry_to_lower(dentry), &lower_stat); | 1011 | ecryptfs_dentry_to_lower(dentry), &lower_stat); |
1094 | if (!rc) { | 1012 | if (!rc) { |
1013 | fsstack_copy_attr_all(dentry->d_inode, | ||
1014 | ecryptfs_inode_to_lower(dentry->d_inode)); | ||
1095 | generic_fillattr(dentry->d_inode, stat); | 1015 | generic_fillattr(dentry->d_inode, stat); |
1096 | stat->blocks = lower_stat.blocks; | 1016 | stat->blocks = lower_stat.blocks; |
1097 | } | 1017 | } |
diff --git a/fs/eventfd.c b/fs/eventfd.c index e0194b3e14d6..d9a591773919 100644 --- a/fs/eventfd.c +++ b/fs/eventfd.c | |||
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(eventfd_ctx_get); | |||
99 | * @ctx: [in] Pointer to eventfd context. | 99 | * @ctx: [in] Pointer to eventfd context. |
100 | * | 100 | * |
101 | * The eventfd context reference must have been previously acquired either | 101 | * The eventfd context reference must have been previously acquired either |
102 | * with eventfd_ctx_get() or eventfd_ctx_fdget()). | 102 | * with eventfd_ctx_get() or eventfd_ctx_fdget(). |
103 | */ | 103 | */ |
104 | void eventfd_ctx_put(struct eventfd_ctx *ctx) | 104 | void eventfd_ctx_put(struct eventfd_ctx *ctx) |
105 | { | 105 | { |
@@ -146,9 +146,9 @@ static void eventfd_ctx_do_read(struct eventfd_ctx *ctx, __u64 *cnt) | |||
146 | * eventfd_ctx_remove_wait_queue - Read the current counter and removes wait queue. | 146 | * eventfd_ctx_remove_wait_queue - Read the current counter and removes wait queue. |
147 | * @ctx: [in] Pointer to eventfd context. | 147 | * @ctx: [in] Pointer to eventfd context. |
148 | * @wait: [in] Wait queue to be removed. | 148 | * @wait: [in] Wait queue to be removed. |
149 | * @cnt: [out] Pointer to the 64bit conter value. | 149 | * @cnt: [out] Pointer to the 64-bit counter value. |
150 | * | 150 | * |
151 | * Returns zero if successful, or the following error codes: | 151 | * Returns %0 if successful, or the following error codes: |
152 | * | 152 | * |
153 | * -EAGAIN : The operation would have blocked. | 153 | * -EAGAIN : The operation would have blocked. |
154 | * | 154 | * |
@@ -175,11 +175,11 @@ EXPORT_SYMBOL_GPL(eventfd_ctx_remove_wait_queue); | |||
175 | * eventfd_ctx_read - Reads the eventfd counter or wait if it is zero. | 175 | * eventfd_ctx_read - Reads the eventfd counter or wait if it is zero. |
176 | * @ctx: [in] Pointer to eventfd context. | 176 | * @ctx: [in] Pointer to eventfd context. |
177 | * @no_wait: [in] Different from zero if the operation should not block. | 177 | * @no_wait: [in] Different from zero if the operation should not block. |
178 | * @cnt: [out] Pointer to the 64bit conter value. | 178 | * @cnt: [out] Pointer to the 64-bit counter value. |
179 | * | 179 | * |
180 | * Returns zero if successful, or the following error codes: | 180 | * Returns %0 if successful, or the following error codes: |
181 | * | 181 | * |
182 | * -EAGAIN : The operation would have blocked but @no_wait was nonzero. | 182 | * -EAGAIN : The operation would have blocked but @no_wait was non-zero. |
183 | * -ERESTARTSYS : A signal interrupted the wait operation. | 183 | * -ERESTARTSYS : A signal interrupted the wait operation. |
184 | * | 184 | * |
185 | * If @no_wait is zero, the function might sleep until the eventfd internal | 185 | * If @no_wait is zero, the function might sleep until the eventfd internal |
diff --git a/fs/eventpoll.c b/fs/eventpoll.c index 267d0ada4541..4a09af9e9a63 100644 --- a/fs/eventpoll.c +++ b/fs/eventpoll.c | |||
@@ -63,6 +63,13 @@ | |||
63 | * cleanup path and it is also acquired by eventpoll_release_file() | 63 | * cleanup path and it is also acquired by eventpoll_release_file() |
64 | * if a file has been pushed inside an epoll set and it is then | 64 | * if a file has been pushed inside an epoll set and it is then |
65 | * close()d without a previous call toepoll_ctl(EPOLL_CTL_DEL). | 65 | * close()d without a previous call toepoll_ctl(EPOLL_CTL_DEL). |
66 | * It is also acquired when inserting an epoll fd onto another epoll | ||
67 | * fd. We do this so that we walk the epoll tree and ensure that this | ||
68 | * insertion does not create a cycle of epoll file descriptors, which | ||
69 | * could lead to deadlock. We need a global mutex to prevent two | ||
70 | * simultaneous inserts (A into B and B into A) from racing and | ||
71 | * constructing a cycle without either insert observing that it is | ||
72 | * going to. | ||
66 | * It is possible to drop the "ep->mtx" and to use the global | 73 | * It is possible to drop the "ep->mtx" and to use the global |
67 | * mutex "epmutex" (together with "ep->lock") to have it working, | 74 | * mutex "epmutex" (together with "ep->lock") to have it working, |
68 | * but having "ep->mtx" will make the interface more scalable. | 75 | * but having "ep->mtx" will make the interface more scalable. |
@@ -224,6 +231,9 @@ static long max_user_watches __read_mostly; | |||
224 | */ | 231 | */ |
225 | static DEFINE_MUTEX(epmutex); | 232 | static DEFINE_MUTEX(epmutex); |
226 | 233 | ||
234 | /* Used to check for epoll file descriptor inclusion loops */ | ||
235 | static struct nested_calls poll_loop_ncalls; | ||
236 | |||
227 | /* Used for safe wake up implementation */ | 237 | /* Used for safe wake up implementation */ |
228 | static struct nested_calls poll_safewake_ncalls; | 238 | static struct nested_calls poll_safewake_ncalls; |
229 | 239 | ||
@@ -1198,6 +1208,62 @@ retry: | |||
1198 | return res; | 1208 | return res; |
1199 | } | 1209 | } |
1200 | 1210 | ||
1211 | /** | ||
1212 | * ep_loop_check_proc - Callback function to be passed to the @ep_call_nested() | ||
1213 | * API, to verify that adding an epoll file inside another | ||
1214 | * epoll structure, does not violate the constraints, in | ||
1215 | * terms of closed loops, or too deep chains (which can | ||
1216 | * result in excessive stack usage). | ||
1217 | * | ||
1218 | * @priv: Pointer to the epoll file to be currently checked. | ||
1219 | * @cookie: Original cookie for this call. This is the top-of-the-chain epoll | ||
1220 | * data structure pointer. | ||
1221 | * @call_nests: Current dept of the @ep_call_nested() call stack. | ||
1222 | * | ||
1223 | * Returns: Returns zero if adding the epoll @file inside current epoll | ||
1224 | * structure @ep does not violate the constraints, or -1 otherwise. | ||
1225 | */ | ||
1226 | static int ep_loop_check_proc(void *priv, void *cookie, int call_nests) | ||
1227 | { | ||
1228 | int error = 0; | ||
1229 | struct file *file = priv; | ||
1230 | struct eventpoll *ep = file->private_data; | ||
1231 | struct rb_node *rbp; | ||
1232 | struct epitem *epi; | ||
1233 | |||
1234 | mutex_lock(&ep->mtx); | ||
1235 | for (rbp = rb_first(&ep->rbr); rbp; rbp = rb_next(rbp)) { | ||
1236 | epi = rb_entry(rbp, struct epitem, rbn); | ||
1237 | if (unlikely(is_file_epoll(epi->ffd.file))) { | ||
1238 | error = ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS, | ||
1239 | ep_loop_check_proc, epi->ffd.file, | ||
1240 | epi->ffd.file->private_data, current); | ||
1241 | if (error != 0) | ||
1242 | break; | ||
1243 | } | ||
1244 | } | ||
1245 | mutex_unlock(&ep->mtx); | ||
1246 | |||
1247 | return error; | ||
1248 | } | ||
1249 | |||
1250 | /** | ||
1251 | * ep_loop_check - Performs a check to verify that adding an epoll file (@file) | ||
1252 | * another epoll file (represented by @ep) does not create | ||
1253 | * closed loops or too deep chains. | ||
1254 | * | ||
1255 | * @ep: Pointer to the epoll private data structure. | ||
1256 | * @file: Pointer to the epoll file to be checked. | ||
1257 | * | ||
1258 | * Returns: Returns zero if adding the epoll @file inside current epoll | ||
1259 | * structure @ep does not violate the constraints, or -1 otherwise. | ||
1260 | */ | ||
1261 | static int ep_loop_check(struct eventpoll *ep, struct file *file) | ||
1262 | { | ||
1263 | return ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS, | ||
1264 | ep_loop_check_proc, file, ep, current); | ||
1265 | } | ||
1266 | |||
1201 | /* | 1267 | /* |
1202 | * Open an eventpoll file descriptor. | 1268 | * Open an eventpoll file descriptor. |
1203 | */ | 1269 | */ |
@@ -1246,6 +1312,7 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, | |||
1246 | struct epoll_event __user *, event) | 1312 | struct epoll_event __user *, event) |
1247 | { | 1313 | { |
1248 | int error; | 1314 | int error; |
1315 | int did_lock_epmutex = 0; | ||
1249 | struct file *file, *tfile; | 1316 | struct file *file, *tfile; |
1250 | struct eventpoll *ep; | 1317 | struct eventpoll *ep; |
1251 | struct epitem *epi; | 1318 | struct epitem *epi; |
@@ -1287,6 +1354,25 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, | |||
1287 | */ | 1354 | */ |
1288 | ep = file->private_data; | 1355 | ep = file->private_data; |
1289 | 1356 | ||
1357 | /* | ||
1358 | * When we insert an epoll file descriptor, inside another epoll file | ||
1359 | * descriptor, there is the change of creating closed loops, which are | ||
1360 | * better be handled here, than in more critical paths. | ||
1361 | * | ||
1362 | * We hold epmutex across the loop check and the insert in this case, in | ||
1363 | * order to prevent two separate inserts from racing and each doing the | ||
1364 | * insert "at the same time" such that ep_loop_check passes on both | ||
1365 | * before either one does the insert, thereby creating a cycle. | ||
1366 | */ | ||
1367 | if (unlikely(is_file_epoll(tfile) && op == EPOLL_CTL_ADD)) { | ||
1368 | mutex_lock(&epmutex); | ||
1369 | did_lock_epmutex = 1; | ||
1370 | error = -ELOOP; | ||
1371 | if (ep_loop_check(ep, tfile) != 0) | ||
1372 | goto error_tgt_fput; | ||
1373 | } | ||
1374 | |||
1375 | |||
1290 | mutex_lock(&ep->mtx); | 1376 | mutex_lock(&ep->mtx); |
1291 | 1377 | ||
1292 | /* | 1378 | /* |
@@ -1322,6 +1408,9 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, | |||
1322 | mutex_unlock(&ep->mtx); | 1408 | mutex_unlock(&ep->mtx); |
1323 | 1409 | ||
1324 | error_tgt_fput: | 1410 | error_tgt_fput: |
1411 | if (unlikely(did_lock_epmutex)) | ||
1412 | mutex_unlock(&epmutex); | ||
1413 | |||
1325 | fput(tfile); | 1414 | fput(tfile); |
1326 | error_fput: | 1415 | error_fput: |
1327 | fput(file); | 1416 | fput(file); |
@@ -1441,6 +1530,12 @@ static int __init eventpoll_init(void) | |||
1441 | EP_ITEM_COST; | 1530 | EP_ITEM_COST; |
1442 | BUG_ON(max_user_watches < 0); | 1531 | BUG_ON(max_user_watches < 0); |
1443 | 1532 | ||
1533 | /* | ||
1534 | * Initialize the structure used to perform epoll file descriptor | ||
1535 | * inclusion loops checks. | ||
1536 | */ | ||
1537 | ep_nested_calls_init(&poll_loop_ncalls); | ||
1538 | |||
1444 | /* Initialize the structure used to perform safe poll wait head wake ups */ | 1539 | /* Initialize the structure used to perform safe poll wait head wake ups */ |
1445 | ep_nested_calls_init(&poll_safewake_ncalls); | 1540 | ep_nested_calls_init(&poll_safewake_ncalls); |
1446 | 1541 | ||
diff --git a/fs/exofs/namei.c b/fs/exofs/namei.c index 264e95d02830..4d70db110cfc 100644 --- a/fs/exofs/namei.c +++ b/fs/exofs/namei.c | |||
@@ -272,7 +272,6 @@ static int exofs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
272 | new_de = exofs_find_entry(new_dir, new_dentry, &new_page); | 272 | new_de = exofs_find_entry(new_dir, new_dentry, &new_page); |
273 | if (!new_de) | 273 | if (!new_de) |
274 | goto out_dir; | 274 | goto out_dir; |
275 | inode_inc_link_count(old_inode); | ||
276 | err = exofs_set_link(new_dir, new_de, new_page, old_inode); | 275 | err = exofs_set_link(new_dir, new_de, new_page, old_inode); |
277 | new_inode->i_ctime = CURRENT_TIME; | 276 | new_inode->i_ctime = CURRENT_TIME; |
278 | if (dir_de) | 277 | if (dir_de) |
@@ -286,12 +285,9 @@ static int exofs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
286 | if (new_dir->i_nlink >= EXOFS_LINK_MAX) | 285 | if (new_dir->i_nlink >= EXOFS_LINK_MAX) |
287 | goto out_dir; | 286 | goto out_dir; |
288 | } | 287 | } |
289 | inode_inc_link_count(old_inode); | ||
290 | err = exofs_add_link(new_dentry, old_inode); | 288 | err = exofs_add_link(new_dentry, old_inode); |
291 | if (err) { | 289 | if (err) |
292 | inode_dec_link_count(old_inode); | ||
293 | goto out_dir; | 290 | goto out_dir; |
294 | } | ||
295 | if (dir_de) | 291 | if (dir_de) |
296 | inode_inc_link_count(new_dir); | 292 | inode_inc_link_count(new_dir); |
297 | } | 293 | } |
@@ -299,7 +295,7 @@ static int exofs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
299 | old_inode->i_ctime = CURRENT_TIME; | 295 | old_inode->i_ctime = CURRENT_TIME; |
300 | 296 | ||
301 | exofs_delete_entry(old_de, old_page); | 297 | exofs_delete_entry(old_de, old_page); |
302 | inode_dec_link_count(old_inode); | 298 | mark_inode_dirty(old_inode); |
303 | 299 | ||
304 | if (dir_de) { | 300 | if (dir_de) { |
305 | err = exofs_set_link(old_inode, dir_de, dir_page, new_dir); | 301 | err = exofs_set_link(old_inode, dir_de, dir_page, new_dir); |
diff --git a/fs/ext2/namei.c b/fs/ext2/namei.c index 2e1d8341d827..adb91855ccd0 100644 --- a/fs/ext2/namei.c +++ b/fs/ext2/namei.c | |||
@@ -344,7 +344,6 @@ static int ext2_rename (struct inode * old_dir, struct dentry * old_dentry, | |||
344 | new_de = ext2_find_entry (new_dir, &new_dentry->d_name, &new_page); | 344 | new_de = ext2_find_entry (new_dir, &new_dentry->d_name, &new_page); |
345 | if (!new_de) | 345 | if (!new_de) |
346 | goto out_dir; | 346 | goto out_dir; |
347 | inode_inc_link_count(old_inode); | ||
348 | ext2_set_link(new_dir, new_de, new_page, old_inode, 1); | 347 | ext2_set_link(new_dir, new_de, new_page, old_inode, 1); |
349 | new_inode->i_ctime = CURRENT_TIME_SEC; | 348 | new_inode->i_ctime = CURRENT_TIME_SEC; |
350 | if (dir_de) | 349 | if (dir_de) |
@@ -356,12 +355,9 @@ static int ext2_rename (struct inode * old_dir, struct dentry * old_dentry, | |||
356 | if (new_dir->i_nlink >= EXT2_LINK_MAX) | 355 | if (new_dir->i_nlink >= EXT2_LINK_MAX) |
357 | goto out_dir; | 356 | goto out_dir; |
358 | } | 357 | } |
359 | inode_inc_link_count(old_inode); | ||
360 | err = ext2_add_link(new_dentry, old_inode); | 358 | err = ext2_add_link(new_dentry, old_inode); |
361 | if (err) { | 359 | if (err) |
362 | inode_dec_link_count(old_inode); | ||
363 | goto out_dir; | 360 | goto out_dir; |
364 | } | ||
365 | if (dir_de) | 361 | if (dir_de) |
366 | inode_inc_link_count(new_dir); | 362 | inode_inc_link_count(new_dir); |
367 | } | 363 | } |
@@ -369,12 +365,11 @@ static int ext2_rename (struct inode * old_dir, struct dentry * old_dentry, | |||
369 | /* | 365 | /* |
370 | * Like most other Unix systems, set the ctime for inodes on a | 366 | * Like most other Unix systems, set the ctime for inodes on a |
371 | * rename. | 367 | * rename. |
372 | * inode_dec_link_count() will mark the inode dirty. | ||
373 | */ | 368 | */ |
374 | old_inode->i_ctime = CURRENT_TIME_SEC; | 369 | old_inode->i_ctime = CURRENT_TIME_SEC; |
370 | mark_inode_dirty(old_inode); | ||
375 | 371 | ||
376 | ext2_delete_entry (old_de, old_page); | 372 | ext2_delete_entry (old_de, old_page); |
377 | inode_dec_link_count(old_inode); | ||
378 | 373 | ||
379 | if (dir_de) { | 374 | if (dir_de) { |
380 | if (old_dir != new_dir) | 375 | if (old_dir != new_dir) |
diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c index bfed8447ed80..83543b5ff941 100644 --- a/fs/fuse/dir.c +++ b/fs/fuse/dir.c | |||
@@ -1283,8 +1283,11 @@ static int fuse_do_setattr(struct dentry *entry, struct iattr *attr, | |||
1283 | if (err) | 1283 | if (err) |
1284 | return err; | 1284 | return err; |
1285 | 1285 | ||
1286 | if ((attr->ia_valid & ATTR_OPEN) && fc->atomic_o_trunc) | 1286 | if (attr->ia_valid & ATTR_OPEN) { |
1287 | return 0; | 1287 | if (fc->atomic_o_trunc) |
1288 | return 0; | ||
1289 | file = NULL; | ||
1290 | } | ||
1288 | 1291 | ||
1289 | if (attr->ia_valid & ATTR_SIZE) | 1292 | if (attr->ia_valid & ATTR_SIZE) |
1290 | is_truncate = true; | 1293 | is_truncate = true; |
diff --git a/fs/fuse/file.c b/fs/fuse/file.c index 95da1bc1c826..9e0832dbb1e3 100644 --- a/fs/fuse/file.c +++ b/fs/fuse/file.c | |||
@@ -86,18 +86,52 @@ struct fuse_file *fuse_file_get(struct fuse_file *ff) | |||
86 | return ff; | 86 | return ff; |
87 | } | 87 | } |
88 | 88 | ||
89 | static void fuse_release_async(struct work_struct *work) | ||
90 | { | ||
91 | struct fuse_req *req; | ||
92 | struct fuse_conn *fc; | ||
93 | struct path path; | ||
94 | |||
95 | req = container_of(work, struct fuse_req, misc.release.work); | ||
96 | path = req->misc.release.path; | ||
97 | fc = get_fuse_conn(path.dentry->d_inode); | ||
98 | |||
99 | fuse_put_request(fc, req); | ||
100 | path_put(&path); | ||
101 | } | ||
102 | |||
89 | static void fuse_release_end(struct fuse_conn *fc, struct fuse_req *req) | 103 | static void fuse_release_end(struct fuse_conn *fc, struct fuse_req *req) |
90 | { | 104 | { |
91 | path_put(&req->misc.release.path); | 105 | if (fc->destroy_req) { |
106 | /* | ||
107 | * If this is a fuseblk mount, then it's possible that | ||
108 | * releasing the path will result in releasing the | ||
109 | * super block and sending the DESTROY request. If | ||
110 | * the server is single threaded, this would hang. | ||
111 | * For this reason do the path_put() in a separate | ||
112 | * thread. | ||
113 | */ | ||
114 | atomic_inc(&req->count); | ||
115 | INIT_WORK(&req->misc.release.work, fuse_release_async); | ||
116 | schedule_work(&req->misc.release.work); | ||
117 | } else { | ||
118 | path_put(&req->misc.release.path); | ||
119 | } | ||
92 | } | 120 | } |
93 | 121 | ||
94 | static void fuse_file_put(struct fuse_file *ff) | 122 | static void fuse_file_put(struct fuse_file *ff, bool sync) |
95 | { | 123 | { |
96 | if (atomic_dec_and_test(&ff->count)) { | 124 | if (atomic_dec_and_test(&ff->count)) { |
97 | struct fuse_req *req = ff->reserved_req; | 125 | struct fuse_req *req = ff->reserved_req; |
98 | 126 | ||
99 | req->end = fuse_release_end; | 127 | if (sync) { |
100 | fuse_request_send_background(ff->fc, req); | 128 | fuse_request_send(ff->fc, req); |
129 | path_put(&req->misc.release.path); | ||
130 | fuse_put_request(ff->fc, req); | ||
131 | } else { | ||
132 | req->end = fuse_release_end; | ||
133 | fuse_request_send_background(ff->fc, req); | ||
134 | } | ||
101 | kfree(ff); | 135 | kfree(ff); |
102 | } | 136 | } |
103 | } | 137 | } |
@@ -219,8 +253,12 @@ void fuse_release_common(struct file *file, int opcode) | |||
219 | * Normally this will send the RELEASE request, however if | 253 | * Normally this will send the RELEASE request, however if |
220 | * some asynchronous READ or WRITE requests are outstanding, | 254 | * some asynchronous READ or WRITE requests are outstanding, |
221 | * the sending will be delayed. | 255 | * the sending will be delayed. |
256 | * | ||
257 | * Make the release synchronous if this is a fuseblk mount, | ||
258 | * synchronous RELEASE is allowed (and desirable) in this case | ||
259 | * because the server can be trusted not to screw up. | ||
222 | */ | 260 | */ |
223 | fuse_file_put(ff); | 261 | fuse_file_put(ff, ff->fc->destroy_req != NULL); |
224 | } | 262 | } |
225 | 263 | ||
226 | static int fuse_open(struct inode *inode, struct file *file) | 264 | static int fuse_open(struct inode *inode, struct file *file) |
@@ -558,7 +596,7 @@ static void fuse_readpages_end(struct fuse_conn *fc, struct fuse_req *req) | |||
558 | page_cache_release(page); | 596 | page_cache_release(page); |
559 | } | 597 | } |
560 | if (req->ff) | 598 | if (req->ff) |
561 | fuse_file_put(req->ff); | 599 | fuse_file_put(req->ff, false); |
562 | } | 600 | } |
563 | 601 | ||
564 | static void fuse_send_readpages(struct fuse_req *req, struct file *file) | 602 | static void fuse_send_readpages(struct fuse_req *req, struct file *file) |
@@ -1137,7 +1175,7 @@ static ssize_t fuse_direct_write(struct file *file, const char __user *buf, | |||
1137 | static void fuse_writepage_free(struct fuse_conn *fc, struct fuse_req *req) | 1175 | static void fuse_writepage_free(struct fuse_conn *fc, struct fuse_req *req) |
1138 | { | 1176 | { |
1139 | __free_page(req->pages[0]); | 1177 | __free_page(req->pages[0]); |
1140 | fuse_file_put(req->ff); | 1178 | fuse_file_put(req->ff, false); |
1141 | } | 1179 | } |
1142 | 1180 | ||
1143 | static void fuse_writepage_finish(struct fuse_conn *fc, struct fuse_req *req) | 1181 | static void fuse_writepage_finish(struct fuse_conn *fc, struct fuse_req *req) |
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h index ae5744a2f9e9..d4286947bc2c 100644 --- a/fs/fuse/fuse_i.h +++ b/fs/fuse/fuse_i.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/rwsem.h> | 21 | #include <linux/rwsem.h> |
22 | #include <linux/rbtree.h> | 22 | #include <linux/rbtree.h> |
23 | #include <linux/poll.h> | 23 | #include <linux/poll.h> |
24 | #include <linux/workqueue.h> | ||
24 | 25 | ||
25 | /** Max number of pages that can be used in a single read request */ | 26 | /** Max number of pages that can be used in a single read request */ |
26 | #define FUSE_MAX_PAGES_PER_REQ 32 | 27 | #define FUSE_MAX_PAGES_PER_REQ 32 |
@@ -262,7 +263,10 @@ struct fuse_req { | |||
262 | /** Data for asynchronous requests */ | 263 | /** Data for asynchronous requests */ |
263 | union { | 264 | union { |
264 | struct { | 265 | struct { |
265 | struct fuse_release_in in; | 266 | union { |
267 | struct fuse_release_in in; | ||
268 | struct work_struct work; | ||
269 | }; | ||
266 | struct path path; | 270 | struct path path; |
267 | } release; | 271 | } release; |
268 | struct fuse_init_in init_in; | 272 | struct fuse_init_in init_in; |
diff --git a/fs/gfs2/glock.c b/fs/gfs2/glock.c index 08a8beb152e6..7cd9a5a68d59 100644 --- a/fs/gfs2/glock.c +++ b/fs/gfs2/glock.c | |||
@@ -1779,11 +1779,11 @@ int __init gfs2_glock_init(void) | |||
1779 | #endif | 1779 | #endif |
1780 | 1780 | ||
1781 | glock_workqueue = alloc_workqueue("glock_workqueue", WQ_MEM_RECLAIM | | 1781 | glock_workqueue = alloc_workqueue("glock_workqueue", WQ_MEM_RECLAIM | |
1782 | WQ_HIGHPRI | WQ_FREEZEABLE, 0); | 1782 | WQ_HIGHPRI | WQ_FREEZABLE, 0); |
1783 | if (IS_ERR(glock_workqueue)) | 1783 | if (IS_ERR(glock_workqueue)) |
1784 | return PTR_ERR(glock_workqueue); | 1784 | return PTR_ERR(glock_workqueue); |
1785 | gfs2_delete_workqueue = alloc_workqueue("delete_workqueue", | 1785 | gfs2_delete_workqueue = alloc_workqueue("delete_workqueue", |
1786 | WQ_MEM_RECLAIM | WQ_FREEZEABLE, | 1786 | WQ_MEM_RECLAIM | WQ_FREEZABLE, |
1787 | 0); | 1787 | 0); |
1788 | if (IS_ERR(gfs2_delete_workqueue)) { | 1788 | if (IS_ERR(gfs2_delete_workqueue)) { |
1789 | destroy_workqueue(glock_workqueue); | 1789 | destroy_workqueue(glock_workqueue); |
diff --git a/fs/gfs2/main.c b/fs/gfs2/main.c index ebef7ab6e17e..72c31a315d96 100644 --- a/fs/gfs2/main.c +++ b/fs/gfs2/main.c | |||
@@ -59,14 +59,7 @@ static void gfs2_init_gl_aspace_once(void *foo) | |||
59 | struct address_space *mapping = (struct address_space *)(gl + 1); | 59 | struct address_space *mapping = (struct address_space *)(gl + 1); |
60 | 60 | ||
61 | gfs2_init_glock_once(gl); | 61 | gfs2_init_glock_once(gl); |
62 | memset(mapping, 0, sizeof(*mapping)); | 62 | address_space_init_once(mapping); |
63 | INIT_RADIX_TREE(&mapping->page_tree, GFP_ATOMIC); | ||
64 | spin_lock_init(&mapping->tree_lock); | ||
65 | spin_lock_init(&mapping->i_mmap_lock); | ||
66 | INIT_LIST_HEAD(&mapping->private_list); | ||
67 | spin_lock_init(&mapping->private_lock); | ||
68 | INIT_RAW_PRIO_TREE_ROOT(&mapping->i_mmap); | ||
69 | INIT_LIST_HEAD(&mapping->i_mmap_nonlinear); | ||
70 | } | 63 | } |
71 | 64 | ||
72 | /** | 65 | /** |
@@ -144,7 +137,7 @@ static int __init init_gfs2_fs(void) | |||
144 | 137 | ||
145 | error = -ENOMEM; | 138 | error = -ENOMEM; |
146 | gfs_recovery_wq = alloc_workqueue("gfs_recovery", | 139 | gfs_recovery_wq = alloc_workqueue("gfs_recovery", |
147 | WQ_MEM_RECLAIM | WQ_FREEZEABLE, 0); | 140 | WQ_MEM_RECLAIM | WQ_FREEZABLE, 0); |
148 | if (!gfs_recovery_wq) | 141 | if (!gfs_recovery_wq) |
149 | goto fail_wq; | 142 | goto fail_wq; |
150 | 143 | ||
diff --git a/fs/hfs/dir.c b/fs/hfs/dir.c index afa66aaa2237..b4d70b13be92 100644 --- a/fs/hfs/dir.c +++ b/fs/hfs/dir.c | |||
@@ -238,46 +238,22 @@ static int hfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) | |||
238 | } | 238 | } |
239 | 239 | ||
240 | /* | 240 | /* |
241 | * hfs_unlink() | 241 | * hfs_remove() |
242 | * | 242 | * |
243 | * This is the unlink() entry in the inode_operations structure for | 243 | * This serves as both unlink() and rmdir() in the inode_operations |
244 | * regular HFS directories. The purpose is to delete an existing | 244 | * structure for regular HFS directories. The purpose is to delete |
245 | * file, given the inode for the parent directory and the name | 245 | * an existing child, given the inode for the parent directory and |
246 | * (and its length) of the existing file. | 246 | * the name (and its length) of the existing directory. |
247 | */ | ||
248 | static int hfs_unlink(struct inode *dir, struct dentry *dentry) | ||
249 | { | ||
250 | struct inode *inode; | ||
251 | int res; | ||
252 | |||
253 | inode = dentry->d_inode; | ||
254 | res = hfs_cat_delete(inode->i_ino, dir, &dentry->d_name); | ||
255 | if (res) | ||
256 | return res; | ||
257 | |||
258 | drop_nlink(inode); | ||
259 | hfs_delete_inode(inode); | ||
260 | inode->i_ctime = CURRENT_TIME_SEC; | ||
261 | mark_inode_dirty(inode); | ||
262 | |||
263 | return res; | ||
264 | } | ||
265 | |||
266 | /* | ||
267 | * hfs_rmdir() | ||
268 | * | 247 | * |
269 | * This is the rmdir() entry in the inode_operations structure for | 248 | * HFS does not have hardlinks, so both rmdir and unlink set the |
270 | * regular HFS directories. The purpose is to delete an existing | 249 | * link count to 0. The only difference is the emptiness check. |
271 | * directory, given the inode for the parent directory and the name | ||
272 | * (and its length) of the existing directory. | ||
273 | */ | 250 | */ |
274 | static int hfs_rmdir(struct inode *dir, struct dentry *dentry) | 251 | static int hfs_remove(struct inode *dir, struct dentry *dentry) |
275 | { | 252 | { |
276 | struct inode *inode; | 253 | struct inode *inode = dentry->d_inode; |
277 | int res; | 254 | int res; |
278 | 255 | ||
279 | inode = dentry->d_inode; | 256 | if (S_ISDIR(inode->i_mode) && inode->i_size != 2) |
280 | if (inode->i_size != 2) | ||
281 | return -ENOTEMPTY; | 257 | return -ENOTEMPTY; |
282 | res = hfs_cat_delete(inode->i_ino, dir, &dentry->d_name); | 258 | res = hfs_cat_delete(inode->i_ino, dir, &dentry->d_name); |
283 | if (res) | 259 | if (res) |
@@ -307,7 +283,7 @@ static int hfs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
307 | 283 | ||
308 | /* Unlink destination if it already exists */ | 284 | /* Unlink destination if it already exists */ |
309 | if (new_dentry->d_inode) { | 285 | if (new_dentry->d_inode) { |
310 | res = hfs_unlink(new_dir, new_dentry); | 286 | res = hfs_remove(new_dir, new_dentry); |
311 | if (res) | 287 | if (res) |
312 | return res; | 288 | return res; |
313 | } | 289 | } |
@@ -332,9 +308,9 @@ const struct file_operations hfs_dir_operations = { | |||
332 | const struct inode_operations hfs_dir_inode_operations = { | 308 | const struct inode_operations hfs_dir_inode_operations = { |
333 | .create = hfs_create, | 309 | .create = hfs_create, |
334 | .lookup = hfs_lookup, | 310 | .lookup = hfs_lookup, |
335 | .unlink = hfs_unlink, | 311 | .unlink = hfs_remove, |
336 | .mkdir = hfs_mkdir, | 312 | .mkdir = hfs_mkdir, |
337 | .rmdir = hfs_rmdir, | 313 | .rmdir = hfs_remove, |
338 | .rename = hfs_rename, | 314 | .rename = hfs_rename, |
339 | .setattr = hfs_inode_setattr, | 315 | .setattr = hfs_inode_setattr, |
340 | }; | 316 | }; |
diff --git a/fs/inode.c b/fs/inode.c index da85e56378f3..0647d80accf6 100644 --- a/fs/inode.c +++ b/fs/inode.c | |||
@@ -295,6 +295,20 @@ static void destroy_inode(struct inode *inode) | |||
295 | call_rcu(&inode->i_rcu, i_callback); | 295 | call_rcu(&inode->i_rcu, i_callback); |
296 | } | 296 | } |
297 | 297 | ||
298 | void address_space_init_once(struct address_space *mapping) | ||
299 | { | ||
300 | memset(mapping, 0, sizeof(*mapping)); | ||
301 | INIT_RADIX_TREE(&mapping->page_tree, GFP_ATOMIC); | ||
302 | spin_lock_init(&mapping->tree_lock); | ||
303 | spin_lock_init(&mapping->i_mmap_lock); | ||
304 | INIT_LIST_HEAD(&mapping->private_list); | ||
305 | spin_lock_init(&mapping->private_lock); | ||
306 | INIT_RAW_PRIO_TREE_ROOT(&mapping->i_mmap); | ||
307 | INIT_LIST_HEAD(&mapping->i_mmap_nonlinear); | ||
308 | mutex_init(&mapping->unmap_mutex); | ||
309 | } | ||
310 | EXPORT_SYMBOL(address_space_init_once); | ||
311 | |||
298 | /* | 312 | /* |
299 | * These are initializations that only need to be done | 313 | * These are initializations that only need to be done |
300 | * once, because the fields are idempotent across use | 314 | * once, because the fields are idempotent across use |
@@ -308,13 +322,7 @@ void inode_init_once(struct inode *inode) | |||
308 | INIT_LIST_HEAD(&inode->i_devices); | 322 | INIT_LIST_HEAD(&inode->i_devices); |
309 | INIT_LIST_HEAD(&inode->i_wb_list); | 323 | INIT_LIST_HEAD(&inode->i_wb_list); |
310 | INIT_LIST_HEAD(&inode->i_lru); | 324 | INIT_LIST_HEAD(&inode->i_lru); |
311 | INIT_RADIX_TREE(&inode->i_data.page_tree, GFP_ATOMIC); | 325 | address_space_init_once(&inode->i_data); |
312 | spin_lock_init(&inode->i_data.tree_lock); | ||
313 | spin_lock_init(&inode->i_data.i_mmap_lock); | ||
314 | INIT_LIST_HEAD(&inode->i_data.private_list); | ||
315 | spin_lock_init(&inode->i_data.private_lock); | ||
316 | INIT_RAW_PRIO_TREE_ROOT(&inode->i_data.i_mmap); | ||
317 | INIT_LIST_HEAD(&inode->i_data.i_mmap_nonlinear); | ||
318 | i_size_ordered_init(inode); | 326 | i_size_ordered_init(inode); |
319 | #ifdef CONFIG_FSNOTIFY | 327 | #ifdef CONFIG_FSNOTIFY |
320 | INIT_HLIST_HEAD(&inode->i_fsnotify_marks); | 328 | INIT_HLIST_HEAD(&inode->i_fsnotify_marks); |
@@ -540,11 +548,14 @@ void evict_inodes(struct super_block *sb) | |||
540 | /** | 548 | /** |
541 | * invalidate_inodes - attempt to free all inodes on a superblock | 549 | * invalidate_inodes - attempt to free all inodes on a superblock |
542 | * @sb: superblock to operate on | 550 | * @sb: superblock to operate on |
551 | * @kill_dirty: flag to guide handling of dirty inodes | ||
543 | * | 552 | * |
544 | * Attempts to free all inodes for a given superblock. If there were any | 553 | * Attempts to free all inodes for a given superblock. If there were any |
545 | * busy inodes return a non-zero value, else zero. | 554 | * busy inodes return a non-zero value, else zero. |
555 | * If @kill_dirty is set, discard dirty inodes too, otherwise treat | ||
556 | * them as busy. | ||
546 | */ | 557 | */ |
547 | int invalidate_inodes(struct super_block *sb) | 558 | int invalidate_inodes(struct super_block *sb, bool kill_dirty) |
548 | { | 559 | { |
549 | int busy = 0; | 560 | int busy = 0; |
550 | struct inode *inode, *next; | 561 | struct inode *inode, *next; |
@@ -556,6 +567,10 @@ int invalidate_inodes(struct super_block *sb) | |||
556 | list_for_each_entry_safe(inode, next, &sb->s_inodes, i_sb_list) { | 567 | list_for_each_entry_safe(inode, next, &sb->s_inodes, i_sb_list) { |
557 | if (inode->i_state & (I_NEW | I_FREEING | I_WILL_FREE)) | 568 | if (inode->i_state & (I_NEW | I_FREEING | I_WILL_FREE)) |
558 | continue; | 569 | continue; |
570 | if (inode->i_state & I_DIRTY && !kill_dirty) { | ||
571 | busy = 1; | ||
572 | continue; | ||
573 | } | ||
559 | if (atomic_read(&inode->i_count)) { | 574 | if (atomic_read(&inode->i_count)) { |
560 | busy = 1; | 575 | busy = 1; |
561 | continue; | 576 | continue; |
diff --git a/fs/internal.h b/fs/internal.h index 0663568b1247..9b976b57d7fe 100644 --- a/fs/internal.h +++ b/fs/internal.h | |||
@@ -112,4 +112,4 @@ extern void release_open_intent(struct nameidata *); | |||
112 | */ | 112 | */ |
113 | extern int get_nr_dirty_inodes(void); | 113 | extern int get_nr_dirty_inodes(void); |
114 | extern void evict_inodes(struct super_block *); | 114 | extern void evict_inodes(struct super_block *); |
115 | extern int invalidate_inodes(struct super_block *); | 115 | extern int invalidate_inodes(struct super_block *, bool); |
diff --git a/fs/minix/namei.c b/fs/minix/namei.c index ce7337ddfdbf..6e6777f1b4b2 100644 --- a/fs/minix/namei.c +++ b/fs/minix/namei.c | |||
@@ -213,7 +213,6 @@ static int minix_rename(struct inode * old_dir, struct dentry *old_dentry, | |||
213 | new_de = minix_find_entry(new_dentry, &new_page); | 213 | new_de = minix_find_entry(new_dentry, &new_page); |
214 | if (!new_de) | 214 | if (!new_de) |
215 | goto out_dir; | 215 | goto out_dir; |
216 | inode_inc_link_count(old_inode); | ||
217 | minix_set_link(new_de, new_page, old_inode); | 216 | minix_set_link(new_de, new_page, old_inode); |
218 | new_inode->i_ctime = CURRENT_TIME_SEC; | 217 | new_inode->i_ctime = CURRENT_TIME_SEC; |
219 | if (dir_de) | 218 | if (dir_de) |
@@ -225,18 +224,15 @@ static int minix_rename(struct inode * old_dir, struct dentry *old_dentry, | |||
225 | if (new_dir->i_nlink >= info->s_link_max) | 224 | if (new_dir->i_nlink >= info->s_link_max) |
226 | goto out_dir; | 225 | goto out_dir; |
227 | } | 226 | } |
228 | inode_inc_link_count(old_inode); | ||
229 | err = minix_add_link(new_dentry, old_inode); | 227 | err = minix_add_link(new_dentry, old_inode); |
230 | if (err) { | 228 | if (err) |
231 | inode_dec_link_count(old_inode); | ||
232 | goto out_dir; | 229 | goto out_dir; |
233 | } | ||
234 | if (dir_de) | 230 | if (dir_de) |
235 | inode_inc_link_count(new_dir); | 231 | inode_inc_link_count(new_dir); |
236 | } | 232 | } |
237 | 233 | ||
238 | minix_delete_entry(old_de, old_page); | 234 | minix_delete_entry(old_de, old_page); |
239 | inode_dec_link_count(old_inode); | 235 | mark_inode_dirty(old_inode); |
240 | 236 | ||
241 | if (dir_de) { | 237 | if (dir_de) { |
242 | minix_set_link(dir_de, dir_page, new_dir); | 238 | minix_set_link(dir_de, dir_page, new_dir); |
diff --git a/fs/namei.c b/fs/namei.c index 9e701e28a329..0087cf9c2c6b 100644 --- a/fs/namei.c +++ b/fs/namei.c | |||
@@ -795,7 +795,7 @@ __do_follow_link(const struct path *link, struct nameidata *nd, void **p) | |||
795 | * Without that kind of total limit, nasty chains of consecutive | 795 | * Without that kind of total limit, nasty chains of consecutive |
796 | * symlinks can cause almost arbitrarily long lookups. | 796 | * symlinks can cause almost arbitrarily long lookups. |
797 | */ | 797 | */ |
798 | static inline int do_follow_link(struct path *path, struct nameidata *nd) | 798 | static inline int do_follow_link(struct inode *inode, struct path *path, struct nameidata *nd) |
799 | { | 799 | { |
800 | void *cookie; | 800 | void *cookie; |
801 | int err = -ELOOP; | 801 | int err = -ELOOP; |
@@ -803,6 +803,7 @@ static inline int do_follow_link(struct path *path, struct nameidata *nd) | |||
803 | /* We drop rcu-walk here */ | 803 | /* We drop rcu-walk here */ |
804 | if (nameidata_dentry_drop_rcu_maybe(nd, path->dentry)) | 804 | if (nameidata_dentry_drop_rcu_maybe(nd, path->dentry)) |
805 | return -ECHILD; | 805 | return -ECHILD; |
806 | BUG_ON(inode != path->dentry->d_inode); | ||
806 | 807 | ||
807 | if (current->link_count >= MAX_NESTED_LINKS) | 808 | if (current->link_count >= MAX_NESTED_LINKS) |
808 | goto loop; | 809 | goto loop; |
@@ -1413,8 +1414,7 @@ exec_again: | |||
1413 | goto out_dput; | 1414 | goto out_dput; |
1414 | 1415 | ||
1415 | if (inode->i_op->follow_link) { | 1416 | if (inode->i_op->follow_link) { |
1416 | BUG_ON(inode != next.dentry->d_inode); | 1417 | err = do_follow_link(inode, &next, nd); |
1417 | err = do_follow_link(&next, nd); | ||
1418 | if (err) | 1418 | if (err) |
1419 | goto return_err; | 1419 | goto return_err; |
1420 | nd->inode = nd->path.dentry->d_inode; | 1420 | nd->inode = nd->path.dentry->d_inode; |
@@ -1458,8 +1458,7 @@ last_component: | |||
1458 | break; | 1458 | break; |
1459 | if (inode && unlikely(inode->i_op->follow_link) && | 1459 | if (inode && unlikely(inode->i_op->follow_link) && |
1460 | (lookup_flags & LOOKUP_FOLLOW)) { | 1460 | (lookup_flags & LOOKUP_FOLLOW)) { |
1461 | BUG_ON(inode != next.dentry->d_inode); | 1461 | err = do_follow_link(inode, &next, nd); |
1462 | err = do_follow_link(&next, nd); | ||
1463 | if (err) | 1462 | if (err) |
1464 | goto return_err; | 1463 | goto return_err; |
1465 | nd->inode = nd->path.dentry->d_inode; | 1464 | nd->inode = nd->path.dentry->d_inode; |
diff --git a/fs/namespace.c b/fs/namespace.c index 7b0b95371696..d1edf26025dc 100644 --- a/fs/namespace.c +++ b/fs/namespace.c | |||
@@ -1244,7 +1244,7 @@ static int do_umount(struct vfsmount *mnt, int flags) | |||
1244 | */ | 1244 | */ |
1245 | br_write_lock(vfsmount_lock); | 1245 | br_write_lock(vfsmount_lock); |
1246 | if (mnt_get_count(mnt) != 2) { | 1246 | if (mnt_get_count(mnt) != 2) { |
1247 | br_write_lock(vfsmount_lock); | 1247 | br_write_unlock(vfsmount_lock); |
1248 | return -EBUSY; | 1248 | return -EBUSY; |
1249 | } | 1249 | } |
1250 | br_write_unlock(vfsmount_lock); | 1250 | br_write_unlock(vfsmount_lock); |
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index 78936a8f40ab..1ff76acc7e98 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c | |||
@@ -51,6 +51,7 @@ | |||
51 | #include <linux/sunrpc/bc_xprt.h> | 51 | #include <linux/sunrpc/bc_xprt.h> |
52 | #include <linux/xattr.h> | 52 | #include <linux/xattr.h> |
53 | #include <linux/utsname.h> | 53 | #include <linux/utsname.h> |
54 | #include <linux/mm.h> | ||
54 | 55 | ||
55 | #include "nfs4_fs.h" | 56 | #include "nfs4_fs.h" |
56 | #include "delegation.h" | 57 | #include "delegation.h" |
@@ -3252,6 +3253,35 @@ static void buf_to_pages(const void *buf, size_t buflen, | |||
3252 | } | 3253 | } |
3253 | } | 3254 | } |
3254 | 3255 | ||
3256 | static int buf_to_pages_noslab(const void *buf, size_t buflen, | ||
3257 | struct page **pages, unsigned int *pgbase) | ||
3258 | { | ||
3259 | struct page *newpage, **spages; | ||
3260 | int rc = 0; | ||
3261 | size_t len; | ||
3262 | spages = pages; | ||
3263 | |||
3264 | do { | ||
3265 | len = min(PAGE_CACHE_SIZE, buflen); | ||
3266 | newpage = alloc_page(GFP_KERNEL); | ||
3267 | |||
3268 | if (newpage == NULL) | ||
3269 | goto unwind; | ||
3270 | memcpy(page_address(newpage), buf, len); | ||
3271 | buf += len; | ||
3272 | buflen -= len; | ||
3273 | *pages++ = newpage; | ||
3274 | rc++; | ||
3275 | } while (buflen != 0); | ||
3276 | |||
3277 | return rc; | ||
3278 | |||
3279 | unwind: | ||
3280 | for(; rc > 0; rc--) | ||
3281 | __free_page(spages[rc-1]); | ||
3282 | return -ENOMEM; | ||
3283 | } | ||
3284 | |||
3255 | struct nfs4_cached_acl { | 3285 | struct nfs4_cached_acl { |
3256 | int cached; | 3286 | int cached; |
3257 | size_t len; | 3287 | size_t len; |
@@ -3420,13 +3450,23 @@ static int __nfs4_proc_set_acl(struct inode *inode, const void *buf, size_t bufl | |||
3420 | .rpc_argp = &arg, | 3450 | .rpc_argp = &arg, |
3421 | .rpc_resp = &res, | 3451 | .rpc_resp = &res, |
3422 | }; | 3452 | }; |
3423 | int ret; | 3453 | int ret, i; |
3424 | 3454 | ||
3425 | if (!nfs4_server_supports_acls(server)) | 3455 | if (!nfs4_server_supports_acls(server)) |
3426 | return -EOPNOTSUPP; | 3456 | return -EOPNOTSUPP; |
3457 | i = buf_to_pages_noslab(buf, buflen, arg.acl_pages, &arg.acl_pgbase); | ||
3458 | if (i < 0) | ||
3459 | return i; | ||
3427 | nfs_inode_return_delegation(inode); | 3460 | nfs_inode_return_delegation(inode); |
3428 | buf_to_pages(buf, buflen, arg.acl_pages, &arg.acl_pgbase); | ||
3429 | ret = nfs4_call_sync(server, &msg, &arg, &res, 1); | 3461 | ret = nfs4_call_sync(server, &msg, &arg, &res, 1); |
3462 | |||
3463 | /* | ||
3464 | * Free each page after tx, so the only ref left is | ||
3465 | * held by the network stack | ||
3466 | */ | ||
3467 | for (; i > 0; i--) | ||
3468 | put_page(pages[i-1]); | ||
3469 | |||
3430 | /* | 3470 | /* |
3431 | * Acl update can result in inode attribute update. | 3471 | * Acl update can result in inode attribute update. |
3432 | * so mark the attribute cache invalid. | 3472 | * so mark the attribute cache invalid. |
diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c index 956629b9cdc9..1275b8655070 100644 --- a/fs/nfsd/nfs4xdr.c +++ b/fs/nfsd/nfs4xdr.c | |||
@@ -317,8 +317,8 @@ nfsd4_decode_fattr(struct nfsd4_compoundargs *argp, u32 *bmval, | |||
317 | READ_BUF(dummy32); | 317 | READ_BUF(dummy32); |
318 | len += (XDR_QUADLEN(dummy32) << 2); | 318 | len += (XDR_QUADLEN(dummy32) << 2); |
319 | READMEM(buf, dummy32); | 319 | READMEM(buf, dummy32); |
320 | if ((host_err = nfsd_map_name_to_uid(argp->rqstp, buf, dummy32, &iattr->ia_uid))) | 320 | if ((status = nfsd_map_name_to_uid(argp->rqstp, buf, dummy32, &iattr->ia_uid))) |
321 | goto out_nfserr; | 321 | return status; |
322 | iattr->ia_valid |= ATTR_UID; | 322 | iattr->ia_valid |= ATTR_UID; |
323 | } | 323 | } |
324 | if (bmval[1] & FATTR4_WORD1_OWNER_GROUP) { | 324 | if (bmval[1] & FATTR4_WORD1_OWNER_GROUP) { |
@@ -328,8 +328,8 @@ nfsd4_decode_fattr(struct nfsd4_compoundargs *argp, u32 *bmval, | |||
328 | READ_BUF(dummy32); | 328 | READ_BUF(dummy32); |
329 | len += (XDR_QUADLEN(dummy32) << 2); | 329 | len += (XDR_QUADLEN(dummy32) << 2); |
330 | READMEM(buf, dummy32); | 330 | READMEM(buf, dummy32); |
331 | if ((host_err = nfsd_map_name_to_gid(argp->rqstp, buf, dummy32, &iattr->ia_gid))) | 331 | if ((status = nfsd_map_name_to_gid(argp->rqstp, buf, dummy32, &iattr->ia_gid))) |
332 | goto out_nfserr; | 332 | return status; |
333 | iattr->ia_valid |= ATTR_GID; | 333 | iattr->ia_valid |= ATTR_GID; |
334 | } | 334 | } |
335 | if (bmval[1] & FATTR4_WORD1_TIME_ACCESS_SET) { | 335 | if (bmval[1] & FATTR4_WORD1_TIME_ACCESS_SET) { |
diff --git a/fs/nilfs2/btnode.c b/fs/nilfs2/btnode.c index 388e9e8f5286..85f7baa15f5d 100644 --- a/fs/nilfs2/btnode.c +++ b/fs/nilfs2/btnode.c | |||
@@ -35,11 +35,6 @@ | |||
35 | #include "btnode.h" | 35 | #include "btnode.h" |
36 | 36 | ||
37 | 37 | ||
38 | void nilfs_btnode_cache_init_once(struct address_space *btnc) | ||
39 | { | ||
40 | nilfs_mapping_init_once(btnc); | ||
41 | } | ||
42 | |||
43 | static const struct address_space_operations def_btnode_aops = { | 38 | static const struct address_space_operations def_btnode_aops = { |
44 | .sync_page = block_sync_page, | 39 | .sync_page = block_sync_page, |
45 | }; | 40 | }; |
diff --git a/fs/nilfs2/btnode.h b/fs/nilfs2/btnode.h index 79037494f1e0..1b8ebd888c28 100644 --- a/fs/nilfs2/btnode.h +++ b/fs/nilfs2/btnode.h | |||
@@ -37,7 +37,6 @@ struct nilfs_btnode_chkey_ctxt { | |||
37 | struct buffer_head *newbh; | 37 | struct buffer_head *newbh; |
38 | }; | 38 | }; |
39 | 39 | ||
40 | void nilfs_btnode_cache_init_once(struct address_space *); | ||
41 | void nilfs_btnode_cache_init(struct address_space *, struct backing_dev_info *); | 40 | void nilfs_btnode_cache_init(struct address_space *, struct backing_dev_info *); |
42 | void nilfs_btnode_cache_clear(struct address_space *); | 41 | void nilfs_btnode_cache_clear(struct address_space *); |
43 | struct buffer_head *nilfs_btnode_create_block(struct address_space *btnc, | 42 | struct buffer_head *nilfs_btnode_create_block(struct address_space *btnc, |
diff --git a/fs/nilfs2/mdt.c b/fs/nilfs2/mdt.c index 6a0e2a189f60..a0babd2bff6a 100644 --- a/fs/nilfs2/mdt.c +++ b/fs/nilfs2/mdt.c | |||
@@ -454,9 +454,9 @@ int nilfs_mdt_setup_shadow_map(struct inode *inode, | |||
454 | struct backing_dev_info *bdi = inode->i_sb->s_bdi; | 454 | struct backing_dev_info *bdi = inode->i_sb->s_bdi; |
455 | 455 | ||
456 | INIT_LIST_HEAD(&shadow->frozen_buffers); | 456 | INIT_LIST_HEAD(&shadow->frozen_buffers); |
457 | nilfs_mapping_init_once(&shadow->frozen_data); | 457 | address_space_init_once(&shadow->frozen_data); |
458 | nilfs_mapping_init(&shadow->frozen_data, bdi, &shadow_map_aops); | 458 | nilfs_mapping_init(&shadow->frozen_data, bdi, &shadow_map_aops); |
459 | nilfs_mapping_init_once(&shadow->frozen_btnodes); | 459 | address_space_init_once(&shadow->frozen_btnodes); |
460 | nilfs_mapping_init(&shadow->frozen_btnodes, bdi, &shadow_map_aops); | 460 | nilfs_mapping_init(&shadow->frozen_btnodes, bdi, &shadow_map_aops); |
461 | mi->mi_shadow = shadow; | 461 | mi->mi_shadow = shadow; |
462 | return 0; | 462 | return 0; |
diff --git a/fs/nilfs2/namei.c b/fs/nilfs2/namei.c index 98034271cd02..161791d26458 100644 --- a/fs/nilfs2/namei.c +++ b/fs/nilfs2/namei.c | |||
@@ -397,7 +397,6 @@ static int nilfs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
397 | new_de = nilfs_find_entry(new_dir, &new_dentry->d_name, &new_page); | 397 | new_de = nilfs_find_entry(new_dir, &new_dentry->d_name, &new_page); |
398 | if (!new_de) | 398 | if (!new_de) |
399 | goto out_dir; | 399 | goto out_dir; |
400 | inc_nlink(old_inode); | ||
401 | nilfs_set_link(new_dir, new_de, new_page, old_inode); | 400 | nilfs_set_link(new_dir, new_de, new_page, old_inode); |
402 | nilfs_mark_inode_dirty(new_dir); | 401 | nilfs_mark_inode_dirty(new_dir); |
403 | new_inode->i_ctime = CURRENT_TIME; | 402 | new_inode->i_ctime = CURRENT_TIME; |
@@ -411,13 +410,9 @@ static int nilfs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
411 | if (new_dir->i_nlink >= NILFS_LINK_MAX) | 410 | if (new_dir->i_nlink >= NILFS_LINK_MAX) |
412 | goto out_dir; | 411 | goto out_dir; |
413 | } | 412 | } |
414 | inc_nlink(old_inode); | ||
415 | err = nilfs_add_link(new_dentry, old_inode); | 413 | err = nilfs_add_link(new_dentry, old_inode); |
416 | if (err) { | 414 | if (err) |
417 | drop_nlink(old_inode); | ||
418 | nilfs_mark_inode_dirty(old_inode); | ||
419 | goto out_dir; | 415 | goto out_dir; |
420 | } | ||
421 | if (dir_de) { | 416 | if (dir_de) { |
422 | inc_nlink(new_dir); | 417 | inc_nlink(new_dir); |
423 | nilfs_mark_inode_dirty(new_dir); | 418 | nilfs_mark_inode_dirty(new_dir); |
@@ -431,7 +426,6 @@ static int nilfs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
431 | old_inode->i_ctime = CURRENT_TIME; | 426 | old_inode->i_ctime = CURRENT_TIME; |
432 | 427 | ||
433 | nilfs_delete_entry(old_de, old_page); | 428 | nilfs_delete_entry(old_de, old_page); |
434 | drop_nlink(old_inode); | ||
435 | 429 | ||
436 | if (dir_de) { | 430 | if (dir_de) { |
437 | nilfs_set_link(old_inode, dir_de, dir_page, new_dir); | 431 | nilfs_set_link(old_inode, dir_de, dir_page, new_dir); |
diff --git a/fs/nilfs2/page.c b/fs/nilfs2/page.c index 0c432416cfef..a585b35fd6bc 100644 --- a/fs/nilfs2/page.c +++ b/fs/nilfs2/page.c | |||
@@ -492,19 +492,6 @@ unsigned nilfs_page_count_clean_buffers(struct page *page, | |||
492 | return nc; | 492 | return nc; |
493 | } | 493 | } |
494 | 494 | ||
495 | void nilfs_mapping_init_once(struct address_space *mapping) | ||
496 | { | ||
497 | memset(mapping, 0, sizeof(*mapping)); | ||
498 | INIT_RADIX_TREE(&mapping->page_tree, GFP_ATOMIC); | ||
499 | spin_lock_init(&mapping->tree_lock); | ||
500 | INIT_LIST_HEAD(&mapping->private_list); | ||
501 | spin_lock_init(&mapping->private_lock); | ||
502 | |||
503 | spin_lock_init(&mapping->i_mmap_lock); | ||
504 | INIT_RAW_PRIO_TREE_ROOT(&mapping->i_mmap); | ||
505 | INIT_LIST_HEAD(&mapping->i_mmap_nonlinear); | ||
506 | } | ||
507 | |||
508 | void nilfs_mapping_init(struct address_space *mapping, | 495 | void nilfs_mapping_init(struct address_space *mapping, |
509 | struct backing_dev_info *bdi, | 496 | struct backing_dev_info *bdi, |
510 | const struct address_space_operations *aops) | 497 | const struct address_space_operations *aops) |
diff --git a/fs/nilfs2/page.h b/fs/nilfs2/page.h index 622df27cd891..2a00953ebd5f 100644 --- a/fs/nilfs2/page.h +++ b/fs/nilfs2/page.h | |||
@@ -61,7 +61,6 @@ void nilfs_free_private_page(struct page *); | |||
61 | int nilfs_copy_dirty_pages(struct address_space *, struct address_space *); | 61 | int nilfs_copy_dirty_pages(struct address_space *, struct address_space *); |
62 | void nilfs_copy_back_pages(struct address_space *, struct address_space *); | 62 | void nilfs_copy_back_pages(struct address_space *, struct address_space *); |
63 | void nilfs_clear_dirty_pages(struct address_space *); | 63 | void nilfs_clear_dirty_pages(struct address_space *); |
64 | void nilfs_mapping_init_once(struct address_space *mapping); | ||
65 | void nilfs_mapping_init(struct address_space *mapping, | 64 | void nilfs_mapping_init(struct address_space *mapping, |
66 | struct backing_dev_info *bdi, | 65 | struct backing_dev_info *bdi, |
67 | const struct address_space_operations *aops); | 66 | const struct address_space_operations *aops); |
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c index 55ebae5c7f39..2de9f636792a 100644 --- a/fs/nilfs2/segment.c +++ b/fs/nilfs2/segment.c | |||
@@ -430,7 +430,8 @@ static void nilfs_segctor_begin_finfo(struct nilfs_sc_info *sci, | |||
430 | nilfs_segctor_map_segsum_entry( | 430 | nilfs_segctor_map_segsum_entry( |
431 | sci, &sci->sc_binfo_ptr, sizeof(struct nilfs_finfo)); | 431 | sci, &sci->sc_binfo_ptr, sizeof(struct nilfs_finfo)); |
432 | 432 | ||
433 | if (inode->i_sb && !test_bit(NILFS_SC_HAVE_DELTA, &sci->sc_flags)) | 433 | if (NILFS_I(inode)->i_root && |
434 | !test_bit(NILFS_SC_HAVE_DELTA, &sci->sc_flags)) | ||
434 | set_bit(NILFS_SC_HAVE_DELTA, &sci->sc_flags); | 435 | set_bit(NILFS_SC_HAVE_DELTA, &sci->sc_flags); |
435 | /* skip finfo */ | 436 | /* skip finfo */ |
436 | } | 437 | } |
diff --git a/fs/nilfs2/super.c b/fs/nilfs2/super.c index 58fd707174e1..1673b3d99842 100644 --- a/fs/nilfs2/super.c +++ b/fs/nilfs2/super.c | |||
@@ -1279,7 +1279,7 @@ static void nilfs_inode_init_once(void *obj) | |||
1279 | #ifdef CONFIG_NILFS_XATTR | 1279 | #ifdef CONFIG_NILFS_XATTR |
1280 | init_rwsem(&ii->xattr_sem); | 1280 | init_rwsem(&ii->xattr_sem); |
1281 | #endif | 1281 | #endif |
1282 | nilfs_btnode_cache_init_once(&ii->i_btnode_cache); | 1282 | address_space_init_once(&ii->i_btnode_cache); |
1283 | ii->i_bmap = &ii->i_bmap_data; | 1283 | ii->i_bmap = &ii->i_bmap_data; |
1284 | inode_init_once(&ii->vfs_inode); | 1284 | inode_init_once(&ii->vfs_inode); |
1285 | } | 1285 | } |
diff --git a/fs/ocfs2/journal.h b/fs/ocfs2/journal.h index 43e56b97f9c0..6180da1e37e6 100644 --- a/fs/ocfs2/journal.h +++ b/fs/ocfs2/journal.h | |||
@@ -405,9 +405,9 @@ static inline int ocfs2_remove_extent_credits(struct super_block *sb) | |||
405 | ocfs2_quota_trans_credits(sb); | 405 | ocfs2_quota_trans_credits(sb); |
406 | } | 406 | } |
407 | 407 | ||
408 | /* data block for new dir/symlink, 2 for bitmap updates (bitmap fe + | 408 | /* data block for new dir/symlink, allocation of directory block, dx_root |
409 | * bitmap block for the new bit) dx_root update for free list */ | 409 | * update for free list */ |
410 | #define OCFS2_DIR_LINK_ADDITIONAL_CREDITS (1 + 2 + 1) | 410 | #define OCFS2_DIR_LINK_ADDITIONAL_CREDITS (1 + OCFS2_SUBALLOC_ALLOC + 1) |
411 | 411 | ||
412 | static inline int ocfs2_add_dir_index_credits(struct super_block *sb) | 412 | static inline int ocfs2_add_dir_index_credits(struct super_block *sb) |
413 | { | 413 | { |
diff --git a/fs/ocfs2/refcounttree.c b/fs/ocfs2/refcounttree.c index b5f9160e93e9..19ebc5aad391 100644 --- a/fs/ocfs2/refcounttree.c +++ b/fs/ocfs2/refcounttree.c | |||
@@ -3228,7 +3228,7 @@ static int ocfs2_make_clusters_writable(struct super_block *sb, | |||
3228 | u32 num_clusters, unsigned int e_flags) | 3228 | u32 num_clusters, unsigned int e_flags) |
3229 | { | 3229 | { |
3230 | int ret, delete, index, credits = 0; | 3230 | int ret, delete, index, credits = 0; |
3231 | u32 new_bit, new_len; | 3231 | u32 new_bit, new_len, orig_num_clusters; |
3232 | unsigned int set_len; | 3232 | unsigned int set_len; |
3233 | struct ocfs2_super *osb = OCFS2_SB(sb); | 3233 | struct ocfs2_super *osb = OCFS2_SB(sb); |
3234 | handle_t *handle; | 3234 | handle_t *handle; |
@@ -3261,6 +3261,8 @@ static int ocfs2_make_clusters_writable(struct super_block *sb, | |||
3261 | goto out; | 3261 | goto out; |
3262 | } | 3262 | } |
3263 | 3263 | ||
3264 | orig_num_clusters = num_clusters; | ||
3265 | |||
3264 | while (num_clusters) { | 3266 | while (num_clusters) { |
3265 | ret = ocfs2_get_refcount_rec(ref_ci, context->ref_root_bh, | 3267 | ret = ocfs2_get_refcount_rec(ref_ci, context->ref_root_bh, |
3266 | p_cluster, num_clusters, | 3268 | p_cluster, num_clusters, |
@@ -3348,7 +3350,8 @@ static int ocfs2_make_clusters_writable(struct super_block *sb, | |||
3348 | * in write-back mode. | 3350 | * in write-back mode. |
3349 | */ | 3351 | */ |
3350 | if (context->get_clusters == ocfs2_di_get_clusters) { | 3352 | if (context->get_clusters == ocfs2_di_get_clusters) { |
3351 | ret = ocfs2_cow_sync_writeback(sb, context, cpos, num_clusters); | 3353 | ret = ocfs2_cow_sync_writeback(sb, context, cpos, |
3354 | orig_num_clusters); | ||
3352 | if (ret) | 3355 | if (ret) |
3353 | mlog_errno(ret); | 3356 | mlog_errno(ret); |
3354 | } | 3357 | } |
diff --git a/fs/ocfs2/super.c b/fs/ocfs2/super.c index 38f986d2447e..36c423fb0635 100644 --- a/fs/ocfs2/super.c +++ b/fs/ocfs2/super.c | |||
@@ -1316,7 +1316,7 @@ static int ocfs2_parse_options(struct super_block *sb, | |||
1316 | struct mount_options *mopt, | 1316 | struct mount_options *mopt, |
1317 | int is_remount) | 1317 | int is_remount) |
1318 | { | 1318 | { |
1319 | int status; | 1319 | int status, user_stack = 0; |
1320 | char *p; | 1320 | char *p; |
1321 | u32 tmp; | 1321 | u32 tmp; |
1322 | 1322 | ||
@@ -1459,6 +1459,15 @@ static int ocfs2_parse_options(struct super_block *sb, | |||
1459 | memcpy(mopt->cluster_stack, args[0].from, | 1459 | memcpy(mopt->cluster_stack, args[0].from, |
1460 | OCFS2_STACK_LABEL_LEN); | 1460 | OCFS2_STACK_LABEL_LEN); |
1461 | mopt->cluster_stack[OCFS2_STACK_LABEL_LEN] = '\0'; | 1461 | mopt->cluster_stack[OCFS2_STACK_LABEL_LEN] = '\0'; |
1462 | /* | ||
1463 | * Open code the memcmp here as we don't have | ||
1464 | * an osb to pass to | ||
1465 | * ocfs2_userspace_stack(). | ||
1466 | */ | ||
1467 | if (memcmp(mopt->cluster_stack, | ||
1468 | OCFS2_CLASSIC_CLUSTER_STACK, | ||
1469 | OCFS2_STACK_LABEL_LEN)) | ||
1470 | user_stack = 1; | ||
1462 | break; | 1471 | break; |
1463 | case Opt_inode64: | 1472 | case Opt_inode64: |
1464 | mopt->mount_opt |= OCFS2_MOUNT_INODE64; | 1473 | mopt->mount_opt |= OCFS2_MOUNT_INODE64; |
@@ -1514,13 +1523,16 @@ static int ocfs2_parse_options(struct super_block *sb, | |||
1514 | } | 1523 | } |
1515 | } | 1524 | } |
1516 | 1525 | ||
1517 | /* Ensure only one heartbeat mode */ | 1526 | if (user_stack == 0) { |
1518 | tmp = mopt->mount_opt & (OCFS2_MOUNT_HB_LOCAL | OCFS2_MOUNT_HB_GLOBAL | | 1527 | /* Ensure only one heartbeat mode */ |
1519 | OCFS2_MOUNT_HB_NONE); | 1528 | tmp = mopt->mount_opt & (OCFS2_MOUNT_HB_LOCAL | |
1520 | if (hweight32(tmp) != 1) { | 1529 | OCFS2_MOUNT_HB_GLOBAL | |
1521 | mlog(ML_ERROR, "Invalid heartbeat mount options\n"); | 1530 | OCFS2_MOUNT_HB_NONE); |
1522 | status = 0; | 1531 | if (hweight32(tmp) != 1) { |
1523 | goto bail; | 1532 | mlog(ML_ERROR, "Invalid heartbeat mount options\n"); |
1533 | status = 0; | ||
1534 | goto bail; | ||
1535 | } | ||
1524 | } | 1536 | } |
1525 | 1537 | ||
1526 | status = 1; | 1538 | status = 1; |
diff --git a/fs/partitions/ldm.c b/fs/partitions/ldm.c index 789c625c7aa5..b10e3540d5b7 100644 --- a/fs/partitions/ldm.c +++ b/fs/partitions/ldm.c | |||
@@ -251,6 +251,11 @@ static bool ldm_parse_vmdb (const u8 *data, struct vmdb *vm) | |||
251 | } | 251 | } |
252 | 252 | ||
253 | vm->vblk_size = get_unaligned_be32(data + 0x08); | 253 | vm->vblk_size = get_unaligned_be32(data + 0x08); |
254 | if (vm->vblk_size == 0) { | ||
255 | ldm_error ("Illegal VBLK size"); | ||
256 | return false; | ||
257 | } | ||
258 | |||
254 | vm->vblk_offset = get_unaligned_be32(data + 0x0C); | 259 | vm->vblk_offset = get_unaligned_be32(data + 0x0C); |
255 | vm->last_vblk_seq = get_unaligned_be32(data + 0x04); | 260 | vm->last_vblk_seq = get_unaligned_be32(data + 0x04); |
256 | 261 | ||
diff --git a/fs/partitions/mac.c b/fs/partitions/mac.c index 68d6a216ee79..11f688bd76c5 100644 --- a/fs/partitions/mac.c +++ b/fs/partitions/mac.c | |||
@@ -29,10 +29,9 @@ static inline void mac_fix_string(char *stg, int len) | |||
29 | 29 | ||
30 | int mac_partition(struct parsed_partitions *state) | 30 | int mac_partition(struct parsed_partitions *state) |
31 | { | 31 | { |
32 | int slot = 1; | ||
33 | Sector sect; | 32 | Sector sect; |
34 | unsigned char *data; | 33 | unsigned char *data; |
35 | int blk, blocks_in_map; | 34 | int slot, blocks_in_map; |
36 | unsigned secsize; | 35 | unsigned secsize; |
37 | #ifdef CONFIG_PPC_PMAC | 36 | #ifdef CONFIG_PPC_PMAC |
38 | int found_root = 0; | 37 | int found_root = 0; |
@@ -59,10 +58,14 @@ int mac_partition(struct parsed_partitions *state) | |||
59 | put_dev_sector(sect); | 58 | put_dev_sector(sect); |
60 | return 0; /* not a MacOS disk */ | 59 | return 0; /* not a MacOS disk */ |
61 | } | 60 | } |
62 | strlcat(state->pp_buf, " [mac]", PAGE_SIZE); | ||
63 | blocks_in_map = be32_to_cpu(part->map_count); | 61 | blocks_in_map = be32_to_cpu(part->map_count); |
64 | for (blk = 1; blk <= blocks_in_map; ++blk) { | 62 | if (blocks_in_map < 0 || blocks_in_map >= DISK_MAX_PARTS) { |
65 | int pos = blk * secsize; | 63 | put_dev_sector(sect); |
64 | return 0; | ||
65 | } | ||
66 | strlcat(state->pp_buf, " [mac]", PAGE_SIZE); | ||
67 | for (slot = 1; slot <= blocks_in_map; ++slot) { | ||
68 | int pos = slot * secsize; | ||
66 | put_dev_sector(sect); | 69 | put_dev_sector(sect); |
67 | data = read_part_sector(state, pos/512, §); | 70 | data = read_part_sector(state, pos/512, §); |
68 | if (!data) | 71 | if (!data) |
@@ -113,13 +116,11 @@ int mac_partition(struct parsed_partitions *state) | |||
113 | } | 116 | } |
114 | 117 | ||
115 | if (goodness > found_root_goodness) { | 118 | if (goodness > found_root_goodness) { |
116 | found_root = blk; | 119 | found_root = slot; |
117 | found_root_goodness = goodness; | 120 | found_root_goodness = goodness; |
118 | } | 121 | } |
119 | } | 122 | } |
120 | #endif /* CONFIG_PPC_PMAC */ | 123 | #endif /* CONFIG_PPC_PMAC */ |
121 | |||
122 | ++slot; | ||
123 | } | 124 | } |
124 | #ifdef CONFIG_PPC_PMAC | 125 | #ifdef CONFIG_PPC_PMAC |
125 | if (found_root_goodness) | 126 | if (found_root_goodness) |
diff --git a/fs/proc/proc_devtree.c b/fs/proc/proc_devtree.c index d9396a4fc7ff..927cbd115e53 100644 --- a/fs/proc/proc_devtree.c +++ b/fs/proc/proc_devtree.c | |||
@@ -233,7 +233,7 @@ void __init proc_device_tree_init(void) | |||
233 | return; | 233 | return; |
234 | root = of_find_node_by_path("/"); | 234 | root = of_find_node_by_path("/"); |
235 | if (root == NULL) { | 235 | if (root == NULL) { |
236 | printk(KERN_ERR "/proc/device-tree: can't find root\n"); | 236 | pr_debug("/proc/device-tree: can't find root\n"); |
237 | return; | 237 | return; |
238 | } | 238 | } |
239 | proc_device_tree_add_node(root, proc_device_tree); | 239 | proc_device_tree_add_node(root, proc_device_tree); |
diff --git a/fs/reiserfs/namei.c b/fs/reiserfs/namei.c index ba5f51ec3458..68fdf45cc6c9 100644 --- a/fs/reiserfs/namei.c +++ b/fs/reiserfs/namei.c | |||
@@ -771,7 +771,7 @@ static int reiserfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) | |||
771 | EMPTY_DIR_SIZE_V1 : EMPTY_DIR_SIZE, | 771 | EMPTY_DIR_SIZE_V1 : EMPTY_DIR_SIZE, |
772 | dentry, inode, &security); | 772 | dentry, inode, &security); |
773 | if (retval) { | 773 | if (retval) { |
774 | dir->i_nlink--; | 774 | DEC_DIR_INODE_NLINK(dir) |
775 | goto out_failed; | 775 | goto out_failed; |
776 | } | 776 | } |
777 | 777 | ||
diff --git a/fs/sysv/namei.c b/fs/sysv/namei.c index b427b1208c26..e474fbcf8bde 100644 --- a/fs/sysv/namei.c +++ b/fs/sysv/namei.c | |||
@@ -245,7 +245,6 @@ static int sysv_rename(struct inode * old_dir, struct dentry * old_dentry, | |||
245 | new_de = sysv_find_entry(new_dentry, &new_page); | 245 | new_de = sysv_find_entry(new_dentry, &new_page); |
246 | if (!new_de) | 246 | if (!new_de) |
247 | goto out_dir; | 247 | goto out_dir; |
248 | inode_inc_link_count(old_inode); | ||
249 | sysv_set_link(new_de, new_page, old_inode); | 248 | sysv_set_link(new_de, new_page, old_inode); |
250 | new_inode->i_ctime = CURRENT_TIME_SEC; | 249 | new_inode->i_ctime = CURRENT_TIME_SEC; |
251 | if (dir_de) | 250 | if (dir_de) |
@@ -257,18 +256,15 @@ static int sysv_rename(struct inode * old_dir, struct dentry * old_dentry, | |||
257 | if (new_dir->i_nlink >= SYSV_SB(new_dir->i_sb)->s_link_max) | 256 | if (new_dir->i_nlink >= SYSV_SB(new_dir->i_sb)->s_link_max) |
258 | goto out_dir; | 257 | goto out_dir; |
259 | } | 258 | } |
260 | inode_inc_link_count(old_inode); | ||
261 | err = sysv_add_link(new_dentry, old_inode); | 259 | err = sysv_add_link(new_dentry, old_inode); |
262 | if (err) { | 260 | if (err) |
263 | inode_dec_link_count(old_inode); | ||
264 | goto out_dir; | 261 | goto out_dir; |
265 | } | ||
266 | if (dir_de) | 262 | if (dir_de) |
267 | inode_inc_link_count(new_dir); | 263 | inode_inc_link_count(new_dir); |
268 | } | 264 | } |
269 | 265 | ||
270 | sysv_delete_entry(old_de, old_page); | 266 | sysv_delete_entry(old_de, old_page); |
271 | inode_dec_link_count(old_inode); | 267 | mark_inode_dirty(old_inode); |
272 | 268 | ||
273 | if (dir_de) { | 269 | if (dir_de) { |
274 | sysv_set_link(dir_de, dir_page, new_dir); | 270 | sysv_set_link(dir_de, dir_page, new_dir); |
diff --git a/fs/udf/namei.c b/fs/udf/namei.c index 2be0f9eb86d2..b7c338d5e9df 100644 --- a/fs/udf/namei.c +++ b/fs/udf/namei.c | |||
@@ -32,6 +32,8 @@ | |||
32 | #include <linux/crc-itu-t.h> | 32 | #include <linux/crc-itu-t.h> |
33 | #include <linux/exportfs.h> | 33 | #include <linux/exportfs.h> |
34 | 34 | ||
35 | enum { UDF_MAX_LINKS = 0xffff }; | ||
36 | |||
35 | static inline int udf_match(int len1, const unsigned char *name1, int len2, | 37 | static inline int udf_match(int len1, const unsigned char *name1, int len2, |
36 | const unsigned char *name2) | 38 | const unsigned char *name2) |
37 | { | 39 | { |
@@ -650,7 +652,7 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, int mode) | |||
650 | struct udf_inode_info *iinfo; | 652 | struct udf_inode_info *iinfo; |
651 | 653 | ||
652 | err = -EMLINK; | 654 | err = -EMLINK; |
653 | if (dir->i_nlink >= (256 << sizeof(dir->i_nlink)) - 1) | 655 | if (dir->i_nlink >= UDF_MAX_LINKS) |
654 | goto out; | 656 | goto out; |
655 | 657 | ||
656 | err = -EIO; | 658 | err = -EIO; |
@@ -1034,9 +1036,8 @@ static int udf_link(struct dentry *old_dentry, struct inode *dir, | |||
1034 | struct fileIdentDesc cfi, *fi; | 1036 | struct fileIdentDesc cfi, *fi; |
1035 | int err; | 1037 | int err; |
1036 | 1038 | ||
1037 | if (inode->i_nlink >= (256 << sizeof(inode->i_nlink)) - 1) { | 1039 | if (inode->i_nlink >= UDF_MAX_LINKS) |
1038 | return -EMLINK; | 1040 | return -EMLINK; |
1039 | } | ||
1040 | 1041 | ||
1041 | fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err); | 1042 | fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err); |
1042 | if (!fi) { | 1043 | if (!fi) { |
@@ -1131,9 +1132,7 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
1131 | goto end_rename; | 1132 | goto end_rename; |
1132 | 1133 | ||
1133 | retval = -EMLINK; | 1134 | retval = -EMLINK; |
1134 | if (!new_inode && | 1135 | if (!new_inode && new_dir->i_nlink >= UDF_MAX_LINKS) |
1135 | new_dir->i_nlink >= | ||
1136 | (256 << sizeof(new_dir->i_nlink)) - 1) | ||
1137 | goto end_rename; | 1136 | goto end_rename; |
1138 | } | 1137 | } |
1139 | if (!nfi) { | 1138 | if (!nfi) { |
diff --git a/fs/ufs/namei.c b/fs/ufs/namei.c index 12f39b9e4437..d6f681535eb8 100644 --- a/fs/ufs/namei.c +++ b/fs/ufs/namei.c | |||
@@ -306,7 +306,6 @@ static int ufs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
306 | new_de = ufs_find_entry(new_dir, &new_dentry->d_name, &new_page); | 306 | new_de = ufs_find_entry(new_dir, &new_dentry->d_name, &new_page); |
307 | if (!new_de) | 307 | if (!new_de) |
308 | goto out_dir; | 308 | goto out_dir; |
309 | inode_inc_link_count(old_inode); | ||
310 | ufs_set_link(new_dir, new_de, new_page, old_inode); | 309 | ufs_set_link(new_dir, new_de, new_page, old_inode); |
311 | new_inode->i_ctime = CURRENT_TIME_SEC; | 310 | new_inode->i_ctime = CURRENT_TIME_SEC; |
312 | if (dir_de) | 311 | if (dir_de) |
@@ -318,12 +317,9 @@ static int ufs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
318 | if (new_dir->i_nlink >= UFS_LINK_MAX) | 317 | if (new_dir->i_nlink >= UFS_LINK_MAX) |
319 | goto out_dir; | 318 | goto out_dir; |
320 | } | 319 | } |
321 | inode_inc_link_count(old_inode); | ||
322 | err = ufs_add_link(new_dentry, old_inode); | 320 | err = ufs_add_link(new_dentry, old_inode); |
323 | if (err) { | 321 | if (err) |
324 | inode_dec_link_count(old_inode); | ||
325 | goto out_dir; | 322 | goto out_dir; |
326 | } | ||
327 | if (dir_de) | 323 | if (dir_de) |
328 | inode_inc_link_count(new_dir); | 324 | inode_inc_link_count(new_dir); |
329 | } | 325 | } |
@@ -331,12 +327,11 @@ static int ufs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
331 | /* | 327 | /* |
332 | * Like most other Unix systems, set the ctime for inodes on a | 328 | * Like most other Unix systems, set the ctime for inodes on a |
333 | * rename. | 329 | * rename. |
334 | * inode_dec_link_count() will mark the inode dirty. | ||
335 | */ | 330 | */ |
336 | old_inode->i_ctime = CURRENT_TIME_SEC; | 331 | old_inode->i_ctime = CURRENT_TIME_SEC; |
337 | 332 | ||
338 | ufs_delete_entry(old_dir, old_de, old_page); | 333 | ufs_delete_entry(old_dir, old_de, old_page); |
339 | inode_dec_link_count(old_inode); | 334 | mark_inode_dirty(old_inode); |
340 | 335 | ||
341 | if (dir_de) { | 336 | if (dir_de) { |
342 | ufs_set_link(old_inode, dir_de, dir_page, new_dir); | 337 | ufs_set_link(old_inode, dir_de, dir_page, new_dir); |
diff --git a/fs/xfs/linux-2.6/xfs_discard.c b/fs/xfs/linux-2.6/xfs_discard.c index 05201ae719e5..d61611c88012 100644 --- a/fs/xfs/linux-2.6/xfs_discard.c +++ b/fs/xfs/linux-2.6/xfs_discard.c | |||
@@ -152,6 +152,8 @@ xfs_ioc_trim( | |||
152 | 152 | ||
153 | if (!capable(CAP_SYS_ADMIN)) | 153 | if (!capable(CAP_SYS_ADMIN)) |
154 | return -XFS_ERROR(EPERM); | 154 | return -XFS_ERROR(EPERM); |
155 | if (!blk_queue_discard(q)) | ||
156 | return -XFS_ERROR(EOPNOTSUPP); | ||
155 | if (copy_from_user(&range, urange, sizeof(range))) | 157 | if (copy_from_user(&range, urange, sizeof(range))) |
156 | return -XFS_ERROR(EFAULT); | 158 | return -XFS_ERROR(EFAULT); |
157 | 159 | ||
diff --git a/fs/xfs/linux-2.6/xfs_ioctl.c b/fs/xfs/linux-2.6/xfs_ioctl.c index f5e2a19e0f8e..0ca0e3c024d7 100644 --- a/fs/xfs/linux-2.6/xfs_ioctl.c +++ b/fs/xfs/linux-2.6/xfs_ioctl.c | |||
@@ -695,14 +695,19 @@ xfs_ioc_fsgeometry_v1( | |||
695 | xfs_mount_t *mp, | 695 | xfs_mount_t *mp, |
696 | void __user *arg) | 696 | void __user *arg) |
697 | { | 697 | { |
698 | xfs_fsop_geom_v1_t fsgeo; | 698 | xfs_fsop_geom_t fsgeo; |
699 | int error; | 699 | int error; |
700 | 700 | ||
701 | error = xfs_fs_geometry(mp, (xfs_fsop_geom_t *)&fsgeo, 3); | 701 | error = xfs_fs_geometry(mp, &fsgeo, 3); |
702 | if (error) | 702 | if (error) |
703 | return -error; | 703 | return -error; |
704 | 704 | ||
705 | if (copy_to_user(arg, &fsgeo, sizeof(fsgeo))) | 705 | /* |
706 | * Caller should have passed an argument of type | ||
707 | * xfs_fsop_geom_v1_t. This is a proper subset of the | ||
708 | * xfs_fsop_geom_t that xfs_fs_geometry() fills in. | ||
709 | */ | ||
710 | if (copy_to_user(arg, &fsgeo, sizeof(xfs_fsop_geom_v1_t))) | ||
706 | return -XFS_ERROR(EFAULT); | 711 | return -XFS_ERROR(EFAULT); |
707 | return 0; | 712 | return 0; |
708 | } | 713 | } |
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c index cec89dd5d7d2..85668efb3e3e 100644 --- a/fs/xfs/xfs_fsops.c +++ b/fs/xfs/xfs_fsops.c | |||
@@ -53,6 +53,9 @@ xfs_fs_geometry( | |||
53 | xfs_fsop_geom_t *geo, | 53 | xfs_fsop_geom_t *geo, |
54 | int new_version) | 54 | int new_version) |
55 | { | 55 | { |
56 | |||
57 | memset(geo, 0, sizeof(*geo)); | ||
58 | |||
56 | geo->blocksize = mp->m_sb.sb_blocksize; | 59 | geo->blocksize = mp->m_sb.sb_blocksize; |
57 | geo->rtextsize = mp->m_sb.sb_rextsize; | 60 | geo->rtextsize = mp->m_sb.sb_rextsize; |
58 | geo->agblocks = mp->m_sb.sb_agblocks; | 61 | geo->agblocks = mp->m_sb.sb_agblocks; |
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index 31b6188df221..b4bfe338ea0e 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h | |||
@@ -4,6 +4,8 @@ | |||
4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
5 | #ifdef CONFIG_MMU | 5 | #ifdef CONFIG_MMU |
6 | 6 | ||
7 | #include <linux/mm_types.h> | ||
8 | |||
7 | #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | 9 | #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
8 | extern int ptep_set_access_flags(struct vm_area_struct *vma, | 10 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
9 | unsigned long address, pte_t *ptep, | 11 | unsigned long address, pte_t *ptep, |
diff --git a/include/drm/drmP.h b/include/drm/drmP.h index fe29aadb129d..348843b80150 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h | |||
@@ -1101,7 +1101,7 @@ struct drm_device { | |||
1101 | struct platform_device *platformdev; /**< Platform device struture */ | 1101 | struct platform_device *platformdev; /**< Platform device struture */ |
1102 | 1102 | ||
1103 | struct drm_sg_mem *sg; /**< Scatter gather memory */ | 1103 | struct drm_sg_mem *sg; /**< Scatter gather memory */ |
1104 | int num_crtcs; /**< Number of CRTCs on this device */ | 1104 | unsigned int num_crtcs; /**< Number of CRTCs on this device */ |
1105 | void *dev_private; /**< device private data */ | 1105 | void *dev_private; /**< device private data */ |
1106 | void *mm_private; | 1106 | void *mm_private; |
1107 | struct address_space *dev_mapping; | 1107 | struct address_space *dev_mapping; |
diff --git a/include/keys/rxrpc-type.h b/include/keys/rxrpc-type.h index 5cb86c307f5d..fc4875433817 100644 --- a/include/keys/rxrpc-type.h +++ b/include/keys/rxrpc-type.h | |||
@@ -99,7 +99,6 @@ struct rxrpc_key_token { | |||
99 | * structure of raw payloads passed to add_key() or instantiate key | 99 | * structure of raw payloads passed to add_key() or instantiate key |
100 | */ | 100 | */ |
101 | struct rxrpc_key_data_v1 { | 101 | struct rxrpc_key_data_v1 { |
102 | u32 kif_version; /* 1 */ | ||
103 | u16 security_index; | 102 | u16 security_index; |
104 | u16 ticket_length; | 103 | u16 ticket_length; |
105 | u32 expiry; /* time_t */ | 104 | u32 expiry; /* time_t */ |
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 4d18ff34670a..d5063e1b5555 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h | |||
@@ -699,7 +699,7 @@ extern void blk_start_queue(struct request_queue *q); | |||
699 | extern void blk_stop_queue(struct request_queue *q); | 699 | extern void blk_stop_queue(struct request_queue *q); |
700 | extern void blk_sync_queue(struct request_queue *q); | 700 | extern void blk_sync_queue(struct request_queue *q); |
701 | extern void __blk_stop_queue(struct request_queue *q); | 701 | extern void __blk_stop_queue(struct request_queue *q); |
702 | extern void __blk_run_queue(struct request_queue *); | 702 | extern void __blk_run_queue(struct request_queue *q, bool force_kblockd); |
703 | extern void blk_run_queue(struct request_queue *); | 703 | extern void blk_run_queue(struct request_queue *); |
704 | extern int blk_rq_map_user(struct request_queue *, struct request *, | 704 | extern int blk_rq_map_user(struct request_queue *, struct request *, |
705 | struct rq_map_data *, void __user *, unsigned long, | 705 | struct rq_map_data *, void __user *, unsigned long, |
@@ -1088,7 +1088,6 @@ static inline void put_dev_sector(Sector p) | |||
1088 | 1088 | ||
1089 | struct work_struct; | 1089 | struct work_struct; |
1090 | int kblockd_schedule_work(struct request_queue *q, struct work_struct *work); | 1090 | int kblockd_schedule_work(struct request_queue *q, struct work_struct *work); |
1091 | int kblockd_schedule_delayed_work(struct request_queue *q, struct delayed_work *dwork, unsigned long delay); | ||
1092 | 1091 | ||
1093 | #ifdef CONFIG_BLK_CGROUP | 1092 | #ifdef CONFIG_BLK_CGROUP |
1094 | /* | 1093 | /* |
@@ -1136,7 +1135,6 @@ static inline uint64_t rq_io_start_time_ns(struct request *req) | |||
1136 | extern int blk_throtl_init(struct request_queue *q); | 1135 | extern int blk_throtl_init(struct request_queue *q); |
1137 | extern void blk_throtl_exit(struct request_queue *q); | 1136 | extern void blk_throtl_exit(struct request_queue *q); |
1138 | extern int blk_throtl_bio(struct request_queue *q, struct bio **bio); | 1137 | extern int blk_throtl_bio(struct request_queue *q, struct bio **bio); |
1139 | extern void throtl_schedule_delayed_work(struct request_queue *q, unsigned long delay); | ||
1140 | extern void throtl_shutdown_timer_wq(struct request_queue *q); | 1138 | extern void throtl_shutdown_timer_wq(struct request_queue *q); |
1141 | #else /* CONFIG_BLK_DEV_THROTTLING */ | 1139 | #else /* CONFIG_BLK_DEV_THROTTLING */ |
1142 | static inline int blk_throtl_bio(struct request_queue *q, struct bio **bio) | 1140 | static inline int blk_throtl_bio(struct request_queue *q, struct bio **bio) |
@@ -1146,7 +1144,6 @@ static inline int blk_throtl_bio(struct request_queue *q, struct bio **bio) | |||
1146 | 1144 | ||
1147 | static inline int blk_throtl_init(struct request_queue *q) { return 0; } | 1145 | static inline int blk_throtl_init(struct request_queue *q) { return 0; } |
1148 | static inline int blk_throtl_exit(struct request_queue *q) { return 0; } | 1146 | static inline int blk_throtl_exit(struct request_queue *q) { return 0; } |
1149 | static inline void throtl_schedule_delayed_work(struct request_queue *q, unsigned long delay) {} | ||
1150 | static inline void throtl_shutdown_timer_wq(struct request_queue *q) {} | 1147 | static inline void throtl_shutdown_timer_wq(struct request_queue *q) {} |
1151 | #endif /* CONFIG_BLK_DEV_THROTTLING */ | 1148 | #endif /* CONFIG_BLK_DEV_THROTTLING */ |
1152 | 1149 | ||
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h index 3395cf7130f5..b22fb0d3db0f 100644 --- a/include/linux/blktrace_api.h +++ b/include/linux/blktrace_api.h | |||
@@ -245,7 +245,6 @@ static inline int blk_cmd_buf_len(struct request *rq) | |||
245 | 245 | ||
246 | extern void blk_dump_cmd(char *buf, struct request *rq); | 246 | extern void blk_dump_cmd(char *buf, struct request *rq); |
247 | extern void blk_fill_rwbs(char *rwbs, u32 rw, int bytes); | 247 | extern void blk_fill_rwbs(char *rwbs, u32 rw, int bytes); |
248 | extern void blk_fill_rwbs_rq(char *rwbs, struct request *rq); | ||
249 | 248 | ||
250 | #endif /* CONFIG_EVENT_TRACING && CONFIG_BLOCK */ | 249 | #endif /* CONFIG_EVENT_TRACING && CONFIG_BLOCK */ |
251 | 250 | ||
diff --git a/include/linux/ceph/messenger.h b/include/linux/ceph/messenger.h index c3011beac30d..31d91a64838b 100644 --- a/include/linux/ceph/messenger.h +++ b/include/linux/ceph/messenger.h | |||
@@ -123,6 +123,7 @@ struct ceph_msg_pos { | |||
123 | #define SOCK_CLOSED 11 /* socket state changed to closed */ | 123 | #define SOCK_CLOSED 11 /* socket state changed to closed */ |
124 | #define OPENING 13 /* open connection w/ (possibly new) peer */ | 124 | #define OPENING 13 /* open connection w/ (possibly new) peer */ |
125 | #define DEAD 14 /* dead, about to kfree */ | 125 | #define DEAD 14 /* dead, about to kfree */ |
126 | #define BACKOFF 15 | ||
126 | 127 | ||
127 | /* | 128 | /* |
128 | * A single connection with another host. | 129 | * A single connection with another host. |
@@ -160,7 +161,6 @@ struct ceph_connection { | |||
160 | struct list_head out_queue; | 161 | struct list_head out_queue; |
161 | struct list_head out_sent; /* sending or sent but unacked */ | 162 | struct list_head out_sent; /* sending or sent but unacked */ |
162 | u64 out_seq; /* last message queued for send */ | 163 | u64 out_seq; /* last message queued for send */ |
163 | bool out_keepalive_pending; | ||
164 | 164 | ||
165 | u64 in_seq, in_seq_acked; /* last message received, acked */ | 165 | u64 in_seq, in_seq_acked; /* last message received, acked */ |
166 | 166 | ||
diff --git a/include/linux/dcbnl.h b/include/linux/dcbnl.h index 68cd248f6d3e..66900e3c6eb1 100644 --- a/include/linux/dcbnl.h +++ b/include/linux/dcbnl.h | |||
@@ -101,8 +101,8 @@ struct ieee_pfc { | |||
101 | */ | 101 | */ |
102 | struct dcb_app { | 102 | struct dcb_app { |
103 | __u8 selector; | 103 | __u8 selector; |
104 | __u32 protocol; | ||
105 | __u8 priority; | 104 | __u8 priority; |
105 | __u16 protocol; | ||
106 | }; | 106 | }; |
107 | 107 | ||
108 | struct dcbmsg { | 108 | struct dcbmsg { |
diff --git a/include/linux/freezer.h b/include/linux/freezer.h index da7e52b099f3..1effc8b56b4e 100644 --- a/include/linux/freezer.h +++ b/include/linux/freezer.h | |||
@@ -109,7 +109,7 @@ static inline void freezer_count(void) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | /* | 111 | /* |
112 | * Check if the task should be counted as freezeable by the freezer | 112 | * Check if the task should be counted as freezable by the freezer |
113 | */ | 113 | */ |
114 | static inline int freezer_should_skip(struct task_struct *p) | 114 | static inline int freezer_should_skip(struct task_struct *p) |
115 | { | 115 | { |
diff --git a/include/linux/fs.h b/include/linux/fs.h index bd3215940c37..e38b50a4b9d2 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h | |||
@@ -649,6 +649,7 @@ struct address_space { | |||
649 | spinlock_t private_lock; /* for use by the address_space */ | 649 | spinlock_t private_lock; /* for use by the address_space */ |
650 | struct list_head private_list; /* ditto */ | 650 | struct list_head private_list; /* ditto */ |
651 | struct address_space *assoc_mapping; /* ditto */ | 651 | struct address_space *assoc_mapping; /* ditto */ |
652 | struct mutex unmap_mutex; /* to protect unmapping */ | ||
652 | } __attribute__((aligned(sizeof(long)))); | 653 | } __attribute__((aligned(sizeof(long)))); |
653 | /* | 654 | /* |
654 | * On most architectures that alignment is already the case; but | 655 | * On most architectures that alignment is already the case; but |
@@ -2139,7 +2140,7 @@ extern void check_disk_size_change(struct gendisk *disk, | |||
2139 | struct block_device *bdev); | 2140 | struct block_device *bdev); |
2140 | extern int revalidate_disk(struct gendisk *); | 2141 | extern int revalidate_disk(struct gendisk *); |
2141 | extern int check_disk_change(struct block_device *); | 2142 | extern int check_disk_change(struct block_device *); |
2142 | extern int __invalidate_device(struct block_device *); | 2143 | extern int __invalidate_device(struct block_device *, bool); |
2143 | extern int invalidate_partition(struct gendisk *, int); | 2144 | extern int invalidate_partition(struct gendisk *, int); |
2144 | #endif | 2145 | #endif |
2145 | unsigned long invalidate_mapping_pages(struct address_space *mapping, | 2146 | unsigned long invalidate_mapping_pages(struct address_space *mapping, |
@@ -2225,6 +2226,7 @@ extern loff_t vfs_llseek(struct file *file, loff_t offset, int origin); | |||
2225 | 2226 | ||
2226 | extern int inode_init_always(struct super_block *, struct inode *); | 2227 | extern int inode_init_always(struct super_block *, struct inode *); |
2227 | extern void inode_init_once(struct inode *); | 2228 | extern void inode_init_once(struct inode *); |
2229 | extern void address_space_init_once(struct address_space *mapping); | ||
2228 | extern void ihold(struct inode * inode); | 2230 | extern void ihold(struct inode * inode); |
2229 | extern void iput(struct inode *); | 2231 | extern void iput(struct inode *); |
2230 | extern struct inode * igrab(struct inode *); | 2232 | extern struct inode * igrab(struct inode *); |
diff --git a/include/linux/gfp.h b/include/linux/gfp.h index 0b84c61607e8..dca31761b311 100644 --- a/include/linux/gfp.h +++ b/include/linux/gfp.h | |||
@@ -332,16 +332,19 @@ alloc_pages(gfp_t gfp_mask, unsigned int order) | |||
332 | return alloc_pages_current(gfp_mask, order); | 332 | return alloc_pages_current(gfp_mask, order); |
333 | } | 333 | } |
334 | extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order, | 334 | extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order, |
335 | struct vm_area_struct *vma, unsigned long addr); | 335 | struct vm_area_struct *vma, unsigned long addr, |
336 | int node); | ||
336 | #else | 337 | #else |
337 | #define alloc_pages(gfp_mask, order) \ | 338 | #define alloc_pages(gfp_mask, order) \ |
338 | alloc_pages_node(numa_node_id(), gfp_mask, order) | 339 | alloc_pages_node(numa_node_id(), gfp_mask, order) |
339 | #define alloc_pages_vma(gfp_mask, order, vma, addr) \ | 340 | #define alloc_pages_vma(gfp_mask, order, vma, addr, node) \ |
340 | alloc_pages(gfp_mask, order) | 341 | alloc_pages(gfp_mask, order) |
341 | #endif | 342 | #endif |
342 | #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0) | 343 | #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0) |
343 | #define alloc_page_vma(gfp_mask, vma, addr) \ | 344 | #define alloc_page_vma(gfp_mask, vma, addr) \ |
344 | alloc_pages_vma(gfp_mask, 0, vma, addr) | 345 | alloc_pages_vma(gfp_mask, 0, vma, addr, numa_node_id()) |
346 | #define alloc_page_vma_node(gfp_mask, vma, addr, node) \ | ||
347 | alloc_pages_vma(gfp_mask, 0, vma, addr, node) | ||
345 | 348 | ||
346 | extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order); | 349 | extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order); |
347 | extern unsigned long get_zeroed_page(gfp_t gfp_mask); | 350 | extern unsigned long get_zeroed_page(gfp_t gfp_mask); |
diff --git a/include/linux/list.h b/include/linux/list.h index 9a5f8a71810c..3a54266a1e85 100644 --- a/include/linux/list.h +++ b/include/linux/list.h | |||
@@ -96,6 +96,11 @@ static inline void __list_del(struct list_head * prev, struct list_head * next) | |||
96 | * in an undefined state. | 96 | * in an undefined state. |
97 | */ | 97 | */ |
98 | #ifndef CONFIG_DEBUG_LIST | 98 | #ifndef CONFIG_DEBUG_LIST |
99 | static inline void __list_del_entry(struct list_head *entry) | ||
100 | { | ||
101 | __list_del(entry->prev, entry->next); | ||
102 | } | ||
103 | |||
99 | static inline void list_del(struct list_head *entry) | 104 | static inline void list_del(struct list_head *entry) |
100 | { | 105 | { |
101 | __list_del(entry->prev, entry->next); | 106 | __list_del(entry->prev, entry->next); |
@@ -103,6 +108,7 @@ static inline void list_del(struct list_head *entry) | |||
103 | entry->prev = LIST_POISON2; | 108 | entry->prev = LIST_POISON2; |
104 | } | 109 | } |
105 | #else | 110 | #else |
111 | extern void __list_del_entry(struct list_head *entry); | ||
106 | extern void list_del(struct list_head *entry); | 112 | extern void list_del(struct list_head *entry); |
107 | #endif | 113 | #endif |
108 | 114 | ||
@@ -135,7 +141,7 @@ static inline void list_replace_init(struct list_head *old, | |||
135 | */ | 141 | */ |
136 | static inline void list_del_init(struct list_head *entry) | 142 | static inline void list_del_init(struct list_head *entry) |
137 | { | 143 | { |
138 | __list_del(entry->prev, entry->next); | 144 | __list_del_entry(entry); |
139 | INIT_LIST_HEAD(entry); | 145 | INIT_LIST_HEAD(entry); |
140 | } | 146 | } |
141 | 147 | ||
@@ -146,7 +152,7 @@ static inline void list_del_init(struct list_head *entry) | |||
146 | */ | 152 | */ |
147 | static inline void list_move(struct list_head *list, struct list_head *head) | 153 | static inline void list_move(struct list_head *list, struct list_head *head) |
148 | { | 154 | { |
149 | __list_del(list->prev, list->next); | 155 | __list_del_entry(list); |
150 | list_add(list, head); | 156 | list_add(list, head); |
151 | } | 157 | } |
152 | 158 | ||
@@ -158,7 +164,7 @@ static inline void list_move(struct list_head *list, struct list_head *head) | |||
158 | static inline void list_move_tail(struct list_head *list, | 164 | static inline void list_move_tail(struct list_head *list, |
159 | struct list_head *head) | 165 | struct list_head *head) |
160 | { | 166 | { |
161 | __list_del(list->prev, list->next); | 167 | __list_del_entry(list); |
162 | list_add_tail(list, head); | 168 | list_add_tail(list, head); |
163 | } | 169 | } |
164 | 170 | ||
diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index 3fd36845ca45..ef4f0b6083a3 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h | |||
@@ -71,6 +71,7 @@ struct wm8994 { | |||
71 | u16 irq_masks_cache[WM8994_NUM_IRQ_REGS]; | 71 | u16 irq_masks_cache[WM8994_NUM_IRQ_REGS]; |
72 | 72 | ||
73 | /* Used over suspend/resume */ | 73 | /* Used over suspend/resume */ |
74 | bool suspended; | ||
74 | u16 ldo_regs[WM8994_NUM_LDO_REGS]; | 75 | u16 ldo_regs[WM8994_NUM_LDO_REGS]; |
75 | u16 gpio_regs[WM8994_NUM_GPIO_REGS]; | 76 | u16 gpio_regs[WM8994_NUM_GPIO_REGS]; |
76 | 77 | ||
diff --git a/include/linux/module.h b/include/linux/module.h index 9bdf27c7615b..5de42043dff0 100644 --- a/include/linux/module.h +++ b/include/linux/module.h | |||
@@ -62,7 +62,7 @@ struct module_version_attribute { | |||
62 | struct module_attribute mattr; | 62 | struct module_attribute mattr; |
63 | const char *module_name; | 63 | const char *module_name; |
64 | const char *version; | 64 | const char *version; |
65 | }; | 65 | } __attribute__ ((__aligned__(sizeof(void *)))); |
66 | 66 | ||
67 | struct module_kobject | 67 | struct module_kobject |
68 | { | 68 | { |
diff --git a/include/linux/pm.h b/include/linux/pm.h index dd9c7ab38270..21415cc91cbb 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h | |||
@@ -431,6 +431,8 @@ struct dev_pm_info { | |||
431 | struct list_head entry; | 431 | struct list_head entry; |
432 | struct completion completion; | 432 | struct completion completion; |
433 | struct wakeup_source *wakeup; | 433 | struct wakeup_source *wakeup; |
434 | #else | ||
435 | unsigned int should_wakeup:1; | ||
434 | #endif | 436 | #endif |
435 | #ifdef CONFIG_PM_RUNTIME | 437 | #ifdef CONFIG_PM_RUNTIME |
436 | struct timer_list suspend_timer; | 438 | struct timer_list suspend_timer; |
diff --git a/include/linux/pm_wakeup.h b/include/linux/pm_wakeup.h index 9cff00dd6b63..03a67db03d01 100644 --- a/include/linux/pm_wakeup.h +++ b/include/linux/pm_wakeup.h | |||
@@ -109,11 +109,6 @@ static inline bool device_can_wakeup(struct device *dev) | |||
109 | return dev->power.can_wakeup; | 109 | return dev->power.can_wakeup; |
110 | } | 110 | } |
111 | 111 | ||
112 | static inline bool device_may_wakeup(struct device *dev) | ||
113 | { | ||
114 | return false; | ||
115 | } | ||
116 | |||
117 | static inline struct wakeup_source *wakeup_source_create(const char *name) | 112 | static inline struct wakeup_source *wakeup_source_create(const char *name) |
118 | { | 113 | { |
119 | return NULL; | 114 | return NULL; |
@@ -134,24 +129,32 @@ static inline void wakeup_source_unregister(struct wakeup_source *ws) {} | |||
134 | 129 | ||
135 | static inline int device_wakeup_enable(struct device *dev) | 130 | static inline int device_wakeup_enable(struct device *dev) |
136 | { | 131 | { |
137 | return -EINVAL; | 132 | dev->power.should_wakeup = true; |
133 | return 0; | ||
138 | } | 134 | } |
139 | 135 | ||
140 | static inline int device_wakeup_disable(struct device *dev) | 136 | static inline int device_wakeup_disable(struct device *dev) |
141 | { | 137 | { |
138 | dev->power.should_wakeup = false; | ||
142 | return 0; | 139 | return 0; |
143 | } | 140 | } |
144 | 141 | ||
145 | static inline int device_init_wakeup(struct device *dev, bool val) | 142 | static inline int device_set_wakeup_enable(struct device *dev, bool enable) |
146 | { | 143 | { |
147 | dev->power.can_wakeup = val; | 144 | dev->power.should_wakeup = enable; |
148 | return val ? -EINVAL : 0; | 145 | return 0; |
149 | } | 146 | } |
150 | 147 | ||
148 | static inline int device_init_wakeup(struct device *dev, bool val) | ||
149 | { | ||
150 | device_set_wakeup_capable(dev, val); | ||
151 | device_set_wakeup_enable(dev, val); | ||
152 | return 0; | ||
153 | } | ||
151 | 154 | ||
152 | static inline int device_set_wakeup_enable(struct device *dev, bool enable) | 155 | static inline bool device_may_wakeup(struct device *dev) |
153 | { | 156 | { |
154 | return -EINVAL; | 157 | return dev->power.can_wakeup && dev->power.should_wakeup; |
155 | } | 158 | } |
156 | 159 | ||
157 | static inline void __pm_stay_awake(struct wakeup_source *ws) {} | 160 | static inline void __pm_stay_awake(struct wakeup_source *ws) {} |
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index 092a04f874a8..a1147e5dd245 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h | |||
@@ -102,11 +102,8 @@ | |||
102 | 102 | ||
103 | extern long arch_ptrace(struct task_struct *child, long request, | 103 | extern long arch_ptrace(struct task_struct *child, long request, |
104 | unsigned long addr, unsigned long data); | 104 | unsigned long addr, unsigned long data); |
105 | extern int ptrace_traceme(void); | ||
106 | extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst, int len); | 105 | extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst, int len); |
107 | extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len); | 106 | extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len); |
108 | extern int ptrace_attach(struct task_struct *tsk); | ||
109 | extern int ptrace_detach(struct task_struct *, unsigned int); | ||
110 | extern void ptrace_disable(struct task_struct *); | 107 | extern void ptrace_disable(struct task_struct *); |
111 | extern int ptrace_check_attach(struct task_struct *task, int kill); | 108 | extern int ptrace_check_attach(struct task_struct *task, int kill); |
112 | extern int ptrace_request(struct task_struct *child, long request, | 109 | extern int ptrace_request(struct task_struct *child, long request, |
diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h index d63dcbaea169..9026b30238f3 100644 --- a/include/linux/rio_regs.h +++ b/include/linux/rio_regs.h | |||
@@ -14,10 +14,12 @@ | |||
14 | #define LINUX_RIO_REGS_H | 14 | #define LINUX_RIO_REGS_H |
15 | 15 | ||
16 | /* | 16 | /* |
17 | * In RapidIO, each device has a 2MB configuration space that is | 17 | * In RapidIO, each device has a 16MB configuration space that is |
18 | * accessed via maintenance transactions. Portions of configuration | 18 | * accessed via maintenance transactions. Portions of configuration |
19 | * space are standardized and/or reserved. | 19 | * space are standardized and/or reserved. |
20 | */ | 20 | */ |
21 | #define RIO_MAINT_SPACE_SZ 0x1000000 /* 16MB of RapidIO mainenance space */ | ||
22 | |||
21 | #define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ | 23 | #define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ |
22 | #define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ | 24 | #define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ |
23 | #define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ | 25 | #define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ |
diff --git a/include/linux/rtc.h b/include/linux/rtc.h index a0b639f8e805..89c3e5182991 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h | |||
@@ -203,6 +203,18 @@ struct rtc_device | |||
203 | struct hrtimer pie_timer; /* sub second exp, so needs hrtimer */ | 203 | struct hrtimer pie_timer; /* sub second exp, so needs hrtimer */ |
204 | int pie_enabled; | 204 | int pie_enabled; |
205 | struct work_struct irqwork; | 205 | struct work_struct irqwork; |
206 | |||
207 | |||
208 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | ||
209 | struct work_struct uie_task; | ||
210 | struct timer_list uie_timer; | ||
211 | /* Those fields are protected by rtc->irq_lock */ | ||
212 | unsigned int oldsecs; | ||
213 | unsigned int uie_irq_active:1; | ||
214 | unsigned int stop_uie_polling:1; | ||
215 | unsigned int uie_task_active:1; | ||
216 | unsigned int uie_timer_active:1; | ||
217 | #endif | ||
206 | }; | 218 | }; |
207 | #define to_rtc_device(d) container_of(d, struct rtc_device, dev) | 219 | #define to_rtc_device(d) container_of(d, struct rtc_device, dev) |
208 | 220 | ||
@@ -235,7 +247,10 @@ extern int rtc_irq_set_freq(struct rtc_device *rtc, | |||
235 | struct rtc_task *task, int freq); | 247 | struct rtc_task *task, int freq); |
236 | extern int rtc_update_irq_enable(struct rtc_device *rtc, unsigned int enabled); | 248 | extern int rtc_update_irq_enable(struct rtc_device *rtc, unsigned int enabled); |
237 | extern int rtc_alarm_irq_enable(struct rtc_device *rtc, unsigned int enabled); | 249 | extern int rtc_alarm_irq_enable(struct rtc_device *rtc, unsigned int enabled); |
250 | extern int rtc_dev_update_irq_enable_emul(struct rtc_device *rtc, | ||
251 | unsigned int enabled); | ||
238 | 252 | ||
253 | void rtc_handle_legacy_irq(struct rtc_device *rtc, int num, int mode); | ||
239 | void rtc_aie_update_irq(void *private); | 254 | void rtc_aie_update_irq(void *private); |
240 | void rtc_uie_update_irq(void *private); | 255 | void rtc_uie_update_irq(void *private); |
241 | enum hrtimer_restart rtc_pie_update_irq(struct hrtimer *timer); | 256 | enum hrtimer_restart rtc_pie_update_irq(struct hrtimer *timer); |
diff --git a/include/linux/sched.h b/include/linux/sched.h index d747f948b34e..777d8a5ed06b 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h | |||
@@ -1744,7 +1744,7 @@ extern void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t * | |||
1744 | #define PF_MCE_EARLY 0x08000000 /* Early kill for mce process policy */ | 1744 | #define PF_MCE_EARLY 0x08000000 /* Early kill for mce process policy */ |
1745 | #define PF_MEMPOLICY 0x10000000 /* Non-default NUMA mempolicy */ | 1745 | #define PF_MEMPOLICY 0x10000000 /* Non-default NUMA mempolicy */ |
1746 | #define PF_MUTEX_TESTER 0x20000000 /* Thread belongs to the rt mutex tester */ | 1746 | #define PF_MUTEX_TESTER 0x20000000 /* Thread belongs to the rt mutex tester */ |
1747 | #define PF_FREEZER_SKIP 0x40000000 /* Freezer should not count it as freezeable */ | 1747 | #define PF_FREEZER_SKIP 0x40000000 /* Freezer should not count it as freezable */ |
1748 | #define PF_FREEZER_NOSIG 0x80000000 /* Freezer won't send signals to it */ | 1748 | #define PF_FREEZER_NOSIG 0x80000000 /* Freezer won't send signals to it */ |
1749 | 1749 | ||
1750 | /* | 1750 | /* |
diff --git a/include/linux/thermal.h b/include/linux/thermal.h index 8651556dbd52..d3ec89fb4122 100644 --- a/include/linux/thermal.h +++ b/include/linux/thermal.h | |||
@@ -172,6 +172,14 @@ void thermal_zone_device_update(struct thermal_zone_device *); | |||
172 | struct thermal_cooling_device *thermal_cooling_device_register(char *, void *, | 172 | struct thermal_cooling_device *thermal_cooling_device_register(char *, void *, |
173 | const struct thermal_cooling_device_ops *); | 173 | const struct thermal_cooling_device_ops *); |
174 | void thermal_cooling_device_unregister(struct thermal_cooling_device *); | 174 | void thermal_cooling_device_unregister(struct thermal_cooling_device *); |
175 | |||
176 | #ifdef CONFIG_NET | ||
175 | extern int generate_netlink_event(u32 orig, enum events event); | 177 | extern int generate_netlink_event(u32 orig, enum events event); |
178 | #else | ||
179 | static inline int generate_netlink_event(u32 orig, enum events event) | ||
180 | { | ||
181 | return 0; | ||
182 | } | ||
183 | #endif | ||
176 | 184 | ||
177 | #endif /* __THERMAL_H__ */ | 185 | #endif /* __THERMAL_H__ */ |
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h index 1ac11586a2f5..f7998a3bf020 100644 --- a/include/linux/workqueue.h +++ b/include/linux/workqueue.h | |||
@@ -250,7 +250,7 @@ static inline unsigned int work_static(struct work_struct *work) { return 0; } | |||
250 | enum { | 250 | enum { |
251 | WQ_NON_REENTRANT = 1 << 0, /* guarantee non-reentrance */ | 251 | WQ_NON_REENTRANT = 1 << 0, /* guarantee non-reentrance */ |
252 | WQ_UNBOUND = 1 << 1, /* not bound to any cpu */ | 252 | WQ_UNBOUND = 1 << 1, /* not bound to any cpu */ |
253 | WQ_FREEZEABLE = 1 << 2, /* freeze during suspend */ | 253 | WQ_FREEZABLE = 1 << 2, /* freeze during suspend */ |
254 | WQ_MEM_RECLAIM = 1 << 3, /* may be used for memory reclaim */ | 254 | WQ_MEM_RECLAIM = 1 << 3, /* may be used for memory reclaim */ |
255 | WQ_HIGHPRI = 1 << 4, /* high priority */ | 255 | WQ_HIGHPRI = 1 << 4, /* high priority */ |
256 | WQ_CPU_INTENSIVE = 1 << 5, /* cpu instensive workqueue */ | 256 | WQ_CPU_INTENSIVE = 1 << 5, /* cpu instensive workqueue */ |
@@ -318,7 +318,7 @@ __alloc_workqueue_key(const char *name, unsigned int flags, int max_active, | |||
318 | /** | 318 | /** |
319 | * alloc_ordered_workqueue - allocate an ordered workqueue | 319 | * alloc_ordered_workqueue - allocate an ordered workqueue |
320 | * @name: name of the workqueue | 320 | * @name: name of the workqueue |
321 | * @flags: WQ_* flags (only WQ_FREEZEABLE and WQ_MEM_RECLAIM are meaningful) | 321 | * @flags: WQ_* flags (only WQ_FREEZABLE and WQ_MEM_RECLAIM are meaningful) |
322 | * | 322 | * |
323 | * Allocate an ordered workqueue. An ordered workqueue executes at | 323 | * Allocate an ordered workqueue. An ordered workqueue executes at |
324 | * most one work item at any given time in the queued order. They are | 324 | * most one work item at any given time in the queued order. They are |
@@ -335,8 +335,8 @@ alloc_ordered_workqueue(const char *name, unsigned int flags) | |||
335 | 335 | ||
336 | #define create_workqueue(name) \ | 336 | #define create_workqueue(name) \ |
337 | alloc_workqueue((name), WQ_MEM_RECLAIM, 1) | 337 | alloc_workqueue((name), WQ_MEM_RECLAIM, 1) |
338 | #define create_freezeable_workqueue(name) \ | 338 | #define create_freezable_workqueue(name) \ |
339 | alloc_workqueue((name), WQ_FREEZEABLE | WQ_UNBOUND | WQ_MEM_RECLAIM, 1) | 339 | alloc_workqueue((name), WQ_FREEZABLE | WQ_UNBOUND | WQ_MEM_RECLAIM, 1) |
340 | #define create_singlethread_workqueue(name) \ | 340 | #define create_singlethread_workqueue(name) \ |
341 | alloc_workqueue((name), WQ_UNBOUND | WQ_MEM_RECLAIM, 1) | 341 | alloc_workqueue((name), WQ_UNBOUND | WQ_MEM_RECLAIM, 1) |
342 | 342 | ||
diff --git a/include/net/ipv6.h b/include/net/ipv6.h index 4a3cd2cd2f5e..96e50e0ce3ca 100644 --- a/include/net/ipv6.h +++ b/include/net/ipv6.h | |||
@@ -89,6 +89,18 @@ | |||
89 | #define IPV6_ADDR_SCOPE_GLOBAL 0x0e | 89 | #define IPV6_ADDR_SCOPE_GLOBAL 0x0e |
90 | 90 | ||
91 | /* | 91 | /* |
92 | * Addr flags | ||
93 | */ | ||
94 | #ifdef __KERNEL__ | ||
95 | #define IPV6_ADDR_MC_FLAG_TRANSIENT(a) \ | ||
96 | ((a)->s6_addr[1] & 0x10) | ||
97 | #define IPV6_ADDR_MC_FLAG_PREFIX(a) \ | ||
98 | ((a)->s6_addr[1] & 0x20) | ||
99 | #define IPV6_ADDR_MC_FLAG_RENDEZVOUS(a) \ | ||
100 | ((a)->s6_addr[1] & 0x40) | ||
101 | #endif | ||
102 | |||
103 | /* | ||
92 | * fragmentation header | 104 | * fragmentation header |
93 | */ | 105 | */ |
94 | 106 | ||
diff --git a/include/net/netfilter/nf_tproxy_core.h b/include/net/netfilter/nf_tproxy_core.h index cd85b3bc8327..e505358d8999 100644 --- a/include/net/netfilter/nf_tproxy_core.h +++ b/include/net/netfilter/nf_tproxy_core.h | |||
@@ -201,18 +201,8 @@ nf_tproxy_get_sock_v6(struct net *net, const u8 protocol, | |||
201 | } | 201 | } |
202 | #endif | 202 | #endif |
203 | 203 | ||
204 | static inline void | ||
205 | nf_tproxy_put_sock(struct sock *sk) | ||
206 | { | ||
207 | /* TIME_WAIT inet sockets have to be handled differently */ | ||
208 | if ((sk->sk_protocol == IPPROTO_TCP) && (sk->sk_state == TCP_TIME_WAIT)) | ||
209 | inet_twsk_put(inet_twsk(sk)); | ||
210 | else | ||
211 | sock_put(sk); | ||
212 | } | ||
213 | |||
214 | /* assign a socket to the skb -- consumes sk */ | 204 | /* assign a socket to the skb -- consumes sk */ |
215 | int | 205 | void |
216 | nf_tproxy_assign_sock(struct sk_buff *skb, struct sock *sk); | 206 | nf_tproxy_assign_sock(struct sk_buff *skb, struct sock *sk); |
217 | 207 | ||
218 | #endif | 208 | #endif |
diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h index 160a407c1963..04f8556313d5 100644 --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h | |||
@@ -199,7 +199,7 @@ struct tcf_proto { | |||
199 | 199 | ||
200 | struct qdisc_skb_cb { | 200 | struct qdisc_skb_cb { |
201 | unsigned int pkt_len; | 201 | unsigned int pkt_len; |
202 | char data[]; | 202 | long data[]; |
203 | }; | 203 | }; |
204 | 204 | ||
205 | static inline int qdisc_qlen(struct Qdisc *q) | 205 | static inline int qdisc_qlen(struct Qdisc *q) |
diff --git a/include/pcmcia/ds.h b/include/pcmcia/ds.h index 8479b66c067b..3fd5064dd43a 100644 --- a/include/pcmcia/ds.h +++ b/include/pcmcia/ds.h | |||
@@ -261,6 +261,7 @@ void pcmcia_disable_device(struct pcmcia_device *p_dev); | |||
261 | #define CONF_ENABLE_ESR 0x0008 | 261 | #define CONF_ENABLE_ESR 0x0008 |
262 | #define CONF_ENABLE_IOCARD 0x0010 /* auto-enabled if IO resources or IRQ | 262 | #define CONF_ENABLE_IOCARD 0x0010 /* auto-enabled if IO resources or IRQ |
263 | * (CONF_ENABLE_IRQ) in use */ | 263 | * (CONF_ENABLE_IRQ) in use */ |
264 | #define CONF_ENABLE_ZVCARD 0x0020 | ||
264 | 265 | ||
265 | /* flags used by pcmcia_loop_config() autoconfiguration */ | 266 | /* flags used by pcmcia_loop_config() autoconfiguration */ |
266 | #define CONF_AUTO_CHECK_VCC 0x0100 /* check for matching Vcc? */ | 267 | #define CONF_AUTO_CHECK_VCC 0x0100 /* check for matching Vcc? */ |
diff --git a/include/sound/wm8903.h b/include/sound/wm8903.h index b4a0db2307ef..1eeebd534f7e 100644 --- a/include/sound/wm8903.h +++ b/include/sound/wm8903.h | |||
@@ -17,13 +17,9 @@ | |||
17 | /* | 17 | /* |
18 | * R6 (0x06) - Mic Bias Control 0 | 18 | * R6 (0x06) - Mic Bias Control 0 |
19 | */ | 19 | */ |
20 | #define WM8903_MICDET_HYST_ENA 0x0080 /* MICDET_HYST_ENA */ | 20 | #define WM8903_MICDET_THR_MASK 0x0030 /* MICDET_THR - [5:4] */ |
21 | #define WM8903_MICDET_HYST_ENA_MASK 0x0080 /* MICDET_HYST_ENA */ | 21 | #define WM8903_MICDET_THR_SHIFT 4 /* MICDET_THR - [5:4] */ |
22 | #define WM8903_MICDET_HYST_ENA_SHIFT 7 /* MICDET_HYST_ENA */ | 22 | #define WM8903_MICDET_THR_WIDTH 2 /* MICDET_THR - [5:4] */ |
23 | #define WM8903_MICDET_HYST_ENA_WIDTH 1 /* MICDET_HYST_ENA */ | ||
24 | #define WM8903_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */ | ||
25 | #define WM8903_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */ | ||
26 | #define WM8903_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */ | ||
27 | #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ | 23 | #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ |
28 | #define WM8903_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ | 24 | #define WM8903_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ |
29 | #define WM8903_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ | 25 | #define WM8903_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ |
diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h index 07fdfb6b9a9a..0828b6c8610a 100644 --- a/include/target/target_core_base.h +++ b/include/target/target_core_base.h | |||
@@ -8,7 +8,6 @@ | |||
8 | #include <scsi/scsi_cmnd.h> | 8 | #include <scsi/scsi_cmnd.h> |
9 | #include <net/sock.h> | 9 | #include <net/sock.h> |
10 | #include <net/tcp.h> | 10 | #include <net/tcp.h> |
11 | #include "target_core_mib.h" | ||
12 | 11 | ||
13 | #define TARGET_CORE_MOD_VERSION "v4.0.0-rc6" | 12 | #define TARGET_CORE_MOD_VERSION "v4.0.0-rc6" |
14 | #define SHUTDOWN_SIGS (sigmask(SIGKILL)|sigmask(SIGINT)|sigmask(SIGABRT)) | 13 | #define SHUTDOWN_SIGS (sigmask(SIGKILL)|sigmask(SIGINT)|sigmask(SIGABRT)) |
@@ -195,6 +194,21 @@ typedef enum { | |||
195 | SAM_TASK_ATTR_EMULATED | 194 | SAM_TASK_ATTR_EMULATED |
196 | } t10_task_attr_index_t; | 195 | } t10_task_attr_index_t; |
197 | 196 | ||
197 | /* | ||
198 | * Used for target SCSI statistics | ||
199 | */ | ||
200 | typedef enum { | ||
201 | SCSI_INST_INDEX, | ||
202 | SCSI_DEVICE_INDEX, | ||
203 | SCSI_AUTH_INTR_INDEX, | ||
204 | SCSI_INDEX_TYPE_MAX | ||
205 | } scsi_index_t; | ||
206 | |||
207 | struct scsi_index_table { | ||
208 | spinlock_t lock; | ||
209 | u32 scsi_mib_index[SCSI_INDEX_TYPE_MAX]; | ||
210 | } ____cacheline_aligned; | ||
211 | |||
198 | struct se_cmd; | 212 | struct se_cmd; |
199 | 213 | ||
200 | struct t10_alua { | 214 | struct t10_alua { |
@@ -578,8 +592,6 @@ struct se_node_acl { | |||
578 | spinlock_t stats_lock; | 592 | spinlock_t stats_lock; |
579 | /* Used for PR SPEC_I_PT=1 and REGISTER_AND_MOVE */ | 593 | /* Used for PR SPEC_I_PT=1 and REGISTER_AND_MOVE */ |
580 | atomic_t acl_pr_ref_count; | 594 | atomic_t acl_pr_ref_count; |
581 | /* Used for MIB access */ | ||
582 | atomic_t mib_ref_count; | ||
583 | struct se_dev_entry *device_list; | 595 | struct se_dev_entry *device_list; |
584 | struct se_session *nacl_sess; | 596 | struct se_session *nacl_sess; |
585 | struct se_portal_group *se_tpg; | 597 | struct se_portal_group *se_tpg; |
@@ -595,8 +607,6 @@ struct se_node_acl { | |||
595 | } ____cacheline_aligned; | 607 | } ____cacheline_aligned; |
596 | 608 | ||
597 | struct se_session { | 609 | struct se_session { |
598 | /* Used for MIB access */ | ||
599 | atomic_t mib_ref_count; | ||
600 | u64 sess_bin_isid; | 610 | u64 sess_bin_isid; |
601 | struct se_node_acl *se_node_acl; | 611 | struct se_node_acl *se_node_acl; |
602 | struct se_portal_group *se_tpg; | 612 | struct se_portal_group *se_tpg; |
@@ -806,7 +816,6 @@ struct se_hba { | |||
806 | /* Virtual iSCSI devices attached. */ | 816 | /* Virtual iSCSI devices attached. */ |
807 | u32 dev_count; | 817 | u32 dev_count; |
808 | u32 hba_index; | 818 | u32 hba_index; |
809 | atomic_t dev_mib_access_count; | ||
810 | atomic_t load_balance_queue; | 819 | atomic_t load_balance_queue; |
811 | atomic_t left_queue_depth; | 820 | atomic_t left_queue_depth; |
812 | /* Maximum queue depth the HBA can handle. */ | 821 | /* Maximum queue depth the HBA can handle. */ |
@@ -845,6 +854,12 @@ struct se_lun { | |||
845 | 854 | ||
846 | #define SE_LUN(c) ((struct se_lun *)(c)->se_lun) | 855 | #define SE_LUN(c) ((struct se_lun *)(c)->se_lun) |
847 | 856 | ||
857 | struct scsi_port_stats { | ||
858 | u64 cmd_pdus; | ||
859 | u64 tx_data_octets; | ||
860 | u64 rx_data_octets; | ||
861 | } ____cacheline_aligned; | ||
862 | |||
848 | struct se_port { | 863 | struct se_port { |
849 | /* RELATIVE TARGET PORT IDENTIFER */ | 864 | /* RELATIVE TARGET PORT IDENTIFER */ |
850 | u16 sep_rtpi; | 865 | u16 sep_rtpi; |
@@ -867,6 +882,7 @@ struct se_port { | |||
867 | } ____cacheline_aligned; | 882 | } ____cacheline_aligned; |
868 | 883 | ||
869 | struct se_tpg_np { | 884 | struct se_tpg_np { |
885 | struct se_portal_group *tpg_np_parent; | ||
870 | struct config_group tpg_np_group; | 886 | struct config_group tpg_np_group; |
871 | } ____cacheline_aligned; | 887 | } ____cacheline_aligned; |
872 | 888 | ||
diff --git a/include/target/target_core_transport.h b/include/target/target_core_transport.h index 66f44e56eb80..246940511579 100644 --- a/include/target/target_core_transport.h +++ b/include/target/target_core_transport.h | |||
@@ -111,6 +111,8 @@ struct se_subsystem_api; | |||
111 | 111 | ||
112 | extern int init_se_global(void); | 112 | extern int init_se_global(void); |
113 | extern void release_se_global(void); | 113 | extern void release_se_global(void); |
114 | extern void init_scsi_index_table(void); | ||
115 | extern u32 scsi_get_new_index(scsi_index_t); | ||
114 | extern void transport_init_queue_obj(struct se_queue_obj *); | 116 | extern void transport_init_queue_obj(struct se_queue_obj *); |
115 | extern int transport_subsystem_check_init(void); | 117 | extern int transport_subsystem_check_init(void); |
116 | extern int transport_subsystem_register(struct se_subsystem_api *); | 118 | extern int transport_subsystem_register(struct se_subsystem_api *); |
diff --git a/include/trace/events/block.h b/include/trace/events/block.h index aba421d68f6f..78f18adb49c8 100644 --- a/include/trace/events/block.h +++ b/include/trace/events/block.h | |||
@@ -31,7 +31,7 @@ DECLARE_EVENT_CLASS(block_rq_with_error, | |||
31 | 0 : blk_rq_sectors(rq); | 31 | 0 : blk_rq_sectors(rq); |
32 | __entry->errors = rq->errors; | 32 | __entry->errors = rq->errors; |
33 | 33 | ||
34 | blk_fill_rwbs_rq(__entry->rwbs, rq); | 34 | blk_fill_rwbs(__entry->rwbs, rq->cmd_flags, blk_rq_bytes(rq)); |
35 | blk_dump_cmd(__get_str(cmd), rq); | 35 | blk_dump_cmd(__get_str(cmd), rq); |
36 | ), | 36 | ), |
37 | 37 | ||
@@ -118,7 +118,7 @@ DECLARE_EVENT_CLASS(block_rq, | |||
118 | __entry->bytes = (rq->cmd_type == REQ_TYPE_BLOCK_PC) ? | 118 | __entry->bytes = (rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
119 | blk_rq_bytes(rq) : 0; | 119 | blk_rq_bytes(rq) : 0; |
120 | 120 | ||
121 | blk_fill_rwbs_rq(__entry->rwbs, rq); | 121 | blk_fill_rwbs(__entry->rwbs, rq->cmd_flags, blk_rq_bytes(rq)); |
122 | blk_dump_cmd(__get_str(cmd), rq); | 122 | blk_dump_cmd(__get_str(cmd), rq); |
123 | memcpy(__entry->comm, current->comm, TASK_COMM_LEN); | 123 | memcpy(__entry->comm, current->comm, TASK_COMM_LEN); |
124 | ), | 124 | ), |
@@ -563,7 +563,7 @@ TRACE_EVENT(block_rq_remap, | |||
563 | __entry->nr_sector = blk_rq_sectors(rq); | 563 | __entry->nr_sector = blk_rq_sectors(rq); |
564 | __entry->old_dev = dev; | 564 | __entry->old_dev = dev; |
565 | __entry->old_sector = from; | 565 | __entry->old_sector = from; |
566 | blk_fill_rwbs_rq(__entry->rwbs, rq); | 566 | blk_fill_rwbs(__entry->rwbs, rq->cmd_flags, blk_rq_bytes(rq)); |
567 | ), | 567 | ), |
568 | 568 | ||
569 | TP_printk("%d,%d %s %llu + %u <- (%d,%d) %llu", | 569 | TP_printk("%d,%d %s %llu + %u <- (%d,%d) %llu", |
diff --git a/kernel/cpuset.c b/kernel/cpuset.c index 4349935c2ad8..e92e98189032 100644 --- a/kernel/cpuset.c +++ b/kernel/cpuset.c | |||
@@ -1575,8 +1575,10 @@ static int cpuset_write_resmask(struct cgroup *cgrp, struct cftype *cft, | |||
1575 | return -ENODEV; | 1575 | return -ENODEV; |
1576 | 1576 | ||
1577 | trialcs = alloc_trial_cpuset(cs); | 1577 | trialcs = alloc_trial_cpuset(cs); |
1578 | if (!trialcs) | 1578 | if (!trialcs) { |
1579 | return -ENOMEM; | 1579 | retval = -ENOMEM; |
1580 | goto out; | ||
1581 | } | ||
1580 | 1582 | ||
1581 | switch (cft->private) { | 1583 | switch (cft->private) { |
1582 | case FILE_CPULIST: | 1584 | case FILE_CPULIST: |
@@ -1591,6 +1593,7 @@ static int cpuset_write_resmask(struct cgroup *cgrp, struct cftype *cft, | |||
1591 | } | 1593 | } |
1592 | 1594 | ||
1593 | free_trial_cpuset(trialcs); | 1595 | free_trial_cpuset(trialcs); |
1596 | out: | ||
1594 | cgroup_unlock(); | 1597 | cgroup_unlock(); |
1595 | return retval; | 1598 | return retval; |
1596 | } | 1599 | } |
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 4571ae7e085a..99c3bc8a6fb4 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h | |||
@@ -3,6 +3,12 @@ | |||
3 | */ | 3 | */ |
4 | #include <linux/irqdesc.h> | 4 | #include <linux/irqdesc.h> |
5 | 5 | ||
6 | #ifdef CONFIG_SPARSE_IRQ | ||
7 | # define IRQ_BITMAP_BITS (NR_IRQS + 8196) | ||
8 | #else | ||
9 | # define IRQ_BITMAP_BITS NR_IRQS | ||
10 | #endif | ||
11 | |||
6 | extern int noirqdebug; | 12 | extern int noirqdebug; |
7 | 13 | ||
8 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) | 14 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) |
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index 282f20230e67..2039bea31bdf 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c | |||
@@ -94,7 +94,7 @@ int nr_irqs = NR_IRQS; | |||
94 | EXPORT_SYMBOL_GPL(nr_irqs); | 94 | EXPORT_SYMBOL_GPL(nr_irqs); |
95 | 95 | ||
96 | static DEFINE_MUTEX(sparse_irq_lock); | 96 | static DEFINE_MUTEX(sparse_irq_lock); |
97 | static DECLARE_BITMAP(allocated_irqs, NR_IRQS); | 97 | static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS); |
98 | 98 | ||
99 | #ifdef CONFIG_SPARSE_IRQ | 99 | #ifdef CONFIG_SPARSE_IRQ |
100 | 100 | ||
@@ -217,6 +217,15 @@ int __init early_irq_init(void) | |||
217 | initcnt = arch_probe_nr_irqs(); | 217 | initcnt = arch_probe_nr_irqs(); |
218 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt); | 218 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt); |
219 | 219 | ||
220 | if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS)) | ||
221 | nr_irqs = IRQ_BITMAP_BITS; | ||
222 | |||
223 | if (WARN_ON(initcnt > IRQ_BITMAP_BITS)) | ||
224 | initcnt = IRQ_BITMAP_BITS; | ||
225 | |||
226 | if (initcnt > nr_irqs) | ||
227 | nr_irqs = initcnt; | ||
228 | |||
220 | for (i = 0; i < initcnt; i++) { | 229 | for (i = 0; i < initcnt; i++) { |
221 | desc = alloc_desc(i, node); | 230 | desc = alloc_desc(i, node); |
222 | set_bit(i, allocated_irqs); | 231 | set_bit(i, allocated_irqs); |
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 0caa59f747dd..9033c1c70828 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c | |||
@@ -1100,7 +1100,7 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler, | |||
1100 | if (retval) | 1100 | if (retval) |
1101 | kfree(action); | 1101 | kfree(action); |
1102 | 1102 | ||
1103 | #ifdef CONFIG_DEBUG_SHIRQ | 1103 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
1104 | if (!retval && (irqflags & IRQF_SHARED)) { | 1104 | if (!retval && (irqflags & IRQF_SHARED)) { |
1105 | /* | 1105 | /* |
1106 | * It's a shared IRQ -- the driver ought to be prepared for it | 1106 | * It's a shared IRQ -- the driver ought to be prepared for it |
diff --git a/kernel/irq/resend.c b/kernel/irq/resend.c index 891115a929aa..dc49358b73fa 100644 --- a/kernel/irq/resend.c +++ b/kernel/irq/resend.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #ifdef CONFIG_HARDIRQS_SW_RESEND | 23 | #ifdef CONFIG_HARDIRQS_SW_RESEND |
24 | 24 | ||
25 | /* Bitmap to handle software resend of interrupts: */ | 25 | /* Bitmap to handle software resend of interrupts: */ |
26 | static DECLARE_BITMAP(irqs_resend, NR_IRQS); | 26 | static DECLARE_BITMAP(irqs_resend, IRQ_BITMAP_BITS); |
27 | 27 | ||
28 | /* | 28 | /* |
29 | * Run software resends of IRQ's | 29 | * Run software resends of IRQ's |
diff --git a/kernel/perf_event.c b/kernel/perf_event.c index 999835b6112b..656222fcf767 100644 --- a/kernel/perf_event.c +++ b/kernel/perf_event.c | |||
@@ -782,6 +782,10 @@ retry: | |||
782 | raw_spin_unlock_irq(&ctx->lock); | 782 | raw_spin_unlock_irq(&ctx->lock); |
783 | } | 783 | } |
784 | 784 | ||
785 | #define MAX_INTERRUPTS (~0ULL) | ||
786 | |||
787 | static void perf_log_throttle(struct perf_event *event, int enable); | ||
788 | |||
785 | static int | 789 | static int |
786 | event_sched_in(struct perf_event *event, | 790 | event_sched_in(struct perf_event *event, |
787 | struct perf_cpu_context *cpuctx, | 791 | struct perf_cpu_context *cpuctx, |
@@ -794,6 +798,17 @@ event_sched_in(struct perf_event *event, | |||
794 | 798 | ||
795 | event->state = PERF_EVENT_STATE_ACTIVE; | 799 | event->state = PERF_EVENT_STATE_ACTIVE; |
796 | event->oncpu = smp_processor_id(); | 800 | event->oncpu = smp_processor_id(); |
801 | |||
802 | /* | ||
803 | * Unthrottle events, since we scheduled we might have missed several | ||
804 | * ticks already, also for a heavily scheduling task there is little | ||
805 | * guarantee it'll get a tick in a timely manner. | ||
806 | */ | ||
807 | if (unlikely(event->hw.interrupts == MAX_INTERRUPTS)) { | ||
808 | perf_log_throttle(event, 1); | ||
809 | event->hw.interrupts = 0; | ||
810 | } | ||
811 | |||
797 | /* | 812 | /* |
798 | * The new state must be visible before we turn it on in the hardware: | 813 | * The new state must be visible before we turn it on in the hardware: |
799 | */ | 814 | */ |
@@ -1596,10 +1611,6 @@ void __perf_event_task_sched_in(struct task_struct *task) | |||
1596 | } | 1611 | } |
1597 | } | 1612 | } |
1598 | 1613 | ||
1599 | #define MAX_INTERRUPTS (~0ULL) | ||
1600 | |||
1601 | static void perf_log_throttle(struct perf_event *event, int enable); | ||
1602 | |||
1603 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) | 1614 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) |
1604 | { | 1615 | { |
1605 | u64 frequency = event->attr.sample_freq; | 1616 | u64 frequency = event->attr.sample_freq; |
diff --git a/kernel/power/main.c b/kernel/power/main.c index 7b5db6a8561e..701853042c28 100644 --- a/kernel/power/main.c +++ b/kernel/power/main.c | |||
@@ -326,7 +326,7 @@ EXPORT_SYMBOL_GPL(pm_wq); | |||
326 | 326 | ||
327 | static int __init pm_start_workqueue(void) | 327 | static int __init pm_start_workqueue(void) |
328 | { | 328 | { |
329 | pm_wq = alloc_workqueue("pm", WQ_FREEZEABLE, 0); | 329 | pm_wq = alloc_workqueue("pm", WQ_FREEZABLE, 0); |
330 | 330 | ||
331 | return pm_wq ? 0 : -ENOMEM; | 331 | return pm_wq ? 0 : -ENOMEM; |
332 | } | 332 | } |
diff --git a/kernel/power/process.c b/kernel/power/process.c index d6d2a10320e0..0cf3a27a6c9d 100644 --- a/kernel/power/process.c +++ b/kernel/power/process.c | |||
@@ -22,7 +22,7 @@ | |||
22 | */ | 22 | */ |
23 | #define TIMEOUT (20 * HZ) | 23 | #define TIMEOUT (20 * HZ) |
24 | 24 | ||
25 | static inline int freezeable(struct task_struct * p) | 25 | static inline int freezable(struct task_struct * p) |
26 | { | 26 | { |
27 | if ((p == current) || | 27 | if ((p == current) || |
28 | (p->flags & PF_NOFREEZE) || | 28 | (p->flags & PF_NOFREEZE) || |
@@ -53,7 +53,7 @@ static int try_to_freeze_tasks(bool sig_only) | |||
53 | todo = 0; | 53 | todo = 0; |
54 | read_lock(&tasklist_lock); | 54 | read_lock(&tasklist_lock); |
55 | do_each_thread(g, p) { | 55 | do_each_thread(g, p) { |
56 | if (frozen(p) || !freezeable(p)) | 56 | if (frozen(p) || !freezable(p)) |
57 | continue; | 57 | continue; |
58 | 58 | ||
59 | if (!freeze_task(p, sig_only)) | 59 | if (!freeze_task(p, sig_only)) |
@@ -167,7 +167,7 @@ static void thaw_tasks(bool nosig_only) | |||
167 | 167 | ||
168 | read_lock(&tasklist_lock); | 168 | read_lock(&tasklist_lock); |
169 | do_each_thread(g, p) { | 169 | do_each_thread(g, p) { |
170 | if (!freezeable(p)) | 170 | if (!freezable(p)) |
171 | continue; | 171 | continue; |
172 | 172 | ||
173 | if (nosig_only && should_send_signal(p)) | 173 | if (nosig_only && should_send_signal(p)) |
diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c index 0dac75ea4456..64db648ff911 100644 --- a/kernel/power/snapshot.c +++ b/kernel/power/snapshot.c | |||
@@ -1519,11 +1519,8 @@ static int | |||
1519 | swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm, | 1519 | swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm, |
1520 | unsigned int nr_pages, unsigned int nr_highmem) | 1520 | unsigned int nr_pages, unsigned int nr_highmem) |
1521 | { | 1521 | { |
1522 | int error = 0; | ||
1523 | |||
1524 | if (nr_highmem > 0) { | 1522 | if (nr_highmem > 0) { |
1525 | error = get_highmem_buffer(PG_ANY); | 1523 | if (get_highmem_buffer(PG_ANY)) |
1526 | if (error) | ||
1527 | goto err_out; | 1524 | goto err_out; |
1528 | if (nr_highmem > alloc_highmem) { | 1525 | if (nr_highmem > alloc_highmem) { |
1529 | nr_highmem -= alloc_highmem; | 1526 | nr_highmem -= alloc_highmem; |
@@ -1546,7 +1543,7 @@ swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm, | |||
1546 | 1543 | ||
1547 | err_out: | 1544 | err_out: |
1548 | swsusp_free(); | 1545 | swsusp_free(); |
1549 | return error; | 1546 | return -ENOMEM; |
1550 | } | 1547 | } |
1551 | 1548 | ||
1552 | asmlinkage int swsusp_save(void) | 1549 | asmlinkage int swsusp_save(void) |
diff --git a/kernel/ptrace.c b/kernel/ptrace.c index 1708b1e2972d..e2302e40b360 100644 --- a/kernel/ptrace.c +++ b/kernel/ptrace.c | |||
@@ -163,7 +163,7 @@ bool ptrace_may_access(struct task_struct *task, unsigned int mode) | |||
163 | return !err; | 163 | return !err; |
164 | } | 164 | } |
165 | 165 | ||
166 | int ptrace_attach(struct task_struct *task) | 166 | static int ptrace_attach(struct task_struct *task) |
167 | { | 167 | { |
168 | int retval; | 168 | int retval; |
169 | 169 | ||
@@ -219,7 +219,7 @@ out: | |||
219 | * Performs checks and sets PT_PTRACED. | 219 | * Performs checks and sets PT_PTRACED. |
220 | * Should be used by all ptrace implementations for PTRACE_TRACEME. | 220 | * Should be used by all ptrace implementations for PTRACE_TRACEME. |
221 | */ | 221 | */ |
222 | int ptrace_traceme(void) | 222 | static int ptrace_traceme(void) |
223 | { | 223 | { |
224 | int ret = -EPERM; | 224 | int ret = -EPERM; |
225 | 225 | ||
@@ -293,7 +293,7 @@ static bool __ptrace_detach(struct task_struct *tracer, struct task_struct *p) | |||
293 | return false; | 293 | return false; |
294 | } | 294 | } |
295 | 295 | ||
296 | int ptrace_detach(struct task_struct *child, unsigned int data) | 296 | static int ptrace_detach(struct task_struct *child, unsigned int data) |
297 | { | 297 | { |
298 | bool dead = false; | 298 | bool dead = false; |
299 | 299 | ||
diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c index 48b2761b5668..a3b5aff62606 100644 --- a/kernel/time/tick-broadcast.c +++ b/kernel/time/tick-broadcast.c | |||
@@ -600,4 +600,14 @@ int tick_broadcast_oneshot_active(void) | |||
600 | return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT; | 600 | return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT; |
601 | } | 601 | } |
602 | 602 | ||
603 | /* | ||
604 | * Check whether the broadcast device supports oneshot. | ||
605 | */ | ||
606 | bool tick_broadcast_oneshot_available(void) | ||
607 | { | ||
608 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | ||
609 | |||
610 | return bc ? bc->features & CLOCK_EVT_FEAT_ONESHOT : false; | ||
611 | } | ||
612 | |||
603 | #endif | 613 | #endif |
diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c index 051bc80a0c43..ed228ef6f6b8 100644 --- a/kernel/time/tick-common.c +++ b/kernel/time/tick-common.c | |||
@@ -51,7 +51,11 @@ int tick_is_oneshot_available(void) | |||
51 | { | 51 | { |
52 | struct clock_event_device *dev = __this_cpu_read(tick_cpu_device.evtdev); | 52 | struct clock_event_device *dev = __this_cpu_read(tick_cpu_device.evtdev); |
53 | 53 | ||
54 | return dev && (dev->features & CLOCK_EVT_FEAT_ONESHOT); | 54 | if (!dev || !(dev->features & CLOCK_EVT_FEAT_ONESHOT)) |
55 | return 0; | ||
56 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) | ||
57 | return 1; | ||
58 | return tick_broadcast_oneshot_available(); | ||
55 | } | 59 | } |
56 | 60 | ||
57 | /* | 61 | /* |
diff --git a/kernel/time/tick-internal.h b/kernel/time/tick-internal.h index 290eefbc1f60..f65d3a723a64 100644 --- a/kernel/time/tick-internal.h +++ b/kernel/time/tick-internal.h | |||
@@ -36,6 +36,7 @@ extern void tick_shutdown_broadcast_oneshot(unsigned int *cpup); | |||
36 | extern int tick_resume_broadcast_oneshot(struct clock_event_device *bc); | 36 | extern int tick_resume_broadcast_oneshot(struct clock_event_device *bc); |
37 | extern int tick_broadcast_oneshot_active(void); | 37 | extern int tick_broadcast_oneshot_active(void); |
38 | extern void tick_check_oneshot_broadcast(int cpu); | 38 | extern void tick_check_oneshot_broadcast(int cpu); |
39 | bool tick_broadcast_oneshot_available(void); | ||
39 | # else /* BROADCAST */ | 40 | # else /* BROADCAST */ |
40 | static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc) | 41 | static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc) |
41 | { | 42 | { |
@@ -46,6 +47,7 @@ static inline void tick_broadcast_switch_to_oneshot(void) { } | |||
46 | static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { } | 47 | static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { } |
47 | static inline int tick_broadcast_oneshot_active(void) { return 0; } | 48 | static inline int tick_broadcast_oneshot_active(void) { return 0; } |
48 | static inline void tick_check_oneshot_broadcast(int cpu) { } | 49 | static inline void tick_check_oneshot_broadcast(int cpu) { } |
50 | static inline bool tick_broadcast_oneshot_available(void) { return true; } | ||
49 | # endif /* !BROADCAST */ | 51 | # endif /* !BROADCAST */ |
50 | 52 | ||
51 | #else /* !ONESHOT */ | 53 | #else /* !ONESHOT */ |
@@ -76,6 +78,7 @@ static inline int tick_resume_broadcast_oneshot(struct clock_event_device *bc) | |||
76 | return 0; | 78 | return 0; |
77 | } | 79 | } |
78 | static inline int tick_broadcast_oneshot_active(void) { return 0; } | 80 | static inline int tick_broadcast_oneshot_active(void) { return 0; } |
81 | static inline bool tick_broadcast_oneshot_available(void) { return false; } | ||
79 | #endif /* !TICK_ONESHOT */ | 82 | #endif /* !TICK_ONESHOT */ |
80 | 83 | ||
81 | /* | 84 | /* |
diff --git a/kernel/trace/blktrace.c b/kernel/trace/blktrace.c index d95721f33702..cbafed7d4f38 100644 --- a/kernel/trace/blktrace.c +++ b/kernel/trace/blktrace.c | |||
@@ -1827,21 +1827,5 @@ void blk_fill_rwbs(char *rwbs, u32 rw, int bytes) | |||
1827 | rwbs[i] = '\0'; | 1827 | rwbs[i] = '\0'; |
1828 | } | 1828 | } |
1829 | 1829 | ||
1830 | void blk_fill_rwbs_rq(char *rwbs, struct request *rq) | ||
1831 | { | ||
1832 | int rw = rq->cmd_flags & 0x03; | ||
1833 | int bytes; | ||
1834 | |||
1835 | if (rq->cmd_flags & REQ_DISCARD) | ||
1836 | rw |= REQ_DISCARD; | ||
1837 | |||
1838 | if (rq->cmd_flags & REQ_SECURE) | ||
1839 | rw |= REQ_SECURE; | ||
1840 | |||
1841 | bytes = blk_rq_bytes(rq); | ||
1842 | |||
1843 | blk_fill_rwbs(rwbs, rw, bytes); | ||
1844 | } | ||
1845 | |||
1846 | #endif /* CONFIG_EVENT_TRACING */ | 1830 | #endif /* CONFIG_EVENT_TRACING */ |
1847 | 1831 | ||
diff --git a/kernel/workqueue.c b/kernel/workqueue.c index 11869faa6819..ee6578b578ad 100644 --- a/kernel/workqueue.c +++ b/kernel/workqueue.c | |||
@@ -79,7 +79,9 @@ enum { | |||
79 | MAX_IDLE_WORKERS_RATIO = 4, /* 1/4 of busy can be idle */ | 79 | MAX_IDLE_WORKERS_RATIO = 4, /* 1/4 of busy can be idle */ |
80 | IDLE_WORKER_TIMEOUT = 300 * HZ, /* keep idle ones for 5 mins */ | 80 | IDLE_WORKER_TIMEOUT = 300 * HZ, /* keep idle ones for 5 mins */ |
81 | 81 | ||
82 | MAYDAY_INITIAL_TIMEOUT = HZ / 100, /* call for help after 10ms */ | 82 | MAYDAY_INITIAL_TIMEOUT = HZ / 100 >= 2 ? HZ / 100 : 2, |
83 | /* call for help after 10ms | ||
84 | (min two ticks) */ | ||
83 | MAYDAY_INTERVAL = HZ / 10, /* and then every 100ms */ | 85 | MAYDAY_INTERVAL = HZ / 10, /* and then every 100ms */ |
84 | CREATE_COOLDOWN = HZ, /* time to breath after fail */ | 86 | CREATE_COOLDOWN = HZ, /* time to breath after fail */ |
85 | TRUSTEE_COOLDOWN = HZ / 10, /* for trustee draining */ | 87 | TRUSTEE_COOLDOWN = HZ / 10, /* for trustee draining */ |
@@ -2047,6 +2049,15 @@ repeat: | |||
2047 | move_linked_works(work, scheduled, &n); | 2049 | move_linked_works(work, scheduled, &n); |
2048 | 2050 | ||
2049 | process_scheduled_works(rescuer); | 2051 | process_scheduled_works(rescuer); |
2052 | |||
2053 | /* | ||
2054 | * Leave this gcwq. If keep_working() is %true, notify a | ||
2055 | * regular worker; otherwise, we end up with 0 concurrency | ||
2056 | * and stalling the execution. | ||
2057 | */ | ||
2058 | if (keep_working(gcwq)) | ||
2059 | wake_up_worker(gcwq); | ||
2060 | |||
2050 | spin_unlock_irq(&gcwq->lock); | 2061 | spin_unlock_irq(&gcwq->lock); |
2051 | } | 2062 | } |
2052 | 2063 | ||
@@ -2956,7 +2967,7 @@ struct workqueue_struct *__alloc_workqueue_key(const char *name, | |||
2956 | */ | 2967 | */ |
2957 | spin_lock(&workqueue_lock); | 2968 | spin_lock(&workqueue_lock); |
2958 | 2969 | ||
2959 | if (workqueue_freezing && wq->flags & WQ_FREEZEABLE) | 2970 | if (workqueue_freezing && wq->flags & WQ_FREEZABLE) |
2960 | for_each_cwq_cpu(cpu, wq) | 2971 | for_each_cwq_cpu(cpu, wq) |
2961 | get_cwq(cpu, wq)->max_active = 0; | 2972 | get_cwq(cpu, wq)->max_active = 0; |
2962 | 2973 | ||
@@ -3068,7 +3079,7 @@ void workqueue_set_max_active(struct workqueue_struct *wq, int max_active) | |||
3068 | 3079 | ||
3069 | spin_lock_irq(&gcwq->lock); | 3080 | spin_lock_irq(&gcwq->lock); |
3070 | 3081 | ||
3071 | if (!(wq->flags & WQ_FREEZEABLE) || | 3082 | if (!(wq->flags & WQ_FREEZABLE) || |
3072 | !(gcwq->flags & GCWQ_FREEZING)) | 3083 | !(gcwq->flags & GCWQ_FREEZING)) |
3073 | get_cwq(gcwq->cpu, wq)->max_active = max_active; | 3084 | get_cwq(gcwq->cpu, wq)->max_active = max_active; |
3074 | 3085 | ||
@@ -3318,7 +3329,7 @@ static int __cpuinit trustee_thread(void *__gcwq) | |||
3318 | * want to get it over with ASAP - spam rescuers, wake up as | 3329 | * want to get it over with ASAP - spam rescuers, wake up as |
3319 | * many idlers as necessary and create new ones till the | 3330 | * many idlers as necessary and create new ones till the |
3320 | * worklist is empty. Note that if the gcwq is frozen, there | 3331 | * worklist is empty. Note that if the gcwq is frozen, there |
3321 | * may be frozen works in freezeable cwqs. Don't declare | 3332 | * may be frozen works in freezable cwqs. Don't declare |
3322 | * completion while frozen. | 3333 | * completion while frozen. |
3323 | */ | 3334 | */ |
3324 | while (gcwq->nr_workers != gcwq->nr_idle || | 3335 | while (gcwq->nr_workers != gcwq->nr_idle || |
@@ -3576,9 +3587,9 @@ EXPORT_SYMBOL_GPL(work_on_cpu); | |||
3576 | /** | 3587 | /** |
3577 | * freeze_workqueues_begin - begin freezing workqueues | 3588 | * freeze_workqueues_begin - begin freezing workqueues |
3578 | * | 3589 | * |
3579 | * Start freezing workqueues. After this function returns, all | 3590 | * Start freezing workqueues. After this function returns, all freezable |
3580 | * freezeable workqueues will queue new works to their frozen_works | 3591 | * workqueues will queue new works to their frozen_works list instead of |
3581 | * list instead of gcwq->worklist. | 3592 | * gcwq->worklist. |
3582 | * | 3593 | * |
3583 | * CONTEXT: | 3594 | * CONTEXT: |
3584 | * Grabs and releases workqueue_lock and gcwq->lock's. | 3595 | * Grabs and releases workqueue_lock and gcwq->lock's. |
@@ -3604,7 +3615,7 @@ void freeze_workqueues_begin(void) | |||
3604 | list_for_each_entry(wq, &workqueues, list) { | 3615 | list_for_each_entry(wq, &workqueues, list) { |
3605 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); | 3616 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); |
3606 | 3617 | ||
3607 | if (cwq && wq->flags & WQ_FREEZEABLE) | 3618 | if (cwq && wq->flags & WQ_FREEZABLE) |
3608 | cwq->max_active = 0; | 3619 | cwq->max_active = 0; |
3609 | } | 3620 | } |
3610 | 3621 | ||
@@ -3615,7 +3626,7 @@ void freeze_workqueues_begin(void) | |||
3615 | } | 3626 | } |
3616 | 3627 | ||
3617 | /** | 3628 | /** |
3618 | * freeze_workqueues_busy - are freezeable workqueues still busy? | 3629 | * freeze_workqueues_busy - are freezable workqueues still busy? |
3619 | * | 3630 | * |
3620 | * Check whether freezing is complete. This function must be called | 3631 | * Check whether freezing is complete. This function must be called |
3621 | * between freeze_workqueues_begin() and thaw_workqueues(). | 3632 | * between freeze_workqueues_begin() and thaw_workqueues(). |
@@ -3624,8 +3635,8 @@ void freeze_workqueues_begin(void) | |||
3624 | * Grabs and releases workqueue_lock. | 3635 | * Grabs and releases workqueue_lock. |
3625 | * | 3636 | * |
3626 | * RETURNS: | 3637 | * RETURNS: |
3627 | * %true if some freezeable workqueues are still busy. %false if | 3638 | * %true if some freezable workqueues are still busy. %false if freezing |
3628 | * freezing is complete. | 3639 | * is complete. |
3629 | */ | 3640 | */ |
3630 | bool freeze_workqueues_busy(void) | 3641 | bool freeze_workqueues_busy(void) |
3631 | { | 3642 | { |
@@ -3645,7 +3656,7 @@ bool freeze_workqueues_busy(void) | |||
3645 | list_for_each_entry(wq, &workqueues, list) { | 3656 | list_for_each_entry(wq, &workqueues, list) { |
3646 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); | 3657 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); |
3647 | 3658 | ||
3648 | if (!cwq || !(wq->flags & WQ_FREEZEABLE)) | 3659 | if (!cwq || !(wq->flags & WQ_FREEZABLE)) |
3649 | continue; | 3660 | continue; |
3650 | 3661 | ||
3651 | BUG_ON(cwq->nr_active < 0); | 3662 | BUG_ON(cwq->nr_active < 0); |
@@ -3690,7 +3701,7 @@ void thaw_workqueues(void) | |||
3690 | list_for_each_entry(wq, &workqueues, list) { | 3701 | list_for_each_entry(wq, &workqueues, list) { |
3691 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); | 3702 | struct cpu_workqueue_struct *cwq = get_cwq(cpu, wq); |
3692 | 3703 | ||
3693 | if (!cwq || !(wq->flags & WQ_FREEZEABLE)) | 3704 | if (!cwq || !(wq->flags & WQ_FREEZABLE)) |
3694 | continue; | 3705 | continue; |
3695 | 3706 | ||
3696 | /* restore max_active and repopulate worklist */ | 3707 | /* restore max_active and repopulate worklist */ |
diff --git a/lib/list_debug.c b/lib/list_debug.c index 344c710d16ca..b8029a5583ff 100644 --- a/lib/list_debug.c +++ b/lib/list_debug.c | |||
@@ -35,6 +35,31 @@ void __list_add(struct list_head *new, | |||
35 | } | 35 | } |
36 | EXPORT_SYMBOL(__list_add); | 36 | EXPORT_SYMBOL(__list_add); |
37 | 37 | ||
38 | void __list_del_entry(struct list_head *entry) | ||
39 | { | ||
40 | struct list_head *prev, *next; | ||
41 | |||
42 | prev = entry->prev; | ||
43 | next = entry->next; | ||
44 | |||
45 | if (WARN(next == LIST_POISON1, | ||
46 | "list_del corruption, %p->next is LIST_POISON1 (%p)\n", | ||
47 | entry, LIST_POISON1) || | ||
48 | WARN(prev == LIST_POISON2, | ||
49 | "list_del corruption, %p->prev is LIST_POISON2 (%p)\n", | ||
50 | entry, LIST_POISON2) || | ||
51 | WARN(prev->next != entry, | ||
52 | "list_del corruption. prev->next should be %p, " | ||
53 | "but was %p\n", entry, prev->next) || | ||
54 | WARN(next->prev != entry, | ||
55 | "list_del corruption. next->prev should be %p, " | ||
56 | "but was %p\n", entry, next->prev)) | ||
57 | return; | ||
58 | |||
59 | __list_del(prev, next); | ||
60 | } | ||
61 | EXPORT_SYMBOL(__list_del_entry); | ||
62 | |||
38 | /** | 63 | /** |
39 | * list_del - deletes entry from list. | 64 | * list_del - deletes entry from list. |
40 | * @entry: the element to delete from the list. | 65 | * @entry: the element to delete from the list. |
@@ -43,19 +68,7 @@ EXPORT_SYMBOL(__list_add); | |||
43 | */ | 68 | */ |
44 | void list_del(struct list_head *entry) | 69 | void list_del(struct list_head *entry) |
45 | { | 70 | { |
46 | WARN(entry->next == LIST_POISON1, | 71 | __list_del_entry(entry); |
47 | "list_del corruption, next is LIST_POISON1 (%p)\n", | ||
48 | LIST_POISON1); | ||
49 | WARN(entry->next != LIST_POISON1 && entry->prev == LIST_POISON2, | ||
50 | "list_del corruption, prev is LIST_POISON2 (%p)\n", | ||
51 | LIST_POISON2); | ||
52 | WARN(entry->prev->next != entry, | ||
53 | "list_del corruption. prev->next should be %p, " | ||
54 | "but was %p\n", entry, entry->prev->next); | ||
55 | WARN(entry->next->prev != entry, | ||
56 | "list_del corruption. next->prev should be %p, " | ||
57 | "but was %p\n", entry, entry->next->prev); | ||
58 | __list_del(entry->prev, entry->next); | ||
59 | entry->next = LIST_POISON1; | 72 | entry->next = LIST_POISON1; |
60 | entry->prev = LIST_POISON2; | 73 | entry->prev = LIST_POISON2; |
61 | } | 74 | } |
diff --git a/lib/nlattr.c b/lib/nlattr.c index 5021cbc34411..ac09f2226dc7 100644 --- a/lib/nlattr.c +++ b/lib/nlattr.c | |||
@@ -148,7 +148,7 @@ nla_policy_len(const struct nla_policy *p, int n) | |||
148 | { | 148 | { |
149 | int i, len = 0; | 149 | int i, len = 0; |
150 | 150 | ||
151 | for (i = 0; i < n; i++) { | 151 | for (i = 0; i < n; i++, p++) { |
152 | if (p->len) | 152 | if (p->len) |
153 | len += nla_total_size(p->len); | 153 | len += nla_total_size(p->len); |
154 | else if (nla_attr_minlen[p->type]) | 154 | else if (nla_attr_minlen[p->type]) |
diff --git a/lib/swiotlb.c b/lib/swiotlb.c index c47bbe11b804..93ca08b8a451 100644 --- a/lib/swiotlb.c +++ b/lib/swiotlb.c | |||
@@ -686,8 +686,10 @@ dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, | |||
686 | /* | 686 | /* |
687 | * Ensure that the address returned is DMA'ble | 687 | * Ensure that the address returned is DMA'ble |
688 | */ | 688 | */ |
689 | if (!dma_capable(dev, dev_addr, size)) | 689 | if (!dma_capable(dev, dev_addr, size)) { |
690 | panic("map_single: bounce buffer is not DMA'ble"); | 690 | swiotlb_tbl_unmap_single(dev, map, size, dir); |
691 | dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer); | ||
692 | } | ||
691 | 693 | ||
692 | return dev_addr; | 694 | return dev_addr; |
693 | } | 695 | } |
diff --git a/mm/huge_memory.c b/mm/huge_memory.c index 3e29781ee762..dbe99a5f2073 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c | |||
@@ -650,10 +650,10 @@ static inline gfp_t alloc_hugepage_gfpmask(int defrag) | |||
650 | 650 | ||
651 | static inline struct page *alloc_hugepage_vma(int defrag, | 651 | static inline struct page *alloc_hugepage_vma(int defrag, |
652 | struct vm_area_struct *vma, | 652 | struct vm_area_struct *vma, |
653 | unsigned long haddr) | 653 | unsigned long haddr, int nd) |
654 | { | 654 | { |
655 | return alloc_pages_vma(alloc_hugepage_gfpmask(defrag), | 655 | return alloc_pages_vma(alloc_hugepage_gfpmask(defrag), |
656 | HPAGE_PMD_ORDER, vma, haddr); | 656 | HPAGE_PMD_ORDER, vma, haddr, nd); |
657 | } | 657 | } |
658 | 658 | ||
659 | #ifndef CONFIG_NUMA | 659 | #ifndef CONFIG_NUMA |
@@ -678,7 +678,7 @@ int do_huge_pmd_anonymous_page(struct mm_struct *mm, struct vm_area_struct *vma, | |||
678 | if (unlikely(khugepaged_enter(vma))) | 678 | if (unlikely(khugepaged_enter(vma))) |
679 | return VM_FAULT_OOM; | 679 | return VM_FAULT_OOM; |
680 | page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), | 680 | page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), |
681 | vma, haddr); | 681 | vma, haddr, numa_node_id()); |
682 | if (unlikely(!page)) | 682 | if (unlikely(!page)) |
683 | goto out; | 683 | goto out; |
684 | if (unlikely(mem_cgroup_newpage_charge(page, mm, GFP_KERNEL))) { | 684 | if (unlikely(mem_cgroup_newpage_charge(page, mm, GFP_KERNEL))) { |
@@ -799,8 +799,8 @@ static int do_huge_pmd_wp_page_fallback(struct mm_struct *mm, | |||
799 | } | 799 | } |
800 | 800 | ||
801 | for (i = 0; i < HPAGE_PMD_NR; i++) { | 801 | for (i = 0; i < HPAGE_PMD_NR; i++) { |
802 | pages[i] = alloc_page_vma(GFP_HIGHUSER_MOVABLE, | 802 | pages[i] = alloc_page_vma_node(GFP_HIGHUSER_MOVABLE, |
803 | vma, address); | 803 | vma, address, page_to_nid(page)); |
804 | if (unlikely(!pages[i] || | 804 | if (unlikely(!pages[i] || |
805 | mem_cgroup_newpage_charge(pages[i], mm, | 805 | mem_cgroup_newpage_charge(pages[i], mm, |
806 | GFP_KERNEL))) { | 806 | GFP_KERNEL))) { |
@@ -902,7 +902,7 @@ int do_huge_pmd_wp_page(struct mm_struct *mm, struct vm_area_struct *vma, | |||
902 | if (transparent_hugepage_enabled(vma) && | 902 | if (transparent_hugepage_enabled(vma) && |
903 | !transparent_hugepage_debug_cow()) | 903 | !transparent_hugepage_debug_cow()) |
904 | new_page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), | 904 | new_page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), |
905 | vma, haddr); | 905 | vma, haddr, numa_node_id()); |
906 | else | 906 | else |
907 | new_page = NULL; | 907 | new_page = NULL; |
908 | 908 | ||
@@ -1745,7 +1745,8 @@ static void __collapse_huge_page_copy(pte_t *pte, struct page *page, | |||
1745 | static void collapse_huge_page(struct mm_struct *mm, | 1745 | static void collapse_huge_page(struct mm_struct *mm, |
1746 | unsigned long address, | 1746 | unsigned long address, |
1747 | struct page **hpage, | 1747 | struct page **hpage, |
1748 | struct vm_area_struct *vma) | 1748 | struct vm_area_struct *vma, |
1749 | int node) | ||
1749 | { | 1750 | { |
1750 | pgd_t *pgd; | 1751 | pgd_t *pgd; |
1751 | pud_t *pud; | 1752 | pud_t *pud; |
@@ -1773,7 +1774,8 @@ static void collapse_huge_page(struct mm_struct *mm, | |||
1773 | * mmap_sem in read mode is good idea also to allow greater | 1774 | * mmap_sem in read mode is good idea also to allow greater |
1774 | * scalability. | 1775 | * scalability. |
1775 | */ | 1776 | */ |
1776 | new_page = alloc_hugepage_vma(khugepaged_defrag(), vma, address); | 1777 | new_page = alloc_hugepage_vma(khugepaged_defrag(), vma, address, |
1778 | node); | ||
1777 | if (unlikely(!new_page)) { | 1779 | if (unlikely(!new_page)) { |
1778 | up_read(&mm->mmap_sem); | 1780 | up_read(&mm->mmap_sem); |
1779 | *hpage = ERR_PTR(-ENOMEM); | 1781 | *hpage = ERR_PTR(-ENOMEM); |
@@ -1919,6 +1921,7 @@ static int khugepaged_scan_pmd(struct mm_struct *mm, | |||
1919 | struct page *page; | 1921 | struct page *page; |
1920 | unsigned long _address; | 1922 | unsigned long _address; |
1921 | spinlock_t *ptl; | 1923 | spinlock_t *ptl; |
1924 | int node = -1; | ||
1922 | 1925 | ||
1923 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | 1926 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); |
1924 | 1927 | ||
@@ -1949,6 +1952,13 @@ static int khugepaged_scan_pmd(struct mm_struct *mm, | |||
1949 | page = vm_normal_page(vma, _address, pteval); | 1952 | page = vm_normal_page(vma, _address, pteval); |
1950 | if (unlikely(!page)) | 1953 | if (unlikely(!page)) |
1951 | goto out_unmap; | 1954 | goto out_unmap; |
1955 | /* | ||
1956 | * Chose the node of the first page. This could | ||
1957 | * be more sophisticated and look at more pages, | ||
1958 | * but isn't for now. | ||
1959 | */ | ||
1960 | if (node == -1) | ||
1961 | node = page_to_nid(page); | ||
1952 | VM_BUG_ON(PageCompound(page)); | 1962 | VM_BUG_ON(PageCompound(page)); |
1953 | if (!PageLRU(page) || PageLocked(page) || !PageAnon(page)) | 1963 | if (!PageLRU(page) || PageLocked(page) || !PageAnon(page)) |
1954 | goto out_unmap; | 1964 | goto out_unmap; |
@@ -1965,7 +1975,7 @@ out_unmap: | |||
1965 | pte_unmap_unlock(pte, ptl); | 1975 | pte_unmap_unlock(pte, ptl); |
1966 | if (ret) | 1976 | if (ret) |
1967 | /* collapse_huge_page will return with the mmap_sem released */ | 1977 | /* collapse_huge_page will return with the mmap_sem released */ |
1968 | collapse_huge_page(mm, address, hpage, vma); | 1978 | collapse_huge_page(mm, address, hpage, vma, node); |
1969 | out: | 1979 | out: |
1970 | return ret; | 1980 | return ret; |
1971 | } | 1981 | } |
diff --git a/mm/memory.c b/mm/memory.c index 8e8c18324863..5823698c2b71 100644 --- a/mm/memory.c +++ b/mm/memory.c | |||
@@ -2648,6 +2648,7 @@ void unmap_mapping_range(struct address_space *mapping, | |||
2648 | details.last_index = ULONG_MAX; | 2648 | details.last_index = ULONG_MAX; |
2649 | details.i_mmap_lock = &mapping->i_mmap_lock; | 2649 | details.i_mmap_lock = &mapping->i_mmap_lock; |
2650 | 2650 | ||
2651 | mutex_lock(&mapping->unmap_mutex); | ||
2651 | spin_lock(&mapping->i_mmap_lock); | 2652 | spin_lock(&mapping->i_mmap_lock); |
2652 | 2653 | ||
2653 | /* Protect against endless unmapping loops */ | 2654 | /* Protect against endless unmapping loops */ |
@@ -2664,6 +2665,7 @@ void unmap_mapping_range(struct address_space *mapping, | |||
2664 | if (unlikely(!list_empty(&mapping->i_mmap_nonlinear))) | 2665 | if (unlikely(!list_empty(&mapping->i_mmap_nonlinear))) |
2665 | unmap_mapping_range_list(&mapping->i_mmap_nonlinear, &details); | 2666 | unmap_mapping_range_list(&mapping->i_mmap_nonlinear, &details); |
2666 | spin_unlock(&mapping->i_mmap_lock); | 2667 | spin_unlock(&mapping->i_mmap_lock); |
2668 | mutex_unlock(&mapping->unmap_mutex); | ||
2667 | } | 2669 | } |
2668 | EXPORT_SYMBOL(unmap_mapping_range); | 2670 | EXPORT_SYMBOL(unmap_mapping_range); |
2669 | 2671 | ||
diff --git a/mm/mempolicy.c b/mm/mempolicy.c index 368fc9d23610..b53ec99f1428 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c | |||
@@ -1524,10 +1524,9 @@ static nodemask_t *policy_nodemask(gfp_t gfp, struct mempolicy *policy) | |||
1524 | } | 1524 | } |
1525 | 1525 | ||
1526 | /* Return a zonelist indicated by gfp for node representing a mempolicy */ | 1526 | /* Return a zonelist indicated by gfp for node representing a mempolicy */ |
1527 | static struct zonelist *policy_zonelist(gfp_t gfp, struct mempolicy *policy) | 1527 | static struct zonelist *policy_zonelist(gfp_t gfp, struct mempolicy *policy, |
1528 | int nd) | ||
1528 | { | 1529 | { |
1529 | int nd = numa_node_id(); | ||
1530 | |||
1531 | switch (policy->mode) { | 1530 | switch (policy->mode) { |
1532 | case MPOL_PREFERRED: | 1531 | case MPOL_PREFERRED: |
1533 | if (!(policy->flags & MPOL_F_LOCAL)) | 1532 | if (!(policy->flags & MPOL_F_LOCAL)) |
@@ -1679,7 +1678,7 @@ struct zonelist *huge_zonelist(struct vm_area_struct *vma, unsigned long addr, | |||
1679 | zl = node_zonelist(interleave_nid(*mpol, vma, addr, | 1678 | zl = node_zonelist(interleave_nid(*mpol, vma, addr, |
1680 | huge_page_shift(hstate_vma(vma))), gfp_flags); | 1679 | huge_page_shift(hstate_vma(vma))), gfp_flags); |
1681 | } else { | 1680 | } else { |
1682 | zl = policy_zonelist(gfp_flags, *mpol); | 1681 | zl = policy_zonelist(gfp_flags, *mpol, numa_node_id()); |
1683 | if ((*mpol)->mode == MPOL_BIND) | 1682 | if ((*mpol)->mode == MPOL_BIND) |
1684 | *nodemask = &(*mpol)->v.nodes; | 1683 | *nodemask = &(*mpol)->v.nodes; |
1685 | } | 1684 | } |
@@ -1820,7 +1819,7 @@ static struct page *alloc_page_interleave(gfp_t gfp, unsigned order, | |||
1820 | */ | 1819 | */ |
1821 | struct page * | 1820 | struct page * |
1822 | alloc_pages_vma(gfp_t gfp, int order, struct vm_area_struct *vma, | 1821 | alloc_pages_vma(gfp_t gfp, int order, struct vm_area_struct *vma, |
1823 | unsigned long addr) | 1822 | unsigned long addr, int node) |
1824 | { | 1823 | { |
1825 | struct mempolicy *pol = get_vma_policy(current, vma, addr); | 1824 | struct mempolicy *pol = get_vma_policy(current, vma, addr); |
1826 | struct zonelist *zl; | 1825 | struct zonelist *zl; |
@@ -1830,13 +1829,13 @@ alloc_pages_vma(gfp_t gfp, int order, struct vm_area_struct *vma, | |||
1830 | if (unlikely(pol->mode == MPOL_INTERLEAVE)) { | 1829 | if (unlikely(pol->mode == MPOL_INTERLEAVE)) { |
1831 | unsigned nid; | 1830 | unsigned nid; |
1832 | 1831 | ||
1833 | nid = interleave_nid(pol, vma, addr, PAGE_SHIFT); | 1832 | nid = interleave_nid(pol, vma, addr, PAGE_SHIFT + order); |
1834 | mpol_cond_put(pol); | 1833 | mpol_cond_put(pol); |
1835 | page = alloc_page_interleave(gfp, order, nid); | 1834 | page = alloc_page_interleave(gfp, order, nid); |
1836 | put_mems_allowed(); | 1835 | put_mems_allowed(); |
1837 | return page; | 1836 | return page; |
1838 | } | 1837 | } |
1839 | zl = policy_zonelist(gfp, pol); | 1838 | zl = policy_zonelist(gfp, pol, node); |
1840 | if (unlikely(mpol_needs_cond_ref(pol))) { | 1839 | if (unlikely(mpol_needs_cond_ref(pol))) { |
1841 | /* | 1840 | /* |
1842 | * slow path: ref counted shared policy | 1841 | * slow path: ref counted shared policy |
@@ -1892,7 +1891,8 @@ struct page *alloc_pages_current(gfp_t gfp, unsigned order) | |||
1892 | page = alloc_page_interleave(gfp, order, interleave_nodes(pol)); | 1891 | page = alloc_page_interleave(gfp, order, interleave_nodes(pol)); |
1893 | else | 1892 | else |
1894 | page = __alloc_pages_nodemask(gfp, order, | 1893 | page = __alloc_pages_nodemask(gfp, order, |
1895 | policy_zonelist(gfp, pol), policy_nodemask(gfp, pol)); | 1894 | policy_zonelist(gfp, pol, numa_node_id()), |
1895 | policy_nodemask(gfp, pol)); | ||
1896 | put_mems_allowed(); | 1896 | put_mems_allowed(); |
1897 | return page; | 1897 | return page; |
1898 | } | 1898 | } |
diff --git a/mm/migrate.c b/mm/migrate.c index 766115253807..352de555626c 100644 --- a/mm/migrate.c +++ b/mm/migrate.c | |||
@@ -1287,14 +1287,14 @@ SYSCALL_DEFINE6(move_pages, pid_t, pid, unsigned long, nr_pages, | |||
1287 | return -EPERM; | 1287 | return -EPERM; |
1288 | 1288 | ||
1289 | /* Find the mm_struct */ | 1289 | /* Find the mm_struct */ |
1290 | read_lock(&tasklist_lock); | 1290 | rcu_read_lock(); |
1291 | task = pid ? find_task_by_vpid(pid) : current; | 1291 | task = pid ? find_task_by_vpid(pid) : current; |
1292 | if (!task) { | 1292 | if (!task) { |
1293 | read_unlock(&tasklist_lock); | 1293 | rcu_read_unlock(); |
1294 | return -ESRCH; | 1294 | return -ESRCH; |
1295 | } | 1295 | } |
1296 | mm = get_task_mm(task); | 1296 | mm = get_task_mm(task); |
1297 | read_unlock(&tasklist_lock); | 1297 | rcu_read_unlock(); |
1298 | 1298 | ||
1299 | if (!mm) | 1299 | if (!mm) |
1300 | return -EINVAL; | 1300 | return -EINVAL; |
diff --git a/mm/mremap.c b/mm/mremap.c index 9925b6391b80..1de98d492ddc 100644 --- a/mm/mremap.c +++ b/mm/mremap.c | |||
@@ -94,9 +94,7 @@ static void move_ptes(struct vm_area_struct *vma, pmd_t *old_pmd, | |||
94 | */ | 94 | */ |
95 | mapping = vma->vm_file->f_mapping; | 95 | mapping = vma->vm_file->f_mapping; |
96 | spin_lock(&mapping->i_mmap_lock); | 96 | spin_lock(&mapping->i_mmap_lock); |
97 | if (new_vma->vm_truncate_count && | 97 | new_vma->vm_truncate_count = 0; |
98 | new_vma->vm_truncate_count != vma->vm_truncate_count) | ||
99 | new_vma->vm_truncate_count = 0; | ||
100 | } | 98 | } |
101 | 99 | ||
102 | /* | 100 | /* |
diff --git a/mm/page_alloc.c b/mm/page_alloc.c index a873e61e312e..cdef1d4b4e47 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c | |||
@@ -5376,10 +5376,9 @@ __count_immobile_pages(struct zone *zone, struct page *page, int count) | |||
5376 | for (found = 0, iter = 0; iter < pageblock_nr_pages; iter++) { | 5376 | for (found = 0, iter = 0; iter < pageblock_nr_pages; iter++) { |
5377 | unsigned long check = pfn + iter; | 5377 | unsigned long check = pfn + iter; |
5378 | 5378 | ||
5379 | if (!pfn_valid_within(check)) { | 5379 | if (!pfn_valid_within(check)) |
5380 | iter++; | ||
5381 | continue; | 5380 | continue; |
5382 | } | 5381 | |
5383 | page = pfn_to_page(check); | 5382 | page = pfn_to_page(check); |
5384 | if (!page_count(page)) { | 5383 | if (!page_count(page)) { |
5385 | if (PageBuddy(page)) | 5384 | if (PageBuddy(page)) |
diff --git a/mm/swapfile.c b/mm/swapfile.c index 07a458d72fa8..0341c5700e34 100644 --- a/mm/swapfile.c +++ b/mm/swapfile.c | |||
@@ -1940,7 +1940,7 @@ SYSCALL_DEFINE2(swapon, const char __user *, specialfile, int, swap_flags) | |||
1940 | 1940 | ||
1941 | error = -EINVAL; | 1941 | error = -EINVAL; |
1942 | if (S_ISBLK(inode->i_mode)) { | 1942 | if (S_ISBLK(inode->i_mode)) { |
1943 | bdev = I_BDEV(inode); | 1943 | bdev = bdgrab(I_BDEV(inode)); |
1944 | error = blkdev_get(bdev, FMODE_READ | FMODE_WRITE | FMODE_EXCL, | 1944 | error = blkdev_get(bdev, FMODE_READ | FMODE_WRITE | FMODE_EXCL, |
1945 | sys_swapon); | 1945 | sys_swapon); |
1946 | if (error < 0) { | 1946 | if (error < 0) { |
diff --git a/mm/truncate.c b/mm/truncate.c index 49feb46e77b8..d64296be00d3 100644 --- a/mm/truncate.c +++ b/mm/truncate.c | |||
@@ -225,6 +225,7 @@ void truncate_inode_pages_range(struct address_space *mapping, | |||
225 | next = start; | 225 | next = start; |
226 | while (next <= end && | 226 | while (next <= end && |
227 | pagevec_lookup(&pvec, mapping, next, PAGEVEC_SIZE)) { | 227 | pagevec_lookup(&pvec, mapping, next, PAGEVEC_SIZE)) { |
228 | mem_cgroup_uncharge_start(); | ||
228 | for (i = 0; i < pagevec_count(&pvec); i++) { | 229 | for (i = 0; i < pagevec_count(&pvec); i++) { |
229 | struct page *page = pvec.pages[i]; | 230 | struct page *page = pvec.pages[i]; |
230 | pgoff_t page_index = page->index; | 231 | pgoff_t page_index = page->index; |
@@ -247,6 +248,7 @@ void truncate_inode_pages_range(struct address_space *mapping, | |||
247 | unlock_page(page); | 248 | unlock_page(page); |
248 | } | 249 | } |
249 | pagevec_release(&pvec); | 250 | pagevec_release(&pvec); |
251 | mem_cgroup_uncharge_end(); | ||
250 | cond_resched(); | 252 | cond_resched(); |
251 | } | 253 | } |
252 | 254 | ||
diff --git a/mm/vmscan.c b/mm/vmscan.c index 17497d0cd8b9..6771ea70bfe7 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c | |||
@@ -1841,16 +1841,28 @@ static inline bool should_continue_reclaim(struct zone *zone, | |||
1841 | if (!(sc->reclaim_mode & RECLAIM_MODE_COMPACTION)) | 1841 | if (!(sc->reclaim_mode & RECLAIM_MODE_COMPACTION)) |
1842 | return false; | 1842 | return false; |
1843 | 1843 | ||
1844 | /* | 1844 | /* Consider stopping depending on scan and reclaim activity */ |
1845 | * If we failed to reclaim and have scanned the full list, stop. | 1845 | if (sc->gfp_mask & __GFP_REPEAT) { |
1846 | * NOTE: Checking just nr_reclaimed would exit reclaim/compaction far | 1846 | /* |
1847 | * faster but obviously would be less likely to succeed | 1847 | * For __GFP_REPEAT allocations, stop reclaiming if the |
1848 | * allocation. If this is desirable, use GFP_REPEAT to decide | 1848 | * full LRU list has been scanned and we are still failing |
1849 | * if both reclaimed and scanned should be checked or just | 1849 | * to reclaim pages. This full LRU scan is potentially |
1850 | * reclaimed | 1850 | * expensive but a __GFP_REPEAT caller really wants to succeed |
1851 | */ | 1851 | */ |
1852 | if (!nr_reclaimed && !nr_scanned) | 1852 | if (!nr_reclaimed && !nr_scanned) |
1853 | return false; | 1853 | return false; |
1854 | } else { | ||
1855 | /* | ||
1856 | * For non-__GFP_REPEAT allocations which can presumably | ||
1857 | * fail without consequence, stop if we failed to reclaim | ||
1858 | * any pages from the last SWAP_CLUSTER_MAX number of | ||
1859 | * pages that were scanned. This will return to the | ||
1860 | * caller faster at the risk reclaim/compaction and | ||
1861 | * the resulting allocation attempt fails | ||
1862 | */ | ||
1863 | if (!nr_reclaimed) | ||
1864 | return false; | ||
1865 | } | ||
1854 | 1866 | ||
1855 | /* | 1867 | /* |
1856 | * If we have not reclaimed enough pages for compaction and the | 1868 | * If we have not reclaimed enough pages for compaction and the |
diff --git a/net/bluetooth/l2cap.c b/net/bluetooth/l2cap.c index 7550abb0c96a..675614e38e14 100644 --- a/net/bluetooth/l2cap.c +++ b/net/bluetooth/l2cap.c | |||
@@ -859,6 +859,7 @@ static void __l2cap_sock_close(struct sock *sk, int reason) | |||
859 | result = L2CAP_CR_SEC_BLOCK; | 859 | result = L2CAP_CR_SEC_BLOCK; |
860 | else | 860 | else |
861 | result = L2CAP_CR_BAD_PSM; | 861 | result = L2CAP_CR_BAD_PSM; |
862 | sk->sk_state = BT_DISCONN; | ||
862 | 863 | ||
863 | rsp.scid = cpu_to_le16(l2cap_pi(sk)->dcid); | 864 | rsp.scid = cpu_to_le16(l2cap_pi(sk)->dcid); |
864 | rsp.dcid = cpu_to_le16(l2cap_pi(sk)->scid); | 865 | rsp.dcid = cpu_to_le16(l2cap_pi(sk)->scid); |
diff --git a/net/bluetooth/rfcomm/tty.c b/net/bluetooth/rfcomm/tty.c index 2575c2db6404..d7b9af4703d0 100644 --- a/net/bluetooth/rfcomm/tty.c +++ b/net/bluetooth/rfcomm/tty.c | |||
@@ -727,7 +727,9 @@ static int rfcomm_tty_open(struct tty_struct *tty, struct file *filp) | |||
727 | break; | 727 | break; |
728 | } | 728 | } |
729 | 729 | ||
730 | tty_unlock(); | ||
730 | schedule(); | 731 | schedule(); |
732 | tty_lock(); | ||
731 | } | 733 | } |
732 | set_current_state(TASK_RUNNING); | 734 | set_current_state(TASK_RUNNING); |
733 | remove_wait_queue(&dev->wait, &wait); | 735 | remove_wait_queue(&dev->wait, &wait); |
diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c index 6f6d8e1b776f..88e4aa9cb1f9 100644 --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c | |||
@@ -80,7 +80,7 @@ int br_handle_frame_finish(struct sk_buff *skb) | |||
80 | if (is_multicast_ether_addr(dest)) { | 80 | if (is_multicast_ether_addr(dest)) { |
81 | mdst = br_mdb_get(br, skb); | 81 | mdst = br_mdb_get(br, skb); |
82 | if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) { | 82 | if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) { |
83 | if ((mdst && !hlist_unhashed(&mdst->mglist)) || | 83 | if ((mdst && mdst->mglist) || |
84 | br_multicast_is_router(br)) | 84 | br_multicast_is_router(br)) |
85 | skb2 = skb; | 85 | skb2 = skb; |
86 | br_multicast_forward(mdst, skb, skb2); | 86 | br_multicast_forward(mdst, skb, skb2); |
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c index f701a21acb34..030a002ff8ee 100644 --- a/net/bridge/br_multicast.c +++ b/net/bridge/br_multicast.c | |||
@@ -37,10 +37,9 @@ | |||
37 | rcu_dereference_protected(X, lockdep_is_held(&br->multicast_lock)) | 37 | rcu_dereference_protected(X, lockdep_is_held(&br->multicast_lock)) |
38 | 38 | ||
39 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | 39 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) |
40 | static inline int ipv6_is_local_multicast(const struct in6_addr *addr) | 40 | static inline int ipv6_is_transient_multicast(const struct in6_addr *addr) |
41 | { | 41 | { |
42 | if (ipv6_addr_is_multicast(addr) && | 42 | if (ipv6_addr_is_multicast(addr) && IPV6_ADDR_MC_FLAG_TRANSIENT(addr)) |
43 | IPV6_ADDR_MC_SCOPE(addr) <= IPV6_ADDR_SCOPE_LINKLOCAL) | ||
44 | return 1; | 43 | return 1; |
45 | return 0; | 44 | return 0; |
46 | } | 45 | } |
@@ -232,8 +231,7 @@ static void br_multicast_group_expired(unsigned long data) | |||
232 | if (!netif_running(br->dev) || timer_pending(&mp->timer)) | 231 | if (!netif_running(br->dev) || timer_pending(&mp->timer)) |
233 | goto out; | 232 | goto out; |
234 | 233 | ||
235 | if (!hlist_unhashed(&mp->mglist)) | 234 | mp->mglist = false; |
236 | hlist_del_init(&mp->mglist); | ||
237 | 235 | ||
238 | if (mp->ports) | 236 | if (mp->ports) |
239 | goto out; | 237 | goto out; |
@@ -276,7 +274,7 @@ static void br_multicast_del_pg(struct net_bridge *br, | |||
276 | del_timer(&p->query_timer); | 274 | del_timer(&p->query_timer); |
277 | call_rcu_bh(&p->rcu, br_multicast_free_pg); | 275 | call_rcu_bh(&p->rcu, br_multicast_free_pg); |
278 | 276 | ||
279 | if (!mp->ports && hlist_unhashed(&mp->mglist) && | 277 | if (!mp->ports && !mp->mglist && |
280 | netif_running(br->dev)) | 278 | netif_running(br->dev)) |
281 | mod_timer(&mp->timer, jiffies); | 279 | mod_timer(&mp->timer, jiffies); |
282 | 280 | ||
@@ -436,7 +434,6 @@ static struct sk_buff *br_ip6_multicast_alloc_query(struct net_bridge *br, | |||
436 | eth = eth_hdr(skb); | 434 | eth = eth_hdr(skb); |
437 | 435 | ||
438 | memcpy(eth->h_source, br->dev->dev_addr, 6); | 436 | memcpy(eth->h_source, br->dev->dev_addr, 6); |
439 | ipv6_eth_mc_map(group, eth->h_dest); | ||
440 | eth->h_proto = htons(ETH_P_IPV6); | 437 | eth->h_proto = htons(ETH_P_IPV6); |
441 | skb_put(skb, sizeof(*eth)); | 438 | skb_put(skb, sizeof(*eth)); |
442 | 439 | ||
@@ -448,8 +445,10 @@ static struct sk_buff *br_ip6_multicast_alloc_query(struct net_bridge *br, | |||
448 | ip6h->payload_len = htons(8 + sizeof(*mldq)); | 445 | ip6h->payload_len = htons(8 + sizeof(*mldq)); |
449 | ip6h->nexthdr = IPPROTO_HOPOPTS; | 446 | ip6h->nexthdr = IPPROTO_HOPOPTS; |
450 | ip6h->hop_limit = 1; | 447 | ip6h->hop_limit = 1; |
451 | ipv6_addr_set(&ip6h->saddr, 0, 0, 0, 0); | 448 | ipv6_dev_get_saddr(dev_net(br->dev), br->dev, &ip6h->daddr, 0, |
449 | &ip6h->saddr); | ||
452 | ipv6_addr_set(&ip6h->daddr, htonl(0xff020000), 0, 0, htonl(1)); | 450 | ipv6_addr_set(&ip6h->daddr, htonl(0xff020000), 0, 0, htonl(1)); |
451 | ipv6_eth_mc_map(&ip6h->daddr, eth->h_dest); | ||
453 | 452 | ||
454 | hopopt = (u8 *)(ip6h + 1); | 453 | hopopt = (u8 *)(ip6h + 1); |
455 | hopopt[0] = IPPROTO_ICMPV6; /* next hdr */ | 454 | hopopt[0] = IPPROTO_ICMPV6; /* next hdr */ |
@@ -528,7 +527,7 @@ static void br_multicast_group_query_expired(unsigned long data) | |||
528 | struct net_bridge *br = mp->br; | 527 | struct net_bridge *br = mp->br; |
529 | 528 | ||
530 | spin_lock(&br->multicast_lock); | 529 | spin_lock(&br->multicast_lock); |
531 | if (!netif_running(br->dev) || hlist_unhashed(&mp->mglist) || | 530 | if (!netif_running(br->dev) || !mp->mglist || |
532 | mp->queries_sent >= br->multicast_last_member_count) | 531 | mp->queries_sent >= br->multicast_last_member_count) |
533 | goto out; | 532 | goto out; |
534 | 533 | ||
@@ -719,7 +718,7 @@ static int br_multicast_add_group(struct net_bridge *br, | |||
719 | goto err; | 718 | goto err; |
720 | 719 | ||
721 | if (!port) { | 720 | if (!port) { |
722 | hlist_add_head(&mp->mglist, &br->mglist); | 721 | mp->mglist = true; |
723 | mod_timer(&mp->timer, now + br->multicast_membership_interval); | 722 | mod_timer(&mp->timer, now + br->multicast_membership_interval); |
724 | goto out; | 723 | goto out; |
725 | } | 724 | } |
@@ -781,11 +780,11 @@ static int br_ip6_multicast_add_group(struct net_bridge *br, | |||
781 | { | 780 | { |
782 | struct br_ip br_group; | 781 | struct br_ip br_group; |
783 | 782 | ||
784 | if (ipv6_is_local_multicast(group)) | 783 | if (!ipv6_is_transient_multicast(group)) |
785 | return 0; | 784 | return 0; |
786 | 785 | ||
787 | ipv6_addr_copy(&br_group.u.ip6, group); | 786 | ipv6_addr_copy(&br_group.u.ip6, group); |
788 | br_group.proto = htons(ETH_P_IP); | 787 | br_group.proto = htons(ETH_P_IPV6); |
789 | 788 | ||
790 | return br_multicast_add_group(br, port, &br_group); | 789 | return br_multicast_add_group(br, port, &br_group); |
791 | } | 790 | } |
@@ -1014,18 +1013,19 @@ static int br_ip6_multicast_mld2_report(struct net_bridge *br, | |||
1014 | 1013 | ||
1015 | nsrcs = skb_header_pointer(skb, | 1014 | nsrcs = skb_header_pointer(skb, |
1016 | len + offsetof(struct mld2_grec, | 1015 | len + offsetof(struct mld2_grec, |
1017 | grec_mca), | 1016 | grec_nsrcs), |
1018 | sizeof(_nsrcs), &_nsrcs); | 1017 | sizeof(_nsrcs), &_nsrcs); |
1019 | if (!nsrcs) | 1018 | if (!nsrcs) |
1020 | return -EINVAL; | 1019 | return -EINVAL; |
1021 | 1020 | ||
1022 | if (!pskb_may_pull(skb, | 1021 | if (!pskb_may_pull(skb, |
1023 | len + sizeof(*grec) + | 1022 | len + sizeof(*grec) + |
1024 | sizeof(struct in6_addr) * (*nsrcs))) | 1023 | sizeof(struct in6_addr) * ntohs(*nsrcs))) |
1025 | return -EINVAL; | 1024 | return -EINVAL; |
1026 | 1025 | ||
1027 | grec = (struct mld2_grec *)(skb->data + len); | 1026 | grec = (struct mld2_grec *)(skb->data + len); |
1028 | len += sizeof(*grec) + sizeof(struct in6_addr) * (*nsrcs); | 1027 | len += sizeof(*grec) + |
1028 | sizeof(struct in6_addr) * ntohs(*nsrcs); | ||
1029 | 1029 | ||
1030 | /* We treat these as MLDv1 reports for now. */ | 1030 | /* We treat these as MLDv1 reports for now. */ |
1031 | switch (grec->grec_type) { | 1031 | switch (grec->grec_type) { |
@@ -1165,7 +1165,7 @@ static int br_ip4_multicast_query(struct net_bridge *br, | |||
1165 | 1165 | ||
1166 | max_delay *= br->multicast_last_member_count; | 1166 | max_delay *= br->multicast_last_member_count; |
1167 | 1167 | ||
1168 | if (!hlist_unhashed(&mp->mglist) && | 1168 | if (mp->mglist && |
1169 | (timer_pending(&mp->timer) ? | 1169 | (timer_pending(&mp->timer) ? |
1170 | time_after(mp->timer.expires, now + max_delay) : | 1170 | time_after(mp->timer.expires, now + max_delay) : |
1171 | try_to_del_timer_sync(&mp->timer) >= 0)) | 1171 | try_to_del_timer_sync(&mp->timer) >= 0)) |
@@ -1177,7 +1177,7 @@ static int br_ip4_multicast_query(struct net_bridge *br, | |||
1177 | if (timer_pending(&p->timer) ? | 1177 | if (timer_pending(&p->timer) ? |
1178 | time_after(p->timer.expires, now + max_delay) : | 1178 | time_after(p->timer.expires, now + max_delay) : |
1179 | try_to_del_timer_sync(&p->timer) >= 0) | 1179 | try_to_del_timer_sync(&p->timer) >= 0) |
1180 | mod_timer(&mp->timer, now + max_delay); | 1180 | mod_timer(&p->timer, now + max_delay); |
1181 | } | 1181 | } |
1182 | 1182 | ||
1183 | out: | 1183 | out: |
@@ -1236,7 +1236,7 @@ static int br_ip6_multicast_query(struct net_bridge *br, | |||
1236 | goto out; | 1236 | goto out; |
1237 | 1237 | ||
1238 | max_delay *= br->multicast_last_member_count; | 1238 | max_delay *= br->multicast_last_member_count; |
1239 | if (!hlist_unhashed(&mp->mglist) && | 1239 | if (mp->mglist && |
1240 | (timer_pending(&mp->timer) ? | 1240 | (timer_pending(&mp->timer) ? |
1241 | time_after(mp->timer.expires, now + max_delay) : | 1241 | time_after(mp->timer.expires, now + max_delay) : |
1242 | try_to_del_timer_sync(&mp->timer) >= 0)) | 1242 | try_to_del_timer_sync(&mp->timer) >= 0)) |
@@ -1248,7 +1248,7 @@ static int br_ip6_multicast_query(struct net_bridge *br, | |||
1248 | if (timer_pending(&p->timer) ? | 1248 | if (timer_pending(&p->timer) ? |
1249 | time_after(p->timer.expires, now + max_delay) : | 1249 | time_after(p->timer.expires, now + max_delay) : |
1250 | try_to_del_timer_sync(&p->timer) >= 0) | 1250 | try_to_del_timer_sync(&p->timer) >= 0) |
1251 | mod_timer(&mp->timer, now + max_delay); | 1251 | mod_timer(&p->timer, now + max_delay); |
1252 | } | 1252 | } |
1253 | 1253 | ||
1254 | out: | 1254 | out: |
@@ -1283,7 +1283,7 @@ static void br_multicast_leave_group(struct net_bridge *br, | |||
1283 | br->multicast_last_member_interval; | 1283 | br->multicast_last_member_interval; |
1284 | 1284 | ||
1285 | if (!port) { | 1285 | if (!port) { |
1286 | if (!hlist_unhashed(&mp->mglist) && | 1286 | if (mp->mglist && |
1287 | (timer_pending(&mp->timer) ? | 1287 | (timer_pending(&mp->timer) ? |
1288 | time_after(mp->timer.expires, time) : | 1288 | time_after(mp->timer.expires, time) : |
1289 | try_to_del_timer_sync(&mp->timer) >= 0)) { | 1289 | try_to_del_timer_sync(&mp->timer) >= 0)) { |
@@ -1341,7 +1341,7 @@ static void br_ip6_multicast_leave_group(struct net_bridge *br, | |||
1341 | { | 1341 | { |
1342 | struct br_ip br_group; | 1342 | struct br_ip br_group; |
1343 | 1343 | ||
1344 | if (ipv6_is_local_multicast(group)) | 1344 | if (!ipv6_is_transient_multicast(group)) |
1345 | return; | 1345 | return; |
1346 | 1346 | ||
1347 | ipv6_addr_copy(&br_group.u.ip6, group); | 1347 | ipv6_addr_copy(&br_group.u.ip6, group); |
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h index 84aac7734bfc..4e1b620b6be6 100644 --- a/net/bridge/br_private.h +++ b/net/bridge/br_private.h | |||
@@ -84,13 +84,13 @@ struct net_bridge_port_group { | |||
84 | struct net_bridge_mdb_entry | 84 | struct net_bridge_mdb_entry |
85 | { | 85 | { |
86 | struct hlist_node hlist[2]; | 86 | struct hlist_node hlist[2]; |
87 | struct hlist_node mglist; | ||
88 | struct net_bridge *br; | 87 | struct net_bridge *br; |
89 | struct net_bridge_port_group __rcu *ports; | 88 | struct net_bridge_port_group __rcu *ports; |
90 | struct rcu_head rcu; | 89 | struct rcu_head rcu; |
91 | struct timer_list timer; | 90 | struct timer_list timer; |
92 | struct timer_list query_timer; | 91 | struct timer_list query_timer; |
93 | struct br_ip addr; | 92 | struct br_ip addr; |
93 | bool mglist; | ||
94 | u32 queries_sent; | 94 | u32 queries_sent; |
95 | }; | 95 | }; |
96 | 96 | ||
@@ -238,7 +238,6 @@ struct net_bridge | |||
238 | spinlock_t multicast_lock; | 238 | spinlock_t multicast_lock; |
239 | struct net_bridge_mdb_htable __rcu *mdb; | 239 | struct net_bridge_mdb_htable __rcu *mdb; |
240 | struct hlist_head router_list; | 240 | struct hlist_head router_list; |
241 | struct hlist_head mglist; | ||
242 | 241 | ||
243 | struct timer_list multicast_router_timer; | 242 | struct timer_list multicast_router_timer; |
244 | struct timer_list multicast_querier_timer; | 243 | struct timer_list multicast_querier_timer; |
diff --git a/net/ceph/messenger.c b/net/ceph/messenger.c index dff633d62e5b..05f357828a2f 100644 --- a/net/ceph/messenger.c +++ b/net/ceph/messenger.c | |||
@@ -252,8 +252,12 @@ static int ceph_tcp_recvmsg(struct socket *sock, void *buf, size_t len) | |||
252 | { | 252 | { |
253 | struct kvec iov = {buf, len}; | 253 | struct kvec iov = {buf, len}; |
254 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; | 254 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; |
255 | int r; | ||
255 | 256 | ||
256 | return kernel_recvmsg(sock, &msg, &iov, 1, len, msg.msg_flags); | 257 | r = kernel_recvmsg(sock, &msg, &iov, 1, len, msg.msg_flags); |
258 | if (r == -EAGAIN) | ||
259 | r = 0; | ||
260 | return r; | ||
257 | } | 261 | } |
258 | 262 | ||
259 | /* | 263 | /* |
@@ -264,13 +268,17 @@ static int ceph_tcp_sendmsg(struct socket *sock, struct kvec *iov, | |||
264 | size_t kvlen, size_t len, int more) | 268 | size_t kvlen, size_t len, int more) |
265 | { | 269 | { |
266 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; | 270 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; |
271 | int r; | ||
267 | 272 | ||
268 | if (more) | 273 | if (more) |
269 | msg.msg_flags |= MSG_MORE; | 274 | msg.msg_flags |= MSG_MORE; |
270 | else | 275 | else |
271 | msg.msg_flags |= MSG_EOR; /* superfluous, but what the hell */ | 276 | msg.msg_flags |= MSG_EOR; /* superfluous, but what the hell */ |
272 | 277 | ||
273 | return kernel_sendmsg(sock, &msg, iov, kvlen, len); | 278 | r = kernel_sendmsg(sock, &msg, iov, kvlen, len); |
279 | if (r == -EAGAIN) | ||
280 | r = 0; | ||
281 | return r; | ||
274 | } | 282 | } |
275 | 283 | ||
276 | 284 | ||
@@ -328,7 +336,6 @@ static void reset_connection(struct ceph_connection *con) | |||
328 | ceph_msg_put(con->out_msg); | 336 | ceph_msg_put(con->out_msg); |
329 | con->out_msg = NULL; | 337 | con->out_msg = NULL; |
330 | } | 338 | } |
331 | con->out_keepalive_pending = false; | ||
332 | con->in_seq = 0; | 339 | con->in_seq = 0; |
333 | con->in_seq_acked = 0; | 340 | con->in_seq_acked = 0; |
334 | } | 341 | } |
@@ -847,6 +854,8 @@ static int write_partial_msg_pages(struct ceph_connection *con) | |||
847 | (msg->pages || msg->pagelist || msg->bio || in_trail)) | 854 | (msg->pages || msg->pagelist || msg->bio || in_trail)) |
848 | kunmap(page); | 855 | kunmap(page); |
849 | 856 | ||
857 | if (ret == -EAGAIN) | ||
858 | ret = 0; | ||
850 | if (ret <= 0) | 859 | if (ret <= 0) |
851 | goto out; | 860 | goto out; |
852 | 861 | ||
@@ -1238,8 +1247,6 @@ static int process_connect(struct ceph_connection *con) | |||
1238 | con->auth_retry); | 1247 | con->auth_retry); |
1239 | if (con->auth_retry == 2) { | 1248 | if (con->auth_retry == 2) { |
1240 | con->error_msg = "connect authorization failure"; | 1249 | con->error_msg = "connect authorization failure"; |
1241 | reset_connection(con); | ||
1242 | set_bit(CLOSED, &con->state); | ||
1243 | return -1; | 1250 | return -1; |
1244 | } | 1251 | } |
1245 | con->auth_retry = 1; | 1252 | con->auth_retry = 1; |
@@ -1705,14 +1712,6 @@ more: | |||
1705 | 1712 | ||
1706 | /* open the socket first? */ | 1713 | /* open the socket first? */ |
1707 | if (con->sock == NULL) { | 1714 | if (con->sock == NULL) { |
1708 | /* | ||
1709 | * if we were STANDBY and are reconnecting _this_ | ||
1710 | * connection, bump connect_seq now. Always bump | ||
1711 | * global_seq. | ||
1712 | */ | ||
1713 | if (test_and_clear_bit(STANDBY, &con->state)) | ||
1714 | con->connect_seq++; | ||
1715 | |||
1716 | prepare_write_banner(msgr, con); | 1715 | prepare_write_banner(msgr, con); |
1717 | prepare_write_connect(msgr, con, 1); | 1716 | prepare_write_connect(msgr, con, 1); |
1718 | prepare_read_banner(con); | 1717 | prepare_read_banner(con); |
@@ -1737,16 +1736,12 @@ more_kvec: | |||
1737 | if (con->out_skip) { | 1736 | if (con->out_skip) { |
1738 | ret = write_partial_skip(con); | 1737 | ret = write_partial_skip(con); |
1739 | if (ret <= 0) | 1738 | if (ret <= 0) |
1740 | goto done; | 1739 | goto out; |
1741 | if (ret < 0) { | ||
1742 | dout("try_write write_partial_skip err %d\n", ret); | ||
1743 | goto done; | ||
1744 | } | ||
1745 | } | 1740 | } |
1746 | if (con->out_kvec_left) { | 1741 | if (con->out_kvec_left) { |
1747 | ret = write_partial_kvec(con); | 1742 | ret = write_partial_kvec(con); |
1748 | if (ret <= 0) | 1743 | if (ret <= 0) |
1749 | goto done; | 1744 | goto out; |
1750 | } | 1745 | } |
1751 | 1746 | ||
1752 | /* msg pages? */ | 1747 | /* msg pages? */ |
@@ -1761,11 +1756,11 @@ more_kvec: | |||
1761 | if (ret == 1) | 1756 | if (ret == 1) |
1762 | goto more_kvec; /* we need to send the footer, too! */ | 1757 | goto more_kvec; /* we need to send the footer, too! */ |
1763 | if (ret == 0) | 1758 | if (ret == 0) |
1764 | goto done; | 1759 | goto out; |
1765 | if (ret < 0) { | 1760 | if (ret < 0) { |
1766 | dout("try_write write_partial_msg_pages err %d\n", | 1761 | dout("try_write write_partial_msg_pages err %d\n", |
1767 | ret); | 1762 | ret); |
1768 | goto done; | 1763 | goto out; |
1769 | } | 1764 | } |
1770 | } | 1765 | } |
1771 | 1766 | ||
@@ -1789,10 +1784,9 @@ do_next: | |||
1789 | /* Nothing to do! */ | 1784 | /* Nothing to do! */ |
1790 | clear_bit(WRITE_PENDING, &con->state); | 1785 | clear_bit(WRITE_PENDING, &con->state); |
1791 | dout("try_write nothing else to write.\n"); | 1786 | dout("try_write nothing else to write.\n"); |
1792 | done: | ||
1793 | ret = 0; | 1787 | ret = 0; |
1794 | out: | 1788 | out: |
1795 | dout("try_write done on %p\n", con); | 1789 | dout("try_write done on %p ret %d\n", con, ret); |
1796 | return ret; | 1790 | return ret; |
1797 | } | 1791 | } |
1798 | 1792 | ||
@@ -1821,19 +1815,17 @@ more: | |||
1821 | dout("try_read connecting\n"); | 1815 | dout("try_read connecting\n"); |
1822 | ret = read_partial_banner(con); | 1816 | ret = read_partial_banner(con); |
1823 | if (ret <= 0) | 1817 | if (ret <= 0) |
1824 | goto done; | ||
1825 | if (process_banner(con) < 0) { | ||
1826 | ret = -1; | ||
1827 | goto out; | 1818 | goto out; |
1828 | } | 1819 | ret = process_banner(con); |
1820 | if (ret < 0) | ||
1821 | goto out; | ||
1829 | } | 1822 | } |
1830 | ret = read_partial_connect(con); | 1823 | ret = read_partial_connect(con); |
1831 | if (ret <= 0) | 1824 | if (ret <= 0) |
1832 | goto done; | ||
1833 | if (process_connect(con) < 0) { | ||
1834 | ret = -1; | ||
1835 | goto out; | 1825 | goto out; |
1836 | } | 1826 | ret = process_connect(con); |
1827 | if (ret < 0) | ||
1828 | goto out; | ||
1837 | goto more; | 1829 | goto more; |
1838 | } | 1830 | } |
1839 | 1831 | ||
@@ -1848,7 +1840,7 @@ more: | |||
1848 | dout("skipping %d / %d bytes\n", skip, -con->in_base_pos); | 1840 | dout("skipping %d / %d bytes\n", skip, -con->in_base_pos); |
1849 | ret = ceph_tcp_recvmsg(con->sock, buf, skip); | 1841 | ret = ceph_tcp_recvmsg(con->sock, buf, skip); |
1850 | if (ret <= 0) | 1842 | if (ret <= 0) |
1851 | goto done; | 1843 | goto out; |
1852 | con->in_base_pos += ret; | 1844 | con->in_base_pos += ret; |
1853 | if (con->in_base_pos) | 1845 | if (con->in_base_pos) |
1854 | goto more; | 1846 | goto more; |
@@ -1859,7 +1851,7 @@ more: | |||
1859 | */ | 1851 | */ |
1860 | ret = ceph_tcp_recvmsg(con->sock, &con->in_tag, 1); | 1852 | ret = ceph_tcp_recvmsg(con->sock, &con->in_tag, 1); |
1861 | if (ret <= 0) | 1853 | if (ret <= 0) |
1862 | goto done; | 1854 | goto out; |
1863 | dout("try_read got tag %d\n", (int)con->in_tag); | 1855 | dout("try_read got tag %d\n", (int)con->in_tag); |
1864 | switch (con->in_tag) { | 1856 | switch (con->in_tag) { |
1865 | case CEPH_MSGR_TAG_MSG: | 1857 | case CEPH_MSGR_TAG_MSG: |
@@ -1870,7 +1862,7 @@ more: | |||
1870 | break; | 1862 | break; |
1871 | case CEPH_MSGR_TAG_CLOSE: | 1863 | case CEPH_MSGR_TAG_CLOSE: |
1872 | set_bit(CLOSED, &con->state); /* fixme */ | 1864 | set_bit(CLOSED, &con->state); /* fixme */ |
1873 | goto done; | 1865 | goto out; |
1874 | default: | 1866 | default: |
1875 | goto bad_tag; | 1867 | goto bad_tag; |
1876 | } | 1868 | } |
@@ -1882,13 +1874,12 @@ more: | |||
1882 | case -EBADMSG: | 1874 | case -EBADMSG: |
1883 | con->error_msg = "bad crc"; | 1875 | con->error_msg = "bad crc"; |
1884 | ret = -EIO; | 1876 | ret = -EIO; |
1885 | goto out; | 1877 | break; |
1886 | case -EIO: | 1878 | case -EIO: |
1887 | con->error_msg = "io error"; | 1879 | con->error_msg = "io error"; |
1888 | goto out; | 1880 | break; |
1889 | default: | ||
1890 | goto done; | ||
1891 | } | 1881 | } |
1882 | goto out; | ||
1892 | } | 1883 | } |
1893 | if (con->in_tag == CEPH_MSGR_TAG_READY) | 1884 | if (con->in_tag == CEPH_MSGR_TAG_READY) |
1894 | goto more; | 1885 | goto more; |
@@ -1898,15 +1889,13 @@ more: | |||
1898 | if (con->in_tag == CEPH_MSGR_TAG_ACK) { | 1889 | if (con->in_tag == CEPH_MSGR_TAG_ACK) { |
1899 | ret = read_partial_ack(con); | 1890 | ret = read_partial_ack(con); |
1900 | if (ret <= 0) | 1891 | if (ret <= 0) |
1901 | goto done; | 1892 | goto out; |
1902 | process_ack(con); | 1893 | process_ack(con); |
1903 | goto more; | 1894 | goto more; |
1904 | } | 1895 | } |
1905 | 1896 | ||
1906 | done: | ||
1907 | ret = 0; | ||
1908 | out: | 1897 | out: |
1909 | dout("try_read done on %p\n", con); | 1898 | dout("try_read done on %p ret %d\n", con, ret); |
1910 | return ret; | 1899 | return ret; |
1911 | 1900 | ||
1912 | bad_tag: | 1901 | bad_tag: |
@@ -1951,7 +1940,24 @@ static void con_work(struct work_struct *work) | |||
1951 | work.work); | 1940 | work.work); |
1952 | 1941 | ||
1953 | mutex_lock(&con->mutex); | 1942 | mutex_lock(&con->mutex); |
1943 | if (test_and_clear_bit(BACKOFF, &con->state)) { | ||
1944 | dout("con_work %p backing off\n", con); | ||
1945 | if (queue_delayed_work(ceph_msgr_wq, &con->work, | ||
1946 | round_jiffies_relative(con->delay))) { | ||
1947 | dout("con_work %p backoff %lu\n", con, con->delay); | ||
1948 | mutex_unlock(&con->mutex); | ||
1949 | return; | ||
1950 | } else { | ||
1951 | con->ops->put(con); | ||
1952 | dout("con_work %p FAILED to back off %lu\n", con, | ||
1953 | con->delay); | ||
1954 | } | ||
1955 | } | ||
1954 | 1956 | ||
1957 | if (test_bit(STANDBY, &con->state)) { | ||
1958 | dout("con_work %p STANDBY\n", con); | ||
1959 | goto done; | ||
1960 | } | ||
1955 | if (test_bit(CLOSED, &con->state)) { /* e.g. if we are replaced */ | 1961 | if (test_bit(CLOSED, &con->state)) { /* e.g. if we are replaced */ |
1956 | dout("con_work CLOSED\n"); | 1962 | dout("con_work CLOSED\n"); |
1957 | con_close_socket(con); | 1963 | con_close_socket(con); |
@@ -2008,10 +2014,12 @@ static void ceph_fault(struct ceph_connection *con) | |||
2008 | /* Requeue anything that hasn't been acked */ | 2014 | /* Requeue anything that hasn't been acked */ |
2009 | list_splice_init(&con->out_sent, &con->out_queue); | 2015 | list_splice_init(&con->out_sent, &con->out_queue); |
2010 | 2016 | ||
2011 | /* If there are no messages in the queue, place the connection | 2017 | /* If there are no messages queued or keepalive pending, place |
2012 | * in a STANDBY state (i.e., don't try to reconnect just yet). */ | 2018 | * the connection in a STANDBY state */ |
2013 | if (list_empty(&con->out_queue) && !con->out_keepalive_pending) { | 2019 | if (list_empty(&con->out_queue) && |
2014 | dout("fault setting STANDBY\n"); | 2020 | !test_bit(KEEPALIVE_PENDING, &con->state)) { |
2021 | dout("fault %p setting STANDBY clearing WRITE_PENDING\n", con); | ||
2022 | clear_bit(WRITE_PENDING, &con->state); | ||
2015 | set_bit(STANDBY, &con->state); | 2023 | set_bit(STANDBY, &con->state); |
2016 | } else { | 2024 | } else { |
2017 | /* retry after a delay. */ | 2025 | /* retry after a delay. */ |
@@ -2019,11 +2027,24 @@ static void ceph_fault(struct ceph_connection *con) | |||
2019 | con->delay = BASE_DELAY_INTERVAL; | 2027 | con->delay = BASE_DELAY_INTERVAL; |
2020 | else if (con->delay < MAX_DELAY_INTERVAL) | 2028 | else if (con->delay < MAX_DELAY_INTERVAL) |
2021 | con->delay *= 2; | 2029 | con->delay *= 2; |
2022 | dout("fault queueing %p delay %lu\n", con, con->delay); | ||
2023 | con->ops->get(con); | 2030 | con->ops->get(con); |
2024 | if (queue_delayed_work(ceph_msgr_wq, &con->work, | 2031 | if (queue_delayed_work(ceph_msgr_wq, &con->work, |
2025 | round_jiffies_relative(con->delay)) == 0) | 2032 | round_jiffies_relative(con->delay))) { |
2033 | dout("fault queued %p delay %lu\n", con, con->delay); | ||
2034 | } else { | ||
2026 | con->ops->put(con); | 2035 | con->ops->put(con); |
2036 | dout("fault failed to queue %p delay %lu, backoff\n", | ||
2037 | con, con->delay); | ||
2038 | /* | ||
2039 | * In many cases we see a socket state change | ||
2040 | * while con_work is running and end up | ||
2041 | * queuing (non-delayed) work, such that we | ||
2042 | * can't backoff with a delay. Set a flag so | ||
2043 | * that when con_work restarts we schedule the | ||
2044 | * delay then. | ||
2045 | */ | ||
2046 | set_bit(BACKOFF, &con->state); | ||
2047 | } | ||
2027 | } | 2048 | } |
2028 | 2049 | ||
2029 | out_unlock: | 2050 | out_unlock: |
@@ -2094,6 +2115,19 @@ void ceph_messenger_destroy(struct ceph_messenger *msgr) | |||
2094 | } | 2115 | } |
2095 | EXPORT_SYMBOL(ceph_messenger_destroy); | 2116 | EXPORT_SYMBOL(ceph_messenger_destroy); |
2096 | 2117 | ||
2118 | static void clear_standby(struct ceph_connection *con) | ||
2119 | { | ||
2120 | /* come back from STANDBY? */ | ||
2121 | if (test_and_clear_bit(STANDBY, &con->state)) { | ||
2122 | mutex_lock(&con->mutex); | ||
2123 | dout("clear_standby %p and ++connect_seq\n", con); | ||
2124 | con->connect_seq++; | ||
2125 | WARN_ON(test_bit(WRITE_PENDING, &con->state)); | ||
2126 | WARN_ON(test_bit(KEEPALIVE_PENDING, &con->state)); | ||
2127 | mutex_unlock(&con->mutex); | ||
2128 | } | ||
2129 | } | ||
2130 | |||
2097 | /* | 2131 | /* |
2098 | * Queue up an outgoing message on the given connection. | 2132 | * Queue up an outgoing message on the given connection. |
2099 | */ | 2133 | */ |
@@ -2126,6 +2160,7 @@ void ceph_con_send(struct ceph_connection *con, struct ceph_msg *msg) | |||
2126 | 2160 | ||
2127 | /* if there wasn't anything waiting to send before, queue | 2161 | /* if there wasn't anything waiting to send before, queue |
2128 | * new work */ | 2162 | * new work */ |
2163 | clear_standby(con); | ||
2129 | if (test_and_set_bit(WRITE_PENDING, &con->state) == 0) | 2164 | if (test_and_set_bit(WRITE_PENDING, &con->state) == 0) |
2130 | queue_con(con); | 2165 | queue_con(con); |
2131 | } | 2166 | } |
@@ -2191,6 +2226,8 @@ void ceph_con_revoke_message(struct ceph_connection *con, struct ceph_msg *msg) | |||
2191 | */ | 2226 | */ |
2192 | void ceph_con_keepalive(struct ceph_connection *con) | 2227 | void ceph_con_keepalive(struct ceph_connection *con) |
2193 | { | 2228 | { |
2229 | dout("con_keepalive %p\n", con); | ||
2230 | clear_standby(con); | ||
2194 | if (test_and_set_bit(KEEPALIVE_PENDING, &con->state) == 0 && | 2231 | if (test_and_set_bit(KEEPALIVE_PENDING, &con->state) == 0 && |
2195 | test_and_set_bit(WRITE_PENDING, &con->state) == 0) | 2232 | test_and_set_bit(WRITE_PENDING, &con->state) == 0) |
2196 | queue_con(con); | 2233 | queue_con(con); |
diff --git a/net/ceph/pagevec.c b/net/ceph/pagevec.c index 1a040e64c69f..cd9c21df87d1 100644 --- a/net/ceph/pagevec.c +++ b/net/ceph/pagevec.c | |||
@@ -16,22 +16,30 @@ struct page **ceph_get_direct_page_vector(const char __user *data, | |||
16 | int num_pages, bool write_page) | 16 | int num_pages, bool write_page) |
17 | { | 17 | { |
18 | struct page **pages; | 18 | struct page **pages; |
19 | int rc; | 19 | int got = 0; |
20 | int rc = 0; | ||
20 | 21 | ||
21 | pages = kmalloc(sizeof(*pages) * num_pages, GFP_NOFS); | 22 | pages = kmalloc(sizeof(*pages) * num_pages, GFP_NOFS); |
22 | if (!pages) | 23 | if (!pages) |
23 | return ERR_PTR(-ENOMEM); | 24 | return ERR_PTR(-ENOMEM); |
24 | 25 | ||
25 | down_read(¤t->mm->mmap_sem); | 26 | down_read(¤t->mm->mmap_sem); |
26 | rc = get_user_pages(current, current->mm, (unsigned long)data, | 27 | while (got < num_pages) { |
27 | num_pages, write_page, 0, pages, NULL); | 28 | rc = get_user_pages(current, current->mm, |
29 | (unsigned long)data + ((unsigned long)got * PAGE_SIZE), | ||
30 | num_pages - got, write_page, 0, pages + got, NULL); | ||
31 | if (rc < 0) | ||
32 | break; | ||
33 | BUG_ON(rc == 0); | ||
34 | got += rc; | ||
35 | } | ||
28 | up_read(¤t->mm->mmap_sem); | 36 | up_read(¤t->mm->mmap_sem); |
29 | if (rc < num_pages) | 37 | if (rc < 0) |
30 | goto fail; | 38 | goto fail; |
31 | return pages; | 39 | return pages; |
32 | 40 | ||
33 | fail: | 41 | fail: |
34 | ceph_put_page_vector(pages, rc > 0 ? rc : 0, false); | 42 | ceph_put_page_vector(pages, got, false); |
35 | return ERR_PTR(rc); | 43 | return ERR_PTR(rc); |
36 | } | 44 | } |
37 | EXPORT_SYMBOL(ceph_get_direct_page_vector); | 45 | EXPORT_SYMBOL(ceph_get_direct_page_vector); |
diff --git a/net/core/dev.c b/net/core/dev.c index 8e726cb47ed7..8ae6631abcc2 100644 --- a/net/core/dev.c +++ b/net/core/dev.c | |||
@@ -1280,10 +1280,13 @@ static int __dev_close_many(struct list_head *head) | |||
1280 | 1280 | ||
1281 | static int __dev_close(struct net_device *dev) | 1281 | static int __dev_close(struct net_device *dev) |
1282 | { | 1282 | { |
1283 | int retval; | ||
1283 | LIST_HEAD(single); | 1284 | LIST_HEAD(single); |
1284 | 1285 | ||
1285 | list_add(&dev->unreg_list, &single); | 1286 | list_add(&dev->unreg_list, &single); |
1286 | return __dev_close_many(&single); | 1287 | retval = __dev_close_many(&single); |
1288 | list_del(&single); | ||
1289 | return retval; | ||
1287 | } | 1290 | } |
1288 | 1291 | ||
1289 | int dev_close_many(struct list_head *head) | 1292 | int dev_close_many(struct list_head *head) |
@@ -1325,7 +1328,7 @@ int dev_close(struct net_device *dev) | |||
1325 | 1328 | ||
1326 | list_add(&dev->unreg_list, &single); | 1329 | list_add(&dev->unreg_list, &single); |
1327 | dev_close_many(&single); | 1330 | dev_close_many(&single); |
1328 | 1331 | list_del(&single); | |
1329 | return 0; | 1332 | return 0; |
1330 | } | 1333 | } |
1331 | EXPORT_SYMBOL(dev_close); | 1334 | EXPORT_SYMBOL(dev_close); |
@@ -5063,6 +5066,7 @@ static void rollback_registered(struct net_device *dev) | |||
5063 | 5066 | ||
5064 | list_add(&dev->unreg_list, &single); | 5067 | list_add(&dev->unreg_list, &single); |
5065 | rollback_registered_many(&single); | 5068 | rollback_registered_many(&single); |
5069 | list_del(&single); | ||
5066 | } | 5070 | } |
5067 | 5071 | ||
5068 | unsigned long netdev_fix_features(unsigned long features, const char *name) | 5072 | unsigned long netdev_fix_features(unsigned long features, const char *name) |
@@ -6216,6 +6220,7 @@ static void __net_exit default_device_exit_batch(struct list_head *net_list) | |||
6216 | } | 6220 | } |
6217 | } | 6221 | } |
6218 | unregister_netdevice_many(&dev_kill_list); | 6222 | unregister_netdevice_many(&dev_kill_list); |
6223 | list_del(&dev_kill_list); | ||
6219 | rtnl_unlock(); | 6224 | rtnl_unlock(); |
6220 | } | 6225 | } |
6221 | 6226 | ||
diff --git a/net/core/dev_addr_lists.c b/net/core/dev_addr_lists.c index 508f9c18992f..133fd22ea287 100644 --- a/net/core/dev_addr_lists.c +++ b/net/core/dev_addr_lists.c | |||
@@ -144,7 +144,7 @@ void __hw_addr_del_multiple(struct netdev_hw_addr_list *to_list, | |||
144 | 144 | ||
145 | list_for_each_entry(ha, &from_list->list, list) { | 145 | list_for_each_entry(ha, &from_list->list, list) { |
146 | type = addr_type ? addr_type : ha->type; | 146 | type = addr_type ? addr_type : ha->type; |
147 | __hw_addr_del(to_list, ha->addr, addr_len, addr_type); | 147 | __hw_addr_del(to_list, ha->addr, addr_len, type); |
148 | } | 148 | } |
149 | } | 149 | } |
150 | EXPORT_SYMBOL(__hw_addr_del_multiple); | 150 | EXPORT_SYMBOL(__hw_addr_del_multiple); |
diff --git a/net/dcb/dcbnl.c b/net/dcb/dcbnl.c index 6b03f561caec..c44348adba3b 100644 --- a/net/dcb/dcbnl.c +++ b/net/dcb/dcbnl.c | |||
@@ -626,6 +626,9 @@ static int dcbnl_getapp(struct net_device *netdev, struct nlattr **tb, | |||
626 | dcb->cmd = DCB_CMD_GAPP; | 626 | dcb->cmd = DCB_CMD_GAPP; |
627 | 627 | ||
628 | app_nest = nla_nest_start(dcbnl_skb, DCB_ATTR_APP); | 628 | app_nest = nla_nest_start(dcbnl_skb, DCB_ATTR_APP); |
629 | if (!app_nest) | ||
630 | goto out_cancel; | ||
631 | |||
629 | ret = nla_put_u8(dcbnl_skb, DCB_APP_ATTR_IDTYPE, idtype); | 632 | ret = nla_put_u8(dcbnl_skb, DCB_APP_ATTR_IDTYPE, idtype); |
630 | if (ret) | 633 | if (ret) |
631 | goto out_cancel; | 634 | goto out_cancel; |
@@ -1190,7 +1193,7 @@ static int dcbnl_ieee_set(struct net_device *netdev, struct nlattr **tb, | |||
1190 | goto err; | 1193 | goto err; |
1191 | } | 1194 | } |
1192 | 1195 | ||
1193 | if (ieee[DCB_ATTR_IEEE_PFC] && ops->ieee_setets) { | 1196 | if (ieee[DCB_ATTR_IEEE_PFC] && ops->ieee_setpfc) { |
1194 | struct ieee_pfc *pfc = nla_data(ieee[DCB_ATTR_IEEE_PFC]); | 1197 | struct ieee_pfc *pfc = nla_data(ieee[DCB_ATTR_IEEE_PFC]); |
1195 | err = ops->ieee_setpfc(netdev, pfc); | 1198 | err = ops->ieee_setpfc(netdev, pfc); |
1196 | if (err) | 1199 | if (err) |
@@ -1613,6 +1616,10 @@ EXPORT_SYMBOL(dcb_getapp); | |||
1613 | u8 dcb_setapp(struct net_device *dev, struct dcb_app *new) | 1616 | u8 dcb_setapp(struct net_device *dev, struct dcb_app *new) |
1614 | { | 1617 | { |
1615 | struct dcb_app_type *itr; | 1618 | struct dcb_app_type *itr; |
1619 | struct dcb_app_type event; | ||
1620 | |||
1621 | memcpy(&event.name, dev->name, sizeof(event.name)); | ||
1622 | memcpy(&event.app, new, sizeof(event.app)); | ||
1616 | 1623 | ||
1617 | spin_lock(&dcb_lock); | 1624 | spin_lock(&dcb_lock); |
1618 | /* Search for existing match and replace */ | 1625 | /* Search for existing match and replace */ |
@@ -1644,7 +1651,7 @@ u8 dcb_setapp(struct net_device *dev, struct dcb_app *new) | |||
1644 | } | 1651 | } |
1645 | out: | 1652 | out: |
1646 | spin_unlock(&dcb_lock); | 1653 | spin_unlock(&dcb_lock); |
1647 | call_dcbevent_notifiers(DCB_APP_EVENT, new); | 1654 | call_dcbevent_notifiers(DCB_APP_EVENT, &event); |
1648 | return 0; | 1655 | return 0; |
1649 | } | 1656 | } |
1650 | EXPORT_SYMBOL(dcb_setapp); | 1657 | EXPORT_SYMBOL(dcb_setapp); |
diff --git a/net/dccp/input.c b/net/dccp/input.c index 8cde009e8b85..4222e7a654b0 100644 --- a/net/dccp/input.c +++ b/net/dccp/input.c | |||
@@ -614,6 +614,9 @@ int dccp_rcv_state_process(struct sock *sk, struct sk_buff *skb, | |||
614 | /* Caller (dccp_v4_do_rcv) will send Reset */ | 614 | /* Caller (dccp_v4_do_rcv) will send Reset */ |
615 | dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; | 615 | dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; |
616 | return 1; | 616 | return 1; |
617 | } else if (sk->sk_state == DCCP_CLOSED) { | ||
618 | dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; | ||
619 | return 1; | ||
617 | } | 620 | } |
618 | 621 | ||
619 | if (sk->sk_state != DCCP_REQUESTING && sk->sk_state != DCCP_RESPOND) { | 622 | if (sk->sk_state != DCCP_REQUESTING && sk->sk_state != DCCP_RESPOND) { |
@@ -668,10 +671,6 @@ int dccp_rcv_state_process(struct sock *sk, struct sk_buff *skb, | |||
668 | } | 671 | } |
669 | 672 | ||
670 | switch (sk->sk_state) { | 673 | switch (sk->sk_state) { |
671 | case DCCP_CLOSED: | ||
672 | dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; | ||
673 | return 1; | ||
674 | |||
675 | case DCCP_REQUESTING: | 674 | case DCCP_REQUESTING: |
676 | queued = dccp_rcv_request_sent_state_process(sk, skb, dh, len); | 675 | queued = dccp_rcv_request_sent_state_process(sk, skb, dh, len); |
677 | if (queued >= 0) | 676 | if (queued >= 0) |
diff --git a/net/dns_resolver/dns_key.c b/net/dns_resolver/dns_key.c index 739435a6af39..cfa7a5e1c5c9 100644 --- a/net/dns_resolver/dns_key.c +++ b/net/dns_resolver/dns_key.c | |||
@@ -67,8 +67,9 @@ dns_resolver_instantiate(struct key *key, const void *_data, size_t datalen) | |||
67 | size_t result_len = 0; | 67 | size_t result_len = 0; |
68 | const char *data = _data, *end, *opt; | 68 | const char *data = _data, *end, *opt; |
69 | 69 | ||
70 | kenter("%%%d,%s,'%s',%zu", | 70 | kenter("%%%d,%s,'%*.*s',%zu", |
71 | key->serial, key->description, data, datalen); | 71 | key->serial, key->description, |
72 | (int)datalen, (int)datalen, data, datalen); | ||
72 | 73 | ||
73 | if (datalen <= 1 || !data || data[datalen - 1] != '\0') | 74 | if (datalen <= 1 || !data || data[datalen - 1] != '\0') |
74 | return -EINVAL; | 75 | return -EINVAL; |
@@ -217,6 +218,19 @@ static void dns_resolver_describe(const struct key *key, struct seq_file *m) | |||
217 | seq_printf(m, ": %u", key->datalen); | 218 | seq_printf(m, ": %u", key->datalen); |
218 | } | 219 | } |
219 | 220 | ||
221 | /* | ||
222 | * read the DNS data | ||
223 | * - the key's semaphore is read-locked | ||
224 | */ | ||
225 | static long dns_resolver_read(const struct key *key, | ||
226 | char __user *buffer, size_t buflen) | ||
227 | { | ||
228 | if (key->type_data.x[0]) | ||
229 | return key->type_data.x[0]; | ||
230 | |||
231 | return user_read(key, buffer, buflen); | ||
232 | } | ||
233 | |||
220 | struct key_type key_type_dns_resolver = { | 234 | struct key_type key_type_dns_resolver = { |
221 | .name = "dns_resolver", | 235 | .name = "dns_resolver", |
222 | .instantiate = dns_resolver_instantiate, | 236 | .instantiate = dns_resolver_instantiate, |
@@ -224,7 +238,7 @@ struct key_type key_type_dns_resolver = { | |||
224 | .revoke = user_revoke, | 238 | .revoke = user_revoke, |
225 | .destroy = user_destroy, | 239 | .destroy = user_destroy, |
226 | .describe = dns_resolver_describe, | 240 | .describe = dns_resolver_describe, |
227 | .read = user_read, | 241 | .read = dns_resolver_read, |
228 | }; | 242 | }; |
229 | 243 | ||
230 | static int __init init_dns_resolver(void) | 244 | static int __init init_dns_resolver(void) |
diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c index 748cb5b337bd..df4616fce929 100644 --- a/net/ipv4/devinet.c +++ b/net/ipv4/devinet.c | |||
@@ -1030,6 +1030,21 @@ static inline bool inetdev_valid_mtu(unsigned mtu) | |||
1030 | return mtu >= 68; | 1030 | return mtu >= 68; |
1031 | } | 1031 | } |
1032 | 1032 | ||
1033 | static void inetdev_send_gratuitous_arp(struct net_device *dev, | ||
1034 | struct in_device *in_dev) | ||
1035 | |||
1036 | { | ||
1037 | struct in_ifaddr *ifa = in_dev->ifa_list; | ||
1038 | |||
1039 | if (!ifa) | ||
1040 | return; | ||
1041 | |||
1042 | arp_send(ARPOP_REQUEST, ETH_P_ARP, | ||
1043 | ifa->ifa_address, dev, | ||
1044 | ifa->ifa_address, NULL, | ||
1045 | dev->dev_addr, NULL); | ||
1046 | } | ||
1047 | |||
1033 | /* Called only under RTNL semaphore */ | 1048 | /* Called only under RTNL semaphore */ |
1034 | 1049 | ||
1035 | static int inetdev_event(struct notifier_block *this, unsigned long event, | 1050 | static int inetdev_event(struct notifier_block *this, unsigned long event, |
@@ -1082,18 +1097,13 @@ static int inetdev_event(struct notifier_block *this, unsigned long event, | |||
1082 | } | 1097 | } |
1083 | ip_mc_up(in_dev); | 1098 | ip_mc_up(in_dev); |
1084 | /* fall through */ | 1099 | /* fall through */ |
1085 | case NETDEV_NOTIFY_PEERS: | ||
1086 | case NETDEV_CHANGEADDR: | 1100 | case NETDEV_CHANGEADDR: |
1101 | if (!IN_DEV_ARP_NOTIFY(in_dev)) | ||
1102 | break; | ||
1103 | /* fall through */ | ||
1104 | case NETDEV_NOTIFY_PEERS: | ||
1087 | /* Send gratuitous ARP to notify of link change */ | 1105 | /* Send gratuitous ARP to notify of link change */ |
1088 | if (IN_DEV_ARP_NOTIFY(in_dev)) { | 1106 | inetdev_send_gratuitous_arp(dev, in_dev); |
1089 | struct in_ifaddr *ifa = in_dev->ifa_list; | ||
1090 | |||
1091 | if (ifa) | ||
1092 | arp_send(ARPOP_REQUEST, ETH_P_ARP, | ||
1093 | ifa->ifa_address, dev, | ||
1094 | ifa->ifa_address, NULL, | ||
1095 | dev->dev_addr, NULL); | ||
1096 | } | ||
1097 | break; | 1107 | break; |
1098 | case NETDEV_DOWN: | 1108 | case NETDEV_DOWN: |
1099 | ip_mc_down(in_dev); | 1109 | ip_mc_down(in_dev); |
diff --git a/net/ipv4/inet_timewait_sock.c b/net/ipv4/inet_timewait_sock.c index c5af909cf701..3c8dfa16614d 100644 --- a/net/ipv4/inet_timewait_sock.c +++ b/net/ipv4/inet_timewait_sock.c | |||
@@ -505,7 +505,9 @@ restart: | |||
505 | } | 505 | } |
506 | 506 | ||
507 | rcu_read_unlock(); | 507 | rcu_read_unlock(); |
508 | local_bh_disable(); | ||
508 | inet_twsk_deschedule(tw, twdr); | 509 | inet_twsk_deschedule(tw, twdr); |
510 | local_bh_enable(); | ||
509 | inet_twsk_put(tw); | 511 | inet_twsk_put(tw); |
510 | goto restart_rcu; | 512 | goto restart_rcu; |
511 | } | 513 | } |
diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c index eb68a0e34e49..6613edfac28c 100644 --- a/net/ipv4/ip_gre.c +++ b/net/ipv4/ip_gre.c | |||
@@ -775,6 +775,7 @@ static netdev_tx_t ipgre_tunnel_xmit(struct sk_buff *skb, struct net_device *dev | |||
775 | .fl4_dst = dst, | 775 | .fl4_dst = dst, |
776 | .fl4_src = tiph->saddr, | 776 | .fl4_src = tiph->saddr, |
777 | .fl4_tos = RT_TOS(tos), | 777 | .fl4_tos = RT_TOS(tos), |
778 | .proto = IPPROTO_GRE, | ||
778 | .fl_gre_key = tunnel->parms.o_key | 779 | .fl_gre_key = tunnel->parms.o_key |
779 | }; | 780 | }; |
780 | if (ip_route_output_key(dev_net(dev), &rt, &fl)) { | 781 | if (ip_route_output_key(dev_net(dev), &rt, &fl)) { |
diff --git a/net/ipv4/route.c b/net/ipv4/route.c index 788a3e74834e..6ed6603c2f6d 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c | |||
@@ -2722,6 +2722,7 @@ static struct dst_ops ipv4_dst_blackhole_ops = { | |||
2722 | .destroy = ipv4_dst_destroy, | 2722 | .destroy = ipv4_dst_destroy, |
2723 | .check = ipv4_blackhole_dst_check, | 2723 | .check = ipv4_blackhole_dst_check, |
2724 | .default_mtu = ipv4_blackhole_default_mtu, | 2724 | .default_mtu = ipv4_blackhole_default_mtu, |
2725 | .default_advmss = ipv4_default_advmss, | ||
2725 | .update_pmtu = ipv4_rt_blackhole_update_pmtu, | 2726 | .update_pmtu = ipv4_rt_blackhole_update_pmtu, |
2726 | }; | 2727 | }; |
2727 | 2728 | ||
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index eb7f82ebf4a3..65f6c0406245 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c | |||
@@ -1222,7 +1222,7 @@ static int tcp_check_dsack(struct sock *sk, struct sk_buff *ack_skb, | |||
1222 | } | 1222 | } |
1223 | 1223 | ||
1224 | /* D-SACK for already forgotten data... Do dumb counting. */ | 1224 | /* D-SACK for already forgotten data... Do dumb counting. */ |
1225 | if (dup_sack && | 1225 | if (dup_sack && tp->undo_marker && tp->undo_retrans && |
1226 | !after(end_seq_0, prior_snd_una) && | 1226 | !after(end_seq_0, prior_snd_una) && |
1227 | after(end_seq_0, tp->undo_marker)) | 1227 | after(end_seq_0, tp->undo_marker)) |
1228 | tp->undo_retrans--; | 1228 | tp->undo_retrans--; |
@@ -1299,7 +1299,8 @@ static u8 tcp_sacktag_one(struct sk_buff *skb, struct sock *sk, | |||
1299 | 1299 | ||
1300 | /* Account D-SACK for retransmitted packet. */ | 1300 | /* Account D-SACK for retransmitted packet. */ |
1301 | if (dup_sack && (sacked & TCPCB_RETRANS)) { | 1301 | if (dup_sack && (sacked & TCPCB_RETRANS)) { |
1302 | if (after(TCP_SKB_CB(skb)->end_seq, tp->undo_marker)) | 1302 | if (tp->undo_marker && tp->undo_retrans && |
1303 | after(TCP_SKB_CB(skb)->end_seq, tp->undo_marker)) | ||
1303 | tp->undo_retrans--; | 1304 | tp->undo_retrans--; |
1304 | if (sacked & TCPCB_SACKED_ACKED) | 1305 | if (sacked & TCPCB_SACKED_ACKED) |
1305 | state->reord = min(fack_count, state->reord); | 1306 | state->reord = min(fack_count, state->reord); |
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c index 406f320336e6..dfa5beb0c1c8 100644 --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c | |||
@@ -2162,7 +2162,7 @@ int tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb) | |||
2162 | if (!tp->retrans_stamp) | 2162 | if (!tp->retrans_stamp) |
2163 | tp->retrans_stamp = TCP_SKB_CB(skb)->when; | 2163 | tp->retrans_stamp = TCP_SKB_CB(skb)->when; |
2164 | 2164 | ||
2165 | tp->undo_retrans++; | 2165 | tp->undo_retrans += tcp_skb_pcount(skb); |
2166 | 2166 | ||
2167 | /* snd_nxt is stored to detect loss of retransmitted segment, | 2167 | /* snd_nxt is stored to detect loss of retransmitted segment, |
2168 | * see tcp_input.c tcp_sacktag_write_queue(). | 2168 | * see tcp_input.c tcp_sacktag_write_queue(). |
diff --git a/net/ipv6/netfilter/ip6t_LOG.c b/net/ipv6/netfilter/ip6t_LOG.c index 09c88891a753..de338037a736 100644 --- a/net/ipv6/netfilter/ip6t_LOG.c +++ b/net/ipv6/netfilter/ip6t_LOG.c | |||
@@ -410,7 +410,7 @@ fallback: | |||
410 | if (p != NULL) { | 410 | if (p != NULL) { |
411 | sb_add(m, "%02x", *p++); | 411 | sb_add(m, "%02x", *p++); |
412 | for (i = 1; i < len; i++) | 412 | for (i = 1; i < len; i++) |
413 | sb_add(m, ":%02x", p[i]); | 413 | sb_add(m, ":%02x", *p++); |
414 | } | 414 | } |
415 | sb_add(m, " "); | 415 | sb_add(m, " "); |
416 | 416 | ||
diff --git a/net/ipv6/route.c b/net/ipv6/route.c index 1c29f95695de..904312e25a3c 100644 --- a/net/ipv6/route.c +++ b/net/ipv6/route.c | |||
@@ -128,6 +128,7 @@ static struct dst_ops ip6_dst_blackhole_ops = { | |||
128 | .destroy = ip6_dst_destroy, | 128 | .destroy = ip6_dst_destroy, |
129 | .check = ip6_dst_check, | 129 | .check = ip6_dst_check, |
130 | .default_mtu = ip6_blackhole_default_mtu, | 130 | .default_mtu = ip6_blackhole_default_mtu, |
131 | .default_advmss = ip6_default_advmss, | ||
131 | .update_pmtu = ip6_rt_blackhole_update_pmtu, | 132 | .update_pmtu = ip6_rt_blackhole_update_pmtu, |
132 | }; | 133 | }; |
133 | 134 | ||
@@ -2556,14 +2557,16 @@ static | |||
2556 | int ipv6_sysctl_rtcache_flush(ctl_table *ctl, int write, | 2557 | int ipv6_sysctl_rtcache_flush(ctl_table *ctl, int write, |
2557 | void __user *buffer, size_t *lenp, loff_t *ppos) | 2558 | void __user *buffer, size_t *lenp, loff_t *ppos) |
2558 | { | 2559 | { |
2559 | struct net *net = current->nsproxy->net_ns; | 2560 | struct net *net; |
2560 | int delay = net->ipv6.sysctl.flush_delay; | 2561 | int delay; |
2561 | if (write) { | 2562 | if (!write) |
2562 | proc_dointvec(ctl, write, buffer, lenp, ppos); | ||
2563 | fib6_run_gc(delay <= 0 ? ~0UL : (unsigned long)delay, net); | ||
2564 | return 0; | ||
2565 | } else | ||
2566 | return -EINVAL; | 2563 | return -EINVAL; |
2564 | |||
2565 | net = (struct net *)ctl->extra1; | ||
2566 | delay = net->ipv6.sysctl.flush_delay; | ||
2567 | proc_dointvec(ctl, write, buffer, lenp, ppos); | ||
2568 | fib6_run_gc(delay <= 0 ? ~0UL : (unsigned long)delay, net); | ||
2569 | return 0; | ||
2567 | } | 2570 | } |
2568 | 2571 | ||
2569 | ctl_table ipv6_route_table_template[] = { | 2572 | ctl_table ipv6_route_table_template[] = { |
@@ -2650,6 +2653,7 @@ struct ctl_table * __net_init ipv6_route_sysctl_init(struct net *net) | |||
2650 | 2653 | ||
2651 | if (table) { | 2654 | if (table) { |
2652 | table[0].data = &net->ipv6.sysctl.flush_delay; | 2655 | table[0].data = &net->ipv6.sysctl.flush_delay; |
2656 | table[0].extra1 = net; | ||
2653 | table[1].data = &net->ipv6.ip6_dst_ops.gc_thresh; | 2657 | table[1].data = &net->ipv6.ip6_dst_ops.gc_thresh; |
2654 | table[2].data = &net->ipv6.sysctl.ip6_rt_max_size; | 2658 | table[2].data = &net->ipv6.sysctl.ip6_rt_max_size; |
2655 | table[3].data = &net->ipv6.sysctl.ip6_rt_gc_min_interval; | 2659 | table[3].data = &net->ipv6.sysctl.ip6_rt_gc_min_interval; |
diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c index 8acba456744e..7a10a8d1b2d0 100644 --- a/net/mac80211/iface.c +++ b/net/mac80211/iface.c | |||
@@ -1229,6 +1229,7 @@ void ieee80211_remove_interfaces(struct ieee80211_local *local) | |||
1229 | } | 1229 | } |
1230 | mutex_unlock(&local->iflist_mtx); | 1230 | mutex_unlock(&local->iflist_mtx); |
1231 | unregister_netdevice_many(&unreg_list); | 1231 | unregister_netdevice_many(&unreg_list); |
1232 | list_del(&unreg_list); | ||
1232 | } | 1233 | } |
1233 | 1234 | ||
1234 | static u32 ieee80211_idle_off(struct ieee80211_local *local, | 1235 | static u32 ieee80211_idle_off(struct ieee80211_local *local, |
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c index 45fbb9e33746..c9ceb4d57ab0 100644 --- a/net/mac80211/mlme.c +++ b/net/mac80211/mlme.c | |||
@@ -1033,6 +1033,12 @@ void ieee80211_sta_rx_notify(struct ieee80211_sub_if_data *sdata, | |||
1033 | if (is_multicast_ether_addr(hdr->addr1)) | 1033 | if (is_multicast_ether_addr(hdr->addr1)) |
1034 | return; | 1034 | return; |
1035 | 1035 | ||
1036 | /* | ||
1037 | * In case we receive frames after disassociation. | ||
1038 | */ | ||
1039 | if (!sdata->u.mgd.associated) | ||
1040 | return; | ||
1041 | |||
1036 | ieee80211_sta_reset_conn_monitor(sdata); | 1042 | ieee80211_sta_reset_conn_monitor(sdata); |
1037 | } | 1043 | } |
1038 | 1044 | ||
diff --git a/net/mac80211/util.c b/net/mac80211/util.c index cf68700abffa..d036597aabbe 100644 --- a/net/mac80211/util.c +++ b/net/mac80211/util.c | |||
@@ -1210,7 +1210,9 @@ int ieee80211_reconfig(struct ieee80211_local *local) | |||
1210 | switch (sdata->vif.type) { | 1210 | switch (sdata->vif.type) { |
1211 | case NL80211_IFTYPE_STATION: | 1211 | case NL80211_IFTYPE_STATION: |
1212 | changed |= BSS_CHANGED_ASSOC; | 1212 | changed |= BSS_CHANGED_ASSOC; |
1213 | mutex_lock(&sdata->u.mgd.mtx); | ||
1213 | ieee80211_bss_info_change_notify(sdata, changed); | 1214 | ieee80211_bss_info_change_notify(sdata, changed); |
1215 | mutex_unlock(&sdata->u.mgd.mtx); | ||
1214 | break; | 1216 | break; |
1215 | case NL80211_IFTYPE_ADHOC: | 1217 | case NL80211_IFTYPE_ADHOC: |
1216 | changed |= BSS_CHANGED_IBSS; | 1218 | changed |= BSS_CHANGED_IBSS; |
diff --git a/net/netfilter/core.c b/net/netfilter/core.c index 32fcbe290c04..4aa614b8a96a 100644 --- a/net/netfilter/core.c +++ b/net/netfilter/core.c | |||
@@ -133,6 +133,7 @@ unsigned int nf_iterate(struct list_head *head, | |||
133 | 133 | ||
134 | /* Optimization: we don't need to hold module | 134 | /* Optimization: we don't need to hold module |
135 | reference here, since function can't sleep. --RR */ | 135 | reference here, since function can't sleep. --RR */ |
136 | repeat: | ||
136 | verdict = elem->hook(hook, skb, indev, outdev, okfn); | 137 | verdict = elem->hook(hook, skb, indev, outdev, okfn); |
137 | if (verdict != NF_ACCEPT) { | 138 | if (verdict != NF_ACCEPT) { |
138 | #ifdef CONFIG_NETFILTER_DEBUG | 139 | #ifdef CONFIG_NETFILTER_DEBUG |
@@ -145,7 +146,7 @@ unsigned int nf_iterate(struct list_head *head, | |||
145 | #endif | 146 | #endif |
146 | if (verdict != NF_REPEAT) | 147 | if (verdict != NF_REPEAT) |
147 | return verdict; | 148 | return verdict; |
148 | *i = (*i)->prev; | 149 | goto repeat; |
149 | } | 150 | } |
150 | } | 151 | } |
151 | return NF_ACCEPT; | 152 | return NF_ACCEPT; |
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c index 22f7ad5101ab..ba98e1308f3c 100644 --- a/net/netfilter/ipvs/ip_vs_ctl.c +++ b/net/netfilter/ipvs/ip_vs_ctl.c | |||
@@ -808,9 +808,9 @@ __ip_vs_update_dest(struct ip_vs_service *svc, struct ip_vs_dest *dest, | |||
808 | dest->u_threshold = udest->u_threshold; | 808 | dest->u_threshold = udest->u_threshold; |
809 | dest->l_threshold = udest->l_threshold; | 809 | dest->l_threshold = udest->l_threshold; |
810 | 810 | ||
811 | spin_lock(&dest->dst_lock); | 811 | spin_lock_bh(&dest->dst_lock); |
812 | ip_vs_dst_reset(dest); | 812 | ip_vs_dst_reset(dest); |
813 | spin_unlock(&dest->dst_lock); | 813 | spin_unlock_bh(&dest->dst_lock); |
814 | 814 | ||
815 | if (add) | 815 | if (add) |
816 | ip_vs_new_estimator(&dest->stats); | 816 | ip_vs_new_estimator(&dest->stats); |
diff --git a/net/netfilter/nf_log.c b/net/netfilter/nf_log.c index b07393eab88e..91816998ed86 100644 --- a/net/netfilter/nf_log.c +++ b/net/netfilter/nf_log.c | |||
@@ -85,6 +85,8 @@ EXPORT_SYMBOL(nf_log_unregister); | |||
85 | 85 | ||
86 | int nf_log_bind_pf(u_int8_t pf, const struct nf_logger *logger) | 86 | int nf_log_bind_pf(u_int8_t pf, const struct nf_logger *logger) |
87 | { | 87 | { |
88 | if (pf >= ARRAY_SIZE(nf_loggers)) | ||
89 | return -EINVAL; | ||
88 | mutex_lock(&nf_log_mutex); | 90 | mutex_lock(&nf_log_mutex); |
89 | if (__find_logger(pf, logger->name) == NULL) { | 91 | if (__find_logger(pf, logger->name) == NULL) { |
90 | mutex_unlock(&nf_log_mutex); | 92 | mutex_unlock(&nf_log_mutex); |
@@ -98,6 +100,8 @@ EXPORT_SYMBOL(nf_log_bind_pf); | |||
98 | 100 | ||
99 | void nf_log_unbind_pf(u_int8_t pf) | 101 | void nf_log_unbind_pf(u_int8_t pf) |
100 | { | 102 | { |
103 | if (pf >= ARRAY_SIZE(nf_loggers)) | ||
104 | return; | ||
101 | mutex_lock(&nf_log_mutex); | 105 | mutex_lock(&nf_log_mutex); |
102 | rcu_assign_pointer(nf_loggers[pf], NULL); | 106 | rcu_assign_pointer(nf_loggers[pf], NULL); |
103 | mutex_unlock(&nf_log_mutex); | 107 | mutex_unlock(&nf_log_mutex); |
diff --git a/net/netfilter/nf_tproxy_core.c b/net/netfilter/nf_tproxy_core.c index 4d87befb04c0..474d621cbc2e 100644 --- a/net/netfilter/nf_tproxy_core.c +++ b/net/netfilter/nf_tproxy_core.c | |||
@@ -28,26 +28,23 @@ nf_tproxy_destructor(struct sk_buff *skb) | |||
28 | skb->destructor = NULL; | 28 | skb->destructor = NULL; |
29 | 29 | ||
30 | if (sk) | 30 | if (sk) |
31 | nf_tproxy_put_sock(sk); | 31 | sock_put(sk); |
32 | } | 32 | } |
33 | 33 | ||
34 | /* consumes sk */ | 34 | /* consumes sk */ |
35 | int | 35 | void |
36 | nf_tproxy_assign_sock(struct sk_buff *skb, struct sock *sk) | 36 | nf_tproxy_assign_sock(struct sk_buff *skb, struct sock *sk) |
37 | { | 37 | { |
38 | bool transparent = (sk->sk_state == TCP_TIME_WAIT) ? | 38 | /* assigning tw sockets complicates things; most |
39 | inet_twsk(sk)->tw_transparent : | 39 | * skb->sk->X checks would have to test sk->sk_state first */ |
40 | inet_sk(sk)->transparent; | 40 | if (sk->sk_state == TCP_TIME_WAIT) { |
41 | 41 | inet_twsk_put(inet_twsk(sk)); | |
42 | if (transparent) { | 42 | return; |
43 | skb_orphan(skb); | 43 | } |
44 | skb->sk = sk; | 44 | |
45 | skb->destructor = nf_tproxy_destructor; | 45 | skb_orphan(skb); |
46 | return 1; | 46 | skb->sk = sk; |
47 | } else | 47 | skb->destructor = nf_tproxy_destructor; |
48 | nf_tproxy_put_sock(sk); | ||
49 | |||
50 | return 0; | ||
51 | } | 48 | } |
52 | EXPORT_SYMBOL_GPL(nf_tproxy_assign_sock); | 49 | EXPORT_SYMBOL_GPL(nf_tproxy_assign_sock); |
53 | 50 | ||
diff --git a/net/netfilter/xt_TPROXY.c b/net/netfilter/xt_TPROXY.c index 640678f47a2a..dcfd57eb9d02 100644 --- a/net/netfilter/xt_TPROXY.c +++ b/net/netfilter/xt_TPROXY.c | |||
@@ -33,6 +33,20 @@ | |||
33 | #include <net/netfilter/nf_tproxy_core.h> | 33 | #include <net/netfilter/nf_tproxy_core.h> |
34 | #include <linux/netfilter/xt_TPROXY.h> | 34 | #include <linux/netfilter/xt_TPROXY.h> |
35 | 35 | ||
36 | static bool tproxy_sk_is_transparent(struct sock *sk) | ||
37 | { | ||
38 | if (sk->sk_state != TCP_TIME_WAIT) { | ||
39 | if (inet_sk(sk)->transparent) | ||
40 | return true; | ||
41 | sock_put(sk); | ||
42 | } else { | ||
43 | if (inet_twsk(sk)->tw_transparent) | ||
44 | return true; | ||
45 | inet_twsk_put(inet_twsk(sk)); | ||
46 | } | ||
47 | return false; | ||
48 | } | ||
49 | |||
36 | static inline __be32 | 50 | static inline __be32 |
37 | tproxy_laddr4(struct sk_buff *skb, __be32 user_laddr, __be32 daddr) | 51 | tproxy_laddr4(struct sk_buff *skb, __be32 user_laddr, __be32 daddr) |
38 | { | 52 | { |
@@ -141,7 +155,7 @@ tproxy_tg4(struct sk_buff *skb, __be32 laddr, __be16 lport, | |||
141 | skb->dev, NFT_LOOKUP_LISTENER); | 155 | skb->dev, NFT_LOOKUP_LISTENER); |
142 | 156 | ||
143 | /* NOTE: assign_sock consumes our sk reference */ | 157 | /* NOTE: assign_sock consumes our sk reference */ |
144 | if (sk && nf_tproxy_assign_sock(skb, sk)) { | 158 | if (sk && tproxy_sk_is_transparent(sk)) { |
145 | /* This should be in a separate target, but we don't do multiple | 159 | /* This should be in a separate target, but we don't do multiple |
146 | targets on the same rule yet */ | 160 | targets on the same rule yet */ |
147 | skb->mark = (skb->mark & ~mark_mask) ^ mark_value; | 161 | skb->mark = (skb->mark & ~mark_mask) ^ mark_value; |
@@ -149,6 +163,8 @@ tproxy_tg4(struct sk_buff *skb, __be32 laddr, __be16 lport, | |||
149 | pr_debug("redirecting: proto %hhu %pI4:%hu -> %pI4:%hu, mark: %x\n", | 163 | pr_debug("redirecting: proto %hhu %pI4:%hu -> %pI4:%hu, mark: %x\n", |
150 | iph->protocol, &iph->daddr, ntohs(hp->dest), | 164 | iph->protocol, &iph->daddr, ntohs(hp->dest), |
151 | &laddr, ntohs(lport), skb->mark); | 165 | &laddr, ntohs(lport), skb->mark); |
166 | |||
167 | nf_tproxy_assign_sock(skb, sk); | ||
152 | return NF_ACCEPT; | 168 | return NF_ACCEPT; |
153 | } | 169 | } |
154 | 170 | ||
@@ -306,7 +322,7 @@ tproxy_tg6_v1(struct sk_buff *skb, const struct xt_action_param *par) | |||
306 | par->in, NFT_LOOKUP_LISTENER); | 322 | par->in, NFT_LOOKUP_LISTENER); |
307 | 323 | ||
308 | /* NOTE: assign_sock consumes our sk reference */ | 324 | /* NOTE: assign_sock consumes our sk reference */ |
309 | if (sk && nf_tproxy_assign_sock(skb, sk)) { | 325 | if (sk && tproxy_sk_is_transparent(sk)) { |
310 | /* This should be in a separate target, but we don't do multiple | 326 | /* This should be in a separate target, but we don't do multiple |
311 | targets on the same rule yet */ | 327 | targets on the same rule yet */ |
312 | skb->mark = (skb->mark & ~tgi->mark_mask) ^ tgi->mark_value; | 328 | skb->mark = (skb->mark & ~tgi->mark_mask) ^ tgi->mark_value; |
@@ -314,6 +330,8 @@ tproxy_tg6_v1(struct sk_buff *skb, const struct xt_action_param *par) | |||
314 | pr_debug("redirecting: proto %hhu %pI6:%hu -> %pI6:%hu, mark: %x\n", | 330 | pr_debug("redirecting: proto %hhu %pI6:%hu -> %pI6:%hu, mark: %x\n", |
315 | tproto, &iph->saddr, ntohs(hp->source), | 331 | tproto, &iph->saddr, ntohs(hp->source), |
316 | laddr, ntohs(lport), skb->mark); | 332 | laddr, ntohs(lport), skb->mark); |
333 | |||
334 | nf_tproxy_assign_sock(skb, sk); | ||
317 | return NF_ACCEPT; | 335 | return NF_ACCEPT; |
318 | } | 336 | } |
319 | 337 | ||
diff --git a/net/netfilter/xt_socket.c b/net/netfilter/xt_socket.c index 00d6ae838303..9cc46356b577 100644 --- a/net/netfilter/xt_socket.c +++ b/net/netfilter/xt_socket.c | |||
@@ -35,6 +35,15 @@ | |||
35 | #include <net/netfilter/nf_conntrack.h> | 35 | #include <net/netfilter/nf_conntrack.h> |
36 | #endif | 36 | #endif |
37 | 37 | ||
38 | static void | ||
39 | xt_socket_put_sk(struct sock *sk) | ||
40 | { | ||
41 | if (sk->sk_state == TCP_TIME_WAIT) | ||
42 | inet_twsk_put(inet_twsk(sk)); | ||
43 | else | ||
44 | sock_put(sk); | ||
45 | } | ||
46 | |||
38 | static int | 47 | static int |
39 | extract_icmp4_fields(const struct sk_buff *skb, | 48 | extract_icmp4_fields(const struct sk_buff *skb, |
40 | u8 *protocol, | 49 | u8 *protocol, |
@@ -164,7 +173,7 @@ socket_match(const struct sk_buff *skb, struct xt_action_param *par, | |||
164 | (sk->sk_state == TCP_TIME_WAIT && | 173 | (sk->sk_state == TCP_TIME_WAIT && |
165 | inet_twsk(sk)->tw_transparent)); | 174 | inet_twsk(sk)->tw_transparent)); |
166 | 175 | ||
167 | nf_tproxy_put_sock(sk); | 176 | xt_socket_put_sk(sk); |
168 | 177 | ||
169 | if (wildcard || !transparent) | 178 | if (wildcard || !transparent) |
170 | sk = NULL; | 179 | sk = NULL; |
@@ -298,7 +307,7 @@ socket_mt6_v1(const struct sk_buff *skb, struct xt_action_param *par) | |||
298 | (sk->sk_state == TCP_TIME_WAIT && | 307 | (sk->sk_state == TCP_TIME_WAIT && |
299 | inet_twsk(sk)->tw_transparent)); | 308 | inet_twsk(sk)->tw_transparent)); |
300 | 309 | ||
301 | nf_tproxy_put_sock(sk); | 310 | xt_socket_put_sk(sk); |
302 | 311 | ||
303 | if (wildcard || !transparent) | 312 | if (wildcard || !transparent) |
304 | sk = NULL; | 313 | sk = NULL; |
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c index 478181d53c55..1f924595bdef 100644 --- a/net/netlink/af_netlink.c +++ b/net/netlink/af_netlink.c | |||
@@ -1407,7 +1407,7 @@ static int netlink_recvmsg(struct kiocb *kiocb, struct socket *sock, | |||
1407 | int noblock = flags&MSG_DONTWAIT; | 1407 | int noblock = flags&MSG_DONTWAIT; |
1408 | size_t copied; | 1408 | size_t copied; |
1409 | struct sk_buff *skb, *data_skb; | 1409 | struct sk_buff *skb, *data_skb; |
1410 | int err; | 1410 | int err, ret; |
1411 | 1411 | ||
1412 | if (flags&MSG_OOB) | 1412 | if (flags&MSG_OOB) |
1413 | return -EOPNOTSUPP; | 1413 | return -EOPNOTSUPP; |
@@ -1470,8 +1470,13 @@ static int netlink_recvmsg(struct kiocb *kiocb, struct socket *sock, | |||
1470 | 1470 | ||
1471 | skb_free_datagram(sk, skb); | 1471 | skb_free_datagram(sk, skb); |
1472 | 1472 | ||
1473 | if (nlk->cb && atomic_read(&sk->sk_rmem_alloc) <= sk->sk_rcvbuf / 2) | 1473 | if (nlk->cb && atomic_read(&sk->sk_rmem_alloc) <= sk->sk_rcvbuf / 2) { |
1474 | netlink_dump(sk); | 1474 | ret = netlink_dump(sk); |
1475 | if (ret) { | ||
1476 | sk->sk_err = ret; | ||
1477 | sk->sk_error_report(sk); | ||
1478 | } | ||
1479 | } | ||
1475 | 1480 | ||
1476 | scm_recv(sock, msg, siocb->scm, flags); | 1481 | scm_recv(sock, msg, siocb->scm, flags); |
1477 | out: | 1482 | out: |
@@ -1736,6 +1741,7 @@ int netlink_dump_start(struct sock *ssk, struct sk_buff *skb, | |||
1736 | struct netlink_callback *cb; | 1741 | struct netlink_callback *cb; |
1737 | struct sock *sk; | 1742 | struct sock *sk; |
1738 | struct netlink_sock *nlk; | 1743 | struct netlink_sock *nlk; |
1744 | int ret; | ||
1739 | 1745 | ||
1740 | cb = kzalloc(sizeof(*cb), GFP_KERNEL); | 1746 | cb = kzalloc(sizeof(*cb), GFP_KERNEL); |
1741 | if (cb == NULL) | 1747 | if (cb == NULL) |
@@ -1764,9 +1770,13 @@ int netlink_dump_start(struct sock *ssk, struct sk_buff *skb, | |||
1764 | nlk->cb = cb; | 1770 | nlk->cb = cb; |
1765 | mutex_unlock(nlk->cb_mutex); | 1771 | mutex_unlock(nlk->cb_mutex); |
1766 | 1772 | ||
1767 | netlink_dump(sk); | 1773 | ret = netlink_dump(sk); |
1774 | |||
1768 | sock_put(sk); | 1775 | sock_put(sk); |
1769 | 1776 | ||
1777 | if (ret) | ||
1778 | return ret; | ||
1779 | |||
1770 | /* We successfully started a dump, by returning -EINTR we | 1780 | /* We successfully started a dump, by returning -EINTR we |
1771 | * signal not to send ACK even if it was requested. | 1781 | * signal not to send ACK even if it was requested. |
1772 | */ | 1782 | */ |
diff --git a/net/rxrpc/ar-input.c b/net/rxrpc/ar-input.c index 89315009bab1..1a2b0633fece 100644 --- a/net/rxrpc/ar-input.c +++ b/net/rxrpc/ar-input.c | |||
@@ -423,6 +423,7 @@ void rxrpc_fast_process_packet(struct rxrpc_call *call, struct sk_buff *skb) | |||
423 | goto protocol_error; | 423 | goto protocol_error; |
424 | } | 424 | } |
425 | 425 | ||
426 | case RXRPC_PACKET_TYPE_ACKALL: | ||
426 | case RXRPC_PACKET_TYPE_ACK: | 427 | case RXRPC_PACKET_TYPE_ACK: |
427 | /* ACK processing is done in process context */ | 428 | /* ACK processing is done in process context */ |
428 | read_lock_bh(&call->state_lock); | 429 | read_lock_bh(&call->state_lock); |
diff --git a/net/rxrpc/ar-key.c b/net/rxrpc/ar-key.c index 5ee16f0353fe..d763793d39de 100644 --- a/net/rxrpc/ar-key.c +++ b/net/rxrpc/ar-key.c | |||
@@ -89,11 +89,11 @@ static int rxrpc_instantiate_xdr_rxkad(struct key *key, const __be32 *xdr, | |||
89 | return ret; | 89 | return ret; |
90 | 90 | ||
91 | plen -= sizeof(*token); | 91 | plen -= sizeof(*token); |
92 | token = kmalloc(sizeof(*token), GFP_KERNEL); | 92 | token = kzalloc(sizeof(*token), GFP_KERNEL); |
93 | if (!token) | 93 | if (!token) |
94 | return -ENOMEM; | 94 | return -ENOMEM; |
95 | 95 | ||
96 | token->kad = kmalloc(plen, GFP_KERNEL); | 96 | token->kad = kzalloc(plen, GFP_KERNEL); |
97 | if (!token->kad) { | 97 | if (!token->kad) { |
98 | kfree(token); | 98 | kfree(token); |
99 | return -ENOMEM; | 99 | return -ENOMEM; |
@@ -731,10 +731,10 @@ static int rxrpc_instantiate(struct key *key, const void *data, size_t datalen) | |||
731 | goto error; | 731 | goto error; |
732 | 732 | ||
733 | ret = -ENOMEM; | 733 | ret = -ENOMEM; |
734 | token = kmalloc(sizeof(*token), GFP_KERNEL); | 734 | token = kzalloc(sizeof(*token), GFP_KERNEL); |
735 | if (!token) | 735 | if (!token) |
736 | goto error; | 736 | goto error; |
737 | token->kad = kmalloc(plen, GFP_KERNEL); | 737 | token->kad = kzalloc(plen, GFP_KERNEL); |
738 | if (!token->kad) | 738 | if (!token->kad) |
739 | goto error_free; | 739 | goto error_free; |
740 | 740 | ||
diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c index 34dc598440a2..1bc698039ae2 100644 --- a/net/sched/sch_generic.c +++ b/net/sched/sch_generic.c | |||
@@ -839,6 +839,7 @@ void dev_deactivate(struct net_device *dev) | |||
839 | 839 | ||
840 | list_add(&dev->unreg_list, &single); | 840 | list_add(&dev->unreg_list, &single); |
841 | dev_deactivate_many(&single); | 841 | dev_deactivate_many(&single); |
842 | list_del(&single); | ||
842 | } | 843 | } |
843 | 844 | ||
844 | static void dev_init_scheduler_queue(struct net_device *dev, | 845 | static void dev_init_scheduler_queue(struct net_device *dev, |
diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c index 2cc46f0962ca..b23428f3c0dd 100644 --- a/net/sctp/sm_make_chunk.c +++ b/net/sctp/sm_make_chunk.c | |||
@@ -2029,11 +2029,11 @@ static sctp_ierror_t sctp_process_unk_param(const struct sctp_association *asoc, | |||
2029 | *errp = sctp_make_op_error_fixed(asoc, chunk); | 2029 | *errp = sctp_make_op_error_fixed(asoc, chunk); |
2030 | 2030 | ||
2031 | if (*errp) { | 2031 | if (*errp) { |
2032 | sctp_init_cause_fixed(*errp, SCTP_ERROR_UNKNOWN_PARAM, | 2032 | if (!sctp_init_cause_fixed(*errp, SCTP_ERROR_UNKNOWN_PARAM, |
2033 | WORD_ROUND(ntohs(param.p->length))); | 2033 | WORD_ROUND(ntohs(param.p->length)))) |
2034 | sctp_addto_chunk_fixed(*errp, | 2034 | sctp_addto_chunk_fixed(*errp, |
2035 | WORD_ROUND(ntohs(param.p->length)), | 2035 | WORD_ROUND(ntohs(param.p->length)), |
2036 | param.v); | 2036 | param.v); |
2037 | } else { | 2037 | } else { |
2038 | /* If there is no memory for generating the ERROR | 2038 | /* If there is no memory for generating the ERROR |
2039 | * report as specified, an ABORT will be triggered | 2039 | * report as specified, an ABORT will be triggered |
diff --git a/net/wireless/wext-compat.c b/net/wireless/wext-compat.c index 3e5dbd4e4cd5..d112f038edf0 100644 --- a/net/wireless/wext-compat.c +++ b/net/wireless/wext-compat.c | |||
@@ -802,11 +802,11 @@ int cfg80211_wext_siwfreq(struct net_device *dev, | |||
802 | return freq; | 802 | return freq; |
803 | if (freq == 0) | 803 | if (freq == 0) |
804 | return -EINVAL; | 804 | return -EINVAL; |
805 | wdev_lock(wdev); | ||
806 | mutex_lock(&rdev->devlist_mtx); | 805 | mutex_lock(&rdev->devlist_mtx); |
806 | wdev_lock(wdev); | ||
807 | err = cfg80211_set_freq(rdev, wdev, freq, NL80211_CHAN_NO_HT); | 807 | err = cfg80211_set_freq(rdev, wdev, freq, NL80211_CHAN_NO_HT); |
808 | mutex_unlock(&rdev->devlist_mtx); | ||
809 | wdev_unlock(wdev); | 808 | wdev_unlock(wdev); |
809 | mutex_unlock(&rdev->devlist_mtx); | ||
810 | return err; | 810 | return err; |
811 | default: | 811 | default: |
812 | return -EOPNOTSUPP; | 812 | return -EOPNOTSUPP; |
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c index 8b3ef404c794..6459588befc3 100644 --- a/net/xfrm/xfrm_policy.c +++ b/net/xfrm/xfrm_policy.c | |||
@@ -1340,10 +1340,13 @@ static inline struct xfrm_dst *xfrm_alloc_dst(struct net *net, int family) | |||
1340 | default: | 1340 | default: |
1341 | BUG(); | 1341 | BUG(); |
1342 | } | 1342 | } |
1343 | xdst = dst_alloc(dst_ops) ?: ERR_PTR(-ENOBUFS); | 1343 | xdst = dst_alloc(dst_ops); |
1344 | xfrm_policy_put_afinfo(afinfo); | 1344 | xfrm_policy_put_afinfo(afinfo); |
1345 | 1345 | ||
1346 | xdst->flo.ops = &xfrm_bundle_fc_ops; | 1346 | if (likely(xdst)) |
1347 | xdst->flo.ops = &xfrm_bundle_fc_ops; | ||
1348 | else | ||
1349 | xdst = ERR_PTR(-ENOBUFS); | ||
1347 | 1350 | ||
1348 | return xdst; | 1351 | return xdst; |
1349 | } | 1352 | } |
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index c9a16abacab4..6c94c6ce2925 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c | |||
@@ -315,6 +315,7 @@ static void parse_dep_file(void *map, size_t len) | |||
315 | char *end = m + len; | 315 | char *end = m + len; |
316 | char *p; | 316 | char *p; |
317 | char s[PATH_MAX]; | 317 | char s[PATH_MAX]; |
318 | int first; | ||
318 | 319 | ||
319 | p = strchr(m, ':'); | 320 | p = strchr(m, ':'); |
320 | if (!p) { | 321 | if (!p) { |
@@ -327,6 +328,7 @@ static void parse_dep_file(void *map, size_t len) | |||
327 | 328 | ||
328 | clear_config(); | 329 | clear_config(); |
329 | 330 | ||
331 | first = 1; | ||
330 | while (m < end) { | 332 | while (m < end) { |
331 | while (m < end && (*m == ' ' || *m == '\\' || *m == '\n')) | 333 | while (m < end && (*m == ' ' || *m == '\\' || *m == '\n')) |
332 | m++; | 334 | m++; |
@@ -340,9 +342,17 @@ static void parse_dep_file(void *map, size_t len) | |||
340 | if (strrcmp(s, "include/generated/autoconf.h") && | 342 | if (strrcmp(s, "include/generated/autoconf.h") && |
341 | strrcmp(s, "arch/um/include/uml-config.h") && | 343 | strrcmp(s, "arch/um/include/uml-config.h") && |
342 | strrcmp(s, ".ver")) { | 344 | strrcmp(s, ".ver")) { |
343 | printf(" %s \\\n", s); | 345 | /* |
346 | * Do not output the first dependency (the | ||
347 | * source file), so that kbuild is not confused | ||
348 | * if a .c file is rewritten into .S or vice | ||
349 | * versa. | ||
350 | */ | ||
351 | if (!first) | ||
352 | printf(" %s \\\n", s); | ||
344 | do_config_file(s); | 353 | do_config_file(s); |
345 | } | 354 | } |
355 | first = 0; | ||
346 | m = p + 1; | 356 | m = p + 1; |
347 | } | 357 | } |
348 | printf("\n%s: $(deps_%s)\n\n", target, target); | 358 | printf("\n%s: $(deps_%s)\n\n", target, target); |
diff --git a/sound/core/jack.c b/sound/core/jack.c index 4902ae568730..53b53e97c896 100644 --- a/sound/core/jack.c +++ b/sound/core/jack.c | |||
@@ -141,6 +141,7 @@ int snd_jack_new(struct snd_card *card, const char *id, int type, | |||
141 | 141 | ||
142 | fail_input: | 142 | fail_input: |
143 | input_free_device(jack->input_dev); | 143 | input_free_device(jack->input_dev); |
144 | kfree(jack->id); | ||
144 | kfree(jack); | 145 | kfree(jack); |
145 | return err; | 146 | return err; |
146 | } | 147 | } |
diff --git a/sound/pci/au88x0/au88x0_core.c b/sound/pci/au88x0/au88x0_core.c index 23f49f356e0f..16c0bdfbb164 100644 --- a/sound/pci/au88x0/au88x0_core.c +++ b/sound/pci/au88x0/au88x0_core.c | |||
@@ -1252,11 +1252,19 @@ static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma) { | |||
1252 | static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma) | 1252 | static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma) |
1253 | { | 1253 | { |
1254 | stream_t *dma = &vortex->dma_adb[adbdma]; | 1254 | stream_t *dma = &vortex->dma_adb[adbdma]; |
1255 | int temp; | 1255 | int temp, page, delta; |
1256 | 1256 | ||
1257 | temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)); | 1257 | temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)); |
1258 | temp = (dma->period_virt * dma->period_bytes) + (temp & (dma->period_bytes - 1)); | 1258 | page = (temp & ADB_SUBBUF_MASK) >> ADB_SUBBUF_SHIFT; |
1259 | return temp; | 1259 | if (dma->nr_periods >= 4) |
1260 | delta = (page - dma->period_real) & 3; | ||
1261 | else { | ||
1262 | delta = (page - dma->period_real); | ||
1263 | if (delta < 0) | ||
1264 | delta += dma->nr_periods; | ||
1265 | } | ||
1266 | return (dma->period_virt + delta) * dma->period_bytes | ||
1267 | + (temp & (dma->period_bytes - 1)); | ||
1260 | } | 1268 | } |
1261 | 1269 | ||
1262 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma) | 1270 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma) |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 0baffcdee8f9..fcedad9a5fef 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -2308,6 +2308,7 @@ static struct snd_pci_quirk position_fix_list[] __devinitdata = { | |||
2308 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), | 2308 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), |
2309 | SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB), | 2309 | SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB), |
2310 | SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB), | 2310 | SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB), |
2311 | SND_PCI_QUIRK(0x1043, 0x8410, "ASUS", POS_FIX_LPIB), | ||
2311 | SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB), | 2312 | SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB), |
2312 | SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), | 2313 | SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), |
2313 | SND_PCI_QUIRK(0x1179, 0xff10, "Toshiba A100-259", POS_FIX_LPIB), | 2314 | SND_PCI_QUIRK(0x1179, 0xff10, "Toshiba A100-259", POS_FIX_LPIB), |
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index a07b031090d8..067982f4f182 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c | |||
@@ -1039,9 +1039,11 @@ static struct hda_verb cs_errata_init_verbs[] = { | |||
1039 | {0x11, AC_VERB_SET_PROC_COEF, 0x0008}, | 1039 | {0x11, AC_VERB_SET_PROC_COEF, 0x0008}, |
1040 | {0x11, AC_VERB_SET_PROC_STATE, 0x00}, | 1040 | {0x11, AC_VERB_SET_PROC_STATE, 0x00}, |
1041 | 1041 | ||
1042 | #if 0 /* Don't to set to D3 as we are in power-up sequence */ | ||
1042 | {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */ | 1043 | {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */ |
1043 | {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */ | 1044 | {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */ |
1044 | /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */ | 1045 | /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */ |
1046 | #endif | ||
1045 | 1047 | ||
1046 | {} /* terminator */ | 1048 | {} /* terminator */ |
1047 | }; | 1049 | }; |
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index fbe97d32140d..4d5004e693f0 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c | |||
@@ -3114,6 +3114,8 @@ static struct snd_pci_quirk cxt5066_cfg_tbl[] = { | |||
3114 | SND_PCI_QUIRK(0x1028, 0x0401, "Dell Vostro 1014", CXT5066_DELL_VOSTRO), | 3114 | SND_PCI_QUIRK(0x1028, 0x0401, "Dell Vostro 1014", CXT5066_DELL_VOSTRO), |
3115 | SND_PCI_QUIRK(0x1028, 0x0402, "Dell Vostro", CXT5066_DELL_VOSTRO), | 3115 | SND_PCI_QUIRK(0x1028, 0x0402, "Dell Vostro", CXT5066_DELL_VOSTRO), |
3116 | SND_PCI_QUIRK(0x1028, 0x0408, "Dell Inspiron One 19T", CXT5066_IDEAPAD), | 3116 | SND_PCI_QUIRK(0x1028, 0x0408, "Dell Inspiron One 19T", CXT5066_IDEAPAD), |
3117 | SND_PCI_QUIRK(0x1028, 0x050f, "Dell Inspiron", CXT5066_IDEAPAD), | ||
3118 | SND_PCI_QUIRK(0x1028, 0x0510, "Dell Vostro", CXT5066_IDEAPAD), | ||
3117 | SND_PCI_QUIRK(0x103c, 0x360b, "HP G60", CXT5066_HP_LAPTOP), | 3119 | SND_PCI_QUIRK(0x103c, 0x360b, "HP G60", CXT5066_HP_LAPTOP), |
3118 | SND_PCI_QUIRK(0x1043, 0x13f3, "Asus A52J", CXT5066_ASUS), | 3120 | SND_PCI_QUIRK(0x1043, 0x13f3, "Asus A52J", CXT5066_ASUS), |
3119 | SND_PCI_QUIRK(0x1043, 0x1643, "Asus K52JU", CXT5066_ASUS), | 3121 | SND_PCI_QUIRK(0x1043, 0x1643, "Asus K52JU", CXT5066_ASUS), |
@@ -3410,7 +3412,7 @@ static void cx_auto_parse_output(struct hda_codec *codec) | |||
3410 | } | 3412 | } |
3411 | } | 3413 | } |
3412 | spec->multiout.dac_nids = spec->private_dac_nids; | 3414 | spec->multiout.dac_nids = spec->private_dac_nids; |
3413 | spec->multiout.max_channels = nums * 2; | 3415 | spec->multiout.max_channels = spec->multiout.num_dacs * 2; |
3414 | 3416 | ||
3415 | if (cfg->hp_outs > 0) | 3417 | if (cfg->hp_outs > 0) |
3416 | spec->auto_mute = 1; | 3418 | spec->auto_mute = 1; |
@@ -3729,9 +3731,9 @@ static int cx_auto_init(struct hda_codec *codec) | |||
3729 | return 0; | 3731 | return 0; |
3730 | } | 3732 | } |
3731 | 3733 | ||
3732 | static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | 3734 | static int cx_auto_add_volume_idx(struct hda_codec *codec, const char *basename, |
3733 | const char *dir, int cidx, | 3735 | const char *dir, int cidx, |
3734 | hda_nid_t nid, int hda_dir) | 3736 | hda_nid_t nid, int hda_dir, int amp_idx) |
3735 | { | 3737 | { |
3736 | static char name[32]; | 3738 | static char name[32]; |
3737 | static struct snd_kcontrol_new knew[] = { | 3739 | static struct snd_kcontrol_new knew[] = { |
@@ -3743,7 +3745,8 @@ static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | |||
3743 | 3745 | ||
3744 | for (i = 0; i < 2; i++) { | 3746 | for (i = 0; i < 2; i++) { |
3745 | struct snd_kcontrol *kctl; | 3747 | struct snd_kcontrol *kctl; |
3746 | knew[i].private_value = HDA_COMPOSE_AMP_VAL(nid, 3, 0, hda_dir); | 3748 | knew[i].private_value = HDA_COMPOSE_AMP_VAL(nid, 3, amp_idx, |
3749 | hda_dir); | ||
3747 | knew[i].subdevice = HDA_SUBDEV_AMP_FLAG; | 3750 | knew[i].subdevice = HDA_SUBDEV_AMP_FLAG; |
3748 | knew[i].index = cidx; | 3751 | knew[i].index = cidx; |
3749 | snprintf(name, sizeof(name), "%s%s %s", basename, dir, sfx[i]); | 3752 | snprintf(name, sizeof(name), "%s%s %s", basename, dir, sfx[i]); |
@@ -3759,6 +3762,9 @@ static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | |||
3759 | return 0; | 3762 | return 0; |
3760 | } | 3763 | } |
3761 | 3764 | ||
3765 | #define cx_auto_add_volume(codec, str, dir, cidx, nid, hda_dir) \ | ||
3766 | cx_auto_add_volume_idx(codec, str, dir, cidx, nid, hda_dir, 0) | ||
3767 | |||
3762 | #define cx_auto_add_pb_volume(codec, nid, str, idx) \ | 3768 | #define cx_auto_add_pb_volume(codec, nid, str, idx) \ |
3763 | cx_auto_add_volume(codec, str, " Playback", idx, nid, HDA_OUTPUT) | 3769 | cx_auto_add_volume(codec, str, " Playback", idx, nid, HDA_OUTPUT) |
3764 | 3770 | ||
@@ -3808,29 +3814,60 @@ static int cx_auto_build_input_controls(struct hda_codec *codec) | |||
3808 | struct conexant_spec *spec = codec->spec; | 3814 | struct conexant_spec *spec = codec->spec; |
3809 | struct auto_pin_cfg *cfg = &spec->autocfg; | 3815 | struct auto_pin_cfg *cfg = &spec->autocfg; |
3810 | static const char *prev_label; | 3816 | static const char *prev_label; |
3811 | int i, err, cidx; | 3817 | int i, err, cidx, conn_len; |
3818 | hda_nid_t conn[HDA_MAX_CONNECTIONS]; | ||
3819 | |||
3820 | int multi_adc_volume = 0; /* If the ADC nid has several input volumes */ | ||
3821 | int adc_nid = spec->adc_nids[0]; | ||
3822 | |||
3823 | conn_len = snd_hda_get_connections(codec, adc_nid, conn, | ||
3824 | HDA_MAX_CONNECTIONS); | ||
3825 | if (conn_len < 0) | ||
3826 | return conn_len; | ||
3827 | |||
3828 | multi_adc_volume = cfg->num_inputs > 1 && conn_len > 1; | ||
3829 | if (!multi_adc_volume) { | ||
3830 | err = cx_auto_add_volume(codec, "Capture", "", 0, adc_nid, | ||
3831 | HDA_INPUT); | ||
3832 | if (err < 0) | ||
3833 | return err; | ||
3834 | } | ||
3812 | 3835 | ||
3813 | err = cx_auto_add_volume(codec, "Capture", "", 0, spec->adc_nids[0], | ||
3814 | HDA_INPUT); | ||
3815 | if (err < 0) | ||
3816 | return err; | ||
3817 | prev_label = NULL; | 3836 | prev_label = NULL; |
3818 | cidx = 0; | 3837 | cidx = 0; |
3819 | for (i = 0; i < cfg->num_inputs; i++) { | 3838 | for (i = 0; i < cfg->num_inputs; i++) { |
3820 | hda_nid_t nid = cfg->inputs[i].pin; | 3839 | hda_nid_t nid = cfg->inputs[i].pin; |
3821 | const char *label; | 3840 | const char *label; |
3822 | if (!(get_wcaps(codec, nid) & AC_WCAP_IN_AMP)) | 3841 | int j; |
3842 | int pin_amp = get_wcaps(codec, nid) & AC_WCAP_IN_AMP; | ||
3843 | if (!pin_amp && !multi_adc_volume) | ||
3823 | continue; | 3844 | continue; |
3845 | |||
3824 | label = hda_get_autocfg_input_label(codec, cfg, i); | 3846 | label = hda_get_autocfg_input_label(codec, cfg, i); |
3825 | if (label == prev_label) | 3847 | if (label == prev_label) |
3826 | cidx++; | 3848 | cidx++; |
3827 | else | 3849 | else |
3828 | cidx = 0; | 3850 | cidx = 0; |
3829 | prev_label = label; | 3851 | prev_label = label; |
3830 | err = cx_auto_add_volume(codec, label, " Capture", cidx, | 3852 | |
3831 | nid, HDA_INPUT); | 3853 | if (pin_amp) { |
3832 | if (err < 0) | 3854 | err = cx_auto_add_volume(codec, label, " Boost", cidx, |
3833 | return err; | 3855 | nid, HDA_INPUT); |
3856 | if (err < 0) | ||
3857 | return err; | ||
3858 | } | ||
3859 | |||
3860 | if (!multi_adc_volume) | ||
3861 | continue; | ||
3862 | for (j = 0; j < conn_len; j++) { | ||
3863 | if (conn[j] == nid) { | ||
3864 | err = cx_auto_add_volume_idx(codec, label, | ||
3865 | " Capture", cidx, adc_nid, HDA_INPUT, j); | ||
3866 | if (err < 0) | ||
3867 | return err; | ||
3868 | break; | ||
3869 | } | ||
3870 | } | ||
3834 | } | 3871 | } |
3835 | return 0; | 3872 | return 0; |
3836 | } | 3873 | } |
@@ -3902,6 +3939,8 @@ static struct hda_codec_preset snd_hda_preset_conexant[] = { | |||
3902 | .patch = patch_cxt5066 }, | 3939 | .patch = patch_cxt5066 }, |
3903 | { .id = 0x14f15069, .name = "CX20585", | 3940 | { .id = 0x14f15069, .name = "CX20585", |
3904 | .patch = patch_cxt5066 }, | 3941 | .patch = patch_cxt5066 }, |
3942 | { .id = 0x14f1506e, .name = "CX20590", | ||
3943 | .patch = patch_cxt5066 }, | ||
3905 | { .id = 0x14f15097, .name = "CX20631", | 3944 | { .id = 0x14f15097, .name = "CX20631", |
3906 | .patch = patch_conexant_auto }, | 3945 | .patch = patch_conexant_auto }, |
3907 | { .id = 0x14f15098, .name = "CX20632", | 3946 | { .id = 0x14f15098, .name = "CX20632", |
@@ -3928,6 +3967,7 @@ MODULE_ALIAS("snd-hda-codec-id:14f15066"); | |||
3928 | MODULE_ALIAS("snd-hda-codec-id:14f15067"); | 3967 | MODULE_ALIAS("snd-hda-codec-id:14f15067"); |
3929 | MODULE_ALIAS("snd-hda-codec-id:14f15068"); | 3968 | MODULE_ALIAS("snd-hda-codec-id:14f15068"); |
3930 | MODULE_ALIAS("snd-hda-codec-id:14f15069"); | 3969 | MODULE_ALIAS("snd-hda-codec-id:14f15069"); |
3970 | MODULE_ALIAS("snd-hda-codec-id:14f1506e"); | ||
3931 | MODULE_ALIAS("snd-hda-codec-id:14f15097"); | 3971 | MODULE_ALIAS("snd-hda-codec-id:14f15097"); |
3932 | MODULE_ALIAS("snd-hda-codec-id:14f15098"); | 3972 | MODULE_ALIAS("snd-hda-codec-id:14f15098"); |
3933 | MODULE_ALIAS("snd-hda-codec-id:14f150a1"); | 3973 | MODULE_ALIAS("snd-hda-codec-id:14f150a1"); |
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index a58767736727..ec0fa2dd0a27 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c | |||
@@ -1634,6 +1634,9 @@ static struct hda_codec_preset snd_hda_preset_hdmi[] = { | |||
1634 | { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1634 | { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
1635 | { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1635 | { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
1636 | { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1636 | { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
1637 | { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | ||
1638 | { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | ||
1639 | /* 17 is known to be absent */ | ||
1637 | { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1640 | { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
1638 | { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1641 | { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
1639 | { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, | 1642 | { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, |
@@ -1676,6 +1679,8 @@ MODULE_ALIAS("snd-hda-codec-id:10de0011"); | |||
1676 | MODULE_ALIAS("snd-hda-codec-id:10de0012"); | 1679 | MODULE_ALIAS("snd-hda-codec-id:10de0012"); |
1677 | MODULE_ALIAS("snd-hda-codec-id:10de0013"); | 1680 | MODULE_ALIAS("snd-hda-codec-id:10de0013"); |
1678 | MODULE_ALIAS("snd-hda-codec-id:10de0014"); | 1681 | MODULE_ALIAS("snd-hda-codec-id:10de0014"); |
1682 | MODULE_ALIAS("snd-hda-codec-id:10de0015"); | ||
1683 | MODULE_ALIAS("snd-hda-codec-id:10de0016"); | ||
1679 | MODULE_ALIAS("snd-hda-codec-id:10de0018"); | 1684 | MODULE_ALIAS("snd-hda-codec-id:10de0018"); |
1680 | MODULE_ALIAS("snd-hda-codec-id:10de0019"); | 1685 | MODULE_ALIAS("snd-hda-codec-id:10de0019"); |
1681 | MODULE_ALIAS("snd-hda-codec-id:10de001a"); | 1686 | MODULE_ALIAS("snd-hda-codec-id:10de001a"); |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 3328a259a242..4261bb8eec1d 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -1133,11 +1133,8 @@ static void alc_automute_speaker(struct hda_codec *codec, int pinctl) | |||
1133 | nid = spec->autocfg.hp_pins[i]; | 1133 | nid = spec->autocfg.hp_pins[i]; |
1134 | if (!nid) | 1134 | if (!nid) |
1135 | break; | 1135 | break; |
1136 | if (snd_hda_jack_detect(codec, nid)) { | 1136 | alc_report_jack(codec, nid); |
1137 | spec->jack_present = 1; | 1137 | spec->jack_present |= snd_hda_jack_detect(codec, nid); |
1138 | break; | ||
1139 | } | ||
1140 | alc_report_jack(codec, spec->autocfg.hp_pins[i]); | ||
1141 | } | 1138 | } |
1142 | 1139 | ||
1143 | mute = spec->jack_present ? HDA_AMP_MUTE : 0; | 1140 | mute = spec->jack_present ? HDA_AMP_MUTE : 0; |
@@ -15015,7 +15012,7 @@ static struct snd_pci_quirk alc269_cfg_tbl[] = { | |||
15015 | SND_PCI_QUIRK(0x1043, 0x11e3, "ASUS U33Jc", ALC269VB_AMIC), | 15012 | SND_PCI_QUIRK(0x1043, 0x11e3, "ASUS U33Jc", ALC269VB_AMIC), |
15016 | SND_PCI_QUIRK(0x1043, 0x1273, "ASUS UL80Jt", ALC269VB_AMIC), | 15013 | SND_PCI_QUIRK(0x1043, 0x1273, "ASUS UL80Jt", ALC269VB_AMIC), |
15017 | SND_PCI_QUIRK(0x1043, 0x1283, "ASUS U53Jc", ALC269_AMIC), | 15014 | SND_PCI_QUIRK(0x1043, 0x1283, "ASUS U53Jc", ALC269_AMIC), |
15018 | SND_PCI_QUIRK(0x1043, 0x12b3, "ASUS N82Jv", ALC269_AMIC), | 15015 | SND_PCI_QUIRK(0x1043, 0x12b3, "ASUS N82JV", ALC269VB_AMIC), |
15019 | SND_PCI_QUIRK(0x1043, 0x12d3, "ASUS N61Jv", ALC269_AMIC), | 15016 | SND_PCI_QUIRK(0x1043, 0x12d3, "ASUS N61Jv", ALC269_AMIC), |
15020 | SND_PCI_QUIRK(0x1043, 0x13a3, "ASUS UL30Vt", ALC269_AMIC), | 15017 | SND_PCI_QUIRK(0x1043, 0x13a3, "ASUS UL30Vt", ALC269_AMIC), |
15021 | SND_PCI_QUIRK(0x1043, 0x1373, "ASUS G73JX", ALC269_AMIC), | 15018 | SND_PCI_QUIRK(0x1043, 0x1373, "ASUS G73JX", ALC269_AMIC), |
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 9ea48b425d0b..bd7b123f6440 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -586,7 +586,12 @@ static hda_nid_t stac92hd83xxx_pin_nids[10] = { | |||
586 | 0x0f, 0x10, 0x11, 0x1f, 0x20, | 586 | 0x0f, 0x10, 0x11, 0x1f, 0x20, |
587 | }; | 587 | }; |
588 | 588 | ||
589 | static hda_nid_t stac92hd88xxx_pin_nids[10] = { | 589 | static hda_nid_t stac92hd87xxx_pin_nids[6] = { |
590 | 0x0a, 0x0b, 0x0c, 0x0d, | ||
591 | 0x0f, 0x11, | ||
592 | }; | ||
593 | |||
594 | static hda_nid_t stac92hd88xxx_pin_nids[8] = { | ||
590 | 0x0a, 0x0b, 0x0c, 0x0d, | 595 | 0x0a, 0x0b, 0x0c, 0x0d, |
591 | 0x0f, 0x11, 0x1f, 0x20, | 596 | 0x0f, 0x11, 0x1f, 0x20, |
592 | }; | 597 | }; |
@@ -5430,12 +5435,13 @@ again: | |||
5430 | switch (codec->vendor_id) { | 5435 | switch (codec->vendor_id) { |
5431 | case 0x111d76d1: | 5436 | case 0x111d76d1: |
5432 | case 0x111d76d9: | 5437 | case 0x111d76d9: |
5438 | case 0x111d76e5: | ||
5433 | spec->dmic_nids = stac92hd87b_dmic_nids; | 5439 | spec->dmic_nids = stac92hd87b_dmic_nids; |
5434 | spec->num_dmics = stac92xx_connected_ports(codec, | 5440 | spec->num_dmics = stac92xx_connected_ports(codec, |
5435 | stac92hd87b_dmic_nids, | 5441 | stac92hd87b_dmic_nids, |
5436 | STAC92HD87B_NUM_DMICS); | 5442 | STAC92HD87B_NUM_DMICS); |
5437 | spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids); | 5443 | spec->num_pins = ARRAY_SIZE(stac92hd87xxx_pin_nids); |
5438 | spec->pin_nids = stac92hd88xxx_pin_nids; | 5444 | spec->pin_nids = stac92hd87xxx_pin_nids; |
5439 | spec->mono_nid = 0; | 5445 | spec->mono_nid = 0; |
5440 | spec->num_pwrs = 0; | 5446 | spec->num_pwrs = 0; |
5441 | break; | 5447 | break; |
@@ -5443,6 +5449,7 @@ again: | |||
5443 | case 0x111d7667: | 5449 | case 0x111d7667: |
5444 | case 0x111d7668: | 5450 | case 0x111d7668: |
5445 | case 0x111d7669: | 5451 | case 0x111d7669: |
5452 | case 0x111d76e3: | ||
5446 | spec->num_dmics = stac92xx_connected_ports(codec, | 5453 | spec->num_dmics = stac92xx_connected_ports(codec, |
5447 | stac92hd88xxx_dmic_nids, | 5454 | stac92hd88xxx_dmic_nids, |
5448 | STAC92HD88XXX_NUM_DMICS); | 5455 | STAC92HD88XXX_NUM_DMICS); |
@@ -6387,6 +6394,8 @@ static struct hda_codec_preset snd_hda_preset_sigmatel[] = { | |||
6387 | { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, | 6394 | { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, |
6388 | { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, | 6395 | { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, |
6389 | { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, | 6396 | { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, |
6397 | { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, | ||
6398 | { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, | ||
6390 | { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, | 6399 | { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, |
6391 | {} /* terminator */ | 6400 | {} /* terminator */ |
6392 | }; | 6401 | }; |
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index a76c3260d941..63b0054200a8 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c | |||
@@ -567,7 +567,7 @@ static void via_auto_init_analog_input(struct hda_codec *codec) | |||
567 | hda_nid_t nid = cfg->inputs[i].pin; | 567 | hda_nid_t nid = cfg->inputs[i].pin; |
568 | if (spec->smart51_enabled && is_smart51_pins(spec, nid)) | 568 | if (spec->smart51_enabled && is_smart51_pins(spec, nid)) |
569 | ctl = PIN_OUT; | 569 | ctl = PIN_OUT; |
570 | else if (i == AUTO_PIN_MIC) | 570 | else if (cfg->inputs[i].type == AUTO_PIN_MIC) |
571 | ctl = PIN_VREF50; | 571 | ctl = PIN_VREF50; |
572 | else | 572 | else |
573 | ctl = PIN_IN; | 573 | ctl = PIN_IN; |
diff --git a/sound/soc/codecs/cx20442.c b/sound/soc/codecs/cx20442.c index bb4bf65b9e7e..0bb424af956f 100644 --- a/sound/soc/codecs/cx20442.c +++ b/sound/soc/codecs/cx20442.c | |||
@@ -367,7 +367,7 @@ static int cx20442_codec_remove(struct snd_soc_codec *codec) | |||
367 | return 0; | 367 | return 0; |
368 | } | 368 | } |
369 | 369 | ||
370 | static const u8 cx20442_reg = CX20442_TELOUT | CX20442_MIC; | 370 | static const u8 cx20442_reg; |
371 | 371 | ||
372 | static struct snd_soc_codec_driver cx20442_codec_dev = { | 372 | static struct snd_soc_codec_driver cx20442_codec_dev = { |
373 | .probe = cx20442_codec_probe, | 373 | .probe = cx20442_codec_probe, |
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 987476a5895f..017d99ceb42e 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c | |||
@@ -1482,7 +1482,7 @@ int wm8903_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, | |||
1482 | WM8903_MICDET_EINT | WM8903_MICSHRT_EINT, | 1482 | WM8903_MICDET_EINT | WM8903_MICSHRT_EINT, |
1483 | irq_mask); | 1483 | irq_mask); |
1484 | 1484 | ||
1485 | if (det && shrt) { | 1485 | if (det || shrt) { |
1486 | /* Enable mic detection, this may not have been set through | 1486 | /* Enable mic detection, this may not have been set through |
1487 | * platform data (eg, if the defaults are OK). */ | 1487 | * platform data (eg, if the defaults are OK). */ |
1488 | snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0, | 1488 | snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0, |
diff --git a/sound/soc/codecs/wm8903.h b/sound/soc/codecs/wm8903.h index e8490f3edd03..e3ec2433b215 100644 --- a/sound/soc/codecs/wm8903.h +++ b/sound/soc/codecs/wm8903.h | |||
@@ -165,7 +165,7 @@ extern int wm8903_mic_detect(struct snd_soc_codec *codec, | |||
165 | 165 | ||
166 | #define WM8903_VMID_RES_50K 2 | 166 | #define WM8903_VMID_RES_50K 2 |
167 | #define WM8903_VMID_RES_250K 3 | 167 | #define WM8903_VMID_RES_250K 3 |
168 | #define WM8903_VMID_RES_5K 4 | 168 | #define WM8903_VMID_RES_5K 6 |
169 | 169 | ||
170 | /* | 170 | /* |
171 | * R8 (0x08) - Analogue DAC 0 | 171 | * R8 (0x08) - Analogue DAC 0 |
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 37b8aa8a680f..4afbe3b2e443 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c | |||
@@ -107,6 +107,12 @@ struct wm8994_priv { | |||
107 | 107 | ||
108 | int revision; | 108 | int revision; |
109 | struct wm8994_pdata *pdata; | 109 | struct wm8994_pdata *pdata; |
110 | |||
111 | unsigned int aif1clk_enable:1; | ||
112 | unsigned int aif2clk_enable:1; | ||
113 | |||
114 | unsigned int aif1clk_disable:1; | ||
115 | unsigned int aif2clk_disable:1; | ||
110 | }; | 116 | }; |
111 | 117 | ||
112 | static int wm8994_readable(unsigned int reg) | 118 | static int wm8994_readable(unsigned int reg) |
@@ -1004,6 +1010,110 @@ static void wm8994_update_class_w(struct snd_soc_codec *codec) | |||
1004 | } | 1010 | } |
1005 | } | 1011 | } |
1006 | 1012 | ||
1013 | static int late_enable_ev(struct snd_soc_dapm_widget *w, | ||
1014 | struct snd_kcontrol *kcontrol, int event) | ||
1015 | { | ||
1016 | struct snd_soc_codec *codec = w->codec; | ||
1017 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1018 | |||
1019 | switch (event) { | ||
1020 | case SND_SOC_DAPM_PRE_PMU: | ||
1021 | if (wm8994->aif1clk_enable) { | ||
1022 | snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | ||
1023 | WM8994_AIF1CLK_ENA_MASK, | ||
1024 | WM8994_AIF1CLK_ENA); | ||
1025 | wm8994->aif1clk_enable = 0; | ||
1026 | } | ||
1027 | if (wm8994->aif2clk_enable) { | ||
1028 | snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | ||
1029 | WM8994_AIF2CLK_ENA_MASK, | ||
1030 | WM8994_AIF2CLK_ENA); | ||
1031 | wm8994->aif2clk_enable = 0; | ||
1032 | } | ||
1033 | break; | ||
1034 | } | ||
1035 | |||
1036 | return 0; | ||
1037 | } | ||
1038 | |||
1039 | static int late_disable_ev(struct snd_soc_dapm_widget *w, | ||
1040 | struct snd_kcontrol *kcontrol, int event) | ||
1041 | { | ||
1042 | struct snd_soc_codec *codec = w->codec; | ||
1043 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1044 | |||
1045 | switch (event) { | ||
1046 | case SND_SOC_DAPM_POST_PMD: | ||
1047 | if (wm8994->aif1clk_disable) { | ||
1048 | snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | ||
1049 | WM8994_AIF1CLK_ENA_MASK, 0); | ||
1050 | wm8994->aif1clk_disable = 0; | ||
1051 | } | ||
1052 | if (wm8994->aif2clk_disable) { | ||
1053 | snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | ||
1054 | WM8994_AIF2CLK_ENA_MASK, 0); | ||
1055 | wm8994->aif2clk_disable = 0; | ||
1056 | } | ||
1057 | break; | ||
1058 | } | ||
1059 | |||
1060 | return 0; | ||
1061 | } | ||
1062 | |||
1063 | static int aif1clk_ev(struct snd_soc_dapm_widget *w, | ||
1064 | struct snd_kcontrol *kcontrol, int event) | ||
1065 | { | ||
1066 | struct snd_soc_codec *codec = w->codec; | ||
1067 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1068 | |||
1069 | switch (event) { | ||
1070 | case SND_SOC_DAPM_PRE_PMU: | ||
1071 | wm8994->aif1clk_enable = 1; | ||
1072 | break; | ||
1073 | case SND_SOC_DAPM_POST_PMD: | ||
1074 | wm8994->aif1clk_disable = 1; | ||
1075 | break; | ||
1076 | } | ||
1077 | |||
1078 | return 0; | ||
1079 | } | ||
1080 | |||
1081 | static int aif2clk_ev(struct snd_soc_dapm_widget *w, | ||
1082 | struct snd_kcontrol *kcontrol, int event) | ||
1083 | { | ||
1084 | struct snd_soc_codec *codec = w->codec; | ||
1085 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1086 | |||
1087 | switch (event) { | ||
1088 | case SND_SOC_DAPM_PRE_PMU: | ||
1089 | wm8994->aif2clk_enable = 1; | ||
1090 | break; | ||
1091 | case SND_SOC_DAPM_POST_PMD: | ||
1092 | wm8994->aif2clk_disable = 1; | ||
1093 | break; | ||
1094 | } | ||
1095 | |||
1096 | return 0; | ||
1097 | } | ||
1098 | |||
1099 | static int adc_mux_ev(struct snd_soc_dapm_widget *w, | ||
1100 | struct snd_kcontrol *kcontrol, int event) | ||
1101 | { | ||
1102 | late_enable_ev(w, kcontrol, event); | ||
1103 | return 0; | ||
1104 | } | ||
1105 | |||
1106 | static int dac_ev(struct snd_soc_dapm_widget *w, | ||
1107 | struct snd_kcontrol *kcontrol, int event) | ||
1108 | { | ||
1109 | struct snd_soc_codec *codec = w->codec; | ||
1110 | unsigned int mask = 1 << w->shift; | ||
1111 | |||
1112 | snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, | ||
1113 | mask, mask); | ||
1114 | return 0; | ||
1115 | } | ||
1116 | |||
1007 | static const char *hp_mux_text[] = { | 1117 | static const char *hp_mux_text[] = { |
1008 | "Mixer", | 1118 | "Mixer", |
1009 | "DAC", | 1119 | "DAC", |
@@ -1272,6 +1382,59 @@ static const struct soc_enum aif2dacr_src_enum = | |||
1272 | static const struct snd_kcontrol_new aif2dacr_src_mux = | 1382 | static const struct snd_kcontrol_new aif2dacr_src_mux = |
1273 | SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum); | 1383 | SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum); |
1274 | 1384 | ||
1385 | static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = { | ||
1386 | SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_ev, | ||
1387 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
1388 | SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_ev, | ||
1389 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
1390 | |||
1391 | SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1392 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1393 | SND_SOC_DAPM_PGA_E("Late DAC1R Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1394 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1395 | SND_SOC_DAPM_PGA_E("Late DAC2L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1396 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1397 | SND_SOC_DAPM_PGA_E("Late DAC2R Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1398 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1399 | |||
1400 | SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev) | ||
1401 | }; | ||
1402 | |||
1403 | static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = { | ||
1404 | SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), | ||
1405 | SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0) | ||
1406 | }; | ||
1407 | |||
1408 | static const struct snd_soc_dapm_widget wm8994_dac_revd_widgets[] = { | ||
1409 | SND_SOC_DAPM_DAC_E("DAC2L", NULL, SND_SOC_NOPM, 3, 0, | ||
1410 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1411 | SND_SOC_DAPM_DAC_E("DAC2R", NULL, SND_SOC_NOPM, 2, 0, | ||
1412 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1413 | SND_SOC_DAPM_DAC_E("DAC1L", NULL, SND_SOC_NOPM, 1, 0, | ||
1414 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1415 | SND_SOC_DAPM_DAC_E("DAC1R", NULL, SND_SOC_NOPM, 0, 0, | ||
1416 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1417 | }; | ||
1418 | |||
1419 | static const struct snd_soc_dapm_widget wm8994_dac_widgets[] = { | ||
1420 | SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0), | ||
1421 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0), | ||
1422 | SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0), | ||
1423 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), | ||
1424 | }; | ||
1425 | |||
1426 | static const struct snd_soc_dapm_widget wm8994_adc_revd_widgets[] = { | ||
1427 | SND_SOC_DAPM_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux, | ||
1428 | adc_mux_ev, SND_SOC_DAPM_PRE_PMU), | ||
1429 | SND_SOC_DAPM_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux, | ||
1430 | adc_mux_ev, SND_SOC_DAPM_PRE_PMU), | ||
1431 | }; | ||
1432 | |||
1433 | static const struct snd_soc_dapm_widget wm8994_adc_widgets[] = { | ||
1434 | SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), | ||
1435 | SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), | ||
1436 | }; | ||
1437 | |||
1275 | static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { | 1438 | static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { |
1276 | SND_SOC_DAPM_INPUT("DMIC1DAT"), | 1439 | SND_SOC_DAPM_INPUT("DMIC1DAT"), |
1277 | SND_SOC_DAPM_INPUT("DMIC2DAT"), | 1440 | SND_SOC_DAPM_INPUT("DMIC2DAT"), |
@@ -1284,9 +1447,6 @@ SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0), | |||
1284 | SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), | 1447 | SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), |
1285 | SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), | 1448 | SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), |
1286 | 1449 | ||
1287 | SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), | ||
1288 | SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0), | ||
1289 | |||
1290 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL, | 1450 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL, |
1291 | 0, WM8994_POWER_MANAGEMENT_4, 9, 0), | 1451 | 0, WM8994_POWER_MANAGEMENT_4, 9, 0), |
1292 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL, | 1452 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL, |
@@ -1369,14 +1529,6 @@ SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8994_POWER_MANAGEMENT_4, 2, 0), | |||
1369 | SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), | 1529 | SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), |
1370 | SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), | 1530 | SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), |
1371 | 1531 | ||
1372 | SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), | ||
1373 | SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), | ||
1374 | |||
1375 | SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0), | ||
1376 | SND_SOC_DAPM_DAC("DAC2R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0), | ||
1377 | SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0), | ||
1378 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), | ||
1379 | |||
1380 | SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), | 1532 | SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), |
1381 | SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), | 1533 | SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), |
1382 | 1534 | ||
@@ -1516,14 +1668,12 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1516 | { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" }, | 1668 | { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" }, |
1517 | 1669 | ||
1518 | /* DAC1 inputs */ | 1670 | /* DAC1 inputs */ |
1519 | { "DAC1L", NULL, "DAC1L Mixer" }, | ||
1520 | { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" }, | 1671 | { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" }, |
1521 | { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | 1672 | { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, |
1522 | { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | 1673 | { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, |
1523 | { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, | 1674 | { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, |
1524 | { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | 1675 | { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, |
1525 | 1676 | ||
1526 | { "DAC1R", NULL, "DAC1R Mixer" }, | ||
1527 | { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" }, | 1677 | { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" }, |
1528 | { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | 1678 | { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, |
1529 | { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | 1679 | { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, |
@@ -1532,7 +1682,6 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1532 | 1682 | ||
1533 | /* DAC2/AIF2 outputs */ | 1683 | /* DAC2/AIF2 outputs */ |
1534 | { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" }, | 1684 | { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" }, |
1535 | { "DAC2L", NULL, "AIF2DAC2L Mixer" }, | ||
1536 | { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" }, | 1685 | { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" }, |
1537 | { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | 1686 | { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, |
1538 | { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | 1687 | { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, |
@@ -1540,7 +1689,6 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1540 | { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | 1689 | { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, |
1541 | 1690 | ||
1542 | { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" }, | 1691 | { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" }, |
1543 | { "DAC2R", NULL, "AIF2DAC2R Mixer" }, | ||
1544 | { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" }, | 1692 | { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" }, |
1545 | { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | 1693 | { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, |
1546 | { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | 1694 | { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, |
@@ -1584,6 +1732,24 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1584 | { "Right Headphone Mux", "DAC", "DAC1R" }, | 1732 | { "Right Headphone Mux", "DAC", "DAC1R" }, |
1585 | }; | 1733 | }; |
1586 | 1734 | ||
1735 | static const struct snd_soc_dapm_route wm8994_lateclk_revd_intercon[] = { | ||
1736 | { "DAC1L", NULL, "Late DAC1L Enable PGA" }, | ||
1737 | { "Late DAC1L Enable PGA", NULL, "DAC1L Mixer" }, | ||
1738 | { "DAC1R", NULL, "Late DAC1R Enable PGA" }, | ||
1739 | { "Late DAC1R Enable PGA", NULL, "DAC1R Mixer" }, | ||
1740 | { "DAC2L", NULL, "Late DAC2L Enable PGA" }, | ||
1741 | { "Late DAC2L Enable PGA", NULL, "AIF2DAC2L Mixer" }, | ||
1742 | { "DAC2R", NULL, "Late DAC2R Enable PGA" }, | ||
1743 | { "Late DAC2R Enable PGA", NULL, "AIF2DAC2R Mixer" } | ||
1744 | }; | ||
1745 | |||
1746 | static const struct snd_soc_dapm_route wm8994_lateclk_intercon[] = { | ||
1747 | { "DAC1L", NULL, "DAC1L Mixer" }, | ||
1748 | { "DAC1R", NULL, "DAC1R Mixer" }, | ||
1749 | { "DAC2L", NULL, "AIF2DAC2L Mixer" }, | ||
1750 | { "DAC2R", NULL, "AIF2DAC2R Mixer" }, | ||
1751 | }; | ||
1752 | |||
1587 | static const struct snd_soc_dapm_route wm8994_revd_intercon[] = { | 1753 | static const struct snd_soc_dapm_route wm8994_revd_intercon[] = { |
1588 | { "AIF1DACDAT", NULL, "AIF2DACDAT" }, | 1754 | { "AIF1DACDAT", NULL, "AIF2DACDAT" }, |
1589 | { "AIF2DACDAT", NULL, "AIF1DACDAT" }, | 1755 | { "AIF2DACDAT", NULL, "AIF1DACDAT" }, |
@@ -2514,6 +2680,22 @@ static int wm8994_resume(struct snd_soc_codec *codec) | |||
2514 | { | 2680 | { |
2515 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | 2681 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); |
2516 | int i, ret; | 2682 | int i, ret; |
2683 | unsigned int val, mask; | ||
2684 | |||
2685 | if (wm8994->revision < 4) { | ||
2686 | /* force a HW read */ | ||
2687 | val = wm8994_reg_read(codec->control_data, | ||
2688 | WM8994_POWER_MANAGEMENT_5); | ||
2689 | |||
2690 | /* modify the cache only */ | ||
2691 | codec->cache_only = 1; | ||
2692 | mask = WM8994_DAC1R_ENA | WM8994_DAC1L_ENA | | ||
2693 | WM8994_DAC2R_ENA | WM8994_DAC2L_ENA; | ||
2694 | val &= mask; | ||
2695 | snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, | ||
2696 | mask, val); | ||
2697 | codec->cache_only = 0; | ||
2698 | } | ||
2517 | 2699 | ||
2518 | /* Restore the registers */ | 2700 | /* Restore the registers */ |
2519 | ret = snd_soc_cache_sync(codec); | 2701 | ret = snd_soc_cache_sync(codec); |
@@ -2847,11 +3029,10 @@ static void wm8958_default_micdet(u16 status, void *data) | |||
2847 | report |= SND_JACK_BTN_5; | 3029 | report |= SND_JACK_BTN_5; |
2848 | 3030 | ||
2849 | done: | 3031 | done: |
2850 | snd_soc_jack_report(wm8994->micdet[0].jack, | 3032 | snd_soc_jack_report(wm8994->micdet[0].jack, report, |
2851 | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | | 3033 | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | |
2852 | SND_JACK_BTN_3 | SND_JACK_BTN_4 | SND_JACK_BTN_5 | | 3034 | SND_JACK_BTN_3 | SND_JACK_BTN_4 | SND_JACK_BTN_5 | |
2853 | SND_JACK_MICROPHONE | SND_JACK_VIDEOOUT, | 3035 | SND_JACK_MICROPHONE | SND_JACK_VIDEOOUT); |
2854 | report); | ||
2855 | } | 3036 | } |
2856 | 3037 | ||
2857 | /** | 3038 | /** |
@@ -3125,6 +3306,21 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
3125 | case WM8994: | 3306 | case WM8994: |
3126 | snd_soc_dapm_new_controls(dapm, wm8994_specific_dapm_widgets, | 3307 | snd_soc_dapm_new_controls(dapm, wm8994_specific_dapm_widgets, |
3127 | ARRAY_SIZE(wm8994_specific_dapm_widgets)); | 3308 | ARRAY_SIZE(wm8994_specific_dapm_widgets)); |
3309 | if (wm8994->revision < 4) { | ||
3310 | snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets, | ||
3311 | ARRAY_SIZE(wm8994_lateclk_revd_widgets)); | ||
3312 | snd_soc_dapm_new_controls(dapm, wm8994_adc_revd_widgets, | ||
3313 | ARRAY_SIZE(wm8994_adc_revd_widgets)); | ||
3314 | snd_soc_dapm_new_controls(dapm, wm8994_dac_revd_widgets, | ||
3315 | ARRAY_SIZE(wm8994_dac_revd_widgets)); | ||
3316 | } else { | ||
3317 | snd_soc_dapm_new_controls(dapm, wm8994_lateclk_widgets, | ||
3318 | ARRAY_SIZE(wm8994_lateclk_widgets)); | ||
3319 | snd_soc_dapm_new_controls(dapm, wm8994_adc_widgets, | ||
3320 | ARRAY_SIZE(wm8994_adc_widgets)); | ||
3321 | snd_soc_dapm_new_controls(dapm, wm8994_dac_widgets, | ||
3322 | ARRAY_SIZE(wm8994_dac_widgets)); | ||
3323 | } | ||
3128 | break; | 3324 | break; |
3129 | case WM8958: | 3325 | case WM8958: |
3130 | snd_soc_add_controls(codec, wm8958_snd_controls, | 3326 | snd_soc_add_controls(codec, wm8958_snd_controls, |
@@ -3143,10 +3339,15 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
3143 | snd_soc_dapm_add_routes(dapm, wm8994_intercon, | 3339 | snd_soc_dapm_add_routes(dapm, wm8994_intercon, |
3144 | ARRAY_SIZE(wm8994_intercon)); | 3340 | ARRAY_SIZE(wm8994_intercon)); |
3145 | 3341 | ||
3146 | if (wm8994->revision < 4) | 3342 | if (wm8994->revision < 4) { |
3147 | snd_soc_dapm_add_routes(dapm, wm8994_revd_intercon, | 3343 | snd_soc_dapm_add_routes(dapm, wm8994_revd_intercon, |
3148 | ARRAY_SIZE(wm8994_revd_intercon)); | 3344 | ARRAY_SIZE(wm8994_revd_intercon)); |
3149 | 3345 | snd_soc_dapm_add_routes(dapm, wm8994_lateclk_revd_intercon, | |
3346 | ARRAY_SIZE(wm8994_lateclk_revd_intercon)); | ||
3347 | } else { | ||
3348 | snd_soc_dapm_add_routes(dapm, wm8994_lateclk_intercon, | ||
3349 | ARRAY_SIZE(wm8994_lateclk_intercon)); | ||
3350 | } | ||
3150 | break; | 3351 | break; |
3151 | case WM8958: | 3352 | case WM8958: |
3152 | snd_soc_dapm_add_routes(dapm, wm8958_intercon, | 3353 | snd_soc_dapm_add_routes(dapm, wm8958_intercon, |
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c index 43825b2102a5..cce704c275c6 100644 --- a/sound/soc/codecs/wm9081.c +++ b/sound/soc/codecs/wm9081.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/moduleparam.h> | 15 | #include <linux/moduleparam.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/device.h> | ||
18 | #include <linux/pm.h> | 19 | #include <linux/pm.h> |
19 | #include <linux/i2c.h> | 20 | #include <linux/i2c.h> |
20 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
@@ -1341,6 +1342,10 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c, | |||
1341 | wm9081->control_type = SND_SOC_I2C; | 1342 | wm9081->control_type = SND_SOC_I2C; |
1342 | wm9081->control_data = i2c; | 1343 | wm9081->control_data = i2c; |
1343 | 1344 | ||
1345 | if (dev_get_platdata(&i2c->dev)) | ||
1346 | memcpy(&wm9081->retune, dev_get_platdata(&i2c->dev), | ||
1347 | sizeof(wm9081->retune)); | ||
1348 | |||
1344 | ret = snd_soc_register_codec(&i2c->dev, | 1349 | ret = snd_soc_register_codec(&i2c->dev, |
1345 | &soc_codec_dev_wm9081, &wm9081_dai, 1); | 1350 | &soc_codec_dev_wm9081, &wm9081_dai, 1); |
1346 | if (ret < 0) | 1351 | if (ret < 0) |
diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c index 613df5db0b32..516892706063 100644 --- a/sound/soc/codecs/wm_hubs.c +++ b/sound/soc/codecs/wm_hubs.c | |||
@@ -674,6 +674,9 @@ SND_SOC_DAPM_OUTPUT("LINEOUT2N"), | |||
674 | }; | 674 | }; |
675 | 675 | ||
676 | static const struct snd_soc_dapm_route analogue_routes[] = { | 676 | static const struct snd_soc_dapm_route analogue_routes[] = { |
677 | { "MICBIAS1", NULL, "CLK_SYS" }, | ||
678 | { "MICBIAS2", NULL, "CLK_SYS" }, | ||
679 | |||
677 | { "IN1L PGA", "IN1LP Switch", "IN1LP" }, | 680 | { "IN1L PGA", "IN1LP Switch", "IN1LP" }, |
678 | { "IN1L PGA", "IN1LN Switch", "IN1LN" }, | 681 | { "IN1L PGA", "IN1LN Switch", "IN1LN" }, |
679 | 682 | ||
diff --git a/sound/soc/imx/eukrea-tlv320.c b/sound/soc/imx/eukrea-tlv320.c index e20c9e1457c0..1e9bccae4e80 100644 --- a/sound/soc/imx/eukrea-tlv320.c +++ b/sound/soc/imx/eukrea-tlv320.c | |||
@@ -79,7 +79,7 @@ static struct snd_soc_dai_link eukrea_tlv320_dai = { | |||
79 | .name = "tlv320aic23", | 79 | .name = "tlv320aic23", |
80 | .stream_name = "TLV320AIC23", | 80 | .stream_name = "TLV320AIC23", |
81 | .codec_dai_name = "tlv320aic23-hifi", | 81 | .codec_dai_name = "tlv320aic23-hifi", |
82 | .platform_name = "imx-pcm-audio.0", | 82 | .platform_name = "imx-fiq-pcm-audio.0", |
83 | .codec_name = "tlv320aic23-codec.0-001a", | 83 | .codec_name = "tlv320aic23-codec.0-001a", |
84 | .cpu_dai_name = "imx-ssi.0", | 84 | .cpu_dai_name = "imx-ssi.0", |
85 | .ops = &eukrea_tlv320_snd_ops, | 85 | .ops = &eukrea_tlv320_snd_ops, |
diff --git a/sound/soc/pxa/e740_wm9705.c b/sound/soc/pxa/e740_wm9705.c index 28333e7d9c50..dc65650a6fa1 100644 --- a/sound/soc/pxa/e740_wm9705.c +++ b/sound/soc/pxa/e740_wm9705.c | |||
@@ -117,7 +117,7 @@ static struct snd_soc_dai_link e740_dai[] = { | |||
117 | { | 117 | { |
118 | .name = "AC97", | 118 | .name = "AC97", |
119 | .stream_name = "AC97 HiFi", | 119 | .stream_name = "AC97 HiFi", |
120 | .cpu_dai_name = "pxa-ac97.0", | 120 | .cpu_dai_name = "pxa2xx-ac97", |
121 | .codec_dai_name = "wm9705-hifi", | 121 | .codec_dai_name = "wm9705-hifi", |
122 | .platform_name = "pxa-pcm-audio", | 122 | .platform_name = "pxa-pcm-audio", |
123 | .codec_name = "wm9705-codec", | 123 | .codec_name = "wm9705-codec", |
@@ -126,7 +126,7 @@ static struct snd_soc_dai_link e740_dai[] = { | |||
126 | { | 126 | { |
127 | .name = "AC97 Aux", | 127 | .name = "AC97 Aux", |
128 | .stream_name = "AC97 Aux", | 128 | .stream_name = "AC97 Aux", |
129 | .cpu_dai_name = "pxa-ac97.1", | 129 | .cpu_dai_name = "pxa2xx-ac97-aux", |
130 | .codec_dai_name = "wm9705-aux", | 130 | .codec_dai_name = "wm9705-aux", |
131 | .platform_name = "pxa-pcm-audio", | 131 | .platform_name = "pxa-pcm-audio", |
132 | .codec_name = "wm9705-codec", | 132 | .codec_name = "wm9705-codec", |
diff --git a/sound/soc/pxa/e750_wm9705.c b/sound/soc/pxa/e750_wm9705.c index 01bf31675c55..51897fcd911b 100644 --- a/sound/soc/pxa/e750_wm9705.c +++ b/sound/soc/pxa/e750_wm9705.c | |||
@@ -99,7 +99,7 @@ static struct snd_soc_dai_link e750_dai[] = { | |||
99 | { | 99 | { |
100 | .name = "AC97", | 100 | .name = "AC97", |
101 | .stream_name = "AC97 HiFi", | 101 | .stream_name = "AC97 HiFi", |
102 | .cpu_dai_name = "pxa-ac97.0", | 102 | .cpu_dai_name = "pxa2xx-ac97", |
103 | .codec_dai_name = "wm9705-hifi", | 103 | .codec_dai_name = "wm9705-hifi", |
104 | .platform_name = "pxa-pcm-audio", | 104 | .platform_name = "pxa-pcm-audio", |
105 | .codec_name = "wm9705-codec", | 105 | .codec_name = "wm9705-codec", |
@@ -109,7 +109,7 @@ static struct snd_soc_dai_link e750_dai[] = { | |||
109 | { | 109 | { |
110 | .name = "AC97 Aux", | 110 | .name = "AC97 Aux", |
111 | .stream_name = "AC97 Aux", | 111 | .stream_name = "AC97 Aux", |
112 | .cpu_dai_name = "pxa-ac97.1", | 112 | .cpu_dai_name = "pxa2xx-ac97-aux", |
113 | .codec_dai_name ="wm9705-aux", | 113 | .codec_dai_name ="wm9705-aux", |
114 | .platform_name = "pxa-pcm-audio", | 114 | .platform_name = "pxa-pcm-audio", |
115 | .codec_name = "wm9705-codec", | 115 | .codec_name = "wm9705-codec", |
diff --git a/sound/soc/pxa/e800_wm9712.c b/sound/soc/pxa/e800_wm9712.c index c6a37c6ef23b..053ed208e59f 100644 --- a/sound/soc/pxa/e800_wm9712.c +++ b/sound/soc/pxa/e800_wm9712.c | |||
@@ -89,7 +89,7 @@ static struct snd_soc_dai_link e800_dai[] = { | |||
89 | { | 89 | { |
90 | .name = "AC97", | 90 | .name = "AC97", |
91 | .stream_name = "AC97 HiFi", | 91 | .stream_name = "AC97 HiFi", |
92 | .cpu_dai_name = "pxa-ac97.0", | 92 | .cpu_dai_name = "pxa2xx-ac97", |
93 | .codec_dai_name = "wm9712-hifi", | 93 | .codec_dai_name = "wm9712-hifi", |
94 | .platform_name = "pxa-pcm-audio", | 94 | .platform_name = "pxa-pcm-audio", |
95 | .codec_name = "wm9712-codec", | 95 | .codec_name = "wm9712-codec", |
@@ -98,7 +98,7 @@ static struct snd_soc_dai_link e800_dai[] = { | |||
98 | { | 98 | { |
99 | .name = "AC97 Aux", | 99 | .name = "AC97 Aux", |
100 | .stream_name = "AC97 Aux", | 100 | .stream_name = "AC97 Aux", |
101 | .cpu_dai_name = "pxa-ac97.1", | 101 | .cpu_dai_name = "pxa2xx-ac97-aux", |
102 | .codec_dai_name ="wm9712-aux", | 102 | .codec_dai_name ="wm9712-aux", |
103 | .platform_name = "pxa-pcm-audio", | 103 | .platform_name = "pxa-pcm-audio", |
104 | .codec_name = "wm9712-codec", | 104 | .codec_name = "wm9712-codec", |
diff --git a/sound/soc/pxa/em-x270.c b/sound/soc/pxa/em-x270.c index fc22e6eefc98..b13a4252812d 100644 --- a/sound/soc/pxa/em-x270.c +++ b/sound/soc/pxa/em-x270.c | |||
@@ -37,7 +37,7 @@ static struct snd_soc_dai_link em_x270_dai[] = { | |||
37 | { | 37 | { |
38 | .name = "AC97", | 38 | .name = "AC97", |
39 | .stream_name = "AC97 HiFi", | 39 | .stream_name = "AC97 HiFi", |
40 | .cpu_dai_name = "pxa-ac97.0", | 40 | .cpu_dai_name = "pxa2xx-ac97", |
41 | .codec_dai_name = "wm9712-hifi", | 41 | .codec_dai_name = "wm9712-hifi", |
42 | .platform_name = "pxa-pcm-audio", | 42 | .platform_name = "pxa-pcm-audio", |
43 | .codec_name = "wm9712-codec", | 43 | .codec_name = "wm9712-codec", |
@@ -45,7 +45,7 @@ static struct snd_soc_dai_link em_x270_dai[] = { | |||
45 | { | 45 | { |
46 | .name = "AC97 Aux", | 46 | .name = "AC97 Aux", |
47 | .stream_name = "AC97 Aux", | 47 | .stream_name = "AC97 Aux", |
48 | .cpu_dai_name = "pxa-ac97.1", | 48 | .cpu_dai_name = "pxa2xx-ac97-aux", |
49 | .codec_dai_name ="wm9712-aux", | 49 | .codec_dai_name ="wm9712-aux", |
50 | .platform_name = "pxa-pcm-audio", | 50 | .platform_name = "pxa-pcm-audio", |
51 | .codec_name = "wm9712-codec", | 51 | .codec_name = "wm9712-codec", |
diff --git a/sound/soc/pxa/mioa701_wm9713.c b/sound/soc/pxa/mioa701_wm9713.c index 0d70fc8c12bd..38ca6759907e 100644 --- a/sound/soc/pxa/mioa701_wm9713.c +++ b/sound/soc/pxa/mioa701_wm9713.c | |||
@@ -162,7 +162,7 @@ static struct snd_soc_dai_link mioa701_dai[] = { | |||
162 | { | 162 | { |
163 | .name = "AC97", | 163 | .name = "AC97", |
164 | .stream_name = "AC97 HiFi", | 164 | .stream_name = "AC97 HiFi", |
165 | .cpu_dai_name = "pxa-ac97.0", | 165 | .cpu_dai_name = "pxa2xx-ac97", |
166 | .codec_dai_name = "wm9713-hifi", | 166 | .codec_dai_name = "wm9713-hifi", |
167 | .codec_name = "wm9713-codec", | 167 | .codec_name = "wm9713-codec", |
168 | .init = mioa701_wm9713_init, | 168 | .init = mioa701_wm9713_init, |
@@ -172,7 +172,7 @@ static struct snd_soc_dai_link mioa701_dai[] = { | |||
172 | { | 172 | { |
173 | .name = "AC97 Aux", | 173 | .name = "AC97 Aux", |
174 | .stream_name = "AC97 Aux", | 174 | .stream_name = "AC97 Aux", |
175 | .cpu_dai_name = "pxa-ac97.1", | 175 | .cpu_dai_name = "pxa2xx-ac97-aux", |
176 | .codec_dai_name ="wm9713-aux", | 176 | .codec_dai_name ="wm9713-aux", |
177 | .codec_name = "wm9713-codec", | 177 | .codec_name = "wm9713-codec", |
178 | .platform_name = "pxa-pcm-audio", | 178 | .platform_name = "pxa-pcm-audio", |
diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c index 857db96d4a4f..504e4004f004 100644 --- a/sound/soc/pxa/palm27x.c +++ b/sound/soc/pxa/palm27x.c | |||
@@ -132,7 +132,7 @@ static struct snd_soc_dai_link palm27x_dai[] = { | |||
132 | { | 132 | { |
133 | .name = "AC97 HiFi", | 133 | .name = "AC97 HiFi", |
134 | .stream_name = "AC97 HiFi", | 134 | .stream_name = "AC97 HiFi", |
135 | .cpu_dai_name = "pxa-ac97.0", | 135 | .cpu_dai_name = "pxa2xx-ac97", |
136 | .codec_dai_name = "wm9712-hifi", | 136 | .codec_dai_name = "wm9712-hifi", |
137 | .codec_name = "wm9712-codec", | 137 | .codec_name = "wm9712-codec", |
138 | .platform_name = "pxa-pcm-audio", | 138 | .platform_name = "pxa-pcm-audio", |
@@ -141,7 +141,7 @@ static struct snd_soc_dai_link palm27x_dai[] = { | |||
141 | { | 141 | { |
142 | .name = "AC97 Aux", | 142 | .name = "AC97 Aux", |
143 | .stream_name = "AC97 Aux", | 143 | .stream_name = "AC97 Aux", |
144 | .cpu_dai_name = "pxa-ac97.1", | 144 | .cpu_dai_name = "pxa2xx-ac97-aux", |
145 | .codec_dai_name = "wm9712-aux", | 145 | .codec_dai_name = "wm9712-aux", |
146 | .codec_name = "wm9712-codec", | 146 | .codec_name = "wm9712-codec", |
147 | .platform_name = "pxa-pcm-audio", | 147 | .platform_name = "pxa-pcm-audio", |
diff --git a/sound/soc/pxa/tosa.c b/sound/soc/pxa/tosa.c index f75804ef0897..4b6e5d608b42 100644 --- a/sound/soc/pxa/tosa.c +++ b/sound/soc/pxa/tosa.c | |||
@@ -219,7 +219,7 @@ static struct snd_soc_dai_link tosa_dai[] = { | |||
219 | { | 219 | { |
220 | .name = "AC97", | 220 | .name = "AC97", |
221 | .stream_name = "AC97 HiFi", | 221 | .stream_name = "AC97 HiFi", |
222 | .cpu_dai_name = "pxa-ac97.0", | 222 | .cpu_dai_name = "pxa2xx-ac97", |
223 | .codec_dai_name = "wm9712-hifi", | 223 | .codec_dai_name = "wm9712-hifi", |
224 | .platform_name = "pxa-pcm-audio", | 224 | .platform_name = "pxa-pcm-audio", |
225 | .codec_name = "wm9712-codec", | 225 | .codec_name = "wm9712-codec", |
@@ -229,7 +229,7 @@ static struct snd_soc_dai_link tosa_dai[] = { | |||
229 | { | 229 | { |
230 | .name = "AC97 Aux", | 230 | .name = "AC97 Aux", |
231 | .stream_name = "AC97 Aux", | 231 | .stream_name = "AC97 Aux", |
232 | .cpu_dai_name = "pxa-ac97.1", | 232 | .cpu_dai_name = "pxa2xx-ac97-aux", |
233 | .codec_dai_name = "wm9712-aux", | 233 | .codec_dai_name = "wm9712-aux", |
234 | .platform_name = "pxa-pcm-audio", | 234 | .platform_name = "pxa-pcm-audio", |
235 | .codec_name = "wm9712-codec", | 235 | .codec_name = "wm9712-codec", |
diff --git a/sound/soc/pxa/zylonite.c b/sound/soc/pxa/zylonite.c index b222a7d72027..25bba108fea3 100644 --- a/sound/soc/pxa/zylonite.c +++ b/sound/soc/pxa/zylonite.c | |||
@@ -166,7 +166,7 @@ static struct snd_soc_dai_link zylonite_dai[] = { | |||
166 | .stream_name = "AC97 HiFi", | 166 | .stream_name = "AC97 HiFi", |
167 | .codec_name = "wm9713-codec", | 167 | .codec_name = "wm9713-codec", |
168 | .platform_name = "pxa-pcm-audio", | 168 | .platform_name = "pxa-pcm-audio", |
169 | .cpu_dai_name = "pxa-ac97.0", | 169 | .cpu_dai_name = "pxa2xx-ac97", |
170 | .codec_name = "wm9713-hifi", | 170 | .codec_name = "wm9713-hifi", |
171 | .init = zylonite_wm9713_init, | 171 | .init = zylonite_wm9713_init, |
172 | }, | 172 | }, |
@@ -175,7 +175,7 @@ static struct snd_soc_dai_link zylonite_dai[] = { | |||
175 | .stream_name = "AC97 Aux", | 175 | .stream_name = "AC97 Aux", |
176 | .codec_name = "wm9713-codec", | 176 | .codec_name = "wm9713-codec", |
177 | .platform_name = "pxa-pcm-audio", | 177 | .platform_name = "pxa-pcm-audio", |
178 | .cpu_dai_name = "pxa-ac97.1", | 178 | .cpu_dai_name = "pxa2xx-ac97-aux", |
179 | .codec_name = "wm9713-aux", | 179 | .codec_name = "wm9713-aux", |
180 | }, | 180 | }, |
181 | { | 181 | { |
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 8194f150bab7..25e54230cc6a 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c | |||
@@ -712,7 +712,15 @@ static int dapm_supply_check_power(struct snd_soc_dapm_widget *w) | |||
712 | !path->connected(path->source, path->sink)) | 712 | !path->connected(path->source, path->sink)) |
713 | continue; | 713 | continue; |
714 | 714 | ||
715 | if (path->sink && path->sink->power_check && | 715 | if (!path->sink) |
716 | continue; | ||
717 | |||
718 | if (path->sink->force) { | ||
719 | power = 1; | ||
720 | break; | ||
721 | } | ||
722 | |||
723 | if (path->sink->power_check && | ||
716 | path->sink->power_check(path->sink)) { | 724 | path->sink->power_check(path->sink)) { |
717 | power = 1; | 725 | power = 1; |
718 | break; | 726 | break; |
@@ -1627,6 +1635,7 @@ EXPORT_SYMBOL_GPL(snd_soc_dapm_add_routes); | |||
1627 | int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) | 1635 | int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) |
1628 | { | 1636 | { |
1629 | struct snd_soc_dapm_widget *w; | 1637 | struct snd_soc_dapm_widget *w; |
1638 | unsigned int val; | ||
1630 | 1639 | ||
1631 | list_for_each_entry(w, &dapm->card->widgets, list) | 1640 | list_for_each_entry(w, &dapm->card->widgets, list) |
1632 | { | 1641 | { |
@@ -1675,6 +1684,18 @@ int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) | |||
1675 | case snd_soc_dapm_post: | 1684 | case snd_soc_dapm_post: |
1676 | break; | 1685 | break; |
1677 | } | 1686 | } |
1687 | |||
1688 | /* Read the initial power state from the device */ | ||
1689 | if (w->reg >= 0) { | ||
1690 | val = snd_soc_read(w->codec, w->reg); | ||
1691 | val &= 1 << w->shift; | ||
1692 | if (w->invert) | ||
1693 | val = !val; | ||
1694 | |||
1695 | if (val) | ||
1696 | w->power = 1; | ||
1697 | } | ||
1698 | |||
1678 | w->new = 1; | 1699 | w->new = 1; |
1679 | } | 1700 | } |
1680 | 1701 | ||
diff --git a/sound/usb/caiaq/audio.c b/sound/usb/caiaq/audio.c index 68b97477577b..66eabafb1c24 100644 --- a/sound/usb/caiaq/audio.c +++ b/sound/usb/caiaq/audio.c | |||
@@ -785,7 +785,7 @@ int snd_usb_caiaq_audio_init(struct snd_usb_caiaqdev *dev) | |||
785 | } | 785 | } |
786 | 786 | ||
787 | dev->pcm->private_data = dev; | 787 | dev->pcm->private_data = dev; |
788 | strcpy(dev->pcm->name, dev->product_name); | 788 | strlcpy(dev->pcm->name, dev->product_name, sizeof(dev->pcm->name)); |
789 | 789 | ||
790 | memset(dev->sub_playback, 0, sizeof(dev->sub_playback)); | 790 | memset(dev->sub_playback, 0, sizeof(dev->sub_playback)); |
791 | memset(dev->sub_capture, 0, sizeof(dev->sub_capture)); | 791 | memset(dev->sub_capture, 0, sizeof(dev->sub_capture)); |
diff --git a/sound/usb/caiaq/midi.c b/sound/usb/caiaq/midi.c index 2f218c77fff2..a1a47088fd0c 100644 --- a/sound/usb/caiaq/midi.c +++ b/sound/usb/caiaq/midi.c | |||
@@ -136,7 +136,7 @@ int snd_usb_caiaq_midi_init(struct snd_usb_caiaqdev *device) | |||
136 | if (ret < 0) | 136 | if (ret < 0) |
137 | return ret; | 137 | return ret; |
138 | 138 | ||
139 | strcpy(rmidi->name, device->product_name); | 139 | strlcpy(rmidi->name, device->product_name, sizeof(rmidi->name)); |
140 | 140 | ||
141 | rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX; | 141 | rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX; |
142 | rmidi->private_data = device; | 142 | rmidi->private_data = device; |
diff --git a/sound/usb/card.c b/sound/usb/card.c index 800f7cb4f251..c0f8270bc199 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c | |||
@@ -323,6 +323,7 @@ static int snd_usb_audio_create(struct usb_device *dev, int idx, | |||
323 | return -ENOMEM; | 323 | return -ENOMEM; |
324 | } | 324 | } |
325 | 325 | ||
326 | mutex_init(&chip->shutdown_mutex); | ||
326 | chip->index = idx; | 327 | chip->index = idx; |
327 | chip->dev = dev; | 328 | chip->dev = dev; |
328 | chip->card = card; | 329 | chip->card = card; |
@@ -531,6 +532,7 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, void *ptr) | |||
531 | chip = ptr; | 532 | chip = ptr; |
532 | card = chip->card; | 533 | card = chip->card; |
533 | mutex_lock(®ister_mutex); | 534 | mutex_lock(®ister_mutex); |
535 | mutex_lock(&chip->shutdown_mutex); | ||
534 | chip->shutdown = 1; | 536 | chip->shutdown = 1; |
535 | chip->num_interfaces--; | 537 | chip->num_interfaces--; |
536 | if (chip->num_interfaces <= 0) { | 538 | if (chip->num_interfaces <= 0) { |
@@ -548,9 +550,11 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, void *ptr) | |||
548 | snd_usb_mixer_disconnect(p); | 550 | snd_usb_mixer_disconnect(p); |
549 | } | 551 | } |
550 | usb_chip[chip->index] = NULL; | 552 | usb_chip[chip->index] = NULL; |
553 | mutex_unlock(&chip->shutdown_mutex); | ||
551 | mutex_unlock(®ister_mutex); | 554 | mutex_unlock(®ister_mutex); |
552 | snd_card_free_when_closed(card); | 555 | snd_card_free_when_closed(card); |
553 | } else { | 556 | } else { |
557 | mutex_unlock(&chip->shutdown_mutex); | ||
554 | mutex_unlock(®ister_mutex); | 558 | mutex_unlock(®ister_mutex); |
555 | } | 559 | } |
556 | } | 560 | } |
diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c index 4132522ac90f..e3f680526cb5 100644 --- a/sound/usb/pcm.c +++ b/sound/usb/pcm.c | |||
@@ -361,6 +361,7 @@ static int snd_usb_hw_params(struct snd_pcm_substream *substream, | |||
361 | } | 361 | } |
362 | 362 | ||
363 | if (changed) { | 363 | if (changed) { |
364 | mutex_lock(&subs->stream->chip->shutdown_mutex); | ||
364 | /* format changed */ | 365 | /* format changed */ |
365 | snd_usb_release_substream_urbs(subs, 0); | 366 | snd_usb_release_substream_urbs(subs, 0); |
366 | /* influenced: period_bytes, channels, rate, format, */ | 367 | /* influenced: period_bytes, channels, rate, format, */ |
@@ -368,6 +369,7 @@ static int snd_usb_hw_params(struct snd_pcm_substream *substream, | |||
368 | params_rate(hw_params), | 369 | params_rate(hw_params), |
369 | snd_pcm_format_physical_width(params_format(hw_params)) * | 370 | snd_pcm_format_physical_width(params_format(hw_params)) * |
370 | params_channels(hw_params)); | 371 | params_channels(hw_params)); |
372 | mutex_unlock(&subs->stream->chip->shutdown_mutex); | ||
371 | } | 373 | } |
372 | 374 | ||
373 | return ret; | 375 | return ret; |
@@ -385,8 +387,9 @@ static int snd_usb_hw_free(struct snd_pcm_substream *substream) | |||
385 | subs->cur_audiofmt = NULL; | 387 | subs->cur_audiofmt = NULL; |
386 | subs->cur_rate = 0; | 388 | subs->cur_rate = 0; |
387 | subs->period_bytes = 0; | 389 | subs->period_bytes = 0; |
388 | if (!subs->stream->chip->shutdown) | 390 | mutex_lock(&subs->stream->chip->shutdown_mutex); |
389 | snd_usb_release_substream_urbs(subs, 0); | 391 | snd_usb_release_substream_urbs(subs, 0); |
392 | mutex_unlock(&subs->stream->chip->shutdown_mutex); | ||
390 | return snd_pcm_lib_free_vmalloc_buffer(substream); | 393 | return snd_pcm_lib_free_vmalloc_buffer(substream); |
391 | } | 394 | } |
392 | 395 | ||
diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h index db3eb21627ee..6e66fffe87f5 100644 --- a/sound/usb/usbaudio.h +++ b/sound/usb/usbaudio.h | |||
@@ -36,6 +36,7 @@ struct snd_usb_audio { | |||
36 | struct snd_card *card; | 36 | struct snd_card *card; |
37 | u32 usb_id; | 37 | u32 usb_id; |
38 | int shutdown; | 38 | int shutdown; |
39 | struct mutex shutdown_mutex; | ||
39 | unsigned int txfr_quirk:1; /* Subframe boundaries on transfers */ | 40 | unsigned int txfr_quirk:1; /* Subframe boundaries on transfers */ |
40 | int num_interfaces; | 41 | int num_interfaces; |
41 | int num_suspended_intf; | 42 | int num_suspended_intf; |
diff --git a/tools/perf/builtin-timechart.c b/tools/perf/builtin-timechart.c index 746cf03cb05d..0ace786e83e0 100644 --- a/tools/perf/builtin-timechart.c +++ b/tools/perf/builtin-timechart.c | |||
@@ -264,9 +264,6 @@ pid_put_sample(int pid, int type, unsigned int cpu, u64 start, u64 end) | |||
264 | c->start_time = start; | 264 | c->start_time = start; |
265 | if (p->start_time == 0 || p->start_time > start) | 265 | if (p->start_time == 0 || p->start_time > start) |
266 | p->start_time = start; | 266 | p->start_time = start; |
267 | |||
268 | if (cpu > numcpus) | ||
269 | numcpus = cpu; | ||
270 | } | 267 | } |
271 | 268 | ||
272 | #define MAX_CPUS 4096 | 269 | #define MAX_CPUS 4096 |
@@ -511,6 +508,9 @@ static int process_sample_event(event_t *event __used, | |||
511 | if (!event_str) | 508 | if (!event_str) |
512 | return 0; | 509 | return 0; |
513 | 510 | ||
511 | if (sample->cpu > numcpus) | ||
512 | numcpus = sample->cpu; | ||
513 | |||
514 | if (strcmp(event_str, "power:cpu_idle") == 0) { | 514 | if (strcmp(event_str, "power:cpu_idle") == 0) { |
515 | struct power_processor_entry *ppe = (void *)te; | 515 | struct power_processor_entry *ppe = (void *)te; |
516 | if (ppe->state == (u32)PWR_EVENT_EXIT) | 516 | if (ppe->state == (u32)PWR_EVENT_EXIT) |
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c index 32f4f1f2f6e4..df51560f16f7 100644 --- a/tools/perf/util/hist.c +++ b/tools/perf/util/hist.c | |||
@@ -585,6 +585,7 @@ int hist_entry__snprintf(struct hist_entry *self, char *s, size_t size, | |||
585 | { | 585 | { |
586 | struct sort_entry *se; | 586 | struct sort_entry *se; |
587 | u64 period, total, period_sys, period_us, period_guest_sys, period_guest_us; | 587 | u64 period, total, period_sys, period_us, period_guest_sys, period_guest_us; |
588 | u64 nr_events; | ||
588 | const char *sep = symbol_conf.field_sep; | 589 | const char *sep = symbol_conf.field_sep; |
589 | int ret; | 590 | int ret; |
590 | 591 | ||
@@ -593,6 +594,7 @@ int hist_entry__snprintf(struct hist_entry *self, char *s, size_t size, | |||
593 | 594 | ||
594 | if (pair_hists) { | 595 | if (pair_hists) { |
595 | period = self->pair ? self->pair->period : 0; | 596 | period = self->pair ? self->pair->period : 0; |
597 | nr_events = self->pair ? self->pair->nr_events : 0; | ||
596 | total = pair_hists->stats.total_period; | 598 | total = pair_hists->stats.total_period; |
597 | period_sys = self->pair ? self->pair->period_sys : 0; | 599 | period_sys = self->pair ? self->pair->period_sys : 0; |
598 | period_us = self->pair ? self->pair->period_us : 0; | 600 | period_us = self->pair ? self->pair->period_us : 0; |
@@ -600,6 +602,7 @@ int hist_entry__snprintf(struct hist_entry *self, char *s, size_t size, | |||
600 | period_guest_us = self->pair ? self->pair->period_guest_us : 0; | 602 | period_guest_us = self->pair ? self->pair->period_guest_us : 0; |
601 | } else { | 603 | } else { |
602 | period = self->period; | 604 | period = self->period; |
605 | nr_events = self->nr_events; | ||
603 | total = session_total; | 606 | total = session_total; |
604 | period_sys = self->period_sys; | 607 | period_sys = self->period_sys; |
605 | period_us = self->period_us; | 608 | period_us = self->period_us; |
@@ -640,9 +643,9 @@ int hist_entry__snprintf(struct hist_entry *self, char *s, size_t size, | |||
640 | 643 | ||
641 | if (symbol_conf.show_nr_samples) { | 644 | if (symbol_conf.show_nr_samples) { |
642 | if (sep) | 645 | if (sep) |
643 | ret += snprintf(s + ret, size - ret, "%c%" PRIu64, *sep, period); | 646 | ret += snprintf(s + ret, size - ret, "%c%" PRIu64, *sep, nr_events); |
644 | else | 647 | else |
645 | ret += snprintf(s + ret, size - ret, "%11" PRIu64, period); | 648 | ret += snprintf(s + ret, size - ret, "%11" PRIu64, nr_events); |
646 | } | 649 | } |
647 | 650 | ||
648 | if (pair_hists) { | 651 | if (pair_hists) { |
diff --git a/tools/perf/util/svghelper.c b/tools/perf/util/svghelper.c index fb737fe9be91..96c866045d60 100644 --- a/tools/perf/util/svghelper.c +++ b/tools/perf/util/svghelper.c | |||
@@ -456,9 +456,9 @@ void svg_legenda(void) | |||
456 | return; | 456 | return; |
457 | 457 | ||
458 | svg_legenda_box(0, "Running", "sample"); | 458 | svg_legenda_box(0, "Running", "sample"); |
459 | svg_legenda_box(100, "Idle","rect.c1"); | 459 | svg_legenda_box(100, "Idle","c1"); |
460 | svg_legenda_box(200, "Deeper Idle", "rect.c3"); | 460 | svg_legenda_box(200, "Deeper Idle", "c3"); |
461 | svg_legenda_box(350, "Deepest Idle", "rect.c6"); | 461 | svg_legenda_box(350, "Deepest Idle", "c6"); |
462 | svg_legenda_box(550, "Sleeping", "process2"); | 462 | svg_legenda_box(550, "Sleeping", "process2"); |
463 | svg_legenda_box(650, "Waiting for cpu", "waiting"); | 463 | svg_legenda_box(650, "Waiting for cpu", "waiting"); |
464 | svg_legenda_box(800, "Blocked on IO", "blocked"); | 464 | svg_legenda_box(800, "Blocked on IO", "blocked"); |