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-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts68
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts98
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts66
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts96
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts68
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts98
6 files changed, 323 insertions, 171 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 3e3ec8fdef49..cebfc50f4ce5 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -129,21 +129,38 @@
129 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
130 }; 130 };
131 131
132 i2c@3000 { 132 sleep-nexus {
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <1>;
135 cell-index = <0>; 135 compatible = "simple-bus";
136 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
137 reg = <0x3000 0x100>; 137 ranges;
138 interrupts = <14 0x8>;
139 interrupt-parent = <&ipic>;
140 dfsrr;
141 138
142 rtc@68 { 139 i2c@3000 {
143 compatible = "dallas,ds1374"; 140 #address-cells = <1>;
144 reg = <0x68>; 141 #size-cells = <0>;
145 interrupts = <19 0x8>; 142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>; 146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
156
157 sdhci@2e000 {
158 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
159 reg = <0x2e000 0x1000>;
160 interrupts = <42 0x8>;
161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
147 }; 164 };
148 }; 165 };
149 166
@@ -176,6 +193,7 @@
176 interrupts = <38 0x8>; 193 interrupts = <38 0x8>;
177 dr_mode = "host"; 194 dr_mode = "host";
178 phy_type = "ulpi"; 195 phy_type = "ulpi";
196 sleep = <&pmc 0x00c00000>;
179 }; 197 };
180 198
181 mdio@24520 { 199 mdio@24520 {
@@ -226,6 +244,8 @@
226 interrupt-parent = <&ipic>; 244 interrupt-parent = <&ipic>;
227 tbi-handle = <&tbi0>; 245 tbi-handle = <&tbi0>;
228 phy-handle = <&phy2>; 246 phy-handle = <&phy2>;
247 sleep = <&pmc 0xc0000000>;
248 fsl,magic-packet;
229 }; 249 };
230 250
231 enet1: ethernet@25000 { 251 enet1: ethernet@25000 {
@@ -240,6 +260,8 @@
240 interrupt-parent = <&ipic>; 260 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi1>; 261 tbi-handle = <&tbi1>;
242 phy-handle = <&phy3>; 262 phy-handle = <&phy3>;
263 sleep = <&pmc 0x30000000>;
264 fsl,magic-packet;
243 }; 265 };
244 266
245 serial0: serial@4500 { 267 serial0: serial@4500 {
@@ -311,15 +333,7 @@
311 fsl,channel-fifo-len = <24>; 333 fsl,channel-fifo-len = <24>;
312 fsl,exec-units-mask = <0x9fe>; 334 fsl,exec-units-mask = <0x9fe>;
313 fsl,descriptor-types-mask = <0x3ab0ebf>; 335 fsl,descriptor-types-mask = <0x3ab0ebf>;
314 }; 336 sleep = <&pmc 0x03000000>;
315
316 sdhci@2e000 {
317 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
318 reg = <0x2e000 0x1000>;
319 interrupts = <42 0x8>;
320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
323 }; 337 };
324 338
325 sata@18000 { 339 sata@18000 {
@@ -327,6 +341,7 @@
327 reg = <0x18000 0x1000>; 341 reg = <0x18000 0x1000>;
328 interrupts = <44 0x8>; 342 interrupts = <44 0x8>;
329 interrupt-parent = <&ipic>; 343 interrupt-parent = <&ipic>;
344 sleep = <&pmc 0x000000c0>;
330 }; 345 };
331 346
332 sata@19000 { 347 sata@19000 {
@@ -334,6 +349,7 @@
334 reg = <0x19000 0x1000>; 349 reg = <0x19000 0x1000>;
335 interrupts = <45 0x8>; 350 interrupts = <45 0x8>;
336 interrupt-parent = <&ipic>; 351 interrupt-parent = <&ipic>;
352 sleep = <&pmc 0x00000030>;
337 }; 353 };
338 354
339 /* IPIC 355 /* IPIC
@@ -349,6 +365,13 @@
349 #interrupt-cells = <2>; 365 #interrupt-cells = <2>;
350 reg = <0x700 0x100>; 366 reg = <0x700 0x100>;
351 }; 367 };
368
369 pmc: power@b00 {
370 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
371 reg = <0xb00 0x100 0xa00 0x100>;
372 interrupts = <80 0x8>;
373 interrupt-parent = <&ipic>;
374 };
352 }; 375 };
353 376
354 pci0: pci@e0008500 { 377 pci0: pci@e0008500 {
@@ -403,6 +426,7 @@
403 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 426 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
404 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 427 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
405 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 428 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
429 sleep = <&pmc 0x00010000>;
406 clock-frequency = <0>; 430 clock-frequency = <0>;
407 #interrupt-cells = <1>; 431 #interrupt-cells = <1>;
408 #size-cells = <2>; 432 #size-cells = <2>;
@@ -428,6 +452,7 @@
428 0 0 0 2 &ipic 1 8 452 0 0 0 2 &ipic 1 8
429 0 0 0 3 &ipic 1 8 453 0 0 0 3 &ipic 1 8
430 0 0 0 4 &ipic 1 8>; 454 0 0 0 4 &ipic 1 8>;
455 sleep = <&pmc 0x00300000>;
431 clock-frequency = <0>; 456 clock-frequency = <0>;
432 457
433 pcie@0 { 458 pcie@0 {
@@ -459,6 +484,7 @@
459 0 0 0 2 &ipic 2 8 484 0 0 0 2 &ipic 2 8
460 0 0 0 3 &ipic 2 8 485 0 0 0 3 &ipic 2 8
461 0 0 0 4 &ipic 2 8>; 486 0 0 0 4 &ipic 2 8>;
487 sleep = <&pmc 0x000c0000>;
462 clock-frequency = <0>; 488 clock-frequency = <0>;
463 489
464 pcie@0 { 490 pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index fb1d884348ec..32311c8f55d8 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -127,37 +127,54 @@
127 gpio-controller; 127 gpio-controller;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149 136
150 rtc@68 { 137 i2c@3000 {
151 compatible = "dallas,ds1339"; 138 #address-cells = <1>;
152 reg = <0x68>; 139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 dtt@48 {
148 compatible = "national,lm75";
149 reg = <0x48>;
150 };
151
152 at24@50 {
153 compatible = "at24,24c256";
154 reg = <0x50>;
155 };
156
157 rtc@68 {
158 compatible = "dallas,ds1339";
159 reg = <0x68>;
160 };
161
162 mcu_pio: mcu@a {
163 #gpio-cells = <2>;
164 compatible = "fsl,mc9s08qg8-mpc8377erdb",
165 "fsl,mcu-mpc8349emitx";
166 reg = <0x0a>;
167 gpio-controller;
168 };
153 }; 169 };
154 170
155 mcu_pio: mcu@a { 171 sdhci@2e000 {
156 #gpio-cells = <2>; 172 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
157 compatible = "fsl,mc9s08qg8-mpc8377erdb", 173 reg = <0x2e000 0x1000>;
158 "fsl,mcu-mpc8349emitx"; 174 interrupts = <42 0x8>;
159 reg = <0x0a>; 175 interrupt-parent = <&ipic>;
160 gpio-controller; 176 /* Filled in by U-Boot */
177 clock-frequency = <0>;
161 }; 178 };
162 }; 179 };
163 180
@@ -228,6 +245,7 @@
228 interrupt-parent = <&ipic>; 245 interrupt-parent = <&ipic>;
229 interrupts = <38 0x8>; 246 interrupts = <38 0x8>;
230 phy_type = "ulpi"; 247 phy_type = "ulpi";
248 sleep = <&pmc 0x00c00000>;
231 }; 249 };
232 250
233 mdio@24520 { 251 mdio@24520 {
@@ -272,6 +290,8 @@
272 interrupt-parent = <&ipic>; 290 interrupt-parent = <&ipic>;
273 tbi-handle = <&tbi0>; 291 tbi-handle = <&tbi0>;
274 phy-handle = <&phy2>; 292 phy-handle = <&phy2>;
293 sleep = <&pmc 0xc0000000>;
294 fsl,magic-packet;
275 }; 295 };
276 296
277 enet1: ethernet@25000 { 297 enet1: ethernet@25000 {
@@ -286,6 +306,8 @@
286 interrupt-parent = <&ipic>; 306 interrupt-parent = <&ipic>;
287 fixed-link = <1 1 1000 0 0>; 307 fixed-link = <1 1 1000 0 0>;
288 tbi-handle = <&tbi1>; 308 tbi-handle = <&tbi1>;
309 sleep = <&pmc 0x30000000>;
310 fsl,magic-packet;
289 }; 311 };
290 312
291 serial0: serial@4500 { 313 serial0: serial@4500 {
@@ -318,15 +340,7 @@
318 fsl,channel-fifo-len = <24>; 340 fsl,channel-fifo-len = <24>;
319 fsl,exec-units-mask = <0x9fe>; 341 fsl,exec-units-mask = <0x9fe>;
320 fsl,descriptor-types-mask = <0x3ab0ebf>; 342 fsl,descriptor-types-mask = <0x3ab0ebf>;
321 }; 343 sleep = <&pmc 0x03000000>;
322
323 sdhci@2e000 {
324 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
325 reg = <0x2e000 0x1000>;
326 interrupts = <42 0x8>;
327 interrupt-parent = <&ipic>;
328 /* Filled in by U-Boot */
329 clock-frequency = <0>;
330 }; 344 };
331 345
332 sata@18000 { 346 sata@18000 {
@@ -334,6 +348,7 @@
334 reg = <0x18000 0x1000>; 348 reg = <0x18000 0x1000>;
335 interrupts = <44 0x8>; 349 interrupts = <44 0x8>;
336 interrupt-parent = <&ipic>; 350 interrupt-parent = <&ipic>;
351 sleep = <&pmc 0x000000c0>;
337 }; 352 };
338 353
339 sata@19000 { 354 sata@19000 {
@@ -341,6 +356,7 @@
341 reg = <0x19000 0x1000>; 356 reg = <0x19000 0x1000>;
342 interrupts = <45 0x8>; 357 interrupts = <45 0x8>;
343 interrupt-parent = <&ipic>; 358 interrupt-parent = <&ipic>;
359 sleep = <&pmc 0x00000030>;
344 }; 360 };
345 361
346 /* IPIC 362 /* IPIC
@@ -356,6 +372,13 @@
356 #interrupt-cells = <2>; 372 #interrupt-cells = <2>;
357 reg = <0x700 0x100>; 373 reg = <0x700 0x100>;
358 }; 374 };
375
376 pmc: power@b00 {
377 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
378 reg = <0xb00 0x100 0xa00 0x100>;
379 interrupts = <80 0x8>;
380 interrupt-parent = <&ipic>;
381 };
359 }; 382 };
360 383
361 pci0: pci@e0008500 { 384 pci0: pci@e0008500 {
@@ -381,6 +404,7 @@
381 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 404 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
382 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 405 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
383 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 406 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
407 sleep = <&pmc 0x00010000>;
384 clock-frequency = <66666666>; 408 clock-frequency = <66666666>;
385 #interrupt-cells = <1>; 409 #interrupt-cells = <1>;
386 #size-cells = <2>; 410 #size-cells = <2>;
@@ -406,6 +430,7 @@
406 0 0 0 2 &ipic 1 8 430 0 0 0 2 &ipic 1 8
407 0 0 0 3 &ipic 1 8 431 0 0 0 3 &ipic 1 8
408 0 0 0 4 &ipic 1 8>; 432 0 0 0 4 &ipic 1 8>;
433 sleep = <&pmc 0x00300000>;
409 clock-frequency = <0>; 434 clock-frequency = <0>;
410 435
411 pcie@0 { 436 pcie@0 {
@@ -437,6 +462,7 @@
437 0 0 0 2 &ipic 2 8 462 0 0 0 2 &ipic 2 8
438 0 0 0 3 &ipic 2 8 463 0 0 0 3 &ipic 2 8
439 0 0 0 4 &ipic 2 8>; 464 0 0 0 4 &ipic 2 8>;
465 sleep = <&pmc 0x000c0000>;
440 clock-frequency = <0>; 466 clock-frequency = <0>;
441 467
442 pcie@0 { 468 pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index c3b212cf9025..155841d4db29 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -129,21 +129,38 @@
129 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
130 }; 130 };
131 131
132 i2c@3000 { 132 sleep-nexus {
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <1>;
135 cell-index = <0>; 135 compatible = "simple-bus";
136 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
137 reg = <0x3000 0x100>; 137 ranges;
138 interrupts = <14 0x8>;
139 interrupt-parent = <&ipic>;
140 dfsrr;
141 138
142 rtc@68 { 139 i2c@3000 {
143 compatible = "dallas,ds1374"; 140 #address-cells = <1>;
144 reg = <0x68>; 141 #size-cells = <0>;
145 interrupts = <19 0x8>; 142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>; 146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
156
157 sdhci@2e000 {
158 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
159 reg = <0x2e000 0x1000>;
160 interrupts = <42 0x8>;
161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
147 }; 164 };
148 }; 165 };
149 166
@@ -215,6 +232,7 @@
215 interrupts = <38 0x8>; 232 interrupts = <38 0x8>;
216 dr_mode = "host"; 233 dr_mode = "host";
217 phy_type = "ulpi"; 234 phy_type = "ulpi";
235 sleep = <&pmc 0x00c00000>;
218 }; 236 };
219 237
220 mdio@24520 { 238 mdio@24520 {
@@ -265,6 +283,8 @@
265 interrupt-parent = <&ipic>; 283 interrupt-parent = <&ipic>;
266 tbi-handle = <&tbi0>; 284 tbi-handle = <&tbi0>;
267 phy-handle = <&phy2>; 285 phy-handle = <&phy2>;
286 sleep = <&pmc 0xc0000000>;
287 fsl,magic-packet;
268 }; 288 };
269 289
270 enet1: ethernet@25000 { 290 enet1: ethernet@25000 {
@@ -279,6 +299,8 @@
279 interrupt-parent = <&ipic>; 299 interrupt-parent = <&ipic>;
280 tbi-handle = <&tbi1>; 300 tbi-handle = <&tbi1>;
281 phy-handle = <&phy3>; 301 phy-handle = <&phy3>;
302 sleep = <&pmc 0x30000000>;
303 fsl,magic-packet;
282 }; 304 };
283 305
284 serial0: serial@4500 { 306 serial0: serial@4500 {
@@ -311,15 +333,7 @@
311 fsl,channel-fifo-len = <24>; 333 fsl,channel-fifo-len = <24>;
312 fsl,exec-units-mask = <0x9fe>; 334 fsl,exec-units-mask = <0x9fe>;
313 fsl,descriptor-types-mask = <0x3ab0ebf>; 335 fsl,descriptor-types-mask = <0x3ab0ebf>;
314 }; 336 sleep = <&pmc 0x03000000>;
315
316 sdhci@2e000 {
317 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
318 reg = <0x2e000 0x1000>;
319 interrupts = <42 0x8>;
320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
323 }; 337 };
324 338
325 /* IPIC 339 /* IPIC
@@ -335,6 +349,13 @@
335 #interrupt-cells = <2>; 349 #interrupt-cells = <2>;
336 reg = <0x700 0x100>; 350 reg = <0x700 0x100>;
337 }; 351 };
352
353 pmc: power@b00 {
354 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
355 reg = <0xb00 0x100 0xa00 0x100>;
356 interrupts = <80 0x8>;
357 interrupt-parent = <&ipic>;
358 };
338 }; 359 };
339 360
340 pci0: pci@e0008500 { 361 pci0: pci@e0008500 {
@@ -390,6 +411,7 @@
390 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 411 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
391 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 412 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
392 clock-frequency = <0>; 413 clock-frequency = <0>;
414 sleep = <&pmc 0x00010000>;
393 #interrupt-cells = <1>; 415 #interrupt-cells = <1>;
394 #size-cells = <2>; 416 #size-cells = <2>;
395 #address-cells = <3>; 417 #address-cells = <3>;
@@ -414,6 +436,7 @@
414 0 0 0 2 &ipic 1 8 436 0 0 0 2 &ipic 1 8
415 0 0 0 3 &ipic 1 8 437 0 0 0 3 &ipic 1 8
416 0 0 0 4 &ipic 1 8>; 438 0 0 0 4 &ipic 1 8>;
439 sleep = <&pmc 0x00300000>;
417 clock-frequency = <0>; 440 clock-frequency = <0>;
418 441
419 pcie@0 { 442 pcie@0 {
@@ -445,6 +468,7 @@
445 0 0 0 2 &ipic 2 8 468 0 0 0 2 &ipic 2 8
446 0 0 0 3 &ipic 2 8 469 0 0 0 3 &ipic 2 8
447 0 0 0 4 &ipic 2 8>; 470 0 0 0 4 &ipic 2 8>;
471 sleep = <&pmc 0x000c0000>;
448 clock-frequency = <0>; 472 clock-frequency = <0>;
449 473
450 pcie@0 { 474 pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 37c8555cc8d4..54ad96c1fc8b 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -127,37 +127,54 @@
127 gpio-controller; 127 gpio-controller;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149 136
150 rtc@68 { 137 i2c@3000 {
151 compatible = "dallas,ds1339"; 138 #address-cells = <1>;
152 reg = <0x68>; 139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 dtt@48 {
148 compatible = "national,lm75";
149 reg = <0x48>;
150 };
151
152 at24@50 {
153 compatible = "at24,24c256";
154 reg = <0x50>;
155 };
156
157 rtc@68 {
158 compatible = "dallas,ds1339";
159 reg = <0x68>;
160 };
161
162 mcu_pio: mcu@a {
163 #gpio-cells = <2>;
164 compatible = "fsl,mc9s08qg8-mpc8378erdb",
165 "fsl,mcu-mpc8349emitx";
166 reg = <0x0a>;
167 gpio-controller;
168 };
153 }; 169 };
154 170
155 mcu_pio: mcu@a { 171 sdhci@2e000 {
156 #gpio-cells = <2>; 172 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
157 compatible = "fsl,mc9s08qg8-mpc8378erdb", 173 reg = <0x2e000 0x1000>;
158 "fsl,mcu-mpc8349emitx"; 174 interrupts = <42 0x8>;
159 reg = <0x0a>; 175 interrupt-parent = <&ipic>;
160 gpio-controller; 176 /* Filled in by U-Boot */
177 clock-frequency = <0>;
161 }; 178 };
162 }; 179 };
163 180
@@ -228,6 +245,7 @@
228 interrupt-parent = <&ipic>; 245 interrupt-parent = <&ipic>;
229 interrupts = <38 0x8>; 246 interrupts = <38 0x8>;
230 phy_type = "ulpi"; 247 phy_type = "ulpi";
248 sleep = <&pmc 0x00c00000>;
231 }; 249 };
232 250
233 mdio@24520 { 251 mdio@24520 {
@@ -271,6 +289,8 @@
271 phy-connection-type = "mii"; 289 phy-connection-type = "mii";
272 interrupt-parent = <&ipic>; 290 interrupt-parent = <&ipic>;
273 phy-handle = <&phy2>; 291 phy-handle = <&phy2>;
292 sleep = <&pmc 0xc0000000>;
293 fsl,magic-packet;
274 }; 294 };
275 295
276 enet1: ethernet@25000 { 296 enet1: ethernet@25000 {
@@ -284,6 +304,8 @@
284 phy-connection-type = "mii"; 304 phy-connection-type = "mii";
285 interrupt-parent = <&ipic>; 305 interrupt-parent = <&ipic>;
286 fixed-link = <1 1 1000 0 0>; 306 fixed-link = <1 1 1000 0 0>;
307 sleep = <&pmc 0x30000000>;
308 fsl,magic-packet;
287 }; 309 };
288 310
289 serial0: serial@4500 { 311 serial0: serial@4500 {
@@ -316,15 +338,7 @@
316 fsl,channel-fifo-len = <24>; 338 fsl,channel-fifo-len = <24>;
317 fsl,exec-units-mask = <0x9fe>; 339 fsl,exec-units-mask = <0x9fe>;
318 fsl,descriptor-types-mask = <0x3ab0ebf>; 340 fsl,descriptor-types-mask = <0x3ab0ebf>;
319 }; 341 sleep = <&pmc 0x03000000>;
320
321 sdhci@2e000 {
322 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
323 reg = <0x2e000 0x1000>;
324 interrupts = <42 0x8>;
325 interrupt-parent = <&ipic>;
326 /* Filled in by U-Boot */
327 clock-frequency = <0>;
328 }; 342 };
329 343
330 /* IPIC 344 /* IPIC
@@ -340,6 +354,13 @@
340 #interrupt-cells = <2>; 354 #interrupt-cells = <2>;
341 reg = <0x700 0x100>; 355 reg = <0x700 0x100>;
342 }; 356 };
357
358 pmc: power@b00 {
359 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
360 reg = <0xb00 0x100 0xa00 0x100>;
361 interrupts = <80 0x8>;
362 interrupt-parent = <&ipic>;
363 };
343 }; 364 };
344 365
345 pci0: pci@e0008500 { 366 pci0: pci@e0008500 {
@@ -365,6 +386,7 @@
365 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 386 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
366 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 387 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
367 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 388 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
389 sleep = <&pmc 0x00010000>;
368 clock-frequency = <66666666>; 390 clock-frequency = <66666666>;
369 #interrupt-cells = <1>; 391 #interrupt-cells = <1>;
370 #size-cells = <2>; 392 #size-cells = <2>;
@@ -390,6 +412,7 @@
390 0 0 0 2 &ipic 1 8 412 0 0 0 2 &ipic 1 8
391 0 0 0 3 &ipic 1 8 413 0 0 0 3 &ipic 1 8
392 0 0 0 4 &ipic 1 8>; 414 0 0 0 4 &ipic 1 8>;
415 sleep = <&pmc 0x00300000>;
393 clock-frequency = <0>; 416 clock-frequency = <0>;
394 417
395 pcie@0 { 418 pcie@0 {
@@ -421,6 +444,7 @@
421 0 0 0 2 &ipic 2 8 444 0 0 0 2 &ipic 2 8
422 0 0 0 3 &ipic 2 8 445 0 0 0 3 &ipic 2 8
423 0 0 0 4 &ipic 2 8>; 446 0 0 0 4 &ipic 2 8>;
447 sleep = <&pmc 0x000c0000>;
424 clock-frequency = <0>; 448 clock-frequency = <0>;
425 449
426 pcie@0 { 450 pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 1b61cda1eb47..9deb5b20f8af 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -127,21 +127,38 @@
127 reg = <0x200 0x100>; 127 reg = <0x200 0x100>;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
138 dfsrr;
139 136
140 rtc@68 { 137 i2c@3000 {
141 compatible = "dallas,ds1374"; 138 #address-cells = <1>;
142 reg = <0x68>; 139 #size-cells = <0>;
143 interrupts = <19 0x8>; 140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>; 144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 rtc@68 {
148 compatible = "dallas,ds1374";
149 reg = <0x68>;
150 interrupts = <19 0x8>;
151 interrupt-parent = <&ipic>;
152 };
153 };
154
155 sdhci@2e000 {
156 compatible = "fsl,mpc8379-esdhc";
157 reg = <0x2e000 0x1000>;
158 interrupts = <42 0x8>;
159 interrupt-parent = <&ipic>;
160 /* Filled in by U-Boot */
161 clock-frequency = <0>;
145 }; 162 };
146 }; 163 };
147 164
@@ -213,6 +230,7 @@
213 interrupts = <38 0x8>; 230 interrupts = <38 0x8>;
214 dr_mode = "host"; 231 dr_mode = "host";
215 phy_type = "ulpi"; 232 phy_type = "ulpi";
233 sleep = <&pmc 0x00c00000>;
216 }; 234 };
217 235
218 mdio@24520 { 236 mdio@24520 {
@@ -262,6 +280,8 @@
262 interrupt-parent = <&ipic>; 280 interrupt-parent = <&ipic>;
263 tbi-handle = <&tbi0>; 281 tbi-handle = <&tbi0>;
264 phy-handle = <&phy2>; 282 phy-handle = <&phy2>;
283 sleep = <&pmc 0xc0000000>;
284 fsl,magic-packet;
265 }; 285 };
266 286
267 enet1: ethernet@25000 { 287 enet1: ethernet@25000 {
@@ -276,6 +296,8 @@
276 interrupt-parent = <&ipic>; 296 interrupt-parent = <&ipic>;
277 tbi-handle = <&tbi1>; 297 tbi-handle = <&tbi1>;
278 phy-handle = <&phy3>; 298 phy-handle = <&phy3>;
299 sleep = <&pmc 0x30000000>;
300 fsl,magic-packet;
279 }; 301 };
280 302
281 serial0: serial@4500 { 303 serial0: serial@4500 {
@@ -308,15 +330,7 @@
308 fsl,channel-fifo-len = <24>; 330 fsl,channel-fifo-len = <24>;
309 fsl,exec-units-mask = <0x9fe>; 331 fsl,exec-units-mask = <0x9fe>;
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 332 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 333 sleep = <&pmc 0x03000000>;
312
313 sdhci@2e000 {
314 compatible = "fsl,mpc8379-esdhc";
315 reg = <0x2e000 0x1000>;
316 interrupts = <42 0x8>;
317 interrupt-parent = <&ipic>;
318 /* Filled in by U-Boot */
319 clock-frequency = <0>;
320 }; 334 };
321 335
322 sata@18000 { 336 sata@18000 {
@@ -324,6 +338,7 @@
324 reg = <0x18000 0x1000>; 338 reg = <0x18000 0x1000>;
325 interrupts = <44 0x8>; 339 interrupts = <44 0x8>;
326 interrupt-parent = <&ipic>; 340 interrupt-parent = <&ipic>;
341 sleep = <&pmc 0x000000c0>;
327 }; 342 };
328 343
329 sata@19000 { 344 sata@19000 {
@@ -331,6 +346,7 @@
331 reg = <0x19000 0x1000>; 346 reg = <0x19000 0x1000>;
332 interrupts = <45 0x8>; 347 interrupts = <45 0x8>;
333 interrupt-parent = <&ipic>; 348 interrupt-parent = <&ipic>;
349 sleep = <&pmc 0x00000030>;
334 }; 350 };
335 351
336 sata@1a000 { 352 sata@1a000 {
@@ -338,6 +354,7 @@
338 reg = <0x1a000 0x1000>; 354 reg = <0x1a000 0x1000>;
339 interrupts = <46 0x8>; 355 interrupts = <46 0x8>;
340 interrupt-parent = <&ipic>; 356 interrupt-parent = <&ipic>;
357 sleep = <&pmc 0x0000000c>;
341 }; 358 };
342 359
343 sata@1b000 { 360 sata@1b000 {
@@ -345,6 +362,7 @@
345 reg = <0x1b000 0x1000>; 362 reg = <0x1b000 0x1000>;
346 interrupts = <47 0x8>; 363 interrupts = <47 0x8>;
347 interrupt-parent = <&ipic>; 364 interrupt-parent = <&ipic>;
365 sleep = <&pmc 0x00000003>;
348 }; 366 };
349 367
350 /* IPIC 368 /* IPIC
@@ -360,6 +378,13 @@
360 #interrupt-cells = <2>; 378 #interrupt-cells = <2>;
361 reg = <0x700 0x100>; 379 reg = <0x700 0x100>;
362 }; 380 };
381
382 pmc: power@b00 {
383 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
384 reg = <0xb00 0x100 0xa00 0x100>;
385 interrupts = <80 0x8>;
386 interrupt-parent = <&ipic>;
387 };
363 }; 388 };
364 389
365 pci0: pci@e0008500 { 390 pci0: pci@e0008500 {
@@ -414,6 +439,7 @@
414 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 439 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
415 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 440 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
416 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 441 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
442 sleep = <&pmc 0x00010000>;
417 clock-frequency = <0>; 443 clock-frequency = <0>;
418 #interrupt-cells = <1>; 444 #interrupt-cells = <1>;
419 #size-cells = <2>; 445 #size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e2f98e6a51a2..3f4778ff9333 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -125,37 +125,54 @@
125 gpio-controller; 125 gpio-controller;
126 }; 126 };
127 127
128 i2c@3000 { 128 sleep-nexus {
129 #address-cells = <1>; 129 #address-cells = <1>;
130 #size-cells = <0>; 130 #size-cells = <1>;
131 cell-index = <0>; 131 compatible = "simple-bus";
132 compatible = "fsl-i2c"; 132 sleep = <&pmc 0x0c000000>;
133 reg = <0x3000 0x100>; 133 ranges;
134 interrupts = <14 0x8>;
135 interrupt-parent = <&ipic>;
136 dfsrr;
137
138 dtt@48 {
139 compatible = "national,lm75";
140 reg = <0x48>;
141 };
142
143 at24@50 {
144 compatible = "at24,24c256";
145 reg = <0x50>;
146 };
147 134
148 rtc@68 { 135 i2c@3000 {
149 compatible = "dallas,ds1339"; 136 #address-cells = <1>;
150 reg = <0x68>; 137 #size-cells = <0>;
138 cell-index = <0>;
139 compatible = "fsl-i2c";
140 reg = <0x3000 0x100>;
141 interrupts = <14 0x8>;
142 interrupt-parent = <&ipic>;
143 dfsrr;
144
145 dtt@48 {
146 compatible = "national,lm75";
147 reg = <0x48>;
148 };
149
150 at24@50 {
151 compatible = "at24,24c256";
152 reg = <0x50>;
153 };
154
155 rtc@68 {
156 compatible = "dallas,ds1339";
157 reg = <0x68>;
158 };
159
160 mcu_pio: mcu@a {
161 #gpio-cells = <2>;
162 compatible = "fsl,mc9s08qg8-mpc8379erdb",
163 "fsl,mcu-mpc8349emitx";
164 reg = <0x0a>;
165 gpio-controller;
166 };
151 }; 167 };
152 168
153 mcu_pio: mcu@a { 169 sdhci@2e000 {
154 #gpio-cells = <2>; 170 compatible = "fsl,mpc8379-esdhc";
155 compatible = "fsl,mc9s08qg8-mpc8379erdb", 171 reg = <0x2e000 0x1000>;
156 "fsl,mcu-mpc8349emitx"; 172 interrupts = <42 0x8>;
157 reg = <0x0a>; 173 interrupt-parent = <&ipic>;
158 gpio-controller; 174 /* Filled in by U-Boot */
175 clock-frequency = <0>;
159 }; 176 };
160 }; 177 };
161 178
@@ -226,6 +243,7 @@
226 interrupt-parent = <&ipic>; 243 interrupt-parent = <&ipic>;
227 interrupts = <38 0x8>; 244 interrupts = <38 0x8>;
228 phy_type = "ulpi"; 245 phy_type = "ulpi";
246 sleep = <&pmc 0x00c00000>;
229 }; 247 };
230 248
231 mdio@24520 { 249 mdio@24520 {
@@ -269,6 +287,8 @@
269 interrupt-parent = <&ipic>; 287 interrupt-parent = <&ipic>;
270 tbi-handle = <&tbi0>; 288 tbi-handle = <&tbi0>;
271 phy-handle = <&phy2>; 289 phy-handle = <&phy2>;
290 sleep = <&pmc 0xc0000000>;
291 fsl,magic-packet;
272 }; 292 };
273 293
274 enet1: ethernet@25000 { 294 enet1: ethernet@25000 {
@@ -283,6 +303,8 @@
283 interrupt-parent = <&ipic>; 303 interrupt-parent = <&ipic>;
284 fixed-link = <1 1 1000 0 0>; 304 fixed-link = <1 1 1000 0 0>;
285 tbi-handle = <&tbi1>; 305 tbi-handle = <&tbi1>;
306 sleep = <&pmc 0x30000000>;
307 fsl,magic-packet;
286 }; 308 };
287 309
288 serial0: serial@4500 { 310 serial0: serial@4500 {
@@ -315,15 +337,7 @@
315 fsl,channel-fifo-len = <24>; 337 fsl,channel-fifo-len = <24>;
316 fsl,exec-units-mask = <0x9fe>; 338 fsl,exec-units-mask = <0x9fe>;
317 fsl,descriptor-types-mask = <0x3ab0ebf>; 339 fsl,descriptor-types-mask = <0x3ab0ebf>;
318 }; 340 sleep = <&pmc 0x03000000>;
319
320 sdhci@2e000 {
321 compatible = "fsl,mpc8379-esdhc";
322 reg = <0x2e000 0x1000>;
323 interrupts = <42 0x8>;
324 interrupt-parent = <&ipic>;
325 /* Filled in by U-Boot */
326 clock-frequency = <0>;
327 }; 341 };
328 342
329 sata@18000 { 343 sata@18000 {
@@ -331,6 +345,7 @@
331 reg = <0x18000 0x1000>; 345 reg = <0x18000 0x1000>;
332 interrupts = <44 0x8>; 346 interrupts = <44 0x8>;
333 interrupt-parent = <&ipic>; 347 interrupt-parent = <&ipic>;
348 sleep = <&pmc 0x000000c0>;
334 }; 349 };
335 350
336 sata@19000 { 351 sata@19000 {
@@ -338,6 +353,7 @@
338 reg = <0x19000 0x1000>; 353 reg = <0x19000 0x1000>;
339 interrupts = <45 0x8>; 354 interrupts = <45 0x8>;
340 interrupt-parent = <&ipic>; 355 interrupt-parent = <&ipic>;
356 sleep = <&pmc 0x00000030>;
341 }; 357 };
342 358
343 sata@1a000 { 359 sata@1a000 {
@@ -345,6 +361,7 @@
345 reg = <0x1a000 0x1000>; 361 reg = <0x1a000 0x1000>;
346 interrupts = <46 0x8>; 362 interrupts = <46 0x8>;
347 interrupt-parent = <&ipic>; 363 interrupt-parent = <&ipic>;
364 sleep = <&pmc 0x0000000c>;
348 }; 365 };
349 366
350 sata@1b000 { 367 sata@1b000 {
@@ -352,6 +369,7 @@
352 reg = <0x1b000 0x1000>; 369 reg = <0x1b000 0x1000>;
353 interrupts = <47 0x8>; 370 interrupts = <47 0x8>;
354 interrupt-parent = <&ipic>; 371 interrupt-parent = <&ipic>;
372 sleep = <&pmc 0x00000003>;
355 }; 373 };
356 374
357 /* IPIC 375 /* IPIC
@@ -367,6 +385,13 @@
367 #interrupt-cells = <2>; 385 #interrupt-cells = <2>;
368 reg = <0x700 0x100>; 386 reg = <0x700 0x100>;
369 }; 387 };
388
389 pmc: power@b00 {
390 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
391 reg = <0xb00 0x100 0xa00 0x100>;
392 interrupts = <80 0x8>;
393 interrupt-parent = <&ipic>;
394 };
370 }; 395 };
371 396
372 pci0: pci@e0008500 { 397 pci0: pci@e0008500 {
@@ -392,6 +417,7 @@
392 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 417 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
393 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 418 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
394 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 419 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
420 sleep = <&pmc 0x00010000>;
395 clock-frequency = <66666666>; 421 clock-frequency = <66666666>;
396 #interrupt-cells = <1>; 422 #interrupt-cells = <1>;
397 #size-cells = <2>; 423 #size-cells = <2>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 16:23:43 -0500