diff options
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 16 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 16 | ||||
-rw-r--r-- | arch/x86/oprofile/op_x86_model.h | 2 |
3 files changed, 16 insertions, 18 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index b5d678fbf038..4ac9d283e8d2 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -262,13 +262,13 @@ static int op_amd_check_ctrs(struct pt_regs * const regs, | |||
262 | 262 | ||
263 | static void op_amd_start(struct op_msrs const * const msrs) | 263 | static void op_amd_start(struct op_msrs const * const msrs) |
264 | { | 264 | { |
265 | unsigned int low, high; | 265 | u64 val; |
266 | int i; | 266 | int i; |
267 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { | 267 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { |
268 | if (reset_value[i]) { | 268 | if (reset_value[i]) { |
269 | rdmsr(msrs->controls[i].addr, low, high); | 269 | rdmsrl(msrs->controls[i].addr, val); |
270 | CTRL_SET_ACTIVE(low); | 270 | val |= ARCH_PERFMON_EVENTSEL0_ENABLE; |
271 | wrmsr(msrs->controls[i].addr, low, high); | 271 | wrmsrl(msrs->controls[i].addr, val); |
272 | } | 272 | } |
273 | } | 273 | } |
274 | 274 | ||
@@ -277,7 +277,7 @@ static void op_amd_start(struct op_msrs const * const msrs) | |||
277 | 277 | ||
278 | static void op_amd_stop(struct op_msrs const * const msrs) | 278 | static void op_amd_stop(struct op_msrs const * const msrs) |
279 | { | 279 | { |
280 | unsigned int low, high; | 280 | u64 val; |
281 | int i; | 281 | int i; |
282 | 282 | ||
283 | /* | 283 | /* |
@@ -287,9 +287,9 @@ static void op_amd_stop(struct op_msrs const * const msrs) | |||
287 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { | 287 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { |
288 | if (!reset_value[i]) | 288 | if (!reset_value[i]) |
289 | continue; | 289 | continue; |
290 | rdmsr(msrs->controls[i].addr, low, high); | 290 | rdmsrl(msrs->controls[i].addr, val); |
291 | CTRL_SET_INACTIVE(low); | 291 | val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; |
292 | wrmsr(msrs->controls[i].addr, low, high); | 292 | wrmsrl(msrs->controls[i].addr, val); |
293 | } | 293 | } |
294 | 294 | ||
295 | op_amd_stop_ibs(); | 295 | op_amd_stop_ibs(); |
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index 82db396dc3ef..566b43f0b6c6 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
@@ -145,16 +145,16 @@ static int ppro_check_ctrs(struct pt_regs * const regs, | |||
145 | 145 | ||
146 | static void ppro_start(struct op_msrs const * const msrs) | 146 | static void ppro_start(struct op_msrs const * const msrs) |
147 | { | 147 | { |
148 | unsigned int low, high; | 148 | u64 val; |
149 | int i; | 149 | int i; |
150 | 150 | ||
151 | if (!reset_value) | 151 | if (!reset_value) |
152 | return; | 152 | return; |
153 | for (i = 0; i < num_counters; ++i) { | 153 | for (i = 0; i < num_counters; ++i) { |
154 | if (reset_value[i]) { | 154 | if (reset_value[i]) { |
155 | rdmsr(msrs->controls[i].addr, low, high); | 155 | rdmsrl(msrs->controls[i].addr, val); |
156 | CTRL_SET_ACTIVE(low); | 156 | val |= ARCH_PERFMON_EVENTSEL0_ENABLE; |
157 | wrmsr(msrs->controls[i].addr, low, high); | 157 | wrmsrl(msrs->controls[i].addr, val); |
158 | } | 158 | } |
159 | } | 159 | } |
160 | } | 160 | } |
@@ -162,7 +162,7 @@ static void ppro_start(struct op_msrs const * const msrs) | |||
162 | 162 | ||
163 | static void ppro_stop(struct op_msrs const * const msrs) | 163 | static void ppro_stop(struct op_msrs const * const msrs) |
164 | { | 164 | { |
165 | unsigned int low, high; | 165 | u64 val; |
166 | int i; | 166 | int i; |
167 | 167 | ||
168 | if (!reset_value) | 168 | if (!reset_value) |
@@ -170,9 +170,9 @@ static void ppro_stop(struct op_msrs const * const msrs) | |||
170 | for (i = 0; i < num_counters; ++i) { | 170 | for (i = 0; i < num_counters; ++i) { |
171 | if (!reset_value[i]) | 171 | if (!reset_value[i]) |
172 | continue; | 172 | continue; |
173 | rdmsr(msrs->controls[i].addr, low, high); | 173 | rdmsrl(msrs->controls[i].addr, val); |
174 | CTRL_SET_INACTIVE(low); | 174 | val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; |
175 | wrmsr(msrs->controls[i].addr, low, high); | 175 | wrmsrl(msrs->controls[i].addr, val); |
176 | } | 176 | } |
177 | } | 177 | } |
178 | 178 | ||
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h index 3220d4ce6322..1c4577795a92 100644 --- a/arch/x86/oprofile/op_x86_model.h +++ b/arch/x86/oprofile/op_x86_model.h | |||
@@ -17,8 +17,6 @@ | |||
17 | 17 | ||
18 | #define CTR_IS_RESERVED(msrs, c) ((msrs)->counters[(c)].addr ? 1 : 0) | 18 | #define CTR_IS_RESERVED(msrs, c) ((msrs)->counters[(c)].addr ? 1 : 0) |
19 | #define CTRL_IS_RESERVED(msrs, c) ((msrs)->controls[(c)].addr ? 1 : 0) | 19 | #define CTRL_IS_RESERVED(msrs, c) ((msrs)->controls[(c)].addr ? 1 : 0) |
20 | #define CTRL_SET_ACTIVE(val) ((val) |= ARCH_PERFMON_EVENTSEL0_ENABLE) | ||
21 | #define CTRL_SET_INACTIVE(val) ((val) &= ~ARCH_PERFMON_EVENTSEL0_ENABLE) | ||
22 | 20 | ||
23 | struct op_saved_msr { | 21 | struct op_saved_msr { |
24 | unsigned int high; | 22 | unsigned int high; |